[all-commits] [llvm/llvm-project] cca173: [LoopInterchange] Identify unsafe instructions for...
Simon Pilgrim via All-commits
all-commits at lists.llvm.org
Thu Jun 4 00:56:17 PDT 2026
Branch: refs/heads/users/krzysz00/pre-commit-rocm-llvm-2616-fix-tests
Home: https://github.com/llvm/llvm-project
Commit: cca173885706f6c728b46f9035f034de4f39a4ba
https://github.com/llvm/llvm-project/commit/cca173885706f6c728b46f9035f034de4f39a4ba
Author: Ryotaro Kasuga <kasuga.ryotaro at fujitsu.com>
Date: 2026-06-03 (Wed, 03 Jun 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/LoopInterchange.cpp
M llvm/test/Transforms/LoopInterchange/atomic-memory-ordering.ll
M llvm/test/Transforms/LoopInterchange/call-instructions-remarks.ll
M llvm/test/Transforms/LoopInterchange/invoke.ll
Log Message:
-----------
[LoopInterchange] Identify unsafe instructions for interchange (#201402)
In LoopInterchange, all instructions in the loops are traversed and
checked during the legality phase, and the pass bails out if it finds an
instruction that is unsafe to interchange. However, previously it only
handled call instructions and ignored all others, leaving several kinds
of instruction that should have been detected but were not.
This patch fixes the issue by restructuring the legality check, in
particular replacing instruction‑specific handling with calling general
Instruction APIs.
Fixes #200913.
Commit: fb649b41b0db8cd33a5be613345be845a41d0d98
https://github.com/llvm/llvm-project/commit/fb649b41b0db8cd33a5be613345be845a41d0d98
Author: Miguel A. Arroyo <miguel.arroyo at rockstargames.com>
Date: 2026-06-03 (Wed, 03 Jun 2026)
Changed paths:
M compiler-rt/cmake/Modules/AddCompilerRT.cmake
Log Message:
-----------
[compiler-rt][cmake][msvc] Install PDBs for shared libraries (#201224)
Following up on similar PRs in the past to address PDBs not being copied
for install targets:
* https://github.com/llvm/llvm-project/pull/126961
* https://github.com/llvm/llvm-project/pull/126680
* https://github.com/llvm/llvm-project/pull/120683
Commit: 3c9afa9fe7c091dffd353e65a9a16653f139787b
https://github.com/llvm/llvm-project/commit/3c9afa9fe7c091dffd353e65a9a16653f139787b
Author: Petr Hosek <phosek at google.com>
Date: 2026-06-03 (Wed, 03 Jun 2026)
Changed paths:
A llvm/docs/ProjectGovernance.rst
M llvm/docs/index.rst
Log Message:
-----------
[Docs] Project governance documentation (#197108)
This page largely covers the same information as proposal LP-0004 and
also includes information on current area team and project council
composition.
Commit: 0a4f19e4769eae755cdad1a4af1d73988762dd2c
https://github.com/llvm/llvm-project/commit/0a4f19e4769eae755cdad1a4af1d73988762dd2c
Author: mygitljf <101249452+mygitljf at users.noreply.github.com>
Date: 2026-06-03 (Wed, 03 Jun 2026)
Changed paths:
M clang/lib/Format/UnwrappedLineParser.cpp
M clang/unittests/Format/FormatTestObjC.cpp
Log Message:
-----------
[clang-format][Objective-C] Fix assertion crash on stray '-'/'+' in @interfa… (#199104)
Before calling `parseObjCMethod()`, it now checks whether the next token
is a `(` or an identifier; if not, it simply skips ahead, thereby
preventing the assertion failure and subsequent crash.
Fixes #199075
Commit: b207fd6fd43514b2852ff64b89769a2cf4b781c2
https://github.com/llvm/llvm-project/commit/b207fd6fd43514b2852ff64b89769a2cf4b781c2
Author: Martin Storsjö <martin at martin.st>
Date: 2026-06-03 (Wed, 03 Jun 2026)
Changed paths:
M lldb/CMakeLists.txt
M lldb/source/Host/common/PythonRuntimeLoader.cpp
Log Message:
-----------
[lldb] Use the right MinGW name for the Python DLLs (#201325)
In MinGW mode, the Python DLLs have different names than they have in
MSVC mode; they are named `libpython<major>.<minor>.dll` (a "lib" prefix
and a dot between major and minor) and `libpython3.dll`.
This avoids a warning on startup after
142ad481b6254104a51da7d636ad9e3f30518a32 and total failures to start up
after 3eb13f8db39ed42827122489c830c414cb6660e3.
Commit: 98160521cb72966e984a241f28b1dc5aae19e4ec
https://github.com/llvm/llvm-project/commit/98160521cb72966e984a241f28b1dc5aae19e4ec
Author: Justin Lebar <justin.lebar at gmail.com>
Date: 2026-06-03 (Wed, 03 Jun 2026)
Changed paths:
M llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp
M llvm/test/CodeGen/NVPTX/global-ordering.ll
Log Message:
-----------
[NVPTX] Handle symbol-relative integer initializers in aggregates (#201220)
A symbol-relative integer applies an offset outside the ptrtoint, e.g.
@g = addrspace(1) global i8 0
@s = addrspace(1) global { i64, i64 }
{ i64 add (i64 ptrtoint (ptr addrspace(1) @g to i64), i64 4),
i64 7 }
I'm not sure this is an important feature, but it's explicitly
implemented and works for scalars; the bug is that it hits
llvm_unreachable if you use it inside an aggregate.
While we're here, we also add support for Sub in addition to Add.
Commit: 309ace568351f1d3001a736c58c496277fc000dd
https://github.com/llvm/llvm-project/commit/309ace568351f1d3001a736c58c496277fc000dd
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-06-03 (Wed, 03 Jun 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
Log Message:
-----------
[RISCV] Remove unnecessary explicit template parameter on has_single_bit (#201421)
I think this code was extracted into a function and the Amount was not a
uint32_t when it was in the original location.
Commit: 67a641cf8adb083e6694fbf306b375b99c45de91
https://github.com/llvm/llvm-project/commit/67a641cf8adb083e6694fbf306b375b99c45de91
Author: Razvan Lupusoru <razvan.lupusoru at gmail.com>
Date: 2026-06-03 (Wed, 03 Jun 2026)
Changed paths:
M mlir/include/mlir/Dialect/OpenACC/OpenACCCGOps.td
M mlir/lib/Dialect/OpenACC/IR/OpenACC.cpp
M mlir/lib/Dialect/OpenACC/IR/OpenACCCG.cpp
M mlir/lib/Dialect/OpenACC/Transforms/ACCComputeLowering.cpp
A mlir/test/Dialect/OpenACC/acc-compute-lowering-compute-async-wait.mlir
M mlir/test/Dialect/OpenACC/canonicalize.mlir
Log Message:
-----------
[mlir][acc] Specialize compute region target during ACCComputeLowering (#201386)
During ACCComputeLowering, when an acc compute region (such as
acc.parallel) is split into in acc.kernel_environment and
acc.compute_region, all wait and async operands are transferred over.
This includes the multiple lists that are used to manage device_type
specific aspects eg:
`acc parallel async device_type(nvidia) async(2)`
This ends up as
`acc.parallel async([#acc.device_type<none>], %c2_i32 : i32
[#acc.device_type<nvidia>])`
And similarly, acc.kernel_environment inherited both async aspects.
However, during ACCComputeLowering, the pass knows its device_type
target. Thus it can directly create a single async (because only
async(2) applies when device_type is nvidia): `acc.kernel_environment
async(%c2_i32 : i32)`
This MR simplifies the operation to not hold all of the multiple lists
and updates to ACCComputeLowering pass to ensure to transfer only
relevant information. The intent/goal is that the none of the CG
operations will hold device_type specific lists.
Commit: deb6854eec93529b2bd30178d400ad2ee7665cd4
https://github.com/llvm/llvm-project/commit/deb6854eec93529b2bd30178d400ad2ee7665cd4
Author: Justin Lebar <justin.lebar at gmail.com>
Date: 2026-06-03 (Wed, 03 Jun 2026)
Changed paths:
M llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp
M llvm/lib/Target/NVPTX/NVPTXAsmPrinter.h
M llvm/test/CodeGen/NVPTX/globals_init.ll
Log Message:
-----------
[NVPTX] Pad non-power-of-2 vectors in structs properly. (#201246)
A non-power-of-2 vector inside of a struct is padded up to its alloc
size.
But when the NVPTX asm printer emits bytes for such a struct, it
currently skips this tail padding, thus emitting an incorrect struct.
Commit: 971076f616e6c6f07580c506375b700b207224f9
https://github.com/llvm/llvm-project/commit/971076f616e6c6f07580c506375b700b207224f9
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-06-03 (Wed, 03 Jun 2026)
Changed paths:
M mlir/test/Conversion/ConvertToSPIRV/arith.mlir
Log Message:
-----------
[NFC][mlir][SPIR-V] Test ceildivui/ceildivsi/floordivsi via test-convert-to-spirv (#198766)
SPIR-V has no direct opcode for these ops. Verify that using
`--test-convert-to-spirv` pass is sufficient to convert these ops to
SPIR-V
Commit: 55587f7b757583b1e30c3027803ed092790471a3
https://github.com/llvm/llvm-project/commit/55587f7b757583b1e30c3027803ed092790471a3
Author: Adhemerval Zanella <zatrazz at gmail.com>
Date: 2026-06-03 (Wed, 03 Jun 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
M llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.h
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/test/CodeGen/AArch64/read-fp-reg.ll
A llvm/test/CodeGen/AArch64/read-reg-non-entry.ll
M llvm/test/CodeGen/AArch64/write-volatile-register.ll
Log Message:
-----------
[CodeGen] Mark read_register of allocatable physreg as live-in (#200825)
llvm.read_register / llvm.read_volatile_register of an allocatable
register (e.g. the MSVC __getReg/__getRegFp intrinsics reading xN/dN)
was lowered to a plain COPY from the physical register. That COPY uses a
physical register that is never defined, which the machine verifier
rejects as "Using an undefined physical register" (seen on
read-fp-reg.ll under LLVM_ENABLE_EXPENSIVE_CHECKS).
Reading such a register only makes sense as "whatever value it currently
holds", i.e. like an inline-asm read; it cannot be modelled as a normal
SSA use of a physical register, and a live-in only works in the entry
block.
Lower these reads in AArch64 like the existing MRS/MSR sysreg path:
select to a small pseudo (READ_REGISTER_GPR64 / READ_REGISTER_FPR64)
that carries the source register as an immediate operand rather than a
tracked physical-register use, and have the AsmPrinter materialize the
real "mov Xt, Xn" / "fmov Dt, Dn". The verifier never sees an undefined
physreg use, so the read is valid in any block and needs no live-in or
undef. Reads of reserved registers (e.g. sp) and system registers keep
their existing lowering.
Commit: 4d23acde98acb72e103d8c999edf752a9317aced
https://github.com/llvm/llvm-project/commit/4d23acde98acb72e103d8c999edf752a9317aced
Author: Keith Smiley <keithbsmiley at gmail.com>
Date: 2026-06-03 (Wed, 03 Jun 2026)
Changed paths:
M .github/workflows/release-binaries.yml
M llvm/utils/release/github-upload-release.py
Log Message:
-----------
[release] Add zstd archives to github releases (#186526)
This leaves the previous xz files but also creates zstd archives of the
binaries. This provides significantly reduced download sizes. We could
integrate this with cpack but we don't have control over the compression
level in that until version 4.3 which isn't even released yet.
Fixes https://github.com/llvm/llvm-project/issues/164537
Commit: f70a28f4d1b5d17d94fca03fb74387ad800560de
https://github.com/llvm/llvm-project/commit/f70a28f4d1b5d17d94fca03fb74387ad800560de
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2026-06-03 (Wed, 03 Jun 2026)
Changed paths:
A lldb/docs/resources/build.md
R lldb/docs/resources/build.rst
A lldb/docs/resources/dataformatters.md
R lldb/docs/resources/dataformatters.rst
A lldb/docs/resources/debugging.md
R lldb/docs/resources/debugging.rst
A lldb/docs/resources/extensions.md
R lldb/docs/resources/extensions.rst
A lldb/docs/resources/formatterbytecode.md
R lldb/docs/resources/formatterbytecode.rst
A lldb/docs/resources/overview.md
R lldb/docs/resources/overview.rst
A lldb/docs/resources/projects.md
R lldb/docs/resources/projects.rst
A lldb/docs/resources/qemu-testing.md
R lldb/docs/resources/qemu-testing.rst
A lldb/docs/resources/sbapi.md
R lldb/docs/resources/sbapi.rst
A lldb/docs/resources/test.md
R lldb/docs/resources/test.rst
Log Message:
-----------
[lldb][docs] Convert resources/ RST docs to Markdown (NFC) (#201442)
Convert the ten contributor-facing RST docs under lldb/docs/resources/
to MyST Markdown. This is the second batch of an incremental RST ->
Markdown migration. The previous PR (#201256) covered nine small leaf
pages.
Files: build, dataformatters, debugging, extensions, formatterbytecode,
overview, projects, qemu-testing, sbapi, test.
Verified by building the docs on origin/main and on this branch with
identical sphinx flags and diffing both the warnings and the rendered
HTML. After file extension and line numbers are normalized, the warning
sets match exactly. Six of the ten pages are byte-identical. The four
that differ (dataformatters, projects, sbapi, test) differ only in:
- CommonMark collapsing two-spaces-after-period to one.
- MyST adding a `myst` CSS class to `<dl>` elements and an `<hr>`
separator before footnote sections.
- Footnote IDs renamed from auto `id3` to named `footnote-1`.
The diff also surfaced two semantic regressions in the conversion, fixed
here:
- build.md `{ref}` to `Optional Dependencies` did not match the new
`(optional-dependencies)=` anchor; updated to use the new label.
- test.md and build.md lost cross-reference behavior on single- backtick
refs to SB-class names and `lldb`. RST's default role is `any`, so
single backticks attempted xrefs; in MyST single backticks are plain
code spans. Converted these 14 occurrences to explicit `{any}`...``
syntax.
Several `eval-rst` blocks remain in formatterbytecode.md and test.md to
preserve grid tables that MyST does not render natively.
Context: https://discourse.llvm.org/t/rfc-make-myst-markdown-the-llvm-docs-format-rip-rest/
Assisted-by: Claude
Commit: ad422cd10bfd0be0c069221546de7c7299ca305d
https://github.com/llvm/llvm-project/commit/ad422cd10bfd0be0c069221546de7c7299ca305d
Author: Zhen Wang <zhenw at nvidia.com>
Date: 2026-06-03 (Wed, 03 Jun 2026)
Changed paths:
M flang/lib/Semantics/expression.cpp
A flang/test/Semantics/cuf-constant-generic-unified.cuf
Log Message:
-----------
[flang][cuda] Handle Constant and Shared attributes in CUDA generic matching distance (#201451)
The CUDA generic resolution matching distance function did not handle
actual arguments with the `Constant` or `Shared` data attribute. These
attributes represent device memory but were unhandled, causing the
distance to fall through to infinity. Under `-gpu=mem:unified`, this led
to spurious ambiguity errors when multiple specifics (e.g.
host-to-device and device-to-device overloads) both became candidates
with tied infinite distances.
Treat Constant and Shared actuals the same as Device in the matching
distance table, since all three reside in device memory.
Commit: 9ae0d890a9236a94f23d5c3ff84ea08d7a670f03
https://github.com/llvm/llvm-project/commit/9ae0d890a9236a94f23d5c3ff84ea08d7a670f03
Author: Ryosuke Niwa <rniwa at webkit.org>
Date: 2026-06-03 (Wed, 03 Jun 2026)
Changed paths:
M clang/lib/StaticAnalyzer/Checkers/WebKit/PtrTypesSemantics.cpp
M clang/test/Analysis/Checkers/WebKit/call-args.cpp
M clang/test/Analysis/Checkers/WebKit/mock-types.h
M clang/test/Analysis/Checkers/WebKit/nodelete-annotation.cpp
A clang/test/Analysis/Checkers/WebKit/nodelete-lazy-initialize.cpp
Log Message:
-----------
[alpha.webkit.NoDeleteChecker] Treat a r-value smart pointer return value as no-delete. (#200912)
Skip the checkin g of the destructor of T in ExprWithCleanups /
CXXBindTemporaryExpr when returning a value using r-value reference
since such a construct never invokes delete.
---------
Co-authored-by: Balazs Benics <benicsbalazs at gmail.com>
Commit: 901cfb4aa4d52fd4f751b78bf932f54210fdcf5b
https://github.com/llvm/llvm-project/commit/901cfb4aa4d52fd4f751b78bf932f54210fdcf5b
Author: Brian Cain <brian.cain at oss.qualcomm.com>
Date: 2026-06-03 (Wed, 03 Jun 2026)
Changed paths:
M llvm/lib/Target/Hexagon/HexagonHardwareLoops.cpp
M llvm/lib/Target/Hexagon/HexagonLoopIdiomRecognition.cpp
M llvm/lib/Target/Hexagon/HexagonVectorCombine.cpp
M llvm/lib/Target/Hexagon/HexagonVectorLoopCarriedReuse.cpp
A llvm/test/CodeGen/Hexagon/hvc-remarks.ll
A llvm/test/CodeGen/Hexagon/hwloop-remarks.ll
A llvm/test/CodeGen/Hexagon/loop-idiom-remarks.ll
A llvm/test/CodeGen/Hexagon/vlcr-remarks.ll
Log Message:
-----------
[Hexagon] Add optimization remarks to Hexagon IR and MIR passes (#189176)
Add OptimizationRemark/OptimizationRemarkMissed emissions to four
Hexagon-specific passes, making them observable via the standard
-Rpass/-Rpass-missed flags:
- HexagonLoopIdiomRecognition (hexagon-lir): remarks for loop-to-memcpy/
memmove conversions and polynomial multiply recognition, with missed
remarks for non-countable loops, aliasing, non-affine pointers, etc.
- HexagonVectorLoopCarriedReuse (hexagon-vlcr): remarks for reused
loop-carried vector values, with missed remarks for multi-block loops,
non-innermost loops, and missing candidates.
- HexagonVectorCombine (hexagon-vc): remarks for aligned vector memory
operations, with missed remarks for group size limits, unsafe
relocations, and insufficient HVX version.
- HexagonHardwareLoops (hwloops): remarks for hardware loop conversion,
with missed remarks for invalid instructions (calls), multiple exits,
induction variable issues, and non-computable trip counts.
Commit: 5f975bb6afec710e4ef47c3b90a299b2212c6ec0
https://github.com/llvm/llvm-project/commit/5f975bb6afec710e4ef47c3b90a299b2212c6ec0
Author: Michael Spencer <bigcheesegs at gmail.com>
Date: 2026-06-03 (Wed, 03 Jun 2026)
Changed paths:
M clang/include/clang-c/BuildSystem.h
M clang/include/clang/Serialization/ModuleCache.h
M clang/lib/Serialization/ModuleCache.cpp
M clang/tools/libclang/BuildSystem.cpp
M clang/tools/libclang/libclang.map
M clang/unittests/libclang/LibclangTest.cpp
Log Message:
-----------
[libclang] Add clang_ModuleCache_pruneWithCallback (#199789)
clang_ModuleCache_pruneWithCallback takes a callback that is invoked for
each PCM that gets pruned. This is to support build systems that would
like to clean up additional data when PCMs are removed from disk.
Commit: 2e9cdc4f3be729686c8c238f9da2ffa961690e47
https://github.com/llvm/llvm-project/commit/2e9cdc4f3be729686c8c238f9da2ffa961690e47
Author: Justin Lebar <justin.lebar at gmail.com>
Date: 2026-06-03 (Wed, 03 Jun 2026)
Changed paths:
M llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp
M llvm/test/CodeGen/NVPTX/global-ordering.ll
Log Message:
-----------
[NVPTX] Remove support for `sub` in global initializers. (#201473)
I added this in https://github.com/llvm/llvm-project/pull/201220 and
assumed it worked because the pre-commit builders passed. But (a) this
is not attested in the PTX ISA, and (b) it seems that the builders don't
actually run ptxas.
Oops. Removed support for `sub`.
Commit: 49ac4f475e4cf643a3fd68f9bf97f6b7d1adef83
https://github.com/llvm/llvm-project/commit/49ac4f475e4cf643a3fd68f9bf97f6b7d1adef83
Author: Andrei Safronov <andrei.safronov at espressif.com>
Date: 2026-06-04 (Thu, 04 Jun 2026)
Changed paths:
M llvm/test/CodeGen/Xtensa/inline-asm-invalid.ll
M llvm/test/CodeGen/Xtensa/setcc.ll
Log Message:
-----------
[Xtensa] Fix setcc test. (#201196)
Fix setcc test after changes in llvm passes.
Also add minor fix in inline-asm-invalid.ll test.
Commit: 2b081a26d96450283814209d2b9001db89000f0a
https://github.com/llvm/llvm-project/commit/2b081a26d96450283814209d2b9001db89000f0a
Author: Jeffrey Byrnes <jeffrey.byrnes at amd.com>
Date: 2026-06-03 (Wed, 03 Jun 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/GCNSubtarget.cpp
M llvm/test/CodeGen/AMDGPU/asyncmark-gfx12plus.ll
A llvm/test/CodeGen/AMDGPU/ldsdmacnt_sched.mir
M llvm/test/CodeGen/AMDGPU/promote-constOffset-to-imm-gfx12.ll
M llvm/test/CodeGen/AMDGPU/promote-constOffset-to-imm-gfx12.mir
M llvm/test/CodeGen/AMDGPU/sched-ldsdma-mask.mir
Log Message:
-----------
[AMDGPU] Do not add latency for tensorcnt / asynccnt dependencies (#201201)
Currently, when constructing the ScheduleDAG we see dependencies between
LDSDMA->LDSDMA or s_wait->s_wait due to implicit $asynccnt / $tensorcnt
operands. These implicit operands are necessary to force ordering of the
instructions, but there should be no latency for this dependency. In the
LDSDMA->LDSDMA case, the scheduler thinks it will be hundreds of cycles
until the next LDSDMA is ready.
This handles the cases:
1. LDSDMA -> LDSDMA
2. WAIT -> LDSDMA
3. WAIT -> WAIT
In the LDSDMA -> WAIT case, usually the relevant WAIT is in a different
iteration, so we don't need latency between these instructions in the
same iteration, though that isn't guaranteed. I plan to handle remove
the latency for obvious cases in a followup PR.
Commit: 7917772d7d61384696c61102c08c2ea158e610fa
https://github.com/llvm/llvm-project/commit/7917772d7d61384696c61102c08c2ea158e610fa
Author: Akash Dutta <137309513+akadutta at users.noreply.github.com>
Date: 2026-06-03 (Wed, 03 Jun 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
Log Message:
-----------
[AMDGPU][NFC] Hoist independent condition out of loop in dependsOnLocalPhi in AMDGPUTTI (#198789)
Commit: 58de983ea7c28e1fa83add7d89d5e7b2cc6e9386
https://github.com/llvm/llvm-project/commit/58de983ea7c28e1fa83add7d89d5e7b2cc6e9386
Author: Shilei Tian <i at tianshilei.me>
Date: 2026-06-03 (Wed, 03 Jun 2026)
Changed paths:
M llvm/include/llvm/IR/Intrinsics.td
Log Message:
-----------
[NFC] Remove trailing whitespaces in Intrinsics.td (#201472)
Commit: aa9099a47468425b6d16613e08ae84c8c77671b7
https://github.com/llvm/llvm-project/commit/aa9099a47468425b6d16613e08ae84c8c77671b7
Author: Justin Lebar <justin.lebar at gmail.com>
Date: 2026-06-03 (Wed, 03 Jun 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/JumpThreading.cpp
M llvm/test/Transforms/JumpThreading/noalias-scope-decl.ll
Log Message:
-----------
[JumpThreading] Clone noalias scopes in duplicateCondBranchOnPHIIntoPred (#200550)
duplicateCondBranchOnPHIIntoPred clones a block into a predecessor with
its own loop. Unlike cloneInstructions (used by threadEdge), it never
cloned the duplicated noalias scope declarations. The duplicated code
therefore shared the original's !alias.scope/!noalias MDNodes, letting
AA incorrectly treat two accesses on different paths as non-aliasing.
Fix by cloning the scopes.
Commit: 7132f8f40649ebe15f701c8103e22dead7ea8f71
https://github.com/llvm/llvm-project/commit/7132f8f40649ebe15f701c8103e22dead7ea8f71
Author: Shilei Tian <i at tianshilei.me>
Date: 2026-06-03 (Wed, 03 Jun 2026)
Changed paths:
M llvm/docs/ReleaseNotes.md
Log Message:
-----------
[NFC] Remove trailing whitespaces from llvm/docs/ReleaseNotes.md (#201478)
Commit: 96a50e0ee0959dd3095b0d3c561fab0c5f5fe94c
https://github.com/llvm/llvm-project/commit/96a50e0ee0959dd3095b0d3c561fab0c5f5fe94c
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-06-03 (Wed, 03 Jun 2026)
Changed paths:
M clang/lib/Driver/ToolChain.cpp
M clang/test/Driver/lto.c
Log Message:
-----------
[Clang] Accept `-flto=none` similar to `-fno-lto` (#201460)
Summary:
Personal preference, but I would like to be able to set all the LTO
kinds from the string, and it feels a little odd to need to use
`-fno-lto` to override the mode.
Commit: 086f9c1e6ea3ed30345f685d9055f57f044834a7
https://github.com/llvm/llvm-project/commit/086f9c1e6ea3ed30345f685d9055f57f044834a7
Author: ovatonne <ovatonne at gmail.com>
Date: 2026-06-04 (Thu, 04 Jun 2026)
Changed paths:
M libcxx/test/std/containers/exception_safety_helpers.h
M libcxx/test/std/containers/sequences/forwardlist/exception_safety.pass.cpp
Log Message:
-----------
[libc++][tests] Add missing strong exception guarantee test coverage in forward_list (#200666)
Adds missing test coverage for exception guarantees in forward_list.
- Strong exception guarantee for forward_list::push_front and
forward_list::emplace_front.
- Exception guarantee for constructor, operator= and assign overloads
taking an initializer_list.
- Add move and inplace construction as throwing functions in test
helpers.
- Add tests throwing upon moving or constructing elements inplace for
relevant overloads.
Commit: 8a21afca17117a380f2716ae81fb402d673f48fe
https://github.com/llvm/llvm-project/commit/8a21afca17117a380f2716ae81fb402d673f48fe
Author: Elvis Wang <elvis.wang at sifive.com>
Date: 2026-06-03 (Wed, 03 Jun 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
A llvm/test/Transforms/LoopVectorize/AArch64/arith-costs.ll
R llvm/test/Transforms/LoopVectorize/AArch64/binop-costs.ll
M llvm/test/Transforms/LoopVectorize/AArch64/call-costs.ll
M llvm/test/Transforms/LoopVectorize/AArch64/cmp_cost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/conditional-branches-cost.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/vpinstruction-cost.ll
M llvm/test/Transforms/LoopVectorize/X86/predicate-switch.ll
Log Message:
-----------
[LV] Add cost for VPInstruction::Not. (#198445)
This patch add the cost for VPInstruction::Not which will lower to Xor.
Commit: ff812a578f236d3554750391041146a6781a9f55
https://github.com/llvm/llvm-project/commit/ff812a578f236d3554750391041146a6781a9f55
Author: Med Ismail Bennani <ismail at bennani.ma>
Date: 2026-06-03 (Wed, 03 Jun 2026)
Changed paths:
M lldb/packages/Python/lldbsuite/test/lldbtest.py
Log Message:
-----------
[lldb/test] Add _excluded_variant_combinations hook in lldbtest (#201459)
Add a module-scope hook that LLDBTestCaseFactory consults during variant
expansion so the suite can declare combinations of variant axis values
that should never be generated. Each entry in
`_excluded_variant_combinations` is a dict mapping variant_name ->
value; the helper `_is_excluded_variant_combination(method,
variant_name, value_name)` returns True when assigning the given
variant=value to the method would produce a combination matching every
entry. `_expand_test_variants` checks the predicate before generating
each copy and drops the variant entirely so excluded crosses don't
appear in the test matrix at all.
This is a suite-wide per-axis-combination analogue of
NO_DEBUG_INFO_TESTCASE: instead of collapsing the entire debug-info axis
for one test class, it lets the suite declare narrowly that any variant
carrying e.g. {"swift_module_importer": "noclang", "swift_embedded":
"swiftembed"} should be dropped, regardless of which source method or
test class generated it. Useful when a subset of the variant matrix is
known broken (or simply redundant) without resorting to broad @skipIf /
@expectedFailureAll decorators on each affected method.
The list starts empty; the first downstream consumer
(swiftlang/llvm-project) adds the noclang × swiftembed cross at the same
time it registers the swift_module_importer / swift_embedded variants.
Signed-off-by: Med Ismail Bennani <ismail at bennani.ma>
Commit: c10e5060490e1377a4d59cab5f8e345134d35d97
https://github.com/llvm/llvm-project/commit/c10e5060490e1377a4d59cab5f8e345134d35d97
Author: Michael Jones <michaelrj at google.com>
Date: 2026-06-03 (Wed, 03 Jun 2026)
Changed paths:
M libc/config/linux/x86_64/entrypoints.txt
M libc/include/CMakeLists.txt
M libc/include/inttypes.yaml
M libc/src/inttypes/CMakeLists.txt
A libc/src/inttypes/wcstoimax.cpp
A libc/src/inttypes/wcstoimax.h
A libc/src/inttypes/wcstoumax.cpp
A libc/src/inttypes/wcstoumax.h
M libc/test/src/inttypes/CMakeLists.txt
A libc/test/src/inttypes/wcstoimax_test.cpp
A libc/test/src/inttypes/wcstoumax_test.cpp
Log Message:
-----------
[libc] implement wcstoimax/wcstoumax (#200284)
Adds the implementation and tests for wide character to intmax_t and
uintmax_t.
Assisted-by: Automated tooling, human reviewed.
Commit: 2e27610b8f79c34238ffc405d3f4558945c32752
https://github.com/llvm/llvm-project/commit/2e27610b8f79c34238ffc405d3f4558945c32752
Author: Florian Mayer <fmayer at google.com>
Date: 2026-06-04 (Thu, 04 Jun 2026)
Changed paths:
M llvm/lib/Bitcode/Reader/BitcodeReader.cpp
M llvm/lib/IR/BasicBlock.cpp
M llvm/lib/IR/Verifier.cpp
M llvm/lib/Transforms/Utils/InlineFunction.cpp
R llvm/test/Bitcode/musttail-bitcast-upgrade.ll
R llvm/test/Bitcode/musttail-bitcast-upgrade.ll.bc
M llvm/test/Instrumentation/AddressSanitizer/musttail.ll
M llvm/test/Instrumentation/ThreadSanitizer/tsan_musttail.ll
M llvm/test/Transforms/CallSiteSplitting/musttail.ll
M llvm/test/Transforms/SafeStack/X86/musttail.ll
M llvm/test/Verifier/musttail-invalid.ll
Log Message:
-----------
Revert "Remove the optional bitcast between a musttail call and its ret" (#201479)
This reverts https://github.com/llvm/llvm-project/pull/201280
This broke MSan on the buildbots:
https://lab.llvm.org/buildbot/#/builders/169/builds/23291/steps/10/logs/stdio
This is the only change in the batch that touched BitcodeReader
Commit: 0f3d6b9cac25c750f5fa477d92ba15b68b03e210
https://github.com/llvm/llvm-project/commit/0f3d6b9cac25c750f5fa477d92ba15b68b03e210
Author: Lang Hames <lhames at gmail.com>
Date: 2026-06-04 (Thu, 04 Jun 2026)
Changed paths:
M llvm/include/llvm/ExecutionEngine/Orc/Core.h
A llvm/include/llvm/ExecutionEngine/Orc/SymbolLookupSet.h
Log Message:
-----------
[ORC] Lift SymbolLookupSet into its own header. NFCI. (#201295)
Lifts the SymbolLookupSet class and SymbolLookupFlags enum out of Core.h
and into a new SymbolLookupSet.h header.
Commit: f0d98c3693a47679115ce05a5a5629e9b869472f
https://github.com/llvm/llvm-project/commit/f0d98c3693a47679115ce05a5a5629e9b869472f
Author: savchart <metaartem at protonmail.com>
Date: 2026-06-04 (Thu, 04 Jun 2026)
Changed paths:
M clang-tools-extra/clang-tidy/readability/FunctionSizeCheck.cpp
M clang-tools-extra/clang-tidy/readability/FunctionSizeCheck.h
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/function-size.rst
A clang-tools-extra/test/clang-tidy/checkers/readability/function-size-ignore-macros.cpp
Log Message:
-----------
[clang-tidy][readability] Ignore macros in function-size check (#199549)
This patch adds an IgnoreMacros option to the readability-function-size
check.
Fixes https://github.com/llvm/llvm-project/issues/112835
Commit: 9263a42920ea470ff7377fa3ca3b3759aeb86fa1
https://github.com/llvm/llvm-project/commit/9263a42920ea470ff7377fa3ca3b3759aeb86fa1
Author: Johannes Doerfert <jdoerfert.llvm at gmail.com>
Date: 2026-06-04 (Thu, 04 Jun 2026)
Changed paths:
M clang/test/OpenMP/amdgcn_weak_alias.c
M clang/test/OpenMP/declare_target_codegen.cpp
M clang/test/OpenMP/target_codegen.cpp
M clang/test/OpenMP/target_depend_codegen.cpp
M clang/test/OpenMP/target_indirect_codegen.cpp
M clang/test/OpenMP/target_parallel_depend_codegen.cpp
M clang/test/OpenMP/target_parallel_for_depend_codegen.cpp
M clang/test/OpenMP/target_parallel_for_simd_depend_codegen.cpp
M clang/test/OpenMP/target_simd_codegen.cpp
M clang/test/OpenMP/target_simd_depend_codegen.cpp
M clang/test/OpenMP/target_teams_depend_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_depend_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_depend_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_simd_depend_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_simd_depend_codegen.cpp
M llvm/include/llvm/Frontend/Offloading/Utility.h
M llvm/lib/Frontend/Offloading/Utility.cpp
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
M mlir/test/Target/LLVMIR/omptarget-declare-target-llvm-host.mlir
M mlir/test/Target/LLVMIR/omptarget-declare-target-to-host.mlir
Log Message:
-----------
[OpenMP] Use ext linkage for kernels handles and globals handles keep… (#200964)
… linkage
Host handles are now emmitted with external linkage to clash if two
kernels with the same name are registered. This could have happen right
now and silently corrupt the program, but it can happen more easily once
we allow users to name their kernels.
In the same patch we make global variable handles retain the linkage of
the global variable, forcing clashes for external ones and continue to
support weak use cases.
---------
Co-authored-by: Shilei Tian <i at tianshilei.me>
Commit: 97d72648474f2bd8832810993a31a69d28196ffe
https://github.com/llvm/llvm-project/commit/97d72648474f2bd8832810993a31a69d28196ffe
Author: Teresa Johnson <tejohnson at google.com>
Date: 2026-06-03 (Wed, 03 Jun 2026)
Changed paths:
M llvm/lib/Transforms/IPO/MemProfContextDisambiguation.cpp
M llvm/test/ThinLTO/X86/memprof-icp-recursive.ll
Log Message:
-----------
[MemProf] Change default of memprof-icp-noinline-threshold to 0 (#201474)
This is no longer needed after PR172502 added support to identify
indirect callees from inlined frames.
Commit: 84085aac175bd949c521957af88ff5cda4aeeb20
https://github.com/llvm/llvm-project/commit/84085aac175bd949c521957af88ff5cda4aeeb20
Author: Longsheng Mou <longshengmou at gmail.com>
Date: 2026-06-04 (Thu, 04 Jun 2026)
Changed paths:
M mlir/lib/Dialect/Linalg/Transforms/Specialize.cpp
M mlir/test/Dialect/Linalg/roundtrip-morphism-linalg-category-ops.mlir
M mlir/test/Dialect/Linalg/roundtrip-morphism-linalg-named-ops.mlir
Log Message:
-----------
[mlir][linalg] Improve contraction specialization (#201300)
Extend the matcher to recognize additional supported boolean contraction
form(and+or). Fixes #198235.
Commit: 70256dff97f1393c0bceb6c90c0341215d2ba598
https://github.com/llvm/llvm-project/commit/70256dff97f1393c0bceb6c90c0341215d2ba598
Author: Chi-Chun, Chen <chichun.chen at hpe.com>
Date: 2026-06-03 (Wed, 03 Jun 2026)
Changed paths:
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Lower/OpenMP/Utils.cpp
M flang/lib/Lower/OpenMP/Utils.h
R flang/test/Lower/OpenMP/Todo/metadirective-dynamic.f90
M flang/test/Lower/OpenMP/metadirective-user.f90
M flang/test/Semantics/OpenMP/metadirective-user.f90
Log Message:
-----------
[flang][OpenMP] Support lowering of metadirective (part 2) (#194424)
Lower non-constant `user={condition(expr)}` selectors in OpenMP
metadirectives to a runtime `fir.if` / `else` selection cascade.
Dynamic user conditions are handled in two separate phases:
- Static applicability uses only selector traits that are known at
compile time.
- Guarded ranking preserves selector specificity and dynamic-condition
scores for the path where the runtime condition evaluates to true.
Lowering first filters candidates using compile-time selector traits,
then orders the remaining candidates with the normal OpenMP variant
ranking rules. If the selected candidate has a non-constant user
condition, that condition is emitted as a `fir.if` guard. When the
condition evaluates to false, the `else` branch continues selection
among the remaining candidates.
For example:
```fortran
!$omp metadirective &
!$omp & when(user={condition(score(100): high)}: barrier) &
!$omp & when(user={condition(low)}: taskwait) &
!$omp & otherwise(nothing)
```
is selected as:
```text
if (high) barrier
else if (low) taskwait
else nothing
```
Scores attached to dynamic `condition(score(...): expr)` selectors are
preserved for the guarded candidate. As a result, those scores affect
ranking only on the runtime path where the condition is true, instead of
allowing a false runtime condition to influence unconditional selection.
This also fixes the interactions with `extension(match_any)` and
`extension(match_none)`:
- `match_any` can be satisfied by a runtime condition when no static
trait matches.
- If static traits already satisfy `match_any`, the dynamic condition
score is used only when the condition is true.
- `match_none` keeps the dynamic condition inactive for static
applicability while still preserving its score for ranking.
For example, this `match_any` selector is statically applicable through
`vendor(llvm)`, but the score on `flag` is used only when `flag`
evaluates to true:
```fortran
!$omp metadirective &
!$omp & when(implementation={extension(match_any), vendor(llvm)}, &
!$omp & user={condition(score(100): flag)}: barrier) &
!$omp & when(user={condition(score(10): .true.)}: taskwait) &
!$omp & otherwise(nothing)
```
is selected as:
```text
if (flag) barrier
else taskwait
```
The final fallback is the highest-ranked unguarded candidate, an
explicit `otherwise` / `default` clause, or implicit `nothing`.
This patch is part of the feature work for #188820 and is stacked on top
of [#193664](https://github.com/llvm/llvm-project/pull/193664).
Assisted with Copilot and GPT-5.4.
Commit: a53507fb5c108f0fd71270bf6498fa0f283b27c1
https://github.com/llvm/llvm-project/commit/a53507fb5c108f0fd71270bf6498fa0f283b27c1
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-06-04 (Thu, 04 Jun 2026)
Changed paths:
M clang/lib/AST/ByteCode/Interp.cpp
M clang/lib/AST/ByteCode/Pointer.h
M clang/test/AST/ByteCode/cxx20.cpp
Log Message:
-----------
[clang][bytecode] Fix a crash with covariant return types (#201354)
`Context::collectBaseOffset()` will assert if the passed-in classes are
the same.
Commit: 36e714b78712ef7f697d172b3ede0131568b892c
https://github.com/llvm/llvm-project/commit/36e714b78712ef7f697d172b3ede0131568b892c
Author: Lang Hames <lhames at gmail.com>
Date: 2026-06-04 (Thu, 04 Jun 2026)
Changed paths:
M llvm/include/llvm/ExecutionEngine/Orc/Shared/OrcRTBridge.h
M llvm/include/llvm/ExecutionEngine/Orc/Shared/TargetProcessControlTypes.h
M llvm/include/llvm/ExecutionEngine/Orc/TargetProcess/ExecutorResolver.h
M llvm/lib/ExecutionEngine/Orc/EPCDynamicLibrarySearchGenerator.cpp
M llvm/lib/ExecutionEngine/Orc/EPCGenericDylibManager.cpp
M llvm/lib/ExecutionEngine/Orc/ExecutorResolutionGenerator.cpp
M llvm/lib/ExecutionEngine/Orc/SelfExecutorProcessControl.cpp
M llvm/lib/ExecutionEngine/Orc/TargetProcess/ExecutorResolver.cpp
M llvm/lib/ExecutionEngine/Orc/TargetProcess/SimpleExecutorDylibManager.cpp
M llvm/tools/lli/ForwardingMemoryManager.h
M llvm/unittests/ExecutionEngine/Orc/ObjectLinkingLayerTest.cpp
Log Message:
-----------
[ORC] Replace ExecutorSymbolDef with ExecutorAddr in remote lookup. (#201492)
Update DylibManager and associated interfaces to return ExecutorAddrs
for remote symbols, rather than ExecutorSymbolDefs. No clients were
using the flags component of ExecutorSymbolDef, and this brings the
SimpleExecutorDylibManager implementation in OrcTargetProcess into
closer alignment with the NativeDylibManager implementation in the new
ORC runtime.
Commit: 4a77ce7c6f510283083dba0daccefc4d32326e44
https://github.com/llvm/llvm-project/commit/4a77ce7c6f510283083dba0daccefc4d32326e44
Author: Steffen Larsen <sholstla at amd.com>
Date: 2026-06-04 (Thu, 04 Jun 2026)
Changed paths:
M llvm/lib/CodeGen/SplitKit.cpp
A llvm/test/CodeGen/AMDGPU/splitkit-getsubrangeformask-phi-extend.ll
Log Message:
-----------
[CodeGen][AMDGPU] Remove premature empty subrange elimination (#201263)
This commit removes a call to `removeEmptySubRanges` inside
`SplitEditor::rewriteAssigned` which removes empty subranges that may be
expected at a later stage. The empty subranges are eliminated by a later
call to `removeEmptySubRanges`.
Fixes https://github.com/llvm/llvm-project/issues/199337.
---------
Signed-off-by: Steffen Holst Larsen <sholstla at amd.com>
Commit: c17f6208157d04b730576d84c8998f7bd8112cef
https://github.com/llvm/llvm-project/commit/c17f6208157d04b730576d84c8998f7bd8112cef
Author: Madhur Amilkanthwar <madhura at nvidia.com>
Date: 2026-06-04 (Thu, 04 Jun 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/LoopInterchange.cpp
A llvm/test/Transforms/LoopInterchange/reduction2mem-extra-lcssa.ll
Log Message:
-----------
[LoopInterchange] Check all inner-exit LCSSA PHIs (#200860)
areInnerLoopExitPHIsSupported() returned true as soon as it saw the
reduction LCSSA PHI, skipping the user-check for any later LCSSA PHIs.
If one had a non-PHI user, legality wrongly succeeded and the transform
hit a cast<PHINode> assertion. Use continue so the remaining PHIs are
still validated.
Fixes #200811.
Commit: cdf26f6721363d542865d826dd6455d448e1e860
https://github.com/llvm/llvm-project/commit/cdf26f6721363d542865d826dd6455d448e1e860
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-06-03 (Wed, 03 Jun 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/test/CodeGen/RISCV/div-by-constant.ll
M llvm/test/CodeGen/RISCV/srem-lkk.ll
M llvm/test/CodeGen/RISCV/srem-vector-lkk.ll
Log Message:
-----------
[RISCV] Fold (add X, (mulhs X, C)) -> (mulhsu X, C) if C is negative. (#199287)
Improves some division by constant cases.
Based on this blog post
https://needlesscomplexity.substack.com/p/implementing-division-by-multiplying
Correctness proof is sketched out in the comments.
Commit: e75e96af6987cb017f8d11efc1eed430b0d6080d
https://github.com/llvm/llvm-project/commit/e75e96af6987cb017f8d11efc1eed430b0d6080d
Author: mike-goutokuji <gfunni234 at gmail.com>
Date: 2026-06-04 (Thu, 04 Jun 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/GISel/AArch64PostLegalizerLowering.cpp
M llvm/test/CodeGen/AArch64/GlobalISel/postlegalizer-lowering-adjust-icmp-imm.mir
M llvm/test/CodeGen/AArch64/arm64-csel.ll
M llvm/test/CodeGen/AArch64/cmp-to-cmn.ll
M llvm/test/CodeGen/AArch64/fcvt-i256.ll
M llvm/test/CodeGen/AArch64/fpclamptosat_vec.ll
M llvm/test/CodeGen/AArch64/fptosi-sat-scalar.ll
M llvm/test/CodeGen/AArch64/select-constant-xor.ll
Log Message:
-----------
[AArch64][GlobalISel] Port shouldBeAdjustedToZero to GlobalISel (#195941)
Commit: 4695c84c7954f0133679b76302bff13e2b059def
https://github.com/llvm/llvm-project/commit/4695c84c7954f0133679b76302bff13e2b059def
Author: Jianhui Li <jian.hui.li at intel.com>
Date: 2026-06-03 (Wed, 03 Jun 2026)
Changed paths:
M mlir/include/mlir/Dialect/XeGPU/IR/XeGPUOps.td
M mlir/lib/Dialect/XeGPU/IR/XeGPUOps.cpp
M mlir/test/Dialect/XeGPU/invalid.mlir
M mlir/test/Dialect/XeGPU/ops.mlir
Log Message:
-----------
[MLIR][XeGPU] Extend op definitions to support 3D+: load_nd, store_nd, prefetch_nd (#199811)
**Summary**
Extend xegpu.load_nd, xegpu.store_nd, and xegpu.prefetch_nd operations
to support 3D and higher-dimensional tensor descriptors with batch
dimensions, enabling batched memory operations for workloads like [4, 8,
16] tensor loads/stores.
**Changes**
- Verifiers: Removed rank > 2 checks in LoadNdOp::verify() and
StoreNdOp::verify() to allow 3D+ tensor descriptors
- Documentation: Added comprehensive documentation explaining: Tensor
descriptors can be 1D, 2D, 3D, or higher dimensional; Batch dimensions
(leading dimensions) are unrolled to unit dimensions during lowering;
Operations execute at 2D granularity at subgroup level to match 2D block
IO hardware; Examples of 3D operations
- Tests: Added unit tests for 3D operations (load_nd_3d, store_nd_3d,
prefetch_nd_3d)
---------
Co-authored-by: Claude Sonnet 4.5 <noreply at anthropic.com>
Commit: 5f517ddd3e7c29ac51ea88a33e500455deee03a1
https://github.com/llvm/llvm-project/commit/5f517ddd3e7c29ac51ea88a33e500455deee03a1
Author: Jianhui Li <jian.hui.li at intel.com>
Date: 2026-06-03 (Wed, 03 Jun 2026)
Changed paths:
M mlir/include/mlir/Dialect/XeGPU/IR/XeGPUOps.td
M mlir/include/mlir/Dialect/XeGPU/IR/XeGPUTypes.td
M mlir/lib/Dialect/XeGPU/IR/XeGPUOps.cpp
M mlir/test/Dialect/XeGPU/invalid.mlir
M mlir/test/Dialect/XeGPU/ops.mlir
Log Message:
-----------
[MLIR][XeGPU] Extend op definitions to support 3D+: dpas, dpas_mx (#199809)
**Summary**
Extend xegpu.dpas and xegpu.dpas_mx operations to support 3D and 4D
operands with batch dimensions, enabling batched matrix multiplication
workloads like [4, 128, 512] x [4, 512, 128] -> [4, 128, 128].
**Changes**
- Type definitions: Extended XeGPU_DpasOprType and XeGPU_DpasResType to
support rank 3-4 (previously 1-3 and 1-2)
- Op definitions: Extended dpas_mx scale operands to support rank 3-4
vectors
- Verifiers: Updated verifyDpasDimensions() to validate batch dimensions
across A, B, and result operands; updated DpasMxOp::verify() for
batch-aware scale dimension checks
- Documentation: Added comprehensive documentation explaining batch
dimensions, microarchitecture-specific matrix sizes, and 3D/4D usage
examples
- Tests: Added unit tests for 3D batched dpas and dpas_mx operations
Assisted-by-Claude
---------
Co-authored-by: Claude Sonnet 4.5 <noreply at anthropic.com>
Commit: 3192648845b87e1907377a395d626b85a7bad6ee
https://github.com/llvm/llvm-project/commit/3192648845b87e1907377a395d626b85a7bad6ee
Author: Lang Hames <lhames at gmail.com>
Date: 2026-06-04 (Thu, 04 Jun 2026)
Changed paths:
M orc-rt/include/orc-rt/NativeDylibManager.h
M orc-rt/lib/executor/NativeDylibManager.cpp
M orc-rt/lib/executor/Unix/NativeDylibAPIs.inc
M orc-rt/lib/executor/sps-ci/NativeDylibManagerSPSCI.cpp
M orc-rt/unittests/NativeDylibManagerSPSCITest.cpp
M orc-rt/unittests/NativeDylibManagerTest.cpp
Log Message:
-----------
[orc-rt] Make NativeDylibManager::lookup return optional addresses. (#201519)
NativeDylibManager::lookup used to return (asynchronously) a vector of
void *s where null represented not-present. This commit updates it to
return a vector of std::optional<void *>s where std::nullopt represents
not-present and an address of zero indicates that the symbol is present
with an address of zero.
This matches the resolve semantics of SimpleExecutorDylibManager,
completing the alignment of the two implementations after the earlier
additions of the Mode argument to load() and the
required/weakly-referenced flag on lookup symbols.
Commit: 192c013865fbdc038996550e34ecc943f9b5c90e
https://github.com/llvm/llvm-project/commit/192c013865fbdc038996550e34ecc943f9b5c90e
Author: Guy David <guyda96 at gmail.com>
Date: 2026-06-04 (Thu, 04 Jun 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/test/CodeGen/AArch64/dup.ll
Log Message:
-----------
[AArch64] Fix DUP-of-extload combine to ignore chain uses (#201351)
The original combine bailed when the load had more than one use, but
counted chain uses too.
Commit: b8cc5942b3c1b3dd56d3e37093b0c22e134fd0b0
https://github.com/llvm/llvm-project/commit/b8cc5942b3c1b3dd56d3e37093b0c22e134fd0b0
Author: Davide Grohmann <davide.grohmann at arm.com>
Date: 2026-06-04 (Thu, 04 Jun 2026)
Changed paths:
M mlir/include/mlir/Conversion/Passes.td
M mlir/include/mlir/Conversion/TosaToSPIRVTosa/TosaToSPIRVTosa.h
M mlir/lib/Conversion/TosaToSPIRVTosa/CMakeLists.txt
M mlir/lib/Conversion/TosaToSPIRVTosa/TosaToSPIRVTosa.cpp
A mlir/lib/Conversion/TosaToSPIRVTosa/TosaToSPIRVTosaConstants.cpp
M mlir/lib/Conversion/TosaToSPIRVTosa/TosaToSPIRVTosaOps.cpp
M mlir/lib/Conversion/TosaToSPIRVTosa/TosaToSPIRVTosaPass.cpp
A mlir/test/Conversion/TosaToSPIRVTosa/graph-constant-invalid.mlir
A mlir/test/Conversion/TosaToSPIRVTosa/graph-constant-mark-invalid.mlir
A mlir/test/Conversion/TosaToSPIRVTosa/graph-constant-mark.mlir
M mlir/test/Conversion/TosaToSPIRVTosa/tosa-to-spirv.mlir
Log Message:
-----------
[mlir][spirv] Add TOSA graph constant marking (#201095)
Add a TOSA to SPIR-V TOSA preprocessing pass that marks large tosa.const
and tosa.const_shape operations for lowering to spirv.ARM.GraphConstant.
Keep small constants inline as spirv.Constant, assign graph constant IDs
with a grapharm-prefixed marker attribute, and teach the existing
constant conversion to use the marker when present.
Expose the grapharm source-side attribute names used for interface ABI
annotations and graph constant IDs.
Add tests for marking large constants, leaving small constants unmarked,
increasing graph constant IDs across mixed constants, and lowering
pre-marked constants to spirv.ARM.GraphConstant.
Signed-off-by: Davide Grohmann <davide.grohmann at arm.com>
Commit: 364a8837a9d67135d050fe594ba51e319fbab938
https://github.com/llvm/llvm-project/commit/364a8837a9d67135d050fe594ba51e319fbab938
Author: ShashwathiNavada <shashwathinavada at gmail.com>
Date: 2026-06-04 (Thu, 04 Jun 2026)
Changed paths:
M clang/lib/Driver/ToolChains/Flang.cpp
A flang/test/Driver/frelaxed-c-loc-checks.f90
Log Message:
-----------
[Flang] Fix -frelaxed-c-loc-checks being ignored when using the driver (#200733)
`-frelaxed-c-loc-checks` worked correctly when passed directly to -fc1,
but was silently ignored when using the driver (e.g., flang -c
-frelaxed-c-loc-checks), causing the flag to go unused. This patch fixes
it by adding `OPT_relaxed_c_loc` to the `addAllArgs` call in Flang.cpp
Also extend the existing test with a driver-mode RUN line to cover this
path.
Commit: ee1fe9431baedb216674a1452eb39aca9d3a78d9
https://github.com/llvm/llvm-project/commit/ee1fe9431baedb216674a1452eb39aca9d3a78d9
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-06-04 (Thu, 04 Jun 2026)
Changed paths:
M mlir/lib/Dialect/Arith/Transforms/EmulateWideInt.cpp
M mlir/test/Dialect/Arith/emulate-wide-int.mlir
Log Message:
-----------
[mlir][arith] Use subui_extended in wide integer emulation of subi (#197762)
Commit: b8c18e9aa7f273a786a0dd09a4fcab822438e975
https://github.com/llvm/llvm-project/commit/b8c18e9aa7f273a786a0dd09a4fcab822438e975
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-06-04 (Thu, 04 Jun 2026)
Changed paths:
M mlir/lib/Conversion/ArithToLLVM/ArithToLLVM.cpp
M mlir/test/Conversion/ArithToLLVM/arith-to-llvm.mlir
Log Message:
-----------
[mlir][ArithToLLVM] Lower arith.subui_extended (#197737)
Commit: bdd7b4cc2a0c9a8c58e4025edae079ce6af73aa0
https://github.com/llvm/llvm-project/commit/bdd7b4cc2a0c9a8c58e4025edae079ce6af73aa0
Author: ShashwathiNavada <shashwathinavada at gmail.com>
Date: 2026-06-04 (Thu, 04 Jun 2026)
Changed paths:
M flang/lib/Semantics/resolve-names.cpp
M flang/test/Semantics/entry01.f90
Log Message:
-----------
[Flang][Semantics] Throw diagnostics for identical entry and result names. (#198500)
Fixes https://github.com/llvm/llvm-project/issues/198499
In flang entry name and result names cannot be same as per
[C1583](https://j3-fortran.org/doc/year/25/25-007r1.pdf).
Previously, Flang did not diagnose cases where the ENTRY name and RESULT
name were identical, e.g.
```
function m1f1()
integer :: m1f1
real :: m1f1e1
m1f1 = 0
entry m1f1e1() result(m1f1e1)
m1f1e1 = 0.1
end function
```
Commit: 96c0f5ad27abba13bc941df99686fdb8c7b59fff
https://github.com/llvm/llvm-project/commit/96c0f5ad27abba13bc941df99686fdb8c7b59fff
Author: Felipe de Azevedo Piovezan <fpiovezan at apple.com>
Date: 2026-06-04 (Thu, 04 Jun 2026)
Changed paths:
M lldb/include/lldb/Target/Memory.h
M lldb/include/lldb/Target/Process.h
M lldb/source/Target/Memory.cpp
M lldb/source/Target/Process.cpp
M lldb/unittests/Target/MemoryTest.cpp
Log Message:
-----------
[lldb] Use MemoryCache in Process::ReadRangesFromMemory (#201166)
There are scenarios (especially in the ObjectiveC metadata reading) in
which multiple strings are read over and over again, but through
different code paths. In order to make that part of the code use
MultiMemRead effectively, the memory cache must be integrated into
ReadRangesFromMemory before we can migrate the string reading to
vectorized version.
Commit: 375fa6fb02035afc8719e8484f0c914a96987fd8
https://github.com/llvm/llvm-project/commit/375fa6fb02035afc8719e8484f0c914a96987fd8
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-06-04 (Thu, 04 Jun 2026)
Changed paths:
M llvm/lib/Analysis/Loads.cpp
M llvm/test/Analysis/ValueTracking/memory-dereferenceable.ll
Log Message:
-----------
[Loads] Use willNotFreeBetween() for dereferenceable-at-point (#201353)
If dereferenceable-at-point semantics are enabled, use
willNotFreeBetween() to check whether frees are known to not occur
between the definition point of the value and the context instruction.
We already use this logic for dereferenceable assumptions, this enables
it for other dereferenceability fact (under deref-at-point).
Commit: f02dd4afbac15705016a9a7962d87161524b66cc
https://github.com/llvm/llvm-project/commit/f02dd4afbac15705016a9a7962d87161524b66cc
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-06-04 (Thu, 04 Jun 2026)
Changed paths:
M clang/test/CodeGen/ms-intrinsics-other.c
M llvm/lib/Analysis/CaptureTracking.cpp
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-sincos.ll
M llvm/test/Transforms/Attributor/nofpclass.ll
M llvm/test/Transforms/Attributor/nonnull.ll
M llvm/test/Transforms/Attributor/nosync.ll
M llvm/test/Transforms/FunctionAttrs/atomic.ll
M llvm/test/Transforms/FunctionAttrs/initializes.ll
M llvm/test/Transforms/FunctionAttrs/nocapture.ll
M llvm/test/Transforms/FunctionAttrs/nofpclass.ll
M llvm/test/Transforms/FunctionAttrs/nonnull.ll
M llvm/test/Transforms/FunctionAttrs/readattrs.ll
M llvm/test/Transforms/FunctionAttrs/writeonly.ll
M llvm/test/Transforms/PhaseOrdering/AArch64/constraint-elimination-placement.ll
M llvm/test/Transforms/PhaseOrdering/branch-dom-cond.ll
Log Message:
-----------
[CaptureTracking] Volatile operations only capture address (#201316)
The fact that a volatile access was performed on a certain address is an
observable effect in the abstract machine, so volatile operations
capture the address of the accessed pointer. However, they do not
capture the provenance. This matches what we document in LangRef.
While I'm pretty sure that this models the semantics correctly, I'm
slightly concerned that we might be using the provenance capture here to
paper over some other issue, though nothing specific comes to mind (and
the test changes don't show anything problematic).
Commit: 73802c2e9d102a4fb646bc039754779fca3ea476
https://github.com/llvm/llvm-project/commit/73802c2e9d102a4fb646bc039754779fca3ea476
Author: Robert Imschweiler <robert.imschweiler at amd.com>
Date: 2026-06-04 (Thu, 04 Jun 2026)
Changed paths:
A offload/test/offloading/array_reductions.cpp
M offload/test/offloading/multiple_reductions.cpp
Log Message:
-----------
[OpenMP][offload] Add enhanced array-reduction tests (#201040)
Commit: 601958395ae7f24c74d85fcda2829e102e4176f0
https://github.com/llvm/llvm-project/commit/601958395ae7f24c74d85fcda2829e102e4176f0
Author: Pierre van Houtryve <pierre.vanhoutryve at amd.com>
Date: 2026-06-04 (Thu, 04 Jun 2026)
Changed paths:
M llvm/utils/TableGen/Common/GlobalISel/MatchTable/Matchers.cpp
M llvm/utils/TableGen/Common/GlobalISel/MatchTable/Matchers.h
M llvm/utils/TableGen/GlobalISelCombinerEmitter.cpp
M llvm/utils/TableGen/GlobalISelEmitter.cpp
Log Message:
-----------
[NFC][GlobalISel] Refactor ownership of InstructionMatchers (#200798)
- Clarify that the array of InstructionMatchers in the RuleMatcher are
for the roots only.
- Let RuleMatcher own all of the InstructionMatcher used for/by
predicates.
They are all kept in an array in which the index of the
InstructionMatcher is equal to its
InsnID, which eliminates some redundant tracking.
- Remove duplicate tracking of InsnID from RuleMatcher;
InstructionMatcher does it on its own already.
Co-authored-by: Pierre-vh <29600849+Pierre-vh at users.noreply.github.com>
Commit: fbd4509349350b66ce4a104795dc8a817eb2d9c6
https://github.com/llvm/llvm-project/commit/fbd4509349350b66ce4a104795dc8a817eb2d9c6
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-06-04 (Thu, 04 Jun 2026)
Changed paths:
M .github/workflows/release-binaries.yml
M clang-tools-extra/clang-tidy/readability/FunctionSizeCheck.cpp
M clang-tools-extra/clang-tidy/readability/FunctionSizeCheck.h
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/function-size.rst
A clang-tools-extra/test/clang-tidy/checkers/readability/function-size-ignore-macros.cpp
M clang/include/clang-c/BuildSystem.h
M clang/include/clang/Serialization/ModuleCache.h
M clang/lib/AST/ByteCode/Interp.cpp
M clang/lib/AST/ByteCode/Pointer.h
M clang/lib/Driver/ToolChain.cpp
M clang/lib/Driver/ToolChains/Flang.cpp
M clang/lib/Format/UnwrappedLineParser.cpp
M clang/lib/Serialization/ModuleCache.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/PtrTypesSemantics.cpp
M clang/test/AST/ByteCode/cxx20.cpp
M clang/test/Analysis/Checkers/WebKit/call-args.cpp
M clang/test/Analysis/Checkers/WebKit/mock-types.h
M clang/test/Analysis/Checkers/WebKit/nodelete-annotation.cpp
A clang/test/Analysis/Checkers/WebKit/nodelete-lazy-initialize.cpp
M clang/test/CodeGen/ms-intrinsics-other.c
M clang/test/Driver/lto.c
M clang/test/OpenMP/amdgcn_weak_alias.c
M clang/test/OpenMP/declare_target_codegen.cpp
M clang/test/OpenMP/target_codegen.cpp
M clang/test/OpenMP/target_depend_codegen.cpp
M clang/test/OpenMP/target_indirect_codegen.cpp
M clang/test/OpenMP/target_parallel_depend_codegen.cpp
M clang/test/OpenMP/target_parallel_for_depend_codegen.cpp
M clang/test/OpenMP/target_parallel_for_simd_depend_codegen.cpp
M clang/test/OpenMP/target_simd_codegen.cpp
M clang/test/OpenMP/target_simd_depend_codegen.cpp
M clang/test/OpenMP/target_teams_depend_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_depend_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_depend_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_simd_depend_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_simd_depend_codegen.cpp
M clang/tools/libclang/BuildSystem.cpp
M clang/tools/libclang/libclang.map
M clang/unittests/Format/FormatTestObjC.cpp
M clang/unittests/libclang/LibclangTest.cpp
M compiler-rt/cmake/Modules/AddCompilerRT.cmake
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Lower/OpenMP/Utils.cpp
M flang/lib/Lower/OpenMP/Utils.h
M flang/lib/Semantics/expression.cpp
M flang/lib/Semantics/resolve-names.cpp
A flang/test/Driver/frelaxed-c-loc-checks.f90
R flang/test/Lower/OpenMP/Todo/metadirective-dynamic.f90
M flang/test/Lower/OpenMP/metadirective-user.f90
M flang/test/Semantics/OpenMP/metadirective-user.f90
A flang/test/Semantics/cuf-constant-generic-unified.cuf
M flang/test/Semantics/entry01.f90
M libc/config/linux/x86_64/entrypoints.txt
M libc/include/CMakeLists.txt
M libc/include/inttypes.yaml
M libc/src/inttypes/CMakeLists.txt
A libc/src/inttypes/wcstoimax.cpp
A libc/src/inttypes/wcstoimax.h
A libc/src/inttypes/wcstoumax.cpp
A libc/src/inttypes/wcstoumax.h
M libc/test/src/inttypes/CMakeLists.txt
A libc/test/src/inttypes/wcstoimax_test.cpp
A libc/test/src/inttypes/wcstoumax_test.cpp
M libcxx/test/std/containers/exception_safety_helpers.h
M libcxx/test/std/containers/sequences/forwardlist/exception_safety.pass.cpp
M lldb/CMakeLists.txt
A lldb/docs/resources/build.md
R lldb/docs/resources/build.rst
A lldb/docs/resources/dataformatters.md
R lldb/docs/resources/dataformatters.rst
A lldb/docs/resources/debugging.md
R lldb/docs/resources/debugging.rst
A lldb/docs/resources/extensions.md
R lldb/docs/resources/extensions.rst
A lldb/docs/resources/formatterbytecode.md
R lldb/docs/resources/formatterbytecode.rst
A lldb/docs/resources/overview.md
R lldb/docs/resources/overview.rst
A lldb/docs/resources/projects.md
R lldb/docs/resources/projects.rst
A lldb/docs/resources/qemu-testing.md
R lldb/docs/resources/qemu-testing.rst
A lldb/docs/resources/sbapi.md
R lldb/docs/resources/sbapi.rst
A lldb/docs/resources/test.md
R lldb/docs/resources/test.rst
M lldb/include/lldb/Target/Memory.h
M lldb/include/lldb/Target/Process.h
M lldb/packages/Python/lldbsuite/test/lldbtest.py
M lldb/source/Host/common/PythonRuntimeLoader.cpp
M lldb/source/Target/Memory.cpp
M lldb/source/Target/Process.cpp
M lldb/unittests/Target/MemoryTest.cpp
A llvm/docs/ProjectGovernance.rst
M llvm/docs/ReleaseNotes.md
M llvm/docs/index.rst
M llvm/include/llvm/ExecutionEngine/Orc/Core.h
M llvm/include/llvm/ExecutionEngine/Orc/Shared/OrcRTBridge.h
M llvm/include/llvm/ExecutionEngine/Orc/Shared/TargetProcessControlTypes.h
A llvm/include/llvm/ExecutionEngine/Orc/SymbolLookupSet.h
M llvm/include/llvm/ExecutionEngine/Orc/TargetProcess/ExecutorResolver.h
M llvm/include/llvm/Frontend/Offloading/Utility.h
M llvm/include/llvm/IR/Intrinsics.td
M llvm/lib/Analysis/CaptureTracking.cpp
M llvm/lib/Analysis/Loads.cpp
M llvm/lib/Bitcode/Reader/BitcodeReader.cpp
M llvm/lib/CodeGen/SplitKit.cpp
M llvm/lib/ExecutionEngine/Orc/EPCDynamicLibrarySearchGenerator.cpp
M llvm/lib/ExecutionEngine/Orc/EPCGenericDylibManager.cpp
M llvm/lib/ExecutionEngine/Orc/ExecutorResolutionGenerator.cpp
M llvm/lib/ExecutionEngine/Orc/SelfExecutorProcessControl.cpp
M llvm/lib/ExecutionEngine/Orc/TargetProcess/ExecutorResolver.cpp
M llvm/lib/ExecutionEngine/Orc/TargetProcess/SimpleExecutorDylibManager.cpp
M llvm/lib/Frontend/Offloading/Utility.cpp
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
M llvm/lib/IR/BasicBlock.cpp
M llvm/lib/IR/Verifier.cpp
M llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
M llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.h
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/lib/Target/AArch64/GISel/AArch64PostLegalizerLowering.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
M llvm/lib/Target/AMDGPU/GCNSubtarget.cpp
M llvm/lib/Target/Hexagon/HexagonHardwareLoops.cpp
M llvm/lib/Target/Hexagon/HexagonLoopIdiomRecognition.cpp
M llvm/lib/Target/Hexagon/HexagonVectorCombine.cpp
M llvm/lib/Target/Hexagon/HexagonVectorLoopCarriedReuse.cpp
M llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp
M llvm/lib/Target/NVPTX/NVPTXAsmPrinter.h
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
M llvm/lib/Transforms/IPO/MemProfContextDisambiguation.cpp
M llvm/lib/Transforms/Scalar/JumpThreading.cpp
M llvm/lib/Transforms/Scalar/LoopInterchange.cpp
M llvm/lib/Transforms/Utils/InlineFunction.cpp
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/test/Analysis/ValueTracking/memory-dereferenceable.ll
R llvm/test/Bitcode/musttail-bitcast-upgrade.ll
R llvm/test/Bitcode/musttail-bitcast-upgrade.ll.bc
M llvm/test/CodeGen/AArch64/GlobalISel/postlegalizer-lowering-adjust-icmp-imm.mir
M llvm/test/CodeGen/AArch64/arm64-csel.ll
M llvm/test/CodeGen/AArch64/cmp-to-cmn.ll
M llvm/test/CodeGen/AArch64/dup.ll
M llvm/test/CodeGen/AArch64/fcvt-i256.ll
M llvm/test/CodeGen/AArch64/fpclamptosat_vec.ll
M llvm/test/CodeGen/AArch64/fptosi-sat-scalar.ll
M llvm/test/CodeGen/AArch64/read-fp-reg.ll
A llvm/test/CodeGen/AArch64/read-reg-non-entry.ll
M llvm/test/CodeGen/AArch64/select-constant-xor.ll
M llvm/test/CodeGen/AArch64/write-volatile-register.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-sincos.ll
M llvm/test/CodeGen/AMDGPU/asyncmark-gfx12plus.ll
A llvm/test/CodeGen/AMDGPU/ldsdmacnt_sched.mir
M llvm/test/CodeGen/AMDGPU/promote-constOffset-to-imm-gfx12.ll
M llvm/test/CodeGen/AMDGPU/promote-constOffset-to-imm-gfx12.mir
M llvm/test/CodeGen/AMDGPU/sched-ldsdma-mask.mir
A llvm/test/CodeGen/AMDGPU/splitkit-getsubrangeformask-phi-extend.ll
A llvm/test/CodeGen/Hexagon/hvc-remarks.ll
A llvm/test/CodeGen/Hexagon/hwloop-remarks.ll
A llvm/test/CodeGen/Hexagon/loop-idiom-remarks.ll
A llvm/test/CodeGen/Hexagon/vlcr-remarks.ll
M llvm/test/CodeGen/NVPTX/global-ordering.ll
M llvm/test/CodeGen/NVPTX/globals_init.ll
M llvm/test/CodeGen/RISCV/div-by-constant.ll
M llvm/test/CodeGen/RISCV/srem-lkk.ll
M llvm/test/CodeGen/RISCV/srem-vector-lkk.ll
M llvm/test/CodeGen/Xtensa/inline-asm-invalid.ll
M llvm/test/CodeGen/Xtensa/setcc.ll
M llvm/test/Instrumentation/AddressSanitizer/musttail.ll
M llvm/test/Instrumentation/ThreadSanitizer/tsan_musttail.ll
M llvm/test/ThinLTO/X86/memprof-icp-recursive.ll
M llvm/test/Transforms/Attributor/nofpclass.ll
M llvm/test/Transforms/Attributor/nonnull.ll
M llvm/test/Transforms/Attributor/nosync.ll
M llvm/test/Transforms/CallSiteSplitting/musttail.ll
M llvm/test/Transforms/FunctionAttrs/atomic.ll
M llvm/test/Transforms/FunctionAttrs/initializes.ll
M llvm/test/Transforms/FunctionAttrs/nocapture.ll
M llvm/test/Transforms/FunctionAttrs/nofpclass.ll
M llvm/test/Transforms/FunctionAttrs/nonnull.ll
M llvm/test/Transforms/FunctionAttrs/readattrs.ll
M llvm/test/Transforms/FunctionAttrs/writeonly.ll
M llvm/test/Transforms/JumpThreading/noalias-scope-decl.ll
M llvm/test/Transforms/LoopInterchange/atomic-memory-ordering.ll
M llvm/test/Transforms/LoopInterchange/call-instructions-remarks.ll
M llvm/test/Transforms/LoopInterchange/invoke.ll
A llvm/test/Transforms/LoopInterchange/reduction2mem-extra-lcssa.ll
A llvm/test/Transforms/LoopVectorize/AArch64/arith-costs.ll
R llvm/test/Transforms/LoopVectorize/AArch64/binop-costs.ll
M llvm/test/Transforms/LoopVectorize/AArch64/call-costs.ll
M llvm/test/Transforms/LoopVectorize/AArch64/cmp_cost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/conditional-branches-cost.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/vpinstruction-cost.ll
M llvm/test/Transforms/LoopVectorize/X86/predicate-switch.ll
M llvm/test/Transforms/PhaseOrdering/AArch64/constraint-elimination-placement.ll
M llvm/test/Transforms/PhaseOrdering/branch-dom-cond.ll
M llvm/test/Transforms/SafeStack/X86/musttail.ll
M llvm/test/Verifier/musttail-invalid.ll
M llvm/tools/lli/ForwardingMemoryManager.h
M llvm/unittests/ExecutionEngine/Orc/ObjectLinkingLayerTest.cpp
M llvm/utils/TableGen/Common/GlobalISel/MatchTable/Matchers.cpp
M llvm/utils/TableGen/Common/GlobalISel/MatchTable/Matchers.h
M llvm/utils/TableGen/GlobalISelCombinerEmitter.cpp
M llvm/utils/TableGen/GlobalISelEmitter.cpp
M llvm/utils/release/github-upload-release.py
M mlir/include/mlir/Conversion/Passes.td
M mlir/include/mlir/Conversion/TosaToSPIRVTosa/TosaToSPIRVTosa.h
M mlir/include/mlir/Dialect/OpenACC/OpenACCCGOps.td
M mlir/include/mlir/Dialect/XeGPU/IR/XeGPUOps.td
M mlir/include/mlir/Dialect/XeGPU/IR/XeGPUTypes.td
M mlir/lib/Conversion/ArithToLLVM/ArithToLLVM.cpp
M mlir/lib/Conversion/TosaToSPIRVTosa/CMakeLists.txt
M mlir/lib/Conversion/TosaToSPIRVTosa/TosaToSPIRVTosa.cpp
A mlir/lib/Conversion/TosaToSPIRVTosa/TosaToSPIRVTosaConstants.cpp
M mlir/lib/Conversion/TosaToSPIRVTosa/TosaToSPIRVTosaOps.cpp
M mlir/lib/Conversion/TosaToSPIRVTosa/TosaToSPIRVTosaPass.cpp
M mlir/lib/Dialect/Arith/Transforms/EmulateWideInt.cpp
M mlir/lib/Dialect/Linalg/Transforms/Specialize.cpp
M mlir/lib/Dialect/OpenACC/IR/OpenACC.cpp
M mlir/lib/Dialect/OpenACC/IR/OpenACCCG.cpp
M mlir/lib/Dialect/OpenACC/Transforms/ACCComputeLowering.cpp
M mlir/lib/Dialect/XeGPU/IR/XeGPUOps.cpp
M mlir/test/Conversion/ArithToLLVM/arith-to-llvm.mlir
M mlir/test/Conversion/ConvertToSPIRV/arith.mlir
A mlir/test/Conversion/TosaToSPIRVTosa/graph-constant-invalid.mlir
A mlir/test/Conversion/TosaToSPIRVTosa/graph-constant-mark-invalid.mlir
A mlir/test/Conversion/TosaToSPIRVTosa/graph-constant-mark.mlir
M mlir/test/Conversion/TosaToSPIRVTosa/tosa-to-spirv.mlir
M mlir/test/Dialect/Arith/emulate-wide-int.mlir
M mlir/test/Dialect/Linalg/roundtrip-morphism-linalg-category-ops.mlir
M mlir/test/Dialect/Linalg/roundtrip-morphism-linalg-named-ops.mlir
A mlir/test/Dialect/OpenACC/acc-compute-lowering-compute-async-wait.mlir
M mlir/test/Dialect/OpenACC/canonicalize.mlir
M mlir/test/Dialect/XeGPU/invalid.mlir
M mlir/test/Dialect/XeGPU/ops.mlir
M mlir/test/Target/LLVMIR/omptarget-declare-target-llvm-host.mlir
M mlir/test/Target/LLVMIR/omptarget-declare-target-to-host.mlir
A offload/test/offloading/array_reductions.cpp
M offload/test/offloading/multiple_reductions.cpp
M orc-rt/include/orc-rt/NativeDylibManager.h
M orc-rt/lib/executor/NativeDylibManager.cpp
M orc-rt/lib/executor/Unix/NativeDylibAPIs.inc
M orc-rt/lib/executor/sps-ci/NativeDylibManagerSPSCI.cpp
M orc-rt/unittests/NativeDylibManagerSPSCITest.cpp
M orc-rt/unittests/NativeDylibManagerTest.cpp
Log Message:
-----------
Merge branch 'main' into users/krzysz00/pre-commit-rocm-llvm-2616-fix-tests
Compare: https://github.com/llvm/llvm-project/compare/a8afdd43413b...fbd450934935
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