[all-commits] [llvm/llvm-project] bb593e: [LoongArch] Add DAG combine for horizontal widenin...

[hev via All-commits]

  Branch: refs/heads/users/hev/vhw
  Home:   https://github.com/llvm/llvm-project
  Commit: bb593e52dfe97b6defdaab501aae05506208d86e
      https://github.com/llvm/llvm-project/commit/bb593e52dfe97b6defdaab501aae05506208d86e
  Author: WANG Rui <wangrui at loongson.cn>
  Date:   2026-06-03 (Wed, 03 Jun 2026)

  Changed paths:
    M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
    M llvm/lib/Target/LoongArch/LoongArchLASXInstrInfo.td
    M llvm/lib/Target/LoongArch/LoongArchLSXInstrInfo.td
    M llvm/test/CodeGen/LoongArch/lasx/vhaddw.ll
    M llvm/test/CodeGen/LoongArch/lasx/vhsubw.ll
    M llvm/test/CodeGen/LoongArch/lsx/vhaddw.ll
    M llvm/test/CodeGen/LoongArch/lsx/vhsubw.ll

  Log Message:
  -----------
  [LoongArch] Add DAG combine for horizontal widening add/sub

Add a DAG combine to recognize horizontal widening add/subtract patterns
and lower them to the corresponding LSX/LASX instructions.

The following pattern is matched for both signed and unsigned variants:

```
  ADD/SUB(SEXT/ZEXT(BUILD_VECTOR(extract_elt(vj, 1), extract_elt(vj, 3), ...)),
          SEXT/ZEXT(BUILD_VECTOR(extract_elt(vk, 0), extract_elt(vk, 2), ...)))
```

This covers the following instructions:

```
  LSX:  VHADDW.H.B,  VHADDW.W.H,  VHADDW.D.W
        VHADDW.HU.BU, VHADDW.WU.HU, VHADDW.DU.WU
        VHSUBW.H.B,  VHSUBW.W.H,  VHSUBW.D.W
        VHSUBW.HU.BU, VHSUBW.WU.HU, VHSUBW.DU.WU

  LASX: XVHADDW.H.B,  XVHADDW.W.H,  XVHADDW.D.W
        XVHADDW.HU.BU, XVHADDW.WU.HU, XVHADDW.DU.WU
        XVHSUBW.H.B,  XVHSUBW.W.H,  XVHSUBW.D.W
        XVHSUBW.HU.BU, XVHSUBW.WU.HU, XVHSUBW.DU.WU
```

The Q_D variants (VHADDW.Q.D, VHSUBW.Q.D and their unsigned counterparts)
are not handled here because the result type v1i128 is not yet legalized
in the backend.



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