[all-commits] [llvm/llvm-project] 2b081a: [AMDGPU] Do not add latency for tensorcnt / asyncc...

[Jeffrey Byrnes via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 2b081a26d96450283814209d2b9001db89000f0a
      https://github.com/llvm/llvm-project/commit/2b081a26d96450283814209d2b9001db89000f0a
  Author: Jeffrey Byrnes <jeffrey.byrnes at amd.com>
  Date:   2026-06-03 (Wed, 03 Jun 2026)

  Changed paths:
    M llvm/lib/Target/AMDGPU/GCNSubtarget.cpp
    M llvm/test/CodeGen/AMDGPU/asyncmark-gfx12plus.ll
    A llvm/test/CodeGen/AMDGPU/ldsdmacnt_sched.mir
    M llvm/test/CodeGen/AMDGPU/promote-constOffset-to-imm-gfx12.ll
    M llvm/test/CodeGen/AMDGPU/promote-constOffset-to-imm-gfx12.mir
    M llvm/test/CodeGen/AMDGPU/sched-ldsdma-mask.mir

  Log Message:
  -----------
  [AMDGPU] Do not add latency for tensorcnt / asynccnt dependencies (#201201)

Currently, when constructing the ScheduleDAG we see dependencies between
LDSDMA->LDSDMA or s_wait->s_wait due to implicit $asynccnt / $tensorcnt
operands. These implicit operands are necessary to force ordering of the
instructions, but there should be no latency for this dependency. In the
LDSDMA->LDSDMA case, the scheduler thinks it will be hundreds of cycles
until the next LDSDMA is ready.

This handles the cases:
1. LDSDMA -> LDSDMA
2. WAIT -> LDSDMA
3. WAIT -> WAIT

In the LDSDMA -> WAIT case, usually the relevant WAIT is in a different
iteration, so we don't need latency between these instructions in the
same iteration, though that isn't guaranteed. I plan to handle remove
the latency for obvious cases in a followup PR.



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