[all-commits] [llvm/llvm-project] 55587f: [CodeGen] Mark read_register of allocatable physre...

[Adhemerval Zanella via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 55587f7b757583b1e30c3027803ed092790471a3
      https://github.com/llvm/llvm-project/commit/55587f7b757583b1e30c3027803ed092790471a3
  Author: Adhemerval Zanella <zatrazz at gmail.com>
  Date:   2026-06-03 (Wed, 03 Jun 2026)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
    M llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
    M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
    M llvm/lib/Target/AArch64/AArch64ISelLowering.h
    M llvm/lib/Target/AArch64/AArch64InstrInfo.td
    M llvm/test/CodeGen/AArch64/read-fp-reg.ll
    A llvm/test/CodeGen/AArch64/read-reg-non-entry.ll
    M llvm/test/CodeGen/AArch64/write-volatile-register.ll

  Log Message:
  -----------
  [CodeGen] Mark read_register of allocatable physreg as live-in (#200825)

llvm.read_register / llvm.read_volatile_register of an allocatable
register (e.g. the MSVC __getReg/__getRegFp intrinsics reading xN/dN)
was lowered to a plain COPY from the physical register. That COPY uses a
physical register that is never defined, which the machine verifier
rejects as "Using an undefined physical register" (seen on
read-fp-reg.ll under LLVM_ENABLE_EXPENSIVE_CHECKS).
    
Reading such a register only makes sense as "whatever value it currently
holds", i.e. like an inline-asm read; it cannot be modelled as a normal
SSA use of a physical register, and a live-in only works in the entry
block.
    
Lower these reads in AArch64 like the existing MRS/MSR sysreg path:
select to a small pseudo (READ_REGISTER_GPR64 / READ_REGISTER_FPR64)
that carries the source register as an immediate operand rather than a
tracked physical-register use, and have the AsmPrinter materialize the
real "mov Xt, Xn" / "fmov Dt, Dn". The verifier never sees an undefined
physreg use, so the read is valid in any block and needs no live-in or
undef. Reads of reserved registers (e.g. sp) and system registers keep
their existing lowering.



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