[all-commits] [llvm/llvm-project] 12f60d: [AMDGPU] Remove unneeded early outs in getDivNumBi...
Ryotaro Kasuga via All-commits
all-commits at lists.llvm.org
Wed Jun 3 12:17:00 PDT 2026
Branch: refs/heads/users/kasuga-fj/loop-interchange-test-missed-insts
Home: https://github.com/llvm/llvm-project
Commit: 12f60d0684a96e3858296c49db4c4cd275ae672f
https://github.com/llvm/llvm-project/commit/12f60d0684a96e3858296c49db4c4cd275ae672f
Author: Jay Foad <jay.foad at amd.com>
Date: 2026-06-03 (Wed, 03 Jun 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUCodeGenPrepare.cpp
Log Message:
-----------
[AMDGPU] Remove unneeded early outs in getDivNumBits. NFC. (#201366)
Commit: 2d249cd753ca8f6d291d4fccdcfba3af3bd9c778
https://github.com/llvm/llvm-project/commit/2d249cd753ca8f6d291d4fccdcfba3af3bd9c778
Author: Aaron Ballman <aaron at aaronballman.com>
Date: 2026-06-03 (Wed, 03 Jun 2026)
Changed paths:
M llvm/docs/GettingInvolved.rst
Log Message:
-----------
Remove incorrect gcal link from C/C++ language wg (#201374)
The C and C++ language working group meets on the first and third Wed of
the month, but Google Calendar does not support doing this via a single
event. Instead, we have one event for recurring on the 1st Wed and a
second event for recurring on the 3rd Wed. That means we cannot use a
single gcal link for the event. Instead of listing two links, this
removes the gcal link entirely because the meeting is also listed on the
community calendar itself. This reduces confusion for folks, but it
would be nice to get a replacement link at some point.
Commit: 0cea23a93700e1a454369f617525f628df84a064
https://github.com/llvm/llvm-project/commit/0cea23a93700e1a454369f617525f628df84a064
Author: Harald van Dijk <hdijk at accesssoftek.com>
Date: 2026-06-03 (Wed, 03 Jun 2026)
Changed paths:
M clang/test/Driver/hipspv-toolchain.hip
Log Message:
-----------
[HIP] Fix another test for --no-lto (#201382)
Commit: 0f4b1e11e64fdaaf6258043e1a30014b00bd04d3
https://github.com/llvm/llvm-project/commit/0f4b1e11e64fdaaf6258043e1a30014b00bd04d3
Author: Sushant Gokhale <sgokhale at nvidia.com>
Date: 2026-06-03 (Wed, 03 Jun 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/test/CodeGen/AArch64/sve-fixed-length-trunc-stores.ll
Log Message:
-----------
[AArch64] Address issue reported in PR#196029 (#199122)
For certain types of truncating stores, the lowering action is set to
custom although no custom lowering exists for them.
This patch addresses issue reported in PR #196029 by removing the custom lowering entry.
Commit: c6c2ad52586c28e74a724570985a48dc0022d250
https://github.com/llvm/llvm-project/commit/c6c2ad52586c28e74a724570985a48dc0022d250
Author: Aayush Shrivastava <iamaayushrivastava at gmail.com>
Date: 2026-06-03 (Wed, 03 Jun 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/test/CodeGen/AArch64/bitfield-insert.ll
M llvm/test/CodeGen/AArch64/bswap-known-bits.ll
M llvm/test/CodeGen/AArch64/sshl_sat.ll
M llvm/test/CodeGen/AArch64/ushl_sat.ll
A llvm/test/CodeGen/X86/aext-and-trunc-avx512.ll
A llvm/test/CodeGen/X86/aext-and-trunc.ll
M llvm/test/CodeGen/X86/and-with-overflow.ll
M llvm/test/CodeGen/X86/combine-srem.ll
M llvm/test/CodeGen/X86/llvm.frexp.ll
M llvm/test/CodeGen/X86/masked_load.ll
M llvm/test/CodeGen/X86/masked_store.ll
M llvm/test/CodeGen/X86/unfold-masked-merge-scalar-constmask-innerouter.ll
M llvm/test/CodeGen/X86/unfold-masked-merge-scalar-constmask-interleavedbits.ll
M llvm/test/CodeGen/X86/unfold-masked-merge-scalar-constmask-interleavedbytehalves.ll
M llvm/test/CodeGen/X86/unfold-masked-merge-scalar-constmask-lowhigh.ll
Log Message:
-----------
[DAG] Fold any-extend(and(trunc(x), C)) -> and(x, C) (#200052)
Fixes #195575
Fix a missed optimization in `DAGCombiner::visitANY_EXTEND` where the
pattern `any-extend(and(trunc(x), C))` was not being folded into `and(x,
C)` on X86, causing a redundant `movzbl` instruction to be emitted after
a small-mask AND.
Commit: 91edd87a801fc5c9d12c7f5c6863edd50327cef8
https://github.com/llvm/llvm-project/commit/91edd87a801fc5c9d12c7f5c6863edd50327cef8
Author: mike-goutokuji <gfunni234 at gmail.com>
Date: 2026-06-03 (Wed, 03 Jun 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
M llvm/lib/Target/PowerPC/PPCISelLowering.cpp
M llvm/test/CodeGen/PowerPC/ucmp.ll
Log Message:
-----------
[Legalizer] Add support for promoting integers for s/ucmp (#198554)
Instead of manually doing promotion in LowerUCMP of platforms like
PowerPC, we should have this logic in the legalizer.
Commit: 678a6c7dbbb90b5cf856d487820c63aafa6de25b
https://github.com/llvm/llvm-project/commit/678a6c7dbbb90b5cf856d487820c63aafa6de25b
Author: Deric C. <cheung.deric at gmail.com>
Date: 2026-06-03 (Wed, 03 Jun 2026)
Changed paths:
M llvm/lib/Target/DirectX/DXIL.td
M llvm/lib/Target/DirectX/DXILOpLowering.cpp
A llvm/test/CodeGen/DirectX/SampleGrad.ll
Log Message:
-----------
[DirectX] Implement lowering of SampleGrad. Refactor sample lowering functions (#200871)
Fixes #192549
This PR builds atop #199745 by adding a helper `lowerSampleOp` function
to refactor `lowerSampleBias` and implement `lowerSampleGrad`.
The `lowerSampleGrad` implementation is very similar to
`lowerSampleBias`, just with ddx and ddy arguments instead of a bias.
Unlike SampleBias, SampleGrad is usable in all shader stages because it
has explicit gradient/derivative arguments.
Assisted-by: GitHub Copilot
Commit: 06ac45db1597049c0e4f04c334bf78cd362b75ee
https://github.com/llvm/llvm-project/commit/06ac45db1597049c0e4f04c334bf78cd362b75ee
Author: Ilpo Ruotsalainen <lonewolf at iki.fi>
Date: 2026-06-03 (Wed, 03 Jun 2026)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/CallLowering.cpp
A llvm/test/CodeGen/X86/GlobalISel/calllowering-inalloca.ll
Log Message:
-----------
[GISel][CallLowering] Set byval flag for inalloca/preallocated args (#200600)
GlobalISel asserts when lowering a function with an `inalloca` or
`preallocated` argument:
> TargetCallingConv.h:183: void
llvm::ISD::ArgFlagsTy::setByValSize(unsigned): Assertion `isByVal() &&
!isByRef()' failed.
https://godbolt.org/z/jWr4enjaj
`addFlagsFromAttrSet()` sets the `InAlloca`/`Preallocated` flags but
never `ByVal`.
`setArgFlags()` then calls `Flags.setByValSize()` for any non-`ByRef`
indirect argument which asserts `isByVal()`.
`SelectionDAGISel::LowerArguments()` avoids this by deliberately also
setting the `ByVal` flag for `inalloca`/`preallocated`, this change
makes the GlobalISel side match that behavior.
Commit: 15375d84799ec260d101aa35670f61fa456b6a4e
https://github.com/llvm/llvm-project/commit/15375d84799ec260d101aa35670f61fa456b6a4e
Author: Andre Kuhlenschmidt <andre.kuhlenschmidt at gmail.com>
Date: 2026-06-03 (Wed, 03 Jun 2026)
Changed paths:
M clang/include/clang/Options/FlangOptions.td
M clang/lib/Driver/ToolChains/Flang.cpp
M flang/docs/OpenACC-extensions.md
M flang/include/flang/Support/Fortran-features.h
M flang/lib/Frontend/CompilerInvocation.cpp
M flang/lib/Semantics/resolve-directives.cpp
M flang/lib/Support/Fortran-features.cpp
A flang/test/Semantics/OpenACC/acc-default-none-scalars-strict.f90
M flang/test/Semantics/OpenACC/acc-default-none-scalars.f90
Log Message:
-----------
[flang][openacc] change option feature flag names to address comments. (#200037)
- Fixes FeatureFlags and CLI flags to use OpenACC instead of ACC.
- Offline comments further refined the name to be
OpenACCDefaultNoneScalarsStrict
- Which changes the semantics requiring the user to opt out of the
default behavior, instead of opt-in to an extension.
- Also makes the CLI flag OptOut instead of OptIn to match the cli
behavior.
- Gets rid of the unneeded warning flag since FeatureFlags have both a
disabled bit and a warning bit.
- Updates old test for these changes and adds a new test to document all
the different cli configurations.
Commit: cd75a7db92289d9784b471b27cd72cb50a2352fd
https://github.com/llvm/llvm-project/commit/cd75a7db92289d9784b471b27cd72cb50a2352fd
Author: Jan Schultke <me at eisenwave.net>
Date: 2026-06-03 (Wed, 03 Jun 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/test/CodeGen/X86/clmul-vector.ll
M llvm/test/CodeGen/X86/clmul.ll
Log Message:
-----------
[SelectionDAG] Fix missed optimization for CLMUL where one operand is all ones (#200592)
Fixes #200556
This special case is equivalent to a "parallel prefix XOR" or "bitwise
parity" operation, which can be expanded to a logarithmic amount of
bitwise operations instead of a linear amount (relative to the bit
width). When other bitwise operations such as BDEP and BEXT are
expanded, they rely on that operation being lowered to a CLMUL directly
or expanded to this efficient form.
See also
- #200570 (this PR needs this fix to have good codegen)
Commit: cf9bf34e29e67fae3562705cfaffb71c7846e8c8
https://github.com/llvm/llvm-project/commit/cf9bf34e29e67fae3562705cfaffb71c7846e8c8
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-06-03 (Wed, 03 Jun 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUPreloadKernArgProlog.cpp
M llvm/test/CodeGen/AMDGPU/lds-dma-workgroup-release.ll
M llvm/test/CodeGen/AMDGPU/preload-kernarg-header.ll
Log Message:
-----------
[AMDGPU] Fix backward compatibility kernarg preload prolog base offset (#201355)
Backward compatibility preload prolog loaded args from kernarg-segment
byte 0, but on non-AMDHSA triples the explicit args start at
`getExplicitKernelArgOffset()` (value: 36), so preloaded SGPRs held the
runtime header instead of the arguments
Commit: ee10231219016efcc51a23bb74dc541dcba3aaf6
https://github.com/llvm/llvm-project/commit/ee10231219016efcc51a23bb74dc541dcba3aaf6
Author: Daniel Thornburgh <dthorn at google.com>
Date: 2026-06-03 (Wed, 03 Jun 2026)
Changed paths:
M libc/include/llvm-libc-macros/_LIBC_MODULAR_FORMAT_PRINTF-disable.h
M libc/include/llvm-libc-macros/_LIBC_MODULAR_FORMAT_PRINTF.h
M libc/include/stdio.yaml
Log Message:
-----------
[libc] Add explicit format attributes for modular printf (#201212)
We had been relying on compiler-generated format attributes when using
the modular_format attribute for printf-family functions, but this is
not applied in -ffreestanding mode. When modular format is enabled, libc
is explicitly asserting the semantics of these functions, so it should
be explicit about the format attributes as well to keep them from
breaking in -ffreestanding.
Generated by Gemini, reviewed and edited by hand.
Commit: 3a1420effe06748cb9bd1b2ef746bd5be25fad52
https://github.com/llvm/llvm-project/commit/3a1420effe06748cb9bd1b2ef746bd5be25fad52
Author: Brian Cain <brian.cain at oss.qualcomm.com>
Date: 2026-06-03 (Wed, 03 Jun 2026)
Changed paths:
A clang/cmake/caches/generic-allow-shared-imports.cmake
A clang/cmake/caches/hexagon-unknown-linux-musl-clang-cross-dist.cmake
A clang/cmake/caches/hexagon-unknown-linux-musl-clang-defaults-dist.cmake
A clang/cmake/caches/hexagon-unknown-linux-musl-clang-dist.cmake
A clang/cmake/caches/hexagon-unknown-linux-musl-clang-dylib-dist.cmake
Log Message:
-----------
[Hexagon] Add cmake caches for cross-toolchain distribution build (#201207)
Adds and extends the
clang/cmake/caches/hexagon-unknown-linux-musl-clang* files to drive a
full install-distribution build: host tools, per-target builtins (Linux
and baremetal), and runtimes for hexagon-unknown-linux-musl.
Commit: f080619e96dfc661fd0f4c0f51a7cc2457d298b9
https://github.com/llvm/llvm-project/commit/f080619e96dfc661fd0f4c0f51a7cc2457d298b9
Author: Martin Erhart <martin.erhart at sifive.com>
Date: 2026-06-03 (Wed, 03 Jun 2026)
Changed paths:
M mlir/include/mlir/Bindings/Python/IRCore.h
M mlir/lib/Bindings/Python/IRCore.cpp
M mlir/test/python/ir/location.py
Log Message:
-----------
[mlir][Python] Downcast location returned from diagnostic (#201337)
Essentially a follow up to
https://github.com/llvm/llvm-project/pull/192630
Commit: 0b109532693fec0dce3a8d275b716f5a5fb6e45c
https://github.com/llvm/llvm-project/commit/0b109532693fec0dce3a8d275b716f5a5fb6e45c
Author: Charles Zablit <c_zablit at apple.com>
Date: 2026-06-03 (Wed, 03 Jun 2026)
Changed paths:
M lldb/CMakeLists.txt
M lldb/source/Host/common/PythonRuntimeLoader.cpp
Log Message:
-----------
[lldb][windows] explicitly load python3.dll in PythonRuntimeLoader (#201399)
When building with the Python stable API, `liblldb.dll`'s delay-load
crashes because it needs `python3.dll` and it can't find it
Loading `python310.dll` via `LoadLibrary` with a full path doesn't add
Python's directory to the DLL search path for subsequent loads.
This patch also explicitly loads `python3.dll` from the same directory
in `PythonRuntimeLoader` to fix the issue.
This is needed for https://github.com/llvm/llvm-project/pull/200533.
Commit: 7954dcc70ef251581f95582beb7929e286ec9fe9
https://github.com/llvm/llvm-project/commit/7954dcc70ef251581f95582beb7929e286ec9fe9
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-06-03 (Wed, 03 Jun 2026)
Changed paths:
M llvm/lib/Transforms/IPO/HotColdSplitting.cpp
M llvm/test/Transforms/CodeExtractor/input-value-debug.ll
M llvm/test/tools/UpdateTestChecks/update_test_checks/Inputs/generated_funcs.ll.generated.globals.expected
M llvm/test/tools/UpdateTestChecks/update_test_checks/Inputs/generated_funcs.ll.nogenerated.globals.expected
M llvm/test/tools/UpdateTestChecks/update_test_checks/Inputs/generated_funcs_prefix_reuse.ll.generated.globals.expected
M llvm/test/tools/UpdateTestChecks/update_test_checks/Inputs/generated_funcs_prefix_reuse.ll.nogenerated.globals.expected
M llvm/utils/profcheck-xfail.txt
Log Message:
-----------
[HotColdSplit] Unconditionally mark new functions as cold (#200947)
Previously, HotColdSplit would only mark functions as cold if there was
a profile summary available in the module metadata. This was causing
profcheck failures and is inconsistent with how we handle profile
metadata in other parts of the compiler.
This behavior has been around since
c36c10ddfb3dc07129b9f3973029d17940f6a45f when the profile annotation was
first introduced.
Commit: 7e45473cc229baff6c2a8d2130b58035f4f70e41
https://github.com/llvm/llvm-project/commit/7e45473cc229baff6c2a8d2130b58035f4f70e41
Author: Arthur Eubanks <aeubanks at google.com>
Date: 2026-06-03 (Wed, 03 Jun 2026)
Changed paths:
M llvm/utils/gn/secondary/lldb/include/lldb/Host/BUILD.gn
M llvm/utils/gn/secondary/lldb/source/Host/BUILD.gn
M llvm/utils/gn/secondary/lldb/test/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/DTLTO/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/Transforms/Utils/BUILD.gn
M llvm/utils/gn/secondary/llvm/unittests/Target/AMDGPU/BUILD.gn
Log Message:
-----------
[gn build] Port commits (#201400)
142ad481b625
87d6941017aa
c264e07c2f3d
f91f589aaa82
Commit: 28b12c6317568c8d31a701a35d1c59366030e054
https://github.com/llvm/llvm-project/commit/28b12c6317568c8d31a701a35d1c59366030e054
Author: Arthur Eubanks <aeubanks at google.com>
Date: 2026-06-03 (Wed, 03 Jun 2026)
Changed paths:
M llvm/utils/gn/secondary/llvm/tools/llvm-lto2/BUILD.gn
Log Message:
-----------
[gn build] Add missing dep (#201414)
Commit: 102d8583355c316618648de7d8537299f4357f95
https://github.com/llvm/llvm-project/commit/102d8583355c316618648de7d8537299f4357f95
Author: Jan Schultke <me at eisenwave.net>
Date: 2026-06-03 (Wed, 03 Jun 2026)
Changed paths:
M llvm/test/CodeGen/X86/clmul.ll
Log Message:
-----------
Regenerate X86/clmul.ll expectations (#201405)
Fixes a build failure on trunk after merging:
- #200592
See
https://github.com/llvm/llvm-project/pull/200592#issuecomment-4614719422
Commit: 3f67f166d6580970a9f4d50bdf7827c510d884d3
https://github.com/llvm/llvm-project/commit/3f67f166d6580970a9f4d50bdf7827c510d884d3
Author: Philipp Rados <philipp.rados at openchip.com>
Date: 2026-06-03 (Wed, 03 Jun 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
M llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp
A llvm/test/CodeGen/RISCV/stack-offset-large.ll
Log Message:
-----------
[RISCV] Allow 64-bit fixed frame-offsets on RV64 (#201338)
Some HPC code requires a _very_ large stack. GCC also allows 64-bit
frame-offsets on 64-bit systems.
Since RISCVInstrInfo::movImm() supports materializing 64-bit immediates
the existing framework already handles the lowering correctly.
This patch only enables support for 64-bit _fixed_ frame offsets.
Scalable offsets call RISCVInstrInfo::mulImm() which doesn't seem to
support 64-bit calculations yet. This should be fine since there'd have
to be more than 2^31 RVV spills for this case to happen.
Commit: 1c88bd716167a0650513319176c30dd715101a70
https://github.com/llvm/llvm-project/commit/1c88bd716167a0650513319176c30dd715101a70
Author: Charles Zablit <c_zablit at apple.com>
Date: 2026-06-03 (Wed, 03 Jun 2026)
Changed paths:
M lldb/include/lldb/Host/MainLoopBase.h
M lldb/source/Host/common/MainLoopBase.cpp
Log Message:
-----------
[lldb] Preserve FIFO order for equal time MainLoop callbacks (#199056)
Co-authored-by: Adrian Prantl <adrian.prantl at gmail.com>
Commit: 6cfa1a01a0f737ed1d54963810057fb1bd67a274
https://github.com/llvm/llvm-project/commit/6cfa1a01a0f737ed1d54963810057fb1bd67a274
Author: Hans Wennborg <hans at hanshq.net>
Date: 2026-06-03 (Wed, 03 Jun 2026)
Changed paths:
M clang/lib/CodeGen/CGCUDANV.cpp
R clang/test/CodeGenHIP/offload-pgo-sections.hip
M compiler-rt/CMakeLists.txt
M compiler-rt/lib/profile/CMakeLists.txt
M compiler-rt/lib/profile/InstrProfilingFile.c
R compiler-rt/lib/profile/InstrProfilingPlatformROCm.cpp
M llvm/include/llvm/IR/RuntimeLibcalls.td
M llvm/include/llvm/ProfileData/InstrProf.h
M llvm/lib/Transforms/Instrumentation/InstrProfiling.cpp
M llvm/lib/Transforms/Instrumentation/PGOInstrumentation.cpp
R llvm/test/Instrumentation/InstrProfiling/amdgpu-instrumentation.ll
R llvm/test/Instrumentation/InstrProfiling/amdgpu-profc-arrays.ll
R llvm/test/Instrumentation/InstrProfiling/gpu-weak.ll
R llvm/test/Transforms/PGOProfile/amdgpu-disable-value-profiling.ll
Log Message:
-----------
Revert "[PGO][AMDGPU] Add basic HIP offload PGO support (#177665)" (#201416)
This broke profiling builds on Windows by switching the profile library
to link against the dynamic CRT; see discussion on the PR.
There were already a number of issues reported and fixed after this PR.
Rather than piling on the fixes (and this one may need some work),
revert back to green for now to let the project recover.
This reverts commit 5db13643f4b7038db0ca304d9f8900122502935c.
Additionally, this reverts the followup PRs in
635e120fb87304924508a7a204574727e3c37363,
2766733764f4bdf8399d48c0225e9c64bdfa95f7,
4c33844b4b560f24b2a3a0cc689d73510cb01ad5, and
5eca8b67ff3c5f371141d54b6e4544a0ebe77fdb:
"[PGO][HIP] Stop pulling ROCm.o into every PGO host link (#200101)"
"[compiler-rt][profile] Add COMPILER_RT_BUILD_PROFILE_ROCM option
(#200127)"
"[PGO][HIP] Skip ROCm interceptor in profile-only compiler-rt builds
(#200111)"
"[PGO][HIP] Fix profile-only Windows link by gating ROCm interceptor
macro (#200859)"
Commit: 09020f9d68e4a0a8f93d2e7f4875ef58f451f948
https://github.com/llvm/llvm-project/commit/09020f9d68e4a0a8f93d2e7f4875ef58f451f948
Author: vangthao95 <vang.thao at amd.com>
Date: 2026-06-03 (Wed, 03 Jun 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/fdiv.f32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/frem.ll
M llvm/test/CodeGen/AMDGPU/fdiv_flags.f32.ll
M llvm/test/CodeGen/AMDGPU/fsqrt.f32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.frexp.exp.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.frexp.exp.ll
M llvm/test/CodeGen/AMDGPU/llvm.frexp.ll
Log Message:
-----------
AMDGPU/GlobalISel: RegBankLegalize rules for llvm.amdgcn.frexp.exp (#201178)
Commit: e43adaea1fb557e860fbb34568ac024fd649cf5c
https://github.com/llvm/llvm-project/commit/e43adaea1fb557e860fbb34568ac024fd649cf5c
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2026-06-03 (Wed, 03 Jun 2026)
Changed paths:
A lldb/docs/python_api.md
R lldb/docs/python_api.rst
A lldb/docs/python_extensions.md
R lldb/docs/python_extensions.rst
A lldb/docs/resources/caveats.md
R lldb/docs/resources/caveats.rst
A lldb/docs/resources/contributing.md
R lldb/docs/resources/contributing.rst
A lldb/docs/resources/fuzzing.md
R lldb/docs/resources/fuzzing.rst
A lldb/docs/use/links.md
R lldb/docs/use/links.rst
A lldb/docs/use/ondemand.md
R lldb/docs/use/ondemand.rst
A lldb/docs/use/python-reference.md
R lldb/docs/use/python-reference.rst
A lldb/docs/use/repeat-commands.md
R lldb/docs/use/repeat-commands.rst
Log Message:
-----------
[lldb][docs] Convert simple RST pages to Markdown (NFC) (#201256)
Convert nine short, low-risk RST docs to MyST Markdown as the first
batch of an incremental RST -> Markdown migration. Subsequent batches
will cover the rest.
Verified by building the docs on origin/main and on this branch with
identical sphinx flags and diffing the rendered HTML. Seven of nine
pages are byte-identical.
contributing.html differs in 42 lines, all attributable to `{doc}` xrefs
replacing RST hyperlinks to sibling pages (`reference external` ->
`reference internal`) and CommonMark collapsing two-spaces-after- period
to one.
ondemand.html differs in 26 lines because two bulleted lists that
followed a paragraph with no blank-line separator originally rendered as
literal `- ...` text in both RST and Markdown. The conversion tool
preserved that by emitting `\-`; this patch instead inserts a blank line
so they render as proper `<ul>` lists, fixing a latent doc bug.
Context:
https://discourse.llvm.org/t/rfc-make-myst-markdown-the-llvm-docs-format-rip-rest/
Assisted-by: Claude
Commit: 47209321457b4302ac0d2cb668cdd3f3caff9134
https://github.com/llvm/llvm-project/commit/47209321457b4302ac0d2cb668cdd3f3caff9134
Author: Razvan Lupusoru <razvan.lupusoru at gmail.com>
Date: 2026-06-03 (Wed, 03 Jun 2026)
Changed paths:
M mlir/include/mlir/Dialect/OpenACC/OpenACCOps.td
M mlir/lib/Dialect/OpenACC/IR/OpenACC.cpp
M mlir/lib/Dialect/OpenACC/Transforms/ACCComputeLowering.cpp
A mlir/test/Dialect/OpenACC/acc-compute-lowering-compute-device-type.mlir
A mlir/test/Dialect/OpenACC/acc-compute-lowering-loop-device-type.mlir
Log Message:
-----------
[mlir][acc] ACCComputeLowering needs to account for device_type par (#201267)
When assigning parallelism for compute constructs or loops, device_type
parallelism must be first considered as a group for all available (gang,
worker, vector) - if any of these have device_type setting, then those
are the only ones that should be considered. Only if the loop has no
device_type specific parallelism then default parallelism should be
assigned.
Commit: 91b00526a599fa21e43da82438f1e9c8a8e1b7b3
https://github.com/llvm/llvm-project/commit/91b00526a599fa21e43da82438f1e9c8a8e1b7b3
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-06-03 (Wed, 03 Jun 2026)
Changed paths:
M llvm/lib/Bitcode/Reader/BitcodeReader.cpp
M llvm/lib/IR/BasicBlock.cpp
M llvm/lib/IR/Verifier.cpp
M llvm/lib/Transforms/Utils/InlineFunction.cpp
A llvm/test/Bitcode/musttail-bitcast-upgrade.ll
A llvm/test/Bitcode/musttail-bitcast-upgrade.ll.bc
M llvm/test/Instrumentation/AddressSanitizer/musttail.ll
M llvm/test/Instrumentation/ThreadSanitizer/tsan_musttail.ll
M llvm/test/Transforms/CallSiteSplitting/musttail.ll
M llvm/test/Transforms/SafeStack/X86/musttail.ll
M llvm/test/Verifier/musttail-invalid.ll
Log Message:
-----------
Remove the optional bitcast between a musttail call and its ret (#201280)
Under opaque pointers the only bitcast the verifier could accept in this
position is a no-op ptr->ptr cast
Drop it and reduce isTypeCongruent to a plain type equality check
Commit: 420b8b3cede41894dc5dac29f8e64bcff13e3620
https://github.com/llvm/llvm-project/commit/420b8b3cede41894dc5dac29f8e64bcff13e3620
Author: Alexander Richardson <alexrichardson at google.com>
Date: 2026-06-03 (Wed, 03 Jun 2026)
Changed paths:
M llvm/tools/llvm-exegesis/lib/LlvmState.cpp
M llvm/tools/llvm-exegesis/lib/MCInstrDescView.cpp
M llvm/tools/llvm-exegesis/lib/MCInstrDescView.h
M llvm/unittests/tools/llvm-exegesis/Mips/SnippetGeneratorTest.cpp
Log Message:
-----------
[llvm-exegesis] Support LookupRegClassByHwMode in exegesis Instruction::create
This resolves the TODO for LookupRegClassByHwMode support in llvm-exegesis by
passing the MCSubtargetInfo to Instruction::create and calling
getOpRegClassID with the active HwMode.
This also updates MemoryUse test expectations for Mips, as the target now
correctly resolve HwMode-dependent memory register operands (MSA128F16 in
Mips and post-#177073 BasePtrRegClass for RISC-V).
Pull Request: https://github.com/llvm/llvm-project/pull/200525
Commit: 4169b17acfe53c79e0e170ebb8249ef749e061a2
https://github.com/llvm/llvm-project/commit/4169b17acfe53c79e0e170ebb8249ef749e061a2
Author: adams381 <adams at nvidia.com>
Date: 2026-06-03 (Wed, 03 Jun 2026)
Changed paths:
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
Log Message:
-----------
[CIR][NFC] Remove unused DataLayout in array lowering (#201408)
The per-element loop in CIRAttrToValue::visitCirAttr(ConstArrayAttr) constructed an mlir::DataLayout for every element of an ArrayAttr-backed constant array and never used it. Constructing a DataLayout walks the parent ops to gather the layout spec, so for an N-element array this was N redundant constructions on the lowering path. Removing the dead local is NFC -- the generated IR is unchanged.
Split out of #198427, where it was flagged as an unrelated drive-by.
Commit: 0b9dc1bdd3a0186582ae7a56c3c27b6e449715fa
https://github.com/llvm/llvm-project/commit/0b9dc1bdd3a0186582ae7a56c3c27b6e449715fa
Author: cmtice <cmtice at google.com>
Date: 2026-06-03 (Wed, 03 Jun 2026)
Changed paths:
M lldb/docs/dil-expr-lang.ebnf
M lldb/include/lldb/ValueObject/DILAST.h
M lldb/include/lldb/ValueObject/DILEval.h
M lldb/include/lldb/ValueObject/DILLexer.h
M lldb/include/lldb/ValueObject/DILParser.h
M lldb/include/lldb/ValueObject/ValueObject.h
M lldb/source/ValueObject/DILAST.cpp
M lldb/source/ValueObject/DILEval.cpp
M lldb/source/ValueObject/DILLexer.cpp
M lldb/source/ValueObject/DILParser.cpp
M lldb/source/ValueObject/ValueObject.cpp
A lldb/test/API/commands/frame/var-dil/expr/Assignment/Makefile
A lldb/test/API/commands/frame/var-dil/expr/Assignment/TestFrameVarDILAssign.py
A lldb/test/API/commands/frame/var-dil/expr/Assignment/TestFrameVarDILCompositeAssign.py
A lldb/test/API/commands/frame/var-dil/expr/Assignment/main.cpp
Log Message:
-----------
[LLDB] Add assignment to DIL. (#190223)
Add the ability for DIL to recognize and process assignment, updating
program variables. Recognizes '=', '+=' and '-=' operators. Increment
and decrement ('++' and '--') will be added in a separate (future) PR.
"*=" and "/=" need to wait until DIL handles multiply and divide
operators.
Commit: 5708e7fd9eca368b1b519c13a58360a15a263e4f
https://github.com/llvm/llvm-project/commit/5708e7fd9eca368b1b519c13a58360a15a263e4f
Author: George Burgess IV <george.burgess.iv at gmail.com>
Date: 2026-06-03 (Wed, 03 Jun 2026)
Changed paths:
M compiler-rt/lib/scudo/standalone/tests/primary_test.cpp
Log Message:
-----------
[compiler-rt] fix out-of-bounds access in scudo test (#201390)
When `I = 0`, we can't do `Array[I-1]`.
Caught by libcxx hardening.
Commit: 517308ad15ee9480edfb9aa6dcc2c628c43da20d
https://github.com/llvm/llvm-project/commit/517308ad15ee9480edfb9aa6dcc2c628c43da20d
Author: Aayush Shrivastava <iamaayushrivastava at gmail.com>
Date: 2026-06-03 (Wed, 03 Jun 2026)
Changed paths:
M clang-tools-extra/clang-tidy/readability/ContainerSizeEmptyCheck.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/container-size-empty.rst
M clang-tools-extra/test/clang-tidy/checkers/readability/container-size-empty.cpp
Log Message:
-----------
[clang-tidy] Extend readability-container-size-empty to std::size() (#201231)
Fixes #198494
Extend the check to warn when the non-member `std::size()` free function
is used in a boolean context or compared to 0/1, and suggest using
.empty instead.
Commit: 7e439d571e3dcf420448391eb76e58879e73ee1e
https://github.com/llvm/llvm-project/commit/7e439d571e3dcf420448391eb76e58879e73ee1e
Author: khaki3 <47756807+khaki3 at users.noreply.github.com>
Date: 2026-06-03 (Wed, 03 Jun 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VectorCombine.cpp
M llvm/test/Transforms/VectorCombine/X86/shuffle-of-intrinsics.ll
Log Message:
-----------
[VectorCombine] Skip foldShuffleOfIntrinsics when operand types differ (#201241)
Example:
```llvm
define <4 x i32> @t(<2 x float> %a, <2 x double> %b) {
%fa = call <2 x i32> @llvm.fptosi.sat.v2i32.v2f32(<2 x float> %a)
%fb = call <2 x i32> @llvm.fptosi.sat.v2i32.v2f64(<2 x double> %b)
%s = shufflevector <2 x i32> %fa, <2 x i32> %fb, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
ret <4 x i32> %s
}
```
In this code, `foldShuffleOfIntrinsics` folds `shuffle(intrinsic(x),
intrinsic(y))` into `intrinsic(shuffle(x, y))`, but only checks the
result type, not the operand types. Since `fptosi.sat` is overloaded on
its operand type, the two calls share an `<2 x i32>` result but have
different operands (`<2 x float>` vs `<2 x double>`), so the new
`shufflevector` gets mismatched operands and trips `isValidOperands`.
Fix: bail out when the intrinsics' shuffled operands have different
types.
Commit: bad4005b863bf8f8d0f108d82c27c10d59d01e6d
https://github.com/llvm/llvm-project/commit/bad4005b863bf8f8d0f108d82c27c10d59d01e6d
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-06-03 (Wed, 03 Jun 2026)
Changed paths:
M llvm/utils/LLVMVisualizers/llvm.natvis
Log Message:
-----------
[NATVIS] Fix bitrotted SmallPtrSet handling (#201404)
Use IsSmall to report Small/Big Mode
Use NumEntries instead of NumNonEmpty to track array size
Commit: 85b72c16948f940058e04cd804ffb1d9b4249407
https://github.com/llvm/llvm-project/commit/85b72c16948f940058e04cd804ffb1d9b4249407
Author: lijinpei-amd <jinpli at amd.com>
Date: 2026-06-03 (Wed, 03 Jun 2026)
Changed paths:
M llvm/lib/AsmParser/LLParser.cpp
A llvm/test/Assembler/invalid-phi-fast-math-flags.ll
A llvm/test/Assembler/invalid-select-fast-math-flags.ll
Log Message:
-----------
[AsmParser] Delete orphaned select/phi when rejecting fast-math-flags (#201409)
parseSelect/parsePHI create the instruction before the caller checks the
fast-math-flags. When FMF are rejected on a non-FP select/phi, the error
path leaked the instruction, which crashed on teardown with "Uses remain
when a value is destroyed!".
Fix by deleting the instruction before returning the error, as is
already done for `call`.
Fixes #185111.
Commit: 974be2bc84be577e395479171f1db70d733d7efc
https://github.com/llvm/llvm-project/commit/974be2bc84be577e395479171f1db70d733d7efc
Author: Ryotaro Kasuga <kasuga.ryotaro at fujitsu.com>
Date: 2026-06-04 (Thu, 04 Jun 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/LoopInterchange.cpp
A llvm/test/Transforms/LoopInterchange/non-phi-uses-lcssa-phi.ll
Log Message:
-----------
[LoopInterchange] Fix assertion failure when LCSSA PHI is used by non-PHI (#201059)
This patch fixes one of the assertion failures reported in #200819. The
root cause is that the assertion assumes all uses of LCSSA PHIs are PHI
nodes, which is not always true, so `cast<PHINode>(U)` can fail. In
fact, the user does not have to be a PHI, and the assertion should apply
the special check only when the user is a PHI node.
Commit: 27ff759268827f3a43f401a53f605a3155ab3ca0
https://github.com/llvm/llvm-project/commit/27ff759268827f3a43f401a53f605a3155ab3ca0
Author: Ryotaro Kasuga <kasuga.ryotaro at fujitsu.com>
Date: 2026-06-04 (Thu, 04 Jun 2026)
Changed paths:
M clang-tools-extra/clang-tidy/readability/ContainerSizeEmptyCheck.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/container-size-empty.rst
M clang-tools-extra/test/clang-tidy/checkers/readability/container-size-empty.cpp
A clang/cmake/caches/generic-allow-shared-imports.cmake
A clang/cmake/caches/hexagon-unknown-linux-musl-clang-cross-dist.cmake
A clang/cmake/caches/hexagon-unknown-linux-musl-clang-defaults-dist.cmake
A clang/cmake/caches/hexagon-unknown-linux-musl-clang-dist.cmake
A clang/cmake/caches/hexagon-unknown-linux-musl-clang-dylib-dist.cmake
M clang/include/clang/Options/FlangOptions.td
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
M clang/lib/CodeGen/CGCUDANV.cpp
M clang/lib/Driver/ToolChains/Flang.cpp
R clang/test/CodeGenHIP/offload-pgo-sections.hip
M clang/test/Driver/hipspv-toolchain.hip
M compiler-rt/CMakeLists.txt
M compiler-rt/lib/profile/CMakeLists.txt
M compiler-rt/lib/profile/InstrProfilingFile.c
R compiler-rt/lib/profile/InstrProfilingPlatformROCm.cpp
M compiler-rt/lib/scudo/standalone/tests/primary_test.cpp
M flang/docs/OpenACC-extensions.md
M flang/include/flang/Support/Fortran-features.h
M flang/lib/Frontend/CompilerInvocation.cpp
M flang/lib/Semantics/resolve-directives.cpp
M flang/lib/Support/Fortran-features.cpp
A flang/test/Semantics/OpenACC/acc-default-none-scalars-strict.f90
M flang/test/Semantics/OpenACC/acc-default-none-scalars.f90
M libc/include/llvm-libc-macros/_LIBC_MODULAR_FORMAT_PRINTF-disable.h
M libc/include/llvm-libc-macros/_LIBC_MODULAR_FORMAT_PRINTF.h
M libc/include/stdio.yaml
M lldb/CMakeLists.txt
M lldb/docs/dil-expr-lang.ebnf
A lldb/docs/python_api.md
R lldb/docs/python_api.rst
A lldb/docs/python_extensions.md
R lldb/docs/python_extensions.rst
A lldb/docs/resources/caveats.md
R lldb/docs/resources/caveats.rst
A lldb/docs/resources/contributing.md
R lldb/docs/resources/contributing.rst
A lldb/docs/resources/fuzzing.md
R lldb/docs/resources/fuzzing.rst
A lldb/docs/use/links.md
R lldb/docs/use/links.rst
A lldb/docs/use/ondemand.md
R lldb/docs/use/ondemand.rst
A lldb/docs/use/python-reference.md
R lldb/docs/use/python-reference.rst
A lldb/docs/use/repeat-commands.md
R lldb/docs/use/repeat-commands.rst
M lldb/include/lldb/Host/MainLoopBase.h
M lldb/include/lldb/ValueObject/DILAST.h
M lldb/include/lldb/ValueObject/DILEval.h
M lldb/include/lldb/ValueObject/DILLexer.h
M lldb/include/lldb/ValueObject/DILParser.h
M lldb/include/lldb/ValueObject/ValueObject.h
M lldb/source/Host/common/MainLoopBase.cpp
M lldb/source/Host/common/PythonRuntimeLoader.cpp
M lldb/source/ValueObject/DILAST.cpp
M lldb/source/ValueObject/DILEval.cpp
M lldb/source/ValueObject/DILLexer.cpp
M lldb/source/ValueObject/DILParser.cpp
M lldb/source/ValueObject/ValueObject.cpp
A lldb/test/API/commands/frame/var-dil/expr/Assignment/Makefile
A lldb/test/API/commands/frame/var-dil/expr/Assignment/TestFrameVarDILAssign.py
A lldb/test/API/commands/frame/var-dil/expr/Assignment/TestFrameVarDILCompositeAssign.py
A lldb/test/API/commands/frame/var-dil/expr/Assignment/main.cpp
M llvm/docs/GettingInvolved.rst
M llvm/include/llvm/IR/RuntimeLibcalls.td
M llvm/include/llvm/ProfileData/InstrProf.h
M llvm/lib/AsmParser/LLParser.cpp
M llvm/lib/Bitcode/Reader/BitcodeReader.cpp
M llvm/lib/CodeGen/GlobalISel/CallLowering.cpp
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/lib/IR/BasicBlock.cpp
M llvm/lib/IR/Verifier.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AMDGPU/AMDGPUCodeGenPrepare.cpp
M llvm/lib/Target/AMDGPU/AMDGPUPreloadKernArgProlog.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
M llvm/lib/Target/DirectX/DXIL.td
M llvm/lib/Target/DirectX/DXILOpLowering.cpp
M llvm/lib/Target/PowerPC/PPCISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
M llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp
M llvm/lib/Transforms/IPO/HotColdSplitting.cpp
M llvm/lib/Transforms/Instrumentation/InstrProfiling.cpp
M llvm/lib/Transforms/Instrumentation/PGOInstrumentation.cpp
M llvm/lib/Transforms/Scalar/LoopInterchange.cpp
M llvm/lib/Transforms/Utils/InlineFunction.cpp
M llvm/lib/Transforms/Vectorize/VectorCombine.cpp
A llvm/test/Assembler/invalid-phi-fast-math-flags.ll
A llvm/test/Assembler/invalid-select-fast-math-flags.ll
A llvm/test/Bitcode/musttail-bitcast-upgrade.ll
A llvm/test/Bitcode/musttail-bitcast-upgrade.ll.bc
M llvm/test/CodeGen/AArch64/bitfield-insert.ll
M llvm/test/CodeGen/AArch64/bswap-known-bits.ll
M llvm/test/CodeGen/AArch64/sshl_sat.ll
M llvm/test/CodeGen/AArch64/sve-fixed-length-trunc-stores.ll
M llvm/test/CodeGen/AArch64/ushl_sat.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fdiv.f32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/frem.ll
M llvm/test/CodeGen/AMDGPU/fdiv_flags.f32.ll
M llvm/test/CodeGen/AMDGPU/fsqrt.f32.ll
M llvm/test/CodeGen/AMDGPU/lds-dma-workgroup-release.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.frexp.exp.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.frexp.exp.ll
M llvm/test/CodeGen/AMDGPU/llvm.frexp.ll
M llvm/test/CodeGen/AMDGPU/preload-kernarg-header.ll
A llvm/test/CodeGen/DirectX/SampleGrad.ll
M llvm/test/CodeGen/PowerPC/ucmp.ll
A llvm/test/CodeGen/RISCV/stack-offset-large.ll
A llvm/test/CodeGen/X86/GlobalISel/calllowering-inalloca.ll
A llvm/test/CodeGen/X86/aext-and-trunc-avx512.ll
A llvm/test/CodeGen/X86/aext-and-trunc.ll
M llvm/test/CodeGen/X86/and-with-overflow.ll
M llvm/test/CodeGen/X86/clmul-vector.ll
M llvm/test/CodeGen/X86/clmul.ll
M llvm/test/CodeGen/X86/combine-srem.ll
M llvm/test/CodeGen/X86/llvm.frexp.ll
M llvm/test/CodeGen/X86/masked_load.ll
M llvm/test/CodeGen/X86/masked_store.ll
M llvm/test/CodeGen/X86/unfold-masked-merge-scalar-constmask-innerouter.ll
M llvm/test/CodeGen/X86/unfold-masked-merge-scalar-constmask-interleavedbits.ll
M llvm/test/CodeGen/X86/unfold-masked-merge-scalar-constmask-interleavedbytehalves.ll
M llvm/test/CodeGen/X86/unfold-masked-merge-scalar-constmask-lowhigh.ll
M llvm/test/Instrumentation/AddressSanitizer/musttail.ll
R llvm/test/Instrumentation/InstrProfiling/amdgpu-instrumentation.ll
R llvm/test/Instrumentation/InstrProfiling/amdgpu-profc-arrays.ll
R llvm/test/Instrumentation/InstrProfiling/gpu-weak.ll
M llvm/test/Instrumentation/ThreadSanitizer/tsan_musttail.ll
M llvm/test/Transforms/CallSiteSplitting/musttail.ll
M llvm/test/Transforms/CodeExtractor/input-value-debug.ll
A llvm/test/Transforms/LoopInterchange/non-phi-uses-lcssa-phi.ll
R llvm/test/Transforms/PGOProfile/amdgpu-disable-value-profiling.ll
M llvm/test/Transforms/SafeStack/X86/musttail.ll
M llvm/test/Transforms/VectorCombine/X86/shuffle-of-intrinsics.ll
M llvm/test/Verifier/musttail-invalid.ll
M llvm/test/tools/UpdateTestChecks/update_test_checks/Inputs/generated_funcs.ll.generated.globals.expected
M llvm/test/tools/UpdateTestChecks/update_test_checks/Inputs/generated_funcs.ll.nogenerated.globals.expected
M llvm/test/tools/UpdateTestChecks/update_test_checks/Inputs/generated_funcs_prefix_reuse.ll.generated.globals.expected
M llvm/test/tools/UpdateTestChecks/update_test_checks/Inputs/generated_funcs_prefix_reuse.ll.nogenerated.globals.expected
M llvm/tools/llvm-exegesis/lib/LlvmState.cpp
M llvm/tools/llvm-exegesis/lib/MCInstrDescView.cpp
M llvm/tools/llvm-exegesis/lib/MCInstrDescView.h
M llvm/unittests/tools/llvm-exegesis/Mips/SnippetGeneratorTest.cpp
M llvm/utils/LLVMVisualizers/llvm.natvis
M llvm/utils/gn/secondary/lldb/include/lldb/Host/BUILD.gn
M llvm/utils/gn/secondary/lldb/source/Host/BUILD.gn
M llvm/utils/gn/secondary/lldb/test/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/DTLTO/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/Transforms/Utils/BUILD.gn
M llvm/utils/gn/secondary/llvm/tools/llvm-lto2/BUILD.gn
M llvm/utils/gn/secondary/llvm/unittests/Target/AMDGPU/BUILD.gn
M llvm/utils/profcheck-xfail.txt
M mlir/include/mlir/Bindings/Python/IRCore.h
M mlir/include/mlir/Dialect/OpenACC/OpenACCOps.td
M mlir/lib/Bindings/Python/IRCore.cpp
M mlir/lib/Dialect/OpenACC/IR/OpenACC.cpp
M mlir/lib/Dialect/OpenACC/Transforms/ACCComputeLowering.cpp
A mlir/test/Dialect/OpenACC/acc-compute-lowering-compute-device-type.mlir
A mlir/test/Dialect/OpenACC/acc-compute-lowering-loop-device-type.mlir
M mlir/test/python/ir/location.py
Log Message:
-----------
Merge branch 'main' into users/kasuga-fj/loop-interchange-test-missed-insts
Compare: https://github.com/llvm/llvm-project/compare/45ae08cd4804...27ff75926882
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