[all-commits] [llvm/llvm-project] 3f67f1: [RISCV] Allow 64-bit fixed frame-offsets on RV64 (...

[Philipp Rados via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 3f67f166d6580970a9f4d50bdf7827c510d884d3
      https://github.com/llvm/llvm-project/commit/3f67f166d6580970a9f4d50bdf7827c510d884d3
  Author: Philipp Rados <philipp.rados at openchip.com>
  Date:   2026-06-03 (Wed, 03 Jun 2026)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
    M llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp
    A llvm/test/CodeGen/RISCV/stack-offset-large.ll

  Log Message:
  -----------
  [RISCV] Allow 64-bit fixed frame-offsets on RV64 (#201338)

Some HPC code requires a _very_ large stack. GCC also allows 64-bit
frame-offsets on 64-bit systems.

Since RISCVInstrInfo::movImm() supports materializing 64-bit immediates
the existing framework already handles the lowering correctly.

This patch only enables support for 64-bit _fixed_ frame offsets.
Scalable offsets call RISCVInstrInfo::mulImm() which doesn't seem to
support 64-bit calculations yet. This should be fine since there'd have
to be more than 2^31 RVV spills for this case to happen.



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