[all-commits] [llvm/llvm-project] 3a9c6c: [Matrix][HLSL] Add codegen support for Matrix Layo...
Harald van Dijk via All-commits
all-commits at lists.llvm.org
Wed Jun 3 08:29:59 PDT 2026
Branch: refs/heads/users/hvdijk/directx-delay-converting-debug-info
Home: https://github.com/llvm/llvm-project
Commit: 3a9c6cdb5d99cbcbb98c8d3562c409ddc5822deb
https://github.com/llvm/llvm-project/commit/3a9c6cdb5d99cbcbb98c8d3562c409ddc5822deb
Author: Farzon Lotfi <farzonlotfi at microsoft.com>
Date: 2026-06-03 (Wed, 03 Jun 2026)
Changed paths:
A clang/include/clang/AST/MatrixUtils.h
M clang/include/clang/Basic/Attr.td
M clang/include/clang/Sema/SemaHLSL.h
M clang/lib/AST/TypePrinter.cpp
M clang/lib/CodeGen/CGExpr.cpp
M clang/lib/CodeGen/CGExprConstant.cpp
M clang/lib/CodeGen/CGExprScalar.cpp
M clang/lib/CodeGen/CGHLSLBuiltins.cpp
M clang/lib/CodeGen/CodeGenTypes.cpp
M clang/lib/Sema/SemaDeclAttr.cpp
M clang/lib/Sema/SemaExprCXX.cpp
M clang/lib/Sema/SemaHLSL.cpp
M clang/lib/Sema/SemaTemplateInstantiateDecl.cpp
M clang/lib/Sema/SemaType.cpp
M clang/lib/Sema/TreeTransform.h
M clang/test/AST/HLSL/matrix_layout_attr.hlsl
A clang/test/CodeGenHLSL/matrix-layout-attr-overrides-default.hlsl
M clang/test/SemaHLSL/BuiltIns/logical-mat-operator-errors.hlsl
M clang/test/SemaHLSL/MatrixElementOverloadResolution.hlsl
M clang/test/SemaHLSL/Types/BuiltinMatrix/MatrixImplicitTruncCastWarnings.hlsl
Log Message:
-----------
[Matrix][HLSL] Add codegen support for Matrix Layout keywords (#198887)
fixes #192262
- Wrap Matrix Type in a row or column major layout attribute
- Add Helper to know which Matrix Layout to apply in codegen or check
for in Sema
- Remove the Decl Atribute and only store on the type.
Assisted by Claud Opus 4.7
Commit: 270a6a8f6742b6a0e86d1a6b3ca6b90b39a64e87
https://github.com/llvm/llvm-project/commit/270a6a8f6742b6a0e86d1a6b3ca6b90b39a64e87
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2026-06-03 (Wed, 03 Jun 2026)
Changed paths:
M flang/examples/FlangOmpReport/FlangOmpReportVisitor.cpp
M flang/include/flang/Parser/dump-parse-tree.h
M flang/include/flang/Parser/parse-tree.h
M flang/include/flang/Semantics/symbol.h
M flang/include/flang/Support/Fortran.h
M flang/lib/Parser/unparse.cpp
M flang/lib/Semantics/mod-file.cpp
M flang/lib/Semantics/resolve-directives.cpp
M flang/lib/Semantics/symbol.cpp
M flang/test/Parser/OpenMP/declare_target-device_type.f90
M flang/test/Parser/OpenMP/groupprivate.f90
A flang/test/Semantics/OpenMP/declare-target-flags.f90
A flang/test/Semantics/OpenMP/declare-target-modfile.f90
M flang/test/Semantics/OpenMP/dump-requires-details.f90
Log Message:
-----------
[flang][OpenMP] Store DECLARE_TARGET information in WithOmpDeclarative (#201103)
This will be used to emit DECLARE_TARGET directives into module files.
When a symbol apperars in DECLARE_TARGET, the OmpDeclareTarget flag will
be set on it (this includes procedures containing a DECLARE_TARGET
without arguments or clauses). The set of accompanying clauses will be
stored in the associated details, in the WithOmpDeclarative mixin. The
mixin was added to ObjectEntityDetails, ProcEntityDetails, and
CommonBlockDetails.
The design goal was to be able to reconstruct the appropriate DECLARE_
TARGET directive for individual symbols for the purpose of emitting it
in a module file. Simply storing and then unparsing the AST node may
include symbols that should not be emitted.
Additionally, refactor the WithOmpDeclarative printing code for reuse in
symbol dumping for debugging, and for printing clause sets.
Commit: 9606c9ff18f0d90a639b132a7f69ebc8a8f61c99
https://github.com/llvm/llvm-project/commit/9606c9ff18f0d90a639b132a7f69ebc8a8f61c99
Author: Jameson Nash <vtjnash at gmail.com>
Date: 2026-06-03 (Wed, 03 Jun 2026)
Changed paths:
M clang/lib/CodeGen/ABIInfoImpl.cpp
M clang/lib/CodeGen/CGAtomic.cpp
M clang/lib/CodeGen/CGBlocks.cpp
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/CodeGen/CGCUDANV.cpp
M clang/lib/CodeGen/CGCall.cpp
M clang/lib/CodeGen/CGClass.cpp
M clang/lib/CodeGen/CGDecl.cpp
M clang/lib/CodeGen/CGException.cpp
M clang/lib/CodeGen/CGExpr.cpp
M clang/lib/CodeGen/CGExprAgg.cpp
M clang/lib/CodeGen/CGHLSLRuntime.cpp
M clang/lib/CodeGen/CGOpenMPRuntime.cpp
M clang/lib/CodeGen/CGOpenMPRuntimeGPU.cpp
M clang/lib/CodeGen/CGStmt.cpp
M clang/lib/CodeGen/CGStmtOpenMP.cpp
M clang/lib/CodeGen/CodeGenFunction.h
M clang/lib/CodeGen/MicrosoftCXXABI.cpp
M clang/lib/CodeGen/TargetBuiltins/ARM.cpp
M clang/lib/CodeGen/TargetBuiltins/X86.cpp
M clang/lib/CodeGen/Targets/X86.cpp
M clang/test/CodeGen/scoped-atomic-ops.c
M clang/test/CodeGenCUDA/amdgpu-kernel-arg-pointer-type.cu
M clang/test/CodeGenCUDA/atomic-options.hip
M clang/test/CodeGenCUDA/builtins-amdgcn.cu
M clang/test/CodeGenCUDA/builtins-spirv-amdgcn.cu
M clang/test/CodeGenCUDA/record-layout.cu
M clang/test/CodeGenCXX/amdgcn-func-arg.cpp
M clang/test/CodeGenHIP/placement-new-addrspace.hip
M clang/test/CodeGenOpenCL/addr-space-struct-arg.cl
M clang/test/CodeGenOpenCL/amdgpu-abi-struct-arg-byref.cl
M clang/test/CodeGenOpenCL/amdgpu-enqueue-kernel.cl
M clang/test/CodeGenOpenCL/atomic-ops.cl
M clang/test/CodeGenSYCL/kernel-caller-entry-point.cpp
M clang/test/OpenMP/amdgcn_target_device_vla.cpp
M clang/test/OpenMP/amdgpu_target_with_aligned_attribute.c
M clang/test/OpenMP/target_teams_generic_loop_codegen.cpp
M clang/test/OpenMP/target_teams_generic_loop_codegen_as_distribute.cpp
M clang/test/OpenMP/target_teams_generic_loop_codegen_as_parallel_for.cpp
Log Message:
-----------
Reapply "[clang] remove lots of "innocuous" addrspacecasts" (#200427)
Reapply #197745, with an additional commit to undo a small part of the
first commit, pending further analysis of alternatives to that part of it.
In particular, make the `agg.tmp` (CreateAggTemp) values keep using the
declared expression type of the RValue. This is indeed probably
sensible, since it lets Sema influence this via the expression type,
though it runs into some issues where some expression types (notably for
any load) haven't had one of the equivalent functions
getNonLValueExprType/DeduceAutoType/getUnqualifiedType called on them,
so they are bringing along additional annotation baggage which doesn't
apply the the rvalue when turned into a temporary (see comments in
getNonLValueExprType for relevant part of C++ standard). This in turn is
also rarely relevant, since inventing temporaries aren't often allowed
in this part of the pipeline (it'd require a move constructor) so the
LValue Dest already provides the type and the RValue type is ignored.
However, it does affect a single test (which loads a global but ignores
the result) and so this adds an extra `getUnqualifiedType` call to
`CodeGenFunction::EmitAnyExpr` so that load doesn't propagate the
qualifiers from source to temporary. This might be a common issue with
load-like expressions (for example, there's a `getUnqualifiedType` in
AtomicExpr code when computing the appropriate codegen for the result,
so it also didn't trust Sema to have created this correctly--and indeed
it seems that Sema expects CG to wait until after
DefaultLvalueConversion before it is does anything with the result type)
Commit: 90a172b53e77e4171b67e9fe4215707aed45cda4
https://github.com/llvm/llvm-project/commit/90a172b53e77e4171b67e9fe4215707aed45cda4
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-06-03 (Wed, 03 Jun 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/inline-asm-mismatched-size.ll
M llvm/test/CodeGen/AMDGPU/inlineasm-mismatched-size-error.ll
Log Message:
-----------
[AMDGPU] Reject named single register inline asm constraints for wider types (#200771)
A named single register constraint like `={v0}` was silently accepted
for i64 result, binding it to one 32-bit register
Reject scalars larger than 32 bits as well
Commit: 4a8c5d231227d7c6c61160e5be25f4626cdabbb8
https://github.com/llvm/llvm-project/commit/4a8c5d231227d7c6c61160e5be25f4626cdabbb8
Author: Yair Ben Avraham <yairba at protonmail.com>
Date: 2026-06-03 (Wed, 03 Jun 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp
M clang/test/CodeGen/AArch64/neon-2velem.c
M clang/test/CodeGen/AArch64/neon-scalar-x-indexed-elem.c
M clang/test/CodeGen/AArch64/neon/fused-multiple-fullfp16.c
M clang/test/CodeGen/AArch64/neon/fused-multiply.c
M clang/test/CodeGen/AArch64/v8.2a-neon-intrinsics.c
Log Message:
-----------
[CIR][AArch64] Lower vfmaq_lane_v and vfma_laneq_v (#197084)
Lower BI__builtin_neon_vfmaq_lane_v and BI__builtin_neon_vfma_laneq_v in
CIR.
This handles the covered vfmaq_lane_* and vfma_laneq_* ACLE wrappers by
bitcasting operands to the expected types, selecting the requested lane
from the lane source operand, and emitting fma through
emitCallMaybeConstrainedBuiltin.
For vfmaq_lane_v, the selected lane is splatted with emitNeonSplat.
For vfma_laneq_v, the lane is selected from the wider lane source; the
f64 case extracts the scalar lane before emitting scalar fma.
Neighboring scalar lane/laneq wrappers and other out-of-scope forms
remain explicit NYI cases.
Tests are moved into the existing CIR-enabled fused multiply files under
clang/test/CodeGen/AArch64/neon/, reusing upstream LLVM checks where
possible and adding CIR coverage for lane selection and fma lowering.
Part of #185382
Follow-up to #195602
Commit: f1b42dcc2326b80116430c9a60f41b0f86abbff7
https://github.com/llvm/llvm-project/commit/f1b42dcc2326b80116430c9a60f41b0f86abbff7
Author: Graham Hunter <graham.hunter at arm.com>
Date: 2026-06-03 (Wed, 03 Jun 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorizationLegality.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlanConstruction.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.h
M llvm/lib/Transforms/Vectorize/VPlanUtils.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/early_exit_with_stores.ll
M llvm/test/Transforms/LoopVectorize/RISCV/early_exit_with_stores.ll
M llvm/test/Transforms/LoopVectorize/VPlan/early_exit_with_stores_vplan.ll
M llvm/test/Transforms/LoopVectorize/early_exit_store_legality.ll
M llvm/test/Transforms/LoopVectorize/early_exit_with_stores.ll
A llvm/test/Transforms/LoopVectorize/interleave_uncountable_exits.ll
A llvm/test/Transforms/LoopVectorize/scalarized_conditional_ops_uncountable_exits.ll
A llvm/test/Transforms/LoopVectorize/tail_fold_uncountable_exits.ll
M llvm/unittests/Transforms/Vectorize/VPlanUncountableExitTest.cpp
Log Message:
-----------
[LV] Vectorize early exit loops with stores using masking (#178454)
This is an alternative approach to vectorizing early exit loops with
stores that avoids needing to add an extra check block. This is a
fairly straightforward approach that should work on vector ISAs
supporting masked memory ops.
The basic approach is to create a mask covering all lanes _before_ any
exiting lane, using cttz.elts and active.lane.mask (which sets all lanes
to true if the uncountable exit wasn't taken). If the uncountable exit
was taken, then there will still be one scalar iteration left to perform
after the vector loop, which will also handle which exit block we should
branch to.
We no longer need to advance exit conditions in the vector body to the
next iteration (compared to the other PR), though we still need to move
the recipes needed to generate the exit condition (depending on which
memory operations are first in the loop).
The advantage this has over a full in-loop mask approach is that we
don't need to form intermediate masks for each uncountable exit; while I
haven't tried to mix this with the ongoing multiple-exit work yet, we
should be able to handle them without increasing the amount of generated
per-exit code. We also won't need to unpick which exit condition was met
first.
For a pseudo-C example of the transformation (with S1 and S2
representing statements with a side effect, like stores, or possibly a
load that may fault if continued past the early exit), given the
following scalar loop:
```c
for (i = 0; i < N; ++i) {
S1;
if (a[i] == threshold)
break;
S2;
}
```
we would have a vector loop and scalar tail like the following:
```c
int i = 0;
for (; i < vecN; i += VF) {
// Move load for uncountable exit condition before other
// operations in the loop.
vecA = a[i]...a[i+VF-1];
// Create mask for all lanes _before_ any uncountable exit.
vecCmp = vecA == splat(threshold);
mask = get.active.lane.mask(0, cttz.elts(vecCmp));
// Execute statements with side effects using the mask
vecS1(mask);
vecS2(mask);
// If there was an uncountable exit, increase IV by the number
// of elements in the mask, and bail out to the scalar tail.
if (any_of(vecCmp)) {
i += cttz.elts(vecCmp);
break;
}
}
// Scalar tail handles remaining iterations, plus any differences
// in exit block for different exits.
for (; i < N; ++i) {
S1;
if (a[i] == threshold)
break;
S2;
}
```
For the mask, given a comparison result of `<0, 0, 1, 0>`, we would
expect a mask of `<1, 1, 0, 0>`.
Commit: fdf8fb6c13deb88c2e179a4eed0c66900dcd92d8
https://github.com/llvm/llvm-project/commit/fdf8fb6c13deb88c2e179a4eed0c66900dcd92d8
Author: Andre Kuhlenschmidt <andre.kuhlenschmidt at gmail.com>
Date: 2026-06-03 (Wed, 03 Jun 2026)
Changed paths:
M clang/include/clang/Options/FlangOptions.td
M clang/lib/Driver/ToolChains/Flang.cpp
M flang/docs/OpenACC-extensions.md
M flang/include/flang/Parser/parse-tree.h
M flang/include/flang/Support/Fortran-features.h
M flang/lib/Frontend/CompilerInvocation.cpp
M flang/lib/Parser/openacc-parsers.cpp
M flang/lib/Parser/unparse.cpp
M flang/lib/Semantics/check-acc-structure.cpp
M flang/lib/Semantics/resolve-directives.cpp
M flang/lib/Support/Fortran-features.cpp
A flang/test/Lower/OpenACC/acc-module-definition-multi-name.f90
A flang/test/Lower/OpenACC/acc-routine-multi-name.f90
A flang/test/Parser/acc-routine-empty-parens.f90
M flang/test/Parser/acc-unparse.f90
A flang/test/Semantics/OpenACC/acc-routine-multi-name-disabled.f90
A flang/test/Semantics/OpenACC/acc-routine-multi-name.f90
Log Message:
-----------
[flang][openacc] add extension which accepts multiple names in a OpenACC routine directive (#200296)
This PR adds an extension which allows one or more function names in a
single named routine directive. This is treated as multiple named
routine directives with the same clauses. The bind clause is forbidden.
The empty list of names isn't excepted. Routine clauses are stable under
unparsing.
This PR tests Parsing, Unparsing, Semantics, and Lowering.
Commit: d307ba096e49c4503b50191d6e0ab2879942ffdd
https://github.com/llvm/llvm-project/commit/d307ba096e49c4503b50191d6e0ab2879942ffdd
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-06-03 (Wed, 03 Jun 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
Log Message:
-----------
[DAGCombiner] Remove untested vp_fma combines. (#201239)
RISC-V no longer uses vp_fma in SelectionDAG leaving these combines
untested.
This effectively reverts 2fe2a6d4b8a4647e49d69a5ff7161946aeb7cee1.
Commit: 05e8d9f86a1d29e32d92a04ff9f0371f25057f33
https://github.com/llvm/llvm-project/commit/05e8d9f86a1d29e32d92a04ff9f0371f25057f33
Author: Harald van Dijk <hdijk at accesssoftek.com>
Date: 2026-06-03 (Wed, 03 Jun 2026)
Changed paths:
M llvm/include/llvm/IR/AssemblyAnnotationWriter.h
M llvm/lib/IR/AsmWriter.cpp
Log Message:
-----------
[AsmWriter] Add emitMDNodeAnnot (#198317)
Similarly to the other AAW::emit*Annot functions, this may be used to
emit a comment before a metadata node.
Commit: 5816ef1560d13b7fd27e623e7f88f2e44cd11e21
https://github.com/llvm/llvm-project/commit/5816ef1560d13b7fd27e623e7f88f2e44cd11e21
Author: Stephen Tozer <stephen.tozer at sony.com>
Date: 2026-06-03 (Wed, 03 Jun 2026)
Changed paths:
M cross-project-tests/debuginfo-tests/dexter/dex/debugger/DebuggerControllers/ScriptDebuggerController.py
A cross-project-tests/debuginfo-tests/dexter/dex/evaluation/ExpectMatch.py
A cross-project-tests/debuginfo-tests/dexter/dex/evaluation/Metrics.py
A cross-project-tests/debuginfo-tests/dexter/dex/evaluation/RunMatch.py
A cross-project-tests/debuginfo-tests/dexter/dex/evaluation/StateMatch.py
A cross-project-tests/debuginfo-tests/dexter/dex/evaluation/__init__.py
M cross-project-tests/debuginfo-tests/dexter/dex/test_script/__init__.py
M cross-project-tests/debuginfo-tests/dexter/dex/tools/test/Tool.py
A cross-project-tests/debuginfo-tests/dexter/feature_tests/scripts/evaluation/basic_evaluate.cpp
A cross-project-tests/debuginfo-tests/dexter/feature_tests/scripts/evaluation/evaluate_nothing.cpp
Log Message:
-----------
[Dexter] Add basic result evaluation for structured scripts (#198803)
This patch adds evaluation for structured scripts, completing the
features required to run simple Dexter tests using structured scripts.
The basic output from these evaluations is a list of named metrics
aggregating the results of evaluating !value nodes. The verbose output
gives a per-step summary of the results for each expect node active at
that step.
Most of the new functionality is in the evaluation/ dir, which has also
absorbed some functionality previously stored in the
ScriptDebuggerController for matching !where nodes to a debugger StepIR,
as this is logic which is common to both managing a debugger session and
evaluating the end result.
Commit: aa8e38f4f87189a5952c8471fb6cb7464f2b9d94
https://github.com/llvm/llvm-project/commit/aa8e38f4f87189a5952c8471fb6cb7464f2b9d94
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-06-03 (Wed, 03 Jun 2026)
Changed paths:
M openmp/module/CMakeLists.txt
Log Message:
-----------
[OpenMP] FIx omp_lib.mod compilation for the GPU (#201377)
Commit: 582d2fd3901f2f3b5ea9373471d87c5995a26a80
https://github.com/llvm/llvm-project/commit/582d2fd3901f2f3b5ea9373471d87c5995a26a80
Author: Ryotaro Kasuga <kasuga.ryotaro at fujitsu.com>
Date: 2026-06-04 (Thu, 04 Jun 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/LoopInterchange.cpp
M llvm/test/Transforms/LoopInterchange/call-instructions.ll
M llvm/test/Transforms/LoopInterchange/function-attr.ll
Log Message:
-----------
[LoopInterchange] Bail out if function that may diverge is called (#201348)
This patch fixes the issue pointed out in
https://github.com/llvm/llvm-project/pull/200828#issuecomment-4593914293.
As demonstrated by the test cases added in #201331, it is not legal to
interchange loops that contain call instructions which may diverge. This
patch adds an additional check and bails out early when we cannot prove
that a call instruction in the loops doesn't diverge.
Commit: 8ae895af32cc2f7c506e39f5736e1115a8afb4ce
https://github.com/llvm/llvm-project/commit/8ae895af32cc2f7c506e39f5736e1115a8afb4ce
Author: Justin Lebar <justin.lebar at gmail.com>
Date: 2026-06-03 (Wed, 03 Jun 2026)
Changed paths:
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
A llvm/test/CodeGen/NVPTX/atomicrmw-allow-ftz-atomics.ll
M llvm/test/CodeGen/NVPTX/atomicrmw-sm60.ll
M llvm/test/CodeGen/NVPTX/atomicrmw-sm70.ll
M llvm/test/CodeGen/NVPTX/atomicrmw-sm90.ll
M llvm/test/CodeGen/NVPTX/atomicrmw.py
M llvm/test/CodeGen/NVPTX/atomics.ll
Log Message:
-----------
[NVPTX] Respect FTZ flag when lowering atomicrmw fadd. (#200732)
Previously we unconditionally lowered LLVM atomicrmw fadd to PTX
atom.add. This is incorrect, because it ignores the FTZ behavior of the
LLVM and PTX instructions.
Commit: e97e67681d0d7de9c6ab8b293852068ea5591066
https://github.com/llvm/llvm-project/commit/e97e67681d0d7de9c6ab8b293852068ea5591066
Author: Med Ismail Bennani <ismail at bennani.ma>
Date: 2026-06-03 (Wed, 03 Jun 2026)
Changed paths:
M lldb/test/API/macosx/expedited-thread-pcs/TestExpeditedThreadPCs.py
Log Message:
-----------
[lldb/test] Fix TestExpeditedThreadPCs on remote-darwin targets (#201275)
Commit: 12f60d0684a96e3858296c49db4c4cd275ae672f
https://github.com/llvm/llvm-project/commit/12f60d0684a96e3858296c49db4c4cd275ae672f
Author: Jay Foad <jay.foad at amd.com>
Date: 2026-06-03 (Wed, 03 Jun 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUCodeGenPrepare.cpp
Log Message:
-----------
[AMDGPU] Remove unneeded early outs in getDivNumBits. NFC. (#201366)
Commit: 2d249cd753ca8f6d291d4fccdcfba3af3bd9c778
https://github.com/llvm/llvm-project/commit/2d249cd753ca8f6d291d4fccdcfba3af3bd9c778
Author: Aaron Ballman <aaron at aaronballman.com>
Date: 2026-06-03 (Wed, 03 Jun 2026)
Changed paths:
M llvm/docs/GettingInvolved.rst
Log Message:
-----------
Remove incorrect gcal link from C/C++ language wg (#201374)
The C and C++ language working group meets on the first and third Wed of
the month, but Google Calendar does not support doing this via a single
event. Instead, we have one event for recurring on the 1st Wed and a
second event for recurring on the 3rd Wed. That means we cannot use a
single gcal link for the event. Instead of listing two links, this
removes the gcal link entirely because the meeting is also listed on the
community calendar itself. This reduces confusion for folks, but it
would be nice to get a replacement link at some point.
Commit: 0cea23a93700e1a454369f617525f628df84a064
https://github.com/llvm/llvm-project/commit/0cea23a93700e1a454369f617525f628df84a064
Author: Harald van Dijk <hdijk at accesssoftek.com>
Date: 2026-06-03 (Wed, 03 Jun 2026)
Changed paths:
M clang/test/Driver/hipspv-toolchain.hip
Log Message:
-----------
[HIP] Fix another test for --no-lto (#201382)
Commit: de2cf58eefdef23cb27f23259806aaeaffb71839
https://github.com/llvm/llvm-project/commit/de2cf58eefdef23cb27f23259806aaeaffb71839
Author: Harald van Dijk <hdijk at accesssoftek.com>
Date: 2026-06-03 (Wed, 03 Jun 2026)
Changed paths:
A clang/include/clang/AST/MatrixUtils.h
M clang/include/clang/Basic/Attr.td
M clang/include/clang/Options/FlangOptions.td
M clang/include/clang/Sema/SemaHLSL.h
M clang/lib/AST/TypePrinter.cpp
M clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp
M clang/lib/CodeGen/ABIInfoImpl.cpp
M clang/lib/CodeGen/CGAtomic.cpp
M clang/lib/CodeGen/CGBlocks.cpp
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/CodeGen/CGCUDANV.cpp
M clang/lib/CodeGen/CGCall.cpp
M clang/lib/CodeGen/CGClass.cpp
M clang/lib/CodeGen/CGDecl.cpp
M clang/lib/CodeGen/CGException.cpp
M clang/lib/CodeGen/CGExpr.cpp
M clang/lib/CodeGen/CGExprAgg.cpp
M clang/lib/CodeGen/CGExprConstant.cpp
M clang/lib/CodeGen/CGExprScalar.cpp
M clang/lib/CodeGen/CGHLSLBuiltins.cpp
M clang/lib/CodeGen/CGHLSLRuntime.cpp
M clang/lib/CodeGen/CGOpenMPRuntime.cpp
M clang/lib/CodeGen/CGOpenMPRuntimeGPU.cpp
M clang/lib/CodeGen/CGStmt.cpp
M clang/lib/CodeGen/CGStmtOpenMP.cpp
M clang/lib/CodeGen/CodeGenFunction.h
M clang/lib/CodeGen/CodeGenTypes.cpp
M clang/lib/CodeGen/MicrosoftCXXABI.cpp
M clang/lib/CodeGen/TargetBuiltins/ARM.cpp
M clang/lib/CodeGen/TargetBuiltins/X86.cpp
M clang/lib/CodeGen/Targets/X86.cpp
M clang/lib/Driver/ToolChains/Flang.cpp
M clang/lib/Sema/SemaDeclAttr.cpp
M clang/lib/Sema/SemaExprCXX.cpp
M clang/lib/Sema/SemaHLSL.cpp
M clang/lib/Sema/SemaTemplateInstantiateDecl.cpp
M clang/lib/Sema/SemaType.cpp
M clang/lib/Sema/TreeTransform.h
M clang/test/AST/HLSL/matrix_layout_attr.hlsl
M clang/test/CodeGen/AArch64/neon-2velem.c
M clang/test/CodeGen/AArch64/neon-scalar-x-indexed-elem.c
M clang/test/CodeGen/AArch64/neon/fused-multiple-fullfp16.c
M clang/test/CodeGen/AArch64/neon/fused-multiply.c
M clang/test/CodeGen/AArch64/v8.2a-neon-intrinsics.c
M clang/test/CodeGen/scoped-atomic-ops.c
M clang/test/CodeGenCUDA/amdgpu-kernel-arg-pointer-type.cu
M clang/test/CodeGenCUDA/atomic-options.hip
M clang/test/CodeGenCUDA/builtins-amdgcn.cu
M clang/test/CodeGenCUDA/builtins-spirv-amdgcn.cu
M clang/test/CodeGenCUDA/record-layout.cu
M clang/test/CodeGenCXX/amdgcn-func-arg.cpp
M clang/test/CodeGenHIP/placement-new-addrspace.hip
A clang/test/CodeGenHLSL/matrix-layout-attr-overrides-default.hlsl
M clang/test/CodeGenOpenCL/addr-space-struct-arg.cl
M clang/test/CodeGenOpenCL/amdgpu-abi-struct-arg-byref.cl
M clang/test/CodeGenOpenCL/amdgpu-enqueue-kernel.cl
M clang/test/CodeGenOpenCL/atomic-ops.cl
M clang/test/CodeGenSYCL/kernel-caller-entry-point.cpp
M clang/test/Driver/hipspv-toolchain.hip
M clang/test/OpenMP/amdgcn_target_device_vla.cpp
M clang/test/OpenMP/amdgpu_target_with_aligned_attribute.c
M clang/test/OpenMP/target_teams_generic_loop_codegen.cpp
M clang/test/OpenMP/target_teams_generic_loop_codegen_as_distribute.cpp
M clang/test/OpenMP/target_teams_generic_loop_codegen_as_parallel_for.cpp
M clang/test/SemaHLSL/BuiltIns/logical-mat-operator-errors.hlsl
M clang/test/SemaHLSL/MatrixElementOverloadResolution.hlsl
M clang/test/SemaHLSL/Types/BuiltinMatrix/MatrixImplicitTruncCastWarnings.hlsl
M cross-project-tests/debuginfo-tests/dexter/dex/debugger/DebuggerControllers/ScriptDebuggerController.py
A cross-project-tests/debuginfo-tests/dexter/dex/evaluation/ExpectMatch.py
A cross-project-tests/debuginfo-tests/dexter/dex/evaluation/Metrics.py
A cross-project-tests/debuginfo-tests/dexter/dex/evaluation/RunMatch.py
A cross-project-tests/debuginfo-tests/dexter/dex/evaluation/StateMatch.py
A cross-project-tests/debuginfo-tests/dexter/dex/evaluation/__init__.py
M cross-project-tests/debuginfo-tests/dexter/dex/test_script/__init__.py
M cross-project-tests/debuginfo-tests/dexter/dex/tools/test/Tool.py
A cross-project-tests/debuginfo-tests/dexter/feature_tests/scripts/evaluation/basic_evaluate.cpp
A cross-project-tests/debuginfo-tests/dexter/feature_tests/scripts/evaluation/evaluate_nothing.cpp
M flang/docs/OpenACC-extensions.md
M flang/examples/FlangOmpReport/FlangOmpReportVisitor.cpp
M flang/include/flang/Parser/dump-parse-tree.h
M flang/include/flang/Parser/parse-tree.h
M flang/include/flang/Semantics/symbol.h
M flang/include/flang/Support/Fortran-features.h
M flang/include/flang/Support/Fortran.h
M flang/lib/Frontend/CompilerInvocation.cpp
M flang/lib/Parser/openacc-parsers.cpp
M flang/lib/Parser/unparse.cpp
M flang/lib/Semantics/check-acc-structure.cpp
M flang/lib/Semantics/mod-file.cpp
M flang/lib/Semantics/resolve-directives.cpp
M flang/lib/Semantics/symbol.cpp
M flang/lib/Support/Fortran-features.cpp
A flang/test/Lower/OpenACC/acc-module-definition-multi-name.f90
A flang/test/Lower/OpenACC/acc-routine-multi-name.f90
M flang/test/Parser/OpenMP/declare_target-device_type.f90
M flang/test/Parser/OpenMP/groupprivate.f90
A flang/test/Parser/acc-routine-empty-parens.f90
M flang/test/Parser/acc-unparse.f90
A flang/test/Semantics/OpenACC/acc-routine-multi-name-disabled.f90
A flang/test/Semantics/OpenACC/acc-routine-multi-name.f90
A flang/test/Semantics/OpenMP/declare-target-flags.f90
A flang/test/Semantics/OpenMP/declare-target-modfile.f90
M flang/test/Semantics/OpenMP/dump-requires-details.f90
M lldb/test/API/macosx/expedited-thread-pcs/TestExpeditedThreadPCs.py
M llvm/docs/GettingInvolved.rst
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/lib/Target/AMDGPU/AMDGPUCodeGenPrepare.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
M llvm/lib/Transforms/Scalar/LoopInterchange.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorizationLegality.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlanConstruction.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.h
M llvm/lib/Transforms/Vectorize/VPlanUtils.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/inline-asm-mismatched-size.ll
M llvm/test/CodeGen/AMDGPU/inlineasm-mismatched-size-error.ll
A llvm/test/CodeGen/NVPTX/atomicrmw-allow-ftz-atomics.ll
M llvm/test/CodeGen/NVPTX/atomicrmw-sm60.ll
M llvm/test/CodeGen/NVPTX/atomicrmw-sm70.ll
M llvm/test/CodeGen/NVPTX/atomicrmw-sm90.ll
M llvm/test/CodeGen/NVPTX/atomicrmw.py
M llvm/test/CodeGen/NVPTX/atomics.ll
M llvm/test/Transforms/LoopInterchange/call-instructions.ll
M llvm/test/Transforms/LoopInterchange/function-attr.ll
M llvm/test/Transforms/LoopVectorize/AArch64/early_exit_with_stores.ll
M llvm/test/Transforms/LoopVectorize/RISCV/early_exit_with_stores.ll
M llvm/test/Transforms/LoopVectorize/VPlan/early_exit_with_stores_vplan.ll
M llvm/test/Transforms/LoopVectorize/early_exit_store_legality.ll
M llvm/test/Transforms/LoopVectorize/early_exit_with_stores.ll
A llvm/test/Transforms/LoopVectorize/interleave_uncountable_exits.ll
A llvm/test/Transforms/LoopVectorize/scalarized_conditional_ops_uncountable_exits.ll
A llvm/test/Transforms/LoopVectorize/tail_fold_uncountable_exits.ll
M llvm/unittests/Transforms/Vectorize/VPlanUncountableExitTest.cpp
M openmp/module/CMakeLists.txt
Log Message:
-----------
Merge branch 'main' into users/hvdijk/dxilprettyprinter-ir-printing
Commit: abf77fee1784134b432ef1df146855fd1ea89d3b
https://github.com/llvm/llvm-project/commit/abf77fee1784134b432ef1df146855fd1ea89d3b
Author: Harald van Dijk <hdijk at accesssoftek.com>
Date: 2026-06-03 (Wed, 03 Jun 2026)
Changed paths:
A clang/include/clang/AST/MatrixUtils.h
M clang/include/clang/Basic/Attr.td
M clang/include/clang/Options/FlangOptions.td
M clang/include/clang/Sema/SemaHLSL.h
M clang/lib/AST/TypePrinter.cpp
M clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp
M clang/lib/CodeGen/ABIInfoImpl.cpp
M clang/lib/CodeGen/CGAtomic.cpp
M clang/lib/CodeGen/CGBlocks.cpp
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/CodeGen/CGCUDANV.cpp
M clang/lib/CodeGen/CGCall.cpp
M clang/lib/CodeGen/CGClass.cpp
M clang/lib/CodeGen/CGDecl.cpp
M clang/lib/CodeGen/CGException.cpp
M clang/lib/CodeGen/CGExpr.cpp
M clang/lib/CodeGen/CGExprAgg.cpp
M clang/lib/CodeGen/CGExprConstant.cpp
M clang/lib/CodeGen/CGExprScalar.cpp
M clang/lib/CodeGen/CGHLSLBuiltins.cpp
M clang/lib/CodeGen/CGHLSLRuntime.cpp
M clang/lib/CodeGen/CGOpenMPRuntime.cpp
M clang/lib/CodeGen/CGOpenMPRuntimeGPU.cpp
M clang/lib/CodeGen/CGStmt.cpp
M clang/lib/CodeGen/CGStmtOpenMP.cpp
M clang/lib/CodeGen/CodeGenFunction.h
M clang/lib/CodeGen/CodeGenTypes.cpp
M clang/lib/CodeGen/MicrosoftCXXABI.cpp
M clang/lib/CodeGen/TargetBuiltins/ARM.cpp
M clang/lib/CodeGen/TargetBuiltins/X86.cpp
M clang/lib/CodeGen/Targets/X86.cpp
M clang/lib/Driver/ToolChains/Flang.cpp
M clang/lib/Sema/SemaDeclAttr.cpp
M clang/lib/Sema/SemaExprCXX.cpp
M clang/lib/Sema/SemaHLSL.cpp
M clang/lib/Sema/SemaTemplateInstantiateDecl.cpp
M clang/lib/Sema/SemaType.cpp
M clang/lib/Sema/TreeTransform.h
M clang/test/AST/HLSL/matrix_layout_attr.hlsl
M clang/test/CodeGen/AArch64/neon-2velem.c
M clang/test/CodeGen/AArch64/neon-scalar-x-indexed-elem.c
M clang/test/CodeGen/AArch64/neon/fused-multiple-fullfp16.c
M clang/test/CodeGen/AArch64/neon/fused-multiply.c
M clang/test/CodeGen/AArch64/v8.2a-neon-intrinsics.c
M clang/test/CodeGen/scoped-atomic-ops.c
M clang/test/CodeGenCUDA/amdgpu-kernel-arg-pointer-type.cu
M clang/test/CodeGenCUDA/atomic-options.hip
M clang/test/CodeGenCUDA/builtins-amdgcn.cu
M clang/test/CodeGenCUDA/builtins-spirv-amdgcn.cu
M clang/test/CodeGenCUDA/record-layout.cu
M clang/test/CodeGenCXX/amdgcn-func-arg.cpp
M clang/test/CodeGenHIP/placement-new-addrspace.hip
A clang/test/CodeGenHLSL/matrix-layout-attr-overrides-default.hlsl
M clang/test/CodeGenOpenCL/addr-space-struct-arg.cl
M clang/test/CodeGenOpenCL/amdgpu-abi-struct-arg-byref.cl
M clang/test/CodeGenOpenCL/amdgpu-enqueue-kernel.cl
M clang/test/CodeGenOpenCL/atomic-ops.cl
M clang/test/CodeGenSYCL/kernel-caller-entry-point.cpp
M clang/test/Driver/hipspv-toolchain.hip
M clang/test/OpenMP/amdgcn_target_device_vla.cpp
M clang/test/OpenMP/amdgpu_target_with_aligned_attribute.c
M clang/test/OpenMP/target_teams_generic_loop_codegen.cpp
M clang/test/OpenMP/target_teams_generic_loop_codegen_as_distribute.cpp
M clang/test/OpenMP/target_teams_generic_loop_codegen_as_parallel_for.cpp
M clang/test/SemaHLSL/BuiltIns/logical-mat-operator-errors.hlsl
M clang/test/SemaHLSL/MatrixElementOverloadResolution.hlsl
M clang/test/SemaHLSL/Types/BuiltinMatrix/MatrixImplicitTruncCastWarnings.hlsl
M cross-project-tests/debuginfo-tests/dexter/dex/debugger/DebuggerControllers/ScriptDebuggerController.py
A cross-project-tests/debuginfo-tests/dexter/dex/evaluation/ExpectMatch.py
A cross-project-tests/debuginfo-tests/dexter/dex/evaluation/Metrics.py
A cross-project-tests/debuginfo-tests/dexter/dex/evaluation/RunMatch.py
A cross-project-tests/debuginfo-tests/dexter/dex/evaluation/StateMatch.py
A cross-project-tests/debuginfo-tests/dexter/dex/evaluation/__init__.py
M cross-project-tests/debuginfo-tests/dexter/dex/test_script/__init__.py
M cross-project-tests/debuginfo-tests/dexter/dex/tools/test/Tool.py
A cross-project-tests/debuginfo-tests/dexter/feature_tests/scripts/evaluation/basic_evaluate.cpp
A cross-project-tests/debuginfo-tests/dexter/feature_tests/scripts/evaluation/evaluate_nothing.cpp
M flang/docs/OpenACC-extensions.md
M flang/examples/FlangOmpReport/FlangOmpReportVisitor.cpp
M flang/include/flang/Parser/dump-parse-tree.h
M flang/include/flang/Parser/parse-tree.h
M flang/include/flang/Semantics/symbol.h
M flang/include/flang/Support/Fortran-features.h
M flang/include/flang/Support/Fortran.h
M flang/lib/Frontend/CompilerInvocation.cpp
M flang/lib/Parser/openacc-parsers.cpp
M flang/lib/Parser/unparse.cpp
M flang/lib/Semantics/check-acc-structure.cpp
M flang/lib/Semantics/mod-file.cpp
M flang/lib/Semantics/resolve-directives.cpp
M flang/lib/Semantics/symbol.cpp
M flang/lib/Support/Fortran-features.cpp
A flang/test/Lower/OpenACC/acc-module-definition-multi-name.f90
A flang/test/Lower/OpenACC/acc-routine-multi-name.f90
M flang/test/Parser/OpenMP/declare_target-device_type.f90
M flang/test/Parser/OpenMP/groupprivate.f90
A flang/test/Parser/acc-routine-empty-parens.f90
M flang/test/Parser/acc-unparse.f90
A flang/test/Semantics/OpenACC/acc-routine-multi-name-disabled.f90
A flang/test/Semantics/OpenACC/acc-routine-multi-name.f90
A flang/test/Semantics/OpenMP/declare-target-flags.f90
A flang/test/Semantics/OpenMP/declare-target-modfile.f90
M flang/test/Semantics/OpenMP/dump-requires-details.f90
M lldb/test/API/macosx/expedited-thread-pcs/TestExpeditedThreadPCs.py
M llvm/docs/GettingInvolved.rst
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/lib/Target/AMDGPU/AMDGPUCodeGenPrepare.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
M llvm/lib/Transforms/Scalar/LoopInterchange.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorizationLegality.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlanConstruction.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.h
M llvm/lib/Transforms/Vectorize/VPlanUtils.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/inline-asm-mismatched-size.ll
M llvm/test/CodeGen/AMDGPU/inlineasm-mismatched-size-error.ll
A llvm/test/CodeGen/NVPTX/atomicrmw-allow-ftz-atomics.ll
M llvm/test/CodeGen/NVPTX/atomicrmw-sm60.ll
M llvm/test/CodeGen/NVPTX/atomicrmw-sm70.ll
M llvm/test/CodeGen/NVPTX/atomicrmw-sm90.ll
M llvm/test/CodeGen/NVPTX/atomicrmw.py
M llvm/test/CodeGen/NVPTX/atomics.ll
M llvm/test/Transforms/LoopInterchange/call-instructions.ll
M llvm/test/Transforms/LoopInterchange/function-attr.ll
M llvm/test/Transforms/LoopVectorize/AArch64/early_exit_with_stores.ll
M llvm/test/Transforms/LoopVectorize/RISCV/early_exit_with_stores.ll
M llvm/test/Transforms/LoopVectorize/VPlan/early_exit_with_stores_vplan.ll
M llvm/test/Transforms/LoopVectorize/early_exit_store_legality.ll
M llvm/test/Transforms/LoopVectorize/early_exit_with_stores.ll
A llvm/test/Transforms/LoopVectorize/interleave_uncountable_exits.ll
A llvm/test/Transforms/LoopVectorize/scalarized_conditional_ops_uncountable_exits.ll
A llvm/test/Transforms/LoopVectorize/tail_fold_uncountable_exits.ll
M llvm/unittests/Transforms/Vectorize/VPlanUncountableExitTest.cpp
M openmp/module/CMakeLists.txt
Log Message:
-----------
Merge branch 'users/hvdijk/dxilprettyprinter-ir-printing' into users/hvdijk/directx-delay-converting-debug-info
Compare: https://github.com/llvm/llvm-project/compare/7419b864dc10...abf77fee1784
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