[all-commits] [llvm/llvm-project] 90a172: [AMDGPU] Reject named single register inline asm c...

[Arseniy Obolenskiy via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 90a172b53e77e4171b67e9fe4215707aed45cda4
      https://github.com/llvm/llvm-project/commit/90a172b53e77e4171b67e9fe4215707aed45cda4
  Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
  Date:   2026-06-03 (Wed, 03 Jun 2026)

  Changed paths:
    M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
    M llvm/test/CodeGen/AMDGPU/GlobalISel/inline-asm-mismatched-size.ll
    M llvm/test/CodeGen/AMDGPU/inlineasm-mismatched-size-error.ll

  Log Message:
  -----------
  [AMDGPU] Reject named single register inline asm constraints for wider types (#200771)

A named single register constraint like `={v0}` was silently accepted
for i64 result, binding it to one 32-bit register

Reject scalars larger than 32 bits as well



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