[all-commits] [llvm/llvm-project] ff1c75: [AMDGPU][docs][NFC] Update gfx12 documentation (#2...

Jun Wang via All-commits all-commits at lists.llvm.org
Tue Jun 2 11:55:58 PDT 2026


  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: ff1c751223a0e99a4563743abaaa5faa50d2ed6e
      https://github.com/llvm/llvm-project/commit/ff1c751223a0e99a4563743abaaa5faa50d2ed6e
  Author: Jun Wang <jwang_2024 at outlook.com>
  Date:   2026-06-02 (Tue, 02 Jun 2026)

  Changed paths:
    M llvm/docs/AMDGPU/AMDGPUAsmGFX12.rst
    R llvm/docs/AMDGPU/gfx12_addr.rst
    R llvm/docs/AMDGPU/gfx12_attr.rst
    R llvm/docs/AMDGPU/gfx12_clause.rst
    R llvm/docs/AMDGPU/gfx12_data0_56f215.rst
    R llvm/docs/AMDGPU/gfx12_data0_6802ce.rst
    R llvm/docs/AMDGPU/gfx12_data0_e016a1.rst
    R llvm/docs/AMDGPU/gfx12_data0_fd235e.rst
    R llvm/docs/AMDGPU/gfx12_data1_6802ce.rst
    R llvm/docs/AMDGPU/gfx12_data1_731030.rst
    R llvm/docs/AMDGPU/gfx12_data1_e016a1.rst
    R llvm/docs/AMDGPU/gfx12_data1_fd235e.rst
    R llvm/docs/AMDGPU/gfx12_delay.rst
    R llvm/docs/AMDGPU/gfx12_hwreg.rst
    R llvm/docs/AMDGPU/gfx12_imm16.rst
    R llvm/docs/AMDGPU/gfx12_ioffset.rst
    R llvm/docs/AMDGPU/gfx12_label.rst
    R llvm/docs/AMDGPU/gfx12_literal_1f74c7.rst
    R llvm/docs/AMDGPU/gfx12_literal_81e671.rst
    R llvm/docs/AMDGPU/gfx12_m.rst
    A llvm/docs/AMDGPU/gfx12_operands.rst
    R llvm/docs/AMDGPU/gfx12_rsrc_5fe6d8.rst
    R llvm/docs/AMDGPU/gfx12_rsrc_c9f929.rst
    R llvm/docs/AMDGPU/gfx12_saddr_cdc95c.rst
    R llvm/docs/AMDGPU/gfx12_saddr_d42b64.rst
    R llvm/docs/AMDGPU/gfx12_samp.rst
    R llvm/docs/AMDGPU/gfx12_sbase_453b95.rst
    R llvm/docs/AMDGPU/gfx12_sbase_47adb7.rst
    R llvm/docs/AMDGPU/gfx12_sdata_0974a4.rst
    R llvm/docs/AMDGPU/gfx12_sdata_354189.rst
    R llvm/docs/AMDGPU/gfx12_sdata_4585b8.rst
    R llvm/docs/AMDGPU/gfx12_sdata_5c7b50.rst
    R llvm/docs/AMDGPU/gfx12_sdata_6c003b.rst
    R llvm/docs/AMDGPU/gfx12_sdata_836716.rst
    R llvm/docs/AMDGPU/gfx12_sdata_d725ab.rst
    R llvm/docs/AMDGPU/gfx12_sdata_dd9dd8.rst
    R llvm/docs/AMDGPU/gfx12_sdst_006c40.rst
    R llvm/docs/AMDGPU/gfx12_sdst_20064d.rst
    R llvm/docs/AMDGPU/gfx12_sdst_354189.rst
    R llvm/docs/AMDGPU/gfx12_sdst_836716.rst
    R llvm/docs/AMDGPU/gfx12_sdst_ced58d.rst
    R llvm/docs/AMDGPU/gfx12_sdst_e701cc.rst
    R llvm/docs/AMDGPU/gfx12_sendmsg.rst
    R llvm/docs/AMDGPU/gfx12_sendmsg_rtn.rst
    R llvm/docs/AMDGPU/gfx12_simm16_15ccdd.rst
    R llvm/docs/AMDGPU/gfx12_simm16_218bea.rst
    R llvm/docs/AMDGPU/gfx12_simm16_39b593.rst
    R llvm/docs/AMDGPU/gfx12_simm16_3d2a4f.rst
    R llvm/docs/AMDGPU/gfx12_simm16_730a13.rst
    R llvm/docs/AMDGPU/gfx12_simm16_7ed651.rst
    R llvm/docs/AMDGPU/gfx12_simm16_81e671.rst
    R llvm/docs/AMDGPU/gfx12_simm16_c98889.rst
    R llvm/docs/AMDGPU/gfx12_simm16_cc1716.rst
    R llvm/docs/AMDGPU/gfx12_simm16_ee8b30.rst
    R llvm/docs/AMDGPU/gfx12_soffset_8ec073.rst
    R llvm/docs/AMDGPU/gfx12_soffset_c5b88c.rst
    R llvm/docs/AMDGPU/gfx12_soffset_ec005a.rst
    R llvm/docs/AMDGPU/gfx12_src0_5727cf.rst
    R llvm/docs/AMDGPU/gfx12_src0_5cae62.rst
    R llvm/docs/AMDGPU/gfx12_src0_6802ce.rst
    R llvm/docs/AMDGPU/gfx12_src0_85aab6.rst
    R llvm/docs/AMDGPU/gfx12_src0_c4593f.rst
    R llvm/docs/AMDGPU/gfx12_src0_e016a1.rst
    R llvm/docs/AMDGPU/gfx12_src0_fd235e.rst
    R llvm/docs/AMDGPU/gfx12_src1_5727cf.rst
    R llvm/docs/AMDGPU/gfx12_src1_5cae62.rst
    R llvm/docs/AMDGPU/gfx12_src1_6802ce.rst
    R llvm/docs/AMDGPU/gfx12_src1_731030.rst
    R llvm/docs/AMDGPU/gfx12_src1_977794.rst
    R llvm/docs/AMDGPU/gfx12_src1_c4593f.rst
    R llvm/docs/AMDGPU/gfx12_src1_e016a1.rst
    R llvm/docs/AMDGPU/gfx12_src1_fd235e.rst
    R llvm/docs/AMDGPU/gfx12_src2_2797bc.rst
    R llvm/docs/AMDGPU/gfx12_src2_5727cf.rst
    R llvm/docs/AMDGPU/gfx12_src2_5cae62.rst
    R llvm/docs/AMDGPU/gfx12_src2_6802ce.rst
    R llvm/docs/AMDGPU/gfx12_src2_7b936a.rst
    R llvm/docs/AMDGPU/gfx12_src2_96fbd3.rst
    R llvm/docs/AMDGPU/gfx12_src2_c4593f.rst
    R llvm/docs/AMDGPU/gfx12_src2_e016a1.rst
    R llvm/docs/AMDGPU/gfx12_srcx0.rst
    R llvm/docs/AMDGPU/gfx12_srcy0.rst
    R llvm/docs/AMDGPU/gfx12_ssrc0_007f9c.rst
    R llvm/docs/AMDGPU/gfx12_ssrc0_1a9ca5.rst
    R llvm/docs/AMDGPU/gfx12_ssrc0_245536.rst
    R llvm/docs/AMDGPU/gfx12_ssrc0_2797bc.rst
    R llvm/docs/AMDGPU/gfx12_ssrc0_bbb4c6.rst
    R llvm/docs/AMDGPU/gfx12_ssrc0_c4593f.rst
    R llvm/docs/AMDGPU/gfx12_ssrc1_bbb4c6.rst
    R llvm/docs/AMDGPU/gfx12_ssrc1_c4593f.rst
    R llvm/docs/AMDGPU/gfx12_tgt.rst
    R llvm/docs/AMDGPU/gfx12_vaddr_a972b9.rst
    R llvm/docs/AMDGPU/gfx12_vaddr_c12f43.rst
    R llvm/docs/AMDGPU/gfx12_vaddr_c8b8d4.rst
    R llvm/docs/AMDGPU/gfx12_vaddr_d82160.rst
    R llvm/docs/AMDGPU/gfx12_vaddr_f2b449.rst
    R llvm/docs/AMDGPU/gfx12_vcc.rst
    R llvm/docs/AMDGPU/gfx12_vdata_2eda77.rst
    R llvm/docs/AMDGPU/gfx12_vdata_48e42f.rst
    R llvm/docs/AMDGPU/gfx12_vdata_69a144.rst
    R llvm/docs/AMDGPU/gfx12_vdata_89680f.rst
    R llvm/docs/AMDGPU/gfx12_vdata_aac3e8.rst
    R llvm/docs/AMDGPU/gfx12_vdata_bdb32f.rst
    R llvm/docs/AMDGPU/gfx12_vdst_006c40.rst
    R llvm/docs/AMDGPU/gfx12_vdst_227281.rst
    R llvm/docs/AMDGPU/gfx12_vdst_2eda77.rst
    R llvm/docs/AMDGPU/gfx12_vdst_47d3bc.rst
    R llvm/docs/AMDGPU/gfx12_vdst_48e42f.rst
    R llvm/docs/AMDGPU/gfx12_vdst_69a144.rst
    R llvm/docs/AMDGPU/gfx12_vdst_7de8e7.rst
    R llvm/docs/AMDGPU/gfx12_vdst_836716.rst
    R llvm/docs/AMDGPU/gfx12_vdst_89680f.rst
    R llvm/docs/AMDGPU/gfx12_vdst_bdb32f.rst
    R llvm/docs/AMDGPU/gfx12_vdstx.rst
    R llvm/docs/AMDGPU/gfx12_vdsty.rst
    R llvm/docs/AMDGPU/gfx12_version.rst
    R llvm/docs/AMDGPU/gfx12_vsrc0.rst
    R llvm/docs/AMDGPU/gfx12_vsrc1_6802ce.rst
    R llvm/docs/AMDGPU/gfx12_vsrc1_fd235e.rst
    R llvm/docs/AMDGPU/gfx12_vsrc2.rst
    R llvm/docs/AMDGPU/gfx12_vsrc3.rst
    R llvm/docs/AMDGPU/gfx12_vsrc_56f215.rst
    R llvm/docs/AMDGPU/gfx12_vsrc_6802ce.rst
    R llvm/docs/AMDGPU/gfx12_vsrc_89fd7b.rst
    R llvm/docs/AMDGPU/gfx12_vsrc_e016a1.rst
    R llvm/docs/AMDGPU/gfx12_vsrc_fd235e.rst
    R llvm/docs/AMDGPU/gfx12_vsrcx1.rst
    R llvm/docs/AMDGPU/gfx12_vsrcy1.rst
    R llvm/docs/AMDGPU/gfx12_waitcnt.rst

  Log Message:
  -----------
  [AMDGPU][docs][NFC] Update gfx12 documentation (#200976)

Following what we did with the GFX950 documentation, this patch replaces
the multitude of rst files for GFX12 operands with a single file. Some
problems are fixed as well, e.g., different opcodes in the same encoding
(e.g., VDS) may have different modifiers.



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