[all-commits] [llvm/llvm-project] 2666b4: [InstCombine][VectorCombine] Move bitcast vp.load ...

[Luke Lau via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 2666b44bdc9d2098d394c0afce91a00437b75823
      https://github.com/llvm/llvm-project/commit/2666b44bdc9d2098d394c0afce91a00437b75823
  Author: Luke Lau <luke at igalia.com>
  Date:   2026-06-01 (Mon, 01 Jun 2026)

  Changed paths:
    M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
    M llvm/lib/Transforms/Vectorize/VectorCombine.cpp
    R llvm/test/Transforms/InstCombine/fold-vp-load.ll
    A llvm/test/Transforms/VectorCombine/RISCV/fold-vp-load.ll

  Log Message:
  -----------
  [InstCombine][VectorCombine] Move bitcast vp.load fold into VectorCombine (#200321)

Fixes https://github.com/llvm/llvm-project/issues/199896

In #192173 we started folding bitcasts of vp.loads with an all ones mask
into a vp.load with the casted type. However on RISC-V a vp.load of an
i1 vector is illegal (since there's no masked variant of `vlm.v`), and
we have no way of checking this in InstCombine.

This moves the fold into VectorCombine so we can query TTI if the cost
is legal (and profitable)

As a side note, it may be possible to lower a vp.load of an i1 vector on
RISC-V to `vlm.v` **only** if the mask is all ones. But this means the
lowering would only be valid for certain values, which is difficult to
cost. And I'm not sure if it would be profitable anyway.



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