[all-commits] [llvm/llvm-project] 863502: [AArch64][SME] Add multi-vector load opcodes to ge...

[Benjamin Maxwell via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 86350249871598fe76318ebd21af468879b9e87e
      https://github.com/llvm/llvm-project/commit/86350249871598fe76318ebd21af468879b9e87e
  Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
  Date:   2026-05-31 (Sun, 31 May 2026)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
    A llvm/test/CodeGen/AArch64/sve-ldst-multi-vec.mir

  Log Message:
  -----------
  [AArch64][SME] Add multi-vector load opcodes to getMemOpInfo (#200238)

We recently started emitting these in
84fab943b5740ec273e9f8d238ea8420033320a4, which now means we can hit an
unhandled opcode error in AArch64InstrInfo::getMemOpInfo when resolving
stack offsets.

Fixes #200034



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