[all-commits] [llvm/llvm-project] db7d01: [PowerPC] Add patterns for atomic load with immedi...

[Kai Nacke via All-commits]

  Branch: refs/heads/users/redstar/ppcatomicloadimm
  Home:   https://github.com/llvm/llvm-project
  Commit: db7d01c4aace14040ecb637189dc8738ca79a320
      https://github.com/llvm/llvm-project/commit/db7d01c4aace14040ecb637189dc8738ca79a320
  Author: Kai Nacke <kai.peter.nacke at ibm.com>
  Date:   2026-05-29 (Fri, 29 May 2026)

  Changed paths:
    M llvm/lib/Target/PowerPC/PPCISelLowering.cpp
    M llvm/lib/Target/PowerPC/PPCInstr64Bit.td
    M llvm/lib/Target/PowerPC/PPCInstrInfo.td
    M llvm/test/CodeGen/PowerPC/all-atomics.ll

  Log Message:
  -----------
  [PowerPC] Add patterns for atomic load with immediates

Adds pattern to use the immediate form of and, or, and xor for
atomic loads. The matching is limited to 16-bit immediates, which
seems to be the most used ones.


  Commit: 0746ad467e49d1aaa329dd9379c5c762c5a86443
      https://github.com/llvm/llvm-project/commit/0746ad467e49d1aaa329dd9379c5c762c5a86443
  Author: Kai Nacke <kai.peter.nacke at ibm.com>
  Date:   2026-05-29 (Fri, 29 May 2026)

  Changed paths:
    M llvm/lib/Target/PowerPC/PPCISelLowering.cpp

  Log Message:
  -----------
  Fix formatting


Compare: https://github.com/llvm/llvm-project/compare/28eb5c48f075...0746ad467e49

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