[all-commits] [llvm/llvm-project] aff129: [AArch64][GlobalISel] Add support for pmul intrins...

[Joshua Rodriguez via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: aff129e825b5e21943f89a3994d6e26a14600367
      https://github.com/llvm/llvm-project/commit/aff129e825b5e21943f89a3994d6e26a14600367
  Author: Joshua Rodriguez <josh.rodriguez at arm.com>
  Date:   2026-05-28 (Thu, 28 May 2026)

  Changed paths:
    M llvm/docs/GlobalISel/GenericOpcode.rst
    M llvm/include/llvm/Support/TargetOpcodes.def
    M llvm/include/llvm/Target/GenericOpcodes.td
    M llvm/include/llvm/Target/GlobalISel/SelectionDAGCompat.td
    M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
    M llvm/lib/Target/AArch64/GISel/AArch64RegisterBankInfo.cpp
    M llvm/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir
    M llvm/test/CodeGen/AArch64/arm64-neon-mul-div.ll
    M llvm/test/CodeGen/RISCV/GlobalISel/legalizer-info-validation.mir
    M llvm/test/CodeGen/X86/machine-block-hash.mir

  Log Message:
  -----------
  [AArch64][GlobalISel] Add support for pmul intrinsic (#198809)

Previously, pmul couldn't lower as there were neither any GlobalISel
patterns for the intrinsic, nor a GlobalISel node to allow use of the
SelectionDAG patterns.
Create a G_PMUL node linked to the SelectionDAG node 'clmul' (CarryLess
MULtiplication). Now the ISel stage of GlobalISel has suitable patterns
to lower the intrinsic.



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