[all-commits] [llvm/llvm-project] c85c8a: [compiler-rt][ARM] Add missing SUPERSEDES for opti...
Sameer Sahasrabuddhe via All-commits
all-commits at lists.llvm.org
Thu May 28 04:18:06 PDT 2026
Branch: refs/heads/users/ssahasra/av-metadata
Home: https://github.com/llvm/llvm-project
Commit: c85c8af5426eb1affa14388deb78a4731737bf04
https://github.com/llvm/llvm-project/commit/c85c8af5426eb1affa14388deb78a4731737bf04
Author: Garvit Gupta <garvgupt at qti.qualcomm.com>
Date: 2026-05-27 (Wed, 27 May 2026)
Changed paths:
M compiler-rt/lib/builtins/CMakeLists.txt
Log Message:
-----------
[compiler-rt][ARM] Add missing SUPERSEDES for optimized FP comparison sources (#199604)
PR #179924 and #179925 added optimized assembly implementations for ARM
double-precision and single-precision FP comparisons (arm/cmpdf2.S,
arm/gedf2.S, arm/unorddf2.S, arm/cmpsf2.S, arm/gesf2.S, arm/unordsf2.S)
but only added SUPERSEDES annotations for the thumb1 variants. The arm
variants were missing these annotations, causing both the generic and
optimized implementations to be included in libclang_rt.builtins.a.
For double-precision, the archive contains:
- comparedf2.c.obj (pos 28): defines __unorddf2, __aeabi_dcmpun, ...
- divdc3.c.obj (pos 32): defines __divdc3; refs __aeabi_dcmpun
- unorddf2.S.obj (pos 126): defines __unorddf2, __aeabi_dcmpun
- aeabi_dcmp.S.obj (pos 158): defines __aeabi_dcmpeq; refs __eqdf2
When linking divdc3_test.c, the linker loads divdc3.c.obj which
introduces __aeabi_dcmpun as undefined. BFD-like linkers (GNU ld, ELD)
continue scanning forward and resolve __aeabi_dcmpun from unorddf2.S.obj
(pos 126). Later, aeabi_dcmp.S.obj introduces __eqdf2 as undefined,
which is resolved by comparedf2.c.obj (pos 28) on the next pass. Since
both comparedf2.c.obj and unorddf2.S.obj define __unorddf2, the linker
reports a duplicate symbol error.
lld does not encounter this because of the difference in the way it
resolves symbol references. This causes comparedf2.c.obj (pos 28) to be
selected first for __aeabi_dcmpun, making unorddf2.S.obj unnecessary.
The same pattern exists for single-precision where arm/comparesf2.S and
arm/unordsf2.S both define __unordsf2 and __aeabi_fcmpun.
The fix adds SUPERSEDES annotations so that the generic implementations
(comparedf2.c for double-precision and arm/comparesf2.S for single-
precision) are removed from the source list when the optimized assembly
replacements are present. The assembly files together provide all
symbols that the generic implementations define.
The surrounding code was reviewed, and this PR was developed with the
assistance of AI.
Commit: 18ddec75ba8241bb49e290cbc60c05dca7ab6250
https://github.com/llvm/llvm-project/commit/18ddec75ba8241bb49e290cbc60c05dca7ab6250
Author: Felipe de Azevedo Piovezan <fpiovezan at apple.com>
Date: 2026-05-27 (Wed, 27 May 2026)
Changed paths:
M lldb/source/Target/Process.cpp
Log Message:
-----------
[lldb] Use private stop for breakpoint-delaying decision (#199639)
Commit: 532940bdee66bf5f36a70578698aab66f16919af
https://github.com/llvm/llvm-project/commit/532940bdee66bf5f36a70578698aab66f16919af
Author: Haohai Wen <haohai.wen at intel.com>
Date: 2026-05-27 (Wed, 27 May 2026)
Changed paths:
A llvm/include/llvm/Object/BBAddrMap.def
M llvm/include/llvm/Object/BBAddrMap.h
Log Message:
-----------
[BBAddrMap] Drive Features and Metadata bits from BBAddrMap.def (#196906)
Move the bit name list of BBAddrMap::Features and BBAddrMap::BBEntry::Metadata
into a new BBAddrMap.def and derive the enum, bitfield, encode(), decode(),
and operator== from it. Adding a new bit now only requires one line in the
.def file.
Also expose BBAddrMap::Features::KnownMask for future use.
Commit: 4ee7e900f321c78271c87da47f1d7bd4263f3e7c
https://github.com/llvm/llvm-project/commit/4ee7e900f321c78271c87da47f1d7bd4263f3e7c
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2026-05-26 (Tue, 26 May 2026)
Changed paths:
M bolt/test/lit.cfg.py
M libsycl/test/lit.cfg.py
M lldb/test/API/lit.cfg.py
M lldb/test/Shell/lit.cfg.py
M llvm/utils/lit/lit/LitConfig.py
M llvm/utils/lit/lit/TestRunner.py
M llvm/utils/lit/lit/TestingConfig.py
M llvm/utils/lit/lit/formats/googletest.py
M llvm/utils/lit/lit/main.py
M llvm/utils/lit/tests/Inputs/googletest-timeout/lit.cfg
M llvm/utils/lit/tests/Inputs/shtest-timeout/lit.cfg
Log Message:
-----------
[lit] Move maxIndividualTestTime from global to test suite config (#198192)
Simplify LitConfig initialization and setter to allow None values.
TestingConfig.maxIndividualTestTime is initialized to 0 (or resolved to
0 if None) strictly during initialization.
This fixes an issue where the aggressive BOLT timeout of 60s (previously
set globally on lit_config) was leaking and affecting libc++ tests. By
moving the timeout configuration from the global lit_config to the
individual test suite config, we ensure that timeouts are isolated and
respect suite-local settings without leaking.
PR Stack:
* ➤ https://github.com/llvm/llvm-project/pull/198192
* https://github.com/llvm/llvm-project/pull/198193
Assisted-by: Gemini
Commit: 4f54064a6e192eb182ba5e718f1b6d70065a6609
https://github.com/llvm/llvm-project/commit/4f54064a6e192eb182ba5e718f1b6d70065a6609
Author: Sameer Sahasrabuddhe <sameer.sahasrabuddhe at amd.com>
Date: 2026-05-27 (Wed, 27 May 2026)
Changed paths:
M clang/lib/CodeGen/TargetBuiltins/AMDGPU.cpp
M llvm/include/llvm/IR/MemoryModelRelaxationAnnotations.h
M llvm/lib/IR/MemoryModelRelaxationAnnotations.cpp
Log Message:
-----------
[IR] Introduce an appendTags() idiom to set MMRA metadata [NFC] (#199621)
This is a simple set-union of new tags and existing tags. This is safer
than directly setting metadata, which can over-write existing MMRAs.
Assisted-By: Claude Opus 4.6
---------
Co-authored-by: Pierre van Houtryve <pierre.vanhoutryve at amd.com>
Commit: 505a611530cc4508ad815f142f7b727a278f3590
https://github.com/llvm/llvm-project/commit/505a611530cc4508ad815f142f7b727a278f3590
Author: NeKon69 <nobodqwe at gmail.com>
Date: 2026-05-27 (Wed, 27 May 2026)
Changed paths:
M .github/new-issues-labeler.yml
Log Message:
-----------
Auto-label LifetimeSafety issues with `clang:temporal-safety` (#199522)
cc: @usx95
Commit: a3adb545b6a33044ab634b7a330bab5d4ee76d24
https://github.com/llvm/llvm-project/commit/a3adb545b6a33044ab634b7a330bab5d4ee76d24
Author: NeKon69 <nobodqwe at gmail.com>
Date: 2026-05-27 (Wed, 27 May 2026)
Changed paths:
M clang/include/clang/Analysis/Analyses/LifetimeSafety/LifetimeSafety.h
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/lib/Analysis/LifetimeSafety/Checker.cpp
M clang/lib/Sema/SemaLifetimeSafety.h
M clang/test/Sema/warn-lifetime-analysis-nocfg.cpp
M clang/test/Sema/warn-lifetime-safety-suggestions.cpp
M clang/test/Sema/warn-lifetime-safety.cpp
Log Message:
-----------
[LifetimeSafety] Add details for `-Wlifetime-safety-return-stack-addr` diagnostic (#199432)
Most of the diagnostic's wording was taken from `-Wreturn-stack-address`
with exceptions such as:
- We do not special-case `[[clang::musttail]]`
- We do not special-case `CompoundLiteralExpr` as it is mostly a C
thing.
This patch does not add any new tests, it only updates already existing
test warnings to follow the new wording.
Comes as part of completing #186002
Commit: 6bbbf743ae49736ba438e9dbd14a5bd0f4166382
https://github.com/llvm/llvm-project/commit/6bbbf743ae49736ba438e9dbd14a5bd0f4166382
Author: Carlos Alberto Enciso <Carlos.Enciso at sony.com>
Date: 2026-05-27 (Wed, 27 May 2026)
Changed paths:
M llvm/docs/CommandGuide/llvm-debuginfo-analyzer.rst
M llvm/include/llvm/DebugInfo/LogicalView/Core/LVElement.h
M llvm/include/llvm/DebugInfo/LogicalView/Core/LVLocation.h
M llvm/include/llvm/DebugInfo/LogicalView/Core/LVReader.h
M llvm/include/llvm/DebugInfo/LogicalView/Core/LVSupport.h
M llvm/include/llvm/DebugInfo/LogicalView/LVReaderHandler.h
M llvm/include/llvm/DebugInfo/LogicalView/Readers/LVBinaryReader.h
A llvm/include/llvm/DebugInfo/LogicalView/Readers/LVIRReader.h
M llvm/lib/DebugInfo/LogicalView/CMakeLists.txt
M llvm/lib/DebugInfo/LogicalView/Core/LVElement.cpp
M llvm/lib/DebugInfo/LogicalView/Core/LVLocation.cpp
M llvm/lib/DebugInfo/LogicalView/Core/LVReader.cpp
M llvm/lib/DebugInfo/LogicalView/LVReaderHandler.cpp
A llvm/lib/DebugInfo/LogicalView/Readers/LVIRReader.cpp
M llvm/lib/Transforms/Utils/DebugSSAUpdater.cpp
A llvm/test/tools/llvm-debuginfo-analyzer/IR/01-ir-compare-logical-elements.test
A llvm/test/tools/llvm-debuginfo-analyzer/IR/01-ir-print-basic-details.test
A llvm/test/tools/llvm-debuginfo-analyzer/IR/01-ir-select-logical-elements.test
A llvm/test/tools/llvm-debuginfo-analyzer/IR/02-ir-logical-lines.test
A llvm/test/tools/llvm-debuginfo-analyzer/IR/03-ir-incorrect-lexical-scope-typedef.test
A llvm/test/tools/llvm-debuginfo-analyzer/IR/04-ir-missing-nested-enumerators.test
A llvm/test/tools/llvm-debuginfo-analyzer/IR/05-ir-incorrect-lexical-scope-variable.test
A llvm/test/tools/llvm-debuginfo-analyzer/IR/06-ir-full-logical-view.test
A llvm/test/tools/llvm-debuginfo-analyzer/IR/07-ir-debug-formats.test
A llvm/test/tools/llvm-debuginfo-analyzer/IR/08-ir-multiple-compile-units.test
A llvm/test/tools/llvm-debuginfo-analyzer/IR/Inputs/compile-unit-1.ll
A llvm/test/tools/llvm-debuginfo-analyzer/IR/Inputs/compile-unit-2.ll
A llvm/test/tools/llvm-debuginfo-analyzer/IR/Inputs/compile-unit-3.ll
A llvm/test/tools/llvm-debuginfo-analyzer/IR/Inputs/compile-unit.ll
A llvm/test/tools/llvm-debuginfo-analyzer/IR/Inputs/hello-world-clang.ll
A llvm/test/tools/llvm-debuginfo-analyzer/IR/Inputs/pr-43860-clang.ll
A llvm/test/tools/llvm-debuginfo-analyzer/IR/Inputs/pr-44884-clang.ll
A llvm/test/tools/llvm-debuginfo-analyzer/IR/Inputs/pr-46466-clang.ll
A llvm/test/tools/llvm-debuginfo-analyzer/IR/Inputs/test-clang-intrinsics.ll
A llvm/test/tools/llvm-debuginfo-analyzer/IR/Inputs/test-clang.ll
M llvm/tools/llvm-debuginfo-analyzer/CMakeLists.txt
M llvm/unittests/DebugInfo/LogicalView/CMakeLists.txt
A llvm/unittests/DebugInfo/LogicalView/IRReaderTest.cpp
M llvm/unittests/DebugInfo/LogicalView/Inputs/README.md
A llvm/unittests/DebugInfo/LogicalView/Inputs/test-clang.bc
A llvm/unittests/DebugInfo/LogicalView/Inputs/test-clang.ll
Log Message:
-----------
[llvm-debuginfo-analyzer] Add support for LLVM IR format. (#135440)
llvm-debuginfo-analyzer is a command line tool that processes debug
info contained in a binary file and produces a debug information
format agnostic “Logical View”, which is a high-level semantic
representation of the debug info, independent of the low-level format.
Add support for the LLVM IR format and be able to generate logical
views. Both textual representation (.ll) and bitcode (.bc) formats
are supported.
Commit: 2b286794010f5549d109b37941a4c3171489c5d8
https://github.com/llvm/llvm-project/commit/2b286794010f5549d109b37941a4c3171489c5d8
Author: Kigyosi Alexandru <alexandru.kigyosi at intel.com>
Date: 2026-05-27 (Wed, 27 May 2026)
Changed paths:
M mlir/include/mlir/IR/MLIRContext.h
M mlir/lib/IR/MLIRContext.cpp
Log Message:
-----------
[MLIR] Add a non-const ActionHandler getter to MLIRContext (#199652)
#197230 added a getter for the ActionHandler, but only returns a const
ref with a non-const accessor.
Instead provide both variants: a const accessor returning a const ref
and non-const one returning a mutable ref.
Commit: 77d3da64d2bbbcd520aede072225d4790e95a84e
https://github.com/llvm/llvm-project/commit/77d3da64d2bbbcd520aede072225d4790e95a84e
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2026-05-27 (Wed, 27 May 2026)
Changed paths:
M clang/lib/Sema/SemaChecking.cpp
M clang/test/CodeGen/builtin-masked.c
Log Message:
-----------
[Clang] Accept gnu vectors in __builtin_masked* (#198248)
There doesn't seem to be a good reason to reject gnu vectors in these
builtins. The error messages for that case are also rather bizzare,
which doesn't help with figuring out what's going wrong.
Commit: 263494977277ad6514e353021c31e3096c6cb3aa
https://github.com/llvm/llvm-project/commit/263494977277ad6514e353021c31e3096c6cb3aa
Author: forking-google-bazel-bot[bot] <265904573+forking-google-bazel-bot[bot]@users.noreply.github.com>
Date: 2026-05-27 (Wed, 27 May 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
Log Message:
-----------
[Bazel] Fixes 532940b (#199874)
This fixes 532940bdee66bf5f36a70578698aab66f16919af.
Co-authored-by: Google Bazel Bot <google-bazel-bot at google.com>
Commit: 6de9a33debfdcd4dc77f826d515b744d382a8598
https://github.com/llvm/llvm-project/commit/6de9a33debfdcd4dc77f826d515b744d382a8598
Author: Carlos Alberto Enciso <Carlos.Enciso at sony.com>
Date: 2026-05-27 (Wed, 27 May 2026)
Changed paths:
M llvm/docs/CommandGuide/llvm-debuginfo-analyzer.rst
M llvm/include/llvm/DebugInfo/LogicalView/Core/LVElement.h
M llvm/include/llvm/DebugInfo/LogicalView/Core/LVLocation.h
M llvm/include/llvm/DebugInfo/LogicalView/Core/LVReader.h
M llvm/include/llvm/DebugInfo/LogicalView/Core/LVSupport.h
M llvm/include/llvm/DebugInfo/LogicalView/LVReaderHandler.h
M llvm/include/llvm/DebugInfo/LogicalView/Readers/LVBinaryReader.h
R llvm/include/llvm/DebugInfo/LogicalView/Readers/LVIRReader.h
M llvm/lib/DebugInfo/LogicalView/CMakeLists.txt
M llvm/lib/DebugInfo/LogicalView/Core/LVElement.cpp
M llvm/lib/DebugInfo/LogicalView/Core/LVLocation.cpp
M llvm/lib/DebugInfo/LogicalView/Core/LVReader.cpp
M llvm/lib/DebugInfo/LogicalView/LVReaderHandler.cpp
R llvm/lib/DebugInfo/LogicalView/Readers/LVIRReader.cpp
M llvm/lib/Transforms/Utils/DebugSSAUpdater.cpp
R llvm/test/tools/llvm-debuginfo-analyzer/IR/01-ir-compare-logical-elements.test
R llvm/test/tools/llvm-debuginfo-analyzer/IR/01-ir-print-basic-details.test
R llvm/test/tools/llvm-debuginfo-analyzer/IR/01-ir-select-logical-elements.test
R llvm/test/tools/llvm-debuginfo-analyzer/IR/02-ir-logical-lines.test
R llvm/test/tools/llvm-debuginfo-analyzer/IR/03-ir-incorrect-lexical-scope-typedef.test
R llvm/test/tools/llvm-debuginfo-analyzer/IR/04-ir-missing-nested-enumerators.test
R llvm/test/tools/llvm-debuginfo-analyzer/IR/05-ir-incorrect-lexical-scope-variable.test
R llvm/test/tools/llvm-debuginfo-analyzer/IR/06-ir-full-logical-view.test
R llvm/test/tools/llvm-debuginfo-analyzer/IR/07-ir-debug-formats.test
R llvm/test/tools/llvm-debuginfo-analyzer/IR/08-ir-multiple-compile-units.test
R llvm/test/tools/llvm-debuginfo-analyzer/IR/Inputs/compile-unit-1.ll
R llvm/test/tools/llvm-debuginfo-analyzer/IR/Inputs/compile-unit-2.ll
R llvm/test/tools/llvm-debuginfo-analyzer/IR/Inputs/compile-unit-3.ll
R llvm/test/tools/llvm-debuginfo-analyzer/IR/Inputs/compile-unit.ll
R llvm/test/tools/llvm-debuginfo-analyzer/IR/Inputs/hello-world-clang.ll
R llvm/test/tools/llvm-debuginfo-analyzer/IR/Inputs/pr-43860-clang.ll
R llvm/test/tools/llvm-debuginfo-analyzer/IR/Inputs/pr-44884-clang.ll
R llvm/test/tools/llvm-debuginfo-analyzer/IR/Inputs/pr-46466-clang.ll
R llvm/test/tools/llvm-debuginfo-analyzer/IR/Inputs/test-clang-intrinsics.ll
R llvm/test/tools/llvm-debuginfo-analyzer/IR/Inputs/test-clang.ll
M llvm/tools/llvm-debuginfo-analyzer/CMakeLists.txt
M llvm/unittests/DebugInfo/LogicalView/CMakeLists.txt
R llvm/unittests/DebugInfo/LogicalView/IRReaderTest.cpp
M llvm/unittests/DebugInfo/LogicalView/Inputs/README.md
R llvm/unittests/DebugInfo/LogicalView/Inputs/test-clang.bc
R llvm/unittests/DebugInfo/LogicalView/Inputs/test-clang.ll
Log Message:
-----------
Revert "[llvm-debuginfo-analyzer] Add support for LLVM IR format. (#135440)" (#199890)
This reverts commit 6bbbf743ae49736ba438e9dbd14a5bd0f4166382.
There are link issues with some buildbots.
Commit: a4b1361f33139e7a0a02edee1a1b012740951e01
https://github.com/llvm/llvm-project/commit/a4b1361f33139e7a0a02edee1a1b012740951e01
Author: Boyao Wang <wangboyao at bytedance.com>
Date: 2026-05-27 (Wed, 27 May 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-int-interleave.ll
M llvm/test/CodeGen/RISCV/rvv/vector-interleave-fixed.ll
Log Message:
-----------
[RISCV][CodeGen] Use vzip.vv for e64 interleave shuffles with Zvzip (#199512)
Allow e64 interleave shuffles to use the standard Zvzip `vzip.vv`
lowering when the operand type is legal for Zvzip, just the same as what
XrivosVizip already does.
Commit: f5bda2b94460d8439ed876d6486774d863ae989a
https://github.com/llvm/llvm-project/commit/f5bda2b94460d8439ed876d6486774d863ae989a
Author: NeKon69 <nobodqwe at gmail.com>
Date: 2026-05-27 (Wed, 27 May 2026)
Changed paths:
M clang/test/Sema/warn-lifetime-safety.cpp
Log Message:
-----------
[LifetimeSafety] Change new tests' warnings to new ones (#199887)
cc: @usx95
Commit: 66bafd43ff2beb1d727339361df7ad34ea30e97a
https://github.com/llvm/llvm-project/commit/66bafd43ff2beb1d727339361df7ad34ea30e97a
Author: Mieszko Dziadowiec <mieszko.dziadowiec at intel.com>
Date: 2026-05-27 (Wed, 27 May 2026)
Changed paths:
M mlir/lib/Support/TypeID.cpp
Log Message:
-----------
[MLIR] Improve TypeID anonymous namespace check to handle GCC's __PRETTY_FUNCTION__ format (#199634)
The anonymous namespace detection in
`FallbackTypeIDResolver::registerImplicitTypeID` only checked for
Clang's `(anonymous namespace)` and MSVC's `anonymous-namespace`
formats. GCC produces `{anonymous}` in `__PRETTY_FUNCTION__`, silently
bypassing the check.
Commit: 99238714741163c9187ca8db6ebe73c4cb3a4400
https://github.com/llvm/llvm-project/commit/99238714741163c9187ca8db6ebe73c4cb3a4400
Author: Amir Ayupov <aaupov at fb.com>
Date: 2026-05-27 (Wed, 27 May 2026)
Changed paths:
M bolt/include/bolt/Profile/DataAggregator.h
M bolt/lib/Profile/DataAggregator.cpp
Log Message:
-----------
[BOLT][NFC] Split out DataAggregator::parseInput
Test Plan: NFC
Reviewers:
paschalis-mpeis, maksfb, ayermolo, yavtuk, yozhu, rafaelauler, yota9
Reviewed By: yozhu, rafaelauler
Pull Request: https://github.com/llvm/llvm-project/pull/199321
Commit: b926cf7da0918686f4bcb4e16f3066aca22ae1e6
https://github.com/llvm/llvm-project/commit/b926cf7da0918686f4bcb4e16f3066aca22ae1e6
Author: Davide Grohmann <davide.grohmann at arm.com>
Date: 2026-05-27 (Wed, 27 May 2026)
Changed paths:
M mlir/include/mlir/Conversion/TosaToSPIRVTosa/TosaToSPIRVTosa.h
M mlir/lib/Conversion/TosaToSPIRVTosa/CMakeLists.txt
A mlir/lib/Conversion/TosaToSPIRVTosa/TosaToSPIRVTosaOps.cpp
M mlir/lib/Conversion/TosaToSPIRVTosa/TosaToSPIRVTosaPass.cpp
A mlir/test/Conversion/TosaToSPIRVTosa/tosa-to-spirv.mlir
Log Message:
-----------
[mlir][tosa][spirv] Lower TOSA elementwise ops to SPIR-V TOSA (#199505)
Add conversion patterns for simple TOSA elementwise operations to the
SPIR-V TOSA dialect.
The lowering covers unary and binary elementwise ops with shared pattern
templates, plus min/max handling for NaN propagation mode.
Add focused conversion tests that check the generated SPIR-V TOSA ops.
Signed-off-by: Davide Grohmann <davide.grohmann at arm.com>
Commit: 4c9296d94c95c4b4064a77cd7a61352bfb5130fd
https://github.com/llvm/llvm-project/commit/4c9296d94c95c4b4064a77cd7a61352bfb5130fd
Author: Amir Ayupov <aaupov at fb.com>
Date: 2026-05-27 (Wed, 27 May 2026)
Changed paths:
M bolt/tools/driver/llvm-bolt.cpp
Log Message:
-----------
[BOLT][NFC] Unify perf data setting
Combine opts::PerfData handling into one place per driver (llvm-bolt and
heatmap).
* Allow using perf data directly after DataAggregator/DataReader
unification in #195986.
* Drop redundant perf data checks in perf2boltMode done by setProfile.
Test Plan: NFC
Reviewers:
ritter-x2a, david-salinas, grypp, Pierre-vh, dcaballe, aartbik, adam-smnk, fabianmcg, yota9, JDevlieghere, banach-space, xlauko, nikic, #reviewers-libcxx, rafaelauler, Moxinilian, nicolasvasilache, yozhu, ayermolo, paschalis-mpeis, lamb-j, andykaylor, #reviewers-libc, vangthao95, bcardosolopes, yavtuk, aaronmondal, rupprecht, matthias-springer, keith, maksfb, lanza, Jianhui-Li, charithaintc
Reviewed By: yozhu, rafaelauler
Pull Request: https://github.com/llvm/llvm-project/pull/199322
Commit: 3e0c818e6f80213b737a5e18318de794a3914f71
https://github.com/llvm/llvm-project/commit/3e0c818e6f80213b737a5e18318de794a3914f71
Author: Rana Pratap Reddy <109514914+ranapratap55 at users.noreply.github.com>
Date: 2026-05-27 (Wed, 27 May 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenBuiltinAMDGPU.cpp
M clang/lib/CIR/CodeGen/CIRGenTypes.cpp
A clang/test/CIR/CodeGenHIP/builtins-amdgcn-image.hip
Log Message:
-----------
[CIR][AMDGPU] Adds lowering for amdgcn image load/store builtins (#198184)
Support for lowering of amdgcn_image_load/store for AMDGPU builtins to
clangIR.
Followed similar lowering from clang->llvmir:
`clang/lib/CodeGen/TargetBuiltins/AMDGPU.cpp`.
Upstreaming clangIR PR: https://github.com/llvm/clangir/pull/2058
Commit: d63f99627b9b08d71595b1879be74a8225873e34
https://github.com/llvm/llvm-project/commit/d63f99627b9b08d71595b1879be74a8225873e34
Author: Amir Ayupov <aaupov at fb.com>
Date: 2026-05-27 (Wed, 27 May 2026)
Changed paths:
A bolt/test/merge-fdata-no-lbr-event-multi.test
A bolt/test/merge-fdata-no-lbr-event.test
M bolt/tools/merge-fdata/merge-fdata.cpp
Log Message:
-----------
[BOLT][merge-fdata] Preserve event names
Test Plan: added merge-fdata-no-lbr-event*.test
Reviewers:
maksfb, paschalis-mpeis, yozhu, yota9, yavtuk, rafaelauler, ayermolo
Reviewed By: rafaelauler
Pull Request: https://github.com/llvm/llvm-project/pull/199323
Commit: 698d44bf9ff61cd8c924bcf406c29c9988d5ea5e
https://github.com/llvm/llvm-project/commit/698d44bf9ff61cd8c924bcf406c29c9988d5ea5e
Author: Hui <hui.xie1990 at gmail.com>
Date: 2026-05-27 (Wed, 27 May 2026)
Changed paths:
M clang/include/clang/Basic/Builtins.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/Sema/SemaChecking.cpp
A clang/test/CodeGen/builtin-clear-padding-codegen.c
A clang/test/CodeGenCXX/builtin-clear-padding-codegen.cpp
A clang/test/Sema/builtin-clear-padding.c
A clang/test/SemaCXX/builtin-clear-padding.cpp
A libcxx/test/libcxx/atomics/builtin_clear_padding.pass.cpp
Log Message:
-----------
[clang] Add builtin to clear padding bytes (prework for P0528R3) (#75371)
Add builtin to clear padding bytes. This is the pre-work to implement
`std::atomic::compare_exchange_[weak/strong]` that ignores padding bits.
PR draft here: https://github.com/llvm/llvm-project/pull/76180
This PR picked up this patch from 3 years ago
https://reviews.llvm.org/D87974
The above patch no longer works as things changed quite a lot. I've made
some changes on top of the above patch:
it handles:
- struct
- builtin types with paddings (like `long double` and types with
`__attribute__((ext_vector_type(N)))`
- _Complex long double
- constant array
- union
- bit field
- types with virtual functions
- types with virtual bases
---------
Co-authored-by: zoecarver <z.zoelec2 at gmail.com>
Commit: c94e5f327f47821e29f21b39ef1dc511c91341d9
https://github.com/llvm/llvm-project/commit/c94e5f327f47821e29f21b39ef1dc511c91341d9
Author: Petar Avramovic <Petar.Avramovic at amd.com>
Date: 2026-05-27 (Wed, 27 May 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeHelper.cpp
Log Message:
-----------
AMDGPU/GlobalISel: Move executeInWaterfallLoop call from lower (#199701)
WFI is an argument to applyMappingSrc and lower,
move executeInWaterfallLoop after these two return.
Also set insert point in executeInWaterfallLoop to
avoid need to set insert point before calling it.
Commit: 99e6632cf619e4654443d2f58e9ffe6015a34314
https://github.com/llvm/llvm-project/commit/99e6632cf619e4654443d2f58e9ffe6015a34314
Author: Vicky Nguyen <vicky.trucviennguyen at gmail.com>
Date: 2026-05-27 (Wed, 27 May 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp
M clang/test/CodeGen/AArch64/neon-intrinsics.c
M clang/test/CodeGen/AArch64/neon/intrinsics.c
M clang/test/CodeGen/AArch64/poly64.c
Log Message:
-----------
[CIR][AArch64] Upstream vector-shift-right-and-insert NEON builtins (#196776)
Related to https://github.com/llvm/llvm-project/issues/185382
CIR lowering for vector-shift-right-and-insert intrinsics
(https://arm-software.github.io/acle/neon_intrinsics/advsimd.html#vector-shift-right-and-insert)
Port tests from clang/test/CodeGen/AArch64/neon_intrinsics.c and
clang/test/CodeGen/AArch64/poly64.c to
clang/test/CodeGen/AArch64/neon/intrinsics.c
Commit: 4def779282d9c2a179fcfeb0079928f1bb2ce409
https://github.com/llvm/llvm-project/commit/4def779282d9c2a179fcfeb0079928f1bb2ce409
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2026-05-27 (Wed, 27 May 2026)
Changed paths:
M libcxx/test/libcxx-03/vendor/apple/disable-availability.sh.cpp
M libcxx/test/libcxx/utilities/meta/is_within_lifetime.verify.cpp
M libcxx/test/selftest/modules/std-and-std.compat-module.sh.cpp
M libcxx/test/selftest/modules/std-module.sh.cpp
M libcxx/test/selftest/modules/std.compat-module.sh.cpp
M libcxx/test/std/modules/std.compat.pass.cpp
M libcxx/test/std/modules/std.pass.cpp
M libcxx/test/std/numerics/c.math/signbit.pass.cpp
M libcxx/test/std/utilities/meta/meta.const.eval/is_within_lifetime.compile.pass.cpp
M libcxx/test/std/utilities/meta/meta.rel/is_virtual_base_of.pass.cpp
M libcxx/test/std/utilities/meta/meta.unary/meta.unary.prop/is_implicit_lifetime.pass.cpp
M libcxx/test/std/utilities/meta/meta.unary/meta.unary.prop/is_implicit_lifetime.verify.cpp
Log Message:
-----------
[libc++][NFC] Remove lit annotations for older AppleClang versions (#199817)
We don't support anything older than apple-clang-21, so we can remove
those annotations.
Commit: 3060f65b84f2b16f2f53367a03d2542a30827ac0
https://github.com/llvm/llvm-project/commit/3060f65b84f2b16f2f53367a03d2542a30827ac0
Author: Shanzhi Chen <chenshanzhi at huawei.com>
Date: 2026-05-27 (Wed, 27 May 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-int-interleave.ll
M llvm/test/CodeGen/RISCV/rvv/vector-interleave-fixed.ll
Log Message:
-----------
Revert "[RISCV][CodeGen] Use vzip.vv for e64 interleave shuffles with Zvzip" (#199899)
Reverts llvm/llvm-project#199512
LLVM Buildbot has detected a build error for this PR.
Commit: 0d6aac78ad967cfb0dc69de26cd7e159605fe0de
https://github.com/llvm/llvm-project/commit/0d6aac78ad967cfb0dc69de26cd7e159605fe0de
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2026-05-27 (Wed, 27 May 2026)
Changed paths:
M libcxx/include/CMakeLists.txt
A libcxx/include/__concepts/referenceable.h
M libcxx/include/__config
M libcxx/include/__iterator/common_iterator.h
M libcxx/include/__iterator/concepts.h
M libcxx/include/__iterator/iter_move.h
M libcxx/include/__iterator/iterator_traits.h
M libcxx/include/__ranges/adjacent_transform_view.h
M libcxx/include/__ranges/transform_view.h
M libcxx/include/__ranges/zip_transform_view.h
M libcxx/include/__type_traits/add_pointer.h
R libcxx/include/__type_traits/is_referenceable.h
M libcxx/include/__type_traits/remove_pointer.h
M libcxx/include/module.modulemap.in
R libcxx/test/libcxx/utilities/meta/is_referenceable.compile.pass.cpp
M libcxx/test/std/utilities/meta/meta.trans/objc_support.compile.pass.mm
Log Message:
-----------
[libc++] Remove workarounds for __{add,remove}_pointer on AppleClang (#199821)
We've updated the supported AppleClang version, so we can drop those
workarounds now.
This also removes `__is_referenceable_v`, since it's no longer used.
Commit: 090df8f0c30699e65ebd29e347b5fbb26559e2f5
https://github.com/llvm/llvm-project/commit/090df8f0c30699e65ebd29e347b5fbb26559e2f5
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2026-05-27 (Wed, 27 May 2026)
Changed paths:
M bolt/test/lit.cfg.py
M libsycl/test/lit.cfg.py
M lldb/test/API/lit.cfg.py
M lldb/test/Shell/lit.cfg.py
M llvm/utils/lit/lit/LitConfig.py
M llvm/utils/lit/lit/TestRunner.py
M llvm/utils/lit/lit/TestingConfig.py
M llvm/utils/lit/lit/formats/googletest.py
M llvm/utils/lit/lit/main.py
M llvm/utils/lit/tests/Inputs/googletest-timeout/lit.cfg
M llvm/utils/lit/tests/Inputs/shtest-timeout/lit.cfg
Log Message:
-----------
Revert "[lit] Move maxIndividualTestTime from global to test suite config" (#199886)
Reverts llvm/llvm-project#198192
To fix https://lab.llvm.org/buildbot/#/builders/195/builds/25357
Commit: 3c16e92da529447a07625cfd0a702172dabed32c
https://github.com/llvm/llvm-project/commit/3c16e92da529447a07625cfd0a702172dabed32c
Author: Shanzhi Chen <chenshanzhi at huawei.com>
Date: 2026-05-27 (Wed, 27 May 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.h
A llvm/test/Transforms/EarlyCSE/AArch64/intrinsics-1xN.ll
Log Message:
-----------
[AArch64][TTI][EarlyCSE] Add support for ld1xN and st1xN intrinsics (#198765)
Handle ld1x2, ld1x3, ld1x4, st1x2, st1x3, st1x4 in:
- AArch64TTIImpl::getTgtMemIntrinsic
- AArch64TTIImpl::getOrCreateResultFromMemIntrinsic
This enables EarlyCSE to optimize these NEON load/store intrinsics.
To test the changes, a new testcase (intrinsics-1xN.ll) derived from
llvm/test/Transforms/EarlyCSE/AArch64/intrinsics.ll is added.
Commit: 2a574828c62f344859188796fc615ef44dd16327
https://github.com/llvm/llvm-project/commit/2a574828c62f344859188796fc615ef44dd16327
Author: David Green <david.green at arm.com>
Date: 2026-05-27 (Wed, 27 May 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
Log Message:
-----------
[SelectionDAGBuilder] Replace asserts inside LLVM_DEBUG (#199748)
These assert were inside an LLVM_DEBUG macro, meaning they were very
rarely if ever tested. The second "LowerFormalArguments emitted a value
with the wrong type!" assert would fire in a number of tests so has been
removed. The other was replaced with an all_of assert.
Noticed when looking at #198107 / #199412.
Commit: b63787a1c5d74b437e5cbc6dfc75d6b0cd9998cc
https://github.com/llvm/llvm-project/commit/b63787a1c5d74b437e5cbc6dfc75d6b0cd9998cc
Author: stefankoncarevic <skoncare at amd.com>
Date: 2026-05-27 (Wed, 27 May 2026)
Changed paths:
M mlir/include/mlir/Dialect/AMDGPU/IR/AMDGPUOps.td
M mlir/include/mlir/Dialect/LLVMIR/ROCDLOps.td
M mlir/lib/Conversion/AMDGPUToROCDL/AMDGPUToROCDL.cpp
A mlir/test/Conversion/AMDGPUToROCDL/permlane-var.mlir
M mlir/test/Dialect/LLVMIR/rocdl.mlir
M mlir/test/Target/LLVMIR/rocdl.mlir
Log Message:
-----------
[MLIR][AMDGPU] Add permlane16.var and permlanex16.var intrinsic ops (#199501)
## Summary
Add ROCDL and AMDGPU dialect support for the GFX12+ variable-selector
permlane intrinsics (`v_permlane16_var_b32` / `v_permlanex16_var_b32`).
Unlike the existing fixed-selector `permlane16`/`permlanex16` ops where
source-lane indices come from SGPR immediates, the "var" variants take
per-lane source-lane indices from a VGPR, enabling arbitrary per-lane
intra-row and cross-row permutations within a wave32 subgroup.
### ROCDL dialect
- `ROCDL_Permlane16VarOp` → `llvm.amdgcn.permlane16.var`
- `ROCDL_PermlaneX16VarOp` → `llvm.amdgcn.permlanex16.var`
- Both take `(old, src0, src1, fi, boundControl)` with `fi` and
`boundControl` as immediate i1 attrs
### AMDGPU dialect
- `AMDGPU_PermlaneVarOp` — high-level wrapper supporting arbitrary
int/float/vector types
- `cross` attribute selects between intra-row (`permlane16.var`) and
cross-row (`permlanex16.var`)
- Lowering uses `LLVM::decomposeValue`/`composeValue` to automatically
repack types (f16, i8, vectors, etc.) into i32 register slots
### Tests
- ROCDL roundtrip (parser/printer) tests
- ROCDL → LLVM IR translation tests
- AMDGPU → ROCDL lowering tests covering i32, f32, f16, vector<4xf16>,
cross variants, and fi/bound_ctrl attributes
Commit: c71f9f0aec3ad789b8a6510a98d3882b3e776a40
https://github.com/llvm/llvm-project/commit/c71f9f0aec3ad789b8a6510a98d3882b3e776a40
Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
Date: 2026-05-27 (Wed, 27 May 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanVerifier.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/alias-mask.ll
Log Message:
-----------
[LV] Handle loop.dependence.mask in verifyLastActiveLaneRecipe() (#199897)
This verification can be called after the alias-mask has been expanded
so needs to recognize loop.dependence.mask intrinsics.
Commit: e6fe3f4f55ef7219eac36464724f8ff5c0bc4159
https://github.com/llvm/llvm-project/commit/e6fe3f4f55ef7219eac36464724f8ff5c0bc4159
Author: David Spickett <david.spickett at arm.com>
Date: 2026-05-27 (Wed, 27 May 2026)
Changed paths:
M lldb/test/Shell/Commands/command-dil-diagnostics.test
M lldb/test/Shell/Commands/command-module-hook-fire.test
M lldb/test/Shell/Commands/process-attach-dummy.test
M lldb/test/Shell/ObjectFile/MachO/section-overflow-binary.test
M lldb/unittests/DAP/Handler/DisconnectTest.cpp
Log Message:
-----------
[lldb][test] Require Python for a few more tests (#199913)
Commit: 2245dd779f8c9815113ae038df61441466b9774e
https://github.com/llvm/llvm-project/commit/2245dd779f8c9815113ae038df61441466b9774e
Author: Baranov Victor <bar.victor.2002 at gmail.com>
Date: 2026-05-27 (Wed, 27 May 2026)
Changed paths:
M clang-tools-extra/clangd/HeaderSourceSwitch.cpp
M clang-tools-extra/clangd/unittests/HeaderSourceSwitchTests.cpp
Log Message:
-----------
[clangd] Prefer .hpp files over .h with header source switch (#198152)
Previously, The "Switch Between Source/Header" action picked `.h` over
`.hpp` when both files existed next to a `.cpp` file, because `.h` is
listed first in the header-extension list.
This patch reorders `HeaderExtensions` and `SourceExtensions` so the
`C++`-flavored extensions come before `.h` and `.c`. `C++`-flavor of
file is preffered since (at least in my opinion) more people using
`clangd` for `C++` than `C` with `.hpp` ext so switching from `.cpp`
should go into `.hpp`, not `.h`.
This brings an edje case that when swithing from `.c` it will go into
`.hpp` instead of `.h`, but I think this situation is more rare than
having `.cpp` with `.hpp` and `.h` combination since `.h` headers can be
used as `extern "C"` wrapper of cpp library.
Commit: 61341994bb456eaf286154f8f241d0d6723df8ea
https://github.com/llvm/llvm-project/commit/61341994bb456eaf286154f8f241d0d6723df8ea
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-05-27 (Wed, 27 May 2026)
Changed paths:
A llvm/test/Transforms/SLPVectorizer/AArch64/lcssa-phi-inner-loop-scale.ll
Log Message:
-----------
[SLP][NFC]Add some more tests with phi external uses, NFC
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/199919
Commit: 5bfcf13e48c9a168ff431fa655a41d88c725ca85
https://github.com/llvm/llvm-project/commit/5bfcf13e48c9a168ff431fa655a41d88c725ca85
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-05-27 (Wed, 27 May 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.h
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/store-costs-sve.ll
Log Message:
-----------
[VPlan] Construct VPlan1 once, share across buildVPlans calls. (#197276)
Extract the VF-independent VPlan1 setup pipeline (header phis,
simplification, early-exit handling, middle check, loop regions, tail
folding, mask introduction) into a new helper tryToBuildVPlan1().
Construct the initial Vlan1 once, and pass to repeated buildVPlans
calls.
Note that this means we need to move collectInLoopReductions up. We not
may construct VPlan1 on code paths where we did not before, because we
failed UserVF validation/selection, but I think that should be fine as
this makes the overall code simpler and the UserVF code paths are for
testing.
PR: https://github.com/llvm/llvm-project/pull/197276
Commit: bdaf3cfda6d670109058d75aa1de82beffb4c954
https://github.com/llvm/llvm-project/commit/bdaf3cfda6d670109058d75aa1de82beffb4c954
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-05-27 (Wed, 27 May 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/X86/alternate-calls-inseltpoison.ll
M llvm/test/Transforms/SLPVectorizer/X86/alternate-calls.ll
M llvm/test/Transforms/SLPVectorizer/X86/arith-fp-inseltpoison.ll
M llvm/test/Transforms/SLPVectorizer/X86/arith-fp.ll
M llvm/test/Transforms/SLPVectorizer/X86/deleted-instructions-clear.ll
M llvm/test/Transforms/SLPVectorizer/X86/revec-non-power-2-to-power-2-large-vect.ll
M llvm/test/Transforms/SLPVectorizer/X86/scalarize-ctlz.ll
M llvm/test/Transforms/SLPVectorizer/X86/select-copyable-cmp-poison.ll
M llvm/test/Transforms/SLPVectorizer/X86/sitofp.ll
M llvm/test/Transforms/SLPVectorizer/X86/vec_list_bias-inseltpoison.ll
M llvm/test/Transforms/SLPVectorizer/X86/vec_list_bias.ll
M llvm/test/Transforms/SLPVectorizer/X86/vec_list_bias_external_insert_shuffled.ll
M llvm/test/Transforms/SLPVectorizer/X86/vectorize-widest-phis.ll
M llvm/test/Transforms/SLPVectorizer/extract-many-users-buildvector.ll
Log Message:
-----------
[SLP] Improve InsertElement scalarization cost modeling
When costing InsertElement tree entries, pass getScalarizationOverhead the
per-lane insert operands via AdjustedVL, set ForPoisonSrc from whether the
base vector is entirely undef, and supply a VectorInstrContext hint derived
from the demanded insert instructions. Move the scalarization cost adjustment
to after InMask is computed so ForPoisonSrc reflects the actual base vector
state.
Reviewers: bababuck, RKSimon, hiraditya
Pull Request: https://github.com/llvm/llvm-project/pull/199514
Commit: ed11d7a52a505ff53523c2c635f114d865273f24
https://github.com/llvm/llvm-project/commit/ed11d7a52a505ff53523c2c635f114d865273f24
Author: Simon Tatham <simon.tatham at arm.com>
Date: 2026-05-27 (Wed, 27 May 2026)
Changed paths:
M compiler-rt/lib/builtins/CMakeLists.txt
A compiler-rt/lib/builtins/arm/extendsfdf2.S
A compiler-rt/lib/builtins/arm/truncdfsf2.S
A compiler-rt/test/builtins/Unit/extendsfdf2new_test.c
A compiler-rt/test/builtins/Unit/truncdfsf2new_test.c
Log Message:
-----------
[compiler-rt][ARM] Optimized FP double <-> single conversion (#179926)
This commit provides assembly versions of the conversions both ways
between double and float.
Commit: 89f024609b13bcbda6ce7b58966fc4fbbca3da70
https://github.com/llvm/llvm-project/commit/89f024609b13bcbda6ce7b58966fc4fbbca3da70
Author: Boyao Wang <wangboyao at bytedance.com>
Date: 2026-05-27 (Wed, 27 May 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-int-interleave.ll
M llvm/test/CodeGen/RISCV/rvv/vector-interleave-fixed.ll
Log Message:
-----------
[RISCV][CodeGen] Use vzip.vv for e64 interleave shuffles with Zvzip (#199923)
Allow e64 interleave shuffles to use the standard Zvzip `vzip.vv`
lowering when the operand type is legal for Zvzip, just the same as what
XrivosVizip already does.
Commit: cef3e0f1280d9cf368caa94b895b61d73c588619
https://github.com/llvm/llvm-project/commit/cef3e0f1280d9cf368caa94b895b61d73c588619
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2026-05-27 (Wed, 27 May 2026)
Changed paths:
M libcxx/test/std/containers/sequences/array/size_and_alignment.compile.pass.cpp
Log Message:
-----------
[libc++][C++03] Fix array/size_and_alignment.compile.pass.cpp (#198822)
Commit: c09041a33a8ac60025538e7ca36b055cadb0d6e1
https://github.com/llvm/llvm-project/commit/c09041a33a8ac60025538e7ca36b055cadb0d6e1
Author: Matt Davis <mattd at nvidia.com>
Date: 2026-05-27 (Wed, 27 May 2026)
Changed paths:
M llvm/docs/LangRef.rst
M llvm/docs/SourceLevelDebugging.rst
M llvm/include/llvm/AsmParser/LLToken.h
M llvm/include/llvm/BinaryFormat/Dwarf.def
M llvm/include/llvm/BinaryFormat/Dwarf.h
M llvm/include/llvm/IR/DebugInfoMetadata.h
M llvm/lib/AsmParser/LLLexer.cpp
M llvm/lib/AsmParser/LLParser.cpp
M llvm/lib/BinaryFormat/Dwarf.cpp
M llvm/lib/Bitcode/Reader/MetadataLoader.cpp
M llvm/lib/Bitcode/Writer/BitcodeWriter.cpp
M llvm/lib/IR/AsmWriter.cpp
M llvm/lib/IR/Verifier.cpp
M llvm/test/Assembler/dicompileunit.ll
A llvm/test/Assembler/invalid-dicompileunit-dialect.ll
A llvm/test/Bitcode/dicompileunit-dialect.ll
M llvm/test/Bitcode/upgrade-DICompileUnit-no-versioned-language.test
M llvm/unittests/IR/MetadataTest.cpp
M llvm/unittests/IR/VerifierTest.cpp
Log Message:
-----------
[DebugInfo] Introduce DW_AT_LLVM_language_dialect (#194898)
This PR introduces an LLVM vendor DWARF attribute on compile units that
carries an optional target-specific language dialect enumerator,
distinct from DW_LANG_*. The intent of this addition is to allow a DWARF
consumer to differentiate the source programming language from the
programming model (e.g., CUDA/SIMT, Tile, etc.). This concept could also
be used to differentiate OpenMP, or other parallel models, from host
language.
As older languages adopt newer programming models, there's no need to
introduce a new language enumerator to encode that representation;
rather, the model can be encoded as a dialect and treated as a
refinement to the source language being compiled. For ease of
extensibility, we've decided to represent the value of this new dialect
attribute as a string.
Code/comments/description were developed with LLM assistance.
---------
Co-authored-by: Cursor <cursoragent at cursor.com>
Commit: ef1b6d232216d3c1c8a5742ed1ef926cdd22be39
https://github.com/llvm/llvm-project/commit/ef1b6d232216d3c1c8a5742ed1ef926cdd22be39
Author: Iñaki V Arrechea <inakiarrechea at google.com>
Date: 2026-05-27 (Wed, 27 May 2026)
Changed paths:
M llvm/include/llvm/Analysis/FunctionPropertiesAnalysis.h
M llvm/include/llvm/IR/FunctionProperties.def
M llvm/lib/Analysis/FunctionPropertiesAnalysis.cpp
M llvm/lib/Passes/PassBuilder.cpp
M llvm/lib/Passes/PassBuilderPipelines.cpp
M llvm/lib/Passes/PassRegistry.def
A llvm/test/Analysis/FunctionPropertiesAnalysis/func-properties-analysis.ll
A llvm/test/Analysis/FunctionPropertiesAnalysis/pipeline.ll
R llvm/test/Analysis/FunctionPropertiesAnalysis/properties-stats.ll
Log Message:
-----------
Add Pre-Optimization FunctionPropertiesStatistics Pass - All Properties (#199293)
Adding a PreOptimization pass for function properties that provides the
statistics preoptimization without leading to timeouts (also thanks to
https://github.com/llvm/llvm-project/pull/198940 and internal changes on the faulty target)
First iteration led to timeouts so it got reverted
https://github.com/llvm/llvm-project/pull/188837
(UPDATE) Through a flame graph proved that changes in
https://github.com/llvm/llvm-project/pull/198940 , mainly the change
inside the loop, was the one responsible for the timeout. Flame graph spent a majority of the time on updateForBB, and it's the only part there could be a blocker. Furthermore, target was fixed internally.
Previous iteration tried to get only some of the statistics, but managed
to prove locally that it's not necessary to distinguish between them
https://github.com/llvm/llvm-project/pull/199073 since the changes mentioned previously were good enough
Commit: 7de3f46cf771180a4b83eacf3d2218f175f23166
https://github.com/llvm/llvm-project/commit/7de3f46cf771180a4b83eacf3d2218f175f23166
Author: Iris Shi <0.0 at owo.li>
Date: 2026-05-27 (Wed, 27 May 2026)
Changed paths:
M llvm/lib/Analysis/InstructionSimplify.cpp
M llvm/test/Transforms/InstSimplify/call.ll
Log Message:
-----------
[InstSimplify] Fold fshl/fshr of complementary shifts to identity (#196887)
Commit: f0ae26c925ef85dd1e6f5217afcdb620641e8db5
https://github.com/llvm/llvm-project/commit/f0ae26c925ef85dd1e6f5217afcdb620641e8db5
Author: Tom Stellard <tstellar at redhat.com>
Date: 2026-05-27 (Wed, 27 May 2026)
Changed paths:
M .github/workflows/issue-release-workflow.yml
Log Message:
-----------
workflows/issue-release-workflow: Fix bug when specifying multiple commits (#199973)
All commits after the first one were being dropped in comments like
/cherry-pick <commit> <commit> ...
This was introduced by: 21df17aaaec2dd9dafd641c5dbfd96446c27921b
Commit: 78f5f7717a2e058c4d685feb3edb7d991efacbc2
https://github.com/llvm/llvm-project/commit/78f5f7717a2e058c4d685feb3edb7d991efacbc2
Author: Amy Kwan <amy.kwan1 at ibm.com>
Date: 2026-05-27 (Wed, 27 May 2026)
Changed paths:
M llvm/lib/Target/PowerPC/PPCISelLowering.cpp
A llvm/test/CodeGen/PowerPC/ppc-i64-to-fp.ll
Log Message:
-----------
[PowerPC] Drop invalid range metadata when lowering i64 load to fp in INT_TO_FP (#198705)
When lowering an i64 load in LowerINT_TO_FP, we were forwarding the
original !range metadata to a new f64 load. This is invalid because the
metadata no longer matches the value type/semantics, and can trigger
assertions when lowering i64 to fp (double or float) conversions.
This patch fixes this by passing a nullptr for the Ranges operand when
calling getLoad() and adds extra test cases to cover signed/unsigned i64
to f32/f64 conversions and to ensure they do not assert when the !range
metadata is present.
The assertion this patch attempts to fix is:
```
Assertion failed: (!MMO->getRanges() || (mdconst::extract<ConstantInt>(MMO->getRanges()->getOperand(0)) ->getBitWidth() == MemVT.getScalarSizeInBits() && MemVT.isInteger())) && "Range metadata and load type must match!"
```
This assert was originally seen when building Rust on AIX.
Commit: 1e1a1ff8a6c6d9bc7f0044c79c6cfe0819246e00
https://github.com/llvm/llvm-project/commit/1e1a1ff8a6c6d9bc7f0044c79c6cfe0819246e00
Author: Tom Stellard <tstellar at redhat.com>
Date: 2026-05-27 (Wed, 27 May 2026)
Changed paths:
M .github/workflows/release-binaries-all.yml
Log Message:
-----------
workflows/release-binaries-all: Validate input and remove template expansion (#199427)
https://github.com/llvm/llvm-project/security/code-scanning/1695
Commit: 81c523c71c92bea4c5548b5f84288acd0f05db42
https://github.com/llvm/llvm-project/commit/81c523c71c92bea4c5548b5f84288acd0f05db42
Author: Balázs Benics <benicsbalazs at gmail.com>
Date: 2026-05-27 (Wed, 27 May 2026)
Changed paths:
M clang/docs/ScalableStaticAnalysisFramework/developer-docs/ForceLinkerHeaders.rst
M clang/docs/ScalableStaticAnalysisFramework/developer-docs/HowToExtend.rst
A clang/include/clang/ScalableStaticAnalysisFramework/BuiltinAnchorSources.def
M clang/include/clang/ScalableStaticAnalysisFramework/Core/Serialization/SerializationFormatRegistry.h
M clang/include/clang/ScalableStaticAnalysisFramework/Core/TUSummary/ExtractorRegistry.h
M clang/include/clang/ScalableStaticAnalysisFramework/Core/WholeProgramAnalysis/AnalysisRegistry.h
M clang/include/clang/ScalableStaticAnalysisFramework/SSAFBuiltinForceLinker.h
M clang/lib/ScalableStaticAnalysisFramework/Analyses/CallGraph/CallGraphExtractor.cpp
M clang/lib/ScalableStaticAnalysisFramework/Analyses/CallGraph/CallGraphJSONFormat.cpp
M clang/lib/ScalableStaticAnalysisFramework/Analyses/PointerFlow/PointerFlowAnalysis.cpp
M clang/lib/ScalableStaticAnalysisFramework/Analyses/PointerFlow/PointerFlowExtractor.cpp
M clang/lib/ScalableStaticAnalysisFramework/Analyses/PointerFlow/PointerFlowFormat.cpp
M clang/lib/ScalableStaticAnalysisFramework/Analyses/UnsafeBufferUsage/UnsafeBufferUsageAnalysis.cpp
M clang/lib/ScalableStaticAnalysisFramework/Analyses/UnsafeBufferUsage/UnsafeBufferUsageExtractor.cpp
M clang/lib/ScalableStaticAnalysisFramework/Analyses/UnsafeBufferUsage/UnsafeBufferUsageFormat.cpp
M clang/lib/ScalableStaticAnalysisFramework/Core/Serialization/JSONFormat/JSONFormatImpl.cpp
M clang/lib/ScalableStaticAnalysisFramework/Core/WholeProgramAnalysis/AnalysisRegistry.cpp
M clang/unittests/ScalableStaticAnalysisFramework/Frontend/TUSummaryExtractorFrontendActionTest.cpp
M clang/unittests/ScalableStaticAnalysisFramework/Registries/FancyAnalysisData.cpp
M clang/unittests/ScalableStaticAnalysisFramework/Registries/MockSerializationFormat.cpp
M clang/unittests/ScalableStaticAnalysisFramework/Registries/MockSummaryExtractor1.cpp
M clang/unittests/ScalableStaticAnalysisFramework/Registries/MockSummaryExtractor2.cpp
R clang/unittests/ScalableStaticAnalysisFramework/SSAFBuiltinTestForceLinker.h
R clang/unittests/ScalableStaticAnalysisFramework/SSAFTestForceLinker.h
M clang/unittests/ScalableStaticAnalysisFramework/TestFixture.cpp
M clang/unittests/ScalableStaticAnalysisFramework/WholeProgramAnalysis/AnalysisDriverTest.cpp
Log Message:
-----------
Reapply "[clang][ssaf][NFC] Rework how the Force linker anchors are defined and used" (#194693)
This reverts commit 582958c4337f539e650096c0257a322315298e1a.
Drop "const" from these anchor variables - like they are in clang-tidy
Turns out, MSVC likely doesn't conform with the C++ standard and makes
`const volatile` global variables have *internal* linkage - while they
should have *external* linkage.
https://eel.is/c++draft/basic.link#3.2
```
(3) The name of an entity that belongs to a namespace scope has internal linkage if it is the name of
(3.1) a variable, variable template, function, or function template that is explicitly declared static; or
(3.2) a non-template variable of non-volatile const-qualified type, unless
(3.2.1) it is declared in the purview of a module interface unit (outside the private-module-fragment, if any) or module partition, or
(3.2.2) it is explicitly declared extern, or
(3.2.3) it is inline, or
(3.2.4) it was previously declared and the prior declaration did not have internal linkage; or
```
Consequently, `const volatile` globals should NOT have *internal*
linkage, because `volatile` variables are exempt by (3.2).
Commit: 58156c21585ab05d7810666070020919342757bf
https://github.com/llvm/llvm-project/commit/58156c21585ab05d7810666070020919342757bf
Author: Sergei Druzhkov <serzhdruzhok at gmail.com>
Date: 2026-05-27 (Wed, 27 May 2026)
Changed paths:
M lldb/tools/lldb-dap/Protocol/ProtocolTypes.cpp
M lldb/unittests/DAP/ProtocolTypesTest.cpp
Log Message:
-----------
[lldb-dap] Fix typo in StepInTarget serialization (#199907)
I fixed small typo and added test for that.
Commit: f56774213bf4da41882a468ef8b9f4b44a52ec1d
https://github.com/llvm/llvm-project/commit/f56774213bf4da41882a468ef8b9f4b44a52ec1d
Author: Matheus Izvekov <mizvekov at gmail.com>
Date: 2026-05-27 (Wed, 27 May 2026)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/AST/DeclCXX.cpp
M clang/test/CXX/temp/temp.spec/temp.expl.spec/p7.cpp
M clang/test/Modules/cxx-templates.cpp
Log Message:
-----------
[clang] fix finding class template instantiation pattern for member specializations (#199979)
Stop treating the member which a member specialization specializes as
the pattern of the former.
Split off from https://github.com/llvm/llvm-project/pull/199528
Commit: 7664fc742fa6402e7b79645e87c83c6681ab0ac9
https://github.com/llvm/llvm-project/commit/7664fc742fa6402e7b79645e87c83c6681ab0ac9
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-05-27 (Wed, 27 May 2026)
Changed paths:
M offload/liboffload/CMakeLists.txt
M offload/libomptarget/CMakeLists.txt
Log Message:
-----------
[Offload] Fix missing SONAME version on offload libraries (#199975)
Commit: f55acff22c4185418e2057a90c22826d3e947f73
https://github.com/llvm/llvm-project/commit/f55acff22c4185418e2057a90c22826d3e947f73
Author: amachronic <amachronic at protonmail.com>
Date: 2026-05-27 (Wed, 27 May 2026)
Changed paths:
M lld/ELF/Writer.cpp
A lld/test/ELF/linkerscript/overlap-nobits.s
Log Message:
-----------
[lld][ELF] Exclude SHT_NOBITS sections from LMA overlap checks (#196423)
In embedded applications it's sometimes useful to load a section at the
same virtual address as the .bss section. For example, one possible use
case is for temporary code/data that is only needed for a short time
when the program is starting up:
REGIONS {
RAM : ORIGIN = 0x100000, LENGTH = 1M
INIT : ORIGIN = 0x200000, LENGTH = 1M
}
.text { *(.text); } > RAM
.bss (NOLOAD) : { *(.bss); } > RAM
.init : AT(LOADADDR(.bss)) { *(.init); } > INIT
The .init section gets placed in the file immediately after the .text
section. At startup the .init section contents are copied to the INIT
region before zeroing .bss. Once the .init section is no longer needed
its memory can be reused, eg. as heap memory.
Currently, lld does not support this and prints an error because the
LMAs of .bss and .init overlap. There are two workarounds:
1. Use --no-check-sections to disable all overlap checks, but this also
disables VMA and file offset checks, which might not be desired.
2. Assign a fake LMA to the .bss section, which doesn't overlap with the
LMA of any other section. However, this is not very intuitive and
affects the generated program headers (because a second Phdr is needed
now that .bss has a unique p_paddr), which might not be acceptable.
These ugly workarounds can be avoided by ignoring LMA overlaps involving
SHT_NOBITS sections. This is also what binutils does, which is why the
example above works under GNU ld.
Commit: 9e279e4757b5dd190b708bfffff2fe16553cc837
https://github.com/llvm/llvm-project/commit/9e279e4757b5dd190b708bfffff2fe16553cc837
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-05-27 (Wed, 27 May 2026)
Changed paths:
M llvm/test/CodeGen/X86/vector-shuffle-combining-avx512vbmi2.ll
Log Message:
-----------
[X86] vector-shuffle-combining-avx512vbmi2.ll - add VLX/NOVLX test coverage (#199984)
Commit: d25ec4b8448767d33330b66805f876355b948efe
https://github.com/llvm/llvm-project/commit/d25ec4b8448767d33330b66805f876355b948efe
Author: Brandon Wu <brandon.wu at sifive.com>
Date: 2026-05-27 (Wed, 27 May 2026)
Changed paths:
M clang/test/Driver/print-supported-extensions-riscv.c
M clang/test/Preprocessor/riscv-target-features.c
M llvm/docs/RISCVUsage.rst
M llvm/docs/ReleaseNotes.md
M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVInstPrinter.cpp
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/lib/Target/RISCV/RISCVInstrInfo.td
A llvm/lib/Target/RISCV/RISCVInstrInfoZvbdota.td
M llvm/test/CodeGen/RISCV/attributes.ll
M llvm/test/CodeGen/RISCV/features-info.ll
M llvm/test/MC/RISCV/attribute-arch.s
A llvm/test/MC/RISCV/rvv/zvfbdota32f-invalid.s
A llvm/test/MC/RISCV/rvv/zvfbdota32f.s
A llvm/test/MC/RISCV/rvv/zvfqwbdota8f-invalid.s
A llvm/test/MC/RISCV/rvv/zvfqwbdota8f.s
A llvm/test/MC/RISCV/rvv/zvfwbdota16bf-invalid.s
A llvm/test/MC/RISCV/rvv/zvfwbdota16bf.s
A llvm/test/MC/RISCV/rvv/zvqwbdota-invalid.s
A llvm/test/MC/RISCV/rvv/zvqwbdota.s
M llvm/unittests/TargetParser/RISCVISAInfoTest.cpp
Log Message:
-----------
[llvm][RISCV] Support batched dot product extensions MC layer (#196467)
spec:
https://github.com/aswaterman/riscv-misc/blob/main/isa/ldot-bdot/ldot-bdot.adoc#zvdota-and-zvbdota-families-of-dot-product-extensions-version-02
Commit: 9757718b591fed23f5b38afeb5d2849199d1e241
https://github.com/llvm/llvm-project/commit/9757718b591fed23f5b38afeb5d2849199d1e241
Author: forking-google-bazel-bot[bot] <265904573+forking-google-bazel-bot[bot]@users.noreply.github.com>
Date: 2026-05-27 (Wed, 27 May 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/clang/BUILD.bazel
Log Message:
-----------
[Bazel] Fixes 81c523c (#199988)
This fixes 81c523c71c92bea4c5548b5f84288acd0f05db42.
Co-authored-by: Google Bazel Bot <google-bazel-bot at google.com>
Commit: 6170eeb1fa8198f00ec6517f031f1e12b5752b8d
https://github.com/llvm/llvm-project/commit/6170eeb1fa8198f00ec6517f031f1e12b5752b8d
Author: Carlos Seo <carlos.seo at linaro.org>
Date: 2026-05-27 (Wed, 27 May 2026)
Changed paths:
M flang/lib/Lower/OpenMP/ClauseProcessor.cpp
A flang/test/Lower/OpenMP/copyprivate6.f90
Log Message:
-----------
[flang][OpenMP] Fix copyprivate crash with unlimited polymorphic pointer (#199768)
Lowering a copyprivate clause whose list item is an unlimited
polymorphic pointer (class(*), pointer) crashed in TypeInfo::typeScan.
The scan descends through the fir.class box and the fir.ptr, reaching a
`none` element type, which the terminal assertion did not allow.
Fixes #198770
Commit: c0a302d416aaa94b560793477ebecc8e273c8a76
https://github.com/llvm/llvm-project/commit/c0a302d416aaa94b560793477ebecc8e273c8a76
Author: Sameer Sahasrabuddhe <sameer.sahasrabuddhe at amd.com>
Date: 2026-05-27 (Wed, 27 May 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIMemoryLegalizer.cpp
Log Message:
-----------
[AMDGPU] Refactor insertRelease into insertWriteback + insertWait (NFC) (#199486)
A release consists of two actions: write-back the current cache, and
wait for "relevant" outstanding operations to complete. With the new
memory model, it is possible to disable the cache write-back using
"non-av". This patch cleanly separates the existing implementation so
that the write-backs can be selectively applied after checking for
non-av semantics.
Part of a stack:
- #199486
- #199621
- #199489
- #199622
Assisted-By: Claude Opus 4.6
---------
Co-authored-by: Pierre van Houtryve <pierre.vanhoutryve at amd.com>
Commit: 6cb00b6c344cb6d61688cc993b15ee531dbfd0e4
https://github.com/llvm/llvm-project/commit/6cb00b6c344cb6d61688cc993b15ee531dbfd0e4
Author: Alexey Karyakin <akaryaki at qti.qualcomm.com>
Date: 2026-05-27 (Wed, 27 May 2026)
Changed paths:
M llvm/lib/Target/Hexagon/HexagonISelLoweringHVX.cpp
M llvm/test/CodeGen/Hexagon/inst_masked_store_bug1.ll
M llvm/test/CodeGen/Hexagon/isel-hvx-pred-bitcast-order.ll
Log Message:
-----------
[Hexagon] Fix up vector predicate before compressing it for bitcast (#199283)
In v64i1 vector Predicate, each i1 is represented by 2 bits of predicate
register. A predicate register needs to be fixed before we compress it.
Signed-off-by: Alexey Karyakin <akaryaki at qti.qualcomm.com>
Co-authored-by: Ikhlas Ajbar <iajbar at quicinc.com>
Commit: dcf50fe35fd0760325c24ac78e43a90e61a95337
https://github.com/llvm/llvm-project/commit/dcf50fe35fd0760325c24ac78e43a90e61a95337
Author: Jonas Paulsson <paulson1 at linux.ibm.com>
Date: 2026-05-27 (Wed, 27 May 2026)
Changed paths:
M llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
A llvm/test/CodeGen/SystemZ/foldmem-regalloc.mir
M llvm/test/CodeGen/SystemZ/foldmemop-global.mir
Log Message:
-----------
[SystemZ] Don't fold memops after SSA if tied regs don't match. (#197475)
When foldMemoryOperandImpl() is called during register allocation,
folding into a reg/mem opcode mustn't be done if the tied def and use
operands do not end up referencing the same register.
Fixes #197414
Commit: 3e8c217c6829b7acebb0f80bfcd2f807d370000e
https://github.com/llvm/llvm-project/commit/3e8c217c6829b7acebb0f80bfcd2f807d370000e
Author: Wooseok Lee <wolee at amd.com>
Date: 2026-05-27 (Wed, 27 May 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
A llvm/test/CodeGen/AMDGPU/fshl-scalar-shift-zero.ll
Log Message:
-----------
[AMDGPU] Fix ShiftAmt32Imm to use unsigned comparison (#199052)
ShiftAmt32Imm used a signed 'Imm < 32' predicate, which incorrectly
matched negative immediates such as -1. The scalar fshr fast path:
def : GCNPat<(UniformTernaryFrag<fshr> i32:$src0, i32:$src1,
(i32 ShiftAmt32Imm:$src2)),
(i32 (EXTRACT_SUBREG (S_LSHR_B64 ..., $src2), sub0))>;
When fshl(scalar, X, Z) is lowered via expandFunnelShift for any
constant Z in [0, 31], the generic code converts it to fshr(..., ~Z) or
fshr(..., -Z), producing a negative shift amount. Because all such
values satisfy Imm < 32 in a signed comparison, ShiftAmt32Imm matched
and the pattern passed the negative immediate directly to S_LSHR_B64
without the S_AND_B32 masking. S_LSHR_B64 then shifted by the wrong
amount, producing an incorrect result.
Fix by changing the predicate to an unsigned comparison so that only
values in [0, 31] match, and negative values fall through to the general
pattern which correctly applies S_AND_B32 before S_LSHR_B64.
Fixes miscompilations of scalar fshl with any constant shift amount at
-O0 on AMDGPU targets, covering both fshl(scalar, const, Z) and
fshl(scalar, scalar, Z) for all Z in [0, 31].
---------
Co-authored-by: Claude Sonnet 4 <noreply at anthropic.com>
Commit: bf8dae18aa318aac5558a38ce34c696c569feacf
https://github.com/llvm/llvm-project/commit/bf8dae18aa318aac5558a38ce34c696c569feacf
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-05-27 (Wed, 27 May 2026)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp
A llvm/test/Transforms/InstCombine/trunc-abs-intrinsics.ll
Log Message:
-----------
[InstCombine] Narrow llvm.abs through trunc. (#199643)
Update EvaluateInDifferentType / canEvaluateTruncated to narrow abs
intrinsics when the operand has at least OrigBitWidth - BitWidth + 1
sign bits. The transform always emits the narrow abs with
IsIntMinPoison=false, as the narrowed value may be INT_MIN in the narrow
type, while not in the original width.
Alive2 Proof with weaker precondition (top and truncated sign bits must
match): https://alive2.llvm.org/ce/z/AMQRmi
End-to-end C pixel math example: https://clang.godbolt.org/z/Ma8bsTGTY
PR: https://github.com/llvm/llvm-project/pull/199643
Commit: e5ad7f7e700ea839896b5ece924ef13acf573833
https://github.com/llvm/llvm-project/commit/e5ad7f7e700ea839896b5ece924ef13acf573833
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2026-05-27 (Wed, 27 May 2026)
Changed paths:
M flang/lib/Semantics/resolve-directives.cpp
M flang/test/Semantics/OpenMP/declare-simd-uniform.f90
Log Message:
-----------
[flang][OpenMP] Remove ompFlagsRequireMark from symbol resolution (#198591)
The `ompFlagsRequireMark` set was there to make sure that we put the
flags from it on symbols even when no new symbols needed to be created.
Instead of doing that, we can just put the flag on the symbol every
time. There is no harm in having these flags, it's just extra
information.
Commit: 06a6cbb188468563f5e89932a4ec8386bb977bd9
https://github.com/llvm/llvm-project/commit/06a6cbb188468563f5e89932a4ec8386bb977bd9
Author: Stefan Schuermans <schuermans at roofline.ai>
Date: 2026-05-27 (Wed, 27 May 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIFrameLowering.cpp
Log Message:
-----------
[AMDGPU] Fix SuperReg to MCRegister conversion (#199993)
This is a fix for "[AMDGPU] Implement CFI for non-kernel functions
(#183153)" f78a233ac89dc0f9f0f26dfe051874013ae6e242 to use
"SuperReg.asMCReg()" instead of "MCRegister(SuperReg)", which leads to
"ambiguous call" when using the MSVC compiler.
Commit: b65a71d4942abcdf17510e1cf5c4e9273d60aa72
https://github.com/llvm/llvm-project/commit/b65a71d4942abcdf17510e1cf5c4e9273d60aa72
Author: Alexey Samsonov <vonosmas at gmail.com>
Date: 2026-05-27 (Wed, 27 May 2026)
Changed paths:
M libc/test/src/__support/threads/linux/raw_mutex_test.cpp
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
A utils/bazel/llvm-project-overlay/libc/test/src/__support/threads/BUILD.bazel
Log Message:
-----------
[libc][bazel] Add rules for __support/threads tests. (#199871)
* Add Bazel BUILD rules for three `__support/threads` unit tests.
* Fix/expand BUILD rules for the support libraries they depend on
(clock_gettime and vdso) that were previously incorrectly missing `.cpp`
files with implementations.
* Minor fix to use `internal::exit` in `raw_mutex_test` to avoid adding
a dependency on `exit` entrypoint, which doesn't yet exist in Bazel.
Assisted by: Gemini
Commit: dd2ce3d8b558daefbbc6eb2f2026e6055a291f06
https://github.com/llvm/llvm-project/commit/dd2ce3d8b558daefbbc6eb2f2026e6055a291f06
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-05-27 (Wed, 27 May 2026)
Changed paths:
M llvm/cmake/modules/AddLLVM.cmake
Log Message:
-----------
[LLVM] Add per-target runtime directory to rpath (#199755)
Summary:
This simply adds the LLVM_DEFAULT_TARGET_TRIPLE to the LLVM build's
rpath if present. This keeps things hermetic for the library (offload)
that depends on it.
The reason this is required is because `llvm-gpu-loader` calls
`DynamicLibrary` on the Offload runtime. However, in a shared library
build the actual call is in libLLVMSupport.so, which does not have this
RPath, so `dlopen` delegates to that which does not know how to find it.
The only options to fix this are to use `dlopen` directly in the loader,
or add the rpath to the LLVM binaries.
I think this makes sense for LLVM, because the target-specific directory
can contain LLVM related libraries.
Commit: 97b9c24cb9f2e46ce917bf2e5aea5d4511ae8298
https://github.com/llvm/llvm-project/commit/97b9c24cb9f2e46ce917bf2e5aea5d4511ae8298
Author: Paul Kirth <paulkirth at google.com>
Date: 2026-05-27 (Wed, 27 May 2026)
Changed paths:
M libcxx/include/__functional/function.h
A libcxx/test/libcxx/utilities/function.objects/block.func.compile.pass.cpp
Log Message:
-----------
Add missing annotations for Apple platforms (#198864)
These seemed to be missed in #193045.
Commit: c3fc506e29badb9ed4729432b25c62eb04ced1ca
https://github.com/llvm/llvm-project/commit/c3fc506e29badb9ed4729432b25c62eb04ced1ca
Author: Adel Ejjeh <adel.ejjeh at amd.com>
Date: 2026-05-27 (Wed, 27 May 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
Log Message:
-----------
[AMDGPU] Remove explicit PartialThreshold setting in loop unrolling (#198901)
Remove UP.PartialThreshold = UP.Threshold / 4 from AMDGPU TTI, restoring
the default PartialThreshold of 150.
This was introduced in #194924 to limit code-size growth from runtime
unrolling, but PartialThreshold also gates compile-time partial
unrolling of constant-trip-count loops. This change will make the
PartialThreshold back to the default value for both compile-time partial
unrolling and runtime partial unrolling.
Benchmarked across CK, llama.cpp, and xpu-perf — no performance impact
from restoring the default.
Fixes #196372, replaces #196818.
Assisted-by: Claude Code
Commit: a3acd8083c3b5a98e8c5bb0d7f7ac4a959c58307
https://github.com/llvm/llvm-project/commit/a3acd8083c3b5a98e8c5bb0d7f7ac4a959c58307
Author: Nishant Patel <nishant.b.patel at intel.com>
Date: 2026-05-27 (Wed, 27 May 2026)
Changed paths:
M mlir/include/mlir/Dialect/XeGPU/Transforms/XeGPULayoutImpl.h
M mlir/lib/Dialect/XeGPU/Transforms/XeGPULayoutImpl.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUPropagateLayout.cpp
M mlir/test/Dialect/XeGPU/propagate-layout-subgroup.mlir
M mlir/test/Dialect/XeGPU/propagate-layout.mlir
Log Message:
-----------
[MLIR][XeGPU] Propagate layout onto loop-carried iter_arg entry edges (#198862)
as per title
Commit: 358f5e770361c0512b7f6e4027a3a674bb1fa654
https://github.com/llvm/llvm-project/commit/358f5e770361c0512b7f6e4027a3a674bb1fa654
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-05-27 (Wed, 27 May 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoP.td
Log Message:
-----------
[RISCV][P-ext] Add missing let Inst{31} = 0b0 to RVPPairShift_rr. (#199885)
This bit was accidentally left unset. I think this means we might have
treated this bit as a don't care for the disassembler could disassemble
some invalid encodings to these instructions. I didn't check the opcode
map closely enough to confirm this.
Commit: 38555dbd81ad2dcfc452d29151299d829095258b
https://github.com/llvm/llvm-project/commit/38555dbd81ad2dcfc452d29151299d829095258b
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-05-27 (Wed, 27 May 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoP.td
Log Message:
-----------
[RISCV][P-ext] Replace some custom isel code with tablegen patterns. NFC (#199881)
Commit: 95f08b1b743d2d5b694c71b00becd3acd0c7926a
https://github.com/llvm/llvm-project/commit/95f08b1b743d2d5b694c71b00becd3acd0c7926a
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-05-27 (Wed, 27 May 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoP.td
Log Message:
-----------
[RISCV][P-ext] Make the direction argument for RVPPairShift* classes required. NFC (#199799)
It's part of the encoding. I don't think we should have a preference for
one of the bit values being the default.
Commit: 3768e13298071781807b5d1371ebd8052d948b89
https://github.com/llvm/llvm-project/commit/3768e13298071781807b5d1371ebd8052d948b89
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-05-27 (Wed, 27 May 2026)
Changed paths:
M llvm/test/CodeGen/X86/vector-shuffle-combining-avx512vbmi2.ll
Log Message:
-----------
[X86] Add test coverage for #145276 (#200004)
Commit: ea3cb0fef9703c41a321a06a666636d871a670f6
https://github.com/llvm/llvm-project/commit/ea3cb0fef9703c41a321a06a666636d871a670f6
Author: Scott Linder <scott.linder at amd.com>
Date: 2026-05-27 (Wed, 27 May 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIFrameLowering.cpp
Log Message:
-----------
Fix for noassert buildbot break in #183153 (#199781)
Change-Id: I285adf09ac2df239d0ab05459f7388b6970247ad
Commit: db9b595ae3b30d67bd4068f80c651f97eb4dea2d
https://github.com/llvm/llvm-project/commit/db9b595ae3b30d67bd4068f80c651f97eb4dea2d
Author: Feng Zou <feng.zou at intel.com>
Date: 2026-05-27 (Wed, 27 May 2026)
Changed paths:
M llvm/include/llvm/DebugInfo/CodeView/CodeViewRegisters.def
M llvm/lib/Target/X86/MCTargetDesc/X86MCTargetDesc.cpp
A llvm/test/DebugInfo/COFF/apx-egpr.ll
Log Message:
-----------
[X86][APX] Add CodeView register IDs and mapping for APX EGPR (#199586)
Resolves #187924
Refer to
https://devblogs.microsoft.com/cppblog/msvc-version-1451-available/
Commit: 2713d9441cfd5fc9e4ad9cf5520add6ae6cce6c4
https://github.com/llvm/llvm-project/commit/2713d9441cfd5fc9e4ad9cf5520add6ae6cce6c4
Author: vporpo <vasileios.porpodas at amd.com>
Date: 2026-05-27 (Wed, 27 May 2026)
Changed paths:
M llvm/docs/SandboxIR.md
M llvm/include/llvm/SandboxIR/Context.h
M llvm/include/llvm/SandboxIR/Tracker.h
M llvm/lib/SandboxIR/Tracker.cpp
M llvm/unittests/SandboxIR/TrackerTest.cpp
Log Message:
-----------
Reapply "[SandboxIR][Tracker] Implement accept(/*AcceptAll*/) and revert(/*RevertAll*/)" (#199776) (#199805)
This reverts commit a7aceff0b1e552cbc2306e575e9ac649853fda8e.
Commit: e1e52c9ccef39f4ccc55e1e89c5d2957ec186a47
https://github.com/llvm/llvm-project/commit/e1e52c9ccef39f4ccc55e1e89c5d2957ec186a47
Author: Daniel Paoliello <danpao at microsoft.com>
Date: 2026-05-27 (Wed, 27 May 2026)
Changed paths:
M llvm/include/llvm/Support/Win64EH.h
M llvm/lib/Support/CMakeLists.txt
A llvm/lib/Support/Win64EH.cpp
A llvm/test/tools/llvm-objdump/COFF/win64-unwindv3-all-wods.yaml
A llvm/test/tools/llvm-objdump/COFF/win64-unwindv3-apx.yaml
A llvm/test/tools/llvm-objdump/COFF/win64-unwindv3-bad-inherit.yaml
A llvm/test/tools/llvm-objdump/COFF/win64-unwindv3-bad-opcode.yaml
A llvm/test/tools/llvm-objdump/COFF/win64-unwindv3-bad-push-consecutive-2.yaml
A llvm/test/tools/llvm-objdump/COFF/win64-unwindv3-basic.yaml
A llvm/test/tools/llvm-objdump/COFF/win64-unwindv3-chain.yaml
A llvm/test/tools/llvm-objdump/COFF/win64-unwindv3-distinct-epilog.yaml
A llvm/test/tools/llvm-objdump/COFF/win64-unwindv3-epilog-flags.yaml
A llvm/test/tools/llvm-objdump/COFF/win64-unwindv3-epilog-large.yaml
A llvm/test/tools/llvm-objdump/COFF/win64-unwindv3-epilog.yaml
A llvm/test/tools/llvm-objdump/COFF/win64-unwindv3-handler-odd-payload.yaml
A llvm/test/tools/llvm-objdump/COFF/win64-unwindv3-handler.yaml
A llvm/test/tools/llvm-objdump/COFF/win64-unwindv3-large.yaml
A llvm/test/tools/llvm-objdump/COFF/win64-unwindv3-multi-epilog.yaml
A llvm/test/tools/llvm-objdump/COFF/win64-unwindv3-neg-offset.yaml
A llvm/test/tools/llvm-objdump/COFF/win64-unwindv3-pool-overflow.yaml
A llvm/test/tools/llvm-objdump/COFF/win64-unwindv3-reloc.yaml
A llvm/test/tools/llvm-readobj/COFF/unwind-x86_64-v3-all-wods.yaml
A llvm/test/tools/llvm-readobj/COFF/unwind-x86_64-v3-apx.yaml
A llvm/test/tools/llvm-readobj/COFF/unwind-x86_64-v3-bad-inherit.yaml
A llvm/test/tools/llvm-readobj/COFF/unwind-x86_64-v3-bad-opcode.yaml
A llvm/test/tools/llvm-readobj/COFF/unwind-x86_64-v3-basic.yaml
A llvm/test/tools/llvm-readobj/COFF/unwind-x86_64-v3-chain.yaml
A llvm/test/tools/llvm-readobj/COFF/unwind-x86_64-v3-distinct-epilog.yaml
A llvm/test/tools/llvm-readobj/COFF/unwind-x86_64-v3-epilog-flags.yaml
A llvm/test/tools/llvm-readobj/COFF/unwind-x86_64-v3-epilog.yaml
A llvm/test/tools/llvm-readobj/COFF/unwind-x86_64-v3-handler.yaml
A llvm/test/tools/llvm-readobj/COFF/unwind-x86_64-v3-multi-epilog.yaml
A llvm/test/tools/llvm-readobj/COFF/unwind-x86_64-v3-neg-offset.yaml
A llvm/test/tools/llvm-readobj/COFF/unwind-x86_64-v3-pool-overflow.yaml
A llvm/test/tools/llvm-readobj/COFF/unwind-x86_64-v3-reloc.yaml
M llvm/tools/llvm-objdump/COFFDump.cpp
M llvm/tools/llvm-objdump/ObjdumpOpts.td
M llvm/tools/llvm-objdump/llvm-objdump.cpp
M llvm/tools/llvm-objdump/llvm-objdump.h
M llvm/tools/llvm-readobj/Opts.td
M llvm/tools/llvm-readobj/Win64EHDumper.cpp
M llvm/tools/llvm-readobj/Win64EHDumper.h
M llvm/tools/llvm-readobj/llvm-readobj.cpp
M llvm/tools/llvm-readobj/llvm-readobj.h
Log Message:
-----------
[win][x64] Updated `llvm-objdump` and `llvm-readobj` to be able to dump Windows x64 Unwind v3 information. (#199120)
Public docs:
<https://learn.microsoft.com/en-us/cpp/build/x64-unwind-information-v3?view=msvc-170>
The change adds Windows x64 unwind v3 info decoding and printing support
in LLVM, including new data structures, enums, and decoding functions to
handle the different WOD opcodes and epilog descriptors. It also updates
the dumping utilities (llvm-readobj and llvm-objdump) to correctly
interpret v3 unwind info.
Commit: 860e4b803e91595063a7b438f91e45792cf010cf
https://github.com/llvm/llvm-project/commit/860e4b803e91595063a7b438f91e45792cf010cf
Author: Justin Lebar <justin.lebar at gmail.com>
Date: 2026-05-27 (Wed, 27 May 2026)
Changed paths:
M llvm/lib/Target/X86/X86AvoidStoreForwardingBlocks.cpp
M llvm/test/CodeGen/X86/avoid-sfb.ll
Log Message:
-----------
[X86][AvoidStoreForwardingBlocks] Skip volatile/atomic accesses. (#199698)
The pass splits an XMM/YMM load+store pair into smaller copies when a
preceding narrower store would block store-to-load forwarding into the
load, but it didn't check the MachineMemOperand's isVolatile/isAtomic
bits.
This bug was found by a large run of Opus 4.7 looking for bugs in LLVM.
Commit: 7b993d207fee1e2160cbd20469f3cce73f27fce9
https://github.com/llvm/llvm-project/commit/7b993d207fee1e2160cbd20469f3cce73f27fce9
Author: Justin Lebar <justin.lebar at gmail.com>
Date: 2026-05-27 (Wed, 27 May 2026)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
M llvm/test/Transforms/InstCombine/ldexp.ll
Log Message:
-----------
[InstCombine] Use sadd.sat for chained ldexp fold (#199274)
ldexp(ldexp(x, a), b) -> ldexp(x, a + b) didn't consider the fact that
`a + b` may overflow! Use a saturating add instead.
This bug was found by a large run of Opus 4.7 looking for bugs in LLVM.
Commit: d98fd416e0ee358d0748b743f29d68f114dcfebc
https://github.com/llvm/llvm-project/commit/d98fd416e0ee358d0748b743f29d68f114dcfebc
Author: Justin Lebar <justin.lebar at gmail.com>
Date: 2026-05-27 (Wed, 27 May 2026)
Changed paths:
M llvm/lib/CodeGen/ExpandIRInsts.cpp
A llvm/test/Transforms/ExpandIRInsts/X86/expand-large-fp-convert-fpto-sat-vector.ll
Log Message:
-----------
[ExpandIRInsts] Support llvm.fpto{u,s}i.sat (#199174)
Previously, running ExpandIRInsts on a program which needs to expand a
vector fptoui.sat would hit llvm_unreachable, because the `scalarize`
function didn't handle this intrinsic.
This bug was found by a large run of Opus 4.7 looking for bugs in LLVM.
Commit: 00b13536e3dad6c0d5e3bd54f49791c2a06707cc
https://github.com/llvm/llvm-project/commit/00b13536e3dad6c0d5e3bd54f49791c2a06707cc
Author: Sunil Shrestha <sunil.shrestha at hpe.com>
Date: 2026-05-27 (Wed, 27 May 2026)
Changed paths:
M flang/include/flang/Lower/ConvertVariable.h
M flang/include/flang/Lower/Support/PrivateReductionUtils.h
M flang/lib/Lower/ConvertVariable.cpp
M flang/lib/Lower/OpenMP/ClauseProcessor.cpp
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Lower/Support/PrivateReductionUtils.cpp
M flang/test/Lower/OpenMP/Todo/omp-declare-reduction-advanced-types.f90
M flang/test/Lower/OpenMP/Todo/reduction-character-dynamic-length.f90
A flang/test/Lower/OpenMP/declare-reduction-no-initializer-derived.f90
A flang/test/Lower/OpenMP/declare-reduction-no-initializer-intrinsic.f90
A flang/test/Lower/OpenMP/declare-reduction-no-initializer-target-derived.f90
A flang/test/Lower/OpenMP/declare-reduction-no-initializer-unsupported.f90
A flang/test/Lower/OpenMP/declare-reduction-target-intrinsic.f90
Log Message:
-----------
[Flang][OpenMP] Support declare reduction without initializer (#196211)
For declare reduction without an explicit initializer clause, the init
callback now handles initialization inline rather than relying on the
_FortranAInitialize runtime call, which is available on the device
runtime but has known issues on GPU targets.
The initialization logic first checks whether an initializer clause is
present. If one is provided, it is used directly. Otherwise, for derived
types, the code checks whether the type has default component
initialization. If it does, each component is initialized inline:
components with explicit default values use those values, components
that are themselves derived types with defaults are recursively
initialized, and components without any default are zero-initialized.
Derived types with allocatable components that require runtime
initialization are guarded by a TODO.
Assisted by: Claude Opus 4.6
Commit: a1cba5a2f8e973fbdf20e20079fab0ce924b7ece
https://github.com/llvm/llvm-project/commit/a1cba5a2f8e973fbdf20e20079fab0ce924b7ece
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2026-05-27 (Wed, 27 May 2026)
Changed paths:
M flang/include/flang/Semantics/openmp-utils.h
M flang/lib/Semantics/check-omp-loop.cpp
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/openmp-utils.cpp
Log Message:
-----------
[flang][OpenMP] Optionally get final symbol in Get(Argument|Object)Sy… (#196816)
…mbol
Originally these functions returned the ultimate symbol for the one
obtained from the argument or object. However, this may be somewhat
unintuitive/unexpected, so instead return the original symbol, and add a
flag to optionally return the ultimate one.
Commit: 077210a3b1a50ef7145d405b08d676e8879d0d51
https://github.com/llvm/llvm-project/commit/077210a3b1a50ef7145d405b08d676e8879d0d51
Author: Arthur Eubanks <aeubanks at google.com>
Date: 2026-05-27 (Wed, 27 May 2026)
Changed paths:
M llvm/utils/gn/secondary/compiler-rt/lib/builtins/BUILD.gn
M llvm/utils/gn/secondary/libcxx/include/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/Transforms/Utils/BUILD.gn
Log Message:
-----------
[gn build] Port commits (#200011)
0d6aac78ad96
7938535a54b5
ed11d7a52a50
Commit: 7a1a5421b1a1c32944906c3e7157b809528859e3
https://github.com/llvm/llvm-project/commit/7a1a5421b1a1c32944906c3e7157b809528859e3
Author: Tom Stellard <tstellar at redhat.com>
Date: 2026-05-27 (Wed, 27 May 2026)
Changed paths:
M .github/workflows/release-documentation.yml
Log Message:
-----------
workflows/release-documentation: Validate input and remove template expansion (#199760)
https://github.com/llvm/llvm-project/security/code-scanning/1715
https://github.com/llvm/llvm-project/security/code-scanning/1716
https://github.com/llvm/llvm-project/security/code-scanning/1717
https://github.com/llvm/llvm-project/security/code-scanning/1718
https://github.com/llvm/llvm-project/security/code-scanning/1719
https://github.com/llvm/llvm-project/security/code-scanning/1720
https://github.com/llvm/llvm-project/security/code-scanning/1721
https://github.com/llvm/llvm-project/security/code-scanning/1722
Commit: f6af6cedfd2fa731bf323608116d373379838b9a
https://github.com/llvm/llvm-project/commit/f6af6cedfd2fa731bf323608116d373379838b9a
Author: Tom Stellard <tstellar at redhat.com>
Date: 2026-05-27 (Wed, 27 May 2026)
Changed paths:
M .github/workflows/libclang-abi-tests.yml
Log Message:
-----------
workflows/libclang-abi-tests: Remove template expansion (#199792)
https://github.com/llvm/llvm-project/security/code-scanning/1627
https://github.com/llvm/llvm-project/security/code-scanning/1628
https://github.com/llvm/llvm-project/security/code-scanning/1629
https://github.com/llvm/llvm-project/security/code-scanning/1630
https://github.com/llvm/llvm-project/security/code-scanning/1631
https://github.com/llvm/llvm-project/security/code-scanning/1632
https://github.com/llvm/llvm-project/security/code-scanning/1633
https://github.com/llvm/llvm-project/security/code-scanning/1634
https://github.com/llvm/llvm-project/security/code-scanning/1635
https://github.com/llvm/llvm-project/security/code-scanning/1636
https://github.com/llvm/llvm-project/security/code-scanning/1637
https://github.com/llvm/llvm-project/security/code-scanning/1638
Commit: 82755077b73980eb56efb44246190135d2feb935
https://github.com/llvm/llvm-project/commit/82755077b73980eb56efb44246190135d2feb935
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-05-27 (Wed, 27 May 2026)
Changed paths:
M llvm/utils/profcheck-xfail.txt
Log Message:
-----------
[ProfCheck] Fix #199174 (#200013)
The patch added another large fp conversion test, which we currently are
missing some profile annotations for, so add it to the xfail list for
now.
Commit: ed918c1496d56f5124c20a2f4f450ba439aeb68e
https://github.com/llvm/llvm-project/commit/ed918c1496d56f5124c20a2f4f450ba439aeb68e
Author: Justin Lebar <justin.lebar at gmail.com>
Date: 2026-05-27 (Wed, 27 May 2026)
Changed paths:
M llvm/lib/CodeGen/AtomicExpandPass.cpp
A llvm/test/Transforms/AtomicExpand/RISCV/atomicrmw-widen-volatile.ll
Log Message:
-----------
[AtomicExpand] Preserve volatile in widenPartwordAtomicRMW. (#199722)
widenPartwordAtomicRMW widens a sub-word atomicrmw to the target's
minimum cmpxchg size by calling CreateAtomicRMW, which has no
IsVolatile parameter, and didn't copy isVolatile() from the original.
Every other expansion path in this file already does. Affects targets
whose MinCmpXchgSizeInBits exceeds the value width (RISC-V without
Zabha, LoongArch base, SPARC, AMDGPU, etc.).
This bug was found by a large run of Opus 4.7 looking for bugs in LLVM.
Commit: 5b38edd3723a790b02d0d43b6f499c99b313a946
https://github.com/llvm/llvm-project/commit/5b38edd3723a790b02d0d43b6f499c99b313a946
Author: Tom Stellard <tstellar at redhat.com>
Date: 2026-05-27 (Wed, 27 May 2026)
Changed paths:
M .github/workflows/pr-code-lint.yml
Log Message:
-----------
workflows/pr-code-lint: Pin container image (#199767)
https://github.com/llvm/llvm-project/security/code-scanning/1678
Commit: a8e1f5c475abb48ade1059bc42591a84da56d25b
https://github.com/llvm/llvm-project/commit/a8e1f5c475abb48ade1059bc42591a84da56d25b
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2026-05-27 (Wed, 27 May 2026)
Changed paths:
M flang-rt/cmake/modules/AddFlangRTOffload.cmake
M flang-rt/include/flang-rt/runtime/io-stmt.h
M flang-rt/lib/runtime/CMakeLists.txt
M flang-rt/lib/runtime/io-api-common.h
A flang-rt/lib/runtime/io-stmt-minimal.cpp
Log Message:
-----------
[flang-rt][cuda] Use a thinner I/O in CUDA build (#199769)
Reduce the footprint of IO in the CUDA build. This helps including IO
when using non relocatable device code mode.
Commit: f16c0ecf2a0bc2fa9253bb73d54a8d791037d741
https://github.com/llvm/llvm-project/commit/f16c0ecf2a0bc2fa9253bb73d54a8d791037d741
Author: Tom Stellard <tstellar at redhat.com>
Date: 2026-05-27 (Wed, 27 May 2026)
Changed paths:
M .github/workflows/issue-release-workflow.yml
Log Message:
-----------
workflows/issue-release-workflow: Remove template expansion of login names (#199772)
https://github.com/llvm/llvm-project/security/code-scanning/1609
https://github.com/llvm/llvm-project/security/code-scanning/1610
Commit: 5dc633bc765a6c5a4049b827f8fc0d43d1eff51a
https://github.com/llvm/llvm-project/commit/5dc633bc765a6c5a4049b827f8fc0d43d1eff51a
Author: David Green <david.green at arm.com>
Date: 2026-05-27 (Wed, 27 May 2026)
Changed paths:
M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
M llvm/test/CodeGen/AArch64/bf16-instructions.ll
M llvm/test/CodeGen/AArch64/bf16-v4-instructions.ll
M llvm/test/CodeGen/AArch64/bf16-v8-instructions.ll
M llvm/test/CodeGen/AArch64/fabs.ll
M llvm/test/CodeGen/AArch64/fneg.ll
Log Message:
-----------
[AArch64][GlobalISel] Add BF16 fabs and fneg (#198655)
These should be very simple as they are just legal or expanded based on
whether fullfp16 is available, as the FP16 FNEG and FABS instructions can
be used equally for BF16.
Commit: f8bf8af12c810434ca1d947aeb9bcae99bbbf135
https://github.com/llvm/llvm-project/commit/f8bf8af12c810434ca1d947aeb9bcae99bbbf135
Author: Brendan Dahl <brendan.dahl at gmail.com>
Date: 2026-05-27 (Wed, 27 May 2026)
Changed paths:
M clang/lib/Headers/wasm_simd128.h
M cross-project-tests/intrinsic-header-tests/wasm_simd128.c
Log Message:
-----------
[WebAssembly] Add f16x8.demote_f32x4_zero to wasm_simd128.h. (#199795)
Missing header intrinsic.
Commit: d6279249920562e28cdd1fe4058451fb1d909241
https://github.com/llvm/llvm-project/commit/d6279249920562e28cdd1fe4058451fb1d909241
Author: fzi-haxel <61409998+fzi-haxel at users.noreply.github.com>
Date: 2026-05-27 (Wed, 27 May 2026)
Changed paths:
M mlir/lib/Analysis/SliceAnalysis.cpp
M mlir/test/Dialect/Affine/slicing-utils.mlir
Log Message:
-----------
[mlir][SliceAnalysis] Fix visited set to avoid infinite recursion (#200008)
Fixes #139694, which introduced use-def cycle detection during slice
analysis, but some cycles were still not detected, potentially leading
to infinite recursion.
This PR fixes the handling of the visited set, which tracks the current
DFS path during recursion. Previously, the set could fail to detect
double cycles because entries were erased even when no recursive call
was made. The insert/erase operations are now only performed when
recursion actually occurs, ensuring that cycle detection correctly
reflects the active DFS path.
Commit: 3a8b5e3bb1ae8f1d7f579b6ace900f1af596d48f
https://github.com/llvm/llvm-project/commit/3a8b5e3bb1ae8f1d7f579b6ace900f1af596d48f
Author: Ebuka Ezike <e_ezike at apple.com>
Date: 2026-05-27 (Wed, 27 May 2026)
Changed paths:
M lldb/tools/lldb-dap/DAP.cpp
M lldb/tools/lldb-dap/OutputRedirector.cpp
M lldb/tools/lldb-dap/OutputRedirector.h
Log Message:
-----------
[lldb-dap] Use MainLoop instead of a background thread in OutputRedirector. (#199970)
Replace the background thread in OutputRedirector with LLDB's MainLoop
event loop. This reduces the number of threads created and ensures file
descriptors are properly closed when no longer needed.
Since debugger's output is not I/O intensive, there is no risk of
hitting the pipe buffer limit with this approach.
Commit: 0d8ba697df747b2aa0df3abbf11ec54e6c61e1b5
https://github.com/llvm/llvm-project/commit/0d8ba697df747b2aa0df3abbf11ec54e6c61e1b5
Author: Keith Smiley <keithbsmiley at gmail.com>
Date: 2026-05-27 (Wed, 27 May 2026)
Changed paths:
M utils/bazel/.bazelrc
M utils/bazel/MODULE.bazel
M utils/bazel/MODULE.bazel.lock
Log Message:
-----------
[bazel] Add config for hermetic clang toolchain (#192528)
This config uses the https://github.com/hermeticbuild/hermetic-llvm
toolchain to avoid any dependency on the host compiler. This makes it
trivial to test with remote execution and also supports cross
compilation.
Commit: a3d935402420d0ec1f91a37a8fc85bf4ea166f74
https://github.com/llvm/llvm-project/commit/a3d935402420d0ec1f91a37a8fc85bf4ea166f74
Author: Justin Lebar <justin.lebar at gmail.com>
Date: 2026-05-27 (Wed, 27 May 2026)
Changed paths:
M llvm/include/llvm/CodeGen/MachineMemOperand.h
A llvm/test/CodeGen/X86/branchfolding-atomic-mmo.ll
Log Message:
-----------
[CodeGen] Compare MMO atomic ordering and syncscope. (#199892)
MachineMemOperand::operator== compared the address, flags, AA metadata,
range, alignment, and address space, but not atomic success ordering,
failure ordering, or syncscope. Users such as
MachineInstr::cloneMergedMemRefs could therefore treat atomic and
non-atomic MMOs, or atomics with different syncscopes, as identical.
This bug was found by a large run of Opus 4.7 looking for bugs in LLVM.
Commit: f828c0e39fca240c3599089afdafa1cab47eadbb
https://github.com/llvm/llvm-project/commit/f828c0e39fca240c3599089afdafa1cab47eadbb
Author: adams381 <adams at nvidia.com>
Date: 2026-05-27 (Wed, 27 May 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenFunction.cpp
Log Message:
-----------
[CIR] Report NYI for STDC FENV_ACCESS under -fclangir
Functions that enable IEEE floating-point intrinsics via `#pragma STDC
FENV_ACCESS ON` or `__attribute__((strict_fp))` set `UsesFPIntrin()` /
`StrictFPAttr` on the `FunctionDecl`. CIR doesn't support the
FP-constrained dialect ops needed to lower such functions correctly, so
`generateCode` now reports `errorNYI` and returns early when either flag
is set, preventing silent miscompilation.
---------
Co-authored-by: Claude Sonnet 4.6 <noreply at anthropic.com>
Commit: c8efcf55ee47bb04e4539a802e656be89f08099f
https://github.com/llvm/llvm-project/commit/c8efcf55ee47bb04e4539a802e656be89f08099f
Author: Vir Patel <142122453+virsworld at users.noreply.github.com>
Date: 2026-05-27 (Wed, 27 May 2026)
Changed paths:
M flang/include/flang/Common/Fortran-consts.h
M flang/include/flang/Support/Fortran.h
M flang/lib/Evaluate/formatting.cpp
M flang/lib/Semantics/expression.cpp
M flang/lib/Semantics/type.cpp
M flang/lib/Support/Fortran.cpp
A flang/test/Semantics/PowerPC/ppc-vector-diagnostics.f90
Log Message:
-----------
[flang][PPC] Improve vector type names in expression diagnostics (NFC) (#199383)
Continuation of #197821
The change only affects vector types; all other types preserve their
existing formatting behavior.
Co-authored-by: virsworld <virpatel at mac.home>
Commit: 8f03570e7d047bb83c77421360b831f366e7dcea
https://github.com/llvm/llvm-project/commit/8f03570e7d047bb83c77421360b831f366e7dcea
Author: carlobertolli <carlo.bertolli at amd.com>
Date: 2026-05-27 (Wed, 27 May 2026)
Changed paths:
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.add.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.xor.ll
Log Message:
-----------
[AMDGPU] Add regression test for wave.reduce constant folding. (#198673)
Ensure wave.reduce.xor, wave.reduce.add, and wave.reduce.sub with
constant operands are not folded to the input value, since their results
depend on the number of active lanes at runtime.
Assisted-by: Cursor (Claude)
Commit: 34d5523eaa8f72c3eb56137ac13789d70640a49c
https://github.com/llvm/llvm-project/commit/34d5523eaa8f72c3eb56137ac13789d70640a49c
Author: Justin Bogner <mail at justinbogner.com>
Date: 2026-05-27 (Wed, 27 May 2026)
Changed paths:
M clang/test/Driver/msvc-link.c
Log Message:
-----------
[Driver][MSVC] Loosen regex for binary name in test (#200015)
`lld-link` will often be installed as `lld-link.exe` on windows. We need
to make sure this test passes either way.
Commit: 6c9225f1d1e2b0b49ac3a53913be7ccda9c6243b
https://github.com/llvm/llvm-project/commit/6c9225f1d1e2b0b49ac3a53913be7ccda9c6243b
Author: Ben Langmuir <blangmuir at apple.com>
Date: 2026-05-27 (Wed, 27 May 2026)
Changed paths:
M clang/include/clang/Basic/FileManager.h
M clang/lib/Basic/FileManager.cpp
M clang/lib/Lex/HeaderSearch.cpp
M clang/lib/Lex/ModuleMap.cpp
M clang/lib/Lex/PPDirectives.cpp
M clang/unittests/Basic/FileManagerTest.cpp
Log Message:
-----------
Reapply "[clang] Use FileError in FileManager::getFileRef, getDirectoryRef" (#199759)
Most callers are unchanged, since they either ignore the specific error
or have their own formatting of the error that includes both the path
and the errorToErrorCode-unwrapped value. However, for clients that just
forward the error it's helpful to ensure we do not lose track of the
filename that the error is associated with, so use FileError.
To reduce the overhead of using FileError, keep it only in the public
getFileRef and getDirectoryRef themselves, and use ErrorOr in the
implementation. For callers of getOptional* this should avoid
allocations for errors entirely, and for callers of getFileRef and
getDirectoryRef it makes the error allocation inlinable, which may (in
theory, not tested) let us optimize it away if the Error is immediately
unwrapped back to an error code, for example.
Incidentally clean up some callers to use getOptionalFileRef where they
throw away the error immediately.
Commit: 2b3bc03b5ef00e7eaa245420ca981c700e1c05c4
https://github.com/llvm/llvm-project/commit/2b3bc03b5ef00e7eaa245420ca981c700e1c05c4
Author: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
Date: 2026-05-27 (Wed, 27 May 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCCodeEmitter.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
M llvm/test/CodeGen/AMDGPU/arbitrary-fp-to-float.ll
M llvm/test/CodeGen/AMDGPU/br_cc.f16.ll
M llvm/test/CodeGen/AMDGPU/call-argument-types.ll
M llvm/test/CodeGen/AMDGPU/commute-compares-scalar-float.ll
M llvm/test/CodeGen/AMDGPU/dagcombine-fmul-sel.ll
M llvm/test/CodeGen/AMDGPU/extract-subvector-16bit.ll
M llvm/test/CodeGen/AMDGPU/fcanonicalize.bf16.ll
M llvm/test/CodeGen/AMDGPU/fcanonicalize.f16.ll
M llvm/test/CodeGen/AMDGPU/fmed3.bf16.ll
M llvm/test/CodeGen/AMDGPU/fmul-to-ldexp.ll
M llvm/test/CodeGen/AMDGPU/gfx-callable-argument-types.ll
M llvm/test/CodeGen/AMDGPU/imm16.ll
M llvm/test/CodeGen/AMDGPU/immv216.ll
M llvm/test/CodeGen/AMDGPU/llvm.fptrunc.round.ll
M llvm/test/CodeGen/AMDGPU/llvm.round.ll
M llvm/test/CodeGen/AMDGPU/lround.ll
M llvm/test/CodeGen/AMDGPU/mad-mix-hi.ll
M llvm/test/CodeGen/AMDGPU/select-fabs-fneg-extract.f16.ll
M llvm/test/CodeGen/AMDGPU/select-fabs-fneg-extract.v2f16.ll
M llvm/test/CodeGen/AMDGPU/select.f16.ll
M llvm/test/CodeGen/AMDGPU/shrink-add-sub-constant.ll
M llvm/test/CodeGen/AMDGPU/true16-imm-folded-to-0-regression.ll
M llvm/test/MC/AMDGPU/gfx1150_asm_salu_float.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp8.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_from_vopc.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopc.s
M llvm/test/MC/AMDGPU/gfx12_asm_sopc.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop1-fake16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop1.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3c.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopc.s
M llvm/test/MC/AMDGPU/gfx13_asm_sopc.s
M llvm/test/MC/AMDGPU/gfx13_asm_vop1.s
M llvm/test/MC/AMDGPU/gfx13_asm_vop1_t16_promote.s
M llvm/test/MC/AMDGPU/gfx13_asm_vop3-fake16.s
M llvm/test/MC/AMDGPU/gfx13_asm_vop3.s
M llvm/test/MC/AMDGPU/gfx13_asm_vop3_from_vop1-fake16.s
M llvm/test/MC/AMDGPU/gfx13_asm_vop3_from_vop1.s
M llvm/test/MC/AMDGPU/literals.s
M llvm/test/MC/AMDGPU/vop3-gfx10.s
M llvm/test/MC/Disassembler/AMDGPU/gfx10_vop1.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx10_vop3.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx10_vop3c.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx10_vop3cx.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx10_vopc.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx10_vopcx.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx1150_dasm_salu_float.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop1.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_from_vop1.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_from_vopc.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_from_vopcx.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vopc.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vopcx.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop3.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop3_from_vop1.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop3cx.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_sopc.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3_from_vop1.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3c.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3cx.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3cx_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vopc.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vopcx.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx8_vop1.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx8_vop2.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx8_vop3.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx8_vop3c.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx8_vop3cx.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx8_vopc.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx8_vopcx.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx9_vop1.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx9_vop2.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx9_vop3.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx9_vop3c.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx9_vop3cx.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx9_vopc.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx9_vopcx.txt
Log Message:
-----------
[AMDGPU] Use shorter form for i16 operands (#198005)
For 16-bit operands an inline constant is zero extended
which in particular allows to use FP constants. These
will have 16 bits of zeroes in the high half and FP16
value in the low 16 bits.
The patch changes semantics of the FP literal argument
used in i16 context in the asm parser to fp16.
Commit: 0e84bfa79f1121b65609013175c6515159e3cdec
https://github.com/llvm/llvm-project/commit/0e84bfa79f1121b65609013175c6515159e3cdec
Author: Erich Keane <ekeane at nvidia.com>
Date: 2026-05-27 (Wed, 27 May 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenStmt.cpp
M clang/lib/CIR/Dialect/Transforms/FlattenCFG.cpp
A clang/test/CIR/CodeGen/switch-pre-case-stmts.cpp
Log Message:
-----------
[CIR] Handle the 'before case' block of a switch statement. (#199752)
Before this patch, we would fail any time there was a block with
entry/exit (in this case, one with successors thanks to a label) with a
verification error. This patch adds special handling for that first
block.
This patch DOES choose to not trim them however. Unless there is a label
inside of the block, there isn't any way to get there, and it is dead
code. I've opted to NOT do that optimization, as I suspect that might be
valuable to future passes/something we may wish to warn about in some
sort of CFG analysis.
Additionally, there is some minor changes to FlattenCFG, first to make
sure we skip the switch ONLY if it is truly empty, and second to make
sure we transform any 'break' in the pre-case region.
Commit: 3d9d776b29c9d1b44ee4f87dd1311bbf85af1ca3
https://github.com/llvm/llvm-project/commit/3d9d776b29c9d1b44ee4f87dd1311bbf85af1ca3
Author: DeanSturtevant1 <dsturtevant at google.com>
Date: 2026-05-27 (Wed, 27 May 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
Log Message:
-----------
[bzl] Reduce the `deps` size of libc's shared_math_header library. (#200006)
There were ~500 of them, which can cause build analysis/metric issues.
Glob the private headers in use, retaining only the support libraries
that have source code.
Make it a cc_library instead of a libc_header_library. Rename it
"apfloat_shared_math_headers" to clarify its limited use case.
Commit: 8a55aca421d64db9f82bda2ae3330bdf2dc12cf0
https://github.com/llvm/llvm-project/commit/8a55aca421d64db9f82bda2ae3330bdf2dc12cf0
Author: vporpo <vasileios.porpodas at amd.com>
Date: 2026-05-27 (Wed, 27 May 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Passes/SeedCollection.cpp
A llvm/test/Transforms/SandboxVectorizer/seed_collection_loads.ll
Log Message:
-----------
[SandboxVec][SeedCollection] Iterate over all seeds (#195964)
Even though load seeds can already be collected by the seed collector,
the seed collection pass was not iterating over them. This patch fixes
this, we are now iterating over both store and load seeds.
Commit: aa1f119c6dcbf0b4404a88fcaeb34d9c5ca48fb5
https://github.com/llvm/llvm-project/commit/aa1f119c6dcbf0b4404a88fcaeb34d9c5ca48fb5
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2026-05-27 (Wed, 27 May 2026)
Changed paths:
M clang/test/lit.cfg.py
Log Message:
-----------
[clang][lit] Add option to skip clang-repl checks (#199255)
Whenever lit or llvm-lit is invoked to run clang tests, clang-repl is
run at least once to check for host jit capabilities, and possibly
several more times to probe related capabilities. This adds a noticeable
delay before testing starts, especially for debug builds.
This change adds a lit parameter (clang_skip_clang_repl_checks) and an
environment variable check (CLANG_LIT_SKIP_CLANG_REPL_CHECKS) to allow
the clang-repl probes to be skipped. When this option is used, any tests
that rely on jit execution will be reported as unsupported.
This option is intended only to allow quicker targeted testing during
development. It should not be used for comprehensive verification before
submitting a patch.
On my local test system, executing `ninja check-clang-cir-codegen` with
a previously completed debug build took 18 seconds to run 354 tests with
this option and 53 seconds without it. This is the sort of use case I am
targeting -- lit test runs when the clang-repl overhead will constitute
a significant portion of the total time to execute the tests.
Commit: d0676f53ed5b56a1f077fe8a4587ecb10e5400ee
https://github.com/llvm/llvm-project/commit/d0676f53ed5b56a1f077fe8a4587ecb10e5400ee
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2026-05-27 (Wed, 27 May 2026)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/include/clang/CIR/Dialect/Transforms/CIRTransformUtils.h
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
M clang/lib/CIR/Dialect/Transforms/CIRTransformUtils.cpp
M clang/lib/CIR/Dialect/Transforms/EHABILowering.cpp
M clang/lib/CIR/Dialect/Transforms/FlattenCFG.cpp
A clang/test/CIR/CodeGen/cleanup-throw-from-cleanup.cpp
M clang/test/CIR/CodeGen/try-catch.cpp
Log Message:
-----------
[CIR] Handle throwing an exception from a cleanup scope (#199121)
The CIR FlattenCFG pass had been ignoring any ThrowOp that occurred
inside a cleanup scope or try operation, which led to the thrown
exception not triggering local cleanups and bypassing local catch
handlers.
This change introduces a new CIR operation, TryThrowOp, which is
analagous to the existing TryCallOp. The TryThrowOp (as well as the
ThrowOp) will eventually be lowered to a function call, but which
function gets called is a target-dependent detail, so we need an
abstract operation before EHABI lowering.
The Flatten CFG pass replaces any ThrowOp inside a cleanup scope or try
operation with a TryThrowOp that has an unreachable normal destination
and unwinds to the appropriate cleanup or catch dispatch block.
Assisted-by: Cursor / claude-opus-4.7-thinking-xhigh
Commit: eeeb26f64efdbccd27a2a0fd094be8d98dc6c231
https://github.com/llvm/llvm-project/commit/eeeb26f64efdbccd27a2a0fd094be8d98dc6c231
Author: adams381 <adams at nvidia.com>
Date: 2026-05-27 (Wed, 27 May 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenModule.cpp
A clang/test/CIR/CodeGen/inline-extern-force-codegen.c
Log Message:
-----------
[CIR] Emit globals for declarations that force externally visible defs
CIRGenModule::emitGlobal reported NYI for forward declarations that
force an externally visible definition under C99 inline rules (inline
definition in the TU, then a later extern declaration). Classic
CodeGenModule already materializes these with GetOrCreateLLVMFunction;
wire the same path through getAddrOfFunction, including the AArch64
multiversion guard from OGCG.
This pattern shows up in SPEC CPU 2026 berkeley-abc `if.h` when
compiling `abcIf.c` for 729.abc_r / 829.abc_s (`If_CutCopy` at line
527).
Test: `inline-extern-force-codegen.c` with CIR, LLVM, and OGCG checks.
---------
Co-authored-by: Claude Sonnet 4.6 <noreply at anthropic.com>
Commit: 3a203a506691df098ae1020dfb14e411d25bec35
https://github.com/llvm/llvm-project/commit/3a203a506691df098ae1020dfb14e411d25bec35
Author: Yaxun (Sam) Liu <yaxun.liu at amd.com>
Date: 2026-05-27 (Wed, 27 May 2026)
Changed paths:
M clang/include/clang/AST/ASTContext.h
M clang/include/clang/AST/Decl.h
M clang/include/clang/Sema/SemaCUDA.h
M clang/lib/AST/Decl.cpp
M clang/lib/CodeGen/CGCXX.cpp
M clang/lib/CodeGen/CGVTables.cpp
M clang/lib/CodeGen/CodeGenModule.cpp
M clang/lib/CodeGen/CodeGenModule.h
M clang/lib/Sema/Sema.cpp
M clang/lib/Sema/SemaBase.cpp
M clang/lib/Sema/SemaCUDA.cpp
M clang/lib/Sema/SemaDecl.cpp
M clang/test/CodeGenCUDA/device-vtable.cu
A clang/test/CodeGenCUDA/implicit-hd-dtor-trap-stub-hip.hip
A clang/test/CodeGenCUDA/implicit-hd-explicit-inst-hip.hip
A clang/test/CodeGenCUDA/implicit-hd-overload-ambig-hip.hip
M clang/test/SemaCUDA/dtor.cu
A clang/test/SemaCUDA/implicit-hd-dtor-explicit-instantiation.cu
A clang/test/SemaCUDA/implicit-hd-explicit-inst-organic-caller.cu
A clang/test/SemaCUDA/implicit-hd-overload-ambig-organic-caller.cu
Log Message:
-----------
[CUDA][HIP] Defer device diagnostics in implicit H+D explicit instantiations (#197214)
When clang explicitly instantiates a class template, it must emit
device-side
bodies for the implicit `__host__ __device__` members so the vtable and
instantiation symbols resolve. Some of those members chain into
host-only
calls (for example libstdc++ destructors that eventually call ::operator
delete). If no device code actually uses the class, the user still sees
errors about calling a `__host__` function from device code, even though
they
wrote no device code that touches it. Overload ambiguity in the same
context
behaves the same way.
This patch defers device-side errors in implicit `__host__ __device__`
functions reached only via an explicit template instantiation. At the
end of
the translation unit, clang checks whether a real device caller exists.
If
one does, the deferred errors are surfaced with the usual call-stack
notes.
If not, the diagnostics are dropped and the function gets a trap body,
so the
vtable and instantiation symbols stay well-formed and the failure only
fires
if device code ever calls the function. This works without
-fgpu-defer-diag.
Commit: 57b485f07d94e1780ed83275a01ef1c450dcdbd1
https://github.com/llvm/llvm-project/commit/57b485f07d94e1780ed83275a01ef1c450dcdbd1
Author: Scott Linder <scott.linder at amd.com>
Date: 2026-05-27 (Wed, 27 May 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SILowerSGPRSpills.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/assert-align.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/call-outgoing-stack-args.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/localizer.ll
M llvm/test/CodeGen/AMDGPU/abi-attribute-hints-undefined-behavior.ll
M llvm/test/CodeGen/AMDGPU/amdgcn-call-whole-wave.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.128bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.160bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.16bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.192bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.224bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.256bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.288bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.320bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.32bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.352bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.384bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.448bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.48bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.576bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.640bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.64bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.704bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.768bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.832bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.896bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.960bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.96bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.ptr.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-pow-codegen.ll
M llvm/test/CodeGen/AMDGPU/attributor-flatscratchinit-undefined-behavior2.ll
M llvm/test/CodeGen/AMDGPU/bf16.ll
M llvm/test/CodeGen/AMDGPU/branch-relax-spill.ll
M llvm/test/CodeGen/AMDGPU/call-args-inreg-bfloat.ll
M llvm/test/CodeGen/AMDGPU/call-args-inreg-no-sgpr-for-csrspill.ll
M llvm/test/CodeGen/AMDGPU/call-args-inreg.ll
M llvm/test/CodeGen/AMDGPU/call-argument-types.ll
M llvm/test/CodeGen/AMDGPU/call-graph-register-usage.ll
M llvm/test/CodeGen/AMDGPU/call-preserved-registers.ll
M llvm/test/CodeGen/AMDGPU/call-skip.ll
M llvm/test/CodeGen/AMDGPU/callee-frame-setup.ll
M llvm/test/CodeGen/AMDGPU/callee-special-input-vgprs-packed.ll
M llvm/test/CodeGen/AMDGPU/callee-special-input-vgprs.ll
M llvm/test/CodeGen/AMDGPU/cc-entry.ll
M llvm/test/CodeGen/AMDGPU/cc-inreg-sgpr0-3-mismatch.ll
M llvm/test/CodeGen/AMDGPU/copysign-simplify-demanded-bits.ll
M llvm/test/CodeGen/AMDGPU/cross-block-use-is-not-abi-copy.ll
M llvm/test/CodeGen/AMDGPU/debug-frame.ll
M llvm/test/CodeGen/AMDGPU/dwarf-multi-register-use-crash.ll
M llvm/test/CodeGen/AMDGPU/dynamic-vgpr-reserve-stack-for-cwsr.ll
M llvm/test/CodeGen/AMDGPU/eliminate-frame-index-select.ll
M llvm/test/CodeGen/AMDGPU/fix-frame-reg-in-custom-csr-spills.ll
M llvm/test/CodeGen/AMDGPU/frame-setup-without-sgpr-to-vgpr-spills.ll
M llvm/test/CodeGen/AMDGPU/function-args-inreg.ll
M llvm/test/CodeGen/AMDGPU/gfx-call-non-gfx-func.ll
M llvm/test/CodeGen/AMDGPU/gfx-callable-argument-types.ll
M llvm/test/CodeGen/AMDGPU/gfx-callable-preserved-registers.ll
M llvm/test/CodeGen/AMDGPU/gfx-callable-return-types.ll
M llvm/test/CodeGen/AMDGPU/global-alias.ll
M llvm/test/CodeGen/AMDGPU/identical-subrange-spill-infloop.ll
M llvm/test/CodeGen/AMDGPU/indirect-call.ll
M llvm/test/CodeGen/AMDGPU/insert-delay-alu-bug.ll
M llvm/test/CodeGen/AMDGPU/insert-waitcnts-crash.ll
M llvm/test/CodeGen/AMDGPU/issue176578.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.scale.f32.16x16x128.f8f6f4.ll
M llvm/test/CodeGen/AMDGPU/materialize-frame-index-sgpr.ll
M llvm/test/CodeGen/AMDGPU/mul24-pass-ordering.ll
M llvm/test/CodeGen/AMDGPU/need-fp-from-vgpr-spills.ll
M llvm/test/CodeGen/AMDGPU/nested-calls.ll
M llvm/test/CodeGen/AMDGPU/no-source-locations-in-prologue.ll
M llvm/test/CodeGen/AMDGPU/nofpclass-call.ll
M llvm/test/CodeGen/AMDGPU/preserve-wwm-copy-dst-reg.ll
M llvm/test/CodeGen/AMDGPU/s-getpc-b64-remat.ll
M llvm/test/CodeGen/AMDGPU/sgpr-spill-overlap-wwm-reserve.mir
M llvm/test/CodeGen/AMDGPU/sgpr-spills-split-regalloc.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v2i64.v8i64.ll
M llvm/test/CodeGen/AMDGPU/si-lower-sgpr-spills-vgpr-lanes-usage.mir
M llvm/test/CodeGen/AMDGPU/sibling-call.ll
M llvm/test/CodeGen/AMDGPU/stack-realign.ll
M llvm/test/CodeGen/AMDGPU/stacksave_stackrestore.ll
M llvm/test/CodeGen/AMDGPU/strictfp_f16_abi_promote.ll
M llvm/test/CodeGen/AMDGPU/swdev504645-global-fold.ll
M llvm/test/CodeGen/AMDGPU/tail-call-inreg-arguments.waterfall.ll
M llvm/test/CodeGen/AMDGPU/unfold-masked-merge-scalar-variablemask.ll
M llvm/test/CodeGen/AMDGPU/unstructured-cfg-def-use-issue.ll
M llvm/test/CodeGen/AMDGPU/vgpr-mark-last-scratch-load.ll
M llvm/test/CodeGen/AMDGPU/vgpr-tuple-allocation.ll
M llvm/test/CodeGen/AMDGPU/waterfall-call-target-av-register-failure.ll
M llvm/test/CodeGen/AMDGPU/wave32.ll
M llvm/test/CodeGen/AMDGPU/whole-wave-functions.ll
M llvm/test/CodeGen/AMDGPU/whole-wave-register-copy.ll
M llvm/test/CodeGen/AMDGPU/whole-wave-register-spill.ll
M llvm/test/CodeGen/AMDGPU/wwm-reserved-spill.ll
Log Message:
-----------
[AMDGPU] Use register pair for PC spill (#183146)
Change-Id: Ibedeef926f7ff235a06de65a83087c151f66a416
Commit: 80393ba1bdbe6155a91c7a54c0430b68f9c4b556
https://github.com/llvm/llvm-project/commit/80393ba1bdbe6155a91c7a54c0430b68f9c4b556
Author: HighW4y2H3ll <zhenghaohuu at gmail.com>
Date: 2026-05-27 (Wed, 27 May 2026)
Changed paths:
M llvm/tools/llvm-profgen/ProfiledBinary.cpp
Log Message:
-----------
[llvm-profgen] Fix assertion condition for the top-level probes address range checks (#198674)
Top-level functions may contains multiple disjoint address ranges, and
the pseudo probes may not be stored as sorted. The original assertion
check is problematic because the first pseudo probe may not necessarily
falls into the current function range even though they are both part of
the same function.
Update the assertion condition so that we won't hit the assertion
failure as long as there one pseudo probe falls in the checked function
range.
Commit: 59389b0ba9dec92702de7465b13bbedb9c523951
https://github.com/llvm/llvm-project/commit/59389b0ba9dec92702de7465b13bbedb9c523951
Author: Michael Levine <mlevine55 at bloomberg.net>
Date: 2026-05-27 (Wed, 27 May 2026)
Changed paths:
M libcxx/include/map
M libcxx/include/set
Log Message:
-----------
[libc++] Add __is_transparently_comparable_v optimizations for set, multiset, and multimap functions [Issue 187105] (#189735)
This PR closes https://github.com/llvm/llvm-project/issues/187105
It adds `__is_transparently_comparable_v` checks to `std::set`,
`std::multiset`, and `std::multimap`'s `find`, `contains`,
`lower_bound`, and `upper_bound` functions.
Assisted by: Claude Code
---------
Signed-off-by: mlevine55 <mlevine55 at bloomberg.net>
Commit: 15113c3eedb1e5badc411602fb8daa57bb5f677e
https://github.com/llvm/llvm-project/commit/15113c3eedb1e5badc411602fb8daa57bb5f677e
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2026-05-27 (Wed, 27 May 2026)
Changed paths:
M libcxx/utils/ci/docker/docker-compose.yml
Log Message:
-----------
[libc++] Update the base image hash to get GCC 16 (#199882)
Commit: 8dc8411a75707fb7c914a851fce6aa3915e8a3bc
https://github.com/llvm/llvm-project/commit/8dc8411a75707fb7c914a851fce6aa3915e8a3bc
Author: forking-google-bazel-bot[bot] <265904573+forking-google-bazel-bot[bot]@users.noreply.github.com>
Date: 2026-05-27 (Wed, 27 May 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[Bazel] Fixes 3d9d776 (#200029)
This fixes 3d9d776b29c9d1b44ee4f87dd1311bbf85af1ca3.
Co-authored-by: Google Bazel Bot <google-bazel-bot at google.com>
Commit: bdb3232dfacba6a61a0ac45bec3fb18c7c1c24bd
https://github.com/llvm/llvm-project/commit/bdb3232dfacba6a61a0ac45bec3fb18c7c1c24bd
Author: Scott Linder <scott.linder at amd.com>
Date: 2026-05-27 (Wed, 27 May 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIFrameLowering.cpp
M llvm/lib/Target/AMDGPU/SIFrameLowering.h
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.h
M llvm/lib/Target/AMDGPU/SIInstructions.td
M llvm/lib/Target/AMDGPU/SILowerSGPRSpills.cpp
M llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
M llvm/lib/Target/AMDGPU/SIRegisterInfo.h
M llvm/test/CodeGen/AMDGPU/GlobalISel/assert-align.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/call-outgoing-stack-args.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/localizer.ll
M llvm/test/CodeGen/AMDGPU/a-v-flat-atomicrmw.ll
M llvm/test/CodeGen/AMDGPU/a-v-global-atomicrmw.ll
M llvm/test/CodeGen/AMDGPU/abi-attribute-hints-undefined-behavior.ll
M llvm/test/CodeGen/AMDGPU/accvgpr-spill-scc-clobber.mir
M llvm/test/CodeGen/AMDGPU/agpr-copy-no-free-registers.ll
M llvm/test/CodeGen/AMDGPU/amdgcn-call-whole-wave.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.256bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.320bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.384bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.448bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.576bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.640bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.704bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.768bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.832bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.896bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.960bit.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-cs-chain-preserve-cc.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-pow-codegen.ll
M llvm/test/CodeGen/AMDGPU/attributor-flatscratchinit-undefined-behavior2.ll
M llvm/test/CodeGen/AMDGPU/av_spill_cross_bb_usage.mir
M llvm/test/CodeGen/AMDGPU/bf16.ll
M llvm/test/CodeGen/AMDGPU/branch-relax-spill.ll
M llvm/test/CodeGen/AMDGPU/call-args-inreg-bfloat.ll
M llvm/test/CodeGen/AMDGPU/call-args-inreg-no-sgpr-for-csrspill.ll
M llvm/test/CodeGen/AMDGPU/call-args-inreg.ll
M llvm/test/CodeGen/AMDGPU/call-argument-types.ll
M llvm/test/CodeGen/AMDGPU/call-preserved-registers.ll
M llvm/test/CodeGen/AMDGPU/call-skip.ll
M llvm/test/CodeGen/AMDGPU/callee-frame-setup.ll
M llvm/test/CodeGen/AMDGPU/callee-special-input-vgprs-packed.ll
M llvm/test/CodeGen/AMDGPU/callee-special-input-vgprs.ll
M llvm/test/CodeGen/AMDGPU/cc-entry.ll
M llvm/test/CodeGen/AMDGPU/cc-inreg-sgpr0-3-mismatch.ll
M llvm/test/CodeGen/AMDGPU/copysign-simplify-demanded-bits.ll
M llvm/test/CodeGen/AMDGPU/cross-block-use-is-not-abi-copy.ll
M llvm/test/CodeGen/AMDGPU/debug-frame.ll
M llvm/test/CodeGen/AMDGPU/dwarf-multi-register-use-crash.ll
M llvm/test/CodeGen/AMDGPU/dynamic-vgpr-reserve-stack-for-cwsr.ll
M llvm/test/CodeGen/AMDGPU/eliminate-frame-index-s-mov-b32.mir
M llvm/test/CodeGen/AMDGPU/eliminate-frame-index-select.ll
M llvm/test/CodeGen/AMDGPU/eliminate-frame-index-select.mir
M llvm/test/CodeGen/AMDGPU/fix-frame-reg-in-custom-csr-spills.ll
M llvm/test/CodeGen/AMDGPU/frame-index.mir
M llvm/test/CodeGen/AMDGPU/frame-setup-without-sgpr-to-vgpr-spills.ll
M llvm/test/CodeGen/AMDGPU/function-args-inreg.ll
M llvm/test/CodeGen/AMDGPU/gfx-call-non-gfx-func.ll
M llvm/test/CodeGen/AMDGPU/gfx-callable-argument-types.ll
M llvm/test/CodeGen/AMDGPU/gfx-callable-preserved-registers.ll
M llvm/test/CodeGen/AMDGPU/gfx-callable-return-types.ll
M llvm/test/CodeGen/AMDGPU/identical-subrange-spill-infloop.ll
M llvm/test/CodeGen/AMDGPU/insert-delay-alu-bug.ll
M llvm/test/CodeGen/AMDGPU/insert-waitcnts-crash.ll
M llvm/test/CodeGen/AMDGPU/issue176578.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.scale.f32.16x16x128.f8f6f4.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.scale.f32.32x32x64.f8f6f4.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.readfirstlane.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.smfmac.gfx950.ll
M llvm/test/CodeGen/AMDGPU/llvm.maximum.f64.ll
M llvm/test/CodeGen/AMDGPU/llvm.minimum.f64.ll
M llvm/test/CodeGen/AMDGPU/materialize-frame-index-sgpr.gfx10.ll
M llvm/test/CodeGen/AMDGPU/materialize-frame-index-sgpr.ll
M llvm/test/CodeGen/AMDGPU/maximumnum.bf16.ll
M llvm/test/CodeGen/AMDGPU/maximumnum.ll
M llvm/test/CodeGen/AMDGPU/memintrinsic-unroll.ll
M llvm/test/CodeGen/AMDGPU/memset-param-combinations.ll
M llvm/test/CodeGen/AMDGPU/minimumnum.bf16.ll
M llvm/test/CodeGen/AMDGPU/minimumnum.ll
M llvm/test/CodeGen/AMDGPU/mul24-pass-ordering.ll
M llvm/test/CodeGen/AMDGPU/nested-calls.ll
M llvm/test/CodeGen/AMDGPU/no-source-locations-in-prologue.ll
M llvm/test/CodeGen/AMDGPU/nofpclass-call.ll
M llvm/test/CodeGen/AMDGPU/pei-amdgpu-cs-chain-preserve.mir
M llvm/test/CodeGen/AMDGPU/pei-vgpr-block-spill-csr.mir
M llvm/test/CodeGen/AMDGPU/preserve-wwm-copy-dst-reg.ll
M llvm/test/CodeGen/AMDGPU/s-getpc-b64-remat.ll
M llvm/test/CodeGen/AMDGPU/sgpr-spill-overlap-wwm-reserve.mir
M llvm/test/CodeGen/AMDGPU/shufflevector.v2i64.v8i64.ll
M llvm/test/CodeGen/AMDGPU/si-lower-sgpr-spills-vgpr-lanes-usage.mir
M llvm/test/CodeGen/AMDGPU/si-lower-sgpr-spills.mir
M llvm/test/CodeGen/AMDGPU/sibling-call.ll
M llvm/test/CodeGen/AMDGPU/spill-partial-csr-sgpr-live-ins.mir
M llvm/test/CodeGen/AMDGPU/spill-sgpr-csr-live-ins.mir
M llvm/test/CodeGen/AMDGPU/spill-sgpr-to-virtual-vgpr.mir
M llvm/test/CodeGen/AMDGPU/spill-vgpr-block.ll
M llvm/test/CodeGen/AMDGPU/spill_more_than_wavesize_csr_sgprs.ll
M llvm/test/CodeGen/AMDGPU/stack-realign.ll
M llvm/test/CodeGen/AMDGPU/stacksave_stackrestore.ll
M llvm/test/CodeGen/AMDGPU/strictfp_f16_abi_promote.ll
M llvm/test/CodeGen/AMDGPU/swdev504645-global-fold.ll
M llvm/test/CodeGen/AMDGPU/tail-call-inreg-arguments.waterfall.ll
M llvm/test/CodeGen/AMDGPU/tuple-allocation-failure.ll
M llvm/test/CodeGen/AMDGPU/unfold-masked-merge-scalar-variablemask.ll
M llvm/test/CodeGen/AMDGPU/unspill-vgpr-after-rewrite-vgpr-mfma.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-mul.ll
M llvm/test/CodeGen/AMDGPU/vgpr-mark-last-scratch-load.ll
M llvm/test/CodeGen/AMDGPU/vgpr-tuple-allocation.ll
M llvm/test/CodeGen/AMDGPU/wave32.ll
M llvm/test/CodeGen/AMDGPU/whole-wave-functions.ll
M llvm/test/CodeGen/AMDGPU/whole-wave-register-copy.ll
M llvm/test/CodeGen/AMDGPU/whole-wave-register-spill.ll
Log Message:
-----------
[AMDGPU] Implement CFI for CSR spills (#183150)
Introduce new SPILL pseudos to allow CFI to be generated for only CSR
spills, and to make ISA-instruction-level accurate information.
Other targets either generate slightly incorrect information or rely on
conventions for how spills are placed within the entry block. The
approach in this change produces larger unwind tables, with the
increased size being spent on additional DW_CFA_advance_location
instructions needed to describe the unwinding accurately.
Change-Id: I9b09646abd2ac4e56eddf5e9aeca1a5bebbd43dd
Co-authored-by: Scott Linder <scott.linder at amd.com>
Co-authored-by: Venkata Ramanaiah Nalamothu <VenkataRamanaiah.Nalamothu at amd.com>
Commit: 99bc986c527a9a98c85d792cfd99e0518cc1615d
https://github.com/llvm/llvm-project/commit/99bc986c527a9a98c85d792cfd99e0518cc1615d
Author: Roy Shi <royitaqi at users.noreply.github.com>
Date: 2026-05-27 (Wed, 27 May 2026)
Changed paths:
M llvm/include/llvm/Support/FileSystem.h
M llvm/include/llvm/Support/MemoryBuffer.h
M llvm/lib/Support/MemoryBuffer.cpp
M llvm/lib/Support/Unix/Path.inc
M llvm/lib/Support/Windows/Path.inc
Log Message:
-----------
[Support] Add MemoryBuffer::randomAccessIfMmap() (#199265)
For read-only MemoryBuffer_MMap, advise the kernel that access pattern
will be random, disabling readahead. This calls `madvise(MADV_RANDOM)`
on *NIX. This function should not be called on a writable buffer.
The implementation follows existing pattern in
`mapped_file_region::dontNeedImpl()` and
`mapped_file_region::willNeedImpl()`.
See intended usage: https://github.com/llvm/llvm-project/pull/199230
Commit: b76503229dc39d32505504fee48d0d40c4adc069
https://github.com/llvm/llvm-project/commit/b76503229dc39d32505504fee48d0d40c4adc069
Author: Ryosuke Niwa <rniwa at webkit.org>
Date: 2026-05-27 (Wed, 27 May 2026)
Changed paths:
M clang/lib/StaticAnalyzer/Checkers/WebKit/RawPtrRefLocalVarsChecker.cpp
M clang/test/Analysis/Checkers/WebKit/uncounted-local-vars.cpp
Log Message:
-----------
[alpha.webkit.UncountedLocalVarsChecker] Detect a raw pointer/reference in a decomposition declaration. (#198582)
Commit: c00484d99f36f90aa5cb79226a0c444d3fc41bd9
https://github.com/llvm/llvm-project/commit/c00484d99f36f90aa5cb79226a0c444d3fc41bd9
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-05-27 (Wed, 27 May 2026)
Changed paths:
M llvm/tools/llvm-profgen/ProfiledBinary.cpp
Log Message:
-----------
[llvm-profgen] Fix -Wunused-variable (#200038)
Inline the variable definition into the assertion given the variable
name does not add much and release builds will end up with an unused
variable otherwise.
Commit: c315c662cd2d33e0c7f962fed742ee53626d8005
https://github.com/llvm/llvm-project/commit/c315c662cd2d33e0c7f962fed742ee53626d8005
Author: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
Date: 2026-05-27 (Wed, 27 May 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/test/CodeGen/AMDGPU/code-size-estimate.ll
M llvm/test/CodeGen/AMDGPU/dagcombine-fmul-sel.ll
M llvm/test/CodeGen/AMDGPU/extract-subvector-16bit.ll
M llvm/test/CodeGen/AMDGPU/fmul-to-ldexp.ll
M llvm/test/CodeGen/AMDGPU/imm16.ll
M llvm/test/CodeGen/AMDGPU/select-fabs-fneg-extract.f16.ll
M llvm/test/CodeGen/AMDGPU/select-fabs-fneg-extract.v2f16.ll
Log Message:
-----------
[AMDGPU] Fix codesize estimate after #198005 (#200033)
This fixes failure in libc tests which checks the exact encoding
size. Encoding is now shorter, but it did not recognize fp16
immediates as an inlinable constant and assumes literal encoding.
Shorter encodings were created here:
https://github.com/llvm/llvm-project/pull/198005
Commit: f95f02c4b1ac931f8b6dcac55a0ad4ee59997883
https://github.com/llvm/llvm-project/commit/f95f02c4b1ac931f8b6dcac55a0ad4ee59997883
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-05-27 (Wed, 27 May 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanAnalysis.cpp
M llvm/lib/Transforms/Vectorize/VPlanAnalysis.h
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanVerifier.cpp
M llvm/unittests/Transforms/Vectorize/VPlanTest.cpp
Log Message:
-----------
[VPlan] Thread scalar types through VPReplicateRecipe. (NFC) (#199379)
Update VPReplicateRecipe to populate VPSingleDefValue's scalar
type. For most opcodes, the scalar type is determine from the operands,
via computeScalarTypeForInstruction (from
https://github.com/llvm/llvm-project/pull/199378).
For some opcodes, like Loads and casts, the type must be
provided explicitly.
Depends on https://github.com/llvm/llvm-project/pull/199378.
PR: https://github.com/llvm/llvm-project/pull/199379
Commit: 2f0815059c7b033acf935d49380d8b0166460bb3
https://github.com/llvm/llvm-project/commit/2f0815059c7b033acf935d49380d8b0166460bb3
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2026-05-27 (Wed, 27 May 2026)
Changed paths:
M bolt/test/lit.cfg.py
M libc/utils/libctest/format.py
M libsycl/test/lit.cfg.py
M lldb/test/API/lit.cfg.py
M lldb/test/API/lldbtest.py
M lldb/test/Shell/lit.cfg.py
M llvm/utils/lit/lit/LitConfig.py
M llvm/utils/lit/lit/TestRunner.py
M llvm/utils/lit/lit/TestingConfig.py
M llvm/utils/lit/lit/formats/googletest.py
M llvm/utils/lit/lit/main.py
M llvm/utils/lit/tests/Inputs/googletest-timeout/lit.cfg
M llvm/utils/lit/tests/Inputs/shtest-timeout/lit.cfg
Log Message:
-----------
Reland: [lit] Move maxIndividualTestTime from global to test suite config (#199996)
Simplify LitConfig initialization and setter to allow None values.
TestingConfig.maxIndividualTestTime is initialized to 0 (or resolved to
0 if None) strictly during initialization.
This fixes an issue where the aggressive BOLT timeout of 60s (previously
set globally on lit_config) was leaking and affecting libc++ tests. By
moving the timeout configuration from the global lit_config to the
individual test suite config, we ensure that timeouts are isolated and
respect suite-local settings without leaking.
PR Stack:
* https://github.com/llvm/llvm-project/pull/198192
* https://github.com/llvm/llvm-project/pull/199886
* ➤ https://github.com/llvm/llvm-project/pull/199996
* https://github.com/llvm/llvm-project/pull/198193
The diff from #198192 is 39b632f741012bfbff9858407765e45435ad95ff
Assisted-by: Gemini
Commit: bf005a1227a4822c7c2535dd5f5f3626fbe441b2
https://github.com/llvm/llvm-project/commit/bf005a1227a4822c7c2535dd5f5f3626fbe441b2
Author: Ryosuke Niwa <rniwa at webkit.org>
Date: 2026-05-27 (Wed, 27 May 2026)
Changed paths:
M clang/lib/StaticAnalyzer/Checkers/WebKit/ASTUtils.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/PtrTypesSemantics.cpp
M clang/test/Analysis/Checkers/WebKit/call-args.cpp
M clang/test/Analysis/Checkers/WebKit/objc-mock-types.h
A clang/test/Analysis/Checkers/WebKit/unretained-call-args-member.mm
Log Message:
-----------
[alpha.webkit.UnretainedCallArgsChecker] Emit a warning for a non-const RetainPtr member (#184243)
This PR fixes a bug in UnretainedCallArgsChecker that it wouldn't emit a
warning when calling a function with the return value of a getter of a
RetainPtr non-const member variable even if such a member variable could
be mutated during such a function call.
The bug caused by tryToFindPtrOrigin treating any call of a getter on a
smart pointer member variable as safe. Fixed the bug by limiting this to
only when the variable is a local variable or a function parameter.
In addition, this PR fixes a bug in WebKit checkers that it would
erroneously emit a warning when calling a getter on a const RetainPtr
member variable beacuse isOwnerPtr was returning false for RetainPtr.
This false negative was previously masked / hidden by the false positive
fixed in this PR.
---------
Co-authored-by: Balázs Benics <benicsbalazs at gmail.com>
Commit: 9ca1941d8ea2cc9f95def825d2c77cc91e2d2fd5
https://github.com/llvm/llvm-project/commit/9ca1941d8ea2cc9f95def825d2c77cc91e2d2fd5
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2026-05-27 (Wed, 27 May 2026)
Changed paths:
M flang-rt/cmake/modules/AddFlangRTOffload.cmake
M flang-rt/lib/runtime/CMakeLists.txt
Log Message:
-----------
[flang-rt][cuda] Move thin I/O to ptx only (#200054)
Commit: b0516c58736cf1d83188e0b04cf5acb123e382e4
https://github.com/llvm/llvm-project/commit/b0516c58736cf1d83188e0b04cf5acb123e382e4
Author: Justin Lebar <justin.lebar at gmail.com>
Date: 2026-05-27 (Wed, 27 May 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/SeparateConstOffsetFromGEP.cpp
M llvm/test/Transforms/SeparateConstOffsetFromGEP/AMDGPU/lower-gep.ll
M llvm/test/Transforms/SeparateConstOffsetFromGEP/split-gep-sub.ll
Log Message:
-----------
[SeparateConstOffsetFromGEP] Set `inbounds` correctly. (#199304)
swapGEPOperand reorders the GEPs (ptr+off)+const into (ptr+const)+off.
When it does so, it needs to determine if the inner GEP is inbounds.
Previously the way it did this was to call
stripAndAccumulateInBoundsConstantOffsets on (ptr+const), and then check
if this offset was indeed in-bounds.
However, this GEP was not necessarily marked as `inbounds` itself. If it
was not, stripAndAccumulateInBoundsConstantOffsets would return 0 for
the offset (instead of `const`), in which case we'd check if
`0 < [obj width]`, which is trivially true, and then incorrectly mark
the GEP as inbounds.
This bug was found by a large run of Opus 4.7 looking for bugs in LLVM.
Commit: 4fe4d9844862451b38bb3bd7329ab1b29916e3be
https://github.com/llvm/llvm-project/commit/4fe4d9844862451b38bb3bd7329ab1b29916e3be
Author: Justin Lebar <justin.lebar at gmail.com>
Date: 2026-05-27 (Wed, 27 May 2026)
Changed paths:
M llvm/lib/IR/Instructions.cpp
M llvm/test/Transforms/SimpleLoopUnswitch/trivial-unswitch-profmd.ll
Log Message:
-----------
[IR] Handle `expected` tag in switch branch weights. (#200025)
Switch branch weight metadata has an optional `expected` tag.
SwitchInstProfUpdateWrapper::getSuccessorWeight() did not handle this
tag; if it was present, it would return nullopt, effectively ignoring
the metadata.
This bug was found by a large run of Opus 4.7 looking for bugs in LLVM.
Commit: 4e39ea3d5e7320035384072021582af74d91b1a9
https://github.com/llvm/llvm-project/commit/4e39ea3d5e7320035384072021582af74d91b1a9
Author: Scott Linder <scott.linder at amd.com>
Date: 2026-05-27 (Wed, 27 May 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIFrameLowering.cpp
M llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.h
M llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
M llvm/lib/Target/AMDGPU/SIRegisterInfo.h
A llvm/test/CodeGen/AMDGPU/amdgpu-spill-cfi-saved-regs.ll
Log Message:
-----------
[AMDGPU] Implement -amdgpu-spill-cfi-saved-regs (#183149)
These spills need special CFI anyway, so implementing them directly
where CFI is emitted avoids the need to invent a mechanism to track them
from ISel.
Change-Id: If4f34abb3a8e0e46b859a7c74ade21eff58c4047
Co-authored-by: Scott Linder <scott.linder at amd.com>
Co-authored-by: Venkata Ramanaiah Nalamothu <VenkataRamanaiah.Nalamothu at amd.com>
Commit: 5a7e4a0cf7f53a74b87c53b792b6a1d3ece3df28
https://github.com/llvm/llvm-project/commit/5a7e4a0cf7f53a74b87c53b792b6a1d3ece3df28
Author: Scott Linder <scott.linder at amd.com>
Date: 2026-05-27 (Wed, 27 May 2026)
Changed paths:
M llvm/include/llvm/CodeGen/MachineFunction.h
M llvm/include/llvm/MC/MCDwarf.h
M llvm/lib/CodeGen/MachineFunction.cpp
M llvm/lib/MC/MCDwarf.cpp
M llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp
M llvm/test/CodeGen/AMDGPU/debug-frame.ll
M llvm/test/CodeGen/AMDGPU/dwarf-multi-register-use-crash.ll
M llvm/test/CodeGen/AMDGPU/insert-waitcnts-crash.ll
M llvm/test/CodeGen/AMDGPU/no-source-locations-in-prologue.ll
M llvm/test/CodeGen/AMDGPU/pei-vgpr-block-spill-csr.mir
M llvm/test/CodeGen/AMDGPU/sgpr-spill-overlap-wwm-reserve.mir
Log Message:
-----------
[AMDGPU][MC] Replace shifted registers in CFI instructions (#183147)
Change-Id: I0d99e9fe43ec3b6fecac20531119956dca2e4e5c
Commit: b6161b9f4c9e306fa07295db67a7ecc8cfadcffb
https://github.com/llvm/llvm-project/commit/b6161b9f4c9e306fa07295db67a7ecc8cfadcffb
Author: Jeff Bailey <jbailey at raspberryginger.com>
Date: 2026-05-27 (Wed, 27 May 2026)
Changed paths:
M libc/include/CMakeLists.txt
Log Message:
-----------
[libc] Add missing struct_mmsghdr dependency to sys_socket (#200051)
Updated libc/include/CMakeLists.txt to add
.llvm-libc-types.struct_mmsghdr to the sys_socket dependency list. This
ensures that the generated sys/socket.h correctly includes the
struct_mmsghdr.h type header.
Assisted-by: Automated tooling, human reviewed.
Commit: 5ae73b942f44295c0baff138effe7272a94c7a1b
https://github.com/llvm/llvm-project/commit/5ae73b942f44295c0baff138effe7272a94c7a1b
Author: Jason Molenda <jmolenda at apple.com>
Date: 2026-05-27 (Wed, 27 May 2026)
Changed paths:
M lldb/include/lldb/Core/Module.h
M lldb/source/Commands/CommandObjectTarget.cpp
M lldb/source/Core/Module.cpp
Log Message:
-----------
[lldb] Keep addr for Memory Modules separate (#199810)
This change is to make DataFileCache symbol table caching work with
memory-read binary modules.
When we read a Module out of memory, we keep the address of the module
in Module's m_object_name field as a string. This is normally the name
of a file in a ranlib/static library/.a archive like the "main.o" in
"foo.a(main.o)". The address is most often seen in the "image list"
output, and is the only easy way to distinguish in that output which
binaries were read out of memory, versus found on local disk. The "name"
of the Module ends up being the combination of the FileSpec plus this
m_object_name.
Reading a binary out of memory is expensive, primarily because of
reading the symbol table. The DataFileCache feature that Greg introduced
five years ago can cache the Symbol Table for a binary locally, and when
we see the same binary loaded again in a future debug session/lldb
session, we can skip parsing the symbol table (or in the case of Memory
Module, reading it from memory).
Unfortunately because the "name" of the Module is the combination of the
FileSpec PLUS the address, if this is a system where binaries can load
at different addresses, we may not be able to use the DataFileCache for
a memory module. The address should not be part of the name for this.
In Module, I created a new optional ivar to track the memory module
address, if this is one, instead of putting the string representation in
m_object_name. In all places (except the DataFileCache name
construction), I append the address to the name just like we do with
m_object_name.
There were a few logging points that were manually constructing the name
when a method would do it for them already; I changed them to call the
method instead.
Probably the least clean part is in CommandObjectTarget (the image list
output), we add the ObjectName to the FileSpec here as well. For now,
instead of trying to leverage one of the methods in Module that combine
them already, I changed it to use the same change.
I used a std::optional for this address instead of the
LLDB_INVALID_ADDRESS convention because it was a lot cleaner to read, I
thought, even if it is different than most often used in the codebase.
Open to using the older coding style if other people think consistency
is more important.
Commit: 78987e85ae0930b10d2588a9f8333a2fa8c3014d
https://github.com/llvm/llvm-project/commit/78987e85ae0930b10d2588a9f8333a2fa8c3014d
Author: Jason Molenda <jmolenda at apple.com>
Date: 2026-05-27 (Wed, 27 May 2026)
Changed paths:
M lldb/include/lldb/Core/DataFileCache.h
M lldb/include/lldb/Core/Module.h
M lldb/include/lldb/Symbol/ObjectFile.h
M lldb/include/lldb/Symbol/Symbol.h
M lldb/include/lldb/Symbol/Symtab.h
M lldb/include/lldb/Utility/DataEncoder.h
M lldb/source/Core/DataFileCache.cpp
M lldb/source/Core/Mangled.cpp
M lldb/source/Symbol/Symtab.cpp
Log Message:
-----------
[lldb] Edits and clarifications to DataFileCache comments, NFC (#199787)
I was reading through Greg Clayton's DataFileCache PR and fixed a few
small typeos as I went along.
I also had a little trouble understanding the two types of hashes that
are calculated for a file, at first, and I tried to write comments for
the relevant methods (in Module, ObjectFile, and DataFileCache) to be
more explicit about their role and the role of the other hashes that are
calculated. It may be more detail than necessary, but it would have been
helpful for me while reading this through.
Commit: 055a4ba0b27794d1dd04149f87ebc3cc47bc2bd9
https://github.com/llvm/llvm-project/commit/055a4ba0b27794d1dd04149f87ebc3cc47bc2bd9
Author: Vlad Serebrennikov <serebrennikov.vladislav at gmail.com>
Date: 2026-05-27 (Wed, 27 May 2026)
Changed paths:
M clang/www/cxx_dr_status.html
Log Message:
-----------
[clang] Update C++ DR status page (#200053)
Updates from 2026-05-19 CWG telecon.
Commit: 9fa9ab338f753cf4fd7c6f7c3c8424da7d15c588
https://github.com/llvm/llvm-project/commit/9fa9ab338f753cf4fd7c6f7c3c8424da7d15c588
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-05-27 (Wed, 27 May 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVFeatures.td
Log Message:
-----------
[RISCV] Remove unused Predicates for Zicfilp. NFC (#200028)
Commit: 8fc12f1e3f6aab79aefd70cf68f9c92439e2fc32
https://github.com/llvm/llvm-project/commit/8fc12f1e3f6aab79aefd70cf68f9c92439e2fc32
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2026-05-27 (Wed, 27 May 2026)
Changed paths:
M flang-rt/cmake/modules/AddFlangRTOffload.cmake
Log Message:
-----------
[flang-rt][cuda] Set RT_CUDA_THIN_IO=1 only for PTX object (#200063)
Commit: e1dd984a809c9c7b8cc3731e3b8eeb8d01fbc8c1
https://github.com/llvm/llvm-project/commit/e1dd984a809c9c7b8cc3731e3b8eeb8d01fbc8c1
Author: Susan Tan (ス-ザン タン) <zujunt at nvidia.com>
Date: 2026-05-27 (Wed, 27 May 2026)
Changed paths:
M flang/lib/Optimizer/Transforms/FIRToMemRef.cpp
M flang/test/Transforms/FIRToMemRef/slice-projected.mlir
Log Message:
-----------
[flang][FIRToMemRef] fix stride calculation for complex lowering (#200035)
**Summary**
When `fir.array_coor` targets a projected slice of a complex array (path
0 = real, 1 = imag), FIRToMemRef must not treat the result as a dense
memref.
**Bug:** The pass stopped after fir.convert to `memref<…×complex>` (or
static-shape fast path) and used default/dense strides. Loads/stores
then stepped by sizeof(complex) instead of sizeof(re)/sizeof(im).
**Fix:** For constant `%re/%im` on `complex<T>` storage:
`fir.convert` storage to `memref<…×2×T>` and index the component (0 or
1).
Read layout from `fir.box_dims` on the box (even if the memref shape is
static).
Set each memref stride to `box_dims_byte_stride / sizeof(T)`.
Advised by Cursor
Commit: e8cc37e60d04ea2e25f03fbeeb8de59f4e640448
https://github.com/llvm/llvm-project/commit/e8cc37e60d04ea2e25f03fbeeb8de59f4e640448
Author: Jan Svoboda <jan_svoboda at apple.com>
Date: 2026-05-27 (Wed, 27 May 2026)
Changed paths:
M clang/lib/DependencyScanning/DependencyScannerImpl.cpp
Log Message:
-----------
[clang][deps] Disable app extensions during scanning (#200041)
Application extension contributes to the context hash, but only affects
the availability attribute on declarations. Since it cannot affect
dependencies, disable it for the scan to reduce the number of scanning
PCM variants.
Commit: 00b4695f1dc6b04168be2e1ed8368624d768314f
https://github.com/llvm/llvm-project/commit/00b4695f1dc6b04168be2e1ed8368624d768314f
Author: Justin Lebar <justin.lebar at gmail.com>
Date: 2026-05-27 (Wed, 27 May 2026)
Changed paths:
M llvm/lib/CodeGen/CodeGenPrepare.cpp
M llvm/test/CodeGen/AArch64/fast-isel-branch-cond-split.ll
A llvm/test/Transforms/CodeGenPrepare/X86/split-branch-cond-weights.ll
Log Message:
-----------
[CodeGenPrepare] Use recomputed split-branch weights. (#199822)
splitBranchCondition computes new branch weights after splitting an
and/or condition into two branches, but then passed the original weights
to createBranchWeights at each metadata update. The recomputed values
were discarded.
Pass the scaled NewTrueWeight/NewFalseWeight values when installing
metadata on both generated branches.
This bug was found by a large run of Opus 4.7 looking for bugs in LLVM.
Commit: 7f82efb3966868dfe7d0b37dd6aa104007d264ff
https://github.com/llvm/llvm-project/commit/7f82efb3966868dfe7d0b37dd6aa104007d264ff
Author: Guy David <guyda96 at gmail.com>
Date: 2026-05-28 (Thu, 28 May 2026)
Changed paths:
M llvm/include/module.modulemap
Log Message:
-----------
[Object] Add missing BBAddrMap.def to module map (#199961)
Added in 532940bdee66bf5f36a70578698aab66f16919af.
Commit: f13305bac8ea2237e6fbab29f172e6a5a5058a1c
https://github.com/llvm/llvm-project/commit/f13305bac8ea2237e6fbab29f172e6a5a5058a1c
Author: Min-Yih Hsu <min.hsu at sifive.com>
Date: 2026-05-27 (Wed, 27 May 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VectorCombine.cpp
A llvm/test/Transforms/VectorCombine/RISCV/vector-deinterleave2.ll
Log Message:
-----------
[VectorCombine] Fold deinterleave2 with smaller effective element size (#192121)
Found in real-world code where this sequence:
```
%d = llvm.vector.deinterleave2 <vscale x 16 x i32> %v
%f0 = extractvalue { <vscale x 8 x i32>, <vscale x 8 x i32> } %d, 0
%f1 = extractvalue { <vscale x 8 x i32>, <vscale x 8 x i32> } %d, 1
%low0 = and <vscale x 8 x i32> %f0, splat (i32 65535)
%low1 = shl <vscale x 8 x i32> %f1, splat (i32 16)
%merge0 = or disjoint <vscale x 8 x i32> %low0, %low1
%high0 = and <vscale x 8 x i32> %f1, splat (i32 -65536)
%high1 = lshr <vscale x 8 x i32> %f0, splat (i32 16)
%merge1 = or disjoint <vscale x 8 x i32> %high0, %high1
```
is really just doing `deinterleave2` but on `<vscale x 32 x i16>`. That
is, the same total vector size but with half the element width. So we
can turn it into:
```
%narrow.v = bitcast <vscale x 16 x i32> %v to <vscale x 32 x i16>
%d = llvm.vector.deinterleave2 <vscale x 32 x i16> %narrow.v
%f0 = extractvalue { <vscale x 16 x i16>, <vscale x 16 x i16> } %d, 0
%f1 = extractvalue { <vscale x 16 x i16>, <vscale x 16 x i16> } %d, 1
%merge0 = bitcast <vscale x 16 x i16> %f0 to <vscale x 8 x i32>
%merge1 = bitcast <vscale x 16 x i16> %f1 to <vscale x 8 x i32>
```
I put this in VectorCombine because I'm worried that the newly created
bitcast might be expensive for some targets, hence a profitability check
before committing the transformation.
Commit: eb0cb0c69526a8bff5b3b1399a2bd7da4cd3a148
https://github.com/llvm/llvm-project/commit/eb0cb0c69526a8bff5b3b1399a2bd7da4cd3a148
Author: Zhijie Wang <yesterda9 at gmail.com>
Date: 2026-05-27 (Wed, 27 May 2026)
Changed paths:
M clang/include/clang/Analysis/Analyses/LifetimeSafety/LifetimeAnnotations.h
M clang/lib/Analysis/LifetimeSafety/FactsGenerator.cpp
M clang/lib/Analysis/LifetimeSafety/LifetimeAnnotations.cpp
M clang/test/Sema/Inputs/lifetime-analysis.h
M clang/test/Sema/warn-lifetime-safety.cpp
Log Message:
-----------
[LifetimeSafety] Propagate inner origins through std::move and related casts (#199600)
std::move and related casts (std::forward, std::forward_like,
std::move_if_noexcept, std::as_const) are reference casts: the result
refers to the same object as the argument. Flow all origin levels for
this family.
Fixes #191954
Commit: 9409c07de6378507397ecdb6f05f628f58110112
https://github.com/llvm/llvm-project/commit/9409c07de6378507397ecdb6f05f628f58110112
Author: Jason Molenda <jmolenda at apple.com>
Date: 2026-05-27 (Wed, 27 May 2026)
Changed paths:
M lldb/source/Plugins/DynamicLoader/MacOSX-DYLD/DynamicLoaderDarwin.cpp
M lldb/source/Plugins/DynamicLoader/MacOSX-DYLD/DynamicLoaderDarwin.h
Log Message:
-----------
[lldb][Darwin] Read Mach-O binaries out of memory more efficiently (#200072)
When lldb needs to read a Mach-O binary out of memory, it first reads
512 bytes to get the mach header, which includes the size of the load
commands, and then does a second read to get the mach header and load
commands.
I am changing the initial read to get 3192 bytes, which will include the
full load commands for most binaries.
In April I changed debugserver to return the correct size of the mach
header and load commands in a `sizeof_mh_and_loadcmds` key. If this
number is provided, refine the amount we read to this size.
This reduces the number of memory read packets we issue from 2 to 1 for
a memory module, outside of packets that may be needed to get the symbol
table.
Commit: 9d1644738134c7132058dddf4b97f2a782429862
https://github.com/llvm/llvm-project/commit/9d1644738134c7132058dddf4b97f2a782429862
Author: Harald van Dijk <hdijk at accesssoftek.com>
Date: 2026-05-28 (Thu, 28 May 2026)
Changed paths:
M llvm/lib/Target/DirectX/DXILWriter/DXILBitcodeWriter.cpp
M llvm/lib/Target/DirectX/DXILWriter/DXILValueEnumerator.cpp
M llvm/lib/Target/DirectX/DXILWriter/DXILValueEnumerator.h
M llvm/lib/Target/DirectX/DirectXIRPasses/CMakeLists.txt
M llvm/lib/Target/DirectX/DirectXIRPasses/DXILDebugInfo.cpp
M llvm/lib/Target/DirectX/DirectXIRPasses/DXILDebugInfo.h
A llvm/test/tools/dxil-dis/dbg-value.ll
M llvm/test/tools/dxil-dis/debug-info.ll
Log Message:
-----------
[DirectX] Add an "offset" operand to llvm.dbg.value (#197478)
Offset operand was removed in abe04759a6, so we need to bring it back
for DXIL. If offset is not specified, it should be zero.
---------
Co-authored-by: Andrew Savonichev <andrew.savonichev at gmail.com>
Commit: e69fb46030a03bcd9556d60844defd2bb9627587
https://github.com/llvm/llvm-project/commit/e69fb46030a03bcd9556d60844defd2bb9627587
Author: Roy Shi <royitaqi at users.noreply.github.com>
Date: 2026-05-27 (Wed, 27 May 2026)
Changed paths:
M llvm/lib/DebugInfo/GSYM/GsymReader.cpp
M llvm/tools/llvm-gsymutil/Opts.td
M llvm/tools/llvm-gsymutil/llvm-gsymutil.cpp
Log Message:
-----------
[gsymutil] Disable readahead in `GsymReader::openFile()` (#199230)
`GsymReader::lookup()` has random access pattern (i.e. binary search an
address, then spot-load/parse info from rest of the GSYM data).
Readahead strategies in kernels (which was enabled by default) don't
necessarily improve (and may degrade) performance. This patch disables
readahead.
In a production system, similar change has seen 5% improvement on IOPS
and data reads. An offline performance test on a Linux machine shows
similar results - it reduces 14.3% total data read, 3.5% CPU%, and 2.9%
wall time (while adding 9.4% page faults). The reduction of total data
read and CPU % may help the performance of a heavily-loaded production
system.
```
┌────────────────┬─────────────┬─────────┬────────┐
│ Metric │ MADV_RANDOM │ Default │ Diff │
├────────────────┼─────────────┼─────────┼────────┤
│ Wall (s) │ 0.286 │ 0.294 │ -2.9% │
├────────────────┼─────────────┼─────────┼────────┤
│ Major PF │ 203.6 │ 186.0 │ +9.4% │
├────────────────┼─────────────┼─────────┼────────┤
│ Minor PF │ 4433.1 │ 4450.3 │ -0.4% │
├────────────────┼─────────────┼─────────┼────────┤
│ FS inputs (MB) │ 118.8 │ 138.7 │ -14.3% │
├────────────────┼─────────────┼─────────┼────────┤
│ CPU % │ 48.8 │ 50.6 │ -3.5% │
└────────────────┴─────────────┴─────────┴────────┘
```
The test is performed by doing 100 cold runs, where each run first
purges kernel page cache, then opens/mmaps a 3.8 GB GSYM file, and then
looks up 3 addresses at the beginning/middle/end of the address list.
See [test
script](https://gist.github.com/royitaqi/c06c733cccfbf747d63750b06db77b4a).
The pre-existing hidden option `llvm-gsymutil --benchmark-reader` is
extended to take optional `=<start>,<stride>` to make performance
testing easier.
Commit: 5db13643f4b7038db0ca304d9f8900122502935c
https://github.com/llvm/llvm-project/commit/5db13643f4b7038db0ca304d9f8900122502935c
Author: Yaxun (Sam) Liu <yaxun.liu at amd.com>
Date: 2026-05-27 (Wed, 27 May 2026)
Changed paths:
M clang/lib/CodeGen/CGCUDANV.cpp
A clang/test/CodeGenHIP/offload-pgo-sections.hip
M compiler-rt/lib/profile/CMakeLists.txt
M compiler-rt/lib/profile/InstrProfilingFile.c
A compiler-rt/lib/profile/InstrProfilingPlatformROCm.cpp
M llvm/include/llvm/IR/RuntimeLibcalls.td
M llvm/include/llvm/ProfileData/InstrProf.h
M llvm/lib/Transforms/Instrumentation/InstrProfiling.cpp
M llvm/lib/Transforms/Instrumentation/PGOInstrumentation.cpp
A llvm/test/Instrumentation/InstrProfiling/amdgpu-instrumentation.ll
A llvm/test/Instrumentation/InstrProfiling/amdgpu-profc-arrays.ll
A llvm/test/Instrumentation/InstrProfiling/gpu-weak.ll
A llvm/test/Transforms/PGOProfile/amdgpu-disable-value-profiling.ll
Log Message:
-----------
[PGO][AMDGPU] Add basic HIP offload PGO support (#177665)
Provide the minimum HIP/offload path for device profile collection and
merge on HIP before layering profile-format and uniformity-specific
changes separately.
This adds the ROCm collection runtime, hooks device collection into the
host write-file path, lowers AMDGPU instrumentation to
__llvm_profile_instrument_gpu with regular counters, and disables GPU
indirect-call value profiling.
Commit: 1670d39972a1c6dd4a9e6f54d509a86a72dae1da
https://github.com/llvm/llvm-project/commit/1670d39972a1c6dd4a9e6f54d509a86a72dae1da
Author: Harald van Dijk <hdijk at accesssoftek.com>
Date: 2026-05-28 (Thu, 28 May 2026)
Changed paths:
M llvm/lib/Target/DirectX/DXILWriter/DXILBitcodeWriter.cpp
M llvm/lib/Target/DirectX/DirectXIRPasses/PointerTypeAnalysis.cpp
A llvm/test/tools/dxil-dis/dbg-declare-undef.ll
Log Message:
-----------
[DirectX] Handle undef the same way as null (#197507)
Commit: 9cc6c9375faa11722435a150c9829df2452b48ca
https://github.com/llvm/llvm-project/commit/9cc6c9375faa11722435a150c9829df2452b48ca
Author: Wenju He <wenju.he at intel.com>
Date: 2026-05-28 (Thu, 28 May 2026)
Changed paths:
M libclc/clc/include/clc/relational/clc_signbit.h
M libclc/clc/lib/generic/relational/clc_signbit.cl
A libclc/clc/lib/generic/relational/clc_signbit.inc
Log Message:
-----------
[libclc] Optimize and vectorize signbit (#199497)
Replace element-wise scalarizing implementation with bitcast and shift.
For example,
define hidden range(i32 -1, 1) <2 x i32> @_Z7signbitDv2_f(<2 x float>
noundef %0) #0 {
%2 = bitcast <2 x float> %0 to <2 x i32>
%3 = extractelement <2 x i32> %2, i64 0
%4 = lshr i32 %3, 31
%5 = insertelement <2 x i32> poison, i32 %4, i64 0
%6 = extractelement <2 x i32> %2, i64 1
%7 = lshr i32 %6, 31
%8 = insertelement <2 x i32> %5, i32 %7, i64 1
%9 = icmp ne <2 x i32> %8, zeroinitializer
%10 = sext <2 x i1> %9 to <2 x i32>
ret <2 x i32> %10
}
is changed to:
define hidden noundef range(i32 -1, 1) <2 x i32> @_Z7signbitDv2_f(<2 x
float> noundef %0) #0 {
%2 = bitcast <2 x float> %0 to <2 x i32>
%3 = ashr <2 x i32> %2, splat (i32 31)
ret <2 x i32> %3
}
Commit: 1a5822e3c9421fd0a270e7bad3dff92219dd9da3
https://github.com/llvm/llvm-project/commit/1a5822e3c9421fd0a270e7bad3dff92219dd9da3
Author: Adrian Vogelsgesang <avogelsgesang at salesforce.com>
Date: 2026-05-28 (Thu, 28 May 2026)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/test/CodeGenCoroutines/coro-gro4.cpp
M clang/test/CodeGenCoroutines/coro-symmetric-transfer-03.cpp
M clang/test/CodeGenCoroutines/coro-symmetric-transfer-04.cpp
M clang/test/CodeGenCoroutines/pr65018.cpp
M llvm/docs/Coroutines.rst
M llvm/docs/ReleaseNotes.md
M llvm/include/llvm/Transforms/Coroutines/CoroShape.h
M llvm/lib/Transforms/Coroutines/CoroCleanup.cpp
M llvm/lib/Transforms/Coroutines/CoroEarly.cpp
M llvm/lib/Transforms/Coroutines/CoroSplit.cpp
M llvm/test/Transforms/Coroutines/coro-alloc-with-param-O0.ll
M llvm/test/Transforms/Coroutines/coro-alloc-with-param-O2.ll
M llvm/test/Transforms/Coroutines/coro-alloca-07.ll
M llvm/test/Transforms/Coroutines/coro-await-suspend-handle-in-ramp.ll
M llvm/test/Transforms/Coroutines/coro-await-suspend-lower-invoke.ll
M llvm/test/Transforms/Coroutines/coro-await-suspend-lower.ll
M llvm/test/Transforms/Coroutines/coro-debug-O2.ll
M llvm/test/Transforms/Coroutines/coro-debug-coro-frame.ll
M llvm/test/Transforms/Coroutines/coro-debug-dbg.values-not_used_in_frame.ll
M llvm/test/Transforms/Coroutines/coro-debug-frame-variable.ll
M llvm/test/Transforms/Coroutines/coro-debug-spill-dbg.declare.ll
M llvm/test/Transforms/Coroutines/coro-debug.ll
M llvm/test/Transforms/Coroutines/coro-eh-aware-edge-split-00.ll
M llvm/test/Transforms/Coroutines/coro-eh-aware-edge-split-01.ll
M llvm/test/Transforms/Coroutines/coro-eh-aware-edge-split-02.ll
M llvm/test/Transforms/Coroutines/coro-frame-arrayalloca.ll
M llvm/test/Transforms/Coroutines/coro-frame.ll
M llvm/test/Transforms/Coroutines/coro-noop-pacbti.ll
M llvm/test/Transforms/Coroutines/coro-noop.ll
M llvm/test/Transforms/Coroutines/coro-padding.ll
M llvm/test/Transforms/Coroutines/coro-resume-destroy.ll
M llvm/test/Transforms/Coroutines/coro-spill-corobegin.ll
M llvm/test/Transforms/Coroutines/coro-spill-promise-02.ll
M llvm/test/Transforms/Coroutines/coro-spill-promise.ll
M llvm/test/Transforms/Coroutines/coro-spill-suspend.ll
M llvm/test/Transforms/Coroutines/coro-split-dbg-labels-inlined.ll
M llvm/test/Transforms/Coroutines/coro-split-dbg-labels.ll
M llvm/test/Transforms/Coroutines/coro-split-eh-00.ll
M llvm/test/Transforms/Coroutines/coro-split-eh-01.ll
M llvm/test/Transforms/Coroutines/coro-split-musttail-chain-pgo-counter-promo.ll
M llvm/test/Transforms/Coroutines/coro-split-musttail.ll
M llvm/test/Transforms/Coroutines/coro-split-musttail1.ll
M llvm/test/Transforms/Coroutines/coro-split-musttail2.ll
M llvm/test/Transforms/Coroutines/coro-split-musttail3.ll
M llvm/test/Transforms/Coroutines/coro-split-musttail4.ll
M llvm/test/Transforms/Coroutines/coro-split-musttail5.ll
M llvm/test/Transforms/Coroutines/coro-split-musttail6.ll
M llvm/test/Transforms/Coroutines/coro-split-musttail7.ll
M llvm/test/Transforms/Coroutines/coro-split-sink-lifetime-01.ll
M llvm/test/Transforms/Coroutines/coro-split-sink-lifetime-02.ll
M llvm/test/Transforms/Coroutines/coro-split-sink-lifetime-03.ll
M llvm/test/Transforms/Coroutines/coro-split-sink-lifetime-04.ll
M llvm/test/Transforms/Coroutines/coro-split-tbaa-md.ll
M llvm/test/Transforms/Coroutines/coro-zero-alloca.ll
Log Message:
-----------
[coro] Use C calling convention for C++20 coroutines (#198943)
Change the calling convention for resume / destroy functions of C++
coroutines from `fastcc` to the C calling convention.
The resume / destroy functions are exposed as part of the coroutine ABI
and must be compatible with other compilers and other versions of LLVM.
fastcc is an LLVM-internal, unstable calling convention, though.
In practice, fastcc and the C calling convention are in sync for `void
func(void*)` function signatures on almost all platforms. Therefore, I
think we can still do this change without widespread ABI breakage.
`fastcc` and `ccc` do differ for i686 (x86-32), MIPS O32, PowerPC64
ELFv1 and Lanai. Afaik, those are all legacy ABIs and a recent feature
like C++20 coroutines is unlikely to be used by projects still targeting
legacy ABIs.
Historical context: I tried to figure out why `fastcc` was used. It is
around since the original commit f93082e71a94 from 2016, predating the
cross-vendor coroutine ABI work. I could not find any discussion of
whether this should use `fastcc` on the review or on the mailing list.
As a side-effect, this also fixes #91123.
Co-authored-by: Cursor <cursoragent at cursor.com>
Commit: 830c8d625421ed5e86c73acb523f92ee4e39ee84
https://github.com/llvm/llvm-project/commit/830c8d625421ed5e86c73acb523f92ee4e39ee84
Author: Derek Schuff <dschuff at chromium.org>
Date: 2026-05-28 (Thu, 28 May 2026)
Changed paths:
A llvm/test/tools/llvm-symbolizer/Inputs/wasm-basic.yaml
R llvm/test/tools/llvm-symbolizer/lit.local.cfg
M llvm/test/tools/llvm-symbolizer/wasm-basic.s
Log Message:
-----------
test(llvm-symbolizer): fix Wasm layering violation by using YAML (#200080)
Avoid using wasm-ld in LLVM tests by prebuilding the test binary
as a YAML file and using yaml2obj at test time.
This matches the approach taken in
4bce216e6b550c770f2e536422c3d95333f65ba3.
Because yaml2obj always uses 5-byte LEBs, the CODE section offset
shifted from 0x37 to 0x4b, so the file offsets passed to llvm-symbolizer
were updated accordingly.
Replaces #200046
Assisted-by: Gemini
Commit: 740e52bc99696661f357d4feb975f0209082cea9
https://github.com/llvm/llvm-project/commit/740e52bc99696661f357d4feb975f0209082cea9
Author: Harald van Dijk <hdijk at accesssoftek.com>
Date: 2026-05-28 (Thu, 28 May 2026)
Changed paths:
M llvm/lib/Target/DirectX/DirectXIRPasses/DXILDebugInfo.cpp
A llvm/test/tools/dxil-dis/di-label.ll
Log Message:
-----------
[DirectX] Drop debug labels (#197490)
Debug labels did not exist in LLVM 3.7 and have no equivalent.
Commit: d65897289e68696fa5f5b2d2f449f7633fff13ab
https://github.com/llvm/llvm-project/commit/d65897289e68696fa5f5b2d2f449f7633fff13ab
Author: Ryosuke Niwa <rniwa at webkit.org>
Date: 2026-05-27 (Wed, 27 May 2026)
Changed paths:
M clang/lib/StaticAnalyzer/Checkers/WebKit/RawPtrRefLocalVarsChecker.cpp
M clang/test/Analysis/Checkers/WebKit/uncounted-local-vars.cpp
M clang/test/Analysis/Checkers/WebKit/unretained-local-vars.mm
Log Message:
-----------
[alpha.webkit.UncountedLocalVarsChecker] Detect an assignment to a guardian argument (#198695)
A function parameter of type RefPtr<T>& should not be used as a guardian
variable of a raw pointer/reference variable if the function body
contains an assignment to it since such an assignment can shorten the
lifetime of the guarded object.
Commit: dbe6800baeec47c538f95421348c6c62a38f061c
https://github.com/llvm/llvm-project/commit/dbe6800baeec47c538f95421348c6c62a38f061c
Author: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
Date: 2026-05-27 (Wed, 27 May 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCCodeEmitter.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
M llvm/test/CodeGen/AMDGPU/arbitrary-fp-to-float.ll
M llvm/test/CodeGen/AMDGPU/br_cc.f16.ll
M llvm/test/CodeGen/AMDGPU/call-argument-types.ll
M llvm/test/CodeGen/AMDGPU/code-size-estimate.ll
M llvm/test/CodeGen/AMDGPU/commute-compares-scalar-float.ll
M llvm/test/CodeGen/AMDGPU/dagcombine-fmul-sel.ll
M llvm/test/CodeGen/AMDGPU/extract-subvector-16bit.ll
M llvm/test/CodeGen/AMDGPU/fcanonicalize.bf16.ll
M llvm/test/CodeGen/AMDGPU/fcanonicalize.f16.ll
M llvm/test/CodeGen/AMDGPU/fmed3.bf16.ll
M llvm/test/CodeGen/AMDGPU/fmul-to-ldexp.ll
M llvm/test/CodeGen/AMDGPU/gfx-callable-argument-types.ll
M llvm/test/CodeGen/AMDGPU/imm16.ll
M llvm/test/CodeGen/AMDGPU/immv216.ll
M llvm/test/CodeGen/AMDGPU/llvm.fptrunc.round.ll
M llvm/test/CodeGen/AMDGPU/llvm.round.ll
M llvm/test/CodeGen/AMDGPU/lround.ll
M llvm/test/CodeGen/AMDGPU/mad-mix-hi.ll
M llvm/test/CodeGen/AMDGPU/select-fabs-fneg-extract.f16.ll
M llvm/test/CodeGen/AMDGPU/select-fabs-fneg-extract.v2f16.ll
M llvm/test/CodeGen/AMDGPU/select.f16.ll
M llvm/test/CodeGen/AMDGPU/shrink-add-sub-constant.ll
M llvm/test/CodeGen/AMDGPU/true16-imm-folded-to-0-regression.ll
M llvm/test/MC/AMDGPU/gfx1150_asm_salu_float.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp8.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_from_vopc.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopc.s
M llvm/test/MC/AMDGPU/gfx12_asm_sopc.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop1-fake16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop1.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3c.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopc.s
M llvm/test/MC/AMDGPU/gfx13_asm_sopc.s
M llvm/test/MC/AMDGPU/gfx13_asm_vop1.s
M llvm/test/MC/AMDGPU/gfx13_asm_vop1_t16_promote.s
M llvm/test/MC/AMDGPU/gfx13_asm_vop3-fake16.s
M llvm/test/MC/AMDGPU/gfx13_asm_vop3.s
M llvm/test/MC/AMDGPU/gfx13_asm_vop3_from_vop1-fake16.s
M llvm/test/MC/AMDGPU/gfx13_asm_vop3_from_vop1.s
M llvm/test/MC/AMDGPU/literals.s
M llvm/test/MC/AMDGPU/vop3-gfx10.s
M llvm/test/MC/Disassembler/AMDGPU/gfx10_vop1.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx10_vop3.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx10_vop3c.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx10_vop3cx.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx10_vopc.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx10_vopcx.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx1150_dasm_salu_float.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop1.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_from_vop1.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_from_vopc.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_from_vopcx.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vopc.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vopcx.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop3.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop3_from_vop1.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop3cx.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_sopc.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3_from_vop1.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3c.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3cx.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3cx_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vopc.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vopcx.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx8_vop1.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx8_vop2.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx8_vop3.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx8_vop3c.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx8_vop3cx.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx8_vopc.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx8_vopcx.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx9_vop1.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx9_vop2.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx9_vop3.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx9_vop3c.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx9_vop3cx.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx9_vopc.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx9_vopcx.txt
Log Message:
-----------
[AMDGPU] This reverts patches to use fp16 inline constants for i16 (#200091)
Patches reverted:
commit c315c662cd2d33e0c7f962fed742ee53626d8005
Author: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
Date: Wed May 27 12:51:13 2026
[AMDGPU] Fix codesize estimate after #198005 (#200033)
This fixes failure in libc tests which checks the exact encoding
size. Encoding is now shorter, but it did not recognize fp16
immediates as an inlinable constant and assumes literal encoding.
Shorter encodings were created here:
https://github.com/llvm/llvm-project/pull/198005
commit 2b3bc03b5ef00e7eaa245420ca981c700e1c05c4
Author: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
Date: Wed May 27 10:55:36 2026
[AMDGPU] Use shorter form for i16 operands (#198005)
For 16-bit operands an inline constant is zero extended
which in particular allows to use FP constants. These
will have 16 bits of zeroes in the high half and FP16
value in the low 16 bits.
The patch changes semantics of the FP literal argument
used in i16 context in the asm parser to fp16.
Apparently this breaks some libc tests with bf16. I do not know
why, these were not supposed to be affected. Reverting for now.
Failed tests: https://lab.llvm.org/buildbot/#/builders/10/builds/29005
Commit: 0381a09309c6fc1e8aec031580ef5d2396143c79
https://github.com/llvm/llvm-project/commit/0381a09309c6fc1e8aec031580ef5d2396143c79
Author: Ryan Buchner <rbuchner at qti.qualcomm.com>
Date: 2026-05-27 (Wed, 27 May 2026)
Changed paths:
A llvm/test/Transforms/SLPVectorizer/RISCV/runtime-strided-stores.ll
Log Message:
-----------
[SLP] Precommit tests for runtime strided stores (#200019)
Accompanies #200018
Commit: 5b17cdb0b5827d8423470084e6004c5686d9cb2a
https://github.com/llvm/llvm-project/commit/5b17cdb0b5827d8423470084e6004c5686d9cb2a
Author: SiHuaN <liyongtai at iscas.ac.cn>
Date: 2026-05-28 (Thu, 28 May 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/test/CodeGen/RISCV/rvp-narrowing-shift-trunc.ll
M llvm/test/CodeGen/RISCV/rvp-simd-64.ll
Log Message:
-----------
[RISCV][P-ext] Split v4i16/v8i8 INSERT/EXTRACT_VECTOR_ELT on RV32. (#199917)
With a constant lane index, split the vector and recurse on the
single-GPR half containing Idx (already Custom-lowered).
Commit: 6619c82f729487ada200a074c72f7260511bb23e
https://github.com/llvm/llvm-project/commit/6619c82f729487ada200a074c72f7260511bb23e
Author: Sudharsan Veeravalli <svs at qti.qualcomm.com>
Date: 2026-05-28 (Thu, 28 May 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVMoveMerger.cpp
A llvm/test/CodeGen/RISCV/move-merge-zdinx-mvsa-regression.mir
Log Message:
-----------
[RISCV] Fix incorrect CM.MVSA01/QC_CM_MVSA01 generation with Zdinx (#200000)
The `RISCVMoveMerger` pass was incorrectly forming
`CM_MVSA01/QC_CM_MVSA01` when `Zdinx` was enabled. The pass attempted CM
merge for copy pairs even when the first copy was not an `a0/a1-based`
CM candidate.
Fix by only running `findMatchingInst` when the current copy is a valid
CM candidate.
Commit: f9185454a9a70fd351cb8a1ba3b2b3e33e064c06
https://github.com/llvm/llvm-project/commit/f9185454a9a70fd351cb8a1ba3b2b3e33e064c06
Author: lijinpei-amd <jinpli at amd.com>
Date: 2026-05-27 (Wed, 27 May 2026)
Changed paths:
M clang/include/clang/Sema/Sema.h
M clang/include/clang/Sema/SemaObjC.h
M clang/lib/Sema/SemaAMDGPU.cpp
M clang/lib/Sema/SemaExpr.cpp
M clang/lib/Sema/SemaExprObjC.cpp
A clang/test/AST/ast-print-amdgcn-predicate.c
Log Message:
-----------
[clang][AMDGPU] Fix -ast-print crash on expanded predicate builtins (#199963)
ExpandAMDGPUPredicateBuiltIn synthesized an IntegerLiteral typed
_Bool/bool — a shape no other producer creates, and one that
StmtPrinter::VisitIntegerLiteral has no case for. -ast-print on the
resulting if-condition hit llvm_unreachable.
Emit the canonical boolean literal instead:
- C++, C23, OpenCL, HIP: CXXBoolLiteralExpr 'bool'
- pre-C23 C: IntegerLiteral 'int'
In the C case this matches what <stdbool.h>'s true/false macros expand
to.
Fixes #199563
Commit: 2d5dac5b816726621d08ac695ed0b9799dfb7209
https://github.com/llvm/llvm-project/commit/2d5dac5b816726621d08ac695ed0b9799dfb7209
Author: Jordan Rupprecht <rupprecht at google.com>
Date: 2026-05-28 (Thu, 28 May 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/compiler-rt/BUILD.bazel
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
Log Message:
-----------
[Bazel] Fixes 5db1364 (#200104)
The commit added a dep from profile -> interception, so define that
target too
Fixes 5db13643f4b7038db0ca304d9f8900122502935c
Commit: 635e120fb87304924508a7a204574727e3c37363
https://github.com/llvm/llvm-project/commit/635e120fb87304924508a7a204574727e3c37363
Author: Yaxun (Sam) Liu <yaxun.liu at amd.com>
Date: 2026-05-27 (Wed, 27 May 2026)
Changed paths:
M compiler-rt/lib/profile/InstrProfilingFile.c
M compiler-rt/lib/profile/InstrProfilingPlatformROCm.cpp
Log Message:
-----------
[PGO][HIP] Stop pulling ROCm.o into every PGO host link (#200101)
PR #177665 added an unconditional `extern` reference to
`__llvm_profile_hip_collect_device_data` from `InstrProfilingFile.c`,
which forces `InstrProfilingPlatformROCm.o` (and its sanitizer_common /
interception dependencies) out of `libclang_rt.profile.a` in every PGO
binary. That breaks bots without `-lpthread` and races dlsym/PLT state
in non-HIP programs via the interceptor constructor.
Fix:
- Declare the hook `COMPILER_RT_WEAK` and gate the call on its address.
No `COMPILER_RT_VISIBILITY`: a hidden weak-undef function would be
non-preemptible and the address test would fold to true.
- Gate `installHipModuleInterceptors` on `dlsym(hipModuleLoad)` so the
constructor is a no-op if `ROCm.o` is still pulled in.
Fixes:
- https://lab.llvm.org/buildbot/#/builders/66/builds/31311
- https://lab.llvm.org/buildbot/#/builders/174/builds/36180
Verified:
- `check-profile` 134/134 pass.
- `nm` on a non-HIP `clang -fprofile-generate` binary: zero
`installHip`/`ROCm`/`sanitizer`/`hip_collect` symbols.
- HIP offload PGO end-to-end on gfx1101 (compile → run → `llvm-profdata
merge` → `llvm-cov`) still works; interceptor installs, device profile
collected via shared API.
Commit: d5e97d77289c59d785284e6a0361570a1651acd6
https://github.com/llvm/llvm-project/commit/d5e97d77289c59d785284e6a0361570a1651acd6
Author: Haohai Wen <haohai.wen at intel.com>
Date: 2026-05-28 (Thu, 28 May 2026)
Changed paths:
M clang/lib/Driver/ToolChains/CommonArgs.cpp
M clang/test/Driver/split-debug.c
Log Message:
-----------
[Driver] Honor /Fo when deriving the split-dwarf .dwo path (#199613)
SplitDebugName checked -o and /o but not /Fo, so clang-cl /Fo<path> /c
fell through to the cwd-relative fallback and every .dwo landed in cwd
under <source-stem>.dwo regardless of the .obj location.
Commit: a20e85f74d7a3f1bc29cb80fa6d47cf74e9f2aa0
https://github.com/llvm/llvm-project/commit/a20e85f74d7a3f1bc29cb80fa6d47cf74e9f2aa0
Author: Matheus Izvekov <mizvekov at gmail.com>
Date: 2026-05-28 (Thu, 28 May 2026)
Changed paths:
A clang/test/CXX/basic/basic.link/p11.cpp
Log Message:
-----------
[clang] NFC: add test cases from #111561 (#200105)
This adds those test cases while #111561 gathers dust.
Commit: da4894c874edb5fc9b9b82a8a99ed471a49153bf
https://github.com/llvm/llvm-project/commit/da4894c874edb5fc9b9b82a8a99ed471a49153bf
Author: Arda Serdar Pektezol <arda at pektezol.dev>
Date: 2026-05-28 (Thu, 28 May 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/LoopFuse.cpp
M llvm/test/Transforms/LoopFusion/loop_invariant.ll
A llvm/test/Transforms/LoopFusion/pr191238.ll
Log Message:
-----------
[LoopFusion] reject unsafe scalar flow dependences (#195895)
`loop-fusion` treats any loop-invariant scalar non-anti dependence as
safe to fuse. In the linked issue, it incorrectly allows scalar flow
dependences where the first loop writes a loop-invariant location and
the second loop later reads that same location. Fusion interleaves the
producer and consumer and this changes the value observed by the second
loop.
Example C source would look like:
```C
for (int i = 0; i < N; i++) {
ptr[0] = i;
}
for (int j = 0; j < N; j++) {
out[j] = ptr[0];
}
=>
for (int i = 0; i < N; i++) {
ptr[0] = i;
out[i] = ptr[0];
}
```
This patch makes the DA scalar-dependence shortcut **_more
conservative_** by rejecting scalar non-anti and allowing input/output
dependences. This preserves the existing safe read and write cases while
preventing the miscompile above.
The patch also updates the `loop-fusion` debug message to reflect the
narrower accepted case, updates the existing regression to check the new
debug message, and adds a new regression from the linked issue.
Fixes #191238
Commit: 5acb952cb5d9c899692f44f4280af75a780a599c
https://github.com/llvm/llvm-project/commit/5acb952cb5d9c899692f44f4280af75a780a599c
Author: Yaxun (Sam) Liu <yaxun.liu at amd.com>
Date: 2026-05-27 (Wed, 27 May 2026)
Changed paths:
M clang/lib/Driver/ToolChains/Clang.cpp
A clang/test/CodeGenHIP/profile-coverage-mapping.hip
M clang/test/Driver/hip-options.hip
Log Message:
-----------
[HIP][Driver] Forward -fcoverage-mapping flags to device compiler (#198872)
Add `-fcoverage-mapping`, `-fno-coverage-mapping`,
`-fcoverage-compilation-dir=`, `-ffile-compilation-dir=`, and
`-fcoverage-prefix-map=` to the LinkerWrapper `CompilerOptions`
forwarding list. Without this, passing `-fprofile-instr-generate
-fcoverage-mapping` to clang for a HIP program silently omits the
coverage mapping flags from the embedded device recompilation, so
`__llvm_covmap`/`__llvm_covfun` sections are never emitted for device
code.
Commit: 846bfd77ddc44ef76882fd165fa4d5b68b760456
https://github.com/llvm/llvm-project/commit/846bfd77ddc44ef76882fd165fa4d5b68b760456
Author: Zeyi Xu <mitchell.xu2 at gmail.com>
Date: 2026-05-28 (Thu, 28 May 2026)
Changed paths:
M clang/include/clang/Analysis/Analyses/LifetimeSafety/FactsGenerator.h
M clang/lib/Analysis/LifetimeSafety/FactsGenerator.cpp
M clang/test/Sema/warn-lifetime-safety.cpp
Log Message:
-----------
[LifetimeSafety] Avoid assert on variadic placement new (#199588)
Avoid assuming that a placement allocation function has a second
`ParmVarDecl` before checking whether that parameter is `void*`.
Variadic `operator new(size_t, ...)` can have a placement argument
matched by the ellipsis instead.
As of AI Usage: Codex is used to help rephrase part of the new comments.
Closes https://github.com/llvm/llvm-project/issues/199584
Commit: 1da70ad6da64e5737aae1b8aad1bc97a36bbe1cf
https://github.com/llvm/llvm-project/commit/1da70ad6da64e5737aae1b8aad1bc97a36bbe1cf
Author: Gaurav Dhingra <gauravdhingra.gxyd at gmail.com>
Date: 2026-05-28 (Thu, 28 May 2026)
Changed paths:
M clang-tools-extra/clang-tidy/readability/RedundantParenthesesCheck.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/test/clang-tidy/checkers/readability/redundant-parentheses.cpp
Log Message:
-----------
[clang-tidy] Fix false positive of parentheses removal for overloaded operator (#192254)
Fixes #189217
don't remove necessary parentheses for an overloaded operator, when
the parenthese occurs in the context of a binary operation
E.g. (E1 & E2) != E3 // the brackets aren't redundant here
E.g. (E1 & E2) // brackets are redundant here
Commit: 48a1ee7bc8e1d740edf635c39e0223b9b02a6ae1
https://github.com/llvm/llvm-project/commit/48a1ee7bc8e1d740edf635c39e0223b9b02a6ae1
Author: Dark Steve <Prasoon.Mishra at amd.com>
Date: 2026-05-28 (Thu, 28 May 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.h
M llvm/test/CodeGen/AMDGPU/flat-saddr-atomics.ll
M llvm/test/CodeGen/AMDGPU/wait-xcnt-drain.mir
M llvm/test/CodeGen/AMDGPU/wait-xcnt.mir
Log Message:
-----------
[AMDGPU] Remove redundant s_wait_xcnt after implicit XCNT drains (#198823)
On gfx1250 several instructions implicitly drain XCNT in hardware:
`s_barrier_wait`/`signal`/`signal_isfirst`, `s_sendmsg`, PC-changes etc.
This patch will remove redundant `s_wait_xcnt` after implicit XCNT
drains.
Pre-commit tests on #198772
Fix: LCOMPILER-1665
Commit: 9cd3c0b99e5df66adcc96a2fc03b9b177d6ca487
https://github.com/llvm/llvm-project/commit/9cd3c0b99e5df66adcc96a2fc03b9b177d6ca487
Author: Helena Kotas <hekotas at microsoft.com>
Date: 2026-05-27 (Wed, 27 May 2026)
Changed paths:
M clang/lib/CodeGen/CGExpr.cpp
M clang/lib/CodeGen/CGExprAgg.cpp
M clang/lib/CodeGen/CGHLSLRuntime.cpp
M clang/lib/CodeGen/CGHLSLRuntime.h
A clang/test/CodeGenHLSL/resources/res-array-global-to-local.hlsl
M clang/test/CodeGenHLSL/resources/res-array-local2.hlsl
M clang/test/CodeGenHLSL/resources/resource-bindings.hlsl
A clang/test/CodeGenHLSL/resources/resources-in-structs-array-to-local.hlsl
Log Message:
-----------
[HLSL] Codegen for handling global resource array initialization (#198891)
When a global resource array is accessed - whether it is declared at a
global scope or as part of a global struct instance - all of its
resource elements should be initialized from binding into a temporary
local resource array. This change intercepts the Clang codegen at the
relevant places to allow `CGHLSLRuntime` handle this special global
resource array initialization.
Fixes #187087
Fixes #198888
Commit: 690a25fd5b0bf7118370efbc681661a24a40b83a
https://github.com/llvm/llvm-project/commit/690a25fd5b0bf7118370efbc681661a24a40b83a
Author: eleviant <eleviant at accesssoftek.com>
Date: 2026-05-28 (Thu, 28 May 2026)
Changed paths:
M clang/lib/CodeGen/CGBuiltin.cpp
A clang/test/CodeGen/AArch64/mskernel-interlocked.c
A clang/test/CodeGen/X86/mskernel-interlocked.c
M llvm/lib/CodeGen/AtomicExpandPass.cpp
A llvm/test/CodeGen/X86/volatile-atomicrmw.ll
Log Message:
-----------
[clang] Don't optimize out no-op atomics in kernel mode (#193562)
The no-op atomics like InterlockedAnd(addr, (UINT32)-1) don't modify
the underlying value, however kernel code depends on these accesses
to touch the pool page virtual address and intentionally trigger a page
fault during page migration. This patch also fixes an LLVM issue where
idempotent volatile atomics were incorrectly lowered into memory fences.
Commit: 8059bc5944b72f3f6f3734ef61bf9eb89ca850a4
https://github.com/llvm/llvm-project/commit/8059bc5944b72f3f6f3734ef61bf9eb89ca850a4
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-05-28 (Thu, 28 May 2026)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ByteCode/Interp.cpp
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
M clang/test/AST/ByteCode/cxx11.cpp
Log Message:
-----------
[clang][bytecode] Fix a diagnostic difference in bitcasts (#197174)
Don't immediately return failure and let it be handled by later checks.
Commit: 191aa295d9c9fe83411ae5cdfeb8a6bb8decb3d2
https://github.com/llvm/llvm-project/commit/191aa295d9c9fe83411ae5cdfeb8a6bb8decb3d2
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-05-28 (Thu, 28 May 2026)
Changed paths:
M llvm/docs/LangRef.rst
Log Message:
-----------
[LangRef] Do not allow free via synchronization in nofree (#195658)
The nofree attribute is currently specified to only forbid direct free
calls inside the function. A nofree function is still allowed to compel
a pointer to be freed by a different thread through synchronization.
This is currently only spelled out for the function-level nofree
attribute, but I assume the same semantics also hold for argument nofree
(and this matches how the Attributor implementation infers it).
The original motivation for this definition was to keep the attributes
orthogonal and independently inferable. However, the problem is that
nosync is a too strong condition: It excludes *any* synchronization, not
just synchronization that results in the free of a pointer.
Some frontends like Rust can guarantee that most pointer arguments
cannot be freed for the duration of a function call, including via
synchronization. However, they cannot guarantee that no synchronization
takes place at all. The current definition of nofree makes this
inexpressible in LLVM IR, which blocks further progress on
dereferenceable-at-point semantics.
This PR makes two changes to the nofree spec:
* Function-level nofree now disallows free via synchronization,
specified in terms of happens-before.
* Argument-level nofree is now specified in terms of provenance: The
argument has derived provenance that makes it UB to free during the
execution of the function (which includes freeing on another thread with
appropriate synchronization). This also clarified that argument-level
nofree only applies to the particular pointer (similar to `captures`
etc). The underlying object may still be freed via a different argument
to which the same pointer is passed.
Note: The necessary inference changes for the new semantics will
be implemented in a separate PR.
Commit: 486370c33fbd75247ef608a2ebc04ddaefd2ab46
https://github.com/llvm/llvm-project/commit/486370c33fbd75247ef608a2ebc04ddaefd2ab46
Author: Sameer Sahasrabuddhe <sameer.sahasrabuddhe at amd.com>
Date: 2026-05-28 (Thu, 28 May 2026)
Changed paths:
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/lib/Sema/SemaAMDGPU.cpp
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx1250-cooperative-atomics.cl
Log Message:
-----------
[AMDGPU][Clang] refactor addrspace and scope checks [NFC] (#199175)
Assisted-By: Claude Opus 4.6
Commit: 942292bf75168377cc06dfa2ba90a552d6d24a69
https://github.com/llvm/llvm-project/commit/942292bf75168377cc06dfa2ba90a552d6d24a69
Author: Lang Hames <lhames at gmail.com>
Date: 2026-05-28 (Thu, 28 May 2026)
Changed paths:
M orc-rt/include/orc-rt/NativeDylibManager.h
M orc-rt/lib/executor/NativeDylibManager.cpp
M orc-rt/lib/executor/sps-ci/NativeDylibManagerSPSCI.cpp
M orc-rt/unittests/NativeDylibManagerSPSCITest.cpp
M orc-rt/unittests/NativeDylibManagerTest.cpp
Log Message:
-----------
[orc-rt] Remove NativeDylibManager unload operation. (#200119)
NativeDylibManager is intended to act as a backend for
llvm::orc::DylibManager, which does not expose an unload operation. This
commit removes the explicit unload from both the C++ and SPS interfaces,
and unloads dylibs via an on-shutdown callback instead.
Commit: 6ed05a0b53dc777408305333dcbeec9dac4ea687
https://github.com/llvm/llvm-project/commit/6ed05a0b53dc777408305333dcbeec9dac4ea687
Author: Oleksandr Tarasiuk <oleksandr.tarasiuk at outlook.com>
Date: 2026-05-28 (Thu, 28 May 2026)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/SemaDecl.cpp
M clang/test/SemaCXX/constant-expression-cxx14.cpp
Log Message:
-----------
Revert "[Clang] prevent constexpr crash on invalid overrides" (#199895)
Reverts #184048
---
The original change marks invalid overrides too early, causing follow-up
Sema regressions in special-member handling and MS-compatible override
diagnostics.
Commit: 91d765f6ab10974f2c7080c90fe26b21bd7d7cb1
https://github.com/llvm/llvm-project/commit/91d765f6ab10974f2c7080c90fe26b21bd7d7cb1
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-05-28 (Thu, 28 May 2026)
Changed paths:
M clang/test/CodeGen/sanitize-metadata-nosanitize.c
M llvm/lib/Transforms/IPO/AttributorAttributes.cpp
M llvm/lib/Transforms/IPO/FunctionAttrs.cpp
M llvm/test/Transforms/Attributor/align-atomic.ll
M llvm/test/Transforms/Attributor/align.ll
M llvm/test/Transforms/Attributor/liveness.ll
M llvm/test/Transforms/Attributor/noalias.ll
M llvm/test/Transforms/Attributor/nocapture-1.ll
M llvm/test/Transforms/Attributor/nocapture-2.ll
M llvm/test/Transforms/Attributor/nofpclass.ll
M llvm/test/Transforms/Attributor/nonnull.ll
M llvm/test/Transforms/Attributor/nosync.ll
M llvm/test/Transforms/Attributor/range.ll
M llvm/test/Transforms/Attributor/readattrs.ll
M llvm/test/Transforms/Attributor/undefined_behavior.ll
M llvm/test/Transforms/Attributor/value-simplify-instances.ll
M llvm/test/Transforms/Attributor/value-simplify-pointer-info-struct.ll
M llvm/test/Transforms/Attributor/value-simplify-pointer-info.ll
M llvm/test/Transforms/Attributor/value-simplify.ll
M llvm/test/Transforms/FunctionAttrs/atomic.ll
M llvm/test/Transforms/FunctionAttrs/nocapture.ll
M llvm/test/Transforms/FunctionAttrs/nonnull.ll
M llvm/test/Transforms/FunctionAttrs/nosync.ll
M llvm/test/Transforms/FunctionAttrs/readattrs.ll
M llvm/test/Transforms/FunctionAttrs/writeonly.ll
M llvm/test/Transforms/OpenMP/parallel_deletion.ll
Log Message:
-----------
[FunctionAttrs][Attributor] Update nofree inference (#196266)
This updates nofree inference after the semantics changes in
https://github.com/llvm/llvm-project/pull/195658.
FunctionAttrs currently only supports function-level nofree inference,
so we just need to check for potentially synchronizing instructions.
Attributor also supports argument nofree, in which case we make
additional changes:
* For callsite arguments, in addition to checking nofree, we also need
to check nocapture. If the call itself doesn't free the arg, it may
still capture it and then we may free it via the captured pointer later.
The way this was handled was already incorrect prior to the semantics
changes.
* Reformulate the handling for other instructions in terms of looking
for provenance captures, as that's what the code was essentially doing,
in a crude way. I'm including this to avoid some regressions for cases
where we can no longer infer function nofree, but can still infer
argument nofree.
Commit: 35bfc00c5c8db8b5895b83045bbd9562691c0af1
https://github.com/llvm/llvm-project/commit/35bfc00c5c8db8b5895b83045bbd9562691c0af1
Author: Iris Shi <0.0 at owo.li>
Date: 2026-05-28 (Thu, 28 May 2026)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
M llvm/test/Transforms/InstCombine/or-bitmask.ll
Log Message:
-----------
[InstCombine] Fix type mismatch in `foldBitmaskMul` (#199920)
Resolves #199506.
`matchBitmaskMul` matches the form `!(A & N) ? 0 : N * C`.
When the select arms are splat vectors but A is a scalar, this produces
malformed ir like `%57 = and i64 %49, <4 x i64> splat (i64
3689348814741910323)`.
Reproducer: https://godbolt.org/z/EYzKTxcKn
Commit: 4306b4ab9c12a8b9bf4314cbaa7400eeaa1e7ddc
https://github.com/llvm/llvm-project/commit/4306b4ab9c12a8b9bf4314cbaa7400eeaa1e7ddc
Author: William Tran-Viet <wtranviet at proton.me>
Date: 2026-05-28 (Thu, 28 May 2026)
Changed paths:
M libcxx/docs/ReleaseNotes/23.rst
M libcxx/docs/Status/Cxx2cPapers.csv
M libcxx/include/__memory/ranges_uninitialized_algorithms.h
M libcxx/include/__memory/uninitialized_algorithms.h
M libcxx/test/std/utilities/memory/specialized.algorithms/uninitialized.construct.value/ranges_uninitialized_value_construct.pass.cpp
M libcxx/test/std/utilities/memory/specialized.algorithms/uninitialized.construct.value/ranges_uninitialized_value_construct_n.pass.cpp
M libcxx/test/std/utilities/memory/specialized.algorithms/uninitialized.construct.value/uninitialized_value_construct.pass.cpp
M libcxx/test/std/utilities/memory/specialized.algorithms/uninitialized.construct.value/uninitialized_value_construct_n.pass.cpp
M libcxx/test/std/utilities/memory/specialized.algorithms/uninitialized.copy/ranges_uninitialized_copy.pass.cpp
M libcxx/test/std/utilities/memory/specialized.algorithms/uninitialized.copy/ranges_uninitialized_copy_n.pass.cpp
M libcxx/test/std/utilities/memory/specialized.algorithms/uninitialized.copy/uninitialized_copy.pass.cpp
M libcxx/test/std/utilities/memory/specialized.algorithms/uninitialized.copy/uninitialized_copy_n.pass.cpp
M libcxx/test/std/utilities/memory/specialized.algorithms/uninitialized.fill.n/ranges_uninitialized_fill_n.pass.cpp
M libcxx/test/std/utilities/memory/specialized.algorithms/uninitialized.fill.n/uninitialized_fill_n.pass.cpp
M libcxx/test/std/utilities/memory/specialized.algorithms/uninitialized.fill/ranges_uninitialized_fill.pass.cpp
M libcxx/test/std/utilities/memory/specialized.algorithms/uninitialized.fill/uninitialized_fill.pass.cpp
M libcxx/test/std/utilities/memory/specialized.algorithms/uninitialized.move/ranges_uninitialized_move.pass.cpp
M libcxx/test/std/utilities/memory/specialized.algorithms/uninitialized.move/ranges_uninitialized_move_n.pass.cpp
M libcxx/test/std/utilities/memory/specialized.algorithms/uninitialized.move/uninitialized_move.pass.cpp
M libcxx/test/std/utilities/memory/specialized.algorithms/uninitialized.move/uninitialized_move_n.pass.cpp
Log Message:
-----------
[libc++] Implement P3508R0: Wording for "constexpr for specialized memory algorithms" (#197313)
Resolves #118379
- Add `constexpr` to affected areas
- Add `constexpr` tests
- Update documentation
Tests were created with AI assistance.
Commit: 5c95f6a859394757b92b0d63ff90b9175056deb6
https://github.com/llvm/llvm-project/commit/5c95f6a859394757b92b0d63ff90b9175056deb6
Author: Martin Storsjö <martin at martin.st>
Date: 2026-05-28 (Thu, 28 May 2026)
Changed paths:
M lld/COFF/Chunks.cpp
M lld/test/COFF/arm64-relocs-imports.test
Log Message:
-----------
[LLD] [COFF] Fix handling of immediates in ARM64_SECREL_HIGH12A (#200060)
Just like for PAGEBASE_REL21, the immediate in SECREL_HIGH12A is the
byte offset, not a page offset. The byte level offset is added to the
symbol offset, which only then after that gets shifted right by 12. This
makes the handling of this immediate consistent with what MS link.exe
does.
The existing testcase had a zero immediate in the instruction for this
relocation.
This makes it clear that immediate offsets with SECREL_HIGH12A do work
fine, where the byte level offsets end up carrying over to the upper
bits.
Commit: 5dc8711b4e553ba0ddab673564ac9b6309862e81
https://github.com/llvm/llvm-project/commit/5dc8711b4e553ba0ddab673564ac9b6309862e81
Author: jeanPerier <jperier at nvidia.com>
Date: 2026-05-28 (Thu, 28 May 2026)
Changed paths:
M mlir/include/mlir/Interfaces/MemorySlotInterfaces.h
M mlir/include/mlir/Interfaces/MemorySlotInterfaces.td
M mlir/lib/Interfaces/MemorySlotInterfaces.cpp
M mlir/lib/Transforms/Mem2Reg.cpp
M mlir/test/Transforms/mem2reg.mlir
M mlir/test/lib/Dialect/Test/TestOpDefs.cpp
M mlir/test/lib/Dialect/Test/TestOps.td
Log Message:
-----------
[mlir][mem2reg] Promote memory slots through transparent view operations (#196924)
This patch enables mem2reg to operate on load/store that are made
through cast/views of the memory slot (not directly using the SSA value
produced by the allocation op).
This is done by adding a new `PromotableAliaserInterface` interface that must
be implemented by operations that define view of the slot and through which
mem2reg should still happen.
This interface comes with three APIs. The first one allows the operation to
provide new MemorySlots that are aliasing an input MemorySlot. The slot pointers
of these new MemorySlot are results of the operation.
The other two APIs allows projecting the reaching values between the input and output
MemorySlot (one API for each direction).
Assisted by: Claude
RFC:
https://discourse.llvm.org/t/mlir-mem2reg-rfc-promote-memory-slots-through-transparent-view-operations/90761
Commit: b51a8025bed107c5f9a8113a6ecf446f86eeb9b6
https://github.com/llvm/llvm-project/commit/b51a8025bed107c5f9a8113a6ecf446f86eeb9b6
Author: Jan Patrick Lehr <JanPatrick.Lehr at amd.com>
Date: 2026-05-28 (Thu, 28 May 2026)
Changed paths:
M clang/lib/CodeGen/ABIInfoImpl.cpp
M clang/lib/CodeGen/CGAtomic.cpp
M clang/lib/CodeGen/CGBlocks.cpp
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/CodeGen/CGCUDANV.cpp
M clang/lib/CodeGen/CGCall.cpp
M clang/lib/CodeGen/CGClass.cpp
M clang/lib/CodeGen/CGDecl.cpp
M clang/lib/CodeGen/CGException.cpp
M clang/lib/CodeGen/CGExpr.cpp
M clang/lib/CodeGen/CGExprAgg.cpp
M clang/lib/CodeGen/CGHLSLRuntime.cpp
M clang/lib/CodeGen/CGOpenMPRuntime.cpp
M clang/lib/CodeGen/CGOpenMPRuntimeGPU.cpp
M clang/lib/CodeGen/CGStmt.cpp
M clang/lib/CodeGen/CGStmtOpenMP.cpp
M clang/lib/CodeGen/CodeGenFunction.h
M clang/lib/CodeGen/MicrosoftCXXABI.cpp
M clang/lib/CodeGen/TargetBuiltins/ARM.cpp
M clang/lib/CodeGen/TargetBuiltins/X86.cpp
M clang/lib/CodeGen/Targets/X86.cpp
M clang/test/CodeGen/scoped-atomic-ops.c
M clang/test/CodeGenCUDA/amdgpu-kernel-arg-pointer-type.cu
M clang/test/CodeGenCUDA/atomic-options.hip
M clang/test/CodeGenCUDA/builtins-amdgcn.cu
M clang/test/CodeGenCUDA/builtins-spirv-amdgcn.cu
M clang/test/CodeGenCUDA/record-layout.cu
M clang/test/CodeGenCXX/amdgcn-func-arg.cpp
M clang/test/CodeGenCXX/cxx0x-initializer-stdinitializerlist.cpp
M clang/test/CodeGenHIP/placement-new-addrspace.hip
M clang/test/CodeGenOpenCL/addr-space-struct-arg.cl
M clang/test/CodeGenOpenCL/amdgpu-abi-struct-arg-byref.cl
M clang/test/CodeGenOpenCL/amdgpu-enqueue-kernel.cl
M clang/test/CodeGenOpenCL/atomic-ops.cl
M clang/test/CodeGenSYCL/kernel-caller-entry-point.cpp
M clang/test/OpenMP/amdgcn_target_device_vla.cpp
M clang/test/OpenMP/amdgpu_target_with_aligned_attribute.c
M clang/test/OpenMP/target_teams_generic_loop_codegen.cpp
M clang/test/OpenMP/target_teams_generic_loop_codegen_as_distribute.cpp
M clang/test/OpenMP/target_teams_generic_loop_codegen_as_parallel_for.cpp
Log Message:
-----------
Revert "[clang] remove lots of "innocuous" addrspacecasts" (#199685)
Reverts llvm/llvm-project#197745
Broke AMDGPU HIP Kokkos bot:
https://lab.llvm.org/buildbot/#/builders/230/builds/958
Late reply as the breakage got lost in some trouble with the buildbot
fleet.
Co-authored-by: Kewen Meng <Kewen.Meng at amd.com>
Commit: af772866888eb2e2053b5f4d784510006d760e62
https://github.com/llvm/llvm-project/commit/af772866888eb2e2053b5f4d784510006d760e62
Author: Davide Grohmann <davide.grohmann at arm.com>
Date: 2026-05-28 (Thu, 28 May 2026)
Changed paths:
A mlir/include/mlir/Target/SPIRV/SPIRVExtInstSets.h
M mlir/lib/Conversion/TosaToSPIRVTosa/TosaToSPIRVTosaPass.cpp
M mlir/lib/Target/SPIRV/Deserialization/DeserializeOps.cpp
M mlir/lib/Target/SPIRV/Deserialization/Deserializer.h
M mlir/lib/Target/SPIRV/Serialization/SerializeOps.cpp
M mlir/lib/Target/SPIRV/Serialization/Serializer.cpp
M mlir/lib/Target/SPIRV/Serialization/Serializer.h
M mlir/lib/Target/SPIRV/TranslateRegistration.cpp
R mlir/test/Target/SPIRV/debug-negative.mlir
A mlir/test/Target/SPIRV/graph-debug-info-negative.mlir
A mlir/test/Target/SPIRV/graph-debug-info.mlir
M mlir/unittests/Dialect/SPIRV/DeserializationTest.cpp
Log Message:
-----------
[mlir][spirv] Add SPIR-V NonSemantic.Graph.DebugInfo (#199519)
Add serialization and deserialization support for the SPIR-V
NonSemantic.Graph.DebugInfo.1 extended instruction set used by ARM graph
modules.
When debug info emission is enabled, serialize DebugGraph,
DebugOperation,
and DebugTensor records for graph objects, TOSA operations, graph
tensors,
and tensor constants. Emit the records after the SPIR-V objects they
reference, and make DebugOperation point at the DebugGraph result id.
Deserialize these records back into MLIR locations and diagnose
malformed
or undefined debug-info references.
Enable SPV_KHR_non_semantic_info in the default TOSA-to-SPIR-V target
environment so debug info can be emitted by default.
Specification:
https://github.com/KhronosGroup/SPIRV-Registry/blob/main/nonsemantic/NonSemantic.Graph.DebugInfo.asciidoc
Signed-off-by: Mohammadreza Ameri Mahabadian <mohammadreza.amerimahabadian at arm.com>
Signed-off-by: Davide Grohmann <davide.grohmann at arm.com>
Co-authored-by: Mohammadreza Ameri Mahabadian <mohammadreza.amerimahabadian at arm.com>
Commit: 538140ff2cb74ab2a9496119686041ea509daa08
https://github.com/llvm/llvm-project/commit/538140ff2cb74ab2a9496119686041ea509daa08
Author: Guy David <guyda96 at gmail.com>
Date: 2026-05-28 (Thu, 28 May 2026)
Changed paths:
M clang/include/module.modulemap
Log Message:
-----------
[clang] Add missing BuiltinAnchorSources.def to module map (#200125)
Started with 5db13643f4b7038db0ca304d9f8900122502935c.
Commit: 626f4061e7f2d84813f5307bd03f35592e4b70c1
https://github.com/llvm/llvm-project/commit/626f4061e7f2d84813f5307bd03f35592e4b70c1
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-05-28 (Thu, 28 May 2026)
Changed paths:
M mlir/lib/Conversion/SPIRVToLLVM/SPIRVToLLVM.cpp
M mlir/test/Conversion/SPIRVToLLVM/gl-ops-to-llvm.mlir
Log Message:
-----------
[mlir][SPIRVToLLVM] Add conversions for more GL ops (#200115)
Commit: 597b1376bab39259fb3a03fb320dcd15a8b8f2f2
https://github.com/llvm/llvm-project/commit/597b1376bab39259fb3a03fb320dcd15a8b8f2f2
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-05-28 (Thu, 28 May 2026)
Changed paths:
M mlir/lib/Conversion/ComplexToSPIRV/ComplexToSPIRV.cpp
M mlir/test/Conversion/ComplexToSPIRV/complex-to-spirv.mlir
Log Message:
-----------
[mlir][SPIR-V][complex] Convert complex.add/sub/mul/div to SPIR-V ops (#200123)
Commit: 3a50239454f81b6f6647021737bbf7797a06e00c
https://github.com/llvm/llvm-project/commit/3a50239454f81b6f6647021737bbf7797a06e00c
Author: Pierre van Houtryve <pierre.vanhoutryve at amd.com>
Date: 2026-05-28 (Thu, 28 May 2026)
Changed paths:
M llvm/include/llvm/CodeGen/GlobalISel/GIMatchTableExecutor.h
M llvm/include/llvm/CodeGen/GlobalISel/GIMatchTableExecutorImpl.h
M llvm/test/TableGen/GlobalISelCombinerEmitter/match-table.td
M llvm/test/TableGen/GlobalISelEmitter/GlobalISelEmitter.td
M llvm/test/TableGen/GlobalISelEmitter/HwModes.td
M llvm/test/TableGen/RegClassByHwMode.td
M llvm/utils/TableGen/Common/GlobalISel/GlobalISelMatchTable.cpp
Log Message:
-----------
[GlobalISel] Replace `GIM_CheckFeatures` with `GIM_Try_CheckFeatures` (#198461)
This has two benefits. First, it slightly reduces the size of the match
table.
Secondly, if the target feature is not present, we can directly go to
the fail
case, instead of having to do another loop of the interpreter, speeding
up
rejection of rules that do not have the required target feature.
We could do the same with CheckSimplePredicate but it's less used (only
in the combiners I think)
so it is less of a priority.
```
FILE OLD NEW DIFF% SAME?
---- ------- ------- ----- -----
AArch64GenGlobalISel.inc 192681 185938 -3,5% no
AArch64GenPostLegalizeGICombiner.inc 4457 4457 0,0% yes
AArch64GenPreLegalizeGICombiner.inc 9010 9009 -0,0% no
AMDGPUGenGlobalISel.inc 596402 568486 -4,7% no
AMDGPUGenPostLegalizeGICombiner.inc 9240 9238 -0,0% no
AMDGPUGenPreLegalizeGICombiner.inc 8987 8987 0,0% yes
AMDGPUGenRegBankGICombiner.inc 1981 1980 -0,1% no
```
Commit: a63eacee2db2c6ea75c67aca729cc3d32426200b
https://github.com/llvm/llvm-project/commit/a63eacee2db2c6ea75c67aca729cc3d32426200b
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-05-28 (Thu, 28 May 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
Log Message:
-----------
[VPlan] Don't use Ingredient to get type in VPWidenMemoryRecipe (NFC) (#200049)
The scalar load/store type is already available on the recipe: load
recipes inherit from VPSingleDefRecipe and expose it via
getScalarType(); store recipes can derive it from the stored value's
type via VPTypeAnalysis.
This migrates a number of lookups to be based on information already
available in VPlan directly.
Commit: 0513c9cba2a02fb853b0af385c0b47503e6678ff
https://github.com/llvm/llvm-project/commit/0513c9cba2a02fb853b0af385c0b47503e6678ff
Author: forking-google-bazel-bot[bot] <265904573+forking-google-bazel-bot[bot]@users.noreply.github.com>
Date: 2026-05-28 (Thu, 28 May 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[Bazel] Fixes 5dc8711 (#200129)
This fixes 5dc8711b4e553ba0ddab673564ac9b6309862e81.
Co-authored-by: Google Bazel Bot <google-bazel-bot at google.com>
Commit: 8a9a82c53e82c8bcbde3f01cf674b8afc5fed753
https://github.com/llvm/llvm-project/commit/8a9a82c53e82c8bcbde3f01cf674b8afc5fed753
Author: Luke Lau <luke at igalia.com>
Date: 2026-05-28 (Thu, 28 May 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
Log Message:
-----------
[VPlan] Remove redundant vp_merge pattern. NFC (#200116)
m_RemoveMask still matches even if there's no other mask combined, we
just need to check if Mask is null.
Commit: 4503872fe57315e6df7dbc93128dbe6a02011872
https://github.com/llvm/llvm-project/commit/4503872fe57315e6df7dbc93128dbe6a02011872
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-05-28 (Thu, 28 May 2026)
Changed paths:
M clang/test/CodeGenOpenCL/atomic-builtins-default-to-device-scope.cl
M llvm/include/llvm/IR/Instruction.h
M llvm/lib/IR/Instruction.cpp
M llvm/lib/Transforms/IPO/FunctionAttrs.cpp
M llvm/test/Transforms/FunctionAttrs/atomic.ll
M llvm/test/Transforms/FunctionAttrs/nocapture.ll
M llvm/test/Transforms/FunctionAttrs/nosync.ll
M llvm/test/Transforms/FunctionAttrs/writeonly.ll
Log Message:
-----------
[IR][FunctionAttrs] Clarify memory effects of atomics (#193768)
FunctionAttrs was treating atomic instructions, including with ordering
stronger than monotonic, as only reading/writing their operand.
I don't think doing this is correct, because we model the ordering
constraints of synchronizing atomics via reading/writing "all" memory.
So e.g. if you have a function with a release store on an argument,
marking it as argmem-only is wrong, because that would permit reordering
accesses to other locations around it. (What this PR is doing is not
*sufficient* to model this correctly due to the fence-like effects on
not-yet-escaped memory, but it brings us closer to correctness.)
I initially tried to implement mayReadFromMemory() and
mayWriteToMemory() on top of getMemoryEffects(), but this caused
significant compile-time regressions, so I've kept the logic duplicated.
Commit: 0e02ccdaf01081dbd947e192fb4769da7bf74d54
https://github.com/llvm/llvm-project/commit/0e02ccdaf01081dbd947e192fb4769da7bf74d54
Author: Fabrice de Gans <Steelskin at users.noreply.github.com>
Date: 2026-05-28 (Thu, 28 May 2026)
Changed paths:
M llvm/include/llvm-c/Remarks.h
M llvm/include/llvm-c/lto.h
Log Message:
-----------
llvm: Fix most LLVM_C_ABI annotations (#199914)
This updates most LLVM_C_ABI annotations in the llvm-c headers to match
expected usage:
* All public APIs should be properly annotated.
* Inlined functions should not be annotated.
These changes were done by a script fixing annotations on LLVM public
headers and manually checked.
This effort is tracked in #109483.
Commit: 1235c442a3c08e9cb4a9d2a6c082f392ec0885f1
https://github.com/llvm/llvm-project/commit/1235c442a3c08e9cb4a9d2a6c082f392ec0885f1
Author: Sohaib Iftikhar <sohaibiftikhar at google.com>
Date: 2026-05-28 (Thu, 28 May 2026)
Changed paths:
Log Message:
-----------
Fix Bazel build for 5dc8711 (#200142)
Co-authored-by: Google Bazel Bot <google-bazel-bot at google.com>
Commit: 86a74788dcc851d501e33c70a88f14dc47293b9f
https://github.com/llvm/llvm-project/commit/86a74788dcc851d501e33c70a88f14dc47293b9f
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-05-28 (Thu, 28 May 2026)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/vector-shuffle-combining-avx512vbmi2.ll
Log Message:
-----------
[X86] matchBinaryPermuteShuffle - match to X86ISD::SHLD funnel shift patterns (#200136)
Add matchShuffleAsVSHLD helper to recognise shuffle masks that can fold to funnel shifts
Fixes #145276
Commit: 174eb79572b3433aa338ede31815fa8fa6a13b29
https://github.com/llvm/llvm-project/commit/174eb79572b3433aa338ede31815fa8fa6a13b29
Author: Simon Tatham <simon.tatham at arm.com>
Date: 2026-05-28 (Thu, 28 May 2026)
Changed paths:
M compiler-rt/lib/builtins/CMakeLists.txt
A compiler-rt/lib/builtins/arm/fixdfdi.S
A compiler-rt/lib/builtins/arm/fixdfsi.S
A compiler-rt/lib/builtins/arm/fixsfdi.S
A compiler-rt/lib/builtins/arm/fixsfsi.S
A compiler-rt/lib/builtins/arm/fixunsdfdi.S
A compiler-rt/lib/builtins/arm/fixunsdfsi.S
A compiler-rt/lib/builtins/arm/fixunssfdi.S
A compiler-rt/lib/builtins/arm/fixunssfsi.S
A compiler-rt/test/builtins/Unit/fixdfdinew_test.c
A compiler-rt/test/builtins/Unit/fixdfsinew_test.c
A compiler-rt/test/builtins/Unit/fixsfdinew_test.c
A compiler-rt/test/builtins/Unit/fixsfsinew_test.c
A compiler-rt/test/builtins/Unit/fixunsdfdinew_test.c
A compiler-rt/test/builtins/Unit/fixunsdfsinew_test.c
A compiler-rt/test/builtins/Unit/fixunssfdinew_test.c
A compiler-rt/test/builtins/Unit/fixunssfsinew_test.c
Log Message:
-----------
[compiler-rt][ARM] Optimized FP -> integer conversions (#179927)
This commit adds a total of 8 new functions, all converting a
floating-point number to an integer, varying in 3 independent choices:
* input float format (32-bit or 64-bit)
* output integer size (32-bit or 64-bit)
* output integer type (signed or unsigned)
Commit: cee1c3ba576fc6259510313b73fde56150268c52
https://github.com/llvm/llvm-project/commit/cee1c3ba576fc6259510313b73fde56150268c52
Author: Luke Hutton <luke.hutton at arm.com>
Date: 2026-05-28 (Thu, 28 May 2026)
Changed paths:
M mlir/include/mlir/Dialect/Tosa/IR/TargetEnv.h
M mlir/include/mlir/Dialect/Tosa/IR/TosaOps.td
M mlir/lib/Dialect/Tosa/IR/TargetEnv.cpp
M mlir/lib/Dialect/Tosa/IR/TosaCanonicalizations.cpp
M mlir/test/Dialect/Tosa/canonicalize.mlir
R mlir/test/Dialect/Tosa/fold_concats.mlir
Log Message:
-----------
[mlir][tosa] Limit consecutive concat rewrite to MAX_TENSOR_LIST_SIZE (#199051)
Previously folding could produce an operation that would later be
considered invalid in validation due to the number of operands it has.
This change adds a check to prevent rewriting consecutive concat
operations if the resulting operation has more than MAX_TENSOR_LIST_SIZE
operands, based on the selected target environment level. If no level is
specified, folding will proceed as before.
In addition, this change rewrites the concat folder as a
canonicalization pattern, since it is not a fold of constant operands.
The change also consolidates testing in
canonicalize.mlir.
Commit: 172ea47e6d5b04c4849991ffd5ab0f87d444ab86
https://github.com/llvm/llvm-project/commit/172ea47e6d5b04c4849991ffd5ab0f87d444ab86
Author: Igor Wodiany <igor.wodiany at amd.com>
Date: 2026-05-28 (Thu, 28 May 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
M llvm/lib/Target/AMDGPU/VOPDInstructions.td
Log Message:
-----------
[AMDGPU] Use separate tables for VOPD3X and VOPDY in `getCanBeVOPD` (NFC) (#199072)
With this change tables for valid VOPD3X (VOPDX still uses
`getVOPDComponentHelper`) and VOPDY operations are
generated through TableGen. This simplifies the look-up
leading to a 2-3% compile-time speed-up for tested shaders
where `getCanBeVOPD` is on a hot path.
Assisted-by: Claude Code
Commit: 66ee43ce9d66f80cc311e5653478ae83372afb89
https://github.com/llvm/llvm-project/commit/66ee43ce9d66f80cc311e5653478ae83372afb89
Author: NeKon69 <nobodqwe at gmail.com>
Date: 2026-05-28 (Thu, 28 May 2026)
Changed paths:
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/lib/Sema/SemaLifetimeSafety.h
M clang/test/Sema/warn-lifetime-analysis-nocfg.cpp
M clang/test/Sema/warn-lifetime-safety-cfg-bailout.cpp
M clang/test/Sema/warn-lifetime-safety-suggestions.cpp
M clang/test/Sema/warn-lifetime-safety.cpp
Log Message:
-----------
[LifetimeSafety] Improve diagnostics for use-after-scope (#200031)
Reuses the function for getting object information that was added in
#199432
Comes as part of completing #186002
Co-authored-by: Utkarsh Saxena <usx at google.com>
Commit: 51d823197cb40a57f25d00882546374d460c649e
https://github.com/llvm/llvm-project/commit/51d823197cb40a57f25d00882546374d460c649e
Author: Matthew Nagy <matthew.nagy at sony.com>
Date: 2026-05-28 (Thu, 28 May 2026)
Changed paths:
M compiler-rt/include/sanitizer/tysan_interface.h
M compiler-rt/lib/tysan/tysan.cpp
M compiler-rt/lib/tysan/tysan.h
M compiler-rt/lib/tysan/tysan_interceptors.cpp
A compiler-rt/test/tysan/set_type_unknown-interface.c
Log Message:
-----------
[TySan] Expose __tysan_set_type_unknown interface (#198800)
This can help work around issues like
[#143587](https://github.com/llvm/llvm-project/issues/143587)
The function is renamed with two trailing underscores to match the
naming scheme of the other sanitizers.
Commit: b115dd117ac109ac501b8bc044dbdefd6f5f2471
https://github.com/llvm/llvm-project/commit/b115dd117ac109ac501b8bc044dbdefd6f5f2471
Author: Lukacma <Marian.Lukac at arm.com>
Date: 2026-05-28 (Thu, 28 May 2026)
Changed paths:
M lldb/test/API/commands/register/aarch64_dynamic_regset/main.c
M lldb/test/API/commands/register/aarch64_sve_registers/rw_access_static_config/main.c
M llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
M llvm/lib/Target/AArch64/AArch64InstrFormats.td
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/lib/Target/AArch64/AArch64SMEInstrInfo.td
M llvm/lib/Target/AArch64/AArch64SystemOperands.td
M llvm/lib/Target/AArch64/Utils/AArch64BaseInfo.cpp
M llvm/test/CodeGen/AArch64/aarch64-sme-za-call-lowering.ll
M llvm/test/CodeGen/AArch64/aarch64-sysreg128.ll
A llvm/test/CodeGen/AArch64/arm64-invalid-sys-reg.ll
R llvm/test/CodeGen/AArch64/arm64-named-reg-notareg.ll
M llvm/test/CodeGen/AArch64/expand-sme-pseudos.mir
M llvm/test/CodeGen/AArch64/machine-sme-abi-find-insert-pt.mir
M llvm/test/CodeGen/AArch64/machine-sme-abi-skip-debug-inst.mir
M llvm/test/CodeGen/AArch64/sme-abi-eh-liveins.mir
M llvm/test/CodeGen/AArch64/sme-lazy-sve-nzcv-live.mir
M llvm/test/CodeGen/AArch64/special-reg.ll
M llvm/test/MC/AArch64/arm64-system-encoding.s
M llvm/test/MC/AArch64/armv9-mrrs-diagnostics.s
M llvm/test/MC/AArch64/armv9-mrrs.s
M llvm/test/MC/AArch64/armv9-msrr-diagnostics.s
M llvm/test/MC/AArch64/armv9-msrr.s
M llvm/test/MC/AArch64/basic-a64-instructions.s
M llvm/test/MC/Disassembler/AArch64/armv8.2a-uao.txt
M llvm/test/MC/Disassembler/AArch64/armv8.4a-dit.txt
M llvm/test/MC/Disassembler/AArch64/armv8.5a-dataproc.txt
M llvm/test/MC/Disassembler/AArch64/armv8.5a-mte.txt
M llvm/test/MC/Disassembler/AArch64/armv8.5a-sb.txt
M llvm/test/MC/Disassembler/AArch64/armv8.5a-ssbs.txt
M llvm/test/MC/Disassembler/AArch64/armv8.7a-wfxt.txt
M llvm/test/MC/Disassembler/AArch64/armv8.7a-xs.txt
M llvm/test/MC/Disassembler/AArch64/armv8.8a-nmi.txt
M llvm/test/MC/Disassembler/AArch64/basic-a64-instructions.txt
Log Message:
-----------
[AArch64] Fix definition of system register move instructions (#185709)
Current implementation of these instructions makes bit20 in the encoding
part of the system register operand, which is incorrect since
[specification](https://developer.arm.com/documentation/ddi0602/latest)
specifies that bit must be set to 1. This patch changes that and removes
the bit 20 from the encoding of the operand and makes it fixed field for
these instructions. It also fixes the parser and codegen by checking
that Op0 in system register name/encoding is correctly constrained to 2
or 3.
Depends on #185970
Commit: a554a1989f60ebb292b198bbbe084b5a34f880c5
https://github.com/llvm/llvm-project/commit/a554a1989f60ebb292b198bbbe084b5a34f880c5
Author: Vladislav Dzhidzhoev <vdzhidzhoev at accesssoftek.com>
Date: 2026-05-28 (Thu, 28 May 2026)
Changed paths:
A clang/test/Driver/dxc_section_emission.hlsl
M llvm/lib/Target/DirectX/DXContainerGlobals.cpp
A llvm/test/CodeGen/DirectX/ContainerData/DebugName-DXIL.ll
M llvm/test/CodeGen/DirectX/lit.local.cfg
Log Message:
-----------
[DirectX] Generate shader debug file name part in llc (#199555)
This change modifies DXContainerGlobals pass to generate debug name
(ILDN) part in DXContainer. ILDN part allows consumers to find PDB file
containing shader debug info.
As ILDB emission PR is not merged yet, and PDB file creation is not
upstreamed yet, debug name is generated based on MD5-hash of bitcode
module in DXIL part.
This corresponds to DXC behavior when a shader is compiled with `/Zi
/Qembed_debug /Zsb` flags (with `/Qembed_debug`, DXC does not produce an
actual PDB file, but still emits ILDN, `/Zsb` tells DXC to use bitcode
from DXIL to compute hash).
However, here ILDN is emitted for any debug info flag configuration.
assuming that it won't break debug info consumers, and that PDB creation
will be added later.
Commit: eb1b57c639947ad381d9dff6093c2b8085b99d0f
https://github.com/llvm/llvm-project/commit/eb1b57c639947ad381d9dff6093c2b8085b99d0f
Author: ritter-x2a <9519134+ritter-x2a at users.noreply.github.com>
Date: 2026-05-28 (Thu, 28 May 2026)
Changed paths:
M llvm/docs/LangRef.rst
Log Message:
-----------
[LangRef] Specify that syncscopes can affect the monotonic modification order (#189017)
If a target specifies that atomics with mismatching syncscopes appear
non-atomic to each other, there is no point in requiring them to be ordered in
the monotonic modification order. Notably, the [AMDGPU target user
guide](https://llvm.org/docs/AMDGPUUsage.html#memory-scopes) has specified
syncscopes to relax the modification order for years.
So far, I haven't found an example where this less constrained ordering would
be observable (at least with the AMDGPU inclusive scope rules). Whenever a load
would be able to see two monotonic stores with non-inclusive scope, that's
considered a data race (i.e., the load would return `undef`), so it cannot be
used to observe the order of the stores.
Related RFC: https://discourse.llvm.org/t/rfc-clarifying-llvm-irs-concurrent-memory-model/90480
Commit: dbebcb02d3d8f2e92e1ba235992fb43b5fad50a3
https://github.com/llvm/llvm-project/commit/dbebcb02d3d8f2e92e1ba235992fb43b5fad50a3
Author: Davide Grohmann <davide.grohmann at arm.com>
Date: 2026-05-28 (Thu, 28 May 2026)
Changed paths:
M mlir/lib/Target/SPIRV/Deserialization/DeserializeOps.cpp
Log Message:
-----------
[mlir][spirv] Remove unnecessary assertion (#200137)
The use of the variable in the assertion was causing a build failure
when compiling with assertion off and hence the variable becomes unused.
Signed-off-by: Davide Grohmann <davide.grohmann at arm.com>
Commit: 7b5ba2396b43417f64aeeff25db760b52ed5e16b
https://github.com/llvm/llvm-project/commit/7b5ba2396b43417f64aeeff25db760b52ed5e16b
Author: Sameer Sahasrabuddhe <sameer.sahasrabuddhe at amd.com>
Date: 2026-05-28 (Thu, 28 May 2026)
Changed paths:
M .github/new-issues-labeler.yml
M .github/workflows/issue-release-workflow.yml
M .github/workflows/libclang-abi-tests.yml
M .github/workflows/pr-code-lint.yml
M .github/workflows/release-binaries-all.yml
M .github/workflows/release-documentation.yml
M bolt/include/bolt/Profile/DataAggregator.h
M bolt/lib/Profile/DataAggregator.cpp
M bolt/test/lit.cfg.py
A bolt/test/merge-fdata-no-lbr-event-multi.test
A bolt/test/merge-fdata-no-lbr-event.test
M bolt/tools/driver/llvm-bolt.cpp
M bolt/tools/merge-fdata/merge-fdata.cpp
M clang-tools-extra/clang-tidy/readability/RedundantParenthesesCheck.cpp
M clang-tools-extra/clangd/HeaderSourceSwitch.cpp
M clang-tools-extra/clangd/unittests/HeaderSourceSwitchTests.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/test/clang-tidy/checkers/readability/redundant-parentheses.cpp
M clang/docs/ReleaseNotes.rst
M clang/docs/ScalableStaticAnalysisFramework/developer-docs/ForceLinkerHeaders.rst
M clang/docs/ScalableStaticAnalysisFramework/developer-docs/HowToExtend.rst
M clang/include/clang/AST/ASTContext.h
M clang/include/clang/AST/Decl.h
M clang/include/clang/Analysis/Analyses/LifetimeSafety/FactsGenerator.h
M clang/include/clang/Analysis/Analyses/LifetimeSafety/LifetimeAnnotations.h
M clang/include/clang/Analysis/Analyses/LifetimeSafety/LifetimeSafety.h
M clang/include/clang/Basic/Builtins.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Basic/FileManager.h
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/include/clang/CIR/Dialect/Transforms/CIRTransformUtils.h
A clang/include/clang/ScalableStaticAnalysisFramework/BuiltinAnchorSources.def
M clang/include/clang/ScalableStaticAnalysisFramework/Core/Serialization/SerializationFormatRegistry.h
M clang/include/clang/ScalableStaticAnalysisFramework/Core/TUSummary/ExtractorRegistry.h
M clang/include/clang/ScalableStaticAnalysisFramework/Core/WholeProgramAnalysis/AnalysisRegistry.h
M clang/include/clang/ScalableStaticAnalysisFramework/SSAFBuiltinForceLinker.h
M clang/include/clang/Sema/Sema.h
M clang/include/clang/Sema/SemaCUDA.h
M clang/include/clang/Sema/SemaObjC.h
M clang/include/module.modulemap
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ByteCode/Interp.cpp
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
M clang/lib/AST/Decl.cpp
M clang/lib/AST/DeclCXX.cpp
M clang/lib/Analysis/LifetimeSafety/Checker.cpp
M clang/lib/Analysis/LifetimeSafety/FactsGenerator.cpp
M clang/lib/Analysis/LifetimeSafety/LifetimeAnnotations.cpp
M clang/lib/Basic/FileManager.cpp
M clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp
M clang/lib/CIR/CodeGen/CIRGenBuiltinAMDGPU.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.cpp
M clang/lib/CIR/CodeGen/CIRGenModule.cpp
M clang/lib/CIR/CodeGen/CIRGenStmt.cpp
M clang/lib/CIR/CodeGen/CIRGenTypes.cpp
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
M clang/lib/CIR/Dialect/Transforms/CIRTransformUtils.cpp
M clang/lib/CIR/Dialect/Transforms/EHABILowering.cpp
M clang/lib/CIR/Dialect/Transforms/FlattenCFG.cpp
M clang/lib/CodeGen/ABIInfoImpl.cpp
M clang/lib/CodeGen/CGAtomic.cpp
M clang/lib/CodeGen/CGBlocks.cpp
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/CodeGen/CGCUDANV.cpp
M clang/lib/CodeGen/CGCXX.cpp
M clang/lib/CodeGen/CGCall.cpp
M clang/lib/CodeGen/CGClass.cpp
M clang/lib/CodeGen/CGDecl.cpp
M clang/lib/CodeGen/CGException.cpp
M clang/lib/CodeGen/CGExpr.cpp
M clang/lib/CodeGen/CGExprAgg.cpp
M clang/lib/CodeGen/CGHLSLRuntime.cpp
M clang/lib/CodeGen/CGHLSLRuntime.h
M clang/lib/CodeGen/CGOpenMPRuntime.cpp
M clang/lib/CodeGen/CGOpenMPRuntimeGPU.cpp
M clang/lib/CodeGen/CGStmt.cpp
M clang/lib/CodeGen/CGStmtOpenMP.cpp
M clang/lib/CodeGen/CGVTables.cpp
M clang/lib/CodeGen/CodeGenFunction.h
M clang/lib/CodeGen/CodeGenModule.cpp
M clang/lib/CodeGen/CodeGenModule.h
M clang/lib/CodeGen/MicrosoftCXXABI.cpp
M clang/lib/CodeGen/TargetBuiltins/AMDGPU.cpp
M clang/lib/CodeGen/TargetBuiltins/ARM.cpp
M clang/lib/CodeGen/TargetBuiltins/X86.cpp
M clang/lib/CodeGen/Targets/X86.cpp
M clang/lib/DependencyScanning/DependencyScannerImpl.cpp
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/Driver/ToolChains/CommonArgs.cpp
M clang/lib/Headers/wasm_simd128.h
M clang/lib/Lex/HeaderSearch.cpp
M clang/lib/Lex/ModuleMap.cpp
M clang/lib/Lex/PPDirectives.cpp
M clang/lib/ScalableStaticAnalysisFramework/Analyses/CallGraph/CallGraphExtractor.cpp
M clang/lib/ScalableStaticAnalysisFramework/Analyses/CallGraph/CallGraphJSONFormat.cpp
M clang/lib/ScalableStaticAnalysisFramework/Analyses/PointerFlow/PointerFlowAnalysis.cpp
M clang/lib/ScalableStaticAnalysisFramework/Analyses/PointerFlow/PointerFlowExtractor.cpp
M clang/lib/ScalableStaticAnalysisFramework/Analyses/PointerFlow/PointerFlowFormat.cpp
M clang/lib/ScalableStaticAnalysisFramework/Analyses/UnsafeBufferUsage/UnsafeBufferUsageAnalysis.cpp
M clang/lib/ScalableStaticAnalysisFramework/Analyses/UnsafeBufferUsage/UnsafeBufferUsageExtractor.cpp
M clang/lib/ScalableStaticAnalysisFramework/Analyses/UnsafeBufferUsage/UnsafeBufferUsageFormat.cpp
M clang/lib/ScalableStaticAnalysisFramework/Core/Serialization/JSONFormat/JSONFormatImpl.cpp
M clang/lib/ScalableStaticAnalysisFramework/Core/WholeProgramAnalysis/AnalysisRegistry.cpp
M clang/lib/Sema/Sema.cpp
M clang/lib/Sema/SemaAMDGPU.cpp
M clang/lib/Sema/SemaBase.cpp
M clang/lib/Sema/SemaCUDA.cpp
M clang/lib/Sema/SemaChecking.cpp
M clang/lib/Sema/SemaDecl.cpp
M clang/lib/Sema/SemaExpr.cpp
M clang/lib/Sema/SemaExprObjC.cpp
M clang/lib/Sema/SemaLifetimeSafety.h
M clang/lib/StaticAnalyzer/Checkers/WebKit/ASTUtils.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/PtrTypesSemantics.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/RawPtrRefLocalVarsChecker.cpp
M clang/test/AST/ByteCode/cxx11.cpp
A clang/test/AST/ast-print-amdgcn-predicate.c
M clang/test/Analysis/Checkers/WebKit/call-args.cpp
M clang/test/Analysis/Checkers/WebKit/objc-mock-types.h
M clang/test/Analysis/Checkers/WebKit/uncounted-local-vars.cpp
A clang/test/Analysis/Checkers/WebKit/unretained-call-args-member.mm
M clang/test/Analysis/Checkers/WebKit/unretained-local-vars.mm
A clang/test/CIR/CodeGen/cleanup-throw-from-cleanup.cpp
A clang/test/CIR/CodeGen/inline-extern-force-codegen.c
A clang/test/CIR/CodeGen/switch-pre-case-stmts.cpp
M clang/test/CIR/CodeGen/try-catch.cpp
A clang/test/CIR/CodeGenHIP/builtins-amdgcn-image.hip
A clang/test/CXX/basic/basic.link/p11.cpp
M clang/test/CXX/temp/temp.spec/temp.expl.spec/p7.cpp
A clang/test/CodeGen/AArch64/mskernel-interlocked.c
M clang/test/CodeGen/AArch64/neon-intrinsics.c
M clang/test/CodeGen/AArch64/neon/intrinsics.c
M clang/test/CodeGen/AArch64/poly64.c
A clang/test/CodeGen/X86/mskernel-interlocked.c
A clang/test/CodeGen/builtin-clear-padding-codegen.c
M clang/test/CodeGen/builtin-masked.c
M clang/test/CodeGen/sanitize-metadata-nosanitize.c
M clang/test/CodeGen/scoped-atomic-ops.c
M clang/test/CodeGenCUDA/amdgpu-kernel-arg-pointer-type.cu
M clang/test/CodeGenCUDA/atomic-options.hip
M clang/test/CodeGenCUDA/builtins-amdgcn.cu
M clang/test/CodeGenCUDA/builtins-spirv-amdgcn.cu
M clang/test/CodeGenCUDA/device-vtable.cu
A clang/test/CodeGenCUDA/implicit-hd-dtor-trap-stub-hip.hip
A clang/test/CodeGenCUDA/implicit-hd-explicit-inst-hip.hip
A clang/test/CodeGenCUDA/implicit-hd-overload-ambig-hip.hip
M clang/test/CodeGenCUDA/record-layout.cu
M clang/test/CodeGenCXX/amdgcn-func-arg.cpp
A clang/test/CodeGenCXX/builtin-clear-padding-codegen.cpp
M clang/test/CodeGenCXX/cxx0x-initializer-stdinitializerlist.cpp
M clang/test/CodeGenCoroutines/coro-gro4.cpp
M clang/test/CodeGenCoroutines/coro-symmetric-transfer-03.cpp
M clang/test/CodeGenCoroutines/coro-symmetric-transfer-04.cpp
M clang/test/CodeGenCoroutines/pr65018.cpp
A clang/test/CodeGenHIP/offload-pgo-sections.hip
M clang/test/CodeGenHIP/placement-new-addrspace.hip
A clang/test/CodeGenHIP/profile-coverage-mapping.hip
A clang/test/CodeGenHLSL/resources/res-array-global-to-local.hlsl
M clang/test/CodeGenHLSL/resources/res-array-local2.hlsl
M clang/test/CodeGenHLSL/resources/resource-bindings.hlsl
A clang/test/CodeGenHLSL/resources/resources-in-structs-array-to-local.hlsl
M clang/test/CodeGenOpenCL/addr-space-struct-arg.cl
M clang/test/CodeGenOpenCL/amdgpu-abi-struct-arg-byref.cl
M clang/test/CodeGenOpenCL/amdgpu-enqueue-kernel.cl
M clang/test/CodeGenOpenCL/atomic-builtins-default-to-device-scope.cl
M clang/test/CodeGenOpenCL/atomic-ops.cl
M clang/test/CodeGenSYCL/kernel-caller-entry-point.cpp
A clang/test/Driver/dxc_section_emission.hlsl
M clang/test/Driver/hip-options.hip
M clang/test/Driver/msvc-link.c
M clang/test/Driver/print-supported-extensions-riscv.c
M clang/test/Driver/split-debug.c
M clang/test/Modules/cxx-templates.cpp
M clang/test/OpenMP/amdgcn_target_device_vla.cpp
M clang/test/OpenMP/amdgpu_target_with_aligned_attribute.c
M clang/test/OpenMP/target_teams_generic_loop_codegen.cpp
M clang/test/OpenMP/target_teams_generic_loop_codegen_as_distribute.cpp
M clang/test/OpenMP/target_teams_generic_loop_codegen_as_parallel_for.cpp
M clang/test/Preprocessor/riscv-target-features.c
M clang/test/Sema/Inputs/lifetime-analysis.h
A clang/test/Sema/builtin-clear-padding.c
M clang/test/Sema/warn-lifetime-analysis-nocfg.cpp
M clang/test/Sema/warn-lifetime-safety-cfg-bailout.cpp
M clang/test/Sema/warn-lifetime-safety-suggestions.cpp
M clang/test/Sema/warn-lifetime-safety.cpp
M clang/test/SemaCUDA/dtor.cu
A clang/test/SemaCUDA/implicit-hd-dtor-explicit-instantiation.cu
A clang/test/SemaCUDA/implicit-hd-explicit-inst-organic-caller.cu
A clang/test/SemaCUDA/implicit-hd-overload-ambig-organic-caller.cu
A clang/test/SemaCXX/builtin-clear-padding.cpp
M clang/test/SemaCXX/constant-expression-cxx14.cpp
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx1250-cooperative-atomics.cl
M clang/test/lit.cfg.py
M clang/unittests/Basic/FileManagerTest.cpp
M clang/unittests/ScalableStaticAnalysisFramework/Frontend/TUSummaryExtractorFrontendActionTest.cpp
M clang/unittests/ScalableStaticAnalysisFramework/Registries/FancyAnalysisData.cpp
M clang/unittests/ScalableStaticAnalysisFramework/Registries/MockSerializationFormat.cpp
M clang/unittests/ScalableStaticAnalysisFramework/Registries/MockSummaryExtractor1.cpp
M clang/unittests/ScalableStaticAnalysisFramework/Registries/MockSummaryExtractor2.cpp
R clang/unittests/ScalableStaticAnalysisFramework/SSAFBuiltinTestForceLinker.h
R clang/unittests/ScalableStaticAnalysisFramework/SSAFTestForceLinker.h
M clang/unittests/ScalableStaticAnalysisFramework/TestFixture.cpp
M clang/unittests/ScalableStaticAnalysisFramework/WholeProgramAnalysis/AnalysisDriverTest.cpp
M clang/www/cxx_dr_status.html
M compiler-rt/include/sanitizer/tysan_interface.h
M compiler-rt/lib/builtins/CMakeLists.txt
A compiler-rt/lib/builtins/arm/extendsfdf2.S
A compiler-rt/lib/builtins/arm/fixdfdi.S
A compiler-rt/lib/builtins/arm/fixdfsi.S
A compiler-rt/lib/builtins/arm/fixsfdi.S
A compiler-rt/lib/builtins/arm/fixsfsi.S
A compiler-rt/lib/builtins/arm/fixunsdfdi.S
A compiler-rt/lib/builtins/arm/fixunsdfsi.S
A compiler-rt/lib/builtins/arm/fixunssfdi.S
A compiler-rt/lib/builtins/arm/fixunssfsi.S
A compiler-rt/lib/builtins/arm/truncdfsf2.S
M compiler-rt/lib/profile/CMakeLists.txt
M compiler-rt/lib/profile/InstrProfilingFile.c
A compiler-rt/lib/profile/InstrProfilingPlatformROCm.cpp
M compiler-rt/lib/tysan/tysan.cpp
M compiler-rt/lib/tysan/tysan.h
M compiler-rt/lib/tysan/tysan_interceptors.cpp
A compiler-rt/test/builtins/Unit/extendsfdf2new_test.c
A compiler-rt/test/builtins/Unit/fixdfdinew_test.c
A compiler-rt/test/builtins/Unit/fixdfsinew_test.c
A compiler-rt/test/builtins/Unit/fixsfdinew_test.c
A compiler-rt/test/builtins/Unit/fixsfsinew_test.c
A compiler-rt/test/builtins/Unit/fixunsdfdinew_test.c
A compiler-rt/test/builtins/Unit/fixunsdfsinew_test.c
A compiler-rt/test/builtins/Unit/fixunssfdinew_test.c
A compiler-rt/test/builtins/Unit/fixunssfsinew_test.c
A compiler-rt/test/builtins/Unit/truncdfsf2new_test.c
A compiler-rt/test/tysan/set_type_unknown-interface.c
M cross-project-tests/intrinsic-header-tests/wasm_simd128.c
M flang-rt/cmake/modules/AddFlangRTOffload.cmake
M flang-rt/include/flang-rt/runtime/io-stmt.h
M flang-rt/lib/runtime/CMakeLists.txt
M flang-rt/lib/runtime/io-api-common.h
A flang-rt/lib/runtime/io-stmt-minimal.cpp
M flang/include/flang/Common/Fortran-consts.h
M flang/include/flang/Lower/ConvertVariable.h
M flang/include/flang/Lower/Support/PrivateReductionUtils.h
M flang/include/flang/Semantics/openmp-utils.h
M flang/include/flang/Support/Fortran.h
M flang/lib/Evaluate/formatting.cpp
M flang/lib/Lower/ConvertVariable.cpp
M flang/lib/Lower/OpenMP/ClauseProcessor.cpp
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Lower/Support/PrivateReductionUtils.cpp
M flang/lib/Optimizer/Transforms/FIRToMemRef.cpp
M flang/lib/Semantics/check-omp-loop.cpp
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/expression.cpp
M flang/lib/Semantics/openmp-utils.cpp
M flang/lib/Semantics/resolve-directives.cpp
M flang/lib/Semantics/type.cpp
M flang/lib/Support/Fortran.cpp
M flang/test/Lower/OpenMP/Todo/omp-declare-reduction-advanced-types.f90
M flang/test/Lower/OpenMP/Todo/reduction-character-dynamic-length.f90
A flang/test/Lower/OpenMP/copyprivate6.f90
A flang/test/Lower/OpenMP/declare-reduction-no-initializer-derived.f90
A flang/test/Lower/OpenMP/declare-reduction-no-initializer-intrinsic.f90
A flang/test/Lower/OpenMP/declare-reduction-no-initializer-target-derived.f90
A flang/test/Lower/OpenMP/declare-reduction-no-initializer-unsupported.f90
A flang/test/Lower/OpenMP/declare-reduction-target-intrinsic.f90
M flang/test/Semantics/OpenMP/declare-simd-uniform.f90
A flang/test/Semantics/PowerPC/ppc-vector-diagnostics.f90
M flang/test/Transforms/FIRToMemRef/slice-projected.mlir
M libc/include/CMakeLists.txt
M libc/test/src/__support/threads/linux/raw_mutex_test.cpp
M libc/utils/libctest/format.py
M libclc/clc/include/clc/relational/clc_signbit.h
M libclc/clc/lib/generic/relational/clc_signbit.cl
A libclc/clc/lib/generic/relational/clc_signbit.inc
M libcxx/docs/ReleaseNotes/23.rst
M libcxx/docs/Status/Cxx2cPapers.csv
M libcxx/include/CMakeLists.txt
A libcxx/include/__concepts/referenceable.h
M libcxx/include/__config
M libcxx/include/__functional/function.h
M libcxx/include/__iterator/common_iterator.h
M libcxx/include/__iterator/concepts.h
M libcxx/include/__iterator/iter_move.h
M libcxx/include/__iterator/iterator_traits.h
M libcxx/include/__memory/ranges_uninitialized_algorithms.h
M libcxx/include/__memory/uninitialized_algorithms.h
M libcxx/include/__ranges/adjacent_transform_view.h
M libcxx/include/__ranges/transform_view.h
M libcxx/include/__ranges/zip_transform_view.h
M libcxx/include/__type_traits/add_pointer.h
R libcxx/include/__type_traits/is_referenceable.h
M libcxx/include/__type_traits/remove_pointer.h
M libcxx/include/map
M libcxx/include/module.modulemap.in
M libcxx/include/set
M libcxx/test/libcxx-03/vendor/apple/disable-availability.sh.cpp
A libcxx/test/libcxx/atomics/builtin_clear_padding.pass.cpp
A libcxx/test/libcxx/utilities/function.objects/block.func.compile.pass.cpp
R libcxx/test/libcxx/utilities/meta/is_referenceable.compile.pass.cpp
M libcxx/test/libcxx/utilities/meta/is_within_lifetime.verify.cpp
M libcxx/test/selftest/modules/std-and-std.compat-module.sh.cpp
M libcxx/test/selftest/modules/std-module.sh.cpp
M libcxx/test/selftest/modules/std.compat-module.sh.cpp
M libcxx/test/std/containers/sequences/array/size_and_alignment.compile.pass.cpp
M libcxx/test/std/modules/std.compat.pass.cpp
M libcxx/test/std/modules/std.pass.cpp
M libcxx/test/std/numerics/c.math/signbit.pass.cpp
M libcxx/test/std/utilities/memory/specialized.algorithms/uninitialized.construct.value/ranges_uninitialized_value_construct.pass.cpp
M libcxx/test/std/utilities/memory/specialized.algorithms/uninitialized.construct.value/ranges_uninitialized_value_construct_n.pass.cpp
M libcxx/test/std/utilities/memory/specialized.algorithms/uninitialized.construct.value/uninitialized_value_construct.pass.cpp
M libcxx/test/std/utilities/memory/specialized.algorithms/uninitialized.construct.value/uninitialized_value_construct_n.pass.cpp
M libcxx/test/std/utilities/memory/specialized.algorithms/uninitialized.copy/ranges_uninitialized_copy.pass.cpp
M libcxx/test/std/utilities/memory/specialized.algorithms/uninitialized.copy/ranges_uninitialized_copy_n.pass.cpp
M libcxx/test/std/utilities/memory/specialized.algorithms/uninitialized.copy/uninitialized_copy.pass.cpp
M libcxx/test/std/utilities/memory/specialized.algorithms/uninitialized.copy/uninitialized_copy_n.pass.cpp
M libcxx/test/std/utilities/memory/specialized.algorithms/uninitialized.fill.n/ranges_uninitialized_fill_n.pass.cpp
M libcxx/test/std/utilities/memory/specialized.algorithms/uninitialized.fill.n/uninitialized_fill_n.pass.cpp
M libcxx/test/std/utilities/memory/specialized.algorithms/uninitialized.fill/ranges_uninitialized_fill.pass.cpp
M libcxx/test/std/utilities/memory/specialized.algorithms/uninitialized.fill/uninitialized_fill.pass.cpp
M libcxx/test/std/utilities/memory/specialized.algorithms/uninitialized.move/ranges_uninitialized_move.pass.cpp
M libcxx/test/std/utilities/memory/specialized.algorithms/uninitialized.move/ranges_uninitialized_move_n.pass.cpp
M libcxx/test/std/utilities/memory/specialized.algorithms/uninitialized.move/uninitialized_move.pass.cpp
M libcxx/test/std/utilities/memory/specialized.algorithms/uninitialized.move/uninitialized_move_n.pass.cpp
M libcxx/test/std/utilities/meta/meta.const.eval/is_within_lifetime.compile.pass.cpp
M libcxx/test/std/utilities/meta/meta.rel/is_virtual_base_of.pass.cpp
M libcxx/test/std/utilities/meta/meta.trans/objc_support.compile.pass.mm
M libcxx/test/std/utilities/meta/meta.unary/meta.unary.prop/is_implicit_lifetime.pass.cpp
M libcxx/test/std/utilities/meta/meta.unary/meta.unary.prop/is_implicit_lifetime.verify.cpp
M libcxx/utils/ci/docker/docker-compose.yml
M libsycl/test/lit.cfg.py
M lld/COFF/Chunks.cpp
M lld/ELF/Writer.cpp
M lld/test/COFF/arm64-relocs-imports.test
A lld/test/ELF/linkerscript/overlap-nobits.s
M lldb/include/lldb/Core/DataFileCache.h
M lldb/include/lldb/Core/Module.h
M lldb/include/lldb/Symbol/ObjectFile.h
M lldb/include/lldb/Symbol/Symbol.h
M lldb/include/lldb/Symbol/Symtab.h
M lldb/include/lldb/Utility/DataEncoder.h
M lldb/source/Commands/CommandObjectTarget.cpp
M lldb/source/Core/DataFileCache.cpp
M lldb/source/Core/Mangled.cpp
M lldb/source/Core/Module.cpp
M lldb/source/Plugins/DynamicLoader/MacOSX-DYLD/DynamicLoaderDarwin.cpp
M lldb/source/Plugins/DynamicLoader/MacOSX-DYLD/DynamicLoaderDarwin.h
M lldb/source/Symbol/Symtab.cpp
M lldb/source/Target/Process.cpp
M lldb/test/API/commands/register/aarch64_dynamic_regset/main.c
M lldb/test/API/commands/register/aarch64_sve_registers/rw_access_static_config/main.c
M lldb/test/API/lit.cfg.py
M lldb/test/API/lldbtest.py
M lldb/test/Shell/Commands/command-dil-diagnostics.test
M lldb/test/Shell/Commands/command-module-hook-fire.test
M lldb/test/Shell/Commands/process-attach-dummy.test
M lldb/test/Shell/ObjectFile/MachO/section-overflow-binary.test
M lldb/test/Shell/lit.cfg.py
M lldb/tools/lldb-dap/DAP.cpp
M lldb/tools/lldb-dap/OutputRedirector.cpp
M lldb/tools/lldb-dap/OutputRedirector.h
M lldb/tools/lldb-dap/Protocol/ProtocolTypes.cpp
M lldb/unittests/DAP/Handler/DisconnectTest.cpp
M lldb/unittests/DAP/ProtocolTypesTest.cpp
M llvm/cmake/modules/AddLLVM.cmake
M llvm/docs/Coroutines.rst
M llvm/docs/LangRef.rst
M llvm/docs/RISCVUsage.rst
M llvm/docs/ReleaseNotes.md
M llvm/docs/SandboxIR.md
M llvm/docs/SourceLevelDebugging.rst
M llvm/include/llvm-c/Remarks.h
M llvm/include/llvm-c/lto.h
M llvm/include/llvm/Analysis/FunctionPropertiesAnalysis.h
M llvm/include/llvm/AsmParser/LLToken.h
M llvm/include/llvm/BinaryFormat/Dwarf.def
M llvm/include/llvm/BinaryFormat/Dwarf.h
M llvm/include/llvm/CodeGen/GlobalISel/GIMatchTableExecutor.h
M llvm/include/llvm/CodeGen/GlobalISel/GIMatchTableExecutorImpl.h
M llvm/include/llvm/CodeGen/MachineFunction.h
M llvm/include/llvm/CodeGen/MachineMemOperand.h
M llvm/include/llvm/DebugInfo/CodeView/CodeViewRegisters.def
M llvm/include/llvm/IR/DebugInfoMetadata.h
M llvm/include/llvm/IR/FunctionProperties.def
M llvm/include/llvm/IR/Instruction.h
M llvm/include/llvm/IR/MemoryModelRelaxationAnnotations.h
M llvm/include/llvm/IR/RuntimeLibcalls.td
M llvm/include/llvm/MC/MCDwarf.h
A llvm/include/llvm/Object/BBAddrMap.def
M llvm/include/llvm/Object/BBAddrMap.h
M llvm/include/llvm/ProfileData/InstrProf.h
M llvm/include/llvm/SandboxIR/Context.h
M llvm/include/llvm/SandboxIR/Tracker.h
M llvm/include/llvm/Support/FileSystem.h
M llvm/include/llvm/Support/MemoryBuffer.h
M llvm/include/llvm/Support/Win64EH.h
M llvm/include/llvm/Transforms/Coroutines/CoroShape.h
M llvm/include/module.modulemap
M llvm/lib/Analysis/FunctionPropertiesAnalysis.cpp
M llvm/lib/Analysis/InstructionSimplify.cpp
M llvm/lib/AsmParser/LLLexer.cpp
M llvm/lib/AsmParser/LLParser.cpp
M llvm/lib/BinaryFormat/Dwarf.cpp
M llvm/lib/Bitcode/Reader/MetadataLoader.cpp
M llvm/lib/Bitcode/Writer/BitcodeWriter.cpp
M llvm/lib/CodeGen/AtomicExpandPass.cpp
M llvm/lib/CodeGen/CodeGenPrepare.cpp
M llvm/lib/CodeGen/ExpandIRInsts.cpp
M llvm/lib/CodeGen/MachineFunction.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/lib/DebugInfo/GSYM/GsymReader.cpp
M llvm/lib/IR/AsmWriter.cpp
M llvm/lib/IR/Instruction.cpp
M llvm/lib/IR/Instructions.cpp
M llvm/lib/IR/MemoryModelRelaxationAnnotations.cpp
M llvm/lib/IR/Verifier.cpp
M llvm/lib/MC/MCDwarf.cpp
M llvm/lib/Passes/PassBuilder.cpp
M llvm/lib/Passes/PassBuilderPipelines.cpp
M llvm/lib/Passes/PassRegistry.def
M llvm/lib/SandboxIR/Tracker.cpp
M llvm/lib/Support/CMakeLists.txt
M llvm/lib/Support/MemoryBuffer.cpp
M llvm/lib/Support/Unix/Path.inc
A llvm/lib/Support/Win64EH.cpp
M llvm/lib/Support/Windows/Path.inc
M llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
M llvm/lib/Target/AArch64/AArch64InstrFormats.td
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/lib/Target/AArch64/AArch64SMEInstrInfo.td
M llvm/lib/Target/AArch64/AArch64SystemOperands.td
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.h
M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
M llvm/lib/Target/AArch64/Utils/AArch64BaseInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeHelper.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
M llvm/lib/Target/AMDGPU/SIFrameLowering.cpp
M llvm/lib/Target/AMDGPU/SIFrameLowering.h
M llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.h
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
M llvm/lib/Target/AMDGPU/SIInstructions.td
M llvm/lib/Target/AMDGPU/SILowerSGPRSpills.cpp
M llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp
M llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.h
M llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
M llvm/lib/Target/AMDGPU/SIRegisterInfo.h
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
M llvm/lib/Target/AMDGPU/VOPDInstructions.td
M llvm/lib/Target/DirectX/DXContainerGlobals.cpp
M llvm/lib/Target/DirectX/DXILWriter/DXILBitcodeWriter.cpp
M llvm/lib/Target/DirectX/DXILWriter/DXILValueEnumerator.cpp
M llvm/lib/Target/DirectX/DXILWriter/DXILValueEnumerator.h
M llvm/lib/Target/DirectX/DirectXIRPasses/CMakeLists.txt
M llvm/lib/Target/DirectX/DirectXIRPasses/DXILDebugInfo.cpp
M llvm/lib/Target/DirectX/DirectXIRPasses/DXILDebugInfo.h
M llvm/lib/Target/DirectX/DirectXIRPasses/PointerTypeAnalysis.cpp
M llvm/lib/Target/Hexagon/HexagonISelLoweringHVX.cpp
M llvm/lib/Target/PowerPC/PPCISelLowering.cpp
M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVInstPrinter.cpp
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfo.td
M llvm/lib/Target/RISCV/RISCVInstrInfoP.td
A llvm/lib/Target/RISCV/RISCVInstrInfoZvbdota.td
M llvm/lib/Target/RISCV/RISCVMoveMerger.cpp
M llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86MCTargetDesc.cpp
M llvm/lib/Target/X86/X86AvoidStoreForwardingBlocks.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Transforms/Coroutines/CoroCleanup.cpp
M llvm/lib/Transforms/Coroutines/CoroEarly.cpp
M llvm/lib/Transforms/Coroutines/CoroSplit.cpp
M llvm/lib/Transforms/IPO/AttributorAttributes.cpp
M llvm/lib/Transforms/IPO/FunctionAttrs.cpp
M llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp
M llvm/lib/Transforms/Instrumentation/InstrProfiling.cpp
M llvm/lib/Transforms/Instrumentation/PGOInstrumentation.cpp
M llvm/lib/Transforms/Scalar/LoopFuse.cpp
M llvm/lib/Transforms/Scalar/SeparateConstOffsetFromGEP.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.h
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Passes/SeedCollection.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanAnalysis.cpp
M llvm/lib/Transforms/Vectorize/VPlanAnalysis.h
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanVerifier.cpp
M llvm/lib/Transforms/Vectorize/VectorCombine.cpp
A llvm/test/Analysis/FunctionPropertiesAnalysis/func-properties-analysis.ll
A llvm/test/Analysis/FunctionPropertiesAnalysis/pipeline.ll
R llvm/test/Analysis/FunctionPropertiesAnalysis/properties-stats.ll
M llvm/test/Assembler/dicompileunit.ll
A llvm/test/Assembler/invalid-dicompileunit-dialect.ll
A llvm/test/Bitcode/dicompileunit-dialect.ll
M llvm/test/Bitcode/upgrade-DICompileUnit-no-versioned-language.test
M llvm/test/CodeGen/AArch64/aarch64-sme-za-call-lowering.ll
M llvm/test/CodeGen/AArch64/aarch64-sysreg128.ll
A llvm/test/CodeGen/AArch64/arm64-invalid-sys-reg.ll
R llvm/test/CodeGen/AArch64/arm64-named-reg-notareg.ll
M llvm/test/CodeGen/AArch64/bf16-instructions.ll
M llvm/test/CodeGen/AArch64/bf16-v4-instructions.ll
M llvm/test/CodeGen/AArch64/bf16-v8-instructions.ll
M llvm/test/CodeGen/AArch64/expand-sme-pseudos.mir
M llvm/test/CodeGen/AArch64/fabs.ll
M llvm/test/CodeGen/AArch64/fast-isel-branch-cond-split.ll
M llvm/test/CodeGen/AArch64/fneg.ll
M llvm/test/CodeGen/AArch64/machine-sme-abi-find-insert-pt.mir
M llvm/test/CodeGen/AArch64/machine-sme-abi-skip-debug-inst.mir
M llvm/test/CodeGen/AArch64/sme-abi-eh-liveins.mir
M llvm/test/CodeGen/AArch64/sme-lazy-sve-nzcv-live.mir
M llvm/test/CodeGen/AArch64/special-reg.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/assert-align.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/call-outgoing-stack-args.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/localizer.ll
M llvm/test/CodeGen/AMDGPU/a-v-flat-atomicrmw.ll
M llvm/test/CodeGen/AMDGPU/a-v-global-atomicrmw.ll
M llvm/test/CodeGen/AMDGPU/abi-attribute-hints-undefined-behavior.ll
M llvm/test/CodeGen/AMDGPU/accvgpr-spill-scc-clobber.mir
M llvm/test/CodeGen/AMDGPU/agpr-copy-no-free-registers.ll
M llvm/test/CodeGen/AMDGPU/amdgcn-call-whole-wave.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.128bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.160bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.16bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.192bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.224bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.256bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.288bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.320bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.32bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.352bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.384bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.448bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.48bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.576bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.640bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.64bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.704bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.768bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.832bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.896bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.960bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.96bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.ptr.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-cs-chain-preserve-cc.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-pow-codegen.ll
A llvm/test/CodeGen/AMDGPU/amdgpu-spill-cfi-saved-regs.ll
M llvm/test/CodeGen/AMDGPU/attributor-flatscratchinit-undefined-behavior2.ll
M llvm/test/CodeGen/AMDGPU/av_spill_cross_bb_usage.mir
M llvm/test/CodeGen/AMDGPU/bf16.ll
M llvm/test/CodeGen/AMDGPU/branch-relax-spill.ll
M llvm/test/CodeGen/AMDGPU/call-args-inreg-bfloat.ll
M llvm/test/CodeGen/AMDGPU/call-args-inreg-no-sgpr-for-csrspill.ll
M llvm/test/CodeGen/AMDGPU/call-args-inreg.ll
M llvm/test/CodeGen/AMDGPU/call-argument-types.ll
M llvm/test/CodeGen/AMDGPU/call-graph-register-usage.ll
M llvm/test/CodeGen/AMDGPU/call-preserved-registers.ll
M llvm/test/CodeGen/AMDGPU/call-skip.ll
M llvm/test/CodeGen/AMDGPU/callee-frame-setup.ll
M llvm/test/CodeGen/AMDGPU/callee-special-input-vgprs-packed.ll
M llvm/test/CodeGen/AMDGPU/callee-special-input-vgprs.ll
M llvm/test/CodeGen/AMDGPU/cc-entry.ll
M llvm/test/CodeGen/AMDGPU/cc-inreg-sgpr0-3-mismatch.ll
M llvm/test/CodeGen/AMDGPU/copysign-simplify-demanded-bits.ll
M llvm/test/CodeGen/AMDGPU/cross-block-use-is-not-abi-copy.ll
M llvm/test/CodeGen/AMDGPU/debug-frame.ll
M llvm/test/CodeGen/AMDGPU/dwarf-multi-register-use-crash.ll
M llvm/test/CodeGen/AMDGPU/dynamic-vgpr-reserve-stack-for-cwsr.ll
M llvm/test/CodeGen/AMDGPU/eliminate-frame-index-s-mov-b32.mir
M llvm/test/CodeGen/AMDGPU/eliminate-frame-index-select.ll
M llvm/test/CodeGen/AMDGPU/eliminate-frame-index-select.mir
M llvm/test/CodeGen/AMDGPU/fix-frame-reg-in-custom-csr-spills.ll
M llvm/test/CodeGen/AMDGPU/flat-saddr-atomics.ll
M llvm/test/CodeGen/AMDGPU/frame-index.mir
M llvm/test/CodeGen/AMDGPU/frame-setup-without-sgpr-to-vgpr-spills.ll
A llvm/test/CodeGen/AMDGPU/fshl-scalar-shift-zero.ll
M llvm/test/CodeGen/AMDGPU/function-args-inreg.ll
M llvm/test/CodeGen/AMDGPU/gfx-call-non-gfx-func.ll
M llvm/test/CodeGen/AMDGPU/gfx-callable-argument-types.ll
M llvm/test/CodeGen/AMDGPU/gfx-callable-preserved-registers.ll
M llvm/test/CodeGen/AMDGPU/gfx-callable-return-types.ll
M llvm/test/CodeGen/AMDGPU/global-alias.ll
M llvm/test/CodeGen/AMDGPU/identical-subrange-spill-infloop.ll
M llvm/test/CodeGen/AMDGPU/indirect-call.ll
M llvm/test/CodeGen/AMDGPU/insert-delay-alu-bug.ll
M llvm/test/CodeGen/AMDGPU/insert-waitcnts-crash.ll
M llvm/test/CodeGen/AMDGPU/issue176578.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.scale.f32.16x16x128.f8f6f4.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.scale.f32.32x32x64.f8f6f4.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.readfirstlane.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.add.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.xor.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.smfmac.gfx950.ll
M llvm/test/CodeGen/AMDGPU/llvm.maximum.f64.ll
M llvm/test/CodeGen/AMDGPU/llvm.minimum.f64.ll
M llvm/test/CodeGen/AMDGPU/materialize-frame-index-sgpr.gfx10.ll
M llvm/test/CodeGen/AMDGPU/materialize-frame-index-sgpr.ll
M llvm/test/CodeGen/AMDGPU/maximumnum.bf16.ll
M llvm/test/CodeGen/AMDGPU/maximumnum.ll
M llvm/test/CodeGen/AMDGPU/memintrinsic-unroll.ll
M llvm/test/CodeGen/AMDGPU/memset-param-combinations.ll
M llvm/test/CodeGen/AMDGPU/minimumnum.bf16.ll
M llvm/test/CodeGen/AMDGPU/minimumnum.ll
M llvm/test/CodeGen/AMDGPU/mul24-pass-ordering.ll
M llvm/test/CodeGen/AMDGPU/need-fp-from-vgpr-spills.ll
M llvm/test/CodeGen/AMDGPU/nested-calls.ll
M llvm/test/CodeGen/AMDGPU/no-source-locations-in-prologue.ll
M llvm/test/CodeGen/AMDGPU/nofpclass-call.ll
M llvm/test/CodeGen/AMDGPU/pei-amdgpu-cs-chain-preserve.mir
M llvm/test/CodeGen/AMDGPU/pei-vgpr-block-spill-csr.mir
M llvm/test/CodeGen/AMDGPU/preserve-wwm-copy-dst-reg.ll
M llvm/test/CodeGen/AMDGPU/s-getpc-b64-remat.ll
M llvm/test/CodeGen/AMDGPU/sgpr-spill-overlap-wwm-reserve.mir
M llvm/test/CodeGen/AMDGPU/sgpr-spills-split-regalloc.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v2i64.v8i64.ll
M llvm/test/CodeGen/AMDGPU/si-lower-sgpr-spills-vgpr-lanes-usage.mir
M llvm/test/CodeGen/AMDGPU/si-lower-sgpr-spills.mir
M llvm/test/CodeGen/AMDGPU/sibling-call.ll
M llvm/test/CodeGen/AMDGPU/spill-partial-csr-sgpr-live-ins.mir
M llvm/test/CodeGen/AMDGPU/spill-sgpr-csr-live-ins.mir
M llvm/test/CodeGen/AMDGPU/spill-sgpr-to-virtual-vgpr.mir
M llvm/test/CodeGen/AMDGPU/spill-vgpr-block.ll
M llvm/test/CodeGen/AMDGPU/spill_more_than_wavesize_csr_sgprs.ll
M llvm/test/CodeGen/AMDGPU/stack-realign.ll
M llvm/test/CodeGen/AMDGPU/stacksave_stackrestore.ll
M llvm/test/CodeGen/AMDGPU/strictfp_f16_abi_promote.ll
M llvm/test/CodeGen/AMDGPU/swdev504645-global-fold.ll
M llvm/test/CodeGen/AMDGPU/tail-call-inreg-arguments.waterfall.ll
M llvm/test/CodeGen/AMDGPU/tuple-allocation-failure.ll
M llvm/test/CodeGen/AMDGPU/unfold-masked-merge-scalar-variablemask.ll
M llvm/test/CodeGen/AMDGPU/unspill-vgpr-after-rewrite-vgpr-mfma.ll
M llvm/test/CodeGen/AMDGPU/unstructured-cfg-def-use-issue.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-mul.ll
M llvm/test/CodeGen/AMDGPU/vgpr-mark-last-scratch-load.ll
M llvm/test/CodeGen/AMDGPU/vgpr-tuple-allocation.ll
M llvm/test/CodeGen/AMDGPU/wait-xcnt-drain.mir
M llvm/test/CodeGen/AMDGPU/wait-xcnt.mir
M llvm/test/CodeGen/AMDGPU/waterfall-call-target-av-register-failure.ll
M llvm/test/CodeGen/AMDGPU/wave32.ll
M llvm/test/CodeGen/AMDGPU/whole-wave-functions.ll
M llvm/test/CodeGen/AMDGPU/whole-wave-register-copy.ll
M llvm/test/CodeGen/AMDGPU/whole-wave-register-spill.ll
M llvm/test/CodeGen/AMDGPU/wwm-reserved-spill.ll
A llvm/test/CodeGen/DirectX/ContainerData/DebugName-DXIL.ll
M llvm/test/CodeGen/DirectX/lit.local.cfg
M llvm/test/CodeGen/Hexagon/inst_masked_store_bug1.ll
M llvm/test/CodeGen/Hexagon/isel-hvx-pred-bitcast-order.ll
A llvm/test/CodeGen/PowerPC/ppc-i64-to-fp.ll
M llvm/test/CodeGen/RISCV/attributes.ll
M llvm/test/CodeGen/RISCV/features-info.ll
A llvm/test/CodeGen/RISCV/move-merge-zdinx-mvsa-regression.mir
M llvm/test/CodeGen/RISCV/rvp-narrowing-shift-trunc.ll
M llvm/test/CodeGen/RISCV/rvp-simd-64.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-int-interleave.ll
M llvm/test/CodeGen/RISCV/rvv/vector-interleave-fixed.ll
A llvm/test/CodeGen/SystemZ/foldmem-regalloc.mir
M llvm/test/CodeGen/SystemZ/foldmemop-global.mir
M llvm/test/CodeGen/X86/avoid-sfb.ll
A llvm/test/CodeGen/X86/branchfolding-atomic-mmo.ll
M llvm/test/CodeGen/X86/vector-shuffle-combining-avx512vbmi2.ll
A llvm/test/CodeGen/X86/volatile-atomicrmw.ll
A llvm/test/DebugInfo/COFF/apx-egpr.ll
A llvm/test/Instrumentation/InstrProfiling/amdgpu-instrumentation.ll
A llvm/test/Instrumentation/InstrProfiling/amdgpu-profc-arrays.ll
A llvm/test/Instrumentation/InstrProfiling/gpu-weak.ll
M llvm/test/MC/AArch64/arm64-system-encoding.s
M llvm/test/MC/AArch64/armv9-mrrs-diagnostics.s
M llvm/test/MC/AArch64/armv9-mrrs.s
M llvm/test/MC/AArch64/armv9-msrr-diagnostics.s
M llvm/test/MC/AArch64/armv9-msrr.s
M llvm/test/MC/AArch64/basic-a64-instructions.s
M llvm/test/MC/Disassembler/AArch64/armv8.2a-uao.txt
M llvm/test/MC/Disassembler/AArch64/armv8.4a-dit.txt
M llvm/test/MC/Disassembler/AArch64/armv8.5a-dataproc.txt
M llvm/test/MC/Disassembler/AArch64/armv8.5a-mte.txt
M llvm/test/MC/Disassembler/AArch64/armv8.5a-sb.txt
M llvm/test/MC/Disassembler/AArch64/armv8.5a-ssbs.txt
M llvm/test/MC/Disassembler/AArch64/armv8.7a-wfxt.txt
M llvm/test/MC/Disassembler/AArch64/armv8.7a-xs.txt
M llvm/test/MC/Disassembler/AArch64/armv8.8a-nmi.txt
M llvm/test/MC/Disassembler/AArch64/basic-a64-instructions.txt
M llvm/test/MC/RISCV/attribute-arch.s
A llvm/test/MC/RISCV/rvv/zvfbdota32f-invalid.s
A llvm/test/MC/RISCV/rvv/zvfbdota32f.s
A llvm/test/MC/RISCV/rvv/zvfqwbdota8f-invalid.s
A llvm/test/MC/RISCV/rvv/zvfqwbdota8f.s
A llvm/test/MC/RISCV/rvv/zvfwbdota16bf-invalid.s
A llvm/test/MC/RISCV/rvv/zvfwbdota16bf.s
A llvm/test/MC/RISCV/rvv/zvqwbdota-invalid.s
A llvm/test/MC/RISCV/rvv/zvqwbdota.s
M llvm/test/TableGen/GlobalISelCombinerEmitter/match-table.td
M llvm/test/TableGen/GlobalISelEmitter/GlobalISelEmitter.td
M llvm/test/TableGen/GlobalISelEmitter/HwModes.td
M llvm/test/TableGen/RegClassByHwMode.td
A llvm/test/Transforms/AtomicExpand/RISCV/atomicrmw-widen-volatile.ll
M llvm/test/Transforms/Attributor/align-atomic.ll
M llvm/test/Transforms/Attributor/align.ll
M llvm/test/Transforms/Attributor/liveness.ll
M llvm/test/Transforms/Attributor/noalias.ll
M llvm/test/Transforms/Attributor/nocapture-1.ll
M llvm/test/Transforms/Attributor/nocapture-2.ll
M llvm/test/Transforms/Attributor/nofpclass.ll
M llvm/test/Transforms/Attributor/nonnull.ll
M llvm/test/Transforms/Attributor/nosync.ll
M llvm/test/Transforms/Attributor/range.ll
M llvm/test/Transforms/Attributor/readattrs.ll
M llvm/test/Transforms/Attributor/undefined_behavior.ll
M llvm/test/Transforms/Attributor/value-simplify-instances.ll
M llvm/test/Transforms/Attributor/value-simplify-pointer-info-struct.ll
M llvm/test/Transforms/Attributor/value-simplify-pointer-info.ll
M llvm/test/Transforms/Attributor/value-simplify.ll
A llvm/test/Transforms/CodeGenPrepare/X86/split-branch-cond-weights.ll
M llvm/test/Transforms/Coroutines/coro-alloc-with-param-O0.ll
M llvm/test/Transforms/Coroutines/coro-alloc-with-param-O2.ll
M llvm/test/Transforms/Coroutines/coro-alloca-07.ll
M llvm/test/Transforms/Coroutines/coro-await-suspend-handle-in-ramp.ll
M llvm/test/Transforms/Coroutines/coro-await-suspend-lower-invoke.ll
M llvm/test/Transforms/Coroutines/coro-await-suspend-lower.ll
M llvm/test/Transforms/Coroutines/coro-debug-O2.ll
M llvm/test/Transforms/Coroutines/coro-debug-coro-frame.ll
M llvm/test/Transforms/Coroutines/coro-debug-dbg.values-not_used_in_frame.ll
M llvm/test/Transforms/Coroutines/coro-debug-frame-variable.ll
M llvm/test/Transforms/Coroutines/coro-debug-spill-dbg.declare.ll
M llvm/test/Transforms/Coroutines/coro-debug.ll
M llvm/test/Transforms/Coroutines/coro-eh-aware-edge-split-00.ll
M llvm/test/Transforms/Coroutines/coro-eh-aware-edge-split-01.ll
M llvm/test/Transforms/Coroutines/coro-eh-aware-edge-split-02.ll
M llvm/test/Transforms/Coroutines/coro-frame-arrayalloca.ll
M llvm/test/Transforms/Coroutines/coro-frame.ll
M llvm/test/Transforms/Coroutines/coro-noop-pacbti.ll
M llvm/test/Transforms/Coroutines/coro-noop.ll
M llvm/test/Transforms/Coroutines/coro-padding.ll
M llvm/test/Transforms/Coroutines/coro-resume-destroy.ll
M llvm/test/Transforms/Coroutines/coro-spill-corobegin.ll
M llvm/test/Transforms/Coroutines/coro-spill-promise-02.ll
M llvm/test/Transforms/Coroutines/coro-spill-promise.ll
M llvm/test/Transforms/Coroutines/coro-spill-suspend.ll
M llvm/test/Transforms/Coroutines/coro-split-dbg-labels-inlined.ll
M llvm/test/Transforms/Coroutines/coro-split-dbg-labels.ll
M llvm/test/Transforms/Coroutines/coro-split-eh-00.ll
M llvm/test/Transforms/Coroutines/coro-split-eh-01.ll
M llvm/test/Transforms/Coroutines/coro-split-musttail-chain-pgo-counter-promo.ll
M llvm/test/Transforms/Coroutines/coro-split-musttail.ll
M llvm/test/Transforms/Coroutines/coro-split-musttail1.ll
M llvm/test/Transforms/Coroutines/coro-split-musttail2.ll
M llvm/test/Transforms/Coroutines/coro-split-musttail3.ll
M llvm/test/Transforms/Coroutines/coro-split-musttail4.ll
M llvm/test/Transforms/Coroutines/coro-split-musttail5.ll
M llvm/test/Transforms/Coroutines/coro-split-musttail6.ll
M llvm/test/Transforms/Coroutines/coro-split-musttail7.ll
M llvm/test/Transforms/Coroutines/coro-split-sink-lifetime-01.ll
M llvm/test/Transforms/Coroutines/coro-split-sink-lifetime-02.ll
M llvm/test/Transforms/Coroutines/coro-split-sink-lifetime-03.ll
M llvm/test/Transforms/Coroutines/coro-split-sink-lifetime-04.ll
M llvm/test/Transforms/Coroutines/coro-split-tbaa-md.ll
M llvm/test/Transforms/Coroutines/coro-zero-alloca.ll
A llvm/test/Transforms/EarlyCSE/AArch64/intrinsics-1xN.ll
A llvm/test/Transforms/ExpandIRInsts/X86/expand-large-fp-convert-fpto-sat-vector.ll
M llvm/test/Transforms/FunctionAttrs/atomic.ll
M llvm/test/Transforms/FunctionAttrs/nocapture.ll
M llvm/test/Transforms/FunctionAttrs/nonnull.ll
M llvm/test/Transforms/FunctionAttrs/nosync.ll
M llvm/test/Transforms/FunctionAttrs/readattrs.ll
M llvm/test/Transforms/FunctionAttrs/writeonly.ll
M llvm/test/Transforms/InstCombine/ldexp.ll
M llvm/test/Transforms/InstCombine/or-bitmask.ll
A llvm/test/Transforms/InstCombine/trunc-abs-intrinsics.ll
M llvm/test/Transforms/InstSimplify/call.ll
M llvm/test/Transforms/LoopFusion/loop_invariant.ll
A llvm/test/Transforms/LoopFusion/pr191238.ll
M llvm/test/Transforms/LoopVectorize/AArch64/alias-mask.ll
M llvm/test/Transforms/LoopVectorize/AArch64/store-costs-sve.ll
M llvm/test/Transforms/OpenMP/parallel_deletion.ll
A llvm/test/Transforms/PGOProfile/amdgpu-disable-value-profiling.ll
A llvm/test/Transforms/SLPVectorizer/AArch64/lcssa-phi-inner-loop-scale.ll
A llvm/test/Transforms/SLPVectorizer/RISCV/runtime-strided-stores.ll
M llvm/test/Transforms/SLPVectorizer/X86/alternate-calls-inseltpoison.ll
M llvm/test/Transforms/SLPVectorizer/X86/alternate-calls.ll
M llvm/test/Transforms/SLPVectorizer/X86/arith-fp-inseltpoison.ll
M llvm/test/Transforms/SLPVectorizer/X86/arith-fp.ll
M llvm/test/Transforms/SLPVectorizer/X86/deleted-instructions-clear.ll
M llvm/test/Transforms/SLPVectorizer/X86/revec-non-power-2-to-power-2-large-vect.ll
M llvm/test/Transforms/SLPVectorizer/X86/scalarize-ctlz.ll
M llvm/test/Transforms/SLPVectorizer/X86/select-copyable-cmp-poison.ll
M llvm/test/Transforms/SLPVectorizer/X86/sitofp.ll
M llvm/test/Transforms/SLPVectorizer/X86/vec_list_bias-inseltpoison.ll
M llvm/test/Transforms/SLPVectorizer/X86/vec_list_bias.ll
M llvm/test/Transforms/SLPVectorizer/X86/vec_list_bias_external_insert_shuffled.ll
M llvm/test/Transforms/SLPVectorizer/X86/vectorize-widest-phis.ll
M llvm/test/Transforms/SLPVectorizer/extract-many-users-buildvector.ll
A llvm/test/Transforms/SandboxVectorizer/seed_collection_loads.ll
M llvm/test/Transforms/SeparateConstOffsetFromGEP/AMDGPU/lower-gep.ll
M llvm/test/Transforms/SeparateConstOffsetFromGEP/split-gep-sub.ll
M llvm/test/Transforms/SimpleLoopUnswitch/trivial-unswitch-profmd.ll
A llvm/test/Transforms/VectorCombine/RISCV/vector-deinterleave2.ll
A llvm/test/tools/dxil-dis/dbg-declare-undef.ll
A llvm/test/tools/dxil-dis/dbg-value.ll
M llvm/test/tools/dxil-dis/debug-info.ll
A llvm/test/tools/dxil-dis/di-label.ll
A llvm/test/tools/llvm-objdump/COFF/win64-unwindv3-all-wods.yaml
A llvm/test/tools/llvm-objdump/COFF/win64-unwindv3-apx.yaml
A llvm/test/tools/llvm-objdump/COFF/win64-unwindv3-bad-inherit.yaml
A llvm/test/tools/llvm-objdump/COFF/win64-unwindv3-bad-opcode.yaml
A llvm/test/tools/llvm-objdump/COFF/win64-unwindv3-bad-push-consecutive-2.yaml
A llvm/test/tools/llvm-objdump/COFF/win64-unwindv3-basic.yaml
A llvm/test/tools/llvm-objdump/COFF/win64-unwindv3-chain.yaml
A llvm/test/tools/llvm-objdump/COFF/win64-unwindv3-distinct-epilog.yaml
A llvm/test/tools/llvm-objdump/COFF/win64-unwindv3-epilog-flags.yaml
A llvm/test/tools/llvm-objdump/COFF/win64-unwindv3-epilog-large.yaml
A llvm/test/tools/llvm-objdump/COFF/win64-unwindv3-epilog.yaml
A llvm/test/tools/llvm-objdump/COFF/win64-unwindv3-handler-odd-payload.yaml
A llvm/test/tools/llvm-objdump/COFF/win64-unwindv3-handler.yaml
A llvm/test/tools/llvm-objdump/COFF/win64-unwindv3-large.yaml
A llvm/test/tools/llvm-objdump/COFF/win64-unwindv3-multi-epilog.yaml
A llvm/test/tools/llvm-objdump/COFF/win64-unwindv3-neg-offset.yaml
A llvm/test/tools/llvm-objdump/COFF/win64-unwindv3-pool-overflow.yaml
A llvm/test/tools/llvm-objdump/COFF/win64-unwindv3-reloc.yaml
A llvm/test/tools/llvm-readobj/COFF/unwind-x86_64-v3-all-wods.yaml
A llvm/test/tools/llvm-readobj/COFF/unwind-x86_64-v3-apx.yaml
A llvm/test/tools/llvm-readobj/COFF/unwind-x86_64-v3-bad-inherit.yaml
A llvm/test/tools/llvm-readobj/COFF/unwind-x86_64-v3-bad-opcode.yaml
A llvm/test/tools/llvm-readobj/COFF/unwind-x86_64-v3-basic.yaml
A llvm/test/tools/llvm-readobj/COFF/unwind-x86_64-v3-chain.yaml
A llvm/test/tools/llvm-readobj/COFF/unwind-x86_64-v3-distinct-epilog.yaml
A llvm/test/tools/llvm-readobj/COFF/unwind-x86_64-v3-epilog-flags.yaml
A llvm/test/tools/llvm-readobj/COFF/unwind-x86_64-v3-epilog.yaml
A llvm/test/tools/llvm-readobj/COFF/unwind-x86_64-v3-handler.yaml
A llvm/test/tools/llvm-readobj/COFF/unwind-x86_64-v3-multi-epilog.yaml
A llvm/test/tools/llvm-readobj/COFF/unwind-x86_64-v3-neg-offset.yaml
A llvm/test/tools/llvm-readobj/COFF/unwind-x86_64-v3-pool-overflow.yaml
A llvm/test/tools/llvm-readobj/COFF/unwind-x86_64-v3-reloc.yaml
A llvm/test/tools/llvm-symbolizer/Inputs/wasm-basic.yaml
R llvm/test/tools/llvm-symbolizer/lit.local.cfg
M llvm/test/tools/llvm-symbolizer/wasm-basic.s
M llvm/tools/llvm-gsymutil/Opts.td
M llvm/tools/llvm-gsymutil/llvm-gsymutil.cpp
M llvm/tools/llvm-objdump/COFFDump.cpp
M llvm/tools/llvm-objdump/ObjdumpOpts.td
M llvm/tools/llvm-objdump/llvm-objdump.cpp
M llvm/tools/llvm-objdump/llvm-objdump.h
M llvm/tools/llvm-profgen/ProfiledBinary.cpp
M llvm/tools/llvm-readobj/Opts.td
M llvm/tools/llvm-readobj/Win64EHDumper.cpp
M llvm/tools/llvm-readobj/Win64EHDumper.h
M llvm/tools/llvm-readobj/llvm-readobj.cpp
M llvm/tools/llvm-readobj/llvm-readobj.h
M llvm/unittests/IR/MetadataTest.cpp
M llvm/unittests/IR/VerifierTest.cpp
M llvm/unittests/SandboxIR/TrackerTest.cpp
M llvm/unittests/TargetParser/RISCVISAInfoTest.cpp
M llvm/unittests/Transforms/Vectorize/VPlanTest.cpp
M llvm/utils/TableGen/Common/GlobalISel/GlobalISelMatchTable.cpp
M llvm/utils/gn/secondary/compiler-rt/lib/builtins/BUILD.gn
M llvm/utils/gn/secondary/libcxx/include/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/Transforms/Utils/BUILD.gn
M llvm/utils/lit/lit/LitConfig.py
M llvm/utils/lit/lit/TestRunner.py
M llvm/utils/lit/lit/TestingConfig.py
M llvm/utils/lit/lit/formats/googletest.py
M llvm/utils/lit/lit/main.py
M llvm/utils/lit/tests/Inputs/googletest-timeout/lit.cfg
M llvm/utils/lit/tests/Inputs/shtest-timeout/lit.cfg
M llvm/utils/profcheck-xfail.txt
M mlir/include/mlir/Conversion/TosaToSPIRVTosa/TosaToSPIRVTosa.h
M mlir/include/mlir/Dialect/AMDGPU/IR/AMDGPUOps.td
M mlir/include/mlir/Dialect/LLVMIR/ROCDLOps.td
M mlir/include/mlir/Dialect/Tosa/IR/TargetEnv.h
M mlir/include/mlir/Dialect/Tosa/IR/TosaOps.td
M mlir/include/mlir/Dialect/XeGPU/Transforms/XeGPULayoutImpl.h
M mlir/include/mlir/IR/MLIRContext.h
M mlir/include/mlir/Interfaces/MemorySlotInterfaces.h
M mlir/include/mlir/Interfaces/MemorySlotInterfaces.td
A mlir/include/mlir/Target/SPIRV/SPIRVExtInstSets.h
M mlir/lib/Analysis/SliceAnalysis.cpp
M mlir/lib/Conversion/AMDGPUToROCDL/AMDGPUToROCDL.cpp
M mlir/lib/Conversion/ComplexToSPIRV/ComplexToSPIRV.cpp
M mlir/lib/Conversion/SPIRVToLLVM/SPIRVToLLVM.cpp
M mlir/lib/Conversion/TosaToSPIRVTosa/CMakeLists.txt
A mlir/lib/Conversion/TosaToSPIRVTosa/TosaToSPIRVTosaOps.cpp
M mlir/lib/Conversion/TosaToSPIRVTosa/TosaToSPIRVTosaPass.cpp
M mlir/lib/Dialect/Tosa/IR/TargetEnv.cpp
M mlir/lib/Dialect/Tosa/IR/TosaCanonicalizations.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPULayoutImpl.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUPropagateLayout.cpp
M mlir/lib/IR/MLIRContext.cpp
M mlir/lib/Interfaces/MemorySlotInterfaces.cpp
M mlir/lib/Support/TypeID.cpp
M mlir/lib/Target/SPIRV/Deserialization/DeserializeOps.cpp
M mlir/lib/Target/SPIRV/Deserialization/Deserializer.h
M mlir/lib/Target/SPIRV/Serialization/SerializeOps.cpp
M mlir/lib/Target/SPIRV/Serialization/Serializer.cpp
M mlir/lib/Target/SPIRV/Serialization/Serializer.h
M mlir/lib/Target/SPIRV/TranslateRegistration.cpp
M mlir/lib/Transforms/Mem2Reg.cpp
A mlir/test/Conversion/AMDGPUToROCDL/permlane-var.mlir
M mlir/test/Conversion/ComplexToSPIRV/complex-to-spirv.mlir
M mlir/test/Conversion/SPIRVToLLVM/gl-ops-to-llvm.mlir
A mlir/test/Conversion/TosaToSPIRVTosa/tosa-to-spirv.mlir
M mlir/test/Dialect/Affine/slicing-utils.mlir
M mlir/test/Dialect/LLVMIR/rocdl.mlir
M mlir/test/Dialect/Tosa/canonicalize.mlir
R mlir/test/Dialect/Tosa/fold_concats.mlir
M mlir/test/Dialect/XeGPU/propagate-layout-subgroup.mlir
M mlir/test/Dialect/XeGPU/propagate-layout.mlir
M mlir/test/Target/LLVMIR/rocdl.mlir
R mlir/test/Target/SPIRV/debug-negative.mlir
A mlir/test/Target/SPIRV/graph-debug-info-negative.mlir
A mlir/test/Target/SPIRV/graph-debug-info.mlir
M mlir/test/Transforms/mem2reg.mlir
M mlir/test/lib/Dialect/Test/TestOpDefs.cpp
M mlir/test/lib/Dialect/Test/TestOps.td
M mlir/unittests/Dialect/SPIRV/DeserializationTest.cpp
M offload/liboffload/CMakeLists.txt
M offload/libomptarget/CMakeLists.txt
M orc-rt/include/orc-rt/NativeDylibManager.h
M orc-rt/lib/executor/NativeDylibManager.cpp
M orc-rt/lib/executor/sps-ci/NativeDylibManagerSPSCI.cpp
M orc-rt/unittests/NativeDylibManagerSPSCITest.cpp
M orc-rt/unittests/NativeDylibManagerTest.cpp
M utils/bazel/.bazelrc
M utils/bazel/MODULE.bazel
M utils/bazel/MODULE.bazel.lock
M utils/bazel/llvm-project-overlay/clang/BUILD.bazel
M utils/bazel/llvm-project-overlay/compiler-rt/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
A utils/bazel/llvm-project-overlay/libc/test/src/__support/threads/BUILD.bazel
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
Merge branch 'main' of https://github.com/llvm/llvm-project into users/ssahasra/av-metadata
Compare: https://github.com/llvm/llvm-project/compare/3d9cc99fb862...7b5ba2396b43
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