[all-commits] [llvm/llvm-project] 326a13: [LSR][AArch64] Precommit tests showing lack of `mu...

[Benjamin Maxwell via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 326a1320dc98be6ce17270a2138b76f2036aaa5e
      https://github.com/llvm/llvm-project/commit/326a1320dc98be6ce17270a2138b76f2036aaa5e
  Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
  Date:   2026-05-28 (Thu, 28 May 2026)

  Changed paths:
    M llvm/test/Transforms/LoopStrengthReduce/AArch64/vscale-fixups.ll

  Log Message:
  -----------
  [LSR][AArch64] Precommit tests showing lack of `mul vl` addressing (NFC) (#200149)

These loops could be using `mul vl` addressing in the loop and use fewer
base registers and have a smaller loop setup.



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