[all-commits] [llvm/llvm-project] b115dd: [AArch64] Fix definition of system register move i...

[Lukacma via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: b115dd117ac109ac501b8bc044dbdefd6f5f2471
      https://github.com/llvm/llvm-project/commit/b115dd117ac109ac501b8bc044dbdefd6f5f2471
  Author: Lukacma <Marian.Lukac at arm.com>
  Date:   2026-05-28 (Thu, 28 May 2026)

  Changed paths:
    M lldb/test/API/commands/register/aarch64_dynamic_regset/main.c
    M lldb/test/API/commands/register/aarch64_sve_registers/rw_access_static_config/main.c
    M llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
    M llvm/lib/Target/AArch64/AArch64InstrFormats.td
    M llvm/lib/Target/AArch64/AArch64InstrInfo.td
    M llvm/lib/Target/AArch64/AArch64SMEInstrInfo.td
    M llvm/lib/Target/AArch64/AArch64SystemOperands.td
    M llvm/lib/Target/AArch64/Utils/AArch64BaseInfo.cpp
    M llvm/test/CodeGen/AArch64/aarch64-sme-za-call-lowering.ll
    M llvm/test/CodeGen/AArch64/aarch64-sysreg128.ll
    A llvm/test/CodeGen/AArch64/arm64-invalid-sys-reg.ll
    R llvm/test/CodeGen/AArch64/arm64-named-reg-notareg.ll
    M llvm/test/CodeGen/AArch64/expand-sme-pseudos.mir
    M llvm/test/CodeGen/AArch64/machine-sme-abi-find-insert-pt.mir
    M llvm/test/CodeGen/AArch64/machine-sme-abi-skip-debug-inst.mir
    M llvm/test/CodeGen/AArch64/sme-abi-eh-liveins.mir
    M llvm/test/CodeGen/AArch64/sme-lazy-sve-nzcv-live.mir
    M llvm/test/CodeGen/AArch64/special-reg.ll
    M llvm/test/MC/AArch64/arm64-system-encoding.s
    M llvm/test/MC/AArch64/armv9-mrrs-diagnostics.s
    M llvm/test/MC/AArch64/armv9-mrrs.s
    M llvm/test/MC/AArch64/armv9-msrr-diagnostics.s
    M llvm/test/MC/AArch64/armv9-msrr.s
    M llvm/test/MC/AArch64/basic-a64-instructions.s
    M llvm/test/MC/Disassembler/AArch64/armv8.2a-uao.txt
    M llvm/test/MC/Disassembler/AArch64/armv8.4a-dit.txt
    M llvm/test/MC/Disassembler/AArch64/armv8.5a-dataproc.txt
    M llvm/test/MC/Disassembler/AArch64/armv8.5a-mte.txt
    M llvm/test/MC/Disassembler/AArch64/armv8.5a-sb.txt
    M llvm/test/MC/Disassembler/AArch64/armv8.5a-ssbs.txt
    M llvm/test/MC/Disassembler/AArch64/armv8.7a-wfxt.txt
    M llvm/test/MC/Disassembler/AArch64/armv8.7a-xs.txt
    M llvm/test/MC/Disassembler/AArch64/armv8.8a-nmi.txt
    M llvm/test/MC/Disassembler/AArch64/basic-a64-instructions.txt

  Log Message:
  -----------
  [AArch64] Fix definition of system register move instructions (#185709)

Current implementation of these instructions makes bit20 in the encoding
part of the system register operand, which is incorrect since
[specification](https://developer.arm.com/documentation/ddi0602/latest)
specifies that bit must be set to 1. This patch changes that and removes
the bit 20 from the encoding of the operand and makes it fixed field for
these instructions. It also fixes the parser and codegen by checking
that Op0 in system register name/encoding is correctly constrained to 2
or 3.

Depends on #185970



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