[all-commits] [llvm/llvm-project] 311802: Revert LSS-based implicit def insertion for missin...

[Dhruva Chakrabarti via All-commits]

  Branch: refs/heads/users/dhruvachak/issue-196671
  Home:   https://github.com/llvm/llvm-project
  Commit: 3118020b567e48533a93d15476c015c4e40e6cc4
      https://github.com/llvm/llvm-project/commit/3118020b567e48533a93d15476c015c4e40e6cc4
  Author: Dhruva Chakrabarti <Dhruva.Chakrabarti at amd.com>
  Date:   2026-05-23 (Sat, 23 May 2026)

  Changed paths:
    M llvm/lib/Target/AMDGPU/AMDGPURewriteAGPRCopyMFMA.cpp

  Log Message:
  -----------
  Revert LSS-based implicit def insertion for missing dominating spill store.


  Commit: 15e0153ce9072fe488854d664587f6ca19a803e5
      https://github.com/llvm/llvm-project/commit/15e0153ce9072fe488854d664587f6ca19a803e5
  Author: theRonShark <rlieberm at amd.com>
  Date:   2026-05-23 (Sat, 23 May 2026)

  Changed paths:
    M llvm/lib/Target/AMDGPU/AMDGPURewriteAGPRCopyMFMA.cpp

  Log Message:
  -----------
  Verify dominance when rewriting spills to registers

Co-authored by: Austin Kerbow <Austin.Kerbow at amd.com>

Cherry-picked https://github.com/ROCm/llvm-project/commit/e5d02ddb


  Commit: 903793377944d753c4572e7080ce8605763751e0
      https://github.com/llvm/llvm-project/commit/903793377944d753c4572e7080ce8605763751e0
  Author: Dhruva Chakrabarti <Dhruva.Chakrabarti at amd.com>
  Date:   2026-05-23 (Sat, 23 May 2026)

  Changed paths:
    M llvm/test/CodeGen/AMDGPU/rewrite-vgpr-mfma-to-agpr-spill-implicit-def-mir.mir
    M llvm/test/CodeGen/AMDGPU/rewrite-vgpr-mfma-to-agpr-spill-implicit-def.ll

  Log Message:
  -----------
  Changed test debug message to reflect dominance check.


  Commit: b408d2a693af72209bd036058e5b30377d05f35c
      https://github.com/llvm/llvm-project/commit/b408d2a693af72209bd036058e5b30377d05f35c
  Author: Dhruva Chakrabarti <Dhruva.Chakrabarti at amd.com>
  Date:   2026-05-26 (Tue, 26 May 2026)

  Changed paths:
    M llvm/test/CodeGen/AMDGPU/rewrite-vgpr-mfma-to-agpr-spill-implicit-def-mir.mir
    M llvm/test/CodeGen/AMDGPU/rewrite-vgpr-mfma-to-agpr-spill-implicit-def.ll

  Log Message:
  -----------
  Ran instnamer to use named values.


  Commit: c2552e9591c9462660c5c9b1c94b1045d1a0d75e
      https://github.com/llvm/llvm-project/commit/c2552e9591c9462660c5c9b1c94b1045d1a0d75e
  Author: Dhruva Chakrabarti <Dhruva.Chakrabarti at amd.com>
  Date:   2026-05-26 (Tue, 26 May 2026)

  Changed paths:
    M llvm/test/CodeGen/AMDGPU/rewrite-vgpr-mfma-to-agpr-spill-implicit-def-mir.mir
    M llvm/test/CodeGen/AMDGPU/rewrite-vgpr-mfma-to-agpr-spill-implicit-def.ll

  Log Message:
  -----------
  Removed unneeded attributes.


  Commit: bce4a16635ba21bddc9012765aa1bd96c56ef6b5
      https://github.com/llvm/llvm-project/commit/bce4a16635ba21bddc9012765aa1bd96c56ef6b5
  Author: Dhruva Chakrabarti <Dhruva.Chakrabarti at amd.com>
  Date:   2026-05-26 (Tue, 26 May 2026)

  Changed paths:
    M llvm/test/CodeGen/AMDGPU/rewrite-vgpr-mfma-to-agpr-spill-implicit-def-mir.mir
    M llvm/test/CodeGen/AMDGPU/rewrite-vgpr-mfma-to-agpr-spill-implicit-def.ll

  Log Message:
  -----------
  regex


  Commit: 1ddbdd96904c25df69db0ac7042027bff344d6bd
      https://github.com/llvm/llvm-project/commit/1ddbdd96904c25df69db0ac7042027bff344d6bd
  Author: Dhruva Chakrabarti <Dhruva.Chakrabarti at amd.com>
  Date:   2026-05-26 (Tue, 26 May 2026)

  Changed paths:
    R llvm/test/CodeGen/AMDGPU/rewrite-vgpr-mfma-to-agpr-spill-implicit-def-mir.mir
    R llvm/test/CodeGen/AMDGPU/rewrite-vgpr-mfma-to-agpr-spill-implicit-def.ll
    A llvm/test/CodeGen/AMDGPU/rewrite-vgpr-mfma-to-agpr-spill-joint-dom-mir.mir
    A llvm/test/CodeGen/AMDGPU/rewrite-vgpr-mfma-to-agpr-spill-joint-dom.ll

  Log Message:
  -----------
  Name cleanups.


Compare: https://github.com/llvm/llvm-project/compare/09d95e43ce60...1ddbdd96904c

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