[all-commits] [llvm/llvm-project] 5b17cd: [RISCV][P-ext] Split v4i16/v8i8 INSERT/EXTRACT_VEC...

[SiHuaN via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 5b17cdb0b5827d8423470084e6004c5686d9cb2a
      https://github.com/llvm/llvm-project/commit/5b17cdb0b5827d8423470084e6004c5686d9cb2a
  Author: SiHuaN <liyongtai at iscas.ac.cn>
  Date:   2026-05-28 (Thu, 28 May 2026)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
    M llvm/test/CodeGen/RISCV/rvp-narrowing-shift-trunc.ll
    M llvm/test/CodeGen/RISCV/rvp-simd-64.ll

  Log Message:
  -----------
  [RISCV][P-ext] Split v4i16/v8i8 INSERT/EXTRACT_VECTOR_ELT on RV32. (#199917)

With a constant lane index, split the vector and recurse on the
single-GPR half containing Idx (already Custom-lowered).



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