[all-commits] [llvm/llvm-project] 3e8c21: [AMDGPU] Fix ShiftAmt32Imm to use unsigned compari...

[Wooseok Lee via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 3e8c217c6829b7acebb0f80bfcd2f807d370000e
      https://github.com/llvm/llvm-project/commit/3e8c217c6829b7acebb0f80bfcd2f807d370000e
  Author: Wooseok Lee <wolee at amd.com>
  Date:   2026-05-27 (Wed, 27 May 2026)

  Changed paths:
    M llvm/lib/Target/AMDGPU/SIInstrInfo.td
    A llvm/test/CodeGen/AMDGPU/fshl-scalar-shift-zero.ll

  Log Message:
  -----------
  [AMDGPU] Fix ShiftAmt32Imm to use unsigned comparison (#199052)

ShiftAmt32Imm used a signed 'Imm < 32' predicate, which incorrectly
matched negative immediates such as -1. The scalar fshr fast path:
    
      def : GCNPat<(UniformTernaryFrag<fshr> i32:$src0, i32:$src1,
                                             (i32 ShiftAmt32Imm:$src2)),
        (i32 (EXTRACT_SUBREG (S_LSHR_B64 ..., $src2), sub0))>;
    
When fshl(scalar, X, Z) is lowered via expandFunnelShift for any
constant Z in [0, 31], the generic code converts it to fshr(..., ~Z) or
fshr(..., -Z), producing a negative shift amount. Because all such
values satisfy Imm < 32 in a signed comparison, ShiftAmt32Imm matched
and the pattern passed the negative immediate directly to S_LSHR_B64
without the S_AND_B32 masking. S_LSHR_B64 then shifted by the wrong
amount, producing an incorrect result.
    
Fix by changing the predicate to an unsigned comparison so that only
values in [0, 31] match, and negative values fall through to the general
pattern which correctly applies S_AND_B32 before S_LSHR_B64.
    
Fixes miscompilations of scalar fshl with any constant shift amount at
-O0 on AMDGPU targets, covering both fshl(scalar, const, Z) and
fshl(scalar, scalar, Z) for all Z in [0, 31].

---------

Co-authored-by: Claude Sonnet 4 <noreply at anthropic.com>



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