[all-commits] [llvm/llvm-project] a64920: DAGCombiner: (srl/sra (add nuw/nsw X, c), d) --> (...

[Nicolai Hähnle via All-commits]

  Branch: refs/heads/users/nhaehnle/spr/main/a1db952c
  Home:   https://github.com/llvm/llvm-project
  Commit: a6492065490f8da82873adffc04aa16d547305b5
      https://github.com/llvm/llvm-project/commit/a6492065490f8da82873adffc04aa16d547305b5
  Author: Nicolai Hähnle <nicolai.haehnle at amd.com>
  Date:   2026-05-07 (Thu, 07 May 2026)

  Changed paths:
    M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
    M llvm/test/CodeGen/AMDGPU/and.r600.ll
    M llvm/test/CodeGen/AMDGPU/ctpop16.ll
    M llvm/test/CodeGen/AMDGPU/fp_to_sint.ll
    M llvm/test/CodeGen/AMDGPU/fp_to_uint.ll
    M llvm/test/CodeGen/AMDGPU/kernel-args.ll
    M llvm/test/CodeGen/AMDGPU/llvm.exp.ll
    M llvm/test/CodeGen/AMDGPU/llvm.exp10.ll
    M llvm/test/CodeGen/AMDGPU/llvm.exp2.ll
    M llvm/test/CodeGen/AMDGPU/llvm.log.ll
    M llvm/test/CodeGen/AMDGPU/llvm.log10.ll
    M llvm/test/CodeGen/AMDGPU/llvm.log2.ll
    M llvm/test/CodeGen/AMDGPU/llvm.round.ll
    M llvm/test/CodeGen/AMDGPU/load-constant-i1.ll
    M llvm/test/CodeGen/AMDGPU/load-constant-i16.ll
    M llvm/test/CodeGen/AMDGPU/load-constant-i32.ll
    M llvm/test/CodeGen/AMDGPU/load-constant-i64.ll
    M llvm/test/CodeGen/AMDGPU/load-constant-i8.ll
    M llvm/test/CodeGen/AMDGPU/load-global-i16.ll
    M llvm/test/CodeGen/AMDGPU/load-global-i32.ll
    M llvm/test/CodeGen/AMDGPU/load-global-i8.ll
    M llvm/test/CodeGen/AMDGPU/max.ll
    M llvm/test/CodeGen/AMDGPU/min.ll
    M llvm/test/CodeGen/AMDGPU/r600.llvm.is.fpclass.ll
    M llvm/test/CodeGen/AMDGPU/rotr.ll
    M llvm/test/CodeGen/AMDGPU/shl.ll
    M llvm/test/CodeGen/AMDGPU/sra.ll
    M llvm/test/CodeGen/AMDGPU/srem.ll
    M llvm/test/CodeGen/AMDGPU/srl.ll
    M llvm/test/CodeGen/AMDGPU/waitcnt-vscnt.ll

  Log Message:
  -----------
  DAGCombiner: (srl/sra (add nuw/nsw X, c), d) --> (add nuw/nsw (srl/sra X, d), c >> d)

Additional precondition:
* The LSBs of c are 0; equivalently: c >> d is exact

Alive2 for
* unsigned case: https://alive2.llvm.org/ce/z/YcJ8qA
* signed case: https://alive2.llvm.org/ce/z/fgpvyE

We already canonicalize (shl (add ...) ...) to (add (shl ...) ...).

Restrict this combine to the single-use case to minimize risk for now.
The main target of this combine is a fan-out tree of `add`s that all end
up being shifted by the same amount at the leaves. This change happens to
improve a bunch of existing CodeGen tests in AMDGPU.

commit-id:a1db952c



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