[all-commits] [llvm/llvm-project] 89efe1: [MLIR][ControlFlow] Enable strict property assembl...

[Mehdi Amini via All-commits]

  Branch: refs/heads/users/mamini/strict_prop_ods-ControlFlow
  Home:   https://github.com/llvm/llvm-project
  Commit: 89efe1b19547ac25179b66734edfeac42beed2e3
      https://github.com/llvm/llvm-project/commit/89efe1b19547ac25179b66734edfeac42beed2e3
  Author: Mehdi Amini <joker.eph at gmail.com>
  Date:   2026-05-07 (Thu, 07 May 2026)

  Changed paths:
    M mlir/include/mlir/Dialect/ControlFlow/IR/ControlFlowOps.td
    M mlir/test/Conversion/ControlFlowToLLVM/branch.mlir

  Log Message:
  -----------
  [MLIR][ControlFlow] Enable strict property assembly format

Enable the strict properties assembly format mode for the ControlFlow dialect.
The dialect formats already cover their inherent attributes, except for a test
that still used attr-dict spelling for branch weights.

Update that test to use the existing weights(...) syntax so the inherent
attribute is parsed through the declarative format.

Assisted-by: Codex



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