[all-commits] [llvm/llvm-project] 9527c1: [CIR] Add RegionBranchOpInterface unit tests and f...
Joel E. Denny via All-commits
all-commits at lists.llvm.org
Wed May 6 08:15:19 PDT 2026
Branch: refs/heads/users/jdenny-ornl/filecheck-diag-class-hierarchy
Home: https://github.com/llvm/llvm-project
Commit: 9527c104472e6f8b2557f8f3dc7fb4bb36dcd130
https://github.com/llvm/llvm-project/commit/9527c104472e6f8b2557f8f3dc7fb4bb36dcd130
Author: Henrich Lauko <xlauko at mail.muni.cz>
Date: 2026-05-06 (Wed, 06 May 2026)
Changed paths:
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
M clang/unittests/CIR/CMakeLists.txt
A clang/unittests/CIR/ControlFlowTest.cpp
Log Message:
-----------
[CIR] Add RegionBranchOpInterface unit tests and fix control flow bugs (#195433)
Add unit tests for RegionBranchOpInterface implementations across CIR
control flow operations: IfOp, ScopeOp, TernaryOp, SwitchOp, WhileOp,
ForOp, DoWhileOp, and TryOp. The tests verify successor regions,
terminator successors, loop detection, repetitive region marking, and
op/terminator successor consistency.
Fix a missing return in ConditionOp::getSuccessorRegions that caused
fallthrough from the loop case to an unconditional cast<AwaitOp>,
crashing when the parent is a loop operation.
Fix IfOp::getSuccessorRegions to report parent exit as a successor
when the else region is absent, correctly modeling the case where the
condition is false.
Commit: 5933d0bec78893804b0e8327381c9e1cadcb12eb
https://github.com/llvm/llvm-project/commit/5933d0bec78893804b0e8327381c9e1cadcb12eb
Author: Razvan Lupusoru <razvan.lupusoru at gmail.com>
Date: 2026-05-06 (Wed, 06 May 2026)
Changed paths:
M flang/lib/Optimizer/Analysis/AliasAnalysis.cpp
A flang/test/Analysis/AliasAnalysis/alias-analysis-absent.fir
Log Message:
-----------
[flang] Add support for fir.absent to AliasAnalysis (#195938)
Each fir.absent is classified like a distinct allocation so it does not
alias other real storage, another absent, or a global.
Commit: f996fa201def2dd0d8d1552ce9cbf44398529f17
https://github.com/llvm/llvm-project/commit/f996fa201def2dd0d8d1552ce9cbf44398529f17
Author: Shilei Tian <i at tianshilei.me>
Date: 2026-05-06 (Wed, 06 May 2026)
Changed paths:
A llvm/docs/AMDGPU/DeveloperGuideline.rst
M llvm/docs/AMDGPUUsage.rst
Log Message:
-----------
[RFC][AMDGPU][Doc] Add developer guideline (#194425)
This guideline covers topics on top of existing LLVM guideline.
Commit: 0e8a8d05c98a44a6a77f7dc16bc4d61b0d4bd46c
https://github.com/llvm/llvm-project/commit/0e8a8d05c98a44a6a77f7dc16bc4d61b0d4bd46c
Author: Luke Hutton <luke.hutton at arm.com>
Date: 2026-05-06 (Wed, 06 May 2026)
Changed paths:
M mlir/include/mlir/Dialect/Tosa/IR/TosaOps.td
M mlir/lib/Dialect/Tosa/IR/TosaCanonicalizations.cpp
M mlir/test/Dialect/Tosa/canonicalize.mlir
Log Message:
-----------
[mlir][tosa] Add canonicalization for adaptive to their non-adaptive variants (#195865)
This commit adds canonicalization patterns to convert adaptive pooling
(max and avg) to their non-adaptive variants when their CTC inputs are
constants.
This is beneficial for backends that do not support the adaptive op
variants.
Commit: e18d3f7ccc0aa6a791ade3d0521f3645c247ccc6
https://github.com/llvm/llvm-project/commit/e18d3f7ccc0aa6a791ade3d0521f3645c247ccc6
Author: Eric <55723758+efric at users.noreply.github.com>
Date: 2026-05-06 (Wed, 06 May 2026)
Changed paths:
M mlir/lib/Conversion/AMDGPUToROCDL/AMDGPUToROCDL.cpp
M mlir/test/Conversion/AMDGPUToROCDL/sparse-mfma-gfx950.mlir
Log Message:
-----------
[AMDGPU][MLIR] Fix legacy gfx942 bf16 sparse mfma lowering in gfx950 (#195977)
Previously, we treated all gfx950 BF16 sparse MFMA operands as native
bf16. But we could still select the legacy/shorter gfx942 variants of
the intrinsics (`16x16x32.bf16` / `32x32x16.bf16`) in gfx950. At the
ROCDL/LLVM level, these still expect the operands to be in the old `i16`
form, so bitcast them too.
---------
Signed-off-by: Eric Feng <Eric.Feng at amd.com>
Commit: d04c616c189181e58045770bc7f0c26c1f15e659
https://github.com/llvm/llvm-project/commit/d04c616c189181e58045770bc7f0c26c1f15e659
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-05-06 (Wed, 06 May 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVSubtarget.cpp
M llvm/unittests/Target/SPIRV/SPIRVGlobalRegistryTests.cpp
Log Message:
-----------
[SPIR-V] Reset SPIRVGlobalRegistry at module entry (#196058)
GlobalRegistry is owned by the TartgetMaching lifetime Subtarget but
caches IR pointers, so a reused TargetMachine (e.g. in case of JIT,
libFuzzer) would carry stale entries from a prior module
The bug was caught by `llvm-isel-fuzzer` ran for
`spirv64-unknown-unknown`
Commit: 4783f5104fb7009a76c69766004b034ad0a32c0f
https://github.com/llvm/llvm-project/commit/4783f5104fb7009a76c69766004b034ad0a32c0f
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-05-06 (Wed, 06 May 2026)
Changed paths:
M llvm/test/CodeGen/SPIRV/basic_float_types.ll
Log Message:
-----------
[NFC][SPIR-V] Remove XFAIL from basic_float_types.ll test (#195005)
The XFAIL directive without the comment is invalid syntax in LLVM IR.
The XFAIL itself introduced in
https://github.com/llvm/llvm-project/pull/168428 is redundant as of
today, the test is passing without it
Commit: caee04cbb3631b72ff4e4907cb63a4c1966e0e29
https://github.com/llvm/llvm-project/commit/caee04cbb3631b72ff4e4907cb63a4c1966e0e29
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-05-06 (Wed, 06 May 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVTargetObjectFile.h
M llvm/lib/Target/SPIRV/SPIRVUtils.h
Log Message:
-----------
[NFC][SPIR-V] Remove unused helpers (#195804)
Commit: e5dc9ad75b726d86b7e1fbc1cf340f373e1feada
https://github.com/llvm/llvm-project/commit/e5dc9ad75b726d86b7e1fbc1cf340f373e1feada
Author: Joel E. Denny <jdenny.ornl at gmail.com>
Date: 2026-05-06 (Wed, 06 May 2026)
Changed paths:
M llvm/include/llvm/FileCheck/FileCheck.h
M llvm/lib/FileCheck/FileCheck.cpp
M llvm/unittests/FileCheck/FileCheckTest.cpp
M llvm/utils/FileCheck/FileCheck.cpp
Log Message:
-----------
[FileCheck][NFC] Introduce MatchResultDiag and MatchNoteDiag (#195569)
This patch depends on PR #195568 and continues its effort to decouple
the `-dump-input` presentation layer (in
`llvm/utils/FileCheck/FileCheck.cpp`) and the FileCheck library's
diagnostic emission (in `llvm/lib/FileCheck/FileCheck.cpp`).
Similar to compiler errors/warnings/remarks vs. notes, the
`FileCheckDiag` series emitted by the FileCheck library contains match
results, each of which might be followed by a series of associated notes
before the next match result. Without this patch series, that
association is not formally modeled by `FileCheckDiag` or clearly
documented, and `-dump-input` is not able to easily reason about it.
This patch improves the situation by introducing two `FileCheckDiag`
derived classes: `MatchResultDiag` and `MatchNoteDiag`. It extends
`FileCheckDiagList` to directly associate each `MatchNoteDiag` with its
`MatchResultDiag`. Thus:
- `FileCheckDiagList::adjustPrevDiags` no longer has to determine that
association based on directive location info.
- Match result instances of `FileCheckDiag` no longer need to store a
redundant custom note field, which only makes sense for notes.
- Note instances of `FileCheckDiag` no longer need to store the
directive type and location, which are already stored by their match
result instances.
- In both the FileCheck library and the `-dump-input` presentation
layer, it is now clearer when a `FileCheckDiag` is a match result vs. a
note.
Commit: 05fc6f5a187ae4767be2cd16a5f66ab301e83ab9
https://github.com/llvm/llvm-project/commit/05fc6f5a187ae4767be2cd16a5f66ab301e83ab9
Author: Joel E. Denny <jdenny.ornl at gmail.com>
Date: 2026-05-06 (Wed, 06 May 2026)
Changed paths:
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
M clang/unittests/CIR/CMakeLists.txt
A clang/unittests/CIR/ControlFlowTest.cpp
M flang/lib/Optimizer/Analysis/AliasAnalysis.cpp
A flang/test/Analysis/AliasAnalysis/alias-analysis-absent.fir
A llvm/docs/AMDGPU/DeveloperGuideline.rst
M llvm/docs/AMDGPUUsage.rst
M llvm/lib/Target/SPIRV/SPIRVSubtarget.cpp
M llvm/lib/Target/SPIRV/SPIRVTargetObjectFile.h
M llvm/lib/Target/SPIRV/SPIRVUtils.h
M llvm/test/CodeGen/SPIRV/basic_float_types.ll
M llvm/unittests/Target/SPIRV/SPIRVGlobalRegistryTests.cpp
M mlir/include/mlir/Dialect/Tosa/IR/TosaOps.td
M mlir/lib/Conversion/AMDGPUToROCDL/AMDGPUToROCDL.cpp
M mlir/lib/Dialect/Tosa/IR/TosaCanonicalizations.cpp
M mlir/test/Conversion/AMDGPUToROCDL/sparse-mfma-gfx950.mlir
M mlir/test/Dialect/Tosa/canonicalize.mlir
Log Message:
-----------
Merge branch 'main' into filecheck-diag-result-vs-note
Commit: c25e60ed1724995dd936f84c3210e128dd959c97
https://github.com/llvm/llvm-project/commit/c25e60ed1724995dd936f84c3210e128dd959c97
Author: Joel E. Denny <jdenny.ornl at gmail.com>
Date: 2026-05-06 (Wed, 06 May 2026)
Changed paths:
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
M clang/unittests/CIR/CMakeLists.txt
A clang/unittests/CIR/ControlFlowTest.cpp
M flang/lib/Optimizer/Analysis/AliasAnalysis.cpp
A flang/test/Analysis/AliasAnalysis/alias-analysis-absent.fir
A llvm/docs/AMDGPU/DeveloperGuideline.rst
M llvm/docs/AMDGPUUsage.rst
M llvm/lib/Target/SPIRV/SPIRVSubtarget.cpp
M llvm/lib/Target/SPIRV/SPIRVTargetObjectFile.h
M llvm/lib/Target/SPIRV/SPIRVUtils.h
M llvm/test/CodeGen/SPIRV/basic_float_types.ll
M llvm/unittests/Target/SPIRV/SPIRVGlobalRegistryTests.cpp
M mlir/include/mlir/Dialect/Tosa/IR/TosaOps.td
M mlir/lib/Conversion/AMDGPUToROCDL/AMDGPUToROCDL.cpp
M mlir/lib/Dialect/Tosa/IR/TosaCanonicalizations.cpp
M mlir/test/Conversion/AMDGPUToROCDL/sparse-mfma-gfx950.mlir
M mlir/test/Dialect/Tosa/canonicalize.mlir
Log Message:
-----------
Merge branch 'filecheck-diag-result-vs-note' into filecheck-diag-class-hierarchy
Compare: https://github.com/llvm/llvm-project/compare/28e49104b58d...c25e60ed1724
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