[all-commits] [llvm/llvm-project] bb9b7c: [NVPTX] Add commutativity to SETP instructions to ...

Tue May 5 17:14:56 PDT 2026

  Branch: refs/heads/users/modiking/nvptx-setp-predicate-inversion
  Home:   https://github.com/llvm/llvm-project
  Commit: bb9b7cd2c545cd9ea877c92995c38de6bdbde62a
      https://github.com/llvm/llvm-project/commit/bb9b7cd2c545cd9ea877c92995c38de6bdbde62a
  Author: root <mmo at nvidia.com>
  Date:   2026-05-05 (Tue, 05 May 2026)

  Changed paths:
    M llvm/lib/Target/NVPTX/NVPTXInstrInfo.cpp
    M llvm/lib/Target/NVPTX/NVPTXInstrInfo.h
    M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
    A llvm/test/CodeGen/NVPTX/machine-cse-predicate-inversion-bfloat16.ll
    A llvm/test/CodeGen/NVPTX/machine-cse-predicate-inversion-float16.ll
    A llvm/test/CodeGen/NVPTX/machine-cse-predicate-inversion-float32.ll
    A llvm/test/CodeGen/NVPTX/machine-cse-predicate-inversion-float64.ll
    A llvm/test/CodeGen/NVPTX/machine-cse-predicate-inversion-int16.ll
    A llvm/test/CodeGen/NVPTX/machine-cse-predicate-inversion-int32.ll
    A llvm/test/CodeGen/NVPTX/machine-cse-predicate-inversion-int64.ll
    A llvm/test/CodeGen/NVPTX/machine-cse-predicate-inversion-multiple-users.ll
    A llvm/test/CodeGen/NVPTX/machine-cse-predicate-inversion-vector-float.ll
    A llvm/test/CodeGen/NVPTX/machine-cse-predicate-no-inversion-bfloat16.ll
    A llvm/test/CodeGen/NVPTX/machine-cse-predicate-no-inversion-float16.ll
    A llvm/test/CodeGen/NVPTX/machine-cse-predicate-no-inversion-float32.ll
    A llvm/test/CodeGen/NVPTX/machine-cse-predicate-no-inversion-float64.ll
    A llvm/test/CodeGen/NVPTX/machine-cse-predicate-no-inversion-int16.ll
    A llvm/test/CodeGen/NVPTX/machine-cse-predicate-no-inversion-int32.ll
    A llvm/test/CodeGen/NVPTX/machine-cse-predicate-no-inversion-int64.ll

  Log Message:
  -----------
  [NVPTX] Add commutativity to SETP instructions to enable MachineCSE of inverted predicates

Inverted predicates can be used freely in PTX. If we can invert a
predicate and CSE the generating instruction we can save calculating
the inverse.

Teach the NVPTX commuteInstructionImpl that SETP instructions can be
inverted to allow CSEing with previous SETP that match the inverted
form. This also inverts the branch users of the predicate to maintain
correctness.

Currently only allow the SETP inversion if all users are branches.
Future work can extend this to sel and not instructions.

Made-with: Cursor

  Commit: 34c18216b1898c48ccba9934b8fcdc7da9c7eb65
      https://github.com/llvm/llvm-project/commit/34c18216b1898c48ccba9934b8fcdc7da9c7eb65
  Author: Modi Mo <mmo at nvidia.com>
  Date:   2026-05-05 (Tue, 05 May 2026)

  Changed paths:
    M llvm/lib/Target/NVPTX/NVPTXInstrInfo.cpp
    M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
    M llvm/test/CodeGen/NVPTX/machine-cse-predicate-inversion-multiple-users.ll
    A llvm/test/CodeGen/NVPTX/machine-cse-predicate-inversion-rollback.mir

  Log Message:
  -----------
  update rollback logic and add test exercising it

  Commit: d2fd5a7220ad722d9d5e74c4a74bc88dca509920
      https://github.com/llvm/llvm-project/commit/d2fd5a7220ad722d9d5e74c4a74bc88dca509920
  Author: Modi Mo <mmo at nvidia.com>
  Date:   2026-05-05 (Tue, 05 May 2026)

  Changed paths:
    R llvm/test/CodeGen/NVPTX/machine-cse-predicate-inversion-bfloat16.ll
    R llvm/test/CodeGen/NVPTX/machine-cse-predicate-inversion-float16.ll
    R llvm/test/CodeGen/NVPTX/machine-cse-predicate-inversion-float32.ll
    R llvm/test/CodeGen/NVPTX/machine-cse-predicate-inversion-float64.ll
    R llvm/test/CodeGen/NVPTX/machine-cse-predicate-inversion-int16.ll
    R llvm/test/CodeGen/NVPTX/machine-cse-predicate-inversion-int32.ll
    R llvm/test/CodeGen/NVPTX/machine-cse-predicate-inversion-int64.ll
    M llvm/test/CodeGen/NVPTX/machine-cse-predicate-inversion-multiple-users.ll
    A llvm/test/CodeGen/NVPTX/machine-cse-predicate-inversion.ll
    R llvm/test/CodeGen/NVPTX/machine-cse-predicate-no-inversion-bfloat16.ll
    R llvm/test/CodeGen/NVPTX/machine-cse-predicate-no-inversion-float16.ll
    R llvm/test/CodeGen/NVPTX/machine-cse-predicate-no-inversion-float32.ll
    R llvm/test/CodeGen/NVPTX/machine-cse-predicate-no-inversion-float64.ll
    R llvm/test/CodeGen/NVPTX/machine-cse-predicate-no-inversion-int16.ll
    R llvm/test/CodeGen/NVPTX/machine-cse-predicate-no-inversion-int32.ll
    R llvm/test/CodeGen/NVPTX/machine-cse-predicate-no-inversion-int64.ll
    A llvm/test/CodeGen/NVPTX/machine-cse-predicate-no-inversion.ll

  Log Message:
  -----------
  Move inversion/no inversion tests to one file. Fixup issue in machine-cse-predicate-inversion-multiple-users.ll

  Commit: 338f2c330db9f343976860428e0bebe381ebb5b6
      https://github.com/llvm/llvm-project/commit/338f2c330db9f343976860428e0bebe381ebb5b6
  Author: Modi Mo <mmo at nvidia.com>
  Date:   2026-05-05 (Tue, 05 May 2026)

  Changed paths:
    M llvm/lib/Target/NVPTX/CMakeLists.txt
    M llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXInstPrinter.cpp
    M llvm/lib/Target/NVPTX/NVPTX.h
    M llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp
    M llvm/lib/Target/NVPTX/NVPTXInstrInfo.cpp
    M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td

  Log Message:
  -----------
  move cmp modes into td and update users

  Commit: 351ae4c235f0185c0115e3a66b03fe2a8f36ccc1
      https://github.com/llvm/llvm-project/commit/351ae4c235f0185c0115e3a66b03fe2a8f36ccc1
  Author: modiking <mmo at nvidia.com>
  Date:   2026-05-05 (Tue, 05 May 2026)

  Changed paths:
    M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td

  Log Message:
  -----------
  Update NVPTXInstrInfo.td

  Commit: 6e856684304c9a58869e68bbb44c6576793323f4
      https://github.com/llvm/llvm-project/commit/6e856684304c9a58869e68bbb44c6576793323f4
  Author: root <mmo at nvidia.com>
  Date:   2026-05-05 (Tue, 05 May 2026)

  Changed paths:
    M llvm/lib/Target/NVPTX/CMakeLists.txt
    M llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXInstPrinter.cpp
    M llvm/lib/Target/NVPTX/NVPTX.h
    M llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp
    M llvm/lib/Target/NVPTX/NVPTXInstrInfo.cpp
    M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td

  Log Message:
  -----------
  Revert "move cmp modes into td and update users"

This reverts commit 5950d9fcd6b2053e71929972b89cc983ce2cccaa, restoring
the hand-written PTXCmpMode enum in NVPTX.h and the switch-based
implementations of invertIntegerCmpMode, invertScalarFloatCmpMode,
NVPTXInstPrinter::printCmpMode and NVPTXDAGToDAGISel::getPTXCmpMode.

The TableGen GenericTable migration consolidated the comparison-mode
data but at the cost of an extra .inc file, an ODR-driven split between
NVPTXCodeGen and NVPTXDesc, and indirection through a generated lookup
where the local switches were already self-contained. Reverting until a
broader cleanup of NVPTX::PTXCmpMode is taken on as part of a larger
refactor.

Co-authored-by: Cursor <cursoragent at cursor.com>

Compare: https://github.com/llvm/llvm-project/compare/4c1d0ee3ecea...6e856684304c

To unsubscribe from these emails, change your notification settings at https://github.com/llvm/llvm-project/settings/notifications