[all-commits] [llvm/llvm-project] c9d713: [GlobalISel] Fast-path single reg loads and stores...

[Cullen Rhodes via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: c9d713aa48a714d20b8502d06b9feb24829e6f22
      https://github.com/llvm/llvm-project/commit/c9d713aa48a714d20b8502d06b9feb24829e6f22
  Author: Cullen Rhodes <cullen.rhodes at arm.com>
  Date:   2026-05-05 (Tue, 05 May 2026)

  Changed paths:
    M llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp

  Log Message:
  -----------
  [GlobalISel] Fast-path single reg loads and stores in IRTranslator (#195245)

IRTranslator::translateLoad is hot in compile-time profiles of sqlite on
aarch64-O0-g. Aggregates are flattened into multiple vregs with offsets.
Most loads and stores lower to a single register so this offset
materialization can be avoided.

Small -0.07% geomean improvement on aarch64-O0-g with -0.24% for sqlite.

https://llvm-compile-time-tracker.com/compare.php?from=a7a2dc59616a8cb1198d933bcdf55ebdbd78894c&to=e535e96fd0952cfa646d48ef84cf5948c0a8a2ab&stat=instructions%3Au



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