[all-commits] [llvm/llvm-project] ad1d64: [NVPTX] Add commutativity to SETP instructions to ...

[modiking via All-commits]

  Branch: refs/heads/users/modiking/nvptx-setp-predicate-inversion
  Home:   https://github.com/llvm/llvm-project
  Commit: ad1d64fe295d525253052d463df6ce8f5ed31b25
      https://github.com/llvm/llvm-project/commit/ad1d64fe295d525253052d463df6ce8f5ed31b25
  Author: root <mmo at nvidia.com>
  Date:   2026-04-30 (Thu, 30 Apr 2026)

  Changed paths:
    M llvm/lib/Target/NVPTX/NVPTXInstrInfo.cpp
    M llvm/lib/Target/NVPTX/NVPTXInstrInfo.h
    M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
    A llvm/test/CodeGen/NVPTX/machine-cse-predicate-inversion-bfloat16.ll
    A llvm/test/CodeGen/NVPTX/machine-cse-predicate-inversion-float16.ll
    A llvm/test/CodeGen/NVPTX/machine-cse-predicate-inversion-float32.ll
    A llvm/test/CodeGen/NVPTX/machine-cse-predicate-inversion-float64.ll
    A llvm/test/CodeGen/NVPTX/machine-cse-predicate-inversion-int16.ll
    A llvm/test/CodeGen/NVPTX/machine-cse-predicate-inversion-int32.ll
    A llvm/test/CodeGen/NVPTX/machine-cse-predicate-inversion-int64.ll
    A llvm/test/CodeGen/NVPTX/machine-cse-predicate-inversion-multiple-users.ll
    A llvm/test/CodeGen/NVPTX/machine-cse-predicate-inversion-vector-float.ll
    A llvm/test/CodeGen/NVPTX/machine-cse-predicate-no-inversion-bfloat16.ll
    A llvm/test/CodeGen/NVPTX/machine-cse-predicate-no-inversion-float16.ll
    A llvm/test/CodeGen/NVPTX/machine-cse-predicate-no-inversion-float32.ll
    A llvm/test/CodeGen/NVPTX/machine-cse-predicate-no-inversion-float64.ll
    A llvm/test/CodeGen/NVPTX/machine-cse-predicate-no-inversion-int16.ll
    A llvm/test/CodeGen/NVPTX/machine-cse-predicate-no-inversion-int32.ll
    A llvm/test/CodeGen/NVPTX/machine-cse-predicate-no-inversion-int64.ll

  Log Message:
  -----------
  [NVPTX] Add commutativity to SETP instructions to enable MachineCSE of inverted predicates

Inverted predicates can be used freely in PTX. If we can invert a
predicate and CSE the generating instruction we can save calculating
the inverse.

Teach the NVPTX commuteInstructionImpl that SETP instructions can be
inverted to allow CSEing with previous SETP that match the inverted
form. This also inverts the branch users of the predicate to maintain
correctness.

Currently only allow the SETP inversion if all users are branches.
Future work can extend this to sel and not instructions.

Made-with: Cursor


  Commit: eecc144badff911034a732bb755ce45c8fac4857
      https://github.com/llvm/llvm-project/commit/eecc144badff911034a732bb755ce45c8fac4857
  Author: Modi Mo <mmo at nvidia.com>
  Date:   2026-04-30 (Thu, 30 Apr 2026)

  Changed paths:
    M llvm/lib/Target/NVPTX/NVPTXInstrInfo.cpp
    M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
    M llvm/test/CodeGen/NVPTX/machine-cse-predicate-inversion-multiple-users.ll
    A llvm/test/CodeGen/NVPTX/machine-cse-predicate-inversion-rollback.mir

  Log Message:
  -----------
  update rollback logic and add test exercising it


  Commit: dede19e5238edf1625c64b0ee157a56401ebdcd6
      https://github.com/llvm/llvm-project/commit/dede19e5238edf1625c64b0ee157a56401ebdcd6
  Author: Modi Mo <mmo at nvidia.com>
  Date:   2026-04-30 (Thu, 30 Apr 2026)

  Changed paths:
    R llvm/test/CodeGen/NVPTX/machine-cse-predicate-inversion-bfloat16.ll
    R llvm/test/CodeGen/NVPTX/machine-cse-predicate-inversion-float16.ll
    R llvm/test/CodeGen/NVPTX/machine-cse-predicate-inversion-float32.ll
    R llvm/test/CodeGen/NVPTX/machine-cse-predicate-inversion-float64.ll
    R llvm/test/CodeGen/NVPTX/machine-cse-predicate-inversion-int16.ll
    R llvm/test/CodeGen/NVPTX/machine-cse-predicate-inversion-int32.ll
    R llvm/test/CodeGen/NVPTX/machine-cse-predicate-inversion-int64.ll
    M llvm/test/CodeGen/NVPTX/machine-cse-predicate-inversion-multiple-users.ll
    A llvm/test/CodeGen/NVPTX/machine-cse-predicate-inversion.ll
    R llvm/test/CodeGen/NVPTX/machine-cse-predicate-no-inversion-bfloat16.ll
    R llvm/test/CodeGen/NVPTX/machine-cse-predicate-no-inversion-float16.ll
    R llvm/test/CodeGen/NVPTX/machine-cse-predicate-no-inversion-float32.ll
    R llvm/test/CodeGen/NVPTX/machine-cse-predicate-no-inversion-float64.ll
    R llvm/test/CodeGen/NVPTX/machine-cse-predicate-no-inversion-int16.ll
    R llvm/test/CodeGen/NVPTX/machine-cse-predicate-no-inversion-int32.ll
    R llvm/test/CodeGen/NVPTX/machine-cse-predicate-no-inversion-int64.ll
    A llvm/test/CodeGen/NVPTX/machine-cse-predicate-no-inversion.ll

  Log Message:
  -----------
  Move inversion/no inversion tests to one file. Fixup issue in machine-cse-predicate-inversion-multiple-users.ll


  Commit: 5950d9fcd6b2053e71929972b89cc983ce2cccaa
      https://github.com/llvm/llvm-project/commit/5950d9fcd6b2053e71929972b89cc983ce2cccaa
  Author: Modi Mo <mmo at nvidia.com>
  Date:   2026-04-30 (Thu, 30 Apr 2026)

  Changed paths:
    M llvm/lib/Target/NVPTX/CMakeLists.txt
    M llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXInstPrinter.cpp
    M llvm/lib/Target/NVPTX/NVPTX.h
    M llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp
    M llvm/lib/Target/NVPTX/NVPTXInstrInfo.cpp
    M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td

  Log Message:
  -----------
  move cmp modes into td and update users


  Commit: f411e45097fccd1b8dd2ba442a01f76d311d9469
      https://github.com/llvm/llvm-project/commit/f411e45097fccd1b8dd2ba442a01f76d311d9469
  Author: modiking <mmo at nvidia.com>
  Date:   2026-04-30 (Thu, 30 Apr 2026)

  Changed paths:
    M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td

  Log Message:
  -----------
  Update NVPTXInstrInfo.td


Compare: https://github.com/llvm/llvm-project/compare/3f2485fe3954...f411e45097fc

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