[all-commits] [llvm/llvm-project] 19a3d7: [AMDGPU][MC] update USER_SGPR_COUNT bits for GFX12...

[Zeng Wu via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 19a3d7b5db5ccb8b544e8ba2ffdb1d4a528e1b11
      https://github.com/llvm/llvm-project/commit/19a3d7b5db5ccb8b544e8ba2ffdb1d4a528e1b11
  Author: Zeng Wu <zengwu13 at amd.com>
  Date:   2026-04-28 (Tue, 28 Apr 2026)

  Changed paths:
    M llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
    M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
    M llvm/lib/Target/AMDGPU/SIDefines.h
    M llvm/lib/Target/AMDGPU/SIProgramInfo.cpp
    M llvm/lib/Target/AMDGPU/SIProgramInfo.h
    M llvm/test/CodeGen/AMDGPU/amdhsa-kernarg-preload-num-sgprs.ll
    M llvm/test/MC/AMDGPU/user-sgpr-count-diag.s
    A llvm/test/MC/AMDGPU/user-sgpr-count-gfx1250.s

  Log Message:
  -----------
  [AMDGPU][MC] update USER_SGPR_COUNT bits for GFX1250 (#192579)

When we work on the triton kernel with tensor descriptor created on the
host side, there is a error message `amdgpu_user_sgpr_count smaller than
than implied by enabled user SGPRs`.

After some debugging, we find the `USER_SGPR_COUNT` is not updated with
GFX125 and this patch updates it for USER_SGPR_COUNT from
https://llvm.org/docs/AMDGPUUsage.html#amdgpu-amdhsa-compute-pgm-rsrc2-gfx6-gfx12-table.

On GFX125, COMPUTE_PGM_RSRC2::USER_SGPR_COUNT is 6 bits wide. The MC
helper S_00B84C_USER_SGPR only masks to 5 bits; when the true user SGPR
count is 32 or more, the masked value wraps (e.g. 32 -> 0).
`AMDGPUAsmPrinter` then emits a .amdhsa_user_sgpr_count with 0, that
disagrees with the implied count from enabled user SGPRs (including
kernarg preload), and finally assembling llc output with `llvm-mc` fails
in `AMDGPUAsmParser`

---------

Co-authored-by: Shilei Tian <i at tianshilei.me>



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