[all-commits] [llvm/llvm-project] 0d3328: [SPIRV] Lower load/store atomic to OpAtomicLoad/Op...
Peter Collingbourne via All-commits
all-commits at lists.llvm.org
Tue Apr 28 19:36:27 PDT 2026
Branch: refs/heads/users/pcc/spr/mc-emit-reloc-directive-relocations-in-offset-order
Home: https://github.com/llvm/llvm-project
Commit: 0d332848bf287a3320f7a432368cd14f2ffe944d
https://github.com/llvm/llvm-project/commit/0d332848bf287a3320f7a432368cd14f2ffe944d
Author: Juan Manuel Martinez Caamaño <jmartinezcaamao at gmail.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M llvm/include/llvm/IR/IntrinsicsSPIRV.td
M llvm/lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp
M llvm/lib/Target/SPIRV/SPIRVISelLowering.cpp
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
M llvm/lib/Target/SPIRV/SPIRVTypeInst.cpp
M llvm/lib/Target/SPIRV/SPIRVTypeInst.h
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_memory_access_aliasing/alias-load-store-atomic.ll
A llvm/test/CodeGen/SPIRV/transcoding/atomic-load-store-unsupported.ll
M llvm/test/CodeGen/SPIRV/transcoding/load-atomic.ll
M llvm/test/CodeGen/SPIRV/transcoding/store-atomic.ll
Log Message:
-----------
[SPIRV] Lower load/store atomic to OpAtomicLoad/OpAtomicStore (#185696)
Lower LLVM's `load atomic` `store atomic` as `OpAtomicStore` and
`OpAtomicLoad`.
Closes #185629
Commit: 7758ee59e7a2653fb26c29ecc7ce7bbd00e66091
https://github.com/llvm/llvm-project/commit/7758ee59e7a2653fb26c29ecc7ce7bbd00e66091
Author: Jeff Bailey <jbailey at raspberryginger.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M libc/test/src/time/mktime_test.cpp
Log Message:
-----------
[libc] Fix implicit conversion warning in mktime_test (#193504)
Specified template argument time_t for Succeeds and Fails in
mktime_test.cpp to avoid implicit conversion warnings when matching
time_t results on 64-bit systems.
Commit: 65e766dfda81c12a26750adc21bec7f13166a42f
https://github.com/llvm/llvm-project/commit/65e766dfda81c12a26750adc21bec7f13166a42f
Author: Jeff Bailey <jbailey at raspberryginger.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M libc/cmake/modules/prepare_libc_gpu_build.cmake
M libc/test/lit.site.cfg.py.in
Log Message:
-----------
[libc] Honour LIBC_GPU_TEST_JOBS in lit test runs (#193797)
Under CTest, LIBC_GPU_TEST_JOBS controlled a ninja job pool that limited
concurrent GPU test processes. The AMD GPU buildbot sets this to 4 to
avoid overloading the GPU driver.
When running tests via lit, this constraint was lost because lit uses
its own -j flag (defaulting to nproc, or set to 64 on the AMD bot via
LLVM_LIT_ARGS). All GPU loader processes launched simultaneously,
leading to hangs from GPU resource exhaustion.
Propagated LIBC_GPU_TEST_JOBS into the lit site config as a parallelism
group so lit throttles GPU test concurrency independently of the global
-j setting.
Commit: fc9f14e424229e3e90494921e1cb7e5575064ac7
https://github.com/llvm/llvm-project/commit/fc9f14e424229e3e90494921e1cb7e5575064ac7
Author: Jeff Bailey <jbailey at raspberryginger.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M libc/test/CMakeLists.txt
M libc/test/include/CMakeLists.txt
M libc/test/integration/CMakeLists.txt
Log Message:
-----------
[libc] Switch check-libc from CTest to lit (#193798)
Renamed check-libc-lit to check-libc, replacing the old CTest-driven
target. Dependencies now use -build targets (e.g.
libc-hermetic-tests-build) so that check-libc only builds test
executables and delegates execution to lit.
Commit: e4f1530edcc95a41e8fd8d13dca295aad814f75d
https://github.com/llvm/llvm-project/commit/e4f1530edcc95a41e8fd8d13dca295aad814f75d
Author: jeanPerier <jperier at nvidia.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M flang/include/flang/Optimizer/Dialect/FIROps.td
M flang/include/flang/Optimizer/Transforms/Passes.td
M flang/lib/Optimizer/CodeGen/CodeGen.cpp
M flang/lib/Optimizer/Passes/Pipelines.cpp
M flang/lib/Optimizer/Transforms/AddDebugInfo.cpp
A flang/test/Fir/fake_use-codegen.fir
A flang/test/Transforms/debug-fake-use.fir
Log Message:
-----------
[flang][debug] generate llvm.fake.use for arguments at -g and O0 (#187044)
Fix for https://github.com/llvm/llvm-project/issues/185432.
This patch extends the lifetime of procedure dummy arguments using llvm.fake.use
so that they are accessible in debugger during the whole lifetime of the function.
This is done by:
- adding a new fir.fake_use operation and emitting it in AddDebugInfo.cpp for
dummy arguments at the end of the procedure scope.
- lower this new fir.fake_use to the llvm.fake.use intrinsic.
This is done under -g at O0 only to avoid pessimizing the generated code when
optimizations are requested.
Commit: 248192d5bef14428ab7cbaa2e1c9e70109fb0747
https://github.com/llvm/llvm-project/commit/248192d5bef14428ab7cbaa2e1c9e70109fb0747
Author: Boyao Wang <wangboyao at bytedance.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-deinterleave2.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-zipeven-zipodd.ll
M llvm/test/CodeGen/RISCV/rvv/vector-deinterleave-fixed.ll
M llvm/test/CodeGen/RISCV/rvv/vector-interleave-fixed.ll
Log Message:
-----------
[RISCV] Add bf16 tests for interleave and deinterleave (#193720)
Add missing bf16 tests for interleave and deinterleave
Commit: 6c16fc8a1a1d6eba2b368fc981a3b943abb5018a
https://github.com/llvm/llvm-project/commit/6c16fc8a1a1d6eba2b368fc981a3b943abb5018a
Author: David Spickett <david.spickett at arm.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M lldb/test/API/commands/breakpoint/command/list/TestBreakpointCommandList.py
M lldb/test/API/commands/command/container/TestContainerCommands.py
M lldb/test/API/commands/command/delete/TestCommandDelete.py
M lldb/test/API/commands/command/invalid-args/TestInvalidArgsCommand.py
M lldb/test/API/commands/expression/dont_allow_jit/TestAllowJIT.py
M lldb/test/API/commands/frame/recognizer/TestFrameRecognizer.py
M lldb/test/API/commands/log/invalid-args/TestInvalidArgsLog.py
M lldb/test/API/commands/process/signal/TestProcessSignal.py
M lldb/test/API/commands/register/register_command/TestRegisters.py
M lldb/test/API/commands/target/modules/search-paths/insert/TestTargetModulesSearchpathsInsert.py
M lldb/test/API/commands/target/stop-hook/delete/TestTargetStopHookDelete.py
M lldb/test/API/commands/target/stop-hook/disable/TestTargetStopHookDisable.py
M lldb/test/API/commands/target/stop-hook/enable/TestTargetStopHookEnable.py
M lldb/test/API/commands/thread/select/TestThreadSelect.py
M lldb/test/API/functionalities/breakpoint/breakpoint_command/TestBreakpointCommand.py
M lldb/test/API/functionalities/gdb_remote_client/TestGDBServerTargetXML.py
M lldb/test/Shell/Commands/list-header.test
M lldb/test/Shell/Minidump/disassemble-no-module.yaml
Log Message:
-----------
[lldb][test] Remove full stop from expected error messages (#193748)
I am about to update a bunch of uses of AppendErrorWithFormat to not
have a full stop at the end, to confirm to
https://llvm.org/docs/CodingStandards.html#error-and-warning-messages.
Reviewing all those changes is going to be difficult so I am updating
the tests first and then we can land the other changes in batches
(because the tests will continue to pass as we do that).
Note that I have only run the test suite on Linux AArch64, so there are
probably more that need to be updated. We will catch those in CI or
post-commit.
Commit: 6114cbb611c8183798e43118a0cca73293241b02
https://github.com/llvm/llvm-project/commit/6114cbb611c8183798e43118a0cca73293241b02
Author: Harald van Dijk <hdijk at accesssoftek.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M llvm/lib/Target/DirectX/DXILWriter/DXILValueEnumerator.cpp
Log Message:
-----------
[DirectX] Fix debug dump of ValueEnumerator (#191251)
Consistently print to OS, and do not try to print uses of values without
a use list.
Commit: eb6eb9fa0a0c02c43b800d6b5d44b6b92333b65a
https://github.com/llvm/llvm-project/commit/eb6eb9fa0a0c02c43b800d6b5d44b6b92333b65a
Author: Harald van Dijk <hdijk at accesssoftek.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M llvm/lib/Target/DirectX/DXILPrepare.cpp
M llvm/test/tools/dxil-dis/debug-info.ll
Log Message:
-----------
[DirectX] Convert debug values to old style (#192162)
Commit: 8b3eac05aa742730a89889e90c375ad1f7359fe0
https://github.com/llvm/llvm-project/commit/8b3eac05aa742730a89889e90c375ad1f7359fe0
Author: Harald van Dijk <hdijk at accesssoftek.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M llvm/lib/Target/DirectX/DXILWriter/DXILBitcodeWriter.cpp
A llvm/test/tools/dxil-dis/di-compile-unit-versioned-language.ll
Log Message:
-----------
[DirectX] Convert DICompileUnit versioned language (#192574)
Versioned languages did not exist in LLVM 3.7.
Commit: 3de31988417de7a733d56d5be21405366b507f63
https://github.com/llvm/llvm-project/commit/3de31988417de7a733d56d5be21405366b507f63
Author: Harald van Dijk <hdijk at accesssoftek.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M llvm/lib/Target/DirectX/DXILWriter/DXILBitcodeWriter.cpp
A llvm/test/tools/dxil-dis/vla.ll
Log Message:
-----------
[DirectX] Replace non-const count of DISubrange with -1 (#192576)
Non-const count is only emitted for C99 VLA, which are not supported.
Co-authored-by: Andrew Savonichev <andrew.savonichev at gmail.com>
Commit: efffb04c2b7b2528308f68ca24906048781298c0
https://github.com/llvm/llvm-project/commit/efffb04c2b7b2528308f68ca24906048781298c0
Author: Harald van Dijk <hdijk at accesssoftek.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M llvm/lib/Target/DirectX/DXILWriter/DXILBitcodeWriter.cpp
M llvm/test/tools/dxil-dis/debug-info.ll
Log Message:
-----------
[DirectX] Fix DILocalVariable (#192573)
LLVM 3.7 did not allow the DW_TAG_variable tag for them and had two
custom tags instead.
Commit: 347aa3f6fbcc48cd752d02aa581b74c33d18dd41
https://github.com/llvm/llvm-project/commit/347aa3f6fbcc48cd752d02aa581b74c33d18dd41
Author: Cullen Rhodes <cullen.rhodes at arm.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M llvm/include/llvm/Target/GlobalISel/Combine.td
M llvm/test/CodeGen/AArch64/Atomics/aarch64-atomic-store-outline_atomics.ll
M llvm/test/CodeGen/AArch64/Atomics/aarch64-atomic-store-rcpc.ll
M llvm/test/CodeGen/AArch64/Atomics/aarch64-atomic-store-v8_1a.ll
M llvm/test/CodeGen/AArch64/Atomics/aarch64-atomic-store-v8a.ll
M llvm/test/CodeGen/AArch64/Atomics/aarch64-atomicrmw-lse2.ll
M llvm/test/CodeGen/AArch64/Atomics/aarch64-atomicrmw-lse2_lse128.ll
M llvm/test/CodeGen/AArch64/Atomics/aarch64-atomicrmw-lsfe.ll
M llvm/test/CodeGen/AArch64/Atomics/aarch64-atomicrmw-outline_atomics.ll
M llvm/test/CodeGen/AArch64/Atomics/aarch64-atomicrmw-rcpc.ll
M llvm/test/CodeGen/AArch64/Atomics/aarch64-atomicrmw-rcpc3.ll
M llvm/test/CodeGen/AArch64/Atomics/aarch64-atomicrmw-v8_1a.ll
M llvm/test/CodeGen/AArch64/Atomics/aarch64-atomicrmw-v8a.ll
M llvm/test/CodeGen/AArch64/Atomics/aarch64-atomicrmw-v8a_fp.ll
M llvm/test/CodeGen/AArch64/GlobalISel/arm64-atomic.ll
M llvm/test/CodeGen/AArch64/GlobalISel/localizer-arm64-tti.ll
M llvm/test/CodeGen/AArch64/aarch64-tbz.ll
M llvm/test/CodeGen/AArch64/cpa-globalisel.ll
M llvm/test/CodeGen/AArch64/misched-fusion-cmp-bcc.ll
M llvm/test/CodeGen/AArch64/pcsections.ll
M llvm/test/DebugInfo/AArch64/fallthrough-branch.ll
Log Message:
-----------
[GISel] Disable opt_brcond_by_inverting_cond combine at O0 (#193417)
This combine should not be necessary at O0 and disabling it is a -0.39%
geomean compile-time improvement on stage1-aarch64-O0-g CTMark [1] with
no change to code-size [2].
I also measured code-size without -g (cmake/caches/O0.cmake) locally
since it's not on llvm-compile-time-tracker and found no change.
[1] https://llvm-compile-time-tracker.com/compare.php?from=f2efeabe314bb0a9b1ef46c07b11f605ed351b9c&to=3d28cf0bb7fb2fc5baebc4b5de09b735c1115e7f&stat=instructions%3Au
[2] https://llvm-compile-time-tracker.com/compare.php?from=f2efeabe314bb0a9b1ef46c07b11f605ed351b9c&to=3d28cf0bb7fb2fc5baebc4b5de09b735c1115e7f&stat=size-total
Commit: bd469e8a1d4768b278182aa982763128d40e7e90
https://github.com/llvm/llvm-project/commit/bd469e8a1d4768b278182aa982763128d40e7e90
Author: David Green <david.green at arm.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
Log Message:
-----------
[SDAG] Minor cleanup to TargetLowering::expandFP_ROUND. NFC (#193793)
Noticed when porting to GISel, constants might as well be added to the
RHS of an add and a bitcast from the same type can be removed.
Commit: 340ba1191cfc49588119a93724f5c26810ddc1a6
https://github.com/llvm/llvm-project/commit/340ba1191cfc49588119a93724f5c26810ddc1a6
Author: Juan Manuel Martinez Caamaño <jmartinezcaamao at gmail.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_memory_access_aliasing/alias-load-store-atomic.ll
Log Message:
-----------
[SPIRV] Do not add aliasing decorations to OpAtomicStore/OpAtomicLoad (#193779)
Do not attach them to store atomic or load atomic intrinsics /
instructions since the extension is inconsistent at the moment (we
cannot add the decoration to atomic stores because they do not have an
id).
Commit: c55a73c44e4af903ded70aec5c8d6af1cb312440
https://github.com/llvm/llvm-project/commit/c55a73c44e4af903ded70aec5c8d6af1cb312440
Author: David Spickett <david.spickett at arm.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M lldb/source/API/SBCommandInterpreter.cpp
M lldb/source/Commands/CommandObjectBreakpoint.cpp
M lldb/source/Commands/CommandObjectBreakpointCommand.cpp
M lldb/source/Commands/CommandObjectCommands.cpp
M lldb/source/Commands/CommandObjectDisassemble.cpp
M lldb/source/Commands/CommandObjectExpression.cpp
M lldb/source/Commands/CommandObjectFrame.cpp
M lldb/source/Commands/CommandObjectLog.cpp
M lldb/source/Commands/CommandObjectMemory.cpp
M lldb/source/Commands/CommandObjectMemoryTag.cpp
Log Message:
-----------
[lldb] Remove full stop from AppendErrorWithFormat format strings (part 1) (#193750)
To fit the style guide:
https://llvm.org/docs/CodingStandards.html#error-and-warning-messages
I found these with:
* Find `(\.AppendErrorWithFormat\(([\s\r\n]+)?"(?:(?:\\.|[^"\\])*))\."`
and replace with `$1"` using Visual Studio Code.
* Putting a call to `validate_diagnostic` in `AppendErrorWithFormat`.
* Manual inspection.
Note that this change *does not* include a call to `validate_diagnostic`
because I do not know what's going to crash on platforms that I haven't
tested on.
Commit: 4852c5b159c8469f204b60a0974a33d1072bcee3
https://github.com/llvm/llvm-project/commit/4852c5b159c8469f204b60a0974a33d1072bcee3
Author: Mark Murray <mark.murray at arm.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M llvm/lib/Target/ARM/ARMInstrThumb2.td
A llvm/test/MC/ARM/thumb-hvc-virt-diagnostics.s
Log Message:
-----------
[ARM][MC] Gate Thumb hvc alias on virtualization (#193532)
Commit: 297fb9377a6ac0c8e7f81928e0df84c0bfe251d8
https://github.com/llvm/llvm-project/commit/297fb9377a6ac0c8e7f81928e0df84c0bfe251d8
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M llvm/test/Transforms/LICM/atomics.ll
Log Message:
-----------
[LICM] Generate test checks (NFC) (#193921)
Commit: 3ec9bbc3da9c75c4b586a7350dd271b0528715da
https://github.com/llvm/llvm-project/commit/3ec9bbc3da9c75c4b586a7350dd271b0528715da
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
R llvm/test/Transforms/DeadStoreElimination/fence-todo.ll
M llvm/test/Transforms/DeadStoreElimination/fence.ll
Log Message:
-----------
[DSE] Merge two test files and generate checks (NFC) (#193922)
Merge the todo file into the main test, showing current codegen.
Commit: 170f030c22c52bc5d840cd8f76756c9fba5ee816
https://github.com/llvm/llvm-project/commit/170f030c22c52bc5d840cd8f76756c9fba5ee816
Author: Longsheng Mou <longshengmou at gmail.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M mlir/lib/Dialect/Math/IR/MathOps.cpp
Log Message:
-----------
[mlir][math] Use APFloat::SemanticsToEnum in constant folding (#193914)
Refactor constant folding in the Math dialect to use APFloat::SemanticsToEnum() instead of getSizeInBits() when checking
floating-point semantics. Inferring semantics from bitwidth is fragile: different formats may share the same bit width but have distinct semantics, leading to incorrect dispatch. SemanticsToEnum() matches on the exact semantics descriptor, making the intent explicit and ensuring correct dispatch.
Commit: 839a22f449b3092a32537e9dc1cc474a5e19c909
https://github.com/llvm/llvm-project/commit/839a22f449b3092a32537e9dc1cc474a5e19c909
Author: Jack Styles <jack.styles at arm.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M flang/docs/Directives.md
M flang/include/flang/Parser/dump-parse-tree.h
M flang/include/flang/Parser/parse-tree.h
M flang/lib/Lower/Bridge.cpp
M flang/lib/Parser/Fortran-parsers.cpp
M flang/lib/Parser/unparse.cpp
M flang/lib/Semantics/canonicalize-directives.cpp
M flang/lib/Semantics/resolve-names.cpp
A flang/test/Lower/inlinealways-directive.f90
A flang/test/Parser/inlinealways-directive.f90
A flang/test/Semantics/inlinealways-directive01.f90
Log Message:
-----------
[Flang] Add `INLINEALWAYS` Compiler Directive (#192674)
Adds support for the INLINEALWAYS Compiler Directive to Flang. This was
previously supported in Classic-Flang, and works in the same way as
FORCEINLINE.
It can either be defined at the call site, or within the function the
user wishes to inline.
The missing support was highlighted while building an opensource
benchmark, as build warnings were indicating that this compiler
directive was being ignored.
Commit: 8685fb10938f0fb2bd3293ffbe292fbcdd962927
https://github.com/llvm/llvm-project/commit/8685fb10938f0fb2bd3293ffbe292fbcdd962927
Author: Longsheng Mou <longshengmou at gmail.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M mlir/include/mlir/Dialect/CommonFolders.h
M mlir/include/mlir/Dialect/Math/IR/MathOps.td
M mlir/lib/Dialect/Math/IR/MathOps.cpp
M mlir/test/Dialect/Math/canonicalize.mlir
M mlir/test/lib/Dialect/Test/TestPatterns.cpp
Log Message:
-----------
[mlir][math] Add constant folding for `math.fpowi` (#193761)
Adds a constant folder for `math.fpowi` when both operands are constant
and the integer exponent is exactly representable in the floating-point
type of the base.
Commit: f780e46d6e0e2b537dbe45092fb62c4a46b95916
https://github.com/llvm/llvm-project/commit/f780e46d6e0e2b537dbe45092fb62c4a46b95916
Author: Ivan R. Ivanov <iivanov at nvidia.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/ExpandMemCmp.cpp
Log Message:
-----------
[llvm][ExpandMemCmp] Avoid making copy of loop value (#193915)
This fixes a compiler warning.
Commit: ca136926c125dd925549b596efd29b900a379045
https://github.com/llvm/llvm-project/commit/ca136926c125dd925549b596efd29b900a379045
Author: divVerent <rpolzer at google.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M clang/lib/Serialization/ASTReader.cpp
M clang/test/Sema/redefine_extname.cpp
Log Message:
-----------
Fix formatting of changes in recent redefine_extname changes. (#189938)
My recent commits fd7388d14083bb5094bce6a75444a37e424689d7 and
37888541a96e4f10bf1b71b869145f0d31a9d580 had minor formatting issues
which happened during editing the PR as I had forgotten to rerun
clang-format. Sorry for that. So here is the update.
Did not fix line lengths in the FileCheck tests as exceeding line length
in these seems more consistent.
Commit: faf37adb3b33a984c585bb5a53f0caa8f0934c0f
https://github.com/llvm/llvm-project/commit/faf37adb3b33a984c585bb5a53f0caa8f0934c0f
Author: Jay Foad <jay.foad at amd.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M clang/utils/TableGen/ClangOptionDocEmitter.cpp
Log Message:
-----------
[Clang] Use const std::string & in ClangOptionDocEmitter. NFC. (#193926)
Fixes #94373
Commit: 69724c88e3e0ed4b23d2fc446c3d472b414146bd
https://github.com/llvm/llvm-project/commit/69724c88e3e0ed4b23d2fc446c3d472b414146bd
Author: David Spickett <david.spickett at arm.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M lldb/docs/resources/lldbgdbremote.md
M lldb/include/lldb/Target/MemoryRegionInfo.h
M lldb/source/Commands/CommandObjectMemory.cpp
M lldb/source/Plugins/Process/Utility/LinuxProcMaps.cpp
M lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationClient.cpp
M lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationServerLLGS.cpp
M lldb/source/Target/MemoryRegionInfo.cpp
M lldb/test/API/linux/aarch64/permission_overlay/TestAArch64LinuxPOE.py
M lldb/test/API/linux/aarch64/permission_overlay/main.c
M lldb/unittests/Process/Utility/LinuxProcMapsTest.cpp
M lldb/unittests/Process/gdb-remote/GDBRemoteCommunicationClientTest.cpp
Log Message:
-----------
[lldb][Linux] Read memory protection keys for memory regions (#182246)
Memory protection keys
(https://docs.kernel.org/core-api/protection-keys.html) are implemented
using two things:
* A key value attached to each page table entry.
* A set of permissions stored somewhere else (in a register on AArch64
and X86), which is indexed into by that protection key.
So far I have updated LLDB to show the permissions part on AArch64 Linux
by reading the por register. Now I am adding the ability to see which
key each memory region is using.
```
(lldb) memory region --all
[0x0000000000000000-0x000aaaae3b140000) ---
[0x000aaaae3b140000-0x000aaaae3b150000) r-x /tmp/test_lldb/linux/aarch64/permission_overlay/2/TestAArch64LinuxPOE/a.out PT_LOAD[0]
protection key: 0
[0x000aaaae3b150000-0x000aaaae3b160000) rw- /tmp/test_lldb/linux/aarch64/permission_overlay/2/TestAArch64LinuxPOE/a.out
protection key: 0
```
The key is parsed from the /proc/.../smaps file, and so will only be
present for live processes, not core files.
This is sent as part of the qMemoryRegionInfo response as a new
"protection-key" key. As far as I know "memory protection keys" are
Linux specific, but I don't know of a good generic name for it, so I've
copied what smaps calls it.
I have updated the "memory region" command to show this key. A lot of
the time this will be the default 0 key. I considered hiding this, but
decided that for this initial support it's better to be explicit and
verbose (this also prevents a Linux specific detail being added to the top level
memory region command).
I have not added protection keys to the SBAPI because:
* I don't know of a specific need for them.
* They are very easy to add if someone does want them later (just a
HasProtectionKey and GetProtectionKey).
* Arm's POE2
(https://developer.arm.com/community/arm-community-blogs/b/architectures-and-processors-blog/posts/future-architecture-technologies-poe2-and-vmte)
is coming soon, which makes these permissions more complex. There's no
need to risk adding something too simple to handle those.
The ability to see the permissions the key refers to, and the final
permissions after the overlay, will be in a follow up PR.
Commit: e2159f8e3c1a9905bdfc82d73c006945fe72c456
https://github.com/llvm/llvm-project/commit/e2159f8e3c1a9905bdfc82d73c006945fe72c456
Author: Fabian Ritter <fabian.ritter at amd.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M llvm/docs/LangRef.rst
Log Message:
-----------
[LangRef] Allow monotonic & seq_cst accesses to inter-operate with other accesses (#189014)
Currently, the LangRef says that atomic operations (which includes `unordered`
operations, which don't participate in the monotonic modification order) must
read a value from the modification order of monotonic operations.
In the following example, this means that the load does not have a store it
could read from, because all stores it may see do not participate in the
monotonic modification order:
```
; thread 0:
store atomic i32 1, ptr %p unordered, align 4
; thread 1:
store atomic i32 2, ptr %p unordered, align 4
load atomic i32, ptr %p unordered, align 4
```
The same applies if the load is monotonic instead of unordered (or if it is
replaced by a monotonic RMW operation). Either case seems wrong.
Similarly, the LangRef currently says "Each sequentially-consistent read sees
the last preceding write to the same address in this global order [of seq_cst
operations]." Strictly read, this means that the load in the following example
must read from the first store (or at least cannot read the second one),
because the second one is not sequentially consistent and therefore not in the
seq_cst order. That also seems wrong.
```
; thread 0
store atomic i32 1, ptr %p seq_cst, align 4
store atomic i32 2, ptr %p monotonic, align 4
load atomic i32, ptr %p seq_cst, align 4
```
This patch aims to resolve these inconsistencies.
Related RFC: https://discourse.llvm.org/t/rfc-clarifying-llvm-irs-concurrent-memory-model/90480
Commit: 390a29ea833965f481a7011b07deed9612229d6e
https://github.com/llvm/llvm-project/commit/390a29ea833965f481a7011b07deed9612229d6e
Author: David Spickett <david.spickett at arm.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M lldb/docs/resources/lldbgdbremote.md
M lldb/include/lldb/Target/MemoryRegionInfo.h
M lldb/source/Commands/CommandObjectMemory.cpp
M lldb/source/Plugins/Process/Utility/LinuxProcMaps.cpp
M lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationClient.cpp
M lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationServerLLGS.cpp
M lldb/source/Target/MemoryRegionInfo.cpp
M lldb/test/API/linux/aarch64/permission_overlay/TestAArch64LinuxPOE.py
M lldb/test/API/linux/aarch64/permission_overlay/main.c
M lldb/unittests/Process/Utility/LinuxProcMapsTest.cpp
M lldb/unittests/Process/gdb-remote/GDBRemoteCommunicationClientTest.cpp
Log Message:
-----------
Revert "[lldb][Linux] Read memory protection keys for memory regions" (#193934)
Reverts llvm/llvm-project#182246
Test failures on x86 bot:
```
Failed Tests (2):
lldb-api :: tools/lldb-server/TestGdbRemote_qMemoryRegion.py
lldb-api :: tools/lldb-server/libraries-svr4/TestGdbRemoteLibrariesSvr4Support.py
```
Commit: 23ea7363ff76d3dc56bb1bf8c8581ded4ba21859
https://github.com/llvm/llvm-project/commit/23ea7363ff76d3dc56bb1bf8c8581ded4ba21859
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M llvm/lib/Analysis/AliasAnalysisEvaluator.cpp
A llvm/test/Analysis/BasicAA/atomics.ll
Log Message:
-----------
[AAEval] Print ModRefInfo for atomic operations (#193935)
Print ModRefInfo for fence, atomicrmw, etc. Also for atomic
load and store, as these may have additional effects beyond
what is implied by the simple alias result.
Commit: 9df51a964ddbe4094f7e5a5b4a43f2776dd0da47
https://github.com/llvm/llvm-project/commit/9df51a964ddbe4094f7e5a5b4a43f2776dd0da47
Author: Guray Ozen <guray.ozen at gmail.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
M mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp
A mlir/test/Dialect/LLVMIR/nvvm-transcendentals.mlir
A mlir/test/Target/LLVMIR/nvvm/transcendentals.mlir
Log Message:
-----------
[MLIR][NVVM] Add `nvvm.sin` OP (#193775)
Implement `nvvm.sin` with ftz flag
Commit: cc0913eacf88e5b38f19bb25b1b14a61a653e1ec
https://github.com/llvm/llvm-project/commit/cc0913eacf88e5b38f19bb25b1b14a61a653e1ec
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
A clang/test/AST/ByteCode/libcxx/static-reference-load.cpp
M clang/test/AST/ByteCode/records.cpp
Log Message:
-----------
[clang][bytecode] Fix `MemberExpr`s with a static member (#193902)
We need logic to load from the reference pointer, similar to the one we
have for regular `DeclRefExpr`s.
Commit: 3fa0ac20705b9571e07216f08215fd6168a98012
https://github.com/llvm/llvm-project/commit/3fa0ac20705b9571e07216f08215fd6168a98012
Author: David Spickett <david.spickett at arm.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M lldb/docs/resources/lldbgdbremote.md
M lldb/include/lldb/Target/MemoryRegionInfo.h
M lldb/packages/Python/lldbsuite/test/tools/lldb-server/gdbremote_testcase.py
M lldb/source/Commands/CommandObjectMemory.cpp
M lldb/source/Plugins/Process/Utility/LinuxProcMaps.cpp
M lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationClient.cpp
M lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationServerLLGS.cpp
M lldb/source/Target/MemoryRegionInfo.cpp
M lldb/test/API/linux/aarch64/permission_overlay/TestAArch64LinuxPOE.py
M lldb/test/API/linux/aarch64/permission_overlay/main.c
M lldb/unittests/Process/Utility/LinuxProcMapsTest.cpp
M lldb/unittests/Process/gdb-remote/GDBRemoteCommunicationClientTest.cpp
Log Message:
-----------
Reland "[lldb][Linux] Read memory protection keys for memory regions (#193934)" (#193936)
This reverts commit 390a29ea833965f481a7011b07deed9612229d6e.
Two tests failed on the X86 buildbot but not in GitHub CI because the
buildbot has protection keys and the CI machines do not. I ran the tests
on an AArch64 host without protection keys, and only selected tests on a
simulated AArch64 machine with protection keys, so I did not find this
earlier.
The fix was to add "protection-key" to the list of possible
qMemoryRegionInfo response keys.
Commit: 90020486aa8941d77c6a40afef0f20c94f333433
https://github.com/llvm/llvm-project/commit/90020486aa8941d77c6a40afef0f20c94f333433
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M llvm/test/CodeGen/X86/masked-sdiv.ll
M llvm/test/CodeGen/X86/masked-srem.ll
M llvm/test/CodeGen/X86/masked-udiv.ll
M llvm/test/CodeGen/X86/masked-urem.ll
Log Message:
-----------
[X86] masked div/rem tests - fix avx512 and add sse4/avx2 test coverage (#193933)
Noticed the incorrect "-mattr=+avx512" attribute, and replaced it with proper x86-64-v* level test coverage
Commit: cedcf1876cb15455a92b539007e122107e66518a
https://github.com/llvm/llvm-project/commit/cedcf1876cb15455a92b539007e122107e66518a
Author: divVerent <rpolzer at google.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M clang/include/clang/Sema/Sema.h
M clang/lib/Sema/SemaDecl.cpp
M clang/test/PCH/pragma-redefine-extname.c
M clang/test/PCH/pragma-redefine-extname.h
Log Message:
-----------
[Clang][Sema] Change `ExtnameUndeclaredIdentifiers` to MapVector. (#193924)
Iteration order of this map does not matter for compilation, except that
since 475f71e8fa15ee71f99e450a0e1c90d3961005f9, this data is dumped into
precompiled header files and thus affects content of those files.
To make precompiled header file contents deterministic, changing its
type to one that has deterministic iteration order, matching the nearby
`WeakUndeclaredIdentifiers`.
Fixes #193923
Commit: a48159df9ce57c2bf377588b52563966865514a2
https://github.com/llvm/llvm-project/commit/a48159df9ce57c2bf377588b52563966865514a2
Author: Jonathan Thackray <jonathan.thackray at arm.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M clang/test/Driver/aarch64-v97a.c
M clang/test/Driver/print-supported-extensions-aarch64.c
M llvm/lib/Target/AArch64/AArch64Features.td
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/lib/Target/AArch64/AArch64SystemOperands.td
M llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp
M llvm/lib/Target/AArch64/Utils/AArch64BaseInfo.cpp
M llvm/lib/Target/AArch64/Utils/AArch64BaseInfo.h
M llvm/test/CodeGen/AArch64/aarch64-sys-intrinsic.ll
R llvm/test/MC/AArch64/armv9.7a-mpamv2-diagnostics.s
M llvm/test/MC/AArch64/armv9.7a-mpamv2.s
M llvm/unittests/TargetParser/TargetParserTest.cpp
Log Message:
-----------
[AArch64][llvm] Remove support for FEAT_MPAMv2_VID (#193191)
`FEAT_MPAMv2_VID` instructions and system registers, as introduced
in change d30f18d2c, are being removed at this time, as they've been
removed from the latest Arm ARM, which doesn't preclude them returning
in some form in future.
Other system registers introduced with `FEAT_MPAMv2` are unaffected,
and these continue to be ungated, but since `+mpamv2` gating is now
empty,
I'm removing this superfluous gating code.
Commit: f64e8d1567ad40b4c584bc842f1c8ebfdcc1d491
https://github.com/llvm/llvm-project/commit/f64e8d1567ad40b4c584bc842f1c8ebfdcc1d491
Author: Rohit Aggarwal <44664450+rohitaggarwal007 at users.noreply.github.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M llvm/include/llvm/Analysis/VecFuncs.def
M llvm/include/llvm/IR/RuntimeLibcalls.td
M llvm/test/Transforms/LoopVectorize/X86/amdlibm-calls.ll
Log Message:
-----------
[AMDLIBM] Remove the mapping of the deleted vector call (#193760)
Removing the mapping of deleted vector from the
[amdlibm_vec.h](https://github.com/amd/aocl-libm-ose/blob/master/include/external/amdlibm_vec.h)
Commit: a227dc7c0980c414c4a7d9f1f3f64130b1956b0c
https://github.com/llvm/llvm-project/commit/a227dc7c0980c414c4a7d9f1f3f64130b1956b0c
Author: Xinlong Chen <xinlongchen at tencent.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/test/CodeGen/RISCV/combine-is_fpclass.ll
Log Message:
-----------
[DAG] visitIS_FPCLASS - fold to constant when result is fully determined by KnownFPClass (#193737)
This PR teaches `DAGCombiner::visitIS_FPCLASS` to fold directly to
constant `true` based on the source's `KnownFPClass`, instead of only
narrowing the test mask.
Prep work to help with https://github.com/llvm/llvm-project/pull/193672
Commit: 48e65b6c433753cb09c4057305fc2b49b2ee4168
https://github.com/llvm/llvm-project/commit/48e65b6c433753cb09c4057305fc2b49b2ee4168
Author: David Green <david.green at arm.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64InstrFormats.td
M llvm/test/CodeGen/AArch64/bf16-v8-instructions.ll
Log Message:
-----------
[AArch64][GlobalISel] Add a variant of gi_extract_high_v8bf16 (#193345)
This allows the upper extract_high to match for bf16 types, allowing us
to generate a sshl2 instruction.
Commit: 8141a4351c5e0803902e27182a9ff0ebb7cb7bee
https://github.com/llvm/llvm-project/commit/8141a4351c5e0803902e27182a9ff0ebb7cb7bee
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M flang/examples/FeatureList/FeatureList.cpp
M flang/include/flang/Lower/OpenMP.h
M flang/include/flang/Parser/dump-parse-tree.h
M flang/include/flang/Parser/openmp-utils.h
M flang/include/flang/Parser/parse-tree.h
M flang/lib/Lower/Bridge.cpp
M flang/lib/Lower/OpenMP/DataSharingProcessor.cpp
M flang/lib/Parser/openmp-parsers.cpp
M flang/lib/Parser/unparse.cpp
M flang/lib/Semantics/canonicalize-omp.cpp
M flang/lib/Semantics/check-omp-loop.cpp
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/check-omp-structure.h
M flang/lib/Semantics/resolve-directives.cpp
M flang/lib/Semantics/resolve-names.cpp
M flang/test/Lower/pre-fir-tree03.f90
M flang/test/Parser/OpenMP/bind-clause.f90
M flang/test/Parser/OpenMP/cross-label-do.f90
M flang/test/Parser/OpenMP/declare-reduction-multi.f90
M flang/test/Parser/OpenMP/declare-reduction-unparse.f90
M flang/test/Parser/OpenMP/depth-clause.f90
M flang/test/Parser/OpenMP/do-interchange.f90
M flang/test/Parser/OpenMP/do-tile-size.f90
M flang/test/Parser/OpenMP/doacross-clause.f90
M flang/test/Parser/OpenMP/fuse-looprange.f90
M flang/test/Parser/OpenMP/fuse01.f90
M flang/test/Parser/OpenMP/fuse02.f90
M flang/test/Parser/OpenMP/in-reduction-clause.f90
M flang/test/Parser/OpenMP/interchange-permutation.f90
M flang/test/Parser/OpenMP/interchange.f90
M flang/test/Parser/OpenMP/linear-clause.f90
M flang/test/Parser/OpenMP/loop-transformation-construct01.f90
M flang/test/Parser/OpenMP/loop-transformation-construct02.f90
M flang/test/Parser/OpenMP/loop-transformation-construct03.f90
M flang/test/Parser/OpenMP/loop-transformation-construct04.f90
M flang/test/Parser/OpenMP/loop-transformation-construct05.f90
M flang/test/Parser/OpenMP/masked-unparse.f90
M flang/test/Parser/OpenMP/master-unparse.f90
M flang/test/Parser/OpenMP/nonblock-do-nested-omp.f90
M flang/test/Parser/OpenMP/order-clause01.f90
M flang/test/Parser/OpenMP/ordered-depend.f90
M flang/test/Parser/OpenMP/parallel-loop-unparse.f90
M flang/test/Parser/OpenMP/reduction-modifier.f90
M flang/test/Parser/OpenMP/target-loop-unparse.f90
M flang/test/Parser/OpenMP/taskloop.f90
M flang/test/Parser/OpenMP/threadset-clause.f90
M flang/test/Parser/OpenMP/tile-size.f90
M flang/test/Parser/OpenMP/tile.f90
M flang/test/Parser/OpenMP/transparent-clause.f90
M flang/test/Parser/OpenMP/unroll-full.f90
M flang/test/Parser/OpenMP/unroll-heuristic.f90
M flang/test/Parser/OpenMP/unroll-partial.f90
M flang/unittests/Semantics/OpenMPUtils.cpp
Log Message:
-----------
[flang][OpenMP] Make OpenMPLoopConstruct inherit from OmpBlockConstruct (#193823)
Conceptually OpenMPLoopConstruct has the exact same structure as
OmpBlockConstruct: directive specification for the begin directive,
optional one for the end directive, and a block of code. The reason why
OpenMPLoopConstruct was not originally made to be a descendant of
OmpBlockConstruct was to preserve the behavior of AST visitors, where a
separate (type-based) visitor could be defined for the begin/end
directives of a block construct, and for a loop construct. The AST nodes
representing the begin/end directives in block and loop construct had
different types: Omp{Begin|End}Directive for block constructs, and
Omp{Begin|End}LoopDirective for loop constructs.
Today this distinction is not needed anywhere, and so the loop construct
will be represented in the same way as a block construct.
Commit: 0571ce414ec0c499976fb73d9e4796326b4e3c1b
https://github.com/llvm/llvm-project/commit/0571ce414ec0c499976fb73d9e4796326b4e3c1b
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M flang/lib/Semantics/check-omp-loop.cpp
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/check-omp-structure.h
M flang/lib/Semantics/resolve-directives.cpp
M flang/test/Semantics/OpenMP/parallel-master-goto.f90
Log Message:
-----------
[flang][OpenMP] Move branching verification to semantic checks (#193324)
Move the check for branching into and out of an OpenMP construct from
symbol resolution into semantic checks.
Instead of using directive contexts to check for crossing a construct
boundary, use construct pointers and source ranges.
Commit: c59c19bf5921925f40d767aa79eea252b0184f6a
https://github.com/llvm/llvm-project/commit/c59c19bf5921925f40d767aa79eea252b0184f6a
Author: Valery Pykhtin <valery.pykhtin at amd.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
A llvm/include/llvm/CodeGen/MachineIDFSSAUpdater.h
M llvm/lib/CodeGen/CMakeLists.txt
A llvm/lib/CodeGen/MachineIDFSSAUpdater.cpp
M llvm/lib/Target/AMDGPU/SILowerI1Copies.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-divergent-i1-used-outside-loop.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-structurizer.mir
M llvm/test/CodeGen/AMDGPU/si-i1-copies.mir
M llvm/test/CodeGen/AMDGPU/si-lower-i1-copies-order-of-phi-incomings.mir
Log Message:
-----------
[MachineSSAUpdater][AMDGPU] Add faster version of MachineSSAUpdater class. (#145722)
This is a port of SSAUpdaterBulk to machine IR minus "bulk" part. Phi
deduplication and simplification are not yet implemented but can be
added if needed.
When used in AMDGPU to replace MachineSSAUpdater for i1 copy lowering,
it reduced compilation time from 417 to 180 seconds for the pass on a
large test case (56% improvement).
Commit: 0844fdfd725501264dbaade58698e9f81576f021
https://github.com/llvm/llvm-project/commit/0844fdfd725501264dbaade58698e9f81576f021
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M clang/lib/AST/ByteCode/Interp.cpp
M clang/lib/AST/ByteCode/Pointer.cpp
M clang/test/AST/ByteCode/unions.cpp
Log Message:
-----------
[clang][bytecode] Start lifetime when activating pointers (#192589)
This can be used to revive union members.
Commit: c0844b7b65b470ba73356177177105bcdb8309e3
https://github.com/llvm/llvm-project/commit/c0844b7b65b470ba73356177177105bcdb8309e3
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M llvm/test/CodeGen/X86/known-never-zero.ll
Log Message:
-----------
[X86] known-never-zero.ll - regenerate to show VPADD constant asm comments (#193943)
Commit: e7edfd81ca1a943ccbcf19bfb64ad3f11580f9db
https://github.com/llvm/llvm-project/commit/e7edfd81ca1a943ccbcf19bfb64ad3f11580f9db
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M llvm/test/CodeGen/X86/vector-sext.ll
M llvm/test/CodeGen/X86/vector-zext.ll
Log Message:
-----------
[X86] Regenerate vector ext tests to show VPADD constant asm comments (#193942)
Commit: 17861903e6bb2297a63c453728e2a8a9167413bc
https://github.com/llvm/llvm-project/commit/17861903e6bb2297a63c453728e2a8a9167413bc
Author: ZhaoQi <zhaoqi01 at loongson.cn>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/test/CodeGen/LoongArch/lasx/ir-instruction/shuffle-as-xvshuf4i.ll
M llvm/test/CodeGen/LoongArch/lasx/vec-shuffle-byte-rotate.ll
Log Message:
-----------
[LoongArch] Custom legalize vector_shuffle to `xvshuf4i.d` (#164213)
Commit: e3443a1189b97f1f25a7805096417d7cb28e691e
https://github.com/llvm/llvm-project/commit/e3443a1189b97f1f25a7805096417d7cb28e691e
Author: Schrodinger ZHU Yifan <yifanzhu at rochester.edu>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/docs/dev/undefined_behavior.rst
M libc/include/CMakeLists.txt
M libc/include/llvm-libc-macros/pthread-macros.h
M libc/include/llvm-libc-types/CMakeLists.txt
A libc/include/llvm-libc-types/pthread_cond_t.h
M libc/include/pthread.yaml
M libc/include/sys/types.yaml
M libc/src/__support/threads/CndVar.h
M libc/src/__support/threads/mutex.h
M libc/src/__support/threads/unix_mutex.h
M libc/src/pthread/CMakeLists.txt
A libc/src/pthread/pthread_cond_broadcast.cpp
A libc/src/pthread/pthread_cond_broadcast.h
A libc/src/pthread/pthread_cond_clockwait.cpp
A libc/src/pthread/pthread_cond_clockwait.h
A libc/src/pthread/pthread_cond_destroy.cpp
A libc/src/pthread/pthread_cond_destroy.h
A libc/src/pthread/pthread_cond_init.cpp
A libc/src/pthread/pthread_cond_init.h
A libc/src/pthread/pthread_cond_signal.cpp
A libc/src/pthread/pthread_cond_signal.h
A libc/src/pthread/pthread_cond_timedwait.cpp
A libc/src/pthread/pthread_cond_timedwait.h
A libc/src/pthread/pthread_cond_utils.h
A libc/src/pthread/pthread_cond_wait.cpp
A libc/src/pthread/pthread_cond_wait.h
M libc/test/integration/src/pthread/CMakeLists.txt
A libc/test/integration/src/pthread/pthread_cond_test.cpp
Log Message:
-----------
[libc] add `pthread_cond_*` public interfaces (#193656)
Commit: e2170a0f18cd221a06c43aa9af9a53a5ea7abab3
https://github.com/llvm/llvm-project/commit/e2170a0f18cd221a06c43aa9af9a53a5ea7abab3
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.h
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
Log Message:
-----------
[VPlan] Remove unused LVer arg from tryToBuildVplanWithVPRecipes (NFC). (#193950)
LVer is not used.
Commit: a528529064db20a0d18645eebee9ebb4e05e7eb0
https://github.com/llvm/llvm-project/commit/a528529064db20a0d18645eebee9ebb4e05e7eb0
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M clang/lib/AST/ByteCode/Interp.cpp
M clang/lib/AST/ByteCode/Interp.h
A clang/test/AST/ByteCode/libcxx/constexpr-unknown-getbase.cpp
Log Message:
-----------
[clang][bytecode] Allow constexpr-unknown values in GetPtrBase{,Pop} (#193903)
We can handle them here and it's needed to make some libc++ tests work.
Commit: 4c66205b070cdb8d18f9456ebbb5c592b5134487
https://github.com/llvm/llvm-project/commit/4c66205b070cdb8d18f9456ebbb5c592b5134487
Author: David Spickett <david.spickett at arm.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M lldb/include/lldb/Target/ABI.h
M lldb/source/Commands/CommandObjectMemory.cpp
M lldb/source/Plugins/ABI/AArch64/ABISysV_arm64.cpp
M lldb/source/Plugins/ABI/AArch64/ABISysV_arm64.h
M lldb/test/API/linux/aarch64/permission_overlay/TestAArch64LinuxPOE.py
M lldb/test/API/linux/aarch64/permission_overlay/main.c
Log Message:
-----------
[lldb][Linux] Add overlay and effective permissions to "memory region" (#184115)
In this change I'm extending the "memory region" command to show users
the
overlay permissions that a protection key refers to, and the result of
applying that overlay to the page table permissions.
For example, protection key 0 refers to Perm0 in the por register.
```
(lldb) register read por
Perm0 = Read, Write, Execute
```
This is the default key, so many regions use it.
```
(lldb) memory region --all
<...>
[0x000ffffff7db0000-0x000ffffff7f40000) r-x /usr/lib/aarch64-linux-gnu/libc.so.6 PT_LOAD[0]
protection key: 0 (rwx, effective: r-x)
```
Protection keys can only change what was already enabled in the
page table. So we start with read and execute. Then a read/write/execute
overlay
is applied. We cannot add write, so the result is read and execute.
Here's an example of its use with a real crash (output edited):
```
(lldb) c
* thread #1, name = 'test.o', stop reason = signal SIGSEGV: failed protection key checks (fault address=0xffffff7d60000)
-> 106 read_only_page[0] = '?';
(lldb) memory region 0xffffff7d60000
[0x000ffffff7d60000-0x000ffffff7d70000) rw-
protection key: 6 (r--, effective: r--)
(lldb) register read por
Perm6 = Read
```
The calculation of permissions is implemented by a new ABI method.
It's in ABI for 2 reasons:
* These overlays are usually in a register (X86 and AArch64 are)
and that register name is architecture specific.
* The way the overlay values apply may differ between architecture.
AArch64 treats a set bit as adding a permission, but some may
treat it as removing.
Technically this is dependent on operating system and architecture.
However, so are the methods for removing non-address bits, and those
are in ABI too.
To test this I have changed the allocations in the test program
to use read+execute permissions by default. With read+write+execute
I could not observe that the overlay only changes enabled permissions.
Commit: bb3d25167abe9e8f4afa5cf8925577f1843674d5
https://github.com/llvm/llvm-project/commit/bb3d25167abe9e8f4afa5cf8925577f1843674d5
Author: Petter Berntsson <petter.berntsson at arm.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M libc/docs/CMakeLists.txt
M libc/docs/headers/index.rst
A libc/utils/docgen/sys/select.yaml
Log Message:
-----------
[libc][docs][POSIX] Add sys/select.h implementation status (#122006) (#193948)
Add sys/select.h implementation-status docs to llvm-libc.
Commit: d3f4fc750db91378aaf6e2170ceea45af022f3e7
https://github.com/llvm/llvm-project/commit/d3f4fc750db91378aaf6e2170ceea45af022f3e7
Author: Jonathan Thackray <jonathan.thackray at arm.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M clang/include/clang/Basic/arm_sve.td
Log Message:
-----------
[AArch64][clang] Fix typos in `arm_sve.td` (NFC) (#192981)
Rename some typos in `arm_sve.td`, rather than perpetuate them (since
I'll be adding more MMLA intrinsics shortly).
No functional change.
Commit: 7b68b4b2c196c922a10f6406675d5dbc3bfbc716
https://github.com/llvm/llvm-project/commit/7b68b4b2c196c922a10f6406675d5dbc3bfbc716
Author: David Spickett <david.spickett at arm.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M lldb/docs/use/aarch64-linux.md
M llvm/docs/ReleaseNotes.md
Log Message:
-----------
[lldb][docs] Document AArch64 Linux Permission Overlay support (#184119)
This change adds a user guide and release notes for POE.
Commit: 629f81599d6e2069fcaafb3947ad65d60844f127
https://github.com/llvm/llvm-project/commit/629f81599d6e2069fcaafb3947ad65d60844f127
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M llvm/test/CodeGen/X86/freeze-binary.ll
Log Message:
-----------
[X86] freeze-binary.ll - regenerate to show VPADD constant asm comments (#193953)
Commit: 48e0e16886f96e80de2f3390785ef7a373b562bc
https://github.com/llvm/llvm-project/commit/48e0e16886f96e80de2f3390785ef7a373b562bc
Author: Charles Zablit <c_zablit at apple.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M lldb/packages/Python/lldbsuite/test/tools/lldb-dap/dap_server.py
Log Message:
-----------
[lldb-dap] extend env when testing reverse request (#193743)
When testing lldb-dap's "runInTerminal" mode, the `"env"` argument is
meant to extend/override the current environment, not replace it.
This causes issues on Windows when Python is not in the System's Path.
The reverse request fails because lldb-dap can't find Python.
Commit: b5d253cf31c2f72fd54a039ac20ae9b56bc933fb
https://github.com/llvm/llvm-project/commit/b5d253cf31c2f72fd54a039ac20ae9b56bc933fb
Author: Eugene Epshteyn <eepshteyn at nvidia.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M flang/test/Lower/OpenMP/Todo/omp-default-clause-inner-loop.f90
M flang/test/Lower/namelist-common-block.f90
M flang/test/Lower/nested-where.f90
M flang/test/Lower/nullify.f90
M flang/test/Lower/optional-value-caller.f90
Log Message:
-----------
[flang][NFC] Converted five tests from old lowering to new lowering (part 47) (#193886)
Tests converted from test/Lower: namelist-common-block.f90,
nested-where.f90, nullify.f90,
OpenMP/Todo/omp-default-clause-inner-loop.f90, optional-value-caller.f90
Commit: ee4d927dfc01f124cbb3f0302d6f273e0894c637
https://github.com/llvm/llvm-project/commit/ee4d927dfc01f124cbb3f0302d6f273e0894c637
Author: Henry Wu <henrywu at mathworks.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M mlir/lib/Conversion/TosaToLinalg/TosaToLinalg.cpp
M mlir/test/Conversion/TosaToLinalg/tosa-to-linalg-resize.mlir
Log Message:
-----------
[mlir][tosa] Fix integer bilinear (quantized) tosa.resize lowering to use floordivsi (#193821)
## Background
`tosa.resize` in bilinear integer (quantized) mode lowers to a
`linalg.generic`
body that, for each output pixel, computes a corresponding input
coordinate and
blends the four neighboring input pixels. The mapping is:
```
val = out_coord * scale_d + offset
index = val / scale_n // integer part — which input pixel to start from
delta = val - index * scale_n // fractional part, scaled to [0, scale_n)
```
`delta` is the interpolation weight toward the next pixel. The bilinear
formula
(integer path) is:
```
topAcc = pixel[y0,x0] * (scale_x - dx) + pixel[y0,x1] * dx
bottomAcc = pixel[y1,x0] * (scale_x - dx) + pixel[y1,x1] * dx
result = topAcc * (scale_y - dy) + bottomAcc * dy
```
For this to be a valid convex combination (interpolation, not
extrapolation),
`dx` and `dy` must be in `[0, scale_n]`.
The pixel indices `y0`, `y1`, `x0`, `x1` are computed by
`getClampedIdxs`:
```cpp
y0 = clamp(iy, 0, H-1)
y1 = clamp(iy+1, 0, H-1)
```
---
## The Bug
The integer path uses `DivSIOp` (truncation toward zero):
```cpp
// getIndexAndDeltaInt — mlir/lib/Conversion/TosaToLinalg/TosaToLinalg.cpp
index = arith::DivSIOp::create(b, val, scaleN); // truncates toward zero
delta = arith::MulIOp::create(b, index, scaleN);
delta = arith::SubIOp::create(b, val, delta); // = val - (val/scaleN)*scaleN
```
When `val < 0` (which happens at boundary output pixels when `offset` is
negative), `DivSIOp` truncates toward zero instead of toward -∞. This
produces
a negative remainder, i.e. a negative `delta`, which causes
extrapolation.
Note: the code comment on line 2058 already says `// ix = floor(x /
scale_n)`,
but the code uses truncation — this mismatch is the root cause of the
bug.
The float path (`getIndexAndDeltaFp`) uses `FloorDivSIOp` and is
unaffected:
with floor division, `r = val - floor(val/scaleN)*scaleN` is always in
`[0, scaleN-1]`.
---
## Concrete Example
**Setup:** 2×2 input upsampled to 4×4, `scale=[4,2,4,2]`,
`offset=[-1,-1]`
- `scale_y_n=4`, `scale_y_d=2`, `scale_x_n=4`, `scale_x_d=2`
- `offset_y=-1`, `offset_x=-1`
- Input: `tensor<1x2x2x1xi8>` with `input[0,0,0,0]=100`, all others `0`
**At output pixel (0,0):**
```
val = 0 * 2 + (-1) = -1
```
### Without any fix (DivSIOp, buggy)
```
iy = DivSIOp(-1, 4) = 0 // truncates -0.25 toward zero
dy = -1 - 0*4 = -1 // OUT OF RANGE: should be in [0, 4]
y0 = clamp(0, 0, 1) = 0
y1 = clamp(0+1, 0, 1) = 1 // different rows
ix = DivSIOp(-1, 4) = 0
dx = -1 // same issue
x0 = clamp(0, 0, 1) = 0
x1 = clamp(0+1, 0, 1) = 1
// pixels:
y0x0 = input[0,0,0,0] = 100
y0x1 = input[0,0,1,0] = 0
y1x0 = input[0,1,0,0] = 0
y1x1 = input[0,1,1,0] = 0
topAcc = 100*(4-(-1)) + 0*(-1) = 500 // EXTRAPOLATION
bottomAcc = 0*(4-(-1)) + 0*(-1) = 0
result = 500*(4-(-1)) + 0*(-1) = 2500 // WRONG
```
### Fix w/ FloorDivSIOp
```
iy = FloorDivSIOp(-1, 4) = -1 // floors -0.25 toward -∞
dy = -1 - (-1)*4 = 3 // naturally in [0, scale_n-1]
y0 = clamp(-1, 0, 1) = 0
y1 = clamp(-1+1, 0, 1) = 0 // SAME row — both snap to boundary
dx = 3 (same by symmetry)
// all four neighbors collapse to the same boundary pixel:
y0x0 = y0x1 = y1x0 = y1x1 = input[0,0,0,0] = 100
topAcc = 100*(4-3) + 100*3 = 400
bottomAcc = 100*(4-3) + 100*3 = 400
result = 400*(4-3) + 400*3 = 1600 // correct
```
`y0=y1=0` means boundary replication is enforced by `getClampedIdxs`,
making
`dy` irrelevant.
## Semantic Analysis of the fix
- `iy=-1` correctly signals "this position is before the first input
pixel."
- `getClampedIdxs` does its intended job: both `y0` and `y1` snap to the
boundary pixel, enforcing replication explicitly.
- `dy=3` **appears** valid (it's in `[0, scale_n-1]`) but is
semantically
meaningless: the true position is `-0.25`, which is outside the image —
there
is no "3/4 toward the next pixel" to interpolate toward. It is harmless
only
because `y0=y1`.
- Same analysis for dx=3 by symmetry.
- Fixes the root cause (wrong division op, matching the existing code
comment
and mirroring the float path), but `delta` still carries a misleading
value
at out-of-bounds positions.
Commit: 97b7cee34583c4f1a1b9fc258d29969423762fed
https://github.com/llvm/llvm-project/commit/97b7cee34583c4f1a1b9fc258d29969423762fed
Author: Erich Keane <ekeane at nvidia.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M clang/include/clang/CIR/Dialect/Builder/CIRBaseBuilder.h
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/lib/CIR/CodeGen/CIRGenCXX.cpp
M clang/lib/CIR/CodeGen/CIRGenDecl.cpp
M clang/lib/CIR/CodeGen/CIRGenDeclCXX.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
M clang/lib/CIR/CodeGen/CIRGenModule.h
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
M clang/lib/CIR/Dialect/Transforms/LoweringPrepare.cpp
M clang/test/CIR/CodeGen/static-local.cpp
M clang/test/CIR/IR/invalid-static-local.cir
M clang/test/CIR/IR/static-local.cir
Log Message:
-----------
[CIR] Introduce LocalInitOp, & lower static locals (#193576)
During an investigation of something else, I discovered that our
handling of static-local as a ctor/dtor on a GlobalOp meant that it
couldn't actually be initialized with reference to any local, parameter,
or member declarations. This is obviously problematic.
This patch instead introduces a `LocalInitOp`, which is an operation
that represents the location of initialization for the static local.
This is lowered during lowering-prepare, same as we did previously (in
fact, it uses basically the exact same lowering code, with some slight
modifications).
Lowering from AST itself splits slightly from global declarations, but
the two share implementation as closely as possible.
At the moment, this operation only works for static-locals, and has a
handful of asserts to do the same. It is intended that the
thread-local-storage use the exact same mechanism, with some slight
modifications to the lowering-prepare pass to introduce the different
init behavior.
Commit: aca5d1ed27f7191435e5560329aaa99bb4fac593
https://github.com/llvm/llvm-project/commit/aca5d1ed27f7191435e5560329aaa99bb4fac593
Author: NeKon69 <nobodqwe at gmail.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M clang/include/clang/Analysis/Analyses/LifetimeSafety/Facts.h
M clang/include/clang/Analysis/Analyses/LifetimeSafety/FactsGenerator.h
M clang/include/clang/Analysis/Analyses/LifetimeSafety/LifetimeSafety.h
M clang/include/clang/Analysis/Analyses/LifetimeSafety/Loans.h
M clang/include/clang/Basic/DiagnosticGroups.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/lib/Analysis/LifetimeSafety/Checker.cpp
M clang/lib/Analysis/LifetimeSafety/FactsGenerator.cpp
M clang/lib/Analysis/LifetimeSafety/Loans.cpp
M clang/lib/Sema/SemaLifetimeSafety.h
M clang/test/Sema/Inputs/lifetime-analysis.h
M clang/test/Sema/warn-lifetime-safety-suggestions.cpp
M clang/test/Sema/warn-lifetime-safety.cpp
Log Message:
-----------
[LifetimeSafety] Remerge "Add support for `new`/`delete`" (#193776)
This PR extends LifetimeSafety to support heap allocations via
`new`/`delete`.
# Contents
* Adds a new warning emitted for use-after-free.
* Renames `reportUseAfterFree` to `reportUseAfterScope`, since the old
name was misleading (the warnings are still called `use_after_scope`).
* Adds a new `AccessPath::Kind` value, `NewAllocation`, which is used
for loans issued from `new` allocations.
* Adds `VisitCXXNewExpr` and `VisitCXXDeleteExpr`, which handle loan
issuance and origin propagation for `new` and `delete`.
* Comes with extensive test coverage for the new features, including new
use-after-free tests and use-after-scope coverage for `new`.
Remerges #192504
# Changes over original PR
* Fixed a crash when allocating `void*`, and added a regression test for
it
* The `AccessPath` root implementation was changed in #193520, so this
now builds on 32-bit systems
Completes part of #164963
Assisted-by: GPT-5.4 for writing most of the tests (the remaining tests,
and everything else in this PR, were written by me).
Commit: 8baf33522df35c4e3c1dcd90e66d68976c0de256
https://github.com/llvm/llvm-project/commit/8baf33522df35c4e3c1dcd90e66d68976c0de256
Author: Amina Chabane <amina.chabane at arm.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M bolt/lib/Passes/JTFootprintReduction.cpp
M bolt/test/AArch64/unsupported-passes.test
Log Message:
-----------
[BOLT][AArch64] Refuse to run JTFootprintReduction pass (#193946)
JTFootprintReduction results in a no-op on AArch64. This is because it
emits createIJmp32Frag() which is unimplemented for AArch64 and is only
overridden by x86.
- Add a guard for non-x86
- Update unsupported-passes.test with expected error message
Commit: 8e5b38383f1ecb1c93fbe19b6228b45659decf2d
https://github.com/llvm/llvm-project/commit/8e5b38383f1ecb1c93fbe19b6228b45659decf2d
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M flang/lib/Parser/openmp-parsers.cpp
Log Message:
-----------
[flang][OpenMP] Rename dirSpec to spec in openmp-parsers.cpp, NFC (#193967)
Commit: 6c7d16c0bfd38afc8c4131510740737113451f22
https://github.com/llvm/llvm-project/commit/6c7d16c0bfd38afc8c4131510740737113451f22
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M libclc/CMakeLists.txt
Log Message:
-----------
[libclc] Use 'LLVM_DEFAULT_TARGET_TRIPLE' instead of 'LLVM_RUNTIMES_TARGET' (#193969)
Summary:
The 'LLVM_RUNTIMES_TARGET' variable is the raw value used by the LLVM
CMake. It can contain multilib arguments which will not compile when
used as a triple. The more canonical value is
`LLVM_DEFAULT_TARGET_TRIPLE`, which is used by flang-rt, libc, openmp,
etc.
Commit: 771440f5bb2e0684a82c770293f561d17aedd0c0
https://github.com/llvm/llvm-project/commit/771440f5bb2e0684a82c770293f561d17aedd0c0
Author: Petter Berntsson <petter.berntsson at arm.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M libc/docs/CMakeLists.txt
M libc/docs/headers/index.rst
A libc/utils/docgen/dlfcn.yaml
Log Message:
-----------
[libc][docs] Add dlfcn.h implementation status (#122006) (#193972)
Add dlfcn.h implementation-status docs to llvm-libc.
Commit: c49b1773b2236a759dfedd3b5b67eb11856a9cbb
https://github.com/llvm/llvm-project/commit/c49b1773b2236a759dfedd3b5b67eb11856a9cbb
Author: Chuanqi Xu <yedeng.yd at linux.alibaba.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M clang-tools-extra/clangd/ModulesBuilder.cpp
M clang-tools-extra/clangd/unittests/PrerequisiteModulesTest.cpp
Log Message:
-----------
[clangd] [C++20] [Modules] Introduce GC for clangd built modules (#193973)
This patch introduces simple GC for clangd built module files to avoid
the clangd built module cache to increase infinitely.
The strategy is, in a clangd built module file cache, if the clangd
built module (we think all PCM files in clangd cache are built by
clangd) was not accessed in a time (by default 3 day, controlled by
--modules-builder-versioned-gc-threshold-seconds)，clangd will remove it.
The strategy is not perfect. e.g., I heard in some systems, the atime
was forbid or not update. But given a trade off between usability and
maintainability. I feel the current stategy is fine.
AI assisted.
Commit: 2168f4b3d3bf22e360d016b583ef5f1f0650cc70
https://github.com/llvm/llvm-project/commit/2168f4b3d3bf22e360d016b583ef5f1f0650cc70
Author: Eugene Epshteyn <eepshteyn at nvidia.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M flang/test/Lower/pointer-args-caller.f90
M flang/test/Lower/pointer-assignments.f90
M flang/test/Lower/pointer-association-polymorphic.f90
M flang/test/Lower/pointer-default-init.f90
M flang/test/Lower/pointer-disassociate.f90
Log Message:
-----------
[flang][NFC] Converted five tests from old lowering to new lowering (part 48) (#193889)
Tests converted from test/Lower: pointer-args-caller.f90,
pointer-assignments.f90, pointer-association-polymorphic.f90,
pointer-default-init.f90, pointer-disassociate.f90
Commit: f1f2022f4f18ff31aea852a0e903ba85d28f5717
https://github.com/llvm/llvm-project/commit/f1f2022f4f18ff31aea852a0e903ba85d28f5717
Author: Petter Berntsson <petter.berntsson at arm.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M libc/docs/CMakeLists.txt
M libc/docs/headers/index.rst
A libc/utils/docgen/sys/uio.yaml
Log Message:
-----------
[libc][docs] Add sys/uio.h implementation status (#122006) (#193980)
Add sys/uio.h implementation-status docs to llvm-libc.
Commit: 52534a1e1207aa1a983d7ee47e5e3a871b7373e5
https://github.com/llvm/llvm-project/commit/52534a1e1207aa1a983d7ee47e5e3a871b7373e5
Author: Chuanqi Xu <yedeng.yd at linux.alibaba.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M clang/lib/AST/StmtProfile.cpp
R clang/test/Modules/callable-require-clause-merge.cppm
M clang/test/Modules/polluted-operator.cppm
Log Message:
-----------
Revert "[C++20] [Modules] Don't profiling the callee of CXXFoldExpr (#190732)" (#193975)
This reverts commit 4c2e49dc5ce3125be9fb07dcefe9be970ce739ec.
See the discussion in https://github.com/llvm/llvm-project/pull/193885
for detail
Commit: c92bf56cd7bb9861bb52eaf2a75680149a25ec5c
https://github.com/llvm/llvm-project/commit/c92bf56cd7bb9861bb52eaf2a75680149a25ec5c
Author: David Spickett <david.spickett at arm.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M lldb/docs/use/aarch64-linux.md
M lldb/source/Plugins/ABI/AArch64/ABISysV_arm64.cpp
M lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.h
M lldb/source/Plugins/Process/Utility/RegisterFlagsDetector_arm64.cpp
M lldb/source/Plugins/Process/Utility/RegisterFlagsDetector_arm64.h
M lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_arm64.cpp
M lldb/source/Plugins/Process/elf-core/RegisterContextPOSIXCore_arm64.cpp
M lldb/test/API/linux/aarch64/permission_overlay/TestAArch64LinuxPOE.py
M lldb/test/API/linux/aarch64/permission_overlay/main.c
Log Message:
-----------
[lldb][AArch64][Linux] Rename "por" register to "por_el0" (#193983)
As agreed with my Arm colleagues working on GDB.
The suffix means we are matching the architectural name exactly, and
reducing confusion if you're
debuging multiple exception levels where there could be por_el<N> as
well.
In the process of updating the tests I found some
"register read" output has changed alignment so I
have fixed that too.
Commit: 785d7246bf16e72c367f7428866cb0cc5ad884bb
https://github.com/llvm/llvm-project/commit/785d7246bf16e72c367f7428866cb0cc5ad884bb
Author: Joe Nash <joseph.nash at amd.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/VOPDInstructions.td
A llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vopd3_unused_operands.txt
Log Message:
-----------
[AMDGPU][Disassembler] Permit unneeded VOPD3 operands to be non-zero (#193974)
Use ? instead of 0 in the tablegen definitions for those unused operands
of VOPD3 instructions.
This enables the instruction to be disassembled regardless of what bits
are in those fields, which helps diagnose broken code. Previously, the
disassembler would reject these.
Commit: 4837b0a476ebf54bdd19c783b01f7235a428a7cc
https://github.com/llvm/llvm-project/commit/4837b0a476ebf54bdd19c783b01f7235a428a7cc
Author: Utkarsh Saxena <usx at google.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M clang/lib/Analysis/LifetimeSafety/Checker.cpp
M clang/test/Sema/Inputs/lifetime-analysis.h
M clang/test/Sema/warn-lifetime-safety-suggestions.cpp
Log Message:
-----------
[LifetimeSafety] Suppress suggestion/inference for moved loans (#193899)
Fixes https://github.com/llvm/llvm-project/issues/193747
Commit: 08992737d23113d3b9a78974b87b1ba3e7ecb6cb
https://github.com/llvm/llvm-project/commit/08992737d23113d3b9a78974b87b1ba3e7ecb6cb
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
Log Message:
-----------
[VPlan] Use early continue in ::buildVPlansWithVPRecipes (NFC). (#193979)
Reduce nesting by using early continue, split off from
https://github.com/llvm/llvm-project/pull/192868
Commit: 25a035d944868def9b5a43399eb48cdee2ef2fa3
https://github.com/llvm/llvm-project/commit/25a035d944868def9b5a43399eb48cdee2ef2fa3
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M clang/lib/AST/ByteCode/Interp.h
M clang/test/AST/ByteCode/c.c
Log Message:
-----------
[clang][bytecode] Reject float-to-int casts on non-numbers (#193968)
Commit: b0931483280db3a34c0228a859bd1fcb9af3902f
https://github.com/llvm/llvm-project/commit/b0931483280db3a34c0228a859bd1fcb9af3902f
Author: hulxv <hulxxv at gmail.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M libc/shared/math.h
A libc/shared/math/dmulf128.h
A libc/shared/math/dmull.h
M libc/src/__support/math/CMakeLists.txt
A libc/src/__support/math/dmulf128.h
A libc/src/__support/math/dmull.h
M libc/src/math/generic/CMakeLists.txt
M libc/src/math/generic/dmulf128.cpp
M libc/src/math/generic/dmull.cpp
M libc/test/shared/CMakeLists.txt
M libc/test/shared/shared_math_constexpr_test.cpp
M libc/test/shared/shared_math_test.cpp
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[libc][math] Refactor dmul family to header-only (#182151)
Refactors the dmul math family to be header-only.
Closes https://github.com/llvm/llvm-project/issues/182150
Target Functions:
- dmulf128
- dmull
Commit: 87a9cbaed1d6a6c7759d20279436914bb15343f0
https://github.com/llvm/llvm-project/commit/87a9cbaed1d6a6c7759d20279436914bb15343f0
Author: Brian Cain <brian.cain at oss.qualcomm.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M compiler-rt/cmake/Modules/AllSupportedArchDefs.cmake
M compiler-rt/lib/tysan/tysan_platform.h
Log Message:
-----------
[compiler-rt][TySan] Add Hexagon target support (#191603)
Add shadow memory mapping for Hexagon (32-bit architecture) and enable
the TySan build for the Hexagon target.
Hexagon uses a 4-byte shadow entry (PtrShift=2) with the shadow region
at 0x80000000-0xBFFFFFFF (1GB). A 28-bit mask (kAppMemMsk) covers 256MB
of app address space; addresses differing only in bits 28-31 alias in
the shadow. kAppAddr is set to 0xC0000000 to size the mmap to exactly
the 1GB shadow region.
Commit: 94cdc55d8a7734ed06d60c169c878231d4952470
https://github.com/llvm/llvm-project/commit/94cdc55d8a7734ed06d60c169c878231d4952470
Author: Jianhui Li <jian.hui.li at intel.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUWgToSgDistribute.cpp
M mlir/test/Dialect/XeGPU/xegpu-wg-to-sg-unify-ops.mlir
Log Message:
-----------
[MLIR][XeGPU] Remove use-by-broadcast-only restriction for ShapeCast op in Wg-to-Sg distribution pass (#193640)
The WgToSgVectorShapeCastOp pattern previously required that
vector.shape_cast operations expanding unit dimensions could only be
used by vector.broadcast operations. This constraint was not necessary
anymore after the recent refectory.
Commit: cd4ac81779e0ce4ca967705f2182676e7473e814
https://github.com/llvm/llvm-project/commit/cd4ac81779e0ce4ca967705f2182676e7473e814
Author: Ryan Buchner <rbuchner at qti.qualcomm.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M llvm/test/Transforms/SLPVectorizer/RISCV/basic-strided-loads.ll
Log Message:
-----------
[SLP] Add new test for widened strided loads of > i8 width (#193901)
Currently we don't vectorize into strided loads as expected.
Commit: 0642d03c76b3a084935f94869b8ab7508aa889fc
https://github.com/llvm/llvm-project/commit/0642d03c76b3a084935f94869b8ab7508aa889fc
Author: Guray Ozen <guray.ozen at gmail.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
Log Message:
-----------
[MLIR][NVVM] Remove ptx version for consistency (#193991)
Commit: 0f861ec33ae6c0b0573207e4796e5a85748ff413
https://github.com/llvm/llvm-project/commit/0f861ec33ae6c0b0573207e4796e5a85748ff413
Author: Guray Ozen <guray.ozen at gmail.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
M mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp
M mlir/test/Dialect/LLVMIR/nvvm-transcendentals.mlir
M mlir/test/Target/LLVMIR/nvvm/transcendentals.mlir
Log Message:
-----------
[MLIR][NVVM] Add `nvvm.cos` OP (#193792)
Implement `nvvm.cos` with ftz flag
Commit: 1bd6f6636a395bdf0d995bf0d8fae2cd334ae590
https://github.com/llvm/llvm-project/commit/1bd6f6636a395bdf0d995bf0d8fae2cd334ae590
Author: Philip Reames <listmail at philipreames.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M llvm/include/llvm/Transforms/Utils/LowerVectorIntrinsics.h
M llvm/lib/CodeGen/PreISelIntrinsicLowering.cpp
M llvm/lib/CodeGen/TargetLoweringBase.cpp
M llvm/lib/Transforms/Utils/LowerVectorIntrinsics.cpp
R llvm/test/Transforms/PreISelIntrinsicLowering/AArch64/expand-fp-math-binary.ll
R llvm/test/Transforms/PreISelIntrinsicLowering/RISCV/expand-fp-math-binary.ll
Log Message:
-----------
Revert "[PreISelIntrinsicLowering] Expand binary elementwise intrinsics (#193552) (#193580) (#193990)
This reverts commit a1d11348aba4b70295ef9ada4a13a722455165d3.
Two problems have been identified:
- The expansion for powi was functionally wrong - the second argument
stales scalar even when the first is a vector.
- AArch64 uses the Expand option on libcalls to select vector libcalls
in some cases. The test coverage for this uses -start-after which
happens to miss this pass.
Commit: eb17a2e19c854b0f4f3018f3e17d70340a3eb45f
https://github.com/llvm/llvm-project/commit/eb17a2e19c854b0f4f3018f3e17d70340a3eb45f
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M libclc/CMakeLists.txt
Log Message:
-----------
[libclc] Make sure PACKAGE_VERSION is set for libclc (#193966)
Summary:
This can be unset because CMake does not expose this as a raw variable
when you use the find_package interface. If it is not set as in the case
of standalone builds the clang resource directory won't be found
Commit: deb84db5b4056eed1457a6b03148a486bbadd8ea
https://github.com/llvm/llvm-project/commit/deb84db5b4056eed1457a6b03148a486bbadd8ea
Author: Justin Bogner <mail at justinbogner.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M llvm/lib/Target/DirectX/DXILOpBuilder.cpp
M llvm/test/CodeGen/DirectX/BufferLoad-sm61.ll
M llvm/test/CodeGen/DirectX/BufferLoad.ll
M llvm/test/CodeGen/DirectX/BufferStore-sm61.ll
M llvm/test/CodeGen/DirectX/BufferStore.ll
M llvm/test/CodeGen/DirectX/CreateHandle-NURI.ll
M llvm/test/CodeGen/DirectX/CreateHandle.ll
M llvm/test/CodeGen/DirectX/CreateHandleFromBinding-NURI.ll
M llvm/test/CodeGen/DirectX/CreateHandleFromBinding.ll
M llvm/test/CodeGen/DirectX/UAddc.ll
M llvm/test/CodeGen/DirectX/WaveGetLaneIndex.ll
M llvm/test/CodeGen/DirectX/abs.ll
M llvm/test/CodeGen/DirectX/acos.ll
M llvm/test/CodeGen/DirectX/asin.ll
M llvm/test/CodeGen/DirectX/atan.ll
M llvm/test/CodeGen/DirectX/ceil.ll
M llvm/test/CodeGen/DirectX/comput_ids.ll
M llvm/test/CodeGen/DirectX/cos.ll
M llvm/test/CodeGen/DirectX/cosh.ll
M llvm/test/CodeGen/DirectX/countbits.ll
M llvm/test/CodeGen/DirectX/dot4add_i8packed.ll
M llvm/test/CodeGen/DirectX/dot4add_u8packed.ll
M llvm/test/CodeGen/DirectX/exp.ll
M llvm/test/CodeGen/DirectX/fdot.ll
M llvm/test/CodeGen/DirectX/floor.ll
M llvm/test/CodeGen/DirectX/fma.ll
M llvm/test/CodeGen/DirectX/fmad.ll
M llvm/test/CodeGen/DirectX/fmax.ll
M llvm/test/CodeGen/DirectX/fmin.ll
M llvm/test/CodeGen/DirectX/frac.ll
M llvm/test/CodeGen/DirectX/idot.ll
M llvm/test/CodeGen/DirectX/imad.ll
M llvm/test/CodeGen/DirectX/is_fpclass.ll
M llvm/test/CodeGen/DirectX/isinf.ll
M llvm/test/CodeGen/DirectX/isnan.ll
M llvm/test/CodeGen/DirectX/log.ll
M llvm/test/CodeGen/DirectX/log10.ll
M llvm/test/CodeGen/DirectX/log2.ll
M llvm/test/CodeGen/DirectX/reversebits.ll
M llvm/test/CodeGen/DirectX/round.ll
M llvm/test/CodeGen/DirectX/rsqrt.ll
M llvm/test/CodeGen/DirectX/saturate.ll
M llvm/test/CodeGen/DirectX/sin.ll
M llvm/test/CodeGen/DirectX/sinh.ll
M llvm/test/CodeGen/DirectX/smax.ll
M llvm/test/CodeGen/DirectX/smin.ll
M llvm/test/CodeGen/DirectX/splitdouble.ll
M llvm/test/CodeGen/DirectX/sqrt.ll
M llvm/test/CodeGen/DirectX/tan.ll
M llvm/test/CodeGen/DirectX/tanh.ll
M llvm/test/CodeGen/DirectX/trunc.ll
M llvm/test/CodeGen/DirectX/umad.ll
M llvm/test/CodeGen/DirectX/umax.ll
M llvm/test/CodeGen/DirectX/umin.ll
Log Message:
-----------
[DirectX] Apply DXIL op fnattrs to declarations (#193622)
We need to apply DXIL op attributes to the functions themselves, and all
DXIL ops should have the `unwind` attribute. This matches the DXC
behaviour and what consumers like warp's GPU-based validation expect.
Fixes #193620
Commit: 0b449f66927f1dcfdbcfac58efdb037dd6f77a33
https://github.com/llvm/llvm-project/commit/0b449f66927f1dcfdbcfac58efdb037dd6f77a33
Author: Abid Qadeer <haqadeer at amd.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M flang/lib/Frontend/CompilerInvocation.cpp
M flang/test/Driver/do_concurrent_to_omp_cli.f90
Log Message:
-----------
[flang] Fix abort on invalid -fdo-concurrent-to-openmp value. (#193929)
We observed that following command can cause an assertion fail
`flang -fopenmp -fdo-concurrent-to-openmp=devic,e` <file>
It happened because `parseDoConcurrentMapping` reported an error but
still called `val.value()` on failure, tripping std::optional
assertions.
The fix is to return false on error and wire return into
`createFromArgs`.
Commit: a614cd391a402c8682c7b4781121eab07da09ec7
https://github.com/llvm/llvm-project/commit/a614cd391a402c8682c7b4781121eab07da09ec7
Author: Charles Zablit <c_zablit at apple.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M lldb/tools/lldb-dap/Handler/RequestHandler.cpp
Log Message:
-----------
[lldb-dap][windows] fix a race condition in runInTerminal mode (#193773)
Commit: 1823355d06b854854701a8ba430aa1f6be9994f4
https://github.com/llvm/llvm-project/commit/1823355d06b854854701a8ba430aa1f6be9994f4
Author: SiliconA-Z <gfunni234 at gmail.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M llvm/lib/Target/ARM/ARMISelLowering.cpp
M llvm/test/CodeGen/ARM/hoist-and-by-const-from-lshr-in-eqcmp-zero.ll
M llvm/test/CodeGen/ARM/hoist-and-by-const-from-shl-in-eqcmp-zero.ll
Log Message:
-----------
[ARM] Fold SELECT (AND(X,1) == 0), C1, C2 -> XOR(C1,AND(NEG(AND(X,1)),XOR(C1,C2)) in Thumb1 (#185898)
Thumb1 has no native cmov, so this is a better solution.
Commit: e8f32abba9a156257429b812eb867791800bc774
https://github.com/llvm/llvm-project/commit/e8f32abba9a156257429b812eb867791800bc774
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M llvm/include/llvm/CodeGen/TargetInstrInfo.h
M llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
M llvm/lib/CodeGen/TargetInstrInfo.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.h
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.h
M llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
M llvm/lib/Target/ARM/ARMBaseInstrInfo.h
M llvm/lib/Target/CSKY/CSKYInstrInfo.cpp
M llvm/lib/Target/LoongArch/LoongArchInstrInfo.cpp
M llvm/lib/Target/MSP430/MSP430InstrInfo.cpp
M llvm/lib/Target/Mips/MipsBranchExpansion.cpp
M llvm/lib/Target/Mips/MipsInstrInfo.cpp
M llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfo.h
M llvm/lib/Target/Sparc/SparcInstrInfo.cpp
M llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
M llvm/lib/Target/Xtensa/XtensaInstrInfo.cpp
Log Message:
-----------
CodeGen: Fix double counting bundles in inst size verification (#191460)
The AMDGPU implementation handles bundles by summing the
member instructions. This was starting with the size of the
bundle instruction, then re-adding all of the same instructions.
This loop is over the iterator, not instr_iterator, so it should
not be looking through the bundled instructions. Most of the other
uses of getInstSizeInBytes are also on the iterator, not the
instr_iterator so the convention seems to be targets need to handle
BUNDLE correctly themselves.
Commit: cbda767c2a413e8fb621bcc9460e948a7a444c74
https://github.com/llvm/llvm-project/commit/cbda767c2a413e8fb621bcc9460e948a7a444c74
Author: yonghong-song <yhs at fb.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M llvm/lib/IR/ModuleSummaryIndex.cpp
M llvm/lib/Transforms/IPO/FunctionImport.cpp
M llvm/lib/Transforms/Utils/FunctionImportUtils.cpp
A llvm/test/ThinLTO/X86/reduce-promotion-distributed.ll
A llvm/test/ThinLTO/X86/reduce-promotion-same-local-name-distributed.ll
Log Message:
-----------
[ThinLTO] Reduce the number of renaming due to promotions in distribu… (#188074)
…ted mode
For thin-lto, the pull request [1] reduced the number of renaming due to
promotions in process mode. This has been used in linux kernel ([2]) as
it helps kernel live patching a lot.
Recently, I found Rong Xu has added thin-lto distributed mode support in
linux kenrel ([3]) and it is likely to be merged in kernel as well. So
it would be a good idea for llvm to support reducing the number of
renaming in distributed mode too.
To implement this, in function gatherImportedSummariesForModule(),
import functions into summaries if those functions does not need rename.
This will ensure that imported functions have the same name as in there
original module.
[1] https://github.com/llvm/llvm-project/pull/183793
[2]
https://git.kernel.org/pub/scm/linux/kernel/git/kbuild/linux.git/commit/?h=kbuild-for-next&id=dc3b90751d6ffa8865e09a81645a539b9de6d642
[3]
https://lore.kernel.org/linux-kbuild/20251028182822.3210436-3-xur@google.com/
Commit: 1ba6cc0e318bb022dfd322e39df49c5f0dc89068
https://github.com/llvm/llvm-project/commit/1ba6cc0e318bb022dfd322e39df49c5f0dc89068
Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp
M clang/test/CodeGen/AArch64/neon-intrinsics.c
M clang/test/CodeGen/AArch64/neon/intrinsics.c
Log Message:
-----------
[clang][CIR] Add lowering for vcvtd_n_ and vcvts_n_ conversion intrinsics (#190961) (#193273)
This PR adds lowering for the missing conversion intrinsics with an
immediate argument (identified by `_n_` in the intrinsic name), namely
the `vcvts_n_` and `vcvtd_n_` variants.
It also moves the corresponding tests from:
* clang/test/CodeGen/AArch64/neon_intrinsics.c
to:
* clang/test/CodeGen/AArch64/neon/intrinsics.c
The lowering follows the existing implementation in
CodeGen/TargetBuiltins/ARM.cpp.
Reference:
[1] https://arm-software.github.io/acle/neon_intrinsics/advsimd.html#conversions
Commit: df359d81659a248caccd935817fd3f20609b548c
https://github.com/llvm/llvm-project/commit/df359d81659a248caccd935817fd3f20609b548c
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/AArch64/slp-fma-loss.ll
Log Message:
-----------
[SLP] Skip FMulAdd conversion for alt-shuffle FAdd/FSub nodes (#193960)
isAddSubLikeOp() admits alt-shuffle nodes that mix FAdd and FSub, so
transformNodes() was marking them with CombinedOp = FMulAdd. The cost
model then priced the node as a single llvm.fmuladd vector intrinsic,
but emission for an alt shuffle still goes through the ShuffleVector
path and produces fmul + fadd + fsub + shufflevector, which the backend
cannot fuse into a single fmuladd. The resulting under-count made SLP
choose the vector form over the scalar form even when the scalar form
lowers to real FMAs (e.g. fmadd + fmsub on AArch64).
Commit: 63e36755decfc92ee5e457c292aeeb0a69cfa484
https://github.com/llvm/llvm-project/commit/63e36755decfc92ee5e457c292aeeb0a69cfa484
Author: Finn Plummer <mail at inbelic.dev>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M llvm/include/llvm/IR/IntrinsicsDirectX.td
A llvm/test/Transforms/DirectX/getpointer-sink-behavior.ll
M llvm/test/Transforms/GVN/no-sink-dxgetpointer.ll
M llvm/test/Transforms/SimplifyCFG/DirectX/no-sink-dxgetpointer.ll
Log Message:
-----------
[DirectX] Denote `dx.resource.getpointer` with `IntrInaccessibleMemOnly` and `IntrReadMem` (#193593)
`IntrConvergent` was originally added to `dx.resource.getpointer` to
prevent optimization passes (`SimplifyCFG`, `GVN`) from sinking the
intrinsic out of control flow branches, which would create phi nodes on
the returned pointer.
Using `IntrInaccessibleMemOnly` and `IntrReadMem` semantics still
prevent passes from merging or sinking identical calls across branches.
However, this allows the call to be moved within a single control flow
path.
Updates relevant tests and adds a new test to demonstrate a now legal
potential optimization.
This was discovered when
https://github.com/llvm/llvm-project/pull/188792 caused the following
failure:
https://github.com/llvm/llvm-project/actions/runs/24577221310/job/71865579618.
When emitting convergence control tokens, each resource access is then a
user of the convergence control tokens, which makes it's use more
unnecessarily restrictive for optimizations and in this case would
prevent a loop unroll from taking place.
Assisted by: Claude Opus 4.6
Commit: 0dc6e8c41e5f41ce3c7320eb4a1b2f2c9bc3da38
https://github.com/llvm/llvm-project/commit/0dc6e8c41e5f41ce3c7320eb4a1b2f2c9bc3da38
Author: Adel Ejjeh <adel.ejjeh at amd.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCExpr.cpp
Log Message:
-----------
[AMDGPU][NFC] Refactor TryGetMCExprValue into evaluateMCExprs helper (#193859)
Replace the duplicated `TryGetMCExprValue` lambda in
`evaluateExtraSGPRs`, `evaluateTotalNumVGPR`, `evaluateAlignTo`, and
`evaluateOccupancy` with a shared static helper `evaluateMCExprs` that
takes an `initializer_list` of `uint64_t` references, enabling callers
to write:
```cpp
uint64_t VCCUsed, FlatScrUsed, XNACKUsed;
if (!evaluateMCExprs(Args, Asm, {VCCUsed, FlatScrUsed, XNACKUsed}))
return false;
```
Split out from #192306 per reviewer feedback.
This PR was created with the help of Github Copilot Claude Opus.
---------
Co-authored-by: Copilot <copilot at github.com>
Commit: 7c043b7a571c7a05f45110a94e7424a0eaa52fd8
https://github.com/llvm/llvm-project/commit/7c043b7a571c7a05f45110a94e7424a0eaa52fd8
Author: Andrey Pavlenko <andrey.a.pavlenko at gmail.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M mlir/include/mlir/Dialect/XeGPU/IR/XeGPUTypes.td
M mlir/lib/Conversion/VectorToXeGPU/VectorToXeGPU.cpp
M mlir/test/Conversion/VectorToXeGPU/transfer-read-to-xegpu.mlir
M mlir/test/Conversion/VectorToXeGPU/transfer-write-to-xegpu.mlir
Log Message:
-----------
[MLIR][XeGPU][VectorToXeGPU] Fixed lowering of transfer_read/write for rank > 2 (#193308)
If rank > 2, load gather/store scatter are used.
Increased value type rank to 8.
Commit: 61bfd7db9f551fabeb928c141ac1993ee143b37b
https://github.com/llvm/llvm-project/commit/61bfd7db9f551fabeb928c141ac1993ee143b37b
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
A clang/test/CIR/CodeGen/self-assign.c
M clang/test/CIR/IR/invalid-copy.cir
Log Message:
-----------
[CIR] Tolerate identical source and destination in cir.copy (#193852)
The SIBsim4 test in the llvm-test-suite MultiSource tests has code that
initializes a structure with itself. This was triggering a CIR
verifcation error because we were checking for source and destination
addresses matching. Since Clang allows this, this change is updating the
cir.copy operation to allow it.
Commit: b3cc1929966eed250d9207692aa15fc91e3e8a36
https://github.com/llvm/llvm-project/commit/b3cc1929966eed250d9207692aa15fc91e3e8a36
Author: Shafik Yaghmour <shafik.yaghmour at intel.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M clang/lib/AST/ByteCode/Context.cpp
M clang/lib/AST/ByteCode/Context.h
Log Message:
-----------
[NFC][Clang][ByteCode] Apply rule of three to Context and EvalIDScope (#193856)
Static analysis flagged these because they had destructor but did not
define copy constructor or copy assignment. For `EvalIDScope` I defined
them as deleted and was able to default the destructor for `Context`.
Commit: 323c3da8dcb81c0fa478fa837954d95b9f39f83e
https://github.com/llvm/llvm-project/commit/323c3da8dcb81c0fa478fa837954d95b9f39f83e
Author: laoshd <shandong.lao at hpe.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M flang-rt/include/flang-rt/runtime/format-implementation.h
M flang-rt/include/flang-rt/runtime/format.h
M flang-rt/lib/runtime/edit-input.cpp
M flang-rt/lib/runtime/edit-output.cpp
M flang-rt/unittests/Runtime/Format.cpp
M flang-rt/unittests/Runtime/NumericalFormatTest.cpp
M flang/docs/F202X.md
M flang/include/flang/Common/format.h
M flang/include/flang/Parser/format-specification.h
M flang/lib/Parser/io-parsers.cpp
M flang/lib/Parser/unparse.cpp
A flang/test/Semantics/io19.f90
Log Message:
-----------
[flang] [flang-rt] Implement AT edit descriptor for Fortran 202X with appropriate handling and tests (#189157)
This PR is to add AT edit descriptor, a new feature of Fortran 2023, 5.1
US 10.
AT is like A (character output) but trims trailing blanks before
emitting the string. AT is functionally the same as TRIM intrinsic.
AT is treated as a variant of A during parse. The trimming of the
trailing spaces are implemented the same as TRIM(). There exists a
method, LenTrim, that can be used to do the trimming. However it's local
to a different .cpp file, character.cpp. And the code is so simple that
no need to make extra effort to use LenTrim.
AT is output only and do not accept width.
This PR will fix #181379.
Commit: b06f62f7fc82ae464528e364119f30e9c8bbbe42
https://github.com/llvm/llvm-project/commit/b06f62f7fc82ae464528e364119f30e9c8bbbe42
Author: Narayan <nsreekumar6 at gmail.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
A llvm/include/llvm/ABI/TargetInfo.h
M llvm/include/llvm/ABI/Types.h
M llvm/lib/ABI/CMakeLists.txt
A llvm/lib/ABI/TargetInfo.cpp
M llvm/lib/ABI/Types.cpp
Log Message:
-----------
[llvm] Introduce TargetInfo (#190730)
This PR introduces ABIInfo and TargetCodeGenInfo, the abstract ABI
lowering layer for the LLVM ABI library introduced in #158329.
This is a direct parallel to clang::ABIInfo and
clang::TargetCodeGenInfo, but operating entirely on the llvm::abi type
system rather than Clang's AST, keeping ABI logic independent of the
frontend. It is a prerequisite for implementing the target specific
lowering passes that lower FunctionInfo to LLVM IR calling conventions.
Co-authored-by: Nikita Popov <npopov at redhat.com>
Commit: a1a4da0416ad66e31d7cacda3231e4683dd026a8
https://github.com/llvm/llvm-project/commit/a1a4da0416ad66e31d7cacda3231e4683dd026a8
Author: hulxv <hulxxv at gmail.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M libc/shared/math.h
A libc/shared/math/ddivf128.h
A libc/shared/math/ddivl.h
M libc/src/__support/math/CMakeLists.txt
A libc/src/__support/math/ddivf128.h
A libc/src/__support/math/ddivl.h
M libc/src/math/generic/CMakeLists.txt
M libc/src/math/generic/ddivf128.cpp
M libc/src/math/generic/ddivl.cpp
M libc/test/shared/CMakeLists.txt
M libc/test/shared/shared_math_constexpr_test.cpp
M libc/test/shared/shared_math_test.cpp
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[libc][math] Refactor ddiv family to header-only (#182149)
Refactors the ddiv math family to be header-only.
Closes https://github.com/llvm/llvm-project/issues/182148
Target Functions:
- ddivf128
- ddivl
Commit: 8e4f0ce6985354e90caa4deed80331e34cd7fb1c
https://github.com/llvm/llvm-project/commit/8e4f0ce6985354e90caa4deed80331e34cd7fb1c
Author: Helena Kotas <hekotas at microsoft.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/lib/Sema/SemaDeclCXX.cpp
R clang/test/CodeGenHLSL/GlobalDestructors.hlsl
R clang/test/CodeGenHLSL/inline-constructors.hlsl
A clang/test/SemaHLSL/Constructors.hlsl
M clang/test/SemaHLSL/GlobalConstructors.hlsl
Log Message:
-----------
[HLSL] Remove support for user-defined constructors and destructors (#193375)
This change removes the support for user-defined constructors and
destructors.
Authored-by: Sarah Spall <sarahspall at microsoft.com>
Related to #185466
Commit: 589d337d3d442bbf77530452bd2322de73904ba1
https://github.com/llvm/llvm-project/commit/589d337d3d442bbf77530452bd2322de73904ba1
Author: Ryan Buchner <rbuchner at qti.qualcomm.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/RISCV/basic-strided-loads.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/revec-strided-load.ll
Log Message:
-----------
[SLP] Update analyzeRtStrideCandidate() to correctly handle types widen than i8 (including revectorization) (#191878)
Previously there was an implicit assumption that each input access only accessed a single byte.
Commit: b785dc42c7b1877dfae16a15ff4091b699579c8c
https://github.com/llvm/llvm-project/commit/b785dc42c7b1877dfae16a15ff4091b699579c8c
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenModule.cpp
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
A clang/test/CIR/CodeGen/no-proto-then-def.c
M clang/test/CIR/CodeGen/no-prototype.c
A clang/test/CIR/Transforms/cast-bitcast-funcptr-roundtrip-fold.cir
Log Message:
-----------
[CIR] Update uses of no-prototype GetGlobalOp (#193868)
When a no-prototype function is replaced by a proper definition, we
update uses of the previous function, mostly cir::GetGlobalOp
operations. If the result of the GetGlobalOp was being used in a store,
this was leading to verifier errors because the type being stored no
longer matched the expected type. This change fixes that by introducing
a bitcast when the GetGlobalOp is updated. It also introduces a new cast
folder to eliminate cast chains that are circular after this new bitcast
is inserted.
Assisted-by: Cursor / claude-4.7-opus-high
Commit: 3f3c26039f135688f832c1d228f20c32dca366bd
https://github.com/llvm/llvm-project/commit/3f3c26039f135688f832c1d228f20c32dca366bd
Author: Finn Plummer <mail at inbelic.dev>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M llvm/lib/Target/DirectX/DXILLegalizePass.cpp
A llvm/test/CodeGen/DirectX/legalize-switch-unreachable.ll
Log Message:
-----------
[DirectX] Resolve unreachable default branches in switch statements (#193592)
Add a legalization to resolve unreachable default branches in switch
statements. These are introduced when the
`CorrelatedValuePropagationPass` proves all cases of a switch are
covered, leaving the default as an unreachable block.
The default destination is replaced with either the common successor
block or the first switch case destination.
This was discovered from the following case:
https://godbolt.org/z/W7zE1GMT6, where we can see that the unrolling of
the outer loop is not successful and the switch statement with an
`unreachable` branch remains.
Assisted by: Claude Opus 4.6
Commit: a497f90dc0914d3cc6eb82254751115e562181ca
https://github.com/llvm/llvm-project/commit/a497f90dc0914d3cc6eb82254751115e562181ca
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M compiler-rt/lib/sanitizer_common/sanitizer_internal_defs.h
M compiler-rt/lib/ubsan_minimal/ubsan_minimal_handlers.cpp
Log Message:
-----------
[compiler-rt] Improve ubsan-minimal runtime for GPU use (#193597)
Summary:
GPUs are resource constrained, and we don't want to incur too much
overhead for using the runtime over a trap version. Unlike the other
targets, we have cheap `printf` on account of all the complexity being
done on the host, so we use that directly instead of custom formatting.
Additionally, we split the main function out into a helper function.
Listing it as `[cold]` prevents spurious inlining that massively bloated
register costs (this is an error reporting mechanism so hopefully that's
not controversial).
In practice for some basic tests, This cuts the register usage by more
than half and the stack size is no longer dynamically sized. The only
stack I saw was for the PC relative checks. This could be lowered
further with more intelligent PC caching, but this is a good, minimally
invasive, start.
Commit: f24bfb8967cb9a128ca28cb454be6883a347379a
https://github.com/llvm/llvm-project/commit/f24bfb8967cb9a128ca28cb454be6883a347379a
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRV.h
M llvm/lib/Target/SPIRV/SPIRVLegalizeImplicitBinding.cpp
A llvm/lib/Target/SPIRV/SPIRVLegalizeImplicitBinding.h
M llvm/lib/Target/SPIRV/SPIRVLegalizePointerCast.cpp
A llvm/lib/Target/SPIRV/SPIRVLegalizePointerCast.h
M llvm/lib/Target/SPIRV/SPIRVMergeRegionExitTargets.cpp
A llvm/lib/Target/SPIRV/SPIRVMergeRegionExitTargets.h
M llvm/lib/Target/SPIRV/SPIRVPassRegistry.def
M llvm/lib/Target/SPIRV/SPIRVRegularizer.cpp
A llvm/lib/Target/SPIRV/SPIRVRegularizer.h
M llvm/lib/Target/SPIRV/SPIRVTargetMachine.cpp
M llvm/test/CodeGen/SPIRV/ctor-dtor-lowering-ir.ll
M llvm/test/CodeGen/SPIRV/llc-pipeline.ll
A llvm/test/CodeGen/SPIRV/passes/SPIRVLegalizeImplicitBinding.ll
A llvm/test/CodeGen/SPIRV/passes/SPIRVLegalizePointerCast.ll
A llvm/test/CodeGen/SPIRV/passes/SPIRVMergeRegionExitTargets.ll
A llvm/test/CodeGen/SPIRV/passes/SPIRVRegularizer-i1-icmp.ll
M llvm/test/CodeGen/SPIRV/pointers/load-vector-from-array-of-vectors.ll
M llvm/test/CodeGen/SPIRV/pointers/store-array-of-vectors-to-vector.ll
Log Message:
-----------
[SPIR-V][NewPM] Register IR-level passes with the new pass manager (#193660)
Add NPM wrappers for SPIRVRegularizer, SPIRVLegalizeImplicitBinding,
SPIRVLegalizePointerCast, and SPIRVMergeRegionExitTargets
Commit: 7b336dcfce1d66c6764644698a8ac49e1fa5fe36
https://github.com/llvm/llvm-project/commit/7b336dcfce1d66c6764644698a8ac49e1fa5fe36
Author: Philip DePetro <subpremium at hotmail.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M lldb/include/lldb/API/SBExpressionOptions.h
M lldb/include/lldb/Target/Process.h
M lldb/include/lldb/Target/Target.h
M lldb/include/lldb/Target/Thread.h
M lldb/source/API/SBExpressionOptions.cpp
M lldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.cpp
M lldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.h
M lldb/source/Target/Process.cpp
M lldb/source/Target/StopInfo.cpp
M lldb/source/Target/Thread.cpp
M lldb/source/Target/ThreadPlanCallFunction.cpp
A lldb/test/API/commands/expression/expr-with-fork/Makefile
A lldb/test/API/commands/expression/expr-with-fork/TestExprWithFork.py
A lldb/test/API/commands/expression/expr-with-fork/main.cpp
Log Message:
-----------
[lldb] Allow forks to occur in expression evaluation (#184815)
@jimingham You had suggested to @clayborg that we should call DidFork(),
DidVFork() and DidVForkDone() after a corresponding stop in expression
evaluation. Those functions require parameters that are private to the
specific child StopInfo class. I went with reusing the existing
StopInfo::PerformAction() virtual function, rather than create a new one
just for this purpose.
Commit: 600efe3dd9bb8a267c8ebe9faf9a6f5f82e25831
https://github.com/llvm/llvm-project/commit/600efe3dd9bb8a267c8ebe9faf9a6f5f82e25831
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUMCInstLower.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.h
Log Message:
-----------
AMDGPU: Implement getInstSizeVerifyMode (#191461)
Replace the custom instruction size check.
Commit: a3285a1a14dbf9f5c5f013d31d9eb9c14865fc73
https://github.com/llvm/llvm-project/commit/a3285a1a14dbf9f5c5f013d31d9eb9c14865fc73
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M clang/lib/Driver/ToolChain.cpp
M clang/test/Driver/Xarch.c
Log Message:
-----------
clang: Check -Xarch compatibility using Triple parsed architecture. (#189651)
This will allow recognizing any of the triple aliases for the
architecture. This will avoid test failures when the amdgcn triple top
level architecture is renamed.
Commit: 2948f9a784e8d25793d864f8c0f4b9a151d6f771
https://github.com/llvm/llvm-project/commit/2948f9a784e8d25793d864f8c0f4b9a151d6f771
Author: Bruno Cardoso Lopes <bruno.cardoso at gmail.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIRAttrs.td
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/lib/CIR/CodeGen/CIRGenDecl.cpp
M clang/lib/CIR/CodeGen/CIRGenModule.cpp
M clang/lib/CIR/CodeGen/CIRGenModule.h
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
M clang/lib/CIR/Dialect/Transforms/CXXABILowering.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
A clang/test/CIR/CodeGen/annotate-attribute.c
A clang/test/CIR/CodeGen/annotate-attribute.cpp
A clang/test/CIR/IR/annotation.cir
A clang/test/CIR/IR/invalid-annotation.cir
Log Message:
-----------
[CIR] Add `__attribute__((annotate(...)))` support (#193329)
Implement end-to-end (Dialect, CIRGen, Lowering) support for
__attribute__((annotate(...))) on functions and global variables.
Dialect:
- cir::AnnotationAttr (#cir.annotation<name = "...", args = [...]>).
- $annotations on cir.func and cir.global (ArrayAttr of AnnotationAttr).
FuncOp gets a custom parser/printer entry; for GlobalOp it's tacked onto
the assemblyFormat.
CIRGen:
- Annotations are attached as deferred entries in CIRGenModule and
flushed at end-of-TU so the most up-to-date ValueDecl wins (decl
annotations + def annotations both stick).
- emitAnnotationArgs uniques arg ArrayAttrs via FoldingSetNodeID so two
functions with identical args share one ArrayAttr (and one .args
constant in LLVM lowering).
- addGlobalAnnotations supports both GlobalOp and FuncOp paths,
including function-local statics (emitStaticVarDecl).
Lowering:
- CXXABILowering treats AnnotationAttr as legal (no ABI conversion).
- Direct-to-LLVM lowering filters the annotations attribute off
cir.func, then collects (sym_name, AnnotationAttr, loc) tuples
pre-conversion and post-conversion emits @llvm.global.annotations plus
the supporting strings/args constants in section "llvm.metadata" —
bit-for-bit comparable to OGCG. String constants and per-arg structs are
deduplicated; identical args ArrayAttrs share one .args global (an
improvement over OGCG's per-site copies).
Commit: dc41953559a6e34e82320da93e9f2e714556aaaf
https://github.com/llvm/llvm-project/commit/dc41953559a6e34e82320da93e9f2e714556aaaf
Author: Guray Ozen <guray.ozen at gmail.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
M mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp
M mlir/test/Dialect/LLVMIR/nvvm-transcendentals.mlir
M mlir/test/Target/LLVMIR/nvvm/transcendentals.mlir
Log Message:
-----------
[MLIR][NVVM] Add `nvvm.ex2` OP (#193790)
Commit: 25ec1baf2eb92e439289d71f5c3c82e3156bdc0a
https://github.com/llvm/llvm-project/commit/25ec1baf2eb92e439289d71f5c3c82e3156bdc0a
Author: Bruno Cardoso Lopes <bruno.cardoso at gmail.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/lib/CIR/Dialect/Transforms/FlattenCFG.cpp
Log Message:
-----------
[CIR] Fix remaining (part 2) FlattenCFG rewriter contract violations (#192503)
Fix all 17 remaining MLIR expensive pattern check violations in
CIRFlattenCFGPass. Found by MLIR_ENABLE_EXPENSIVE_PATTERN_API_CHECKS=ON.
Fingerprint violations (patterns modifying IR without notifying
rewriter):
- Use rewriter.replaceAllUsesWith() instead of direct
replaceAllUsesWith() in replaceCallWithTryCall (tests: invoke-attrs.cpp,
try-catch.cpp, try-catch-all-with-cleanup.cpp)
- Use rewriter.modifyOpInPlace() for removeCleanupAttr() in TryOp
flattening (tests: flatten-try-op.cir, flatten-cleanup-scope-eh.cir,
flatten-throwing-in-cleanup.cir)
IR verification failures (invalid intermediate IR after pattern
application):
- Expand nested op checks in Switch, Loop, CleanupScope, and TryOp
flattening to include all structured CIR ops (ScopeOp, IfOp, TernaryOp,
etc.), not just CleanupScopeOp. Break/continue/return inside nested
structured ops creates invalid cross-region branches when the enclosing
op hasn't been flattened yet (tests: switch.cir, loop.cpp,
cleanup-scope-return-in-loop.cpp, partial-array-cleanup.cpp, switch.cpp,
typeid.cpp, flatten-cleanup-scope-simple.cir,
flatten-cleanup-scope-multi-exit.cir)
- Relax CIR_ResumeOp ParentOneOf to include all structured ops, since
cir.resume can temporarily appear inside them during flattening (test:
new-delete-deactivation.cpp). Feels weird to do that, but extended
documentation to account for.
- Change loop region constraints from SizedRegion<1> to
MinSizedRegion<1> for cond/step regions, since cleanup scope flattening
inside these regions may create multiple blocks (test:
loop-cond-cleanup.cpp)
Commit: 72ca372fa7c9029d2b7a77c59a4cc24530e99e43
https://github.com/llvm/llvm-project/commit/72ca372fa7c9029d2b7a77c59a4cc24530e99e43
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUMCInstLower.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.h
Log Message:
-----------
Revert "AMDGPU: Implement getInstSizeVerifyMode" (#194026)
Reverts llvm/llvm-project#191461
Fails on miscomputed V_MADMK_F32 size
Commit: ec5862a28e595c86fbc38ce73d3f698f0c8e4b36
https://github.com/llvm/llvm-project/commit/ec5862a28e595c86fbc38ce73d3f698f0c8e4b36
Author: Tom Stellard <tstellar at redhat.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M .github/workflows/issue-subscriber.yml
M .github/workflows/new-issues.yml
M .github/workflows/new-prs.yml
M .github/workflows/pr-subscriber.yml
M .github/workflows/release-asset-audit.yml
Log Message:
-----------
Re-apply: workflows: Use main-branch-only environment when using ISSUE_SUBSCRIBER_TOKEN (#179990) (#193801)
This way we can prevent the secret from being used in user branches.
We originally reverted this because it was spamming the PRs with
'deployment' messages. GitHub has added a new feature to disable these
messages, so it should be safe to re-apply this.
Commit: d4ba0194f52b41855884b00a2baddb19ebd249dd
https://github.com/llvm/llvm-project/commit/d4ba0194f52b41855884b00a2baddb19ebd249dd
Author: Max191 <44243577+Max191 at users.noreply.github.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M flang/lib/Optimizer/Transforms/StackArrays.cpp
M mlir/include/mlir/Analysis/DataFlowFramework.h
M mlir/lib/Analysis/DataFlowFramework.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUPropagateLayout.cpp
A mlir/test/Analysis/DataFlow/test-staged-analyses.mlir
M mlir/test/lib/Analysis/DataFlow/TestDeadCodeAnalysis.cpp
M mlir/test/lib/Analysis/DataFlow/TestDenseBackwardDataFlowAnalysis.cpp
M mlir/test/lib/Analysis/DataFlow/TestDenseForwardDataFlowAnalysis.cpp
M mlir/test/lib/Analysis/DataFlow/TestSparseBackwardDataFlowAnalysis.cpp
M mlir/test/lib/Analysis/TestDataFlowFramework.cpp
M mlir/tools/mlir-opt/mlir-opt.cpp
Log Message:
-----------
[mlir] Add analysis filter in dataflow solver (#192998)
Adds an optional filtering control function to the dataflow solver's
initializeAndRun callback, which controls which analyses will be
initialized when running the solver. This makes it possible to reuse
existing dataflow solver instances that have already run to a fixpoint
without re-initializing all of the analyses that have already converged.
A new analysis and test pass is also added, which illustrates how the
filtering can be useful to run a staged analysis, which would not have
been possible before. The example analysis, called `BarAnalysis`,
depends on the converged state of the `FooAnalysis`. The Bar analysis is
a forward analysis that tracks, for each program point, whether any of
the preceding program points hold a `foo_state` that is divisible by 4.
In the example test, the control flow graph looks like the following:
```
entry-block
/ \
bb0 bb2
\ /
bb1
```
The `foo_state` of `bb1` depends on the `foo_state` of `bb0` and `bb2`.
If the solver goes through `bb0->bb1` before `bb2->bb1`, then there is
an intermediate stage in the analyses where the state of `bb1` could be
divisible by 4, even though the final state of `bb1` will not be
divisible by 4 in the converged state. If the `BarAnalysis` runs on
`bb1` in this intermediate state, then it will get stuck with the
"divisible by 4" state, and the analysis will not yield the desired
results.
This PR ensures that the `BarAnalysis` will see the correct state
`foo_state`, because the `FooAnalysis` will fully run to a fixpoint
before the `BarAnalysis` is loaded, initialized, and run.
The Foo and Bar analyses are just trivial examples, but this pattern is
useful when there are analyses that can be made more effective by using
complementary analyses like integer range/divisibility analyses.
**Note for integration:**
DataFlowSolver::load now stores the concrete analysis TypeID, exposed
via DataFlowAnalysis::getTypeID(). Downstream DataFlowAnalysis
subclasses defined in anonymous namespaces must add
MLIR_DEFINE_EXPLICIT_INTERNAL_INLINE_TYPE_ID(ClassName) to their class
body.
Assisted-by: Codex (gpt-5.4)
Commit: b08ec97d37cc8df35e2f60245b49b10ddb23dcc4
https://github.com/llvm/llvm-project/commit/b08ec97d37cc8df35e2f60245b49b10ddb23dcc4
Author: Thurston Dang <thurston at google.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
A llvm/test/Transforms/LoopVectorize/extract-value-widen.ll
Log Message:
-----------
[LoopVectorize] Don't replace widen with replicate for ExtractValueInst (#193404)
VPWidenRecipe with an underlying ExtractValueInst stores the
ExtractValue's indices() as part of the recipe's "operands",
necessitating special handling (see VPRecipeBuilder::tryToWiden() and
VPWidenRecipe::execute()). This makes it incompatible with conversion to
VPReplicateRecipe, because VPReplicateRecipe's scalarizeInstruction()
may attempt to set each operand of the cloned ExtractValueInst, but the
indices cannot be set via setOperand().
This patch works around the issue by preventing the conversion of
ExtractValueInst-based VPWidenRecipe to VPReplicateRecipe.
Fixes: https://github.com/llvm/llvm-project/issues/193275
Commit: 7de8b11607bf981c146c2e4c0e4e38bde05bb539
https://github.com/llvm/llvm-project/commit/7de8b11607bf981c146c2e4c0e4e38bde05bb539
Author: Justin Fargnoli <jfargnoli at nvidia.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M llvm/include/llvm/Transforms/Utils/UnrollLoop.h
M llvm/lib/Transforms/Scalar/LoopUnrollPass.cpp
M llvm/lib/Transforms/Utils/LoopUnroll.cpp
A llvm/test/Transforms/LoopUnroll/debug-and-remarks.ll
R llvm/test/Transforms/LoopUnroll/debug.ll
Log Message:
-----------
[LoopUnroll] Make optimization remarks more precise (#190714)
This PR adopts the following strategy for emitting optimization remarks
in loop unrolling:
- Emit passing optimization remarks any time we decide to unroll.
- Only emit missed optimization remarks if the user explicitly requested
unrolling and we aren't able to honor their request.
- Only emit passing or missed optimization remarks when we're certain
that unrolling will succeed or fail.
- In lieu of emitting more informative passing/failing optimization
remarks when unrolling may still fail/pass, emit analysis optimization
remarks so users can understand the reason as to why unrolling may have
failed on that loop.
Commit: 719c38062a3b06faee91c255d2b8abc9e1dd3813
https://github.com/llvm/llvm-project/commit/719c38062a3b06faee91c255d2b8abc9e1dd3813
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M lld/test/ELF/fill-trap-ppc.s
M lld/test/ELF/fill-trap.s
Log Message:
-----------
[NFC][lld] Avoid hex address case sensitivity in fill-trap tests (#194037)
Ubuntu is switching from GNU coreutils to Rust version, and new
od util has different case in output.
https://github.com/uutils/coreutils/issues/11985
Commit: 125f69d71ad1778a811461c0bbd30f12607073e5
https://github.com/llvm/llvm-project/commit/125f69d71ad1778a811461c0bbd30f12607073e5
Author: hulxv <hulxxv at gmail.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M libc/shared/math.h
A libc/shared/math/fabs.h
A libc/shared/math/fabsbf16.h
A libc/shared/math/fabsf.h
A libc/shared/math/fabsf128.h
A libc/shared/math/fabsf16.h
A libc/shared/math/fabsl.h
M libc/src/__support/FPUtil/BasicOperations.h
M libc/src/__support/math/CMakeLists.txt
A libc/src/__support/math/fabs.h
A libc/src/__support/math/fabsbf16.h
A libc/src/__support/math/fabsf.h
A libc/src/__support/math/fabsf128.h
A libc/src/__support/math/fabsf16.h
A libc/src/__support/math/fabsl.h
M libc/src/math/generic/CMakeLists.txt
M libc/src/math/generic/fabs.cpp
M libc/src/math/generic/fabsbf16.cpp
M libc/src/math/generic/fabsf.cpp
M libc/src/math/generic/fabsf128.cpp
M libc/src/math/generic/fabsf16.cpp
M libc/src/math/generic/fabsl.cpp
M libc/test/shared/CMakeLists.txt
M libc/test/shared/shared_math_constexpr_test.cpp
M libc/test/shared/shared_math_test.cpp
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[libc][math] Refactor fabs family to header-only (#182173)
Refactors the fabs math family to be header-only.
Closes https://github.com/llvm/llvm-project/issues/182172
Target Functions:
- fabs
- fabsbf16
- fabsf
- fabsf128
- fabsf16
- fabsl
Commit: ad5a7609df9b7a67d588bb99578990e8430939f6
https://github.com/llvm/llvm-project/commit/ad5a7609df9b7a67d588bb99578990e8430939f6
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
A llvm/test/Transforms/SLPVectorizer/X86/split-node-reused-in-later-vector.ll
M llvm/test/Transforms/SLPVectorizer/X86/split-node-throttled.ll
Log Message:
-----------
[SLP]Do not cache sentinel position for SplitVectorize nodes
setInsertPointAfterBundle records LastInstructionToPos[LastInst] = Res
so later bundles reuse the sentinel as an insertion point. For a
SplitVectorize bundle this entry is stale: operand entries are
materialized lazily via recursive vectorizeTree calls and can land in
the IR after the cached sentinel. A later bundle that hits the cache
then inserts its shuffles ahead of values they consume, tripping the
verifier with "Instruction does not dominate all uses".
Fixes #193919
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/194038
Commit: 32eb90bfdf9f28a4cf11d4897e48942977fada78
https://github.com/llvm/llvm-project/commit/32eb90bfdf9f28a4cf11d4897e48942977fada78
Author: Jan Svoboda <jan_svoboda at apple.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M clang/include/clang/DependencyScanning/DependencyScanningService.h
M clang/include/clang/DependencyScanning/InProcessModuleCache.h
M clang/lib/DependencyScanning/InProcessModuleCache.cpp
M clang/lib/Serialization/ModuleCache.cpp
M clang/tools/clang-scan-deps/ClangScanDeps.cpp
M clang/tools/clang-scan-deps/Opts.td
Log Message:
-----------
[clang][deps] Keep module cache in memory (#192347)
With this PR, module cache PCMs are kept in-memory and can be flushed to
disk at the end of the build if desired. Not going to disk at all speeds
up dependency scans by around 4.7% by avoiding contention in the kernel.
Commit: f098aa3b5b58133a5db79692e1aae2a191d27c80
https://github.com/llvm/llvm-project/commit/f098aa3b5b58133a5db79692e1aae2a191d27c80
Author: Jason Molenda <jmolenda at apple.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M lldb/docs/resources/lldbgdbremote.md
M lldb/include/lldb/Target/Thread.h
M lldb/source/Plugins/DynamicLoader/MacOSX-DYLD/DynamicLoaderMacOS.cpp
M lldb/source/Plugins/DynamicLoader/MacOSX-DYLD/DynamicLoaderMacOS.h
M lldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.cpp
M lldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.h
M lldb/source/Plugins/Process/gdb-remote/ThreadGDBRemote.cpp
M lldb/source/Plugins/Process/gdb-remote/ThreadGDBRemote.h
M lldb/tools/debugserver/source/DNB.cpp
M lldb/tools/debugserver/source/DNB.h
M lldb/tools/debugserver/source/JSONGenerator.h
M lldb/tools/debugserver/source/MacOSX/MachProcess.mm
M lldb/tools/debugserver/source/MacOSX/arm64/DNBArchImplARM64.cpp
M lldb/tools/debugserver/source/RNBRemote.cpp
Log Message:
-----------
[lldb][Darwin] debugserver expedite new binary info, lldb use (#192754)
When lldb stops at the "new binaries loaded" internal breakpoint, it
must read the list of addresses of the new binaries out of process
memory, then send a jGetLoadedDynamicLibrariesInfos packet to
debugserver to get the filepath, uuid, and addresses of where all the
segments are loaded in memory.
It's possible for debugserver to find the "new binaries loaded" function
address in the inferior itself, recognize when it has stopped at a
breakpoint there, and expedite some/all of the information lldb is going
to ask for in the stop info packet that we send to lldb. This will make
big improvements to a large-batch-of-binaries loaded stop event, but
also focuses even more on the single-binary-loaded `dlopen()` use case,
which can be quite expensive when many binaries are loaded one by one.
This PR reduces the packet traffic for a new binary load notifications
by
1. When debugserver sees a thread that has hit a breakpoint, and the pc
matches the new-binaries-loaded function address, reads the list of
binaries that have been newly added and includes them in the stop info
packet (or the jThreadsInfo packet) in the `added-binaries` key. The
value is a list (array) of binary addresses.
2. If the number of binaries is small (today: one), debugserver may
collect the full information that jGetLoadedDynamicLibrariesInfos would
send back about it, and also expedite that in the stop info packet (or
jThreadsInfo) in the `detailed-binaries-info` key. This is a JSON
string, and the stop info packet is a semicolon separated series of
key-values, so it must be asciihex encoded, just like the `jstopinfo`
key. In the jThreadsInfo packet, the JSON for the binary information is
included in the response as-is as the value-dictionary.
3. If the remote stub doesn't provide these new keys, lldb will use the
same process as before. However, in
DynamicLoaderMacOS::NotifyBreakpointHit I was reading the load addresses
out of memory individually, with each binary having a 24-byte entry.
lldb's memory cache meant we read 512 bytes per 8-byte read, but when
1000 binaries were being loaded at process launch time, that was 24,000
bytes of VM that we would read in 512 byte batches. This patch changes
that to read the entire VM range that we will be accessing in one large
memory read (as large as the remote gdb RSP stub will support),
dramatically reducing packet traffic in that case.
4. debugserver needs to read the "new binaries loaded" function pointer
out of the "dyld_all_image_infos" structure in the inferior, and it is a
signed function pointer on arm64e processes, so debugserver needs to
strip off the signing bits before comparing the pc. I hoisted the strip
function out of DNBArchImplArm64 into DNBFixAddress(), and the only
complicated bit here is in DNBProcessAddrSize(), when an arm64e
debugserver is debugging an arm64_32 process on a watch. It's not a
common combination (mostly we will have arm64e debugservers debugging
arm64 processes, or arm64_32 debugservers debuggging arm64_32 processe),
but it is supported.
5. A very minor enhancement, I have debugserver now include a new key,
`sizeof_mh_and_loadcmds` in the full binary information that
jGetLoadedDynamicLibrariesInfos returns. When lldb needs to read a
binary out of memory, it needs to read the Mach-O header & load
commands, and it doesn't know the full size of that, so we end up doing
one read of the Mach-O header, then the header + load commands. I'm not
using this information in lldb yet, but I would like to, to improve
that.
At an implementation detail level, ProcessGDBRemote collects these two
new data from the stop packet / jThreadsInfo, and passes them to the
method that creates a new ThreadGDBRemote. I added two methods to the
Thread base class to retrieve the information. DynamicLoaderMacOS will
try to read the data from the thread that hit the "new binaries loaded"
breakpoint, and if the number of entries matches the number expected by
the register value, uses them. Else it falls back to fetching them the
traditional way. On an old debugserver that doesn't support these new
expedited fields, DynamicLoaderMacOS will get back a zero-length of
binary addresses and a null StructuredData dictionary for the detailed
image information, and behave as it always does. I tested this patch
with both the debugserver changes, and without.
Testing is clearly the big questionmark here - I added none. While
writing these patches, I had some bugs and the lldb testsuite on macOS
was very good at finding them, simply with our normal process launching
and dlopen'ing in our existing API tests. I could imagine a test that
would capture the packet log and try to ensure that the expedited
information is being used by lldb and we are not re-fetching the
information, though.
rdar://175033129
---------
Co-authored-by: Jonas Devlieghere <jonas at devlieghere.com>
Co-authored-by: Felipe de Azevedo Piovezan <piovezan.fpi at gmail.com>
Commit: 6fb343619009376c19953a82aa52cf293418c9eb
https://github.com/llvm/llvm-project/commit/6fb343619009376c19953a82aa52cf293418c9eb
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M llvm/include/llvm/BinaryFormat/Dwarf.h
M llvm/include/llvm/DWARFLinker/AddressesMap.h
M llvm/lib/DWARFLinker/Classic/DWARFLinker.cpp
M llvm/lib/DWARFLinker/Classic/DWARFLinkerCompileUnit.cpp
M llvm/test/tools/dsymutil/X86/tls-variable.test
Log Message:
-----------
[dsymutil] Handle DW_OP_GNU_push_tls_address in markEverythingAsKept (#193870)
markEverythingAsKept() only checked for DW_OP_form_tls_address when
deciding whether a TLS variable should be added to accelerator tables,
missing the DW_OP_GNU_push_tls_address extension. This caused TLS
variables using the GNU form to be absent from .apple_names when linking
in update mode (-u) or when processing Clang modules.
The same bug was previously fixed in getVariableRelocAdjustment()
(f9f92f13f62a) but was missed here.
rdar://120678908
Commit: 9805381e5f014ce66d6c066e095f5b554dcacb45
https://github.com/llvm/llvm-project/commit/9805381e5f014ce66d6c066e095f5b554dcacb45
Author: PiJoules <leonardchan at google.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M libc/src/__support/math_extras.h
M libc/src/__support/memory_size.h
M libc/src/search/lfind.cpp
M libc/src/search/lsearch.cpp
Log Message:
-----------
[libc] Move mul_overflow to math_extras.h (#194033)
This way downstream llvm-libc users could use this as part of
math_extras.h.
Commit: a47eca0ae99f3fa39f90acb06de0bbf86c31980e
https://github.com/llvm/llvm-project/commit/a47eca0ae99f3fa39f90acb06de0bbf86c31980e
Author: Alex Langford <alangford at apple.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M lldb/test/API/functionalities/breakpoint/same_cu_name/Makefile
Log Message:
-----------
[lldb] Rewrite make rules for TestFileBreakpointsSameCUName.py (#193871)
The logic for building the test cases did not consider the target
triple. The easiest thing to do is use the CXXFLAGS computed by
Makefile.rules (which calculates this correctly).
Commit: 83302553295529712fb999db22a7d770f18af055
https://github.com/llvm/llvm-project/commit/83302553295529712fb999db22a7d770f18af055
Author: Alex Langford <alangford at apple.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M lldb/test/API/commands/expression/ptrauth/TestPtrAuthExpressions.py
Log Message:
-----------
[lldb] Fix build logic in TestPtrAuthExpressions.py (#193847)
If the triple already has `arm64e` in it, we'll end up with `arm64ee`
which is definitely wrong.
Commit: 39e02c141d03552938d5fe35ab650bd50e2dcc80
https://github.com/llvm/llvm-project/commit/39e02c141d03552938d5fe35ab650bd50e2dcc80
Author: Kewen Meng <Kewen.Meng at amd.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M offload/plugins-nextgen/amdgpu/dynamic_hsa/hsa_ext_amd.h
M offload/plugins-nextgen/amdgpu/src/rtl.cpp
Log Message:
-----------
[Offload][AMDGPU] Use ROCr API for APU check (#193887)
Use ROCr API for checking whether a device is an APU to replace the old
implementation with hard-coded target name. This PR will make the APU
check cleaner and better maintainable.
Tested on MI210, MI300A, Strix Halo (gfx1151).
Commit: 7ec8037f32433322ad643bb54c811dd7a4f68b0c
https://github.com/llvm/llvm-project/commit/7ec8037f32433322ad643bb54c811dd7a4f68b0c
Author: Tom Stellard <tstellar at redhat.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M .github/workflows/issue-release-workflow.yml
Log Message:
-----------
workflows/issue-release-workflow: Use GitHub app for generating tokens (#193825)
This will allow us to eliminate the RELEASE_WORKFLOW_PR_CREATE secret.
Commit: ef739b97b108d81de23f9fc0f6ca6de001482164
https://github.com/llvm/llvm-project/commit/ef739b97b108d81de23f9fc0f6ca6de001482164
Author: Eric Feng <55723758+efric at users.noreply.github.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M mlir/include/mlir/Dialect/AMDGPU/IR/AMDGPUOps.td
M mlir/lib/Conversion/AMDGPUToROCDL/AMDGPUToROCDL.cpp
M mlir/lib/Dialect/AMDGPU/IR/AMDGPUOps.cpp
M mlir/test/Conversion/AMDGPUToROCDL/sparse-mfma-gfx950.mlir
M mlir/test/Dialect/AMDGPU/invalid.mlir
M mlir/test/Dialect/AMDGPU/ops.mlir
Log Message:
-----------
[AMDGPU] Correct gfx950 smfmac sparse index verifier (#193541)
Originally, the smfmac verifier expects for the sparse indices, which
describe which the positions of the non-zero elements per lane, the
following:
```
8 bit source -> require vector<2xi16>, ABID range [0, 1]
16 bit source -> require vector<4xi8>, ABID range [0, 3]
```
which is correct for CDNA3 and what was stated in the CDNA4 ISA
description as well. However, because the CDNA4 variants have double K
of the CDNA3 variants, meaning e.g, for 16 bit variants, each lane
carries 8 non-zero values rather than 4, we need 16 bit sparse indices
to express the full range of non-zero elements. This is in line with the
layout tables presented in the CDNA4 ISA.
Direct comparison for 16 bit elements:
On gfx942; we can select from one of four 8-bit sets of sparse indices
with ABID. Each set represents the location of four non-zero values per
8 following 4:2 structured sparsity. For example:
```
a0 a1 0 0 a3 a4 0 0 | a5 a6 0 0 0 0 a7 a8 | a9 0 0 a10 0 a11 0 a12 | 0 a13 0 a14 0 a15 0
```
On gfx950; because each lane carries 8 non-zero values; we can only
specify the full range of 8 non-zero values per 16 from one of two
16-bit sets. For example:
```
a0 a1 0 0 a3 a4 0 0 a5 a6 0 0 0 0 a7 a8 | a9 0 0 a10 0 a11 0 a12 0 a13 0 a14 0 a15 0
```
Similarly, for 8 bit variants on gfx950, we would need the full 32 bits
to describe the full range of the locations for the 16 non-zero 8 bit
elements. In this case, there is no option to select from different sets
of indices.
The issue arises in downstream use cases if we want to use use a set of
sparse indices targeting gfx950; because we are unable to specify the
full range of the non-zero values at the moment, we will get numerical
issues.
Assisted by: Claude
---------
Signed-off-by: Eric Feng <Eric.Feng at amd.com>
Commit: 0da7c12e43bf8b995c5fdd5e62180546fa007338
https://github.com/llvm/llvm-project/commit/0da7c12e43bf8b995c5fdd5e62180546fa007338
Author: Kartik Ohlan <kartik7ohlan at gmail.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M clang/include/clang/Basic/BuiltinsAMDGPU.td
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx12-err.cl
A clang/test/CodeGenOpenCL/builtins-amdgcn-smfmac-err.cl
Log Message:
-----------
[AMD-GPU] Fix smfmac builtin target (#193999)
Fixes #193882
For builins mentioned below, changed "mai-insts" to "gfx940-insts" so it
can match the backend isGFX940Plus predicate.
Added test coverage and kept the structure similar to
`clang/test/CodeGenOpenCL/builtins-amdgcn-smfmac-err.cl`
__builtin_amdgcn_smfmac_f32_16x16x32_f16
__builtin_amdgcn_smfmac_f32_32x32x16_f16
__builtin_amdgcn_smfmac_f32_16x16x32_bf16
__builtin_amdgcn_smfmac_f32_32x32x16_bf16
__builtin_amdgcn_smfmac_i32_16x16x64_i8
__builtin_amdgcn_smfmac_i32_32x32x32_i8
Commit: bfa88a8d3c3b8885c9e0166afb1c78ede4f24c6c
https://github.com/llvm/llvm-project/commit/bfa88a8d3c3b8885c9e0166afb1c78ede4f24c6c
Author: Hardik Chona <masterhc321 at gmail.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M libc/config/linux/x86_64/entrypoints.txt
M libc/include/wchar.yaml
M libc/src/wchar/CMakeLists.txt
A libc/src/wchar/wcscoll.cpp
A libc/src/wchar/wcscoll.h
M libc/test/src/wchar/CMakeLists.txt
A libc/test/src/wchar/wcscoll_test.cpp
Log Message:
-----------
[libc] Implement wcscoll (#192778)
_Closes #191073_
- `libc/src/wchar/wcscoll.cpp` - Implementation of wcscoll
- `libc/src/wchar/wcscoll.h` - Internal header for wcscoll
- `libc/include/wchar.yaml` - Added wcscoll to public header spec
- `libc/src/wchar/CMakeLists.txt` - Added build target for wcscoll
- `libc/config/linux/x86_64/entrypoints.txt` - Registered wcscoll
entrypoint
- `libc/test/src/wchar/wcscoll_test.cpp` - Unit tests for wcscoll
- `libc/test/src/wchar/CMakeLists.txt` - Added test target for wcscoll
Note: Locale support is not yet implemented. `wcscoll` currently behaves
identically to `wcscmp` until locale support is available in llvm-libc.
Commit: fa2588e3110f31603d92c05ee3cdfc66860f8047
https://github.com/llvm/llvm-project/commit/fa2588e3110f31603d92c05ee3cdfc66860f8047
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M llvm/lib/Transforms/Instrumentation/NumericalStabilitySanitizer.cpp
Log Message:
-----------
[NFC][NSAN] Use `getIntrinsicSignature` instead of `matchIntrinsicSignature` (#194025)
`getIntrinsicSignature` internally handles the decoding of the IIT table
and running the match, which is what this code is doing. So use that
instead of manually doing what `getIntrinsicSignature` does.
Commit: 5b570d1b3b1d525a04b0d3edbffd619510801551
https://github.com/llvm/llvm-project/commit/5b570d1b3b1d525a04b0d3edbffd619510801551
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M mlir/lib/Target/LLVMIR/Dialect/LLVMIR/LLVMToLLVMIRTranslation.cpp
Log Message:
-----------
[NFC][MLIR] Use `getIntrinsicSignature` to verify overloaded intrinsics (#194035)
`getIntrinsicSignature` internally handles the decoding of the IIT table
and running the match, which is what this code is doing. So, use that
instead of manually doing what `getIntrinsicSignature` does.
Commit: da2c4a9efe996e8a6acf02576be9b39cd69a06df
https://github.com/llvm/llvm-project/commit/da2c4a9efe996e8a6acf02576be9b39cd69a06df
Author: Eli Friedman <efriedma at qti.qualcomm.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ExprConstant.cpp
M clang/lib/CodeGen/CGExprConstant.cpp
M clang/test/AST/ByteCode/const-eval.c
Log Message:
-----------
[clang] Add constant evaluation support for CK_ToUnion. (#193370)
Implementation is heavily based on the evaluation code for initializer
lists, but it's different enough that I couldn't figure out a good way
to share the code.
This fixes one of the few remaining gaps where CodeGen can
constant-evaluate a value which AST can't evaluate.
Commit: ebbaa93e005eecf2023341d644cf8f750912e73f
https://github.com/llvm/llvm-project/commit/ebbaa93e005eecf2023341d644cf8f750912e73f
Author: Narayan <nsreekumar6 at gmail.com>
Date: 2026-04-25 (Sat, 25 Apr 2026)
Changed paths:
M llvm/include/llvm/ABI/TargetInfo.h
M llvm/lib/ABI/CMakeLists.txt
A llvm/lib/ABI/Targets/BPF.cpp
Log Message:
-----------
[llvm] Implement the BPF ABI (#194031)
Implements BPFTargetInfo, the first target-specific ABI lowering for the
LLVM ABI library introduced in #158329.
BPFTargetInfo mirrors the BPF ABI rules currently encoded in
`clang::BPFABIInfo` (clang/lib/CodeGen/Targets/BPF.cpp), but operates
entirely on `llvm::abi` types, keeping the logic frontend-independent:
- Empty aggregates and void returns are ignored
- Aggregates ≤64 bits are coerced to an aligned integer type
- Aggregates 65–128 bits are coerced to [2 x i64]
- Aggregates >128 bits and oversized _BitInt types are passed/returned
indirectly
- Promotable integers are sign/zero extended
- All aggregate returns are indirect
Also adds the `createBPFTargetInfo` factory function declaration to
TargetInfo.h.
Commit: 7ea78deff2d1eace00d113bcd4aba694e418a84c
https://github.com/llvm/llvm-project/commit/7ea78deff2d1eace00d113bcd4aba694e418a84c
Author: Tom Stellard <tstellar at redhat.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M .github/workflows/issue-release-workflow.yml
Log Message:
-----------
Revert "workflows/issue-release-workflow: Use GitHub app for generating tokens" (#194058)
Reverts llvm/llvm-project#193825
Fails due to insufficient permissions:
`
github.GithubException.GithubException: 422 {"message": "Validation
Failed", "errors": [{"resource": "PullRequest", "code": "custom",
"field": "fork_collab", "message": "fork_collab Fork collab can't be
granted by someone without permission"}], "documentation_url":
"https://docs.github.com/rest/pulls/pulls#create-a-pull-request",
"status": "422"}
`
Commit: b49855fc5684eebd47d177df1fbfbd329653bbd1
https://github.com/llvm/llvm-project/commit/b49855fc5684eebd47d177df1fbfbd329653bbd1
Author: Jun Wang <jwang_2024 at outlook.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
M llvm/test/MC/AMDGPU/gfx10_asm_mubuf.s
M llvm/test/MC/AMDGPU/gfx7_asm_mubuf.s
M llvm/test/MC/AMDGPU/gfx8_asm_mubuf.s
M llvm/test/MC/AMDGPU/gfx9_asm_mubuf.s
Log Message:
-----------
[AMDGPU][MC] Allow the nolds modifier (#185129)
Some pre-GFX11 buffer_load instructions have two variants: one
requires the lds modifier and one does not allow lds. For the latter
allow nolds to be used.
Commit: 2b43da5ac0fa4c49b7f5f443b6a3a6ffec8b7494
https://github.com/llvm/llvm-project/commit/2b43da5ac0fa4c49b7f5f443b6a3a6ffec8b7494
Author: Leonardo Román Carrillo <leonardoroman at google.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64.h
M llvm/lib/Target/AArch64/AArch64PassRegistry.def
M llvm/lib/Target/AArch64/AArch64StackTaggingPreRA.cpp
M llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
Log Message:
-----------
[NewPM] Port for AArch64StackTaggingPreRA (#194021)
This patch migrates the AArch64StackTaggingPreRA pass to the New Pass
Manager.
Following the standard pattern for pass migrations:
- The core logic has been extracted into a standalone
AArch64StackTaggingPreRAImpl class.
- A new pass manager wrapper (AArch64StackTaggingPreRAPass) has been
created.
- The legacy pass manager wrapper has been renamed to
AArch64StackTaggingPreRALegacy and updated to call the shared
implementation.
- The pass is registered in AArch64PassRegistry.def to make it available
to the New PM.
Commit: d14866f029e94f806f2bccc0c87840d950d9bd50
https://github.com/llvm/llvm-project/commit/d14866f029e94f806f2bccc0c87840d950d9bd50
Author: Peter Collingbourne <pcc at google.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M llvm/utils/gn/secondary/clang/lib/ScalableStaticAnalysisFramework/Analyses/BUILD.gn
Log Message:
-----------
gn build: Port a4538a3ad902
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/194077
Commit: d0c91de53e3b89043ea1527bb4acf24b519093e6
https://github.com/llvm/llvm-project/commit/d0c91de53e3b89043ea1527bb4acf24b519093e6
Author: Sam Elliott <aelliott at qti.qualcomm.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
A clang/test/Driver/Inputs/multilib_linux_tree/usr/bin/.keep
A clang/test/Driver/Inputs/multilib_linux_tree/usr/include/x86_64-unknown-linux-gnu/.keep
A clang/test/Driver/Inputs/multilib_linux_tree/usr/include/x86_64-unknown-linux-gnu/debug/.keep
A clang/test/Driver/Inputs/multilib_linux_tree/usr/include/x86_64-unknown-linux-gnu/noexcept/.keep
A clang/test/Driver/Inputs/multilib_linux_tree/usr/include/x86_64-unknown-linux-gnu/release/.keep
A clang/test/Driver/Inputs/multilib_mingw_tree/bin/.keep
A clang/test/Driver/Inputs/multilib_mingw_tree/include/x86_64-w64-windows-gnu/.keep
A clang/test/Driver/Inputs/multilib_mingw_tree/include/x86_64-w64-windows-gnu/debug/.keep
A clang/test/Driver/Inputs/multilib_mingw_tree/include/x86_64-w64-windows-gnu/noexcept/.keep
A clang/test/Driver/Inputs/multilib_mingw_tree/include/x86_64-w64-windows-gnu/release/.keep
M clang/test/Driver/linux-multilib.yaml
M clang/test/Driver/mingw-multilib.yaml
Log Message:
-----------
[clang][NFC] Linux/Windows Multilib Include Path Tests (#193869)
This adds checks to the tests to show how the include path is changed by
the multilib logic for Linux/Windows added in commit
78820cb91605693b7d768be4ebc8b66181d3e9c3.
Assisted By: Claude
Commit: d1c9b4a5397588bbe8260a05591faf5a661b006a
https://github.com/llvm/llvm-project/commit/d1c9b4a5397588bbe8260a05591faf5a661b006a
Author: Sang Ik Lee <sang.ik.lee at intel.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M mlir/lib/Conversion/XeVMToLLVM/XeVMToLLVM.cpp
M mlir/test/Conversion/XeVMToLLVM/xevm_mx-to-llvm.mlir
M mlir/test/Integration/Dialect/XeVM/GPU/xevm_block_scaled_dpas_bf8.mlir
Log Message:
-----------
[MLIR][XeVM] Update API usage. Some OpenCL APIs are not supported. (#193320)
In such case, use internal APIs for Intel Graphics Compiler directly.
Commit: 5536a4c7122eb799fee189139e27309efb0a6c4d
https://github.com/llvm/llvm-project/commit/5536a4c7122eb799fee189139e27309efb0a6c4d
Author: Zachary Yedidia <zyedidia at gmail.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M llvm/docs/LFI.rst
M llvm/include/llvm/MC/MCInstrDesc.h
M llvm/include/llvm/MC/MCLFIRewriter.h
M llvm/lib/MC/MCInstrDesc.cpp
M llvm/lib/MC/MCLFIRewriter.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCLFIRewriter.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCLFIRewriter.h
A llvm/test/MC/AArch64/LFI/branch.s
A llvm/test/MC/AArch64/LFI/return.s
Log Message:
-----------
[LFI][AArch64] Add rewrites for control flow (#192602)
Adds LFI rewrites for control flow instructions (indirect branches and
returns). Indirect branches must go through `x28`, which is always
guaranteed to hold a sandbox address. Modifications to `x30` must guard
`x30` afterwards, to uphold the invariant that `x30` always holds a
sandbox address. As a result, bare return instructions can be used
without any additional rewrites.
Commit: ca934b892fdd2a23de8494af702b4ab301c8a02b
https://github.com/llvm/llvm-project/commit/ca934b892fdd2a23de8494af702b4ab301c8a02b
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M llvm/include/llvm/DWARFLinker/Classic/DWARFLinker.h
M llvm/include/llvm/DWARFLinker/Classic/DWARFStreamer.h
M llvm/lib/DWARFLinker/Classic/DWARFLinker.cpp
M llvm/lib/DWARFLinker/Classic/DWARFStreamer.cpp
Log Message:
-----------
[dsymutil] Report error when section offsets exceed DWARF32 limit (#193867)
When linking very large binaries, debug section offsets can exceed the 4
GB DWARF32 limit. Previously this caused an assertion in
MCStreamer::emitIntValue when trying to emit an overflowing
DW_FORM_sec_offset value.
Detect the overflow at the point where section offsets are patched in
DWARFStreamer (for .debug_ranges, .debug_rnglists, .debug_loc,
.debug_loclists) and in DWARFLinker (for .debug_line and .debug_addr).
rdar://107413300
Commit: 327f027f108e2013ad02f5a8f345c44fca831665
https://github.com/llvm/llvm-project/commit/327f027f108e2013ad02f5a8f345c44fca831665
Author: Ivan R. Ivanov <iivanov at nvidia.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M offload/plugins-nextgen/amdgpu/src/rtl.cpp
Log Message:
-----------
[offload] Fix compilation (#194081)
Commit: e3bd61890e68303a33fdd33fbdd9abeda1037450
https://github.com/llvm/llvm-project/commit/e3bd61890e68303a33fdd33fbdd9abeda1037450
Author: gulfemsavrun <gulfem at google.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M llvm/docs/CommandGuide/llvm-profgen.rst
M llvm/docs/ReleaseNotes.md
A llvm/include/llvm/ProfileData/ETMTraceDecoder.h
M llvm/lib/ProfileData/CMakeLists.txt
A llvm/lib/ProfileData/ETMTraceDecoder.cpp
A llvm/test/tools/llvm-profgen/Inputs/etm-opencsd.yaml
A llvm/test/tools/llvm-profgen/etm-arch.test
A llvm/test/tools/llvm-profgen/etm-opencsd.test
M llvm/test/tools/llvm-profgen/lit.local.cfg
M llvm/tools/llvm-profgen/PerfReader.cpp
M llvm/tools/llvm-profgen/PerfReader.h
M llvm/tools/llvm-profgen/ProfiledBinary.cpp
M llvm/tools/llvm-profgen/ProfiledBinary.h
M llvm/tools/llvm-profgen/llvm-profgen.cpp
Log Message:
-----------
[llvm-profgen] Add support for ETM trace decoding (#191584)
This patch introduces ETMReader to llvm-profgen,
enabling the reconstruction of execution profiles from ETM formatted
trace data.
- Integrate OpenCSD (CoreSight Decoding Library) as an optional
dependency via the LLVM_ENABLE_OPENCSD flag.
- Implement ETMTraceDecoder in ProfileData to interface with OpenCSD.
- Implement ETMReader, which uses hardware configuration and ELF memory
mapping to decode instruction traces.
- Add the --etm command-line option to specify raw trace inputs.
- Add the --target-triple command-line option to override the target
architecture for the binary.
The implementation targets microcontroller-class (Cortex-M) devices
based on the binary's target triple.
RFC:
https://discourse.llvm.org/t/rfc-add-etm-trace-support-to-llvm-profgen/90525
Commit: 5064b936bec6677445b0c856371bba7c1d8af352
https://github.com/llvm/llvm-project/commit/5064b936bec6677445b0c856371bba7c1d8af352
Author: Jan Svoboda <jan_svoboda at apple.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M clang/lib/DependencyScanning/InProcessModuleCache.cpp
Log Message:
-----------
[clang][deps] Always initialize module cache out params (#194082)
We did not initialize the out parameters in #192347, causing the
"sanitizer-x86_64-linux-fast" bot to complain with:
```
SUMMARY: MemorySanitizer: use-of-uninitialized-value /home/b/sanitizer-x86_64-linux-fast/build/llvm-project/clang/lib/Frontend/CompilerInstance.cpp:1525:63 in compileModuleImpl(clang::CompilerInstance&, clang::SourceLocation, clang::SourceLocation, clang::Module*, clang::ModuleFileName)
Exiting
==clang==3084515==WARNING: MemorySanitizer: use-of-uninitialized-value
#0 0x586360f7a604 in compileModuleImpl(clang::CompilerInstance&, clang::SourceLocation, clang::SourceLocation, clang::Module*, clang::ModuleFileName) /home/b/sanitizer-x86_64-linux-fast/build/llvm-project/clang/lib/Frontend/CompilerInstance.cpp:1525:63
#1 <...>
```
This PR should fix that.
Commit: b4c1e1a14e47c383da308bcd3195b6dee9ba086e
https://github.com/llvm/llvm-project/commit/b4c1e1a14e47c383da308bcd3195b6dee9ba086e
Author: Philip Reames <listmail at philipreames.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M llvm/lib/CodeGen/PreISelIntrinsicLowering.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
M llvm/lib/CodeGen/TargetLoweringBase.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
A llvm/test/CodeGen/RISCV/rvv/fcanonicalize-sdnode.ll
A llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fcanonicalize-sdnode.ll
Log Message:
-----------
[RISCV] Expand fcanonicalize on vector types (#193842)
This change does a couple of related things:
1) It changes the default expansion strategy for scalable
vectors for fcanonicalize. This switches us from
emitting a loop (directly parallel to unrolling)
to using the already available fmul expansion.
2) Mark RISC-V legal scalable vector types as Expand
to leverage the previous item.
3) Wrap fixed vector types in their corresponding
scalable types to avoid unrolling.
The net effect is to improve the lowering for fixed vector cases and to
no longer crash for the scalable ones. We were crashing because the
scalable cases were marked Legal, not Expand. We could have just fixed that, but doing everyone at once seemed like a good investment.
Note that we can also choose to follow Aarch64 and consider a vfmin
based lowering. I left that until later thought it is worthwhile noting
that's what we do for scalar code.
Commit: ecdcd40e233bd2c9d38877ee444c6199f1885b95
https://github.com/llvm/llvm-project/commit/ecdcd40e233bd2c9d38877ee444c6199f1885b95
Author: joaosaffran <joaosaffranllvm at gmail.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M llvm/lib/Target/DirectX/DXILOpLowering.cpp
A llvm/test/CodeGen/DirectX/Metadata/dx_precise.ll
M llvm/test/CodeGen/DirectX/WaveActiveMax.ll
M llvm/test/CodeGen/DirectX/WaveActiveMin.ll
M llvm/test/CodeGen/DirectX/WaveReadLaneAt-vec.ll
M llvm/test/CodeGen/DirectX/WaveReadLaneAt.ll
Log Message:
-----------
[DirectX] Emit `dx.precise` metadata when fast math is not present (#192526)
This patch introduces the ability for DXILOpBuilder to annotate
instructions with `dx.precise` whenever fast math flags are not present.
Fix: https://github.com/llvm/llvm-project/issues/149127
Commit: ec9d7d18bdfe21c30c94c02f14f3613f7b69a17b
https://github.com/llvm/llvm-project/commit/ec9d7d18bdfe21c30c94c02f14f3613f7b69a17b
Author: gulfemsavrun <gulfem at google.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M llvm/docs/CommandGuide/llvm-profgen.rst
M llvm/docs/ReleaseNotes.md
R llvm/include/llvm/ProfileData/ETMTraceDecoder.h
M llvm/lib/ProfileData/CMakeLists.txt
R llvm/lib/ProfileData/ETMTraceDecoder.cpp
R llvm/test/tools/llvm-profgen/Inputs/etm-opencsd.yaml
R llvm/test/tools/llvm-profgen/etm-arch.test
R llvm/test/tools/llvm-profgen/etm-opencsd.test
M llvm/test/tools/llvm-profgen/lit.local.cfg
M llvm/tools/llvm-profgen/PerfReader.cpp
M llvm/tools/llvm-profgen/PerfReader.h
M llvm/tools/llvm-profgen/ProfiledBinary.cpp
M llvm/tools/llvm-profgen/ProfiledBinary.h
M llvm/tools/llvm-profgen/llvm-profgen.cpp
Log Message:
-----------
Revert "[llvm-profgen] Add support for ETM trace decoding" (#194087)
Reverts llvm/llvm-project#191584
Caused build failures in llvm-profgen:
https://lab.llvm.org/buildbot/#/builders/46/builds/34367
https://lab.llvm.org/buildbot/#/builders/10/builds/27229
Commit: e38b8da23b0bfcf0585eda4bb5e2a2b8b3bb7539
https://github.com/llvm/llvm-project/commit/e38b8da23b0bfcf0585eda4bb5e2a2b8b3bb7539
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-04-25 (Sat, 25 Apr 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
Log Message:
-----------
[RISCV][P-ext] Remove dead code from LowerOperation handling of ISD::STORE. NFC (#194088)
We rely on default type legaliation of v2i16 and v4i8 stores for RV64P.
Commit: 0c472c1401584bccc256ff0ae3763bac8ccbb76e
https://github.com/llvm/llvm-project/commit/0c472c1401584bccc256ff0ae3763bac8ccbb76e
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M lldb/source/Expression/IRMemoryMap.cpp
M lldb/unittests/Expression/IRMemoryMapTest.cpp
Log Message:
-----------
[lldb] Handle partial memory region coverage in IRMemoryMap::FindSpace (#194001)
FindSpace walks process memory regions to find addresses that won't
collide with the inferior's real memory. This is necessary even for
host-only allocations because the IR Interpreter works entirely in
inferior virtual addresses. IRMemoryMap remaps those addresses to read
from host memory instead of inferior memory, so overlapping ranges would
silently read the wrong data.
For WebAssembly, GetMemoryRegionInfo succeeds for the first region
(linear memory) but fails for addresses beyond it. The previous fix
(#193124) skipped the memory region walk entirely when `CanJIT()` is
false. However, as Jason points out, that removes the
collision-avoidance mechanism and risks overlapping with real inferior
memory.
Instead, handle the GetMemoryRegionInfo failure gracefully. If the
target can't describe memory beyond a certain point, treat the remaining
address space as unmapped and use it for the allocation. This preserves
the collision avoidance while avoiding the lldbassert.
Commit: 87317d39f44ae99a5522d00dd14f4fe58fc87a21
https://github.com/llvm/llvm-project/commit/87317d39f44ae99a5522d00dd14f4fe58fc87a21
Author: Trevor Gross <tg at trevorgross.com>
Date: 2026-04-25 (Sat, 25 Apr 2026)
Changed paths:
M compiler-rt/lib/builtins/fp_compare_impl.inc
Log Message:
-----------
[compiler-rt][WebAssembly] Use an int as CMP_RESULT (#194093)
LLVM uses an i32 as the default for `getCmpLibcallReturnType`, but
compiler-rt uses a word-sized integer by default. On most physical
hardware this happens to work because `i32` is largely ABI-compatible
with a word. On wasm64, however, they are not compatible so this causes
problems.
Resolve this by using `int` as the comparison result in compiler-rt.
Closes: https://github.com/llvm/llvm-project/issues/75302
Closes: https://github.com/llvm/llvm-project/issues/192416
Commit: 4a7ae4b900fdbc699c4aa57d4490827564f435ba
https://github.com/llvm/llvm-project/commit/4a7ae4b900fdbc699c4aa57d4490827564f435ba
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2026-04-25 (Sat, 25 Apr 2026)
Changed paths:
M llvm/lib/Transforms/IPO/LowerTypeTests.cpp
M llvm/test/Transforms/LowerTypeTests/aarch64-jumptable-dbg.ll
M llvm/test/Transforms/LowerTypeTests/x86-jumptable-dbg.ll
Log Message:
-----------
Revert "Reland: [LowerTypeTests] Add debug info to jump table entries" (#194095)
Reverts llvm/llvm-project#193670
Downstream test failure.
Commit: f478220dd06278c6ee725db710eb587ca80130d2
https://github.com/llvm/llvm-project/commit/f478220dd06278c6ee725db710eb587ca80130d2
Author: Zhaoxin Yang <yangzhaoxin at loongson.cn>
Date: 2026-04-25 (Sat, 25 Apr 2026)
Changed paths:
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/lib/Target/LoongArch/LoongArchISelLowering.h
M llvm/lib/Target/LoongArch/LoongArchLASXInstrInfo.td
M llvm/lib/Target/LoongArch/LoongArchLSXInstrInfo.td
M llvm/test/CodeGen/LoongArch/lasx/ir-instruction/fpext.ll
M llvm/test/CodeGen/LoongArch/lsx/ir-instruction/fpext.ll
Log Message:
-----------
[LoongArch] Add support for vector FP_EXTEND from vxf32 to vxf64 (#164746)
Commit: e66613f38124ff1f39132a15bfdd465f4d18ed8c
https://github.com/llvm/llvm-project/commit/e66613f38124ff1f39132a15bfdd465f4d18ed8c
Author: Fangrui Song <i at maskray.me>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M llvm/lib/Target/CSKY/CSKYInstrInfo.cpp
Log Message:
-----------
[CSKY] Fix build after #191460 (#194102)
Commit: bd1c3081172303588b576ea687a3e78f8a39a4bd
https://github.com/llvm/llvm-project/commit/bd1c3081172303588b576ea687a3e78f8a39a4bd
Author: Igor Kudrin <ikudrin at accesssoftek.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/DiagnosticFrontendKinds.td
M clang/lib/CodeGen/CodeGenModule.cpp
M clang/test/CodeGen/alias.c
M clang/test/Sema/attr-alias-elf.c
A clang/test/SemaObjC/attr-alias.m
M compiler-rt/lib/dfsan/dfsan_custom.cpp
Log Message:
-----------
[Clang][CodeGen] Report when an alias points to an incompatible target (#192397)
Add checks to ensure that an alias and its target have compatible types:
- Generate an error if a function alias points to a variable or vice
versa.
- Issue a warning for mismatches in function types.
- Ignore type discrepancies for variables.
This behavior aligns with similar diagnostics in GCC.
Resolves: #47301
Commit: 6dd373f8aaab96b293a1374d3039b3c658b292e1
https://github.com/llvm/llvm-project/commit/6dd373f8aaab96b293a1374d3039b3c658b292e1
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M compiler-rt/test/sanitizer_common/TestCases/Linux/pthread_join.cpp
Log Message:
-----------
[sanitizer] Relax pthread_join tests for different glibc versions (#194100)
New (2.43) glibc successfully joins already joined threads.
Probably result of
https://sourceware.org/git/?p=glibc.git;a=commitdiff;h=f7648bf44384118b6658ddcd741408fc4fbdd056
Commit: c3df8f8c83372a53f6949c585d1a5a03b775332c
https://github.com/llvm/llvm-project/commit/c3df8f8c83372a53f6949c585d1a5a03b775332c
Author: joaosaffran <joaosaffranllvm at gmail.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/reversebits.ll
Log Message:
-----------
[SPIRV] Add 64 bit lowering for bitreverse (#193068)
Bit reverse didn't handle 64-bit ints; this patch adds such handling.
#fix: https://github.com/llvm/llvm-project/issues/192756
Commit: 7059fc556bfe5e8787a00c47a649459c6ab1a1c6
https://github.com/llvm/llvm-project/commit/7059fc556bfe5e8787a00c47a649459c6ab1a1c6
Author: Igor Kudrin <ikudrin at accesssoftek.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/DiagnosticFrontendKinds.td
M clang/lib/CodeGen/CodeGenModule.cpp
M clang/test/CodeGen/alias.c
M clang/test/Sema/attr-alias-elf.c
R clang/test/SemaObjC/attr-alias.m
M compiler-rt/lib/dfsan/dfsan_custom.cpp
Log Message:
-----------
Revert "[Clang][CodeGen] Report when an alias points to an incompatible target" (#194106)
Reverts llvm/llvm-project#192397
Commit: 2428fbb613be0f2b4468cfa26908186e097262c7
https://github.com/llvm/llvm-project/commit/2428fbb613be0f2b4468cfa26908186e097262c7
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2026-04-25 (Sat, 25 Apr 2026)
Changed paths:
M llvm/test/Other/new-pm-thinlto-postlink-defaults.ll
M llvm/test/Other/new-pm-thinlto-postlink-pgo-defaults.ll
M llvm/test/Other/new-pm-thinlto-postlink-samplepgo-defaults.ll
M llvm/test/Other/new-pm-thinlto-prelink-defaults.ll
M llvm/test/Other/new-pm-thinlto-prelink-pgo-defaults.ll
M llvm/test/Other/new-pm-thinlto-prelink-samplepgo-defaults.ll
Log Message:
-----------
[NFC][ThinLTO] Remove JumpTableToSwitchPass from the test (#194103)
It's there from invalid conflict resolution in #193649.
Commit: 84b0809a84f4b4df18cc78e132a2588d9112ff01
https://github.com/llvm/llvm-project/commit/84b0809a84f4b4df18cc78e132a2588d9112ff01
Author: Alex MacLean <amaclean at nvidia.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h
M llvm/include/llvm/CodeGen/GlobalISel/Utils.h
M llvm/include/llvm/Target/GlobalISel/Combine.td
M llvm/lib/CodeGen/GlobalISel/CSEMIRBuilder.cpp
M llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
M llvm/lib/CodeGen/GlobalISel/Utils.cpp
A llvm/test/CodeGen/AArch64/GlobalISel/combine-constant-fold-count.mir
Log Message:
-----------
[GIsel] Add constant-folding for bit-counting ops (#194010)
Commit: 7bbfee35775e8ece4aa44e13de37a7b4f5b587fe
https://github.com/llvm/llvm-project/commit/7bbfee35775e8ece4aa44e13de37a7b4f5b587fe
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-04-25 (Sat, 25 Apr 2026)
Changed paths:
M clang/lib/AST/ByteCode/Disasm.cpp
Log Message:
-----------
[clang][bytecode][NFC] Add record/union names in Descriptor::dump() (#194002)
Commit: 5e09af5f30a7c68e9253e008a5d63691a0657108
https://github.com/llvm/llvm-project/commit/5e09af5f30a7c68e9253e008a5d63691a0657108
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-04-25 (Sat, 25 Apr 2026)
Changed paths:
M clang/lib/AST/ByteCode/Interp.h
M clang/test/AST/ByteCode/cxx23.cpp
Log Message:
-----------
[clang][bytecode] Reject inc/dec on non-numbers (#193954)
Commit: aeea3191d4162f61ea84c3be9fc3ede6a7883c91
https://github.com/llvm/llvm-project/commit/aeea3191d4162f61ea84c3be9fc3ede6a7883c91
Author: Fangrui Song <i at maskray.me>
Date: 2026-04-25 (Sat, 25 Apr 2026)
Changed paths:
M llvm/include/llvm/MC/MCContext.h
M llvm/include/llvm/MC/MCELFObjectWriter.h
M llvm/lib/MC/ELFObjectWriter.cpp
M llvm/lib/MC/MCAsmStreamer.cpp
M llvm/lib/MC/MCContext.cpp
M llvm/lib/MC/MCELFStreamer.cpp
M llvm/lib/MC/MCObjectStreamer.cpp
M llvm/lib/MC/MCWinCOFFStreamer.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64ELFStreamer.cpp
M llvm/lib/Target/SystemZ/MCTargetDesc/SystemZHLASMAsmStreamer.h
M llvm/lib/Target/X86/MCTargetDesc/X86ELFObjectWriter.cpp
M llvm/lib/Target/X86/X86MCInstLower.cpp
Log Message:
-----------
[MC] Change MCContext::getTargetOptions to return a reference. NFC (#194112)
Since #180464, MCAsmInfo stores a non-null MCTargetOptions pointer set
by
TargetRegistry::createMCAsmInfo, and MCContext's constructor asserts
that
MAI->getTargetOptions() is non-null. Return the options by reference
instead of by pointer so callers can drop the null handling.
Commit: 320a5154ecd3dea719bf1b92e9e3d3c4772c5291
https://github.com/llvm/llvm-project/commit/320a5154ecd3dea719bf1b92e9e3d3c4772c5291
Author: hev <wangrui at loongson.cn>
Date: 2026-04-25 (Sat, 25 Apr 2026)
Changed paths:
A llvm/test/CodeGen/LoongArch/lasx/srar.ll
A llvm/test/CodeGen/LoongArch/lasx/srlr.ll
A llvm/test/CodeGen/LoongArch/lsx/srar.ll
A llvm/test/CodeGen/LoongArch/lsx/srlr.ll
Log Message:
-----------
[LoongArch] Add tests for vector shift-right-and-round combines (#192920)
Commit: 3dc4fd6dd41100f051a63642f449b16324389c96
https://github.com/llvm/llvm-project/commit/3dc4fd6dd41100f051a63642f449b16324389c96
Author: cqwrteur <uwgghhbcad at gmail.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M compiler-rt/lib/sanitizer_common/sanitizer_platform_limits_posix.cpp
Log Message:
-----------
[compiler-rt][sanitizer] Remove linux/scc.h (#194116)
#194110
Linux Kernel has removed scc.h header completely from the source code
Therefore, we need to remove the usage in compiler-rt/sanitizer too.
https://github.com/torvalds/linux/commit/64edfa65062dc4509ba75978116b2f6d392346f5#diff-1ca78e598a5041ee51ae795d168435afad598b82a7a0ce80f215993589b96c7c
Without removing it, not only it breaks compiler-rt but also GCC build
since GCC always builds libsanitizer for linux targets.
After merging this we will need to cherry pick to GCC.
Commit: a693efcc40b1aff43e66802ca53c04b3e1a7f684
https://github.com/llvm/llvm-project/commit/a693efcc40b1aff43e66802ca53c04b3e1a7f684
Author: Gábor Spaits <gaborspaits1 at gmail.com>
Date: 2026-04-25 (Sat, 25 Apr 2026)
Changed paths:
M llvm/lib/Target/RISCV/CMakeLists.txt
A llvm/lib/Target/RISCV/GISel/RISCVInlineAsmLowering.cpp
A llvm/lib/Target/RISCV/GISel/RISCVInlineAsmLowering.h
M llvm/lib/Target/RISCV/RISCVSubtarget.cpp
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator-inline-asm.ll
Log Message:
-----------
[RISCV][GlobalISel] Support RISC-V specific inline asm constraints: 'I', 'J', 'K' and 'S' (#193765)
This patch implements some target-specific constraints for RISC-V: `I`,
`J`, `K` and `S`. These constraints are all for immediate values except
for `S`. The handling of these constraints is implemented with by adding
`RISCVInlineAsmLowering` subclass of `InlineAsmLowering`.
Commit: 3bbfa3e5f07adbffd9512962aade35f432edfb4e
https://github.com/llvm/llvm-project/commit/3bbfa3e5f07adbffd9512962aade35f432edfb4e
Author: hev <wangrui at loongson.cn>
Date: 2026-04-25 (Sat, 25 Apr 2026)
Changed paths:
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/lib/Target/LoongArch/LoongArchLASXInstrInfo.td
M llvm/lib/Target/LoongArch/LoongArchLSXInstrInfo.td
M llvm/test/CodeGen/LoongArch/lasx/srar.ll
M llvm/test/CodeGen/LoongArch/lasx/srlr.ll
M llvm/test/CodeGen/LoongArch/lsx/srar.ll
M llvm/test/CodeGen/LoongArch/lsx/srlr.ll
Log Message:
-----------
[LoongArch] Combine rounded vector shifts to VSRLR/VSRAR (#192921)
Add DAG combines to recognize canonical rounded shift patterns and lower
them to target-specific vector rounded shift instructions.
The combines match vector arithmetic and logical right shifts with
rounding implemented as:
```
add (srl/sra X, shift),
(and (srl X, shift-1), 1)
```
and the shift-by-1 variant:
```
add (srl/sra X, 1),
(and X, 1)
```
Additionally, handle the guarded form generated when shift may be zero:
```
vselect (setcc shift, 0, seteq),
X,
rounded_shift
```
and fold it to the corresponding rounded shift instruction.
Define new target DAG nodes VSRLR and VSRAR and add instruction
selection patterns for both LSX and LASX, including register and
immediate shift forms.
Commit: 55af9c26151bbbec2bb939e4ec9f99bb1a5389e7
https://github.com/llvm/llvm-project/commit/55af9c26151bbbec2bb939e4ec9f99bb1a5389e7
Author: hulxv <hulxxv at gmail.com>
Date: 2026-04-25 (Sat, 25 Apr 2026)
Changed paths:
M libc/shared/math.h
A libc/shared/math/dsubf128.h
A libc/shared/math/dsubl.h
M libc/src/__support/FPUtil/generic/FMA.h
M libc/src/__support/FPUtil/generic/add_sub.h
M libc/src/__support/math/CMakeLists.txt
A libc/src/__support/math/dsubf128.h
A libc/src/__support/math/dsubl.h
M libc/src/math/generic/CMakeLists.txt
M libc/src/math/generic/dsubf128.cpp
M libc/src/math/generic/dsubl.cpp
M libc/test/shared/CMakeLists.txt
M libc/test/shared/shared_math_test.cpp
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[libc][math] Refactor dsub family to header-only (#182160)
Refactors the dsub math family to be header-only.
Closes https://github.com/llvm/llvm-project/issues/182159
Target Functions:
- dsubf128
- dsubl
---------
Co-authored-by: bassiounix <muhammad.m.bassiouni at gmail.com>
Commit: 0ec82abfd2c16ba938eaa5b67b49ed0dfc3d94aa
https://github.com/llvm/llvm-project/commit/0ec82abfd2c16ba938eaa5b67b49ed0dfc3d94aa
Author: Vlad Serebrennikov <serebrennikov.vladislav at gmail.com>
Date: 2026-04-25 (Sat, 25 Apr 2026)
Changed paths:
M clang/test/CXX/drs/cwg25xx.cpp
Log Message:
-----------
[clang] Enable part of CWG2598 test in C++20 mode (#189310)
This is a small fix for `#if __cplusplus >= 202002L` condition, which
accidentally disabled this part of the test in C++20 mode.
Commit: 6443e9b8a5bcfa690d6605d990023d4ab672fe6f
https://github.com/llvm/llvm-project/commit/6443e9b8a5bcfa690d6605d990023d4ab672fe6f
Author: Vlad Serebrennikov <serebrennikov.vladislav at gmail.com>
Date: 2026-04-25 (Sat, 25 Apr 2026)
Changed paths:
M clang/test/CXX/drs/cwg16xx.cpp
M clang/test/CXX/drs/cwg18xx.cpp
M clang/www/cxx_dr_status.html
Log Message:
-----------
[clang] Tests for CWG1670 and CWG1878: `auto` in conversion functions (#187850)
This PR adds tests for
[CWG1670](https://cplusplus.github.io/CWG/issues/1670.html) "`auto` as
_conversion-type-id_" and
[CWG1878](https://cplusplus.github.io/CWG/issues/1878.html) "`operator
auto` template". The long and short of it is that placeholder type
specifier (`auto`) cannot be used to declare conversion function or
conversion function template. We've always diagnosed template case but
not non-template case.
Commit: 4ed36386a276943cfc2549fee0863a008e0d588b
https://github.com/llvm/llvm-project/commit/4ed36386a276943cfc2549fee0863a008e0d588b
Author: Maksim Ivanov <emaxx at google.com>
Date: 2026-04-25 (Sat, 25 Apr 2026)
Changed paths:
M compiler-rt/include/sanitizer/asan_interface.h
M compiler-rt/lib/asan/asan_errors.h
M compiler-rt/lib/asan/asan_interceptors_memintrinsics.h
M compiler-rt/lib/asan/asan_interface.inc
M compiler-rt/lib/asan/asan_interface_internal.h
M compiler-rt/lib/asan/asan_report.cpp
M compiler-rt/lib/asan/asan_report.h
M compiler-rt/test/asan/TestCases/debug_double_free.cpp
A compiler-rt/test/asan/TestCases/debug_invalid_pointer_pair.cpp
A compiler-rt/test/asan/TestCases/debug_memcpy_overlap.cpp
A compiler-rt/test/asan/TestCases/debug_negative_size.cpp
M compiler-rt/test/asan/TestCases/debug_report.cpp
Log Message:
-----------
[asan] API for getting multiple pointer ranges (#181446)
Add an API that, unlike __asan_get_report_address(), can return multiple
addresses and sizes. This allows a handler to inspect the source and the
destination ranges of errors that have more than one pointer involved
(e.g., memcpy-param-overlap).
Fixes #155406.
Assisted-by: Gemini
---------
Co-authored-by: Vitaly Buka <vitalybuka at google.com>
Commit: 5c73c7a3a0574ffd463da610d31d1855b6929fdf
https://github.com/llvm/llvm-project/commit/5c73c7a3a0574ffd463da610d31d1855b6929fdf
Author: Felipe de Azevedo Piovezan <fpiovezan at apple.com>
Date: 2026-04-25 (Sat, 25 Apr 2026)
Changed paths:
M lldb/docs/resources/lldbgdbremote.md
Log Message:
-----------
[lldb] Propose MultiBreakpoint extension to GDB Remote (#192910)
This describes the packet discussed in the RFC:
https://discourse.llvm.org/t/rfc-a-new-packet-to-set-remove-multiple-breakpoints/90623
The following PRs are related:
* [[lldb] Propose MultiBreakpoint extension to GDB
Remote](https://github.com/llvm/llvm-project/pull/192910)
* [[debugserver] Implement
MultiBreakpoint](https://github.com/llvm/llvm-project/pull/192914)
* [[lldb-server][NFC] Factor out code handling breakpoint
packets](https://github.com/llvm/llvm-project/pull/192915)
* [[lldb-server] Implement support for MultiBreakpoint
packet](https://github.com/llvm/llvm-project/pull/192919)
* [[lldb][GDBRemote] Parse MultiBreakpoint+
capability](https://github.com/llvm/llvm-project/pull/192962)
* [[lldb][NFC] Move BreakpointSite::IsEnabled/SetEnabled into
Process](https://github.com/llvm/llvm-project/pull/192964)
* [[lldb] Implement delayed
breakpoints](https://github.com/llvm/llvm-project/pull/192971)
* [[lldb] Override UpdateBreakpointSites in ProcessGDBRemote to use
MultiBreakpoint](https://github.com/llvm/llvm-project/pull/192988)
Commit: 61f311d93ed0542003c82ea9c75a44d753d4febd
https://github.com/llvm/llvm-project/commit/61f311d93ed0542003c82ea9c75a44d753d4febd
Author: Ben Shi <2283975856 at qq.com>
Date: 2026-04-25 (Sat, 25 Apr 2026)
Changed paths:
M llvm/lib/Target/AVR/AVRAsmPrinter.cpp
A llvm/test/CodeGen/AVR/issue-176830.ll
Log Message:
-----------
[AVR] Fix a bug in printing assembly operand with extra code (#193964)
Commit: 3e10b2fe2169227e7e8e338430a404e785e3a089
https://github.com/llvm/llvm-project/commit/3e10b2fe2169227e7e8e338430a404e785e3a089
Author: Ben Shi <2283975856 at qq.com>
Date: 2026-04-25 (Sat, 25 Apr 2026)
Changed paths:
M clang/lib/Basic/Targets/AVR.h
A clang/test/CodeGen/avr/issue-176830.c
Log Message:
-----------
[clang] Fix incorrect register information for AVR (#193940)
Commit: 2f28e1db535bddca42d0954b365a4e5f17bdf534
https://github.com/llvm/llvm-project/commit/2f28e1db535bddca42d0954b365a4e5f17bdf534
Author: Will Hawkins <hawkinsw at obs.cr>
Date: 2026-04-25 (Sat, 25 Apr 2026)
Changed paths:
M libcxx/docs/FeatureTestMacroTable.rst
M libcxx/docs/ReleaseNotes/23.rst
M libcxx/docs/Status/Cxx23Papers.csv
M libcxx/include/CMakeLists.txt
A libcxx/include/__ranges/stride_view.h
M libcxx/include/module.modulemap.in
M libcxx/include/ranges
M libcxx/include/version
M libcxx/modules/std/ranges.inc
A libcxx/test/libcxx/ranges/range.adaptors/range.stride.view/ctor.assert.pass.cpp
A libcxx/test/libcxx/ranges/range.adaptors/range.stride.view/iterator/dereference.assert.pass.cpp
A libcxx/test/libcxx/ranges/range.adaptors/range.stride.view/iterator/increment.assert.pass.cpp
A libcxx/test/libcxx/ranges/range.adaptors/range.stride.view/iterator/iterator.nodiscard.verify.cpp
A libcxx/test/libcxx/ranges/range.adaptors/range.stride.view/iterator/operator_plus_equal.assert.pass.cpp
A libcxx/test/libcxx/ranges/range.adaptors/range.stride.view/nodiscard.verify.cpp
M libcxx/test/std/language.support/support.limits/support.limits.general/ranges.version.compile.pass.cpp
M libcxx/test/std/language.support/support.limits/support.limits.general/version.version.compile.pass.cpp
A libcxx/test/std/ranges/range.adaptors/range.stride.view/adaptor.pass.cpp
A libcxx/test/std/ranges/range.adaptors/range.stride.view/base.pass.cpp
A libcxx/test/std/ranges/range.adaptors/range.stride.view/begin.pass.cpp
A libcxx/test/std/ranges/range.adaptors/range.stride.view/borrowing.compile.pass.cpp
A libcxx/test/std/ranges/range.adaptors/range.stride.view/concept.compile.pass.cpp
A libcxx/test/std/ranges/range.adaptors/range.stride.view/ctad.pass.cpp
A libcxx/test/std/ranges/range.adaptors/range.stride.view/ctor.pass.cpp
A libcxx/test/std/ranges/range.adaptors/range.stride.view/end.pass.cpp
A libcxx/test/std/ranges/range.adaptors/range.stride.view/iterator/base.pass.cpp
A libcxx/test/std/ranges/range.adaptors/range.stride.view/iterator/compare.pass.cpp
A libcxx/test/std/ranges/range.adaptors/range.stride.view/iterator/ctor.copy.pass.cpp
A libcxx/test/std/ranges/range.adaptors/range.stride.view/iterator/ctor.default.pass.cpp
A libcxx/test/std/ranges/range.adaptors/range.stride.view/iterator/decrement.pass.cpp
A libcxx/test/std/ranges/range.adaptors/range.stride.view/iterator/dereference.pass.cpp
A libcxx/test/std/ranges/range.adaptors/range.stride.view/iterator/equal.pass.cpp
A libcxx/test/std/ranges/range.adaptors/range.stride.view/iterator/increment.pass.cpp
A libcxx/test/std/ranges/range.adaptors/range.stride.view/iterator/iter_move.pass.cpp
A libcxx/test/std/ranges/range.adaptors/range.stride.view/iterator/iter_swap.pass.cpp
A libcxx/test/std/ranges/range.adaptors/range.stride.view/iterator/minus.pass.cpp
A libcxx/test/std/ranges/range.adaptors/range.stride.view/iterator/minus_equal.pass.cpp
A libcxx/test/std/ranges/range.adaptors/range.stride.view/iterator/plus.pass.cpp
A libcxx/test/std/ranges/range.adaptors/range.stride.view/iterator/plus_equal.pass.cpp
A libcxx/test/std/ranges/range.adaptors/range.stride.view/iterator/subscript.pass.cpp
A libcxx/test/std/ranges/range.adaptors/range.stride.view/iterator/types.compile.pass.cpp
A libcxx/test/std/ranges/range.adaptors/range.stride.view/size.pass.cpp
A libcxx/test/std/ranges/range.adaptors/range.stride.view/stride.pass.cpp
A libcxx/test/std/ranges/range.adaptors/range.stride.view/types.h
M libcxx/utils/generate_feature_test_macro_components.py
Log Message:
-----------
[libc++] Implement P1899 `ranges::stride_view` (#65200)
Implement `ranges::stride_view` in libc++. This PR was migrated from
Phabricator (https://reviews.llvm.org/D156924).
Closes #105198
Co-authored-by: Louis Dionne <ldionne.2 at gmail.com>
Co-authored-by: A. Jiang <de34 at live.cn>
Commit: 0ad0e899d456f824e520bfef7224a5f5bb2a7581
https://github.com/llvm/llvm-project/commit/0ad0e899d456f824e520bfef7224a5f5bb2a7581
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2026-04-25 (Sat, 25 Apr 2026)
Changed paths:
M libcxx/include/__assert
Log Message:
-----------
[libc++] Remove full header path from assertion messages (#190060)
This creates additional bloat in programs or debug info, without much
additional value beyond just the file name.
Fixes #190058
Commit: 1348766d1d686b8825bdaa2f6638c1783d76a4a7
https://github.com/llvm/llvm-project/commit/1348766d1d686b8825bdaa2f6638c1783d76a4a7
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-04-25 (Sat, 25 Apr 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/PhaseOrdering/X86/avg.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/InstructionsState-is-invalid-0.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/PR38339.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/div-like-mixed-with-undefs.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/reused-scalar-repeated-in-node.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/vectorizable-selects-uniform-cmps.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/basic-strided-loads.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/gather-insert-point-restore.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/reduced-value-repeated-and-vectorized.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/reductions.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/reordered-buildvector-scalars.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/same-node-reused.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/smin-signed-zextended.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/split-vectorize-parent-for-copyables.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/unordered-loads-operands.ll
M llvm/test/Transforms/SLPVectorizer/SystemZ/reuse-non-power-of-2-reorder.ll
M llvm/test/Transforms/SLPVectorizer/X86/PR39774.ll
M llvm/test/Transforms/SLPVectorizer/X86/PR40310.ll
M llvm/test/Transforms/SLPVectorizer/X86/deleted-inst-reduction-attempt.ll
M llvm/test/Transforms/SLPVectorizer/X86/div-possibly-extended-with-poisons.ll
M llvm/test/Transforms/SLPVectorizer/X86/external-used-across-reductions.ll
M llvm/test/Transforms/SLPVectorizer/X86/extractelements-vector-ops-shuffle.ll
M llvm/test/Transforms/SLPVectorizer/X86/extractelemets-extended-by-poison.ll
M llvm/test/Transforms/SLPVectorizer/X86/full-match-with-poison-scalar.ll
M llvm/test/Transforms/SLPVectorizer/X86/full-matched-bv-with-subvectors.ll
M llvm/test/Transforms/SLPVectorizer/X86/gather-with-cmp-user.ll
M llvm/test/Transforms/SLPVectorizer/X86/gathered-loads-non-full-reg.ll
M llvm/test/Transforms/SLPVectorizer/X86/gathered-shuffle-resized.ll
M llvm/test/Transforms/SLPVectorizer/X86/identity-match-splat-less-defined.ll
M llvm/test/Transforms/SLPVectorizer/X86/insert-subvector.ll
M llvm/test/Transforms/SLPVectorizer/X86/load-merge-inseltpoison.ll
M llvm/test/Transforms/SLPVectorizer/X86/load-merge.ll
M llvm/test/Transforms/SLPVectorizer/X86/load-partial-vector-shuffle.ll
M llvm/test/Transforms/SLPVectorizer/X86/matched-gather-part-of-combined.ll
M llvm/test/Transforms/SLPVectorizer/X86/non-power-of-2-order-detection.ll
M llvm/test/Transforms/SLPVectorizer/X86/non-power-of-2-subvectors-insert.ll
M llvm/test/Transforms/SLPVectorizer/X86/non-schedulable-before-main.ll
M llvm/test/Transforms/SLPVectorizer/X86/non-scheduled-inst-extern-use.ll
M llvm/test/Transforms/SLPVectorizer/X86/original-inst-scheduled-after-copyable.ll
M llvm/test/Transforms/SLPVectorizer/X86/parent-node-schedulable-with-multi-copyables.ll
M llvm/test/Transforms/SLPVectorizer/X86/pr47629-inseltpoison.ll
M llvm/test/Transforms/SLPVectorizer/X86/pr47629.ll
M llvm/test/Transforms/SLPVectorizer/X86/pr47642.ll
M llvm/test/Transforms/SLPVectorizer/X86/pr49081.ll
M llvm/test/Transforms/SLPVectorizer/X86/reduced-val-vectorized-in-transform.ll
M llvm/test/Transforms/SLPVectorizer/X86/reorder-reused-masked-gather.ll
M llvm/test/Transforms/SLPVectorizer/X86/reorder-reused-masked-gather2.ll
M llvm/test/Transforms/SLPVectorizer/X86/reordered-masked-loads.ll
M llvm/test/Transforms/SLPVectorizer/X86/replaced-external-in-reduction.ll
M llvm/test/Transforms/SLPVectorizer/X86/reschedule-only-scheduled.ll
M llvm/test/Transforms/SLPVectorizer/X86/resized-bv-values-non-power-of2-node.ll
M llvm/test/Transforms/SLPVectorizer/X86/reuse-extracts-in-wider-vect.ll
M llvm/test/Transforms/SLPVectorizer/X86/revec-non-power-2-to-power-2-large-vect.ll
M llvm/test/Transforms/SLPVectorizer/X86/revec-reduced-value-vectorized-later.ll
M llvm/test/Transforms/SLPVectorizer/X86/same-values-sub-node-with-poisons.ll
M llvm/test/Transforms/SLPVectorizer/X86/shl-to-add-transformation5.ll
M llvm/test/Transforms/SLPVectorizer/X86/shrink_after_reorder.ll
M llvm/test/Transforms/SLPVectorizer/X86/sin-sqrt.ll
M llvm/test/Transforms/SLPVectorizer/X86/split-vectorize-gathered-def-after-use.ll
M llvm/test/Transforms/SLPVectorizer/gathered-consecutive-loads-different-types.ll
M llvm/test/Transforms/SLPVectorizer/insertelement-across-zero.ll
M llvm/test/Transforms/SLPVectorizer/reduced-gathered-vectorized.ll
M llvm/test/Transforms/SLPVectorizer/reduction-whole-regs-loads.ll
M llvm/test/Transforms/SLPVectorizer/reorder-clustered-node.ll
M llvm/test/Transforms/SLPVectorizer/revec-shufflevector.ll
M llvm/test/Transforms/SLPVectorizer/revec.ll
M llvm/test/Transforms/SLPVectorizer/shuffle-mask-resized.ll
Log Message:
-----------
[SLP]Initial support for non-power-of-2 vectorization
Enables non-power-of-2 vectorization within the SLP tree. The root nodes
are still required to be power-of-2, will be addressed in a follow-up
patches.
Reviewers: bababuck, RKSimon, preames, hiraditya, HanKuanChen
Pull Request: https://github.com/llvm/llvm-project/pull/151530
Commit: 6f0b55ec55f3e5e1ccc0d6b0d04a307479218768
https://github.com/llvm/llvm-project/commit/6f0b55ec55f3e5e1ccc0d6b0d04a307479218768
Author: Haocong Lu <haoconglu at qq.com>
Date: 2026-04-25 (Sat, 25 Apr 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp
M clang/lib/CIR/CodeGen/CIRGenTypes.cpp
A clang/test/CIR/CodeGen/fixed-point-literal.c
Log Message:
-----------
[CIR] Upstream missing support for fixed point literal (#193445)
- Upstream CIR CodeGen for fixed point builtin types `_Fract`, `_Accum`
and `_Sat`.
- Upstream CIR CodeGen for fixed point literal
- Part of task https://github.com/llvm/llvm-project/issues/192316
Commit: ada1b812d1a099630dafdc3d1b2f4e67e7197ad3
https://github.com/llvm/llvm-project/commit/ada1b812d1a099630dafdc3d1b2f4e67e7197ad3
Author: David Green <david.green at arm.com>
Date: 2026-04-25 (Sat, 25 Apr 2026)
Changed paths:
M llvm/test/CodeGen/AArch64/arm64-vmul.ll
Log Message:
-----------
[AArch64] Addition tests for add_like Or of smlal/umlal. NFC (#194138)
Commit: f2436980771e8d5a203a6092160550f8c15664e1
https://github.com/llvm/llvm-project/commit/f2436980771e8d5a203a6092160550f8c15664e1
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-04-25 (Sat, 25 Apr 2026)
Changed paths:
M llvm/test/CodeGen/X86/dag-topological-sort.ll
Log Message:
-----------
[X86] dag-topological-sort.ll - add additional test coverage (#194135)
The PR134602 test codegen will converge after #193987
Ensure we test with -combiner-topological-sorting=false as well
Commit: fed92a3de6cefa4f1d62312aa48f494693b00c7c
https://github.com/llvm/llvm-project/commit/fed92a3de6cefa4f1d62312aa48f494693b00c7c
Author: DaniPopes <57450786+DaniPopes at users.noreply.github.com>
Date: 2026-04-25 (Sat, 25 Apr 2026)
Changed paths:
M llvm/lib/ExecutionEngine/Orc/TargetProcess/JITLoaderPerf.cpp
Log Message:
-----------
[ORC] Wrap unconditional dbgs() in LLVM_DEBUG in JITLoaderPerf (#188903)
Fixes #188900
Commit: e80d3a375447009d5498c89b23f746635d9cb351
https://github.com/llvm/llvm-project/commit/e80d3a375447009d5498c89b23f746635d9cb351
Author: David Green <david.green at arm.com>
Date: 2026-04-25 (Sat, 25 Apr 2026)
Changed paths:
A llvm/test/CodeGen/Thumb2/mve-extbuildvec.ll
Log Message:
-----------
[ARM][MVE] Add tests for sext and zext of i1 buildvector. NFC (#194141)
Commit: 44633491b77c3e053aebaba13c017b39a806b045
https://github.com/llvm/llvm-project/commit/44633491b77c3e053aebaba13c017b39a806b045
Author: Hui <hui.xie1990 at gmail.com>
Date: 2026-04-25 (Sat, 25 Apr 2026)
Changed paths:
M libcxx/include/__utility/constant_wrapper.h
M libcxx/test/libcxx/utilities/const.wrap.class/nodiscard.verify.cpp
M libcxx/test/std/utilities/const.wrap.class/call.pass.cpp
M libcxx/test/std/utilities/const.wrap.class/subscript.pass.cpp
Log Message:
-----------
[libc++] Fix constant_wrapper::operator() (#193573)
As Tomasz pointed out on mattermost,
given
```cpp
template <class T>
struct MustBeInt {
static_assert(std::same_as<T, int>);
};
struct Poison {
template <class T>
constexpr auto operator()(T) const noexcept -> MustBeInt<T> {
return {};
}
};
std::cw<Poison{}>(std::cw<5>);
```
This should work according to the wording
https://www.open-std.org/jtc1/sc22/wg21/docs/papers/2026/p3978r3.pdf
```cpp
template<class... Args>
static constexpr decltype(auto) operator()(Args&&... args) noexcept(see below);
```
```
- Let call-expr be constant_wrapper<INVOKE (value, remove_cvref_t<Args>::value...)>{} if all types
in remove_cvref_t<Args>... satisfy constexpr-param and constant_wrapper<INVOKE (value, remove_-
cvref_t<Args>::value...)> is a valid type, otherwise let call-expr be INVOKE (value, std::forward<Args>(args)...).
- Constraints: call-expr is a valid expression.
- Effects: Equivalent to: return call-expr;
- Remarks: The exception specification is equivalent to noexcept(call-expr).
```
so basically the spec says, there are two cases
- constexpr-param case
- runtime case
and if constexpr-param case works, uses it, otherwise fallback to
runtime case if it is valid, otherwise substitution error.
In this case, `std::cw<5>` satisfy `constexpr-param`, and
`constant_wrapper<Poison{}(5)>` is valid , it should just work. however,
our implementation implemented the two cases in two overload
```cpp
template <class... _Args>
requires(__constexpr_param<remove_cvref_t<_Args>> && ...)
_LIBCPP_HIDE_FROM_ABI static constexpr auto __call(_Args&&...) noexcept
-> constant_wrapper<std::invoke(value, remove_cvref_t<_Args>::value...)> {
return {};
}
template <class... _Args>
_LIBCPP_HIDE_FROM_ABI static constexpr auto
__call(_Args&&... __args) noexcept(noexcept(std::invoke(value, std::forward<_Args>(__args)...)))
-> decltype(std::invoke(value, std::forward<_Args>(__args)...)) {
return std::invoke(value, std::forward<_Args>(__args)...);
}
```
The logic is that, both overloads use return type SFINAE and the
constexpr-param case's concept is more constrained so it will be picked
first if constexpr-param case works.
However, in this example, the second overload's return type SFINAE
causes a hard error by the `static_assert` in the user code.
The fix is simply constrain the second overload and not using return
type SFINAE so it short circuits if constexpr-param case is valid.
As a drive by, removed the internal helper function and directly make
the public interface `operator()` two overloads so that we can apply
`[[nodiscard]]` on the constexpr-param case
Commit: 228fabd5be82ac15d14109b90c7ee1cd682b4254
https://github.com/llvm/llvm-project/commit/228fabd5be82ac15d14109b90c7ee1cd682b4254
Author: Brandon Wu <brandon.wu at sifive.com>
Date: 2026-04-25 (Sat, 25 Apr 2026)
Changed paths:
M clang/include/clang/AST/TypeBase.h
M clang/include/clang/Basic/RISCVVTypes.def
M clang/include/clang/Basic/riscv_vector.td
M clang/include/clang/Serialization/ASTBitCodes.h
M clang/lib/Sema/SemaRISCV.cpp
M clang/lib/Support/RISCVVIntrinsicUtils.cpp
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfofp8min/non-policy/non-overloaded/vfncvt.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfofp8min/non-policy/non-overloaded/vfncvtbf16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfofp8min/non-policy/non-overloaded/vfwcvtbf16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfofp8min/non-policy/overloaded/vfncvt.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfofp8min/non-policy/overloaded/vfncvtbf16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfofp8min/non-policy/overloaded/vfwcvtbf16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfofp8min/policy/non-overloaded/vfncvt.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfofp8min/policy/non-overloaded/vfncvtbf16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfofp8min/policy/non-overloaded/vfwcvtbf16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfofp8min/policy/overloaded/vfncvt.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfofp8min/policy/overloaded/vfncvtbf16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfofp8min/policy/overloaded/vfwcvtbf16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-handcrafted/rvv-intrinsic-datatypes.cpp
A clang/test/CodeGenCXX/riscv-mangle-rvv-vectors.cpp
M clang/test/Sema/riscv-types.c
M clang/utils/TableGen/RISCVVEmitter.cpp
Log Message:
-----------
[Clang][RISCV] Introduce OFP8(E4M3, E5M2) RISC-V vector types (#191349)
Currently there's no OFP8 scalar type supported in both clang and llvm
type system, the vector OFP8 RVV types are lowered to i8 llvm types for
now.
The reason to support only clang type is because of intrinsics
definition capability. If we make the clang type also using uint8 vector
types, it's not able to distinguish between E4M3 type and E5M2 type so
that we have to append additional type suffix to it.
intrinsic spec update pr:
https://github.com/riscv-non-isa/riscv-rvv-intrinsic-doc/pull/432
vreinterpret intrinsic PR:
https://github.com/llvm/llvm-project/pull/191626
DONT MERGE: We have to get the intrinsic spec merged first to be able to
make zvfofp8min change
Commit: 5ee6e6d5ef37b329c5693ea934f19b37936a632e
https://github.com/llvm/llvm-project/commit/5ee6e6d5ef37b329c5693ea934f19b37936a632e
Author: Rajveer Singh Bharadwaj <rajveer.developer at icloud.com>
Date: 2026-04-25 (Sat, 25 Apr 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
A llvm/test/CodeGen/AArch64/uaddlp.ll
Log Message:
-----------
[AArch64] Use `AArch64ISD::UADDLP` for manual widening adjacent arithmetic (zext/shuffle combination) (#189255)
Commit: 142a87178aa480cdf6d1c3a28a5fc3a0a4326274
https://github.com/llvm/llvm-project/commit/142a87178aa480cdf6d1c3a28a5fc3a0a4326274
Author: David Green <david.green at arm.com>
Date: 2026-04-25 (Sat, 25 Apr 2026)
Changed paths:
M llvm/lib/Target/ARM/ARMISelLowering.cpp
M llvm/test/CodeGen/Thumb2/mve-extbuildvec.ll
Log Message:
-----------
[ARM][MVE] Transform sext and zext of i1 buildvector (#192519)
This helps by avoiding the difficult predicate generation in scalar, using
natural extends to all-zero or all-ones in scalar as opposed to re-extending
them in vector registers.
Commit: 8cd9673451a814b871fc3d2a3023dd1decc8bab3
https://github.com/llvm/llvm-project/commit/8cd9673451a814b871fc3d2a3023dd1decc8bab3
Author: Ben Shi <2283975856 at qq.com>
Date: 2026-04-25 (Sat, 25 Apr 2026)
Changed paths:
M llvm/lib/Target/AVR/AVRISelLowering.cpp
M llvm/lib/Target/AVR/AVRInstrInfo.td
A llvm/test/CodeGen/AVR/issue-104032.ll
Log Message:
-----------
[AVR] Fix allocating DREGS (#193908)
Commit: 22a2ff741827f3b6b538b63eddce20dcd50900c5
https://github.com/llvm/llvm-project/commit/22a2ff741827f3b6b538b63eddce20dcd50900c5
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-04-25 (Sat, 25 Apr 2026)
Changed paths:
A llvm/test/Transforms/SLPVectorizer/X86/non-vectorizable-call-operand.ll
Log Message:
-----------
[SLP][NFC]Add a test with non-vectorizable functions/intrinsics, but vectorizable operands
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/194143
Commit: 7dff689a58c31600ae6062679b5434edbd65dcdc
https://github.com/llvm/llvm-project/commit/7dff689a58c31600ae6062679b5434edbd65dcdc
Author: David Green <david.green at arm.com>
Date: 2026-04-25 (Sat, 25 Apr 2026)
Changed paths:
M llvm/include/llvm/Target/GlobalISel/Combine.td
Log Message:
-----------
[GlobalISel] Remove duplicate patterns. NFC (#194131)
This looks like a merge conflict from #194010 cause a duplicate line to
appear, causing warning about constant_fold_cast_op and fabs_fneg_fold
being used multiple times.
Commit: 65b9755fd555e84b758e49d01c6a1e6d7fe63947
https://github.com/llvm/llvm-project/commit/65b9755fd555e84b758e49d01c6a1e6d7fe63947
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-04-25 (Sat, 25 Apr 2026)
Changed paths:
M llvm/test/CodeGen/WebAssembly/strided-int-mac.ll
Log Message:
-----------
[NFC][WebAssembly] strided-int-mac.ll - regenerate test checks (#194146)
Use update_llc_test_checks regeneration
Commit: 2a54476802e65d7aabd74c2967e3f48030423c81
https://github.com/llvm/llvm-project/commit/2a54476802e65d7aabd74c2967e3f48030423c81
Author: Akimasa Watanuki <mencotton0410 at gmail.com>
Date: 2026-04-25 (Sat, 25 Apr 2026)
Changed paths:
M clang/test/lit.cfg.py
Log Message:
-----------
[clang][lit] Substitute cir-opt when CIR is enabled (#194129)
Fix the CIR lit substitution introduced by #193665 to use `cir-opt`.
Commit: cabe29eb6e0760bee7be4b31968a0e1bbb32f51a
https://github.com/llvm/llvm-project/commit/cabe29eb6e0760bee7be4b31968a0e1bbb32f51a
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2026-04-25 (Sat, 25 Apr 2026)
Changed paths:
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/check-omp-structure.h
A flang/test/Semantics/OpenMP/branching-program-unit.f90
Log Message:
-----------
[flang][OpenMP] Clear branch labels in all program units (#194152)
The semantic check for branching in or out of an OpenMP construct did
not reset its label information in some cases, leading to false positive
error messages in valid Fortran code.
Commit: 355125414194a56bb09d4f405bb58d612f061194
https://github.com/llvm/llvm-project/commit/355125414194a56bb09d4f405bb58d612f061194
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-04-25 (Sat, 25 Apr 2026)
Changed paths:
R llvm/test/Transforms/SLPVectorizer/X86/non-vectorizable-call-operand.ll
A llvm/test/Transforms/SLPVectorizer/X86/non-vectorizable-inst-operand.ll
Log Message:
-----------
[SLP][NFC]Rename test, add other non-vectorizable inst candidates tests, NFC
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/194153
Commit: 4b87091acf019ea915c08da77701cc9beaba78f4
https://github.com/llvm/llvm-project/commit/4b87091acf019ea915c08da77701cc9beaba78f4
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-04-25 (Sat, 25 Apr 2026)
Changed paths:
M llvm/include/llvm/IR/IRBuilder.h
M llvm/lib/Transforms/Utils/ScalarEvolutionExpander.cpp
M llvm/test/CodeGen/AArch64/sink-and-fold.ll
M llvm/test/Transforms/LoopIdiom/expand-scev-expand-simplifications.ll
M llvm/test/Transforms/LoopStrengthReduce/depth-limit-overrun.ll
M llvm/test/Transforms/LoopStrengthReduce/lsr-rewrite-to-add-one.ll
M llvm/test/Transforms/LoopStrengthReduce/wrong-hoisting-iv.ll
M llvm/test/Transforms/LoopVectorize/AArch64/epilog-vectorization-factors.ll
M llvm/test/Transforms/LoopVectorize/epilog-vectorization-reductions.ll
M llvm/test/Transforms/LoopVectorize/version-stride-with-integer-casts.ll
M polly/lib/CodeGen/IslNodeBuilder.cpp
Log Message:
-----------
[SCEVExp] Use Builder.CreateBinOp in InsertBinOp. (#154148)
SCEVExpander's builder already uses InstSimplifyFolder. Use it to
construct binary ops via CreateBinOp instead of BinaryOperator::Create.
This helps to simplify away a few more instructions during SCEV
expansion.
PR: https://github.com/llvm/llvm-project/pull/154148
Commit: b1763ea1ecc08c4e07aaf1eded89014c59bed593
https://github.com/llvm/llvm-project/commit/b1763ea1ecc08c4e07aaf1eded89014c59bed593
Author: Luke Lau <luke at igalia.com>
Date: 2026-04-25 (Sat, 25 Apr 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.h
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fptrunc-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfptrunc-vp.ll
Log Message:
-----------
[RISCV] Remove codegen for vp_fp_round, vp_fp_extend (#193219)
Part of the work to remove trivial VP intrinsics from the RISC-V
backend, see
https://discourse.llvm.org/t/rfc-remove-codegen-support-for-trivial-vp-intrinsics-in-the-risc-v-backend/87999
This splits off 2 intrinsics from #179622. vp.fpext was previously
expanded in #190589, we only need to expand vp.fptrunc in this PR.
Commit: fad60465ce22a921237fc8ae223680d11e381532
https://github.com/llvm/llvm-project/commit/fad60465ce22a921237fc8ae223680d11e381532
Author: Luke Lau <luke at igalia.com>
Date: 2026-04-25 (Sat, 25 Apr 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vmul-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vshl-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vsra-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vsrl-vp.ll
M llvm/test/CodeGen/RISCV/rvv/sink-splat-operands.ll
M llvm/test/CodeGen/RISCV/rvv/undef-vp-ops.ll
M llvm/test/CodeGen/RISCV/rvv/vnsra-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vnsrl-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vp-vaaddu.ll
M llvm/test/CodeGen/RISCV/rvv/vshl-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vsra-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vsrl-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vwsll-vp.ll
Log Message:
-----------
[RISCV] Expand vp.shl, vp.lshr, vp.ashr (#193603)
Part of the work to remove trivial VP intrinsics from the RISC-V
backend, see
https://discourse.llvm.org/t/rfc-remove-codegen-support-for-trivial-vp-intrinsics-in-the-risc-v-backend/87999
This splits off 3 intrinsics from #179622. The codegen is left in for
now as other places can generate those nodes. performVP_TRUNCATECombine
needs to be updated to match the plain non-VP node when forming vaaddu.
Commit: 6855d70d0153bc1b238a781db0211bdb581cfa4a
https://github.com/llvm/llvm-project/commit/6855d70d0153bc1b238a781db0211bdb581cfa4a
Author: Sirui Mu <msrlancern at gmail.com>
Date: 2026-04-26 (Sun, 26 Apr 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenAtomic.cpp
M clang/lib/CIR/CodeGen/CIRGenExpr.cpp
M clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
M clang/test/CIR/CodeGen/atomic.c
Log Message:
-----------
[CIR] Add support for atomic-to-non-atomic cast (#193784)
This patch adds support for atomic-to-non-atomic casts in CIR.
Related to #192319 .
Assisted-by: Github Copilot / GPT-5.4
Commit: 109f2a2856972a68890168fd434f92b95083b4b5
https://github.com/llvm/llvm-project/commit/109f2a2856972a68890168fd434f92b95083b4b5
Author: Matthias Springer <me at m-sp.org>
Date: 2026-04-25 (Sat, 25 Apr 2026)
Changed paths:
M mlir/include/mlir/Dialect/Math/IR/MathBase.td
M mlir/include/mlir/Dialect/Math/IR/MathOps.td
M mlir/lib/Conversion/MathToLLVM/MathToLLVM.cpp
M mlir/test/Conversion/MathToLLVM/math-to-llvm.mlir
M mlir/test/Dialect/Math/ops.mlir
Log Message:
-----------
[mlir][math] Add rounding modes to `math.fma` (#192839)
Rounding modes have recently been added for `arith` FP operations
(#188458). This commit adds rounding modes to `math.fma`, following the
same design as for `arith` FP operations.
If a rounding mode is present, the LLVM lowering produces
`llvm.intr.experimental.constrained.fma`.
In the absence of a rounding mode, the rounding behavior is deferred to
the target backend.
Assisted-by: claude-opus-4.7-thinking-high
Commit: 1d14d8597df8cc5b71312c01b4c961427b6fd85f
https://github.com/llvm/llvm-project/commit/1d14d8597df8cc5b71312c01b4c961427b6fd85f
Author: A. Jiang <de34 at live.cn>
Date: 2026-04-26 (Sun, 26 Apr 2026)
Changed paths:
M libcxx/docs/FeatureTestMacroTable.rst
M libcxx/docs/ReleaseNotes/23.rst
M libcxx/docs/Status/Cxx2cPapers.csv
M libcxx/include/span
M libcxx/include/version
M libcxx/test/std/containers/views/views.span/span.cons/array.pass.cpp
R libcxx/test/std/containers/views/views.span/span.cons/initializer_list.assert.pass.cpp
M libcxx/test/std/containers/views/views.span/span.cons/initializer_list.pass.cpp
R libcxx/test/std/containers/views/views.span/span.cons/initializer_list.verify.cpp
M libcxx/test/std/containers/views/views.span/span.cons/iterator_len.verify.cpp
M libcxx/test/std/language.support/support.limits/support.limits.general/span.version.compile.pass.cpp
M libcxx/test/std/language.support/support.limits/support.limits.general/version.version.compile.pass.cpp
M libcxx/utils/generate_feature_test_macro_components.py
Log Message:
-----------
[libc++] P4144R1: Remove `span`'s `initializer_list` constructor for C++26 (#191428)
Reverts P2447R6 (implemented in
dbbeee6b8357c5a68543f612f3b2b607f1911b4c). Some test cases that indicate
"old" behavior mentioned in P2447R6 are kept.
Commit: 0eae5cf6ccad7b132bfe69d980df7053764c0845
https://github.com/llvm/llvm-project/commit/0eae5cf6ccad7b132bfe69d980df7053764c0845
Author: Luke Lau <luke at igalia.com>
Date: 2026-04-25 (Sat, 25 Apr 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.h
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-peephole-vmerge-vops.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-setcc-int-vp-mask.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-setcc-int-vp.ll
M llvm/test/CodeGen/RISCV/rvv/setcc-int-vp-mask.ll
M llvm/test/CodeGen/RISCV/rvv/setcc-int-vp.ll
M llvm/test/CodeGen/RISCV/rvv/sink-splat-operands.ll
Log Message:
-----------
[RISCV] Remove codegen for vp.icmp (#193606)
Part of the work to remove trivial VP intrinsics from the RISC-V
backend, see
https://discourse.llvm.org/t/rfc-remove-codegen-support-for-trivial-vp-intrinsics-in-the-risc-v-backend/87999
This splits off vp.icmp from #179622
Commit: 764e10c042db3c8ea1696b087bd3ca9ffad4a677
https://github.com/llvm/llvm-project/commit/764e10c042db3c8ea1696b087bd3ca9ffad4a677
Author: Anshul Nigham <nigham at google.com>
Date: 2026-04-25 (Sat, 25 Apr 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64.h
M llvm/lib/Target/AArch64/AArch64PassRegistry.def
M llvm/lib/Target/AArch64/AArch64SIMDInstrOpt.cpp
M llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
Log Message:
-----------
[NewPM] Adds a port for AArch64SIMDInstrOpt (#188177)
Adds a port for AArch64SIMDInstrOpt
- Refactored to extract base logic as Impl.
- **Note**: Moved theI nstruction Replacement Table and cross-function
cached maps as members of the Impl class.
- **Note**: Updated `InstReplInfo::RC` to be a pointer rather than a
stack object, because we're putting it into MRI
[here](https://github.com/llvm/llvm-project/blob/704c60fe9110256d2698d8e56b8c44ec5d1e733f/llvm/lib/Target/AArch64/AArch64SIMDInstrOpt.cpp#L532).
- Renamed existing pass with "Legacy" suffix and updated references
- Added NewPM pass AArch64SIMDInstrOptPass
- Updated pass type to `aarch64-simd-instr-opt` (prev:
`aarch64-simdinstr-opt`)
No existing `.mir` tests to update.
Commit: 8e3fa9514d6f2d241b7b015f031768bcf7108556
https://github.com/llvm/llvm-project/commit/8e3fa9514d6f2d241b7b015f031768bcf7108556
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2026-04-25 (Sat, 25 Apr 2026)
Changed paths:
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/check-omp-structure.h
Log Message:
-----------
[flang][OpenMP] Replace llvmOmpClause with llvm::omp::Clause (#194162)
Both types, llvmOmpClause (alias of const llvm::omp::Clause) and
llvm::omp::Clause are in use, let's just stick with one.
Commit: 6de092dca37864cd70b55bfeaba1ec24c4382a60
https://github.com/llvm/llvm-project/commit/6de092dca37864cd70b55bfeaba1ec24c4382a60
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-04-25 (Sat, 25 Apr 2026)
Changed paths:
M clang/lib/AST/ByteCode/Interp.h
M clang/lib/AST/ByteCode/Pointer.h
M clang/test/AST/ByteCode/c.c
Log Message:
-----------
[clang][bytecode] Fix crash involving labels and null sub (#194115)
For null pointers, getDeclDesc() may return null, so we can't call
asExpr() on it.
Commit: 8b1d6244de714df1288c611fa245fdc168f5bd8a
https://github.com/llvm/llvm-project/commit/8b1d6244de714df1288c611fa245fdc168f5bd8a
Author: Lucas Chollet <lucas.chollet at serenityos.org>
Date: 2026-04-25 (Sat, 25 Apr 2026)
Changed paths:
A clang/test/Driver/Inputs/empty_tree/.keep
A clang/test/Driver/Inputs/serenity_tree/usr/lib/crtbeginS.o
A clang/test/Driver/Inputs/serenity_tree/usr/lib/crtendS.o
M clang/test/Driver/serenity.cpp
Log Message:
-----------
[clang] Make serenity.cpp more independent of the host (#193981)
Tests matching crt files previously relied on the host system not using
the same file paths as Serenity. This breaks on AIX, as both systems use
`/usr/lib/crt0.o`.
Redirect most tests to an empty sysroot so they match only on the
filename and remain independent of the host system. Also add a test that
verifies crt files can be found in a normal sysroot.
Commit: 548207463a0cbd84624f56092f65ef281764120e
https://github.com/llvm/llvm-project/commit/548207463a0cbd84624f56092f65ef281764120e
Author: Nico Weber <thakis at chromium.org>
Date: 2026-04-25 (Sat, 25 Apr 2026)
Changed paths:
M llvm/utils/gn/secondary/libcxx/include/BUILD.gn
Log Message:
-----------
[gn build] Port 2f28e1db535b (#194165)
Commit: c34d43d4a601eba58317f7e23791668e0803ce6b
https://github.com/llvm/llvm-project/commit/c34d43d4a601eba58317f7e23791668e0803ce6b
Author: Nico Weber <thakis at chromium.org>
Date: 2026-04-25 (Sat, 25 Apr 2026)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/Target/RISCV/BUILD.gn
Log Message:
-----------
[gn build] Port a693efcc40b1 (#194166)
Commit: 87673e4f585738b56ee1743e1a6b55826f8c200f
https://github.com/llvm/llvm-project/commit/87673e4f585738b56ee1743e1a6b55826f8c200f
Author: Nico Weber <thakis at chromium.org>
Date: 2026-04-25 (Sat, 25 Apr 2026)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/CodeGen/BUILD.gn
Log Message:
-----------
[gn build] Port c59c19bf5921 (#194167)
Commit: 93317d19ad94eccdd96bee886d745fbfab6daf60
https://github.com/llvm/llvm-project/commit/93317d19ad94eccdd96bee886d745fbfab6daf60
Author: Rishi Khare <rishiskhare at gmail.com>
Date: 2026-04-25 (Sat, 25 Apr 2026)
Changed paths:
M llvm/lib/Transforms/IPO/Inliner.cpp
Log Message:
-----------
Fix typo in comment in Inliner.cpp (#194172)
Commit: bb1f8229e618c5a3363546613e07ae3fbeef741a
https://github.com/llvm/llvm-project/commit/bb1f8229e618c5a3363546613e07ae3fbeef741a
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-04-25 (Sat, 25 Apr 2026)
Changed paths:
M .github/workflows/containers/github-action-ci-windows/Dockerfile
M .github/workflows/containers/github-action-ci/Dockerfile
Log Message:
-----------
[Github] Bump CI containers to 22.1.4 (#194175)
Commit: e19f36ff8189f1bd6d3b214d2c30ab8ef0639678
https://github.com/llvm/llvm-project/commit/e19f36ff8189f1bd6d3b214d2c30ab8ef0639678
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-04-25 (Sat, 25 Apr 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/PhaseOrdering/X86/avg.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/InstructionsState-is-invalid-0.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/PR38339.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/div-like-mixed-with-undefs.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/reused-scalar-repeated-in-node.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/vectorizable-selects-uniform-cmps.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/basic-strided-loads.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/gather-insert-point-restore.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/reduced-value-repeated-and-vectorized.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/reductions.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/reordered-buildvector-scalars.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/same-node-reused.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/smin-signed-zextended.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/split-vectorize-parent-for-copyables.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/unordered-loads-operands.ll
M llvm/test/Transforms/SLPVectorizer/SystemZ/reuse-non-power-of-2-reorder.ll
M llvm/test/Transforms/SLPVectorizer/X86/PR39774.ll
M llvm/test/Transforms/SLPVectorizer/X86/PR40310.ll
M llvm/test/Transforms/SLPVectorizer/X86/deleted-inst-reduction-attempt.ll
M llvm/test/Transforms/SLPVectorizer/X86/div-possibly-extended-with-poisons.ll
M llvm/test/Transforms/SLPVectorizer/X86/external-used-across-reductions.ll
M llvm/test/Transforms/SLPVectorizer/X86/extractelements-vector-ops-shuffle.ll
M llvm/test/Transforms/SLPVectorizer/X86/extractelemets-extended-by-poison.ll
M llvm/test/Transforms/SLPVectorizer/X86/full-match-with-poison-scalar.ll
M llvm/test/Transforms/SLPVectorizer/X86/full-matched-bv-with-subvectors.ll
M llvm/test/Transforms/SLPVectorizer/X86/gather-with-cmp-user.ll
M llvm/test/Transforms/SLPVectorizer/X86/gathered-loads-non-full-reg.ll
M llvm/test/Transforms/SLPVectorizer/X86/gathered-shuffle-resized.ll
M llvm/test/Transforms/SLPVectorizer/X86/identity-match-splat-less-defined.ll
M llvm/test/Transforms/SLPVectorizer/X86/insert-subvector.ll
M llvm/test/Transforms/SLPVectorizer/X86/load-merge-inseltpoison.ll
M llvm/test/Transforms/SLPVectorizer/X86/load-merge.ll
M llvm/test/Transforms/SLPVectorizer/X86/load-partial-vector-shuffle.ll
M llvm/test/Transforms/SLPVectorizer/X86/matched-gather-part-of-combined.ll
M llvm/test/Transforms/SLPVectorizer/X86/non-power-of-2-order-detection.ll
M llvm/test/Transforms/SLPVectorizer/X86/non-power-of-2-subvectors-insert.ll
M llvm/test/Transforms/SLPVectorizer/X86/non-schedulable-before-main.ll
M llvm/test/Transforms/SLPVectorizer/X86/non-scheduled-inst-extern-use.ll
M llvm/test/Transforms/SLPVectorizer/X86/original-inst-scheduled-after-copyable.ll
M llvm/test/Transforms/SLPVectorizer/X86/parent-node-schedulable-with-multi-copyables.ll
M llvm/test/Transforms/SLPVectorizer/X86/pr47629-inseltpoison.ll
M llvm/test/Transforms/SLPVectorizer/X86/pr47629.ll
M llvm/test/Transforms/SLPVectorizer/X86/pr47642.ll
M llvm/test/Transforms/SLPVectorizer/X86/pr49081.ll
M llvm/test/Transforms/SLPVectorizer/X86/reduced-val-vectorized-in-transform.ll
M llvm/test/Transforms/SLPVectorizer/X86/reorder-reused-masked-gather.ll
M llvm/test/Transforms/SLPVectorizer/X86/reorder-reused-masked-gather2.ll
M llvm/test/Transforms/SLPVectorizer/X86/reordered-masked-loads.ll
M llvm/test/Transforms/SLPVectorizer/X86/replaced-external-in-reduction.ll
M llvm/test/Transforms/SLPVectorizer/X86/reschedule-only-scheduled.ll
M llvm/test/Transforms/SLPVectorizer/X86/resized-bv-values-non-power-of2-node.ll
M llvm/test/Transforms/SLPVectorizer/X86/reuse-extracts-in-wider-vect.ll
M llvm/test/Transforms/SLPVectorizer/X86/revec-non-power-2-to-power-2-large-vect.ll
M llvm/test/Transforms/SLPVectorizer/X86/revec-reduced-value-vectorized-later.ll
M llvm/test/Transforms/SLPVectorizer/X86/same-values-sub-node-with-poisons.ll
M llvm/test/Transforms/SLPVectorizer/X86/shl-to-add-transformation5.ll
M llvm/test/Transforms/SLPVectorizer/X86/shrink_after_reorder.ll
M llvm/test/Transforms/SLPVectorizer/X86/sin-sqrt.ll
M llvm/test/Transforms/SLPVectorizer/X86/split-vectorize-gathered-def-after-use.ll
M llvm/test/Transforms/SLPVectorizer/gathered-consecutive-loads-different-types.ll
M llvm/test/Transforms/SLPVectorizer/insertelement-across-zero.ll
M llvm/test/Transforms/SLPVectorizer/reduced-gathered-vectorized.ll
M llvm/test/Transforms/SLPVectorizer/reduction-whole-regs-loads.ll
M llvm/test/Transforms/SLPVectorizer/reorder-clustered-node.ll
M llvm/test/Transforms/SLPVectorizer/revec-shufflevector.ll
M llvm/test/Transforms/SLPVectorizer/revec.ll
M llvm/test/Transforms/SLPVectorizer/shuffle-mask-resized.ll
Log Message:
-----------
Revert "[SLP]Initial support for non-power-of-2 vectorization"
This reverts commit 1348766d1d686b8825bdaa2f6638c1783d76a4a7 to fix
a crash, reported in https://github.com/llvm/llvm-project/pull/151530#pullrequestreview-4176091133
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/194177
Commit: d36e5246866e6cf7ab2152770e43164157f78aff
https://github.com/llvm/llvm-project/commit/d36e5246866e6cf7ab2152770e43164157f78aff
Author: Anshul Nigham <nigham at google.com>
Date: 2026-04-25 (Sat, 25 Apr 2026)
Changed paths:
A llvm/include/llvm/CodeGen/KCFI.h
M llvm/include/llvm/InitializePasses.h
M llvm/include/llvm/Passes/MachinePassRegistry.def
M llvm/lib/CodeGen/KCFI.cpp
M llvm/lib/Passes/PassBuilder.cpp
M llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
M llvm/lib/Target/ARM/ARMTargetMachine.cpp
M llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
M llvm/lib/Target/X86/X86CodeGenPassBuilder.cpp
M llvm/lib/Target/X86/X86TargetMachine.cpp
M llvm/test/CodeGen/X86/kcfi-arity.ll
M llvm/test/CodeGen/X86/kcfi.ll
M llvm/test/CodeGen/X86/llc-pipeline-npm.ll
Log Message:
-----------
[NewPM] Adds a port for KCFI (#194163)
Standard porting w/ refactored pass logic to support old and new PMs.
Wired in to X86 pass builder.
Commit: d62067abc261f1c3e282ee434f3a1887ccf98308
https://github.com/llvm/llvm-project/commit/d62067abc261f1c3e282ee434f3a1887ccf98308
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-04-25 (Sat, 25 Apr 2026)
Changed paths:
M .github/workflows/containers/libc/Dockerfile
Log Message:
-----------
[Github] Drop LLVM 21 installation from libc Dockerfile (#194178)
The compiler version was bumped in
8abce0a63c10124aa26a070ead80a68f705c95f9, so we no longer need to
include this. We should probably just hash pin the version in future
workflows for future toolchain upgrades.
Commit: 28de393b6412f4149a25029f4201dc7ebdb3c9f4
https://github.com/llvm/llvm-project/commit/28de393b6412f4149a25029f4201dc7ebdb3c9f4
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-04-25 (Sat, 25 Apr 2026)
Changed paths:
M compiler-rt/test/profile/instrprof-tmpdir.c
Log Message:
-----------
[Profile] Reenable instrprof-tmpdir.c (#194181)
env -u is supported by the internal shell which is now the default
everywhere.
Commit: 8eef5077b646a2d24fe65fa8d0092a87c4cd0e2d
https://github.com/llvm/llvm-project/commit/8eef5077b646a2d24fe65fa8d0092a87c4cd0e2d
Author: Ramkumar Ramachandra <artagnon at tenstorrent.com>
Date: 2026-04-25 (Sat, 25 Apr 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanUtils.cpp
M llvm/lib/Transforms/Vectorize/VPlanUtils.h
Log Message:
-----------
[VPlan] Fix assert in finding WideCanIV (NFC) (#193269)
addActiveLaneMask asserts that the return value of a find_if is
contextully convertible to true, when finding a WideCanonicalIV recipe:
what it should really be checking that the iterator is not the end
iterator. Fix this assert by introducing and using a variant of
vputils::findUserOf.
Commit: b5ac484470b9ceda96addcbc946f9ded4c5ef972
https://github.com/llvm/llvm-project/commit/b5ac484470b9ceda96addcbc946f9ded4c5ef972
Author: Davide Grohmann <davide.grohmann at arm.com>
Date: 2026-04-25 (Sat, 25 Apr 2026)
Changed paths:
M llvm/include/llvm/ADT/DenseMap.h
Log Message:
-----------
[DenseMap] Resolves asan + msvc build syntax errors (#193695)
The problem was introduced by #183457 as an asan workaround for clang
builds to silence false positices, so the fix here just enables the
workaround for clang builds.
Fixes #189323
Signed-off-by: Davide Grohmann <davide.grohmann at arm.com>
Commit: bbd4d67f0ba75ce0cf20bc9a91ea632ebbb59636
https://github.com/llvm/llvm-project/commit/bbd4d67f0ba75ce0cf20bc9a91ea632ebbb59636
Author: hulxv <hulxxv at gmail.com>
Date: 2026-04-26 (Sun, 26 Apr 2026)
Changed paths:
M libc/shared/math.h
A libc/shared/math/fdiv.h
A libc/shared/math/fdivf128.h
A libc/shared/math/fdivl.h
M libc/src/__support/math/CMakeLists.txt
A libc/src/__support/math/fdiv.h
A libc/src/__support/math/fdivf128.h
A libc/src/__support/math/fdivl.h
M libc/src/math/generic/CMakeLists.txt
M libc/src/math/generic/fdiv.cpp
M libc/src/math/generic/fdivf128.cpp
M libc/src/math/generic/fdivl.cpp
M libc/test/shared/CMakeLists.txt
M libc/test/shared/shared_math_constexpr_test.cpp
M libc/test/shared/shared_math_test.cpp
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[libc][math] Refactor fdiv family to header-only (#182192)
Refactors the fdiv math family to be header-only.
Closes https://github.com/llvm/llvm-project/issues/182191
Target Functions:
- fdiv
- fdivf128
- fdivl
---------
Co-authored-by: Muhammad Bassiouni <60100307+bassiounix at users.noreply.github.com>
Commit: 23cc957f50710b431854e5281a434fcdc419c284
https://github.com/llvm/llvm-project/commit/23cc957f50710b431854e5281a434fcdc419c284
Author: hulxv <hulxxv at gmail.com>
Date: 2026-04-25 (Sat, 25 Apr 2026)
Changed paths:
M libc/shared/math.h
A libc/shared/math/fmaximum_mag_num.h
A libc/shared/math/fmaximum_mag_numbf16.h
A libc/shared/math/fmaximum_mag_numf.h
M libc/src/__support/FPUtil/BasicOperations.h
M libc/src/__support/math/CMakeLists.txt
A libc/src/__support/math/fmaximum_mag_num.h
A libc/src/__support/math/fmaximum_mag_numbf16.h
A libc/src/__support/math/fmaximum_mag_numf.h
M libc/src/math/generic/CMakeLists.txt
M libc/src/math/generic/fmaximum_mag_num.cpp
M libc/src/math/generic/fmaximum_mag_numbf16.cpp
M libc/src/math/generic/fmaximum_mag_numf.cpp
M libc/test/shared/CMakeLists.txt
M libc/test/shared/shared_math_constexpr_test.cpp
M libc/test/shared/shared_math_test.cpp
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[libc][math] Refactor fmaximum_mag_num family to header-only (#182169)
Refactors the fmaximum_mag_num math family to be header-only.
Closes https://github.com/llvm/llvm-project/issues/182168
Target Functions:
- fmaximum_mag_num
- fmaximum_mag_numbf16
- fmaximum_mag_numf
---------
Co-authored-by: Muhammad Bassiouni <60100307+bassiounix at users.noreply.github.com>
Commit: fc99b677598162682f845d31fa3ece5ec9d38b2f
https://github.com/llvm/llvm-project/commit/fc99b677598162682f845d31fa3ece5ec9d38b2f
Author: Muhammad Bassiouni <60100307+bassiounix at users.noreply.github.com>
Date: 2026-04-26 (Sun, 26 Apr 2026)
Changed paths:
M libc/shared/math.h
R libc/shared/math/fmaximum_mag_num.h
R libc/shared/math/fmaximum_mag_numbf16.h
R libc/shared/math/fmaximum_mag_numf.h
M libc/src/__support/FPUtil/BasicOperations.h
M libc/src/__support/math/CMakeLists.txt
R libc/src/__support/math/fmaximum_mag_num.h
R libc/src/__support/math/fmaximum_mag_numbf16.h
R libc/src/__support/math/fmaximum_mag_numf.h
M libc/src/math/generic/CMakeLists.txt
M libc/src/math/generic/fmaximum_mag_num.cpp
M libc/src/math/generic/fmaximum_mag_numbf16.cpp
M libc/src/math/generic/fmaximum_mag_numf.cpp
M libc/test/shared/CMakeLists.txt
M libc/test/shared/shared_math_constexpr_test.cpp
M libc/test/shared/shared_math_test.cpp
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
Revert "[libc][math] Refactor fmaximum_mag_num family to header-only" (#194183)
Reverts llvm/llvm-project#182169
Commit: cb9b66cb610797051fa5310c70ec6cf1ef55a5d6
https://github.com/llvm/llvm-project/commit/cb9b66cb610797051fa5310c70ec6cf1ef55a5d6
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-04-25 (Sat, 25 Apr 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/PhaseOrdering/X86/avg.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/InstructionsState-is-invalid-0.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/PR38339.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/div-like-mixed-with-undefs.ll
A llvm/test/Transforms/SLPVectorizer/AArch64/long-non-power-of-2.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/reused-scalar-repeated-in-node.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/vectorizable-selects-uniform-cmps.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/basic-strided-loads.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/gather-insert-point-restore.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/reduced-value-repeated-and-vectorized.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/reductions.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/reordered-buildvector-scalars.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/same-node-reused.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/smin-signed-zextended.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/split-vectorize-parent-for-copyables.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/unordered-loads-operands.ll
M llvm/test/Transforms/SLPVectorizer/SystemZ/reuse-non-power-of-2-reorder.ll
M llvm/test/Transforms/SLPVectorizer/X86/PR39774.ll
M llvm/test/Transforms/SLPVectorizer/X86/PR40310.ll
M llvm/test/Transforms/SLPVectorizer/X86/deleted-inst-reduction-attempt.ll
M llvm/test/Transforms/SLPVectorizer/X86/div-possibly-extended-with-poisons.ll
M llvm/test/Transforms/SLPVectorizer/X86/external-used-across-reductions.ll
M llvm/test/Transforms/SLPVectorizer/X86/extractelements-vector-ops-shuffle.ll
M llvm/test/Transforms/SLPVectorizer/X86/extractelemets-extended-by-poison.ll
M llvm/test/Transforms/SLPVectorizer/X86/full-match-with-poison-scalar.ll
M llvm/test/Transforms/SLPVectorizer/X86/full-matched-bv-with-subvectors.ll
M llvm/test/Transforms/SLPVectorizer/X86/gather-with-cmp-user.ll
M llvm/test/Transforms/SLPVectorizer/X86/gathered-loads-non-full-reg.ll
M llvm/test/Transforms/SLPVectorizer/X86/gathered-shuffle-resized.ll
M llvm/test/Transforms/SLPVectorizer/X86/identity-match-splat-less-defined.ll
M llvm/test/Transforms/SLPVectorizer/X86/insert-subvector.ll
M llvm/test/Transforms/SLPVectorizer/X86/load-merge-inseltpoison.ll
M llvm/test/Transforms/SLPVectorizer/X86/load-merge.ll
M llvm/test/Transforms/SLPVectorizer/X86/load-partial-vector-shuffle.ll
M llvm/test/Transforms/SLPVectorizer/X86/matched-gather-part-of-combined.ll
M llvm/test/Transforms/SLPVectorizer/X86/non-power-of-2-order-detection.ll
M llvm/test/Transforms/SLPVectorizer/X86/non-power-of-2-subvectors-insert.ll
M llvm/test/Transforms/SLPVectorizer/X86/non-schedulable-before-main.ll
M llvm/test/Transforms/SLPVectorizer/X86/non-scheduled-inst-extern-use.ll
M llvm/test/Transforms/SLPVectorizer/X86/original-inst-scheduled-after-copyable.ll
M llvm/test/Transforms/SLPVectorizer/X86/parent-node-schedulable-with-multi-copyables.ll
M llvm/test/Transforms/SLPVectorizer/X86/pr47629-inseltpoison.ll
M llvm/test/Transforms/SLPVectorizer/X86/pr47629.ll
M llvm/test/Transforms/SLPVectorizer/X86/pr47642.ll
M llvm/test/Transforms/SLPVectorizer/X86/pr49081.ll
M llvm/test/Transforms/SLPVectorizer/X86/reduced-val-vectorized-in-transform.ll
M llvm/test/Transforms/SLPVectorizer/X86/reorder-reused-masked-gather.ll
M llvm/test/Transforms/SLPVectorizer/X86/reorder-reused-masked-gather2.ll
M llvm/test/Transforms/SLPVectorizer/X86/reordered-masked-loads.ll
M llvm/test/Transforms/SLPVectorizer/X86/replaced-external-in-reduction.ll
M llvm/test/Transforms/SLPVectorizer/X86/reschedule-only-scheduled.ll
M llvm/test/Transforms/SLPVectorizer/X86/resized-bv-values-non-power-of2-node.ll
M llvm/test/Transforms/SLPVectorizer/X86/reuse-extracts-in-wider-vect.ll
M llvm/test/Transforms/SLPVectorizer/X86/revec-non-power-2-to-power-2-large-vect.ll
M llvm/test/Transforms/SLPVectorizer/X86/revec-reduced-value-vectorized-later.ll
M llvm/test/Transforms/SLPVectorizer/X86/same-values-sub-node-with-poisons.ll
M llvm/test/Transforms/SLPVectorizer/X86/shl-to-add-transformation5.ll
M llvm/test/Transforms/SLPVectorizer/X86/shrink_after_reorder.ll
M llvm/test/Transforms/SLPVectorizer/X86/sin-sqrt.ll
M llvm/test/Transforms/SLPVectorizer/X86/split-vectorize-gathered-def-after-use.ll
M llvm/test/Transforms/SLPVectorizer/gathered-consecutive-loads-different-types.ll
M llvm/test/Transforms/SLPVectorizer/insertelement-across-zero.ll
M llvm/test/Transforms/SLPVectorizer/reduced-gathered-vectorized.ll
M llvm/test/Transforms/SLPVectorizer/reduction-whole-regs-loads.ll
M llvm/test/Transforms/SLPVectorizer/reorder-clustered-node.ll
M llvm/test/Transforms/SLPVectorizer/revec-shufflevector.ll
M llvm/test/Transforms/SLPVectorizer/revec.ll
M llvm/test/Transforms/SLPVectorizer/shuffle-mask-resized.ll
Log Message:
-----------
[SLP]Initial support for non-power-of-2 vectorization
Enables non-power-of-2 vectorization within the SLP tree. The root nodes
are still required to be power-of-2, will be addressed in a follow-up
patches.
Recommit after revert in e19f36ff8189f1bd6d3b214d2c30ab8ef0639678
Original Pull Request: https://github.com/llvm/llvm-project/pull/151530
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/194189
Commit: cd2cf7393f7f58828350db35f790a0902dc6fbe7
https://github.com/llvm/llvm-project/commit/cd2cf7393f7f58828350db35f790a0902dc6fbe7
Author: Amir Ayupov <aaupov at fb.com>
Date: 2026-04-25 (Sat, 25 Apr 2026)
Changed paths:
M bolt/include/bolt/Profile/DataAggregator.h
M bolt/unittests/Profile/DataAggregator.cpp
Log Message:
-----------
[BOLT] Add unit tests for pre-aggregated profile parsing (#192390)
Add PreAggregatedTestHelper fixture with friend access to DataAggregator
internals. Add tests for parseHexField and all pre-aggregated entry
types (B, F, f, r, T, R).
Commit: 46154fef0e481640950601c4a599b6d32b2a8e87
https://github.com/llvm/llvm-project/commit/46154fef0e481640950601c4a599b6d32b2a8e87
Author: Amir Ayupov <aaupov at fb.com>
Date: 2026-04-25 (Sat, 25 Apr 2026)
Changed paths:
M bolt/docs/profiles.md
M bolt/lib/Profile/DataAggregator.cpp
M bolt/lib/Profile/DataReader.cpp
M bolt/unittests/Profile/DataAggregator.cpp
Log Message:
-----------
[BOLT] Support negative hex in pre-aggregated profile (#192391)
Handle signed values in parseHexField by falling back to int64_t parsing
when uint64_t fails. This allows pre-aggregated profile tools to use -1
for BR_ONLY, -2 for FT_EXTERNAL_ORIGIN, -3 for FT_EXTERNAL_RETURN.
Guard the external address reset loop in parseAggregatedLBREntry to
preserve sentinel values (offsets >= FT_EXTERNAL_RETURN).
Add tests for -1/-2/-3 in parseHexField and T entries with -1,
ffffffffffffffff, and buildid:-1 as BR_ONLY.
Commit: 24f46293b02c1599ac53170820772b59c635fed3
https://github.com/llvm/llvm-project/commit/24f46293b02c1599ac53170820772b59c635fed3
Author: Dave Lee <davelee.com at gmail.com>
Date: 2026-04-25 (Sat, 25 Apr 2026)
Changed paths:
M lldb/test/API/commands/thread/backtrace/TestThreadBacktraceRepeat.py
Log Message:
-----------
[lldb][test] Use assertIn in TestThreadBacktraceRepeat.py (NFC) (#194193)
I broke this test locally, and fixed the assets to produce more useful
output upon failure.
Commit: 71816ef062df569c4a0e99204ab79a283bf1dda7
https://github.com/llvm/llvm-project/commit/71816ef062df569c4a0e99204ab79a283bf1dda7
Author: Kiriti Ponduri <123718855+udaykiriti at users.noreply.github.com>
Date: 2026-04-26 (Sun, 26 Apr 2026)
Changed paths:
M libc/src/__support/FPUtil/BasicOperations.h
M libc/src/__support/FPUtil/generic/add_sub.h
M libc/src/__support/math/fdim.h
M libc/src/__support/math/fdimbf16.h
M libc/src/__support/math/fdimf.h
M libc/src/__support/math/fdimf128.h
M libc/src/__support/math/fdimf16.h
M libc/src/__support/math/fdiml.h
M libc/test/shared/CMakeLists.txt
M libc/test/shared/shared_math_constexpr_test.cpp
Log Message:
-----------
[libc][math] Qualify fdim funtions to constexpr (#194137)
Signed-off-by: udaykiriti <udaykiriti624 at gmail.com>
Co-authored-by: Muhammad Bassiouni <60100307+bassiounix at users.noreply.github.com>
Commit: 75b450f3d45b84306747025378e1797e9514dc03
https://github.com/llvm/llvm-project/commit/75b450f3d45b84306747025378e1797e9514dc03
Author: Amir Ayupov <aaupov at fb.com>
Date: 2026-04-25 (Sat, 25 Apr 2026)
Changed paths:
A bolt/test/X86/Inputs/pre-aggregated-bad-hex.txt
A bolt/test/X86/Inputs/pre-aggregated-bad-type.txt
A bolt/test/X86/pre-aggregated-records.s
Log Message:
-----------
[BOLT] Add tests for pre-aggregated parsing (#193843)
Extends e2e coverage of pre-aggregated profile parsing to match the
unit-test coverage added in #192390:
- R (Return) records, including the branch=0 fallback path that
rewrites to the FT_EXTERNAL_RETURN sentinel.
- r (FT_EXTERNAL_RETURN) records.
- B and T records using the negative -1 hex form (#192391),
which is parsed as the BR_ONLY/FT_ONLY sentinel.
- Error paths: invalid record type letter and malformed hex address
(perf2bolt is expected to exit non-zero with a parser error).
The two error-path inputs are tiny raw files under Inputs/ since they
contain intentionally malformed records that link_fdata doesn't process.
Test Plan:
added bolt/test/X86/pre-aggregated-records.s
Commit: de7c63ed04363c0ab416b982a6c900720575b439
https://github.com/llvm/llvm-project/commit/de7c63ed04363c0ab416b982a6c900720575b439
Author: Amir Ayupov <aaupov at fb.com>
Date: 2026-04-25 (Sat, 25 Apr 2026)
Changed paths:
M llvm/tools/llvm-profgen/Options.h
M llvm/tools/llvm-profgen/PerfReader.cpp
M llvm/tools/llvm-profgen/ProfileGenerator.cpp
Log Message:
-----------
[llvm-profgen] Add --time-profgen (#191930)
Add `NamedRegionTimer`s to main profgen phases:
- Parse and aggregate trace (`parseAndAggregateTrace`)
- Unwind samples (`unwindSamples`)
- Generate profile (`ProfileGenerator::generateProfile`)
- Generate CS profile (`CSProfileGenerator::generateProfile`)
Test Plan:
```
$ llvm-profgen --time-profgen ...
===-------------------------------------------------------------------------===
llvm-profgen
===-------------------------------------------------------------------------===
Total Execution Time: 2826.6549 seconds (2873.3410 wall clock)
---User Time--- --System Time-- --User+System-- ---Wall Time--- --- Name ---
1059.4929 ( 38.1%) 8.5146 ( 17.3%) 1068.0075 ( 37.8%) 1090.6604 ( 38.0%) Generate CS profile
892.6504 ( 32.1%) 39.8720 ( 80.9%) 932.5224 ( 33.0%) 950.7938 ( 33.1%) Parse and aggregate trace
825.2141 ( 29.7%) 0.9110 ( 1.8%) 826.1250 ( 29.2%) 831.8868 ( 29.0%) Unwind samples
2777.3573 (100.0%) 49.2975 (100.0%) 2826.6549 (100.0%) 2873.3410 (100.0%) Total
```
Commit: 4c7dc9c1783fa10e5e99e28ed25103a046c02c7d
https://github.com/llvm/llvm-project/commit/4c7dc9c1783fa10e5e99e28ed25103a046c02c7d
Author: hulxv <hulxxv at gmail.com>
Date: 2026-04-26 (Sun, 26 Apr 2026)
Changed paths:
M libc/shared/math.h
A libc/shared/math/fmaximum_mag_num.h
A libc/shared/math/fmaximum_mag_numbf16.h
A libc/shared/math/fmaximum_mag_numf.h
M libc/src/__support/FPUtil/BasicOperations.h
M libc/src/__support/math/CMakeLists.txt
A libc/src/__support/math/fmaximum_mag_num.h
A libc/src/__support/math/fmaximum_mag_numbf16.h
A libc/src/__support/math/fmaximum_mag_numf.h
M libc/src/math/generic/CMakeLists.txt
M libc/src/math/generic/fmaximum_mag_num.cpp
M libc/src/math/generic/fmaximum_mag_numbf16.cpp
M libc/src/math/generic/fmaximum_mag_numf.cpp
M libc/test/shared/CMakeLists.txt
M libc/test/shared/shared_math_constexpr_test.cpp
M libc/test/shared/shared_math_test.cpp
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
Reland "[libc][math] Refactor fmaximum_mag_num family to header-only" (#194194)
Reland #182169
---------
Co-authored-by: Muhammad Bassiouni <60100307+bassiounix at users.noreply.github.com>
Commit: b5471cc17a03e2f42a01ed4f124fdca481f6cc7d
https://github.com/llvm/llvm-project/commit/b5471cc17a03e2f42a01ed4f124fdca481f6cc7d
Author: Fangrui Song <i at maskray.me>
Date: 2026-04-25 (Sat, 25 Apr 2026)
Changed paths:
M llvm/lib/MC/MCObjectStreamer.cpp
M llvm/test/MC/AsmParser/directive_fill.s
Log Message:
-----------
[MC] Always lower .fill to MCFillFragment (#194164)
Constant-count, constant-pattern .fill expands inline into the current
fragment via emitIntValue per byte, wasting both memory and time (a
redundant copy at MCAssembler.cpp). #50974 reports a 4s compile dropping
to 0.6s when the loop is removed.
Drop the inline path so .fill always becomes MCFillFragment.
This cannot be done before commit 507efbcce03d (2023) allowed
label differences to be separated by a MCFillFragment.
In directive_fill.s, the parse time warning is now diagnosed by
MCAssembler.
Commit: 486e97a19f8fd34ce29e12a9de6e7033e93998d8
https://github.com/llvm/llvm-project/commit/486e97a19f8fd34ce29e12a9de6e7033e93998d8
Author: 🍌Shawn <m18824909883 at 163.com>
Date: 2026-04-26 (Sun, 26 Apr 2026)
Changed paths:
M clang/include/clang/Sema/Initialization.h
Log Message:
-----------
[clang][NFC] Fix typo in HLSL initialization comment (#194124)
Commit: b614c152def35fe4411208570327b81ce43e8ba5
https://github.com/llvm/llvm-project/commit/b614c152def35fe4411208570327b81ce43e8ba5
Author: Fangrui Song <i at maskray.me>
Date: 2026-04-26 (Sun, 26 Apr 2026)
Changed paths:
M clang/lib/Parse/ParseStmtAsm.cpp
M clang/tools/driver/cc1as_main.cpp
M llvm/include/llvm/MC/MCParser/MCTargetAsmParser.h
M llvm/include/llvm/MC/TargetRegistry.h
M llvm/lib/CodeGen/AsmPrinter/AsmPrinterInlineAsm.cpp
M llvm/lib/MC/MCParser/MCTargetAsmParser.cpp
M llvm/lib/Object/ModuleSymbolTable.cpp
M llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
M llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
M llvm/lib/Target/AVR/AsmParser/AVRAsmParser.cpp
M llvm/lib/Target/BPF/AsmParser/BPFAsmParser.cpp
M llvm/lib/Target/CSKY/AsmParser/CSKYAsmParser.cpp
M llvm/lib/Target/Hexagon/AsmParser/HexagonAsmParser.cpp
M llvm/lib/Target/Lanai/AsmParser/LanaiAsmParser.cpp
M llvm/lib/Target/LoongArch/AsmParser/LoongArchAsmParser.cpp
M llvm/lib/Target/M68k/AsmParser/M68kAsmParser.cpp
M llvm/lib/Target/MSP430/AsmParser/MSP430AsmParser.cpp
M llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
M llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp
M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
M llvm/lib/Target/Sparc/AsmParser/SparcAsmParser.cpp
M llvm/lib/Target/SystemZ/AsmParser/SystemZAsmParser.cpp
M llvm/lib/Target/VE/AsmParser/VEAsmParser.cpp
M llvm/lib/Target/WebAssembly/AsmParser/WebAssemblyAsmParser.cpp
M llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
M llvm/lib/Target/Xtensa/AsmParser/XtensaAsmParser.cpp
M llvm/tools/llvm-exegesis/lib/SnippetFile.cpp
M llvm/tools/llvm-mc-assemble-fuzzer/llvm-mc-assemble-fuzzer.cpp
M llvm/tools/llvm-mc/llvm-mc.cpp
M llvm/tools/llvm-mca/CodeRegionGenerator.cpp
M llvm/tools/llvm-ml/llvm-ml.cpp
M llvm/unittests/MC/SystemZ/SystemZAsmLexerTest.cpp
M mlir/lib/Target/LLVM/ROCDL/Target.cpp
Log Message:
-----------
[MC] Drop MCTargetOptions parameter from MCTargetAsmParser (#194120)
Since #180464, MCAsmInfo holds the canonical MCTargetOptions.
The MCTargetAsmParser::MCOptions member is a redundant by-value copy,
which may have inconsistent values (llvm-exegesis passes a temporary
MCTargetOptions(), but this probably doesn't matter in practice; other
in-tree uses are correct).
Remove the field in favor of getParser().getContext().getTargetOptions,
and remove the MCTargetOptions parameter from the base ctor, all
subclass ctors, Target::createMCAsmParser, MCAsmParserCtorTy, and
RegisterMCAsmParser.
Commit: 0ccb181514cda5245ed031b210a2d97282bc1ff0
https://github.com/llvm/llvm-project/commit/0ccb181514cda5245ed031b210a2d97282bc1ff0
Author: Matt Turner <mattst88 at gmail.com>
Date: 2026-04-25 (Sat, 25 Apr 2026)
Changed paths:
M compiler-rt/lib/sanitizer_common/sanitizer_redefine_builtins.h
Log Message:
-----------
[compiler-rt] Use asm .set only for Hexagon (#194160)
Two incompatible assembler syntaxes exist for symbol assignment:
```
sym = val -- accepted by most GNU assembler targets; rejected by
Hexagon, which interprets it as a mnemonic
.set sym, val -- accepted by Hexagon; rejected by Alpha, which
reserves .set for assembler mode flags
```
Switch all to `sym = val`, and opt out Hexagon to `.set sym`.
Fixes: dbb03f8f606e ("[compiler-rt] Replace assignment w/.set directive
(#107667)")
---------
Co-authored-by: Vitaly Buka <vitalybuka at google.com>
Commit: e7164d42243b8cac55c6c1f91a507608c414c361
https://github.com/llvm/llvm-project/commit/e7164d42243b8cac55c6c1f91a507608c414c361
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-04-25 (Sat, 25 Apr 2026)
Changed paths:
M libclc/CMakeLists.txt
Log Message:
-----------
[libclc] Only check the triple architecture for libclc (#194149)
Summary:
Previously, `nvptx64--` would reject `nvptx64-unknown-unknown`. Two
options, either normalize all the triples in CMake, or just check the
architecture. I went with the former because it makes it easier for
people to pass different values.
Commit: a75e6a59ede46e838e9a02bafe59aa9eb4c1ac60
https://github.com/llvm/llvm-project/commit/a75e6a59ede46e838e9a02bafe59aa9eb4c1ac60
Author: Nishant Patel <nishant.b.patel at intel.com>
Date: 2026-04-25 (Sat, 25 Apr 2026)
Changed paths:
M mlir/include/mlir/Dialect/XeGPU/IR/XeGPUOps.td
M mlir/include/mlir/Dialect/XeGPU/IR/XeGPUTypes.td
M mlir/lib/Conversion/XeGPUToXeVM/XeGPUToXeVM.cpp
M mlir/lib/Dialect/XeGPU/IR/XeGPUOps.cpp
M mlir/lib/Dialect/XeGPU/TransformOps/XeGPUTransformOps.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUBlocking.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUPropagateLayout.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUSubgroupDistribute.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUUnroll.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUWgToSgDistribute.cpp
M mlir/test/Dialect/XeGPU/invalid.mlir
M mlir/test/Dialect/XeGPU/layout.mlir
M mlir/test/Dialect/XeGPU/ops.mlir
M mlir/test/Dialect/XeGPU/propagate-layout-inst-data.mlir
M mlir/test/Dialect/XeGPU/propagate-layout-subgroup.mlir
M mlir/test/Dialect/XeGPU/propagate-layout.mlir
M mlir/test/Dialect/XeGPU/xegpu-blocking.mlir
M mlir/test/Dialect/XeGPU/xegpu-recover-layout.mlir
R mlir/test/Dialect/XeGPU/xegpu-unroll-patterns-no-desc-offsets.mlir
M mlir/test/Dialect/XeGPU/xegpu-unroll-patterns.mlir
M mlir/test/Dialect/XeGPU/xegpu-vector-linearize.mlir
M mlir/test/Dialect/XeGPU/xegpu-wg-to-sg-elemwise.mlir
M mlir/test/Dialect/XeGPU/xegpu-wg-to-sg-rr.mlir
R mlir/test/Dialect/XeGPU/xegpu-wg-to-sg-unify-ops-rr.mlir
R mlir/test/Dialect/XeGPU/xegpu-wg-to-sg-unify-ops.mlir
M mlir/test/Dialect/XeGPU/xegpu-wg-to-sg.mlir
M mlir/test/lib/Dialect/XeGPU/TestXeGPUTransforms.cpp
Log Message:
-----------
[MLIR][XeGPU] Remove offsets from create_nd_tdesc & remove update_nd_offset, move offsets to load/store/prefetch ops (#193330)
This PR removes the optional offsets/const_offsets operands on
xegpu.create_nd_tdesc and instead mandates offsets directly on the
consuming load, store, and prefetch ops. It also deprecates the
update_nd_offset op.
Commit: c2a9725b570407d1b057134e90d11c53bbc48b63
https://github.com/llvm/llvm-project/commit/c2a9725b570407d1b057134e90d11c53bbc48b63
Author: Longsheng Mou <longshengmou at gmail.com>
Date: 2026-04-26 (Sun, 26 Apr 2026)
Changed paths:
M mlir/include/mlir/Dialect/Math/IR/MathOps.td
M mlir/lib/Dialect/Math/IR/MathOps.cpp
M mlir/test/Dialect/Math/canonicalize.mlir
Log Message:
-----------
[mlir][math] Add constant folding for sincos/cbrt (#194130)
Adds constant folder for `math.sincos` and `math.cbrt`.
Commit: 682cf7231700c90d12460250b1cad7656cd76dc5
https://github.com/llvm/llvm-project/commit/682cf7231700c90d12460250b1cad7656cd76dc5
Author: Longsheng Mou <longshengmou at gmail.com>
Date: 2026-04-26 (Sun, 26 Apr 2026)
Changed paths:
M mlir/lib/Dialect/Arith/IR/ArithOps.cpp
M mlir/test/Dialect/Arith/canonicalize.mlir
Log Message:
-----------
[mlir][arith] Fold subi(a, subi(a, b)) to b (#194134)
Add a folder for `arith.subi` that simplifies `subi(a, subi(a, b))` to
`b` using the algebraic identity `a - (a - b) = b`.
Commit: c01226500856d65145c37f9c44b82e6f7c60a806
https://github.com/llvm/llvm-project/commit/c01226500856d65145c37f9c44b82e6f7c60a806
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-04-26 (Sun, 26 Apr 2026)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/test/AST/ByteCode/functions.cpp
Log Message:
-----------
[clang][bytecode] Reject functions with dependent return type (#194114)
This unfortunately crashes the current interpreter as well.
Commit: bd75c10199a159a20720f8ee5c00afebb033f46e
https://github.com/llvm/llvm-project/commit/bd75c10199a159a20720f8ee5c00afebb033f46e
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-04-25 (Sat, 25 Apr 2026)
Changed paths:
M libcxx/utils/ci/docker/linux-builder-base.dockerfile
Log Message:
-----------
[libcxx] Include python3-yaml and rsync in container (#194182)
rsync is needed for installing the kernel headers for the libc build.
The yaml python package is needed for libc's hdrgen. This means we no
longer have to install these utilities at runtime.
They should be small enough relative to the existing container image
size to not really have an impact in that regard.
Commit: 33f2036f35093d97989285762cb2570ebcde4eb4
https://github.com/llvm/llvm-project/commit/33f2036f35093d97989285762cb2570ebcde4eb4
Author: Fangrui Song <i at maskray.me>
Date: 2026-04-26 (Sun, 26 Apr 2026)
Changed paths:
M bolt/include/bolt/Core/BinaryContext.h
M bolt/lib/Core/BinaryContext.cpp
M llvm/include/llvm/MC/MCAsmInfo.h
M llvm/include/llvm/MC/MCAsmInfoCOFF.h
M llvm/include/llvm/MC/MCAsmInfoDarwin.h
M llvm/include/llvm/MC/MCAsmInfoELF.h
M llvm/include/llvm/MC/MCAsmInfoGOFF.h
M llvm/include/llvm/MC/MCAsmInfoWasm.h
M llvm/include/llvm/MC/MCAsmInfoXCOFF.h
M llvm/include/llvm/MC/TargetRegistry.h
M llvm/lib/CodeGen/AsmPrinter/DIE.cpp
M llvm/lib/MC/MCAsmInfo.cpp
M llvm/lib/MC/MCAsmInfoCOFF.cpp
M llvm/lib/MC/MCAsmInfoDarwin.cpp
M llvm/lib/MC/MCAsmInfoELF.cpp
M llvm/lib/MC/MCAsmInfoGOFF.cpp
M llvm/lib/MC/MCAsmInfoWasm.cpp
M llvm/lib/MC/MCAsmInfoXCOFF.cpp
M llvm/lib/MC/MCContext.cpp
M llvm/lib/MC/MCParser/MCAsmParser.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCAsmInfo.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCAsmInfo.h
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCTargetDesc.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCAsmInfo.cpp
M llvm/lib/Target/ARC/MCTargetDesc/ARCMCAsmInfo.cpp
M llvm/lib/Target/ARC/MCTargetDesc/ARCMCAsmInfo.h
M llvm/lib/Target/ARC/MCTargetDesc/ARCMCTargetDesc.cpp
M llvm/lib/Target/ARM/MCTargetDesc/ARMMCAsmInfo.cpp
M llvm/lib/Target/ARM/MCTargetDesc/ARMMCAsmInfo.h
M llvm/lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.cpp
M llvm/lib/Target/AVR/MCTargetDesc/AVRMCAsmInfo.cpp
M llvm/lib/Target/BPF/MCTargetDesc/BPFMCAsmInfo.h
M llvm/lib/Target/CSKY/MCTargetDesc/CSKYMCAsmInfo.cpp
M llvm/lib/Target/CSKY/MCTargetDesc/CSKYMCAsmInfo.h
M llvm/lib/Target/CSKY/MCTargetDesc/CSKYMCTargetDesc.cpp
M llvm/lib/Target/DirectX/MCTargetDesc/DirectXMCTargetDesc.cpp
M llvm/lib/Target/Hexagon/AsmParser/HexagonAsmParser.cpp
M llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCAsmInfo.cpp
M llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCAsmInfo.h
M llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCTargetDesc.cpp
M llvm/lib/Target/Lanai/MCTargetDesc/LanaiMCAsmInfo.cpp
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchMCAsmInfo.cpp
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchMCAsmInfo.h
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchMCTargetDesc.cpp
M llvm/lib/Target/M68k/MCTargetDesc/M68kMCAsmInfo.cpp
M llvm/lib/Target/M68k/MCTargetDesc/M68kMCAsmInfo.h
M llvm/lib/Target/M68k/MCTargetDesc/M68kMCTargetDesc.cpp
M llvm/lib/Target/MSP430/MCTargetDesc/MSP430MCAsmInfo.cpp
M llvm/lib/Target/MSP430/MCTargetDesc/MSP430MCAsmInfo.h
M llvm/lib/Target/MSP430/MCTargetDesc/MSP430MCTargetDesc.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsMCAsmInfo.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsMCAsmInfo.h
M llvm/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.cpp
M llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXMCAsmInfo.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCAsmInfo.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCAsmInfo.h
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCAsmInfo.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCAsmInfo.h
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCTargetDesc.cpp
M llvm/lib/Target/SPIRV/MCTargetDesc/SPIRVMCAsmInfo.cpp
M llvm/lib/Target/Sparc/MCTargetDesc/SparcMCAsmInfo.cpp
M llvm/lib/Target/Sparc/MCTargetDesc/SparcMCAsmInfo.h
M llvm/lib/Target/Sparc/MCTargetDesc/SparcMCTargetDesc.cpp
M llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCAsmInfo.cpp
M llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCAsmInfo.h
M llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCTargetDesc.cpp
M llvm/lib/Target/VE/MCTargetDesc/VEMCAsmInfo.cpp
M llvm/lib/Target/VE/MCTargetDesc/VEMCAsmInfo.h
M llvm/lib/Target/VE/MCTargetDesc/VEMCTargetDesc.cpp
M llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCAsmInfo.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86MCAsmInfo.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86MCAsmInfo.h
M llvm/lib/Target/X86/MCTargetDesc/X86MCTargetDesc.cpp
M llvm/lib/Target/XCore/MCTargetDesc/XCoreMCAsmInfo.cpp
M llvm/lib/Target/XCore/MCTargetDesc/XCoreMCAsmInfo.h
M llvm/lib/Target/XCore/MCTargetDesc/XCoreMCTargetDesc.cpp
M llvm/lib/Target/Xtensa/MCTargetDesc/XtensaMCAsmInfo.cpp
M llvm/lib/Target/Xtensa/MCTargetDesc/XtensaMCAsmInfo.h
M llvm/lib/Target/Xtensa/MCTargetDesc/XtensaMCTargetDesc.cpp
M llvm/unittests/CodeGen/MFCommon.inc
M llvm/unittests/CodeGen/MachineInstrTest.cpp
M llvm/unittests/CodeGen/MachineOperandTest.cpp
M llvm/unittests/Target/AArch64/AArch64InstPrinterTest.cpp
Log Message:
-----------
[MC] Add MCTargetOptions to MCAsmInfo constructor. NFC (#194200)
Since #180464 the canonical MCTargetOptions pointer is stored in
MCAsmInfo, but it is bound after construction via `setTargetOptions`
called from TargetRegistry::createMCAsmInfo.
Direct constructions in unit tests can leave the pointer null, leading
to a runtime assert failure. Add MCTargetOptions to every MCAsmInfo
subclass constructor, store it as a reference in MCAsmInfo, and remove
`setTargetOptions()`.
Commit: 32a9f63bb2533a9d564f8d114b139e821aa52415
https://github.com/llvm/llvm-project/commit/32a9f63bb2533a9d564f8d114b139e821aa52415
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-04-26 (Sun, 26 Apr 2026)
Changed paths:
M clang/lib/AST/ByteCode/Interp.cpp
M clang/lib/AST/ByteCode/Interp.h
M clang/test/Sema/static-init.c
Log Message:
-----------
[clang][bytecode] Fix some problems with ptr-to-int casts (#193988)
1) When doing integral casts on a pointer-casted-to-integral, check the
bitwidth we're casting _to_, not the one we're casting _from_.
2) When the pointer we're casting to an integral is a dummy pointer,
don't forget to check the bitwidth.
Commit: 49b0451ec690dfc76690c19032bdc97c2889000b
https://github.com/llvm/llvm-project/commit/49b0451ec690dfc76690c19032bdc97c2889000b
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-04-25 (Sat, 25 Apr 2026)
Changed paths:
M libcxx/utils/ci/docker/docker-compose.yml
Log Message:
-----------
[libcxx] Bump base image version to most recent (#194209)
To pull in the changes from bd75c10199a159a20720f8ee5c00afebb033f46e.
Commit: a0e42c2c47080af4c31c43b801b55e8fa7c68db4
https://github.com/llvm/llvm-project/commit/a0e42c2c47080af4c31c43b801b55e8fa7c68db4
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-04-26 (Sun, 26 Apr 2026)
Changed paths:
M clang/lib/AST/ByteCode/Integral.h
M clang/lib/AST/ByteCode/Interp.h
M clang/lib/AST/ByteCode/Primitives.h
M clang/test/AST/ByteCode/functions.cpp
Log Message:
-----------
[clang][bytecode] Add new IntegralType for function addresses (#194206)
We used to use just `::Address` for functions, which later caused
problems because we casted the pointer to `ValueDecl*` and passed it to
`Program::getOrCreateGlobal()`, which doesn't work of course.
Commit: ab57f940f48b6209f1b958ff4fd26c69b54a1804
https://github.com/llvm/llvm-project/commit/ab57f940f48b6209f1b958ff4fd26c69b54a1804
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-04-25 (Sat, 25 Apr 2026)
Changed paths:
M libcxx/utils/ci/images/libcxx_next_runners.txt
Log Message:
-----------
[libcxx] Bump next runner set (#194211)
So that we can pick up changes in
49b0451ec690dfc76690c19032bdc97c2889000b.
Commit: d593279c0b2891f0b0c8af3f70a1a0383b4ad1b5
https://github.com/llvm/llvm-project/commit/d593279c0b2891f0b0c8af3f70a1a0383b4ad1b5
Author: Princeton Ferro <pferro at nvidia.com>
Date: 2026-04-26 (Sun, 26 Apr 2026)
Changed paths:
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
M llvm/lib/Target/NVPTX/NVPTXISelLowering.h
M llvm/test/CodeGen/NVPTX/fp-contract-f32x2.ll
Log Message:
-----------
[NVPTX] Scalarize `contract FMUL v2f32` to enable FMA fusion (#192815)
SM100+ legalizes `FMUL v2f32`, blocking the scalar FADD->FMA combiner.
Scalarize it when `contract` (or `allowFMA()`) is set and every lane
feeds a single `contract` FADD.
Commit: aa3de782ec5c9d5bb7c9d4bbe879330a2e7acfa6
https://github.com/llvm/llvm-project/commit/aa3de782ec5c9d5bb7c9d4bbe879330a2e7acfa6
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-04-26 (Sun, 26 Apr 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/AArch64/spillcost-call-between-operands.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/spillcost-loop-backedge.ll
Log Message:
-----------
[SLP] Fix spill-cost cache lookup and predecessor scan
A cached intra-block scan that stopped at a call or budget limit only
proves the sub-range below the stop point is call-free; do not reuse
the cached bit for queries whose First lies above it. Also switch the
cross-block predecessor scan to "exists a call-free backward path"
semantics, skip blocks strictly dominated by Root, and memoize only
the (Root, OpParent) key. Fixes a false-positive spill cost that was
blocking profitable vectorization.
Reviewers: RKSimon, hiraditya, bababuck
Pull Request: https://github.com/llvm/llvm-project/pull/192709
Commit: 6439bbe0213e650a18855319f2b9d4b82802a96e
https://github.com/llvm/llvm-project/commit/6439bbe0213e650a18855319f2b9d4b82802a96e
Author: David Green <david.green at arm.com>
Date: 2026-04-26 (Sun, 26 Apr 2026)
Changed paths:
M llvm/lib/Target/ARM/ARMISelLowering.cpp
M llvm/test/CodeGen/ARM/hoist-and-by-const-from-lshr-in-eqcmp-zero.ll
M llvm/test/CodeGen/ARM/hoist-and-by-const-from-shl-in-eqcmp-zero.ll
Log Message:
-----------
Revert "[ARM] Fold SELECT (AND(X,1) == 0), C1, C2 -> XOR(C1,AND(NEG(AND(X,1)),XOR(C1,C2)) in Thumb1 (#185898)" (#194230)
This reverts commit 1823355d06b854854701a8ba430aa1f6be9994f4 due to
performance
regressions in benchmarks.
Commit: 4dafdf64b203bb49fe2d9be25675e5450fed33c6
https://github.com/llvm/llvm-project/commit/4dafdf64b203bb49fe2d9be25675e5450fed33c6
Author: hev <wangrui at loongson.cn>
Date: 2026-04-26 (Sun, 26 Apr 2026)
Changed paths:
M llvm/include/llvm/CodeGen/ValueTypes.td
M llvm/test/Analysis/CostModel/ARM/arith-overflow.ll
M llvm/test/TableGen/CPtrWildcard.td
Log Message:
-----------
[CodeGen] Add <2 x i128> value type (#193910)
Commit: 2d789ff783024f928699ea5b2fb95b25824217b7
https://github.com/llvm/llvm-project/commit/2d789ff783024f928699ea5b2fb95b25824217b7
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-04-26 (Sun, 26 Apr 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlanConstruction.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.h
M llvm/lib/Transforms/Vectorize/VPlanUtils.cpp
M llvm/lib/Transforms/Vectorize/VPlanUtils.h
M llvm/test/Transforms/LoopVectorize/VPlan/vplan-print-after-all.ll
M llvm/test/Transforms/LoopVectorize/induction.ll
M llvm/test/Transforms/LoopVectorize/interleaved-accesses.ll
M llvm/test/Transforms/LoopVectorize/tail-folding-vectorization-factor-1.ll
Log Message:
-----------
[VPlan] Verify and handle FOR legality during header phi creation (NFC). (#191298)
Move the logic to validate FOR users and introduce the split directly to
header phi creation. It makes sense to introduce the header phi and the
splice together.
It also means sinking only needs to be done once, instead for each
VPlan.
Depends on https://github.com/llvm/llvm-project/pull/190681.
PR: https://github.com/llvm/llvm-project/pull/191298
Commit: c65bcf2b0b8eb5814844469fc7281ef453444a53
https://github.com/llvm/llvm-project/commit/c65bcf2b0b8eb5814844469fc7281ef453444a53
Author: Takashi Idobe <idobetakashi at gmail.com>
Date: 2026-04-26 (Sun, 26 Apr 2026)
Changed paths:
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp
M llvm/lib/Transforms/InstCombine/InstCombineInternal.h
A llvm/test/Transforms/InstCombine/divceil.ll
M llvm/test/Transforms/InstCombine/fls.ll
Log Message:
-----------
[InstCombine] Div ceil optimizations (#190175)
Relates: https://github.com/llvm/llvm-project/issues/187838
This PR improves handling of `div_ceil` from rust (which emits a div +
rem).
Currently, these three rust functions:
```rust
use std::hint::assert_unchecked;
#[unsafe(no_mangle)]
pub fn div_ceil_without_assume(x: u32) -> u32 {
x.div_ceil(7)
}
#[unsafe(no_mangle)]
pub fn div_ceil_with_assume(x: u32) -> u32 {
unsafe {
assert_unchecked(x <= u32::MAX - 7);
}
x.div_ceil(7)
}
#[unsafe(no_mangle)]
pub fn div_ceil_with_range(x: u32) -> u32 {
x.count_zeros().div_ceil(7)
}
```
Will emit this IR (cleaned up): The IR looks pretty good to me as both
the assert_unchecked and the popcount are providing range information.
```llvm
define noundef range(i32 0, 613566758) i32 @div_ceil_without_assume(i32 noundef %x) unnamed_addr {
start:
%d = udiv i32 %x, 7
%r = urem i32 %x, 7
%_4.not = icmp ne i32 %r, 0
%0 = zext i1 %_4.not to i32
%_0.sroa.0.0 = add nuw nsw i32 %d, %0
ret i32 %_0.sroa.0.0
}
define noundef range(i32 0, 613566757) i32 @div_ceil_with_assume(i32 noundef %x) unnamed_addr {
start:
%cond = icmp ult i32 %x, -7
tail call void @llvm.assume(i1 %cond)
%d = udiv i32 %x, 7
%r = urem i32 %x, 7
%_5.not = icmp ne i32 %r, 0
%0 = zext i1 %_5.not to i32
%_0.sroa.0.0 = add nuw nsw i32 %d, %0
ret i32 %_0.sroa.0.0
}
define noundef range(i32 0, 6) i32 @div_ceil_with_range(i32 noundef %x) unnamed_addr {
start:
%self = xor i32 %x, -1
%0 = tail call range(i32 0, 33) i32 @llvm.ctpop.i32(i32 %self)
%d.lhs.trunc = trunc nuw nsw i32 %0 to i8
%d3 = udiv i8 %d.lhs.trunc, 7
%d.zext = zext nneg i8 %d3 to i32
%r4 = urem i8 %d.lhs.trunc, 7
%_6.not = icmp ne i8 %r4, 0
%1 = zext i1 %_6.not to i32
%_0.sroa.0.0 = add nuw nsw i32 %1, %d.zext
ret i32 %_0.sroa.0.0
}
declare void @llvm.assume(i1 noundef)
declare i32 @llvm.ctpop.i32(i32)
```
After running through opt and llc on main with popcnt for less noise:
`build/bin/opt -O2 -S < test.ll | build/bin/llc --x86-asm-syntax=intel
-mattr=+popcnt -O2 -o -`
```asm
div_ceil_without_assume: # @div_ceil_without_assume
mov eax, edi
movabs rcx, 2635249153617166336
mul rcx
lea eax, [8*rdx]
mov ecx, edx
sub ecx, eax
xor eax, eax
add ecx, edi
setne al
add eax, edx
ret
div_ceil_with_assume: # @div_ceil_with_assume
mov eax, edi
movabs rcx, 2635249153617166336
mul rcx
lea eax, [8*rdx]
mov ecx, edx
sub ecx, eax
xor eax, eax
add ecx, edi
setne al
add eax, edx
ret
div_ceil_with_range: # @div_ceil_with_range
not edi
popcnt ecx, edi
lea eax, [rcx + 8*rcx]
lea edx, [rcx + 4*rax]
shr edx, 8
lea esi, [8*rdx]
sub esi, edx
xor eax, eax
cmp cl, sil
setne al
add eax, edx
ret
```
(as a sidenote, just running llc seems to generate better code? I find
this a bit odd)
`build/bin/llc test.ll --x86-asm-syntax=intel -mattr=+popcnt -O2 -o -`
```asm
div_ceil_without_assume: # @div_ceil_without_assume
mov eax, edi
movabs rcx, 2635249153617166336
mul rcx
mov rax, rdx
imul ecx, edi, -1227133513
cmp ecx, 613566757
sbb eax, -1
ret
div_ceil_with_assume: # @div_ceil_with_assume
mov eax, edi
movabs rcx, 2635249153617166336
mul rcx
mov rax, rdx
imul ecx, edi, -1227133513
cmp ecx, 613566757
sbb eax, -1
ret
div_ceil_with_range: # @div_ceil_with_range
not edi
popcnt ecx, edi
lea eax, [rcx + 8*rcx]
lea eax, [rcx + 4*rax]
shr eax, 8
imul ecx, ecx, -73
cmp cl, 37
```
Anyway the llvm IR when run through opt at -O2:
On main:
The only changes I see are the urem being rewritten to a mul + sub for
all the instructions, and the range information is persisted but not
used.
```llvm
define noundef range(i32 0, 613566758) i32 @div_ceil_without_assume(i32 noundef %x) unnamed_addr {
start:
%d = udiv i32 %x, 7
%0 = mul i32 %d, 7
%r.decomposed = sub i32 %x, %0
%_4.not = icmp ne i32 %r.decomposed, 0
%1 = zext i1 %_4.not to i32
%_0.sroa.0.0 = add nuw nsw i32 %d, %1
ret i32 %_0.sroa.0.0
}
define noundef range(i32 0, 613566757) i32 @div_ceil_with_assume(i32 noundef %x) unnamed_addr {
start:
%cond = icmp ult i32 %x, -7
tail call void @llvm.assume(i1 %cond)
%d = udiv i32 %x, 7
%0 = mul i32 %d, 7
%r.decomposed = sub i32 %x, %0
%_5.not = icmp ne i32 %r.decomposed, 0
%1 = zext i1 %_5.not to i32
%_0.sroa.0.0 = add nuw nsw i32 %d, %1
ret i32 %_0.sroa.0.0
}
define noundef range(i32 0, 6) i32 @div_ceil_with_range(i32 noundef %x) unnamed_addr {
start:
%self = xor i32 %x, -1
%0 = tail call range(i32 0, 33) i32 @llvm.ctpop.i32(i32 %self)
%d.lhs.trunc = trunc nuw nsw i32 %0 to i8
%d3 = udiv i8 %d.lhs.trunc, 7
%d.zext = zext nneg i8 %d3 to i32
%1 = mul i8 %d3, 7
%r4.decomposed = sub i8 %d.lhs.trunc, %1
%_6.not = icmp ne i8 %r4.decomposed, 0
%2 = zext i1 %_6.not to i32
%_0.sroa.0.0 = add nuw nsw i32 %2, %d.zext
ret i32 %_0.sroa.0.0
}
declare void @llvm.assume(i1 noundef)
declare i32 @llvm.ctpop.i32(i32)
```
However, both the assume and the popcount provide range information so
we can do an optimization. Div_ceil is emitted as a udiv and urem. We
can combine them given the following rules:
Assuming you have floor division of X / Y, we can add Y - 1 to X and
floor division will always give us (floor_divide(X / Y) + 1) which gives
us the same result.
So the formula in general is:
```
div_ceil(X, Y) = X / Y + (1 if X % Y > 0 else 0) -> X + Y - 1 / Y
```
But this fails since I forgot about wrapping. So we need a condition
that X + Y - 1 does not wrap, and of course Y cannot be 0. Technically
we should ignore Y / 1 since that's a trivial identity.
That gets us:
```
add(udiv(X, Y), zext(icmp ne(urem(X, Y), 0))) -> udiv(add nuw(X, Y - 1), Y)
```
[Alive proof here](https://alive2.llvm.org/ce/z/nBvyv4)
This is where I thought I was done, because this should handle the range
and assume case (the assume case provides less information than the
popcount because popcount's range is narrower for X). So I thought I was
done.
Unfortunately this only optimizes one case (the assume case with the
wide code). The culprit here is in the popcount case, there's a trunc
for the popcount to bound it to an i8 since narrower arithmetic allows
for better optimizations before zero extending.
```llvm
%d.lhs.trunc = trunc nuw nsw i32 %0 to i8
%d3 = udiv i8 %d.lhs.trunc, 7
%d.zext = zext nneg i8 %d3 to i32
%r4 = urem i8 %d.lhs.trunc, 7
%_6.not = icmp ne i8 %r4, 0
%1 = zext i1 %_6.not to i32
```
So we need to handle another form, when the udiv needs to be zexted to
the return type (because it was previously trunced, due to the
popcount).
```
add(zext(udiv(X, Y)), zext(icmp ne(urem(X, Y), 0))) -> zext(udiv(add nuw(X, Y - 1), Y))
```
[Alive2 Proof](https://alive2.llvm.org/ce/z/w7bRZW)
There was another oddity I found that trunced information wasn't passing
constant ranges, so I added that to ValueTracking.cpp to fix this fold
too.
On this branch the IR now transforms:
```llvm
define noundef range(i32 0, 613566758) i32 @div_ceil_without_assume(i32 noundef %x) unnamed_addr {
start:
%d = udiv i32 %x, 7
%0 = mul i32 %d, 7
%r.decomposed = sub i32 %x, %0
%_4.not = icmp ne i32 %r.decomposed, 0
%1 = zext i1 %_4.not to i32
%_0.sroa.0.0 = add nuw nsw i32 %d, %1
ret i32 %_0.sroa.0.0
}
define noundef range(i32 0, 613566757) i32 @div_ceil_with_assume(i32 noundef %x) unnamed_addr {
start:
%cond = icmp ult i32 %x, -7
tail call void @llvm.assume(i1 %cond)
%0 = add nuw i32 %x, 6
%_0.sroa.0.0 = udiv i32 %0, 7
ret i32 %_0.sroa.0.0
}
define noundef range(i32 0, 6) i32 @div_ceil_with_range(i32 noundef %x) unnamed_addr {
start:
%self = xor i32 %x, -1
%0 = tail call range(i32 0, 33) i32 @llvm.ctpop.i32(i32 %self)
%d.lhs.trunc = trunc nuw nsw i32 %0 to i8
%1 = add nuw nsw i8 %d.lhs.trunc, 6
%2 = udiv i8 %1, 7
%_0.sroa.0.0 = zext nneg i8 %2 to i32
ret i32 %_0.sroa.0.0
}
declare void @llvm.assume(i1 noundef)
declare i32 @llvm.ctpop.i32(i32)
```
And we get this asm emitted:
```asm
div_ceil_without_assume: # @div_ceil_without_assume
mov eax, edi
movabs rcx, 2635249153617166336
mul rcx
lea eax, [8*rdx]
mov ecx, edx
sub ecx, eax
xor eax, eax
add ecx, edi
setne al
add eax, edx
ret
div_ceil_with_assume: # @div_ceil_with_assume
lea eax, [rdi + 6]
movabs rcx, 2635249153617166336
mul rcx
mov rax, rdx
ret
div_ceil_with_range: # @div_ceil_with_range
not edi
popcnt eax, edi
add al, 6
movzx eax, al
imul eax, eax, 147
shr eax, 10
ret
```
Commit: 72c8f98f74f2b4f9677d0d5e3dc91bc4d6cb39f4
https://github.com/llvm/llvm-project/commit/72c8f98f74f2b4f9677d0d5e3dc91bc4d6cb39f4
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2026-04-26 (Sun, 26 Apr 2026)
Changed paths:
M flang/examples/FeatureList/FeatureList.cpp
M flang/include/flang/Parser/dump-parse-tree.h
M flang/include/flang/Parser/parse-tree.h
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Parser/openmp-parsers.cpp
M flang/lib/Parser/unparse.cpp
M flang/lib/Semantics/assignment.cpp
M flang/lib/Semantics/assignment.h
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/check-omp-structure.h
M flang/lib/Semantics/resolve-directives.cpp
M flang/lib/Semantics/resolve-names.cpp
M flang/lib/Semantics/rewrite-parse-tree.cpp
M flang/lib/Semantics/unparse-with-symbols.cpp
M flang/test/Parser/OpenMP/declare-mapper-unparse.f90
M flang/test/Parser/OpenMP/declare-reduction-combiner.f90
M flang/test/Parser/OpenMP/declare-reduction-multi.f90
M flang/test/Parser/OpenMP/declare-reduction-operator.f90
M flang/test/Parser/OpenMP/declare-reduction-unparse.f90
M flang/test/Parser/OpenMP/declare-target-indirect-tree.f90
M flang/test/Parser/OpenMP/declare-target-to-clause.f90
M flang/test/Parser/OpenMP/declare_target-device_type.f90
M flang/test/Parser/OpenMP/enter-automap-modifier.f90
M flang/test/Parser/OpenMP/linear-clause.f90
M flang/test/Parser/OpenMP/openmp6-directive-spellings.f90
M flang/test/Semantics/OpenMP/simd-only.f90
Log Message:
-----------
[flang][OpenMP] Rename "declare constructs" to directives, NFC (#194240)
Only executable directives are constructs in OpenMP, so, for example,
"declare mapper" is not a construct.
Apply
find flang/ \( -name '*.cpp' -o -name '*.h' -o -name '*.f90' \) -exec sed \
-i -E -e 's/OpenMP(Declare[A-Za-z]*)Construct\b/Omp\1Directive/g' {} \;
plus local formatting updates as needed.
Commit: 91805dc497de9ceb1bfcaafd0098c6705d2d5c93
https://github.com/llvm/llvm-project/commit/91805dc497de9ceb1bfcaafd0098c6705d2d5c93
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-04-26 (Sun, 26 Apr 2026)
Changed paths:
A llvm/test/Transforms/SLPVectorizer/X86/select-copyable-cmp-poison.ll
Log Message:
-----------
[SLP][NFC]Add a test with the incorrect vectorization for fully matched, but reordered, node, NFC
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/194244
Commit: 8efcfc2495f3b6686a94f3b2bdaaa4dd8ce7aeab
https://github.com/llvm/llvm-project/commit/8efcfc2495f3b6686a94f3b2bdaaa4dd8ce7aeab
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-04-26 (Sun, 26 Apr 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/X86/select-copyable-cmp-poison.ll
M llvm/test/Transforms/SLPVectorizer/X86/shrink_after_reorder.ll
M llvm/test/Transforms/SLPVectorizer/revec.ll
Log Message:
-----------
[SLP] Reuse diamond-matched gather across asymmetric reorder/reuse
processBuildVector's perfect-diamond match used Entries.front()->isSame(
E->Scalars) only, missing matches where E carries the reorder/reuse and
the entry is canonical. Two TreeEntries with the same effective scalar
layout but different raw orderings then build independent gathers; one
emits a fill-in shufflevector for reused lanes while the other leaves
poison there.
Fixes #194191.
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/194247
Commit: 7b43dcd755e4d0cb18326f81080daa642ff4e630
https://github.com/llvm/llvm-project/commit/7b43dcd755e4d0cb18326f81080daa642ff4e630
Author: David Green <david.green at arm.com>
Date: 2026-04-26 (Sun, 26 Apr 2026)
Changed paths:
M llvm/test/CodeGen/AArch64/neon-rshrn.ll
Log Message:
-----------
[AArch64] Add disjoint or tests for rshrn and raddhn. NFC (#194252)
These should already be OK, as the os disjoint or connot round up.
Commit: fbac55b82be9bf849d8a9c2514c01cb24a2a264f
https://github.com/llvm/llvm-project/commit/fbac55b82be9bf849d8a9c2514c01cb24a2a264f
Author: JP Hafer <146973677+jph-13 at users.noreply.github.com>
Date: 2026-04-26 (Sun, 26 Apr 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
A llvm/test/CodeGen/AArch64/scvtf-div-mul-combine.ll
Log Message:
-----------
[AArch64] Optimize vector fmul(sitofp/uitofp, 1/2^N) -> scvtf/ucvtf (#141480)
When a vector integer-to-float conversion is followed by a multiply with a
reciprocal power-of-two constant, we can fold both operations into a single
SCVTF or UCVTF instruction with a fixed-point shift operand.
For example, `fmul(sitofp(v2i32 x), <0.5, 0.5>)` becomes `scvtf.2s v0, v0, #1`.
This is a reworked version with several improvements over the original
submission:
- Rewrite the C++ operand matcher to share implementation with the existing
`SelectCVTFixedPointVec` (MOVIshift, FMOV, and DUP handling with correct
truncation for f16)
- Add `uitofp`/`ucvtf` patterns via a `CVTFRecipPat` multiclass
- Add full GlobalISel support (`GIComplexOperandMatcher` + renderer)
Supported vector types: `v2f32`, `v4f32`, `v2f64`, `v4f16`, `v8f16`.
Fixes #94909
Commit: 694f1b425ae370e5fc615038dba90cb1cfcadd30
https://github.com/llvm/llvm-project/commit/694f1b425ae370e5fc615038dba90cb1cfcadd30
Author: Christoph Grüninger <foss at grueninger.de>
Date: 2026-04-26 (Sun, 26 Apr 2026)
Changed paths:
M .github/workflows/libcxx-build-and-test.yaml
Log Message:
-----------
Remove GitHub Action seanmiddleditch/gha-setup-ninja (#194218)
>From the GitHubAction
[README](https://github.com/seanmiddleditch/gha-setup-ninja/blob/master/README.md):
"This action is no longer necessary, as ninja is now
included on all default GitHub runner instances."
Commit: 4e6d01dd5bc6d10166e8b8f1fbf36c862ca04e10
https://github.com/llvm/llvm-project/commit/4e6d01dd5bc6d10166e8b8f1fbf36c862ca04e10
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-04-26 (Sun, 26 Apr 2026)
Changed paths:
M .github/workflows/libcxx-build-and-test.yaml
Log Message:
-----------
[libcxx][Github] Bump libcxx runners to the next runner set (#194212)
To pick up some recent container changes that add additional tools for
the LLVM libc build.
Commit: a562a10f7379c158a858be0cabf52d9dca5fd1c4
https://github.com/llvm/llvm-project/commit/a562a10f7379c158a858be0cabf52d9dca5fd1c4
Author: Ebuka Ezike <yerimyah1 at gmail.com>
Date: 2026-04-26 (Sun, 26 Apr 2026)
Changed paths:
M lldb/tools/lldb-dap/DAP.cpp
M lldb/tools/lldb-dap/DAP.h
M lldb/tools/lldb-dap/DAPSessionManager.cpp
M lldb/tools/lldb-dap/EventHelper.cpp
Log Message:
-----------
lldb-dap: Fix race condition in event threads creation (#194012)
Move the registration of the SBListener to before
the event threads (`ProgressEventThread` and `EventThread`) start
This prevents a race condition where a stop event
could be missed if it was sent immediately after thread creation, which
would lead to a deadlock. It is most likely to happen under heavy CPU
load with test that fails early like
TestDAP_commands::test_command_directive_abort_on_error_init_commands.
Relevant logs.
```sh
# Event thread deadlock.
0x00007348BC000BE0 Listener('lldb-dap.progress.listener')::GetEventInternal, timeout = 1000000 us, event_mask = 0
0x00005b72419d1640 Broadcaster("lldb-dap")::BroadcastEvent (event_sp = 0x5b7241eebb60 Event: broadcaster = 0x5b72418e0df0 (lldb-dap), type = 0x00000001, data = <NULL>, unique=false) hijack = 0x0000000000000000
0x00005B7241898440 Listener('lldb.Debugger')::GetEventInternal, timeout = 1000000 us, event_mask = 0
0x7348bc000be0 Listener::GetEventInternal() timed out for lldb-dap.progress.listener
0x00007348BC000BE0 Listener('lldb-dap.progress.listener')::GetEventInternal, timeout = 1000000 us, event_mask = 0
```
```sh
# Progress thread deadlock.
0x000057798AB6B440 Listener('lldb.Debugger')::GetEventInternal, timeout = <infinite>, event_mask = 0
0x000057798aca4640 Broadcaster("lldb-dap")::BroadcastEvent (event_sp = 0x57798b0b9d80 Event: broadcaster = 0x57798abb3df0 (lldb-dap), type = 0x00000001, data = <NULL>, unique=false) hijack = 0x0000000000000000
0x57798ab6b440 Listener('lldb.Debugger')::AddEvent (event_sp = {0x57798b0b9d80})
0x57798ab6b440 'lldb.Debugger' Listener::FindNextEventInternal(broadcaster=(nil), event_type_mask=0x00000000, remove=1) event 0x57798b0b9d80
0x000057798aca4640 Broadcaster("lldb-dap")::BroadcastEvent (event_sp = 0x57798b1be800 Event: broadcaster = 0x57798abb3df0 (lldb-dap), type = 0x00000002, data = <NULL>, unique=false) hijack = 0x0000000000000000
0x000078023C000BE0 Listener('lldb-dap.progress.listener')::GetEventInternal, timeout = <infinite>, event_mask = 0
```
Commit: 8f65ad583a019cde822b19cf24b0df68a5242792
https://github.com/llvm/llvm-project/commit/8f65ad583a019cde822b19cf24b0df68a5242792
Author: Pedro Lobo <pedro.lobo at tecnico.ulisboa.pt>
Date: 2026-04-26 (Sun, 26 Apr 2026)
Changed paths:
M llvm/lib/Analysis/ConstantFolding.cpp
M llvm/test/Transforms/InstSimplify/load.ll
Log Message:
-----------
[ConstantFolding] Fold byte loads from constant globals (#194074)
Handle byte types in `FoldReinterpretLoadFromConst` and
`ConstantFoldLoadFromUniformValue` so loads from constant globals fold.
Commit: 3b20615594360fdb0f0e328d0d83ae572474b370
https://github.com/llvm/llvm-project/commit/3b20615594360fdb0f0e328d0d83ae572474b370
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-04-26 (Sun, 26 Apr 2026)
Changed paths:
A llvm/test/Transforms/LoopVectorize/VPlan/widen-canonical-iv-register-pressure.ll
A llvm/test/Transforms/LoopVectorize/X86/widen-canonical-iv-register-pressure.ll
Log Message:
-----------
[LV] Add test cases where wide IV can cause spills. (#194260)
Add test cases showing cases where replacing VPWidenCanonicalIVRecipe
with VPWidenIntOrFPinductionPHIRecipe is profitable/not profitable due
to introducing spills.
Commit: 544d003630475c65f6d85d1edb4467e9d7a16c0f
https://github.com/llvm/llvm-project/commit/544d003630475c65f6d85d1edb4467e9d7a16c0f
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-04-26 (Sun, 26 Apr 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/test/Transforms/LoopVectorize/VPlan/vplan-print-after-all.ll
Log Message:
-----------
[VPlan] Use RUN_VPLAN_PASS for later VPlan transforms. (#194261)
Convert a number of later VPlan transform invocations to use
RUN_VPLAN_PASS. Enables more accurate transform printing, as well as
extra verification.
This should migrate all remaining transforms that can be moved without
changes.
Commit: 28c4c25c0cdf4bb41059fb48927f0f866b72bd5a
https://github.com/llvm/llvm-project/commit/28c4c25c0cdf4bb41059fb48927f0f866b72bd5a
Author: Midhunesh <midhunesh.p at ibm.com>
Date: 2026-04-26 (Sun, 26 Apr 2026)
Changed paths:
M compiler-rt/lib/sanitizer_common/sanitizer_allocator_dlsym.h
Log Message:
-----------
[Asan]Add align argument to Realloc() (#194255)
Add align argument to the function Realloc() to ensure original
allocation alignment through realloc
Commit: 4ef52fe4652810ca816250b00c996d65672dd2d0
https://github.com/llvm/llvm-project/commit/4ef52fe4652810ca816250b00c996d65672dd2d0
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-04-26 (Sun, 26 Apr 2026)
Changed paths:
M libcxx/utils/ci/run-buildbot
Log Message:
-----------
[libcxx] Remove package installation for generic-llvm-libc (#194259)
Now that these packages are installed by default in the container image,
we no longer need to install them each time we do a build.
Commit: 13cee9be088057f198e08ee7217ed2af08cfd825
https://github.com/llvm/llvm-project/commit/13cee9be088057f198e08ee7217ed2af08cfd825
Author: martin0413133 <129967631+martin0413133 at users.noreply.github.com>
Date: 2026-04-26 (Sun, 26 Apr 2026)
Changed paths:
M compiler-rt/lib/sanitizer_common/sanitizer_posix.cpp
Log Message:
-----------
[sanitizer] Fix race condition in GetNamedMappingFd with decorate_pro… (#190981)
…c_maps=1
Multi-threaded programs crash randomly when
ASAN_OPTIONS=decorate_proc_maps=1 is enabled due to filename collision
in /dev/shm.
Root Cause:
All threads use the same filename format '/dev/shm/<PID> [name]',
causing race conditions where one thread deletes a file created by
another thread, resulting in ENOENT errors.
Solution:
Add thread ID (TID) to the filename to ensure uniqueness:
- Old format: /dev/shm/<PID> [name]
- New format: /dev/shm/<PID>.<TID> [name]
This ensures each thread has a unique filename, eliminating the race
condition.
Testing:
- Original version: 30% crash rate (6 crashes in 20 runs)
- Fixed version: 0% crash rate (0 crashes in 50 runs)
Fixes #190604
Commit: 57494cc7b4e8b59714ee9e312812d8421f41d27c
https://github.com/llvm/llvm-project/commit/57494cc7b4e8b59714ee9e312812d8421f41d27c
Author: Thurston Dang <thurston at google.com>
Date: 2026-04-26 (Sun, 26 Apr 2026)
Changed paths:
M compiler-rt/lib/sanitizer_common/sanitizer_posix.cpp
Log Message:
-----------
Revert "[sanitizer] Fix race condition in GetNamedMappingFd with decorate_pro…" (#194271)
Reverts llvm/llvm-project#190981 due to buildbot failure
(https://lab.llvm.org/buildbot/#/builders/66/builds/29993):
```
SanitizerCommon-asan-i386-Linux :: Linux/decorate_proc_maps.cpp
```
Commit: 652700b4cb3c87294f2d78cb87df5e394e589984
https://github.com/llvm/llvm-project/commit/652700b4cb3c87294f2d78cb87df5e394e589984
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M compiler-rt/lib/sanitizer_common/sanitizer_posix.cpp
Log Message:
-----------
Reland "[sanitizer] Fix race condition in GetNamedMappingFd with decorate_pro…"" (#194273)
Reverts llvm/llvm-project#194271
Relands llvm/llvm-project#190981.
ThreadID is u64, format must be `%llu`.
Commit: 09306f776fc04272e3ef8a5fdb09b06a84713ffd
https://github.com/llvm/llvm-project/commit/09306f776fc04272e3ef8a5fdb09b06a84713ffd
Author: Luke Lau <luke at igalia.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
M llvm/test/CodeGen/RISCV/rvv/dont-sink-splat-operands.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-insert-subvector-shuffle.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-peephole-vmerge-vops.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vadd-vp-mask.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vadd-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vmacc-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vmul-vp-mask.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vmul-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vnmsac-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vrsub-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vsub-vp-mask.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vsub-vp.ll
M llvm/test/CodeGen/RISCV/rvv/rvv-peephole-vmerge-vops.ll
M llvm/test/CodeGen/RISCV/rvv/sink-splat-operands.ll
M llvm/test/CodeGen/RISCV/rvv/undef-vp-ops.ll
M llvm/test/CodeGen/RISCV/rvv/vadd-vp-mask.ll
M llvm/test/CodeGen/RISCV/rvv/vadd-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vandn-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vmul-vp-mask.ll
M llvm/test/CodeGen/RISCV/rvv/vmul-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vp-vaaddu.ll
M llvm/test/CodeGen/RISCV/rvv/vrsub-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vsub-vp-mask.ll
M llvm/test/CodeGen/RISCV/rvv/vsub-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vwadd-vp.ll
Log Message:
-----------
[RISCV] Remove codegen for vp_add, vp_mul, vp_sub (#194173)
Part of the work to remove trivial VP intrinsics from the RISC-V
backend, see
https://discourse.llvm.org/t/rfc-remove-codegen-support-for-trivial-vp-intrinsics-in-the-risc-v-backend/87999
This splits off 3 intrinsics from #179622. These are expanded and
removed in lockstep so we don't break the multiply-accumulate patterns.
Commit: ef09defc0f4d2a0e52e4d4bd2239088241310051
https://github.com/llvm/llvm-project/commit/ef09defc0f4d2a0e52e4d4bd2239088241310051
Author: Ruiling, Song <ruiling.song at amd.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
A llvm/test/CodeGen/AMDGPU/wqm-propagate-for-execz-side-effect.mir
Log Message:
-----------
[test][AMDGPU] Precommit test for Back-propagate wqm for sources of side-effect instruction (#193394)
Commit: e042f67503e5cbf0480b3c24719c3a57dde1453b
https://github.com/llvm/llvm-project/commit/e042f67503e5cbf0480b3c24719c3a57dde1453b
Author: ZhaoQi <zhaoqi01 at loongson.cn>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M llvm/lib/Target/LoongArch/LoongArchInstrInfo.cpp
M llvm/lib/Target/LoongArch/LoongArchInstrInfo.h
A llvm/test/CodeGen/LoongArch/stackslot.mir
Log Message:
-----------
[LoongArch] Override `isLoadFromStackSlot/isStoreToStackSlot` to expose more optimizations (#164561)
Commit: db572086d0bb11b59004b2f27bfad03669a9c7db
https://github.com/llvm/llvm-project/commit/db572086d0bb11b59004b2f27bfad03669a9c7db
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M llvm/test/CodeGen/X86/machine-block-hash.mir
Log Message:
-----------
[X86] Mark machine-block-hash.mir as XFAIL on big-endian hosts (#194279)
Test introduced in #193107 assumes `stable_hash_combine` is stable,
but it turns out it's not true.
Commit: 41236fb837ecf9fbf632d158833ec5edac509799
https://github.com/llvm/llvm-project/commit/41236fb837ecf9fbf632d158833ec5edac509799
Author: Madhur Amilkanthwar <madhura at nvidia.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/GVN.cpp
M llvm/test/Transforms/GVN/tbaa.ll
Log Message:
-----------
[GVN] Propagate isMemorySSAEnabled() into ValueTable (#193938)
`GVNPass::runImpl()` calls `VN.setMemorySSA(MSSA)` with a single
argument. The second parameter of `ValueTable::setMemorySSA()`,
`MSSAEnabled`, defaults to `false`, so `ValueTable::IsMSSAEnabled`
remains false even when the pass is configured with
`-enable-gvn-memoryssa=1` or `-passes='gvn<memoryssa>'`.
The MemorySSA-backed value-numbering paths in
`ValueTable::lookupOrAddCall()` and `ValueTable::computeLoadStoreVN()`
are gated on `IsMSSAEnabled`, making them unreachable from runImpl() on
main today.
This patch forwards isMemorySSAEnabled() as the second argument to
setMemorySSA(), so selecting the MemorySSA backend actually enables
MemorySSA-aware value numbering.
Commit: 2a09db4d6a6ab6281b8b52f5057fe89fe0935d23
https://github.com/llvm/llvm-project/commit/2a09db4d6a6ab6281b8b52f5057fe89fe0935d23
Author: Ruiling, Song <ruiling.song at amd.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIWholeQuadMode.cpp
M llvm/test/CodeGen/AMDGPU/wqm-propagate-for-execz-side-effect.mir
Log Message:
-----------
AMDGPU: Back-propagate wqm for sources of side-effect instruction (#193395)
For readfirstlane instruction, as it would get undefined value if exec
is zero. To handle the case that only helper lanes execute the parent
block, we let the readfirstlane to execute under wqm. But this is not
enough. If the parent block was also executed by non-helper lanes, we
also need to make sure its sources were calculated under wqm. Otherwise,
if the instruction that generate the source of readfirstlane was
executed under exact mode, the value would contain garbage data in help
lane. The garbage data in helper lane maybe returned by the
readfirstlane running under wqm.
To fix this issue, we need to enforce the back-propagation of wqm for
instructions like readfirstlane. This was only done if the instruction
was possibly in the middle of wqm region (by checking OutNeeds).
Commit: 504930b655af9a49c0596b2aa68f1b763a599bab
https://github.com/llvm/llvm-project/commit/504930b655af9a49c0596b2aa68f1b763a599bab
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M llvm/test/CodeGen/X86/machine-block-hash.mir
Log Message:
-----------
[X86] Remove update_mir_test_checks.py NOTE (#194278)
The test checks printer output, not MIR.
It was probably copy-pasted in #193107 from other test.
Commit: 1f9c611b0997205568f226e0f0ecd22cb96e4f77
https://github.com/llvm/llvm-project/commit/1f9c611b0997205568f226e0f0ecd22cb96e4f77
Author: Madhur Amilkanthwar <madhura at nvidia.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M llvm/test/Transforms/LoopFusion/double_loop_nest_inner_guard.ll
M llvm/test/Transforms/LoopFusion/triple_loop_nest_inner_guard.ll
Log Message:
-----------
[LoopFusion][NFC] UTC gen some tests (#193755)
Some variables need rename as UTC normalizes IR value names. Also,
remove dead variable `%M` and `%N` from
`double_loop_nest_inner_guard.ll`
Commit: 4d2d6a0d92e068a367168706fb768f9dd1c0ad8a
https://github.com/llvm/llvm-project/commit/4d2d6a0d92e068a367168706fb768f9dd1c0ad8a
Author: Zhaoxin Yang <yangzhaoxin at loongson.cn>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/test/CodeGen/LoongArch/lsx/ir-instruction/fpext.ll
M llvm/test/CodeGen/LoongArch/vector-fp-imm.ll
Log Message:
-----------
[LoongArch] Type legalize v2f32 loads by using an f64 load and a scalar_to_vector (#164943)
On 64-bit targets the generic legalize will use an i64 load and a
scalar_to_vector for us. But on 32-bit targets, i64 isn't legal, and the
generic legalizer will end up emitting two 32-bit loads. This patch uses
f64 to avoid the splitting entirely and the redundant int->fp
conversion.
Commit: 4ab33dc39b569f2e33eeec24c2c5c9ae013fe5ea
https://github.com/llvm/llvm-project/commit/4ab33dc39b569f2e33eeec24c2c5c9ae013fe5ea
Author: Luke Lau <luke at igalia.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-peephole-vmerge-vops.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfnmsac-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vmacc-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vnmsac-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vselect-vp-bf16.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vselect-vp.ll
M llvm/test/CodeGen/RISCV/rvv/rvv-peephole-vmerge-vops.ll
M llvm/test/CodeGen/RISCV/rvv/sink-splat-operands.ll
M llvm/test/CodeGen/RISCV/rvv/vfmacc-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfmsac-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfnmacc-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfnmsac-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vmacc-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vmadd-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vnmsac-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vselect-vp-bf16.ll
M llvm/test/CodeGen/RISCV/rvv/vselect-vp.ll
Log Message:
-----------
[RISCV] Remove codegen for vp_select (#194199)
Part of the work to remove trivial VP intrinsics from the RISC-V
backend, see
https://discourse.llvm.org/t/rfc-remove-codegen-support-for-trivial-vp-intrinsics-in-the-risc-v-backend/87999
This splits off vp.select from #179622
Commit: bee932f0c98d720b66994cb6500d227d219110b8
https://github.com/llvm/llvm-project/commit/bee932f0c98d720b66994cb6500d227d219110b8
Author: Antonio Frighetto <me at antoniofrighetto.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
A llvm/test/CodeGen/NVPTX/unknown-intrinsic.ll
Log Message:
-----------
[NVPTX] Improve error diagnostic when handling unknown intrinsics (#191194)
Following up on #146726, it may be desirable to gracefully fail the
compilation in the presence of unknown NVVM intrinsics, which
cannot be lowered by the NVPTX backend, rather than silently
emitting invalid PTX.
Commit: 30c5cfd5b78010146bfd06d19083dfa9c76bbc1a
https://github.com/llvm/llvm-project/commit/30c5cfd5b78010146bfd06d19083dfa9c76bbc1a
Author: Luke Lau <luke at igalia.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M llvm/lib/CodeGen/ExpandVectorPredication.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfclass-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfclass-vp.ll
Log Message:
-----------
[RISCV] Remove codegen for vp_is_fpclass (#193222)
Part of the work to remove trivial VP intrinsics from the RISC-V
backend, see
https://discourse.llvm.org/t/rfc-remove-codegen-support-for-trivial-vp-intrinsics-in-the-risc-v-backend/87999
This splits off vp_is_fpclass from #179622.
Commit: 9b787812e1700800fc927f104c5911aebdaec6eb
https://github.com/llvm/llvm-project/commit/9b787812e1700800fc927f104c5911aebdaec6eb
Author: Chaitanya <Krishna.Sankisa at amd.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenBuiltinAMDGPU.cpp
A clang/test/CIR/CodeGenHIP/builtins-amdgcn.hip
Log Message:
-----------
[CIR][AMDGPU] Add lowering for amdgcn_div_scale builtins (#192931)
Upstreaming clangIR PR: https://github.com/llvm/clangir/pull/2050
This PR adds support for lowering of _builtin_amdgcn_div_scale* amdgpu
builtins to clangIR.
Followed similar lowering from reference clang->llvmir in
clang/lib/CodeGen/TargetBuiltins/AMDGPU.cpp.
Commit: 58f2c189c4232351bd22dfdbb7ab45e084406cca
https://github.com/llvm/llvm-project/commit/58f2c189c4232351bd22dfdbb7ab45e084406cca
Author: Piotr Fusik <p.fusik at samsung.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineShifts.cpp
A llvm/test/Transforms/InstCombine/shift-sub.ll
Log Message:
-----------
[InstCombine] Fold shift of a constant into a reverse shift (#192982)
C1 << (C2 - X) -> (C1 << C2) >> X
C1 << (C2 ^ X) -> (C1 << C2) >> X (if equivalent to the above)
C1 >> (C2 - X) -> (C1 >> C2) << X (right shift modes match)
C1 >> (C2 ^ X) -> (C1 >> C2) << X (if equivalent to the above)
Proof: https://alive2.llvm.org/ce/z/q-4soi
Commit: 8119f1854948b50358bbfaea08f207f51970f06c
https://github.com/llvm/llvm-project/commit/8119f1854948b50358bbfaea08f207f51970f06c
Author: Khem Raj <khem.raj at oss.qualcomm.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M libcxxabi/src/cxa_personality.cpp
Log Message:
-----------
libcxxabi: declare __gnu_unwind_frame in cxa_personality (#189787)
ARM EHABI builds of libcxxabi fail with clang-22+ because
cxa_personality.cpp calls __gnu_unwind_frame without a visible
declaration, triggering:
error: use of undeclared identifier '__gnu_unwind_frame'
Add an extern "C" forward declaration before the EHABI unwind helper so
the source compiles correctly.
Signed-off-by: Khem Raj <khem.raj at oss.qualcomm.com>
Commit: f57f184f87d1caedc778bb1f1a972757083e998d
https://github.com/llvm/llvm-project/commit/f57f184f87d1caedc778bb1f1a972757083e998d
Author: jeanPerier <jperier at nvidia.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M flang/include/flang/Lower/PFTBuilder.h
M flang/include/flang/Semantics/tools.h
M flang/lib/Lower/Bridge.cpp
M flang/lib/Lower/PFTBuilder.cpp
M flang/lib/Semantics/tools.cpp
M flang/test/Lower/OpenMP/target-map-complex.f90
M flang/test/Lower/c-interoperability.f90
A flang/test/Lower/host_module_variable_instantiation.f90
A flang/test/Lower/proc_pointer_hidden_by_generic.f90
Log Message:
-----------
[flang] only instantiate required symbols from parent modules (#193689)
Currently lowering is instantiating (creating
fir.address_of/hlfir.declare) for all module variables from host module
and submodules (for instance, in the new
host_module_variable_instantiation.f90 test, a fir.address_of was
generated the unused var2 inside the procedure foo).
This created a lot of noise (and in the worst cases, compile time
performance issues), and also some extra complexity at least for OpenACC
where the IR acc routine ended up referencing globals that are no
actually needed, creating the need to copy them on the GPU or to have
custom logic to ignore the globals.
This patch addresses this by doing a visit of the parse tree to detect
the required symbols and only instantiate those.
Commit: 13e98d834101efd1794cdd026377c508293ee21b
https://github.com/llvm/llvm-project/commit/13e98d834101efd1794cdd026377c508293ee21b
Author: Fangrui Song <i at maskray.me>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M bolt/include/bolt/Core/BinaryContext.h
M bolt/lib/Core/BinaryContext.cpp
M clang/lib/Parse/ParseStmtAsm.cpp
M clang/tools/driver/cc1as_main.cpp
M lldb/source/Plugins/Disassembler/LLVMC/DisassemblerLLVMC.cpp
M lldb/source/Plugins/Instruction/MIPS/EmulateInstructionMIPS.cpp
M lldb/source/Plugins/Instruction/MIPS64/EmulateInstructionMIPS64.cpp
M llvm/include/llvm/MC/MCContext.h
M llvm/include/llvm/Passes/CodeGenPassBuilder.h
M llvm/include/llvm/Target/TargetMachine.h
M llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
M llvm/lib/CodeGen/AsmPrinter/AsmPrinterInlineAsm.cpp
M llvm/lib/CodeGen/CodeGenTargetMachineImpl.cpp
M llvm/lib/CodeGen/MachineVerifier.cpp
M llvm/lib/CodeGen/ShrinkWrap.cpp
M llvm/lib/CodeGen/TargetFrameLoweringImpl.cpp
M llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp
M llvm/lib/CodeGen/TargetPassConfig.cpp
M llvm/lib/DWARFLinker/Classic/DWARFStreamer.cpp
M llvm/lib/DWARFLinker/Parallel/DWARFEmitterImpl.cpp
M llvm/lib/DWARFLinker/Parallel/DebugLineSectionEmitter.h
M llvm/lib/DebugInfo/LogicalView/Readers/LVBinaryReader.cpp
M llvm/lib/ExecutionEngine/RuntimeDyld/RuntimeDyldChecker.cpp
M llvm/lib/MC/MCContext.cpp
M llvm/lib/MC/MCDisassembler/Disassembler.cpp
M llvm/lib/Object/ModuleSymbolTable.cpp
M llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
M llvm/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp
M llvm/lib/Target/AArch64/AArch64MachineFunctionInfo.cpp
M llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
M llvm/lib/Target/AMDGPU/AMDGPUMCInstLower.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/ARC/ARCInstrInfo.cpp
M llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
M llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp
M llvm/lib/Target/ARM/ARMFrameLowering.cpp
M llvm/lib/Target/ARM/ARMSubtarget.cpp
M llvm/lib/Target/ARM/ARMTargetObjectFile.cpp
M llvm/lib/Target/ARM/Thumb2SizeReduction.cpp
M llvm/lib/Target/AVR/AVRInstrInfo.cpp
M llvm/lib/Target/CSKY/CSKYInstrInfo.cpp
M llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
M llvm/lib/Target/LoongArch/LoongArchInstrInfo.cpp
M llvm/lib/Target/M68k/M68kMCInstLower.cpp
M llvm/lib/Target/MSP430/MSP430InstrInfo.cpp
M llvm/lib/Target/Mips/MipsInstrInfo.cpp
M llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
M llvm/lib/Target/Sparc/SparcInstrInfo.cpp
M llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyCFGStackify.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyExceptionInfo.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyFrameLowering.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyLateEHPrepare.cpp
M llvm/lib/Target/X86/X86CodeGenPassBuilder.cpp
M llvm/lib/Target/X86/X86FastISel.cpp
M llvm/lib/Target/X86/X86FrameLowering.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86InstrInfo.cpp
M llvm/lib/Target/X86/X86MCInstLower.cpp
M llvm/lib/Target/X86/X86TargetMachine.cpp
M llvm/lib/Target/Xtensa/XtensaInstrInfo.cpp
M llvm/tools/llvm-cfi-verify/lib/FileAnalysis.cpp
M llvm/tools/llvm-dwp/llvm-dwp.cpp
M llvm/tools/llvm-exegesis/lib/DisassemblerHelper.cpp
M llvm/tools/llvm-exegesis/lib/SnippetFile.cpp
M llvm/tools/llvm-jitlink/llvm-jitlink.cpp
M llvm/tools/llvm-mc-assemble-fuzzer/llvm-mc-assemble-fuzzer.cpp
M llvm/tools/llvm-mc/llvm-mc.cpp
M llvm/tools/llvm-mca/llvm-mca.cpp
M llvm/tools/llvm-ml/Disassembler.cpp
M llvm/tools/llvm-ml/llvm-ml.cpp
M llvm/tools/llvm-objdump/MachODump.cpp
M llvm/tools/llvm-objdump/llvm-objdump.cpp
M llvm/tools/llvm-profgen/ProfiledBinary.cpp
M llvm/tools/llvm-rtdyld/llvm-rtdyld.cpp
M llvm/tools/sancov/sancov.cpp
M llvm/unittests/CodeGen/MachineInstrTest.cpp
M llvm/unittests/CodeGen/MachineOperandTest.cpp
M llvm/unittests/DebugInfo/DWARF/DWARFExpressionCopyBytesTest.cpp
M llvm/unittests/DebugInfo/DWARF/DwarfGenerator.cpp
M llvm/unittests/MC/AMDGPU/Disassembler.cpp
M llvm/unittests/MC/DwarfDebugFrameCIE.cpp
M llvm/unittests/MC/DwarfLineTableHeaders.cpp
M llvm/unittests/MC/DwarfLineTables.cpp
M llvm/unittests/MC/SystemZ/SystemZAsmLexerTest.cpp
M llvm/unittests/MC/SystemZ/SystemZMCDisassemblerTest.cpp
M llvm/unittests/MC/X86/X86MCDisassemblerTest.cpp
M llvm/unittests/Target/AArch64/AArch64InstPrinterTest.cpp
M llvm/unittests/tools/llvm-mca/MCATestBase.cpp
M mlir/lib/Target/LLVM/ROCDL/Target.cpp
Log Message:
-----------
[MC] Take MCAsmInfo by reference in MCContext and TargetMachine. NFC (#194280)
Both MCContext::MCContext and TargetMachine::getMCAsmInfo treat
MCAsmInfo as a pointer that must be non-null. Make the contract
explicit:
* MCContext's constructor takes `const MCAsmInfo &MAI`.
* TargetMachine::getMCAsmInfo returns `const MCAsmInfo &`.
Make this change now since the MCContext ctor has recently been updated.
Commit: 796d2ec4165a063ab9d1512a769978313dc18bc7
https://github.com/llvm/llvm-project/commit/796d2ec4165a063ab9d1512a769978313dc18bc7
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-masked-load.ll
M llvm/test/CodeGen/LoongArch/lasx/vxi1-masks.ll
M llvm/test/CodeGen/NVPTX/i16x2-instructions.ll
M llvm/test/CodeGen/PowerPC/masked-sdiv.ll
M llvm/test/CodeGen/PowerPC/masked-srem.ll
M llvm/test/CodeGen/PowerPC/masked-udiv.ll
M llvm/test/CodeGen/PowerPC/masked-urem.ll
M llvm/test/CodeGen/RISCV/rvv/incorrect-extract-subvector-combine.ll
M llvm/test/CodeGen/X86/dag-topological-sort.ll
M llvm/test/CodeGen/X86/pr134602.ll
Log Message:
-----------
[DAG] visitAND - attempt to fold (and buildvector(), buildvector()) -> buildvector() (#193987)
See if we can fold all elements of an AND of buildvectors: AND(-1,X) -> X, AND(0,X) -> 0, etc.
Companion to ##183032
Commit: cab0c0dd79b20ae1114a0b40f6756ab6d7c3b70b
https://github.com/llvm/llvm-project/commit/cab0c0dd79b20ae1114a0b40f6756ab6d7c3b70b
Author: Varad Rahul Kamthe <133588066+varadk27 at users.noreply.github.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
M mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp
M mlir/test/Dialect/LLVMIR/nvvm.mlir
M mlir/test/Target/LLVMIR/nvvmir-invalid.mlir
M mlir/test/Target/LLVMIR/nvvmir.mlir
Log Message:
-----------
[MLIR][NVVM] Add movmatrix Op (#193995)
Add `movmatrix` to MLIR NVVM dialect, which moves a row-major matrix across all threads in a warp and writes the
transposed elements to the destination.
Commit: dc19e4b0b6c9a10633958046d2e27b597ba7e37e
https://github.com/llvm/llvm-project/commit/dc19e4b0b6c9a10633958046d2e27b597ba7e37e
Author: Hao Ren <123687754+moomoohorse321 at users.noreply.github.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M mlir/lib/Conversion/NVGPUToNVVM/NVGPUToNVVM.cpp
M mlir/test/Conversion/NVGPUToNVVM/nvgpu-to-nvvm.mlir
Log Message:
-----------
[mlir][NVGPUToNVVM] Support BF16 mma.sync lowering (#194203)
Let NVGPUToNVVM to recognize BF16 MMA operand element types
Pack `vector<2xbf16>` fragments to `i32` before emitting
`nvvm.mma.sync`.
This matches the PTX operand encoding for `m16n8k16` BF16 MMA
instructions.
Add a conversion test for `nvgpu.mma.sync` `bf16xbf16` to `f32`
lowering.
Co-authored-by: Hao Ren <rhao8608 at gmail.com>
Commit: 2c39855fb790df3f75c9272311b6a8ecbb603a17
https://github.com/llvm/llvm-project/commit/2c39855fb790df3f75c9272311b6a8ecbb603a17
Author: David Sherwood <david.sherwood at arm.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
A llvm/test/CodeGen/AArch64/sanitize_vec_pow.ll
Log Message:
-----------
[AArch64] Sanitise pow inputs using a target DAG combine (#192958)
Sometimes we see LLVM IR like this:
%pow = call fast <4 x float> @llvm.pow.v4f32(...)
%fcmp = fcmp fast ...
%res = select <4 x i1> %fcmp, <4 x float> %val, <4 x float> %pow
where the pow intrinsic is called unconditionally, but only certain
lanes of the result are used. In fact, LLVM actively encourages code
like this due to the intrinsic being marked as safe to speculatively
execute. However, we know when using certain vector libraries like
ArmPL that this can be very costly if the unused lanes would take
the pow call down an expensive path. For example, if an input to
pow is a special value (inf, NaN, -0) then it triggers slow special
case handling, and ultimately the result is going to be ignored
anyway. For this reason we prefer to sanitise the pow input to
use 'safe' values when we know the result is going to be discarded.
The above example LLVM IR would then look like
%fcmp = fcmp fast ...
%sel = select <4 x i1>, <4 x float> splat(float 1.0), ...
%pow = call fast <4 x float> @llvm.pow.v4f32(<4 x float> %sel, ...)
%res = select <4 x i1> %fcmp, <4 x float> %val, <4 x float> %pow
where the value 1.0 is chosen due to the fact pow is known to always
return 1.0 for all powers.
Commit: 6b25ae4fed5f7bd75c2b1bc011aa3d5de3bd29c2
https://github.com/llvm/llvm-project/commit/6b25ae4fed5f7bd75c2b1bc011aa3d5de3bd29c2
Author: Fangrui Song <i at maskray.me>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M clang-tools-extra/clangd/Config.h
M clang/lib/StaticAnalyzer/Checkers/WebKit/PtrTypesSemantics.h
M llvm/include/llvm/ADT/FoldingSet.h
M llvm/include/llvm/ADT/STLExtras.h
M llvm/include/llvm/ADT/StableHashing.h
M llvm/include/llvm/ExecutionEngine/Orc/WaitingOnGraph.h
M llvm/lib/Support/FoldingSet.cpp
M llvm/unittests/Support/xxhashTest.cpp
Log Message:
-----------
[ADT] Fix IWYU for hashing-adjacent files (#194297)
Add explicit includes so these files keep building after we trim
transitive includes from xxhash.h.
For example, FoldingSet.cpp calls llvm::uninitialized_copy, which is
declared in llvm/ADT/STLExtras.h and today reaches the file only
transitively.
Also drop the vestigial `#include "llvm/ADT/Hashing.h"` from
llvm/ADT/STLExtras.h — no name from Hashing.h is used there.
Commit: 3d893f3e232236749ed1988667d039369b3c98bf
https://github.com/llvm/llvm-project/commit/3d893f3e232236749ed1988667d039369b3c98bf
Author: David Sherwood <david.sherwood at arm.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M llvm/test/Transforms/LoopVectorize/AArch64/masked-call.ll
M llvm/test/Transforms/LoopVectorize/AArch64/wider-VF-for-callinst.ll
M llvm/test/Transforms/LoopVectorize/hints-trans.ll
M llvm/test/Transforms/LoopVectorize/scalable-trunc-min-bitwidth.ll
Log Message:
-----------
[LV][NFC] Remove instsimplify pass run from all tests (#193722)
The instsimplify pass was only giving minor incidental improvements that
aren't essential to what is being tested.
Commit: 7189c4bb83d90c383741a9480fceca9c7bf74b27
https://github.com/llvm/llvm-project/commit/7189c4bb83d90c383741a9480fceca9c7bf74b27
Author: David Sherwood <david.sherwood at arm.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M llvm/test/CodeGen/AArch64/veclib-llvm.pow.ll
Log Message:
-----------
[AArch64][NFC] Fix veclib-llvm.pow.ll test to run all pre-isel passes (#193996)
Commit: 89894b67484694aeaaec9c6bac6a09d71c347e6f
https://github.com/llvm/llvm-project/commit/89894b67484694aeaaec9c6bac6a09d71c347e6f
Author: Pavel Labath <pavel at labath.sk>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M libc/hdr/types/CMakeLists.txt
A libc/hdr/types/struct_cmsghdr.h
M libc/include/CMakeLists.txt
M libc/include/llvm-libc-macros/linux/sys-socket-macros.h
M libc/include/llvm-libc-types/CMakeLists.txt
A libc/include/llvm-libc-types/struct_cmsghdr.h
M libc/include/sys/socket.yaml
M libc/test/src/sys/socket/linux/CMakeLists.txt
M libc/test/src/sys/socket/linux/sendmsg_recvmsg_test.cpp
Log Message:
-----------
[libc] Add struct cmsghdr and associated macros (#193756)
The macros are the main source of subtlety. The interesting aspects are:
- some implementations CMSG_ALIGN the size of struct cmsghdr, but this
is a noop. Instead of doing that, I added an assertion in the test.
- POSIX permits CMSG_NXTHDR to return null if the buffer has no space
for the data array, and this behavior differs between implementations.
This implementation does not do that in order to match CMSG_FIRSTHDR,
which doesn't have such an option.
- some implementations redirect the CMSG_NXTHDR macro to an (extern or
static inline) function. I implemented this inside the macro to avoid
having to define a (private ?) entry point for that function.
---------
Co-authored-by: Jeff Bailey <jbailey at raspberryginger.com>
Commit: 166c2418cf3e9c976f59e079e6a3400cc3c44c4b
https://github.com/llvm/llvm-project/commit/166c2418cf3e9c976f59e079e6a3400cc3c44c4b
Author: Adrian Kuegel <akuegel at google.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
Log Message:
-----------
[Bazel] Add linkopts to adjust for changes in 9ec6788 (#194314)
We need to link against crypt32.lib to avoid linker errors on Windows.
Commit: 1fee6a1e04de55ec218f9f38cbf2f60fc43acd26
https://github.com/llvm/llvm-project/commit/1fee6a1e04de55ec218f9f38cbf2f60fc43acd26
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M clang/lib/AST/ByteCode/Interp.cpp
M clang/lib/AST/ByteCode/Interp.h
M clang/test/AST/ByteCode/new-delete.cpp
Log Message:
-----------
[clang][bytecode] Ignore GetPtrDerivedPop on non-record pointers (#194005)
Now that we do this for `GetPtrBase`, we need to do it here, too. This
broke in the attached test case, but fully fixing it requires some
seemingly unrelated changes to `delete` handling.
Commit: 521f55348a345952522b2ad14f9b4885c48a3f86
https://github.com/llvm/llvm-project/commit/521f55348a345952522b2ad14f9b4885c48a3f86
Author: forking-google-bazel-bot[bot] <265904573+forking-google-bazel-bot[bot]@users.noreply.github.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/test/src/sys/socket/BUILD.bazel
Log Message:
-----------
[Bazel] Fixes 89894b6 (#194321)
This fixes 89894b67484694aeaaec9c6bac6a09d71c347e6f.
Co-authored-by: Google Bazel Bot <google-bazel-bot at google.com>
Commit: 3aed0816fed922391ed0638f67ea8b6d09bebbdc
https://github.com/llvm/llvm-project/commit/3aed0816fed922391ed0638f67ea8b6d09bebbdc
Author: Usha Gupta <usha.gupta at arm.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M llvm/lib/Transforms/AggressiveInstCombine/AggressiveInstCombine.cpp
A llvm/test/Transforms/AggressiveInstCombine/fold-split-ctlz.ll
A llvm/test/Transforms/AggressiveInstCombine/fold-split-cttz.ll
Log Message:
-----------
[AggressiveInstCombine] Fold split-width i32 cttz/ctlz patterns into wide i64 intrinsics (#192296)
This patch teaches `AggressiveInstCombine ` to recognize and fold common split-width i32 cttz/ctlz intrinsic calls into a single full-width i64
cttz/ctlz intrinsic.
For ex:
```
define i32 @src(i64 %val) {
%lo = trunc i64 %val to i32
%cmp = icmp eq i32 %lo, 0
%shr = lshr i64 %val, 32
%hi = trunc i64 %shr to i32
%cttz_hi = call i32 @llvm.cttz.i32(i32 %hi, i1 true)
%hi_plus32 = or i32 %cttz_hi, 32
%cttz_lo = call i32 @llvm.cttz.i32(i32 %lo, i1 true)
%result = select i1 %cmp, i32 %hi_plus32, i32 %cttz_lo
ret i32 %result
}
define i32 @tgt(i64 %val) {
%cttz64 = call i64 @llvm.cttz.i64(i64 %val, i1 false)
%result = trunc i64 %cttz64 to i32
ret i32 %result
}
```
and similarly for ctlz intrinsic.
Alive proof for the 2 folds added by this patch.
cttz:
https://alive2.llvm.org/ce/z/-s14-s
ctlz:
https://alive2.llvm.org/ce/z/WfQepH
Commit: 295a7a9f75b839394b49d4ec59b2df33b30cd4fd
https://github.com/llvm/llvm-project/commit/295a7a9f75b839394b49d4ec59b2df33b30cd4fd
Author: Julian Brown <julian.brown at amd.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M openmp/runtime/src/kmp_taskdeps.cpp
M openmp/runtime/src/kmp_tasking.cpp
Log Message:
-----------
[OpenMP] Make loop index unsigned in __kmpc_omp_task_with_deps/__kmp_omp_task
NFC.
Co-authored-by: Adrian Munera <adrian.munera at bsc.es>
Reviewers: ro-i
Pull Request: https://github.com/llvm/llvm-project/pull/194044
Commit: 5e42f09a6f001ad60ff85bbc0f54290d86033912
https://github.com/llvm/llvm-project/commit/5e42f09a6f001ad60ff85bbc0f54290d86033912
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M clang/lib/AST/ByteCode/Interp.h
M clang/test/AST/ByteCode/c.c
Log Message:
-----------
[clang][bytecode] Reject non-number values in Rem op (#194309)
Commit: aa04bcfd2f368405490a6ef45a8b7d6fd6ee964c
https://github.com/llvm/llvm-project/commit/aa04bcfd2f368405490a6ef45a8b7d6fd6ee964c
Author: ioana ghiban <ioana.ghiban at arm.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M mlir/lib/Dialect/MemRef/Transforms/ElideReinterpretCast.cpp
M mlir/test/Dialect/MemRef/elide-reinterpret-cast.mlir
Log Message:
-----------
[memref] Simplify loads from reinterpret_cast of 1D contiguous memrefs (#188459)
Rewrite `memref.load` operations whose source is a `reinterpret_cast` that
represents a rank reshape of a 1D contiguous `memref` with a single non-unit
dimension.
Assisted-by: ChatGPT (refine implementation + tests). I reviewed all code and
tests before submission.
## Example
Before:
```mlir
%reinterpret_cast = memref.reinterpret_cast %src
to offset: [0], sizes: [1, 1, 999], strides: [999, 999, 1]
: memref<999xi64> to memref<1x1x999xi64>
%0 = memref.load %reinterpret_cast[%c0, %c0, %i]
: memref<1x1x999xi64>
```
After:
```mlir
%0 = memref.load %src[%i] : memref<999xi64>
```
## Motivation
This simplifies the IR, makes indexing explicit, and reduces indirection,
which in turn improves downstream transformations and lowerings (e.g. EmitC).
## Scope
This rewrite is intentionally narrow:
- Applies only to rank-expansion and rank-collapsing of a contiguous 1D buffer
(at most one non-unit dimension).
- Requires `reinterpret_cast` with zero offset and fully static sizes and
strides.
- Requires the non-unit dimension to be at a boundary (first or last).
- Requires any dropped indices (from size-1 dimensions) to be statically zero.
It does **not** handle:
- general `memref.reinterpret_cast` with arbitrary strides or offsets
- multiple non-unit dimensions
- cases where index dropping would change semantics
For example:
```mlir
%reinterpret_cast = memref.reinterpret_cast %src
to offset: [0], sizes: [1, 1, 1, 108], strides: [108, 108, 108, 1]
: memref<1x108xf32> to memref<1x1x1x108xf32>
%0 = memref.load %reinterpret_cast[%c0, %c1, %c0, %c0]
: memref<1x1x1x108xf32>
```
The pattern would skip `%c1` when forming the indices for the replacement load,
since it cuts the dimensions that were added to the left, including the
dimension where the non-zero index is:
```mlir
%0 = memref.load %src[%c0, %c0]
: memref<1x108xf32>
```
causing the rewrite to discard a non-zero index on a size-1 dimension, which is
not semantics-preserving.
## Correctness
In the accepted cases, the cast is a pure view that does not alter memory
layout. Size-1 dimensions do not contribute to address computation, and the
single non-unit dimension determines the access.
Dropping indices for size-1 dimensions (or inserting zeros when collapsing
rank) preserves the computed address. The rewrite is only applied when such
indices are statically zero, ensuring in-bounds semantics.
Therefore, the rewritten load is equivalent to the original load through the
`reinterpret_cast`
Commit: 8a8d26fe77dc76864aa86171a4bcf0c645b16013
https://github.com/llvm/llvm-project/commit/8a8d26fe77dc76864aa86171a4bcf0c645b16013
Author: Brandon Wu <brandon.wu at sifive.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M clang/include/clang/Basic/riscv_vector.td
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfofp8min/non-policy/non-overloaded/vreinterpret.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfofp8min/non-policy/overloaded/vreinterpret.c
Log Message:
-----------
[RISCV] Support reinterpret cast intrinisc for OFP8 (#191626)
spec: https://github.com/riscv-non-isa/riscv-rvv-intrinsic-doc/pull/433
stacked on: https://github.com/llvm/llvm-project/pull/191349
Commit: 5e318e6ca95e9826b1b277574385b2c7c75a0caf
https://github.com/llvm/llvm-project/commit/5e318e6ca95e9826b1b277574385b2c7c75a0caf
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
Log Message:
-----------
[X86] combineKSHIFT - pull out common operands. NFC. (#194326)
Minor refactor before adding additional folds.
Commit: 31ea083c6b70a79706ba88dfea393d3834f65370
https://github.com/llvm/llvm-project/commit/31ea083c6b70a79706ba88dfea393d3834f65370
Author: Chandana Mudda <quic_csinderi at quicinc.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M llvm/lib/CodeGen/WindowScheduler.cpp
A llvm/test/CodeGen/Hexagon/win-sched-implicit-def.mir
Log Message:
-----------
Handle IMPLICIT_DEF in TripleMBB for WindowScheduler (#179190)
Previously, IMPLICIT_DEF instructions were not copied into the
triple-MBB region used by the WindowScheduler. This left the
machine-level liveness inconsistent with the triplicated code and could
trigger a LiveIntervals assertion:
LiveIntervals::HMEditor::updateRange: Assertion `LR.verify()' failed.
Copy IMPLICIT_DEF into the triple region so that the triplicated block
has a consistent set of defs and LiveIntervals can update ranges
correctly.
---------
Co-authored-by: Matt Arsenault <arsenm2 at gmail.com>
Commit: 94e0fd0988bb091960116a7aecc72f5e74161069
https://github.com/llvm/llvm-project/commit/94e0fd0988bb091960116a7aecc72f5e74161069
Author: Corentin Jabot <corentinjabot at gmail.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/lib/Frontend/InitPreprocessor.cpp
M clang/lib/Sema/SemaCoroutine.cpp
M clang/test/Analysis/Checkers/WebKit/uncounted-lambda-captures-co_await-assertion-failure.cpp
M clang/test/Analysis/more-dtors-cfg-output.cpp
M clang/test/CodeGenCXX/ubsan-coroutines.cpp
M clang/test/CodeGenCoroutines/coro-params.cpp
M clang/test/CodeGenCoroutines/coro-promise-dtor.cpp
M clang/test/Lexer/cxx-features.cpp
M clang/test/Modules/coro-await-elidable.cppm
M clang/test/PCH/coroutines.cpp
M clang/test/Parser/cxx20-coroutines.cpp
M clang/test/SemaCXX/addr-label-in-coroutines.cpp
M clang/test/SemaCXX/co_await-ast.cpp
M clang/test/SemaCXX/coroutine-alloc-2.cpp
M clang/test/SemaCXX/coroutine-alloc-3.cpp
M clang/test/SemaCXX/coroutine-alloc-4.cpp
M clang/test/SemaCXX/coroutine-allocs.cpp
M clang/test/SemaCXX/coroutine-builtins.cpp
M clang/test/SemaCXX/coroutine-dealloc.cpp
M clang/test/SemaCXX/coroutine-final-suspend-noexcept.cpp
M clang/test/SemaCXX/coroutine-no-valid-dealloc.cpp
M clang/test/SemaCXX/coroutine-noreturn.cpp
M clang/test/SemaCXX/coroutine-promise-ctor.cpp
M clang/test/SemaCXX/coroutine-rvo.cpp
M clang/test/SemaCXX/coroutine-traits-undefined-template.cpp
M clang/test/SemaCXX/coroutine-unevaluate.cpp
M clang/test/SemaCXX/coroutine-vla.cpp
A clang/test/SemaCXX/coroutine-win32x86.cpp
M clang/test/SemaCXX/coroutine_handle-address-return-type.cpp
M clang/test/SemaCXX/coroutines.cpp
M clang/test/SemaCXX/cxx20-delayed-typo-correction-crashes.cpp
M clang/test/SemaCXX/cxx2b-deducing-this-coro.cpp
M clang/test/SemaCXX/thread-safety-coro.cpp
M clang/test/SemaCXX/warn-throw-out-noexcept-coro.cpp
M clang/test/SemaCXX/warn-unused-parameters-coroutine.cpp
M clang/www/cxx_status.html
Log Message:
-----------
[Clang] No longer advertise support for coroutines on x86 windows. (#193456)
There are a large number of long standing issues with coroutines on
x86_32 windows as discussed here
https://github.com/llvm/llvm-project/issues/59382
- #59382
- #58556
- #58543
- #56989
- #193161
- #136481
As such this patches
- No longer defines `__cpp_impl_coroutine` on that platform
- Warn when using coroutines on that platform
The reason to not plainly error is that it would break too much valid
valid code, ie there are people who probably use coroutines sucessfully.
And we also want to keep testing on that platform, up until the point we
were to pull support completely.
Hopefully this is all temporary and someone will feel compelled to
improve the situation enough that we can unceremoniously revert this
patch.
Commit: 48ee9c82f27e170e9cada55ca40e757a391829ef
https://github.com/llvm/llvm-project/commit/48ee9c82f27e170e9cada55ca40e757a391829ef
Author: Eugene Epshteyn <eepshteyn at nvidia.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M flang/test/Lower/pointer-initial-target-2.f90
M flang/test/Lower/pointer-initial-target.f90
M flang/test/Lower/pointer-references.f90
M flang/test/Lower/pointer-results-as-arguments.f90
M flang/test/Lower/pointer-runtime.f90
Log Message:
-----------
[flang][NFC] Converted five tests from old lowering to new lowering (part 49) (#194276)
Tests converted from test/Lower: pointer-initial-target-2.f90,
pointer-initial-target.f90, pointer-references.f90,
pointer-results-as-arguments.f90, pointer-runtime.f90
Commit: 6d89cd85942cc5f702267855ab2788e43c072961
https://github.com/llvm/llvm-project/commit/6d89cd85942cc5f702267855ab2788e43c072961
Author: Paul Walker <paul.walker at arm.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
A llvm/test/CodeGen/AArch64/sve-masked-ldst-alias-analysis.ll
Log Message:
-----------
[LLVM][SelectionDAG] Don't assume masked loads access all lanes in memory. (#192706)
When creating the initial DAG for masked loads we are using the result
type to define LocationSize. However, being a masked load we do not know
which, if any, memory locations will be read.
Fixes https://github.com/llvm/llvm-project/issues/180251
Commit: 8d060c0222a5cfa3b0fd875d48cf09b6c2dd4a5d
https://github.com/llvm/llvm-project/commit/8d060c0222a5cfa3b0fd875d48cf09b6c2dd4a5d
Author: Davide Grohmann <davide.grohmann at arm.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVTosaOps.td
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVTosaTypes.td
M mlir/lib/Dialect/SPIRV/IR/SPIRVTosaOps.cpp
M mlir/test/Dialect/SPIRV/IR/tosa-ops-verification.mlir
Log Message:
-----------
[mlir][spirv] Tighten SPIR-V TOSA pool constraints (#193515)
Tighten AvgPool2D and MaxPool2D verification by constraining kernel,
stride, and pad attributes and by checking the input/output NHWC
relationship.
Add verification tests for batch/channel mismatches, non-divisible
pooled shapes, pad-vs-kernel failures, and incorrect output shapes.
Signed-off-by: Davide Grohmann <davide.grohmann at arm.com>
Commit: c12ce4215408ddf83c338a4797b05dd0084b8d06
https://github.com/llvm/llvm-project/commit/c12ce4215408ddf83c338a4797b05dd0084b8d06
Author: Łukasz Plewa <lukasz.plewa at intel.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M offload/liboffload/API/Device.td
M offload/liboffload/src/OffloadImpl.cpp
M offload/plugins-nextgen/amdgpu/src/rtl.cpp
M offload/plugins-nextgen/common/CMakeLists.txt
M offload/plugins-nextgen/cuda/src/rtl.cpp
M offload/plugins-nextgen/host/src/rtl.cpp
M offload/plugins-nextgen/level_zero/dynamic_l0/L0DynWrapper.cpp
M offload/plugins-nextgen/level_zero/dynamic_l0/level_zero/ze_api.h
M offload/plugins-nextgen/level_zero/include/L0Device.h
M offload/plugins-nextgen/level_zero/src/L0Device.cpp
M offload/tools/deviceinfo/llvm-offload-device-info.cpp
M offload/unittests/OffloadAPI/device/olGetDeviceInfo.cpp
Log Message:
-----------
[offload] Add floating-point support detection queries (#193233)
Add device info queries to detect support for half-, single-, and
double-precision floating-point formats.
For the AMDGPU, CUDA, and Host plugins, add the new queries alongside
the existing capability reporting without changing current behavior.
For the Level Zero plugin, implement floating-point support detection
and capability querying.
Commit: bd7cd403dbb3c6698c9edddc288e58c16aa88a36
https://github.com/llvm/llvm-project/commit/bd7cd403dbb3c6698c9edddc288e58c16aa88a36
Author: Amina Chabane <amina.chabane at arm.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M bolt/lib/Passes/CMOVConversion.cpp
M bolt/test/AArch64/unsupported-passes.test
Log Message:
-----------
[BOLT][AArch64] Refuse to run CMOVConversion pass (#193998)
`--cmov-conversion` is unsupported in AArch64 as
convertMoveToConditionalMove() is only overriden for X86.
- Add a guard for non-X86
- Update unsupported-passes.test with expected error
Commit: 27ebc844f542c93991675a22dcd813020963819f
https://github.com/llvm/llvm-project/commit/27ebc844f542c93991675a22dcd813020963819f
Author: Alexandre Ganea <aganea at havenstudios.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M clang/lib/CodeGen/BackendUtil.cpp
M clang/test/DebugInfo/Generic/codeview-buildinfo.c
Log Message:
-----------
[clang][CodeView] Prevent the input name from appearing in LF_BUILDINFO (#194140)
The implicit contract of an `LF_BUILDINFO` record (represented in LLVM
by
[`BuildInfoRecord`](https://github.com/llvm/llvm-project/blob/6f0b55ec55f3e5e1ccc0d6b0d04a307479218768/llvm/include/llvm/DebugInfo/CodeView/TypeRecord.h#L667))
is that its `CommandLine` field should not contain the input source file
— a separate `SourceFile` field is reserved for that.
When the command-line flattening was moved from `llvm/` to `clang/` in
#106369, the comparison value used to identify and strip the source
positional was switched from `MainSourceFile->getFilename()` (the full
input path resolved by clang) to `CodeGenOpts.MainFileName` (just the
basename, set via `-main-file-name`). As a result, when the driver is
invoked with an absolute source path the cc1 positional is that absolute
path and no longer matches `MainFileName`, so the source filename leaks
into `CommandLine` as a trailing positional cc1 argument.
This is a regression in Clang 20. It breaks downstream tooling such as
Live++, whose unity-splitting feature relies on the embedded command
line being the cc1 invocation minus the source. Reported in #193900.
This PR restores the previous behavior by passing the resolved frontend
input path(s) to `flattenClangCommandLine` and including them in the
equality check that strips the source positional. The basename match
against `MainFileName` is kept for the relative-input case. A regression
test (and a symmetric relative-path test) is added to
`clang/test/DebugInfo/Generic/codeview-buildinfo.c`.
Should fix #193900.
Commit: f60c5d989cf13e80acc576f638c2e7dd400a0aff
https://github.com/llvm/llvm-project/commit/f60c5d989cf13e80acc576f638c2e7dd400a0aff
Author: Łukasz Plewa <lukasz.plewa at intel.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M offload/plugins-nextgen/amdgpu/src/rtl.cpp
Log Message:
-----------
[offload] fix compilation issue caused by #193233 (#194350)
Commit: a51597f35f91ed5c25a391d5e965bfb6fe9a5ae2
https://github.com/llvm/llvm-project/commit/a51597f35f91ed5c25a391d5e965bfb6fe9a5ae2
Author: Nathan Gauër <brioche at google.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M clang/lib/CodeGen/CGBuilder.h
M clang/lib/CodeGen/CGExprAgg.cpp
M clang/lib/CodeGen/CGHLSLRuntime.cpp
M clang/test/CodeGenHLSL/ArrayAssignable.hlsl
A clang/test/CodeGenHLSL/ArrayAssignable.logicalptr.hlsl
A clang/test/CodeGenHLSL/resources/cbuffer_struct_passing.hlsl
A clang/test/CodeGenHLSL/resources/cbuffer_struct_passing.logical.hlsl
Log Message:
-----------
[HLSL] Handle logical pointer for array assign (#193227)
This commits adds SPIR-V testing on an existing test (almost-NFC on DXIL
testing). It also copies it and invokes Clang using the experimental
logical pointer flag.
Adding this flag shows a missing case in the frontend, handled with this
commit.
Due to the difference in index handling between the structured.gep and
legacy one, the Cbuffer load codegen had to be rewritten. It's a bit
more naive, as we get one gep per level, but this will be handled by
optimizations later on.
Commit: aafba1dbdbee3ddeffca595c1d7550eb766c5178
https://github.com/llvm/llvm-project/commit/aafba1dbdbee3ddeffca595c1d7550eb766c5178
Author: Sergio Afonso <safonsof at amd.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
M mlir/include/mlir/Dialect/OpenMP/OpenMPEnums.td
M mlir/include/mlir/Dialect/OpenMP/OpenMPOps.td
M mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
M mlir/test/Target/LLVMIR/openmp-target-generic-spmd.mlir
Log Message:
-----------
[MLIR][OpenMP] Remove Generic-SPMD early detection (#150922)
This patch removes logic from MLIR to attempt identifying Generic
kernels that could be executed in SPMD mode.
This optimization is done by the OpenMPOpt pass for Clang and is only
required here to circumvent missing support for the new DeviceRTL APIs
used in MLIR to LLVM IR translation that Clang doesn't currently use
(e.g. `kmpc_distribute_static_loop` ). Removing checks in MLIR avoids
duplicating the logic that should be centralized in the OpenMPOpt pass.
Additionally, offloading kernels currently compiled through the OpenMP
dialect fail to run parallel regions properly when in Generic mode. By
disabling early detection, this issue becomes apparent for a range of
kernels where this was masked by having them run in SPMD mode.
Commit: 7b62dd1aeec5bcc7c4b8a8344966750b7d95250e
https://github.com/llvm/llvm-project/commit/7b62dd1aeec5bcc7c4b8a8344966750b7d95250e
Author: Sergio Afonso <safonsof at amd.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M llvm/include/llvm/Frontend/OpenMP/OMPIRBuilder.h
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
Log Message:
-----------
[OpenMP][OMPIRBuilder] Add device shared memory allocation support (#150923)
This patch adds the `__kmpc_alloc_shared` and `__kmpc_free_shared`
DeviceRTL functions to the list of those the OMPIRBuilder is able to
create.
Commit: 3c39478e8b0b6d0e91a70c5887ea27ac90c2ed8c
https://github.com/llvm/llvm-project/commit/3c39478e8b0b6d0e91a70c5887ea27ac90c2ed8c
Author: Sergio Afonso <safonsof at amd.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
A mlir/test/Target/LLVMIR/omptarget-device-shared-memory.mlir
Log Message:
-----------
[MLIR][OpenMP] Support allocations of device shared memory (#150924)
This patch updates the allocation of some reduction and private
variables within target regions to use device shared memory rather than
private memory. This is a prerequisite to produce working Generic
kernels containing parallel regions.
In particular, the following situations result in the usage of device
shared memory (only when compiling for the target device if they are
placed inside of a target region representing a Generic kernel):
- Reduction variables on `teams` constructs.
- Private variables on `teams` and `distribute` constructs that are
reduced or used inside of a `parallel` region.
Currently, there is no support for delayed privatization on `teams`
constructs, so private variables on these constructs won't currently be
affected. When support is added, if it uses the existing
`allocatePrivateVars` and `cleanupPrivateVars` functions, usage of
device shared memory will be introduced automatically.
Commit: 82f254992bbb822639cbe14d55df3bf5de65fa6a
https://github.com/llvm/llvm-project/commit/82f254992bbb822639cbe14d55df3bf5de65fa6a
Author: Sergio Afonso <safonsof at amd.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M llvm/include/llvm/Frontend/OpenMP/OMPIRBuilder.h
M llvm/include/llvm/Transforms/Utils/CodeExtractor.h
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
M llvm/lib/Transforms/IPO/HotColdSplitting.cpp
M llvm/lib/Transforms/IPO/IROutliner.cpp
M llvm/lib/Transforms/IPO/PartialInlining.cpp
M llvm/lib/Transforms/Utils/CodeExtractor.cpp
M llvm/unittests/Transforms/Utils/CodeExtractorTest.cpp
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
M mlir/test/Target/LLVMIR/omptarget-parallel-llvm.mlir
Log Message:
-----------
[OpenMP][OMPIRBuilder] Use device shared memory for arg structures (#150925)
Argument structures are created when sections of the LLVM IR
corresponding to an OpenMP construct are outlined into their own
function. For this, stack allocations are used.
This patch modifies this behavior when compiling for a target device and
outlining `parallel`-related IR, so that it uses device shared memory
instead of private stack space. This is needed in order for threads to
have access to these arguments.
Commit: d463a276fcd68b3f0a070e69600fbfcb3aa2fa6e
https://github.com/llvm/llvm-project/commit/d463a276fcd68b3f0a070e69600fbfcb3aa2fa6e
Author: Sergio Afonso <safonsof at amd.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
M mlir/test/Target/LLVMIR/omptarget-parallel-llvm.mlir
Log Message:
-----------
[OpenMP][OMPIRBuilder] Support parallel in Generic kernels (#150926)
This patch introduces codegen logic to produce a wrapper function
argument for the `__kmpc_parallel_51` DeviceRTL function needed to
handle arguments passed using device shared memory in Generic mode.
Commit: 333f636c9af90fd77bc6669a74f8bd9e2832640b
https://github.com/llvm/llvm-project/commit/333f636c9af90fd77bc6669a74f8bd9e2832640b
Author: Sergio Afonso <safonsof at amd.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M llvm/lib/Transforms/IPO/OpenMPOpt.cpp
A offload/test/offloading/fortran/target-generic-loops.f90
A offload/test/offloading/fortran/target-spmd-loops.f90
Log Message:
-----------
[OpenMPOpt] Make parallel regions reachable from new DeviceRTL loop functions (#150927)
This patch updates the OpenMP optimization pass to know about the new
DeviceRTL functions for loop constructs.
This change marks these functions as potentially containing parallel
regions, which fixes a current bug with the state machine rewrite
optimization. It previously failed to identify parallel regions located
inside of the callbacks passed to these new DeviceRTL functions, causing
the resulting code to skip executing these parallel regions.
As a result, Generic kernels produced by Flang that contain parallel
regions now work properly.
One known related issue not fixed by this patch is that the presence of
calls to these functions will prevent the SPMD-ization of Generic
kernels by OpenMPOpt. Previously, this was due to assuming there was no
parallel region. This is changed by this patch, but instead we now mark
it temporarily as unsupported in an SPMD context. The reason is that,
without additional changes, code intended for the main thread of the
team located outside of the parallel region would not be guarded
properly, resulting in race conditions and generally invalid behavior.
Commit: b5c755144d665750e5c60849c6612848bf2905d6
https://github.com/llvm/llvm-project/commit/b5c755144d665750e5c60849c6612848bf2905d6
Author: Sergio Afonso <safonsof at amd.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M clang/lib/CodeGen/CGOpenMPRuntime.cpp
M clang/lib/CodeGen/CGStmtOpenMP.cpp
M llvm/include/llvm/Frontend/OpenMP/OMPIRBuilder.h
M llvm/include/llvm/Transforms/Utils/CodeExtractor.h
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
M llvm/lib/Transforms/IPO/HotColdSplitting.cpp
M llvm/lib/Transforms/IPO/IROutliner.cpp
M llvm/lib/Transforms/IPO/OpenMPOpt.cpp
M llvm/lib/Transforms/IPO/PartialInlining.cpp
M llvm/lib/Transforms/Utils/CodeExtractor.cpp
M llvm/unittests/Frontend/OpenMPIRBuilderTest.cpp
M llvm/unittests/Transforms/Utils/CodeExtractorTest.cpp
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
M mlir/test/Target/LLVMIR/omptarget-parallel-llvm.mlir
M mlir/test/Target/LLVMIR/omptarget-parallel-wsloop.mlir
M mlir/test/Target/LLVMIR/omptarget-region-device-llvm.mlir
M mlir/test/Target/LLVMIR/openmp-target-private-allocatable.mlir
Log Message:
-----------
[OMPIRBuilder] Add support for explicit deallocation points (#154752)
In this patch, some OMPIRBuilder codegen functions and callbacks are
updated to work with arrays of deallocation insertion points. The
purpose of this is to enable the replacement of `alloca`s with other
types of allocations that require explicit deallocations in a way that
makes it possible for `CodeExtractor` instances created during
OMPIRBuilder finalization to also use them.
The OpenMP to LLVM IR MLIR translation pass is updated to properly store
and forward deallocation points together with their matching allocation
point to the OMPIRBuilder.
Currently, only the `DeviceSharedMemCodeExtractor` uses this feature to
get the `CodeExtractor` to use device shared memory for intermediate
allocations when outlining a parallel region inside of a Generic kernel
(code path that is only used by Flang via MLIR, currently). However,
long term this might also be useful to refactor finalization of
variables with destructors, potentially reducing the use of callbacks
and simplifying privatization and reductions.
Instead of a single deallocation point, lists of those are used. This is
to cover cases where there are multiple exit blocks originating from a
single entry. If an allocation needing explicit deallocation is placed
in the entry block of such cases, it would need to be deallocated before
each of the exits.
Commit: f6012dd7884822a0428384f1e0a90e61e7380b1f
https://github.com/llvm/llvm-project/commit/f6012dd7884822a0428384f1e0a90e61e7380b1f
Author: Sergio Afonso <safonsof at amd.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M mlir/include/mlir/Dialect/OpenMP/OpenMPClauses.td
M mlir/include/mlir/Dialect/OpenMP/OpenMPOps.td
M mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
M mlir/test/Dialect/OpenMP/invalid.mlir
M mlir/test/Dialect/OpenMP/ops.mlir
Log Message:
-----------
[MLIR][OpenMP] Refactor omp.target_allocmem to allow reuse, NFC (#161861)
This patch moves tablegen definitions that could be used for all kinds
of heap allocations out of `omp.target_allocmem` and into a new
`OpenMP_HeapAllocClause` that can be reused.
Descriptions are updated to follow the format of most other operations
and the custom verifier for `omp.target_allocmem` is removed as it only
made a redundant check on its result type.
Commit: 568e1ad61abe03da5a8b2d573067895bbdb380e9
https://github.com/llvm/llvm-project/commit/568e1ad61abe03da5a8b2d573067895bbdb380e9
Author: Sergio Afonso <safonsof at amd.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M llvm/include/llvm/Frontend/OpenMP/OMPIRBuilder.h
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
M mlir/include/mlir/Dialect/OpenMP/OpenMPClauses.td
M mlir/include/mlir/Dialect/OpenMP/OpenMPOps.td
M mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
M mlir/test/Dialect/OpenMP/invalid.mlir
M mlir/test/Dialect/OpenMP/ops.mlir
A mlir/test/Target/LLVMIR/omptarget-device-shared-mem.mlir
Log Message:
-----------
[Flang][MLIR][OpenMP] Add explicit shared memory (de-)allocation ops (#161862)
This patch introduces the `omp.alloc_shared_mem` and
`omp.free_shared_mem` operations to represent explicit allocations and
deallocations of shared memory across threads in a team, mirroring the
existing `omp.target_allocmem` and `omp.target_freemem`.
The `omp.alloc_shared_mem` op goes through the same Flang-specific
transformations as `omp.target_allocmem`, so that the size of the buffer
can be properly calculated when translating to LLVM IR.
The corresponding runtime functions produced for these new operations
are `__kmpc_alloc_shared` and `__kmpc_free_shared`, which previously
could only be created for implicit allocations (e.g. privatized and
reduction variables).
Commit: d6061d297d3c4f462a84bd77f182d191d982ac5d
https://github.com/llvm/llvm-project/commit/d6061d297d3c4f462a84bd77f182d191d982ac5d
Author: Sergio Afonso <safonsof at amd.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M flang/include/flang/Optimizer/Support/InitFIR.h
M flang/lib/Optimizer/Passes/Pipelines.cpp
M flang/test/Fir/basic-program.fir
M mlir/docs/Passes.md
M mlir/include/mlir/Dialect/OpenMP/Transforms/Passes.h
M mlir/include/mlir/Dialect/OpenMP/Transforms/Passes.td
M mlir/lib/Dialect/OpenMP/CMakeLists.txt
A mlir/lib/Dialect/OpenMP/IR/CMakeLists.txt
M mlir/lib/Dialect/OpenMP/Transforms/CMakeLists.txt
A mlir/lib/Dialect/OpenMP/Transforms/StackToShared.cpp
A mlir/test/Dialect/OpenMP/stack-to-shared.mlir
Log Message:
-----------
[Flang][OpenMP] Add pass to replace allocas with device shared memory (#161863)
This patch introduces a new Flang OpenMP MLIR pass, only ran for target
device modules, that identifies `fir.alloca` operations that should use
device shared memory and replaces them with pairs of
`omp.alloc_shared_mem` and `omp.free_shared_mem` operations.
This works in conjunction to the MLIR to LLVM IR translation pass'
handling of privatization, mapping and reductions in the OpenMP dialect
to properly select the right memory space for allocations based on where
they are made and where they are used.
This pass, in particular, handles explicit stack allocations in MLIR,
whereas the aforementioned translation pass takes care of implicit ones
represented by entry block arguments.
Commit: fad06a418b4f89510a390c215218f1ab8de0ecad
https://github.com/llvm/llvm-project/commit/fad06a418b4f89510a390c215218f1ab8de0ecad
Author: Sergio Afonso <safonsof at amd.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M flang/test/Integration/OpenMP/target-use-device-nested.f90
M flang/test/Integration/OpenMP/threadprivate-target-device.f90
M llvm/include/llvm/Frontend/OpenMP/OMPIRBuilder.h
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
M llvm/unittests/Frontend/OpenMPIRBuilderTest.cpp
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
M mlir/test/Target/LLVMIR/omptarget-constant-alloca-raise.mlir
M mlir/test/Target/LLVMIR/omptarget-parallel-llvm.mlir
A mlir/test/Target/LLVMIR/openmp-target-private-shared-mem.mlir
A offload/test/offloading/fortran/target-generic-outlined-loops.f90
Log Message:
-----------
[MLIR][OpenMP][OMPIRBuilder] Improve shared memory checks (#161864)
This patch refines checks to decide whether to use device shared memory
or regular stack allocations. In particular, it adds support for
parallel regions residing on standalone target device functions.
The changes are:
- Shared memory is introduced for `omp.target` implicit allocations,
such as those related to privatization and mapping, as long as they are
shared across threads in a nested parallel region.
- Standalone target device functions are interpreted as being part of a
Generic kernel, since the fact that they are present in the module after
filtering means they must be reachable from a target region.
- Prevent allocations whose only shared uses inside of an `omp.parallel`
region are as part of a `private` clause from being moved to device
shared memory.
Commit: c94db1af36c2f66d71cd0c492068937eee641e56
https://github.com/llvm/llvm-project/commit/c94db1af36c2f66d71cd0c492068937eee641e56
Author: Sergio Afonso <safonsof at amd.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
A mlir/include/mlir/Dialect/OpenMP/Utils/Utils.h
M mlir/lib/Dialect/OpenMP/CMakeLists.txt
M mlir/lib/Dialect/OpenMP/Transforms/CMakeLists.txt
M mlir/lib/Dialect/OpenMP/Transforms/StackToShared.cpp
A mlir/lib/Dialect/OpenMP/Utils/CMakeLists.txt
A mlir/lib/Dialect/OpenMP/Utils/Utils.cpp
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/CMakeLists.txt
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
Log Message:
-----------
[MLIR][OpenMP] Unify device shared memory logic, NFCI (#182856)
This patch creates a utils library for the OpenMP dialect with functions
used by MLIR to LLVM IR translation as well as the stack-to-shared pass
to determine which allocations must use local stack memory or device
shared memory.
Commit: cf30e4b5c2d55e217ade2483c4672f2488da48df
https://github.com/llvm/llvm-project/commit/cf30e4b5c2d55e217ade2483c4672f2488da48df
Author: Jack Styles <jack.styles at arm.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64Subtarget.h
A llvm/test/CodeGen/AArch64/aarch64-no-mov-spill-chain.ll
M llvm/test/CodeGen/AArch64/ragreedy-local-interval-cost.ll
Log Message:
-----------
[AArch64] Enable Spillage Copy Elimination by default (#186093)
In times of high register pressure, the greedy register allocator can
emit large eviction chains that consist of many `mov` instructions. The
Spillage Copy Elimination pass handles this, by finding these chains and
decreasing their impact. Take a mov chain such as the following where
`x8` is used for an 8-byte Folded Reload:
```
mov x7, x6
mov x6, x5
mov x5, x4
mov x4, x3
mov x3, x2
mov x2, x1
mov x1, x30
mov x30, x8
< use x8 >
mov x8, x30
mov x30, x1
mov x1, x2
mov x2, x3
mov x3, x4
mov x4, x5
mov x5, x6
mov x6, x7
```
Becomes:
```
mov x7, x6
mov x6, x8
< use x8 >
mov x8, x6
mov x6, x7
```
This provides performance benefits for long mov chains, where we are no
longer needing to copy these values between registers.
This does introduce compile time regressions, as was originally noted in
the initial review. From my testing, this was around 0.17% on average
using LLVM Test Suite.
Further information:
Original Review: https://reviews.llvm.org/D122118
Compile Time Regression information from original review:
http://llvm-compile-time-tracker.com/compare.php?from=781eabeb40b8e47e3a46b0b927784e63f0aad9ab&to=0af2744a89bf0ed05e83ac1ed9d21d6d74cdfeca&stat=instructions%3Au
Assisted-by: codex (Generation of new test)
Commit: 889708eed861b4218fda5a085b47f37b6b73b739
https://github.com/llvm/llvm-project/commit/889708eed861b4218fda5a085b47f37b6b73b739
Author: Jan Leyonberg <jan_sjodin at yahoo.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenModule.cpp
M clang/lib/CIR/CodeGen/CIRGenModule.h
A clang/lib/CIR/CodeGen/CIRGenOpenMPRuntime.cpp
A clang/lib/CIR/CodeGen/CIRGenOpenMPRuntime.h
M clang/lib/CIR/CodeGen/CMakeLists.txt
A clang/test/CIR/CodeGenOpenMP/emit-device-functions.cpp
Log Message:
-----------
[CIR][OpenMP] Enable emission of target functions (#193204)
This PR allows generation of target device functions for OpenMP. It also
handles filtering out host functions that do not contain target regions.
Assisted-by: Cursor / claude-4.6-opus-high
Commit: 8116e869531490f28ecaa3bcaac1fe644b545e0e
https://github.com/llvm/llvm-project/commit/8116e869531490f28ecaa3bcaac1fe644b545e0e
Author: CHANDRA GHALE <chandra.nitdgp at gmail.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M flang/lib/Lower/OpenMP/Utils.cpp
A flang/test/Lower/OpenMP/tile-parallel-do.f90
Log Message:
-----------
[Flang][OpenMP] Fix crash lowering parallel do with nested tile construct (#193955)
This fixes a crash in OpenMP lowering for cases like `!$omp parallel do
with nested !$omp tile sizes(...)` .
The loop-walk logic now correctly steps through intermediate OpenMP
transformation wrappers to find the actual do construct, instead of
assuming it is directly nested.
Fixes :
[https://github.com/llvm/llvm-project/issues/193256](https://github.com/llvm/llvm-project/issues/193256)
sample reproducer :
[https://godbolt.org/z/b7zecYEMT](https://godbolt.org/z/b7zecYEMT)
Co-authored-by: Chandra Ghale <ghale at pe34genoa.hpc.amslabs.hpecorp.net>
Commit: ef867c03d77cc5c11845ab3ac2392c124271a9cf
https://github.com/llvm/llvm-project/commit/ef867c03d77cc5c11845ab3ac2392c124271a9cf
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M llvm/test/CodeGen/X86/vselect-avx.ll
Log Message:
-----------
[X86] vselect-avx.ll - regenerate asm comments (#194353)
Commit: 902814afe11799e2b90a9879658e1356b3ff6aff
https://github.com/llvm/llvm-project/commit/902814afe11799e2b90a9879658e1356b3ff6aff
Author: Raphael Isemann <rise at apple.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M lldb/test/API/lang/objc/modules-auto-import/TestModulesAutoImport.py
M lldb/test/API/lang/objc/modules-auto-import/main.m
Log Message:
-----------
[lldb][test] Modernize TestModulesAutoImport (#194357)
This replaces all the custom test setup logic with the newer test
utilities. Not technically NFC as the newer checks are more strict.
Commit: 6ac432bdc8122a945e69b39d7a0368b3947b769d
https://github.com/llvm/llvm-project/commit/6ac432bdc8122a945e69b39d7a0368b3947b769d
Author: Sirui Mu <msrlancern at gmail.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M .gitignore
Log Message:
-----------
[llvm][.gitignore] Ignore .agents directory (#194236)
The `.agents` directory is a common convention for storing coding agent
related stuff like rules and skills, recognized by major coding agents
like Claude Code, Codex, GitHub Copilot, OpenCode, etc. Ignore this
directory to avoid accidentally commiting these coding agent related
content to the repo.
Commit: ba3d7a59016b0ecae7eb5249bbcf289e3e189c55
https://github.com/llvm/llvm-project/commit/ba3d7a59016b0ecae7eb5249bbcf289e3e189c55
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M llvm/include/llvm/Passes/CodeGenPassBuilder.h
M llvm/test/CodeGen/X86/gc-empty-basic-blocks.ll
R llvm/test/CodeGen/X86/gc-empty-basic-blocks.mir
Log Message:
-----------
[NewPM] Wire up gc-empty-basic-blocks into pipeline (#194179)
Same setup as the old pipeline and resolves a testing TODO now that we
have a full pipeline for x86.
Commit: d48c8411dfe6a611a7b8b2b3e53b2da85270a82e
https://github.com/llvm/llvm-project/commit/d48c8411dfe6a611a7b8b2b3e53b2da85270a82e
Author: forking-google-bazel-bot[bot] <265904573+forking-google-bazel-bot[bot]@users.noreply.github.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[Bazel] Fixes c94db1a (#194359)
This fixes c94db1af36c2f66d71cd0c492068937eee641e56.
Co-authored-by: Google Bazel Bot <google-bazel-bot at google.com>
Commit: e028d938d542d00f0fe90f50d561868cc7c68fde
https://github.com/llvm/llvm-project/commit/e028d938d542d00f0fe90f50d561868cc7c68fde
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/VOP2Instructions.td
A llvm/test/CodeGen/AMDGPU/madmk-madak-encoding-size.ll
Log Message:
-----------
AMDGPU: Fix instruction size for madmk/madak (#194361)
This caused the revert of #191461
Commit: 9b2411da20d78653fdc93972e26700aef2f7dfe9
https://github.com/llvm/llvm-project/commit/9b2411da20d78653fdc93972e26700aef2f7dfe9
Author: Andrey Grabezhnoy <andrey.grabezhnoy at intel.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
M llvm/test/Transforms/InstCombine/and-xor-or.ll
M llvm/test/Transforms/InstCombine/binop-and-shifts.ll
Log Message:
-----------
[InstCombine] Require one-use intermediate binop in foldBinOpShiftWithShift (#194341)
foldBinOpShiftWithShift rewrites
binop(shift(X,C) op Mask, shift(Y,C))
to
binop(shift(X+Y,C), Mask).
Both shifts are matched with m_OneUse, but the enclosing binop that
wraps (shift(X,C), Mask) is not. When that binop has additional users
the rewrite cannot eliminate the originals and only adds new
instructions. The reproducer in the issue shows this: a shared base
with several downstream consumers gets duplicated on each one, so the
fold grows the IR instead of shrinking it.
Wrap the outer m_c_BinOp in m_OneUse so the fold only fires when the
binop can actually be replaced. Mirrors the one-use discipline already
applied to both shifts in the same matcher.
Fixes #194007.
Commit: 5f0f269d5f835a07d74a2428e7e372c60b4c048f
https://github.com/llvm/llvm-project/commit/5f0f269d5f835a07d74a2428e7e372c60b4c048f
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M mlir/lib/Dialect/MemRef/Transforms/ElideReinterpretCast.cpp
Log Message:
-----------
[MemRef] Fix -Wunused-function (#194366)
areIndicesInBounds is only used within an assert statement, so mark it
[[maybe_unused]] so that the compiler does not otherwise warn in
non-assertion builds.
Commit: 8242576869985db73d44ac537208744dceb93503
https://github.com/llvm/llvm-project/commit/8242576869985db73d44ac537208744dceb93503
Author: Oleksandr Tarasiuk <oleksandr.tarasiuk at outlook.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Parse/ParseCXXInlineMethods.cpp
M clang/test/SemaCXX/lambda-unevaluated.cpp
Log Message:
-----------
[Clang] prevent crash in delayed default-argument lambda captures (#176749)
Fixes #176534
---
This patch resolves a crash when parsing delayed default arguments that
contain lambda expressions.
```cpp
struct S {
void f(int x, int = sizeof([x] { return x; }()));
};
```
When late-parsing default arguments that contain lambdas, `Sema` builds
a `FunctionScopes` stack containing only the lambda scope
(`FunctionScopes.size()` equals 1), however, `tryCaptureVariable`
expects an enclosing function scope outside the lambda scope
https://github.com/llvm/llvm-project/blob/41e231cae38028473dd327e8de5f65792b521ffe/clang/lib/Sema/SemaExpr.cpp#L19473-L19474
https://github.com/llvm/llvm-project/blob/41e231cae38028473dd327e8de5f65792b521ffe/clang/lib/Sema/SemaExpr.cpp#L19518
Scope capture handling logic decrements `FunctionScopesIndex` to align
declaration contexts
https://github.com/llvm/llvm-project/blob/41e231cae38028473dd327e8de5f65792b521ffe/clang/lib/Sema/SemaExpr.cpp#L19696
and later relies on it when traversing and accessing outer scopes
https://github.com/llvm/llvm-project/blob/41e231cae38028473dd327e8de5f65792b521ffe/clang/lib/Sema/SemaExpr.cpp#L19522-L19524
preserving the function scope in the late-parsing path prevents invalid
traversal during lambda capture handling
Commit: 06ddfcf0ca9cdb1481fff3cff6f73d5c26d45ffe
https://github.com/llvm/llvm-project/commit/06ddfcf0ca9cdb1481fff3cff6f73d5c26d45ffe
Author: Alex Rønne Petersen <alex at alexrp.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M libunwind/src/AddressSpace.hpp
M libunwind/src/DwarfParser.hpp
Log Message:
-----------
[libunwind] fix build errors on x32 and mips n32 (#194310)
Commit: cc2b2f548622805a883201bfd7732d863636ecac
https://github.com/llvm/llvm-project/commit/cc2b2f548622805a883201bfd7732d863636ecac
Author: Petter Berntsson <petter.berntsson at arm.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M libc/docs/CMakeLists.txt
M libc/docs/headers/index.rst
A libc/utils/docgen/sys/sem.yaml
Log Message:
-----------
[libc][docs] Add sys/sem.h POSIX header documentation (#122006) (#194358)
Add sys/sem.h implementation-status docs to llvm-libc.
Commit: 4f50fe9298c9587aabf3698a1c79ff83d54fc702
https://github.com/llvm/llvm-project/commit/4f50fe9298c9587aabf3698a1c79ff83d54fc702
Author: Joe Nash <joseph.nash at amd.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/VOPDInstructions.td
A llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vopd_unused_operands.txt
Log Message:
-----------
[AMDGPU][MC] Permit unneeded VOPD mov operands to be non-zero (#194060)
Use ? instead of 0 in the tablegen definitions for VOPD containing
v_mov. This enables the instruction to be disassembled regardless of
what bits are in those fields, which helps diagnose broken code.
Previously, the disassembler would reject these.
Commit: 40a303d94644891829fd5b399a24c59b788a917e
https://github.com/llvm/llvm-project/commit/40a303d94644891829fd5b399a24c59b788a917e
Author: Fushj <fsjzzu at 126.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M llvm/lib/ExecutionEngine/Interpreter/Execution.cpp
A llvm/test/ExecutionEngine/Interpreter/test-interp-variable-arguments.ll
Log Message:
-----------
[llvm][lli] fix lli crash when run variable arguments function as a interpret (#173719)
Run `lli` comand with the flag `-force-interpreter=true` to execute LLVM
bitcode, if `lli` run `variable arguments` function in the bitcode, it
will crash.
Fix #173718
Commit: 0193af47d2b78a58d5019bb1db35be8877975b41
https://github.com/llvm/llvm-project/commit/0193af47d2b78a58d5019bb1db35be8877975b41
Author: Kevin Sala Penades <salapenades1 at llnl.gov>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M offload/plugins-nextgen/amdgpu/src/rtl.cpp
M offload/plugins-nextgen/cuda/src/rtl.cpp
M offload/plugins-nextgen/level_zero/src/L0Device.cpp
Log Message:
-----------
[offload] Fix use of AsyncInfoWrapper's finalize function (#194098)
The expected use is to forward the error from the asynchronous
operation's issuing (e.g., launchImpl) directly into the
AsyncInfoWrapper::finalize(). The check of the error is already
performed inside that function. No need to forward a dummy success error
code.
Commit: 74734782b42b640db1c6995e2d88388a5435fbfe
https://github.com/llvm/llvm-project/commit/74734782b42b640db1c6995e2d88388a5435fbfe
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M clang/lib/CodeGen/CGHLSLRuntime.cpp
Log Message:
-----------
[Clang][HLSL] Fix -Wunused-variable (#194374)
Inline the variable definition into the assert given it is side effect
free and the variable name does not make the code much more clear.
Commit: c6de992abfd3ad76345f013b0f4dd5dfef3f0bc5
https://github.com/llvm/llvm-project/commit/c6de992abfd3ad76345f013b0f4dd5dfef3f0bc5
Author: Amilendra Kodithuwakku <amilendra.kodithuwakku at arm.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M clang/include/clang/Basic/arm_sve.td
A clang/test/CodeGen/AArch64/sve2p3-intrinsics/acle_sve2p3_addqp.c
A clang/test/CodeGen/AArch64/sve2p3-intrinsics/acle_sve2p3_addsubp.c
A clang/test/CodeGen/AArch64/sve2p3-intrinsics/acle_sve2p3_subp.c
A clang/test/Sema/AArch64/arm_sve_feature_dependent_sve_AND_LP_sve2p3_OR_sme2p3_RP___sme_AND_LP_sve2p3_OR_sme2p3_RP.c
M llvm/include/llvm/IR/IntrinsicsAArch64.td
M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
A llvm/test/CodeGen/AArch64/sve2p3-intrinsics/sve2p3-intrinsics-addqp.ll
A llvm/test/CodeGen/AArch64/sve2p3-intrinsics/sve2p3-intrinsics-addsubp.ll
A llvm/test/CodeGen/AArch64/sve2p3-intrinsics/sve2p3-intrinsics-subp.ll
Log Message:
-----------
[Clang][AArch64][SVE2p3][SME2p3] Add intrinsics for v9.7a add/add-and-subtract/subtract pairwise operations (#187527)
Add the following new clang intrinsics based on the ACLE specification
https://github.com/ARM-software/acle/pull/428 (Add alpha support for 9.7
data processing intrinsics)
- ADDQP (Add pairwise within quadword vector segments)
- svint8_t svaddqp_s8(svint8_t, svint8_t) / svint8_t svaddqp(svint8_t,
svint8_t)
- svuint8_t svaddqp_u8(svuint8_t, svuint8_t) / svuint8_t
svaddqp(svuint8_t, svuint8_t)
- svint16_t svaddqp_s16(svint16_t, svint16_t) / svint16_t
svaddqp(svint16_t, svint16_t)
- svuint16_t svaddqp_u16(svuint16_t, svuint16_t) / svuint16_t
svaddqp(svuint16_t, svuint16_t)
- svint32_t svaddqp_s32(svint32_t, svint32_t) / svint32_t
svaddqp(svint32_t, svint32_t)
- svuint32_t svaddqp_u32(svuint32_t, svuint32_t) / svuint32_t
svaddqp(svuint32_t, svuint32_t)
- svint64_t svaddqp_s64(svint64_t, svint64_t) / svint64_t
svaddqp(svint64_t, svint64_t)
- svuint64_t svaddqp_u64(svuint64_t, svuint64_t) / svuint64_t
svaddqp(svuint64_t, svuint64_t)
- ADDSUBP (Add and subtract pairwise)
- svint8_t svaddsubp_s8(svint8_t, svint8_t) / svint8_t
svaddsubp(svint8_t, svint8_t)
- svuint8_t svaddsubp_u8(svuint8_t, svuint8_t) / svuint8_t
svaddsubp(svuint8_t, svuint8_t)
- svint16_t svaddsubp_s16(svint16_t, svint16_t) / svint16_t
svaddsubp(svint16_t, svint16_t)
- svuint16_t svaddsubp_u16(svuint16_t, svuint16_t) / svuint16_t
svaddsubp(svuint16_t, svuint16_t)
- svint32_t svaddsubp_s32(svint32_t, svint32_t) / svint32_t
svaddsubp(svint32_t, svint32_t)
- svuint32_t svaddsubp_u32(svuint32_t, svuint32_t) / svuint32_t
svaddsubp(svuint32_t, svuint32_t)
- svint64_t svaddsubp_s64(svint64_t, svint64_t) / svint64_t
svaddsubp(svint64_t, svint64_t)
- svuint64_t svaddsubp_u64(svuint64_t, svuint64_t) / svuint64_t
svaddsubp(svuint64_t, svuint64_t)
- SUBP (Subtract pairwise)
- svint8_t svsubp_s8(svbool_t, svint8_t, svint8_t) / svint8_t
svsubp(svbool_t, svint8_t, svint8_t)
- svuint8_t svsubp_u8(svbool_t, svuint8_t, svuint8_t) / svuint8_t
svsubp(svbool_t, svuint8_t, svuint8_t)
- svint16_t svsubp_s16(svbool_t, svint16_t, svint16_t) / svint16_t
svsubp(svbool_t, svint16_t, svint16_t)
- svuint16_t svsubp_u16(svbool_t, svuint16_t, svuint16_t) / svuint16_t
svsubp(svbool_t, svuint16_t, svuint16_t)
- svint32_t svsubp_s32(svbool_t, svint32_t, svint32_t) / svint32_t
svsubp(svbool_t, svint32_t, svint32_t)
- svuint32_t svsubp_u32(svbool_t, svuint32_t, svuint32_t) / svuint32_t
svsubp(svbool_t, svuint32_t, svuint32_t)
- svint64_t svsubp_s64(svbool_t, svint64_t, svint64_t) / svint64_t
svsubp(svbool_t, svint64_t, svint64_t)
- svuint64_t svsubp_u64(svbool_t, svuint64_t, svuint64_t) / svuint64_t
svsubp(svbool_t, svuint64_t, svuint64_t)
Commit: 4e6d3722fca73c97367720180a8d547057fda380
https://github.com/llvm/llvm-project/commit/4e6d3722fca73c97367720180a8d547057fda380
Author: Cullen Rhodes <cullen.rhodes at arm.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M llvm/lib/CodeGen/LiveDebugValues/VarLocBasedImpl.cpp
Log Message:
-----------
[LiveDebugValues] Use std::sort for register sorting in collectIDsForRegs (#194339)
VarLocBasedLDV::collectIDsForRegs sorts a SmallVector<Register> using
array_pod_sort which is a thin wrapper around qsort. That shows up as a hotspot
in compile-time profiles under __GI___qsort_r.
Switching this to an explicit-comparator llvm::sort call, which takes the
std::sort path instead improves compile-time with no change to code-size.
CTMark geomean:
- stage1-O0-g: -0.41%
- stage1-aarch64-O0-g: -0.58%
- stage2-O0-g: -0.40%
http://llvm-compile-time-tracker.com/compare.php?from=347aa3f6fbcc48cd752d02aa581b74c33d18dd41&to=cca8df56a576682510733c4c1b6fc12556e2dd7c&stat=instructions%3Au
Commit: 0a58d0ceb530a9caffd7126fe9c4bb98a79de1ac
https://github.com/llvm/llvm-project/commit/0a58d0ceb530a9caffd7126fe9c4bb98a79de1ac
Author: Sean Perry <perry at ca.ibm.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M clang/test/AST/ByteCode/cxx17.cpp
M clang/test/SemaCXX/cxx17-compat.cpp
Log Message:
-----------
[SystemZ] z/OS only accept C initialization (#194023)
The TLS support only accept compile constant expressions (both C and
C++) on z/OS. Add #if to skip these tests on z/OS.
Commit: 97dc0fcbceea0871ab86ecf6d534be42b42bc7d3
https://github.com/llvm/llvm-project/commit/97dc0fcbceea0871ab86ecf6d534be42b42bc7d3
Author: Nick Sarnie <nick.sarnie at intel.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M llvm/include/llvm/Transforms/IPO/Attributor.h
M llvm/lib/Transforms/IPO/Attributor.cpp
M llvm/lib/Transforms/IPO/AttributorAttributes.cpp
A llvm/test/Transforms/OpenMP/spirv_ctor.ll
Log Message:
-----------
[Attributor] Support SPIR-V address spaces (#192725)
Right now Attributor assumes that if the the target is a GPU is can use
a single set of address space numerical values to determine the local
address space, but that's not true in general, so add SPIR-V support,
which uses different values.
This fixes an instruction incorrectly being marked as dead and optimized
out for an OpenMP SPIR-V offloading example.
---------
Signed-off-by: Nick Sarnie <nick.sarnie at intel.com>
Commit: 555140f8bfd296948198ac8bd2f07692c132ded6
https://github.com/llvm/llvm-project/commit/555140f8bfd296948198ac8bd2f07692c132ded6
Author: sujianIBM <98488060+sujianIBM at users.noreply.github.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M llvm/utils/lit/tests/shtest-ulimit-nondarwin.py
Log Message:
-----------
[z/OS] Mark shtest-ulimit-nondarwin.py unsupported on zos. (#194016)
This PR marks llvm/utils/lit/tests/shtest-ulimit-nondarwin.py
unsupported on z/OS.
Commit: dd383b46106587f85cd4f82a4f67d05ea9ae37bd
https://github.com/llvm/llvm-project/commit/dd383b46106587f85cd4f82a4f67d05ea9ae37bd
Author: sujianIBM <98488060+sujianIBM at users.noreply.github.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M llvm/utils/lit/lit/TestingConfig.py
Log Message:
-----------
[z/OS] Add passing env vars in lit on z/OS. (#194017)
This PR adds passing environment variables in lit/TestingConfig.py on
z/OS.
Commit: 314c655470b03a8112b2a0107c99a61076852cca
https://github.com/llvm/llvm-project/commit/314c655470b03a8112b2a0107c99a61076852cca
Author: Felipe de Azevedo Piovezan <fpiovezan at apple.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
A lldb/test/API/functionalities/multi-breakpoint/Makefile
A lldb/test/API/functionalities/multi-breakpoint/TestMultiBreakpoint.py
A lldb/test/API/functionalities/multi-breakpoint/main.c
M lldb/tools/debugserver/source/JSON.h
M lldb/tools/debugserver/source/RNBRemote.cpp
M lldb/tools/debugserver/source/RNBRemote.h
Log Message:
-----------
[debugserver] Implement MultiBreakpoint (#192914)
This implements the packet as described in
https://github.com/llvm/llvm-project/pull/192910
The following PRs are related to the MultiBreakpoint feature:
* https://github.com/llvm/llvm-project/pull/192910
* https://github.com/llvm/llvm-project/pull/192914
* https://github.com/llvm/llvm-project/pull/192915
* https://github.com/llvm/llvm-project/pull/192919
* https://github.com/llvm/llvm-project/pull/192962
* https://github.com/llvm/llvm-project/pull/192964
* https://github.com/llvm/llvm-project/pull/192971
* https://github.com/llvm/llvm-project/pull/192988
Commit: 8e0011a2c686c371cf21fa05ff2ae955017e6e1d
https://github.com/llvm/llvm-project/commit/8e0011a2c686c371cf21fa05ff2ae955017e6e1d
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M llvm/test/Transforms/FunctionAttrs/nosync.ll
Log Message:
-----------
[FunctionAttrs] Remove declaration check lines (NFC) (#194384)
These are annoying, because they get dropped by UTC. We're not
inferring attributes on declarations anyway.
Commit: a94c11640bf228d68cb68be927ad2f8eccc16145
https://github.com/llvm/llvm-project/commit/a94c11640bf228d68cb68be927ad2f8eccc16145
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M llvm/test/Transforms/GlobalOpt/ctor-memset.ll
M llvm/test/Transforms/GlobalOpt/pr54572.ll
Log Message:
-----------
[GlobalOpt] Regenerate test checks (NFC) (#194385)
Commit: 5ee1495ab6529ba2ae8d4af98d5c42ab96d3441d
https://github.com/llvm/llvm-project/commit/5ee1495ab6529ba2ae8d4af98d5c42ab96d3441d
Author: Oleksandr Tarasiuk <oleksandr.tarasiuk at outlook.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Parse/ParseDeclCXX.cpp
M clang/test/Parser/static_assert.cpp
Log Message:
-----------
[Clang] fix parser recovery for invalid static_assert string messages (#187859)
Fixes #187690
---
This PR fixes parser recovery for invalid `static_assert` declarations
with string literal messages. The parser now stops the message lookahead
on `;` and `eof`, so invalid inputs are diagnosed as parse errors.
Commit: 78eccec0db8a7739151c6de12de0e130c820e20d
https://github.com/llvm/llvm-project/commit/78eccec0db8a7739151c6de12de0e130c820e20d
Author: Guray Ozen <guray.ozen at gmail.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
M mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp
M mlir/test/Dialect/LLVMIR/nvvm-transcendentals.mlir
M mlir/test/Target/LLVMIR/nvvm/transcendentals.mlir
Log Message:
-----------
[MLIR][NVVM] Add `nvvm.log2` OP (#193789)
Implement `nvvm.log2` with ftz flag
Commit: bc7e916974e9f2b17d4575db07d5a1adce98d120
https://github.com/llvm/llvm-project/commit/bc7e916974e9f2b17d4575db07d5a1adce98d120
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/VOP2Instructions.td
A llvm/test/CodeGen/AMDGPU/v_mac_f16-fpdp-rounding-mode.ll
Log Message:
-----------
AMDGPU: Address fixme for v_mac_f16 rounding mode (#194360)
This should use the f16/f64 rounding mode
Commit: c2ab7f2130bbd5fa8bb4a13e34454b91d4aa1d8f
https://github.com/llvm/llvm-project/commit/c2ab7f2130bbd5fa8bb4a13e34454b91d4aa1d8f
Author: Felipe de Azevedo Piovezan <fpiovezan at apple.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationServerLLGS.cpp
M lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationServerLLGS.h
Log Message:
-----------
[lldbremote][NFC] Factor out code handling breakpoint packets (#192915)
This commit extracts the code handling breakpoint packets into a helper
function that can be used by a future implementation of the
MultiBreakpointPacket.
It is meant to be purely NFC.
There are two functions handling breakpoint packets (`handle_Z` and
`handle_z`) with a lot of repeated code. This commit did not attempt to
merge the two, as that would make the diff much larger due to subtle
differences in the error message produced by the two. The only
deduplication done is in the code processing a GDBStoppointType, where a
helper struct (`BreakpointKind`) and function
(`std::optional<BreakpointKind> getBreakpointKind(GDBStoppointType
stoppoint_type)`) was created.
The following PRs are related to the MultiBreakpoint feature:
* https://github.com/llvm/llvm-project/pull/192910
* https://github.com/llvm/llvm-project/pull/192914
* https://github.com/llvm/llvm-project/pull/192915
* https://github.com/llvm/llvm-project/pull/192919
* https://github.com/llvm/llvm-project/pull/192962
* https://github.com/llvm/llvm-project/pull/192964
* https://github.com/llvm/llvm-project/pull/192971
* https://github.com/llvm/llvm-project/pull/192988
Commit: 57754e0965361493bb47ddd9a332519318dc40ff
https://github.com/llvm/llvm-project/commit/57754e0965361493bb47ddd9a332519318dc40ff
Author: Jonathan Thackray <jonathan.thackray at arm.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M clang/include/clang/Basic/AArch64CodeGenUtils.h
M clang/include/clang/Basic/arm_neon.td
M clang/include/clang/Basic/arm_sve.td
M clang/lib/CodeGen/TargetBuiltins/ARM.cpp
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_mmla-bf16.c
A clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_mmla-f16.c
A clang/test/CodeGen/AArch64/v9.7a-neon-mmla-intrinsics.c
A clang/test/Sema/AArch64/arm_sve_non_streaming_only_sve_AND_sve-b16mm.c
A clang/test/Sema/AArch64/arm_sve_non_streaming_only_sve_AND_sve2p2_AND_f16mm.c
M clang/test/Sema/aarch64-neon-target.c
M clang/test/Sema/aarch64-neon-without-target-feature.cpp
M llvm/lib/Target/AArch64/AArch64InstrFormats.td
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
A llvm/test/CodeGen/AArch64/neon-matmul-f16.ll
A llvm/test/CodeGen/AArch64/neon-matmul-f16f32mm.ll
A llvm/test/CodeGen/AArch64/sve-intrinsics-matmul-bf16.ll
A llvm/test/CodeGen/AArch64/sve-intrinsics-matmul-f16.ll
Log Message:
-----------
[AArch64][clang][llvm] Add ACLE Armv9.7 matrix multiply-accumulate intrinsics (#193017)
Implement new ACLE matrix multiply-accumulate intrinsics for Armv9.7:
```c
// 16-bit floating-point matrix multiply-accumulate.
// Only if __ARM_FEATURE_SVE_B16MM
// Variant also available for _f16 if (__ARM_FEATURE_SVE2p2 && __ARM_FEATURE_F16MM).
svbfloat16_t svmmla[_bf16](svbfloat16_t zda, svbfloat16_t zn, svbfloat16_t zm);
// Half-precision matrix multiply accumulating to single-precision instruction.
// Requires the +f16f32mm architecture extension.
float32x4_t vmmlaq_f32_f16(float32x4_t r, float16x8_t a, float16x8_t b);
// Non-widening half-precision matrix multiply instruction.
// Requires the +f16mm architecture extension.
float16x8_t vmmlaq_f16_f16(float16x8_t r, float16x8_t a, float16x8_t b);
```
Commit: 85935241b74f332a2d8c616510b7ef74ebe6a1ac
https://github.com/llvm/llvm-project/commit/85935241b74f332a2d8c616510b7ef74ebe6a1ac
Author: Andre Kuhlenschmidt <andre.kuhlenschmidt at gmail.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M flang/lib/Lower/OpenACC.cpp
M flang/lib/Semantics/canonicalize-acc.cpp
M flang/lib/Semantics/resolve-directives.cpp
M flang/test/Lower/OpenACC/Todo/do-loops-to-acc-loops-todo.f90
M flang/test/Semantics/OpenACC/acc-canonicalization-validity.f90
M flang/test/Semantics/OpenACC/acc-loop.f90
Log Message:
-----------
[flang][semantics][openacc] Allow collapse clauses on do concurrent (#192488)
This PR generalizes the semantic checking for collapse clauses to work
on `do concurrent` and fixes two bugs exposed along the way:
- The first was that `collapse (n)` where n < the number of nested loops
was giving an assertion violation.
- The second was do concurrent index variables were causing an assertion
violation because they hadn't been declared before looking them up.
The lowering is implemented as a TODO which will happen in a following
diff.
Commit: 5e451509b6e26a06b86d665d852a15c7e0a4c8ea
https://github.com/llvm/llvm-project/commit/5e451509b6e26a06b86d665d852a15c7e0a4c8ea
Author: Nick Sarnie <nick.sarnie at intel.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M offload/test/offloading/ctor_dtor.cpp
Log Message:
-----------
[offload][lit] Enable ctor_dtor.cpp on Intel GPUs (#194389)
It was fixed with https://github.com/llvm/llvm-project/pull/192725 and
https://github.com/llvm/llvm-project/pull/192730.
Signed-off-by: Nick Sarnie <nick.sarnie at intel.com>
Commit: c183492e609b57b4181de6c3f15c897f78d13ace
https://github.com/llvm/llvm-project/commit/c183492e609b57b4181de6c3f15c897f78d13ace
Author: sstwcw <su3e8a96kzlver at posteo.net>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M clang/lib/Format/UnwrappedLineParser.cpp
M clang/unittests/Format/FormatTest.cpp
M clang/unittests/Format/FormatTestComments.cpp
M clang/unittests/Format/TokenAnnotatorTest.cpp
Log Message:
-----------
[clang-format] Recognize more braced initializers (#192299)
new
```C++
a = {x * x, x * x};
```
old
```C++
a = {x * x, x *x};
```
Fixes #57442.
The patch makes the program treat a brace following an equal sign a
braced initializer.
The patch changes these tests.
- In UnderstandsSingleLineComments and CommentsInStaticInitializers, the
comment in the formatted code used to be on a separate line, now it is
on the same line as the brace. The new behavior is consistent with
comment in braced lists that are correctly identified. Here is the
code for it from the test LayoutCxx11BraceInitializers and the
function mustBreakBefore.
```C++
// In braced lists, the first comment is always assumed to belong to the
// first element. Thus, it can be moved to the next or previous line as
// appropriate.
verifyFormat("function({// First element:\n"
" 1,\n"
" // Second element:\n"
" 2});",
"function({\n"
" // First element:\n"
" 1,\n"
" // Second element:\n"
" 2});");
if (Right.is(tok::comment)) {
return Left.isNoneOf(BK_BracedInit, TT_CtorInitializerColon) &&
Right.NewlinesBefore > 0 && Right.HasUnescapedNewline;
}
```
- In FormatsBracedListsInColumnLayout, the style is configured to one
which allows a trailing comment in the first line.
Commit: 6b81cdb4d99c23106df7232f45aad7b0eff4e43c
https://github.com/llvm/llvm-project/commit/6b81cdb4d99c23106df7232f45aad7b0eff4e43c
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
A llvm/test/Transforms/SLPVectorizer/X86/identity-reuses-with-poisons.ll
Log Message:
-----------
[SLP]Fix crash in getReorderingData on all-poison reuse-mask slice
When the reuse-shuffle mask is iterated in Sz-sized parts and a part is
entirely PoisonMaskElem, `Val` stays at PoisonMaskElem (-1) and the
subsequent `UsedVals.test(Val)` trips the SmallBitVector OOB assertion.
Bail out of reordering in that case.
Fixes #194315
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/194392
Commit: b629f86f4f7b691fae18353a6ae3babe2ce9e9ec
https://github.com/llvm/llvm-project/commit/b629f86f4f7b691fae18353a6ae3babe2ce9e9ec
Author: LumioseSil <gfunni234 at gmail.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M llvm/lib/Target/ARM/ARMISelLowering.cpp
M llvm/lib/Target/ARM/ARMISelLowering.h
M llvm/test/CodeGen/ARM/vbits.ll
M llvm/test/CodeGen/Thumb2/mve-vselect-constants.ll
Log Message:
-----------
[ARM] hasAndNot in ARM supports vectors (#193614)
NEON and MVE have vector bic.
Commit: 4974ae5be557ab12a19748f0deff0713dd34957e
https://github.com/llvm/llvm-project/commit/4974ae5be557ab12a19748f0deff0713dd34957e
Author: Felipe de Azevedo Piovezan <fpiovezan at apple.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationServerLLGS.cpp
Log Message:
-----------
[lldb-server] Fix constexpr-if-else static assert (#194394)
Some old compilers complained about the `static_assert(false)` pattern.
Fixes https://lab.llvm.org/buildbot/#/builders/163/builds/39139
Commit: ec59f15927cccd303a5d096856f8ddb07697404e
https://github.com/llvm/llvm-project/commit/ec59f15927cccd303a5d096856f8ddb07697404e
Author: Volodymyr Turanskyy <Volodymyr.Turanskyy at arm.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M clang/lib/Driver/ToolChains/BareMetal.cpp
M clang/test/Driver/baremetal.cpp
Log Message:
-----------
[clang][Driver][BareMetal] Add profile library to the command line when needed (#191847)
Now that libclang_rt.profile.a supports bare-metal targets, follow other
drivers and add libclang_rt.profile.a in the BareMetal driver to the
command line automatically when needed, e.g. when
-fprofile-instr-generate is provided.
Commit: 77a360663d640d1426e6181c17f127d8877b014a
https://github.com/llvm/llvm-project/commit/77a360663d640d1426e6181c17f127d8877b014a
Author: Lucas Ramirez <11032120+lucas-rami at users.noreply.github.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M llvm/lib/CodeGen/Rematerializer.cpp
Log Message:
-----------
[CodeGen] Fix incorrect index in rematerialization tracking (#194387)
When deleting the last rematerialization of a register, we should delete
the rematerializer's remat tracking map's entry that corresponds to the
index of the *original* register, not the rematerialized register.
The existing typo has no impact on correctness at the moment because
entries with rematerialized register indices are never created (so there
is nothing to erase), and having an empty set in a value does not break
any code invariant; it just wastes memory.
Assisted-by: Claude Code
Commit: bd47069d8120c3c855a0446ef13c786517ff5c91
https://github.com/llvm/llvm-project/commit/bd47069d8120c3c855a0446ef13c786517ff5c91
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUMCInstLower.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.h
Log Message:
-----------
Reapply "AMDGPU: Implement getInstSizeVerifyMode" (#194026) (#194362)
This reverts commit 72ca372fa7c9029d2b7a77c59a4cc24530e99e43.
Commit: 6df5ced6c4a6878da98346c8ad69ab11d76b4280
https://github.com/llvm/llvm-project/commit/6df5ced6c4a6878da98346c8ad69ab11d76b4280
Author: Sergio Afonso <safonsof at amd.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M mlir/lib/Dialect/OpenMP/Transforms/StackToShared.cpp
Log Message:
-----------
[MLIR][OpenMP] Fix sanitizer issue related to stack-to-shared pass (#194397)
The OpenMP dialect stack-to-shared pass could try to access attributes
from a deleted operation. This updates it to get that information from
the operation created to replace it.
Commit: f5bb397d204dbe14eea2b7e20337accc1a375c6f
https://github.com/llvm/llvm-project/commit/f5bb397d204dbe14eea2b7e20337accc1a375c6f
Author: Jianhui Li <jian.hui.li at intel.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M mlir/lib/Dialect/XeGPU/IR/XeGPUDialect.cpp
M mlir/test/Dialect/XeGPU/propagate-layout-inst-data.mlir
Log Message:
-----------
[MLIR][XeGPU] Fix Layout collapse dims out of bounds (#193661)
Fix a bug in LayoutAttr::collapseDims() implementation.
---------
Co-authored-by: Claude Sonnet 4.5 <noreply at anthropic.com>
Commit: 8e8113fcb1bf54e7ea92151f8fb4b78fb79d3026
https://github.com/llvm/llvm-project/commit/8e8113fcb1bf54e7ea92151f8fb4b78fb79d3026
Author: jay0x <90309873+blazie2004 at users.noreply.github.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M flang/lib/Semantics/check-omp-structure.cpp
A flang/test/Semantics/OpenMP/workshare06.f90
Log Message:
-----------
[Flang][OpenMP] Allow Fortran BLOCK construct inside WORKSHARE region (#193352)
**Problem**
Flang incorrectly rejects Fortran BLOCK constructs inside OpenMP
WORKSHARE regions. This fixes the semantic check to recursively validate
the contents of BLOCK constructs instead of rejecting them.
The Fortran BLOCK construct (F2008) is a transparent scoping wrapper
that does not affect execution semantics. When a BLOCK appears inside a
WORKSHARE region, the restriction on allowed statements should apply to
the contents of the BLOCK, not the BLOCK construct itself.
**Fix**
The function CheckWorkshareBlockStmts (check-omp-structure.cpp) loops
through each statement inside a WORKSHARE region and checks if it's
allowed.
Before this fix, it only recognized:
```
Assignments, FORALL, WHERE statements
OpenMP constructs (ATOMIC, CRITICAL, PARALLEL)
When it saw a Fortran BLOCK, it didn't recognize it and threw an error.
```
When we see a BLOCK construct, instead of rejecting it, we "look inside"
and check if the statements inside the BLOCK are valid. This is done by
calling the same function recursively on the BLOCK's contents.
Issue : [192930](https://github.com/llvm/llvm-project/issues/192930)
---------
Co-authored-by: Jay Satish Kumar Patel <kumarpat at pe31.hpc.amslabs.hpecorp.net>
Commit: 67deb547101fa909eb8f3fbedabd2f2baa6180b1
https://github.com/llvm/llvm-project/commit/67deb547101fa909eb8f3fbedabd2f2baa6180b1
Author: Amilendra Kodithuwakku <amilendra.kodithuwakku at arm.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M clang/include/clang/Basic/arm_sve.td
A clang/test/CodeGen/AArch64/sve2p3-intrinsics/acle_sve2p3_svabal.c
M clang/test/Sema/AArch64/arm_sve_feature_dependent_sve_AND_LP_sve2p3_OR_sme2p3_RP___sme_AND_LP_sve2p3_OR_sme2p3_RP.c
A clang/test/Sema/aarch64-sve2p3-intrinsics/acle_sve2p3.cpp
M llvm/include/llvm/IR/IntrinsicsAArch64.td
M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
M llvm/lib/Target/AArch64/SVEInstrFormats.td
A llvm/test/CodeGen/AArch64/sve2p3-intrinsics/sve2p3-intrinsics-abal.ll
Log Message:
-----------
[Clang][AArch64][SVE2p3][SME2p3] Add intrinsics for v9.7a Two-way signed/unsigned absolute difference sum and accumulate long ops (#188972)
Add the following new clang intrinsics based on the ACLE specification
https://github.com/ARM-software/acle/pull/428 (Add alpha support for 9.7
data processing intrinsics)
SABAL (Two-way signed absolute difference sum and accumulate long)
- svint16_t svabal[_s16](svint16_t, svint8_t, svint8_t) / svint16_t
svabal[_n_s16](svint16_t, svint8_t, int8_t)
- svint32_t svabal[_s32](svint32_t, svint16_t, svint16_t) / svint32_t
svabal[_n_s32](svint32_t, svint16_t, int16_t)
- svint64_t svabal[_s64](svint64_t, svint32_t, svint32_t) / svint64_t
svabal[_n_s64](svint64_t, svint32_t, int32_t)
UABAL (Two-way unsigned absolute difference sum and accumulate long )
- svuint16_t svabal[_u16](svuint16_t, svuint8_t, svuint8_t) / svuint16_t
svabal[_n_u16](svuint16_t, svuint8_t, uint8_t)
- svuint32_t svabal[_u32](svuint32_t, svuint16_t, svuint16_t) /
svuint32_t svabal[_n_u32](svuint32_t, svuint16_t, uint16_t)
- svuint64_t svabal[_u64](svuint64_t, svuint32_t, svuint32_t) /
svuint64_t svabal[_n_u64](svuint64_t, svuint32_t, uint32_t)
Commit: 39e73ebff7fcccbfa064b1c73a33d91e44efa54e
https://github.com/llvm/llvm-project/commit/39e73ebff7fcccbfa064b1c73a33d91e44efa54e
Author: Sander de Smalen <sander.desmalen at arm.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/test/CodeGen/AArch64/partial-reduction-sub-fp.ll
Log Message:
-----------
[DAGcombine] Recognize fneg on RHS for partial_reduce_fmla (#193994)
PR #186809 recognized the negation on the fmul() expression, but after
instcombine the fneg is moved to the RHS operand, so with #186809 the
negation would not be recognized by the combine.
https://godbolt.org/z/YfoYshz78
Commit: ef18c253321fa5c0ca9f2200b9bd1f954a2b6d34
https://github.com/llvm/llvm-project/commit/ef18c253321fa5c0ca9f2200b9bd1f954a2b6d34
Author: Jakob Linke <jakob at linke.cx>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M clang/include/clang/AST/ASTFwd.h
M clang/include/clang/AST/ASTTypeTraits.h
M clang/include/clang/AST/DynamicRecursiveASTVisitor.h
M clang/include/clang/AST/RecursiveASTVisitor.h
M clang/lib/AST/ASTTypeTraits.cpp
M clang/lib/AST/DynamicRecursiveASTVisitor.cpp
M clang/unittests/Tooling/CMakeLists.txt
A clang/unittests/Tooling/RecursiveASTVisitorTests/OffsetOfExpr.cpp
Log Message:
-----------
[Clang][RAV] Visit components of __builtin_offsetof designators (#194122)
`RecursiveASTVisitor` previously only traversed the type operand of an
`OffsetOfExpr,` ignoring the field/identifier/base/array-index
components of the designator. This meant tools built on RAV (clang-tidy,
clangd, indexers, ...) silently missed every field reference inside
`__builtin_offsetof(T, a.b.c)`.
Add a `TraverseOffsetOfNode / VisitOffsetOfNode` pair following the same
pattern used for `ConceptReference`, `ObjCProtocolLoc`, and friends. The
`DEF_TRAVERSE_STMT` for `OffsetOfExpr` now invokes
`TraverseOffsetOfNode` for each component; array index expressions
continue to be reached via the existing children() traversal. Default
visitation is a no-op, so the change is opt-in for consumers and
behavior-preserving otherwise.
Also expose `OffsetOfNode` as a `DynTypedNode` kind via `ASTTypeTraits`
so that downstream machinery (`SelectionTree`, parent maps, matchers)
can reference these nodes uniformly.
The same gap exists for Designator inside `DesignatedInitExpr` and can
follow this recipe in a follow-up.
Related: https://github.com/llvm/llvm-project/pull/192953. The current
PR enables precise component resolves in clangd (support to be added in
a followup).
Commit: 2e5f8b2e12955bba4ef9e04a678ff079f809fa94
https://github.com/llvm/llvm-project/commit/2e5f8b2e12955bba4ef9e04a678ff079f809fa94
Author: Jeff Bailey <jbailey at raspberryginger.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M libc/config/linux/x86_64/headers.txt
M libc/include/CMakeLists.txt
A libc/include/sys/ucontext.h
Log Message:
-----------
[libc] Add sys/ucontext.h header (#194329)
POSIX historically provided <sys/ucontext.h> as an alias for
<ucontext.h>. Some software still includes the sys/ path. Added the
header as a simple wrapper that includes <ucontext.h>, gated to x86_64
alongside the existing ucontext support.
Commit: 395a56301ddc0ad641fb0dbcef7184f72640fe9d
https://github.com/llvm/llvm-project/commit/395a56301ddc0ad641fb0dbcef7184f72640fe9d
Author: Kartik Ohlan <kartik7ohlan at gmail.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp
M clang/test/CodeGen/AArch64/neon-intrinsics.c
M clang/test/CodeGen/AArch64/neon/intrinsics.c
Log Message:
-----------
[CIR] Vector-Saturating-shift-left intrinsics (#190728)
Part of #185382
1. Added NEON::BI__builtin_neon_vqshlud_n_s64:
2. Added NEON::BI__builtin_neon_vqshld_n_u64:
3. Added NEON::BI__builtin_neon_vqshld_u_u64:
Commit: 2a83068537786696d4950ce694e7d34480631f48
https://github.com/llvm/llvm-project/commit/2a83068537786696d4950ce694e7d34480631f48
Author: Kai Nacke <kai.peter.nacke at ibm.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M llvm/lib/Target/PowerPC/P10InstrResources.td
M llvm/lib/Target/PowerPC/PPCBack2BackFusion.def
M llvm/lib/Target/PowerPC/PPCInstr64Bit.td
M llvm/lib/Target/PowerPC/PPCInstrInfo.td
M llvm/lib/Target/PowerPC/PPCMacroFusion.def
M llvm/lib/Target/PowerPC/PPCRegisterClasses.td
M llvm/lib/Target/PowerPC/PPCRegisterInfo.td
M llvm/lib/Target/PowerPC/PPCScheduleP7.td
Log Message:
-----------
[PowerPC] Enable using HwMode for instructions (#191051)
The HwMode is already used for operands representing an effective
address. It can also be used for general purpose registers but this is
not clear from the naming. This change
- introduces the hw-mode dependent register class `GxRC`, and the
associated register operands
- removes register class `ptr_rc_idx_by_hwmode`, and replaces the only
use with `gxrc`
- uses the `EQV` instruction as an example how to use the new class
Commit: e33bac0f2c4ccbabe1d58ee82e0985c8e780d606
https://github.com/llvm/llvm-project/commit/e33bac0f2c4ccbabe1d58ee82e0985c8e780d606
Author: Felipe de Azevedo Piovezan <fpiovezan at apple.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M lldb/include/lldb/Utility/StringExtractorGDBRemote.h
M lldb/packages/Python/lldbsuite/test/tools/lldb-server/gdbremote_testcase.py
M lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationServerLLGS.cpp
M lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationServerLLGS.h
M lldb/source/Utility/StringExtractorGDBRemote.cpp
M lldb/test/API/functionalities/multi-breakpoint/TestMultiBreakpoint.py
Log Message:
-----------
[lldbremote] Implement support for MultiBreakpoint packet (#192919)
This is fairly straightforward, thanks to the helper functions created
in the previous commit.
The following PRs are related to the MultiBreakpoint feature:
* https://github.com/llvm/llvm-project/pull/192910
* https://github.com/llvm/llvm-project/pull/192914
* https://github.com/llvm/llvm-project/pull/192915
* https://github.com/llvm/llvm-project/pull/192919
* https://github.com/llvm/llvm-project/pull/192962
* https://github.com/llvm/llvm-project/pull/192964
* https://github.com/llvm/llvm-project/pull/192971
* https://github.com/llvm/llvm-project/pull/192988
Commit: 4f3bed19b0aaff893ef0f0329eccda9016cd2f3d
https://github.com/llvm/llvm-project/commit/4f3bed19b0aaff893ef0f0329eccda9016cd2f3d
Author: Harald van Dijk <hdijk at accesssoftek.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M llvm/lib/Target/DirectX/DirectXIRPasses/PointerTypeAnalysis.cpp
A llvm/test/CodeGen/DirectX/global-variable.ll
A llvm/test/tools/dxil-dis/opaque-pointers-var.ll
Log Message:
-----------
[DirectX] Emit unresolved ptr as i8* (#192086)
We cannot use dxilOpaquePtrReservedName in this test as that is the
wrong type for the null initializer.
Commit: b5f3c12c02d8384868845f5bd82f171947917d15
https://github.com/llvm/llvm-project/commit/b5f3c12c02d8384868845f5bd82f171947917d15
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRV.h
M llvm/lib/Target/SPIRV/SPIRVPassRegistry.def
M llvm/lib/Target/SPIRV/SPIRVPrepareFunctions.cpp
A llvm/lib/Target/SPIRV/SPIRVPrepareFunctions.h
M llvm/lib/Target/SPIRV/SPIRVPrepareGlobals.cpp
A llvm/lib/Target/SPIRV/SPIRVPrepareGlobals.h
M llvm/lib/Target/SPIRV/SPIRVTargetMachine.cpp
A llvm/test/CodeGen/SPIRV/passes/SPIRVPrepareFunctions.ll
M llvm/test/CodeGen/SPIRV/passes/SPIRVPrepareGlobals-predicate-id-string.ll
A llvm/test/CodeGen/SPIRV/passes/SPIRVPrepareGlobals.ll
M llvm/test/CodeGen/SPIRV/passes/translate-aggregate-uaddo.ll
Log Message:
-----------
[SPIR-V][NewPM] Register SPIRVPrepareFunctions and SPIRVPrepareGlobals with the new pass manager (#194024)
Rename the legacy pass IDs to spirv-prepare-functions and
spirv-prepare-globals for consistency with the other SPIR-V passes and
add opt-driven lit tests for both passes
Commit: 0b8f8264d687d75165dffa6f2cd80f715a864b86
https://github.com/llvm/llvm-project/commit/0b8f8264d687d75165dffa6f2cd80f715a864b86
Author: Kai Nacke <kai.peter.nacke at ibm.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M llvm/lib/Target/PowerPC/PPCISelLowering.cpp
M llvm/lib/Target/PowerPC/PPCISelLowering.h
M llvm/lib/Target/PowerPC/PPCInstr64Bit.td
M llvm/lib/Target/PowerPC/PPCInstrInfo.td
Log Message:
-----------
[PowerPC] Simplify implementation of atomis loads (#191044)
The code for atomic loads is verbose. There are 10 different operations
and 4 memory sizes to support, which means 40 pseudo instructions are
used, with all the details repeated. This PR changes the following:
- Use a loop over the operations and the sizes to create the pseudo
instruction
- Adds the memory size as last operand to the pseudo instruction
- Updates the C++ code to take advantage of the memory size in the
pseudo instruction
Commit: e52e9e33fc0c11172ac4b9c22793e269b538404d
https://github.com/llvm/llvm-project/commit/e52e9e33fc0c11172ac4b9c22793e269b538404d
Author: Igor Wodiany <igor.wodiany at amd.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M mlir/test/Dialect/SPIRV/IR/types.mlir
Log Message:
-----------
[mlir][spirv] Add CoopMatrix type tests for fp8 and bf16 element types (#193805)
Commit: 4d20831a6562ecc5e0b87d5785b2911060c3ab41
https://github.com/llvm/llvm-project/commit/4d20831a6562ecc5e0b87d5785b2911060c3ab41
Author: Brendan Dahl <brendan.dahl at gmail.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
M llvm/test/CodeGen/WebAssembly/f16-intrinsics.ll
Log Message:
-----------
[WebAssembly] Support f16x8.demote_f32x4_zero (#193564)
Add support for the f16x8.demote_f32x4_zero instruction. This
instruction converts a v4f32 vector to a v4f16 and pads the result with
zeros to fill the 128-bit register.
This enables efficient lowering of fptrunc operations from v4f32 to
v4f16 when the result is zero-extended or when only the low lanes are
needed. A DAG combine is included to recognize these patterns and fold
them into the new instruction.
Commit: 35fffe03aefcdc088d3bc0c1410d179ca33b8fd4
https://github.com/llvm/llvm-project/commit/35fffe03aefcdc088d3bc0c1410d179ca33b8fd4
Author: Igor Wodiany <igor.wodiany at amd.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVBase.td
M mlir/lib/Dialect/SPIRV/IR/SPIRVTypes.cpp
M mlir/test/Dialect/SPIRV/Transforms/vce-deduction.mlir
Log Message:
-----------
[mlir][spirv] Add missing capabilities for CoopMatrix in TypeExtensionVisitor (#193803)
This adds missing capabilities when CoopMatrix is used with bf16 and
fp8.
Assisted-by: Codex
Commit: 1b065445a6b81c00d7a816d64708731ad8807f70
https://github.com/llvm/llvm-project/commit/1b065445a6b81c00d7a816d64708731ad8807f70
Author: adams381 <adams at nvidia.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/lib/CIR/CodeGen/CIRGenBuiltin.cpp
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
A clang/test/CIR/CodeGenBuiltins/builtin-float.c
Log Message:
-----------
[CIR] Emit frexp, modf, and powi builtins as library calls (#193795)
`__builtin_frexpf`, `__builtin_modf`, `__builtin_powi`, and related
builtins were incorrectly falling through to the `__builtin_isnan`
handler in `emitBuiltinExpr`, which calls `createBoolToInt` /
`createIsFPClass`. This produced a `cir.cast` with an integer result
type when the actual return type is floating-point, failing CIR
verification.
Break out of the switch so these builtins fall through to the
`isLibFunction()` path, which emits them as regular library calls.
Made with [Cursor](https://cursor.com)
Commit: d071e4b765dfadc1472b97d09f5014c92ab27ead
https://github.com/llvm/llvm-project/commit/d071e4b765dfadc1472b97d09f5014c92ab27ead
Author: adams381 <adams at nvidia.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M clang/lib/CIR/Dialect/Transforms/FlattenCFG.cpp
A clang/test/CIR/CodeGen/try-no-throwing-calls.cpp
Log Message:
-----------
[CIR] Fix eraseOp assertion in TryOp flattening with unreachable handlers (#193615)
When a try block has catch handlers but no throwing calls, the handler
regions are unreachable and the TryOp is erased. However, ops inside the
handler regions may reference values that were inlined from the try body
into the parent block, causing an assertion in `eraseOp` ("expected that
op has no uses").
This drops all defined value uses from handler regions before erasing
the TryOp.
Made with [Cursor](https://cursor.com)
Commit: 916cd558c10bf520dd0c1bdd3849fa6163b53795
https://github.com/llvm/llvm-project/commit/916cd558c10bf520dd0c1bdd3849fa6163b53795
Author: eiytoq <eiytoq at outlook.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Parse/Parser.h
M clang/lib/Parse/ParseDecl.cpp
M clang/lib/Parse/ParseDeclCXX.cpp
M clang/test/CodeGenCXX/mangle-requires.cpp
Log Message:
-----------
[Clang] Avoid an extra `FunctionPrototypeScope` for lambda trailing requires-clauses (#194068)
`ParseTrailingRequiresClause` currently always creates a synthetic
`FunctionPrototypeScope`. This is needed for ordinary function
declarators
whose prototype scope has already ended, but it is wrong for lambda
trailing
requires-clauses because they are parsed while the lambda prototype
scope is
still active.
The extra counted scope gives parameters in nested requires-expressions
an
incorrect function scope depth. Split the synthetic prototype-scope
setup from
the trailing requires-clause parser so the lambda path can parse the
clause in
the existing prototype scope.
Fixes: #123854
Fixes: #100774
Commit: cf4f678f0448803be0fb98545336ca902352bc65
https://github.com/llvm/llvm-project/commit/cf4f678f0448803be0fb98545336ca902352bc65
Author: Ivan R. Ivanov <iivanov at nvidia.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M offload/plugins-nextgen/common/src/PluginInterface.cpp
Log Message:
-----------
[Offload] Make kernel dynamic memory handling more generic (#194403)
Make sure we do not get unexpected NumThreads and NumBlocks values when
launching non-bare kernels, and generalize the computation of the
dynamic block memory allocation to handle multi-dimensional blocks.
The DynBlockMem fallback is never used in a non-bare context where
`NumBlocks[1]` and `NumBlocks[2]` are not 1 so the code was correct, but
this patch makes sure that assumption is made explicit, and also
future-proofs the code in case we decide to allow multi-dimensional
blocks for fallback dyn block mem in some path.
Commit: 71d63d61072166d7ba744464db8781389a3474c9
https://github.com/llvm/llvm-project/commit/71d63d61072166d7ba744464db8781389a3474c9
Author: Alex Langford <alangford at apple.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M lldb/test/API/functionalities/inline-sourcefile/Makefile
Log Message:
-----------
[lldb][test] Fix Makefile for TestInlineSourceFiles.py (#194078)
The test did not build hidden.o with a custom target triple when
specified. Use CFLAGS from Makefile.rules to fix.
Commit: fb4ce472adb9f65acb150d4e2db5446524458b90
https://github.com/llvm/llvm-project/commit/fb4ce472adb9f65acb150d4e2db5446524458b90
Author: Harald van Dijk <hdijk at accesssoftek.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M llvm/lib/Target/DirectX/CMakeLists.txt
M llvm/lib/Target/DirectX/DXILWriter/CMakeLists.txt
M llvm/lib/Target/DirectX/DXILWriter/DXILBitcodeWriter.cpp
M llvm/lib/Target/DirectX/DXILWriter/DXILBitcodeWriter.h
M llvm/lib/Target/DirectX/DXILWriter/DXILValueEnumerator.cpp
M llvm/lib/Target/DirectX/DXILWriter/DXILValueEnumerator.h
M llvm/lib/Target/DirectX/DXILWriter/DXILWriterPass.cpp
M llvm/lib/Target/DirectX/DirectXIRPasses/CMakeLists.txt
A llvm/lib/Target/DirectX/DirectXIRPasses/DXILDebugInfo.cpp
A llvm/lib/Target/DirectX/DirectXIRPasses/DXILDebugInfo.h
M llvm/unittests/Target/DirectX/CMakeLists.txt
Log Message:
-----------
[DirectX] Add DXILDebugInfo pass (#191254)
The pass is enabled for DXILBitcodeWriter and ValueEnumerator to
transform LLVM IR and provide data required to lower it to DXIL.
There are 3 ways how DXILDebugInfo pass can change lowering to DXIL:
1. Transform LLVM IR directly in DXILDebugInfoPass::run. This works well
when the target IR does not break any invariants of LLVM IR.
2. Add extra metadata for ValueEnumerator to process with MDExtra map.
When ValueEnumerator enumerates a Key of MDExtra, it also follows the
Value and all its operands.
3. Replace a metadata for ValueEnumerator with a another metadata. When
ValueEnumerator enumerates a Key of MDReplace, or when the writer uses
getMetadataID, the corresponding value of MDReplace map is returned
instead.
Co-authored-by: Andrew Savonichev <andrew.savonichev at gmail.com>
Commit: 5fb8cb1508eef28f7ee7612e335bb907bcf8ead5
https://github.com/llvm/llvm-project/commit/5fb8cb1508eef28f7ee7612e335bb907bcf8ead5
Author: Alex Langford <alangford at apple.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M lldb/test/API/macosx/arm-pointer-metadata-cfa-dwarf-expr/Makefile
Log Message:
-----------
[lldb][test] Fix Makefile for TestArmPointerMetadataCFADwarfExpr.py (#194075)
The makefile did not respect custom target triples. Fixed by using
CFLAGS from Makefile.rules.
Commit: 0065d2e62be6f5f732bf32ecb1fe7f24a0de86e5
https://github.com/llvm/llvm-project/commit/0065d2e62be6f5f732bf32ecb1fe7f24a0de86e5
Author: Alex Langford <alangford at apple.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M lldb/test/API/functionalities/valobj_errors/Makefile
Log Message:
-----------
[lldb][test] Fix Makefile for TestValueObjectErrors.py (#194071)
This test does not respect custom triples. hidden.c is intended to be
built with no debug info, so pass `-g0` after CFLAGS.
Commit: 1c62578d1a051dd63f5d2594ca0d85eac13d5c3d
https://github.com/llvm/llvm-project/commit/1c62578d1a051dd63f5d2594ca0d85eac13d5c3d
Author: Ramkumar Ramachandra <artagnon at tenstorrent.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
M llvm/test/Transforms/InstCombine/RISCV/riscv-vmv-v-x.ll
Log Message:
-----------
[RISCV] Fix inf-loop on equal num-elts in vmv.v.x fold (#194410)
Commit: d9b7786e74f8decbbd286f2495309f4e6d488f95
https://github.com/llvm/llvm-project/commit/d9b7786e74f8decbbd286f2495309f4e6d488f95
Author: David Green <david.green at arm.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M llvm/test/CodeGen/AArch64/arm64-neon-aba-abd.ll
M llvm/test/CodeGen/AArch64/neon-saba.ll
Log Message:
-----------
[AArch64] Addition tests for add_like Or of saba. NFC (#194416)
Commit: b39057a228804e7f920a04e466dc2e97e2e75442
https://github.com/llvm/llvm-project/commit/b39057a228804e7f920a04e466dc2e97e2e75442
Author: Raphael Isemann <rise at apple.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
R lldb/test/API/functionalities/dead-strip/cmds.txt
R lldb/test/API/functionalities/load_unload/cmds.txt
R lldb/test/API/lang/c/array_types/cmds.txt
R lldb/test/API/lang/c/global_variables/cmds.txt
R lldb/test/API/lang/cpp/class_types/cmds.txt
R lldb/test/API/lang/cpp/namespace/cmds.txt
R lldb/test/API/lang/cpp/stl/cmds.txt
R lldb/test/API/macosx/order/cmds.txt
Log Message:
-----------
[lldb][test] Delete obsolete cmds.txt (#194390)
Last time I asked about these files someone mentioned they were once
used to replay a test.
However, I think by now these files are mostly out of sync with their
tests and few people anyway know these files exist in the first place.
Commit: 8d9299cd7af594767485c5d73b5a103b949b7700
https://github.com/llvm/llvm-project/commit/8d9299cd7af594767485c5d73b5a103b949b7700
Author: Joshua Cranmer <joshua.cranmer at intel.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M llvm/docs/LangRef.rst
M llvm/docs/ReleaseNotes.md
M llvm/include/llvm/ADT/APFloat.h
M llvm/include/llvm/AsmParser/LLLexer.h
M llvm/include/llvm/AsmParser/LLToken.h
M llvm/lib/AsmParser/LLLexer.cpp
M llvm/lib/AsmParser/LLParser.cpp
M llvm/lib/CodeGen/MIRParser/MILexer.cpp
M llvm/lib/Support/APFloat.cpp
M llvm/test/Assembler/2006-09-28-CrashOnInvalid.ll
A llvm/test/Assembler/float-literals.ll
A llvm/test/Assembler/invalid-call-float-literal.ll
A llvm/test/Assembler/invalid-uselistorder_bb-float-literal.ll
M llvm/test/CodeGen/MIR/NVPTX/floating-point-invalid-type-error.mir
M llvm/unittests/AsmParser/AsmParserTest.cpp
Log Message:
-----------
[AsmParser] Revamp how floating-point literals work in LLVM IR. (#190641)
This adds support for the following kinds of formats:
* Hexadecimal literals like 0x1.fp13
* Special values +inf/-inf, +qnan/-qnan
* NaN values with payloads like +nan(0x1)
Additionally, the floating-point hexadecimal format that records the
bitpattern exactly no longer requires the 0xL or 0xK or similar code for
the floating-point type. The current hexadecimal syntax is retained for
the moment, but it is expected to be ripped out after the next release
of LLVM.
These changes were discussed in an RFC at
https://discourse.llvm.org/t/rfc-floating-point-literals-in-llvm-ir/82974.
Commit: 18053e3c6ac0c57a43d9b5db5d5a7db9675ef364
https://github.com/llvm/llvm-project/commit/18053e3c6ac0c57a43d9b5db5d5a7db9675ef364
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
A llvm/test/Transforms/SLPVectorizer/X86/non-schedulable-with-multi-used-expanded.ll
Log Message:
-----------
[SLP]Bail out on non-schedulable expanded binop with multi-use operand
In tryScheduleBundle's DoesNotRequireScheduling path, an expanded binop
(shl X, 1 modeled as add X, X) doubles the dependency count of the
duplicated operand. Unlike the regular scheduling path, this branch does
not clear stale operand ScheduleData dependencies, so when that operand
has more uses than this bundle member the schedule's decrement count
exceeds calculateDependencies' increment count and UnscheduledDeps goes
negative, hitting "Expected valid number of unscheduled deps".
Fixes #194303.
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/194420
Commit: f0a46d1002993fa748e4d53565359c787ec3363a
https://github.com/llvm/llvm-project/commit/f0a46d1002993fa748e4d53565359c787ec3363a
Author: youngd007 <davidayoung at meta.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/third-party/BUILD.bazel
Log Message:
-----------
Have LLVM_ENABLE_ZSTD defined as 0 in base select condition (#194413)
Very similar to https://github.com/llvm/llvm-project/pull/184525. When
this define is not present in the default select() condition, there is
an issue building lldb using this build.bazel as a base for a BUCK file.
Commit: 60dbe3fe4051f30ac12f0de56116faf2c516c313
https://github.com/llvm/llvm-project/commit/60dbe3fe4051f30ac12f0de56116faf2c516c313
Author: Sergei Druzhkov <serzhdruzhok at gmail.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M lldb/test/API/macosx/dsym_codesign/TestdSYMCodesign.py
Log Message:
-----------
[lldb] Fix has_lldb_codesign check (#194412)
I met a problem with this test on WSL. WSL has access to Windows's
files. Windows distribution has `security` dir (
`/mnt/c/Windows/security` from WSL point of view). So when we try to run
`security` command we get `PermissionError` instead of
`FileNotFoundError`. It is would not be a problem, but Python firstly
calls decorators for methods (see example below), so we call
`has_lldb_codesign()` not only on Darwin platform. Also I think some
Linux distros might have `security` command, so the current check is not
robust enough.
```python
import unittest
def checker():
raise Exception("test")
@unittest.skipUnless(False, "")
class Tests(unittest.TestCase):
@unittest.skipUnless(checker(), ())
def test():
pass
```
Commit: 37c7ada5de27348b6bf46c788f2714f3c859e32e
https://github.com/llvm/llvm-project/commit/37c7ada5de27348b6bf46c788f2714f3c859e32e
Author: Eugene Epshteyn <eepshteyn at nvidia.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M flang/test/Lower/polymorphic-temp.f90
M flang/test/Lower/polymorphic-types.f90
M flang/test/Lower/procedure-declarations.f90
M flang/test/Lower/read-write-buffer.f90
M flang/test/Lower/real-operations-2.f90
Log Message:
-----------
[flang][NFC] Converted five tests from old lowering to new lowering (part 50) (#194277)
Tests converted from test/Lower: polymorphic-temp.f90,
polymorphic-types.f90, procedure-declarations.f90,
read-write-buffer.f90, real-operations-2.f90
Commit: 20ff4a1f5c911be0f84a61010ecf6f71caa867b0
https://github.com/llvm/llvm-project/commit/20ff4a1f5c911be0f84a61010ecf6f71caa867b0
Author: AbdallahRashed <63146988+AbdallahRashed at users.noreply.github.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenVTables.cpp
A clang/test/CIR/CodeGen/vtable-linkage-explicit-instantiation.cpp
Log Message:
-----------
[CIR] Handle explicit instantiation declaration in getVTableLinkage (#193809)
Replace errorNYI for TSK_ExplicitInstantiationDeclaration with the
correct linkage logic: use discardable ODR linkage for MSVC, and for
Itanium choose between AvailableExternallyLinkage (when the vtable can
be speculatively emitted) or ExternalLinkage.
Fixes point 3 of #192330.
Commit: 11bd02895da137a46fb37cc33df8f66862e53351
https://github.com/llvm/llvm-project/commit/11bd02895da137a46fb37cc33df8f66862e53351
Author: Jared Hoberock <jaredhoberock at gmail.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M mlir/lib/Conversion/GPUCommon/GPUToLLVMConversion.cpp
A mlir/test/Conversion/GPUCommon/lower-async-to-gpu-runtime-calls.mlir
Log Message:
-----------
[MLIR][GPU] Fix async.yield gpu.async.token lowering race (#190717)
Root cause of #170833 (flakiness of `Integration/GPU/CUDA/async.mlir` on
the Tesla T4 mlir-nvidia buildbot).
In `gpu-to-llvm`, two patterns matched `async.yield` with the same
benefit: the structural `ConvertYieldOpTypes` from
`populateAsyncStructuralTypeConversionsAndLegality` (which just retypes
operands), and `ConvertAsyncYieldToGpuRuntimeCallPattern` (which also
creates and records an event on the stream backing each
`gpu.async.token` operand). When the IR contained `gpu.launch_func`, the
dialect-conversion framework picked the structural pattern, silently
dropping the event record. The `async.execute` then yielded a stream
pointer where its consumers expected an event, and the host await ended
up calling `cuEventSynchronize` on a stream pointer. That call returns
an error without waiting, so the host raced against the GPU.
This change implements a fix which registers
`ConvertAsyncYieldToGpuRuntimeCallPattern` with pattern benefit 2 so it
wins on yields carrying `gpu.async.token` operands. The structural
rewriter still handles yields without token operands.
Also adds a new test `lower-async-to-gpu-runtime-calls.mlir` to check
the correct IR shape of `async.yield` after a `gpu.launch_func`.
Assisted-by: Claude
Fixes #170833
Commit: f80b50bb6c5df237a15bdc4578c8b6aaf59fb3b1
https://github.com/llvm/llvm-project/commit/f80b50bb6c5df237a15bdc4578c8b6aaf59fb3b1
Author: Balázs Benics <benicsbalazs at gmail.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/CheckerContext.h
M clang/lib/StaticAnalyzer/Checkers/GenericTaintChecker.cpp
M clang/lib/StaticAnalyzer/Core/CheckerContext.cpp
Log Message:
-----------
[analyzer] Fix use-after-free in CheckerContext::getMacroNameOrSpelling (#194174)
This UAF bug was introduced 14 years ago, in 43de767b55c07.
The first use of this API was in
3b754b25bde4914e5ab693e7db9533c3260e926e, roughly around the same era.
It was dormant because the first param of `socket` and friends are
macros, and those didn't trigger this UAF.
I decided to go against adding a test because I figure that would be not
really meaningful.
Fixes #194136
Commit: 89901f2beaac7be382a8e63fd40b98b6c54c551b
https://github.com/llvm/llvm-project/commit/89901f2beaac7be382a8e63fd40b98b6c54c551b
Author: Tom Stellard <tstellar at redhat.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M .github/workflows/issue-subscriber.yml
Log Message:
-----------
workflows/issue-subscriber: Use a GitHub app token (#194073)
This removes one user of the ISSUE_SUBSCRIBER_TOKEN secret, which we
want to eventually remove since secrets are more difficult to maintain.
Commit: f82e4e95ab0adbe26569060202af64f9ef936a85
https://github.com/llvm/llvm-project/commit/f82e4e95ab0adbe26569060202af64f9ef936a85
Author: khaki3 <47756807+khaki3 at users.noreply.github.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M flang/lib/Optimizer/Transforms/CUDA/CUFAddConstructor.cpp
M flang/lib/Optimizer/Transforms/CUDA/CUFDeviceGlobal.cpp
M flang/test/Fir/CUDA/cuda-constructor-2.f90
M flang/test/Fir/CUDA/cuda-device-global.f90
Log Message:
-----------
[flang][cuda] Fix CUFDeviceGlobal duplicate skip and CUFAddConstructor for empty gpu.module (#194290)
**Fix 1:**
```fortran
module m
real, device :: a(3), b(3), c(3)
contains
attributes(global) subroutine kernel()
a(1) = 1.0
end subroutine
end module
```
When a kernel references global `a`, an earlier pass
(`CUFDeviceFuncTransform`) clones it into the `gpu.module`. When
`CUFDeviceGlobal` later processes all device globals, it finds `a`
already exists, and `break` exits the loop — skipping `b` and `c`
entirely.
Fix: Change `break` to `continue` in `CUFDeviceGlobal.cpp`.
**Fix 2:**
```fortran
module kernels_m
real, device :: dev_var
contains
attributes(global) subroutine my_kernel()
end subroutine
end module
program main
use kernels_m
end program
```
When a compilation unit USEs a CUDA module but defines no kernels
itself, the empty `gpu.module` is still registered with the CUDA
runtime, causing `cudaErrorNoKernelImageForDevice`.
Fix: Return early from the constructor if the `gpu.module` has no
kernels. Also skip variable registration for globals not in the
`gpu.module`.
Commit: 4e302b684d885e11de1c9144db2d48c483c6339f
https://github.com/llvm/llvm-project/commit/4e302b684d885e11de1c9144db2d48c483c6339f
Author: adams381 <adams at nvidia.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M clang/lib/CIR/Dialect/Transforms/FlattenCFG.cpp
A clang/test/CIR/Transforms/flatten-try-catch-cleanup.cir
Log Message:
-----------
[CIR] Remove overly strict end_catch assertion in catch handler flattening (#193796)
The assertion in `flattenCatchHandler` required `end_catch` to be the
last operation before `yield` in catch handlers, with only branches in
between. Complex catch handlers with cleanup code or nested control flow
can have additional operations between `end_catch` and `yield`. The
yield-to-branch replacement does not depend on `end_catch` position.
Made with [Cursor](https://cursor.com)
Commit: 549a952fd53b14ee28ed898791e1a90be5c0940d
https://github.com/llvm/llvm-project/commit/549a952fd53b14ee28ed898791e1a90be5c0940d
Author: Farzon Lotfi <farzonlotfi at microsoft.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M clang/include/clang/Basic/Attr.td
M clang/include/clang/Basic/AttrDocs.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Basic/TokenKinds.def
M clang/include/clang/Sema/SemaHLSL.h
M clang/lib/Parse/ParseDecl.cpp
M clang/lib/Parse/ParseTentative.cpp
M clang/lib/Sema/SemaDeclAttr.cpp
M clang/lib/Sema/SemaHLSL.cpp
M clang/lib/Sema/SemaTemplateInstantiateDecl.cpp
A clang/test/AST/HLSL/matrix_layout_attr.hlsl
A clang/test/Sema/hlsl_matrix_layout_non_hlsl.cpp
A clang/test/SemaHLSL/matrix_layout_attr.hlsl
Log Message:
-----------
[HLSL][Matrix] Add Matrix Layout Keywords (#192284)
fixes #192263
HLSL allows per-declaration matrix layout overrides via the row_major
and column_major keywords. Prior to this commit, matrix layout was only
controlled globally via the -fmatrix-memory-layout command-line flag
(LangOptions::DefaultMatrixMemoryLayout). This commit adds the parsing
and semantic analysis infrastructure needed to support per-declaration
layout, matching DXC behavior.
Assisted-by: Claude Opus 4.6
Commit: 0341a4fec3e4d604d51e444bec2d49c85e268046
https://github.com/llvm/llvm-project/commit/0341a4fec3e4d604d51e444bec2d49c85e268046
Author: khaki3 <47756807+khaki3 at users.noreply.github.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M flang/lib/Optimizer/Transforms/CUDA/CUFAllocationConversion.cpp
M flang/test/Fir/CUDA/cuda-alloc-free.fir
Log Message:
-----------
[flang][cuda] Include constant extents in cuf.alloc size computation (#194288)
Example:
```fortran
real, device :: arr(n, 4, m)
```
For arrays with mixed constant and dynamic extents
(`!fir.array<?x4x?xf32>`), the allocation size only includes the dynamic
extents (`n * m * 4 bytes`), missing the constant extent `4`. This
under-allocates by a factor of 4, causing `cudaErrorIllegalAddress`.
Fix: After multiplying the dynamic extents, also multiply in constant
extents from the type, producing the correct size (`n * m * 4 * 4
bytes`).
Commit: 0b1d2d1bfee3fb9af0a2bcdc9782c7e71126f166
https://github.com/llvm/llvm-project/commit/0b1d2d1bfee3fb9af0a2bcdc9782c7e71126f166
Author: Slava Zakharin <szakharin at nvidia.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M flang/lib/Optimizer/OpenACC/Support/FIROpenACCUtils.cpp
Log Message:
-----------
[NFC][flang] Reodered checks for concrete ops and ifaces. (#193879)
It is a good idea, in general, to check for concrete operations,
first, and then handle generic interfaces.
Commit: 5ea9d1045d4cb641d05e5dc6c90b2659a48ed543
https://github.com/llvm/llvm-project/commit/5ea9d1045d4cb641d05e5dc6c90b2659a48ed543
Author: Jack Styles <jack.styles at arm.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M llvm/lib/CodeGen/MachineCopyPropagation.cpp
Log Message:
-----------
[MCP][NFC] Add Cost modelling for EliminateSpillageCopies (#193905)
Commit: fe587c5ad92b94c18da2d22d4ce911cd7f614202
https://github.com/llvm/llvm-project/commit/fe587c5ad92b94c18da2d22d4ce911cd7f614202
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M llvm/unittests/ADT/CMakeLists.txt
A llvm/unittests/ADT/StableHashingTest.cpp
Log Message:
-----------
[NFC][ADT] Add unit tests for StableHashing (#194286)
>From #105849 the documentation promises that stable hash is stable
across different machines.
To ensure this, we add a test with hardcoded values to prevent
unintentional changes.
Unfortunately, Big/Little endian results are different. We will fix this
in a follow-up patches.
Commit: 3838f0073092495ce1569100892ce69b4352a6ed
https://github.com/llvm/llvm-project/commit/3838f0073092495ce1569100892ce69b4352a6ed
Author: Demetrius Kanios <demetrius at kanios.net>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M llvm/lib/Target/WebAssembly/GISel/WebAssemblyCallLowering.cpp
A llvm/test/CodeGen/WebAssembly/GlobalISel/irtranslator/call-basics.ll
Log Message:
-----------
[WebAssembly][GlobalISel] CallLowering `lowerCall` (#193102)
Implements an initial version of `WebAssemblyCallLowering::lowerCall`.
It is pretty basic, only supporting simple direct calls. No indirect
call, swiftcc, tail call, or vararg support yet. But this still covers
the majority of calls.
Split from #157161
Commit: a5f2d43537c0e80fa131a0907a250789e1a8b998
https://github.com/llvm/llvm-project/commit/a5f2d43537c0e80fa131a0907a250789e1a8b998
Author: David Green <david.green at arm.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/test/CodeGen/AArch64/addp-shuffle.ll
M llvm/test/CodeGen/AArch64/arm64-addp.ll
Log Message:
-----------
[AArch64] Extend patterns for addp to accept add-like-ors. (#193075)
This extends the existing addp patterns to also work with add-like
disjoint or.
Commit: 11e7f6c8442658f501606e5694998764030b90df
https://github.com/llvm/llvm-project/commit/11e7f6c8442658f501606e5694998764030b90df
Author: Jeremy Kun <jkun at google.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M mlir/docs/Tutorials/MlirOpt.md
Log Message:
-----------
[milr] [docs] add view-op-graph and dump-pass-pipeline as useful CLI options (#194419)
Also fixes a typo and a rendering issue with the TOC
Commit: fce06e92a6ee4a74d49e0f3f5cb6301782e44ca1
https://github.com/llvm/llvm-project/commit/fce06e92a6ee4a74d49e0f3f5cb6301782e44ca1
Author: Ayaan <138162656+def3r at users.noreply.github.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M llvm/include/llvm/Support/KnownBits.h
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/lib/CodeGen/GlobalISel/GISelValueTracking.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/lib/Support/KnownBits.cpp
A llvm/test/CodeGen/AArch64/GlobalISel/knownbits-fshl-fshr.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/fshl.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fshr.ll
M llvm/unittests/Support/KnownBitsTest.cpp
Log Message:
-----------
[GlobalISel] Add `G_FSHL` and `G_FSHR` to computeKnownBits (#191260)
Ported impl from `SelectionDAG::computeKnownBits`.
Tests are based on `AArch64/GlobalISel/knownbits-shl.mir`
Ref: #150515
Commit: 1fb8c300392566b8d9a2d5eda5f354daf73c291f
https://github.com/llvm/llvm-project/commit/1fb8c300392566b8d9a2d5eda5f354daf73c291f
Author: Erich Keane <ekeane at nvidia.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenExpr.cpp
M clang/test/CIR/CodeGen/static-local.cpp
Log Message:
-----------
[CIR] Implement 'referenced-by-subobject' static-local lowering (#194070)
This fixes the 'emitDeclRefLValue:static local' NYI, and includes a
test.
Commit: 133890586eafce8478d596fa422367e45944798a
https://github.com/llvm/llvm-project/commit/133890586eafce8478d596fa422367e45944798a
Author: Sunil Shrestha <sunil.shrestha at hpe.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M flang/lib/Lower/OpenMP/OpenMP.cpp
R flang/test/Lower/OpenMP/Todo/scope-allocate.f90
R flang/test/Lower/OpenMP/Todo/scope-firstprivate.f90
R flang/test/Lower/OpenMP/Todo/scope.f90
A flang/test/Lower/OpenMP/scope.f90
A flang/test/Lower/OpenMP/target-scope.f90
M llvm/include/llvm/Frontend/OpenMP/OMPIRBuilder.h
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
M llvm/unittests/Frontend/OpenMPIRBuilderTest.cpp
M mlir/include/mlir/Dialect/OpenMP/OpenMPOps.td
M mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
A mlir/test/Target/LLVMIR/openmp-scope.mlir
M mlir/test/Target/LLVMIR/openmp-todo.mlir
Log Message:
-----------
[Flang][OpenMP] Add support for scope construct (#193098)
Add support for OpenMP scope construct. The private, reduction, and
nowait clauses (introduced in 5.1) are fully supported. Support for the
firstprivate clause (5.2) is also included. The allocate clause (5.2) is
lowered into the omp.scope MLIR op, but MLIR-to-LLVM IR translation is
not yet implemented.
When nowait is combined with reduction, the reduce function argument to
__kmpc_reduce_nowait is passed as null to prevent the runtime from
selecting the tree reduction method for host, which carries a barrier.
Assisted-by: Claude Opus 4.6
Commit: 0ef6d8906c1b7c6e8b9c47ea3406ac6917f01620
https://github.com/llvm/llvm-project/commit/0ef6d8906c1b7c6e8b9c47ea3406ac6917f01620
Author: Jasmine Tang <jjasmine at igalia.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M llvm/lib/Target/WebAssembly/WebAssemblyTargetTransformInfo.h
A llvm/test/CodeGen/WebAssembly/simd-min-vec-reg-32.ll
M llvm/test/Transforms/SLPVectorizer/WebAssembly/simd-splat-shuffle-cost.ll
Log Message:
-----------
[WebAssembly] Add getMinVectorRegisterBitWidth overriding (#189465)
Commit: 36990d81d48ecb41af84a7e0eaa0b20efe0615cf
https://github.com/llvm/llvm-project/commit/36990d81d48ecb41af84a7e0eaa0b20efe0615cf
Author: Alex Dutka <adutka at cerfacs.fr>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M clang-tools-extra/clang-tidy/readability/IdentifierLengthCheck.cpp
M clang-tools-extra/clang-tidy/readability/IdentifierLengthCheck.h
M clang-tools-extra/clang-tidy/utils/DeclRefExprUtils.cpp
M clang-tools-extra/clang-tidy/utils/DeclRefExprUtils.h
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/identifier-length.rst
A clang-tools-extra/test/clang-tidy/checkers/readability/identifier-length-structured-bindings.cpp
Log Message:
-----------
[clang-tidy][readability-identifier-length] add structured bindings support (#193838)
This change extends the `readability-identifier-length` check to structured
binding declarations. Currently, only the names of regular variables,
function parameters, exceptions variables in catch blocks and loop
variables are checked. In other words, `int a = ...` warns but `auto [a]
= ...` does not.
This change enables the check to warn when the length of the names
introduced in structured bindings declarations is too short, following
the same rules as for the other kinds of declarations. Two new options
are introduced:
- `MinimumBindingNameLength` defines the number of characters below
which a warning is issued (the default it set to 2, like for loop
variables and exceptions variables)
- `IgnoredBindingNames` defines the names for which warnings should not
issued (by default, `_` is the only allowed exception)
To implement this feature, a new matcher is registered which matches all
the individual binding names. For example, in `auto [x, y] = ...`, it
matches `x` and `y` separately and the logic for determining if a
warning should be issued is applied independently to each binding name
introduced. Unlike the other matchers which return `VarDecl` nodes, this
new matcher returns `BindingDecl` nodes. The `utils::allDeclRefExpr`
helper function is modified to work for any `ValueDecl` node (the
closest common ancestor of `VarDecl` and `BindingDecl`) in order for the
line count threshold feature to work with this extension.
Commit: 2962f641eaf73a1ecade4c6fa221606e6326041b
https://github.com/llvm/llvm-project/commit/2962f641eaf73a1ecade4c6fa221606e6326041b
Author: Tom Tromey <tromey at adacore.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M llvm/include/llvm/IR/DIBuilder.h
M llvm/include/llvm/IR/DebugInfoMetadata.h
M llvm/lib/AsmParser/LLParser.cpp
M llvm/lib/Bitcode/Reader/MetadataLoader.cpp
M llvm/lib/Bitcode/Writer/BitcodeWriter.cpp
M llvm/lib/IR/AsmWriter.cpp
M llvm/lib/IR/DIBuilder.cpp
M llvm/lib/IR/DebugInfoMetadata.cpp
M llvm/lib/IR/LLVMContextImpl.h
A llvm/test/Bitcode/fixedpoint_scope.ll
M llvm/unittests/IR/DebugInfoTest.cpp
Log Message:
-----------
Allow DIBasicType (and others) to have a scope and location (#190217)
DIBasicType derives from DIType and so it already has slots to store the
scope and location of the type. However, the DIBasicType constructor
(and corresponding DIBuilder method) does not expose this, presumably
because it is not needed by C or C++.
In Ada it is more common to create one's own basic type. So, for Ada
exposing this functionality would be handy.
This patch adds a new overload of DIBuilder::createBasicType to allow
this. Because only Ada uses fixed point types, the patch simply updates
these DIBuilder methods unconditionally.
Note that DwarfUnit already handles this scenario and so no changes were
needed there.
Commit: 98fe008141a1fd30eb8cb576c6385a67cf45d111
https://github.com/llvm/llvm-project/commit/98fe008141a1fd30eb8cb576c6385a67cf45d111
Author: Kevin Sala Penades <salapenades1 at llnl.gov>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M offload/test/offloading/interop-print.c
Log Message:
-----------
[offload] Un-XFAIL interop-print.c test for nvidia (#194447)
Commit: 8062e82db89f12d90e8c331db217904689b87947
https://github.com/llvm/llvm-project/commit/8062e82db89f12d90e8c331db217904689b87947
Author: Grigory Pastukhov <99913765+grigorypas at users.noreply.github.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/CodeGen/CGCall.cpp
M clang/lib/CodeGen/CodeGenModule.cpp
M clang/test/CodeGen/AArch64/sme-inline-callees-streaming-attrs.c
M clang/test/CodeGen/flatten.c
Log Message:
-----------
[Clang] Emit LLVM flatten attribute instead of per-callsite alwaysinline (#188615)
Follow-up to #174899 which added the flatten function attribute to LLVM
IR and implemented recursive inlining in the `AlwaysInliner` pass.
This patch updates Clang to emit the LLVM flatten attribute on functions
with `__attribute__((flatten))`, instead of the previous approach of
marking each call site with `alwaysinline`. This completes the
transition to matching GCC's flatten semantics.
Changes:
- Remove the callsite `alwaysinline` annotation logic from CGCall.cpp
- Emit the flatten function attribute in CodeGenModule.cpp
- Update clang/test/CodeGen/flatten.c to reflect the new IR output
- Update clang/test/CodeGen/AArch64/sme-inline-callees-streaming-attrs.c
to reflect the new behavior
- Add release notes documenting the behavior change
RFC:
https://discourse.llvm.org/t/rfc-function-level-flatten-depth-attribute-for-depth-limited-inlining
Commit: 925e28445b7c9d2b87c853e1dd386b2d0c3ebc5c
https://github.com/llvm/llvm-project/commit/925e28445b7c9d2b87c853e1dd386b2d0c3ebc5c
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
A llvm/test/Transforms/SLPVectorizer/AArch64/non-power-of-2-with-adjusted-gathers.ll
Log Message:
-----------
[SLP]Use VF for build-vector slice size when GatheredScalars were resized
After ExtractShuffles processing resizes GatheredScalars to VF and
recomputes NumParts, isGatherShuffledEntry populates Mask of size VF
and partitions it according to the post-resize NumParts. The previous
SliceSize formula based on E->Scalars.size() no longer matches that
layout and triggers an out-of-bounds ArrayRef::slice while iterating
gather-shuffle entries. Use getPartNumElems(VF, NumParts) by default;
fall back to the original-scalars formula only when
Mask.size() == E->Scalars.size() (no resize happened).
Fixes https://github.com/llvm/llvm-project/pull/194189#pullrequestreview-4182214738
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/194455
Commit: 6226ca523e8ebf62e230dd6954e42108d48fc5f0
https://github.com/llvm/llvm-project/commit/6226ca523e8ebf62e230dd6954e42108d48fc5f0
Author: Erich Keane <ekeane at nvidia.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M clang/include/clang/CIR/MissingFeatures.h
M clang/lib/CIR/CodeGen/CIRGenExpr.cpp
A clang/test/CIR/CodeGen/lambda-decomp-decl-captures.cpp
Log Message:
-----------
[CIR] Implement declref-lvalue lambda lowering (#194409)
This NYI showed up a few times and is pretty easy to get to,
implementation is equally as trivial.
---------
Co-authored-by: Andy Kaylor <akaylor at nvidia.com>
Commit: 1c90be34ce15659f462ef66976c2f2a19ceb4a81
https://github.com/llvm/llvm-project/commit/1c90be34ce15659f462ef66976c2f2a19ceb4a81
Author: Erich Keane <ekeane at nvidia.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/lib/CIR/CodeGen/CIRGenCXX.cpp
M clang/lib/CIR/CodeGen/CIRGenDecl.cpp
M clang/lib/CIR/CodeGen/CIRGenItaniumCXXABI.cpp
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
M clang/lib/CIR/Dialect/Transforms/LoweringPrepare.cpp
A clang/test/CIR/CodeGen/thread-local-in-func.cpp
M clang/test/CIR/IR/invalid-static-local.cir
M clang/test/CIR/IR/static-local.cir
Log Message:
-----------
[CIR] Implement static-local-tls lowering (#194059)
thread_local variables at function scope work very much like
static-locals, except with slightly different lowering from
cir-lowering-prepare. This patch implements that lowering. Global tls
variables are left to a later patch.
One decision I made here was that LocalInitOp lost its
'static-local'-ness, and assumes it is always static-local. Global TLS
is probably just going to use Global directly, so we don't need to to
permit it.
I DID leave it in the printing, as it makes it more clear what is
happening/for symmetry with get_global/global.
---------
Co-authored-by: Henrich Lauko <henrich.lau at gmail.com>
Commit: 36023ea1fb2355ff8127f1ebfdf100e4e9296519
https://github.com/llvm/llvm-project/commit/36023ea1fb2355ff8127f1ebfdf100e4e9296519
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M flang/include/flang/Parser/openmp-utils.h
M flang/include/flang/Semantics/openmp-utils.h
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Parser/openmp-utils.cpp
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/openmp-utils.cpp
M flang/lib/Semantics/resolve-directives.cpp
M flang/lib/Semantics/resolve-names.cpp
Log Message:
-----------
[flang][OpenMP] Move some utility functions from Semantics to Parser,… (#194434)
… NFC
Functions that only operate on AST nodes and not require any semantic
information belong in the parser library.
Commit: 693a1787f2c919971cbd51b91ac716c75f84d471
https://github.com/llvm/llvm-project/commit/693a1787f2c919971cbd51b91ac716c75f84d471
Author: Dhruva <dhruvakodiadka at gmail.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M llvm/test/CodeGen/RISCV/combine-is_fpclass.ll
Log Message:
-----------
[DAG] Precommit tests for computeKnownFPClass - ISD::EXTRACT_SUBVECTOR and ISD::INSERT_SUBVECTOR. (#190694)
This patch adds baseline tests for `ISD::EXTRACT_SUBVECTOR` and `ISD::INSERT_SUBVECTOR` in `computeKnownFPClass` in #190378
Commit: 7826a437b32427edd161f09a6c450bd1faab1d66
https://github.com/llvm/llvm-project/commit/7826a437b32427edd161f09a6c450bd1faab1d66
Author: Björn Schäpers <bjoern at hazardy.de>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M clang/include/clang/Format/Format.h
Log Message:
-----------
[clang-format][NFC] Sort AlignConsecutiveMacros option correctly (#194453)
Commit: 5e625826d6d394e65a767bf94d21739b18dade30
https://github.com/llvm/llvm-project/commit/5e625826d6d394e65a767bf94d21739b18dade30
Author: Jackson Stogel <jtstogel at gmail.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M libc/hdr/types/socklen_t.h
Log Message:
-----------
[libc] Include from sys/socket.h for socklen_t (#194456)
Commit: 7f6697b824d7d1c9b732f6c5cff37f2b1471cbd6
https://github.com/llvm/llvm-project/commit/7f6697b824d7d1c9b732f6c5cff37f2b1471cbd6
Author: Jerry Dang <kuroyukiasuna at gmail.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M llvm/lib/Target/X86/X86CallingConv.td
M llvm/test/CodeGen/X86/preserve_nonecc_call.ll
Log Message:
-----------
fix preserve_none in X86 backend (#192300)
This is a bug in the X86 backend affecting preserve_none with -O1. At
-O1, clang emits:
```
tail call preserve_nonecc void @_Z14func(ptr noundef nonnull byval(%struct.S) align 8 %1)
```
The `preserve_none` + `byval` never emitted the required caller-side
copy of the pointee. The callee received a pointer directly to the
original memory, violating the byval contract from LangRef: "a hidden
copy of the pointee is made between the caller and the callee, so the
callee is unable to modify the value in the caller".
The root cause is that CC_X86_64_Preserve_None in X86CallingConv.td had
no byval handling. As a result, byval arguments were falling through to
the register assignment rules and being assigned to registers instead of
stack slots.
The bug is fixed by one line in CC_X86_64_Preserve_None:
```
CCIfByVal<CCPassByVal<8, 8>>,
```
This ensures byval arguments are assigned to stack slots before the
register assignment rules are considered, consistent with all other
x86-64 calling conventions.
Fixes #188930
Commit: d28a8b0b3ff1848cc368e33d9a84dd90ee751332
https://github.com/llvm/llvm-project/commit/d28a8b0b3ff1848cc368e33d9a84dd90ee751332
Author: apple-fcloutier <fcloutier at apple.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M clang/include/clang/Basic/CodeGenOptions.h
M clang/test/C/drs/dr335.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_dupq.c
M clang/test/CodeGen/atomic-ops.c
M clang/test/CodeGen/atomic-test-and-set.c
M clang/test/CodeGen/atomic.c
M clang/test/CodeGen/atomic_ops.c
M clang/test/CodeGen/builtins-bitint.c
M clang/test/CodeGen/builtins.c
M clang/test/CodeGen/c11atomics-ios.c
M clang/test/CodeGen/defer-ts.c
M clang/test/CodeGen/scoped-atomic-ops.c
M clang/test/CodeGen/strict-bool.c
M clang/test/CodeGen/ubsan-conditional.c
M clang/test/CodeGenCXX/blocks.cpp
M clang/test/CodeGenCXX/builtin-atomic-compare_exchange.cpp
M clang/test/CodeGenCXX/cast-to-ref-bool.cpp
M clang/test/CodeGenCXX/exceptions.cpp
M clang/test/CodeGenCXX/ignored-bitfield-conditional.cpp
M clang/test/CodeGenCXX/lambda-expressions.cpp
M clang/test/CodeGenCXX/nrvo.cpp
M clang/test/CodeGenCoroutines/pr59181.cpp
M clang/test/CodeGenHLSL/BasicFeatures/MatrixSingleSubscriptGetter.hlsl
M clang/test/CodeGenHLSL/BasicFeatures/MatrixSingleSubscriptSetter.hlsl
M clang/test/CodeGenHLSL/BasicFeatures/MatrixSplat.hlsl
M clang/test/CodeGenHLSL/BasicFeatures/MatrixToAndFromVectorConstructors.hlsl
M clang/test/CodeGenHLSL/BasicFeatures/VectorElementwiseCast.hlsl
M clang/test/CodeGenHLSL/Bool.hlsl
M clang/test/CodeGenHLSL/BoolMatrix.hlsl
M clang/test/CodeGenHLSL/BoolVector.hlsl
M clang/test/CodeGenHLSL/builtins/ScalarSwizzles.hlsl
M clang/test/CodeGenHLSL/builtins/VectorElementStore.hlsl
M clang/test/CodeGenHLSL/builtins/WavePrefixCountBits.hlsl
M clang/test/CodeGenHLSL/builtins/dot2add.hlsl
M clang/test/CodeGenHLSL/strict-bool.hlsl
M clang/test/CodeGenHLSL/vk-features/vk.spec-constant.hlsl
M clang/test/CodeGenObjC/property-atomic-bool.m
M clang/test/CodeGenObjC/strict-bool.m
M clang/test/CodeGenObjC/strong-in-c-struct.m
M clang/test/CodeGenOpenCL/bool_cast.cl
M clang/test/DebugInfo/KeyInstructions/atomic.c
M clang/test/Frontend/fixed_point_add.c
M clang/test/Frontend/fixed_point_comparisons.c
M clang/test/Frontend/fixed_point_div.c
M clang/test/Frontend/fixed_point_mul.c
M clang/test/Frontend/fixed_point_sub.c
M clang/test/Headers/__clang_hip_libdevice_declares.cpp
M clang/test/Headers/gpuintrin.c
M clang/test/Headers/openmp-device-functions-bool.c
M clang/test/OpenMP/atomic_capture_codegen.cpp
M clang/test/OpenMP/atomic_update_codegen.cpp
M clang/test/OpenMP/distribute_parallel_for_simd_if_codegen.cpp
M clang/test/OpenMP/for_codegen.cpp
M clang/test/OpenMP/loop_collapse_codegen.cpp
M clang/test/OpenMP/master_taskloop_simd_codegen.cpp
M clang/test/OpenMP/nvptx_SPMD_codegen.cpp
M clang/test/OpenMP/nvptx_target_teams_generic_loop_codegen.cpp
M clang/test/OpenMP/nvptx_target_teams_generic_loop_generic_mode_codegen.cpp
M clang/test/OpenMP/parallel_for_simd_codegen.cpp
M clang/test/OpenMP/parallel_master_taskloop_codegen.cpp
M clang/test/OpenMP/parallel_master_taskloop_simd_codegen.cpp
M clang/test/OpenMP/target_data_if_logical_codegen.cpp
M clang/test/OpenMP/target_enter_data_depend_codegen.cpp
M clang/test/OpenMP/target_exit_data_depend_codegen.cpp
M clang/test/OpenMP/target_offload_mandatory_codegen.cpp
M clang/test/OpenMP/target_parallel_debug_codegen.cpp
M clang/test/OpenMP/target_parallel_for_debug_codegen.cpp
M clang/test/OpenMP/target_parallel_for_simd_codegen.cpp
M clang/test/OpenMP/target_parallel_generic_loop_codegen-3.cpp
M clang/test/OpenMP/target_parallel_if_codegen.cpp
M clang/test/OpenMP/target_simd_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_if_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_simd_if_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_reduction_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_simd_codegen.cpp
M clang/test/OpenMP/target_teams_generic_loop_if_codegen.cpp
M clang/test/OpenMP/target_update_depend_codegen.cpp
M clang/test/OpenMP/taskloop_simd_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_if_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_simd_if_codegen.cpp
M clang/test/OpenMP/teams_distribute_simd_codegen.cpp
Log Message:
-----------
[CodeGen] Change -O0 bool load codegen to have nonzero model (#193783)
The main follow-up item to
https://github.com/llvm/llvm-project/pull/160790 was changing -O0
codegen to convert in-memory i8 bool values to i1 with the `nonzero`
rule (`icmp ne i8 %val, 0`) rather than the `truncate` rule (`trunc i8
%val to i1`).
Bool values can only be `true` or `false`. While they are notionally a
single bit, the smallest addressable unit is CHAR_BIT bits large, and
CHAR_BIT is typically 8. Programming errors (such as memcpying a random
byte to a `bool`) can cause the 8-bit storage for a `bool` value to have
a bit pattern that is different from `true` or `false`, which then leads
to undefined behavior.
Clang has historically taken advantage of this in optimized builds
(everything other than -O0) by attaching range metadata to `bool` loads
to assume that the value loaded can only be 0 or 1. This leads to
exploitable security issues, and the correct behavior is not always easy
to explain to C developers. To remedy this situation, Clang accepted a
[-fstrict-bool](https://discourse.llvm.org/t/defining-what-happens-when-a-bool-isn-t-0-or-1/86778)
switch to control whether it can assume that loaded bool values are
always necessarily 0 or 1. By default, it does (maintaining the status
quo), and users must specify `-fno-strict-bool` to opt out of that
behavior.
When opting out, users can optionally request that bool i8 values are
converted to i1 either by truncation or by comparing to 0. The default
is comparing to 0. However, since `-O0` alone _technically_ uses
-fstrict-bool, unoptimized builds convert i8 bool values to i1 with a
`trunc` operation, whereas `-O1 -fno-strict-bool` converts i8 bool
values to i1 with `icmp ne 0`. This is a surprising inconsistency.
This PR changes -O0 codegen to align with -fno-strict-bool. This is
achieved with a single-line change:
```
bool isConvertingBoolWithCmp0() const {
switch (getLoadBoolFromMem()) {
case BoolFromMem::Strict:
+ return !isOptimizedBuild();
case BoolFromMem::Truncate:
```
However, it impacts a _very large_ number of tests, so we agreed to move
it out of the -fstrict-bool PR to reduce the chances we would have to
back out the whole thing for this secondary item.
This PR does the change and modifies the tests accordingly. I expect
that it will go stale rather quickly. If this needs more discussion,
I'll only update it once we reach consensus.
Commit: 48b342ba96246f0c97778f83ffc93e30c6f5620b
https://github.com/llvm/llvm-project/commit/48b342ba96246f0c97778f83ffc93e30c6f5620b
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M llvm/include/llvm/ADT/StableHashing.h
M llvm/test/CodeGen/X86/machine-block-hash.mir
M llvm/unittests/ADT/StableHashingTest.cpp
Log Message:
-----------
[ADT] Make stable_hash_combine to be endian-independent (#194430)
Commit: 464555d0921225a6d7e4a1ac23464ce24fda191d
https://github.com/llvm/llvm-project/commit/464555d0921225a6d7e4a1ac23464ce24fda191d
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenCXX.cpp
M clang/test/CIR/CodeGen/static-local.cpp
R clang/test/CIR/Transforms/cast-bitcast-funcptr-roundtrip-fold.cir
Log Message:
-----------
[CIR] Set the static_local attribute if needed when initializing (#194094)
There was a case where we were creating a GetGlobalOp when initializing
a static local variable that required a guard variable but failing to
set the static_local attribute on the GetGlobalOp. This led to a CIR
verificaiton error. This change sets the attribute when it is needed.
Assisted-by: Cursor / claude-4.7-opus-high
Commit: 8e8bb22a35a25f8406ba4342cc7ad102cf354b65
https://github.com/llvm/llvm-project/commit/8e8bb22a35a25f8406ba4342cc7ad102cf354b65
Author: Iasonaskrpr <iaskarapro at gmail.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M llvm/include/llvm/Object/OffloadBinary.h
M llvm/lib/Object/OffloadBinary.cpp
Log Message:
-----------
Fix offload binary header (#194335)
Fixes #194331
Commit: 34535e9bae8b798370768775dfed6065aaca806b
https://github.com/llvm/llvm-project/commit/34535e9bae8b798370768775dfed6065aaca806b
Author: David Meng <davidmenggx at gmail.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/lib/Sema/SemaDeclAttr.cpp
M clang/test/Sema/attr-ownership.c
Log Message:
-----------
[Sema] Enforce parameter match for ownership_returns attribute (#192339)
Previously parsing multiple ownership_returns attributes with different
arguments could lead to a crash. The documentation states that if
forward declarations have ownership_returns, they must have the same
arguments, and it may appear at most once per declaration.
This patch ensures that if multiple ownership_returns attributes are
present, their arguments (identifier and the optional index) must
exactly match. The diagonstic err_ownership_param_mismatch is introduced
for clarity.
Test cases for f15, C::f, and the newly added f22 were also updated to
match the requirement that all declarations of ownership_returns have
the same arguments, using the err_ownership_param_mismatch diagonstic.
Fixes #188733
Commit: d55166c23bf1e865c961440a5ef50badd5f69e0f
https://github.com/llvm/llvm-project/commit/d55166c23bf1e865c961440a5ef50badd5f69e0f
Author: modiking <mmo at nvidia.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXInstPrinter.cpp
M llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXInstPrinter.h
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.cpp
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.h
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
M llvm/test/CodeGen/NVPTX/branch-fold.mir
M llvm/test/CodeGen/NVPTX/i128.ll
M llvm/test/CodeGen/NVPTX/jump-table.ll
M llvm/test/CodeGen/NVPTX/machinelicm-no-preheader.mir
M llvm/test/CodeGen/NVPTX/switch-loop-header.mir
M llvm/test/DebugInfo/NVPTX/inlinedAt_2.mir
Log Message:
-----------
[NVPTX] Add reverseBranchCondition and CBranch inverted flag (#191889)
Add flag to `CBranch` instruction for inverted predicate branches (`@!p
bra`) and implement `reverseBranchCondition` to support branch condition
inversion.
This enables passes like branch folding to properly reverse branch
conditions, and is a prerequisite for SETP predicate inversion CSE.
Assisted-by: Cursor / Claude
Commit: 10fe2e3d6806918ebc06710669ebdce89a305489
https://github.com/llvm/llvm-project/commit/10fe2e3d6806918ebc06710669ebdce89a305489
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlanAnalysis.cpp
M llvm/lib/Transforms/Vectorize/VPlanAnalysis.h
Log Message:
-----------
[VPlan] Pass TTI + CostKind to spillCost instead of CostCtx (NFC) (#194417)
Instead of passing CostContext, directly pass the needed TTI and
CostKind. This makes the function easier to re-use in other places,
without the need of constructing VPCostContext.
Split off from https://github.com/llvm/llvm-project/pull/194267 as
suggested.
Commit: 20a62a41c26215b342431c6ab98702ddfb1a6a86
https://github.com/llvm/llvm-project/commit/20a62a41c26215b342431c6ab98702ddfb1a6a86
Author: Bruno Cardoso Lopes <bruno.cardoso at gmail.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenDecl.cpp
M clang/lib/CIR/CodeGen/CIRGenExpr.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.cpp
M clang/lib/CIR/CodeGen/CIRGenItaniumCXXABI.cpp
M clang/lib/CIR/CodeGen/CIRGenModule.cpp
M clang/lib/CIR/CodeGen/CIRGenModule.h
M clang/lib/CIR/CodeGen/CIRGenVTables.cpp
Log Message:
-----------
[CIR] Eliminate SymbolTable::lookupSymbolIn hotspots (#193362)
mlir::SymbolTable::lookupSymbolIn is O(n) per lookup, so cumulative
symbol lookups during CIRGen are O(n^2) in the number of global symbols.
On template-heavy translation units this becomes a significant
compile-time hotspot.
Replace the SymbolTable lookup path with a per-CIRGenModule DenseMap
cache keyed by symbol name, giving O(1) lookups.
On a synthetic template-heavy stress test, end-to-end compile time on
`clang -fclangir -S -emit-llvm -O0` improves by ~11% on a 33K-LOC input
(5.86s -> 5.21s) and ~16% on a 67K-LOC input (16.09s -> 13.52s). The
super-linear growth of the win with input size confirms the O(n^2) ->
O(n) effect.
Similar to previous compile time fix, repro shape (scale records and
template instantiations into the hundreds/thousands to amplify):
template <typename T, int N> struct Box { T head; Box<T, N-1> tail; };
template <typename T> struct Box<T, 0> { T head; };
struct R0; struct R1;
struct R0 { int v; Box<int, 4> b; R1* next; };
struct R1 { long v; Box<long, 4> b; R0* next; };
int f0(R0*); int f1(R1*);
int f0(R0* r) { return r->v + (r->next ? f1(r->next) : 0); }
int f1(R1* r) { return (int)r->v + (r->next ? f0(r->next) : 0); }
Commit: 1a805ace4320a7534de020a95b30605e6e28f78d
https://github.com/llvm/llvm-project/commit/1a805ace4320a7534de020a95b30605e6e28f78d
Author: joaosaffran <joaosaffranllvm at gmail.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/reversebits.ll
Log Message:
-----------
[HLSL] SPIRV Address after merge comments from #193068 (#194462)
This patch is addressing some comments that arose after #193068 was
merged.
Commit: b862554a70eeb9a8315f45406a7e13c771af1eb7
https://github.com/llvm/llvm-project/commit/b862554a70eeb9a8315f45406a7e13c771af1eb7
Author: Yury Plyakhin <yury.plyakhin at intel.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M clang/test/Driver/linker-wrapper-image.c
M clang/tools/clang-sycl-linker/ClangSYCLLinker.cpp
M libsycl/src/detail/device_binary_structures.hpp
M libsycl/src/detail/device_image_wrapper.cpp
M libsycl/src/detail/device_image_wrapper.hpp
M libsycl/src/detail/program_manager.cpp
M libsycl/src/detail/program_manager.hpp
M llvm/include/llvm/Frontend/Offloading/Utility.h
M llvm/lib/Frontend/Offloading/OffloadWrapper.cpp
M llvm/lib/Frontend/Offloading/Utility.cpp
Log Message:
-----------
[Offload][libsycl][clang-sycl-linker] Simplify SYCL Offload wrapping (#193876)
Replace the __sycl_tgt_bin_desc/__sycl_tgt_device_image-based fat binary
registration with a simpler OffloadBinary-native approach:
- __sycl_register_lib/__sycl_unregister_lib now take (BinaryStart, Size)
instead of a __sycl_tgt_bin_desc pointer; __sycl_unregister_lib only
needs BinaryStart since the runtime looks up the binary by its start
address.
- OffloadWrapper's SYCL wrapping is significantly simplified: the
__tgt_bin_desc/__tgt_device_image structs and the descriptor
construction code are replaced by a single embedded OffloadBinary blob
passed directly to the register/unregister entry points.
- clang-sycl-linker generates a single OffloadBinary, which contains
multiple images.
- ProgramAndKernelManager::registerFatBin parses the blob via
OffloadBinary::create, keying MDeviceImageManagers by BinaryStart to
eliminate the reparse on unregister.
- DeviceImageManager owns std::unique_ptr<OffloadBinary> instead of
borrowing a __sycl_tgt_device_image pointer; getRawData renamed to
getOffloadBinary.
- Introduce forEachSymbol and SymbolTable serialization
(writeSymbolTable/ SymbolTableHeader/SymbolTableEntry) in Utility.h to
expose the kernel symbol table embedded in the OffloadBinary "symbols"
section for consumption by the SYCL runtime.
- device_binary_structures.hpp reduced to DeviceBinaryTripleSPIRV64.
Co-Authored-By: Claude
Commit: 0424f5e45af770f6f0372c916e849b3d11de7ee6
https://github.com/llvm/llvm-project/commit/0424f5e45af770f6f0372c916e849b3d11de7ee6
Author: Alex MacLean <amaclean at nvidia.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h
M llvm/include/llvm/CodeGen/GlobalISel/Utils.h
M llvm/include/llvm/Target/GlobalISel/Combine.td
M llvm/lib/CodeGen/GlobalISel/CSEMIRBuilder.cpp
M llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
M llvm/lib/CodeGen/GlobalISel/Utils.cpp
R llvm/test/CodeGen/AArch64/GlobalISel/combine-constant-fold-count.mir
A llvm/test/CodeGen/AArch64/GlobalISel/combine-constant-fold-unary-int.mir
M llvm/test/CodeGen/SPIRV/extensions/enable-all-extensions-but-one.ll
Log Message:
-----------
[GIsel] Add constant-folding for more unary integer ops (#194265)
Generalize ConstantFoldCountOp to ConstantFoldUnaryIntOp including
G_ABS, G_BSWAP, G_BITREVERSE
Commit: 11f1a35917f39cbd1ec53ea7f17bac53f121f40c
https://github.com/llvm/llvm-project/commit/11f1a35917f39cbd1ec53ea7f17bac53f121f40c
Author: Ross Burton <ross.burton at arm.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M lldb/docs/use/tutorials/writing-custom-commands.md
M lldb/examples/python/armv7_cortex_m_target_defintion.py
M lldb/examples/python/bsd.py
M lldb/examples/python/cmdtemplate.py
M lldb/examples/python/delta.py
M lldb/examples/python/disasm-stress-test.py
M lldb/examples/python/disasm.py
M lldb/examples/python/file_extract.py
M lldb/examples/python/gdbremote.py
M lldb/examples/python/globals.py
M lldb/examples/python/in_call_stack.py
M lldb/examples/python/lldb_module_utils.py
M lldb/examples/python/lldbtk.py
M lldb/examples/python/mach_o.py
M lldb/examples/python/memory.py
M lldb/examples/python/operating_system.py
M lldb/examples/python/performance.py
M lldb/examples/python/process_events.py
M lldb/examples/python/sbvalue.py
M lldb/examples/python/shadow.py
M lldb/examples/python/sources.py
M lldb/examples/python/stacks.py
M lldb/examples/python/symbolication.py
M lldb/examples/python/types.py
M lldb/examples/python/x86_64_linux_target_definition.py
M lldb/examples/python/x86_64_qemu_target_definition.py
M lldb/examples/python/x86_64_target_definition.py
M lldb/scripts/analyze-project-deps.py
M lldb/scripts/verify_api.py
M lldb/test/API/dotest.py
M lldb/test/API/functionalities/plugins/python_os_plugin/operating_system2.py
M lldb/test/API/functionalities/plugins/python_os_plugin/os_plugin_in_dsym/operating_system.py
M lldb/test/API/functionalities/plugins/python_os_plugin/stepping_plugin_threads/operating_system.py
M lldb/test/API/test_runner/test/inferior.py
M lldb/test/API/test_runner/test/test_process_control.py
M lldb/test/Shell/Quit/expect_exit_code.py
M lldb/test/Shell/Register/Core/Inputs/strip-coredump.py
M lldb/test/Shell/ScriptInterpreter/Python/Crashlog/patch-crashlog.py
M lldb/test/Shell/helper/build.py
M lldb/utils/lui/lui.py
M lldb/utils/lui/sandbox.py
Log Message:
-----------
[lldb] Unify python shebangs (#187257)
As per PEP-0394[1], there is no real concensus over what binary names
Python has, specifically 'python' could be Python 3, Python 2, or not
exist.
However, everyone has a python3 interpreter and the scripts are all
written for Python 3. Unify the shebangs so that the ~50% of shebangs
that use python now use python3.
[1] https://peps.python.org/pep-0394/
Commit: 5aa71ad4223ab4656c6cbec55b605adebc7c36ae
https://github.com/llvm/llvm-project/commit/5aa71ad4223ab4656c6cbec55b605adebc7c36ae
Author: Peter Collingbourne <pcc at google.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/SROA.cpp
R llvm/test/Transforms/SROA/protected-field-pointer.ll
Log Message:
-----------
Revert "SROA: Recognize llvm.protected.field.ptr intrinsics."
This commit turns out to also not be needed after #186548; it now makes
a very small difference (~40 bytes) to Fleetbench binary size.
This reverts commit b0d340557841e0c3f72d19be89aebef2a8ce02e5.
Reviewers: fmayer, nikic
Pull Request: https://github.com/llvm/llvm-project/pull/194109
Commit: 6f2e1a120ebb75da9b3fe6afb19231aa0f801a34
https://github.com/llvm/llvm-project/commit/6f2e1a120ebb75da9b3fe6afb19231aa0f801a34
Author: Jackson Stogel <jtstogel at gmail.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M libc/test/src/sys/socket/linux/sendmsg_recvmsg_test.cpp
Log Message:
-----------
[libc][test] Remove non-proxy header in sendmsg_recvmsg_test.cpp (#194467)
The header `include/llvm-libc-macros/linux/sys-socket-macros.h` should
be included via `hdr/sys_socket_macros.h` which proxies based on whether
LIBC_FULL_BUILD is enabled. Else we mix LLVM-libc internal headers and
system headers.
Commit: 0eaa1f5884bf01064e280cee9148fc29b8bfa099
https://github.com/llvm/llvm-project/commit/0eaa1f5884bf01064e280cee9148fc29b8bfa099
Author: gulfemsavrun <gulfem at google.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M llvm/docs/CommandGuide/llvm-profgen.rst
M llvm/docs/ReleaseNotes.md
A llvm/include/llvm/ProfileData/ETMTraceDecoder.h
M llvm/lib/ProfileData/CMakeLists.txt
A llvm/lib/ProfileData/ETMTraceDecoder.cpp
A llvm/test/tools/llvm-profgen/Inputs/etm-opencsd.yaml
A llvm/test/tools/llvm-profgen/etm-arch.test
A llvm/test/tools/llvm-profgen/etm-opencsd.test
M llvm/test/tools/llvm-profgen/lit.local.cfg
M llvm/tools/llvm-profgen/PerfReader.cpp
M llvm/tools/llvm-profgen/PerfReader.h
M llvm/tools/llvm-profgen/ProfiledBinary.cpp
M llvm/tools/llvm-profgen/ProfiledBinary.h
M llvm/tools/llvm-profgen/llvm-profgen.cpp
Log Message:
-----------
Reland "[llvm-profgen] Add support for ETM trace decoding" (#194465)
This relands commit e3bd61890e68303a33fdd33fbdd9abeda (#191584), which
was reverted in commit
ec9d7d18bdfe21c30c94c02f14f3613f7b69a17b (#194087) due to bot failures
on ppc64le and Windows.
This reland incorporates the following fixes:
1) Rename member variable InputFile to InputFilePath inside struct
InputFile to resolve MSVC shadow
conflicts.
2) Add arm-registered-target to ETM tests REQUIRES directive to prevent
failures on builders that do
not have the ARM target enabled.
Commit: 8427cb750613226b6ee57e46b8338e8cf0bc2cd1
https://github.com/llvm/llvm-project/commit/8427cb750613226b6ee57e46b8338e8cf0bc2cd1
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M clang/test/CIR/CodeGen/binop.cpp
M clang/test/CIR/CodeGen/cmp.cpp
M clang/test/CIR/CodeGen/complex.cpp
M clang/test/CIR/CodeGen/if.cpp
M clang/test/CIR/CodeGen/ternary-throw.cpp
M clang/test/CIR/CodeGen/ternary.cpp
M clang/test/CIR/CodeGen/unary.cpp
Log Message:
-----------
[CIR] Fix failing tests after bool load change (#194468)
This fixes CIR tests that were failing as a result of the change in how
bool load values are truncated in
https://github.com/llvm/llvm-project/pull/193783
Commit: 75bef3ebd5f8e013bf3fa06467f6644257158c0b
https://github.com/llvm/llvm-project/commit/75bef3ebd5f8e013bf3fa06467f6644257158c0b
Author: Yury Plyakhin <yury.plyakhin at intel.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M clang/tools/clang-sycl-linker/CMakeLists.txt
Log Message:
-----------
[clang-sycl-linker] Add FrontendOffloading dependency to clang-sycl-linker (#194471)
This PR fixes the build after
https://github.com/llvm/llvm-project/commit/b862554a70eeb9a8315f45406a7e13c771af1eb7
Fixes missing dependency in `clang-sycl-linker/CMakeLists.txt`
Commit: ccc0d54239863d6c547e3cd95aaaf3667bcd6c92
https://github.com/llvm/llvm-project/commit/ccc0d54239863d6c547e3cd95aaaf3667bcd6c92
Author: Nico Weber <thakis at chromium.org>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/ProfileData/BUILD.gn
Log Message:
-----------
[gn build] Port 0eaa1f5884bf (#194478)
Commit: 1106bd9565a99a4947afca94c245c60659192804
https://github.com/llvm/llvm-project/commit/1106bd9565a99a4947afca94c245c60659192804
Author: Nico Weber <thakis at chromium.org>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M llvm/utils/gn/secondary/clang/unittests/Tooling/BUILD.gn
Log Message:
-----------
[gn build] Port ef18c253321f (#194479)
Commit: 3c7128b85ada8d9cd7a8da7e69c237590dc7e044
https://github.com/llvm/llvm-project/commit/3c7128b85ada8d9cd7a8da7e69c237590dc7e044
Author: Nico Weber <thakis at chromium.org>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M llvm/utils/gn/secondary/llvm/unittests/ADT/BUILD.gn
Log Message:
-----------
[gn build] Port fe587c5ad92b (#194480)
Commit: 043e778f85f60b654547f2104bca32fdbed2eafd
https://github.com/llvm/llvm-project/commit/043e778f85f60b654547f2104bca32fdbed2eafd
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M lldb/source/Target/Process.cpp
M lldb/source/Target/Target.cpp
Log Message:
-----------
lldb] Fix two issues causing TestEvents.py flakiness (#194438)
This PR fixes two issues that contribute to `TestEvents.py` being flaky
in CI:
1. `ProcessEventData::DoOnRemoval` runs the full stop-handling logic
(like `ShouldStop` and `RunStopHooks`) every time an event is consumed
from any listener. When the primary listener consumes an event and then
the shadow listener consumes the same event, the logic runs twice. The
second execution can race with subsequent event processing. Fix this by
incrementing `m_update_state` after the first successful run so
secondary listeners skip the full logic.
2. Target::RunStopHooks updates `m_latest_stop_hook_id` (marking a stop
as "handled") before checking whether any threads have stop reasons. If
the check fails and hooks don't run, the stop ID is already consumed,
preventing hooks from ever running for that stop. Fix this by deferring
the update until we're certain we'll actually run hooks.
Commit: 822392d2dda851139b840b24672294378d5cc29f
https://github.com/llvm/llvm-project/commit/822392d2dda851139b840b24672294378d5cc29f
Author: Arda Serdar Pektezol <arda at pektezol.dev>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VectorCombine.cpp
A llvm/test/Transforms/VectorCombine/X86/extract-extract-oob.ll
Log Message:
-----------
[VectorCombine] reject out-of-bounds extract indexes in foldExtractExtract (#194381)
Fixes #194355
`VectorCombine::foldExtractExtract()` matches any constant-index
`extractelement` operands, but it never verifies that they are in range
for a fixed-width vector.
Commit: e44ea654fe0a53b8942931d519f9817774ca6441
https://github.com/llvm/llvm-project/commit/e44ea654fe0a53b8942931d519f9817774ca6441
Author: Luke Lau <luke at igalia.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.h
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-sext-vp-mask.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-sext-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-zext-vp-mask.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-zext-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fshr-fshl-vp.ll
M llvm/test/CodeGen/RISCV/rvv/narrow-shift-extend.ll
M llvm/test/CodeGen/RISCV/rvv/rvv-peephole-vmerge-vops.ll
M llvm/test/CodeGen/RISCV/rvv/vnsra-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vnsrl-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vp-vaaddu.ll
M llvm/test/CodeGen/RISCV/rvv/vpscatter-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vsext-vp-mask.ll
M llvm/test/CodeGen/RISCV/rvv/vsext-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vzext-vp-mask.ll
M llvm/test/CodeGen/RISCV/rvv/vzext-vp.ll
Log Message:
-----------
[RISCV] Remove codegen for vp_zext, vp_sext (#194295)
Part of the work to remove trivial VP intrinsics from the RISC-V
backend, see
https://discourse.llvm.org/t/rfc-remove-codegen-support-for-trivial-vp-intrinsics-in-the-risc-v-backend/87999
This splits off 2 intrinsics from #179622. The vp_truncate combine needs
to be updated to keep the vaaddu patterns for now, but it will be
removed in an upcoming PR.
Commit: 6722bb7fe9b5e029c485bd0bc33269d553b7ef1a
https://github.com/llvm/llvm-project/commit/6722bb7fe9b5e029c485bd0bc33269d553b7ef1a
Author: Mariusz Borsa <wrotki at msn.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M compiler-rt/lib/asan_abi/asan_abi_tbd.txt
Log Message:
-----------
[asan_abi] Skip new __asan_get_report_* from ABI (#194463)
PR #181446 ("[asan] API for getting multiple pointer ranges") added five
new __asan_get_report_{dealloc,dest,first,second,src}_address entries to
compiler-rt/lib/asan/asan_interface.inc without updating
asan_abi_tbd.txt
or implementing them in compiler-rt/lib/asan_abi/asan_abi.cpp. This
broke
the AddressSanitizerABI-arm64-darwin ::
Darwin/llvm_interface_symbols.cpp
test, which diffs asan_interface.inc (minus asan_abi_tbd.txt) against
the
symbols actually exported by libclang_rt.asan_abi_osx.a.
List the new symbols alongside the existing __asan_get_report_* entries
so the stable-ABI test passes. The symbols remain unimplemented in the
stable ABI library; this change only reflects that they are
intentionally
not part of the stable ABI surface.
Assisted-by: Claude Opus 4.7
rdar://175286011
Co-authored-by: Mariusz Borsa <m_borsa at apple.com>
Commit: 0b82418685164dd6db4a9e01bdadfe3b482bde11
https://github.com/llvm/llvm-project/commit/0b82418685164dd6db4a9e01bdadfe3b482bde11
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M flang/lib/Optimizer/Transforms/CUDA/CUFAddConstructor.cpp
M flang/test/Fir/CUDA/cuda-constructor-2.f90
Log Message:
-----------
[flang][cuda] Restore constructor for global only module (#194466)
Commit: 2774ab189b9a1692f26de487ac38fc6a2bf3cfb4
https://github.com/llvm/llvm-project/commit/2774ab189b9a1692f26de487ac38fc6a2bf3cfb4
Author: Quentin Colombet <quentin.colombet at gmail.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M llvm/lib/CodeGen/InlineSpiller.cpp
A llvm/test/CodeGen/AMDGPU/regalloc-hoist-spill-live-range-upd.ll
Log Message:
-----------
[InlineSpiller] Fix live-range update in hoisting within bb (#193880)
The InlineSpiller tries to shorten the live-ranges used when storing a
value that is defined by a sibling register by performing the following
transformation:
```
a = copy b
store a
```
=>
```
store b
```
That is, it eliminates the copy and store the original value at the copy
location.
As far as `b`'s live-range is concerned, this transformation is neutral
as long as the store is inserted in place of the copy being removed.
That doesn't hold when the copy is part of the basic block prologue. In
that case, the earliest insertion point for the store is after the
prologue:
```
a = copy b # part of bb prologue
... # more prologue instrs
store a <-- earliest insertion point
```
Therefore when this optimization kicks in and the copy is in the bb's
prologue, b's live-range needs to be extended to that insertion point.
This is exactly what this fix does.
Note: This issue is fairly easy to understand from an IR stand point and
one would expect a small reproducer.
Indeed, we would need only something that looks like:
```
a = copy b # prologue compatible copy
... # some more prologue instrs
... # high pressure point
= use a
```
The problem is the InlineSpiller optimization (implemented in
InlineSpiller::hoistSpillInsideBB) triggers only if `a` and `b` are
sibling registers, meaning they are the product of a live-range
splitting. Controlling live-range splitting is hard and I couldn't come
up with a smaller test case. The problem also disappears if we run
greedy alone because the live-ranges are repacked (well the slot indices
to be exact) compared to what the scheduler produces. That changes the
allocation order and the bug is not hit anymore.
The alternative would be to run the pipeline from the
coalescer/scheduler but that's not a whole lot more robust than the LLVM
IR path, plus the reproducer would be ~20k line long!
The other option (maybe something we should do in the long term) would
be to serialize/deserialize the VirtRegMap object so that we can set the
Virt2SplitMap map in a state that register a and b as siblings.
Commit: 94a6a6b3cdea0179b0599a88b16fe87e672ccf5b
https://github.com/llvm/llvm-project/commit/94a6a6b3cdea0179b0599a88b16fe87e672ccf5b
Author: Erich Keane <ekeane at nvidia.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M clang/include/clang/CIR/Dialect/Builder/CIRBaseBuilder.h
M clang/lib/CIR/CodeGen/CIRGenExpr.cpp
M clang/lib/CIR/CodeGen/CIRGenModule.cpp
M clang/lib/CIR/CodeGen/CIRGenModule.h
A clang/test/CIR/CodeGen/temp-param-obj-decl.cpp
Log Message:
-----------
[CIR] Handle DeclRefExpr's to NTTP Objects (#194482)
NTTP objects are represented as globals so that you can refer to
them/address of them/etc, but most access to them should result in
constant expressions. This patch implements the creation of these
globals, and allows compelation to continue.
This should fix up the last DeclRefExpr LValue that appears other than
MSGuids and named global registers, both of which are specific to
individual attributes.
Commit: c1e78ed3d603923a077899b32341647904d9007f
https://github.com/llvm/llvm-project/commit/c1e78ed3d603923a077899b32341647904d9007f
Author: Naveen Seth Hanig <naveen.hanig at outlook.com>
Date: 2026-04-28 (Tue, 28 Apr 2026)
Changed paths:
M clang/include/clang/Basic/DiagnosticDriverKinds.td
M clang/include/clang/Driver/ModulesDriver.h
M clang/lib/Driver/Driver.cpp
M clang/lib/Driver/ModulesDriver.cpp
A clang/test/Driver/modules-driver-both-modules-types.cpp
A clang/test/Driver/modules-driver-cxx-modules-only.cpp
A clang/test/Driver/modules-driver-import-std.cpp
A clang/test/Driver/modules-driver-incompatible-options.cpp
Log Message:
-----------
Reland "[clang][modules-driver] Add support for C++ named modules and import std" (2nd attempt) (#194475)
This reverts #193857 and relands #193312.
This adds basic support for explicit C++ named module builds, managed
natively by the Clang driver, including support for use of the Standard
library modules. This follows #187606, which adds the same for Clang
modules.
Current limitations:
- Standard library modules are still compiled to object files instead of
using the provided shared library. (This will be addressed in a
follow-up soon.)
- Caching is not supported yet (but likely to be added during the
upcoming GSoC cycle).
- Importing C++ standard library modules into Clang modules is not
supported (and not expected in the near term).
RFC:
https://discourse.llvm.org/t/rfc-modules-support-simple-c-20-modules-use-from-the-clang-driver-without-a-build-system
Commit: eac6d03f95450c60118d0c4bfacc55f6e8affd45
https://github.com/llvm/llvm-project/commit/eac6d03f95450c60118d0c4bfacc55f6e8affd45
Author: Naveen Seth Hanig <naveen.hanig at outlook.com>
Date: 2026-04-28 (Tue, 28 Apr 2026)
Changed paths:
M clang/test/Driver/modules-driver-import-std.cpp
Log Message:
-----------
[clang][modules-driver] Fix failing import-std regression test (#194502)
See
https://github.com/llvm/llvm-project/pull/194475#issuecomment-4331347690.
This constrains the test to not run on aarch64, where it fails on
`clang-aarch64-quick` and `llvm-clang-aarch64-darwin` builders.
The failing builders don't show any output, and the test will be
re-enabled for aarch64 in a later follow-up.
Co-authored-by: Naveen Seth Hanig <naveen.hanig at oulook.com>
Commit: 5281d4c18ea9bf9aca1d73e002359a66d085f4c4
https://github.com/llvm/llvm-project/commit/5281d4c18ea9bf9aca1d73e002359a66d085f4c4
Author: Anonmiraj <ezzibrahimx at gmail.com>
Date: 2026-04-28 (Tue, 28 Apr 2026)
Changed paths:
M libc/shared/math.h
A libc/shared/math/bf16subl.h
M libc/src/__support/math/CMakeLists.txt
A libc/src/__support/math/bf16subl.h
M libc/src/math/generic/CMakeLists.txt
M libc/src/math/generic/bf16subl.cpp
M libc/test/shared/CMakeLists.txt
M libc/test/shared/shared_math_constexpr_test.cpp
M libc/test/shared/shared_math_test.cpp
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[libc][math] Refactor bf16subl to header-only (#194498)
Refactors the bf16subl math family to be header-only.
Commit: 085f2407fec2ec56b43904fcecae0cf3e34c5fcd
https://github.com/llvm/llvm-project/commit/085f2407fec2ec56b43904fcecae0cf3e34c5fcd
Author: Erich Keane <ekeane at nvidia.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenExpr.cpp
M clang/lib/CIR/CodeGen/CIRGenExprConstant.cpp
M clang/lib/CIR/CodeGen/CIRGenModule.cpp
M clang/lib/CIR/CodeGen/CIRGenModule.h
M clang/test/CIR/CodeGen/temp-param-obj-decl.cpp
Log Message:
-----------
[CIR] Lower constant NTTP objects (#194496)
Like my previous patch, this just stores an NTTP object as a global
(using the same code, with 1 level of indrection slipped off), and
initializes it as a const. This patch also fleshes out the
CIRGenExprConstant.cpp area, leaving just 2 'NYI's in the area, 1 of
which is the MSGuidAttr again.
Commit: eec2249a311f735426102332bce72eae6c576a4b
https://github.com/llvm/llvm-project/commit/eec2249a311f735426102332bce72eae6c576a4b
Author: Mel Chen <mel.chen at sifive.com>
Date: 2026-04-28 (Tue, 28 Apr 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-interleave.ll
Log Message:
-----------
[RISCV] Improve getInterleavedMemoryOpCost for interleave groups with tail gaps. (#192074)
For interleaved access groups where gaps are only at the tail (i.e.
members are contiguous starting from index 0 but do not fill the entire
factor), the interleaved memory access pass can lower them to
vlsseg/vssseg intrinsics with NF equal to the number of group members
rather than the factor after #151612 and #154647.
Previously these groups fell through to the generic fixed-vector shuffle
cost model. This patch adds a dedicated cost path that checks legality
and estimates appropriate cost for them.
TODO: Support scalable vector type.
Fix #151497
Commit: 1228142a5d6130657aaefbf22a41ed6c1482c228
https://github.com/llvm/llvm-project/commit/1228142a5d6130657aaefbf22a41ed6c1482c228
Author: Bruno Cardoso Lopes <bruno.cardoso at gmail.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenExprAggregate.cpp
A clang/test/CIR/CodeGen/consteval-aggregate.cpp
Log Message:
-----------
[CIR] Implement PredefinedExpr in aggregate emitter and add consteval… (#194484)
… aggregate test
Handle PredefinedExpr by delegating to emitAggLoadOfLValue, removing the
NYI fallback. Also add a test for ConstantExpr aggregate emission
(consteval functions returning structs), which was already implemented
but lacked test coverage.
This unblocks ~206 libcxx test failures that involve aggregate
ConstantExpr and PredefinedExpr.
Note on LLVM IR divergence (will be addressed in follow-up PRs): For
consteval functions returning aggregates, CIR currently emits a global
constant + cir.copy that lowers to llvm.memcpy from the global, while
OGCG decomposes the constant into per-field stores. The added CIR / LLVM
/ OGCG CHECK lines in consteval-aggregate.cpp document this difference.
Convergence will come from a follow-up that decomposes the consteval
aggregate stores into per-field stores in LoweringPrepare (and related
GEP-index handling for padded structs).
Commit: fe46959a92882f5bf377682847af3a254c808479
https://github.com/llvm/llvm-project/commit/fe46959a92882f5bf377682847af3a254c808479
Author: Anonmiraj <ezzibrahimx at gmail.com>
Date: 2026-04-28 (Tue, 28 Apr 2026)
Changed paths:
M libc/shared/math.h
A libc/shared/math/ilogbbf16.h
M libc/src/__support/math/CMakeLists.txt
A libc/src/__support/math/ilogbbf16.h
M libc/src/math/generic/CMakeLists.txt
M libc/src/math/generic/ilogbbf16.cpp
M libc/test/shared/CMakeLists.txt
M libc/test/shared/shared_math_constexpr_test.cpp
M libc/test/shared/shared_math_test.cpp
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[libc][math] Refactor ilogbbf16 to header-only (#194503)
Refactors ilogbbf16 to be header-only.
Commit: 3c66b3222ec9051038528fbfd75f054ed17728bd
https://github.com/llvm/llvm-project/commit/3c66b3222ec9051038528fbfd75f054ed17728bd
Author: Anonmiraj <ezzibrahimx at gmail.com>
Date: 2026-04-28 (Tue, 28 Apr 2026)
Changed paths:
M libc/shared/math.h
A libc/shared/math/llogbbf16.h
M libc/src/__support/math/CMakeLists.txt
A libc/src/__support/math/llogbbf16.h
M libc/src/math/generic/CMakeLists.txt
M libc/src/math/generic/llogbbf16.cpp
M libc/test/shared/CMakeLists.txt
M libc/test/shared/shared_math_constexpr_test.cpp
M libc/test/shared/shared_math_test.cpp
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[libc][math] Refactor llogbbf16 to header-only (#194509)
Refactor llogbbf16 to be header-only.
part of: #147386
Commit: 61adecca5683872000da32d1d8897afe038428b0
https://github.com/llvm/llvm-project/commit/61adecca5683872000da32d1d8897afe038428b0
Author: Jianhui Li <jian.hui.li at intel.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M mlir/include/mlir/Dialect/XeGPU/IR/XeGPUOps.td
M mlir/include/mlir/Dialect/XeGPU/Transforms/XeGPULayoutImpl.h
M mlir/include/mlir/Dialect/XeGPU/uArch/IntelGpuXe2.h
M mlir/include/mlir/Dialect/XeGPU/uArch/uArchBase.h
M mlir/lib/Dialect/XeGPU/Transforms/XeGPULayoutImpl.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUPropagateLayout.cpp
M mlir/test/Dialect/XeGPU/ops.mlir
M mlir/test/Dialect/XeGPU/propagate-layout-inst-data.mlir
M mlir/test/Dialect/XeGPU/propagate-layout-subgroup.mlir
M mlir/test/Dialect/XeGPU/propagate-layout.mlir
Log Message:
-----------
[MLIR][XeGPU] XeGPU DpasMx Op Definition adds Layout Support (#194117)
This PR extends the DpasMx operation to support MXFP (microscaling
floating point) matrix multiply with separate scale factor layouts.
1. Op Definition
Added layout_a_scale and layout_b_scale attributes to DpasMx op
Removed AllElementTypesMatch<["a", "b"]> trait to allow different types
for A/B with scales
2. Layout Infrastructure
setupDpasMxLayout(): Creates anchor layouts for all 5 operands (A, B,
C/D, scale_a, scale_b)
Derives scale layouts from parent matrix layouts by dividing innermost
dimension
Supports all layout kinds: Subgroup, InstData, Lane
Fix a bug in getupDpasSubgroupLayouts(): sg_data of A/B matrix should
keep the full K dimension.
3. Layout Propagation
visitDpasMxOp(): Propagates layout attributes from op to operands during
dataflow analysis
Assisted by: Claude
---------
Co-authored-by: Claude Sonnet 4.5 <noreply at anthropic.com>
Commit: 955bb5c59f9184b6b125a4fc55583e1fdbcbac8f
https://github.com/llvm/llvm-project/commit/955bb5c59f9184b6b125a4fc55583e1fdbcbac8f
Author: Zeyi Xu <mitchell.xu2 at gmail.com>
Date: 2026-04-28 (Tue, 28 Apr 2026)
Changed paths:
M clang-tools-extra/docs/clang-tidy/checks/cert/arr39-c.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/con36-c.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/con54-cpp.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/ctr56-cpp.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/dcl03-c.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/dcl16-c.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/dcl37-c.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/dcl50-cpp.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/dcl51-cpp.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/dcl54-cpp.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/dcl58-cpp.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/dcl59-cpp.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/env33-c.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/err09-cpp.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/err34-c.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/err52-cpp.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/err58-cpp.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/err60-cpp.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/err61-cpp.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/exp42-c.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/exp45-c.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/fio38-c.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/flp30-c.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/flp37-c.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/int09-c.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/mem57-cpp.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/msc24-c.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/msc30-c.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/msc32-c.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/msc33-c.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/msc50-cpp.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/msc51-cpp.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/msc54-cpp.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/oop11-cpp.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/oop54-cpp.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/oop57-cpp.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/oop58-cpp.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/pos44-c.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/pos47-c.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/sig30-c.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/str34-c.rst
M clang-tools-extra/docs/clang-tidy/checks/cppcoreguidelines/avoid-c-arrays.rst
M clang-tools-extra/docs/clang-tidy/checks/cppcoreguidelines/avoid-magic-numbers.rst
M clang-tools-extra/docs/clang-tidy/checks/cppcoreguidelines/c-copy-assignment-signature.rst
M clang-tools-extra/docs/clang-tidy/checks/cppcoreguidelines/explicit-virtual-functions.rst
M clang-tools-extra/docs/clang-tidy/checks/cppcoreguidelines/macro-to-enum.rst
M clang-tools-extra/docs/clang-tidy/checks/cppcoreguidelines/narrowing-conversions.rst
M clang-tools-extra/docs/clang-tidy/checks/cppcoreguidelines/noexcept-destructor.rst
M clang-tools-extra/docs/clang-tidy/checks/cppcoreguidelines/noexcept-move-operations.rst
M clang-tools-extra/docs/clang-tidy/checks/cppcoreguidelines/noexcept-swap.rst
M clang-tools-extra/docs/clang-tidy/checks/cppcoreguidelines/non-private-member-variables-in-classes.rst
M clang-tools-extra/docs/clang-tidy/checks/cppcoreguidelines/use-default-member-init.rst
M clang-tools-extra/docs/clang-tidy/checks/fuchsia/header-anon-namespaces.rst
M clang-tools-extra/docs/clang-tidy/checks/fuchsia/multiple-inheritance.rst
M clang-tools-extra/docs/clang-tidy/checks/google/build-namespaces.rst
M clang-tools-extra/docs/clang-tidy/checks/google/readability-braces-around-statements.rst
M clang-tools-extra/docs/clang-tidy/checks/google/readability-casting.rst
M clang-tools-extra/docs/clang-tidy/checks/google/readability-function-size.rst
M clang-tools-extra/docs/clang-tidy/checks/google/readability-namespace-comments.rst
M clang-tools-extra/docs/clang-tidy/checks/hicpp/avoid-c-arrays.rst
M clang-tools-extra/docs/clang-tidy/checks/hicpp/avoid-goto.rst
M clang-tools-extra/docs/clang-tidy/checks/hicpp/braces-around-statements.rst
M clang-tools-extra/docs/clang-tidy/checks/hicpp/deprecated-headers.rst
M clang-tools-extra/docs/clang-tidy/checks/hicpp/exception-baseclass.rst
M clang-tools-extra/docs/clang-tidy/checks/hicpp/explicit-conversions.rst
M clang-tools-extra/docs/clang-tidy/checks/hicpp/function-size.rst
M clang-tools-extra/docs/clang-tidy/checks/hicpp/ignored-remove-result.rst
M clang-tools-extra/docs/clang-tidy/checks/hicpp/invalid-access-moved.rst
M clang-tools-extra/docs/clang-tidy/checks/hicpp/member-init.rst
M clang-tools-extra/docs/clang-tidy/checks/hicpp/move-const-arg.rst
M clang-tools-extra/docs/clang-tidy/checks/hicpp/named-parameter.rst
M clang-tools-extra/docs/clang-tidy/checks/hicpp/new-delete-operators.rst
M clang-tools-extra/docs/clang-tidy/checks/hicpp/no-array-decay.rst
M clang-tools-extra/docs/clang-tidy/checks/hicpp/no-assembler.rst
M clang-tools-extra/docs/clang-tidy/checks/hicpp/no-malloc.rst
M clang-tools-extra/docs/clang-tidy/checks/hicpp/noexcept-move.rst
M clang-tools-extra/docs/clang-tidy/checks/hicpp/signed-bitwise.rst
M clang-tools-extra/docs/clang-tidy/checks/hicpp/special-member-functions.rst
M clang-tools-extra/docs/clang-tidy/checks/hicpp/static-assert.rst
M clang-tools-extra/docs/clang-tidy/checks/hicpp/undelegated-constructor.rst
M clang-tools-extra/docs/clang-tidy/checks/hicpp/uppercase-literal-suffix.rst
M clang-tools-extra/docs/clang-tidy/checks/hicpp/use-auto.rst
M clang-tools-extra/docs/clang-tidy/checks/hicpp/use-emplace.rst
M clang-tools-extra/docs/clang-tidy/checks/hicpp/use-equals-default.rst
M clang-tools-extra/docs/clang-tidy/checks/hicpp/use-equals-delete.rst
M clang-tools-extra/docs/clang-tidy/checks/hicpp/use-noexcept.rst
M clang-tools-extra/docs/clang-tidy/checks/hicpp/use-nullptr.rst
M clang-tools-extra/docs/clang-tidy/checks/hicpp/use-override.rst
M clang-tools-extra/docs/clang-tidy/checks/hicpp/vararg.rst
M clang-tools-extra/docs/clang-tidy/checks/llvm/else-after-return.rst
M clang-tools-extra/docs/clang-tidy/checks/llvm/qualified-auto.rst
M clang-tools-extra/docs/clang-tidy/checks/modernize/use-default.rst
M clang-tools-extra/docs/clang-tidy/checks/performance/faster-string-find.rst
M clang-tools-extra/docs/clang-tidy/checks/performance/implicit-cast-in-loop.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/implicit-bool-cast.rst
Log Message:
-----------
[clang-tidy][Docs] Remove all auto-redirects in documentation. NFC. (#193408)
RFC:
https://discourse.llvm.org/t/rfc-remove-automatic-redirects-from-clang-tidy-documentation/90633
Commit: 26493fc9c3d61333c1cf265889ff2fe03d2f180d
https://github.com/llvm/llvm-project/commit/26493fc9c3d61333c1cf265889ff2fe03d2f180d
Author: Boyao Wang <wangboyao at bytedance.com>
Date: 2026-04-28 (Tue, 28 Apr 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.h
Log Message:
-----------
[RISCV][NFC] Turn lowerVECTOR_SHUFFLE into a member function of RISCVTargetLowering (#194299)
Convert lowerVECTOR_SHUFFLE into a member function of
RISCVTargetLowering, aligning it with other lowerXXX member functions in
RISCVTargetLowering and matching other targets like AArch64.
Commit: e734289ce3deb16c95764aa27f42594d620ed657
https://github.com/llvm/llvm-project/commit/e734289ce3deb16c95764aa27f42594d620ed657
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-04-28 (Tue, 28 Apr 2026)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
A clang/test/AST/ByteCode/libcxx/apvalue-initializer.cpp
A clang/test/AST/ByteCode/libcxx/lvalue-constantexpr.cpp
Log Message:
-----------
[clang][bytecode] Rework APValue visiting (#194408)
First, we can't just ignore the LValuePath of an lvalue APValue. Add
code to handle that and a test case exercising the newly added code.
We also didn't look at APValue bases when initializing from an APValue.
Commit: f43471af112b584cef4d28e20659dbc5dc2c54da
https://github.com/llvm/llvm-project/commit/f43471af112b584cef4d28e20659dbc5dc2c54da
Author: 陈子昂 <2802328816 at qq.com>
Date: 2026-04-28 (Tue, 28 Apr 2026)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
M llvm/lib/Transforms/InstCombine/InstCombineInternal.h
M llvm/lib/Transforms/InstCombine/InstCombineShifts.cpp
M llvm/test/Transforms/InstCombine/apint-shift.ll
M llvm/test/Transforms/InstCombine/icmp-select.ll
A llvm/test/Transforms/InstCombine/icmp-shl-add-to-add.ll
Log Message:
-----------
[InstCombine] Reland #165975: Fix #163110: Support peeling off matching shifts from icmp operands via canEvaluateShifted (#190918)
This relanding of #165975 fixes the bug that caused the bootstrap-asan
buildbot failure
(https://lab.llvm.org/buildbot/#/builders/52/builds/16329).
## Original optimization
Consider a pattern like: `icmp (shl nsw/nuw X, L), (add nsw/nuw (shl
nsw/nuw Y, L), K)`
When K is a multiple of 2^L, this can be simplified to: `icmp X, (add
nsw/nuw Y, K >> L)`
This patch extends `canEvaluateShifted` to support `Instruction::Add`
and refactors its signature to accept a `ShiftSemantics` enum (`Lossy` /
`Unsigned` / `Signed`) instead of a bare opcode. This allows the
function to enforce losslessness requirements according to the overflow
flags (nsw/nuw) of the operands. The logic is wired into
`foldICmpCommutative` to fold `icmp (shl nuw/nsw X, C), Op1` into `icmp
X, (Op1 >> C)` when Op1 can be right-shifted losslessly by C bits.
## Bug fixed since #165975
`canEvaluateShiftedShift` unconditionally returned `true` for
same-direction logical shifts, ignoring the `ShiftSemantics` parameter.
This caused `foldICmpCommutative` to incorrectly transform:
`icmp uge (shl nuw X, 4), (lshr Y, 1) → icmp uge X, (lshr Y, 5) ← WRONG`
**Fix:** `canEvaluateShiftedShift` now returns `true` for same-direction
shifts only when `Semantics == ShiftSemantics::Lossy`, blocking the
unsafe fold for `Unsigned`/`Signed` semantics. Regression test added in
`Transforms/InstCombine/icmp_shl_lshr_fold.ll`.
Commit: e0ccf9cb627efa6dffe085a02cd7f28df531dccd
https://github.com/llvm/llvm-project/commit/e0ccf9cb627efa6dffe085a02cd7f28df531dccd
Author: Shreeyash Pandey <shrpand at qti.qualcomm.com>
Date: 2026-04-28 (Tue, 28 Apr 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/test/CodeGen/AArch64/and-mask-removal.ll
M llvm/test/CodeGen/AArch64/usub_sat_plus.ll
M llvm/test/CodeGen/X86/combine-sub-usat.ll
Log Message:
-----------
[AArch64][SelectionDAG] Generate subs+csel for usub.sat (#193203)
Fixes https://github.com/llvm/llvm-project/issues/191488
As this is a regression of
https://github.com/llvm/llvm-project/pull/170076, adds a check to avoid
generic lowering of usub.sat to X - zext(X != 0) in case of aarch64 by
making the constraint of this transformation stricter via an extra
isOperationLegalOrCustom guard on USUBO_CARRY. All other backends will
still receive generic lowering as implemented in the original patch.
Commit: f61e1e46fff33724233e24c00c231cfc1f8e7eb9
https://github.com/llvm/llvm-project/commit/f61e1e46fff33724233e24c00c231cfc1f8e7eb9
Author: Fangrui Song <i at maskray.me>
Date: 2026-04-28 (Tue, 28 Apr 2026)
Changed paths:
M bolt/lib/Core/BinaryEmitter.cpp
M bolt/lib/Core/DebugData.cpp
M llvm/include/llvm/MC/MCContext.h
M llvm/lib/CodeGen/AsmPrinter/DwarfCFIException.cpp
M llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp
M llvm/lib/DWARFCFIChecker/DWARFCFIAnalysis.cpp
M llvm/lib/MC/ELFObjectWriter.cpp
M llvm/lib/MC/MCAsmStreamer.cpp
M llvm/lib/MC/MCContext.cpp
M llvm/lib/MC/MCDwarf.cpp
M llvm/lib/MC/MCELFStreamer.cpp
M llvm/lib/MC/MCExpr.cpp
M llvm/lib/MC/MCInst.cpp
M llvm/lib/MC/MCObjectFileInfo.cpp
M llvm/lib/MC/MCObjectStreamer.cpp
M llvm/lib/MC/MCParser/AsmParser.cpp
M llvm/lib/MC/MCParser/ELFAsmParser.cpp
M llvm/lib/MC/MCParser/MasmParser.cpp
M llvm/lib/MC/MCSFrame.cpp
M llvm/lib/MC/MCStreamer.cpp
M llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
M llvm/lib/Target/AMDGPU/AMDGPUMCResourceInfo.cpp
M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
M llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUAsmBackend.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDKernelCodeTUtils.cpp
M llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
M llvm/lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp
M llvm/lib/Target/ARM/MCTargetDesc/ARMTargetStreamer.cpp
M llvm/lib/Target/BPF/Disassembler/BPFDisassembler.cpp
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchAsmBackend.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp
M llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXTargetStreamer.cpp
M llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCCodeEmitter.h
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp
M llvm/lib/Target/Sparc/Disassembler/SparcDisassembler.cpp
M llvm/lib/Target/Sparc/MCTargetDesc/SparcMCCodeEmitter.cpp
M llvm/lib/Target/SystemZ/AsmParser/SystemZAsmParser.cpp
M llvm/lib/Target/SystemZ/MCTargetDesc/SystemZHLASMAsmStreamer.h
M llvm/lib/Target/SystemZ/MCTargetDesc/SystemZTargetStreamer.cpp
M llvm/lib/Target/TargetLoweringObjectFile.cpp
M llvm/lib/Target/VE/Disassembler/VEDisassembler.cpp
M llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyTargetStreamer.cpp
M llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86WinCOFFTargetStreamer.cpp
M llvm/tools/llvm-objdump/llvm-objdump.cpp
M llvm/utils/TableGen/AsmMatcherEmitter.cpp
Log Message:
-----------
[MC] Make MCContext::getAsmInfo return a reference. NFC (#194523)
The MAI member is non-null. #194280 made this clearer by making the
MCContext constructor take MCAsmInfo by reference. Convert getAsmInfo to
return const MCAsmInfo & and the member to a reference.
Commit: 6a0a18b1bb6098065833f73c3709f631f0b130e5
https://github.com/llvm/llvm-project/commit/6a0a18b1bb6098065833f73c3709f631f0b130e5
Author: Anonmiraj <ezzibrahimx at gmail.com>
Date: 2026-04-28 (Tue, 28 Apr 2026)
Changed paths:
M libc/shared/math.h
A libc/shared/math/sqrtl.h
M libc/src/__support/math/CMakeLists.txt
A libc/src/__support/math/sqrtl.h
M libc/src/math/generic/CMakeLists.txt
M libc/src/math/generic/sqrtl.cpp
M libc/test/shared/CMakeLists.txt
M libc/test/shared/shared_math_constexpr_test.cpp
M libc/test/shared/shared_math_test.cpp
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[libc][math] Refactor sqrtl family to header-only (#194510)
part of: #147386
---------
Co-authored-by: bassiounix <muhammad.m.bassiouni at gmail.com>
Commit: 1cb85dd46074e4e081995407cae973eee4a1aa38
https://github.com/llvm/llvm-project/commit/1cb85dd46074e4e081995407cae973eee4a1aa38
Author: Kareem Ergawy <kareem.ergawy at amd.com>
Date: 2026-04-28 (Tue, 28 Apr 2026)
Changed paths:
M flang/lib/Optimizer/OpenMP/MapInfoFinalization.cpp
M flang/test/Transforms/omp-map-info-finalization-usm.fir
A offload/test/offloading/fortran/usm-box-parent-descriptor-close.f90
Log Message:
-----------
[Flang][OpenMP] Clear close on descriptor members for box parents in USM (#194287)
Extend the MapInfoFinalization walk introduced in #185330 so
parent/member close consistency is enforced whenever
unified_shared_memory is in effect, not only when the parent map's
variable is a fir.RecordType. Allocatable (box) roots expand to member
maps the same way as derived-type instances; getDescriptorMapType may
add OMP_MAP_CLOSE to implicit descriptor members while the parent map
does not set close, which led to bad device behavior under
-fopenmp-force-usm with multiple mapped allocatables.
PR stack:
- https://github.com/llvm/llvm-project/pull/194287 (this one)
- https://github.com/llvm/llvm-project/pull/194291
Co-authored-by: Composer (Cursor) <ai at cursor.com>
Commit: 0b7144832541f6c076d6a3e57b2d0678056d6fa4
https://github.com/llvm/llvm-project/commit/0b7144832541f6c076d6a3e57b2d0678056d6fa4
Author: Anshul Nigham <nigham at google.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M llvm/docs/RemoveDIsDebugInfo.md
M llvm/docs/SandboxIR.md
Log Message:
-----------
[Docs] Update indents for SandboxIR and RemoveDIsDebugInfo (#194528)
This distinguishes the doc title from the headers.
Fixes navigation indents for Furo theme update (see
https://github.com/llvm/llvm-project/pull/184440).
Commit: 922d95aefd7a09661e546a1790285b20fe70719a
https://github.com/llvm/llvm-project/commit/922d95aefd7a09661e546a1790285b20fe70719a
Author: Chaitanya <Krishna.Sankisa at amd.com>
Date: 2026-04-28 (Tue, 28 Apr 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenBuiltinAMDGPU.cpp
M clang/test/CIR/CodeGenHIP/builtins-amdgcn.hip
Log Message:
-----------
[CIR][AMDGPU] Add lowering for amdgcn div fmas builtins (#194334)
Upstreaming ClangIR PR: https://github.com/llvm/clangir/pull/2051
This PR adds support for lowering of _builtin_amdgcn_div_fmas* amdgpu
builtins to clangIR.
Followed similar lowering from reference clang->llvmir in
clang/lib/CodeGen/TargetBuiltins/AMDGPU.cpp.
Commit: 3deb42b4f8443b5f752243aaddc54428e4c9e91f
https://github.com/llvm/llvm-project/commit/3deb42b4f8443b5f752243aaddc54428e4c9e91f
Author: Lang Hames <lhames at gmail.com>
Date: 2026-04-28 (Tue, 28 Apr 2026)
Changed paths:
M orc-rt/include/orc-rt/sps-ci/AllSPSCI.h
M orc-rt/lib/executor/sps-ci/AllSPSCI.cpp
Log Message:
-----------
[orc-rt] Sink include into implementation file. (#194379)
Commit: 404993528edc027deb32bbbf65895abe86d12726
https://github.com/llvm/llvm-project/commit/404993528edc027deb32bbbf65895abe86d12726
Author: dyung <douglas.yung at sony.com>
Date: 2026-04-28 (Tue, 28 Apr 2026)
Changed paths:
M clang/test/Driver/modules-driver-import-std.cpp
Log Message:
-----------
Fix UNSUPPORTED added to test in #194502. (#194541)
The change in #194502 attempted to mark the test as UNSUPPORTED for
AArch64, but it didn't work because it wasn't specified correctly. This
fixes it.
Commit: c8ff86259ba7349412f6a0c1efa88d0f218ca276
https://github.com/llvm/llvm-project/commit/c8ff86259ba7349412f6a0c1efa88d0f218ca276
Author: Fangrui Song <i at maskray.me>
Date: 2026-04-28 (Tue, 28 Apr 2026)
Changed paths:
M bolt/lib/Rewrite/DWARFRewriter.cpp
M llvm/include/llvm/CodeGen/AsmPrinter.h
M llvm/include/llvm/MC/MCSymbol.h
M llvm/lib/CodeGen/AsmPrinter/ARMException.cpp
M llvm/lib/CodeGen/AsmPrinter/AddressPool.cpp
M llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
M llvm/lib/CodeGen/AsmPrinter/AsmPrinterDwarf.cpp
M llvm/lib/CodeGen/AsmPrinter/AsmPrinterInlineAsm.cpp
M llvm/lib/CodeGen/AsmPrinter/CodeViewDebug.cpp
M llvm/lib/CodeGen/AsmPrinter/DwarfCFIException.cpp
M llvm/lib/CodeGen/AsmPrinter/DwarfCompileUnit.cpp
M llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp
M llvm/lib/CodeGen/AsmPrinter/DwarfExpression.cpp
M llvm/lib/CodeGen/AsmPrinter/DwarfUnit.cpp
M llvm/lib/CodeGen/AsmPrinter/EHStreamer.cpp
M llvm/lib/CodeGen/AsmPrinter/WinException.cpp
M llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
M llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
M llvm/lib/Target/ARM/ARMAsmPrinter.cpp
M llvm/lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp
M llvm/lib/Target/BPF/BPFAsmPrinter.cpp
M llvm/lib/Target/CSKY/CSKYAsmPrinter.cpp
M llvm/lib/Target/Lanai/LanaiAsmPrinter.cpp
M llvm/lib/Target/Lanai/LanaiMCInstLower.cpp
M llvm/lib/Target/LoongArch/LoongArchAsmPrinter.cpp
M llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp
M llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
M llvm/lib/Target/RISCV/RISCVAsmPrinter.cpp
M llvm/lib/Target/SystemZ/SystemZAsmPrinter.cpp
M llvm/lib/Target/X86/X86AsmPrinter.cpp
M llvm/lib/Target/X86/X86MCInstLower.cpp
M llvm/lib/Target/XCore/XCoreAsmPrinter.cpp
M llvm/unittests/DebugInfo/DWARF/DwarfGenerator.cpp
Log Message:
-----------
[CodeGen] Make AsmPrinter::MAI a reference. NFC (#194538)
AsmPrinter::MAI is non-null. This is made more explicit after
PR #194523 changed TargetMachine::getMCAsmInfo to return a reference
with recent MCAsmInfo/MCTargetOptions related refactoring.
Convert the member from const MCAsmInfo * to const MCAsmInfo & and
update all consumers.
Commit: 33b9e74a098e345f4a6c134d54299bde1b24b64b
https://github.com/llvm/llvm-project/commit/33b9e74a098e345f4a6c134d54299bde1b24b64b
Author: Harlen Batagelo <hbatagelo at gmail.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M clang-tools-extra/clang-tidy/bugprone/SuspiciousIncludeCheck.cpp
Log Message:
-----------
[clang-tidy] Fix UB in SuspiciousIncludeCheck when IgnoredRegex is not set (#194521)
When the "IgnoredRegex" option is not set, `IgnoredRegexString` is
default-constructed, i.e. initialized with a null data pointer. This is
passed to `llvm_regcomp` as the pattern argument, causing a nullptr+0 UB
in regcomp.c (caught by UBSan). Fix by initializing
`IgnoredRegexString` with an empty string literal instead.
Commit: fb2c65dec1bf2dc0afd2545504255370f9e5a9f5
https://github.com/llvm/llvm-project/commit/fb2c65dec1bf2dc0afd2545504255370f9e5a9f5
Author: Pablo Antonio Martinez <pamartin at amd.com>
Date: 2026-04-28 (Tue, 28 Apr 2026)
Changed paths:
M mlir/lib/Conversion/TosaToLinalg/TosaToLinalgPass.cpp
A mlir/test/Conversion/TosaToLinalg/tosa-to-linalg-pipeline-no-validation.mlir
Log Message:
-----------
[mlir][tosa] Make tosa-attach-target optional in addTosaToLinalgPasses (#193467)
addTosaToLinalgPasses unconditionally scheduled tosa-attach-target, thus
adding a `tosa.target_env` attribute to the module. Callers therefore
had no way to opt out of such attribute. This attribute is consumed if
validationOptions is enabled, which is optional. Therefore, if the
caller disables validationOptions, the tosa-attach-target attribute will
exist even after TosaToLinalg. So consumers that don't load the TOSA
dialect can't even parse the resulting module.
This PR makes sure that we schedule tosa-attach-target only when the
caller actually needs it, i.e. when validationOptions or
attachTargetOptions is set. The default values stay inside the
`!attachTargetOptions` branch so callers that set validationOptions
still get a target env to validate against, preserving existing
behavior.
Also add a `validation` pipeline option (default `true`) to the
registered `tosa-to-linalg-pipeline`, so it can be invoked without
scheduling either `tosa-attach-target` / `tosa-validate`. A lit test is
also added.
Commit: 50a6d97689873b1c376f966dd82cb9c656463193
https://github.com/llvm/llvm-project/commit/50a6d97689873b1c376f966dd82cb9c656463193
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-04-28 (Tue, 28 Apr 2026)
Changed paths:
M clang/lib/AST/ByteCode/Interp.cpp
M clang/test/AST/ByteCode/openmp.cpp
Log Message:
-----------
[clang][bytecode] Reject more constexpr-unknown pointers in CheckStore (#194529)
Even in constant contexts.
Commit: 7b49e58d692ef13b158056eebb0bb23c6b1192f9
https://github.com/llvm/llvm-project/commit/7b49e58d692ef13b158056eebb0bb23c6b1192f9
Author: Anonmiraj <ezzibrahimx at gmail.com>
Date: 2026-04-28 (Tue, 28 Apr 2026)
Changed paths:
M libc/shared/math.h
A libc/shared/math/fmaximum.h
A libc/shared/math/fmaximumbf16.h
A libc/shared/math/fmaximumf.h
A libc/shared/math/fmaximumf128.h
A libc/shared/math/fmaximumf16.h
A libc/shared/math/fmaximuml.h
A libc/shared/math/fminimum.h
A libc/shared/math/fminimumbf16.h
A libc/shared/math/fminimumf.h
A libc/shared/math/fminimumf128.h
A libc/shared/math/fminimumf16.h
A libc/shared/math/fminimuml.h
M libc/src/__support/FPUtil/BasicOperations.h
M libc/src/__support/math/CMakeLists.txt
A libc/src/__support/math/fmaximum.h
A libc/src/__support/math/fmaximumbf16.h
A libc/src/__support/math/fmaximumf.h
A libc/src/__support/math/fmaximumf128.h
A libc/src/__support/math/fmaximumf16.h
A libc/src/__support/math/fmaximuml.h
A libc/src/__support/math/fminimum.h
A libc/src/__support/math/fminimumbf16.h
A libc/src/__support/math/fminimumf.h
A libc/src/__support/math/fminimumf128.h
A libc/src/__support/math/fminimumf16.h
A libc/src/__support/math/fminimuml.h
M libc/src/math/generic/CMakeLists.txt
M libc/src/math/generic/fmaximum.cpp
M libc/src/math/generic/fmaximumbf16.cpp
M libc/src/math/generic/fmaximumf.cpp
M libc/src/math/generic/fmaximumf128.cpp
M libc/src/math/generic/fmaximumf16.cpp
M libc/src/math/generic/fmaximuml.cpp
M libc/src/math/generic/fminimum.cpp
M libc/src/math/generic/fminimumbf16.cpp
M libc/src/math/generic/fminimumf.cpp
M libc/src/math/generic/fminimumf128.cpp
M libc/src/math/generic/fminimumf16.cpp
M libc/src/math/generic/fminimuml.cpp
M libc/test/shared/CMakeLists.txt
M libc/test/shared/shared_math_constexpr_test.cpp
M libc/test/shared/shared_math_test.cpp
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[libc][math] Refactor fmaximum-fminimum family to header-only (#194533)
Refactors the fmaximum-fminimum math family to be header-only.
part of: #147386
Target Functions:
- fmaximum
- fmaximumbf16
- fmaximumf
- fmaximumf128
- fmaximumf16
- fmaximuml
- fminimum
- fminimumbf16
- fminimumf
- fminimumf128
- fminimumf16
- fminimuml
Commit: 4c092f6efb8bb25cafb336ca0787659b34906886
https://github.com/llvm/llvm-project/commit/4c092f6efb8bb25cafb336ca0787659b34906886
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-04-28 (Tue, 28 Apr 2026)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.h
M clang/test/AST/ByteCode/records.cpp
Log Message:
-----------
[clang][bytecode] Add a missing fallthrough() call (#194537)
When the local variable is enabled but we don't emit any dtor
instructions, we need to fallthrough to the `EndLabel`.
Commit: 81462759088828bf095c779dce2af7c4ce7b6d8b
https://github.com/llvm/llvm-project/commit/81462759088828bf095c779dce2af7c4ce7b6d8b
Author: Anonmiraj <ezzibrahimx at gmail.com>
Date: 2026-04-28 (Tue, 28 Apr 2026)
Changed paths:
M libc/shared/math.h
A libc/shared/math/fmin.h
A libc/shared/math/fminbf16.h
A libc/shared/math/fminf.h
A libc/shared/math/fminf128.h
A libc/shared/math/fminf16.h
A libc/shared/math/fminl.h
M libc/src/__support/FPUtil/BasicOperations.h
M libc/src/__support/math/CMakeLists.txt
A libc/src/__support/math/fmin.h
A libc/src/__support/math/fminbf16.h
A libc/src/__support/math/fminf.h
A libc/src/__support/math/fminf128.h
A libc/src/__support/math/fminf16.h
A libc/src/__support/math/fminl.h
M libc/src/math/generic/CMakeLists.txt
M libc/src/math/generic/fmin.cpp
M libc/src/math/generic/fminbf16.cpp
M libc/src/math/generic/fminf.cpp
M libc/src/math/generic/fminf128.cpp
M libc/src/math/generic/fminf16.cpp
M libc/src/math/generic/fminl.cpp
M libc/test/shared/CMakeLists.txt
M libc/test/shared/shared_math_constexpr_test.cpp
M libc/test/shared/shared_math_test.cpp
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[libc][math] Refactor fmin family to header-only (#194549)
Refactors the fmin math family to be header-only.
part of: #147386
Target Functions:
- fmin
- fminbf16
- fminf
- fminf128
- fminf16
- fminl
Commit: 4f6b1b01f62f1bcce3192c60905904b3e965f128
https://github.com/llvm/llvm-project/commit/4f6b1b01f62f1bcce3192c60905904b3e965f128
Author: Fabian Ritter <fabian.ritter at amd.com>
Date: 2026-04-28 (Tue, 28 Apr 2026)
Changed paths:
M llvm/docs/AMDGPUUsage.rst
M llvm/docs/LangRef.rst
Log Message:
-----------
[LangRef][AMDGPU] Specify that syncscope can cause atomic operations to race (#189015)
Targets should be able to specify that the syncscope of atomic operations
influences whether they participate in data races with each other.
For example, in AMDGPU, we want (and already implement) the load in the
following case to be in a data race (i.e., return `undef` according to the
current definition), because there is an atomic store with workgroup syncscope
executing in a different workgroup:
```
; workgroup 0:
store atomic i32 1, ptr %p syncscope("workgroup") monotonic, align 4
; workgroup 1:
store atomic i32 2, ptr %p syncscope("workgroup") monotonic, align 4
load atomic i32, ptr %p syncscope("workgroup") monotonic, align 4
```
This is consistent with the behavior of, e.g., [heterogeneous-race-free (HRF)
memory models](https://research.cs.wisc.edu/multifacet/papers/asplos14_hrf.pdf) and the [HSA memory model](https://hsafoundation.com/standards/).
Related RFC: https://discourse.llvm.org/t/rfc-clarifying-llvm-irs-concurrent-memory-model/90480
Commit: d48b6314a7adccc56c1849c01bffcbfc739f7bdf
https://github.com/llvm/llvm-project/commit/d48b6314a7adccc56c1849c01bffcbfc739f7bdf
Author: Anonmiraj <ezzibrahimx at gmail.com>
Date: 2026-04-28 (Tue, 28 Apr 2026)
Changed paths:
M libc/src/__support/FPUtil/BasicOperations.h
M libc/src/__support/math/fmax.h
M libc/src/__support/math/fmaxbf16.h
M libc/src/__support/math/fmaxf.h
M libc/src/__support/math/fmaxf128.h
M libc/src/__support/math/fmaxf16.h
M libc/src/__support/math/fmaxl.h
M libc/test/shared/shared_math_constexpr_test.cpp
Log Message:
-----------
[libc][math] Qualify fmax functions to be constexpr (#194551)
Commit: c857cb266957650049ff0543679499d872acc3ef
https://github.com/llvm/llvm-project/commit/c857cb266957650049ff0543679499d872acc3ef
Author: Anonmiraj <ezzibrahimx at gmail.com>
Date: 2026-04-28 (Tue, 28 Apr 2026)
Changed paths:
M libc/shared/math.h
A libc/shared/math/dsqrtf128.h
M libc/src/__support/math/CMakeLists.txt
A libc/src/__support/math/dsqrtf128.h
M libc/src/math/generic/CMakeLists.txt
M libc/src/math/generic/dsqrtf128.cpp
M libc/test/shared/CMakeLists.txt
M libc/test/shared/shared_math_constexpr_test.cpp
M libc/test/shared/shared_math_test.cpp
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[libc][math] Refactor dsqrtf128 to header-only (#194552)
part of: #147386
Commit: 534ba392ade940f78e646301168e8555efda4089
https://github.com/llvm/llvm-project/commit/534ba392ade940f78e646301168e8555efda4089
Author: Fabian Ritter <fabian.ritter at amd.com>
Date: 2026-04-28 (Tue, 28 Apr 2026)
Changed paths:
M llvm/docs/AMDGPUUsage.rst
Log Message:
-----------
[AMDGPUUsage] Specify what one-as syncscopes do (#189016)
This matches the currently implemented and (as far as I could determine)
intended semantics of these syncscopes.
The sync scope table is unchanged except for removing its indentation;
otherwise it would be rendered as part of the preceding note.
Commit: 347c5d6842effdd566b8014b61bf669d0f4a5fdd
https://github.com/llvm/llvm-project/commit/347c5d6842effdd566b8014b61bf669d0f4a5fdd
Author: Fangrui Song <i at maskray.me>
Date: 2026-04-28 (Tue, 28 Apr 2026)
Changed paths:
M llvm/lib/Support/Hash.cpp
Log Message:
-----------
Hash.cpp: include ErrorHandling.h (#194553)
Hash.cpp uses llvm_unreachable but currently picks up ErrorHandling.h
only transitively through xxhash.h -> ArrayRef.h -> Hashing.h.
Commit: 9085c766fa6b69f061e792b1a70fed53673a01cb
https://github.com/llvm/llvm-project/commit/9085c766fa6b69f061e792b1a70fed53673a01cb
Author: Muhammad Bassiouni <60100307+bassiounix at users.noreply.github.com>
Date: 2026-04-28 (Tue, 28 Apr 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[libc][math][bazel] fix build (#194559)
Commit: 61760fd348eea42f3b640e569aaca0489f80f7aa
https://github.com/llvm/llvm-project/commit/61760fd348eea42f3b640e569aaca0489f80f7aa
Author: David Green <david.green at arm.com>
Date: 2026-04-28 (Tue, 28 Apr 2026)
Changed paths:
M llvm/test/CodeGen/AArch64/GlobalISel/fold-fp-select.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-acos.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-asin.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-atan.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-atan2.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-ceil.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-cos.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-cosh.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-fcmp.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-fcopysign.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-fexp2.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-fma.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-fmad.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-fmaximum.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-fmaxnum.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-fminimum.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-fminnum.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-fp-arith-fp16.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-fp-arith.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-fpext.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-fptrunc.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-frint.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-intrinsic-round.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-intrinsic-roundeven.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-intrinsic-trunc.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-log.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-log10.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-log2.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-modf.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-nearbyint.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-pow.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-reduce-fadd.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-reduce-fminmax.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-reduce-fmul.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-sqrt.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-tan.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-tanh.mir
M llvm/test/CodeGen/AArch64/GlobalISel/select-fcmp.mir
Log Message:
-----------
[AArch64][GlobalISel] Update fp legalization mir tests. NFC (#194561)
This updates a number of the floating point mir legalization tests to
use f
types instead of generic s types.
Commit: e4b6407e06ef4326339d4d8970e46cf36ef925f4
https://github.com/llvm/llvm-project/commit/e4b6407e06ef4326339d4d8970e46cf36ef925f4
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-04-28 (Tue, 28 Apr 2026)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/avx512-ext.ll
M llvm/test/CodeGen/X86/avx512-insert-extract.ll
M llvm/test/CodeGen/X86/avx512-mask-op.ll
M llvm/test/CodeGen/X86/masked_store.ll
M llvm/test/CodeGen/X86/vector-replicaton-i1-mask.ll
Log Message:
-----------
[X86] combineKSHIFT - fold kshift(logicop(X,C1),C2) -> logicop(kshift(X,C2),kshift(C1,C2)) (#194343)
Attempt to push KSHIFTs up through logicops in the DAG to expose additional folding
Requires us to add constant folding handling for KSHIFTL/R instructions as well
Yak shaving for #193700
Commit: e9ad51163b9d101131a3bb04994876a32e7c9dea
https://github.com/llvm/llvm-project/commit/e9ad51163b9d101131a3bb04994876a32e7c9dea
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-04-28 (Tue, 28 Apr 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPRecipeBuilder.h
Log Message:
-----------
[VPlan] Remove unused PhisToFix member from VPRecipeBuilder. NFC (#194451)
The field is not referenced anywhere; the only PhisToFix in the codebase
is a local variable in VPlanConstruction.cpp.
Commit: 427423946a6ea78bdea7c54e1afbcfd41333e991
https://github.com/llvm/llvm-project/commit/427423946a6ea78bdea7c54e1afbcfd41333e991
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-04-28 (Tue, 28 Apr 2026)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/packus.ll
Log Message:
-----------
[X86] combineVTRUNCSAT - don't split 128-bit concatenated vectors when folding to PACKSS/US (#194347)
If the VTRUNCS/US node has 128-bit src and dst types, then ensure we
don't split into sub-128-bit vectors - just treat it as padded with
zeros to match VTRUNC behaviour.
Fixes #194344
Commit: fb4af2af00d777fd654064b2d6340ce285468a85
https://github.com/llvm/llvm-project/commit/fb4af2af00d777fd654064b2d6340ce285468a85
Author: Takashi Idobe <idobetakashi at gmail.com>
Date: 2026-04-28 (Tue, 28 Apr 2026)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
A llvm/test/CodeGen/X86/atomic-lock-and-setcc-folded.ll
Log Message:
-----------
[X86] lock opt ptr const inconsistencies (#185195)
Resolves: https://github.com/llvm/llvm-project/issues/147280
The linked issue mentions cases of atomic arithmetic followed by a test
which can be recovered by flags that are emitting cas loops instead of
lock + op which can be inferred from flags.
There's one fold that solves the issue's code: `lock and` sets ZF on the
result of old & C, so any nonzero comparison against new = old & C can
be answered with ZF, so this fold does just that, reduces to a != 0 or
== 0.
I also decided to refactor `shouldExpandCmpArithRMWInIR` into a
dispatching function and make `getCmpArithCC` just return X86::CondCodes
directly. This deleted the dispatching switch later in the code.
Also I broke out the different cases of `getCmpArithWithCC` into helper
functions for each case (add, sub, and, xor, or, add with overflow, sub
with overflow) and turned them guard clause style to reduce nesting
since the original `getCmpArithWithCC` had everything in a nested
function which was hard to read. The functions are named so it's
straightforward to add new cases or move them around as desired.
Commit: 20ae89477021638fa03bc8664c215b5e44662012
https://github.com/llvm/llvm-project/commit/20ae89477021638fa03bc8664c215b5e44662012
Author: Anonmiraj <ezzibrahimx at gmail.com>
Date: 2026-04-28 (Tue, 28 Apr 2026)
Changed paths:
M libc/shared/math.h
A libc/shared/math/fmaximum_num.h
A libc/shared/math/fmaximum_numbf16.h
A libc/shared/math/fmaximum_numf.h
A libc/shared/math/fmaximum_numf128.h
A libc/shared/math/fmaximum_numf16.h
A libc/shared/math/fmaximum_numl.h
A libc/shared/math/fminimum_num.h
A libc/shared/math/fminimum_numbf16.h
A libc/shared/math/fminimum_numf.h
A libc/shared/math/fminimum_numf128.h
A libc/shared/math/fminimum_numf16.h
A libc/shared/math/fminimum_numl.h
M libc/src/__support/FPUtil/BasicOperations.h
M libc/src/__support/math/CMakeLists.txt
A libc/src/__support/math/fmaximum_num.h
A libc/src/__support/math/fmaximum_numbf16.h
A libc/src/__support/math/fmaximum_numf.h
A libc/src/__support/math/fmaximum_numf128.h
A libc/src/__support/math/fmaximum_numf16.h
A libc/src/__support/math/fmaximum_numl.h
A libc/src/__support/math/fminimum_num.h
A libc/src/__support/math/fminimum_numbf16.h
A libc/src/__support/math/fminimum_numf.h
A libc/src/__support/math/fminimum_numf128.h
A libc/src/__support/math/fminimum_numf16.h
A libc/src/__support/math/fminimum_numl.h
M libc/src/math/generic/CMakeLists.txt
M libc/src/math/generic/fmaximum_num.cpp
M libc/src/math/generic/fmaximum_numbf16.cpp
M libc/src/math/generic/fmaximum_numf.cpp
M libc/src/math/generic/fmaximum_numf128.cpp
M libc/src/math/generic/fmaximum_numf16.cpp
M libc/src/math/generic/fmaximum_numl.cpp
M libc/src/math/generic/fminimum_num.cpp
M libc/src/math/generic/fminimum_numbf16.cpp
M libc/src/math/generic/fminimum_numf.cpp
M libc/src/math/generic/fminimum_numf128.cpp
M libc/src/math/generic/fminimum_numf16.cpp
M libc/src/math/generic/fminimum_numl.cpp
M libc/test/shared/CMakeLists.txt
M libc/test/shared/shared_math_constexpr_test.cpp
M libc/test/shared/shared_math_test.cpp
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[libc][math] Refactor fmaximum_num-fminimum_num family to header-only (#194562)
Refactors the fmaximum_num-fminimum_num math family to be header-only.
part of: #147386
Target Functions:
- fmaximum_num
- fmaximum_numbf16
- fmaximum_numf
- fmaximum_numf128
- fmaximum_numf16
- fmaximum_numl
- fminimum_num
- fminimum_numbf16
- fminimum_numf
- fminimum_numf128
- fminimum_numf16
- fminimum_numl
Commit: 9edf0e73b59540ccec25b355268ebff6d3bba4ef
https://github.com/llvm/llvm-project/commit/9edf0e73b59540ccec25b355268ebff6d3bba4ef
Author: jeanPerier <jperier at nvidia.com>
Date: 2026-04-28 (Tue, 28 Apr 2026)
Changed paths:
M flang/include/flang/Optimizer/Analysis/ArraySectionAnalyzer.h
M flang/lib/Optimizer/Analysis/ArraySectionAnalyzer.cpp
M flang/lib/Optimizer/HLFIR/Transforms/ScheduleOrderedAssignments.cpp
A flang/test/HLFIR/order_assignments/where-equivalent-subscripts.fir
Log Message:
-----------
[flang] improve array section analysis for WHERE (#194399)
The array section analysis in the HLFIR pass in charge of WHERE lowering
was unable to tell that the LHS and RHS are the same array section when
the base is an assumed shape or when a variable is used as indices.
This patch adds an optional callback to the array section
analysis to tell if two SSA values have the same value. This call back
is then implemented to tell that two SSA values are the same only if:
they are the result of equivalent operations with no memory effect (ok
to be non speculatable) and with operands that have the same value
(recursively), or if they are the load from the same variable (which is
OK in the context of WHERE RHS/LHS thanks to Fortran 2023 10.1.4 that
guarantee that a variable referred both on the RHS and LHS cannot be
modified by side effects in the RHS/LHS).
Assisted by: Claude
Commit: a910a0b4b5252627c0150c26ba94cc8479ad6e1a
https://github.com/llvm/llvm-project/commit/a910a0b4b5252627c0150c26ba94cc8479ad6e1a
Author: Arun Thangamani <arun.thangamani at intel.com>
Date: 2026-04-28 (Tue, 28 Apr 2026)
Changed paths:
M mlir/lib/Dialect/X86/Transforms/VectorContractToPackedTypeDotProduct.cpp
M mlir/test/Dialect/X86/vector-contract-to-packed-type-dotproduct.mlir
Log Message:
-----------
[mlir][x86] Fix - Replace `load` with `transfer_read` to support on tensor type. (#194543)
This `patch` replaces `vector.load` operation with
`vector.transfer_read` op, such that the re-write lowers
`vector.contract` ops to `bf16_avx512_dp`.
Commit: 711a17d0b38e15f786e4ed709a3219cdf5bb3119
https://github.com/llvm/llvm-project/commit/711a17d0b38e15f786e4ed709a3219cdf5bb3119
Author: David Green <david.green at arm.com>
Date: 2026-04-28 (Tue, 28 Apr 2026)
Changed paths:
M llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h
M llvm/include/llvm/CodeGenTypes/LowLevelType.h
M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
M llvm/test/CodeGen/AArch64/bf16-instructions.ll
M llvm/test/CodeGen/AArch64/bf16-v4-instructions.ll
M llvm/test/CodeGen/AArch64/bf16-v8-instructions.ll
Log Message:
-----------
[AArch64][GlobalISel] Lower BF16 FPTRUNC (#193941)
When the architecture +bf16 features is available this is simple as we
lower to a standard instruction. When not available we need to expand to
a series of instructions that performs the necessary rounding. The code
to do that is a port of TargetLowering::expandFP_ROUND to GISel, minus
the float64 odd rounding via expandRoundInexactToOdd. f64 will follow in
a followup patch.
uitofp and sitofp are currently disabled, so that we can take this one
step at a time and check each part in turn. The LLT fp types attempt to
return true for ieee types without UseExtended for types of the correct
size, always returning false for non-standard types.
Commit: a726282909d70eac4d2a89e7e2558927a34a9c1e
https://github.com/llvm/llvm-project/commit/a726282909d70eac4d2a89e7e2558927a34a9c1e
Author: David Spickett <david.spickett at arm.com>
Date: 2026-04-28 (Tue, 28 Apr 2026)
Changed paths:
M lldb/source/Commands/CommandObjectMultiword.cpp
M lldb/source/Commands/CommandObjectProcess.cpp
M lldb/source/Commands/CommandObjectRegister.cpp
M lldb/source/Commands/CommandObjectSource.cpp
M lldb/source/Commands/CommandObjectTarget.cpp
M lldb/source/Commands/CommandObjectThread.cpp
M lldb/source/Commands/CommandObjectType.cpp
M lldb/source/Commands/CommandObjectWatchpoint.cpp
M lldb/source/Commands/CommandObjectWatchpointCommand.cpp
M lldb/source/Interpreter/CommandInterpreter.cpp
M lldb/test/API/functionalities/wrong_commands/TestWrongCommands.py
M lldb/test/API/python_api/interpreter/TestCommandInterpreterAPI.py
Log Message:
-----------
[lldb] Remove full stop from AppendErrorWithFormat format strings (part 2) (#194352)
To fit the style guide:
https://llvm.org/docs/CodingStandards.html#error-and-warning-messages
I found these with:
* Find `(\.AppendErrorWithFormat\(([\s\r\n]+)?"(?:(?:\\.|[^"\\])*))\."`
and replace with `$1"` using Visual Studio Code.
* Putting a call to `validate_diagnostic` in `AppendErrorWithFormat`.
* Manual inspection.
Note that this change *does not* include a call to `validate_diagnostic`
because I do not know what's going to crash on platforms that I haven't
tested on.
Commit: a6cf1aa076d240ca54797e47d9a45d3be6062829
https://github.com/llvm/llvm-project/commit/a6cf1aa076d240ca54797e47d9a45d3be6062829
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-04-28 (Tue, 28 Apr 2026)
Changed paths:
M mlir/lib/Dialect/SPIRV/IR/SPIRVOps.cpp
M mlir/test/Dialect/SPIRV/IR/structure-ops.mlir
Log Message:
-----------
[mlir][SPIR-V] Allow SpecConstantComposite constituents to reference other SpecConstantComposites (#193416)
The verifier for spirv.SpecConstantComposite previously assumed all
constituents were spirv.SpecConstant ops, which caused a crash when
referencing nested spirv.SpecConstantComposite ops
Per the SPIR-V spec (s3.3.7, OpSpecConstantComposite), constituents
"must be the \<id\>s of other specialization constants, constant
declarations, or an OpUndef", which includes OpSpecConstantComposite
Commit: f5b6e4fc202292300140cc6af07e1731b10bf9f5
https://github.com/llvm/llvm-project/commit/f5b6e4fc202292300140cc6af07e1731b10bf9f5
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2026-04-28 (Tue, 28 Apr 2026)
Changed paths:
M libcxx/include/CMakeLists.txt
M libcxx/include/__locale_dir/locale_base_api.h
R libcxx/include/__support/xlocale/__nop_locale_mgmt.h
Log Message:
-----------
[libc++][NFC] Remove unused header <__support/xlocale/__nop_locale_mgmt.h> (#194316)
Commit: a54419a2fd2e86b8e386c9a978cc12e839e8311b
https://github.com/llvm/llvm-project/commit/a54419a2fd2e86b8e386c9a978cc12e839e8311b
Author: ZhaoQi <zhaoqi01 at loongson.cn>
Date: 2026-04-28 (Tue, 28 Apr 2026)
Changed paths:
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/lib/Target/LoongArch/LoongArchLASXInstrInfo.td
M llvm/lib/Target/LoongArch/LoongArchLSXInstrInfo.td
M llvm/test/CodeGen/LoongArch/lasx/ir-instruction/avgfloor-ceil.ll
M llvm/test/CodeGen/LoongArch/lsx/ir-instruction/avgfloor-ceil.ll
Log Message:
-----------
[LoongArch] Set `avg{floor/ceil}{s/u}` as legal for lsx and lasx (#165836)
Suggested-by: tangaac <tangyan01 at loongson.cn>
Link:
https://github.com/llvm/llvm-project/pull/161079#issuecomment-3420763377
Commit: 255263560860a50ef6c083df815e2bd1577debd8
https://github.com/llvm/llvm-project/commit/255263560860a50ef6c083df815e2bd1577debd8
Author: hev <wangrui at loongson.cn>
Date: 2026-04-28 (Tue, 28 Apr 2026)
Changed paths:
A llvm/test/CodeGen/LoongArch/lasx/bitclr.ll
A llvm/test/CodeGen/LoongArch/lasx/bitrev.ll
A llvm/test/CodeGen/LoongArch/lasx/bitset.ll
A llvm/test/CodeGen/LoongArch/lsx/bitclr.ll
A llvm/test/CodeGen/LoongArch/lsx/bitrev.ll
A llvm/test/CodeGen/LoongArch/lsx/bitset.ll
Log Message:
-----------
[LoongArch][NFC] Add tests for VBITCLRI, VBITSETI, and VBITREVI (#193718)
Commit: ac41786510b4636c3f1f24a167479a3f39337677
https://github.com/llvm/llvm-project/commit/ac41786510b4636c3f1f24a167479a3f39337677
Author: Harry Ramsey <harry.ramsey at arm.com>
Date: 2026-04-28 (Tue, 28 Apr 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/test/CodeGen/AArch64/sve-gather-scatter-addr-opts.ll
Log Message:
-----------
[AArch64][SDAG] Fix invalid index into STEP_VECTOR operand (#193236)
This commit fixes an invalid index into STEP_VECTOR constant operand
trying to find a more optimal addressing type.
Related Issue:
https://github.com/llvm/llvm-project/issues/193014#event-24715078836
Commit: 09cd2944821fa43d97d8259194b9a0c4fa22de16
https://github.com/llvm/llvm-project/commit/09cd2944821fa43d97d8259194b9a0c4fa22de16
Author: Amit Tiwari <amtiwari at amd.com>
Date: 2026-04-28 (Tue, 28 Apr 2026)
Changed paths:
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/lib/Sema/SemaOpenMP.cpp
M clang/test/OpenMP/target_data_device_messages.cpp
M clang/test/OpenMP/target_device_messages.cpp
A clang/test/OpenMP/target_device_omp_initial_invalid.c
M clang/test/OpenMP/target_enter_data_device_messages.cpp
M clang/test/OpenMP/target_exit_data_device_messages.cpp
M clang/test/OpenMP/target_parallel_device_messages.cpp
M clang/test/OpenMP/target_parallel_for_device_messages.cpp
M clang/test/OpenMP/target_parallel_for_simd_device_messages.cpp
M clang/test/OpenMP/target_simd_device_messages.cpp
M clang/test/OpenMP/target_teams_device_messages.cpp
M clang/test/OpenMP/target_teams_distribute_device_messages.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_device_messages.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_simd_device_messages.cpp
M clang/test/OpenMP/target_teams_distribute_simd_device_messages.cpp
M clang/test/OpenMP/target_update_device_messages.cpp
M offload/include/OpenMP/omp.h
M openmp/device/include/DeviceTypes.h
M openmp/runtime/src/include/omp.h.var
Log Message:
-----------
[Clang][OpenMP] Validate omp_initial_device omp_invalid_device as device IDs (#193688)
The counterpart fix for clang (as too done here:
[flang-fix](https://github.com/llvm/llvm-project/pull/193669))
The incorrectly interpreted device values in the `target` directive
throws:
```
error: argument to 'device' clause must be a non-negative integer value
#pragma omp target device(-1)
^~
error: argument to 'device' clause must be a non-negative integer value
#pragma omp target device(omp_invalid_device)
^~~~~~~~~~~~~~~~~~
```
Commit: e8ca5853c8233927dab15b4b429ea129df853b4a
https://github.com/llvm/llvm-project/commit/e8ca5853c8233927dab15b4b429ea129df853b4a
Author: Longsheng Mou <longshengmou at gmail.com>
Date: 2026-04-28 (Tue, 28 Apr 2026)
Changed paths:
M mlir/lib/Dialect/Arith/IR/ArithOps.cpp
Log Message:
-----------
[mlir][arith] Remove redundant lambdas (NFC) (#194376)
Replace trivial lambda wrappers with direct function references. The
lambdas simply forwarded their arguments to existing functions, so
passing the function directly is clearer and more concise.
Commit: 0c174232664f0eb38576b35d1f796b6c7c582926
https://github.com/llvm/llvm-project/commit/0c174232664f0eb38576b35d1f796b6c7c582926
Author: ZhaoQi <zhaoqi01 at loongson.cn>
Date: 2026-04-28 (Tue, 28 Apr 2026)
Changed paths:
M llvm/lib/Target/LoongArch/LoongArchLASXInstrInfo.td
M llvm/lib/Target/LoongArch/LoongArchLSXInstrInfo.td
M llvm/test/CodeGen/LoongArch/lasx/ctpop-ctlz.ll
M llvm/test/CodeGen/LoongArch/lsx/ctpop-ctlz.ll
Log Message:
-----------
[LoongArch] Add patterns for `[x]vclo.{b/h/w/d}` instructions (#165985)
Commit: 33117e7f5bd5948d7873987e8e22c79271bc5237
https://github.com/llvm/llvm-project/commit/33117e7f5bd5948d7873987e8e22c79271bc5237
Author: Harry Ramsey <harry.ramsey at arm.com>
Date: 2026-04-28 (Tue, 28 Apr 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/test/Transforms/InstCombine/AArch64/sve-intrinsic-comb-all-active-lanes-cvt.ll
M llvm/test/Transforms/InstCombine/AArch64/sve-intrinsic-comb-no-active-lanes.ll
Log Message:
-----------
[AArch64][ISel] Remove zero instruction for `rev` all true predicates (#192925)
This patch removes the redundant instruction to zero inactive lanes for
SVE2p1 `rev` intrinsics when all lanes are active.
Commit: f409c264f2cd18d069a1cc627850f14ddcea914f
https://github.com/llvm/llvm-project/commit/f409c264f2cd18d069a1cc627850f14ddcea914f
Author: ZhaoQi <zhaoqi01 at loongson.cn>
Date: 2026-04-28 (Tue, 28 Apr 2026)
Changed paths:
M llvm/lib/Target/LoongArch/LoongArchInstrInfo.td
M llvm/test/CodeGen/LoongArch/ctlz-cttz-ctpop.ll
Log Message:
-----------
[LoongArch] Add patterns to match `cto.w/d` when meeting i8/i16 types `not+cttz` (#166124)
Commit: ecb69fb914d6f81f854340cce32ed4c7f9878f64
https://github.com/llvm/llvm-project/commit/ecb69fb914d6f81f854340cce32ed4c7f9878f64
Author: ZhaoQi <zhaoqi01 at loongson.cn>
Date: 2026-04-28 (Tue, 28 Apr 2026)
Changed paths:
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/lib/Target/LoongArch/LoongArchLSXInstrInfo.td
M llvm/test/CodeGen/LoongArch/ctlz-cttz-ctpop.ll
M llvm/test/CodeGen/LoongArch/ctpop-with-lsx.ll
M llvm/test/CodeGen/LoongArch/sextw-removal.ll
Log Message:
-----------
[LoongArch] Optimize for scalar type `ctpop` when lsx enabled (#166286)
Commit: ee8ca6b33ee4ebe61373a491a747c56e656f7312
https://github.com/llvm/llvm-project/commit/ee8ca6b33ee4ebe61373a491a747c56e656f7312
Author: Jan Patrick Lehr <JanPatrick.Lehr at amd.com>
Date: 2026-04-28 (Tue, 28 Apr 2026)
Changed paths:
M flang/lib/Optimizer/OpenMP/MapInfoFinalization.cpp
M flang/test/Transforms/omp-map-info-finalization-usm.fir
R offload/test/offloading/fortran/usm-box-parent-descriptor-close.f90
Log Message:
-----------
Revert "[Flang][OpenMP] Clear close on descriptor members for box parents in USM" (#194568)
Reverts llvm/llvm-project#194287
Buildbot errors in https://lab.llvm.org/buildbot/#/builders/67/builds/3464
local revert fixed the issues.
Commit: 43645be3ecb57d93a10b2fa84081c0c9bc5c8059
https://github.com/llvm/llvm-project/commit/43645be3ecb57d93a10b2fa84081c0c9bc5c8059
Author: Jianjian Guan <jacquesguan at me.com>
Date: 2026-04-28 (Tue, 28 Apr 2026)
Changed paths:
M llvm/lib/Target/RISCV/GISel/RISCVInstructionSelector.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
A llvm/test/CodeGen/RISCV/GlobalISel/rvv/insert-subvector.ll
Log Message:
-----------
[RISCV][GISel] Support select G_INSERT_SUBVECTOR (#171092)
Commit: b46a51d9c29519666f70807b52301d94be804f07
https://github.com/llvm/llvm-project/commit/b46a51d9c29519666f70807b52301d94be804f07
Author: Jianjian Guan <jacquesguan at me.com>
Date: 2026-04-28 (Tue, 28 Apr 2026)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp
M llvm/unittests/CodeGen/GlobalISel/MachineIRBuilderTest.cpp
Log Message:
-----------
[GISel] Add operands check for G_INSERT_SUBVECTOR and G_EXTRACT_SUBVECTOR in buildInstr (#186021)
Commit: 3d1fa9ee9d95aca32e27a34e9916fc246f090543
https://github.com/llvm/llvm-project/commit/3d1fa9ee9d95aca32e27a34e9916fc246f090543
Author: Bea Healy <57840981+TaoBi22 at users.noreply.github.com>
Date: 2026-04-28 (Tue, 28 Apr 2026)
Changed paths:
M mlir/include/mlir/Dialect/SMT/IR/SMTTypes.td
M mlir/lib/Dialect/SMT/IR/SMTTypes.cpp
M mlir/test/Dialect/SMT/basic.mlir
M mlir/unittests/Dialect/SMT/CMakeLists.txt
R mlir/unittests/Dialect/SMT/TypeTest.cpp
Log Message:
-----------
[mlir][smt] Allow empty function domains (#193732)
Commit: 38daaba8e723cfa38e699c64c8e0f2f306523984
https://github.com/llvm/llvm-project/commit/38daaba8e723cfa38e699c64c8e0f2f306523984
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-04-28 (Tue, 28 Apr 2026)
Changed paths:
M llvm/lib/Target/X86/X86MCInstLower.cpp
M llvm/test/CodeGen/X86/gfni-funnel-shifts.ll
M llvm/test/CodeGen/X86/gfni-lzcnt.ll
M llvm/test/CodeGen/X86/gfni-rotates.ll
M llvm/test/CodeGen/X86/gfni-shifts.ll
M llvm/test/CodeGen/X86/gfni-tzcnt.ll
M llvm/test/CodeGen/X86/vector-bitreverse.ll
Log Message:
-----------
[X86] Add constant pool comments for (V)GF2P8AFFINEQB instructions (#194572)
Still need to do predicate/broadcast handling, but that's true for most instructions and we need a decent general mechanism to handle them
Commit: cced4082785cde51cc76d2df76066a5a3feff232
https://github.com/llvm/llvm-project/commit/cced4082785cde51cc76d2df76066a5a3feff232
Author: Julian Brown <julian.brown at amd.com>
Date: 2026-04-28 (Tue, 28 Apr 2026)
Changed paths:
M openmp/runtime/CMakeLists.txt
M openmp/runtime/src/kmp.h
M openmp/runtime/src/kmp_config.h.cmake
M openmp/runtime/src/kmp_global.cpp
M openmp/runtime/src/kmp_settings.cpp
M openmp/runtime/src/kmp_taskdeps.cpp
M openmp/runtime/src/kmp_taskdeps.h
M openmp/runtime/src/kmp_tasking.cpp
M openmp/runtime/test/CMakeLists.txt
M openmp/runtime/test/lit.cfg
M openmp/runtime/test/lit.site.cfg.in
M openmp/runtime/test/tasking/omp_record_replay.cpp
M openmp/runtime/test/tasking/omp_record_replay_deps.cpp
M openmp/runtime/test/tasking/omp_record_replay_deps_multi_succ.cpp
M openmp/runtime/test/tasking/omp_record_replay_multiTDGs.cpp
M openmp/runtime/test/tasking/omp_record_replay_print_dot.cpp
M openmp/runtime/test/tasking/omp_record_replay_taskloop.cpp
Log Message:
-----------
[OpenMP] Rename ompx_taskgraph->omp_taskgraph_experimental
This patch renames the option to enable taskgraph support in the
runtime from OMPX_TASKGRAPH to OMP_TASKGRAPH_EXPERIMENTAL, to reflect
the feature's official status in OpenMP 6.0, but also the feature's
current work-in-progress nature.
commit-id:fa62775a
Reviewers: ro-i
Reviewed By: ro-i
Pull Request: https://github.com/llvm/llvm-project/pull/194045
Commit: efdb493e485ceaa7a80392de338b02d00e9b67e0
https://github.com/llvm/llvm-project/commit/efdb493e485ceaa7a80392de338b02d00e9b67e0
Author: Kito Cheng <kito.cheng at sifive.com>
Date: 2026-04-28 (Tue, 28 Apr 2026)
Changed paths:
M clang/test/CodeGenOpenCL/builtins-f16.cl
M llvm/lib/Target/README.txt
M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
M llvm/lib/Transforms/Utils/SimplifyLibCalls.cpp
M llvm/test/Transforms/InstCombine/AMDGPU/tan.ll
M llvm/test/Transforms/InstCombine/fdiv-cos-sin.ll
M llvm/test/Transforms/InstCombine/fdiv-sin-cos.ll
M llvm/test/Transforms/InstCombine/may-alias-errno.ll
A llvm/test/Transforms/InstCombine/sincos-fpmath.ll
A llvm/test/Transforms/InstCombine/sincos.ll
Log Message:
-----------
[InstCombine] Combine llvm.sin/llvm.cos libcall pairs into llvm.sincos (#184760)
Teach InstCombine to recognize pairs of `llvm.sin(x)` and `llvm.cos(x)`
intrinsic calls that share the same argument and replace them with a
single `llvm.sincos(x)` call, extracting the individual results.
The optimization works in two phases:
1. **SimplifyLibCalls**: Convert `sin`/`cos` C library calls (e.g.
`sinf`, `cosf`, `sin`, `cos`, `sinl`, `cosl`) into `llvm.sin` /
`llvm.cos` intrinsics when the call does not access memory (i.e. does
not set `errno`). This normalization step brings library calls into
the same form as compiler-generated intrinsics.
2. **InstCombineCalls**: When visiting an `llvm.sin` or `llvm.cos`
intrinsic, scan the users of the shared argument for a matching
counterpart. If found, emit a single `llvm.sincos` call placed right
after the argument definition, replace both original calls, and erase
the matched instruction.
Also remove the completed sincos TODO from Target/README.txt.
Commit: 9c6e2733cb027cdfeabf7e61d545fe58b97e439a
https://github.com/llvm/llvm-project/commit/9c6e2733cb027cdfeabf7e61d545fe58b97e439a
Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
Date: 2026-04-28 (Tue, 28 Apr 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp
M clang/test/CodeGen/AArch64/neon-intrinsics.c
M clang/test/CodeGen/AArch64/neon/intrinsics.c
Log Message:
-----------
[clang][CIR] Add lowering for vrshr_ and vrshrq_ rounding intrinsics (#194229)
This PR adds lowering for the vector rounding shift right intrinsice,
i.e. `vrshr_*` and `vrshrq_*` [1]. It also moves the corresponding tests
from:
* clang/test/CodeGen/AArch64/neon_intrinsics.c
to:
* clang/test/CodeGen/AArch64/neon/intrinsics.c
The lowering follows the existing implementation in
CodeGen/TargetBuiltins/ARM.cpp.
Part of #185382.
Reference:
[1] https://arm-software.github.io/acle/neon_intrinsics/advsimd.html#vector-rounding-shift-right
Co-authored-by: Md Mouzam Arfi Hussain <arfihussain27 at gmail.com>
Commit: 7ebd47bb711b99ad3b8a063e79b1a4605e1828fe
https://github.com/llvm/llvm-project/commit/7ebd47bb711b99ad3b8a063e79b1a4605e1828fe
Author: Momchil Velikov <momchil.velikov at arm.com>
Date: 2026-04-28 (Tue, 28 Apr 2026)
Changed paths:
M clang/lib/AST/Type.cpp
M clang/lib/CodeGen/CGExprScalar.cpp
M clang/test/CodeGen/AArch64/sve-vector-compare-ops.c
M clang/test/CodeGenCXX/aarch64-sve-vector-conditional-op.cpp
Log Message:
-----------
[Clang][AArch64] Fix codegen for SVE vector compare operations (#194013)
Overloaded operartors `<`, `>`, `<=`, `>=`, `==`, and `!=` with SVE
integer vector operands emitted LLVM IR with a couple of issues:
* The `icmp` instruction always performed unsigned comparison, even for
signed operands.
* The result of the comparison was zero-extended, whereas the intent is
to follow established NEON conventions and sign-extend it.
This patches fixes these issues.
Commit: 61297945cab34370c33deed04643f021f5bb6dd2
https://github.com/llvm/llvm-project/commit/61297945cab34370c33deed04643f021f5bb6dd2
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-04-28 (Tue, 28 Apr 2026)
Changed paths:
M llvm/test/CodeGen/PowerPC/aix-complex.ll
Log Message:
-----------
[NFC][PowerPC] aix-complex.ll - regenerate test checks (#194576)
Makes it easier to show the diffs in the topological dag work
Commit: 8f6d2cffd5a05e75c007f72026ccaf5972162972
https://github.com/llvm/llvm-project/commit/8f6d2cffd5a05e75c007f72026ccaf5972162972
Author: Charles Zablit <c_zablit at apple.com>
Date: 2026-04-28 (Tue, 28 Apr 2026)
Changed paths:
M lldb/include/lldb/Host/windows/ConnectionConPTYWindows.h
M lldb/include/lldb/Host/windows/PseudoConsole.h
M lldb/source/Host/windows/ConnectionConPTYWindows.cpp
M lldb/source/Host/windows/PseudoConsole.cpp
M lldb/test/API/windows/conpty/TestConPTY.py
Log Message:
-----------
[lldb][windows] inherit cursor's position when creating a ConPTY (#193818)
Commit: 1abb0e87374138e187de151f61b623b4f03f288c
https://github.com/llvm/llvm-project/commit/1abb0e87374138e187de151f61b623b4f03f288c
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-04-28 (Tue, 28 Apr 2026)
Changed paths:
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
M clang/test/AST/ByteCode/builtins.c
Log Message:
-----------
[clang][bytecode] Check builtins for number integers (#194324)
This is unfortunate, but since integers can now also be pointers, we
need to check for this everywhere when evaluating builtin functions.
Commit: e32d3938f164e951f12e02bdad185d6cf9aa4274
https://github.com/llvm/llvm-project/commit/e32d3938f164e951f12e02bdad185d6cf9aa4274
Author: Takuto Ikuta <tikuta at google.com>
Date: 2026-04-28 (Tue, 28 Apr 2026)
Changed paths:
M clang/test/DebugInfo/Generic/debug-prefix-map.c
M clang/test/Driver/ps4-ps5-linker-win.c
M clang/test/Frontend/absolute-paths-windows.test
M clang/test/Frontend/dependency-gen-windows-duplicates.c
M clang/test/Preprocessor/file_test_windows.c
M clang/test/lit.cfg.py
M clang/unittests/Basic/FileManagerTest.cpp
M clang/unittests/Driver/ToolChainTest.cpp
M clang/unittests/Frontend/ReparseWorkingDirTest.cpp
Log Message:
-----------
[clang][test] Fix test failures when LLVM_WINDOWS_PREFER_FORWARD_SLASH is ON (#193156)
This commit addresses several test failures in Clang that occur on
Windows when
the CMake option -DLLVM_WINDOWS_PREFER_FORWARD_SLASH=ON is enabled.
Key changes:
- unit tests: Normalized expected paths to native style using
llvm::sys::path::native
(Basic/FileManagerTest, Frontend/ReparseWorkingDirTest) or updated
diagnostic matching
to be separator-agnostic (Driver/ToolChainTest).
- regression tests: Updated FileCheck patterns to use flexible regex
{{[/\\\\]}} or
{{[/\\\\]+}} to match both path separator styles.
- absolute-paths-windows.test: Skipped when forward slashes are
preferred because
mklink does not support forward slashes in directory paths and
interprets them
as command-line switches. Added 'windows-prefer-forward-slash' lit
feature.
Commit: db001b920668d26523e15c95fa34f85e6b13456e
https://github.com/llvm/llvm-project/commit/db001b920668d26523e15c95fa34f85e6b13456e
Author: Weibo He <NewSigma at 163.com>
Date: 2026-04-28 (Tue, 28 Apr 2026)
Changed paths:
M clang/lib/CodeGen/CGCoroutine.cpp
M clang/test/CodeGenCoroutines/coro-await-resume-eh.cpp
M clang/test/CodeGenCoroutines/coro-dest-slot.cpp
M clang/test/CodeGenCoroutines/coro-gro.cpp
A clang/test/CodeGenCoroutines/coro-gro4.cpp
M clang/test/CodeGenCoroutines/coro-suspend-cleanups.cpp
Log Message:
-----------
[clang][CodeGenCoroutine] Emit missing cleanup scope for lazy GRO conversion (#194281)
In #151067, we promoted GRO ahead of `coro.end`. However, there is a
regression that GRO cleanup might go into coroutine resume and destroy
parts. This patch introduces a dedicated cleanup scope for GRO, ensuring
that GRO cleanup does not interfere with other logic.
Close #193412
Commit: a24c1dedc6f500e515682daa9264c401b4741965
https://github.com/llvm/llvm-project/commit/a24c1dedc6f500e515682daa9264c401b4741965
Author: Jan Patrick Lehr <JanPatrick.Lehr at amd.com>
Date: 2026-04-28 (Tue, 28 Apr 2026)
Changed paths:
M clang/test/CodeGenOpenCL/builtins-f16.cl
M llvm/lib/Target/README.txt
M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
M llvm/lib/Transforms/Utils/SimplifyLibCalls.cpp
M llvm/test/Transforms/InstCombine/AMDGPU/tan.ll
M llvm/test/Transforms/InstCombine/fdiv-cos-sin.ll
M llvm/test/Transforms/InstCombine/fdiv-sin-cos.ll
M llvm/test/Transforms/InstCombine/may-alias-errno.ll
R llvm/test/Transforms/InstCombine/sincos-fpmath.ll
R llvm/test/Transforms/InstCombine/sincos.ll
Log Message:
-----------
Revert "[InstCombine] Combine llvm.sin/llvm.cos libcall pairs into llvm.sincos" (#194589)
Reverts llvm/llvm-project#184760
Breaks buildbot
https://lab.llvm.org/buildbot/#/builders/123/builds/39337
Commit: 0012deaa1b90f7dea5b2f05c7c92902291e46583
https://github.com/llvm/llvm-project/commit/0012deaa1b90f7dea5b2f05c7c92902291e46583
Author: Matt Davis <mattd at nvidia.com>
Date: 2026-04-28 (Tue, 28 Apr 2026)
Changed paths:
M llvm/lib/CodeGen/AsmPrinter/DwarfCompileUnit.cpp
M llvm/lib/CodeGen/AsmPrinter/DwarfCompileUnit.h
A llvm/test/DebugInfo/Generic/global-var-in-abstract-lexical-block.ll
Log Message:
-----------
[AsmPrinter][debug] Materialize abstract lexical blocks referenced by global vars (#193986)
After 63074da2 moved global variable emission from beginModule() to
endModule(), getOrCreateContextDIE() is called after abstract scope DIEs
have been built. However, skipLexicalScope() may have elided an abstract
lexical block that has no local variables. When a global variable (e.g.,
a function-scope static) is scoped to such a block,
getOrCreateContextDIE() returns nullptr causing an assertion. This PR
keeps abstract lexical blocks when they are the scope target of a global
variable in the compile unit.
Derived via LLM usage.
Commit: 412d474f5e1dc9a931a71cf972c5415e6a025a6f
https://github.com/llvm/llvm-project/commit/412d474f5e1dc9a931a71cf972c5415e6a025a6f
Author: Pavel Labath <pavel at labath.sk>
Date: 2026-04-28 (Tue, 28 Apr 2026)
Changed paths:
M libc/include/llvm-libc-macros/linux/sys-socket-macros.h
M libc/test/src/sys/socket/linux/CMakeLists.txt
M libc/test/src/sys/socket/linux/send_recv_test.cpp
M libc/test/src/sys/socket/linux/sendmsg_recvmsg_test.cpp
Log Message:
-----------
[libc] Add the MSG_ flags (#194375)
I've included all of the flags defined on linux, even those not
documented in POSIX (or the manpage). I've also added tests to exercise
the flags, for cases where this can be done with domain sockets.
Commit: 81798298624a61952a2428fc6036794fb2ffb913
https://github.com/llvm/llvm-project/commit/81798298624a61952a2428fc6036794fb2ffb913
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-04-28 (Tue, 28 Apr 2026)
Changed paths:
M clang/lib/AST/ByteCode/Interp.cpp
M clang/lib/AST/ByteCode/Interp.h
M clang/lib/AST/ByteCode/MemberPointer.h
M clang/test/AST/ByteCode/cxx11.cpp
Log Message:
-----------
[clang][bytecode] Check method accessibility in `GetMemberPtrDecl` (#194560)
The decl saved in the `MemberPointer` needs to be accessible from its
Base.
Commit: c206275e6caa9e4ca4f609e0f8be8d144a48d1e1
https://github.com/llvm/llvm-project/commit/c206275e6caa9e4ca4f609e0f8be8d144a48d1e1
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-04-28 (Tue, 28 Apr 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
Log Message:
-----------
[SLP][NFC]Cache some results to improve compile time, NFC
Try to avoid some recalculations, if possible to cache some previous
results
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/194599
Commit: d2fe91171f11bbdb138b21da9cd688632f677b51
https://github.com/llvm/llvm-project/commit/d2fe91171f11bbdb138b21da9cd688632f677b51
Author: Xinlong Chen <xinlongchen at tencent.com>
Date: 2026-04-28 (Tue, 28 Apr 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/test/CodeGen/RISCV/combine-is_fpclass.ll
Log Message:
-----------
[DAG] computeKnownFPClass - add ISD::FCOPYSIGN handling (#193672)
This PR implements `ISD::FCOPYSIGN` in
`SelectionDAG::computeKnownFPClass`, propagating class info from the
magnitude operand and sign-bit info from the sign operand.
Additionally, added RISC-V test coverage for `ISD::FCOPYSIGN`.
closes #193501
Commit: 14e69bd4c9e12d8f987636dccbfbe91bd537c902
https://github.com/llvm/llvm-project/commit/14e69bd4c9e12d8f987636dccbfbe91bd537c902
Author: Pierre van Houtryve <pierre.vanhoutryve at amd.com>
Date: 2026-04-28 (Tue, 28 Apr 2026)
Changed paths:
M llvm/docs/AMDGPUUsage.rst
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
A llvm/test/CodeGen/AMDGPU/lds-barrier-memoperand.ll
Log Message:
-----------
[AMDGPU] Make `ds_atomic_barrier` operations atomic (#194351)
Add the MMO, and document them as such in AMDGPUUsage.
Commit: 0342d2f10d0bcf84108f879aaf55a7414653a102
https://github.com/llvm/llvm-project/commit/0342d2f10d0bcf84108f879aaf55a7414653a102
Author: tigbr <gabor.tothvari at ericsson.com>
Date: 2026-04-28 (Tue, 28 Apr 2026)
Changed paths:
M clang/include/clang/StaticAnalyzer/Checkers/Taint.h
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/CallEvent.h
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/CheckerContext.h
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/Environment.h
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/ExplodedGraph.h
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/ProgramState.h
M clang/lib/StaticAnalyzer/Checkers/BasicObjCFoundationChecks.cpp
M clang/lib/StaticAnalyzer/Checkers/MIGChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/NullabilityChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/RetainCountChecker/RetainCountChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/RetainCountChecker/RetainCountDiagnostics.cpp
M clang/lib/StaticAnalyzer/Checkers/Taint.cpp
M clang/lib/StaticAnalyzer/Checkers/TestAfterDivZeroChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/UndefBranchChecker.cpp
M clang/lib/StaticAnalyzer/Core/BugReporterVisitors.cpp
M clang/lib/StaticAnalyzer/Core/Environment.cpp
M clang/lib/StaticAnalyzer/Core/ExprEngine.cpp
M clang/lib/StaticAnalyzer/Core/ExprEngineCallAndReturn.cpp
M clang/lib/StaticAnalyzer/Core/ExprEngineObjC.cpp
Log Message:
-----------
[NFC][analyzer] Refactor Environment to map Expr to SVal instead of Stmt to SVal (#193295)
Previously the `Environment` mapped `{Stmt *, LocationContext}` pairs to
symbolic values; but semantically it represents the values produced by
the evaluation of _expressions_, so there was no good reason to use
non-`Expr` statements in this mapping.
This commit replaces `Stmt` with `Expr` (its subclass) in this mapping
to accurately represent the actually relevant type.
This change is also propagated to methods, variables etc. that handle
the `Environment`.
There was a special case in `Environment::getSVal` that allowed looking
up a `ReturnStmt` in the `Environment` (and translated this to a lookup
of the "return value" sub-expression of the `ReturnStmt`). This commit
eliminates this and modifies the callers to explicitly look up the
sub-expression of the `ReturnStmt`.
Commit: 90c90a41bed5ba2e4c7b724ecfd533f6f3f7d204
https://github.com/llvm/llvm-project/commit/90c90a41bed5ba2e4c7b724ecfd533f6f3f7d204
Author: Sirui Mu <msrlancern at gmail.com>
Date: 2026-04-28 (Tue, 28 Apr 2026)
Changed paths:
M clang/include/clang/CIR/MissingFeatures.h
M clang/lib/CIR/CodeGen/CIRGenExprConstant.cpp
M clang/test/CIR/CodeGen/atomic.c
Log Message:
-----------
[CIR] Initialization of global atomic variables (#194239)
This patch adds support for initializing global atomic variables. It
does not include support for tail paddings, which will be added in later
patches.
Assisted-by: Codex / GPT-5.5
Commit: 31687bb119da8468830c9f5f10ac347e2ed5f1d0
https://github.com/llvm/llvm-project/commit/31687bb119da8468830c9f5f10ac347e2ed5f1d0
Author: forking-google-bazel-bot[bot] <265904573+forking-google-bazel-bot[bot]@users.noreply.github.com>
Date: 2026-04-28 (Tue, 28 Apr 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/test/src/sys/socket/BUILD.bazel
Log Message:
-----------
[Bazel] Fixes 412d474 (#194598)
This fixes 412d474f5e1dc9a931a71cf972c5415e6a025a6f.
Co-authored-by: Google Bazel Bot <google-bazel-bot at google.com>
Commit: f82a74a9bd6b62b41540950b8b64a207206baaf5
https://github.com/llvm/llvm-project/commit/f82a74a9bd6b62b41540950b8b64a207206baaf5
Author: Eugene Epshteyn <eepshteyn at nvidia.com>
Date: 2026-04-28 (Tue, 28 Apr 2026)
Changed paths:
M flang/test/Lower/associate-construct.f90
M flang/test/Lower/default-initialization.f90
M flang/test/Lower/select-type-2.f90
M flang/test/Lower/statement-function.f90
M flang/test/Lower/submodule.f90
Log Message:
-----------
[flang][NFC] Converted five tests from old lowering to new lowering (part 51) (#194522)
Converted Lower/associate-construct.f90,
Lower/default-initialization.f90, Lower/select-type-2.f90,
Lower/statement-function.f90, and Lower/submodule.f90 from legacy
lowering (-hlfir=false) to new lowering (-emit-hlfir).
Commit: c28d9076ec8b2d36e0ce897c08ca62963f96b975
https://github.com/llvm/llvm-project/commit/c28d9076ec8b2d36e0ce897c08ca62963f96b975
Author: Zhige Chen <zhige_chen at outlook.com>
Date: 2026-04-28 (Tue, 28 Apr 2026)
Changed paths:
A llvm/test/tools/llubi/intr_vector_interleave.ll
A llvm/test/tools/llubi/intr_vector_manip.ll
A llvm/test/tools/llubi/intr_vector_reduce.ll
A llvm/test/tools/llubi/intr_vector_stepvector.ll
M llvm/tools/llubi/lib/Interpreter.cpp
Log Message:
-----------
[llubi] Implement vector reduction/manipulation intrinsics (#194345)
This PR implements vector reduction and manipulation intrinsics.
Note that floating-point vector reduction intrinsics are not covered by
this change; they will be added in a follow-up PR after #188453 is
merged.
Commit: 378b411cf20051e3c3b654eab4347523f7da603f
https://github.com/llvm/llvm-project/commit/378b411cf20051e3c3b654eab4347523f7da603f
Author: Amilendra Kodithuwakku <amilendra.kodithuwakku at arm.com>
Date: 2026-04-28 (Tue, 28 Apr 2026)
Changed paths:
M clang/include/clang/Basic/arm_sve.td
A clang/test/CodeGen/AArch64/sve2p3-intrinsics/acle_sve2p3_qrshr.c
A clang/test/CodeGen/AArch64/sve2p3-intrinsics/acle_sve2p3_qshr.c
M clang/test/Sema/AArch64/arm_sve_feature_dependent_sve_AND_LP_sve2p3_OR_sme2p3_RP___sme_AND_LP_sve2p3_OR_sme2p3_RP.c
A clang/test/Sema/aarch64-sve2p3-intrinsics/acle_sve2p3_imm.cpp
A clang/test/Sema/aarch64-sve2p3-intrinsics/acle_sve2p3_qshrn.cpp
M llvm/include/llvm/IR/IntrinsicsAArch64.td
M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
M llvm/lib/Target/AArch64/SVEInstrFormats.td
A llvm/test/CodeGen/AArch64/sve2p3-intrinsics/sve2p3-intrinsics-qrshr.ll
A llvm/test/CodeGen/AArch64/sve2p3-intrinsics/sve2p3-intrinsics-qshr.ll
Log Message:
-----------
[clang][AArch64][SVE2p3][SME2p3] Add intrinsics for v9.7a shift operations (#186087)
Add the following new clang intrinsics based on the ACLE specification
https://github.com/ARM-software/acle/pull/428 (Add alpha support for 9.7
data processing intrinsics)
Multi-vector saturating rounding shift right narrow and interleave
instructions
- SQRSHRN
- svint8_t svqrshrn_s8(svint16x2_t, uint64_t) / svint8_t
svqrshrn_n_s8_s16_x2(svint16x2_t, uint64_t)
- UQRSHRN
- svuint8_t svqrshrn_u8(svuint16x2_t, uint64_t) / svuint8_t
svqrshrn_n_u8_u16_x2(svuint16x2_t, uint64_t)
- SQRSHRUN
- svuint8_t svqrshrun_u8(svint16x2_t, uint64_t) / svuint8_t
svqrshrun_n_u8_s16_x2(svint16x2_t, uint64_t)
Multi-vector saturating shift right narrow and interleave
- SQSHRN
- svint8_t svqshrn_s8(svint16x2_t, uint64_t) / svint8_t
svqshrn_n_s8_s16_x2(svint16x2_t, uint64_t)
- svint16_t svqshrn_s16(svint32x2_t, uint64_t) / svint16_t
svqshrn_n_s16_s32_x2(svint32x2_t, uint64_t)
- UQSHRN
- svuint8_t svqshrn_u8(svuint16x2_t, uint64_t) / svuint8_t
svqshrn_n_u8_u16_x2(svuint16x2_t, uint64_t)
- svuint16_t svqshrn_u16(svuint32x2_t, uint64_t) / svuint16_t
svqshrn_n_u16_u32_x2(svuint32x2_t, uint64_t)
- SQSHRUN
- svuint8_t svqshrun_u8(svint16x2_t, uint64_t) / svuint8_t
svqshrun_n_u8_s16_x2(svint16x2_t, uint64_t)
- svuint16_t svqshrun_u16(svint32x2_t, uint64_t) / svuint16_t
svqshrun_n_u16_s32_x2(svint32x2_t, uint64_t)
Commit: c5e941d7226573557d7fbef843a580a1d2c0d245
https://github.com/llvm/llvm-project/commit/c5e941d7226573557d7fbef843a580a1d2c0d245
Author: hev <wangrui at loongson.cn>
Date: 2026-04-28 (Tue, 28 Apr 2026)
Changed paths:
M llvm/lib/Target/LoongArch/LoongArchISelDAGToDAG.cpp
M llvm/lib/Target/LoongArch/LoongArchISelDAGToDAG.h
M llvm/lib/Target/LoongArch/LoongArchLASXInstrInfo.td
M llvm/lib/Target/LoongArch/LoongArchLSXInstrInfo.td
M llvm/test/CodeGen/LoongArch/lasx/bitclr.ll
M llvm/test/CodeGen/LoongArch/lasx/bitrev.ll
M llvm/test/CodeGen/LoongArch/lasx/bitset.ll
M llvm/test/CodeGen/LoongArch/lsx/bitclr.ll
M llvm/test/CodeGen/LoongArch/lsx/bitrev.ll
M llvm/test/CodeGen/LoongArch/lsx/bitset.ll
Log Message:
-----------
[LoongArch] Support VBIT{CLR,SET,REV}I patterns for non-native element sizes (#193719)
Extend vsplat_uimm_{pow2,inv_pow2} matching to allow specifying an
explicit element bit width, enabling recognition of splat patterns whose
logical element size differs from the vector's native element type.
Introduce templated selectVSplatUimm{Pow2,InvPow2} helpers with an
optional EltSize parameter, and add corresponding ComplexPattern
definitions for i8/i16/i32 element widths. This allows TableGen patterns
to match cases such as operating on v8i32/v4i64 vectors with masks
derived from smaller element sizes.
With these changes, AND/OR/XOR operations using inverse power-of-two or
power-of-two splat masks are now correctly selected to VBITCLRI,
VBITSETI, and VBITREVI instructions instead of falling back to vector
logical operations with materialized constants.
Commit: 34e136bc847c8e231d49f11d8c0039a489cb1595
https://github.com/llvm/llvm-project/commit/34e136bc847c8e231d49f11d8c0039a489cb1595
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-04-28 (Tue, 28 Apr 2026)
Changed paths:
A llvm/test/Transforms/PhaseOrdering/X86/horizontal-reduce-smax.ll
A llvm/test/Transforms/PhaseOrdering/X86/horizontal-reduce-smin.ll
A llvm/test/Transforms/PhaseOrdering/X86/horizontal-reduce-umax.ll
A llvm/test/Transforms/PhaseOrdering/X86/horizontal-reduce-umin.ll
Log Message:
-----------
[PhaseOrdering][X86] Copy backend horizontal min/max reduction tests to phaseordering (#194601)
As discussed on #194473 - add middleend test coverage to ensure we're
creating vXi8/vXi16 llvm.vector.reduce calls to ensure we can lower to
PHMINPOS instructions
Also demonstrates that we're still not matching partial reduction
patterns in vectorcombine
Commit: 9d3f2372ac5c5ffae124b402794acd8781a09280
https://github.com/llvm/llvm-project/commit/9d3f2372ac5c5ffae124b402794acd8781a09280
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-04-28 (Tue, 28 Apr 2026)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ByteCode/Descriptor.cpp
M clang/lib/AST/ByteCode/Descriptor.h
M clang/lib/AST/ByteCode/EvalEmitter.cpp
M clang/lib/AST/ByteCode/Interp.cpp
M clang/lib/AST/ByteCode/Interp.h
M clang/lib/AST/ByteCode/InterpBuiltinBitCast.cpp
M clang/lib/AST/ByteCode/InterpFrame.h
M clang/lib/AST/ByteCode/Opcodes.td
M clang/lib/AST/ByteCode/Pointer.cpp
M clang/test/AST/ByteCode/builtin-bit-cast-bitfields.cpp
M clang/test/AST/ByteCode/new-delete.cpp
M clang/test/AST/ByteCode/records.cpp
Log Message:
-----------
[clang][bytecode] Don't start record field lifetime by default (#193496)
Even though we have per-field lifetime information we did not previously
diagnose this test:
```c++
struct R {
struct Inner { constexpr int f() const { return 0; } };
int a = b.f();
Inner b;
};
constexpr R r;
```
because the life time was started by default.
This patch makes record members be `Lifetime::NotStarted` by default
(unless they are primitive arrays) and then starts the lifetime when in
`Pointer::initialize()`.
Commit: a6df7eb0638a452c55fcd44b90d95270e9ebf533
https://github.com/llvm/llvm-project/commit/a6df7eb0638a452c55fcd44b90d95270e9ebf533
Author: jeanPerier <jperier at nvidia.com>
Date: 2026-04-28 (Tue, 28 Apr 2026)
Changed paths:
M flang/include/flang/Optimizer/CodeGen/CGPasses.td
M flang/include/flang/Optimizer/Dialect/FIROps.td
M flang/lib/Optimizer/CodeGen/PreCGRewrite.cpp
M flang/lib/Optimizer/Dialect/FIROps.cpp
M flang/lib/Optimizer/HLFIR/Transforms/ConvertToFIR.cpp
M flang/lib/Optimizer/Transforms/AssumedRankOpConversion.cpp
M flang/test/Fir/fir-ops.fir
A flang/test/Fir/rebox-embox-optional-codegen.fir
M flang/test/Fir/rebox_assumed_rank_codegen.fir
M flang/test/HLFIR/declare-codegen.fir
Log Message:
-----------
[flang] allow rebox/embox of OPTIONAL (#194319)
Delay materialization of branches when building local temporary
descriptor for OPTIONAL from hlfir-to-fir until pre-cg-rewrite.
This makes the IR easier to analyze with OPTIONAL (for instance alias
analysis does not need to handle the branches to find the source).
This is done by adding an "optional" attribute to fir.embox, fir.rebox,
and fir.rebox_assumed_rank to indicate that their cogeneration must be
conditional.
The conditional aspect is implemented in pre-cg-rewrite to avoid
complexifying codegen and the fir.cg dialect.
Assisted by: Claude
Commit: ad2390871a5d77a12bdd9074ba6209cef4553a8f
https://github.com/llvm/llvm-project/commit/ad2390871a5d77a12bdd9074ba6209cef4553a8f
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-04-28 (Tue, 28 Apr 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
Log Message:
-----------
[SLP][NFC]Cache isUsedOutsideBlock results in gather-shuffle analysis
Hoist loop-invariant predicates and memoize per-UserTE
all_of(Scalars, isUsedOutsideBlock) in
isGatherShuffledSingleRegisterEntry and vectorizeTree to avoid
redundant walks over scalar user lists in the gather-shuffle hot path.
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/194612
Commit: 83164a43a1eef61f1e0f6078718a68adb21489ee
https://github.com/llvm/llvm-project/commit/83164a43a1eef61f1e0f6078718a68adb21489ee
Author: Serosh <janmejayapanda400 at gmail.com>
Date: 2026-04-28 (Tue, 28 Apr 2026)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Parse/ParseExprCXX.cpp
A clang/test/Parser/gh186582.cpp
Log Message:
-----------
[Clang] fix assertion failure in ::template operator parsing (#194097)
when parsing an invalid `::template operator`, the parser incorrectly
kept the consumed tokens on error. This caused the token cache to go out
of sync and crash. This patch fixes it by reverting the tokens and
properly returning the error
fixes #186582
Commit: b48aa05f399d16faf90475cfb8131ae8693d8f97
https://github.com/llvm/llvm-project/commit/b48aa05f399d16faf90475cfb8131ae8693d8f97
Author: Balázs Benics <benicsbalazs at gmail.com>
Date: 2026-04-28 (Tue, 28 Apr 2026)
Changed paths:
M llvm/include/llvm/Support/IOSandbox.h
Log Message:
-----------
[llvm] Mark IOSandbox::ScopedSetting nodiscard and maybe_unused (#194602)
The goal is to have the same attributes on ScopedSetting regardless if
this cmake setting is enabled or not.
Both of these should have nodiscard and maybe_unused attributes.
Commit: cd950962a95f57c149360204f32432dd870781cf
https://github.com/llvm/llvm-project/commit/cd950962a95f57c149360204f32432dd870781cf
Author: Naveen Seth Hanig <naveen.hanig at outlook.com>
Date: 2026-04-28 (Tue, 28 Apr 2026)
Changed paths:
M clang/test/Driver/modules-driver-import-std.cpp
Log Message:
-----------
[clang][modules-driver] Further constrain import-std test (#194604)
The root cause for the failing test was found in
https://github.com/llvm/llvm-project/pull/194475#issuecomment-4335023585.
The test uses `--target=x86_64-linux-gnu` which is only available with
`-DLLVM_TARGETS_TO_BUILD=all` or on native x86 targets.
Commit: a2409e07ce26d32efe4b6112ef5ff0c592fca254
https://github.com/llvm/llvm-project/commit/a2409e07ce26d32efe4b6112ef5ff0c592fca254
Author: Jeff Bailey <jbailey at raspberryginger.com>
Date: 2026-04-28 (Tue, 28 Apr 2026)
Changed paths:
M libc/include/CMakeLists.txt
R libc/include/sys/ucontext.h
A libc/include/sys/ucontext.h.def
A libc/include/sys/ucontext.yaml
R libc/include/ucontext.h.def
Log Message:
-----------
[libc][NFC] Move sys/ucontext.h to YAML generation (#194573)
Renamed sys/ucontext.h to sys/ucontext.h.def and created a corresponding
sys/ucontext.yaml, following the pattern used by sys/prctl. Updated
CMakeLists.txt to use add_header_macro.
Also removed the orphaned top-level ucontext.h.def which was never
referenced by ucontext.yaml.
Commit: 4e030aeec015d33e68197755923c11dc5f62e968
https://github.com/llvm/llvm-project/commit/4e030aeec015d33e68197755923c11dc5f62e968
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-04-28 (Tue, 28 Apr 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
Log Message:
-----------
[SLP][NFC]Cache MightBeIgnored result in gather-shuffle analysis
Each V in VL is queried up to 3 times for MightBeIgnored (direct +
NeighborMightBeIgnored from both neighbors), and the underlying
areAllUsersVectorized walks the instruction's user list. Memoize per
Value pointer to avoid the redundant walks.
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/194619
Commit: e459ce50775d9f5923282da3e1c49a90409db270
https://github.com/llvm/llvm-project/commit/e459ce50775d9f5923282da3e1c49a90409db270
Author: Kai Nacke <kai.peter.nacke at ibm.com>
Date: 2026-04-28 (Tue, 28 Apr 2026)
Changed paths:
M llvm/lib/Target/PowerPC/P10InstrResources.td
M llvm/lib/Target/PowerPC/PPCBack2BackFusion.def
M llvm/lib/Target/PowerPC/PPCInstr64Bit.td
M llvm/lib/Target/PowerPC/PPCInstrInfo.td
M llvm/lib/Target/PowerPC/PPCMacroFusion.def
M llvm/lib/Target/PowerPC/PPCRegisterClasses.td
M llvm/lib/Target/PowerPC/PPCRegisterInfo.td
M llvm/lib/Target/PowerPC/PPCScheduleP7.td
Log Message:
-----------
Revert "[PowerPC] Enable using HwMode for instructions (#191051)" (#194464)
This reverts commit 2a83068537786696d4950ce694e7d34480631f48.
It causes test suite failures in the 7zip benchmark.
Commit: ca27dc2933ed81835569d3e86c16935d850d38ff
https://github.com/llvm/llvm-project/commit/ca27dc2933ed81835569d3e86c16935d850d38ff
Author: Steven Perron <stevenperron at google.com>
Date: 2026-04-28 (Tue, 28 Apr 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVLegalizePointerCast.cpp
A llvm/test/CodeGen/SPIRV/pointers/load-store-matrix-in-struct.ll
Log Message:
-----------
[SPIR-V] Matrix in struct pointer legalization (#193073)
When looking to load an object at the start of a struct, the types do
not always match exactly. When we have an HLSL matrix the type in the
load will not match the type in memory. We need to improve the pointer
legalization pass to look for any "compatible" type at the start of an
aggragate.
A compatible are two types that the pass knows know to convert from one
to another.
This involves a refactoring of the code to make the check more general.
Assisted-by: Gemini
<!-- branch-stack-start -->
<!-- branch-stack-end -->
Commit: 74781cf395fe577447835aed69b77c65615c0d08
https://github.com/llvm/llvm-project/commit/74781cf395fe577447835aed69b77c65615c0d08
Author: Felipe de Azevedo Piovezan <fpiovezan at apple.com>
Date: 2026-04-28 (Tue, 28 Apr 2026)
Changed paths:
M lldb/test/API/functionalities/multi-breakpoint/TestMultiBreakpoint.py
Log Message:
-----------
[lldb] Disable gdbremote test on windows (#194627)
This is causing bot failures.
Commit: e6e9e1f528c64f09460144fc5e1f3aa6b9a3199d
https://github.com/llvm/llvm-project/commit/e6e9e1f528c64f09460144fc5e1f3aa6b9a3199d
Author: Anshul Nigham <nigham at google.com>
Date: 2026-04-28 (Tue, 28 Apr 2026)
Changed paths:
M llvm/docs/InstrRefDebugInfo.md
M llvm/docs/KeyInstructionsDebugInfo.md
Log Message:
-----------
[Docs] Fixes indents for InstrRefDebugInfo and KeyInstructionsDebugInfo (#194532)
This distinguishes the doc title from the headers.
Fixes navigation indents for Furo theme update (see
https://github.com/llvm/llvm-project/pull/184440).
Commit: da0455adab6f9d218c1006cba05ba3fb50e09a00
https://github.com/llvm/llvm-project/commit/da0455adab6f9d218c1006cba05ba3fb50e09a00
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-04-28 (Tue, 28 Apr 2026)
Changed paths:
M llvm/test/Transforms/PhaseOrdering/X86/vector-reductions-expanded.ll
Log Message:
-----------
[PhaseOrdering][X86] vector-reductions-expanded.ll - use passes list instead of piped opt stages (#194608)
Cleanup to make it easier to regenerate checks for #194473
Commit: b0f3cd1020a862244653f0445fbd52a1a1cad887
https://github.com/llvm/llvm-project/commit/b0f3cd1020a862244653f0445fbd52a1a1cad887
Author: Charles Zablit <c_zablit at apple.com>
Date: 2026-04-28 (Tue, 28 Apr 2026)
Changed paths:
M lldb/source/Plugins/Process/Windows/Common/ProcessWindows.cpp
Log Message:
-----------
[lldb][windows] fix a race condition in IO reader thread (#194422)
Commit: 61d795c79733703f7612c22bfc99ceada555576e
https://github.com/llvm/llvm-project/commit/61d795c79733703f7612c22bfc99ceada555576e
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-04-28 (Tue, 28 Apr 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
Log Message:
-----------
[SLP][NFC]Cache IsExternallyUsed by Value in cost computation
Same V is commonly seen in multiple TEs (shared scalars), and the
expensive part of IsExternallyUsed walks V->users() with multiple
match() pattern checks plus per-user getTreeEntries lookups - all
V-only-dependent. Split out the V-dependent body and memoize by
Value pointer, leaving the TE-specific copyable check at the call
site. DeletedNodes is read-only during the cost loop, so caching
is safe.
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/194637
Commit: 77cfc55ed4a4aec79c9cf9e56676feac2b704c1b
https://github.com/llvm/llvm-project/commit/77cfc55ed4a4aec79c9cf9e56676feac2b704c1b
Author: Stephan T. Lavavej <stl at nuwen.net>
Date: 2026-04-28 (Tue, 28 Apr 2026)
Changed paths:
M mlir/utils/vscode/package-lock.json
M mlir/utils/vscode/package.json
Log Message:
-----------
[MLIR] Update minimatch dependency in VSCode plugin, resolving security alerts (#188613)
Commit: 5b82a264511d01f4ed0d4dd9ce566d53b391c1af
https://github.com/llvm/llvm-project/commit/5b82a264511d01f4ed0d4dd9ce566d53b391c1af
Author: Adel Ejjeh <adel.ejjeh at amd.com>
Date: 2026-04-28 (Tue, 28 Apr 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCExpr.cpp
Log Message:
-----------
[AMDGPU][NFC] Remove redundant Args.size() assertions from AMDGPUMCExpr (#194488)
Remove redundant `Args.size()` assertions from `AMDGPUMCExpr` evaluate
functions (`evaluateExtraSGPRs`, `evaluateTotalNumVGPR`,
`evaluateAlignTo`, `evaluateOccupancy`).
These assertions are redundant with the `zip_equal` size checking
performed in the `evaluateMCExprs` helper function introduced in
#193859.
---
*This PR was developed with AI assistance (GitHub Copilot).*
Commit: 268bac6c2519a94f4ae515e2db540adf7f368621
https://github.com/llvm/llvm-project/commit/268bac6c2519a94f4ae515e2db540adf7f368621
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2026-04-28 (Tue, 28 Apr 2026)
Changed paths:
M flang/include/flang/Parser/openmp-utils.h
M flang/lib/Parser/openmp-utils.cpp
Log Message:
-----------
[flang][OpenMP] Move implementation detail from header to source, NFC (#194638)
Commit: bfaab0ec1d82045f4b38fd356452094e4efdb4ed
https://github.com/llvm/llvm-project/commit/bfaab0ec1d82045f4b38fd356452094e4efdb4ed
Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
Date: 2026-04-28 (Tue, 28 Apr 2026)
Changed paths:
M clang/test/CodeGen/AArch64/neon/intrinsics.c
Log Message:
-----------
[clang][cir][nfc] Add missing comment (#194644)
Commit: d089e7397ec73ebdb5a6cce3fda52e27f6f19345
https://github.com/llvm/llvm-project/commit/d089e7397ec73ebdb5a6cce3fda52e27f6f19345
Author: Nico Weber <thakis at chromium.org>
Date: 2026-04-28 (Tue, 28 Apr 2026)
Changed paths:
M llvm/utils/gn/secondary/libcxx/include/BUILD.gn
Log Message:
-----------
[gn build] Port f5b6e4fc2022 (#194645)
Commit: 0052113fb692b9a7c96f7b642c8e65071878d823
https://github.com/llvm/llvm-project/commit/0052113fb692b9a7c96f7b642c8e65071878d823
Author: Srividya Sundaram <srividya.sundaram at intel.com>
Date: 2026-04-28 (Tue, 28 Apr 2026)
Changed paths:
M clang/include/clang/Basic/DiagnosticDriverKinds.td
M clang/lib/Driver/ToolChains/Clang.cpp
A clang/test/Driver/sycl-std-default.cpp
Log Message:
-----------
[SYCL][Driver] Set -std=c++17 as default for SYCL compilations (#194014)
This PR ensures SYCL compilations default to C++17 when no explicit
standard is specified, and validates that user-provided standards meet
SYCL's C++17 minimum requirement. It also fixes Windows MSVC compilation
by enabling -fms-extensions for SYCL device code.
Commit: a2f9da54cb84838c106037baed0d9fc60c5637ab
https://github.com/llvm/llvm-project/commit/a2f9da54cb84838c106037baed0d9fc60c5637ab
Author: Charles Zablit <c_zablit at apple.com>
Date: 2026-04-28 (Tue, 28 Apr 2026)
Changed paths:
M lldb/source/Host/windows/ConnectionConPTYWindows.cpp
M lldb/source/Plugins/Process/Windows/Common/ProcessWindows.cpp
Log Message:
-----------
[lldb][windows] fix race condition in ConPTY on process exit (#194631)
Commit: 5d48370b260f3f12c9fe5402dfcb68d634f696c1
https://github.com/llvm/llvm-project/commit/5d48370b260f3f12c9fe5402dfcb68d634f696c1
Author: Daniel Hernandez-Juarez <danherna at amd.com>
Date: 2026-04-28 (Tue, 28 Apr 2026)
Changed paths:
M mlir/lib/Dialect/MemRef/Transforms/EmulateNarrowType.cpp
Log Message:
-----------
[mlir][memref] Pass TypeConverter to ConvertMemrefStore (#194356)
Commit 20b925a28a29 dropped the TypeConverter from ConvertMemrefStore
when adding the disableAtomicRMW flag. Restore it.
Commit: d769ce21768c66a04b3e46d1b330fd29238b34a5
https://github.com/llvm/llvm-project/commit/d769ce21768c66a04b3e46d1b330fd29238b34a5
Author: Benjamin Stott <Benjamin.Stott at sony.com>
Date: 2026-04-28 (Tue, 28 Apr 2026)
Changed paths:
M llvm/utils/lit/lit/InprocBuiltins.py
M llvm/utils/lit/lit/ShellEnvironment.py
M llvm/utils/lit/lit/TestRunner.py
M llvm/utils/lit/tests/shtest-glob.py
Log Message:
-----------
[Lit] Change processRedirects to open all files in binary mode (#194368)
This PR is the second in a series of patches upgrading Lit's in-process
built-ins to be able to run with piped input/output and full redirection
support, and to allow custom in-process builtns to be provided via the
Lit config. The remaining patches to Lit's test runner can be found here@
https://github.com/BStott6/llvm-project/compare/lit-inproc-builtins.
This is part of the Lit daemonized testing project:
https://discourse.llvm.org/t/88612.
This PR makes Lit's `processRedirects` function open all input/output
files in binary mode. This makes sure that in-process builtins have the
expected behaviour when reading and writing from them:
Newline translation is not required for any of the current in-process
built-ins, in fact, the in-process built-in for `echo`, which is the
only one that writes to `stdout`, explicitly re-opens the output file
with `newline=""` on Windows, to avoid newline translation. Also,
in-process builtins will eventually need to be able to read or write
binary data: for example, `opt` without `-S` running in daemon mode.
I believe this has no functional change for regular process invocations;
I have confirmed that programs invoked by Lit which write to files
opened in binary mode by Lit still have the newline translation
performed as normal on Windows, unless they change the mode of their
output stream themselves.
Commit: 4c6ae8f5be5607948e841b49688d594fe48926ea
https://github.com/llvm/llvm-project/commit/4c6ae8f5be5607948e841b49688d594fe48926ea
Author: Luke Hutton <luke.hutton at arm.com>
Date: 2026-04-28 (Tue, 28 Apr 2026)
Changed paths:
M mlir/lib/Dialect/Tosa/IR/TosaOps.cpp
M mlir/test/Dialect/Tosa/verifier.mlir
Log Message:
-----------
[mlir][tosa] Verify the output shape of tosa.mul and tosa.rescale (#193952)
Verifying the provided output shape against an expected shape helps
diagnose issues on op construction.
Commit: eecec864d1802358869b07286ec5b553302c4b92
https://github.com/llvm/llvm-project/commit/eecec864d1802358869b07286ec5b553302c4b92
Author: Ryan Buchner <rbuchner at qti.qualcomm.com>
Date: 2026-04-28 (Tue, 28 Apr 2026)
Changed paths:
M llvm/test/Transforms/SLPVectorizer/RISCV/basic-strided-loads.ll
Log Message:
-----------
[SLP] Add tests for boundary case with MinProfitableStridedOps (#194507)
Currently we don't vectorize runtime strided loads when `VF == MinProfitableStridedOps`.
Commit: 40ad10a8ae36aef58cf11e80c0024eb9409f6697
https://github.com/llvm/llvm-project/commit/40ad10a8ae36aef58cf11e80c0024eb9409f6697
Author: Michael Klemm <michael.klemm at amd.com>
Date: 2026-04-28 (Tue, 28 Apr 2026)
Changed paths:
M flang/docs/ReleaseNotes.md
M flang/include/flang/Support/Fortran-features.h
M flang/lib/Frontend/CompilerInvocation.cpp
M flang/lib/Support/Fortran-features.cpp
A flang/test/Driver/deprecated-w-spelling.f90
M flang/test/Semantics/OpenACC/acc-declare-validity.f90
M flang/test/Semantics/OpenMP/allocate-align01.f90
M flang/test/Semantics/OpenMP/allocate01.f90
M flang/test/Semantics/OpenMP/clause-validity01.f90
M flang/test/Semantics/OpenMP/declarative-directive01.f90
M flang/test/Semantics/OpenMP/declare-target01.f90
M flang/test/Semantics/OpenMP/declare-target02.f90
M flang/test/Semantics/OpenMP/declare-target06.f90
M flang/test/Semantics/OpenMP/deprecation.f90
M flang/test/Semantics/OpenMP/nested-target.f90
M flang/test/Semantics/OpenMP/requires04.f90
M flang/test/Semantics/OpenMP/requires05.f90
M flang/test/Semantics/OpenMP/simd-aligned.f90
M flang/test/Semantics/OpenMP/single03.f90
M flang/test/Semantics/OpenMP/single04.f90
M flang/test/Semantics/OpenMP/target01.f90
M flang/test/Semantics/OpenMP/threadprivate-equivalence-nowarn.f90
M flang/test/Semantics/OpenMP/use_device_ptr1.f90
M flang/unittests/Common/FortranFeaturesTest.cpp
Log Message:
-----------
[Flang] Fix -Wopen-mp-* and -Wopen-acc-* flag spellings (#188434)
The CamelCase-to-hyphenated conversion was incorrectly splitting
"OpenMP" and "OpenACC" into "open-mp" and "open-acc", producing wrong -W
flag names like -Wopen-mp-usage instead of -Wopenmp-usage. Fix the
conversion to treat these as compound names, keep the old spellings as
deprecated aliases, and emit a warning when deprecated spellings are
used.
---------
Co-authored-by: Claude Opus 4.6 <noreply at anthropic.com>
Commit: 7ceac4b1af614c886760b6d1d10d523d910c86d3
https://github.com/llvm/llvm-project/commit/7ceac4b1af614c886760b6d1d10d523d910c86d3
Author: Benjamin Stott <Benjamin.Stott at sony.com>
Date: 2026-04-28 (Tue, 28 Apr 2026)
Changed paths:
M llvm/utils/lit/lit/TestRunner.py
Log Message:
-----------
[Lit] Open sub-processes with text=`False` (#194577)
This PR is part of a series of patches upgrading Lit's in-process
built-ins to be able to run with piped input/output and full redirection
support, and to allow custom in-process builtns to be provided via the
Lit config. The remaining patches to Lit's test runner can be found here:
https://github.com/BStott6/llvm-project/compare/lit-inproc-builtins.
This is part of the Lit daemonized testing project:
https://discourse.llvm.org/t/88612
This PR makes Lit open all sub-processes with `text=False`, so that the
Python code will be able to read and write binary data to and from their
IO streams. This currently causes no functional change, as when Lit
reads output from the sub-processes, it already handles the case that
the read output is `bytes` by decoding it, but we will need to be able
to read binary data from a sub-process's STDIN if its output, which may
be binary, is piped into an in-process built-in, and we will need to be
able to write binary data to a sub-process's STDOUT if its input is
piped from an in-process builtin.
I have made sure that on Windows, when a sub-process invoked by Lit has
its output redirected to a file by Lit, the `\n -> \r\n` conversion is
performed as usual when writing to the file from the process - this
change only affects how the Python code interacts with the streams.
Commit: 251ed1eb8435d4c34163d288a0cba1af29f825ce
https://github.com/llvm/llvm-project/commit/251ed1eb8435d4c34163d288a0cba1af29f825ce
Author: Ramkumar Ramachandra <artagnon at tenstorrent.com>
Date: 2026-04-28 (Tue, 28 Apr 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
A llvm/test/Transforms/LoopVectorize/AArch64/tail-folding-counting-down.ll
M llvm/test/Transforms/LoopVectorize/ARM/tail-folding-counting-down.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/tail-folding-vectorization-factor-1.ll
Log Message:
-----------
[VPlan] Optz WideCanIV with SIVSteps over CanIV (#191276)
Replace WideCanonicalIV with a ScalarIVSteps over the CanonicalIV when
only the first lane is used. This is a preparatory step in enabling
expansion of WideCanonicalIV into executable recipes.
Commit: ec0675591f0dd5a4bfed477b0d5e25aa404d7e0f
https://github.com/llvm/llvm-project/commit/ec0675591f0dd5a4bfed477b0d5e25aa404d7e0f
Author: Ryosuke Niwa <rniwa at webkit.org>
Date: 2026-04-28 (Tue, 28 Apr 2026)
Changed paths:
M clang/lib/StaticAnalyzer/Checkers/WebKit/PtrTypesSemantics.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/RetainPtrCtorAdoptChecker.cpp
M clang/test/Analysis/Checkers/WebKit/objc-mock-types.h
M clang/test/Analysis/Checkers/WebKit/retain-ptr-ctor-adopt-use-arc.mm
M clang/test/Analysis/Checkers/WebKit/retain-ptr-ctor-adopt-use.mm
M clang/test/Analysis/Checkers/WebKit/unretained-call-args.mm
Log Message:
-----------
Add the support for adoptCFNullable/adoptNSNullable (#194539)
These are two new "adopt" functions to be introduced in WebKit.
Commit: d7ed6d8c9f2f2f314f73fe7f39d8bd19968ecf4f
https://github.com/llvm/llvm-project/commit/d7ed6d8c9f2f2f314f73fe7f39d8bd19968ecf4f
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2026-04-28 (Tue, 28 Apr 2026)
Changed paths:
M libcxx/test/benchmarks/spec.gen.py
M libcxx/utils/ci/lnt/run-benchbot
M libcxx/utils/ci/lnt/run-benchmarks
Log Message:
-----------
[libc++] Improvements to the benchmark runners (#194659)
- Run the ref workloads on SPEC
- Record the SPEC version in the machine info
- Allow filtering which benchmarks are run in run-benchbot
Commit: 5320bda2324afc9da8d1146af19362b486f25be6
https://github.com/llvm/llvm-project/commit/5320bda2324afc9da8d1146af19362b486f25be6
Author: Petr Kurapov <petr.kurapov at amd.com>
Date: 2026-04-28 (Tue, 28 Apr 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUCoExecSchedStrategy.cpp
M llvm/test/CodeGen/AMDGPU/coexec-scheduler.ll
Log Message:
-----------
[AMDGPU] Enable lane masks tracking in coexec scheduler. (#194578)
Prevents the scheduler to silently produce invalid IR.
Commit: 3c14034c55a296306ad0ea4990f0f1b34e9e5d6e
https://github.com/llvm/llvm-project/commit/3c14034c55a296306ad0ea4990f0f1b34e9e5d6e
Author: Amit Tiwari <amtiwari at amd.com>
Date: 2026-04-28 (Tue, 28 Apr 2026)
Changed paths:
M flang/lib/Semantics/check-omp-structure.cpp
M flang/test/Semantics/OpenMP/device-constructs.f90
A flang/test/Semantics/OpenMP/device-omp-initial-invalid.f90
A flang/test/Semantics/OpenMP/device-pre-52.f90
M openmp/module/omp_lib.F90.var
M openmp/module/omp_lib.h.var
Log Message:
-----------
[Flang][OpenMP] Validate `omp_initial_device` `omp_invalid_device` as device IDs (#193669)
As per OpenMP 5.2/6.0 the below are valid device values in a `#pragma
omp target` directive:
omp_initial_device (-1) -> refers to the host CPU.
omp_invalid_device (-2) -> an intentionally invalid device, used to
trigger a runtime error.
For the 2 values discussed above flang fails with:
```
error: The device expression of the DEVICE clause must be a positive integer expression
!$OMP TARGET DEVICE(-1)
error: Must have INTEGER type, but is REAL(4)
!$OMP TARGET DEVICE(OMP_INVALID_DEVICE)
```
Issue: https://github.com/llvm/llvm-project/issues/192989
Commit: 4d676e56f0ee819a20a021434a53060a43c33120
https://github.com/llvm/llvm-project/commit/4d676e56f0ee819a20a021434a53060a43c33120
Author: Zhen Wang <zhenw at nvidia.com>
Date: 2026-04-28 (Tue, 28 Apr 2026)
Changed paths:
M flang/include/flang/Optimizer/Dialect/CMakeLists.txt
A flang/include/flang/Optimizer/Dialect/CUDAKernelOpInterface.h
A flang/include/flang/Optimizer/Dialect/CUDAKernelOpInterface.td
M flang/include/flang/Optimizer/Dialect/CUF/CUFOps.h
M flang/include/flang/Optimizer/Dialect/CUF/CUFOps.td
M flang/lib/Optimizer/Dialect/CMakeLists.txt
A flang/lib/Optimizer/Dialect/CUDAKernelOpInterface.cpp
M flang/lib/Optimizer/Dialect/FIROps.cpp
A flang/test/Fir/array-coor-canonicalization-cuf.fir
Log Message:
-----------
[flang][cuda] Preserve fir.rebox captured by cuf.kernel via CUDAKernelOpInterface (#193890)
Reland of #193837 (reverted in #193855), now using a marker op interface
to avoid the link cycle that broke `BUILD_SHARED_LIBS=ON` builds.
`SimplifyArrayCoorOp` folded `fir.rebox` into `fir.array_coor` across a
`cuf.kernel` boundary. CUF lowering needs the captured rebox to
materialize a managed-memory descriptor for the kernel; folding it away
makes the kernel dereference the host-side descriptor and crash with
`cudaErrorIllegalAddress`.
Fix is to add `fir::CUDAKernelOpInterface`, a marker op interface
defined in FIRDialect and implemented by `cuf.kernel`. The
canonicalization guard queries the interface, so the `TypeIDResolver`
symbol lives in `libFIRDialect.so` and no `FIR -> CUF` link edge is
introduced.
Commit: ba6861c2bc30dc02167e2e43cb2dfdaedc2e700a
https://github.com/llvm/llvm-project/commit/ba6861c2bc30dc02167e2e43cb2dfdaedc2e700a
Author: Abid Qadeer <haqadeer at amd.com>
Date: 2026-04-28 (Tue, 28 Apr 2026)
Changed paths:
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
A mlir/test/Target/LLVMIR/openmp-target-spmd-num-threads-i64.mlir
Log Message:
-----------
[OpenMPIRBuilder] Cast device num_threads to i32 for __kmpc_parallel_60 (#194634)
I observed a crash in device OpenMP lowering when compiling with
`-fdefault-integer-8`. In `targetParallelCallback`, `NumThreads` can be
`i64`, but `__kmpc_parallel_60` expects an `i32` `num_threads`
parameter, which caused a bad-signature assertion during call creation.
The fix is to use `CreateZExtOrTrunc(..., Int32)` for the `num_threads`
argument before building the runtime call. This matches the handling
used in clang in `CGOpenMPRuntimeGPU::emitParallelCall`.
The problem can be seen with the following testcase whe compiled with
`flang -fopenmp --offload-arch=gfx90a test.f90 -fdefault-integer-8``
```
program test
implicit none
integer :: nthreads
integer :: i
nthreads = 137
!$omp target teams distribute parallel do num_threads(nthreads)
do i = 1, 1
end do
!$omp end target teams distribute parallel do
end program test
```
Commit: 8ea2b587c0f0a430ae0e7563e62e79c39b675683
https://github.com/llvm/llvm-project/commit/8ea2b587c0f0a430ae0e7563e62e79c39b675683
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2026-04-28 (Tue, 28 Apr 2026)
Changed paths:
M clang/lib/CIR/Dialect/Transforms/LoweringPrepare.cpp
A clang/test/CIR/CodeGen/local-const-aggregate-name-clash.cpp
Log Message:
-----------
[CIR] Avoid duplicate name collisions in LoweringPrepare (#194469)
This fixes a bug in the CIR LoweringPrepare pass where we were creating
multiple constant initializer global values with the same name, causing
references to them (specifically cir.get_global) to get the wrong value.
Assisted-by: Cursor / claude-4.7-opus-xhigh
Commit: de6af1ff342efcd5198623f1e2bf32a314e8400c
https://github.com/llvm/llvm-project/commit/de6af1ff342efcd5198623f1e2bf32a314e8400c
Author: Jonas Paulsson <paulson1 at linux.ibm.com>
Date: 2026-04-28 (Tue, 28 Apr 2026)
Changed paths:
M llvm/test/CodeGen/SystemZ/memcpy-03.ll
A llvm/test/CodeGen/SystemZ/memmove-01.ll
M llvm/test/CodeGen/SystemZ/memset-08.ll
Log Message:
-----------
[SystemZ] Improved testing for memcpy/memmove/memset. (#194682)
This is a pre-commit for #187100.
Commit: 928f70d38e34a97f95adcc67f0686f35761bd548
https://github.com/llvm/llvm-project/commit/928f70d38e34a97f95adcc67f0686f35761bd548
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2026-04-28 (Tue, 28 Apr 2026)
Changed paths:
M llvm/test/TableGen/directive1.td
M llvm/test/TableGen/directive2.td
M llvm/utils/TableGen/Basic/DirectiveEmitter.cpp
Log Message:
-----------
[TableGen] Emit constexpr versions of some directive/clause functions (#194633)
A variant of https://github.com/llvm/llvm-project/pull/176253 with a
change to reduce compile-time impact.
Since "llvm_unreachable" is actually allowed in constexpr functions,
simply emit the bodies of the selected functions in the header file.
In the previous PR the `isAllowedClauseForDirective` function was made
constexpr, but since it was very long it had a significant impact on
compilation time. In this PR that function is no longer constexpr.
Commit: ff6269d116c0cc7eee399bdb96f8a929c55085e8
https://github.com/llvm/llvm-project/commit/ff6269d116c0cc7eee399bdb96f8a929c55085e8
Author: Hongyu Chen <xxs_chy at outlook.com>
Date: 2026-04-29 (Wed, 29 Apr 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/BDCE.cpp
M llvm/test/Transforms/BDCE/dead-uses.ll
Log Message:
-----------
[BDCE] Avoid replacement of self-referential instructions (#194614)
Fixes #194564.
Commit: 88b9b2533c9a271eff08690eff61423f435cc33e
https://github.com/llvm/llvm-project/commit/88b9b2533c9a271eff08690eff61423f435cc33e
Author: Stephen Tozer <stephen.tozer at sony.com>
Date: 2026-04-28 (Tue, 28 Apr 2026)
Changed paths:
M llvm/lib/Support/Signals.cpp
Log Message:
-----------
[LLVM] Disable IO sandbox in symbolizeAddresses (#194597)
The function `symbolizeAddresses` is used by debugify to symbolize
addresses captured in the current invocation of LLVM, which it does by
executing llvm-symbolizer with temporary input and output files.
Creating the temporary files has an explicit sandbox exclusion, as
temporary files are necessarily not part of the compiler's formal
output, but attempting to read back the output file via MemoryBuffer
triggers a sandbox violation. Since we are always only operating on
temporary files within symbolizeAddresses, this patch disables the IO
sandbox in that function.
Commit: dc1d85c055f14f0fb41891a3a3404e58c44ec4d7
https://github.com/llvm/llvm-project/commit/dc1d85c055f14f0fb41891a3a3404e58c44ec4d7
Author: Eugene Epshteyn <eepshteyn at nvidia.com>
Date: 2026-04-28 (Tue, 28 Apr 2026)
Changed paths:
M flang/test/Lower/user-defined-operators.f90
M flang/test/Lower/variable-inquiries.f90
M flang/test/Lower/where-allocatable-assignments.f90
M flang/test/Lower/where.f90
M flang/test/Transforms/constant-argument-globalisation.fir
Log Message:
-----------
[flang][NFC] Converted five tests from old lowering to new lowering (part 52) (#194525)
Converted Lower/user-defined-operators.f90,
Lower/variable-inquiries.f90, Lower/where-allocatable-assignments.f90,
Lower/where.f90, and Transforms/constant-argument-globalisation.fir from
legacy lowering (-hlfir=false / -flang-deprecated-no-hlfir) to new
lowering (-emit-hlfir or no flag for FIR-input tests).
Commit: cbb012fa03d41195562e7b6e82d2ccfc4c70e03d
https://github.com/llvm/llvm-project/commit/cbb012fa03d41195562e7b6e82d2ccfc4c70e03d
Author: Hans Wennborg <hans at hanshq.net>
Date: 2026-04-28 (Tue, 28 Apr 2026)
Changed paths:
M llvm/include/llvm/Support/Path.h
Log Message:
-----------
[Support] Mark string-returning sys::path::native nodiscard (#194675)
To make it clear that it doesn't modify the path in place like the other
overloads. Follow-up to #193228
Commit: b40c1d511b2e84842707939a1332b90ebb1a50a0
https://github.com/llvm/llvm-project/commit/b40c1d511b2e84842707939a1332b90ebb1a50a0
Author: Grigory Pastukhov <gpastukhov at meta.com>
Date: 2026-04-28 (Tue, 28 Apr 2026)
Changed paths:
M llvm/lib/Transforms/IPO/AlwaysInliner.cpp
M llvm/test/Transforms/Inline/flatten.ll
Log Message:
-----------
[LLVM] Fix use-after-free in AlwaysInliner flatten worklist (#194485)
Functions with both `alwaysinline` and `flatten` attributes were
collected into the `NeedFlattening` worklist, then erased during
always-inline processing, leaving dangling pointers. Fix by collecting
flatten functions after the always-inline loop, and eliminate the
separate worklist by iterating the module directly.
Commit: 9e0057bdc4099ef6d7dcc99ec59bc4da9220f8d9
https://github.com/llvm/llvm-project/commit/9e0057bdc4099ef6d7dcc99ec59bc4da9220f8d9
Author: Benjamin Luke <benjamin.luke at sony.com>
Date: 2026-04-28 (Tue, 28 Apr 2026)
Changed paths:
M clang/lib/Frontend/Rewrite/FrontendActions.cpp
A clang/test/FixIt/fixit-recompile-warning-options.cpp
Log Message:
-----------
[clang] [fixit] Properly apply warning options during fixit-recompile (#190280)
Fixes https://github.com/llvm/llvm-project/issues/18707
During fixit recompile, the frontend was not reapplying command-line
diagnostic options, so the second pass could lose -Wno-* suppressions
and other warning configuration.
Added regression test to make sure that diagnostic options are properly
applied in the fixit-recompile path.
Commit: dddd0da8e611448987225aad28aa0202040084fc
https://github.com/llvm/llvm-project/commit/dddd0da8e611448987225aad28aa0202040084fc
Author: Amina Chabane <amina.chabane at arm.com>
Date: 2026-04-28 (Tue, 28 Apr 2026)
Changed paths:
M bolt/lib/Passes/IndirectCallPromotion.cpp
M bolt/test/AArch64/unsupported-passes.test
M bolt/test/assume-abi.test
Log Message:
-----------
[BOLT][AArch64] Refuse to run IndirectCallPromotion pass (#194363)
`--icp=<value>`/`--indirect-call-promotion=<value>` results in an
`UNIMPLEMENTED` crash when invoked as it is unimplemented in AArch64.
- Guard IndirectCallPromotion for non-X86
- Update unsupported-passes.test with expected error
Commit: 264ac2d3af1b97705225f623f4561be51163e6e3
https://github.com/llvm/llvm-project/commit/264ac2d3af1b97705225f623f4561be51163e6e3
Author: Paulius Velesko <pvelesko at pglc.io>
Date: 2026-04-28 (Tue, 28 Apr 2026)
Changed paths:
M clang/lib/CodeGen/CGCUDANV.cpp
M clang/lib/Driver/ToolChains/Darwin.cpp
M clang/lib/Driver/ToolChains/Darwin.h
M clang/lib/Driver/ToolChains/HIPUtility.cpp
A clang/test/CodeGenCUDA/device-stub-macho.cu
M clang/test/CodeGenCUDA/offloading-entries.cu
M clang/test/Driver/linker-wrapper-image.c
M llvm/include/llvm/Frontend/Offloading/Utility.h
M llvm/lib/Frontend/Offloading/OffloadWrapper.cpp
M llvm/lib/Frontend/Offloading/Utility.cpp
M llvm/test/tools/llvm-offload-wrapper/offload-wrapper.ll
Log Message:
-----------
[HIP][MacOS] Mach-O support and Darwin toolchain fixes (#183991)
This PR adds support for HIP on macOS: Mach-O section naming, Darwin
host toolchain initialization guards, and HIPSPV behavior when Darwin is
the host.
This has been verified using chipStar on MacOS via the PoCL OpenCL
implementation.
## Uninitialized target workaround
Darwin’s toolchain is only initialized when its own TranslateArgs runs.
For HIP/CUDA device jobs, Darwin is used as the HostTC and never gets
its args translated, so its target stays uninitialized. The new checks
avoid asserting on that uninitialized state. A better long-term fix is
to initialize Darwin earlier (see the FIXME in Driver.cpp
BuildJobsForAction).
- [ ] Initialize Darwin toolchain during construction instead of lazily
in TranslateArgs. See Driver.cpp BuildJobsForAction FIXME.
- [x] In Darwin’s addClangTargetOptions, skip host-stdlib flags when
DeviceOffloadKind != OFK_None so HIPSPV can safely delegate to the host.
Commit: 6d01ff1c503c8f1de7c86d5b94424695bc85d655
https://github.com/llvm/llvm-project/commit/6d01ff1c503c8f1de7c86d5b94424695bc85d655
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2026-04-28 (Tue, 28 Apr 2026)
Changed paths:
M compiler-rt/test/cfi/cross-dso-diagnostic.cpp
M compiler-rt/test/cfi/cross-dso/icall/diag.cpp
M compiler-rt/test/cfi/cross-dso/icall/icall-from-dso.cpp
M compiler-rt/test/cfi/cross-dso/icall/icall.cpp
M compiler-rt/test/cfi/icall/bad-signature.c
Log Message:
-----------
[NFC][cfi] Update diagnostic tests for better location matching (#194557)
Commit: 52539231c76cc08b3b8c558e0c5e38420ea18059
https://github.com/llvm/llvm-project/commit/52539231c76cc08b3b8c558e0c5e38420ea18059
Author: Adel Ejjeh <adel.ejjeh at amd.com>
Date: 2026-04-28 (Tue, 28 Apr 2026)
Changed paths:
M llvm/include/llvm/Analysis/LoopInfo.h
M llvm/lib/Analysis/LoopInfo.cpp
M llvm/lib/Transforms/Scalar/SimpleLoopUnswitch.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorizationLegality.cpp
Log Message:
-----------
[NFC][LoopUtils] Add Loop::addStringLoopAttribute and Loop::addIntLoopAttribute (#194676)
Consolidate repeated `makePostTransformationMetadata` boilerplate into
two new `Loop` methods:
- `addStringLoopAttribute`: adds a string-only metadata attribute
- `addIntLoopAttribute`: adds a `{Name, ConstantInt(Value)}` metadata
attribute
Both accept optional `RemovePrefixes` to strip existing attributes
first.
Refactored call sites:
- `Loop::setLoopAlreadyUnrolled` (LoopInfo.cpp)
- `Loop::setLoopMustProgress` (LoopInfo.cpp)
- `postUnswitch` partial/injection (SimpleLoopUnswitch.cpp)
- `LoopVectorizeHints::setAlreadyVectorized`
(LoopVectorizationLegality.cpp)
This consolidation was requested by reviewers of #190258.
This patch was generated with assistance of GitHub Copilot/Claude Opus
and reviewed by a human.
Commit: 778b3b501fd764ee8e9410b7e484ea6618c54b7d
https://github.com/llvm/llvm-project/commit/778b3b501fd764ee8e9410b7e484ea6618c54b7d
Author: David Green <david.green at arm.com>
Date: 2026-04-28 (Tue, 28 Apr 2026)
Changed paths:
M llvm/lib/Target/ARM/ARMISelLowering.cpp
M llvm/test/CodeGen/Thumb2/mve-clmul.ll
M llvm/test/CodeGen/Thumb2/mve-pred-ext.ll
Log Message:
-----------
[ARM][MVE] Change MVE getSetCCResultType to always use i1 vectors (#192531)
This mirrors what SVE does on the AArch64 side, where because we have
predicate vectors we can use them fall all types, and let legalization handle
where it is not the case. This fixes a clmul expansion that was failing to lower
the resulting intrinsic.
Commit: c26ae41c8765fdd073c71061f21a83a161598901
https://github.com/llvm/llvm-project/commit/c26ae41c8765fdd073c71061f21a83a161598901
Author: gulfemsavrun <gulfem at google.com>
Date: 2026-04-28 (Tue, 28 Apr 2026)
Changed paths:
M llvm/docs/CommandGuide/llvm-profgen.rst
M llvm/docs/ReleaseNotes.md
R llvm/include/llvm/ProfileData/ETMTraceDecoder.h
M llvm/lib/ProfileData/CMakeLists.txt
R llvm/lib/ProfileData/ETMTraceDecoder.cpp
R llvm/test/tools/llvm-profgen/Inputs/etm-opencsd.yaml
R llvm/test/tools/llvm-profgen/etm-arch.test
R llvm/test/tools/llvm-profgen/etm-opencsd.test
M llvm/test/tools/llvm-profgen/lit.local.cfg
M llvm/tools/llvm-profgen/PerfReader.cpp
M llvm/tools/llvm-profgen/PerfReader.h
M llvm/tools/llvm-profgen/ProfiledBinary.cpp
M llvm/tools/llvm-profgen/ProfiledBinary.h
M llvm/tools/llvm-profgen/llvm-profgen.cpp
Log Message:
-----------
Revert "Reland "[llvm-profgen] Add support for ETM trace decoding"" (#194695)
Reverts llvm/llvm-project#194465
Caused tools/llvm-profgen/etm-opencsd.test to fail on some systems.
Commit: bde089e256cee6a245871c321012a63b6820e0d4
https://github.com/llvm/llvm-project/commit/bde089e256cee6a245871c321012a63b6820e0d4
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2026-04-28 (Tue, 28 Apr 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenFunction.cpp
A clang/test/CIR/CodeGen/implicit-return-zero.c
Log Message:
-----------
[CIR] Add implicit return zero handling (#194490)
This adds code to emit a store of zero to the return value for functions
that are identified as having the implicit return zero propery (such as
main() in C programs).
Assisted-by: Cursor / claude-opus-4.7-thinking-xhigh
Commit: c355081020d6583146139a15ff44541466f69f30
https://github.com/llvm/llvm-project/commit/c355081020d6583146139a15ff44541466f69f30
Author: Heejin Ahn <aheejin at gmail.com>
Date: 2026-04-28 (Tue, 28 Apr 2026)
Changed paths:
M llvm/lib/Target/WebAssembly/WebAssemblyCFGStackify.cpp
Log Message:
-----------
[WebAssembly] Remove unnecessary code after #187484 (NFC) (#194188)
This code was written under the assumption that
`fixCallUnwindMismatches` runs before `fixCatchUnwindMismatches`, but
since #187484 it's not true anymore.
Commit: 81963b129e9008b0fdbaf56a423a6514ee9a3f26
https://github.com/llvm/llvm-project/commit/81963b129e9008b0fdbaf56a423a6514ee9a3f26
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-04-28 (Tue, 28 Apr 2026)
Changed paths:
M clang/lib/Headers/amdgpuintrin.h
M clang/lib/Headers/gpuintrin.h
M clang/lib/Headers/nvptxintrin.h
M clang/lib/Headers/spirvintrin.h
Log Message:
-----------
[Clang] Simplify target specific implementations in gpuintrin.h (#194669)
Summary:
Previously we had a three-way dance where the top-level defined an impl
then the lower level defined potentially an override and then we
stitched those together.
This simplifies that, instead just defining a macro that says whether
or not we need it. This works because the target-specific portions are
always included first, so this basically says "Do we need to make a
default version".
Commit: 5249e5527f48e1dd6b13c3dabed4992b299bfcb9
https://github.com/llvm/llvm-project/commit/5249e5527f48e1dd6b13c3dabed4992b299bfcb9
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-04-28 (Tue, 28 Apr 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
Log Message:
-----------
[SLP][NFC]Skip large mostly-trivial trees with up to one vector compute node
Track non-load/store, non-PHI, non-split vector compute nodes separately
in isTreeTinyAndNotFullyVectorizable. Allow skipping a tree when it
contains at most one such vector node and at most one load/store node,
provided the tree is large enough relative to their combined count
(VectorizableTree.size() > LimitTreeSize * (StoreLoadNodes.size() +
VectorNodes.size())).
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/194703
Commit: 7558262ea2a696745596540ed96fed97193865d2
https://github.com/llvm/llvm-project/commit/7558262ea2a696745596540ed96fed97193865d2
Author: Björn Schäpers <bjoern at hazardy.de>
Date: 2026-04-28 (Tue, 28 Apr 2026)
Changed paths:
M clang/lib/Format/UnwrappedLineParser.cpp
M clang/lib/Format/UnwrappedLineParser.h
M clang/unittests/Format/TokenAnnotatorTest.cpp
Log Message:
-----------
[clang-format] Improve annotating star and amp (#194190)
Use the context better.
Fixes #193255
Commit: e93f771dc2f75f999616290c68c13c2a17a688ed
https://github.com/llvm/llvm-project/commit/e93f771dc2f75f999616290c68c13c2a17a688ed
Author: Christopher Di Bella <cjdb at google.com>
Date: 2026-04-29 (Wed, 29 Apr 2026)
Changed paths:
M llvm/lib/Support/ProgramStack.cpp
Log Message:
-----------
adds `<cstdlib>` to `ProgramStack.cpp` (#194249)
Building `LLVMSupport` with libc++ causes Clang to error because
`malloc` and `free` aren't declared before they're used in
`ProgramStack.cpp`.
Commit: 66c1b6f0194bec99396e358f997d771d5e3bd28d
https://github.com/llvm/llvm-project/commit/66c1b6f0194bec99396e358f997d771d5e3bd28d
Author: Cheng Lingfei <53817093+clingfei at users.noreply.github.com>
Date: 2026-04-28 (Tue, 28 Apr 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
A llvm/test/CodeGen/AArch64/bool-vector-bitcast-compare.ll
M llvm/test/CodeGen/AArch64/dag-combine-setcc.ll
M llvm/test/CodeGen/AArch64/illegal-floating-point-vector-compares.ll
M llvm/test/CodeGen/AArch64/neon-anyof-splat.ll
Log Message:
-----------
[AArch64] Optimize lowering of i1 vector reduction (#187912)
This pr optimizes code generation in AArch64 for comparing bitcast <N x
i1> results with 0 or -1 using eq/ne. For scenarios where only "all
zeros or all 1s" are considered, the backend no longer prioritizes
materializing packed bitmasks and using vector reduction methods like
addv/umaxv/uminv. Instead, it expands the boolean vector into a regular
integer vector and performs the comparison via a more direct scalar
comparison path. For 64-bit and 128-bit cases that can be folded down to
64-bit, a lighter instruction sequence like fmov + cmp/cmn + cset/csel
is generated.
Functionally, this brings several benefits:
- Optimized the `setcc(bitcast(vNi1), 0/-1)` and
`select_cc(bitcast(vNi1), 0/-1, ...)` modes.
- In scenarios like <8 x i1>, a zero/all-one check can be performed
directly on the entire comparison result, avoiding additional vector
lateral reduction.
- In 128-bit scenarios like <16 x i1>, the vector is first folded using
ext + orr/and before a scalar comparison is performed.
Closes https://github.com/llvm/llvm-project/issues/186710.
Commit: 5b701456ac5d457ef17328b65fa31adfa0615172
https://github.com/llvm/llvm-project/commit/5b701456ac5d457ef17328b65fa31adfa0615172
Author: Charles Zablit <c_zablit at apple.com>
Date: 2026-04-28 (Tue, 28 Apr 2026)
Changed paths:
M lldb/test/API/windows/conpty/TestConPTY.py
Log Message:
-----------
[lldb][windows] skip ConPTY tests on ARM64 Windows (#194688)
The tests are flaky on the aarch64 Windows bot. Skip them there while
investigating.
Commit: a3a2f4690979adc80d76b3ac0624c5f4dc5d457a
https://github.com/llvm/llvm-project/commit/a3a2f4690979adc80d76b3ac0624c5f4dc5d457a
Author: CatherineMoore <catmoore at amd.com>
Date: 2026-04-28 (Tue, 28 Apr 2026)
Changed paths:
M clang/docs/OpenMPSupport.rst
Log Message:
-----------
[OpenMP] Documentation update (#194458)
Update to WIP entries for OpenMP 6.0
Commit: 7144296df29ce2487bbae7c83a8b847e8499438b
https://github.com/llvm/llvm-project/commit/7144296df29ce2487bbae7c83a8b847e8499438b
Author: dyung <douglas.yung at sony.com>
Date: 2026-04-28 (Tue, 28 Apr 2026)
Changed paths:
M clang/test/APINotes/unsafe-buffer-usage.cpp
Log Message:
-----------
Fix test added in 849de61 to work when the compiler defaults to C++20. (#193361)
Our downstream compiler defaults to C++20 mode which causes the test
added in #189775 to fail due to some additional notes that are emitted
which causes the `-verify` steps to fail.
```
# .---command stderr------------
# | error: 'cpp20-note' diagnostics seen but not expected:
# | File /home/dyung/src/git/merge/clang/test/APINotes/unsafe-buffer-usage.cpp Line 59: pass -fsafe-buffer-usage-suggestions to receive code hardening suggestions
# | File /home/dyung/src/git/merge/clang/test/APINotes/unsafe-buffer-usage.cpp Line 64: pass -fsafe-buffer-usage-suggestions to receive code hardening suggestions
# | File /home/dyung/src/git/merge/clang/test/APINotes/unsafe-buffer-usage.cpp Line 65: pass -fsafe-buffer-usage-suggestions to receive code hardening suggestions
# | File /home/dyung/src/git/merge/clang/test/APINotes/unsafe-buffer-usage.cpp Line 66: pass -fsafe-buffer-usage-suggestions to receive code hardening suggestions
# | 4 errors generated.
# `-----------------------------
```
This change updates the test to work with both C++17 and C++20 by
explicitly testing both modes and adding the extra expected notes when
in C++20 mode.
Commit: 3cd6f4a7744bf286df20bcae13fbb7b254232ee4
https://github.com/llvm/llvm-project/commit/3cd6f4a7744bf286df20bcae13fbb7b254232ee4
Author: Mariusz Sikora <mariusz.sikora at amd.com>
Date: 2026-04-28 (Tue, 28 Apr 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
A llvm/test/MC/AMDGPU/hsa-gfx12-v4-user-sgpr-err.s
A llvm/test/MC/AMDGPU/hsa-gfx125x-v4-user-sgpr-err.s
Log Message:
-----------
[AMDGPU] Validate user SGPR count against HW range, not field width (#194449)
The previous validation checked only the field width, allowing values
that exceeded the actual hardware limits (e.g. 0–16 on gfx6-gfx120 and
0–32 on gfx125x) as long as they fit in the bit width.
Tighten validation to reject out-of-range user SGPR counts.
Commit: 6830f04a254a9aa645ad8211b657703512b3bfed
https://github.com/llvm/llvm-project/commit/6830f04a254a9aa645ad8211b657703512b3bfed
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2026-04-28 (Tue, 28 Apr 2026)
Changed paths:
M llvm/test/TableGen/directive1.td
M llvm/test/TableGen/directive2.td
M llvm/utils/TableGen/Basic/DirectiveEmitter.cpp
Log Message:
-----------
[TableGen] Fix compile error with GCC <= 8 after 928f70d38e34 (#194692)
Commit: e9144cc197fed1b5a31b55d671af650d19aa515b
https://github.com/llvm/llvm-project/commit/e9144cc197fed1b5a31b55d671af650d19aa515b
Author: Steven Wu <stevenwu at apple.com>
Date: 2026-04-28 (Tue, 28 Apr 2026)
Changed paths:
M llvm/lib/CAS/MappedFileRegionArena.cpp
M llvm/lib/CAS/OnDiskCommon.cpp
M llvm/lib/Support/Unix/Path.inc
Log Message:
-----------
[CAS] Retry blocking syscalls on EINTR (#194691)
Wrap blocking syscalls used by LLVMCAS inside RetryAfterSignal so they
are retried on EINTR instead of surfacing as error or silently dropping
actions due to failed to acquire locks.
Commit: 91b6c73a4f18236b35b3e88e160c4bdf3c5e543b
https://github.com/llvm/llvm-project/commit/91b6c73a4f18236b35b3e88e160c4bdf3c5e543b
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-04-28 (Tue, 28 Apr 2026)
Changed paths:
M third-party/unittest/googletest/src/gtest-port.cc
Log Message:
-----------
[unittest] Use TempDir() in gtest death-test stream capture on Linux (#194142)
gtest's CapturedStream on Linux hardcoded /tmp/ for its temp file
without consulting the environment, causing failures in sandboxed
environments where /tmp is read-only. Use TempDir() instead, which
checks TEST_TMPDIR then TMPDIR and falls back to /tmp/, matching the
behavior already present on Android and macOS/iOS.
See also upstream PR: https://github.com/google/googletest/pull/4962
Assisted-by: Claude Code
Commit: 2743eb4470f1ee3af0131bb79afbf4a5ae1dbbd3
https://github.com/llvm/llvm-project/commit/2743eb4470f1ee3af0131bb79afbf4a5ae1dbbd3
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-04-28 (Tue, 28 Apr 2026)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp
Log Message:
-----------
[GISel] Fix -Wunused-variable (#194710)
b46a51d9c29519666f70807b52301d94be804f07 introduced some variables only
used in assertions. Mark them [[maybe_unused]] given they are used
multiple times, but only in assertions.
Commit: d8c1f8734f43fd6edaf0cbdd8e1a1b0451a4dbb0
https://github.com/llvm/llvm-project/commit/d8c1f8734f43fd6edaf0cbdd8e1a1b0451a4dbb0
Author: Heejin Ahn <aheejin at gmail.com>
Date: 2026-04-28 (Tue, 28 Apr 2026)
Changed paths:
M llvm/lib/Target/WebAssembly/WebAssemblyCFGStackify.cpp
M llvm/test/CodeGen/WebAssembly/cfg-stackify-eh-legacy.ll
M llvm/test/CodeGen/WebAssembly/cfg-stackify-eh.ll
M llvm/test/CodeGen/WebAssembly/exception.ll
Log Message:
-----------
[WebAssembly] Fix EHPadStack calculation in fixCallUnwindMismatches (#194184)
After #187484, `fixCallUnwindMismatches` now runs after
`fixCatchUnwindMismatches`. But `fixCallUnwindMismatches` was not
handling newly generated `try_table`s and trampoline BBs in
`fixCatchUnwindMismatches` correctly. See the comments for details.
This is mean to replace #192968 and adds its test case to
`cfg-stackify-eh.ll` and `cfg-stackify-eh-legacy.ll`. (The bug only
happens in the standard (exnref) EH so `cfg-stackify-eh.ll`, but I added
the same test to `cfg-stackify-eh-legacy.ll` as well for more coverage.)
`exception.ll`'s `inlined_cleanupret`'s results have changed because we
were generating unnecessary `try_table`s, thinking there were call
unwind mismatches when there weren't. (This wouldn't have resulted in
incorrect execution; it just added more unnecessary instructions.) This
also fixes some comments for `inlined_cleanupret`, because "throw_ref
targets the top level cleanuppad" is confusing. (This comment was
probably copy-pasted from "delegate targets ...".)
Closes #192968.
Commit: ca946f7faea970ebea2a71394d428857d0e05205
https://github.com/llvm/llvm-project/commit/ca946f7faea970ebea2a71394d428857d0e05205
Author: AbdallahRashed <63146988+AbdallahRashed at users.noreply.github.com>
Date: 2026-04-28 (Tue, 28 Apr 2026)
Changed paths:
M clang/include/clang/CIR/MissingFeatures.h
M clang/lib/CIR/CodeGen/CIRGenExprCXX.cpp
A clang/test/CIR/CodeGen/new-null.cpp
Log Message:
-----------
[CIR] Implement null check for CXXNewExpr (#192848)
When operator new is allowed to return null (e.g. nothrow new), the
initialization needs to be guarded by a null check,Previously this was
an errorNYI.
This wraps the initialization in a cir.if conditioned on the allocation
being non null, then uses cir.select to pick between the allocation
pointer and null as the result. Also removes
MissingFeatures::exprNewNullCheck.
part of https://github.com/llvm/llvm-project/issues/192328
Commit: dd9b50856395a010898e35f9ec14fb810763e63f
https://github.com/llvm/llvm-project/commit/dd9b50856395a010898e35f9ec14fb810763e63f
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-04-28 (Tue, 28 Apr 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
Log Message:
-----------
Revert "[SLP][NFC]Skip large mostly-trivial trees with up to one vector compute node"
This reverts commit 5249e5527f48e1dd6b13c3dabed4992b299bfcb9 to fix
compile time regressions, reported in
https://github.com/llvm/llvm-project/pull/194703#issuecomment-4338591792.
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/194715
Commit: a0db1fe854ec0e119db657dc68355fd439bb9e89
https://github.com/llvm/llvm-project/commit/a0db1fe854ec0e119db657dc68355fd439bb9e89
Author: Matheus Izvekov <mizvekov at gmail.com>
Date: 2026-04-28 (Tue, 28 Apr 2026)
Changed paths:
M clang-tools-extra/clang-tidy/llvmlibc/InlineFunctionDeclCheck.cpp
M clang-tools-extra/clangd/SemanticHighlighting.cpp
M clang/include/clang/AST/Decl.h
M clang/include/clang/AST/RecursiveASTVisitor.h
M clang/lib/AST/ASTImporter.cpp
M clang/lib/AST/Comment.cpp
M clang/lib/AST/Decl.cpp
M clang/lib/AST/DeclPrinter.cpp
M clang/lib/AST/DeclTemplate.cpp
M clang/lib/Sema/SemaDecl.cpp
M clang/lib/Sema/SemaDeclCXX.cpp
M clang/lib/Sema/SemaTemplateInstantiateDecl.cpp
M clang/lib/Tooling/Syntax/BuildTree.cpp
M clang/tools/libclang/CIndex.cpp
M clang/unittests/AST/ASTImporterTest.cpp
Log Message:
-----------
[clang] NFC: use ArrayRef for getTemplateParameterLists (#194701)
Commit: c147ccadae917314a7d46510936e5c275e14fc18
https://github.com/llvm/llvm-project/commit/c147ccadae917314a7d46510936e5c275e14fc18
Author: Matheus Izvekov <mizvekov at gmail.com>
Date: 2026-04-28 (Tue, 28 Apr 2026)
Changed paths:
M clang/lib/AST/ASTContext.cpp
M clang/test/SemaCXX/member-pointer.cpp
Log Message:
-----------
[clang] fix crash with c-style casts involving dependent member-pointer types (#194696)
A dependent member-pointer type doesn't necessarily have a class
declaration.
This simplifies the check performed in a helper for diagnosing a cast
which removes qualifiers, so it doesn't rely on this assumption.
This fixes a regression introduced in
https://github.com/llvm/llvm-project/pull/132401, which landed in the
last release, and this will be back ported, so no release notes.
Fixes #194524
Commit: 898eabc27d1f112de0e1372147db8f0573d2a63f
https://github.com/llvm/llvm-project/commit/898eabc27d1f112de0e1372147db8f0573d2a63f
Author: Eli Friedman <efriedma at qti.qualcomm.com>
Date: 2026-04-28 (Tue, 28 Apr 2026)
Changed paths:
M clang/lib/CodeGen/CGExprScalar.cpp
M clang/test/CodeGen/overflow-behavior-types.c
Log Message:
-----------
[clang] Fix interaction of __ob_wrap with signed divide. (#194474)
At first glance, signed divide overflow seems similar to other forms of
signed overflow, but it's significantly different: it's the only form of
signed overflow that is not affected by -fwrapv, it has undefined
behavior at the LLVM IR level, and it can trigger trap on x86.
Given that, make ubsan trigger on signed divide overflow even if a type
is marked __ob_wrap.
Commit: 91cf9f6341ec2379398210d398847f0e7543cf1e
https://github.com/llvm/llvm-project/commit/91cf9f6341ec2379398210d398847f0e7543cf1e
Author: Dave Lee <davelee.com at gmail.com>
Date: 2026-04-28 (Tue, 28 Apr 2026)
Changed paths:
M lldb/source/Commands/CommandObjectFrame.cpp
A lldb/test/API/commands/frame/var/repeat/Makefile
A lldb/test/API/commands/frame/var/repeat/TestFrameVarRepeat.py
A lldb/test/API/commands/frame/var/repeat/main.cpp
Log Message:
-----------
[lldb] Add repeat command for `frame variable` (#194195)
Introduce repeat command functionality for `frame variable`. The repeat behavior
increments the printing depth.
For example, when the default depth value (`target.max-children-depth`) is not enough,
hitting enter one or more times will expand the displayed data as deeply as needed.
See #149282 and then #178717.
Commit: b7d6438450a3e2f4a6be4a0585ea364d72313412
https://github.com/llvm/llvm-project/commit/b7d6438450a3e2f4a6be4a0585ea364d72313412
Author: Schrodinger ZHU Yifan <yifanzhu at rochester.edu>
Date: 2026-04-28 (Tue, 28 Apr 2026)
Changed paths:
M libc/include/llvm-libc-macros/pthread-macros.h
M libc/include/llvm-libc-types/CMakeLists.txt
M libc/include/llvm-libc-types/__mutex_type.h
M libc/src/__support/threads/CMakeLists.txt
M libc/src/__support/threads/fork_callbacks.cpp
M libc/src/__support/threads/linux/barrier.cpp
M libc/src/__support/threads/mutex_common.h
M libc/src/__support/threads/thread.cpp
M libc/src/__support/threads/unix_mutex.h
M libc/src/pthread/pthread_mutex_init.cpp
M libc/src/stdlib/atexit.cpp
M libc/src/threads/mtx_init.cpp
M libc/test/integration/src/pthread/CMakeLists.txt
M libc/test/integration/src/pthread/pthread_mutex_test.cpp
M libc/test/integration/src/threads/mtx_test.cpp
Log Message:
-----------
[libc] implement recursive mutex and fix wrong initializer (#193992)
Fix #193892.
This is found during libc++ bringing up process. This patch:
- implement recursive mutex support for real.
- fix the issue that pthread mutex initializer and public mutex
interface misalign with internal representation. this was the root cause
that hangs the libc++ test as padding bytes effectively pollute the
futex state if default initializer was used.
- additionally, we changed the field to bitfield to allow encoding more
data. (e.g. the error checking flag that is not yet added). timed bit is
removed as we always support it anyway. PI bit is added instead.
Commit: 2fce8c9d9e90d9697cb54907347396eebc1b5d61
https://github.com/llvm/llvm-project/commit/2fce8c9d9e90d9697cb54907347396eebc1b5d61
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2026-04-28 (Tue, 28 Apr 2026)
Changed paths:
M flang/include/flang/Parser/dump-parse-tree.h
M flang/include/flang/Parser/parse-tree.h
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Parser/openmp-parsers.cpp
M flang/lib/Parser/unparse.cpp
M flang/lib/Semantics/check-omp-metadirective.cpp
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/check-omp-structure.h
M flang/lib/Semantics/resolve-directives.cpp
A flang/test/Lower/OpenMP/Todo/begin-metadirective.f90
A flang/test/Parser/OpenMP/begin-metadirective.f90
A flang/test/Semantics/OpenMP/begin-metadirective.f90
Log Message:
-----------
[flang][OpenMP] Frontend support for BEGIN/END METADIRECTIVE (#194402)
This implements parsing of BEGIN/END METADIRECTIVE, plus a minimal
semantic check for the association of a directive in a WHEN/OTHERWISE
clauses.
The same semantic checks for the context selectors apply here as in the
case of a standalone METADIRECTIVE.
Commit: 1aed6b623a977fbdabb1dc19520863ef979a02c8
https://github.com/llvm/llvm-project/commit/1aed6b623a977fbdabb1dc19520863ef979a02c8
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2026-04-28 (Tue, 28 Apr 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenClass.cpp
M clang/test/CIR/CodeGen/lambda-static-invoker.cpp
Log Message:
-----------
[CIR] Implement return for void lambda with static invoker (#194704)
We had an errorNYI call for emitting the return statement for a static
invoker for a lambda with a void return. All that was needed was to emit
a return operation and add a test case.
Commit: df8fd039489f8c6e2d9dc7bbfa61aacf0e03fddc
https://github.com/llvm/llvm-project/commit/df8fd039489f8c6e2d9dc7bbfa61aacf0e03fddc
Author: Dave Lee <davelee.com at gmail.com>
Date: 2026-04-28 (Tue, 28 Apr 2026)
Changed paths:
M llvm/docs/ReleaseNotes.md
Log Message:
-----------
[lldb] Add release note for `frame variable` repeat (NFC) (#194723)
Follow up to #194195
Commit: ab43ab6158a19f60048cdbc77fe645ae61de0bae
https://github.com/llvm/llvm-project/commit/ab43ab6158a19f60048cdbc77fe645ae61de0bae
Author: Mark Zhuang <mark.zhuang at spacemit.com>
Date: 2026-04-29 (Wed, 29 Apr 2026)
Changed paths:
M openmp/runtime/src/ompd-specific.cpp
Log Message:
-----------
[OpenMP] Fix use of uninitialized Dl_info when dladdr fails in ompd_init (#193643)
When dladdr() fails, dl_info is left uninitialized. The code printed the
error but then fell through to unconditionally call
strrchr(dl_info.dli_fname, '/'), accessing an uninitialized pointer --
typically NULL on the stack -- causing a SIGSEGV.
Fix by turning the second 'if' into 'else if', so the path-extraction
block is only reached when dladdr() succeeded and dl_info is valid.
Assisted-by: Claude Sonnet 4.6
Commit: 3c570dbc474c2a690282524b5eb6a9f6b38663c6
https://github.com/llvm/llvm-project/commit/3c570dbc474c2a690282524b5eb6a9f6b38663c6
Author: Philip DePetro <subpremium at hotmail.com>
Date: 2026-04-28 (Tue, 28 Apr 2026)
Changed paths:
M lldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.cpp
Log Message:
-----------
[lldb] Fix test failures on arm introduced by #184815 (#194157)
@jasonmolenda I don't have access to arm hardware, so I'm relying
heavily on Claude's recommendation.
Commit: 1c00d1635c765044e229c91b3a88fd04c8d9d646
https://github.com/llvm/llvm-project/commit/1c00d1635c765044e229c91b3a88fd04c8d9d646
Author: Aviral Goel <aviralg at users.noreply.github.com>
Date: 2026-04-28 (Tue, 28 Apr 2026)
Changed paths:
M clang/include/clang/ScalableStaticAnalysisFramework/Core/WholeProgramAnalysis/DerivedAnalysis.h
M clang/include/clang/ScalableStaticAnalysisFramework/Core/WholeProgramAnalysis/SummaryAnalysis.h
Log Message:
-----------
[clang][SSAF][NFC] Remove redundant overrides from analysis templates (#193086)
This PR removes redundant:
- `initialize()` and `finalize()` overrides from `SummaryAnalysis` already provided by `SummaryAnalysisBase`.
- `step()` and `finalize()` overrides from `DerivedAnalysis<>` already provided by `DerivedAnalysisBase`.
Commit: f70ed1f758390bc8c0891c3cc2f24a860432a2fd
https://github.com/llvm/llvm-project/commit/f70ed1f758390bc8c0891c3cc2f24a860432a2fd
Author: Aviral Goel <aviralg at users.noreply.github.com>
Date: 2026-04-28 (Tue, 28 Apr 2026)
Changed paths:
M clang/include/clang/ScalableStaticAnalysisFramework/Core/Model/PrivateFieldNames.def
M clang/include/clang/ScalableStaticAnalysisFramework/Core/Serialization/SerializationFormatRegistry.h
M clang/include/clang/ScalableStaticAnalysisFramework/Core/TUSummary/TUSummaryBuilder.h
Log Message:
-----------
[clang][SSAF][NFC] Fix typos in comments (#193080)
Commit: b1c027b3aa52a19ae87b36a61b78adee1e7aaee5
https://github.com/llvm/llvm-project/commit/b1c027b3aa52a19ae87b36a61b78adee1e7aaee5
Author: Bar Soloveychik <barsolo at meta.com>
Date: 2026-04-28 (Tue, 28 Apr 2026)
Changed paths:
A lldb/include/lldb/Interpreter/Interfaces/ScriptedHookInterface.h
M lldb/include/lldb/Interpreter/ScriptInterpreter.h
M lldb/include/lldb/Target/Target.h
M lldb/include/lldb/lldb-forward.h
M lldb/source/Commands/CommandObjectTarget.cpp
M lldb/source/Commands/Options.td
M lldb/source/Plugins/ScriptInterpreter/Python/CMakeLists.txt
M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptInterpreterPythonInterfaces.cpp
M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptInterpreterPythonInterfaces.h
A lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedHookPythonInterface.cpp
A lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedHookPythonInterface.h
M lldb/source/Plugins/ScriptInterpreter/Python/ScriptInterpreterPython.cpp
M lldb/source/Plugins/ScriptInterpreter/Python/ScriptInterpreterPythonImpl.h
M lldb/source/Target/Target.cpp
A lldb/test/API/commands/target/module-hook/delete/TestTargetModuleHookDelete.py
A lldb/test/API/commands/target/module-hook/disable/TestTargetModuleHookDisable.py
A lldb/test/API/commands/target/module-hook/enable/TestTargetModuleHookEnable.py
A lldb/test/Shell/Commands/command-module-hook-fire.test
A lldb/test/Shell/Commands/command-module-hook.test
A lldb/test/Shell/ExecControl/StopHook/Inputs/stop-hook-unified-1.lldbinit
A lldb/test/Shell/ExecControl/StopHook/stop-hook-unified.test
Log Message:
-----------
[LLDB] Add module hook implementation (#185465)
Introduce a unified target hook command system for LLDB that handles
multiple target lifecycle events (module load, module unload, process
stop) through a single Hook class.
The existing target stop-hook commands remain unchanged for now, meaning
stop-hooks can now be created through either target stop-hook add or
target hook add -S.
A future follow-up can alias target stop-hook to the unified system to
consolidate the two paths.
New commands:
- target hook add [-o cmd] [-P class] [-u] [-S] - create a hook (fires
on module load by default, optionally on unload/stop)
- target hook add-filter [filter-opts] <hook-id> - attach stop-event
filters (shlib, function, file/line, thread) to an existing hook
- target hook list / delete / enable / disable - manage hooks
- target hook {enable,disable} {module-loaded|module-unloaded|stop-hook}
<id> - per-event toggling
top-event filter options live on a separate add-filter command rather
than on target hook add, keeping the add command clean and making the
system safe for filters on other event types.
Ran the tests + Made sure stop tests are passing as well.
---------
Co-authored-by: Bar Soloveychik <barsolo at fb.com>
Commit: 6dd918987e93c839f8078d8d07598ee923f4c8fc
https://github.com/llvm/llvm-project/commit/6dd918987e93c839f8078d8d07598ee923f4c8fc
Author: Aviral Goel <aviralg at users.noreply.github.com>
Date: 2026-04-28 (Tue, 28 Apr 2026)
Changed paths:
M clang/lib/ScalableStaticAnalysisFramework/Core/TUSummary/TUSummaryBuilder.cpp
Log Message:
-----------
[clang][SSAF][NFC] Add missing LLVM file header to `TUSummaryBuilder.cpp` (#193079)
Commit: 3b832a0c54877e083ce982f36762734f091f09f6
https://github.com/llvm/llvm-project/commit/3b832a0c54877e083ce982f36762734f091f09f6
Author: Victor Chernyakin <chernyakin.victor.j at outlook.com>
Date: 2026-04-28 (Tue, 28 Apr 2026)
Changed paths:
M clang/test/CXX/drs/cwg28xx.cpp
M clang/www/cxx_dr_status.html
Log Message:
-----------
[clang][NFC] Mark CWG2810 as implemented and add a test (#194683)
CWG2810 (https://cplusplus.github.io/CWG/issues/2810.html) just removes
some wording that could be misinterpreted as saying "a compiler must not
emit any warnings in uninstantiated templates". Clang has never
misinterpreted it that way, so we don't need to do anything here.
Commit: 6c79d6d6e40283fafb9fa917e58ce97a33252018
https://github.com/llvm/llvm-project/commit/6c79d6d6e40283fafb9fa917e58ce97a33252018
Author: Matheus Izvekov <mizvekov at gmail.com>
Date: 2026-04-28 (Tue, 28 Apr 2026)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/SemaTemplateInstantiate.cpp
A clang/test/DebugInfo/CXX/GH193932.cpp
M clang/test/SemaTemplate/instantiation-dependence.cpp
Log Message:
-----------
[clang] instantiate base classes even if they are instantiation-dependent-only (#194719)
Commit: 1bc0f8e1189f6cbb69a69618df746a780bfac107
https://github.com/llvm/llvm-project/commit/1bc0f8e1189f6cbb69a69618df746a780bfac107
Author: Joshua Batista <jbatista at microsoft.com>
Date: 2026-04-28 (Tue, 28 Apr 2026)
Changed paths:
M clang/lib/Sema/HLSLBuiltinTypeDeclBuilder.cpp
M clang/lib/Sema/HLSLBuiltinTypeDeclBuilder.h
M clang/test/AST/HLSL/ByteAddressBuffers-AST.hlsl
M clang/test/AST/HLSL/OutArgExpr.hlsl
M clang/test/AST/HLSL/StructuredBuffers-AST.hlsl
M clang/test/AST/HLSL/TypedBuffers-AST.hlsl
M clang/test/CodeGenHLSL/BasicFeatures/MatrixConstructor.hlsl
M clang/test/CodeGenHLSL/builtins/VectorElementStore.hlsl
M clang/test/CodeGenHLSL/resources/ByteAddressBuffers-methods.hlsl
M clang/test/CodeGenHLSL/resources/StructuredBuffers-methods-lib.hlsl
M clang/test/CodeGenHLSL/resources/StructuredBuffers-methods-ps.hlsl
M clang/test/CodeGenHLSL/resources/TypedBuffers-methods.hlsl
M clang/test/CodeGenHLSL/resources/res-array-global-subarray-many.hlsl
M clang/test/CodeGenHLSL/resources/res-array-global-subarray-one.hlsl
M clang/test/CodeGenHLSL/resources/res-array-global-unbounded.hlsl
M clang/test/CodeGenHLSL/resources/res-array-local-multi-dim.hlsl
M clang/test/CodeGenHLSL/resources/res-array-local1.hlsl
M clang/test/CodeGenHLSL/resources/res-array-local2.hlsl
M clang/test/CodeGenHLSL/resources/res-array-local3.hlsl
M clang/test/CodeGenHLSL/resources/resources-in-structs-array.hlsl
M clang/test/CodeGenHLSL/resources/resources-in-structs-inheritance.hlsl
M clang/test/CodeGenHLSL/resources/resources-in-structs.hlsl
A clang/test/SemaHLSL/BuiltIns/Buffers-Load-const.hlsl
M clang/test/SemaHLSL/Resources/static_resources.hlsl
Log Message:
-----------
[HLSL] Make load methods take const attribute (#193858)
Previously, HLSL shaders that declare a local resource const, cannot use
the `Load` method, since it is not attributed with const.
Load does not change a resource, it is a read-only operation, so the
method should be marked const.
This PR changes the methods so that they are marked const.
Fixes https://github.com/llvm/llvm-project/issues/192557
Assisted by: Github Copilot
Commit: d394d153fbc6e686107531cb1943925823b648f5
https://github.com/llvm/llvm-project/commit/d394d153fbc6e686107531cb1943925823b648f5
Author: vporpo <vasileios.porpodas at amd.com>
Date: 2026-04-28 (Tue, 28 Apr 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUMIRFormatter.cpp
M llvm/lib/Target/AMDGPU/AMDGPUMIRFormatter.h
M llvm/test/CodeGen/AMDGPU/asyncmark-waitcnt.mir
M llvm/test/CodeGen/AMDGPU/branch-relax-indirect-branch.mir
M llvm/test/CodeGen/AMDGPU/branch-relax-no-terminators.mir
M llvm/test/CodeGen/AMDGPU/call-waw-waitcnt.mir
M llvm/test/CodeGen/AMDGPU/force-wait-after-always-gds.mir
M llvm/test/CodeGen/AMDGPU/gcn-reg-pressure-true16-integer-overflow.mir
M llvm/test/CodeGen/AMDGPU/gfx11-sgpr-hazard-latency.mir
M llvm/test/CodeGen/AMDGPU/hazard-shift64.mir
M llvm/test/CodeGen/AMDGPU/hazard.mir
M llvm/test/CodeGen/AMDGPU/hazards-gfx950.mir
M llvm/test/CodeGen/AMDGPU/insert-waitcnts-callee.mir
M llvm/test/CodeGen/AMDGPU/insert-waitcnts-crash.ll
M llvm/test/CodeGen/AMDGPU/insert-waitcnts-exp.mir
M llvm/test/CodeGen/AMDGPU/insert-waitcnts-fence-soft.mir
M llvm/test/CodeGen/AMDGPU/insert-waitcnts-hang.mir
M llvm/test/CodeGen/AMDGPU/insert-waitcnts-merge.ll
M llvm/test/CodeGen/AMDGPU/lds-direct-hazards-gfx11.mir
M llvm/test/CodeGen/AMDGPU/lds-dma-waitcnt.mir
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.gws.barrier-bundle.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.gws.barrier-fastregalloc.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-atomic-insert-end.mir
M llvm/test/CodeGen/AMDGPU/memory-legalizer-multiple-mem-operands-atomics.mir
M llvm/test/CodeGen/AMDGPU/post-ra-sched-kill-bundle-use-inst.mir
M llvm/test/CodeGen/AMDGPU/release-vgprs.mir
M llvm/test/CodeGen/AMDGPU/scheduler-handle-move-bundle.mir
M llvm/test/CodeGen/AMDGPU/skip-branch-taildup-ret.mir
M llvm/test/CodeGen/AMDGPU/smem-war-hazard.mir
M llvm/test/CodeGen/AMDGPU/spill-wait.mir
M llvm/test/CodeGen/AMDGPU/statepoint-insert-waitcnts.mir
M llvm/test/CodeGen/AMDGPU/transform-block-with-return-to-epilog.ll
M llvm/test/CodeGen/AMDGPU/unpack-non-coissue-insts-post-ra-scheduler.mir
M llvm/test/CodeGen/AMDGPU/valu-mask-write-hazard.mir
M llvm/test/CodeGen/AMDGPU/vccz-corrupt-bug-workaround.mir
M llvm/test/CodeGen/AMDGPU/waitcnt-agpr.mir
M llvm/test/CodeGen/AMDGPU/waitcnt-back-edge-loop.mir
M llvm/test/CodeGen/AMDGPU/waitcnt-bvh.mir
M llvm/test/CodeGen/AMDGPU/waitcnt-debug-non-first-terminators.mir
M llvm/test/CodeGen/AMDGPU/waitcnt-debug.mir
M llvm/test/CodeGen/AMDGPU/waitcnt-loop-irreducible.mir
M llvm/test/CodeGen/AMDGPU/waitcnt-loop-single-basic-block.mir
M llvm/test/CodeGen/AMDGPU/waitcnt-meta-instructions.mir
M llvm/test/CodeGen/AMDGPU/waitcnt-no-redundant.mir
M llvm/test/CodeGen/AMDGPU/waitcnt-overflow.mir
M llvm/test/CodeGen/AMDGPU/waitcnt-permute.mir
M llvm/test/CodeGen/AMDGPU/waitcnt-preexisting-vscnt.mir
M llvm/test/CodeGen/AMDGPU/waitcnt-preexisting.mir
M llvm/test/CodeGen/AMDGPU/waitcnt-sample-out-order.mir
M llvm/test/CodeGen/AMDGPU/waitcnt-sample-waw.mir
M llvm/test/CodeGen/AMDGPU/waitcnt-trailing.mir
M llvm/test/CodeGen/AMDGPU/waitcnt-vmcnt-loop.mir
M llvm/test/CodeGen/AMDGPU/waitcnt-vmem-waw.mir
M llvm/test/CodeGen/AMDGPU/waitcnt-vscnt.mir
M llvm/test/CodeGen/AMDGPU/waitcnt-wcg-attributes.mir
M llvm/test/CodeGen/AMDGPU/waitcnt.mir
A llvm/test/CodeGen/MIR/AMDGPU/s_waitcnt-errors.mir
A llvm/test/CodeGen/MIR/AMDGPU/s_waitcnt.mir
A llvm/test/CodeGen/MIR/AMDGPU/s_waitcnt_missing_operand_crash.mir
Log Message:
-----------
[AMDGPU][MIRFormatter] Printer & parser for S_WAITCNT human-readable mask (#193895)
This patch implements a printer and parser for the S_WAITCNT mask. It
prints the mask in a human-readable format, showing the counter values
like `Vmcnt_<NUM>_Expcnt_<NUM>_Lgkmcnt_<NUM>`.
The format matches the printing style of S_WAITCNT_DEPCTR. For example:
```
S_WAITCNT .Vmcnt_0_Expcnt_0_Lgkmcnt_0
S_WAITCNT .Expcnt_0
S_WAITCNT .AllOff
```
Counters at their maximum value (meaning "don't wait") are omitted. When
all counters are at max, `.AllOff` is printed.
Co-Authored-By: Claude Opus 4 <noreply at anthropic.com>
Commit: 749af7f06d466fa49b274159ff0fcfd52789af54
https://github.com/llvm/llvm-project/commit/749af7f06d466fa49b274159ff0fcfd52789af54
Author: Dave Lee <davelee.com at gmail.com>
Date: 2026-04-28 (Tue, 28 Apr 2026)
Changed paths:
M lldb/include/lldb/Breakpoint/BreakpointIDList.h
M lldb/source/Breakpoint/BreakpointIDList.cpp
M lldb/source/Commands/CommandObjectBreakpoint.cpp
M lldb/source/Commands/CommandObjectBreakpoint.h
M lldb/source/Commands/CommandObjectBreakpointCommand.cpp
M lldb/source/Commands/CommandObjectProcess.cpp
M lldb/source/Commands/CommandOptionArgumentTable.cpp
A lldb/test/API/commands/breakpoint/location-dot/Makefile
A lldb/test/API/commands/breakpoint/location-dot/TestBreakpointLocationDot.py
A lldb/test/API/commands/breakpoint/location-dot/main.c
M llvm/docs/ReleaseNotes.md
Log Message:
-----------
[lldb] Define breakpoint location "." to mean the location(s) at which the current thread is stopped (#194272)
Adds `.` as a new `breakpt-id` syntax. Users can specify `.` to mean the breakpoint
location(s) that caused the current thread to stop.
I selected `.` to mean the current breakpoint locations for two reasons. In a shells,
period means <ins>current</ins> directory. In prose, a period is a <ins>stop</ins>.
My workflow often starts with multiple breakpoint locations, such as with regex
breakpoints, or basename breakpoints for overloaded/overridden names. As locations are
hit, I realize which locations are no longer needed. This new syntax makes it quick and
easy to disable the currently stopped location(s).
Another use case for this is to quickly repeat commands for the current location:
``` break com add -o 'p someVar' . ```
Usage example:
``` (lldb) b main.c:2 Process 47071 stopped * thread #1, queue =
'com.apple.main-thread', stop reason = breakpoint 1.1
frame #0: ... main`main at main.c:2:3
1 int main() {
-> 2 return 0;
3 }
Target 0: (main) stopped. (lldb) breakpoint disable . 1 breakpoints disabled. (lldb)
breakpoint list Current breakpoints: 1: file = 'main.c', line = 2, exact_match = 0,
locations = 1
1.1: where = main`main + 12 at main.c:2:3, address = ..., hit count = 1 Options:
disabled
```
rdar://73047170
Assisted-by: claude
Commit: 95f7a04812986cfd698fd05c762e2cee9ff5187b
https://github.com/llvm/llvm-project/commit/95f7a04812986cfd698fd05c762e2cee9ff5187b
Author: Brendan Dahl <brendan.dahl at gmail.com>
Date: 2026-04-28 (Tue, 28 Apr 2026)
Changed paths:
M llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
M llvm/test/MC/WebAssembly/simd-encodings.s
Log Message:
-----------
[WebAssembly] Fix f16x8.demote_f32x4_zero opcode. (#194722)
Use the correct opcode from:
https://github.com/WebAssembly/half-precision/blob/f267a3d54432e5723dcc13ad4530c3581a0cc4b3/proposals/half-precision/Overview.md
Commit: 471e8f7f94e7053362ccc10e9e6e08533d1a218c
https://github.com/llvm/llvm-project/commit/471e8f7f94e7053362ccc10e9e6e08533d1a218c
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2026-04-28 (Tue, 28 Apr 2026)
Changed paths:
M libcxx/test/benchmarks/spec.gen.py
A libcxx/utils/run-spec-benchmark
Log Message:
-----------
[libc++] Refactor the SPEC benchmark runner (#194737)
This makes it less convoluted and more robust to when substeps fail. The
previous incarnation had too much logic cramed into the Python gen test,
which is quite difficult to understand.
Commit: ae5015edaa70f0b5c59d69ea82d35bd34420ae44
https://github.com/llvm/llvm-project/commit/ae5015edaa70f0b5c59d69ea82d35bd34420ae44
Author: Ryan Buchner <rbuchner at qti.qualcomm.com>
Date: 2026-04-28 (Tue, 28 Apr 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/RISCV/basic-strided-loads.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/complex-loads.ll
Log Message:
-----------
[SLP] Allow strided memory operations with lengths equal to MinProfitableStridedOps (#194506)
Currently we've excluded chains with length equal to `MinProfitableStridedOps`, this change matches how we have defined these knobs.
Commit: 4aee20b8caa9b8477aef94d10c37b2f00805de07
https://github.com/llvm/llvm-project/commit/4aee20b8caa9b8477aef94d10c37b2f00805de07
Author: Heejin Ahn <aheejin at gmail.com>
Date: 2026-04-28 (Tue, 28 Apr 2026)
Changed paths:
M llvm/lib/Target/WebAssembly/WebAssemblyCFGStackify.cpp
Log Message:
-----------
[WebAssembly] Print BB names better for CFGStackify debugging (#194187)
Currently, if a MBB does not have a corresponding original bitcode BB,
because it was generated later in the backend,
`MachineBasicBlock::getName()` returns an empty string. This adds
`getBBName` method, which prints BB names in the format of
`bb.3.catch.start` in case the original BB name is `catch.start`, and
just `bb.3` when there is no matching original BB, and uses it for
`LLVM_DEBUG` statements.
Commit: bad344fcf4fbdfb4a11697460df21361679f324f
https://github.com/llvm/llvm-project/commit/bad344fcf4fbdfb4a11697460df21361679f324f
Author: David Justo <david.justo.1996 at gmail.com>
Date: 2026-04-28 (Tue, 28 Apr 2026)
Changed paths:
M llvm/utils/git/requirements.txt
Log Message:
-----------
[git] [LLVM utils] Require `pyjwt[crypto]==2.12.1`, `cryptography==47.0.0`, and `urllib3==2.6.3` (#194707)
**Context:**
The MSVC team (👋 ) consumes the LLVM repo and is receiving security
alerts due to the git utils `requirements.txt` file requesting
transitive dependencies with known CVEs.
Namely, we're looking at the following CVEs:
- https://nvd.nist.gov/vuln/detail/CVE-2026-32597, fixed in
`pyjwt>=2.12.0`
- https://nvd.nist.gov/vuln/detail/CVE-2026-26007, fixed in
`cryptography>=46.0.5`
- https://nvd.nist.gov/vuln/detail/CVE-2026-21441, fixed in
`urllib3>=2.6.3`
**This PR** aims to address this re-computing the `requirements.txt` for
those dependencies, via:
> pip-compile --generate-hashes --upgrade-package pyjwt
--upgrade-package cryptography --upgrade-package urllib3
--output-file=requirements.txt requirements.txt.in
For auditability, I'm pasting my terminal session output below, so you
can see how the `requirements.txt` file was generated.
<details>
<summary>Terminal output for `pip-compile` with
`--upgrade-package`</summary>
...
```powershell
(.venv) PS C:\Users\dajusto\source\repos\update-requirements-2026-04-28\llvm\utils\git> pip-compile --generate-hashes --upgrade-package pyjwt --upgrade-package cryptography --upgrade-package urllib3 --output-file=requirements.txt requirements.txt.in
WARNING: --strip-extras is becoming the default in version 8.0.0. To silence this warning, either use --strip-extras to opt into the new default or use --no-strip-extras to retain the existing behavior.
#
# This file is autogenerated by pip-compile with Python 3.13
# by the following command:
#
# pip-compile --generate-hashes --output-file=requirements.txt requirements.txt.in
#
certifi==2024.8.30 \
--hash=sha256:922820b53db7a7257ffbda3f597266d435245903d80737e34f8a45ff3e3230d8 \
--hash=sha256:bec941d2aa8195e248a60b31ff9f0558284cf01a52591ceda73ea9afffd69fd9
# via
# -r requirements.txt.in
# requests
cffi==2.0.0 \
--hash=sha256:00bdf7acc5f795150faa6957054fbbca2439db2f775ce831222b66f192f03beb \
--hash=sha256:07b271772c100085dd28b74fa0cd81c8fb1a3ba18b21e03d7c27f3436a10606b \
--hash=sha256:087067fa8953339c723661eda6b54bc98c5625757ea62e95eb4898ad5e776e9f \
--hash=sha256:0a1527a803f0a659de1af2e1fd700213caba79377e27e4693648c2923da066f9 \
--hash=sha256:0cf2d91ecc3fcc0625c2c530fe004f82c110405f101548512cce44322fa8ac44 \
--hash=sha256:0f6084a0ea23d05d20c3edcda20c3d006f9b6f3fefeac38f59262e10cef47ee2 \
--hash=sha256:12873ca6cb9b0f0d3a0da705d6086fe911591737a59f28b7936bdfed27c0d47c \
--hash=sha256:19f705ada2530c1167abacb171925dd886168931e0a7b78f5bffcae5c6b5be75 \
--hash=sha256:1cd13c99ce269b3ed80b417dcd591415d3372bcac067009b6e0f59c7d4015e65 \
--hash=sha256:1e3a615586f05fc4065a8b22b8152f0c1b00cdbc60596d187c2a74f9e3036e4e \
--hash=sha256:1f72fb8906754ac8a2cc3f9f5aaa298070652a0ffae577e0ea9bd480dc3c931a \
--hash=sha256:1fc9ea04857caf665289b7a75923f2c6ed559b8298a1b8c49e59f7dd95c8481e \
--hash=sha256:203a48d1fb583fc7d78a4c6655692963b860a417c0528492a6bc21f1aaefab25 \
--hash=sha256:2081580ebb843f759b9f617314a24ed5738c51d2aee65d31e02f6f7a2b97707a \
--hash=sha256:21d1152871b019407d8ac3985f6775c079416c282e431a4da6afe7aefd2bccbe \
--hash=sha256:24b6f81f1983e6df8db3adc38562c83f7d4a0c36162885ec7f7b77c7dcbec97b \
--hash=sha256:256f80b80ca3853f90c21b23ee78cd008713787b1b1e93eae9f3d6a7134abd91 \
--hash=sha256:28a3a209b96630bca57cce802da70c266eb08c6e97e5afd61a75611ee6c64592 \
--hash=sha256:2c8f814d84194c9ea681642fd164267891702542f028a15fc97d4674b6206187 \
--hash=sha256:2de9a304e27f7596cd03d16f1b7c72219bd944e99cc52b84d0145aefb07cbd3c \
--hash=sha256:38100abb9d1b1435bc4cc340bb4489635dc2f0da7456590877030c9b3d40b0c1 \
--hash=sha256:3925dd22fa2b7699ed2617149842d2e6adde22b262fcbfada50e3d195e4b3a94 \
--hash=sha256:3e17ed538242334bf70832644a32a7aae3d83b57567f9fd60a26257e992b79ba \
--hash=sha256:3e837e369566884707ddaf85fc1744b47575005c0a229de3327f8f9a20f4efeb \
--hash=sha256:3f4d46d8b35698056ec29bca21546e1551a205058ae1a181d871e278b0b28165 \
--hash=sha256:44d1b5909021139fe36001ae048dbdde8214afa20200eda0f64c068cac5d5529 \
--hash=sha256:45d5e886156860dc35862657e1494b9bae8dfa63bf56796f2fb56e1679fc0bca \
--hash=sha256:4647afc2f90d1ddd33441e5b0e85b16b12ddec4fca55f0d9671fef036ecca27c \
--hash=sha256:4671d9dd5ec934cb9a73e7ee9676f9362aba54f7f34910956b84d727b0d73fb6 \
--hash=sha256:53f77cbe57044e88bbd5ed26ac1d0514d2acf0591dd6bb02a3ae37f76811b80c \
--hash=sha256:5eda85d6d1879e692d546a078b44251cdd08dd1cfb98dfb77b670c97cee49ea0 \
--hash=sha256:5fed36fccc0612a53f1d4d9a816b50a36702c28a2aa880cb8a122b3466638743 \
--hash=sha256:61d028e90346df14fedc3d1e5441df818d095f3b87d286825dfcbd6459b7ef63 \
--hash=sha256:66f011380d0e49ed280c789fbd08ff0d40968ee7b665575489afa95c98196ab5 \
--hash=sha256:6824f87845e3396029f3820c206e459ccc91760e8fa24422f8b0c3d1731cbec5 \
--hash=sha256:6c6c373cfc5c83a975506110d17457138c8c63016b563cc9ed6e056a82f13ce4 \
--hash=sha256:6d02d6655b0e54f54c4ef0b94eb6be0607b70853c45ce98bd278dc7de718be5d \
--hash=sha256:6d50360be4546678fc1b79ffe7a66265e28667840010348dd69a314145807a1b \
--hash=sha256:730cacb21e1bdff3ce90babf007d0a0917cc3e6492f336c2f0134101e0944f93 \
--hash=sha256:737fe7d37e1a1bffe70bd5754ea763a62a066dc5913ca57e957824b72a85e205 \
--hash=sha256:74a03b9698e198d47562765773b4a8309919089150a0bb17d829ad7b44b60d27 \
--hash=sha256:7553fb2090d71822f02c629afe6042c299edf91ba1bf94951165613553984512 \
--hash=sha256:7a66c7204d8869299919db4d5069a82f1561581af12b11b3c9f48c584eb8743d \
--hash=sha256:7cc09976e8b56f8cebd752f7113ad07752461f48a58cbba644139015ac24954c \
--hash=sha256:81afed14892743bbe14dacb9e36d9e0e504cd204e0b165062c488942b9718037 \
--hash=sha256:8941aaadaf67246224cee8c3803777eed332a19d909b47e29c9842ef1e79ac26 \
--hash=sha256:89472c9762729b5ae1ad974b777416bfda4ac5642423fa93bd57a09204712322 \
--hash=sha256:8ea985900c5c95ce9db1745f7933eeef5d314f0565b27625d9a10ec9881e1bfb \
--hash=sha256:8eca2a813c1cb7ad4fb74d368c2ffbbb4789d377ee5bb8df98373c2cc0dee76c \
--hash=sha256:92b68146a71df78564e4ef48af17551a5ddd142e5190cdf2c5624d0c3ff5b2e8 \
--hash=sha256:9332088d75dc3241c702d852d4671613136d90fa6881da7d770a483fd05248b4 \
--hash=sha256:94698a9c5f91f9d138526b48fe26a199609544591f859c870d477351dc7b2414 \
--hash=sha256:9a67fc9e8eb39039280526379fb3a70023d77caec1852002b4da7e8b270c4dd9 \
--hash=sha256:9de40a7b0323d889cf8d23d1ef214f565ab154443c42737dfe52ff82cf857664 \
--hash=sha256:a05d0c237b3349096d3981b727493e22147f934b20f6f125a3eba8f994bec4a9 \
--hash=sha256:afb8db5439b81cf9c9d0c80404b60c3cc9c3add93e114dcae767f1477cb53775 \
--hash=sha256:b18a3ed7d5b3bd8d9ef7a8cb226502c6bf8308df1525e1cc676c3680e7176739 \
--hash=sha256:b1e74d11748e7e98e2f426ab176d4ed720a64412b6a15054378afdb71e0f37dc \
--hash=sha256:b21e08af67b8a103c71a250401c78d5e0893beff75e28c53c98f4de42f774062 \
--hash=sha256:b4c854ef3adc177950a8dfc81a86f5115d2abd545751a304c5bcf2c2c7283cfe \
--hash=sha256:b882b3df248017dba09d6b16defe9b5c407fe32fc7c65a9c69798e6175601be9 \
--hash=sha256:baf5215e0ab74c16e2dd324e8ec067ef59e41125d3eade2b863d294fd5035c92 \
--hash=sha256:c649e3a33450ec82378822b3dad03cc228b8f5963c0c12fc3b1e0ab940f768a5 \
--hash=sha256:c654de545946e0db659b3400168c9ad31b5d29593291482c43e3564effbcee13 \
--hash=sha256:c6638687455baf640e37344fe26d37c404db8b80d037c3d29f58fe8d1c3b194d \
--hash=sha256:c8d3b5532fc71b7a77c09192b4a5a200ea992702734a2e9279a37f2478236f26 \
--hash=sha256:cb527a79772e5ef98fb1d700678fe031e353e765d1ca2d409c92263c6d43e09f \
--hash=sha256:cf364028c016c03078a23b503f02058f1814320a56ad535686f90565636a9495 \
--hash=sha256:d48a880098c96020b02d5a1f7d9251308510ce8858940e6fa99ece33f610838b \
--hash=sha256:d68b6cef7827e8641e8ef16f4494edda8b36104d79773a334beaa1e3521430f6 \
--hash=sha256:d9b29c1f0ae438d5ee9acb31cadee00a58c46cc9c0b2f9038c6b0b3470877a8c \
--hash=sha256:d9b97165e8aed9272a6bb17c01e3cc5871a594a446ebedc996e2397a1c1ea8ef \
--hash=sha256:da68248800ad6320861f129cd9c1bf96ca849a2771a59e0344e88681905916f5 \
--hash=sha256:da902562c3e9c550df360bfa53c035b2f241fed6d9aef119048073680ace4a18 \
--hash=sha256:dbd5c7a25a7cb98f5ca55d258b103a2054f859a46ae11aaf23134f9cc0d356ad \
--hash=sha256:dd4f05f54a52fb558f1ba9f528228066954fee3ebe629fc1660d874d040ae5a3 \
--hash=sha256:de8dad4425a6ca6e4e5e297b27b5c824ecc7581910bf9aee86cb6835e6812aa7 \
--hash=sha256:e11e82b744887154b182fd3e7e8512418446501191994dbf9c9fc1f32cc8efd5 \
--hash=sha256:e6e73b9e02893c764e7e8d5bb5ce277f1a009cd5243f8228f75f842bf937c534 \
--hash=sha256:f73b96c41e3b2adedc34a7356e64c8eb96e03a3782b535e043a986276ce12a49 \
--hash=sha256:f93fd8e5c8c0a4aa1f424d6173f14a892044054871c771f8566e4008eaa359d2 \
--hash=sha256:fc33c5141b55ed366cfaad382df24fe7dcbc686de5be719b207bb248e3053dc5 \
--hash=sha256:fc7de24befaeae77ba923797c7c87834c73648a05a4bde34b3b7e5588973a453 \
--hash=sha256:fe562eb1a64e67dd297ccc4f5addea2501664954f2692b69a76449ec7913ecbf
# via
# cryptography
# pynacl
charset-normalizer==3.3.2 \
--hash=sha256:06435b539f889b1f6f4ac1758871aae42dc3a8c0e24ac9e60c2384973ad73027 \
--hash=sha256:06a81e93cd441c56a9b65d8e1d043daeb97a3d0856d177d5c90ba85acb3db087 \
--hash=sha256:0a55554a2fa0d408816b3b5cedf0045f4b8e1a6065aec45849de2d6f3f8e9786 \
--hash=sha256:0b2b64d2bb6d3fb9112bafa732def486049e63de9618b5843bcdd081d8144cd8 \
--hash=sha256:10955842570876604d404661fbccbc9c7e684caf432c09c715ec38fbae45ae09 \
--hash=sha256:122c7fa62b130ed55f8f285bfd56d5f4b4a5b503609d181f9ad85e55c89f4185 \
--hash=sha256:1ceae2f17a9c33cb48e3263960dc5fc8005351ee19db217e9b1bb15d28c02574 \
--hash=sha256:1d3193f4a680c64b4b6a9115943538edb896edc190f0b222e73761716519268e \
--hash=sha256:1f79682fbe303db92bc2b1136016a38a42e835d932bab5b3b1bfcfbf0640e519 \
--hash=sha256:2127566c664442652f024c837091890cb1942c30937add288223dc895793f898 \
--hash=sha256:22afcb9f253dac0696b5a4be4a1c0f8762f8239e21b99680099abd9b2b1b2269 \
--hash=sha256:25baf083bf6f6b341f4121c2f3c548875ee6f5339300e08be3f2b2ba1721cdd3 \
--hash=sha256:2e81c7b9c8979ce92ed306c249d46894776a909505d8f5a4ba55b14206e3222f \
--hash=sha256:3287761bc4ee9e33561a7e058c72ac0938c4f57fe49a09eae428fd88aafe7bb6 \
--hash=sha256:34d1c8da1e78d2e001f363791c98a272bb734000fcef47a491c1e3b0505657a8 \
--hash=sha256:37e55c8e51c236f95b033f6fb391d7d7970ba5fe7ff453dad675e88cf303377a \
--hash=sha256:3d47fa203a7bd9c5b6cee4736ee84ca03b8ef23193c0d1ca99b5089f72645c73 \
--hash=sha256:3e4d1f6587322d2788836a99c69062fbb091331ec940e02d12d179c1d53e25fc \
--hash=sha256:42cb296636fcc8b0644486d15c12376cb9fa75443e00fb25de0b8602e64c1714 \
--hash=sha256:45485e01ff4d3630ec0d9617310448a8702f70e9c01906b0d0118bdf9d124cf2 \
--hash=sha256:4a78b2b446bd7c934f5dcedc588903fb2f5eec172f3d29e52a9096a43722adfc \
--hash=sha256:4ab2fe47fae9e0f9dee8c04187ce5d09f48eabe611be8259444906793ab7cbce \
--hash=sha256:4d0d1650369165a14e14e1e47b372cfcb31d6ab44e6e33cb2d4e57265290044d \
--hash=sha256:549a3a73da901d5bc3ce8d24e0600d1fa85524c10287f6004fbab87672bf3e1e \
--hash=sha256:55086ee1064215781fff39a1af09518bc9255b50d6333f2e4c74ca09fac6a8f6 \
--hash=sha256:572c3763a264ba47b3cf708a44ce965d98555f618ca42c926a9c1616d8f34269 \
--hash=sha256:573f6eac48f4769d667c4442081b1794f52919e7edada77495aaed9236d13a96 \
--hash=sha256:5b4c145409bef602a690e7cfad0a15a55c13320ff7a3ad7ca59c13bb8ba4d45d \
--hash=sha256:6463effa3186ea09411d50efc7d85360b38d5f09b870c48e4600f63af490e56a \
--hash=sha256:65f6f63034100ead094b8744b3b97965785388f308a64cf8d7c34f2f2e5be0c4 \
--hash=sha256:663946639d296df6a2bb2aa51b60a2454ca1cb29835324c640dafb5ff2131a77 \
--hash=sha256:6897af51655e3691ff853668779c7bad41579facacf5fd7253b0133308cf000d \
--hash=sha256:68d1f8a9e9e37c1223b656399be5d6b448dea850bed7d0f87a8311f1ff3dabb0 \
--hash=sha256:6ac7ffc7ad6d040517be39eb591cac5ff87416c2537df6ba3cba3bae290c0fed \
--hash=sha256:6b3251890fff30ee142c44144871185dbe13b11bab478a88887a639655be1068 \
--hash=sha256:6c4caeef8fa63d06bd437cd4bdcf3ffefe6738fb1b25951440d80dc7df8c03ac \
--hash=sha256:6ef1d82a3af9d3eecdba2321dc1b3c238245d890843e040e41e470ffa64c3e25 \
--hash=sha256:753f10e867343b4511128c6ed8c82f7bec3bd026875576dfd88483c5c73b2fd8 \
--hash=sha256:7cd13a2e3ddeed6913a65e66e94b51d80a041145a026c27e6bb76c31a853c6ab \
--hash=sha256:7ed9e526742851e8d5cc9e6cf41427dfc6068d4f5a3bb03659444b4cabf6bc26 \
--hash=sha256:7f04c839ed0b6b98b1a7501a002144b76c18fb1c1850c8b98d458ac269e26ed2 \
--hash=sha256:802fe99cca7457642125a8a88a084cef28ff0cf9407060f7b93dca5aa25480db \
--hash=sha256:80402cd6ee291dcb72644d6eac93785fe2c8b9cb30893c1af5b8fdd753b9d40f \
--hash=sha256:8465322196c8b4d7ab6d1e049e4c5cb460d0394da4a27d23cc242fbf0034b6b5 \
--hash=sha256:86216b5cee4b06df986d214f664305142d9c76df9b6512be2738aa72a2048f99 \
--hash=sha256:87d1351268731db79e0f8e745d92493ee2841c974128ef629dc518b937d9194c \
--hash=sha256:8bdb58ff7ba23002a4c5808d608e4e6c687175724f54a5dade5fa8c67b604e4d \
--hash=sha256:8c622a5fe39a48f78944a87d4fb8a53ee07344641b0562c540d840748571b811 \
--hash=sha256:8d756e44e94489e49571086ef83b2bb8ce311e730092d2c34ca8f7d925cb20aa \
--hash=sha256:8f4a014bc36d3c57402e2977dada34f9c12300af536839dc38c0beab8878f38a \
--hash=sha256:9063e24fdb1e498ab71cb7419e24622516c4a04476b17a2dab57e8baa30d6e03 \
--hash=sha256:90d558489962fd4918143277a773316e56c72da56ec7aa3dc3dbbe20fdfed15b \
--hash=sha256:923c0c831b7cfcb071580d3f46c4baf50f174be571576556269530f4bbd79d04 \
--hash=sha256:95f2a5796329323b8f0512e09dbb7a1860c46a39da62ecb2324f116fa8fdc85c \
--hash=sha256:96b02a3dc4381e5494fad39be677abcb5e6634bf7b4fa83a6dd3112607547001 \
--hash=sha256:9f96df6923e21816da7e0ad3fd47dd8f94b2a5ce594e00677c0013018b813458 \
--hash=sha256:a10af20b82360ab00827f916a6058451b723b4e65030c5a18577c8b2de5b3389 \
--hash=sha256:a50aebfa173e157099939b17f18600f72f84eed3049e743b68ad15bd69b6bf99 \
--hash=sha256:a981a536974bbc7a512cf44ed14938cf01030a99e9b3a06dd59578882f06f985 \
--hash=sha256:a9a8e9031d613fd2009c182b69c7b2c1ef8239a0efb1df3f7c8da66d5dd3d537 \
--hash=sha256:ae5f4161f18c61806f411a13b0310bea87f987c7d2ecdbdaad0e94eb2e404238 \
--hash=sha256:aed38f6e4fb3f5d6bf81bfa990a07806be9d83cf7bacef998ab1a9bd660a581f \
--hash=sha256:b01b88d45a6fcb69667cd6d2f7a9aeb4bf53760d7fc536bf679ec94fe9f3ff3d \
--hash=sha256:b261ccdec7821281dade748d088bb6e9b69e6d15b30652b74cbbac25e280b796 \
--hash=sha256:b2b0a0c0517616b6869869f8c581d4eb2dd83a4d79e0ebcb7d373ef9956aeb0a \
--hash=sha256:b4a23f61ce87adf89be746c8a8974fe1c823c891d8f86eb218bb957c924bb143 \
--hash=sha256:bd8f7df7d12c2db9fab40bdd87a7c09b1530128315d047a086fa3ae3435cb3a8 \
--hash=sha256:beb58fe5cdb101e3a055192ac291b7a21e3b7ef4f67fa1d74e331a7f2124341c \
--hash=sha256:c002b4ffc0be611f0d9da932eb0f704fe2602a9a949d1f738e4c34c75b0863d5 \
--hash=sha256:c083af607d2515612056a31f0a8d9e0fcb5876b7bfc0abad3ecd275bc4ebc2d5 \
--hash=sha256:c180f51afb394e165eafe4ac2936a14bee3eb10debc9d9e4db8958fe36afe711 \
--hash=sha256:c235ebd9baae02f1b77bcea61bce332cb4331dc3617d254df3323aa01ab47bd4 \
--hash=sha256:cd70574b12bb8a4d2aaa0094515df2463cb429d8536cfb6c7ce983246983e5a6 \
--hash=sha256:d0eccceffcb53201b5bfebb52600a5fb483a20b61da9dbc885f8b103cbe7598c \
--hash=sha256:d965bba47ddeec8cd560687584e88cf699fd28f192ceb452d1d7ee807c5597b7 \
--hash=sha256:db364eca23f876da6f9e16c9da0df51aa4f104a972735574842618b8c6d999d4 \
--hash=sha256:ddbb2551d7e0102e7252db79ba445cdab71b26640817ab1e3e3648dad515003b \
--hash=sha256:deb6be0ac38ece9ba87dea880e438f25ca3eddfac8b002a2ec3d9183a454e8ae \
--hash=sha256:e06ed3eb3218bc64786f7db41917d4e686cc4856944f53d5bdf83a6884432e12 \
--hash=sha256:e27ad930a842b4c5eb8ac0016b0a54f5aebbe679340c26101df33424142c143c \
--hash=sha256:e537484df0d8f426ce2afb2d0f8e1c3d0b114b83f8850e5f2fbea0e797bd82ae \
--hash=sha256:eb00ed941194665c332bf8e078baf037d6c35d7c4f3102ea2d4f16ca94a26dc8 \
--hash=sha256:eb6904c354526e758fda7167b33005998fb68c46fbc10e013ca97f21ca5c8887 \
--hash=sha256:eb8821e09e916165e160797a6c17edda0679379a4be5c716c260e836e122f54b \
--hash=sha256:efcb3f6676480691518c177e3b465bcddf57cea040302f9f4e6e191af91174d4 \
--hash=sha256:f27273b60488abe721a075bcca6d7f3964f9f6f067c8c4c605743023d7d3944f \
--hash=sha256:f30c3cb33b24454a82faecaf01b19c18562b1e89558fb6c56de4d9118a032fd5 \
--hash=sha256:fb69256e180cb6c8a894fee62b3afebae785babc1ee98b81cdf68bbca1987f33 \
--hash=sha256:fd1abc0d89e30cc4e02e4064dc67fcc51bd941eb395c502aac3ec19fab46b519 \
--hash=sha256:ff8fa367d09b717b2a17a052544193ad76cd49979c805768879cb63d9ca50561
# via requests
cryptography==47.0.0 \
--hash=sha256:0024b87d47ae2399165a6bfb20d24888881eeab83ae2566d62467c5ff0030ce7 \
--hash=sha256:07efe86201817e7d3c18781ca9770bc0db04e1e48c994be384e4602bc38f8f27 \
--hash=sha256:09f6d7bf6724f8db8b32f11eccf23efc8e759924bc5603800335cf8859a3ddbd \
--hash=sha256:11438c7518132d95f354fa01a4aa2f806d172a061a7bed18cf18cbdacdb204d7 \
--hash=sha256:11dbb9f50a0f1bb9757b3d8c27c1101780efb8f0bdecfb12439c22a74d64c001 \
--hash=sha256:14432c8a9bcb37009784f9594a62fae211a2ae9543e96c92b2a8e4c3cd5cd0c4 \
--hash=sha256:1581aef4219f7ca2849d0250edaa3866212fb74bf5667284f46aa92f9e65c1ca \
--hash=sha256:160ad728f128972d362e714054f6ba0067cab7fb350c5202a9ae8ae4ce3ef1a0 \
--hash=sha256:1a405c08857258c11016777e11c02bacbe7ef596faf259305d282272a3a05cbe \
--hash=sha256:1e47422b5557bb82d3fff997e8d92cff4e28b9789576984f08c248d2b3535d93 \
--hash=sha256:20fdbe3e38fb67c385d233c89371fa27f9909f6ebca1cecc20c13518dae65475 \
--hash=sha256:2207a498b03275d0051589e326b79d4cf59985c99031b05bb292ac52631c37fe \
--hash=sha256:256d07c78a04d6b276f5df935a9923275f53bd1522f214447fdf365494e2d515 \
--hash=sha256:2b45761c6ec22b7c726d6a829558777e32d0f1c8be7c3f3480f9c912d5ee8a10 \
--hash=sha256:2ebd84adf0728c039a3be2700289378e1c164afc6748df1a5ed456767bef9ba7 \
--hash=sha256:34b4358b925a5ea3e14384ca781a2c0ef7ac219b57bb9eacc4457078e2b19f92 \
--hash=sha256:3fb8fa48075fad7193f2e5496135c6a76ac4b2aa5a38433df0a539296b377829 \
--hash=sha256:4e1de79e047e25d6e9f8cea71c86b4a53aced64134f0f003bbcbf3655fd172c8 \
--hash=sha256:4f7722c97826770bab8ae92959a2e7b20a5e9e9bf4deae68fd86c3ca457bab52 \
--hash=sha256:51c9313e90bd1690ec5a75ed047c27c0b8e6c570029712943d6116ef9a90620b \
--hash=sha256:5d0e362ff51041b0c0d219cc7d6924d7b8996f57ce5712bdcef71eb3c65a59cc \
--hash=sha256:6651d32eff255423503aa276739da98c30f26c40cbeffcc6048e0d54ef704c0c \
--hash=sha256:6eebcaf0df1d21ce1f90605c9b432dd2c4f4ab665ac29a40d5e3fc68f51b5e63 \
--hash=sha256:6f29f36582e6151d9686235e586dd35bb67491f024767d10b842e520dc6a07ac \
--hash=sha256:7a02675e2fabd0c0fc04c868b8781863cbf1967691543c22f5470500ff840b31 \
--hash=sha256:7f1207974a904e005f762869996cf620e9bf79ecb4622f148550bb48e0eb35a7 \
--hash=sha256:7f68d6fbc7fbbcfb0939fea72c3b96a9f9a6edfc0e1b1d29778a2066030418b1 \
--hash=sha256:7fda2f02c9015db3f42bb8a22324a454516ed10a8c29ca6ece6cdbb5efe2a203 \
--hash=sha256:80887c5cbd1774683cb126f0ab4184567f080071d5acf62205acb354b4b753b7 \
--hash=sha256:835d2d7f47cdc53b3224e90810fb1d36ca94ea29cc1801fb4c1bc43876735769 \
--hash=sha256:8c1a736bbb3288005796c3f7ccb9453360d7fed483b13b9f468aea5171432923 \
--hash=sha256:9af828c0d5a65c70ec729cd7495a4bf1a67ecb66417b8f02ff125ab8a6326a74 \
--hash=sha256:9c59ab0e0fa3a180a5a9c59f3a5abe3ef90d474bc56d7fadfbe80359491b615b \
--hash=sha256:9f8e55fe4e63613a5e1cc5819030f27b97742d720203a087802ce4ce9ceb52bb \
--hash=sha256:9fe6b7c64926c765f9dff301f9c1b867febcda5768868ca084e18589113732ab \
--hash=sha256:a49a3eb5341b9503fa3000a9a0db033161db90d47285291f53c2a9d2cd1b7f76 \
--hash=sha256:a9b761f012a943b7de0e828843c5688d0de94a0578d44d6c85a1bae32f87791f \
--hash=sha256:b1c76fca783aa7698eb21eb14f9c4aa09452248ee54a627d125025a43f83e7a7 \
--hash=sha256:b9a8943e359b7615db1a3ba587994618e094ff3d6fa5a390c73d079ce18b3973 \
--hash=sha256:be12cb6a204f77ed968bcefe68086eb061695b540a3dd05edac507a3111b25f0 \
--hash=sha256:cffbba3392df0fa8629bb7f43454ee2925059ee158e23c54620b9063912b86c8 \
--hash=sha256:ed67ea4e0cfb5faa5bc7ecb6e2b8838f3807a03758eec239d6c21c8769355310 \
--hash=sha256:edd4da498015da5b9f26d38d3bfc2e90257bfa9cbed1f6767c282a0025ae649b \
--hash=sha256:ef6b3634087f18d2155b1e8ce264e5345a753da2c5fa9815e7d41315c90f8318 \
--hash=sha256:f1557695e5c2b86e204f6ce9470497848634100787935ab7adc5397c54abd7ab \
--hash=sha256:f5c15764f261394b22aef6b00252f5195f46f2ca300bec57149474e2538b31f8 \
--hash=sha256:f5c3296dab66202f1b18a91fa266be93d6aa0c2806ea3d67762c69f60adc71aa \
--hash=sha256:f7db373287273d8af1414cf95dc4118b13ffdc62be521997b0f2b270771fef50 \
--hash=sha256:f9a034b642b960767fb343766ae5ba6ad653f2e890ddd82955aef288ffea8736
# via pyjwt
deprecated==1.2.14 \
--hash=sha256:6fac8b097794a90302bdbb17b9b815e732d3c4720583ff1b198499d78470466c \
--hash=sha256:e5323eb936458dccc2582dc6f9c322c852a775a27065ff2b0c4970b9d53d01b3
# via pygithub
gitdb==4.0.11 \
--hash=sha256:81a3407ddd2ee8df444cbacea00e2d038e40150acfa3001696fe0dcf1d3adfa4 \
--hash=sha256:bf5421126136d6d0af55bc1e7c1af1c397a34f5b7bd79e776cd3e89785c2b04b
# via gitpython
gitpython==3.1.43 \
--hash=sha256:35f314a9f878467f5453cc1fee295c3e18e52f1b99f10f6cf5b1682e968a9e7c \
--hash=sha256:eec7ec56b92aad751f9912a73404bc02ba212a23adb2c7098ee668417051a1ff
# via -r requirements.txt.in
idna==3.8 \
--hash=sha256:050b4e5baadcd44d760cedbd2b8e639f2ff89bbc7a5730fcc662954303377aac \
--hash=sha256:d838c2c0ed6fced7693d5e8ab8e734d5f8fda53a039c0164afb0b82e771e3603
# via requests
lit==18.1.8 \
--hash=sha256:47c174a186941ae830f04ded76a3444600be67d5e5fb8282c3783fba671c4edb \
--hash=sha256:a873ff7acd76e746368da32eb7355625e2e55a2baaab884c9cc130f2ee0300f7
# via -r requirements.txt.in
pycparser==2.22 \
--hash=sha256:491c8be9c040f5390f5bf44a5b07752bd07f56edf992381b05c701439eec10f6 \
--hash=sha256:c3702b6d3dd8c7abc1afa565d7e63d53a1d0bd86cdc24edd75470f4de499cfcc
# via cffi
pygithub==2.4.0 \
--hash=sha256:6601e22627e87bac192f1e2e39c6e6f69a43152cfb8f307cee575879320b3051 \
--hash=sha256:81935aa4bdc939fba98fee1cb47422c09157c56a27966476ff92775602b9ee24
# via -r requirements.txt.in
pyjwt[crypto]==2.12.1 \
--hash=sha256:28ca37c070cad8ba8cd9790cd940535d40274d22f80ab87f3ac6a713e6e8454c \
--hash=sha256:c74a7a2adf861c04d002db713dd85f84beb242228e671280bf709d765b03672b
# via pygithub
pynacl==1.6.2 \
--hash=sha256:018494d6d696ae03c7e656e5e74cdfd8ea1326962cc401bcf018f1ed8436811c \
--hash=sha256:04316d1fc625d860b6c162fff704eb8426b1a8bcd3abacea11142cbd99a6b574 \
--hash=sha256:22de65bb9010a725b0dac248f353bb072969c94fa8d6b1f34b87d7953cf7bbe4 \
--hash=sha256:26bfcd00dcf2cf160f122186af731ae30ab120c18e8375684ec2670dccd28130 \
--hash=sha256:2fef529ef3ee487ad8113d287a593fa26f48ee3620d92ecc6f1d09ea38e0709b \
--hash=sha256:320ef68a41c87547c91a8b58903c9caa641ab01e8512ce291085b5fe2fcb7590 \
--hash=sha256:3bffb6d0f6becacb6526f8f42adfb5efb26337056ee0831fb9a7044d1a964444 \
--hash=sha256:44081faff368d6c5553ccf55322ef2819abb40e25afaec7e740f159f74813634 \
--hash=sha256:46065496ab748469cdd999246d17e301b2c24ae2fdf739132e580a0e94c94a87 \
--hash=sha256:5811c72b473b2f38f7e2a3dc4f8642e3a3e9b5e7317266e4ced1fba85cae41aa \
--hash=sha256:622d7b07cc5c02c666795792931b50c91f3ce3c2649762efb1ef0d5684c81594 \
--hash=sha256:62985f233210dee6548c223301b6c25440852e13d59a8b81490203c3227c5ba0 \
--hash=sha256:68be3a09455743ff9505491220b64440ced8973fe930f270c8e07ccfa25b1f9e \
--hash=sha256:834a43af110f743a754448463e8fd61259cd4ab5bbedcf70f9dabad1d28a394c \
--hash=sha256:8845c0631c0be43abdd865511c41eab235e0be69c81dc66a50911594198679b0 \
--hash=sha256:8a66d6fb6ae7661c58995f9c6435bda2b1e68b54b598a6a10247bfcdadac996c \
--hash=sha256:8b097553b380236d51ed11356c953bf8ce36a29a3e596e934ecabe76c985a577 \
--hash=sha256:a84bf1c20339d06dc0c85d9aea9637a24f718f375d861b2668b2f9f96fa51145 \
--hash=sha256:a9f9932d8d2811ce1a8ffa79dcbdf3970e7355b5c8eb0c1a881a57e7f7d96e88 \
--hash=sha256:bc4a36b28dd72fb4845e5d8f9760610588a96d5a51f01d84d8c6ff9849968c14 \
--hash=sha256:c8a231e36ec2cab018c4ad4358c386e36eede0319a0c41fed24f840b1dac59f6 \
--hash=sha256:c949ea47e4206af7c8f604b8278093b674f7c79ed0d4719cc836902bf4517465 \
--hash=sha256:d071c6a9a4c94d79eb665db4ce5cedc537faf74f2355e4d502591d850d3913c0 \
--hash=sha256:d29bfe37e20e015a7d8b23cfc8bd6aa7909c92a1b8f41ee416bbb3e79ef182b2 \
--hash=sha256:fe9847ca47d287af41e82be1dd5e23023d3c31a951da134121ab02e42ac218c9
# via
# -r requirements.txt.in
# pygithub
requests==2.32.3 \
--hash=sha256:55365417734eb18255590a9ff9eb97e9e1da868d4ccd6402399eaf68af20a760 \
--hash=sha256:70761cfe03c773ceb22aa2f671b4757976145175cdfca038c02654d061d6dcc6
# via pygithub
smmap==5.0.1 \
--hash=sha256:dceeb6c0028fdb6734471eb07c0cd2aae706ccaecab45965ee83f11c8d3b1f62 \
--hash=sha256:e6d8668fa5f93e706934a62d7b4db19c8d9eb8cf2adbb75ef1b675aa332b69da
# via gitdb
typing-extensions==4.12.2 \
--hash=sha256:04e5ca0351e0f3f85c6853954072df659d0d13fac324d0072316b67d7794700d \
--hash=sha256:1a7ead55c7e559dd4dee8856e3a88b41225abfe1ce8df57b7c13915fe121ffb8
# via pygithub
urllib3==2.6.3 \
--hash=sha256:1b62b6884944a57dbe321509ab94fd4d3b307075e0c2eae991ac71ee15ad38ed \
--hash=sha256:bf272323e553dfb2e87d9bfd225ca7b0f467b919d7bbd355436d3fd37cb0acd4
# via
# pygithub
# requests
wrapt==1.16.0 \
--hash=sha256:0d2691979e93d06a95a26257adb7bfd0c93818e89b1406f5a28f36e0d8c1e1fc \
--hash=sha256:14d7dc606219cdd7405133c713f2c218d4252f2a469003f8c46bb92d5d095d81 \
--hash=sha256:1a5db485fe2de4403f13fafdc231b0dbae5eca4359232d2efc79025527375b09 \
--hash=sha256:1acd723ee2a8826f3d53910255643e33673e1d11db84ce5880675954183ec47e \
--hash=sha256:1ca9b6085e4f866bd584fb135a041bfc32cab916e69f714a7d1d397f8c4891ca \
--hash=sha256:1dd50a2696ff89f57bd8847647a1c363b687d3d796dc30d4dd4a9d1689a706f0 \
--hash=sha256:2076fad65c6736184e77d7d4729b63a6d1ae0b70da4868adeec40989858eb3fb \
--hash=sha256:2a88e6010048489cda82b1326889ec075a8c856c2e6a256072b28eaee3ccf487 \
--hash=sha256:3ebf019be5c09d400cf7b024aa52b1f3aeebeff51550d007e92c3c1c4afc2a40 \
--hash=sha256:418abb18146475c310d7a6dc71143d6f7adec5b004ac9ce08dc7a34e2babdc5c \
--hash=sha256:43aa59eadec7890d9958748db829df269f0368521ba6dc68cc172d5d03ed8060 \
--hash=sha256:44a2754372e32ab315734c6c73b24351d06e77ffff6ae27d2ecf14cf3d229202 \
--hash=sha256:490b0ee15c1a55be9c1bd8609b8cecd60e325f0575fc98f50058eae366e01f41 \
--hash=sha256:49aac49dc4782cb04f58986e81ea0b4768e4ff197b57324dcbd7699c5dfb40b9 \
--hash=sha256:5eb404d89131ec9b4f748fa5cfb5346802e5ee8836f57d516576e61f304f3b7b \
--hash=sha256:5f15814a33e42b04e3de432e573aa557f9f0f56458745c2074952f564c50e664 \
--hash=sha256:5f370f952971e7d17c7d1ead40e49f32345a7f7a5373571ef44d800d06b1899d \
--hash=sha256:66027d667efe95cc4fa945af59f92c5a02c6f5bb6012bff9e60542c74c75c362 \
--hash=sha256:66dfbaa7cfa3eb707bbfcd46dab2bc6207b005cbc9caa2199bcbc81d95071a00 \
--hash=sha256:685f568fa5e627e93f3b52fda002c7ed2fa1800b50ce51f6ed1d572d8ab3e7fc \
--hash=sha256:6906c4100a8fcbf2fa735f6059214bb13b97f75b1a61777fcf6432121ef12ef1 \
--hash=sha256:6a42cd0cfa8ffc1915aef79cb4284f6383d8a3e9dcca70c445dcfdd639d51267 \
--hash=sha256:6dcfcffe73710be01d90cae08c3e548d90932d37b39ef83969ae135d36ef3956 \
--hash=sha256:6f6eac2360f2d543cc875a0e5efd413b6cbd483cb3ad7ebf888884a6e0d2e966 \
--hash=sha256:72554a23c78a8e7aa02abbd699d129eead8b147a23c56e08d08dfc29cfdddca1 \
--hash=sha256:73870c364c11f03ed072dda68ff7aea6d2a3a5c3fe250d917a429c7432e15228 \
--hash=sha256:73aa7d98215d39b8455f103de64391cb79dfcad601701a3aa0dddacf74911d72 \
--hash=sha256:75ea7d0ee2a15733684badb16de6794894ed9c55aa5e9903260922f0482e687d \
--hash=sha256:7bd2d7ff69a2cac767fbf7a2b206add2e9a210e57947dd7ce03e25d03d2de292 \
--hash=sha256:807cc8543a477ab7422f1120a217054f958a66ef7314f76dd9e77d3f02cdccd0 \
--hash=sha256:8e9723528b9f787dc59168369e42ae1c3b0d3fadb2f1a71de14531d321ee05b0 \
--hash=sha256:9090c9e676d5236a6948330e83cb89969f433b1943a558968f659ead07cb3b36 \
--hash=sha256:9153ed35fc5e4fa3b2fe97bddaa7cbec0ed22412b85bcdaf54aeba92ea37428c \
--hash=sha256:9159485323798c8dc530a224bd3ffcf76659319ccc7bbd52e01e73bd0241a0c5 \
--hash=sha256:941988b89b4fd6b41c3f0bfb20e92bd23746579736b7343283297c4c8cbae68f \
--hash=sha256:94265b00870aa407bd0cbcfd536f17ecde43b94fb8d228560a1e9d3041462d73 \
--hash=sha256:98b5e1f498a8ca1858a1cdbffb023bfd954da4e3fa2c0cb5853d40014557248b \
--hash=sha256:9b201ae332c3637a42f02d1045e1d0cccfdc41f1f2f801dafbaa7e9b4797bfc2 \
--hash=sha256:a0ea261ce52b5952bf669684a251a66df239ec6d441ccb59ec7afa882265d593 \
--hash=sha256:a33a747400b94b6d6b8a165e4480264a64a78c8a4c734b62136062e9a248dd39 \
--hash=sha256:a452f9ca3e3267cd4d0fcf2edd0d035b1934ac2bd7e0e57ac91ad6b95c0c6389 \
--hash=sha256:a86373cf37cd7764f2201b76496aba58a52e76dedfaa698ef9e9688bfd9e41cf \
--hash=sha256:ac83a914ebaf589b69f7d0a1277602ff494e21f4c2f743313414378f8f50a4cf \
--hash=sha256:aefbc4cb0a54f91af643660a0a150ce2c090d3652cf4052a5397fb2de549cd89 \
--hash=sha256:b3646eefa23daeba62643a58aac816945cadc0afaf21800a1421eeba5f6cfb9c \
--hash=sha256:b47cfad9e9bbbed2339081f4e346c93ecd7ab504299403320bf85f7f85c7d46c \
--hash=sha256:b935ae30c6e7400022b50f8d359c03ed233d45b725cfdd299462f41ee5ffba6f \
--hash=sha256:bb2dee3874a500de01c93d5c71415fcaef1d858370d405824783e7a8ef5db440 \
--hash=sha256:bc57efac2da352a51cc4658878a68d2b1b67dbe9d33c36cb826ca449d80a8465 \
--hash=sha256:bf5703fdeb350e36885f2875d853ce13172ae281c56e509f4e6eca049bdfb136 \
--hash=sha256:c31f72b1b6624c9d863fc095da460802f43a7c6868c5dda140f51da24fd47d7b \
--hash=sha256:c5cd603b575ebceca7da5a3a251e69561bec509e0b46e4993e1cac402b7247b8 \
--hash=sha256:d2efee35b4b0a347e0d99d28e884dfd82797852d62fcd7ebdeee26f3ceb72cf3 \
--hash=sha256:d462f28826f4657968ae51d2181a074dfe03c200d6131690b7d65d55b0f360f8 \
--hash=sha256:d5e49454f19ef621089e204f862388d29e6e8d8b162efce05208913dde5b9ad6 \
--hash=sha256:da4813f751142436b075ed7aa012a8778aa43a99f7b36afe9b742d3ed8bdc95e \
--hash=sha256:db2e408d983b0e61e238cf579c09ef7020560441906ca990fe8412153e3b291f \
--hash=sha256:db98ad84a55eb09b3c32a96c576476777e87c520a34e2519d3e59c44710c002c \
--hash=sha256:dbed418ba5c3dce92619656802cc5355cb679e58d0d89b50f116e4a9d5a9603e \
--hash=sha256:dcdba5c86e368442528f7060039eda390cc4091bfd1dca41e8046af7c910dda8 \
--hash=sha256:decbfa2f618fa8ed81c95ee18a387ff973143c656ef800c9f24fb7e9c16054e2 \
--hash=sha256:e4fdb9275308292e880dcbeb12546df7f3e0f96c6b41197e0cf37d2826359020 \
--hash=sha256:eb1b046be06b0fce7249f1d025cd359b4b80fc1c3e24ad9eca33e0dcdb2e4a35 \
--hash=sha256:eb6e651000a19c96f452c85132811d25e9264d836951022d6e81df2fff38337d \
--hash=sha256:ed867c42c268f876097248e05b6117a65bcd1e63b779e916fe2e33cd6fd0d3c3 \
--hash=sha256:edfad1d29c73f9b863ebe7082ae9321374ccb10879eeabc84ba3b69f2579d537 \
--hash=sha256:f2058f813d4f2b5e3a9eb2eb3faf8f1d99b81c3e51aeda4b168406443e8ba809 \
--hash=sha256:f6b2d0c6703c988d334f297aa5df18c45e97b0af3679bb75059e0e0bd8b1069d \
--hash=sha256:f8212564d49c50eb4565e502814f694e240c55551a5f1bc841d4fcaabb0a9b8a \
--hash=sha256:ffa565331890b90056c01db69c0fe634a776f8019c143a5ae265f9c6bc4bd6d4
# via deprecated
(.venv) PS C:\Users\dajusto\source\repos\update-requirements-2026-04-28\llvm\utils\git> git diff
diff --git a/llvm/utils/git/requirements.txt b/llvm/utils/git/requirements.txt
index 80b47c7ce4de..77d741b88f10 100644
--- a/llvm/utils/git/requirements.txt
+++ b/llvm/utils/git/requirements.txt
@@ -190,34 +190,56 @@ charset-normalizer==3.3.2 \
--hash=sha256:fd1abc0d89e30cc4e02e4064dc67fcc51bd941eb395c502aac3ec19fab46b519 \
--hash=sha256:ff8fa367d09b717b2a17a052544193ad76cd49979c805768879cb63d9ca50561
# via requests
-cryptography==43.0.1 \
- --hash=sha256:014f58110f53237ace6a408b5beb6c427b64e084eb451ef25a28308270086494 \
- --hash=sha256:1bbcce1a551e262dfbafb6e6252f1ae36a248e615ca44ba302df077a846a8806 \
- --hash=sha256:203e92a75716d8cfb491dc47c79e17d0d9207ccffcbcb35f598fbe463ae3444d \
- --hash=sha256:27e613d7077ac613e399270253259d9d53872aaf657471473ebfc9a52935c062 \
- --hash=sha256:2bd51274dcd59f09dd952afb696bf9c61a7a49dfc764c04dd33ef7a6b502a1e2 \
- --hash=sha256:38926c50cff6f533f8a2dae3d7f19541432610d114a70808f0926d5aaa7121e4 \
- --hash=sha256:511f4273808ab590912a93ddb4e3914dfd8a388fed883361b02dea3791f292e1 \
- --hash=sha256:58d4e9129985185a06d849aa6df265bdd5a74ca6e1b736a77959b498e0505b85 \
- --hash=sha256:5b43d1ea6b378b54a1dc99dd8a2b5be47658fe9a7ce0a58ff0b55f4b43ef2b84 \
- --hash=sha256:61ec41068b7b74268fa86e3e9e12b9f0c21fcf65434571dbb13d954bceb08042 \
- --hash=sha256:666ae11966643886c2987b3b721899d250855718d6d9ce41b521252a17985f4d \
- --hash=sha256:68aaecc4178e90719e95298515979814bda0cbada1256a4485414860bd7ab962 \
- --hash=sha256:7c05650fe8023c5ed0d46793d4b7d7e6cd9c04e68eabe5b0aeea836e37bdcec2 \
- --hash=sha256:80eda8b3e173f0f247f711eef62be51b599b5d425c429b5d4ca6a05e9e856baa \
- --hash=sha256:8385d98f6a3bf8bb2d65a73e17ed87a3ba84f6991c155691c51112075f9ffc5d \
- --hash=sha256:88cce104c36870d70c49c7c8fd22885875d950d9ee6ab54df2745f83ba0dc365 \
- --hash=sha256:9d3cdb25fa98afdd3d0892d132b8d7139e2c087da1712041f6b762e4f807cc96 \
- --hash=sha256:a575913fb06e05e6b4b814d7f7468c2c660e8bb16d8d5a1faf9b33ccc569dd47 \
- --hash=sha256:ac119bb76b9faa00f48128b7f5679e1d8d437365c5d26f1c2c3f0da4ce1b553d \
- --hash=sha256:c1332724be35d23a854994ff0b66530119500b6053d0bd3363265f7e5e77288d \
- --hash=sha256:d03a475165f3134f773d1388aeb19c2d25ba88b6a9733c5c590b9ff7bbfa2e0c \
- --hash=sha256:d75601ad10b059ec832e78823b348bfa1a59f6b8d545db3a24fd44362a1564cb \
- --hash=sha256:de41fd81a41e53267cb020bb3a7212861da53a7d39f863585d13ea11049cf277 \
- --hash=sha256:e710bf40870f4db63c3d7d929aa9e09e4e7ee219e703f949ec4073b4294f6172 \
- --hash=sha256:ea25acb556320250756e53f9e20a4177515f012c9eaea17eb7587a8c4d8ae034 \
- --hash=sha256:f98bf604c82c416bc829e490c700ca1553eafdf2912a91e23a79d97d9801372a \
- --hash=sha256:fba1007b3ef89946dbbb515aeeb41e30203b004f0b4b00e5e16078b518563289
+cryptography==47.0.0 \
+ --hash=sha256:0024b87d47ae2399165a6bfb20d24888881eeab83ae2566d62467c5ff0030ce7 \
+ --hash=sha256:07efe86201817e7d3c18781ca9770bc0db04e1e48c994be384e4602bc38f8f27 \
+ --hash=sha256:09f6d7bf6724f8db8b32f11eccf23efc8e759924bc5603800335cf8859a3ddbd \
+ --hash=sha256:11438c7518132d95f354fa01a4aa2f806d172a061a7bed18cf18cbdacdb204d7 \
+ --hash=sha256:11dbb9f50a0f1bb9757b3d8c27c1101780efb8f0bdecfb12439c22a74d64c001 \
+ --hash=sha256:14432c8a9bcb37009784f9594a62fae211a2ae9543e96c92b2a8e4c3cd5cd0c4 \
+ --hash=sha256:1581aef4219f7ca2849d0250edaa3866212fb74bf5667284f46aa92f9e65c1ca \
+ --hash=sha256:160ad728f128972d362e714054f6ba0067cab7fb350c5202a9ae8ae4ce3ef1a0 \
+ --hash=sha256:1a405c08857258c11016777e11c02bacbe7ef596faf259305d282272a3a05cbe \
+ --hash=sha256:1e47422b5557bb82d3fff997e8d92cff4e28b9789576984f08c248d2b3535d93 \
+ --hash=sha256:20fdbe3e38fb67c385d233c89371fa27f9909f6ebca1cecc20c13518dae65475 \
+ --hash=sha256:2207a498b03275d0051589e326b79d4cf59985c99031b05bb292ac52631c37fe \
+ --hash=sha256:256d07c78a04d6b276f5df935a9923275f53bd1522f214447fdf365494e2d515 \
+ --hash=sha256:2b45761c6ec22b7c726d6a829558777e32d0f1c8be7c3f3480f9c912d5ee8a10 \
+ --hash=sha256:2ebd84adf0728c039a3be2700289378e1c164afc6748df1a5ed456767bef9ba7 \
+ --hash=sha256:34b4358b925a5ea3e14384ca781a2c0ef7ac219b57bb9eacc4457078e2b19f92 \
+ --hash=sha256:3fb8fa48075fad7193f2e5496135c6a76ac4b2aa5a38433df0a539296b377829 \
+ --hash=sha256:4e1de79e047e25d6e9f8cea71c86b4a53aced64134f0f003bbcbf3655fd172c8 \
+ --hash=sha256:4f7722c97826770bab8ae92959a2e7b20a5e9e9bf4deae68fd86c3ca457bab52 \
+ --hash=sha256:51c9313e90bd1690ec5a75ed047c27c0b8e6c570029712943d6116ef9a90620b \
+ --hash=sha256:5d0e362ff51041b0c0d219cc7d6924d7b8996f57ce5712bdcef71eb3c65a59cc \
+ --hash=sha256:6651d32eff255423503aa276739da98c30f26c40cbeffcc6048e0d54ef704c0c \
+ --hash=sha256:6eebcaf0df1d21ce1f90605c9b432dd2c4f4ab665ac29a40d5e3fc68f51b5e63 \
+ --hash=sha256:6f29f36582e6151d9686235e586dd35bb67491f024767d10b842e520dc6a07ac \
+ --hash=sha256:7a02675e2fabd0c0fc04c868b8781863cbf1967691543c22f5470500ff840b31 \
+ --hash=sha256:7f1207974a904e005f762869996cf620e9bf79ecb4622f148550bb48e0eb35a7 \
+ --hash=sha256:7f68d6fbc7fbbcfb0939fea72c3b96a9f9a6edfc0e1b1d29778a2066030418b1 \
(.venv) PS C:\Users\dajusto\source\repos\update-requirements-2026-04-28\llvm\utils\git> git status
On branch dev/dajusto/update-requirements-2026-04-28
Your branch is ahead of 'davidmrdavid/main' by 4 commits.
(use "git push" to publish your local commits)
Changes not staged for commit:
(use "git add <file>..." to update what will be committed)
(use "git restore <file>..." to discard changes in working directory)
modified: requirements.txt
no changes added to commit (use "git add" and/or "git commit -a")
(.venv) PS C:\Users\dajusto\source\repos\update-requirements-2026-04-28\llvm\utils\git>
```
</details>
I chose not to invoke the more general `--upgrade` flag, which updates
all packages, to minimize the impact of the change.
_Thanks!_
**Edit 2026-04-28 at 2:51pm pacific:** I updated the description to
match the latest implementation, based on reviewer feedback.
Commit: aa0ac3b43438b9a21bc78a392a6490d2d4b922e6
https://github.com/llvm/llvm-project/commit/aa0ac3b43438b9a21bc78a392a6490d2d4b922e6
Author: Pranav Kant <prka at google.com>
Date: 2026-04-28 (Tue, 28 Apr 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/.bazelignore
Log Message:
-----------
[bazel] Prevent bazel from scanning .git metadata (#194745)
This prevents race condition when git triggers its GC during a bazel
build. Bazel build fails as follows in that case:
```
Loading: 0 packages loaded
ERROR: Failed to list directory contents, for .git/objects/05, skipping: /var/lib/buildkite-agent/llvm-project-bazelbot/.git/objects/05 (No such file or directory)
ERROR: Target parsing failed due to unexpected exception: /var/lib/buildkite-agent/llvm-project-bazelbot/.git/objects/05 (No such file or directory)
Loading: 0 packages loaded
```
Commit: b9dfb5a5296dd0d0e177d9fa7636d4fba9e2420d
https://github.com/llvm/llvm-project/commit/b9dfb5a5296dd0d0e177d9fa7636d4fba9e2420d
Author: Jackson Stogel <jtstogel at gmail.com>
Date: 2026-04-28 (Tue, 28 Apr 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[bazel][libc] Port b7d6438450a3e2f4a6be4a0585ea364d72313412 (#194736)
Commit: 8a9877dce0e4705d470dc66944ee3c9e35a04fdd
https://github.com/llvm/llvm-project/commit/8a9877dce0e4705d470dc66944ee3c9e35a04fdd
Author: Erich Keane <ekeane at nvidia.com>
Date: 2026-04-28 (Tue, 28 Apr 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenExprConstant.cpp
M clang/lib/CIR/CodeGen/CIRGenModule.cpp
M clang/lib/CIR/CodeGen/CIRGenModule.h
M clang/test/CIR/CodeGen/source-loc.cpp
Log Message:
-----------
[CIR] __builtin_source_location lowering for constant (#194505)
This handles the UnnamedGlobalConstantDecl lowering, which is only used
for the source-location object. This uses similar logic to the classic
compiler, so we end up with roughly the same IR.
There is a slight difference in how we choose which strings to uniquify
(preexisting) and how we name them/name duplicates, but it isn't really
relevant to the text itself.
Commit: 16897c234a2980e913113d91bcf824ec8dbc429b
https://github.com/llvm/llvm-project/commit/16897c234a2980e913113d91bcf824ec8dbc429b
Author: Demetrius Kanios <demetrius at kanios.net>
Date: 2026-04-28 (Tue, 28 Apr 2026)
Changed paths:
M llvm/lib/Target/WebAssembly/CMakeLists.txt
M llvm/lib/Target/WebAssembly/GISel/WebAssemblyLegalizerInfo.cpp
M llvm/lib/Target/WebAssembly/GISel/WebAssemblyRegisterBankInfo.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
M llvm/test/CodeGen/WebAssembly/GlobalISel/instructions/anyext.mir
M llvm/test/CodeGen/WebAssembly/GlobalISel/instructions/ashr.mir
M llvm/test/CodeGen/WebAssembly/GlobalISel/instructions/ctlz.mir
M llvm/test/CodeGen/WebAssembly/GlobalISel/instructions/ctpop.mir
M llvm/test/CodeGen/WebAssembly/GlobalISel/instructions/cttz.mir
M llvm/test/CodeGen/WebAssembly/GlobalISel/instructions/fshl.mir
M llvm/test/CodeGen/WebAssembly/GlobalISel/instructions/fshr.mir
M llvm/test/CodeGen/WebAssembly/GlobalISel/instructions/implicit_def.mir
M llvm/test/CodeGen/WebAssembly/GlobalISel/instructions/lshr.mir
M llvm/test/CodeGen/WebAssembly/GlobalISel/instructions/rotl.mir
M llvm/test/CodeGen/WebAssembly/GlobalISel/instructions/rotr.mir
M llvm/test/CodeGen/WebAssembly/GlobalISel/instructions/shl.mir
M llvm/test/CodeGen/WebAssembly/GlobalISel/irtranslator/args-simd.ll
M llvm/test/CodeGen/WebAssembly/GlobalISel/irtranslator/args-swiftcc.ll
M llvm/test/CodeGen/WebAssembly/GlobalISel/irtranslator/args.ll
M llvm/test/CodeGen/WebAssembly/GlobalISel/irtranslator/call-basics.ll
M llvm/test/CodeGen/WebAssembly/GlobalISel/irtranslator/ret-aggregates.ll
M llvm/test/CodeGen/WebAssembly/GlobalISel/irtranslator/ret-basics.ll
M llvm/test/CodeGen/WebAssembly/GlobalISel/irtranslator/ret-simd.ll
Log Message:
-----------
[WebAssembly][GlobalISel] Migrate to extended LLT (#193047)
Moves Wasm GISel to use the the new extended LLTs added by #155107.
Extended LLTs have (optional) information about whether a particular
scalar is integer vs floating-point. This is a big win for Wasm, since
we can avoid a lot of guess work, and map LLT i32, i64, f32, and f64
directly to their Wasm counterparts.
To take full advantage of this, RegBankSelect has been automated,
iterating over all operands and mapping typed LLTs to their appropriate
register bank.
Commit: 710c297289b751857bdc0a8677437d575b403922
https://github.com/llvm/llvm-project/commit/710c297289b751857bdc0a8677437d575b403922
Author: vporpo <vasileios.porpodas at amd.com>
Date: 2026-04-28 (Tue, 28 Apr 2026)
Changed paths:
M llvm/include/llvm/SandboxIR/Instruction.h
M llvm/unittests/SandboxIR/SandboxIRTest.cpp
Log Message:
-----------
[SandboxIR] Implement getPointerOperandType() and getPointerAddressSpace() (#194472)
This patch implements `getPointerOperandType()` and
`getPointerAddressSpace()` member functions for both `LoadInst` and
`StoreInst`, mirroring LLVM IR.
Commit: f09c9389515e09ce831346e07313db1d94679fa3
https://github.com/llvm/llvm-project/commit/f09c9389515e09ce831346e07313db1d94679fa3
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2026-04-28 (Tue, 28 Apr 2026)
Changed paths:
M lldb/unittests/Host/MainLoopTest.cpp
M lldb/unittests/Host/SocketTest.cpp
M lldb/unittests/Platform/Android/AdbClientTest.cpp
M lldb/unittests/Platform/Android/CMakeLists.txt
M lldb/unittests/TestingSupport/Host/SocketTestUtilities.cpp
M lldb/unittests/TestingSupport/Host/SocketTestUtilities.h
M lldb/unittests/debugserver/CMakeLists.txt
M lldb/unittests/debugserver/RNBSocketTest.cpp
M lldb/unittests/tools/lldb-server/tests/TestBase.h
Log Message:
-----------
[lldb] Gracefully handle sockets being unavailable (#194712)
Gracefully handle sockets being unavailable, for example because the
test suite is running in a sandboxed environment where you're not
allowed to call bind.
Commit: 4be3a8cf0230f5435d891a84d4146ffaadc05073
https://github.com/llvm/llvm-project/commit/4be3a8cf0230f5435d891a84d4146ffaadc05073
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2026-04-29 (Wed, 29 Apr 2026)
Changed paths:
M lldb/test/API/iohandler/unicode/TestUnicode.py
Log Message:
-----------
[lldb] Update TestUnicode.py after #194352 (#194756)
Commit: eac20c0e507cf3fd02fde13e5e04993e1f92a664
https://github.com/llvm/llvm-project/commit/eac20c0e507cf3fd02fde13e5e04993e1f92a664
Author: Peter Collingbourne <pcc at google.com>
Date: 2026-04-28 (Tue, 28 Apr 2026)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/ProfileData/BUILD.gn
Log Message:
-----------
[gn build] Port c26ae41c8765
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/194759
Commit: 478db95030c1a752573e4bf60c20cbd99e107902
https://github.com/llvm/llvm-project/commit/478db95030c1a752573e4bf60c20cbd99e107902
Author: Peter Collingbourne <peter at pcc.me.uk>
Date: 2026-04-28 (Tue, 28 Apr 2026)
Changed paths:
M .github/workflows/containers/github-action-ci-windows/Dockerfile
M .github/workflows/containers/github-action-ci/Dockerfile
M .github/workflows/containers/libc/Dockerfile
M .github/workflows/issue-subscriber.yml
M .github/workflows/libcxx-build-and-test.yaml
M .github/workflows/new-issues.yml
M .github/workflows/new-prs.yml
M .github/workflows/pr-subscriber.yml
M .github/workflows/release-asset-audit.yml
M .gitignore
M bolt/docs/profiles.md
M bolt/include/bolt/Core/BinaryContext.h
M bolt/include/bolt/Profile/DataAggregator.h
M bolt/lib/Core/BinaryContext.cpp
M bolt/lib/Core/BinaryEmitter.cpp
M bolt/lib/Core/DebugData.cpp
M bolt/lib/Passes/CMOVConversion.cpp
M bolt/lib/Passes/IndirectCallPromotion.cpp
M bolt/lib/Passes/JTFootprintReduction.cpp
M bolt/lib/Profile/DataAggregator.cpp
M bolt/lib/Profile/DataReader.cpp
M bolt/lib/Rewrite/DWARFRewriter.cpp
M bolt/test/AArch64/unsupported-passes.test
A bolt/test/X86/Inputs/pre-aggregated-bad-hex.txt
A bolt/test/X86/Inputs/pre-aggregated-bad-type.txt
A bolt/test/X86/pre-aggregated-records.s
M bolt/test/assume-abi.test
M bolt/unittests/Profile/DataAggregator.cpp
M clang-tools-extra/clang-tidy/bugprone/SuspiciousIncludeCheck.cpp
M clang-tools-extra/clang-tidy/llvmlibc/InlineFunctionDeclCheck.cpp
M clang-tools-extra/clang-tidy/readability/IdentifierLengthCheck.cpp
M clang-tools-extra/clang-tidy/readability/IdentifierLengthCheck.h
M clang-tools-extra/clang-tidy/utils/DeclRefExprUtils.cpp
M clang-tools-extra/clang-tidy/utils/DeclRefExprUtils.h
M clang-tools-extra/clangd/Config.h
M clang-tools-extra/clangd/ModulesBuilder.cpp
M clang-tools-extra/clangd/SemanticHighlighting.cpp
M clang-tools-extra/clangd/unittests/PrerequisiteModulesTest.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/arr39-c.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/con36-c.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/con54-cpp.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/ctr56-cpp.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/dcl03-c.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/dcl16-c.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/dcl37-c.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/dcl50-cpp.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/dcl51-cpp.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/dcl54-cpp.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/dcl58-cpp.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/dcl59-cpp.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/env33-c.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/err09-cpp.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/err34-c.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/err52-cpp.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/err58-cpp.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/err60-cpp.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/err61-cpp.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/exp42-c.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/exp45-c.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/fio38-c.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/flp30-c.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/flp37-c.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/int09-c.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/mem57-cpp.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/msc24-c.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/msc30-c.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/msc32-c.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/msc33-c.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/msc50-cpp.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/msc51-cpp.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/msc54-cpp.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/oop11-cpp.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/oop54-cpp.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/oop57-cpp.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/oop58-cpp.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/pos44-c.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/pos47-c.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/sig30-c.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/str34-c.rst
M clang-tools-extra/docs/clang-tidy/checks/cppcoreguidelines/avoid-c-arrays.rst
M clang-tools-extra/docs/clang-tidy/checks/cppcoreguidelines/avoid-magic-numbers.rst
M clang-tools-extra/docs/clang-tidy/checks/cppcoreguidelines/c-copy-assignment-signature.rst
M clang-tools-extra/docs/clang-tidy/checks/cppcoreguidelines/explicit-virtual-functions.rst
M clang-tools-extra/docs/clang-tidy/checks/cppcoreguidelines/macro-to-enum.rst
M clang-tools-extra/docs/clang-tidy/checks/cppcoreguidelines/narrowing-conversions.rst
M clang-tools-extra/docs/clang-tidy/checks/cppcoreguidelines/noexcept-destructor.rst
M clang-tools-extra/docs/clang-tidy/checks/cppcoreguidelines/noexcept-move-operations.rst
M clang-tools-extra/docs/clang-tidy/checks/cppcoreguidelines/noexcept-swap.rst
M clang-tools-extra/docs/clang-tidy/checks/cppcoreguidelines/non-private-member-variables-in-classes.rst
M clang-tools-extra/docs/clang-tidy/checks/cppcoreguidelines/use-default-member-init.rst
M clang-tools-extra/docs/clang-tidy/checks/fuchsia/header-anon-namespaces.rst
M clang-tools-extra/docs/clang-tidy/checks/fuchsia/multiple-inheritance.rst
M clang-tools-extra/docs/clang-tidy/checks/google/build-namespaces.rst
M clang-tools-extra/docs/clang-tidy/checks/google/readability-braces-around-statements.rst
M clang-tools-extra/docs/clang-tidy/checks/google/readability-casting.rst
M clang-tools-extra/docs/clang-tidy/checks/google/readability-function-size.rst
M clang-tools-extra/docs/clang-tidy/checks/google/readability-namespace-comments.rst
M clang-tools-extra/docs/clang-tidy/checks/hicpp/avoid-c-arrays.rst
M clang-tools-extra/docs/clang-tidy/checks/hicpp/avoid-goto.rst
M clang-tools-extra/docs/clang-tidy/checks/hicpp/braces-around-statements.rst
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M clang-tools-extra/docs/clang-tidy/checks/hicpp/exception-baseclass.rst
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M clang-tools-extra/docs/clang-tidy/checks/hicpp/function-size.rst
M clang-tools-extra/docs/clang-tidy/checks/hicpp/ignored-remove-result.rst
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M clang-tools-extra/docs/clang-tidy/checks/hicpp/member-init.rst
M clang-tools-extra/docs/clang-tidy/checks/hicpp/move-const-arg.rst
M clang-tools-extra/docs/clang-tidy/checks/hicpp/named-parameter.rst
M clang-tools-extra/docs/clang-tidy/checks/hicpp/new-delete-operators.rst
M clang-tools-extra/docs/clang-tidy/checks/hicpp/no-array-decay.rst
M clang-tools-extra/docs/clang-tidy/checks/hicpp/no-assembler.rst
M clang-tools-extra/docs/clang-tidy/checks/hicpp/no-malloc.rst
M clang-tools-extra/docs/clang-tidy/checks/hicpp/noexcept-move.rst
M clang-tools-extra/docs/clang-tidy/checks/hicpp/signed-bitwise.rst
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M clang-tools-extra/docs/clang-tidy/checks/hicpp/undelegated-constructor.rst
M clang-tools-extra/docs/clang-tidy/checks/hicpp/uppercase-literal-suffix.rst
M clang-tools-extra/docs/clang-tidy/checks/hicpp/use-auto.rst
M clang-tools-extra/docs/clang-tidy/checks/hicpp/use-emplace.rst
M clang-tools-extra/docs/clang-tidy/checks/hicpp/use-equals-default.rst
M clang-tools-extra/docs/clang-tidy/checks/hicpp/use-equals-delete.rst
M clang-tools-extra/docs/clang-tidy/checks/hicpp/use-noexcept.rst
M clang-tools-extra/docs/clang-tidy/checks/hicpp/use-nullptr.rst
M clang-tools-extra/docs/clang-tidy/checks/hicpp/use-override.rst
M clang-tools-extra/docs/clang-tidy/checks/hicpp/vararg.rst
M clang-tools-extra/docs/clang-tidy/checks/llvm/else-after-return.rst
M clang-tools-extra/docs/clang-tidy/checks/llvm/qualified-auto.rst
M clang-tools-extra/docs/clang-tidy/checks/modernize/use-default.rst
M clang-tools-extra/docs/clang-tidy/checks/performance/faster-string-find.rst
M clang-tools-extra/docs/clang-tidy/checks/performance/implicit-cast-in-loop.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/identifier-length.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/implicit-bool-cast.rst
A clang-tools-extra/test/clang-tidy/checkers/readability/identifier-length-structured-bindings.cpp
M clang/docs/OpenMPSupport.rst
M clang/docs/ReleaseNotes.rst
M clang/include/clang/AST/ASTFwd.h
M clang/include/clang/AST/ASTTypeTraits.h
M clang/include/clang/AST/Decl.h
M clang/include/clang/AST/DynamicRecursiveASTVisitor.h
M clang/include/clang/AST/RecursiveASTVisitor.h
M clang/include/clang/AST/TypeBase.h
M clang/include/clang/Analysis/Analyses/LifetimeSafety/Facts.h
M clang/include/clang/Analysis/Analyses/LifetimeSafety/FactsGenerator.h
M clang/include/clang/Analysis/Analyses/LifetimeSafety/LifetimeSafety.h
M clang/include/clang/Analysis/Analyses/LifetimeSafety/Loans.h
M clang/include/clang/Basic/AArch64CodeGenUtils.h
M clang/include/clang/Basic/Attr.td
M clang/include/clang/Basic/AttrDocs.td
M clang/include/clang/Basic/BuiltinsAMDGPU.td
M clang/include/clang/Basic/CodeGenOptions.h
M clang/include/clang/Basic/DiagnosticDriverKinds.td
M clang/include/clang/Basic/DiagnosticGroups.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Basic/RISCVVTypes.def
M clang/include/clang/Basic/TokenKinds.def
M clang/include/clang/Basic/arm_neon.td
M clang/include/clang/Basic/arm_sve.td
M clang/include/clang/Basic/riscv_vector.td
M clang/include/clang/CIR/Dialect/Builder/CIRBaseBuilder.h
M clang/include/clang/CIR/Dialect/IR/CIRAttrs.td
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/include/clang/CIR/MissingFeatures.h
M clang/include/clang/DependencyScanning/DependencyScanningService.h
M clang/include/clang/DependencyScanning/InProcessModuleCache.h
M clang/include/clang/Driver/ModulesDriver.h
M clang/include/clang/Format/Format.h
M clang/include/clang/Parse/Parser.h
M clang/include/clang/ScalableStaticAnalysisFramework/Core/Model/PrivateFieldNames.def
M clang/include/clang/ScalableStaticAnalysisFramework/Core/Serialization/SerializationFormatRegistry.h
M clang/include/clang/ScalableStaticAnalysisFramework/Core/TUSummary/TUSummaryBuilder.h
M clang/include/clang/ScalableStaticAnalysisFramework/Core/WholeProgramAnalysis/DerivedAnalysis.h
M clang/include/clang/ScalableStaticAnalysisFramework/Core/WholeProgramAnalysis/SummaryAnalysis.h
M clang/include/clang/Sema/Initialization.h
M clang/include/clang/Sema/Sema.h
M clang/include/clang/Sema/SemaHLSL.h
M clang/include/clang/Serialization/ASTBitCodes.h
M clang/include/clang/StaticAnalyzer/Checkers/Taint.h
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/CallEvent.h
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/CheckerContext.h
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/Environment.h
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/ExplodedGraph.h
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/ProgramState.h
M clang/lib/AST/ASTContext.cpp
M clang/lib/AST/ASTImporter.cpp
M clang/lib/AST/ASTTypeTraits.cpp
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ByteCode/Compiler.h
M clang/lib/AST/ByteCode/Context.cpp
M clang/lib/AST/ByteCode/Context.h
M clang/lib/AST/ByteCode/Descriptor.cpp
M clang/lib/AST/ByteCode/Descriptor.h
M clang/lib/AST/ByteCode/Disasm.cpp
M clang/lib/AST/ByteCode/EvalEmitter.cpp
M clang/lib/AST/ByteCode/Integral.h
M clang/lib/AST/ByteCode/Interp.cpp
M clang/lib/AST/ByteCode/Interp.h
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
M clang/lib/AST/ByteCode/InterpBuiltinBitCast.cpp
M clang/lib/AST/ByteCode/InterpFrame.h
M clang/lib/AST/ByteCode/MemberPointer.h
M clang/lib/AST/ByteCode/Opcodes.td
M clang/lib/AST/ByteCode/Pointer.cpp
M clang/lib/AST/ByteCode/Pointer.h
M clang/lib/AST/ByteCode/Primitives.h
M clang/lib/AST/Comment.cpp
M clang/lib/AST/Decl.cpp
M clang/lib/AST/DeclPrinter.cpp
M clang/lib/AST/DeclTemplate.cpp
M clang/lib/AST/DynamicRecursiveASTVisitor.cpp
M clang/lib/AST/ExprConstant.cpp
M clang/lib/AST/StmtProfile.cpp
M clang/lib/AST/Type.cpp
M clang/lib/Analysis/LifetimeSafety/Checker.cpp
M clang/lib/Analysis/LifetimeSafety/FactsGenerator.cpp
M clang/lib/Analysis/LifetimeSafety/Loans.cpp
M clang/lib/Basic/Targets/AVR.h
M clang/lib/CIR/CodeGen/CIRGenAtomic.cpp
M clang/lib/CIR/CodeGen/CIRGenBuiltin.cpp
M clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp
M clang/lib/CIR/CodeGen/CIRGenBuiltinAMDGPU.cpp
M clang/lib/CIR/CodeGen/CIRGenCXX.cpp
M clang/lib/CIR/CodeGen/CIRGenClass.cpp
M clang/lib/CIR/CodeGen/CIRGenDecl.cpp
M clang/lib/CIR/CodeGen/CIRGenDeclCXX.cpp
M clang/lib/CIR/CodeGen/CIRGenExpr.cpp
M clang/lib/CIR/CodeGen/CIRGenExprAggregate.cpp
M clang/lib/CIR/CodeGen/CIRGenExprCXX.cpp
M clang/lib/CIR/CodeGen/CIRGenExprConstant.cpp
M clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
M clang/lib/CIR/CodeGen/CIRGenItaniumCXXABI.cpp
M clang/lib/CIR/CodeGen/CIRGenModule.cpp
M clang/lib/CIR/CodeGen/CIRGenModule.h
A clang/lib/CIR/CodeGen/CIRGenOpenMPRuntime.cpp
A clang/lib/CIR/CodeGen/CIRGenOpenMPRuntime.h
M clang/lib/CIR/CodeGen/CIRGenTypes.cpp
M clang/lib/CIR/CodeGen/CIRGenVTables.cpp
M clang/lib/CIR/CodeGen/CMakeLists.txt
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
M clang/lib/CIR/Dialect/Transforms/CXXABILowering.cpp
M clang/lib/CIR/Dialect/Transforms/FlattenCFG.cpp
M clang/lib/CIR/Dialect/Transforms/LoweringPrepare.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
M clang/lib/CodeGen/BackendUtil.cpp
M clang/lib/CodeGen/CGBuilder.h
M clang/lib/CodeGen/CGCUDANV.cpp
M clang/lib/CodeGen/CGCall.cpp
M clang/lib/CodeGen/CGCoroutine.cpp
M clang/lib/CodeGen/CGExprAgg.cpp
M clang/lib/CodeGen/CGExprConstant.cpp
M clang/lib/CodeGen/CGExprScalar.cpp
M clang/lib/CodeGen/CGHLSLRuntime.cpp
M clang/lib/CodeGen/CGOpenMPRuntime.cpp
M clang/lib/CodeGen/CGStmtOpenMP.cpp
M clang/lib/CodeGen/CodeGenModule.cpp
M clang/lib/CodeGen/TargetBuiltins/ARM.cpp
M clang/lib/DependencyScanning/InProcessModuleCache.cpp
M clang/lib/Driver/Driver.cpp
M clang/lib/Driver/ModulesDriver.cpp
M clang/lib/Driver/ToolChain.cpp
M clang/lib/Driver/ToolChains/BareMetal.cpp
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/Driver/ToolChains/Darwin.cpp
M clang/lib/Driver/ToolChains/Darwin.h
M clang/lib/Driver/ToolChains/HIPUtility.cpp
M clang/lib/Format/UnwrappedLineParser.cpp
M clang/lib/Format/UnwrappedLineParser.h
M clang/lib/Frontend/InitPreprocessor.cpp
M clang/lib/Frontend/Rewrite/FrontendActions.cpp
M clang/lib/Headers/amdgpuintrin.h
M clang/lib/Headers/gpuintrin.h
M clang/lib/Headers/nvptxintrin.h
M clang/lib/Headers/spirvintrin.h
M clang/lib/Parse/ParseCXXInlineMethods.cpp
M clang/lib/Parse/ParseDecl.cpp
M clang/lib/Parse/ParseDeclCXX.cpp
M clang/lib/Parse/ParseExprCXX.cpp
M clang/lib/Parse/ParseStmtAsm.cpp
M clang/lib/Parse/ParseTentative.cpp
M clang/lib/ScalableStaticAnalysisFramework/Core/TUSummary/TUSummaryBuilder.cpp
M clang/lib/Sema/HLSLBuiltinTypeDeclBuilder.cpp
M clang/lib/Sema/HLSLBuiltinTypeDeclBuilder.h
M clang/lib/Sema/SemaCoroutine.cpp
M clang/lib/Sema/SemaDecl.cpp
M clang/lib/Sema/SemaDeclAttr.cpp
M clang/lib/Sema/SemaDeclCXX.cpp
M clang/lib/Sema/SemaHLSL.cpp
M clang/lib/Sema/SemaLifetimeSafety.h
M clang/lib/Sema/SemaOpenMP.cpp
M clang/lib/Sema/SemaRISCV.cpp
M clang/lib/Sema/SemaTemplateInstantiate.cpp
M clang/lib/Sema/SemaTemplateInstantiateDecl.cpp
M clang/lib/Serialization/ASTReader.cpp
M clang/lib/Serialization/ModuleCache.cpp
M clang/lib/StaticAnalyzer/Checkers/BasicObjCFoundationChecks.cpp
M clang/lib/StaticAnalyzer/Checkers/GenericTaintChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/MIGChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/NullabilityChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/RetainCountChecker/RetainCountChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/RetainCountChecker/RetainCountDiagnostics.cpp
M clang/lib/StaticAnalyzer/Checkers/Taint.cpp
M clang/lib/StaticAnalyzer/Checkers/TestAfterDivZeroChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/UndefBranchChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/PtrTypesSemantics.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/PtrTypesSemantics.h
M clang/lib/StaticAnalyzer/Checkers/WebKit/RetainPtrCtorAdoptChecker.cpp
M clang/lib/StaticAnalyzer/Core/BugReporterVisitors.cpp
M clang/lib/StaticAnalyzer/Core/CheckerContext.cpp
M clang/lib/StaticAnalyzer/Core/Environment.cpp
M clang/lib/StaticAnalyzer/Core/ExprEngine.cpp
M clang/lib/StaticAnalyzer/Core/ExprEngineCallAndReturn.cpp
M clang/lib/StaticAnalyzer/Core/ExprEngineObjC.cpp
M clang/lib/Support/RISCVVIntrinsicUtils.cpp
M clang/lib/Tooling/Syntax/BuildTree.cpp
M clang/test/APINotes/unsafe-buffer-usage.cpp
M clang/test/AST/ByteCode/builtin-bit-cast-bitfields.cpp
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M clang/test/AST/ByteCode/const-eval.c
M clang/test/AST/ByteCode/cxx11.cpp
M clang/test/AST/ByteCode/cxx17.cpp
M clang/test/AST/ByteCode/cxx23.cpp
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M clang/test/AST/ByteCode/new-delete.cpp
M clang/test/AST/ByteCode/openmp.cpp
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M clang/test/AST/HLSL/ByteAddressBuffers-AST.hlsl
M clang/test/AST/HLSL/OutArgExpr.hlsl
M clang/test/AST/HLSL/StructuredBuffers-AST.hlsl
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A clang/test/AST/HLSL/matrix_layout_attr.hlsl
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M clang/test/Analysis/Checkers/WebKit/unretained-call-args.mm
M clang/test/Analysis/more-dtors-cfg-output.cpp
M clang/test/C/drs/dr335.c
A clang/test/CIR/CodeGen/annotate-attribute.c
A clang/test/CIR/CodeGen/annotate-attribute.cpp
M clang/test/CIR/CodeGen/atomic.c
M clang/test/CIR/CodeGen/binop.cpp
M clang/test/CIR/CodeGen/cmp.cpp
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A clang/test/CIR/CodeGen/lambda-decomp-decl-captures.cpp
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A clang/test/CIR/CodeGen/local-const-aggregate-name-clash.cpp
A clang/test/CIR/CodeGen/new-null.cpp
A clang/test/CIR/CodeGen/no-proto-then-def.c
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A clang/test/CIR/CodeGen/self-assign.c
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A clang/test/CIR/CodeGen/temp-param-obj-decl.cpp
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A clang/test/CIR/CodeGen/vtable-linkage-explicit-instantiation.cpp
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M clang/test/CXX/drs/cwg25xx.cpp
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M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfofp8min/policy/non-overloaded/vfwcvtbf16.c
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A clang/test/CodeGen/avr/issue-176830.c
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M flang/test/Lower/read-write-buffer.f90
M flang/test/Lower/real-operations-2.f90
M flang/test/Lower/select-type-2.f90
M flang/test/Lower/statement-function.f90
M flang/test/Lower/submodule.f90
M flang/test/Lower/user-defined-operators.f90
M flang/test/Lower/variable-inquiries.f90
M flang/test/Lower/where-allocatable-assignments.f90
M flang/test/Lower/where.f90
A flang/test/Parser/OpenMP/begin-metadirective.f90
M flang/test/Parser/OpenMP/bind-clause.f90
M flang/test/Parser/OpenMP/cross-label-do.f90
M flang/test/Parser/OpenMP/declare-mapper-unparse.f90
M flang/test/Parser/OpenMP/declare-reduction-combiner.f90
M flang/test/Parser/OpenMP/declare-reduction-multi.f90
M flang/test/Parser/OpenMP/declare-reduction-operator.f90
M flang/test/Parser/OpenMP/declare-reduction-unparse.f90
M flang/test/Parser/OpenMP/declare-target-indirect-tree.f90
M flang/test/Parser/OpenMP/declare-target-to-clause.f90
M flang/test/Parser/OpenMP/declare_target-device_type.f90
M flang/test/Parser/OpenMP/depth-clause.f90
M flang/test/Parser/OpenMP/do-interchange.f90
M flang/test/Parser/OpenMP/do-tile-size.f90
M flang/test/Parser/OpenMP/doacross-clause.f90
M flang/test/Parser/OpenMP/enter-automap-modifier.f90
M flang/test/Parser/OpenMP/fuse-looprange.f90
M flang/test/Parser/OpenMP/fuse01.f90
M flang/test/Parser/OpenMP/fuse02.f90
M flang/test/Parser/OpenMP/in-reduction-clause.f90
M flang/test/Parser/OpenMP/interchange-permutation.f90
M flang/test/Parser/OpenMP/interchange.f90
M flang/test/Parser/OpenMP/linear-clause.f90
M flang/test/Parser/OpenMP/loop-transformation-construct01.f90
M flang/test/Parser/OpenMP/loop-transformation-construct02.f90
M flang/test/Parser/OpenMP/loop-transformation-construct03.f90
M flang/test/Parser/OpenMP/loop-transformation-construct04.f90
M flang/test/Parser/OpenMP/loop-transformation-construct05.f90
M flang/test/Parser/OpenMP/masked-unparse.f90
M flang/test/Parser/OpenMP/master-unparse.f90
M flang/test/Parser/OpenMP/nonblock-do-nested-omp.f90
M flang/test/Parser/OpenMP/openmp6-directive-spellings.f90
M flang/test/Parser/OpenMP/order-clause01.f90
M flang/test/Parser/OpenMP/ordered-depend.f90
M flang/test/Parser/OpenMP/parallel-loop-unparse.f90
M flang/test/Parser/OpenMP/reduction-modifier.f90
M flang/test/Parser/OpenMP/target-loop-unparse.f90
M flang/test/Parser/OpenMP/taskloop.f90
M flang/test/Parser/OpenMP/threadset-clause.f90
M flang/test/Parser/OpenMP/tile-size.f90
M flang/test/Parser/OpenMP/tile.f90
M flang/test/Parser/OpenMP/transparent-clause.f90
M flang/test/Parser/OpenMP/unroll-full.f90
M flang/test/Parser/OpenMP/unroll-heuristic.f90
M flang/test/Parser/OpenMP/unroll-partial.f90
A flang/test/Parser/inlinealways-directive.f90
M flang/test/Semantics/OpenACC/acc-canonicalization-validity.f90
M flang/test/Semantics/OpenACC/acc-declare-validity.f90
M flang/test/Semantics/OpenACC/acc-loop.f90
M flang/test/Semantics/OpenMP/allocate-align01.f90
M flang/test/Semantics/OpenMP/allocate01.f90
A flang/test/Semantics/OpenMP/begin-metadirective.f90
A flang/test/Semantics/OpenMP/branching-program-unit.f90
M flang/test/Semantics/OpenMP/clause-validity01.f90
M flang/test/Semantics/OpenMP/declarative-directive01.f90
M flang/test/Semantics/OpenMP/declare-target01.f90
M flang/test/Semantics/OpenMP/declare-target02.f90
M flang/test/Semantics/OpenMP/declare-target06.f90
M flang/test/Semantics/OpenMP/deprecation.f90
M flang/test/Semantics/OpenMP/device-constructs.f90
A flang/test/Semantics/OpenMP/device-omp-initial-invalid.f90
A flang/test/Semantics/OpenMP/device-pre-52.f90
M flang/test/Semantics/OpenMP/nested-target.f90
M flang/test/Semantics/OpenMP/parallel-master-goto.f90
M flang/test/Semantics/OpenMP/requires04.f90
M flang/test/Semantics/OpenMP/requires05.f90
M flang/test/Semantics/OpenMP/simd-aligned.f90
M flang/test/Semantics/OpenMP/simd-only.f90
M flang/test/Semantics/OpenMP/single03.f90
M flang/test/Semantics/OpenMP/single04.f90
M flang/test/Semantics/OpenMP/target01.f90
M flang/test/Semantics/OpenMP/threadprivate-equivalence-nowarn.f90
M flang/test/Semantics/OpenMP/use_device_ptr1.f90
A flang/test/Semantics/OpenMP/workshare06.f90
A flang/test/Semantics/inlinealways-directive01.f90
A flang/test/Semantics/io19.f90
M flang/test/Transforms/constant-argument-globalisation.fir
A flang/test/Transforms/debug-fake-use.fir
M flang/unittests/Common/FortranFeaturesTest.cpp
M flang/unittests/Semantics/OpenMPUtils.cpp
M libc/cmake/modules/prepare_libc_gpu_build.cmake
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/config/linux/x86_64/headers.txt
M libc/docs/CMakeLists.txt
M libc/docs/dev/undefined_behavior.rst
M libc/docs/headers/index.rst
M libc/hdr/types/CMakeLists.txt
M libc/hdr/types/socklen_t.h
A libc/hdr/types/struct_cmsghdr.h
M libc/include/CMakeLists.txt
M libc/include/llvm-libc-macros/linux/sys-socket-macros.h
M libc/include/llvm-libc-macros/pthread-macros.h
M libc/include/llvm-libc-types/CMakeLists.txt
M libc/include/llvm-libc-types/__mutex_type.h
A libc/include/llvm-libc-types/pthread_cond_t.h
A libc/include/llvm-libc-types/struct_cmsghdr.h
M libc/include/pthread.yaml
M libc/include/sys/socket.yaml
M libc/include/sys/types.yaml
A libc/include/sys/ucontext.h.def
A libc/include/sys/ucontext.yaml
R libc/include/ucontext.h.def
M libc/include/wchar.yaml
M libc/shared/math.h
A libc/shared/math/bf16subl.h
A libc/shared/math/ddivf128.h
A libc/shared/math/ddivl.h
A libc/shared/math/dmulf128.h
A libc/shared/math/dmull.h
A libc/shared/math/dsqrtf128.h
A libc/shared/math/dsubf128.h
A libc/shared/math/dsubl.h
A libc/shared/math/fabs.h
A libc/shared/math/fabsbf16.h
A libc/shared/math/fabsf.h
A libc/shared/math/fabsf128.h
A libc/shared/math/fabsf16.h
A libc/shared/math/fabsl.h
A libc/shared/math/fdiv.h
A libc/shared/math/fdivf128.h
A libc/shared/math/fdivl.h
A libc/shared/math/fmaximum.h
A libc/shared/math/fmaximum_mag_num.h
A libc/shared/math/fmaximum_mag_numbf16.h
A libc/shared/math/fmaximum_mag_numf.h
A libc/shared/math/fmaximum_num.h
A libc/shared/math/fmaximum_numbf16.h
A libc/shared/math/fmaximum_numf.h
A libc/shared/math/fmaximum_numf128.h
A libc/shared/math/fmaximum_numf16.h
A libc/shared/math/fmaximum_numl.h
A libc/shared/math/fmaximumbf16.h
A libc/shared/math/fmaximumf.h
A libc/shared/math/fmaximumf128.h
A libc/shared/math/fmaximumf16.h
A libc/shared/math/fmaximuml.h
A libc/shared/math/fmin.h
A libc/shared/math/fminbf16.h
A libc/shared/math/fminf.h
A libc/shared/math/fminf128.h
A libc/shared/math/fminf16.h
A libc/shared/math/fminimum.h
A libc/shared/math/fminimum_num.h
A libc/shared/math/fminimum_numbf16.h
A libc/shared/math/fminimum_numf.h
A libc/shared/math/fminimum_numf128.h
A libc/shared/math/fminimum_numf16.h
A libc/shared/math/fminimum_numl.h
A libc/shared/math/fminimumbf16.h
A libc/shared/math/fminimumf.h
A libc/shared/math/fminimumf128.h
A libc/shared/math/fminimumf16.h
A libc/shared/math/fminimuml.h
A libc/shared/math/fminl.h
A libc/shared/math/ilogbbf16.h
A libc/shared/math/llogbbf16.h
A libc/shared/math/sqrtl.h
M libc/src/__support/FPUtil/BasicOperations.h
M libc/src/__support/FPUtil/generic/FMA.h
M libc/src/__support/FPUtil/generic/add_sub.h
M libc/src/__support/math/CMakeLists.txt
A libc/src/__support/math/bf16subl.h
A libc/src/__support/math/ddivf128.h
A libc/src/__support/math/ddivl.h
A libc/src/__support/math/dmulf128.h
A libc/src/__support/math/dmull.h
A libc/src/__support/math/dsqrtf128.h
A libc/src/__support/math/dsubf128.h
A libc/src/__support/math/dsubl.h
A libc/src/__support/math/fabs.h
A libc/src/__support/math/fabsbf16.h
A libc/src/__support/math/fabsf.h
A libc/src/__support/math/fabsf128.h
A libc/src/__support/math/fabsf16.h
A libc/src/__support/math/fabsl.h
M libc/src/__support/math/fdim.h
M libc/src/__support/math/fdimbf16.h
M libc/src/__support/math/fdimf.h
M libc/src/__support/math/fdimf128.h
M libc/src/__support/math/fdimf16.h
M libc/src/__support/math/fdiml.h
A libc/src/__support/math/fdiv.h
A libc/src/__support/math/fdivf128.h
A libc/src/__support/math/fdivl.h
M libc/src/__support/math/fmax.h
M libc/src/__support/math/fmaxbf16.h
M libc/src/__support/math/fmaxf.h
M libc/src/__support/math/fmaxf128.h
M libc/src/__support/math/fmaxf16.h
A libc/src/__support/math/fmaximum.h
A libc/src/__support/math/fmaximum_mag_num.h
A libc/src/__support/math/fmaximum_mag_numbf16.h
A libc/src/__support/math/fmaximum_mag_numf.h
A libc/src/__support/math/fmaximum_num.h
A libc/src/__support/math/fmaximum_numbf16.h
A libc/src/__support/math/fmaximum_numf.h
A libc/src/__support/math/fmaximum_numf128.h
A libc/src/__support/math/fmaximum_numf16.h
A libc/src/__support/math/fmaximum_numl.h
A libc/src/__support/math/fmaximumbf16.h
A libc/src/__support/math/fmaximumf.h
A libc/src/__support/math/fmaximumf128.h
A libc/src/__support/math/fmaximumf16.h
A libc/src/__support/math/fmaximuml.h
M libc/src/__support/math/fmaxl.h
A libc/src/__support/math/fmin.h
A libc/src/__support/math/fminbf16.h
A libc/src/__support/math/fminf.h
A libc/src/__support/math/fminf128.h
A libc/src/__support/math/fminf16.h
A libc/src/__support/math/fminimum.h
A libc/src/__support/math/fminimum_num.h
A libc/src/__support/math/fminimum_numbf16.h
A libc/src/__support/math/fminimum_numf.h
A libc/src/__support/math/fminimum_numf128.h
A libc/src/__support/math/fminimum_numf16.h
A libc/src/__support/math/fminimum_numl.h
A libc/src/__support/math/fminimumbf16.h
A libc/src/__support/math/fminimumf.h
A libc/src/__support/math/fminimumf128.h
A libc/src/__support/math/fminimumf16.h
A libc/src/__support/math/fminimuml.h
A libc/src/__support/math/fminl.h
A libc/src/__support/math/ilogbbf16.h
A libc/src/__support/math/llogbbf16.h
A libc/src/__support/math/sqrtl.h
M libc/src/__support/math_extras.h
M libc/src/__support/memory_size.h
M libc/src/__support/threads/CMakeLists.txt
M libc/src/__support/threads/CndVar.h
M libc/src/__support/threads/fork_callbacks.cpp
M libc/src/__support/threads/linux/barrier.cpp
M libc/src/__support/threads/mutex.h
M libc/src/__support/threads/mutex_common.h
M libc/src/__support/threads/thread.cpp
M libc/src/__support/threads/unix_mutex.h
M libc/src/math/generic/CMakeLists.txt
M libc/src/math/generic/bf16subl.cpp
M libc/src/math/generic/ddivf128.cpp
M libc/src/math/generic/ddivl.cpp
M libc/src/math/generic/dmulf128.cpp
M libc/src/math/generic/dmull.cpp
M libc/src/math/generic/dsqrtf128.cpp
M libc/src/math/generic/dsubf128.cpp
M libc/src/math/generic/dsubl.cpp
M libc/src/math/generic/fabs.cpp
M libc/src/math/generic/fabsbf16.cpp
M libc/src/math/generic/fabsf.cpp
M libc/src/math/generic/fabsf128.cpp
M libc/src/math/generic/fabsf16.cpp
M libc/src/math/generic/fabsl.cpp
M libc/src/math/generic/fdiv.cpp
M libc/src/math/generic/fdivf128.cpp
M libc/src/math/generic/fdivl.cpp
M libc/src/math/generic/fmaximum.cpp
M libc/src/math/generic/fmaximum_mag_num.cpp
M libc/src/math/generic/fmaximum_mag_numbf16.cpp
M libc/src/math/generic/fmaximum_mag_numf.cpp
M libc/src/math/generic/fmaximum_num.cpp
M libc/src/math/generic/fmaximum_numbf16.cpp
M libc/src/math/generic/fmaximum_numf.cpp
M libc/src/math/generic/fmaximum_numf128.cpp
M libc/src/math/generic/fmaximum_numf16.cpp
M libc/src/math/generic/fmaximum_numl.cpp
M libc/src/math/generic/fmaximumbf16.cpp
M libc/src/math/generic/fmaximumf.cpp
M libc/src/math/generic/fmaximumf128.cpp
M libc/src/math/generic/fmaximumf16.cpp
M libc/src/math/generic/fmaximuml.cpp
M libc/src/math/generic/fmin.cpp
M libc/src/math/generic/fminbf16.cpp
M libc/src/math/generic/fminf.cpp
M libc/src/math/generic/fminf128.cpp
M libc/src/math/generic/fminf16.cpp
M libc/src/math/generic/fminimum.cpp
M libc/src/math/generic/fminimum_num.cpp
M libc/src/math/generic/fminimum_numbf16.cpp
M libc/src/math/generic/fminimum_numf.cpp
M libc/src/math/generic/fminimum_numf128.cpp
M libc/src/math/generic/fminimum_numf16.cpp
M libc/src/math/generic/fminimum_numl.cpp
M libc/src/math/generic/fminimumbf16.cpp
M libc/src/math/generic/fminimumf.cpp
M libc/src/math/generic/fminimumf128.cpp
M libc/src/math/generic/fminimumf16.cpp
M libc/src/math/generic/fminimuml.cpp
M libc/src/math/generic/fminl.cpp
M libc/src/math/generic/ilogbbf16.cpp
M libc/src/math/generic/llogbbf16.cpp
M libc/src/math/generic/sqrtl.cpp
M libc/src/pthread/CMakeLists.txt
A libc/src/pthread/pthread_cond_broadcast.cpp
A libc/src/pthread/pthread_cond_broadcast.h
A libc/src/pthread/pthread_cond_clockwait.cpp
A libc/src/pthread/pthread_cond_clockwait.h
A libc/src/pthread/pthread_cond_destroy.cpp
A libc/src/pthread/pthread_cond_destroy.h
A libc/src/pthread/pthread_cond_init.cpp
A libc/src/pthread/pthread_cond_init.h
A libc/src/pthread/pthread_cond_signal.cpp
A libc/src/pthread/pthread_cond_signal.h
A libc/src/pthread/pthread_cond_timedwait.cpp
A libc/src/pthread/pthread_cond_timedwait.h
A libc/src/pthread/pthread_cond_utils.h
A libc/src/pthread/pthread_cond_wait.cpp
A libc/src/pthread/pthread_cond_wait.h
M libc/src/pthread/pthread_mutex_init.cpp
M libc/src/search/lfind.cpp
M libc/src/search/lsearch.cpp
M libc/src/stdlib/atexit.cpp
M libc/src/threads/mtx_init.cpp
M libc/src/wchar/CMakeLists.txt
A libc/src/wchar/wcscoll.cpp
A libc/src/wchar/wcscoll.h
M libc/test/CMakeLists.txt
M libc/test/include/CMakeLists.txt
M libc/test/integration/CMakeLists.txt
M libc/test/integration/src/pthread/CMakeLists.txt
A libc/test/integration/src/pthread/pthread_cond_test.cpp
M libc/test/integration/src/pthread/pthread_mutex_test.cpp
M libc/test/integration/src/threads/mtx_test.cpp
M libc/test/lit.site.cfg.py.in
M libc/test/shared/CMakeLists.txt
M libc/test/shared/shared_math_constexpr_test.cpp
M libc/test/shared/shared_math_test.cpp
M libc/test/src/sys/socket/linux/CMakeLists.txt
M libc/test/src/sys/socket/linux/send_recv_test.cpp
M libc/test/src/sys/socket/linux/sendmsg_recvmsg_test.cpp
M libc/test/src/time/mktime_test.cpp
M libc/test/src/wchar/CMakeLists.txt
A libc/test/src/wchar/wcscoll_test.cpp
A libc/utils/docgen/dlfcn.yaml
A libc/utils/docgen/sys/select.yaml
A libc/utils/docgen/sys/sem.yaml
A libc/utils/docgen/sys/uio.yaml
M libclc/CMakeLists.txt
M libcxx/docs/FeatureTestMacroTable.rst
M libcxx/docs/ReleaseNotes/23.rst
M libcxx/docs/Status/Cxx23Papers.csv
M libcxx/docs/Status/Cxx2cPapers.csv
M libcxx/include/CMakeLists.txt
M libcxx/include/__assert
M libcxx/include/__locale_dir/locale_base_api.h
A libcxx/include/__ranges/stride_view.h
R libcxx/include/__support/xlocale/__nop_locale_mgmt.h
M libcxx/include/__utility/constant_wrapper.h
M libcxx/include/module.modulemap.in
M libcxx/include/ranges
M libcxx/include/span
M libcxx/include/version
M libcxx/modules/std/ranges.inc
M libcxx/test/benchmarks/spec.gen.py
A libcxx/test/libcxx/ranges/range.adaptors/range.stride.view/ctor.assert.pass.cpp
A libcxx/test/libcxx/ranges/range.adaptors/range.stride.view/iterator/dereference.assert.pass.cpp
A libcxx/test/libcxx/ranges/range.adaptors/range.stride.view/iterator/increment.assert.pass.cpp
A libcxx/test/libcxx/ranges/range.adaptors/range.stride.view/iterator/iterator.nodiscard.verify.cpp
A libcxx/test/libcxx/ranges/range.adaptors/range.stride.view/iterator/operator_plus_equal.assert.pass.cpp
A libcxx/test/libcxx/ranges/range.adaptors/range.stride.view/nodiscard.verify.cpp
M libcxx/test/libcxx/utilities/const.wrap.class/nodiscard.verify.cpp
M libcxx/test/std/containers/views/views.span/span.cons/array.pass.cpp
R libcxx/test/std/containers/views/views.span/span.cons/initializer_list.assert.pass.cpp
M libcxx/test/std/containers/views/views.span/span.cons/initializer_list.pass.cpp
R libcxx/test/std/containers/views/views.span/span.cons/initializer_list.verify.cpp
M libcxx/test/std/containers/views/views.span/span.cons/iterator_len.verify.cpp
M libcxx/test/std/language.support/support.limits/support.limits.general/ranges.version.compile.pass.cpp
M libcxx/test/std/language.support/support.limits/support.limits.general/span.version.compile.pass.cpp
M libcxx/test/std/language.support/support.limits/support.limits.general/version.version.compile.pass.cpp
A libcxx/test/std/ranges/range.adaptors/range.stride.view/adaptor.pass.cpp
A libcxx/test/std/ranges/range.adaptors/range.stride.view/base.pass.cpp
A libcxx/test/std/ranges/range.adaptors/range.stride.view/begin.pass.cpp
A libcxx/test/std/ranges/range.adaptors/range.stride.view/borrowing.compile.pass.cpp
A libcxx/test/std/ranges/range.adaptors/range.stride.view/concept.compile.pass.cpp
A libcxx/test/std/ranges/range.adaptors/range.stride.view/ctad.pass.cpp
A libcxx/test/std/ranges/range.adaptors/range.stride.view/ctor.pass.cpp
A libcxx/test/std/ranges/range.adaptors/range.stride.view/end.pass.cpp
A libcxx/test/std/ranges/range.adaptors/range.stride.view/iterator/base.pass.cpp
A libcxx/test/std/ranges/range.adaptors/range.stride.view/iterator/compare.pass.cpp
A libcxx/test/std/ranges/range.adaptors/range.stride.view/iterator/ctor.copy.pass.cpp
A libcxx/test/std/ranges/range.adaptors/range.stride.view/iterator/ctor.default.pass.cpp
A libcxx/test/std/ranges/range.adaptors/range.stride.view/iterator/decrement.pass.cpp
A libcxx/test/std/ranges/range.adaptors/range.stride.view/iterator/dereference.pass.cpp
A libcxx/test/std/ranges/range.adaptors/range.stride.view/iterator/equal.pass.cpp
A libcxx/test/std/ranges/range.adaptors/range.stride.view/iterator/increment.pass.cpp
A libcxx/test/std/ranges/range.adaptors/range.stride.view/iterator/iter_move.pass.cpp
A libcxx/test/std/ranges/range.adaptors/range.stride.view/iterator/iter_swap.pass.cpp
A libcxx/test/std/ranges/range.adaptors/range.stride.view/iterator/minus.pass.cpp
A libcxx/test/std/ranges/range.adaptors/range.stride.view/iterator/minus_equal.pass.cpp
A libcxx/test/std/ranges/range.adaptors/range.stride.view/iterator/plus.pass.cpp
A libcxx/test/std/ranges/range.adaptors/range.stride.view/iterator/plus_equal.pass.cpp
A libcxx/test/std/ranges/range.adaptors/range.stride.view/iterator/subscript.pass.cpp
A libcxx/test/std/ranges/range.adaptors/range.stride.view/iterator/types.compile.pass.cpp
A libcxx/test/std/ranges/range.adaptors/range.stride.view/size.pass.cpp
A libcxx/test/std/ranges/range.adaptors/range.stride.view/stride.pass.cpp
A libcxx/test/std/ranges/range.adaptors/range.stride.view/types.h
M libcxx/test/std/utilities/const.wrap.class/call.pass.cpp
M libcxx/test/std/utilities/const.wrap.class/subscript.pass.cpp
M libcxx/utils/ci/docker/docker-compose.yml
M libcxx/utils/ci/docker/linux-builder-base.dockerfile
M libcxx/utils/ci/images/libcxx_next_runners.txt
M libcxx/utils/ci/lnt/run-benchbot
M libcxx/utils/ci/lnt/run-benchmarks
M libcxx/utils/ci/run-buildbot
M libcxx/utils/generate_feature_test_macro_components.py
A libcxx/utils/run-spec-benchmark
M libcxxabi/src/cxa_personality.cpp
M libsycl/src/detail/device_binary_structures.hpp
M libsycl/src/detail/device_image_wrapper.cpp
M libsycl/src/detail/device_image_wrapper.hpp
M libsycl/src/detail/program_manager.cpp
M libsycl/src/detail/program_manager.hpp
M libunwind/src/AddressSpace.hpp
M libunwind/src/DwarfParser.hpp
M lld/test/ELF/fill-trap-ppc.s
M lld/test/ELF/fill-trap.s
M lldb/docs/resources/lldbgdbremote.md
M lldb/docs/use/aarch64-linux.md
M lldb/docs/use/tutorials/writing-custom-commands.md
M lldb/examples/python/armv7_cortex_m_target_defintion.py
M lldb/examples/python/bsd.py
M lldb/examples/python/cmdtemplate.py
M lldb/examples/python/delta.py
M lldb/examples/python/disasm-stress-test.py
M lldb/examples/python/disasm.py
M lldb/examples/python/file_extract.py
M lldb/examples/python/gdbremote.py
M lldb/examples/python/globals.py
M lldb/examples/python/in_call_stack.py
M lldb/examples/python/lldb_module_utils.py
M lldb/examples/python/lldbtk.py
M lldb/examples/python/mach_o.py
M lldb/examples/python/memory.py
M lldb/examples/python/operating_system.py
M lldb/examples/python/performance.py
M lldb/examples/python/process_events.py
M lldb/examples/python/sbvalue.py
M lldb/examples/python/shadow.py
M lldb/examples/python/sources.py
M lldb/examples/python/stacks.py
M lldb/examples/python/symbolication.py
M lldb/examples/python/types.py
M lldb/examples/python/x86_64_linux_target_definition.py
M lldb/examples/python/x86_64_qemu_target_definition.py
M lldb/examples/python/x86_64_target_definition.py
M lldb/include/lldb/API/SBExpressionOptions.h
M lldb/include/lldb/Breakpoint/BreakpointIDList.h
M lldb/include/lldb/Host/windows/ConnectionConPTYWindows.h
M lldb/include/lldb/Host/windows/PseudoConsole.h
A lldb/include/lldb/Interpreter/Interfaces/ScriptedHookInterface.h
M lldb/include/lldb/Interpreter/ScriptInterpreter.h
M lldb/include/lldb/Target/ABI.h
M lldb/include/lldb/Target/MemoryRegionInfo.h
M lldb/include/lldb/Target/Process.h
M lldb/include/lldb/Target/Target.h
M lldb/include/lldb/Target/Thread.h
M lldb/include/lldb/Utility/StringExtractorGDBRemote.h
M lldb/include/lldb/lldb-forward.h
M lldb/packages/Python/lldbsuite/test/tools/lldb-dap/dap_server.py
M lldb/packages/Python/lldbsuite/test/tools/lldb-server/gdbremote_testcase.py
M lldb/scripts/analyze-project-deps.py
M lldb/scripts/verify_api.py
M lldb/source/API/SBCommandInterpreter.cpp
M lldb/source/API/SBExpressionOptions.cpp
M lldb/source/Breakpoint/BreakpointIDList.cpp
M lldb/source/Commands/CommandObjectBreakpoint.cpp
M lldb/source/Commands/CommandObjectBreakpoint.h
M lldb/source/Commands/CommandObjectBreakpointCommand.cpp
M lldb/source/Commands/CommandObjectCommands.cpp
M lldb/source/Commands/CommandObjectDisassemble.cpp
M lldb/source/Commands/CommandObjectExpression.cpp
M lldb/source/Commands/CommandObjectFrame.cpp
M lldb/source/Commands/CommandObjectLog.cpp
M lldb/source/Commands/CommandObjectMemory.cpp
M lldb/source/Commands/CommandObjectMemoryTag.cpp
M lldb/source/Commands/CommandObjectMultiword.cpp
M lldb/source/Commands/CommandObjectProcess.cpp
M lldb/source/Commands/CommandObjectRegister.cpp
M lldb/source/Commands/CommandObjectSource.cpp
M lldb/source/Commands/CommandObjectTarget.cpp
M lldb/source/Commands/CommandObjectThread.cpp
M lldb/source/Commands/CommandObjectType.cpp
M lldb/source/Commands/CommandObjectWatchpoint.cpp
M lldb/source/Commands/CommandObjectWatchpointCommand.cpp
M lldb/source/Commands/CommandOptionArgumentTable.cpp
M lldb/source/Commands/Options.td
M lldb/source/Expression/IRMemoryMap.cpp
M lldb/source/Host/windows/ConnectionConPTYWindows.cpp
M lldb/source/Host/windows/PseudoConsole.cpp
M lldb/source/Interpreter/CommandInterpreter.cpp
M lldb/source/Plugins/ABI/AArch64/ABISysV_arm64.cpp
M lldb/source/Plugins/ABI/AArch64/ABISysV_arm64.h
M lldb/source/Plugins/Disassembler/LLVMC/DisassemblerLLVMC.cpp
M lldb/source/Plugins/DynamicLoader/MacOSX-DYLD/DynamicLoaderMacOS.cpp
M lldb/source/Plugins/DynamicLoader/MacOSX-DYLD/DynamicLoaderMacOS.h
M lldb/source/Plugins/Instruction/MIPS/EmulateInstructionMIPS.cpp
M lldb/source/Plugins/Instruction/MIPS64/EmulateInstructionMIPS64.cpp
M lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.h
M lldb/source/Plugins/Process/Utility/LinuxProcMaps.cpp
M lldb/source/Plugins/Process/Utility/RegisterFlagsDetector_arm64.cpp
M lldb/source/Plugins/Process/Utility/RegisterFlagsDetector_arm64.h
M lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_arm64.cpp
M lldb/source/Plugins/Process/Windows/Common/ProcessWindows.cpp
M lldb/source/Plugins/Process/elf-core/RegisterContextPOSIXCore_arm64.cpp
M lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationClient.cpp
M lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationServerLLGS.cpp
M lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationServerLLGS.h
M lldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.cpp
M lldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.h
M lldb/source/Plugins/Process/gdb-remote/ThreadGDBRemote.cpp
M lldb/source/Plugins/Process/gdb-remote/ThreadGDBRemote.h
M lldb/source/Plugins/ScriptInterpreter/Python/CMakeLists.txt
M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptInterpreterPythonInterfaces.cpp
M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptInterpreterPythonInterfaces.h
A lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedHookPythonInterface.cpp
A lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedHookPythonInterface.h
M lldb/source/Plugins/ScriptInterpreter/Python/ScriptInterpreterPython.cpp
M lldb/source/Plugins/ScriptInterpreter/Python/ScriptInterpreterPythonImpl.h
M lldb/source/Target/MemoryRegionInfo.cpp
M lldb/source/Target/Process.cpp
M lldb/source/Target/StopInfo.cpp
M lldb/source/Target/Target.cpp
M lldb/source/Target/Thread.cpp
M lldb/source/Target/ThreadPlanCallFunction.cpp
M lldb/source/Utility/StringExtractorGDBRemote.cpp
M lldb/test/API/commands/breakpoint/command/list/TestBreakpointCommandList.py
A lldb/test/API/commands/breakpoint/location-dot/Makefile
A lldb/test/API/commands/breakpoint/location-dot/TestBreakpointLocationDot.py
A lldb/test/API/commands/breakpoint/location-dot/main.c
M lldb/test/API/commands/command/container/TestContainerCommands.py
M lldb/test/API/commands/command/delete/TestCommandDelete.py
M lldb/test/API/commands/command/invalid-args/TestInvalidArgsCommand.py
M lldb/test/API/commands/expression/dont_allow_jit/TestAllowJIT.py
A lldb/test/API/commands/expression/expr-with-fork/Makefile
A lldb/test/API/commands/expression/expr-with-fork/TestExprWithFork.py
A lldb/test/API/commands/expression/expr-with-fork/main.cpp
M lldb/test/API/commands/expression/ptrauth/TestPtrAuthExpressions.py
M lldb/test/API/commands/frame/recognizer/TestFrameRecognizer.py
A lldb/test/API/commands/frame/var/repeat/Makefile
A lldb/test/API/commands/frame/var/repeat/TestFrameVarRepeat.py
A lldb/test/API/commands/frame/var/repeat/main.cpp
M lldb/test/API/commands/log/invalid-args/TestInvalidArgsLog.py
M lldb/test/API/commands/process/signal/TestProcessSignal.py
M lldb/test/API/commands/register/register_command/TestRegisters.py
A lldb/test/API/commands/target/module-hook/delete/TestTargetModuleHookDelete.py
A lldb/test/API/commands/target/module-hook/disable/TestTargetModuleHookDisable.py
A lldb/test/API/commands/target/module-hook/enable/TestTargetModuleHookEnable.py
M lldb/test/API/commands/target/modules/search-paths/insert/TestTargetModulesSearchpathsInsert.py
M lldb/test/API/commands/target/stop-hook/delete/TestTargetStopHookDelete.py
M lldb/test/API/commands/target/stop-hook/disable/TestTargetStopHookDisable.py
M lldb/test/API/commands/target/stop-hook/enable/TestTargetStopHookEnable.py
M lldb/test/API/commands/thread/backtrace/TestThreadBacktraceRepeat.py
M lldb/test/API/commands/thread/select/TestThreadSelect.py
M lldb/test/API/dotest.py
M lldb/test/API/functionalities/breakpoint/breakpoint_command/TestBreakpointCommand.py
M lldb/test/API/functionalities/breakpoint/same_cu_name/Makefile
R lldb/test/API/functionalities/dead-strip/cmds.txt
M lldb/test/API/functionalities/gdb_remote_client/TestGDBServerTargetXML.py
M lldb/test/API/functionalities/inline-sourcefile/Makefile
R lldb/test/API/functionalities/load_unload/cmds.txt
A lldb/test/API/functionalities/multi-breakpoint/Makefile
A lldb/test/API/functionalities/multi-breakpoint/TestMultiBreakpoint.py
A lldb/test/API/functionalities/multi-breakpoint/main.c
M lldb/test/API/functionalities/plugins/python_os_plugin/operating_system2.py
M lldb/test/API/functionalities/plugins/python_os_plugin/os_plugin_in_dsym/operating_system.py
M lldb/test/API/functionalities/plugins/python_os_plugin/stepping_plugin_threads/operating_system.py
M lldb/test/API/functionalities/valobj_errors/Makefile
M lldb/test/API/functionalities/wrong_commands/TestWrongCommands.py
M lldb/test/API/iohandler/unicode/TestUnicode.py
R lldb/test/API/lang/c/array_types/cmds.txt
R lldb/test/API/lang/c/global_variables/cmds.txt
R lldb/test/API/lang/cpp/class_types/cmds.txt
R lldb/test/API/lang/cpp/namespace/cmds.txt
R lldb/test/API/lang/cpp/stl/cmds.txt
M lldb/test/API/lang/objc/modules-auto-import/TestModulesAutoImport.py
M lldb/test/API/lang/objc/modules-auto-import/main.m
M lldb/test/API/linux/aarch64/permission_overlay/TestAArch64LinuxPOE.py
M lldb/test/API/linux/aarch64/permission_overlay/main.c
M lldb/test/API/macosx/arm-pointer-metadata-cfa-dwarf-expr/Makefile
M lldb/test/API/macosx/dsym_codesign/TestdSYMCodesign.py
R lldb/test/API/macosx/order/cmds.txt
M lldb/test/API/python_api/interpreter/TestCommandInterpreterAPI.py
M lldb/test/API/test_runner/test/inferior.py
M lldb/test/API/test_runner/test/test_process_control.py
M lldb/test/API/windows/conpty/TestConPTY.py
A lldb/test/Shell/Commands/command-module-hook-fire.test
A lldb/test/Shell/Commands/command-module-hook.test
M lldb/test/Shell/Commands/list-header.test
A lldb/test/Shell/ExecControl/StopHook/Inputs/stop-hook-unified-1.lldbinit
A lldb/test/Shell/ExecControl/StopHook/stop-hook-unified.test
M lldb/test/Shell/Minidump/disassemble-no-module.yaml
M lldb/test/Shell/Quit/expect_exit_code.py
M lldb/test/Shell/Register/Core/Inputs/strip-coredump.py
M lldb/test/Shell/ScriptInterpreter/Python/Crashlog/patch-crashlog.py
M lldb/test/Shell/helper/build.py
M lldb/tools/debugserver/source/DNB.cpp
M lldb/tools/debugserver/source/DNB.h
M lldb/tools/debugserver/source/JSON.h
M lldb/tools/debugserver/source/JSONGenerator.h
M lldb/tools/debugserver/source/MacOSX/MachProcess.mm
M lldb/tools/debugserver/source/MacOSX/arm64/DNBArchImplARM64.cpp
M lldb/tools/debugserver/source/RNBRemote.cpp
M lldb/tools/debugserver/source/RNBRemote.h
M lldb/tools/lldb-dap/DAP.cpp
M lldb/tools/lldb-dap/DAP.h
M lldb/tools/lldb-dap/DAPSessionManager.cpp
M lldb/tools/lldb-dap/EventHelper.cpp
M lldb/tools/lldb-dap/Handler/RequestHandler.cpp
M lldb/unittests/Expression/IRMemoryMapTest.cpp
M lldb/unittests/Host/MainLoopTest.cpp
M lldb/unittests/Host/SocketTest.cpp
M lldb/unittests/Platform/Android/AdbClientTest.cpp
M lldb/unittests/Platform/Android/CMakeLists.txt
M lldb/unittests/Process/Utility/LinuxProcMapsTest.cpp
M lldb/unittests/Process/gdb-remote/GDBRemoteCommunicationClientTest.cpp
M lldb/unittests/TestingSupport/Host/SocketTestUtilities.cpp
M lldb/unittests/TestingSupport/Host/SocketTestUtilities.h
M lldb/unittests/debugserver/CMakeLists.txt
M lldb/unittests/debugserver/RNBSocketTest.cpp
M lldb/unittests/tools/lldb-server/tests/TestBase.h
M lldb/utils/lui/lui.py
M lldb/utils/lui/sandbox.py
M llvm/docs/AMDGPUUsage.rst
M llvm/docs/InstrRefDebugInfo.md
M llvm/docs/KeyInstructionsDebugInfo.md
M llvm/docs/LFI.rst
M llvm/docs/LangRef.rst
M llvm/docs/ReleaseNotes.md
M llvm/docs/RemoveDIsDebugInfo.md
M llvm/docs/SandboxIR.md
A llvm/include/llvm/ABI/TargetInfo.h
M llvm/include/llvm/ABI/Types.h
M llvm/include/llvm/ADT/APFloat.h
M llvm/include/llvm/ADT/DenseMap.h
M llvm/include/llvm/ADT/FoldingSet.h
M llvm/include/llvm/ADT/STLExtras.h
M llvm/include/llvm/ADT/StableHashing.h
M llvm/include/llvm/Analysis/LoopInfo.h
M llvm/include/llvm/Analysis/VecFuncs.def
M llvm/include/llvm/AsmParser/LLLexer.h
M llvm/include/llvm/AsmParser/LLToken.h
M llvm/include/llvm/BinaryFormat/Dwarf.h
M llvm/include/llvm/CodeGen/AsmPrinter.h
M llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h
M llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h
M llvm/include/llvm/CodeGen/GlobalISel/Utils.h
A llvm/include/llvm/CodeGen/KCFI.h
A llvm/include/llvm/CodeGen/MachineIDFSSAUpdater.h
M llvm/include/llvm/CodeGen/TargetInstrInfo.h
M llvm/include/llvm/CodeGen/ValueTypes.td
M llvm/include/llvm/CodeGenTypes/LowLevelType.h
M llvm/include/llvm/DWARFLinker/AddressesMap.h
M llvm/include/llvm/DWARFLinker/Classic/DWARFLinker.h
M llvm/include/llvm/DWARFLinker/Classic/DWARFStreamer.h
M llvm/include/llvm/ExecutionEngine/Orc/WaitingOnGraph.h
M llvm/include/llvm/Frontend/Offloading/Utility.h
M llvm/include/llvm/Frontend/OpenMP/OMPIRBuilder.h
M llvm/include/llvm/IR/DIBuilder.h
M llvm/include/llvm/IR/DebugInfoMetadata.h
M llvm/include/llvm/IR/IRBuilder.h
M llvm/include/llvm/IR/IntrinsicsAArch64.td
M llvm/include/llvm/IR/IntrinsicsDirectX.td
M llvm/include/llvm/IR/IntrinsicsSPIRV.td
M llvm/include/llvm/IR/RuntimeLibcalls.td
M llvm/include/llvm/InitializePasses.h
M llvm/include/llvm/MC/MCAsmInfo.h
M llvm/include/llvm/MC/MCAsmInfoCOFF.h
M llvm/include/llvm/MC/MCAsmInfoDarwin.h
M llvm/include/llvm/MC/MCAsmInfoELF.h
M llvm/include/llvm/MC/MCAsmInfoGOFF.h
M llvm/include/llvm/MC/MCAsmInfoWasm.h
M llvm/include/llvm/MC/MCAsmInfoXCOFF.h
M llvm/include/llvm/MC/MCContext.h
M llvm/include/llvm/MC/MCELFObjectWriter.h
M llvm/include/llvm/MC/MCInstrDesc.h
M llvm/include/llvm/MC/MCLFIRewriter.h
M llvm/include/llvm/MC/MCParser/MCTargetAsmParser.h
M llvm/include/llvm/MC/MCSection.h
M llvm/include/llvm/MC/MCSymbol.h
M llvm/include/llvm/MC/TargetRegistry.h
M llvm/include/llvm/Object/OffloadBinary.h
M llvm/include/llvm/Passes/CodeGenPassBuilder.h
M llvm/include/llvm/Passes/MachinePassRegistry.def
M llvm/include/llvm/SandboxIR/Instruction.h
M llvm/include/llvm/Support/IOSandbox.h
M llvm/include/llvm/Support/KnownBits.h
M llvm/include/llvm/Support/Path.h
M llvm/include/llvm/Target/GlobalISel/Combine.td
M llvm/include/llvm/Target/TargetMachine.h
M llvm/include/llvm/Transforms/IPO/Attributor.h
M llvm/include/llvm/Transforms/Utils/CodeExtractor.h
M llvm/include/llvm/Transforms/Utils/LowerVectorIntrinsics.h
M llvm/include/llvm/Transforms/Utils/UnrollLoop.h
M llvm/lib/ABI/CMakeLists.txt
A llvm/lib/ABI/TargetInfo.cpp
A llvm/lib/ABI/Targets/BPF.cpp
M llvm/lib/ABI/Types.cpp
M llvm/lib/Analysis/AliasAnalysisEvaluator.cpp
M llvm/lib/Analysis/ConstantFolding.cpp
M llvm/lib/Analysis/LoopInfo.cpp
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/lib/AsmParser/LLLexer.cpp
M llvm/lib/AsmParser/LLParser.cpp
M llvm/lib/Bitcode/Reader/MetadataLoader.cpp
M llvm/lib/Bitcode/Writer/BitcodeWriter.cpp
M llvm/lib/CAS/MappedFileRegionArena.cpp
M llvm/lib/CAS/OnDiskCommon.cpp
M llvm/lib/CodeGen/AsmPrinter/ARMException.cpp
M llvm/lib/CodeGen/AsmPrinter/AddressPool.cpp
M llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
M llvm/lib/CodeGen/AsmPrinter/AsmPrinterDwarf.cpp
M llvm/lib/CodeGen/AsmPrinter/AsmPrinterInlineAsm.cpp
M llvm/lib/CodeGen/AsmPrinter/CodeViewDebug.cpp
M llvm/lib/CodeGen/AsmPrinter/DIE.cpp
M llvm/lib/CodeGen/AsmPrinter/DwarfCFIException.cpp
M llvm/lib/CodeGen/AsmPrinter/DwarfCompileUnit.cpp
M llvm/lib/CodeGen/AsmPrinter/DwarfCompileUnit.h
M llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp
M llvm/lib/CodeGen/AsmPrinter/DwarfExpression.cpp
M llvm/lib/CodeGen/AsmPrinter/DwarfUnit.cpp
M llvm/lib/CodeGen/AsmPrinter/EHStreamer.cpp
M llvm/lib/CodeGen/AsmPrinter/WinException.cpp
M llvm/lib/CodeGen/CMakeLists.txt
M llvm/lib/CodeGen/CodeGenTargetMachineImpl.cpp
M llvm/lib/CodeGen/ExpandVectorPredication.cpp
M llvm/lib/CodeGen/GlobalISel/CSEMIRBuilder.cpp
M llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
M llvm/lib/CodeGen/GlobalISel/GISelValueTracking.cpp
M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
M llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp
M llvm/lib/CodeGen/GlobalISel/Utils.cpp
M llvm/lib/CodeGen/InlineSpiller.cpp
M llvm/lib/CodeGen/KCFI.cpp
M llvm/lib/CodeGen/LiveDebugValues/VarLocBasedImpl.cpp
M llvm/lib/CodeGen/MIRParser/MILexer.cpp
M llvm/lib/CodeGen/MachineCopyPropagation.cpp
A llvm/lib/CodeGen/MachineIDFSSAUpdater.cpp
M llvm/lib/CodeGen/MachineVerifier.cpp
M llvm/lib/CodeGen/PreISelIntrinsicLowering.cpp
M llvm/lib/CodeGen/Rematerializer.cpp
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/lib/CodeGen/ShrinkWrap.cpp
M llvm/lib/CodeGen/TargetFrameLoweringImpl.cpp
M llvm/lib/CodeGen/TargetInstrInfo.cpp
M llvm/lib/CodeGen/TargetLoweringBase.cpp
M llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp
M llvm/lib/CodeGen/TargetPassConfig.cpp
M llvm/lib/CodeGen/WindowScheduler.cpp
M llvm/lib/DWARFCFIChecker/DWARFCFIAnalysis.cpp
M llvm/lib/DWARFLinker/Classic/DWARFLinker.cpp
M llvm/lib/DWARFLinker/Classic/DWARFLinkerCompileUnit.cpp
M llvm/lib/DWARFLinker/Classic/DWARFStreamer.cpp
M llvm/lib/DWARFLinker/Parallel/DWARFEmitterImpl.cpp
M llvm/lib/DWARFLinker/Parallel/DebugLineSectionEmitter.h
M llvm/lib/DebugInfo/LogicalView/Readers/LVBinaryReader.cpp
M llvm/lib/ExecutionEngine/Interpreter/Execution.cpp
M llvm/lib/ExecutionEngine/Orc/TargetProcess/JITLoaderPerf.cpp
M llvm/lib/ExecutionEngine/RuntimeDyld/RuntimeDyldChecker.cpp
M llvm/lib/Frontend/Offloading/OffloadWrapper.cpp
M llvm/lib/Frontend/Offloading/Utility.cpp
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
M llvm/lib/IR/AsmWriter.cpp
M llvm/lib/IR/DIBuilder.cpp
M llvm/lib/IR/DebugInfoMetadata.cpp
M llvm/lib/IR/LLVMContextImpl.h
M llvm/lib/IR/ModuleSummaryIndex.cpp
M llvm/lib/MC/ELFObjectWriter.cpp
M llvm/lib/MC/MCAsmInfo.cpp
M llvm/lib/MC/MCAsmInfoCOFF.cpp
M llvm/lib/MC/MCAsmInfoDarwin.cpp
M llvm/lib/MC/MCAsmInfoELF.cpp
M llvm/lib/MC/MCAsmInfoGOFF.cpp
M llvm/lib/MC/MCAsmInfoWasm.cpp
M llvm/lib/MC/MCAsmInfoXCOFF.cpp
M llvm/lib/MC/MCAsmStreamer.cpp
M llvm/lib/MC/MCAssembler.cpp
M llvm/lib/MC/MCContext.cpp
M llvm/lib/MC/MCDisassembler/Disassembler.cpp
M llvm/lib/MC/MCDwarf.cpp
M llvm/lib/MC/MCELFStreamer.cpp
M llvm/lib/MC/MCExpr.cpp
M llvm/lib/MC/MCInst.cpp
M llvm/lib/MC/MCInstrDesc.cpp
M llvm/lib/MC/MCLFIRewriter.cpp
M llvm/lib/MC/MCObjectFileInfo.cpp
M llvm/lib/MC/MCObjectStreamer.cpp
M llvm/lib/MC/MCParser/AsmParser.cpp
M llvm/lib/MC/MCParser/ELFAsmParser.cpp
M llvm/lib/MC/MCParser/MCAsmParser.cpp
M llvm/lib/MC/MCParser/MCTargetAsmParser.cpp
M llvm/lib/MC/MCParser/MasmParser.cpp
M llvm/lib/MC/MCSFrame.cpp
M llvm/lib/MC/MCSection.cpp
M llvm/lib/MC/MCStreamer.cpp
M llvm/lib/MC/MCWinCOFFStreamer.cpp
M llvm/lib/Object/ModuleSymbolTable.cpp
M llvm/lib/Object/OffloadBinary.cpp
M llvm/lib/Passes/PassBuilder.cpp
M llvm/lib/Support/APFloat.cpp
M llvm/lib/Support/FoldingSet.cpp
M llvm/lib/Support/Hash.cpp
M llvm/lib/Support/KnownBits.cpp
M llvm/lib/Support/ProgramStack.cpp
M llvm/lib/Support/Signals.cpp
M llvm/lib/Support/Unix/Path.inc
M llvm/lib/Target/AArch64/AArch64.h
M llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
M llvm/lib/Target/AArch64/AArch64Features.td
M llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
M llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64InstrFormats.td
M llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.h
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp
M llvm/lib/Target/AArch64/AArch64MachineFunctionInfo.cpp
M llvm/lib/Target/AArch64/AArch64PassRegistry.def
M llvm/lib/Target/AArch64/AArch64SIMDInstrOpt.cpp
M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
M llvm/lib/Target/AArch64/AArch64StackTaggingPreRA.cpp
M llvm/lib/Target/AArch64/AArch64Subtarget.h
M llvm/lib/Target/AArch64/AArch64SystemOperands.td
M llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
M llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64ELFStreamer.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCAsmInfo.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCAsmInfo.h
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCLFIRewriter.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCLFIRewriter.h
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCTargetDesc.cpp
M llvm/lib/Target/AArch64/SVEInstrFormats.td
M llvm/lib/Target/AArch64/Utils/AArch64BaseInfo.cpp
M llvm/lib/Target/AArch64/Utils/AArch64BaseInfo.h
M llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
M llvm/lib/Target/AMDGPU/AMDGPUCoExecSchedStrategy.cpp
M llvm/lib/Target/AMDGPU/AMDGPUMCInstLower.cpp
M llvm/lib/Target/AMDGPU/AMDGPUMCResourceInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPUMIRFormatter.cpp
M llvm/lib/Target/AMDGPU/AMDGPUMIRFormatter.h
M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
M llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUAsmBackend.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCAsmInfo.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCExpr.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.h
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
M llvm/lib/Target/AMDGPU/SILowerI1Copies.cpp
M llvm/lib/Target/AMDGPU/SIWholeQuadMode.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDKernelCodeTUtils.cpp
M llvm/lib/Target/AMDGPU/VOP2Instructions.td
M llvm/lib/Target/AMDGPU/VOPDInstructions.td
M llvm/lib/Target/ARC/ARCInstrInfo.cpp
M llvm/lib/Target/ARC/MCTargetDesc/ARCMCAsmInfo.cpp
M llvm/lib/Target/ARC/MCTargetDesc/ARCMCAsmInfo.h
M llvm/lib/Target/ARC/MCTargetDesc/ARCMCTargetDesc.cpp
M llvm/lib/Target/ARM/ARMAsmPrinter.cpp
M llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
M llvm/lib/Target/ARM/ARMBaseInstrInfo.h
M llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp
M llvm/lib/Target/ARM/ARMFrameLowering.cpp
M llvm/lib/Target/ARM/ARMISelLowering.cpp
M llvm/lib/Target/ARM/ARMISelLowering.h
M llvm/lib/Target/ARM/ARMInstrThumb2.td
M llvm/lib/Target/ARM/ARMSubtarget.cpp
M llvm/lib/Target/ARM/ARMTargetMachine.cpp
M llvm/lib/Target/ARM/ARMTargetObjectFile.cpp
M llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
M llvm/lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp
M llvm/lib/Target/ARM/MCTargetDesc/ARMMCAsmInfo.cpp
M llvm/lib/Target/ARM/MCTargetDesc/ARMMCAsmInfo.h
M llvm/lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.cpp
M llvm/lib/Target/ARM/MCTargetDesc/ARMTargetStreamer.cpp
M llvm/lib/Target/ARM/Thumb2SizeReduction.cpp
M llvm/lib/Target/AVR/AVRAsmPrinter.cpp
M llvm/lib/Target/AVR/AVRISelLowering.cpp
M llvm/lib/Target/AVR/AVRInstrInfo.cpp
M llvm/lib/Target/AVR/AVRInstrInfo.td
M llvm/lib/Target/AVR/AsmParser/AVRAsmParser.cpp
M llvm/lib/Target/AVR/MCTargetDesc/AVRMCAsmInfo.cpp
M llvm/lib/Target/BPF/AsmParser/BPFAsmParser.cpp
M llvm/lib/Target/BPF/BPFAsmPrinter.cpp
M llvm/lib/Target/BPF/Disassembler/BPFDisassembler.cpp
M llvm/lib/Target/BPF/MCTargetDesc/BPFMCAsmInfo.h
M llvm/lib/Target/CSKY/AsmParser/CSKYAsmParser.cpp
M llvm/lib/Target/CSKY/CSKYAsmPrinter.cpp
M llvm/lib/Target/CSKY/CSKYInstrInfo.cpp
M llvm/lib/Target/CSKY/MCTargetDesc/CSKYMCAsmInfo.cpp
M llvm/lib/Target/CSKY/MCTargetDesc/CSKYMCAsmInfo.h
M llvm/lib/Target/CSKY/MCTargetDesc/CSKYMCTargetDesc.cpp
M llvm/lib/Target/DirectX/CMakeLists.txt
M llvm/lib/Target/DirectX/DXILLegalizePass.cpp
M llvm/lib/Target/DirectX/DXILOpBuilder.cpp
M llvm/lib/Target/DirectX/DXILOpLowering.cpp
M llvm/lib/Target/DirectX/DXILPrepare.cpp
M llvm/lib/Target/DirectX/DXILWriter/CMakeLists.txt
M llvm/lib/Target/DirectX/DXILWriter/DXILBitcodeWriter.cpp
M llvm/lib/Target/DirectX/DXILWriter/DXILBitcodeWriter.h
M llvm/lib/Target/DirectX/DXILWriter/DXILValueEnumerator.cpp
M llvm/lib/Target/DirectX/DXILWriter/DXILValueEnumerator.h
M llvm/lib/Target/DirectX/DXILWriter/DXILWriterPass.cpp
M llvm/lib/Target/DirectX/DirectXIRPasses/CMakeLists.txt
A llvm/lib/Target/DirectX/DirectXIRPasses/DXILDebugInfo.cpp
A llvm/lib/Target/DirectX/DirectXIRPasses/DXILDebugInfo.h
M llvm/lib/Target/DirectX/DirectXIRPasses/PointerTypeAnalysis.cpp
M llvm/lib/Target/DirectX/MCTargetDesc/DirectXMCTargetDesc.cpp
M llvm/lib/Target/Hexagon/AsmParser/HexagonAsmParser.cpp
M llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
M llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCAsmInfo.cpp
M llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCAsmInfo.h
M llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCTargetDesc.cpp
M llvm/lib/Target/Lanai/AsmParser/LanaiAsmParser.cpp
M llvm/lib/Target/Lanai/LanaiAsmPrinter.cpp
M llvm/lib/Target/Lanai/LanaiMCInstLower.cpp
M llvm/lib/Target/Lanai/MCTargetDesc/LanaiMCAsmInfo.cpp
M llvm/lib/Target/LoongArch/AsmParser/LoongArchAsmParser.cpp
M llvm/lib/Target/LoongArch/LoongArchAsmPrinter.cpp
M llvm/lib/Target/LoongArch/LoongArchISelDAGToDAG.cpp
M llvm/lib/Target/LoongArch/LoongArchISelDAGToDAG.h
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/lib/Target/LoongArch/LoongArchISelLowering.h
M llvm/lib/Target/LoongArch/LoongArchInstrInfo.cpp
M llvm/lib/Target/LoongArch/LoongArchInstrInfo.h
M llvm/lib/Target/LoongArch/LoongArchInstrInfo.td
M llvm/lib/Target/LoongArch/LoongArchLASXInstrInfo.td
M llvm/lib/Target/LoongArch/LoongArchLSXInstrInfo.td
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchAsmBackend.cpp
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchMCAsmInfo.cpp
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchMCAsmInfo.h
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchMCTargetDesc.cpp
M llvm/lib/Target/M68k/AsmParser/M68kAsmParser.cpp
M llvm/lib/Target/M68k/M68kMCInstLower.cpp
M llvm/lib/Target/M68k/MCTargetDesc/M68kMCAsmInfo.cpp
M llvm/lib/Target/M68k/MCTargetDesc/M68kMCAsmInfo.h
M llvm/lib/Target/M68k/MCTargetDesc/M68kMCTargetDesc.cpp
M llvm/lib/Target/MSP430/AsmParser/MSP430AsmParser.cpp
M llvm/lib/Target/MSP430/MCTargetDesc/MSP430MCAsmInfo.cpp
M llvm/lib/Target/MSP430/MCTargetDesc/MSP430MCAsmInfo.h
M llvm/lib/Target/MSP430/MCTargetDesc/MSP430MCTargetDesc.cpp
M llvm/lib/Target/MSP430/MSP430InstrInfo.cpp
M llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsMCAsmInfo.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsMCAsmInfo.h
M llvm/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp
M llvm/lib/Target/Mips/MipsBranchExpansion.cpp
M llvm/lib/Target/Mips/MipsInstrInfo.cpp
M llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXInstPrinter.cpp
M llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXInstPrinter.h
M llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXMCAsmInfo.cpp
M llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXTargetStreamer.cpp
M llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
M llvm/lib/Target/NVPTX/NVPTXISelLowering.h
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.cpp
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.h
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
M llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCAsmInfo.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCAsmInfo.h
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCCodeEmitter.h
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp
M llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
M llvm/lib/Target/PowerPC/PPCISelLowering.cpp
M llvm/lib/Target/PowerPC/PPCISelLowering.h
M llvm/lib/Target/PowerPC/PPCInstr64Bit.td
M llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
M llvm/lib/Target/PowerPC/PPCInstrInfo.td
M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
M llvm/lib/Target/RISCV/CMakeLists.txt
A llvm/lib/Target/RISCV/GISel/RISCVInlineAsmLowering.cpp
A llvm/lib/Target/RISCV/GISel/RISCVInlineAsmLowering.h
M llvm/lib/Target/RISCV/GISel/RISCVInstructionSelector.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCAsmInfo.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCAsmInfo.h
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCTargetDesc.cpp
M llvm/lib/Target/RISCV/RISCVAsmPrinter.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.h
M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfo.h
M llvm/lib/Target/RISCV/RISCVSubtarget.cpp
M llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
M llvm/lib/Target/SPIRV/MCTargetDesc/SPIRVMCAsmInfo.cpp
M llvm/lib/Target/SPIRV/SPIRV.h
M llvm/lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp
M llvm/lib/Target/SPIRV/SPIRVISelLowering.cpp
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
M llvm/lib/Target/SPIRV/SPIRVLegalizeImplicitBinding.cpp
A llvm/lib/Target/SPIRV/SPIRVLegalizeImplicitBinding.h
M llvm/lib/Target/SPIRV/SPIRVLegalizePointerCast.cpp
A llvm/lib/Target/SPIRV/SPIRVLegalizePointerCast.h
M llvm/lib/Target/SPIRV/SPIRVMergeRegionExitTargets.cpp
A llvm/lib/Target/SPIRV/SPIRVMergeRegionExitTargets.h
M llvm/lib/Target/SPIRV/SPIRVPassRegistry.def
M llvm/lib/Target/SPIRV/SPIRVPrepareFunctions.cpp
A llvm/lib/Target/SPIRV/SPIRVPrepareFunctions.h
M llvm/lib/Target/SPIRV/SPIRVPrepareGlobals.cpp
A llvm/lib/Target/SPIRV/SPIRVPrepareGlobals.h
M llvm/lib/Target/SPIRV/SPIRVRegularizer.cpp
A llvm/lib/Target/SPIRV/SPIRVRegularizer.h
M llvm/lib/Target/SPIRV/SPIRVTargetMachine.cpp
M llvm/lib/Target/SPIRV/SPIRVTypeInst.cpp
M llvm/lib/Target/SPIRV/SPIRVTypeInst.h
M llvm/lib/Target/Sparc/AsmParser/SparcAsmParser.cpp
M llvm/lib/Target/Sparc/Disassembler/SparcDisassembler.cpp
M llvm/lib/Target/Sparc/MCTargetDesc/SparcMCAsmInfo.cpp
M llvm/lib/Target/Sparc/MCTargetDesc/SparcMCAsmInfo.h
M llvm/lib/Target/Sparc/MCTargetDesc/SparcMCCodeEmitter.cpp
M llvm/lib/Target/Sparc/MCTargetDesc/SparcMCTargetDesc.cpp
M llvm/lib/Target/Sparc/SparcInstrInfo.cpp
M llvm/lib/Target/SystemZ/AsmParser/SystemZAsmParser.cpp
M llvm/lib/Target/SystemZ/MCTargetDesc/SystemZHLASMAsmStreamer.h
M llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCAsmInfo.cpp
M llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCAsmInfo.h
M llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCTargetDesc.cpp
M llvm/lib/Target/SystemZ/MCTargetDesc/SystemZTargetStreamer.cpp
M llvm/lib/Target/SystemZ/SystemZAsmPrinter.cpp
M llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
M llvm/lib/Target/TargetLoweringObjectFile.cpp
M llvm/lib/Target/VE/AsmParser/VEAsmParser.cpp
M llvm/lib/Target/VE/Disassembler/VEDisassembler.cpp
M llvm/lib/Target/VE/MCTargetDesc/VEMCAsmInfo.cpp
M llvm/lib/Target/VE/MCTargetDesc/VEMCAsmInfo.h
M llvm/lib/Target/VE/MCTargetDesc/VEMCTargetDesc.cpp
M llvm/lib/Target/WebAssembly/AsmParser/WebAssemblyAsmParser.cpp
M llvm/lib/Target/WebAssembly/CMakeLists.txt
M llvm/lib/Target/WebAssembly/GISel/WebAssemblyCallLowering.cpp
M llvm/lib/Target/WebAssembly/GISel/WebAssemblyLegalizerInfo.cpp
M llvm/lib/Target/WebAssembly/GISel/WebAssemblyRegisterBankInfo.cpp
M llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCAsmInfo.cpp
M llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyTargetStreamer.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyCFGStackify.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyExceptionInfo.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyFrameLowering.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
M llvm/lib/Target/WebAssembly/WebAssemblyLateEHPrepare.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyTargetTransformInfo.h
M llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86ELFObjectWriter.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86MCAsmInfo.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86MCAsmInfo.h
M llvm/lib/Target/X86/MCTargetDesc/X86MCTargetDesc.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86WinCOFFTargetStreamer.cpp
M llvm/lib/Target/X86/X86AsmPrinter.cpp
M llvm/lib/Target/X86/X86CallingConv.td
M llvm/lib/Target/X86/X86CodeGenPassBuilder.cpp
M llvm/lib/Target/X86/X86FastISel.cpp
M llvm/lib/Target/X86/X86FrameLowering.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86InstrInfo.cpp
M llvm/lib/Target/X86/X86MCInstLower.cpp
M llvm/lib/Target/X86/X86TargetMachine.cpp
M llvm/lib/Target/XCore/MCTargetDesc/XCoreMCAsmInfo.cpp
M llvm/lib/Target/XCore/MCTargetDesc/XCoreMCAsmInfo.h
M llvm/lib/Target/XCore/MCTargetDesc/XCoreMCTargetDesc.cpp
M llvm/lib/Target/XCore/XCoreAsmPrinter.cpp
M llvm/lib/Target/Xtensa/AsmParser/XtensaAsmParser.cpp
M llvm/lib/Target/Xtensa/MCTargetDesc/XtensaMCAsmInfo.cpp
M llvm/lib/Target/Xtensa/MCTargetDesc/XtensaMCAsmInfo.h
M llvm/lib/Target/Xtensa/MCTargetDesc/XtensaMCTargetDesc.cpp
M llvm/lib/Target/Xtensa/XtensaInstrInfo.cpp
M llvm/lib/Transforms/AggressiveInstCombine/AggressiveInstCombine.cpp
M llvm/lib/Transforms/IPO/AlwaysInliner.cpp
M llvm/lib/Transforms/IPO/Attributor.cpp
M llvm/lib/Transforms/IPO/AttributorAttributes.cpp
M llvm/lib/Transforms/IPO/FunctionImport.cpp
M llvm/lib/Transforms/IPO/HotColdSplitting.cpp
M llvm/lib/Transforms/IPO/IROutliner.cpp
M llvm/lib/Transforms/IPO/Inliner.cpp
M llvm/lib/Transforms/IPO/LowerTypeTests.cpp
M llvm/lib/Transforms/IPO/OpenMPOpt.cpp
M llvm/lib/Transforms/IPO/PartialInlining.cpp
M llvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
M llvm/lib/Transforms/InstCombine/InstCombineInternal.h
M llvm/lib/Transforms/InstCombine/InstCombineShifts.cpp
M llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
M llvm/lib/Transforms/Instrumentation/NumericalStabilitySanitizer.cpp
M llvm/lib/Transforms/Scalar/BDCE.cpp
M llvm/lib/Transforms/Scalar/ExpandMemCmp.cpp
M llvm/lib/Transforms/Scalar/GVN.cpp
M llvm/lib/Transforms/Scalar/LoopUnrollPass.cpp
M llvm/lib/Transforms/Scalar/SROA.cpp
M llvm/lib/Transforms/Scalar/SimpleLoopUnswitch.cpp
M llvm/lib/Transforms/Utils/CodeExtractor.cpp
M llvm/lib/Transforms/Utils/FunctionImportUtils.cpp
M llvm/lib/Transforms/Utils/LoopUnroll.cpp
M llvm/lib/Transforms/Utils/LowerVectorIntrinsics.cpp
M llvm/lib/Transforms/Utils/ScalarEvolutionExpander.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorizationLegality.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.h
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/lib/Transforms/Vectorize/VPRecipeBuilder.h
M llvm/lib/Transforms/Vectorize/VPlanAnalysis.cpp
M llvm/lib/Transforms/Vectorize/VPlanAnalysis.h
M llvm/lib/Transforms/Vectorize/VPlanConstruction.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.h
M llvm/lib/Transforms/Vectorize/VPlanUtils.cpp
M llvm/lib/Transforms/Vectorize/VPlanUtils.h
M llvm/lib/Transforms/Vectorize/VectorCombine.cpp
A llvm/test/Analysis/BasicAA/atomics.ll
M llvm/test/Analysis/CostModel/ARM/arith-overflow.ll
M llvm/test/Assembler/2006-09-28-CrashOnInvalid.ll
A llvm/test/Assembler/float-literals.ll
A llvm/test/Assembler/invalid-call-float-literal.ll
A llvm/test/Assembler/invalid-uselistorder_bb-float-literal.ll
A llvm/test/Bitcode/fixedpoint_scope.ll
M llvm/test/CodeGen/AArch64/Atomics/aarch64-atomic-store-outline_atomics.ll
M llvm/test/CodeGen/AArch64/Atomics/aarch64-atomic-store-rcpc.ll
M llvm/test/CodeGen/AArch64/Atomics/aarch64-atomic-store-v8_1a.ll
M llvm/test/CodeGen/AArch64/Atomics/aarch64-atomic-store-v8a.ll
M llvm/test/CodeGen/AArch64/Atomics/aarch64-atomicrmw-lse2.ll
M llvm/test/CodeGen/AArch64/Atomics/aarch64-atomicrmw-lse2_lse128.ll
M llvm/test/CodeGen/AArch64/Atomics/aarch64-atomicrmw-lsfe.ll
M llvm/test/CodeGen/AArch64/Atomics/aarch64-atomicrmw-outline_atomics.ll
M llvm/test/CodeGen/AArch64/Atomics/aarch64-atomicrmw-rcpc.ll
M llvm/test/CodeGen/AArch64/Atomics/aarch64-atomicrmw-rcpc3.ll
M llvm/test/CodeGen/AArch64/Atomics/aarch64-atomicrmw-v8_1a.ll
M llvm/test/CodeGen/AArch64/Atomics/aarch64-atomicrmw-v8a.ll
M llvm/test/CodeGen/AArch64/Atomics/aarch64-atomicrmw-v8a_fp.ll
M llvm/test/CodeGen/AArch64/GlobalISel/arm64-atomic.ll
A llvm/test/CodeGen/AArch64/GlobalISel/combine-constant-fold-unary-int.mir
M llvm/test/CodeGen/AArch64/GlobalISel/fold-fp-select.mir
A llvm/test/CodeGen/AArch64/GlobalISel/knownbits-fshl-fshr.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-acos.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-asin.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-atan.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-atan2.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-ceil.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-cos.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-cosh.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-fcmp.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-fcopysign.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-fexp2.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-fma.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-fmad.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-fmaximum.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-fmaxnum.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-fminimum.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-fminnum.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-fp-arith-fp16.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-fp-arith.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-fpext.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-fptrunc.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-frint.mir
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M llvm/test/CodeGen/AMDGPU/skip-branch-taildup-ret.mir
M llvm/test/CodeGen/AMDGPU/smem-war-hazard.mir
M llvm/test/CodeGen/AMDGPU/spill-wait.mir
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A llvm/test/CodeGen/AVR/issue-176830.ll
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M llvm/test/CodeGen/DirectX/BufferStore-sm61.ll
M llvm/test/CodeGen/DirectX/BufferStore.ll
M llvm/test/CodeGen/DirectX/CreateHandle-NURI.ll
M llvm/test/CodeGen/DirectX/CreateHandle.ll
M llvm/test/CodeGen/DirectX/CreateHandleFromBinding-NURI.ll
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A llvm/test/CodeGen/DirectX/Metadata/dx_precise.ll
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M llvm/test/CodeGen/DirectX/WaveActiveMax.ll
M llvm/test/CodeGen/DirectX/WaveActiveMin.ll
M llvm/test/CodeGen/DirectX/WaveGetLaneIndex.ll
M llvm/test/CodeGen/DirectX/WaveReadLaneAt-vec.ll
M llvm/test/CodeGen/DirectX/WaveReadLaneAt.ll
M llvm/test/CodeGen/DirectX/abs.ll
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M llvm/test/CodeGen/DirectX/atan.ll
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M llvm/test/CodeGen/DirectX/reversebits.ll
M llvm/test/CodeGen/DirectX/round.ll
M llvm/test/CodeGen/DirectX/rsqrt.ll
M llvm/test/CodeGen/DirectX/saturate.ll
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M llvm/test/CodeGen/DirectX/sqrt.ll
M llvm/test/CodeGen/DirectX/tan.ll
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A llvm/test/CodeGen/LoongArch/lasx/bitclr.ll
A llvm/test/CodeGen/LoongArch/lasx/bitrev.ll
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M llvm/test/CodeGen/LoongArch/lasx/ir-instruction/avgfloor-ceil.ll
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M llvm/test/CodeGen/LoongArch/lasx/ir-instruction/shuffle-as-xvshuf4i.ll
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A llvm/test/CodeGen/LoongArch/lasx/srlr.ll
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A llvm/test/CodeGen/LoongArch/lsx/bitrev.ll
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M llvm/test/CodeGen/LoongArch/lsx/ir-instruction/avgfloor-ceil.ll
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A llvm/test/CodeGen/LoongArch/lsx/srlr.ll
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A llvm/test/CodeGen/LoongArch/stackslot.mir
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A llvm/test/CodeGen/MIR/AMDGPU/s_waitcnt-errors.mir
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A llvm/test/CodeGen/MIR/AMDGPU/s_waitcnt_missing_operand_crash.mir
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M llvm/test/CodeGen/NVPTX/branch-fold.mir
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M llvm/test/CodeGen/NVPTX/i128.ll
M llvm/test/CodeGen/NVPTX/i16x2-instructions.ll
M llvm/test/CodeGen/NVPTX/jump-table.ll
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M llvm/test/CodeGen/PowerPC/aix-complex.ll
M llvm/test/CodeGen/PowerPC/masked-sdiv.ll
M llvm/test/CodeGen/PowerPC/masked-srem.ll
M llvm/test/CodeGen/PowerPC/masked-udiv.ll
M llvm/test/CodeGen/PowerPC/masked-urem.ll
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A llvm/test/CodeGen/RISCV/GlobalISel/rvv/insert-subvector.ll
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M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-insert-subvector-shuffle.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-peephole-vmerge-vops.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-setcc-int-vp-mask.ll
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M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-deinterleave2.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-zipeven-zipodd.ll
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M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vadd-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfclass-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfnmsac-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vmacc-vp.ll
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M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vsra-vp.ll
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M llvm/test/CodeGen/RISCV/rvv/incorrect-extract-subvector-combine.ll
M llvm/test/CodeGen/RISCV/rvv/narrow-shift-extend.ll
M llvm/test/CodeGen/RISCV/rvv/rvv-peephole-vmerge-vops.ll
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M llvm/test/CodeGen/RISCV/rvv/vector-deinterleave-fixed.ll
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M llvm/test/CodeGen/RISCV/rvv/vfmacc-vp.ll
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A llvm/test/CodeGen/SPIRV/passes/SPIRVLegalizePointerCast.ll
A llvm/test/CodeGen/SPIRV/passes/SPIRVMergeRegionExitTargets.ll
A llvm/test/CodeGen/SPIRV/passes/SPIRVPrepareFunctions.ll
M llvm/test/CodeGen/SPIRV/passes/SPIRVPrepareGlobals-predicate-id-string.ll
A llvm/test/CodeGen/SPIRV/passes/SPIRVPrepareGlobals.ll
A llvm/test/CodeGen/SPIRV/passes/SPIRVRegularizer-i1-icmp.ll
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A llvm/test/CodeGen/SPIRV/pointers/load-store-matrix-in-struct.ll
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M llvm/test/CodeGen/SystemZ/memcpy-03.ll
A llvm/test/CodeGen/SystemZ/memmove-01.ll
M llvm/test/CodeGen/SystemZ/memset-08.ll
M llvm/test/CodeGen/Thumb2/mve-clmul.ll
A llvm/test/CodeGen/Thumb2/mve-extbuildvec.ll
M llvm/test/CodeGen/Thumb2/mve-pred-ext.ll
M llvm/test/CodeGen/Thumb2/mve-vselect-constants.ll
M llvm/test/CodeGen/WebAssembly/GlobalISel/instructions/anyext.mir
M llvm/test/CodeGen/WebAssembly/GlobalISel/instructions/ashr.mir
M llvm/test/CodeGen/WebAssembly/GlobalISel/instructions/ctlz.mir
M llvm/test/CodeGen/WebAssembly/GlobalISel/instructions/ctpop.mir
M llvm/test/CodeGen/WebAssembly/GlobalISel/instructions/cttz.mir
M llvm/test/CodeGen/WebAssembly/GlobalISel/instructions/fshl.mir
M llvm/test/CodeGen/WebAssembly/GlobalISel/instructions/fshr.mir
M llvm/test/CodeGen/WebAssembly/GlobalISel/instructions/implicit_def.mir
M llvm/test/CodeGen/WebAssembly/GlobalISel/instructions/lshr.mir
M llvm/test/CodeGen/WebAssembly/GlobalISel/instructions/rotl.mir
M llvm/test/CodeGen/WebAssembly/GlobalISel/instructions/rotr.mir
M llvm/test/CodeGen/WebAssembly/GlobalISel/instructions/shl.mir
M llvm/test/CodeGen/WebAssembly/GlobalISel/irtranslator/args-simd.ll
M llvm/test/CodeGen/WebAssembly/GlobalISel/irtranslator/args-swiftcc.ll
M llvm/test/CodeGen/WebAssembly/GlobalISel/irtranslator/args.ll
A llvm/test/CodeGen/WebAssembly/GlobalISel/irtranslator/call-basics.ll
M llvm/test/CodeGen/WebAssembly/GlobalISel/irtranslator/ret-aggregates.ll
M llvm/test/CodeGen/WebAssembly/GlobalISel/irtranslator/ret-basics.ll
M llvm/test/CodeGen/WebAssembly/GlobalISel/irtranslator/ret-simd.ll
M llvm/test/CodeGen/WebAssembly/cfg-stackify-eh-legacy.ll
M llvm/test/CodeGen/WebAssembly/cfg-stackify-eh.ll
M llvm/test/CodeGen/WebAssembly/exception.ll
M llvm/test/CodeGen/WebAssembly/f16-intrinsics.ll
A llvm/test/CodeGen/WebAssembly/simd-min-vec-reg-32.ll
M llvm/test/CodeGen/WebAssembly/strided-int-mac.ll
A llvm/test/CodeGen/X86/atomic-lock-and-setcc-folded.ll
M llvm/test/CodeGen/X86/avx512-ext.ll
M llvm/test/CodeGen/X86/avx512-insert-extract.ll
M llvm/test/CodeGen/X86/avx512-mask-op.ll
M llvm/test/CodeGen/X86/combine-sub-usat.ll
M llvm/test/CodeGen/X86/dag-topological-sort.ll
M llvm/test/CodeGen/X86/freeze-binary.ll
M llvm/test/CodeGen/X86/gc-empty-basic-blocks.ll
R llvm/test/CodeGen/X86/gc-empty-basic-blocks.mir
M llvm/test/CodeGen/X86/gfni-funnel-shifts.ll
M llvm/test/CodeGen/X86/gfni-lzcnt.ll
M llvm/test/CodeGen/X86/gfni-rotates.ll
M llvm/test/CodeGen/X86/gfni-shifts.ll
M llvm/test/CodeGen/X86/gfni-tzcnt.ll
M llvm/test/CodeGen/X86/kcfi-arity.ll
M llvm/test/CodeGen/X86/kcfi.ll
M llvm/test/CodeGen/X86/known-never-zero.ll
M llvm/test/CodeGen/X86/llc-pipeline-npm.ll
M llvm/test/CodeGen/X86/machine-block-hash.mir
M llvm/test/CodeGen/X86/masked-sdiv.ll
M llvm/test/CodeGen/X86/masked-srem.ll
M llvm/test/CodeGen/X86/masked-udiv.ll
M llvm/test/CodeGen/X86/masked-urem.ll
M llvm/test/CodeGen/X86/masked_store.ll
M llvm/test/CodeGen/X86/packus.ll
M llvm/test/CodeGen/X86/pr134602.ll
M llvm/test/CodeGen/X86/preserve_nonecc_call.ll
M llvm/test/CodeGen/X86/vector-bitreverse.ll
M llvm/test/CodeGen/X86/vector-replicaton-i1-mask.ll
M llvm/test/CodeGen/X86/vector-sext.ll
M llvm/test/CodeGen/X86/vector-zext.ll
M llvm/test/CodeGen/X86/vselect-avx.ll
M llvm/test/DebugInfo/AArch64/fallthrough-branch.ll
A llvm/test/DebugInfo/Generic/global-var-in-abstract-lexical-block.ll
M llvm/test/DebugInfo/NVPTX/inlinedAt_2.mir
A llvm/test/ExecutionEngine/Interpreter/test-interp-variable-arguments.ll
A llvm/test/MC/AArch64/LFI/branch.s
A llvm/test/MC/AArch64/LFI/return.s
R llvm/test/MC/AArch64/armv9.7a-mpamv2-diagnostics.s
M llvm/test/MC/AArch64/armv9.7a-mpamv2.s
M llvm/test/MC/AArch64/reloc-directive.s
M llvm/test/MC/AMDGPU/gfx10_asm_mubuf.s
M llvm/test/MC/AMDGPU/gfx7_asm_mubuf.s
M llvm/test/MC/AMDGPU/gfx8_asm_mubuf.s
M llvm/test/MC/AMDGPU/gfx9_asm_mubuf.s
A llvm/test/MC/AMDGPU/hsa-gfx12-v4-user-sgpr-err.s
A llvm/test/MC/AMDGPU/hsa-gfx125x-v4-user-sgpr-err.s
M llvm/test/MC/AMDGPU/reloc-directive.s
M llvm/test/MC/ARM/reloc-directive.s
A llvm/test/MC/ARM/thumb-hvc-virt-diagnostics.s
M llvm/test/MC/AVR/reloc-directive.s
M llvm/test/MC/AsmParser/directive_fill.s
A llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vopd3_unused_operands.txt
A llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vopd_unused_operands.txt
M llvm/test/MC/ELF/reloc-directive.s
M llvm/test/MC/Hexagon/reloc-directive.s
M llvm/test/MC/LoongArch/Relocations/reloc-directive.s
M llvm/test/MC/Mips/reloc-directive-label-offset.s
M llvm/test/MC/Mips/reloc-directive.s
M llvm/test/MC/PowerPC/ppc32-reloc-directive.s
M llvm/test/MC/PowerPC/ppc64-reloc-directive.s
M llvm/test/MC/RISCV/reloc-directive.s
M llvm/test/MC/Sparc/Relocations/reloc-directive.s
M llvm/test/MC/SystemZ/reloc-directive.s
M llvm/test/MC/WebAssembly/simd-encodings.s
M llvm/test/MC/X86/reloc-directive-elf-32.s
M llvm/test/MC/X86/reloc-directive-elf-64.s
M llvm/test/MC/X86/reloc-directive-tlsgd.s
A llvm/test/MC/X86/reloc-directive-with-inst-relocs.s
M llvm/test/MC/X86/reloc-directive.s
M llvm/test/Other/new-pm-thinlto-postlink-defaults.ll
M llvm/test/Other/new-pm-thinlto-postlink-pgo-defaults.ll
M llvm/test/Other/new-pm-thinlto-postlink-samplepgo-defaults.ll
M llvm/test/Other/new-pm-thinlto-prelink-defaults.ll
M llvm/test/Other/new-pm-thinlto-prelink-pgo-defaults.ll
M llvm/test/Other/new-pm-thinlto-prelink-samplepgo-defaults.ll
M llvm/test/TableGen/CPtrWildcard.td
M llvm/test/TableGen/directive1.td
M llvm/test/TableGen/directive2.td
A llvm/test/ThinLTO/X86/reduce-promotion-distributed.ll
A llvm/test/ThinLTO/X86/reduce-promotion-same-local-name-distributed.ll
A llvm/test/Transforms/AggressiveInstCombine/fold-split-ctlz.ll
A llvm/test/Transforms/AggressiveInstCombine/fold-split-cttz.ll
M llvm/test/Transforms/BDCE/dead-uses.ll
R llvm/test/Transforms/DeadStoreElimination/fence-todo.ll
M llvm/test/Transforms/DeadStoreElimination/fence.ll
A llvm/test/Transforms/DirectX/getpointer-sink-behavior.ll
M llvm/test/Transforms/FunctionAttrs/nosync.ll
M llvm/test/Transforms/GVN/no-sink-dxgetpointer.ll
M llvm/test/Transforms/GVN/tbaa.ll
M llvm/test/Transforms/GlobalOpt/ctor-memset.ll
M llvm/test/Transforms/GlobalOpt/pr54572.ll
M llvm/test/Transforms/Inline/flatten.ll
M llvm/test/Transforms/InstCombine/AArch64/sve-intrinsic-comb-all-active-lanes-cvt.ll
M llvm/test/Transforms/InstCombine/AArch64/sve-intrinsic-comb-no-active-lanes.ll
M llvm/test/Transforms/InstCombine/RISCV/riscv-vmv-v-x.ll
M llvm/test/Transforms/InstCombine/and-xor-or.ll
M llvm/test/Transforms/InstCombine/apint-shift.ll
M llvm/test/Transforms/InstCombine/binop-and-shifts.ll
A llvm/test/Transforms/InstCombine/divceil.ll
M llvm/test/Transforms/InstCombine/fls.ll
M llvm/test/Transforms/InstCombine/icmp-select.ll
A llvm/test/Transforms/InstCombine/icmp-shl-add-to-add.ll
A llvm/test/Transforms/InstCombine/shift-sub.ll
M llvm/test/Transforms/InstSimplify/load.ll
M llvm/test/Transforms/LICM/atomics.ll
M llvm/test/Transforms/LoopFusion/double_loop_nest_inner_guard.ll
M llvm/test/Transforms/LoopFusion/triple_loop_nest_inner_guard.ll
M llvm/test/Transforms/LoopIdiom/expand-scev-expand-simplifications.ll
M llvm/test/Transforms/LoopStrengthReduce/depth-limit-overrun.ll
M llvm/test/Transforms/LoopStrengthReduce/lsr-rewrite-to-add-one.ll
M llvm/test/Transforms/LoopStrengthReduce/wrong-hoisting-iv.ll
A llvm/test/Transforms/LoopUnroll/debug-and-remarks.ll
R llvm/test/Transforms/LoopUnroll/debug.ll
M llvm/test/Transforms/LoopVectorize/AArch64/epilog-vectorization-factors.ll
M llvm/test/Transforms/LoopVectorize/AArch64/masked-call.ll
A llvm/test/Transforms/LoopVectorize/AArch64/tail-folding-counting-down.ll
M llvm/test/Transforms/LoopVectorize/AArch64/wider-VF-for-callinst.ll
M llvm/test/Transforms/LoopVectorize/ARM/tail-folding-counting-down.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-interleave.ll
M llvm/test/Transforms/LoopVectorize/VPlan/vplan-print-after-all.ll
A llvm/test/Transforms/LoopVectorize/VPlan/widen-canonical-iv-register-pressure.ll
M llvm/test/Transforms/LoopVectorize/X86/amdlibm-calls.ll
A llvm/test/Transforms/LoopVectorize/X86/widen-canonical-iv-register-pressure.ll
M llvm/test/Transforms/LoopVectorize/epilog-vectorization-reductions.ll
A llvm/test/Transforms/LoopVectorize/extract-value-widen.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/hints-trans.ll
M llvm/test/Transforms/LoopVectorize/induction.ll
M llvm/test/Transforms/LoopVectorize/interleaved-accesses.ll
M llvm/test/Transforms/LoopVectorize/scalable-trunc-min-bitwidth.ll
M llvm/test/Transforms/LoopVectorize/tail-folding-vectorization-factor-1.ll
M llvm/test/Transforms/LoopVectorize/version-stride-with-integer-casts.ll
M llvm/test/Transforms/LowerTypeTests/aarch64-jumptable-dbg.ll
M llvm/test/Transforms/LowerTypeTests/x86-jumptable-dbg.ll
A llvm/test/Transforms/OpenMP/spirv_ctor.ll
M llvm/test/Transforms/PhaseOrdering/X86/avg.ll
A llvm/test/Transforms/PhaseOrdering/X86/horizontal-reduce-smax.ll
A llvm/test/Transforms/PhaseOrdering/X86/horizontal-reduce-smin.ll
A llvm/test/Transforms/PhaseOrdering/X86/horizontal-reduce-umax.ll
A llvm/test/Transforms/PhaseOrdering/X86/horizontal-reduce-umin.ll
M llvm/test/Transforms/PhaseOrdering/X86/vector-reductions-expanded.ll
R llvm/test/Transforms/PreISelIntrinsicLowering/AArch64/expand-fp-math-binary.ll
R llvm/test/Transforms/PreISelIntrinsicLowering/RISCV/expand-fp-math-binary.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/InstructionsState-is-invalid-0.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/PR38339.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/div-like-mixed-with-undefs.ll
A llvm/test/Transforms/SLPVectorizer/AArch64/long-non-power-of-2.ll
A llvm/test/Transforms/SLPVectorizer/AArch64/non-power-of-2-with-adjusted-gathers.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/reused-scalar-repeated-in-node.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/slp-fma-loss.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/spillcost-call-between-operands.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/spillcost-loop-backedge.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/vectorizable-selects-uniform-cmps.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/basic-strided-loads.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/complex-loads.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/gather-insert-point-restore.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/reduced-value-repeated-and-vectorized.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/reductions.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/reordered-buildvector-scalars.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/revec-strided-load.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/same-node-reused.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/smin-signed-zextended.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/split-vectorize-parent-for-copyables.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/unordered-loads-operands.ll
M llvm/test/Transforms/SLPVectorizer/SystemZ/reuse-non-power-of-2-reorder.ll
M llvm/test/Transforms/SLPVectorizer/WebAssembly/simd-splat-shuffle-cost.ll
M llvm/test/Transforms/SLPVectorizer/X86/PR39774.ll
M llvm/test/Transforms/SLPVectorizer/X86/PR40310.ll
M llvm/test/Transforms/SLPVectorizer/X86/deleted-inst-reduction-attempt.ll
M llvm/test/Transforms/SLPVectorizer/X86/div-possibly-extended-with-poisons.ll
M llvm/test/Transforms/SLPVectorizer/X86/external-used-across-reductions.ll
M llvm/test/Transforms/SLPVectorizer/X86/extractelements-vector-ops-shuffle.ll
M llvm/test/Transforms/SLPVectorizer/X86/extractelemets-extended-by-poison.ll
M llvm/test/Transforms/SLPVectorizer/X86/full-match-with-poison-scalar.ll
M llvm/test/Transforms/SLPVectorizer/X86/full-matched-bv-with-subvectors.ll
M llvm/test/Transforms/SLPVectorizer/X86/gather-with-cmp-user.ll
M llvm/test/Transforms/SLPVectorizer/X86/gathered-loads-non-full-reg.ll
M llvm/test/Transforms/SLPVectorizer/X86/gathered-shuffle-resized.ll
M llvm/test/Transforms/SLPVectorizer/X86/identity-match-splat-less-defined.ll
A llvm/test/Transforms/SLPVectorizer/X86/identity-reuses-with-poisons.ll
M llvm/test/Transforms/SLPVectorizer/X86/insert-subvector.ll
M llvm/test/Transforms/SLPVectorizer/X86/load-merge-inseltpoison.ll
M llvm/test/Transforms/SLPVectorizer/X86/load-merge.ll
M llvm/test/Transforms/SLPVectorizer/X86/load-partial-vector-shuffle.ll
M llvm/test/Transforms/SLPVectorizer/X86/matched-gather-part-of-combined.ll
M llvm/test/Transforms/SLPVectorizer/X86/non-power-of-2-order-detection.ll
M llvm/test/Transforms/SLPVectorizer/X86/non-power-of-2-subvectors-insert.ll
M llvm/test/Transforms/SLPVectorizer/X86/non-schedulable-before-main.ll
A llvm/test/Transforms/SLPVectorizer/X86/non-schedulable-with-multi-used-expanded.ll
M llvm/test/Transforms/SLPVectorizer/X86/non-scheduled-inst-extern-use.ll
A llvm/test/Transforms/SLPVectorizer/X86/non-vectorizable-inst-operand.ll
M llvm/test/Transforms/SLPVectorizer/X86/original-inst-scheduled-after-copyable.ll
M llvm/test/Transforms/SLPVectorizer/X86/parent-node-schedulable-with-multi-copyables.ll
M llvm/test/Transforms/SLPVectorizer/X86/pr47629-inseltpoison.ll
M llvm/test/Transforms/SLPVectorizer/X86/pr47629.ll
M llvm/test/Transforms/SLPVectorizer/X86/pr47642.ll
M llvm/test/Transforms/SLPVectorizer/X86/pr49081.ll
M llvm/test/Transforms/SLPVectorizer/X86/reduced-val-vectorized-in-transform.ll
M llvm/test/Transforms/SLPVectorizer/X86/reorder-reused-masked-gather.ll
M llvm/test/Transforms/SLPVectorizer/X86/reorder-reused-masked-gather2.ll
M llvm/test/Transforms/SLPVectorizer/X86/reordered-masked-loads.ll
M llvm/test/Transforms/SLPVectorizer/X86/replaced-external-in-reduction.ll
M llvm/test/Transforms/SLPVectorizer/X86/reschedule-only-scheduled.ll
M llvm/test/Transforms/SLPVectorizer/X86/resized-bv-values-non-power-of2-node.ll
M llvm/test/Transforms/SLPVectorizer/X86/reuse-extracts-in-wider-vect.ll
M llvm/test/Transforms/SLPVectorizer/X86/revec-non-power-2-to-power-2-large-vect.ll
M llvm/test/Transforms/SLPVectorizer/X86/revec-reduced-value-vectorized-later.ll
M llvm/test/Transforms/SLPVectorizer/X86/same-values-sub-node-with-poisons.ll
A llvm/test/Transforms/SLPVectorizer/X86/select-copyable-cmp-poison.ll
M llvm/test/Transforms/SLPVectorizer/X86/shl-to-add-transformation5.ll
M llvm/test/Transforms/SLPVectorizer/X86/shrink_after_reorder.ll
M llvm/test/Transforms/SLPVectorizer/X86/sin-sqrt.ll
A llvm/test/Transforms/SLPVectorizer/X86/split-node-reused-in-later-vector.ll
M llvm/test/Transforms/SLPVectorizer/X86/split-node-throttled.ll
M llvm/test/Transforms/SLPVectorizer/X86/split-vectorize-gathered-def-after-use.ll
M llvm/test/Transforms/SLPVectorizer/gathered-consecutive-loads-different-types.ll
M llvm/test/Transforms/SLPVectorizer/insertelement-across-zero.ll
M llvm/test/Transforms/SLPVectorizer/reduced-gathered-vectorized.ll
M llvm/test/Transforms/SLPVectorizer/reduction-whole-regs-loads.ll
M llvm/test/Transforms/SLPVectorizer/reorder-clustered-node.ll
M llvm/test/Transforms/SLPVectorizer/revec-shufflevector.ll
M llvm/test/Transforms/SLPVectorizer/revec.ll
M llvm/test/Transforms/SLPVectorizer/shuffle-mask-resized.ll
R llvm/test/Transforms/SROA/protected-field-pointer.ll
M llvm/test/Transforms/SimplifyCFG/DirectX/no-sink-dxgetpointer.ll
A llvm/test/Transforms/VectorCombine/X86/extract-extract-oob.ll
M llvm/test/tools/dsymutil/X86/tls-variable.test
M llvm/test/tools/dxil-dis/debug-info.ll
A llvm/test/tools/dxil-dis/di-compile-unit-versioned-language.ll
A llvm/test/tools/dxil-dis/opaque-pointers-var.ll
A llvm/test/tools/dxil-dis/vla.ll
A llvm/test/tools/llubi/intr_vector_interleave.ll
A llvm/test/tools/llubi/intr_vector_manip.ll
A llvm/test/tools/llubi/intr_vector_reduce.ll
A llvm/test/tools/llubi/intr_vector_stepvector.ll
M llvm/test/tools/llvm-offload-wrapper/offload-wrapper.ll
M llvm/tools/llubi/lib/Interpreter.cpp
M llvm/tools/llvm-cfi-verify/lib/FileAnalysis.cpp
M llvm/tools/llvm-dwp/llvm-dwp.cpp
M llvm/tools/llvm-exegesis/lib/DisassemblerHelper.cpp
M llvm/tools/llvm-exegesis/lib/SnippetFile.cpp
M llvm/tools/llvm-jitlink/llvm-jitlink.cpp
M llvm/tools/llvm-mc-assemble-fuzzer/llvm-mc-assemble-fuzzer.cpp
M llvm/tools/llvm-mc/llvm-mc.cpp
M llvm/tools/llvm-mca/CodeRegionGenerator.cpp
M llvm/tools/llvm-mca/llvm-mca.cpp
M llvm/tools/llvm-ml/Disassembler.cpp
M llvm/tools/llvm-ml/llvm-ml.cpp
M llvm/tools/llvm-objdump/MachODump.cpp
M llvm/tools/llvm-objdump/llvm-objdump.cpp
M llvm/tools/llvm-profgen/Options.h
M llvm/tools/llvm-profgen/PerfReader.cpp
M llvm/tools/llvm-profgen/ProfileGenerator.cpp
M llvm/tools/llvm-profgen/ProfiledBinary.cpp
M llvm/tools/llvm-rtdyld/llvm-rtdyld.cpp
M llvm/tools/sancov/sancov.cpp
M llvm/unittests/ADT/CMakeLists.txt
A llvm/unittests/ADT/StableHashingTest.cpp
M llvm/unittests/AsmParser/AsmParserTest.cpp
M llvm/unittests/CodeGen/GlobalISel/MachineIRBuilderTest.cpp
M llvm/unittests/CodeGen/MFCommon.inc
M llvm/unittests/CodeGen/MachineInstrTest.cpp
M llvm/unittests/CodeGen/MachineOperandTest.cpp
M llvm/unittests/DebugInfo/DWARF/DWARFExpressionCopyBytesTest.cpp
M llvm/unittests/DebugInfo/DWARF/DwarfGenerator.cpp
M llvm/unittests/Frontend/OpenMPIRBuilderTest.cpp
M llvm/unittests/IR/DebugInfoTest.cpp
M llvm/unittests/MC/AMDGPU/Disassembler.cpp
M llvm/unittests/MC/DwarfDebugFrameCIE.cpp
M llvm/unittests/MC/DwarfLineTableHeaders.cpp
M llvm/unittests/MC/DwarfLineTables.cpp
M llvm/unittests/MC/SystemZ/SystemZAsmLexerTest.cpp
M llvm/unittests/MC/SystemZ/SystemZMCDisassemblerTest.cpp
M llvm/unittests/MC/X86/X86MCDisassemblerTest.cpp
M llvm/unittests/SandboxIR/SandboxIRTest.cpp
M llvm/unittests/Support/KnownBitsTest.cpp
M llvm/unittests/Support/xxhashTest.cpp
M llvm/unittests/Target/AArch64/AArch64InstPrinterTest.cpp
M llvm/unittests/Target/DirectX/CMakeLists.txt
M llvm/unittests/TargetParser/TargetParserTest.cpp
M llvm/unittests/Transforms/Utils/CodeExtractorTest.cpp
M llvm/unittests/tools/llvm-mca/MCATestBase.cpp
M llvm/utils/TableGen/AsmMatcherEmitter.cpp
M llvm/utils/TableGen/Basic/DirectiveEmitter.cpp
M llvm/utils/git/requirements.txt
M llvm/utils/gn/secondary/clang/lib/ScalableStaticAnalysisFramework/Analyses/BUILD.gn
M llvm/utils/gn/secondary/clang/unittests/Tooling/BUILD.gn
M llvm/utils/gn/secondary/libcxx/include/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/CodeGen/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/Target/RISCV/BUILD.gn
M llvm/utils/gn/secondary/llvm/unittests/ADT/BUILD.gn
M llvm/utils/lit/lit/InprocBuiltins.py
M llvm/utils/lit/lit/ShellEnvironment.py
M llvm/utils/lit/lit/TestRunner.py
M llvm/utils/lit/lit/TestingConfig.py
M llvm/utils/lit/tests/shtest-glob.py
M llvm/utils/lit/tests/shtest-ulimit-nondarwin.py
M mlir/docs/Passes.md
M mlir/docs/Tutorials/MlirOpt.md
M mlir/include/mlir/Analysis/DataFlowFramework.h
M mlir/include/mlir/Dialect/AMDGPU/IR/AMDGPUOps.td
M mlir/include/mlir/Dialect/CommonFolders.h
M mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
M mlir/include/mlir/Dialect/Math/IR/MathBase.td
M mlir/include/mlir/Dialect/Math/IR/MathOps.td
M mlir/include/mlir/Dialect/OpenMP/OpenMPClauses.td
M mlir/include/mlir/Dialect/OpenMP/OpenMPEnums.td
M mlir/include/mlir/Dialect/OpenMP/OpenMPOps.td
M mlir/include/mlir/Dialect/OpenMP/Transforms/Passes.h
M mlir/include/mlir/Dialect/OpenMP/Transforms/Passes.td
A mlir/include/mlir/Dialect/OpenMP/Utils/Utils.h
M mlir/include/mlir/Dialect/SMT/IR/SMTTypes.td
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVBase.td
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVTosaOps.td
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVTosaTypes.td
M mlir/include/mlir/Dialect/XeGPU/IR/XeGPUOps.td
M mlir/include/mlir/Dialect/XeGPU/IR/XeGPUTypes.td
M mlir/include/mlir/Dialect/XeGPU/Transforms/XeGPULayoutImpl.h
M mlir/include/mlir/Dialect/XeGPU/uArch/IntelGpuXe2.h
M mlir/include/mlir/Dialect/XeGPU/uArch/uArchBase.h
M mlir/lib/Analysis/DataFlowFramework.cpp
M mlir/lib/Conversion/AMDGPUToROCDL/AMDGPUToROCDL.cpp
M mlir/lib/Conversion/GPUCommon/GPUToLLVMConversion.cpp
M mlir/lib/Conversion/MathToLLVM/MathToLLVM.cpp
M mlir/lib/Conversion/NVGPUToNVVM/NVGPUToNVVM.cpp
M mlir/lib/Conversion/TosaToLinalg/TosaToLinalg.cpp
M mlir/lib/Conversion/TosaToLinalg/TosaToLinalgPass.cpp
M mlir/lib/Conversion/VectorToXeGPU/VectorToXeGPU.cpp
M mlir/lib/Conversion/XeGPUToXeVM/XeGPUToXeVM.cpp
M mlir/lib/Conversion/XeVMToLLVM/XeVMToLLVM.cpp
M mlir/lib/Dialect/AMDGPU/IR/AMDGPUOps.cpp
M mlir/lib/Dialect/Arith/IR/ArithOps.cpp
M mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp
M mlir/lib/Dialect/Math/IR/MathOps.cpp
M mlir/lib/Dialect/MemRef/Transforms/ElideReinterpretCast.cpp
M mlir/lib/Dialect/MemRef/Transforms/EmulateNarrowType.cpp
M mlir/lib/Dialect/OpenMP/CMakeLists.txt
A mlir/lib/Dialect/OpenMP/IR/CMakeLists.txt
M mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
M mlir/lib/Dialect/OpenMP/Transforms/CMakeLists.txt
A mlir/lib/Dialect/OpenMP/Transforms/StackToShared.cpp
A mlir/lib/Dialect/OpenMP/Utils/CMakeLists.txt
A mlir/lib/Dialect/OpenMP/Utils/Utils.cpp
M mlir/lib/Dialect/SMT/IR/SMTTypes.cpp
M mlir/lib/Dialect/SPIRV/IR/SPIRVOps.cpp
M mlir/lib/Dialect/SPIRV/IR/SPIRVTosaOps.cpp
M mlir/lib/Dialect/SPIRV/IR/SPIRVTypes.cpp
M mlir/lib/Dialect/Tosa/IR/TosaOps.cpp
M mlir/lib/Dialect/X86/Transforms/VectorContractToPackedTypeDotProduct.cpp
M mlir/lib/Dialect/XeGPU/IR/XeGPUDialect.cpp
M mlir/lib/Dialect/XeGPU/IR/XeGPUOps.cpp
M mlir/lib/Dialect/XeGPU/TransformOps/XeGPUTransformOps.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUBlocking.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPULayoutImpl.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUPropagateLayout.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUSubgroupDistribute.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUUnroll.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUWgToSgDistribute.cpp
M mlir/lib/Target/LLVM/ROCDL/Target.cpp
M mlir/lib/Target/LLVMIR/Dialect/LLVMIR/LLVMToLLVMIRTranslation.cpp
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/CMakeLists.txt
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
A mlir/test/Analysis/DataFlow/test-staged-analyses.mlir
M mlir/test/Conversion/AMDGPUToROCDL/sparse-mfma-gfx950.mlir
A mlir/test/Conversion/GPUCommon/lower-async-to-gpu-runtime-calls.mlir
M mlir/test/Conversion/MathToLLVM/math-to-llvm.mlir
M mlir/test/Conversion/NVGPUToNVVM/nvgpu-to-nvvm.mlir
A mlir/test/Conversion/TosaToLinalg/tosa-to-linalg-pipeline-no-validation.mlir
M mlir/test/Conversion/TosaToLinalg/tosa-to-linalg-resize.mlir
M mlir/test/Conversion/VectorToXeGPU/transfer-read-to-xegpu.mlir
M mlir/test/Conversion/VectorToXeGPU/transfer-write-to-xegpu.mlir
M mlir/test/Conversion/XeVMToLLVM/xevm_mx-to-llvm.mlir
M mlir/test/Dialect/AMDGPU/invalid.mlir
M mlir/test/Dialect/AMDGPU/ops.mlir
M mlir/test/Dialect/Arith/canonicalize.mlir
A mlir/test/Dialect/LLVMIR/nvvm-transcendentals.mlir
M mlir/test/Dialect/LLVMIR/nvvm.mlir
M mlir/test/Dialect/Math/canonicalize.mlir
M mlir/test/Dialect/Math/ops.mlir
M mlir/test/Dialect/MemRef/elide-reinterpret-cast.mlir
M mlir/test/Dialect/OpenMP/invalid.mlir
M mlir/test/Dialect/OpenMP/ops.mlir
A mlir/test/Dialect/OpenMP/stack-to-shared.mlir
M mlir/test/Dialect/SMT/basic.mlir
M mlir/test/Dialect/SPIRV/IR/structure-ops.mlir
M mlir/test/Dialect/SPIRV/IR/tosa-ops-verification.mlir
M mlir/test/Dialect/SPIRV/IR/types.mlir
M mlir/test/Dialect/SPIRV/Transforms/vce-deduction.mlir
M mlir/test/Dialect/Tosa/verifier.mlir
M mlir/test/Dialect/X86/vector-contract-to-packed-type-dotproduct.mlir
M mlir/test/Dialect/XeGPU/invalid.mlir
M mlir/test/Dialect/XeGPU/layout.mlir
M mlir/test/Dialect/XeGPU/ops.mlir
M mlir/test/Dialect/XeGPU/propagate-layout-inst-data.mlir
M mlir/test/Dialect/XeGPU/propagate-layout-subgroup.mlir
M mlir/test/Dialect/XeGPU/propagate-layout.mlir
M mlir/test/Dialect/XeGPU/xegpu-blocking.mlir
M mlir/test/Dialect/XeGPU/xegpu-recover-layout.mlir
R mlir/test/Dialect/XeGPU/xegpu-unroll-patterns-no-desc-offsets.mlir
M mlir/test/Dialect/XeGPU/xegpu-unroll-patterns.mlir
M mlir/test/Dialect/XeGPU/xegpu-vector-linearize.mlir
M mlir/test/Dialect/XeGPU/xegpu-wg-to-sg-elemwise.mlir
M mlir/test/Dialect/XeGPU/xegpu-wg-to-sg-rr.mlir
R mlir/test/Dialect/XeGPU/xegpu-wg-to-sg-unify-ops-rr.mlir
R mlir/test/Dialect/XeGPU/xegpu-wg-to-sg-unify-ops.mlir
M mlir/test/Dialect/XeGPU/xegpu-wg-to-sg.mlir
M mlir/test/Integration/Dialect/XeVM/GPU/xevm_block_scaled_dpas_bf8.mlir
A mlir/test/Target/LLVMIR/nvvm/transcendentals.mlir
M mlir/test/Target/LLVMIR/nvvmir-invalid.mlir
M mlir/test/Target/LLVMIR/nvvmir.mlir
M mlir/test/Target/LLVMIR/omptarget-constant-alloca-raise.mlir
A mlir/test/Target/LLVMIR/omptarget-device-shared-mem.mlir
A mlir/test/Target/LLVMIR/omptarget-device-shared-memory.mlir
M mlir/test/Target/LLVMIR/omptarget-parallel-llvm.mlir
M mlir/test/Target/LLVMIR/omptarget-parallel-wsloop.mlir
M mlir/test/Target/LLVMIR/omptarget-region-device-llvm.mlir
A mlir/test/Target/LLVMIR/openmp-scope.mlir
M mlir/test/Target/LLVMIR/openmp-target-generic-spmd.mlir
M mlir/test/Target/LLVMIR/openmp-target-private-allocatable.mlir
A mlir/test/Target/LLVMIR/openmp-target-private-shared-mem.mlir
A mlir/test/Target/LLVMIR/openmp-target-spmd-num-threads-i64.mlir
M mlir/test/Target/LLVMIR/openmp-todo.mlir
M mlir/test/lib/Analysis/DataFlow/TestDeadCodeAnalysis.cpp
M mlir/test/lib/Analysis/DataFlow/TestDenseBackwardDataFlowAnalysis.cpp
M mlir/test/lib/Analysis/DataFlow/TestDenseForwardDataFlowAnalysis.cpp
M mlir/test/lib/Analysis/DataFlow/TestSparseBackwardDataFlowAnalysis.cpp
M mlir/test/lib/Analysis/TestDataFlowFramework.cpp
M mlir/test/lib/Dialect/Test/TestPatterns.cpp
M mlir/test/lib/Dialect/XeGPU/TestXeGPUTransforms.cpp
M mlir/tools/mlir-opt/mlir-opt.cpp
M mlir/unittests/Dialect/SMT/CMakeLists.txt
R mlir/unittests/Dialect/SMT/TypeTest.cpp
M mlir/utils/vscode/package-lock.json
M mlir/utils/vscode/package.json
M offload/include/OpenMP/omp.h
M offload/liboffload/API/Device.td
M offload/liboffload/src/OffloadImpl.cpp
M offload/plugins-nextgen/amdgpu/dynamic_hsa/hsa_ext_amd.h
M offload/plugins-nextgen/amdgpu/src/rtl.cpp
M offload/plugins-nextgen/common/CMakeLists.txt
M offload/plugins-nextgen/common/src/PluginInterface.cpp
M offload/plugins-nextgen/cuda/src/rtl.cpp
M offload/plugins-nextgen/host/src/rtl.cpp
M offload/plugins-nextgen/level_zero/dynamic_l0/L0DynWrapper.cpp
M offload/plugins-nextgen/level_zero/dynamic_l0/level_zero/ze_api.h
M offload/plugins-nextgen/level_zero/include/L0Device.h
M offload/plugins-nextgen/level_zero/src/L0Device.cpp
M offload/test/offloading/ctor_dtor.cpp
A offload/test/offloading/fortran/target-generic-loops.f90
A offload/test/offloading/fortran/target-generic-outlined-loops.f90
A offload/test/offloading/fortran/target-spmd-loops.f90
M offload/test/offloading/interop-print.c
M offload/tools/deviceinfo/llvm-offload-device-info.cpp
M offload/unittests/OffloadAPI/device/olGetDeviceInfo.cpp
M openmp/device/include/DeviceTypes.h
M openmp/module/omp_lib.F90.var
M openmp/module/omp_lib.h.var
M openmp/runtime/CMakeLists.txt
M openmp/runtime/src/include/omp.h.var
M openmp/runtime/src/kmp.h
M openmp/runtime/src/kmp_config.h.cmake
M openmp/runtime/src/kmp_global.cpp
M openmp/runtime/src/kmp_settings.cpp
M openmp/runtime/src/kmp_taskdeps.cpp
M openmp/runtime/src/kmp_taskdeps.h
M openmp/runtime/src/kmp_tasking.cpp
M openmp/runtime/src/ompd-specific.cpp
M openmp/runtime/test/CMakeLists.txt
M openmp/runtime/test/lit.cfg
M openmp/runtime/test/lit.site.cfg.in
M openmp/runtime/test/tasking/omp_record_replay.cpp
M openmp/runtime/test/tasking/omp_record_replay_deps.cpp
M openmp/runtime/test/tasking/omp_record_replay_deps_multi_succ.cpp
M openmp/runtime/test/tasking/omp_record_replay_multiTDGs.cpp
M openmp/runtime/test/tasking/omp_record_replay_print_dot.cpp
M openmp/runtime/test/tasking/omp_record_replay_taskloop.cpp
M orc-rt/include/orc-rt/sps-ci/AllSPSCI.h
M orc-rt/lib/executor/sps-ci/AllSPSCI.cpp
M polly/lib/CodeGen/IslNodeBuilder.cpp
M third-party/unittest/googletest/src/gtest-port.cc
M utils/bazel/llvm-project-overlay/.bazelignore
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/test/src/sys/socket/BUILD.bazel
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
M utils/bazel/llvm-project-overlay/third-party/BUILD.bazel
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Compare: https://github.com/llvm/llvm-project/compare/17b5b2181037...478db95030c1
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