[all-commits] [llvm/llvm-project] ad4cd2: [libcxx] Use debug() instead of note() for substit...
Julian Brown via All-commits
all-commits at lists.llvm.org
Mon Apr 27 12:13:59 PDT 2026
Branch: refs/heads/users/jtb20/spr/main.openmp-add-replayable-clause-for-taskgraph-support
Home: https://github.com/llvm/llvm-project
Commit: ad4cd22cebf51e9bb33ba214659b8762a27cb041
https://github.com/llvm/llvm-project/commit/ad4cd22cebf51e9bb33ba214659b8762a27cb041
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2026-04-23 (Thu, 23 Apr 2026)
Changed paths:
M libcxx/utils/libcxx/test/config.py
Log Message:
-----------
[libcxx] Use debug() instead of note() for substitutions (#193667)
This reduces the noise in the lit output when running tests like this:
```
llvm-lit: llvm-project/libcxx/utils/libcxx/test/config.py:24: note: (llvm-libunwind-shared.cfg.in) Using %{cxx} substitution: 'bin/clang++'
llvm-lit: llvm-project/libcxx/utils/libcxx/test/config.py:24: note: (llvm-libunwind-shared.cfg.in) Using %{flags} substitution: ' --target=x86_64-unknown-linux-gnu'
llvm-lit: llvm-project/libcxx/utils/libcxx/test/config.py:24: note: (llvm-libunwind-shared.cfg.in) Using %{compile_flags} substitution: '-nostdinc++ -I %{include} -D_LIBUNWIND_HAVE_GETAUXVAL -funwind-tables -std=c++26 -Werror -Wall -Wctad-maybe-unsupported -Wextra -Wshadow -Wundef -Wunused-template -Wno-unused-command-line-argument -Wno-attributes -Wno-pessimizing-move -Wno-noexcept-type -Wno-atomic-alignment -Wno-reserved-module-identifier -Wdeprecated-copy -Wdeprecated-copy-dtor -Wshift-negative-value -Wno-user-defined-literals -Wno-tautological-compare -Wsign-compare -Wunused-variable -Wunused-parameter -Wunreachable-code -Wno-unused-local-typedef -Wno-local-type-template-args -Wno-c++11-extensions -Wno-unknown-pragmas -Wno-pass-failed -Wno-mismatched-new-delete -Wno-redundant-move -Wno-self-move -Wno-nullability-completeness -flax-vector-conversions=none -D_LIBCPP_HAS_NO_PRAGMA_SYSTEM_HEADER -Wuser-defined-warnings'
llvm-lit: llvm-project/libcxx/utils/libcxx/test/config.py:24: note: (llvm-libunwind-shared.cfg.in) Using %{link_flags} substitution: '-L %{lib} -Wl,-rpath,%{lib} -lunwind -Wl,--export-dynamic -ldl -latomic'
llvm-lit: llvm-project/libcxx/utils/libcxx/test/config.py:24: note: (llvm-libunwind-shared.cfg.in) Using %{benchmark_flags} substitution: ''
llvm-lit: llvm-project/libcxx/utils/libcxx/test/config.py:24: note: (llvm-libunwind-shared.cfg.in) Using %{exec} substitution: '%{executor} --execdir %{temp} -- '
llvm-lit: llvm-project/libcxx/utils/libcxx/test/config.py:24: note: (llvm-libunwind-shared.cfg.in) All available features: add-latomic-workaround, buildhost=linux, c++26, can-create-symlinks, character-conversion-warnings, clang, clang-23, clang-23.0, clang-23.0.0, diagnose-if-support, enable-benchmarks=run, gcc-style-warnings, has-fblocks, has-fconstexpr-steps, has-filecheck, has-unix-headers, host-has-gdb-with-python, large_tests, libcpp-has-no-experimental-hardening-observe-semantic, libcpp-has-no-experimental-optional-iterator, libcpp-has-no-experimental-syncstream, libcpp-has-no-experimental-tzdb, libcpp-has-no-incomplete-pstl, linux, locale.cs_CZ.ISO8859-2, locale.en_US.UTF-8, locale.fr_CA.ISO8859-1, locale.fr_FR.UTF-8, locale.ja_JP.UTF-8, locale.ru_RU.UTF-8, locale.zh_CN.UTF-8, long_tests, objcopy-available, objective-c++, optimization=none, std-at-least-c++03, std-at-least-c++11, std-at-least-c++14, std-at-least-c++17, std-at-least-c++20, std-at-least-c++23, std-at-least-c++26, stdlib=libc++, stdlib=llvm-libc++, target=x86_64-unknown-linux-gnu, verify-support, win32-broken-utf8-wchar-ctype
llvm-lit: llvm-project/libcxx/utils/libcxx/test/config.py:24: note: (llvm-libc++-shared.cfg.in) Using %{cxx} substitution: 'bin/clang++'
llvm-lit: llvm-project/libcxx/utils/libcxx/test/config.py:24: note: (llvm-libc++-shared.cfg.in) Using %{flags} substitution: '-pthread --target=x86_64-unknown-linux-gnu'
llvm-lit: llvm-project/libcxx/utils/libcxx/test/config.py:24: note: (llvm-libc++-shared.cfg.in) Using %{compile_flags} substitution: '-nostdinc++ -I %{target-include-dir} -I %{include-dir} -I %{libcxx-dir}/test/support -std=c++26 -Werror -Wall -Wctad-maybe-unsupported -Wextra -Wshadow -Wundef -Wunused-template -Wno-unused-command-line-argument -Wno-attributes -Wno-pessimizing-move -Wno-noexcept-type -Wno-atomic-alignment -Wno-reserved-module-identifier -Wdeprecated-copy -Wdeprecated-copy-dtor -Wshift-negative-value -Wno-user-defined-literals -Wno-tautological-compare -Wsign-compare -Wunused-variable -Wunused-parameter -Wunreachable-code -Wno-unused-local-typedef -Wno-local-type-template-args -Wno-c++11-extensions -Wno-unknown-pragmas -Wno-pass-failed -Wno-mismatched-new-delete -Wno-redundant-move -Wno-self-move -Wno-nullability-completeness -flax-vector-conversions=none -D_LIBCPP_HAS_NO_PRAGMA_SYSTEM_HEADER -D_LIBCPP_ENABLE_EXPERIMENTAL -Wuser-defined-warnings'
llvm-lit: llvm-project/libcxx/utils/libcxx/test/config.py:24: note: (llvm-libc++-shared.cfg.in) Using %{link_flags} substitution: '-lc++experimental -nostdlib++ -L %{lib-dir} -Wl,-rpath,%{lib-dir} -lc++ -latomic'
llvm-lit: llvm-project/libcxx/utils/libcxx/test/config.py:24: note: (llvm-libc++-shared.cfg.in) Using %{benchmark_flags} substitution: '-I runtimes/runtimes-bins/libcxx/test/benchmarks/google-benchmark/include -L runtimes/runtimes-bins/libcxx/test/benchmarks/google-benchmark/lib -L runtimes/runtimes-bins/libcxx/test/benchmarks/google-benchmark/lib64 -l benchmark'
llvm-lit: llvm-project/libcxx/utils/libcxx/test/config.py:24: note: (llvm-libc++-shared.cfg.in) Using %{exec} substitution: '%{executor} --execdir %{temp} -- '
llvm-lit: llvm-project/libcxx/utils/libcxx/test/config.py:24: note: (llvm-libc++-shared.cfg.in) All available features: add-latomic-workaround, buildhost=linux, c++26, c++experimental, can-create-symlinks, character-conversion-warnings, clang, clang-23, clang-23.0, clang-23.0.0, diagnose-if-support, enable-benchmarks=no, gcc-style-warnings, has-1024-bit-atomics, has-64-bit-atomics, has-fblocks, has-fconstexpr-steps, has-filecheck, has-unix-headers, host-has-gdb-with-python, large_tests, libcpp-abi-version=1, libcpp-hardening-mode=extensive, libcpp-has-no-availability-markup, libcpp-has-thread-api-pthread, linux, locale.cs_CZ.ISO8859-2, locale.en_US.UTF-8, locale.fr_CA.ISO8859-1, locale.fr_FR.UTF-8, locale.ja_JP.UTF-8, locale.ru_RU.UTF-8, locale.zh_CN.UTF-8, objective-c++, optimization=none, std-at
```
Note: "All available features" is still preserved.
Can be re-enabled runtime with LIT_OPTS=-debug
Commit: 0b255fe83f17b96936474d37f14c955513074b70
https://github.com/llvm/llvm-project/commit/0b255fe83f17b96936474d37f14c955513074b70
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-04-23 (Thu, 23 Apr 2026)
Changed paths:
M mlir/include/mlir/IR/DialectRegistry.h
M mlir/include/mlir/Transforms/Passes.td
M mlir/lib/Dialect/Linalg/Transforms/ShardingInterfaceImpl.cpp
M mlir/lib/IR/Dialect.cpp
M mlir/lib/IR/MLIRContext.cpp
M mlir/lib/Pass/Pass.cpp
M mlir/lib/Tools/mlir-opt/MlirOptMain.cpp
M mlir/lib/Transforms/Canonicalizer.cpp
A mlir/test/Transforms/canonicalize-filter-dialects.mlir
Log Message:
-----------
[mlir][canonicalize] Add filter-dialects option (#193041)
Add a new `filter-dialects` list option to the canonicalize pass. When
provided, only canonicalization patterns from the listed dialects are
collected, and the named dialects are force-loaded via
getDependentDialects.
Loading flow: the Canonicalizer's getDependentDialects override calls
`registry.addDialectToPreload(name)` for each filter-dialect name, which
records the name in a new `dialectsToPreload` list on DialectRegistry.
The PassManager's pipeline-init then calls
`dependentDialects.preloadSelectDialects(ctx, emitError)`, which loads
each preload entry via `context->getOrLoadDialect(name)` — the real
allocator is resolved from the context's own registry (registered by
the tool) and the dialect is loaded before multi-threaded execution
begins. If a requested dialect has no registration in the context, a
diagnostic `"can't load dialect '<name>': missing registration?"` is
emitted.
DialectRegistry API changes:
- New `addDialectToPreload(StringRef)` method: records a dialect name
that should be loaded into the MLIRContext but whose allocator lives
in the context's own registry. The registry itself does not load the
dialect — it just carries the request.
- New `preloadSelectDialects(MLIRContext *,
function_ref<InFlightDiagnostic()> = {})`
method: loads every preload-registered dialect into the context,
returning failure (and optionally emitting a diagnostic) for the
first name that cannot be resolved.
- `getDialectNames()` is split into two accessors:
* `getRegisteredDialectNames()` — names of allocator-backed entries
from the registry map.
* `getDialectsToPreload()` — preload-only entries added via
`addDialectToPreload(StringRef)`.
Assisted-by: Claude Code
Commit: 6d826cb602f87e20727e2bc93527c0baea4b4399
https://github.com/llvm/llvm-project/commit/6d826cb602f87e20727e2bc93527c0baea4b4399
Author: Vineet Kumar <173554+vntkmr at users.noreply.github.com>
Date: 2026-04-23 (Thu, 23 Apr 2026)
Changed paths:
M flang/examples/FeatureList/FeatureList.cpp
M flang/include/flang/Parser/dump-parse-tree.h
M flang/include/flang/Parser/parse-tree.h
M flang/lib/Parser/program-parsers.cpp
M flang/lib/Parser/unparse.cpp
M flang/lib/Semantics/expression.cpp
A flang/test/Parser/conditional-arg.f90
A flang/test/Semantics/conditional-arg.f90
Log Message:
-----------
[flang] Add parser support for Fortran 2023 conditional arguments (F2023 R1526-R1528) (#191303)
Implement parsing, unparsing, and parse tree nodes for the Fortran 2023
conditional argument syntax (F2023 R1526-R1528). This enables calls of
the form:
call sub((flag ? a : b))
call sub((x > 10 ? a : x > 5 ? b : c))
call sub((flag ? a : .NIL.))
- Add ConditionalArg and ConditionalArgTail parse tree nodes
- Add Nil empty class for .NIL. representation
- Add ConditionalArg as a new alternative in ActualArg
- Add parser rules for conditional-arg, consequent, and chained branches
- Add unparse support for round-trip printing
- Add dump-parse-tree and FeatureList support
- Add parser tests covering simple, multi-branch, .NIL., BOZ, NULL(),
keyword arguments, and module procedure cases
Commit: ecefc4a2ec2b582481652d7734165166ec8e3acc
https://github.com/llvm/llvm-project/commit/ecefc4a2ec2b582481652d7734165166ec8e3acc
Author: Ramkumar Ramachandra <artagnon at tenstorrent.com>
Date: 2026-04-23 (Thu, 23 Apr 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
Log Message:
-----------
[VPlan] Shallow-traverse vector-loop in dropPoisonGen (NFC) (#193635)
A shallow-traversal of the vector loop region is sufficient to operate
on Memory and Interleave recipes.
Commit: 3baafed3e779afc9c60149cd2528d70b81f3ff29
https://github.com/llvm/llvm-project/commit/3baafed3e779afc9c60149cd2528d70b81f3ff29
Author: Kevin Sala Penades <salapenades1 at llnl.gov>
Date: 2026-04-23 (Thu, 23 Apr 2026)
Changed paths:
M openmp/docs/design/Runtimes.rst
Log Message:
-----------
[NFC][offload][OpenMP] Fix kernel replay documentation (#193832)
Commit: 6b31a99ee4f5f91c52610b13cabb9980984afdc3
https://github.com/llvm/llvm-project/commit/6b31a99ee4f5f91c52610b13cabb9980984afdc3
Author: Akira Hatanaka <ahatanak at gmail.com>
Date: 2026-04-23 (Thu, 23 Apr 2026)
Changed paths:
M clang/lib/Driver/ToolChains/Darwin.cpp
M clang/test/Driver/darwin-objc-selector-stubs.m
Log Message:
-----------
Revert "[Darwin] Remove linker version checks for objc_msgSend selector stubs (#193637)" (#193828)
This reverts commit a6ab955369ae401cec75ced651c52c2348f117ad.
The linker version checks cannot be removed yet. The commit broke builds
that were using old linkers.
Commit: de82b4790943b2a48d9c974ed3c6c1707c3edeb0
https://github.com/llvm/llvm-project/commit/de82b4790943b2a48d9c974ed3c6c1707c3edeb0
Author: Vigneshwar Jayakumar <vigneshwar.jayakumar at amd.com>
Date: 2026-04-23 (Thu, 23 Apr 2026)
Changed paths:
M clang/lib/CodeGen/CGExprAgg.cpp
M clang/lib/CodeGen/ItaniumCXXABI.cpp
M clang/lib/CodeGen/MicrosoftCXXABI.cpp
M clang/lib/CodeGen/TargetInfo.h
M clang/lib/CodeGen/Targets/AMDGPU.cpp
M clang/test/CodeGenCXX/no-elide-constructors.cpp
M clang/test/CodeGenHIP/sret-nontrivial-copyable.hip
M clang/test/CodeGenHIP/store-addr-space.hip
M clang/test/OpenMP/amdgcn_sret_ctor.cpp
Log Message:
-----------
[Clang] Fix sret AS for non-trivial-copy returns. (#186275)
classifyReturnType used getAllocaAddrSpace() for sret, which is wrong
on targets like AMDGPU where alloca lives in addrspace(5). For types
with deleted copy/move constructors, there is no way to construct into
a temp and copy out — the sret pointer must point directly to the caller's
destination in the default address space.
Add a target hook getSRetAddrSpace() so AMDGPU can return LangAS::Default
for non-register-passable types.
Fixes issue #185744
Commit: 7ed9d965f29ebedaa74ebe720b2d25d0254c8602
https://github.com/llvm/llvm-project/commit/7ed9d965f29ebedaa74ebe720b2d25d0254c8602
Author: Philip Reames <listmail at philipreames.com>
Date: 2026-04-23 (Thu, 23 Apr 2026)
Changed paths:
M llvm/test/Transforms/PreISelIntrinsicLowering/AArch64/expand-exp.ll
M llvm/test/Transforms/PreISelIntrinsicLowering/AArch64/expand-fp-math-binary.ll
M llvm/test/Transforms/PreISelIntrinsicLowering/AArch64/expand-fp-math.ll
M llvm/test/Transforms/PreISelIntrinsicLowering/AArch64/expand-log.ll
Log Message:
-----------
[AArch64][PreISelIntrinsicLowering] Adjust tests to include -march=+sve (#193833)
These tests are exercising expansion of scalable vectors. This is
ill-defined without SVE as there aren't such legal vector types. This
mostly doesn't change the output (since the ops being exercised are
Expand in both configurations), but for fcanonicalize we're testing the
wrong result as this _shouldn't_ be (and isn't) expanded when you have
SVE.
Commit: 8ebc7307fa4adea4f504ecc9e747d841c9c7f42d
https://github.com/llvm/llvm-project/commit/8ebc7307fa4adea4f504ecc9e747d841c9c7f42d
Author: Hervé Poussineau <hpoussin at reactos.org>
Date: 2026-04-23 (Thu, 23 Apr 2026)
Changed paths:
M llvm/lib/Object/COFFObjectFile.cpp
M llvm/lib/Object/WindowsResource.cpp
M llvm/test/tools/llvm-rc/windres-target.test
M llvm/tools/llvm-rc/llvm-rc.cpp
Log Message:
-----------
[llvm-rc] Add support for MIPS machine (#193830)
Commit: 3cd4a795d9fd249a578fb98765f821c2651bae4a
https://github.com/llvm/llvm-project/commit/3cd4a795d9fd249a578fb98765f821c2651bae4a
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-04-23 (Thu, 23 Apr 2026)
Changed paths:
M clang/lib/Basic/OffloadArch.cpp
M clang/lib/Basic/Targets/SPIR.cpp
M clang/lib/Driver/Driver.cpp
M clang/lib/Sema/SemaAMDGPU.cpp
Log Message:
-----------
clang: Avoid hardcoding some offload triple strings (#193811)
This will make it easier to use the subarch field in the future.
Commit: 281f993aafa692408404d21b40eeb4df19618237
https://github.com/llvm/llvm-project/commit/281f993aafa692408404d21b40eeb4df19618237
Author: adams381 <adams at nvidia.com>
Date: 2026-04-23 (Thu, 23 Apr 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenCall.cpp
M clang/test/CIR/CodeGen/coro-task.cpp
M clang/test/CIR/CodeGen/new-delete-deactivation.cpp
M clang/test/CIR/CodeGen/new-delete.cpp
M clang/test/CIR/CodeGen/new.cpp
A clang/test/CIR/CodeGen/nonnull.c
M clang/test/CIR/CodeGen/paren-list-agg-init.cpp
M clang/test/CIR/CodeGenBuiltins/builtin-new-delete.cpp
M clang/test/CIR/CodeGenCXX/new-array-init.cpp
Log Message:
-----------
[CIR] Add nonnull on returns and pointer params (#188281)
Add nonnull to return attributes when the function has
ReturnsNonNullAttr (e.g. operator new), guarded by !NullPointerIsValid.
Add nonnull to pointer parameters with __attribute__((nonnull)), both
per-parameter and function-level forms.
Thread targetDecl into constructFunctionArgumentAttributes and build a
parallel ParmVarDecl array in the zip_equal loop to access
parameter-level attributes without manual index arithmetic.
Restrict->noalias handling has been moved to #191483.
Commit: 42077db9afb515f6131d43b0243c60009e280052
https://github.com/llvm/llvm-project/commit/42077db9afb515f6131d43b0243c60009e280052
Author: Med Ismail Bennani <ismail at bennani.ma>
Date: 2026-04-23 (Thu, 23 Apr 2026)
Changed paths:
M lldb/test/API/functionalities/plugins/python_os_plugin/os_plugin_in_dsym/TestOSIndSYM.py
Log Message:
-----------
[lldb/test] Fix TestOSIndSYM for Darwin embedded platforms (#193839)
The test used CreateTarget(None) and relied on the attach to discover
the executable and load the dSYM. On remote platforms this doesn't find
the local dSYM, so the OS plugin never loads. Switch to
CreateTarget(executable) so the dSYM Python module is loaded before
attach.
Also split the test into two methods: test_python_os_plugin uses
spawn+attach which works both locally and on real remote platforms,
while test_python_os_plugin_remote simulates remote debugging by
manually spawning debugserver and is skipped on embedded platforms where
this setup conflicts with lldb-platform.
rdar://175455380
Signed-off-by: Med Ismail Bennani <ismail at bennani.ma>
Commit: b756be64cad6fe566fbfeddc69a2bd0894a9d997
https://github.com/llvm/llvm-project/commit/b756be64cad6fe566fbfeddc69a2bd0894a9d997
Author: Zhen Wang <zhenw at nvidia.com>
Date: 2026-04-23 (Thu, 23 Apr 2026)
Changed paths:
M flang/lib/Optimizer/Dialect/CMakeLists.txt
M flang/lib/Optimizer/Dialect/FIROps.cpp
A flang/test/Fir/array-coor-canonicalization-cuf.fir
Log Message:
-----------
[flang][cuda] Preserve fir.rebox captured by cuf.kernel in SimplifyArrayCoorOp (#193837)
SimplifyArrayCoorOp folds fir.rebox → fir.array_coor by rewriting the
array_coor to consume the rebox's source box directly. This is unsafe
when the array_coor is inside a cuf.kernel and the rebox is not: in CUF,
a rebox of a device-attributed value (e.g. a dummy with cuf.data_attr =
device) is the op whose lowering copies the descriptor into
GPU-accessible memory. Folding it out skips the copy, so the kernel
dereferences a host-side descriptor on the device, causing
cudaErrorIllegalAddress (or cudaErrorUnknown on H100 under ATS).
The pattern already guards this hazard for OpenACC via
ACC_COMPUTE_AND_DATA_CONSTRUCT_OPS / ACC_DATA_ENTRY_OPS; this change
adds the analogous guard for cuf::KernelOp.
Commit: 464392e9d3b5c31d22ce4751526ffbfed8f01852
https://github.com/llvm/llvm-project/commit/464392e9d3b5c31d22ce4751526ffbfed8f01852
Author: Matthew Nagy <matthew.nagy at sony.com>
Date: 2026-04-23 (Thu, 23 Apr 2026)
Changed paths:
M compiler-rt/lib/tysan/tysan.cpp
Log Message:
-----------
[TySan] add internal interface support (#192413)
Partial reland of https://github.com/llvm/llvm-project/pull/183310
Trying to avoid the parts that blow up mac ci until I can fix that
issue.
Commit: 8b96c2104e74f90d6431022001cac2dccdbdeed0
https://github.com/llvm/llvm-project/commit/8b96c2104e74f90d6431022001cac2dccdbdeed0
Author: nvptm <pmathew at nvidia.com>
Date: 2026-04-23 (Thu, 23 Apr 2026)
Changed paths:
M flang/lib/Optimizer/Builder/IntrinsicCall.cpp
M flang/module/__fortran_builtins.f90
A flang/test/Lower/Intrinsics/c_devptr_eq_ne.f90
M openmp/module/CMakeLists.txt
Log Message:
-----------
[flang] Add comparison operators for c_devptr (#192687)
Commit: 6364bf68058b5cb6951dd2f6e8ca89d89575c6e0
https://github.com/llvm/llvm-project/commit/6364bf68058b5cb6951dd2f6e8ca89d89575c6e0
Author: Dave Lee <davelee.com at gmail.com>
Date: 2026-04-23 (Thu, 23 Apr 2026)
Changed paths:
M lldb/include/lldb/ValueObject/ValueObject.h
M lldb/source/ValueObject/ValueObject.cpp
Log Message:
-----------
[lldb] Remove unused ValueObject::IsBaseClass(uint32_t &depth) (NFC) (#193849)
Commit: 28027f8ffee15197b99c4388b5d536fd45bb582b
https://github.com/llvm/llvm-project/commit/28027f8ffee15197b99c4388b5d536fd45bb582b
Author: Owen Anderson <resistor at mac.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M llvm/lib/CodeGen/MachineOutliner.cpp
Log Message:
-----------
[MachineOutliner] Do not allow debug instructions to affect liveness computations. (#192336)
Because DBG_VALUE precedes the actual definition of a physical register,
considering
these during the liveness updating phase of MachineOutliner was causing
every register
definition to also be marked as a use, which would eventually lead to a
verifier error
when a use without a def was detected.
A MIR testcase for this is present at
https://github.com/CHERIoT-Platform/llvm-project/commit/b71f6d67e338e70a1dc23e15a77805da3e3cd015
but it depends on CHERIoT instructions that are not in LLVM upstream at
present. It's also very senstive to small changes to the input, so I
have not been able to reproduce it on an in-tree target. That said, I
believe this change is small enough that its correctness is verifiable
by inspection.
Commit: dca61067836e1890f7ecce0fa380b800bf20b520
https://github.com/llvm/llvm-project/commit/dca61067836e1890f7ecce0fa380b800bf20b520
Author: Charitha Saumya <136391709+charithaintc at users.noreply.github.com>
Date: 2026-04-23 (Thu, 23 Apr 2026)
Changed paths:
M mlir/include/mlir/Dialect/XeGPU/IR/XeGPUDialect.td
M mlir/include/mlir/Dialect/XeGPU/IR/XeGPUTypes.td
M mlir/lib/Conversion/VectorToXeGPU/VectorToXeGPU.cpp
M mlir/lib/Dialect/XeGPU/IR/XeGPUDialect.cpp
M mlir/lib/Dialect/XeGPU/IR/XeGPUOps.cpp
M mlir/test/Conversion/VectorToXeGPU/transfer-read-to-xegpu.mlir
M mlir/test/Conversion/VectorToXeGPU/transfer-write-to-xegpu.mlir
Log Message:
-----------
[mlir][xegpu] Add support for `vector.transfer_read/write` on SLM buffers (#192757)
Adds lowering support when `vector.transfer_read/write` operate on SLM
buffers. These ops will be lowered to `xegpu.load/store_matrix`
Commit: 689dc6c58c01613e956f405a79324f88dcb9a3dc
https://github.com/llvm/llvm-project/commit/689dc6c58c01613e956f405a79324f88dcb9a3dc
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2026-04-23 (Thu, 23 Apr 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenBuilder.cpp
M clang/lib/CIR/CodeGen/CIRGenExpr.cpp
M clang/test/CIR/CodeGen/amdgpu-array-addrspace.cpp
M clang/test/CIR/CodeGen/array-init-loop-exprs.cpp
M clang/test/CIR/CodeGen/array.cpp
M clang/test/CIR/CodeGen/binassign.c
M clang/test/CIR/CodeGen/complex.cpp
M clang/test/CIR/CodeGen/no-odr-use.cpp
M clang/test/CIR/CodeGen/pointers.cpp
M clang/test/CIR/CodeGen/union.c
M clang/test/CIR/CodeGen/vector-ext-element.cpp
M clang/test/CIR/CodeGen/vla.c
M clang/test/CIR/CodeGenBuiltins/builtin-constant-p.c
M clang/test/CIR/CodeGenOpenACC/combined-copy.c
Log Message:
-----------
[CIR] Handle boolean expression as array indexes (#193814)
We were hitting a CIR verification error in some cases when a boolean
expression was used as an index to an array because the GetElementOp
verifier expected the index operand to be a fundamental integer type. To
fix this, I'm updating the emitArraySubscriptExpr to cast index values
to ptrDiffTy, which more closely matches what classic codegen does in
the corrsponding code.
The improved alignment with the classic codegen implementation caused
some minor changes in generated IR that required some tests to be
updated.
Assisted-by: Cursor / claude-4.7-opus-high
Commit: 9473873906b611b484952e4ca9462c2d1c338dde
https://github.com/llvm/llvm-project/commit/9473873906b611b484952e4ca9462c2d1c338dde
Author: Naveen Seth Hanig <naveen.hanig at outlook.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M clang/include/clang/Basic/DiagnosticDriverKinds.td
M clang/include/clang/Driver/ModulesDriver.h
M clang/lib/Driver/Driver.cpp
M clang/lib/Driver/ModulesDriver.cpp
A clang/test/Driver/modules-driver-both-modules-types.cpp
A clang/test/Driver/modules-driver-cxx-modules-only.cpp
A clang/test/Driver/modules-driver-import-std.cpp
A clang/test/Driver/modules-driver-incompatible-options.cpp
Log Message:
-----------
Reapply "[clang][modules-driver] Add support for C++ named modules and `import std`" (#193815)
This reverts #193677 and relands #193312.
This adds basic support for explicit C++ named module builds, managed
natively by the Clang driver, including support for use of the Standard
library modules. This follows #187606, which adds the same for Clang
modules.
Current limitations:
- Standard library modules are still compiled to object files instead of
using the provided shared library. (This will be addressed in a
follow-up soon.)
- Caching is not supported yet (but likely to be added during the
upcoming GSoC cycle).
- Importing C++ standard library modules into Clang modules is not
supported (and not expected in the near term).
RFC:
https://discourse.llvm.org/t/rfc-modules-support-simple-c-20-modules-use-from-the-clang-driver-without-a-build-system
Commit: 3174c94eaf2066a3b565e59a4f9d8d30444d2cd7
https://github.com/llvm/llvm-project/commit/3174c94eaf2066a3b565e59a4f9d8d30444d2cd7
Author: Zhen Wang <zhenw at nvidia.com>
Date: 2026-04-23 (Thu, 23 Apr 2026)
Changed paths:
M flang/lib/Optimizer/Dialect/CMakeLists.txt
M flang/lib/Optimizer/Dialect/FIROps.cpp
R flang/test/Fir/array-coor-canonicalization-cuf.fir
Log Message:
-----------
Revert "[flang][cuda] Preserve fir.rebox captured by cuf.kernel in SimplifyArrayCoorOp" (#193855)
Reverts llvm/llvm-project#193837
Commit: 0d1bf3ac8eb10ecf062a938955637f8f809c0380
https://github.com/llvm/llvm-project/commit/0d1bf3ac8eb10ecf062a938955637f8f809c0380
Author: Deric C. <cheung.deric at gmail.com>
Date: 2026-04-23 (Thu, 23 Apr 2026)
Changed paths:
M clang/utils/TableGen/HLSLEmitter.cpp
Log Message:
-----------
[HLSL][NFC] Refactor worklist loop in HLSLEmitter.cpp to use index-based iteration (#193638)
As suggested by @shafik, the worklist loop in HLSLEmitter.cpp would be
more readable as an index-based for-loop as opposed to a range-based
for-loop. This PR changes the range-based for-loop over worklist items
into an index-based for-loop.
Commit: 0bdcf4ee4dd54f1b1f3bc36518f59dc8068b934f
https://github.com/llvm/llvm-project/commit/0bdcf4ee4dd54f1b1f3bc36518f59dc8068b934f
Author: Naveen Seth Hanig <naveen.hanig at outlook.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M clang/include/clang/Basic/DiagnosticDriverKinds.td
M clang/include/clang/Driver/ModulesDriver.h
M clang/lib/Driver/Driver.cpp
M clang/lib/Driver/ModulesDriver.cpp
R clang/test/Driver/modules-driver-both-modules-types.cpp
R clang/test/Driver/modules-driver-cxx-modules-only.cpp
R clang/test/Driver/modules-driver-import-std.cpp
R clang/test/Driver/modules-driver-incompatible-options.cpp
Log Message:
-----------
Revert "Reapply "[clang][modules-driver] Add support for C++ named modules and `import std`" (#193857)
Reverts llvm/llvm-project#193815 due to a test failure
(`clang/test/Driver/modules-driver-import-std.cpp`) on some systems.
Commit: 2a74f30cc20e11ef47a96965f3285ee0f991e3f1
https://github.com/llvm/llvm-project/commit/2a74f30cc20e11ef47a96965f3285ee0f991e3f1
Author: Andres-Salamanca <andrealebarbaritos at gmail.com>
Date: 2026-04-23 (Thu, 23 Apr 2026)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/lib/CIR/CodeGen/CIRGenBuiltin.cpp
M clang/lib/CIR/CodeGen/CIRGenCoroutine.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
M clang/lib/CIR/CodeGen/CIRGenModule.h
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
M clang/test/CIR/CodeGen/coro-task.cpp
M clang/test/CIR/IR/await.cir
A clang/test/CIR/IR/co-return.cir
A clang/test/CIR/IR/coro-body.cir
M clang/test/CIR/IR/func.cir
M clang/test/CIR/IR/invalid-await.cir
A clang/test/CIR/IR/invalid-co-return.cir
A clang/test/CIR/IR/invalid-coro-body.cir
Log Message:
-----------
[CIR] Add coroutine cleanup handling and update co_return semantics (#189281)
This PR adds cleanup handling for coroutine frame destruction. The
cleanup is emitted as a conditional that checks the result of the
`coro.free` builtin, which is used to determine whether the coroutine
frame was heap-allocated, if the returned pointer is null, no
destruction is performed. Additionally, this PR changes how co_return is
represented: previously, it was lowered directly into a branch to the
block containing the final suspend logic, but now a new `cir.coro.body`
operation is introduced to represent the user-written coroutine body.
Inside this region, `cir.co_return` operations mark exits from the
coroutine body and represent structured control flow that transfers
execution to the final suspend point. The lowering of this structured
control flow into explicit branches is deferred to a future PR in the
FlattenCFG pass.
Commit: 6b4cdb036471a493f1e16fa73d4e86e36fd75b55
https://github.com/llvm/llvm-project/commit/6b4cdb036471a493f1e16fa73d4e86e36fd75b55
Author: Nico Weber <thakis at chromium.org>
Date: 2026-04-23 (Thu, 23 Apr 2026)
Changed paths:
M llvm/utils/gn/secondary/lldb/test/BUILD.gn
Log Message:
-----------
Revert "[gn] port 40fcd2517a110 (#193293)" (#193860)
This reverts commit dd5632f51d3f36d08b125193c067a813aac26823.
40fcd2517a110 was reverted in 39865a002e6b51.
Commit: 4f877e47e69b59ffd4baecb6b68e70c76f428316
https://github.com/llvm/llvm-project/commit/4f877e47e69b59ffd4baecb6b68e70c76f428316
Author: Nico Weber <thakis at chromium.org>
Date: 2026-04-23 (Thu, 23 Apr 2026)
Changed paths:
M llvm/utils/gn/secondary/libcxx/include/BUILD.gn
Log Message:
-----------
[gn build] Port 2039a51881bb (#193861)
Commit: 0cd635ca45048a50c22f3e94a3d3ad0a2a54b59a
https://github.com/llvm/llvm-project/commit/0cd635ca45048a50c22f3e94a3d3ad0a2a54b59a
Author: Nico Weber <thakis at chromium.org>
Date: 2026-04-23 (Thu, 23 Apr 2026)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/Transforms/Vectorize/BUILD.gn
Log Message:
-----------
[gn build] Port d64dd5a2afea (#193865)
Commit: 9b7b83b3499bb34a909c8a58eaeea40eeb02e2fa
https://github.com/llvm/llvm-project/commit/9b7b83b3499bb34a909c8a58eaeea40eeb02e2fa
Author: Nico Weber <thakis at chromium.org>
Date: 2026-04-23 (Thu, 23 Apr 2026)
Changed paths:
M llvm/utils/gn/secondary/libcxx/src/BUILD.gn
Log Message:
-----------
[gn build] Port d137e6601f1c (#193864)
Commit: 2611f151c3a493d10d6f9eeffa792014da174120
https://github.com/llvm/llvm-project/commit/2611f151c3a493d10d6f9eeffa792014da174120
Author: Nico Weber <thakis at chromium.org>
Date: 2026-04-23 (Thu, 23 Apr 2026)
Changed paths:
M llvm/utils/gn/secondary/clang/lib/ScalableStaticAnalysisFramework/Analyses/BUILD.gn
Log Message:
-----------
[gn build] Port a4538a3ad902 (#193863)
Commit: deb238e224b79a898820a355b8be0254c3676b53
https://github.com/llvm/llvm-project/commit/deb238e224b79a898820a355b8be0254c3676b53
Author: Nico Weber <thakis at chromium.org>
Date: 2026-04-23 (Thu, 23 Apr 2026)
Changed paths:
M llvm/utils/gn/secondary/llvm/unittests/MC/BUILD.gn
Log Message:
-----------
[gn build] Port 3081d52d8242 (#193862)
Commit: c6b9984435899562ce6eee513d098ea9875d0202
https://github.com/llvm/llvm-project/commit/c6b9984435899562ce6eee513d098ea9875d0202
Author: Shafik Yaghmour <shafik.yaghmour at intel.com>
Date: 2026-04-23 (Thu, 23 Apr 2026)
Changed paths:
M clang/include/clang/Sema/Sema.h
Log Message:
-----------
[NFC][Clang][Sema] Apply rule of three to Sema helper classes (#193835)
Static analysis flagged these classes. They declared a destructor but
not copy constructor or copy assignment. Since these classes don't need
them, this change declares them deleted.
Commit: a95a1c40edbabaee15285323ccbc74e83611314f
https://github.com/llvm/llvm-project/commit/a95a1c40edbabaee15285323ccbc74e83611314f
Author: Jim Lin <jim at andestech.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M llvm/lib/Analysis/LazyValueInfo.cpp
M llvm/test/Transforms/CorrelatedValuePropagation/vectors.ll
Log Message:
-----------
[LazyValueInfo] Support vector types in ICmp condition handling (#192900)
Use m_APInt matcher instead of ConstantInt dyn_cast so splat vector
constants are handled, and relax the integer type check to accept
integer vector types.
Fixes https://github.com/llvm/llvm-project/issues/192094
Commit: f3192382c33691e4d3cff07ab645aad3343de81b
https://github.com/llvm/llvm-project/commit/f3192382c33691e4d3cff07ab645aad3343de81b
Author: Wenju He <wenju.he at intel.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M libclc/cmake/modules/CMakeDetermineCLCCompiler.cmake
Log Message:
-----------
[libclc][CMake] Remove CMAKE_C_COMPILER_ID check (#186717)
When LLVM_TARGETS_TO_BUILD does not contain the host target, runtime
build can not identify a compatible target triple for the host compiler.
CMAKE_C_COMPILER is set to clang, and CMAKE_C_COMPILER_ID is empty
although the compiler is functional.
Remove CMAKE_C_COMPILER_ID check. CMakeTestCLCCompiler.cmake already
provides a real functional guard.
This change ensures valid configurations can proceed, e.g.:
LLVM_TARGETS_TO_BUILD=AMDGPU;
RUNTIMES_amdgcn-amd-amdhsa-llvm_LLVM_ENABLE_RUNTIMES=libclc;
LLVM_RUNTIME_TARGETS="amdgcn-amd-amdhsa-llvm".
Note CMAKE_C_COMPILER_WORKS is always true after `project(Runtimes C CXX
ASM)` in runtimes/CMakeLists.txt.
Commit: 969247cc47a35ad73155f97f7d66c3f558ea96c5
https://github.com/llvm/llvm-project/commit/969247cc47a35ad73155f97f7d66c3f558ea96c5
Author: Wenju He <wenju.he at intel.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M libclc/CMakeLists.txt
M libclc/test/CMakeLists.txt
Log Message:
-----------
[libclc] Allow testing unresolved symbols on multiple libraries (#193647)
Our downstream generates multiple libraries for a single target. This
change allows testing multiple libraries.
Commit: 528e673fec477b087bf55da282585a9ed20b809a
https://github.com/llvm/llvm-project/commit/528e673fec477b087bf55da282585a9ed20b809a
Author: Vigneshwar Jayakumar <vigneshwar.jayakumar at amd.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M clang/lib/CodeGen/CGCall.cpp
A clang/test/CodeGenHIP/sret-lifetime-markers.cpp
Log Message:
-----------
[Clang][CodeGen] Fix sret lifetime marker AS mismatch after #186275 (#193850)
After #186275, the sret address space can differ from the alloca address
space (e.g., AS 0 vs AS 5 on AMDGPU). In CGCall.cpp EmitCall(), when a
discarded-value sret temporary is created, SRetPtr is allocated in the
alloca AS and a lifetime.start is emitted. The pointer is then
addrspacecast'd to match the sret AS, but the CallLifetimeEnd cleanup
was using the addrspacecast'd pointer, triggering an assertion in
EmitLifetimeEnd ("Pointer should be in alloca address space").
Saves the original alloca pointer before the addrspacecast and uses it
for the lifetime-end cleanup.
Fixes buildbot failure: hip-third-party-libs-tests
Commit: 6e2f5e9679cd03a84ab0dcca32ec9e782c83413f
https://github.com/llvm/llvm-project/commit/6e2f5e9679cd03a84ab0dcca32ec9e782c83413f
Author: Wenju He <wenju.he at intel.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/lib/Sema/SemaType.cpp
M clang/test/Misc/languageOptsOpenCL.cl
A clang/test/SemaOpenCL/zero-length-array.cl
Log Message:
-----------
[OpenCL] Diagnose error for zero-length array (#193163)
OpenCL C is based on C99 and C11, which don't support zero-length array.
Update clang/docs/ReleaseNotes.rst for potential breaking change.
Commit: e3ab3688e1c60f4484e20f84325e82bf12776495
https://github.com/llvm/llvm-project/commit/e3ab3688e1c60f4484e20f84325e82bf12776495
Author: Haohai Wen <haohai.wen at intel.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/test/Driver/basic-block-address-map.c
M llvm/lib/MC/MCObjectFileInfo.cpp
M llvm/test/CodeGen/X86/basic-block-address-map-function-sections.ll
M llvm/test/CodeGen/X86/basic-block-address-map.ll
Log Message:
-----------
[X86][COFF] Enable basic-block-address-map emission (#191347)
Enable -fbasic-block-address-map fo X86 COFF.
Add COFF section creation for .llvm_bb_addr_map.
Commit: 67e1411de83682ef15527499eb5891745c59431b
https://github.com/llvm/llvm-project/commit/67e1411de83682ef15527499eb5891745c59431b
Author: Luke Lau <luke at igalia.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/test/Transforms/LoopVectorize/RISCV/iv-select-cmp.ll
Log Message:
-----------
[VPlan] Fold lhs | (headermask && rhs) -> vp.merge rhs, true, lhs, evl (#193511)
This is a combine on mask vectors that can show up with EVL tail
folding.
Split off from #190196
Commit: 61b0de5f14a3474f0fedfdb228b3dea8eac5d9fb
https://github.com/llvm/llvm-project/commit/61b0de5f14a3474f0fedfdb228b3dea8eac5d9fb
Author: Luke Lau <luke at igalia.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
Log Message:
-----------
[RISCV] Remove codegen for vp_fneg, vp_fma. NFC (#193214)
Part of the work to remove trivial VP intrinsics from the RISC-V
backend, see
https://discourse.llvm.org/t/rfc-remove-codegen-support-for-trivial-vp-intrinsics-in-the-risc-v-backend/87999
We began expanding these nodes in #190589 since vp_fadd/vp_fmul/vp_fsub
could be combined into them. Now that these intrinsics are expanded too,
the lowering for these is dead and can be removed.
Commit: 1249cb6aea8893c3d2ba7221697b68b0ef4520e9
https://github.com/llvm/llvm-project/commit/1249cb6aea8893c3d2ba7221697b68b0ef4520e9
Author: Katya Romanova <56653669+romanova-ekaterina at users.noreply.github.com>
Date: 2026-04-23 (Thu, 23 Apr 2026)
Changed paths:
A clang/test/ClangScanDeps/p1689-mf-nested-dir.c
M clang/tools/clang-scan-deps/ClangScanDeps.cpp
Log Message:
-----------
[clang-scan-deps] Fixes an assertion in clang-scan-deps (#193619)
Please see ticket #191921 for detailed description of the issue and a reproducer.
clang-scan-deps crashes with an assertion failure if a compile_commands.json entry contains a depfile path (-MF) whose parent directory does not exist.
The fix is made so that clang-scan-deps tool create the directory if it doesn't exist and finish execution without failing.
Commit: af166f419fb94ce87c6ff553ad2042b114fdb057
https://github.com/llvm/llvm-project/commit/af166f419fb94ce87c6ff553ad2042b114fdb057
Author: Zhaoxin Yang <yangzhaoxin at loongson.cn>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
A llvm/test/CodeGen/LoongArch/lasx/ir-instruction/fpext.ll
A llvm/test/CodeGen/LoongArch/lsx/ir-instruction/fpext.ll
Log Message:
-----------
[LoongArch][NFC] Pre-commit tests for vector fpext from vxf32 to vxf64 (#164740)
Commit: 28d2537af2b618c5ef942f54101832a185acd2f9
https://github.com/llvm/llvm-project/commit/28d2537af2b618c5ef942f54101832a185acd2f9
Author: Chuanqi Xu <yedeng.yd at linux.alibaba.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M clang-tools-extra/clangd/ModulesBuilder.cpp
M clang-tools-extra/clangd/unittests/PrerequisiteModulesTest.cpp
Log Message:
-----------
[clangd] [C++20] [Modules] Introduce persistent cache for clangd built module file (#193883)
Currently clangd lacks a persistent cache for clangd built module file.
It implies that every time a new clangd process starts, or a user close
all tabs and opening all a new tab. Clangd will build all the module
files required. This is a slow process. Especially, the building happens
in the building thread for the opening tab. That is, if the user only
opens a single tab, clangd needs to build all the module file in a
single thread. This is very slow in practice.
As clangd is basically a wrapper for clang, we can't do nothing to speed
the building process actually and the only thing we can do is to
introduce a better cache mechanism.
So everytime the user opens a new tab, now clangd won't try to build all
the needed module file at first but try to see if these module files are
already built and up-to-date. So clangd can try to avoid a lot of time
to rebuilding the same thing.
For details,
now the built module file will live in
<cache-root>/<module-unit-source-name>-<source-hash>/<command-hash>/<module-name>[-<version>].pcm
Here <cache-root> stands for
<path-to-compilation-database>/.cache/clangd/modules or
<user-home>/.cache/clangd/modules
the <source-hash> in <module-unit-source-name>-<source-hash> means the
hash of the path of the corresponding module unit, as we can have
different a.cppm in different directories in a project.
<command-hash> means the hash of the command. As we can produce
different BMI with different command.
Then <module-name>.pcm means the newest BMI. And
<module-name>-<version>.pcm means a CopyOnRead BMI of <module-name>.pcm.
We did this to ease the concurrency management. As now, we can be sure
<module-name>.pcm won't be used by anyone in clangd itself.
TODO: We didn't implement a GC so that cache size may increase
consistently. We will didi that in following patches.
AI assisted.
Commit: 70fcb235250bf125f478e4a8f439164dd18ad402
https://github.com/llvm/llvm-project/commit/70fcb235250bf125f478e4a8f439164dd18ad402
Author: Med Ismail Bennani <ismail at bennani.ma>
Date: 2026-04-23 (Thu, 23 Apr 2026)
Changed paths:
M lldb/packages/Python/lldbsuite/test/lldbtest.py
Log Message:
-----------
[lldb/test] Fix TestCompletion on Windows after realpath change (#193878)
Commit: eef81b7a0a6376aedadb23bab73e2af0ce3b8097
https://github.com/llvm/llvm-project/commit/eef81b7a0a6376aedadb23bab73e2af0ce3b8097
Author: Med Ismail Bennani <ismail at bennani.ma>
Date: 2026-04-23 (Thu, 23 Apr 2026)
Changed paths:
M lldb/test/API/functionalities/target-new-solib-notifications/TestModuleLoadedNotifys.py
Log Message:
-----------
[lldb/test] Fix TestModuleLoadedNotifys duplicate module check (#193846)
Commit: dbaa12a89f450d32a889f2c0ceac0b5bf1512245
https://github.com/llvm/llvm-project/commit/dbaa12a89f450d32a889f2c0ceac0b5bf1512245
Author: Changpeng Fang <changpeng.fang at amd.com>
Date: 2026-04-23 (Thu, 23 Apr 2026)
Changed paths:
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3p.s
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop3p.txt
Log Message:
-----------
[AMDGPU] Add MC tests for scalar operands for packed fp32 instructions (#193866)
To remind that a SGPR is acceptable only if op_sel = op_sel_hi = 0 for that operand.
Note that the default is op_sel = 0 and op_sel_hi = 1.
Commit: 104ee2aed28df595a90a7869f1af5f369b0b795b
https://github.com/llvm/llvm-project/commit/104ee2aed28df595a90a7869f1af5f369b0b795b
Author: Chuanqi Xu <yedeng.yd at linux.alibaba.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M clang-tools-extra/clangd/unittests/PrerequisiteModulesTest.cpp
Log Message:
-----------
[NFC] [clangd] [C++20] [Modules] Add a test for testing transtive change detection (#193888)
Commit: 5d4b17e963b1dcdfc87df1603f9405f5454addce
https://github.com/llvm/llvm-project/commit/5d4b17e963b1dcdfc87df1603f9405f5454addce
Author: Vigneshwar Jayakumar <vigneshwar.jayakumar at amd.com>
Date: 2026-04-23 (Thu, 23 Apr 2026)
Changed paths:
M clang/lib/CodeGen/Targets/SPIR.cpp
M clang/test/CodeGenCXX/no-elide-constructors.cpp
M clang/test/CodeGenHIP/sret-lifetime-markers.cpp
M clang/test/CodeGenHIP/sret-nontrivial-copyable.hip
M clang/test/CodeGenHIP/store-addr-space.hip
Log Message:
-----------
[Clang][SPIRV] Add getSRetAddrSpace() for SPIRV (#193875)
Override getSRetAddrSpace() so that sret pointers for non-trivially-
copyable types use the generic address space (addrspace 4), matching the
"this" pointer convention on spirv64-amd-amdhsa.
Commit: aadf3959eb0d0fedc82fb6a31038b05329d13dfa
https://github.com/llvm/llvm-project/commit/aadf3959eb0d0fedc82fb6a31038b05329d13dfa
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-04-23 (Thu, 23 Apr 2026)
Changed paths:
M .github/workflows/libcxx-build-and-test.yaml
M libcxx/utils/ci/run-buildbot
Log Message:
-----------
[libcxx][Github] Add generic-llvm-libc config to CI (#193822)
Add the generic-llvm-libc config for CI so that we can ensure we do not
regress the config and easily test changes as we do more work.
Only run libcxx/libxxabi tests for now as libunwind fails to build due
to a missing dl_iterate_phdr implementation. It technically passes when
we enable the stub implementation, but we should have a reasonable
implementation before actually enabling.
Commit: 3041708a17b32273a3fb9ae069f654cc842349fa
https://github.com/llvm/llvm-project/commit/3041708a17b32273a3fb9ae069f654cc842349fa
Author: Zeyi Xu <mitchell.xu2 at gmail.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M clang-tools-extra/clang-change-namespace/tool/ClangChangeNamespace.cpp
M clang-tools-extra/clang-include-fixer/find-all-symbols/tool/FindAllSymbolsMain.cpp
M clang-tools-extra/clang-include-fixer/tool/ClangIncludeFixer.cpp
M clang-tools-extra/clang-move/tool/ClangMove.cpp
M clang-tools-extra/clang-reorder-fields/tool/ClangReorderFields.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
A clang-tools-extra/test/clang-change-namespace/argument-parsing-error-no-abort.cpp
A clang-tools-extra/test/clang-include-fixer/argument-parsing-error-no-abort.cpp
A clang-tools-extra/test/clang-include-fixer/find-all-symbols/argument-parsing-error-no-abort.cpp
A clang-tools-extra/test/clang-move/argument-parsing-error-no-abort.cpp
A clang-tools-extra/test/clang-reorder-fields/argument-parsing-error-no-abort.cpp
M clang/include/clang/Tooling/CommonOptionsParser.h
A clang/test/Refactor/argument-parsing-error-no-abort.cpp
A clang/test/Tooling/argument-parsing-error-no-abort.cpp
M clang/tools/clang-check/ClangCheck.cpp
M clang/tools/clang-refactor/ClangRefactor.cpp
Log Message:
-----------
[Tooling][clang-tools-extra] Consume CommonOptionsParser errors in tools (#193675)
Several LibTooling-based tools printed errors returned from
CommonOptionsParser::create() directly. However, printing an
`llvm::Error` does not consume it, so argument parsing failures such as
unknown tool options could abort. This commit fixes the problem.
Closes https://github.com/llvm/llvm-project/issues/183009
Commit: a7368c3b48f892787590c7010bf1da03c62938ba
https://github.com/llvm/llvm-project/commit/a7368c3b48f892787590c7010bf1da03c62938ba
Author: Corentin Jabot <corentinjabot at gmail.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M clang/www/cxx_status.html
Log Message:
-----------
[NFC][Clang][docs] Clarify the status of P1949R7 (unicode identifiers) (#193483)
Clang does not check identifiers are NFC-normalized, which the standard
requires.
Commit: 347f1ac86d54460c797d97ac5afc84358c10d4d7
https://github.com/llvm/llvm-project/commit/347f1ac86d54460c797d97ac5afc84358c10d4d7
Author: Princeton Ferro <pferro at nvidia.com>
Date: 2026-04-23 (Thu, 23 Apr 2026)
Changed paths:
M mlir/include/mlir/Dialect/Vector/IR/VectorOps.td
M mlir/lib/Dialect/Vector/IR/VectorOps.cpp
M mlir/lib/Dialect/Vector/Transforms/LowerVectorContract.cpp
M mlir/test/Dialect/Vector/vector-contract-to-dot-transforms.mlir
Log Message:
-----------
[MLIR][Vector] Add fastmath attribute to vector.contract (#192788)
`vector.contract` has no fastmath attribute, making it impossible to
propagate fast-math flags to lowered ops. This can help backends that
rely on flags like `contract` to enable FMA fusion.
This change adds a `fastmath` attribute to `vector::ContractionOp` and
propagates it to lowered operations.
Commit: e7e85a744871820febdf58e75a2d1c351d5551e1
https://github.com/llvm/llvm-project/commit/e7e85a744871820febdf58e75a2d1c351d5551e1
Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M llvm/docs/LangRef.rst
M llvm/include/llvm/CodeGen/BasicTTIImpl.h
M llvm/include/llvm/CodeGen/TargetLowering.h
M llvm/include/llvm/IR/Intrinsics.td
M llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/test/Analysis/CostModel/AArch64/loop_dependence_mask.ll
M llvm/test/CodeGen/AArch64/alias_mask.ll
A llvm/test/CodeGen/AArch64/alias_mask_i128.ll
M llvm/test/CodeGen/AArch64/alias_mask_nosve.ll
M llvm/test/CodeGen/AArch64/alias_mask_scalable.ll
M llvm/test/CodeGen/AArch64/alias_mask_scalable_nosve2.ll
Log Message:
-----------
[IR] Remove pointer arguments from loop.dependence.{war|raw}.mask (#188248)
Passing pointer arguments is quite inconvenient for practical use. These
intrinincs only care about the difference between the address bits of
two pointers, but by taking pointer arguments it is implying they care
about other details of the pointers (such as addrspace, or other pointer
bits).
This metadata is currently not preserved when gathering diff checks in
the loop vectorizer, so requiring pointers makes emitting these
intrinsic more complex (or requires preserving information that is
ultimately unused).
Commit: b565800d99a4b4b151a5ec3f5cbe35a7203db17d
https://github.com/llvm/llvm-project/commit/b565800d99a4b4b151a5ec3f5cbe35a7203db17d
Author: GeorgeHuyubo <113479859+GeorgeHuyubo at users.noreply.github.com>
Date: 2026-04-23 (Thu, 23 Apr 2026)
Changed paths:
M lldb/test/API/functionalities/statusline/TestStatusline.py
Log Message:
-----------
[lldb] Add regression test for stale Symbol pointer crash in statusline (#193854)
Add a test that exercises the code path fixed in
[88f024223cc4](https://github.com/llvm/llvm-project/pull/188377)
("[lldb] Fix stale Symbol pointer crash in statusline after 'target
symbols add'").
The bug: when `target symbols add` is called, `Symtab::AddSymbol()` can
reallocate the underlying `std::vector<Symbol>`, invalidating all
existing `Symbol*` pointers. The statusline caches an
`ExecutionContextRef` containing a `StackID` with a
`SymbolContextScope*` (which can be a `Symbol*`). If a concurrent
statusline redraw occurs between the Symtab reallocation and
`Process::Flush()` (e.g. from a progress event on the event handler
thread), the cached `StackID` matches the old frame via pointer-equal
comparison, and `GetSymbolContext()` dereferences the dangling
`Symbol*`.
The test:
1. Builds a stripped binary and its unstripped counterpart.
2. Runs the stripped binary and stops at a breakpoint in `main`.
3. Enables the statusline (populating the cached `ExecutionContextRef`).
4. Calls `target symbols add` to add debug symbols back.
5. Forces a statusline redraw via terminal resize, which calls
`Redraw(std::nullopt)` using the cached (potentially stale) execution
context.
6. Verifies the statusline still renders correctly.
The dangling pointer is a use-after-free that silently succeeds in
non-sanitizer builds (the freed memory is still accessible). This test
is most effective under AddressSanitizer, which poisons freed memory and
immediately detects the stale access.
Co-authored-by: George Hu <georgehuyubo at gmail.com>
Commit: 99c9a1f566df3ab4f37e156b62afd1d743882de0
https://github.com/llvm/llvm-project/commit/99c9a1f566df3ab4f37e156b62afd1d743882de0
Author: ioana ghiban <ioana.ghiban at arm.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
A mlir/test/Dialect/EmitC/arith/ops.mlir
Log Message:
-----------
[mlir][EmitC] Add tests for arith.max/min float/signed int conversions (#190160)
This patch adds test coverage for the combined `-arith-expand |
-convert-arith-to-emitc` pipeline for selected `arith` max/min operations.
The new tests exercise:
- `arith.maximumf`
- `arith.minimumf`
- `arith.minsi`
- `arith.maxsi`
The intent is not to re-test the individual passes in isolation. Expansion is
already covered in `test/Dialect/Arith/expand-ops.mlir`, and the direct
Arith-to-EmitC lowering is already covered in
`test/Conversion/ArithToEmitC/arith-to-emitc.mlir`. This patch specifically
checks that the combined pipeline produces the expected EmitC operations after
expansion.
For floating-point max/min, the test verifies the expanded form lowers to the
expected sequence of `emitc.cmp`, `emitc.logical_or`, and `emitc.conditional`
operations. For signed integer min/max, it verifies lowering to the expected
`emitc.cmp` and `emitc.conditional` sequence.
The test also documents currently unsupported cases for the combined pipeline:
vector cases are excluded because expansion introduces `arith.cmpf`, and
`ArithToEmitC` does not convert `VectorType`; tensor cases are excluded because
`ArithToEmitC` only lowers scalar `cmpf`.
Assisted-by: Codex (refine tests and comments).
I reviewed all code and tests before submission.
Commit: b5483871391b098cb3ec051b871ff3d307c12e71
https://github.com/llvm/llvm-project/commit/b5483871391b098cb3ec051b871ff3d307c12e71
Author: Mel Chen <mel.chen at sifive.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/test/Transforms/LoopVectorize/RISCV/first-order-recurrence-scalable-vf1.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-fixed-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence-tail-folding.ll
M llvm/test/Transforms/LoopVectorize/optsize.ll
M llvm/test/Transforms/LoopVectorize/tail-folding-vectorization-factor-1.ll
Log Message:
-----------
[LV] Simplify live-out extraction for first-order recurrence phis when tail folding (#176108)
The idea is similar to ba40a7bc2e65be86ac23c9cf6038ac085dda77eb. Due to
tail folding, the recurrence vector in the final iteration may contain
only a single active element, making it impossible to extract the
penultimate active element. This patch instead directly extracts the
last active element from the vector produced by splicing the recurrence
phi and the previous value, without needing to select which value to
extract based on the number of active lanes.
Commit: 0d332848bf287a3320f7a432368cd14f2ffe944d
https://github.com/llvm/llvm-project/commit/0d332848bf287a3320f7a432368cd14f2ffe944d
Author: Juan Manuel Martinez Caamaño <jmartinezcaamao at gmail.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M llvm/include/llvm/IR/IntrinsicsSPIRV.td
M llvm/lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp
M llvm/lib/Target/SPIRV/SPIRVISelLowering.cpp
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
M llvm/lib/Target/SPIRV/SPIRVTypeInst.cpp
M llvm/lib/Target/SPIRV/SPIRVTypeInst.h
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_memory_access_aliasing/alias-load-store-atomic.ll
A llvm/test/CodeGen/SPIRV/transcoding/atomic-load-store-unsupported.ll
M llvm/test/CodeGen/SPIRV/transcoding/load-atomic.ll
M llvm/test/CodeGen/SPIRV/transcoding/store-atomic.ll
Log Message:
-----------
[SPIRV] Lower load/store atomic to OpAtomicLoad/OpAtomicStore (#185696)
Lower LLVM's `load atomic` `store atomic` as `OpAtomicStore` and
`OpAtomicLoad`.
Closes #185629
Commit: 7758ee59e7a2653fb26c29ecc7ce7bbd00e66091
https://github.com/llvm/llvm-project/commit/7758ee59e7a2653fb26c29ecc7ce7bbd00e66091
Author: Jeff Bailey <jbailey at raspberryginger.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M libc/test/src/time/mktime_test.cpp
Log Message:
-----------
[libc] Fix implicit conversion warning in mktime_test (#193504)
Specified template argument time_t for Succeeds and Fails in
mktime_test.cpp to avoid implicit conversion warnings when matching
time_t results on 64-bit systems.
Commit: 65e766dfda81c12a26750adc21bec7f13166a42f
https://github.com/llvm/llvm-project/commit/65e766dfda81c12a26750adc21bec7f13166a42f
Author: Jeff Bailey <jbailey at raspberryginger.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M libc/cmake/modules/prepare_libc_gpu_build.cmake
M libc/test/lit.site.cfg.py.in
Log Message:
-----------
[libc] Honour LIBC_GPU_TEST_JOBS in lit test runs (#193797)
Under CTest, LIBC_GPU_TEST_JOBS controlled a ninja job pool that limited
concurrent GPU test processes. The AMD GPU buildbot sets this to 4 to
avoid overloading the GPU driver.
When running tests via lit, this constraint was lost because lit uses
its own -j flag (defaulting to nproc, or set to 64 on the AMD bot via
LLVM_LIT_ARGS). All GPU loader processes launched simultaneously,
leading to hangs from GPU resource exhaustion.
Propagated LIBC_GPU_TEST_JOBS into the lit site config as a parallelism
group so lit throttles GPU test concurrency independently of the global
-j setting.
Commit: fc9f14e424229e3e90494921e1cb7e5575064ac7
https://github.com/llvm/llvm-project/commit/fc9f14e424229e3e90494921e1cb7e5575064ac7
Author: Jeff Bailey <jbailey at raspberryginger.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M libc/test/CMakeLists.txt
M libc/test/include/CMakeLists.txt
M libc/test/integration/CMakeLists.txt
Log Message:
-----------
[libc] Switch check-libc from CTest to lit (#193798)
Renamed check-libc-lit to check-libc, replacing the old CTest-driven
target. Dependencies now use -build targets (e.g.
libc-hermetic-tests-build) so that check-libc only builds test
executables and delegates execution to lit.
Commit: e4f1530edcc95a41e8fd8d13dca295aad814f75d
https://github.com/llvm/llvm-project/commit/e4f1530edcc95a41e8fd8d13dca295aad814f75d
Author: jeanPerier <jperier at nvidia.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M flang/include/flang/Optimizer/Dialect/FIROps.td
M flang/include/flang/Optimizer/Transforms/Passes.td
M flang/lib/Optimizer/CodeGen/CodeGen.cpp
M flang/lib/Optimizer/Passes/Pipelines.cpp
M flang/lib/Optimizer/Transforms/AddDebugInfo.cpp
A flang/test/Fir/fake_use-codegen.fir
A flang/test/Transforms/debug-fake-use.fir
Log Message:
-----------
[flang][debug] generate llvm.fake.use for arguments at -g and O0 (#187044)
Fix for https://github.com/llvm/llvm-project/issues/185432.
This patch extends the lifetime of procedure dummy arguments using llvm.fake.use
so that they are accessible in debugger during the whole lifetime of the function.
This is done by:
- adding a new fir.fake_use operation and emitting it in AddDebugInfo.cpp for
dummy arguments at the end of the procedure scope.
- lower this new fir.fake_use to the llvm.fake.use intrinsic.
This is done under -g at O0 only to avoid pessimizing the generated code when
optimizations are requested.
Commit: 248192d5bef14428ab7cbaa2e1c9e70109fb0747
https://github.com/llvm/llvm-project/commit/248192d5bef14428ab7cbaa2e1c9e70109fb0747
Author: Boyao Wang <wangboyao at bytedance.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-deinterleave2.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-zipeven-zipodd.ll
M llvm/test/CodeGen/RISCV/rvv/vector-deinterleave-fixed.ll
M llvm/test/CodeGen/RISCV/rvv/vector-interleave-fixed.ll
Log Message:
-----------
[RISCV] Add bf16 tests for interleave and deinterleave (#193720)
Add missing bf16 tests for interleave and deinterleave
Commit: 6c16fc8a1a1d6eba2b368fc981a3b943abb5018a
https://github.com/llvm/llvm-project/commit/6c16fc8a1a1d6eba2b368fc981a3b943abb5018a
Author: David Spickett <david.spickett at arm.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M lldb/test/API/commands/breakpoint/command/list/TestBreakpointCommandList.py
M lldb/test/API/commands/command/container/TestContainerCommands.py
M lldb/test/API/commands/command/delete/TestCommandDelete.py
M lldb/test/API/commands/command/invalid-args/TestInvalidArgsCommand.py
M lldb/test/API/commands/expression/dont_allow_jit/TestAllowJIT.py
M lldb/test/API/commands/frame/recognizer/TestFrameRecognizer.py
M lldb/test/API/commands/log/invalid-args/TestInvalidArgsLog.py
M lldb/test/API/commands/process/signal/TestProcessSignal.py
M lldb/test/API/commands/register/register_command/TestRegisters.py
M lldb/test/API/commands/target/modules/search-paths/insert/TestTargetModulesSearchpathsInsert.py
M lldb/test/API/commands/target/stop-hook/delete/TestTargetStopHookDelete.py
M lldb/test/API/commands/target/stop-hook/disable/TestTargetStopHookDisable.py
M lldb/test/API/commands/target/stop-hook/enable/TestTargetStopHookEnable.py
M lldb/test/API/commands/thread/select/TestThreadSelect.py
M lldb/test/API/functionalities/breakpoint/breakpoint_command/TestBreakpointCommand.py
M lldb/test/API/functionalities/gdb_remote_client/TestGDBServerTargetXML.py
M lldb/test/Shell/Commands/list-header.test
M lldb/test/Shell/Minidump/disassemble-no-module.yaml
Log Message:
-----------
[lldb][test] Remove full stop from expected error messages (#193748)
I am about to update a bunch of uses of AppendErrorWithFormat to not
have a full stop at the end, to confirm to
https://llvm.org/docs/CodingStandards.html#error-and-warning-messages.
Reviewing all those changes is going to be difficult so I am updating
the tests first and then we can land the other changes in batches
(because the tests will continue to pass as we do that).
Note that I have only run the test suite on Linux AArch64, so there are
probably more that need to be updated. We will catch those in CI or
post-commit.
Commit: 6114cbb611c8183798e43118a0cca73293241b02
https://github.com/llvm/llvm-project/commit/6114cbb611c8183798e43118a0cca73293241b02
Author: Harald van Dijk <hdijk at accesssoftek.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M llvm/lib/Target/DirectX/DXILWriter/DXILValueEnumerator.cpp
Log Message:
-----------
[DirectX] Fix debug dump of ValueEnumerator (#191251)
Consistently print to OS, and do not try to print uses of values without
a use list.
Commit: eb6eb9fa0a0c02c43b800d6b5d44b6b92333b65a
https://github.com/llvm/llvm-project/commit/eb6eb9fa0a0c02c43b800d6b5d44b6b92333b65a
Author: Harald van Dijk <hdijk at accesssoftek.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M llvm/lib/Target/DirectX/DXILPrepare.cpp
M llvm/test/tools/dxil-dis/debug-info.ll
Log Message:
-----------
[DirectX] Convert debug values to old style (#192162)
Commit: 8b3eac05aa742730a89889e90c375ad1f7359fe0
https://github.com/llvm/llvm-project/commit/8b3eac05aa742730a89889e90c375ad1f7359fe0
Author: Harald van Dijk <hdijk at accesssoftek.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M llvm/lib/Target/DirectX/DXILWriter/DXILBitcodeWriter.cpp
A llvm/test/tools/dxil-dis/di-compile-unit-versioned-language.ll
Log Message:
-----------
[DirectX] Convert DICompileUnit versioned language (#192574)
Versioned languages did not exist in LLVM 3.7.
Commit: 3de31988417de7a733d56d5be21405366b507f63
https://github.com/llvm/llvm-project/commit/3de31988417de7a733d56d5be21405366b507f63
Author: Harald van Dijk <hdijk at accesssoftek.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M llvm/lib/Target/DirectX/DXILWriter/DXILBitcodeWriter.cpp
A llvm/test/tools/dxil-dis/vla.ll
Log Message:
-----------
[DirectX] Replace non-const count of DISubrange with -1 (#192576)
Non-const count is only emitted for C99 VLA, which are not supported.
Co-authored-by: Andrew Savonichev <andrew.savonichev at gmail.com>
Commit: efffb04c2b7b2528308f68ca24906048781298c0
https://github.com/llvm/llvm-project/commit/efffb04c2b7b2528308f68ca24906048781298c0
Author: Harald van Dijk <hdijk at accesssoftek.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M llvm/lib/Target/DirectX/DXILWriter/DXILBitcodeWriter.cpp
M llvm/test/tools/dxil-dis/debug-info.ll
Log Message:
-----------
[DirectX] Fix DILocalVariable (#192573)
LLVM 3.7 did not allow the DW_TAG_variable tag for them and had two
custom tags instead.
Commit: 347aa3f6fbcc48cd752d02aa581b74c33d18dd41
https://github.com/llvm/llvm-project/commit/347aa3f6fbcc48cd752d02aa581b74c33d18dd41
Author: Cullen Rhodes <cullen.rhodes at arm.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M llvm/include/llvm/Target/GlobalISel/Combine.td
M llvm/test/CodeGen/AArch64/Atomics/aarch64-atomic-store-outline_atomics.ll
M llvm/test/CodeGen/AArch64/Atomics/aarch64-atomic-store-rcpc.ll
M llvm/test/CodeGen/AArch64/Atomics/aarch64-atomic-store-v8_1a.ll
M llvm/test/CodeGen/AArch64/Atomics/aarch64-atomic-store-v8a.ll
M llvm/test/CodeGen/AArch64/Atomics/aarch64-atomicrmw-lse2.ll
M llvm/test/CodeGen/AArch64/Atomics/aarch64-atomicrmw-lse2_lse128.ll
M llvm/test/CodeGen/AArch64/Atomics/aarch64-atomicrmw-lsfe.ll
M llvm/test/CodeGen/AArch64/Atomics/aarch64-atomicrmw-outline_atomics.ll
M llvm/test/CodeGen/AArch64/Atomics/aarch64-atomicrmw-rcpc.ll
M llvm/test/CodeGen/AArch64/Atomics/aarch64-atomicrmw-rcpc3.ll
M llvm/test/CodeGen/AArch64/Atomics/aarch64-atomicrmw-v8_1a.ll
M llvm/test/CodeGen/AArch64/Atomics/aarch64-atomicrmw-v8a.ll
M llvm/test/CodeGen/AArch64/Atomics/aarch64-atomicrmw-v8a_fp.ll
M llvm/test/CodeGen/AArch64/GlobalISel/arm64-atomic.ll
M llvm/test/CodeGen/AArch64/GlobalISel/localizer-arm64-tti.ll
M llvm/test/CodeGen/AArch64/aarch64-tbz.ll
M llvm/test/CodeGen/AArch64/cpa-globalisel.ll
M llvm/test/CodeGen/AArch64/misched-fusion-cmp-bcc.ll
M llvm/test/CodeGen/AArch64/pcsections.ll
M llvm/test/DebugInfo/AArch64/fallthrough-branch.ll
Log Message:
-----------
[GISel] Disable opt_brcond_by_inverting_cond combine at O0 (#193417)
This combine should not be necessary at O0 and disabling it is a -0.39%
geomean compile-time improvement on stage1-aarch64-O0-g CTMark [1] with
no change to code-size [2].
I also measured code-size without -g (cmake/caches/O0.cmake) locally
since it's not on llvm-compile-time-tracker and found no change.
[1] https://llvm-compile-time-tracker.com/compare.php?from=f2efeabe314bb0a9b1ef46c07b11f605ed351b9c&to=3d28cf0bb7fb2fc5baebc4b5de09b735c1115e7f&stat=instructions%3Au
[2] https://llvm-compile-time-tracker.com/compare.php?from=f2efeabe314bb0a9b1ef46c07b11f605ed351b9c&to=3d28cf0bb7fb2fc5baebc4b5de09b735c1115e7f&stat=size-total
Commit: bd469e8a1d4768b278182aa982763128d40e7e90
https://github.com/llvm/llvm-project/commit/bd469e8a1d4768b278182aa982763128d40e7e90
Author: David Green <david.green at arm.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
Log Message:
-----------
[SDAG] Minor cleanup to TargetLowering::expandFP_ROUND. NFC (#193793)
Noticed when porting to GISel, constants might as well be added to the
RHS of an add and a bitcast from the same type can be removed.
Commit: 340ba1191cfc49588119a93724f5c26810ddc1a6
https://github.com/llvm/llvm-project/commit/340ba1191cfc49588119a93724f5c26810ddc1a6
Author: Juan Manuel Martinez Caamaño <jmartinezcaamao at gmail.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_memory_access_aliasing/alias-load-store-atomic.ll
Log Message:
-----------
[SPIRV] Do not add aliasing decorations to OpAtomicStore/OpAtomicLoad (#193779)
Do not attach them to store atomic or load atomic intrinsics /
instructions since the extension is inconsistent at the moment (we
cannot add the decoration to atomic stores because they do not have an
id).
Commit: c55a73c44e4af903ded70aec5c8d6af1cb312440
https://github.com/llvm/llvm-project/commit/c55a73c44e4af903ded70aec5c8d6af1cb312440
Author: David Spickett <david.spickett at arm.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M lldb/source/API/SBCommandInterpreter.cpp
M lldb/source/Commands/CommandObjectBreakpoint.cpp
M lldb/source/Commands/CommandObjectBreakpointCommand.cpp
M lldb/source/Commands/CommandObjectCommands.cpp
M lldb/source/Commands/CommandObjectDisassemble.cpp
M lldb/source/Commands/CommandObjectExpression.cpp
M lldb/source/Commands/CommandObjectFrame.cpp
M lldb/source/Commands/CommandObjectLog.cpp
M lldb/source/Commands/CommandObjectMemory.cpp
M lldb/source/Commands/CommandObjectMemoryTag.cpp
Log Message:
-----------
[lldb] Remove full stop from AppendErrorWithFormat format strings (part 1) (#193750)
To fit the style guide:
https://llvm.org/docs/CodingStandards.html#error-and-warning-messages
I found these with:
* Find `(\.AppendErrorWithFormat\(([\s\r\n]+)?"(?:(?:\\.|[^"\\])*))\."`
and replace with `$1"` using Visual Studio Code.
* Putting a call to `validate_diagnostic` in `AppendErrorWithFormat`.
* Manual inspection.
Note that this change *does not* include a call to `validate_diagnostic`
because I do not know what's going to crash on platforms that I haven't
tested on.
Commit: 4852c5b159c8469f204b60a0974a33d1072bcee3
https://github.com/llvm/llvm-project/commit/4852c5b159c8469f204b60a0974a33d1072bcee3
Author: Mark Murray <mark.murray at arm.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M llvm/lib/Target/ARM/ARMInstrThumb2.td
A llvm/test/MC/ARM/thumb-hvc-virt-diagnostics.s
Log Message:
-----------
[ARM][MC] Gate Thumb hvc alias on virtualization (#193532)
Commit: 297fb9377a6ac0c8e7f81928e0df84c0bfe251d8
https://github.com/llvm/llvm-project/commit/297fb9377a6ac0c8e7f81928e0df84c0bfe251d8
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M llvm/test/Transforms/LICM/atomics.ll
Log Message:
-----------
[LICM] Generate test checks (NFC) (#193921)
Commit: 3ec9bbc3da9c75c4b586a7350dd271b0528715da
https://github.com/llvm/llvm-project/commit/3ec9bbc3da9c75c4b586a7350dd271b0528715da
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
R llvm/test/Transforms/DeadStoreElimination/fence-todo.ll
M llvm/test/Transforms/DeadStoreElimination/fence.ll
Log Message:
-----------
[DSE] Merge two test files and generate checks (NFC) (#193922)
Merge the todo file into the main test, showing current codegen.
Commit: 170f030c22c52bc5d840cd8f76756c9fba5ee816
https://github.com/llvm/llvm-project/commit/170f030c22c52bc5d840cd8f76756c9fba5ee816
Author: Longsheng Mou <longshengmou at gmail.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M mlir/lib/Dialect/Math/IR/MathOps.cpp
Log Message:
-----------
[mlir][math] Use APFloat::SemanticsToEnum in constant folding (#193914)
Refactor constant folding in the Math dialect to use APFloat::SemanticsToEnum() instead of getSizeInBits() when checking
floating-point semantics. Inferring semantics from bitwidth is fragile: different formats may share the same bit width but have distinct semantics, leading to incorrect dispatch. SemanticsToEnum() matches on the exact semantics descriptor, making the intent explicit and ensuring correct dispatch.
Commit: 839a22f449b3092a32537e9dc1cc474a5e19c909
https://github.com/llvm/llvm-project/commit/839a22f449b3092a32537e9dc1cc474a5e19c909
Author: Jack Styles <jack.styles at arm.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M flang/docs/Directives.md
M flang/include/flang/Parser/dump-parse-tree.h
M flang/include/flang/Parser/parse-tree.h
M flang/lib/Lower/Bridge.cpp
M flang/lib/Parser/Fortran-parsers.cpp
M flang/lib/Parser/unparse.cpp
M flang/lib/Semantics/canonicalize-directives.cpp
M flang/lib/Semantics/resolve-names.cpp
A flang/test/Lower/inlinealways-directive.f90
A flang/test/Parser/inlinealways-directive.f90
A flang/test/Semantics/inlinealways-directive01.f90
Log Message:
-----------
[Flang] Add `INLINEALWAYS` Compiler Directive (#192674)
Adds support for the INLINEALWAYS Compiler Directive to Flang. This was
previously supported in Classic-Flang, and works in the same way as
FORCEINLINE.
It can either be defined at the call site, or within the function the
user wishes to inline.
The missing support was highlighted while building an opensource
benchmark, as build warnings were indicating that this compiler
directive was being ignored.
Commit: 8685fb10938f0fb2bd3293ffbe292fbcdd962927
https://github.com/llvm/llvm-project/commit/8685fb10938f0fb2bd3293ffbe292fbcdd962927
Author: Longsheng Mou <longshengmou at gmail.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M mlir/include/mlir/Dialect/CommonFolders.h
M mlir/include/mlir/Dialect/Math/IR/MathOps.td
M mlir/lib/Dialect/Math/IR/MathOps.cpp
M mlir/test/Dialect/Math/canonicalize.mlir
M mlir/test/lib/Dialect/Test/TestPatterns.cpp
Log Message:
-----------
[mlir][math] Add constant folding for `math.fpowi` (#193761)
Adds a constant folder for `math.fpowi` when both operands are constant
and the integer exponent is exactly representable in the floating-point
type of the base.
Commit: f780e46d6e0e2b537dbe45092fb62c4a46b95916
https://github.com/llvm/llvm-project/commit/f780e46d6e0e2b537dbe45092fb62c4a46b95916
Author: Ivan R. Ivanov <iivanov at nvidia.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/ExpandMemCmp.cpp
Log Message:
-----------
[llvm][ExpandMemCmp] Avoid making copy of loop value (#193915)
This fixes a compiler warning.
Commit: ca136926c125dd925549b596efd29b900a379045
https://github.com/llvm/llvm-project/commit/ca136926c125dd925549b596efd29b900a379045
Author: divVerent <rpolzer at google.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M clang/lib/Serialization/ASTReader.cpp
M clang/test/Sema/redefine_extname.cpp
Log Message:
-----------
Fix formatting of changes in recent redefine_extname changes. (#189938)
My recent commits fd7388d14083bb5094bce6a75444a37e424689d7 and
37888541a96e4f10bf1b71b869145f0d31a9d580 had minor formatting issues
which happened during editing the PR as I had forgotten to rerun
clang-format. Sorry for that. So here is the update.
Did not fix line lengths in the FileCheck tests as exceeding line length
in these seems more consistent.
Commit: faf37adb3b33a984c585bb5a53f0caa8f0934c0f
https://github.com/llvm/llvm-project/commit/faf37adb3b33a984c585bb5a53f0caa8f0934c0f
Author: Jay Foad <jay.foad at amd.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M clang/utils/TableGen/ClangOptionDocEmitter.cpp
Log Message:
-----------
[Clang] Use const std::string & in ClangOptionDocEmitter. NFC. (#193926)
Fixes #94373
Commit: 69724c88e3e0ed4b23d2fc446c3d472b414146bd
https://github.com/llvm/llvm-project/commit/69724c88e3e0ed4b23d2fc446c3d472b414146bd
Author: David Spickett <david.spickett at arm.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M lldb/docs/resources/lldbgdbremote.md
M lldb/include/lldb/Target/MemoryRegionInfo.h
M lldb/source/Commands/CommandObjectMemory.cpp
M lldb/source/Plugins/Process/Utility/LinuxProcMaps.cpp
M lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationClient.cpp
M lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationServerLLGS.cpp
M lldb/source/Target/MemoryRegionInfo.cpp
M lldb/test/API/linux/aarch64/permission_overlay/TestAArch64LinuxPOE.py
M lldb/test/API/linux/aarch64/permission_overlay/main.c
M lldb/unittests/Process/Utility/LinuxProcMapsTest.cpp
M lldb/unittests/Process/gdb-remote/GDBRemoteCommunicationClientTest.cpp
Log Message:
-----------
[lldb][Linux] Read memory protection keys for memory regions (#182246)
Memory protection keys
(https://docs.kernel.org/core-api/protection-keys.html) are implemented
using two things:
* A key value attached to each page table entry.
* A set of permissions stored somewhere else (in a register on AArch64
and X86), which is indexed into by that protection key.
So far I have updated LLDB to show the permissions part on AArch64 Linux
by reading the por register. Now I am adding the ability to see which
key each memory region is using.
```
(lldb) memory region --all
[0x0000000000000000-0x000aaaae3b140000) ---
[0x000aaaae3b140000-0x000aaaae3b150000) r-x /tmp/test_lldb/linux/aarch64/permission_overlay/2/TestAArch64LinuxPOE/a.out PT_LOAD[0]
protection key: 0
[0x000aaaae3b150000-0x000aaaae3b160000) rw- /tmp/test_lldb/linux/aarch64/permission_overlay/2/TestAArch64LinuxPOE/a.out
protection key: 0
```
The key is parsed from the /proc/.../smaps file, and so will only be
present for live processes, not core files.
This is sent as part of the qMemoryRegionInfo response as a new
"protection-key" key. As far as I know "memory protection keys" are
Linux specific, but I don't know of a good generic name for it, so I've
copied what smaps calls it.
I have updated the "memory region" command to show this key. A lot of
the time this will be the default 0 key. I considered hiding this, but
decided that for this initial support it's better to be explicit and
verbose (this also prevents a Linux specific detail being added to the top level
memory region command).
I have not added protection keys to the SBAPI because:
* I don't know of a specific need for them.
* They are very easy to add if someone does want them later (just a
HasProtectionKey and GetProtectionKey).
* Arm's POE2
(https://developer.arm.com/community/arm-community-blogs/b/architectures-and-processors-blog/posts/future-architecture-technologies-poe2-and-vmte)
is coming soon, which makes these permissions more complex. There's no
need to risk adding something too simple to handle those.
The ability to see the permissions the key refers to, and the final
permissions after the overlay, will be in a follow up PR.
Commit: e2159f8e3c1a9905bdfc82d73c006945fe72c456
https://github.com/llvm/llvm-project/commit/e2159f8e3c1a9905bdfc82d73c006945fe72c456
Author: Fabian Ritter <fabian.ritter at amd.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M llvm/docs/LangRef.rst
Log Message:
-----------
[LangRef] Allow monotonic & seq_cst accesses to inter-operate with other accesses (#189014)
Currently, the LangRef says that atomic operations (which includes `unordered`
operations, which don't participate in the monotonic modification order) must
read a value from the modification order of monotonic operations.
In the following example, this means that the load does not have a store it
could read from, because all stores it may see do not participate in the
monotonic modification order:
```
; thread 0:
store atomic i32 1, ptr %p unordered, align 4
; thread 1:
store atomic i32 2, ptr %p unordered, align 4
load atomic i32, ptr %p unordered, align 4
```
The same applies if the load is monotonic instead of unordered (or if it is
replaced by a monotonic RMW operation). Either case seems wrong.
Similarly, the LangRef currently says "Each sequentially-consistent read sees
the last preceding write to the same address in this global order [of seq_cst
operations]." Strictly read, this means that the load in the following example
must read from the first store (or at least cannot read the second one),
because the second one is not sequentially consistent and therefore not in the
seq_cst order. That also seems wrong.
```
; thread 0
store atomic i32 1, ptr %p seq_cst, align 4
store atomic i32 2, ptr %p monotonic, align 4
load atomic i32, ptr %p seq_cst, align 4
```
This patch aims to resolve these inconsistencies.
Related RFC: https://discourse.llvm.org/t/rfc-clarifying-llvm-irs-concurrent-memory-model/90480
Commit: 390a29ea833965f481a7011b07deed9612229d6e
https://github.com/llvm/llvm-project/commit/390a29ea833965f481a7011b07deed9612229d6e
Author: David Spickett <david.spickett at arm.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M lldb/docs/resources/lldbgdbremote.md
M lldb/include/lldb/Target/MemoryRegionInfo.h
M lldb/source/Commands/CommandObjectMemory.cpp
M lldb/source/Plugins/Process/Utility/LinuxProcMaps.cpp
M lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationClient.cpp
M lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationServerLLGS.cpp
M lldb/source/Target/MemoryRegionInfo.cpp
M lldb/test/API/linux/aarch64/permission_overlay/TestAArch64LinuxPOE.py
M lldb/test/API/linux/aarch64/permission_overlay/main.c
M lldb/unittests/Process/Utility/LinuxProcMapsTest.cpp
M lldb/unittests/Process/gdb-remote/GDBRemoteCommunicationClientTest.cpp
Log Message:
-----------
Revert "[lldb][Linux] Read memory protection keys for memory regions" (#193934)
Reverts llvm/llvm-project#182246
Test failures on x86 bot:
```
Failed Tests (2):
lldb-api :: tools/lldb-server/TestGdbRemote_qMemoryRegion.py
lldb-api :: tools/lldb-server/libraries-svr4/TestGdbRemoteLibrariesSvr4Support.py
```
Commit: 23ea7363ff76d3dc56bb1bf8c8581ded4ba21859
https://github.com/llvm/llvm-project/commit/23ea7363ff76d3dc56bb1bf8c8581ded4ba21859
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M llvm/lib/Analysis/AliasAnalysisEvaluator.cpp
A llvm/test/Analysis/BasicAA/atomics.ll
Log Message:
-----------
[AAEval] Print ModRefInfo for atomic operations (#193935)
Print ModRefInfo for fence, atomicrmw, etc. Also for atomic
load and store, as these may have additional effects beyond
what is implied by the simple alias result.
Commit: 9df51a964ddbe4094f7e5a5b4a43f2776dd0da47
https://github.com/llvm/llvm-project/commit/9df51a964ddbe4094f7e5a5b4a43f2776dd0da47
Author: Guray Ozen <guray.ozen at gmail.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
M mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp
A mlir/test/Dialect/LLVMIR/nvvm-transcendentals.mlir
A mlir/test/Target/LLVMIR/nvvm/transcendentals.mlir
Log Message:
-----------
[MLIR][NVVM] Add `nvvm.sin` OP (#193775)
Implement `nvvm.sin` with ftz flag
Commit: cc0913eacf88e5b38f19bb25b1b14a61a653e1ec
https://github.com/llvm/llvm-project/commit/cc0913eacf88e5b38f19bb25b1b14a61a653e1ec
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
A clang/test/AST/ByteCode/libcxx/static-reference-load.cpp
M clang/test/AST/ByteCode/records.cpp
Log Message:
-----------
[clang][bytecode] Fix `MemberExpr`s with a static member (#193902)
We need logic to load from the reference pointer, similar to the one we
have for regular `DeclRefExpr`s.
Commit: 3fa0ac20705b9571e07216f08215fd6168a98012
https://github.com/llvm/llvm-project/commit/3fa0ac20705b9571e07216f08215fd6168a98012
Author: David Spickett <david.spickett at arm.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M lldb/docs/resources/lldbgdbremote.md
M lldb/include/lldb/Target/MemoryRegionInfo.h
M lldb/packages/Python/lldbsuite/test/tools/lldb-server/gdbremote_testcase.py
M lldb/source/Commands/CommandObjectMemory.cpp
M lldb/source/Plugins/Process/Utility/LinuxProcMaps.cpp
M lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationClient.cpp
M lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationServerLLGS.cpp
M lldb/source/Target/MemoryRegionInfo.cpp
M lldb/test/API/linux/aarch64/permission_overlay/TestAArch64LinuxPOE.py
M lldb/test/API/linux/aarch64/permission_overlay/main.c
M lldb/unittests/Process/Utility/LinuxProcMapsTest.cpp
M lldb/unittests/Process/gdb-remote/GDBRemoteCommunicationClientTest.cpp
Log Message:
-----------
Reland "[lldb][Linux] Read memory protection keys for memory regions (#193934)" (#193936)
This reverts commit 390a29ea833965f481a7011b07deed9612229d6e.
Two tests failed on the X86 buildbot but not in GitHub CI because the
buildbot has protection keys and the CI machines do not. I ran the tests
on an AArch64 host without protection keys, and only selected tests on a
simulated AArch64 machine with protection keys, so I did not find this
earlier.
The fix was to add "protection-key" to the list of possible
qMemoryRegionInfo response keys.
Commit: 90020486aa8941d77c6a40afef0f20c94f333433
https://github.com/llvm/llvm-project/commit/90020486aa8941d77c6a40afef0f20c94f333433
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M llvm/test/CodeGen/X86/masked-sdiv.ll
M llvm/test/CodeGen/X86/masked-srem.ll
M llvm/test/CodeGen/X86/masked-udiv.ll
M llvm/test/CodeGen/X86/masked-urem.ll
Log Message:
-----------
[X86] masked div/rem tests - fix avx512 and add sse4/avx2 test coverage (#193933)
Noticed the incorrect "-mattr=+avx512" attribute, and replaced it with proper x86-64-v* level test coverage
Commit: cedcf1876cb15455a92b539007e122107e66518a
https://github.com/llvm/llvm-project/commit/cedcf1876cb15455a92b539007e122107e66518a
Author: divVerent <rpolzer at google.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M clang/include/clang/Sema/Sema.h
M clang/lib/Sema/SemaDecl.cpp
M clang/test/PCH/pragma-redefine-extname.c
M clang/test/PCH/pragma-redefine-extname.h
Log Message:
-----------
[Clang][Sema] Change `ExtnameUndeclaredIdentifiers` to MapVector. (#193924)
Iteration order of this map does not matter for compilation, except that
since 475f71e8fa15ee71f99e450a0e1c90d3961005f9, this data is dumped into
precompiled header files and thus affects content of those files.
To make precompiled header file contents deterministic, changing its
type to one that has deterministic iteration order, matching the nearby
`WeakUndeclaredIdentifiers`.
Fixes #193923
Commit: a48159df9ce57c2bf377588b52563966865514a2
https://github.com/llvm/llvm-project/commit/a48159df9ce57c2bf377588b52563966865514a2
Author: Jonathan Thackray <jonathan.thackray at arm.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M clang/test/Driver/aarch64-v97a.c
M clang/test/Driver/print-supported-extensions-aarch64.c
M llvm/lib/Target/AArch64/AArch64Features.td
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/lib/Target/AArch64/AArch64SystemOperands.td
M llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp
M llvm/lib/Target/AArch64/Utils/AArch64BaseInfo.cpp
M llvm/lib/Target/AArch64/Utils/AArch64BaseInfo.h
M llvm/test/CodeGen/AArch64/aarch64-sys-intrinsic.ll
R llvm/test/MC/AArch64/armv9.7a-mpamv2-diagnostics.s
M llvm/test/MC/AArch64/armv9.7a-mpamv2.s
M llvm/unittests/TargetParser/TargetParserTest.cpp
Log Message:
-----------
[AArch64][llvm] Remove support for FEAT_MPAMv2_VID (#193191)
`FEAT_MPAMv2_VID` instructions and system registers, as introduced
in change d30f18d2c, are being removed at this time, as they've been
removed from the latest Arm ARM, which doesn't preclude them returning
in some form in future.
Other system registers introduced with `FEAT_MPAMv2` are unaffected,
and these continue to be ungated, but since `+mpamv2` gating is now
empty,
I'm removing this superfluous gating code.
Commit: f64e8d1567ad40b4c584bc842f1c8ebfdcc1d491
https://github.com/llvm/llvm-project/commit/f64e8d1567ad40b4c584bc842f1c8ebfdcc1d491
Author: Rohit Aggarwal <44664450+rohitaggarwal007 at users.noreply.github.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M llvm/include/llvm/Analysis/VecFuncs.def
M llvm/include/llvm/IR/RuntimeLibcalls.td
M llvm/test/Transforms/LoopVectorize/X86/amdlibm-calls.ll
Log Message:
-----------
[AMDLIBM] Remove the mapping of the deleted vector call (#193760)
Removing the mapping of deleted vector from the
[amdlibm_vec.h](https://github.com/amd/aocl-libm-ose/blob/master/include/external/amdlibm_vec.h)
Commit: a227dc7c0980c414c4a7d9f1f3f64130b1956b0c
https://github.com/llvm/llvm-project/commit/a227dc7c0980c414c4a7d9f1f3f64130b1956b0c
Author: Xinlong Chen <xinlongchen at tencent.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/test/CodeGen/RISCV/combine-is_fpclass.ll
Log Message:
-----------
[DAG] visitIS_FPCLASS - fold to constant when result is fully determined by KnownFPClass (#193737)
This PR teaches `DAGCombiner::visitIS_FPCLASS` to fold directly to
constant `true` based on the source's `KnownFPClass`, instead of only
narrowing the test mask.
Prep work to help with https://github.com/llvm/llvm-project/pull/193672
Commit: 48e65b6c433753cb09c4057305fc2b49b2ee4168
https://github.com/llvm/llvm-project/commit/48e65b6c433753cb09c4057305fc2b49b2ee4168
Author: David Green <david.green at arm.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64InstrFormats.td
M llvm/test/CodeGen/AArch64/bf16-v8-instructions.ll
Log Message:
-----------
[AArch64][GlobalISel] Add a variant of gi_extract_high_v8bf16 (#193345)
This allows the upper extract_high to match for bf16 types, allowing us
to generate a sshl2 instruction.
Commit: 8141a4351c5e0803902e27182a9ff0ebb7cb7bee
https://github.com/llvm/llvm-project/commit/8141a4351c5e0803902e27182a9ff0ebb7cb7bee
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M flang/examples/FeatureList/FeatureList.cpp
M flang/include/flang/Lower/OpenMP.h
M flang/include/flang/Parser/dump-parse-tree.h
M flang/include/flang/Parser/openmp-utils.h
M flang/include/flang/Parser/parse-tree.h
M flang/lib/Lower/Bridge.cpp
M flang/lib/Lower/OpenMP/DataSharingProcessor.cpp
M flang/lib/Parser/openmp-parsers.cpp
M flang/lib/Parser/unparse.cpp
M flang/lib/Semantics/canonicalize-omp.cpp
M flang/lib/Semantics/check-omp-loop.cpp
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/check-omp-structure.h
M flang/lib/Semantics/resolve-directives.cpp
M flang/lib/Semantics/resolve-names.cpp
M flang/test/Lower/pre-fir-tree03.f90
M flang/test/Parser/OpenMP/bind-clause.f90
M flang/test/Parser/OpenMP/cross-label-do.f90
M flang/test/Parser/OpenMP/declare-reduction-multi.f90
M flang/test/Parser/OpenMP/declare-reduction-unparse.f90
M flang/test/Parser/OpenMP/depth-clause.f90
M flang/test/Parser/OpenMP/do-interchange.f90
M flang/test/Parser/OpenMP/do-tile-size.f90
M flang/test/Parser/OpenMP/doacross-clause.f90
M flang/test/Parser/OpenMP/fuse-looprange.f90
M flang/test/Parser/OpenMP/fuse01.f90
M flang/test/Parser/OpenMP/fuse02.f90
M flang/test/Parser/OpenMP/in-reduction-clause.f90
M flang/test/Parser/OpenMP/interchange-permutation.f90
M flang/test/Parser/OpenMP/interchange.f90
M flang/test/Parser/OpenMP/linear-clause.f90
M flang/test/Parser/OpenMP/loop-transformation-construct01.f90
M flang/test/Parser/OpenMP/loop-transformation-construct02.f90
M flang/test/Parser/OpenMP/loop-transformation-construct03.f90
M flang/test/Parser/OpenMP/loop-transformation-construct04.f90
M flang/test/Parser/OpenMP/loop-transformation-construct05.f90
M flang/test/Parser/OpenMP/masked-unparse.f90
M flang/test/Parser/OpenMP/master-unparse.f90
M flang/test/Parser/OpenMP/nonblock-do-nested-omp.f90
M flang/test/Parser/OpenMP/order-clause01.f90
M flang/test/Parser/OpenMP/ordered-depend.f90
M flang/test/Parser/OpenMP/parallel-loop-unparse.f90
M flang/test/Parser/OpenMP/reduction-modifier.f90
M flang/test/Parser/OpenMP/target-loop-unparse.f90
M flang/test/Parser/OpenMP/taskloop.f90
M flang/test/Parser/OpenMP/threadset-clause.f90
M flang/test/Parser/OpenMP/tile-size.f90
M flang/test/Parser/OpenMP/tile.f90
M flang/test/Parser/OpenMP/transparent-clause.f90
M flang/test/Parser/OpenMP/unroll-full.f90
M flang/test/Parser/OpenMP/unroll-heuristic.f90
M flang/test/Parser/OpenMP/unroll-partial.f90
M flang/unittests/Semantics/OpenMPUtils.cpp
Log Message:
-----------
[flang][OpenMP] Make OpenMPLoopConstruct inherit from OmpBlockConstruct (#193823)
Conceptually OpenMPLoopConstruct has the exact same structure as
OmpBlockConstruct: directive specification for the begin directive,
optional one for the end directive, and a block of code. The reason why
OpenMPLoopConstruct was not originally made to be a descendant of
OmpBlockConstruct was to preserve the behavior of AST visitors, where a
separate (type-based) visitor could be defined for the begin/end
directives of a block construct, and for a loop construct. The AST nodes
representing the begin/end directives in block and loop construct had
different types: Omp{Begin|End}Directive for block constructs, and
Omp{Begin|End}LoopDirective for loop constructs.
Today this distinction is not needed anywhere, and so the loop construct
will be represented in the same way as a block construct.
Commit: 0571ce414ec0c499976fb73d9e4796326b4e3c1b
https://github.com/llvm/llvm-project/commit/0571ce414ec0c499976fb73d9e4796326b4e3c1b
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M flang/lib/Semantics/check-omp-loop.cpp
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/check-omp-structure.h
M flang/lib/Semantics/resolve-directives.cpp
M flang/test/Semantics/OpenMP/parallel-master-goto.f90
Log Message:
-----------
[flang][OpenMP] Move branching verification to semantic checks (#193324)
Move the check for branching into and out of an OpenMP construct from
symbol resolution into semantic checks.
Instead of using directive contexts to check for crossing a construct
boundary, use construct pointers and source ranges.
Commit: c59c19bf5921925f40d767aa79eea252b0184f6a
https://github.com/llvm/llvm-project/commit/c59c19bf5921925f40d767aa79eea252b0184f6a
Author: Valery Pykhtin <valery.pykhtin at amd.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
A llvm/include/llvm/CodeGen/MachineIDFSSAUpdater.h
M llvm/lib/CodeGen/CMakeLists.txt
A llvm/lib/CodeGen/MachineIDFSSAUpdater.cpp
M llvm/lib/Target/AMDGPU/SILowerI1Copies.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-divergent-i1-used-outside-loop.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-structurizer.mir
M llvm/test/CodeGen/AMDGPU/si-i1-copies.mir
M llvm/test/CodeGen/AMDGPU/si-lower-i1-copies-order-of-phi-incomings.mir
Log Message:
-----------
[MachineSSAUpdater][AMDGPU] Add faster version of MachineSSAUpdater class. (#145722)
This is a port of SSAUpdaterBulk to machine IR minus "bulk" part. Phi
deduplication and simplification are not yet implemented but can be
added if needed.
When used in AMDGPU to replace MachineSSAUpdater for i1 copy lowering,
it reduced compilation time from 417 to 180 seconds for the pass on a
large test case (56% improvement).
Commit: 0844fdfd725501264dbaade58698e9f81576f021
https://github.com/llvm/llvm-project/commit/0844fdfd725501264dbaade58698e9f81576f021
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M clang/lib/AST/ByteCode/Interp.cpp
M clang/lib/AST/ByteCode/Pointer.cpp
M clang/test/AST/ByteCode/unions.cpp
Log Message:
-----------
[clang][bytecode] Start lifetime when activating pointers (#192589)
This can be used to revive union members.
Commit: c0844b7b65b470ba73356177177105bcdb8309e3
https://github.com/llvm/llvm-project/commit/c0844b7b65b470ba73356177177105bcdb8309e3
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M llvm/test/CodeGen/X86/known-never-zero.ll
Log Message:
-----------
[X86] known-never-zero.ll - regenerate to show VPADD constant asm comments (#193943)
Commit: e7edfd81ca1a943ccbcf19bfb64ad3f11580f9db
https://github.com/llvm/llvm-project/commit/e7edfd81ca1a943ccbcf19bfb64ad3f11580f9db
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M llvm/test/CodeGen/X86/vector-sext.ll
M llvm/test/CodeGen/X86/vector-zext.ll
Log Message:
-----------
[X86] Regenerate vector ext tests to show VPADD constant asm comments (#193942)
Commit: 17861903e6bb2297a63c453728e2a8a9167413bc
https://github.com/llvm/llvm-project/commit/17861903e6bb2297a63c453728e2a8a9167413bc
Author: ZhaoQi <zhaoqi01 at loongson.cn>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/test/CodeGen/LoongArch/lasx/ir-instruction/shuffle-as-xvshuf4i.ll
M llvm/test/CodeGen/LoongArch/lasx/vec-shuffle-byte-rotate.ll
Log Message:
-----------
[LoongArch] Custom legalize vector_shuffle to `xvshuf4i.d` (#164213)
Commit: e3443a1189b97f1f25a7805096417d7cb28e691e
https://github.com/llvm/llvm-project/commit/e3443a1189b97f1f25a7805096417d7cb28e691e
Author: Schrodinger ZHU Yifan <yifanzhu at rochester.edu>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/docs/dev/undefined_behavior.rst
M libc/include/CMakeLists.txt
M libc/include/llvm-libc-macros/pthread-macros.h
M libc/include/llvm-libc-types/CMakeLists.txt
A libc/include/llvm-libc-types/pthread_cond_t.h
M libc/include/pthread.yaml
M libc/include/sys/types.yaml
M libc/src/__support/threads/CndVar.h
M libc/src/__support/threads/mutex.h
M libc/src/__support/threads/unix_mutex.h
M libc/src/pthread/CMakeLists.txt
A libc/src/pthread/pthread_cond_broadcast.cpp
A libc/src/pthread/pthread_cond_broadcast.h
A libc/src/pthread/pthread_cond_clockwait.cpp
A libc/src/pthread/pthread_cond_clockwait.h
A libc/src/pthread/pthread_cond_destroy.cpp
A libc/src/pthread/pthread_cond_destroy.h
A libc/src/pthread/pthread_cond_init.cpp
A libc/src/pthread/pthread_cond_init.h
A libc/src/pthread/pthread_cond_signal.cpp
A libc/src/pthread/pthread_cond_signal.h
A libc/src/pthread/pthread_cond_timedwait.cpp
A libc/src/pthread/pthread_cond_timedwait.h
A libc/src/pthread/pthread_cond_utils.h
A libc/src/pthread/pthread_cond_wait.cpp
A libc/src/pthread/pthread_cond_wait.h
M libc/test/integration/src/pthread/CMakeLists.txt
A libc/test/integration/src/pthread/pthread_cond_test.cpp
Log Message:
-----------
[libc] add `pthread_cond_*` public interfaces (#193656)
Commit: e2170a0f18cd221a06c43aa9af9a53a5ea7abab3
https://github.com/llvm/llvm-project/commit/e2170a0f18cd221a06c43aa9af9a53a5ea7abab3
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.h
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
Log Message:
-----------
[VPlan] Remove unused LVer arg from tryToBuildVplanWithVPRecipes (NFC). (#193950)
LVer is not used.
Commit: a528529064db20a0d18645eebee9ebb4e05e7eb0
https://github.com/llvm/llvm-project/commit/a528529064db20a0d18645eebee9ebb4e05e7eb0
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M clang/lib/AST/ByteCode/Interp.cpp
M clang/lib/AST/ByteCode/Interp.h
A clang/test/AST/ByteCode/libcxx/constexpr-unknown-getbase.cpp
Log Message:
-----------
[clang][bytecode] Allow constexpr-unknown values in GetPtrBase{,Pop} (#193903)
We can handle them here and it's needed to make some libc++ tests work.
Commit: 4c66205b070cdb8d18f9456ebbb5c592b5134487
https://github.com/llvm/llvm-project/commit/4c66205b070cdb8d18f9456ebbb5c592b5134487
Author: David Spickett <david.spickett at arm.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M lldb/include/lldb/Target/ABI.h
M lldb/source/Commands/CommandObjectMemory.cpp
M lldb/source/Plugins/ABI/AArch64/ABISysV_arm64.cpp
M lldb/source/Plugins/ABI/AArch64/ABISysV_arm64.h
M lldb/test/API/linux/aarch64/permission_overlay/TestAArch64LinuxPOE.py
M lldb/test/API/linux/aarch64/permission_overlay/main.c
Log Message:
-----------
[lldb][Linux] Add overlay and effective permissions to "memory region" (#184115)
In this change I'm extending the "memory region" command to show users
the
overlay permissions that a protection key refers to, and the result of
applying that overlay to the page table permissions.
For example, protection key 0 refers to Perm0 in the por register.
```
(lldb) register read por
Perm0 = Read, Write, Execute
```
This is the default key, so many regions use it.
```
(lldb) memory region --all
<...>
[0x000ffffff7db0000-0x000ffffff7f40000) r-x /usr/lib/aarch64-linux-gnu/libc.so.6 PT_LOAD[0]
protection key: 0 (rwx, effective: r-x)
```
Protection keys can only change what was already enabled in the
page table. So we start with read and execute. Then a read/write/execute
overlay
is applied. We cannot add write, so the result is read and execute.
Here's an example of its use with a real crash (output edited):
```
(lldb) c
* thread #1, name = 'test.o', stop reason = signal SIGSEGV: failed protection key checks (fault address=0xffffff7d60000)
-> 106 read_only_page[0] = '?';
(lldb) memory region 0xffffff7d60000
[0x000ffffff7d60000-0x000ffffff7d70000) rw-
protection key: 6 (r--, effective: r--)
(lldb) register read por
Perm6 = Read
```
The calculation of permissions is implemented by a new ABI method.
It's in ABI for 2 reasons:
* These overlays are usually in a register (X86 and AArch64 are)
and that register name is architecture specific.
* The way the overlay values apply may differ between architecture.
AArch64 treats a set bit as adding a permission, but some may
treat it as removing.
Technically this is dependent on operating system and architecture.
However, so are the methods for removing non-address bits, and those
are in ABI too.
To test this I have changed the allocations in the test program
to use read+execute permissions by default. With read+write+execute
I could not observe that the overlay only changes enabled permissions.
Commit: bb3d25167abe9e8f4afa5cf8925577f1843674d5
https://github.com/llvm/llvm-project/commit/bb3d25167abe9e8f4afa5cf8925577f1843674d5
Author: Petter Berntsson <petter.berntsson at arm.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M libc/docs/CMakeLists.txt
M libc/docs/headers/index.rst
A libc/utils/docgen/sys/select.yaml
Log Message:
-----------
[libc][docs][POSIX] Add sys/select.h implementation status (#122006) (#193948)
Add sys/select.h implementation-status docs to llvm-libc.
Commit: d3f4fc750db91378aaf6e2170ceea45af022f3e7
https://github.com/llvm/llvm-project/commit/d3f4fc750db91378aaf6e2170ceea45af022f3e7
Author: Jonathan Thackray <jonathan.thackray at arm.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M clang/include/clang/Basic/arm_sve.td
Log Message:
-----------
[AArch64][clang] Fix typos in `arm_sve.td` (NFC) (#192981)
Rename some typos in `arm_sve.td`, rather than perpetuate them (since
I'll be adding more MMLA intrinsics shortly).
No functional change.
Commit: 7b68b4b2c196c922a10f6406675d5dbc3bfbc716
https://github.com/llvm/llvm-project/commit/7b68b4b2c196c922a10f6406675d5dbc3bfbc716
Author: David Spickett <david.spickett at arm.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M lldb/docs/use/aarch64-linux.md
M llvm/docs/ReleaseNotes.md
Log Message:
-----------
[lldb][docs] Document AArch64 Linux Permission Overlay support (#184119)
This change adds a user guide and release notes for POE.
Commit: 629f81599d6e2069fcaafb3947ad65d60844f127
https://github.com/llvm/llvm-project/commit/629f81599d6e2069fcaafb3947ad65d60844f127
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M llvm/test/CodeGen/X86/freeze-binary.ll
Log Message:
-----------
[X86] freeze-binary.ll - regenerate to show VPADD constant asm comments (#193953)
Commit: 48e0e16886f96e80de2f3390785ef7a373b562bc
https://github.com/llvm/llvm-project/commit/48e0e16886f96e80de2f3390785ef7a373b562bc
Author: Charles Zablit <c_zablit at apple.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M lldb/packages/Python/lldbsuite/test/tools/lldb-dap/dap_server.py
Log Message:
-----------
[lldb-dap] extend env when testing reverse request (#193743)
When testing lldb-dap's "runInTerminal" mode, the `"env"` argument is
meant to extend/override the current environment, not replace it.
This causes issues on Windows when Python is not in the System's Path.
The reverse request fails because lldb-dap can't find Python.
Commit: b5d253cf31c2f72fd54a039ac20ae9b56bc933fb
https://github.com/llvm/llvm-project/commit/b5d253cf31c2f72fd54a039ac20ae9b56bc933fb
Author: Eugene Epshteyn <eepshteyn at nvidia.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M flang/test/Lower/OpenMP/Todo/omp-default-clause-inner-loop.f90
M flang/test/Lower/namelist-common-block.f90
M flang/test/Lower/nested-where.f90
M flang/test/Lower/nullify.f90
M flang/test/Lower/optional-value-caller.f90
Log Message:
-----------
[flang][NFC] Converted five tests from old lowering to new lowering (part 47) (#193886)
Tests converted from test/Lower: namelist-common-block.f90,
nested-where.f90, nullify.f90,
OpenMP/Todo/omp-default-clause-inner-loop.f90, optional-value-caller.f90
Commit: ee4d927dfc01f124cbb3f0302d6f273e0894c637
https://github.com/llvm/llvm-project/commit/ee4d927dfc01f124cbb3f0302d6f273e0894c637
Author: Henry Wu <henrywu at mathworks.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M mlir/lib/Conversion/TosaToLinalg/TosaToLinalg.cpp
M mlir/test/Conversion/TosaToLinalg/tosa-to-linalg-resize.mlir
Log Message:
-----------
[mlir][tosa] Fix integer bilinear (quantized) tosa.resize lowering to use floordivsi (#193821)
## Background
`tosa.resize` in bilinear integer (quantized) mode lowers to a
`linalg.generic`
body that, for each output pixel, computes a corresponding input
coordinate and
blends the four neighboring input pixels. The mapping is:
```
val = out_coord * scale_d + offset
index = val / scale_n // integer part — which input pixel to start from
delta = val - index * scale_n // fractional part, scaled to [0, scale_n)
```
`delta` is the interpolation weight toward the next pixel. The bilinear
formula
(integer path) is:
```
topAcc = pixel[y0,x0] * (scale_x - dx) + pixel[y0,x1] * dx
bottomAcc = pixel[y1,x0] * (scale_x - dx) + pixel[y1,x1] * dx
result = topAcc * (scale_y - dy) + bottomAcc * dy
```
For this to be a valid convex combination (interpolation, not
extrapolation),
`dx` and `dy` must be in `[0, scale_n]`.
The pixel indices `y0`, `y1`, `x0`, `x1` are computed by
`getClampedIdxs`:
```cpp
y0 = clamp(iy, 0, H-1)
y1 = clamp(iy+1, 0, H-1)
```
---
## The Bug
The integer path uses `DivSIOp` (truncation toward zero):
```cpp
// getIndexAndDeltaInt — mlir/lib/Conversion/TosaToLinalg/TosaToLinalg.cpp
index = arith::DivSIOp::create(b, val, scaleN); // truncates toward zero
delta = arith::MulIOp::create(b, index, scaleN);
delta = arith::SubIOp::create(b, val, delta); // = val - (val/scaleN)*scaleN
```
When `val < 0` (which happens at boundary output pixels when `offset` is
negative), `DivSIOp` truncates toward zero instead of toward -∞. This
produces
a negative remainder, i.e. a negative `delta`, which causes
extrapolation.
Note: the code comment on line 2058 already says `// ix = floor(x /
scale_n)`,
but the code uses truncation — this mismatch is the root cause of the
bug.
The float path (`getIndexAndDeltaFp`) uses `FloorDivSIOp` and is
unaffected:
with floor division, `r = val - floor(val/scaleN)*scaleN` is always in
`[0, scaleN-1]`.
---
## Concrete Example
**Setup:** 2×2 input upsampled to 4×4, `scale=[4,2,4,2]`,
`offset=[-1,-1]`
- `scale_y_n=4`, `scale_y_d=2`, `scale_x_n=4`, `scale_x_d=2`
- `offset_y=-1`, `offset_x=-1`
- Input: `tensor<1x2x2x1xi8>` with `input[0,0,0,0]=100`, all others `0`
**At output pixel (0,0):**
```
val = 0 * 2 + (-1) = -1
```
### Without any fix (DivSIOp, buggy)
```
iy = DivSIOp(-1, 4) = 0 // truncates -0.25 toward zero
dy = -1 - 0*4 = -1 // OUT OF RANGE: should be in [0, 4]
y0 = clamp(0, 0, 1) = 0
y1 = clamp(0+1, 0, 1) = 1 // different rows
ix = DivSIOp(-1, 4) = 0
dx = -1 // same issue
x0 = clamp(0, 0, 1) = 0
x1 = clamp(0+1, 0, 1) = 1
// pixels:
y0x0 = input[0,0,0,0] = 100
y0x1 = input[0,0,1,0] = 0
y1x0 = input[0,1,0,0] = 0
y1x1 = input[0,1,1,0] = 0
topAcc = 100*(4-(-1)) + 0*(-1) = 500 // EXTRAPOLATION
bottomAcc = 0*(4-(-1)) + 0*(-1) = 0
result = 500*(4-(-1)) + 0*(-1) = 2500 // WRONG
```
### Fix w/ FloorDivSIOp
```
iy = FloorDivSIOp(-1, 4) = -1 // floors -0.25 toward -∞
dy = -1 - (-1)*4 = 3 // naturally in [0, scale_n-1]
y0 = clamp(-1, 0, 1) = 0
y1 = clamp(-1+1, 0, 1) = 0 // SAME row — both snap to boundary
dx = 3 (same by symmetry)
// all four neighbors collapse to the same boundary pixel:
y0x0 = y0x1 = y1x0 = y1x1 = input[0,0,0,0] = 100
topAcc = 100*(4-3) + 100*3 = 400
bottomAcc = 100*(4-3) + 100*3 = 400
result = 400*(4-3) + 400*3 = 1600 // correct
```
`y0=y1=0` means boundary replication is enforced by `getClampedIdxs`,
making
`dy` irrelevant.
## Semantic Analysis of the fix
- `iy=-1` correctly signals "this position is before the first input
pixel."
- `getClampedIdxs` does its intended job: both `y0` and `y1` snap to the
boundary pixel, enforcing replication explicitly.
- `dy=3` **appears** valid (it's in `[0, scale_n-1]`) but is
semantically
meaningless: the true position is `-0.25`, which is outside the image —
there
is no "3/4 toward the next pixel" to interpolate toward. It is harmless
only
because `y0=y1`.
- Same analysis for dx=3 by symmetry.
- Fixes the root cause (wrong division op, matching the existing code
comment
and mirroring the float path), but `delta` still carries a misleading
value
at out-of-bounds positions.
Commit: 97b7cee34583c4f1a1b9fc258d29969423762fed
https://github.com/llvm/llvm-project/commit/97b7cee34583c4f1a1b9fc258d29969423762fed
Author: Erich Keane <ekeane at nvidia.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M clang/include/clang/CIR/Dialect/Builder/CIRBaseBuilder.h
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/lib/CIR/CodeGen/CIRGenCXX.cpp
M clang/lib/CIR/CodeGen/CIRGenDecl.cpp
M clang/lib/CIR/CodeGen/CIRGenDeclCXX.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
M clang/lib/CIR/CodeGen/CIRGenModule.h
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
M clang/lib/CIR/Dialect/Transforms/LoweringPrepare.cpp
M clang/test/CIR/CodeGen/static-local.cpp
M clang/test/CIR/IR/invalid-static-local.cir
M clang/test/CIR/IR/static-local.cir
Log Message:
-----------
[CIR] Introduce LocalInitOp, & lower static locals (#193576)
During an investigation of something else, I discovered that our
handling of static-local as a ctor/dtor on a GlobalOp meant that it
couldn't actually be initialized with reference to any local, parameter,
or member declarations. This is obviously problematic.
This patch instead introduces a `LocalInitOp`, which is an operation
that represents the location of initialization for the static local.
This is lowered during lowering-prepare, same as we did previously (in
fact, it uses basically the exact same lowering code, with some slight
modifications).
Lowering from AST itself splits slightly from global declarations, but
the two share implementation as closely as possible.
At the moment, this operation only works for static-locals, and has a
handful of asserts to do the same. It is intended that the
thread-local-storage use the exact same mechanism, with some slight
modifications to the lowering-prepare pass to introduce the different
init behavior.
Commit: aca5d1ed27f7191435e5560329aaa99bb4fac593
https://github.com/llvm/llvm-project/commit/aca5d1ed27f7191435e5560329aaa99bb4fac593
Author: NeKon69 <nobodqwe at gmail.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M clang/include/clang/Analysis/Analyses/LifetimeSafety/Facts.h
M clang/include/clang/Analysis/Analyses/LifetimeSafety/FactsGenerator.h
M clang/include/clang/Analysis/Analyses/LifetimeSafety/LifetimeSafety.h
M clang/include/clang/Analysis/Analyses/LifetimeSafety/Loans.h
M clang/include/clang/Basic/DiagnosticGroups.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/lib/Analysis/LifetimeSafety/Checker.cpp
M clang/lib/Analysis/LifetimeSafety/FactsGenerator.cpp
M clang/lib/Analysis/LifetimeSafety/Loans.cpp
M clang/lib/Sema/SemaLifetimeSafety.h
M clang/test/Sema/Inputs/lifetime-analysis.h
M clang/test/Sema/warn-lifetime-safety-suggestions.cpp
M clang/test/Sema/warn-lifetime-safety.cpp
Log Message:
-----------
[LifetimeSafety] Remerge "Add support for `new`/`delete`" (#193776)
This PR extends LifetimeSafety to support heap allocations via
`new`/`delete`.
# Contents
* Adds a new warning emitted for use-after-free.
* Renames `reportUseAfterFree` to `reportUseAfterScope`, since the old
name was misleading (the warnings are still called `use_after_scope`).
* Adds a new `AccessPath::Kind` value, `NewAllocation`, which is used
for loans issued from `new` allocations.
* Adds `VisitCXXNewExpr` and `VisitCXXDeleteExpr`, which handle loan
issuance and origin propagation for `new` and `delete`.
* Comes with extensive test coverage for the new features, including new
use-after-free tests and use-after-scope coverage for `new`.
Remerges #192504
# Changes over original PR
* Fixed a crash when allocating `void*`, and added a regression test for
it
* The `AccessPath` root implementation was changed in #193520, so this
now builds on 32-bit systems
Completes part of #164963
Assisted-by: GPT-5.4 for writing most of the tests (the remaining tests,
and everything else in this PR, were written by me).
Commit: 8baf33522df35c4e3c1dcd90e66d68976c0de256
https://github.com/llvm/llvm-project/commit/8baf33522df35c4e3c1dcd90e66d68976c0de256
Author: Amina Chabane <amina.chabane at arm.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M bolt/lib/Passes/JTFootprintReduction.cpp
M bolt/test/AArch64/unsupported-passes.test
Log Message:
-----------
[BOLT][AArch64] Refuse to run JTFootprintReduction pass (#193946)
JTFootprintReduction results in a no-op on AArch64. This is because it
emits createIJmp32Frag() which is unimplemented for AArch64 and is only
overridden by x86.
- Add a guard for non-x86
- Update unsupported-passes.test with expected error message
Commit: 8e5b38383f1ecb1c93fbe19b6228b45659decf2d
https://github.com/llvm/llvm-project/commit/8e5b38383f1ecb1c93fbe19b6228b45659decf2d
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M flang/lib/Parser/openmp-parsers.cpp
Log Message:
-----------
[flang][OpenMP] Rename dirSpec to spec in openmp-parsers.cpp, NFC (#193967)
Commit: 6c7d16c0bfd38afc8c4131510740737113451f22
https://github.com/llvm/llvm-project/commit/6c7d16c0bfd38afc8c4131510740737113451f22
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M libclc/CMakeLists.txt
Log Message:
-----------
[libclc] Use 'LLVM_DEFAULT_TARGET_TRIPLE' instead of 'LLVM_RUNTIMES_TARGET' (#193969)
Summary:
The 'LLVM_RUNTIMES_TARGET' variable is the raw value used by the LLVM
CMake. It can contain multilib arguments which will not compile when
used as a triple. The more canonical value is
`LLVM_DEFAULT_TARGET_TRIPLE`, which is used by flang-rt, libc, openmp,
etc.
Commit: 771440f5bb2e0684a82c770293f561d17aedd0c0
https://github.com/llvm/llvm-project/commit/771440f5bb2e0684a82c770293f561d17aedd0c0
Author: Petter Berntsson <petter.berntsson at arm.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M libc/docs/CMakeLists.txt
M libc/docs/headers/index.rst
A libc/utils/docgen/dlfcn.yaml
Log Message:
-----------
[libc][docs] Add dlfcn.h implementation status (#122006) (#193972)
Add dlfcn.h implementation-status docs to llvm-libc.
Commit: c49b1773b2236a759dfedd3b5b67eb11856a9cbb
https://github.com/llvm/llvm-project/commit/c49b1773b2236a759dfedd3b5b67eb11856a9cbb
Author: Chuanqi Xu <yedeng.yd at linux.alibaba.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M clang-tools-extra/clangd/ModulesBuilder.cpp
M clang-tools-extra/clangd/unittests/PrerequisiteModulesTest.cpp
Log Message:
-----------
[clangd] [C++20] [Modules] Introduce GC for clangd built modules (#193973)
This patch introduces simple GC for clangd built module files to avoid
the clangd built module cache to increase infinitely.
The strategy is, in a clangd built module file cache, if the clangd
built module (we think all PCM files in clangd cache are built by
clangd) was not accessed in a time (by default 3 day, controlled by
--modules-builder-versioned-gc-threshold-seconds)，clangd will remove it.
The strategy is not perfect. e.g., I heard in some systems, the atime
was forbid or not update. But given a trade off between usability and
maintainability. I feel the current stategy is fine.
AI assisted.
Commit: 2168f4b3d3bf22e360d016b583ef5f1f0650cc70
https://github.com/llvm/llvm-project/commit/2168f4b3d3bf22e360d016b583ef5f1f0650cc70
Author: Eugene Epshteyn <eepshteyn at nvidia.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M flang/test/Lower/pointer-args-caller.f90
M flang/test/Lower/pointer-assignments.f90
M flang/test/Lower/pointer-association-polymorphic.f90
M flang/test/Lower/pointer-default-init.f90
M flang/test/Lower/pointer-disassociate.f90
Log Message:
-----------
[flang][NFC] Converted five tests from old lowering to new lowering (part 48) (#193889)
Tests converted from test/Lower: pointer-args-caller.f90,
pointer-assignments.f90, pointer-association-polymorphic.f90,
pointer-default-init.f90, pointer-disassociate.f90
Commit: f1f2022f4f18ff31aea852a0e903ba85d28f5717
https://github.com/llvm/llvm-project/commit/f1f2022f4f18ff31aea852a0e903ba85d28f5717
Author: Petter Berntsson <petter.berntsson at arm.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M libc/docs/CMakeLists.txt
M libc/docs/headers/index.rst
A libc/utils/docgen/sys/uio.yaml
Log Message:
-----------
[libc][docs] Add sys/uio.h implementation status (#122006) (#193980)
Add sys/uio.h implementation-status docs to llvm-libc.
Commit: 52534a1e1207aa1a983d7ee47e5e3a871b7373e5
https://github.com/llvm/llvm-project/commit/52534a1e1207aa1a983d7ee47e5e3a871b7373e5
Author: Chuanqi Xu <yedeng.yd at linux.alibaba.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M clang/lib/AST/StmtProfile.cpp
R clang/test/Modules/callable-require-clause-merge.cppm
M clang/test/Modules/polluted-operator.cppm
Log Message:
-----------
Revert "[C++20] [Modules] Don't profiling the callee of CXXFoldExpr (#190732)" (#193975)
This reverts commit 4c2e49dc5ce3125be9fb07dcefe9be970ce739ec.
See the discussion in https://github.com/llvm/llvm-project/pull/193885
for detail
Commit: c92bf56cd7bb9861bb52eaf2a75680149a25ec5c
https://github.com/llvm/llvm-project/commit/c92bf56cd7bb9861bb52eaf2a75680149a25ec5c
Author: David Spickett <david.spickett at arm.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M lldb/docs/use/aarch64-linux.md
M lldb/source/Plugins/ABI/AArch64/ABISysV_arm64.cpp
M lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.h
M lldb/source/Plugins/Process/Utility/RegisterFlagsDetector_arm64.cpp
M lldb/source/Plugins/Process/Utility/RegisterFlagsDetector_arm64.h
M lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_arm64.cpp
M lldb/source/Plugins/Process/elf-core/RegisterContextPOSIXCore_arm64.cpp
M lldb/test/API/linux/aarch64/permission_overlay/TestAArch64LinuxPOE.py
M lldb/test/API/linux/aarch64/permission_overlay/main.c
Log Message:
-----------
[lldb][AArch64][Linux] Rename "por" register to "por_el0" (#193983)
As agreed with my Arm colleagues working on GDB.
The suffix means we are matching the architectural name exactly, and
reducing confusion if you're
debuging multiple exception levels where there could be por_el<N> as
well.
In the process of updating the tests I found some
"register read" output has changed alignment so I
have fixed that too.
Commit: 785d7246bf16e72c367f7428866cb0cc5ad884bb
https://github.com/llvm/llvm-project/commit/785d7246bf16e72c367f7428866cb0cc5ad884bb
Author: Joe Nash <joseph.nash at amd.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/VOPDInstructions.td
A llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vopd3_unused_operands.txt
Log Message:
-----------
[AMDGPU][Disassembler] Permit unneeded VOPD3 operands to be non-zero (#193974)
Use ? instead of 0 in the tablegen definitions for those unused operands
of VOPD3 instructions.
This enables the instruction to be disassembled regardless of what bits
are in those fields, which helps diagnose broken code. Previously, the
disassembler would reject these.
Commit: 4837b0a476ebf54bdd19c783b01f7235a428a7cc
https://github.com/llvm/llvm-project/commit/4837b0a476ebf54bdd19c783b01f7235a428a7cc
Author: Utkarsh Saxena <usx at google.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M clang/lib/Analysis/LifetimeSafety/Checker.cpp
M clang/test/Sema/Inputs/lifetime-analysis.h
M clang/test/Sema/warn-lifetime-safety-suggestions.cpp
Log Message:
-----------
[LifetimeSafety] Suppress suggestion/inference for moved loans (#193899)
Fixes https://github.com/llvm/llvm-project/issues/193747
Commit: 08992737d23113d3b9a78974b87b1ba3e7ecb6cb
https://github.com/llvm/llvm-project/commit/08992737d23113d3b9a78974b87b1ba3e7ecb6cb
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
Log Message:
-----------
[VPlan] Use early continue in ::buildVPlansWithVPRecipes (NFC). (#193979)
Reduce nesting by using early continue, split off from
https://github.com/llvm/llvm-project/pull/192868
Commit: 25a035d944868def9b5a43399eb48cdee2ef2fa3
https://github.com/llvm/llvm-project/commit/25a035d944868def9b5a43399eb48cdee2ef2fa3
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M clang/lib/AST/ByteCode/Interp.h
M clang/test/AST/ByteCode/c.c
Log Message:
-----------
[clang][bytecode] Reject float-to-int casts on non-numbers (#193968)
Commit: b0931483280db3a34c0228a859bd1fcb9af3902f
https://github.com/llvm/llvm-project/commit/b0931483280db3a34c0228a859bd1fcb9af3902f
Author: hulxv <hulxxv at gmail.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M libc/shared/math.h
A libc/shared/math/dmulf128.h
A libc/shared/math/dmull.h
M libc/src/__support/math/CMakeLists.txt
A libc/src/__support/math/dmulf128.h
A libc/src/__support/math/dmull.h
M libc/src/math/generic/CMakeLists.txt
M libc/src/math/generic/dmulf128.cpp
M libc/src/math/generic/dmull.cpp
M libc/test/shared/CMakeLists.txt
M libc/test/shared/shared_math_constexpr_test.cpp
M libc/test/shared/shared_math_test.cpp
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[libc][math] Refactor dmul family to header-only (#182151)
Refactors the dmul math family to be header-only.
Closes https://github.com/llvm/llvm-project/issues/182150
Target Functions:
- dmulf128
- dmull
Commit: 87a9cbaed1d6a6c7759d20279436914bb15343f0
https://github.com/llvm/llvm-project/commit/87a9cbaed1d6a6c7759d20279436914bb15343f0
Author: Brian Cain <brian.cain at oss.qualcomm.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M compiler-rt/cmake/Modules/AllSupportedArchDefs.cmake
M compiler-rt/lib/tysan/tysan_platform.h
Log Message:
-----------
[compiler-rt][TySan] Add Hexagon target support (#191603)
Add shadow memory mapping for Hexagon (32-bit architecture) and enable
the TySan build for the Hexagon target.
Hexagon uses a 4-byte shadow entry (PtrShift=2) with the shadow region
at 0x80000000-0xBFFFFFFF (1GB). A 28-bit mask (kAppMemMsk) covers 256MB
of app address space; addresses differing only in bits 28-31 alias in
the shadow. kAppAddr is set to 0xC0000000 to size the mmap to exactly
the 1GB shadow region.
Commit: 94cdc55d8a7734ed06d60c169c878231d4952470
https://github.com/llvm/llvm-project/commit/94cdc55d8a7734ed06d60c169c878231d4952470
Author: Jianhui Li <jian.hui.li at intel.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUWgToSgDistribute.cpp
M mlir/test/Dialect/XeGPU/xegpu-wg-to-sg-unify-ops.mlir
Log Message:
-----------
[MLIR][XeGPU] Remove use-by-broadcast-only restriction for ShapeCast op in Wg-to-Sg distribution pass (#193640)
The WgToSgVectorShapeCastOp pattern previously required that
vector.shape_cast operations expanding unit dimensions could only be
used by vector.broadcast operations. This constraint was not necessary
anymore after the recent refectory.
Commit: cd4ac81779e0ce4ca967705f2182676e7473e814
https://github.com/llvm/llvm-project/commit/cd4ac81779e0ce4ca967705f2182676e7473e814
Author: Ryan Buchner <rbuchner at qti.qualcomm.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M llvm/test/Transforms/SLPVectorizer/RISCV/basic-strided-loads.ll
Log Message:
-----------
[SLP] Add new test for widened strided loads of > i8 width (#193901)
Currently we don't vectorize into strided loads as expected.
Commit: 0642d03c76b3a084935f94869b8ab7508aa889fc
https://github.com/llvm/llvm-project/commit/0642d03c76b3a084935f94869b8ab7508aa889fc
Author: Guray Ozen <guray.ozen at gmail.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
Log Message:
-----------
[MLIR][NVVM] Remove ptx version for consistency (#193991)
Commit: 0f861ec33ae6c0b0573207e4796e5a85748ff413
https://github.com/llvm/llvm-project/commit/0f861ec33ae6c0b0573207e4796e5a85748ff413
Author: Guray Ozen <guray.ozen at gmail.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
M mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp
M mlir/test/Dialect/LLVMIR/nvvm-transcendentals.mlir
M mlir/test/Target/LLVMIR/nvvm/transcendentals.mlir
Log Message:
-----------
[MLIR][NVVM] Add `nvvm.cos` OP (#193792)
Implement `nvvm.cos` with ftz flag
Commit: 1bd6f6636a395bdf0d995bf0d8fae2cd334ae590
https://github.com/llvm/llvm-project/commit/1bd6f6636a395bdf0d995bf0d8fae2cd334ae590
Author: Philip Reames <listmail at philipreames.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M llvm/include/llvm/Transforms/Utils/LowerVectorIntrinsics.h
M llvm/lib/CodeGen/PreISelIntrinsicLowering.cpp
M llvm/lib/CodeGen/TargetLoweringBase.cpp
M llvm/lib/Transforms/Utils/LowerVectorIntrinsics.cpp
R llvm/test/Transforms/PreISelIntrinsicLowering/AArch64/expand-fp-math-binary.ll
R llvm/test/Transforms/PreISelIntrinsicLowering/RISCV/expand-fp-math-binary.ll
Log Message:
-----------
Revert "[PreISelIntrinsicLowering] Expand binary elementwise intrinsics (#193552) (#193580) (#193990)
This reverts commit a1d11348aba4b70295ef9ada4a13a722455165d3.
Two problems have been identified:
- The expansion for powi was functionally wrong - the second argument
stales scalar even when the first is a vector.
- AArch64 uses the Expand option on libcalls to select vector libcalls
in some cases. The test coverage for this uses -start-after which
happens to miss this pass.
Commit: eb17a2e19c854b0f4f3018f3e17d70340a3eb45f
https://github.com/llvm/llvm-project/commit/eb17a2e19c854b0f4f3018f3e17d70340a3eb45f
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M libclc/CMakeLists.txt
Log Message:
-----------
[libclc] Make sure PACKAGE_VERSION is set for libclc (#193966)
Summary:
This can be unset because CMake does not expose this as a raw variable
when you use the find_package interface. If it is not set as in the case
of standalone builds the clang resource directory won't be found
Commit: deb84db5b4056eed1457a6b03148a486bbadd8ea
https://github.com/llvm/llvm-project/commit/deb84db5b4056eed1457a6b03148a486bbadd8ea
Author: Justin Bogner <mail at justinbogner.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M llvm/lib/Target/DirectX/DXILOpBuilder.cpp
M llvm/test/CodeGen/DirectX/BufferLoad-sm61.ll
M llvm/test/CodeGen/DirectX/BufferLoad.ll
M llvm/test/CodeGen/DirectX/BufferStore-sm61.ll
M llvm/test/CodeGen/DirectX/BufferStore.ll
M llvm/test/CodeGen/DirectX/CreateHandle-NURI.ll
M llvm/test/CodeGen/DirectX/CreateHandle.ll
M llvm/test/CodeGen/DirectX/CreateHandleFromBinding-NURI.ll
M llvm/test/CodeGen/DirectX/CreateHandleFromBinding.ll
M llvm/test/CodeGen/DirectX/UAddc.ll
M llvm/test/CodeGen/DirectX/WaveGetLaneIndex.ll
M llvm/test/CodeGen/DirectX/abs.ll
M llvm/test/CodeGen/DirectX/acos.ll
M llvm/test/CodeGen/DirectX/asin.ll
M llvm/test/CodeGen/DirectX/atan.ll
M llvm/test/CodeGen/DirectX/ceil.ll
M llvm/test/CodeGen/DirectX/comput_ids.ll
M llvm/test/CodeGen/DirectX/cos.ll
M llvm/test/CodeGen/DirectX/cosh.ll
M llvm/test/CodeGen/DirectX/countbits.ll
M llvm/test/CodeGen/DirectX/dot4add_i8packed.ll
M llvm/test/CodeGen/DirectX/dot4add_u8packed.ll
M llvm/test/CodeGen/DirectX/exp.ll
M llvm/test/CodeGen/DirectX/fdot.ll
M llvm/test/CodeGen/DirectX/floor.ll
M llvm/test/CodeGen/DirectX/fma.ll
M llvm/test/CodeGen/DirectX/fmad.ll
M llvm/test/CodeGen/DirectX/fmax.ll
M llvm/test/CodeGen/DirectX/fmin.ll
M llvm/test/CodeGen/DirectX/frac.ll
M llvm/test/CodeGen/DirectX/idot.ll
M llvm/test/CodeGen/DirectX/imad.ll
M llvm/test/CodeGen/DirectX/is_fpclass.ll
M llvm/test/CodeGen/DirectX/isinf.ll
M llvm/test/CodeGen/DirectX/isnan.ll
M llvm/test/CodeGen/DirectX/log.ll
M llvm/test/CodeGen/DirectX/log10.ll
M llvm/test/CodeGen/DirectX/log2.ll
M llvm/test/CodeGen/DirectX/reversebits.ll
M llvm/test/CodeGen/DirectX/round.ll
M llvm/test/CodeGen/DirectX/rsqrt.ll
M llvm/test/CodeGen/DirectX/saturate.ll
M llvm/test/CodeGen/DirectX/sin.ll
M llvm/test/CodeGen/DirectX/sinh.ll
M llvm/test/CodeGen/DirectX/smax.ll
M llvm/test/CodeGen/DirectX/smin.ll
M llvm/test/CodeGen/DirectX/splitdouble.ll
M llvm/test/CodeGen/DirectX/sqrt.ll
M llvm/test/CodeGen/DirectX/tan.ll
M llvm/test/CodeGen/DirectX/tanh.ll
M llvm/test/CodeGen/DirectX/trunc.ll
M llvm/test/CodeGen/DirectX/umad.ll
M llvm/test/CodeGen/DirectX/umax.ll
M llvm/test/CodeGen/DirectX/umin.ll
Log Message:
-----------
[DirectX] Apply DXIL op fnattrs to declarations (#193622)
We need to apply DXIL op attributes to the functions themselves, and all
DXIL ops should have the `unwind` attribute. This matches the DXC
behaviour and what consumers like warp's GPU-based validation expect.
Fixes #193620
Commit: 0b449f66927f1dcfdbcfac58efdb037dd6f77a33
https://github.com/llvm/llvm-project/commit/0b449f66927f1dcfdbcfac58efdb037dd6f77a33
Author: Abid Qadeer <haqadeer at amd.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M flang/lib/Frontend/CompilerInvocation.cpp
M flang/test/Driver/do_concurrent_to_omp_cli.f90
Log Message:
-----------
[flang] Fix abort on invalid -fdo-concurrent-to-openmp value. (#193929)
We observed that following command can cause an assertion fail
`flang -fopenmp -fdo-concurrent-to-openmp=devic,e` <file>
It happened because `parseDoConcurrentMapping` reported an error but
still called `val.value()` on failure, tripping std::optional
assertions.
The fix is to return false on error and wire return into
`createFromArgs`.
Commit: a614cd391a402c8682c7b4781121eab07da09ec7
https://github.com/llvm/llvm-project/commit/a614cd391a402c8682c7b4781121eab07da09ec7
Author: Charles Zablit <c_zablit at apple.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M lldb/tools/lldb-dap/Handler/RequestHandler.cpp
Log Message:
-----------
[lldb-dap][windows] fix a race condition in runInTerminal mode (#193773)
Commit: 1823355d06b854854701a8ba430aa1f6be9994f4
https://github.com/llvm/llvm-project/commit/1823355d06b854854701a8ba430aa1f6be9994f4
Author: SiliconA-Z <gfunni234 at gmail.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M llvm/lib/Target/ARM/ARMISelLowering.cpp
M llvm/test/CodeGen/ARM/hoist-and-by-const-from-lshr-in-eqcmp-zero.ll
M llvm/test/CodeGen/ARM/hoist-and-by-const-from-shl-in-eqcmp-zero.ll
Log Message:
-----------
[ARM] Fold SELECT (AND(X,1) == 0), C1, C2 -> XOR(C1,AND(NEG(AND(X,1)),XOR(C1,C2)) in Thumb1 (#185898)
Thumb1 has no native cmov, so this is a better solution.
Commit: e8f32abba9a156257429b812eb867791800bc774
https://github.com/llvm/llvm-project/commit/e8f32abba9a156257429b812eb867791800bc774
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M llvm/include/llvm/CodeGen/TargetInstrInfo.h
M llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
M llvm/lib/CodeGen/TargetInstrInfo.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.h
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.h
M llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
M llvm/lib/Target/ARM/ARMBaseInstrInfo.h
M llvm/lib/Target/CSKY/CSKYInstrInfo.cpp
M llvm/lib/Target/LoongArch/LoongArchInstrInfo.cpp
M llvm/lib/Target/MSP430/MSP430InstrInfo.cpp
M llvm/lib/Target/Mips/MipsBranchExpansion.cpp
M llvm/lib/Target/Mips/MipsInstrInfo.cpp
M llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfo.h
M llvm/lib/Target/Sparc/SparcInstrInfo.cpp
M llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
M llvm/lib/Target/Xtensa/XtensaInstrInfo.cpp
Log Message:
-----------
CodeGen: Fix double counting bundles in inst size verification (#191460)
The AMDGPU implementation handles bundles by summing the
member instructions. This was starting with the size of the
bundle instruction, then re-adding all of the same instructions.
This loop is over the iterator, not instr_iterator, so it should
not be looking through the bundled instructions. Most of the other
uses of getInstSizeInBytes are also on the iterator, not the
instr_iterator so the convention seems to be targets need to handle
BUNDLE correctly themselves.
Commit: cbda767c2a413e8fb621bcc9460e948a7a444c74
https://github.com/llvm/llvm-project/commit/cbda767c2a413e8fb621bcc9460e948a7a444c74
Author: yonghong-song <yhs at fb.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M llvm/lib/IR/ModuleSummaryIndex.cpp
M llvm/lib/Transforms/IPO/FunctionImport.cpp
M llvm/lib/Transforms/Utils/FunctionImportUtils.cpp
A llvm/test/ThinLTO/X86/reduce-promotion-distributed.ll
A llvm/test/ThinLTO/X86/reduce-promotion-same-local-name-distributed.ll
Log Message:
-----------
[ThinLTO] Reduce the number of renaming due to promotions in distribu… (#188074)
…ted mode
For thin-lto, the pull request [1] reduced the number of renaming due to
promotions in process mode. This has been used in linux kernel ([2]) as
it helps kernel live patching a lot.
Recently, I found Rong Xu has added thin-lto distributed mode support in
linux kenrel ([3]) and it is likely to be merged in kernel as well. So
it would be a good idea for llvm to support reducing the number of
renaming in distributed mode too.
To implement this, in function gatherImportedSummariesForModule(),
import functions into summaries if those functions does not need rename.
This will ensure that imported functions have the same name as in there
original module.
[1] https://github.com/llvm/llvm-project/pull/183793
[2]
https://git.kernel.org/pub/scm/linux/kernel/git/kbuild/linux.git/commit/?h=kbuild-for-next&id=dc3b90751d6ffa8865e09a81645a539b9de6d642
[3]
https://lore.kernel.org/linux-kbuild/20251028182822.3210436-3-xur@google.com/
Commit: 1ba6cc0e318bb022dfd322e39df49c5f0dc89068
https://github.com/llvm/llvm-project/commit/1ba6cc0e318bb022dfd322e39df49c5f0dc89068
Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp
M clang/test/CodeGen/AArch64/neon-intrinsics.c
M clang/test/CodeGen/AArch64/neon/intrinsics.c
Log Message:
-----------
[clang][CIR] Add lowering for vcvtd_n_ and vcvts_n_ conversion intrinsics (#190961) (#193273)
This PR adds lowering for the missing conversion intrinsics with an
immediate argument (identified by `_n_` in the intrinsic name), namely
the `vcvts_n_` and `vcvtd_n_` variants.
It also moves the corresponding tests from:
* clang/test/CodeGen/AArch64/neon_intrinsics.c
to:
* clang/test/CodeGen/AArch64/neon/intrinsics.c
The lowering follows the existing implementation in
CodeGen/TargetBuiltins/ARM.cpp.
Reference:
[1] https://arm-software.github.io/acle/neon_intrinsics/advsimd.html#conversions
Commit: df359d81659a248caccd935817fd3f20609b548c
https://github.com/llvm/llvm-project/commit/df359d81659a248caccd935817fd3f20609b548c
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/AArch64/slp-fma-loss.ll
Log Message:
-----------
[SLP] Skip FMulAdd conversion for alt-shuffle FAdd/FSub nodes (#193960)
isAddSubLikeOp() admits alt-shuffle nodes that mix FAdd and FSub, so
transformNodes() was marking them with CombinedOp = FMulAdd. The cost
model then priced the node as a single llvm.fmuladd vector intrinsic,
but emission for an alt shuffle still goes through the ShuffleVector
path and produces fmul + fadd + fsub + shufflevector, which the backend
cannot fuse into a single fmuladd. The resulting under-count made SLP
choose the vector form over the scalar form even when the scalar form
lowers to real FMAs (e.g. fmadd + fmsub on AArch64).
Commit: 63e36755decfc92ee5e457c292aeeb0a69cfa484
https://github.com/llvm/llvm-project/commit/63e36755decfc92ee5e457c292aeeb0a69cfa484
Author: Finn Plummer <mail at inbelic.dev>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M llvm/include/llvm/IR/IntrinsicsDirectX.td
A llvm/test/Transforms/DirectX/getpointer-sink-behavior.ll
M llvm/test/Transforms/GVN/no-sink-dxgetpointer.ll
M llvm/test/Transforms/SimplifyCFG/DirectX/no-sink-dxgetpointer.ll
Log Message:
-----------
[DirectX] Denote `dx.resource.getpointer` with `IntrInaccessibleMemOnly` and `IntrReadMem` (#193593)
`IntrConvergent` was originally added to `dx.resource.getpointer` to
prevent optimization passes (`SimplifyCFG`, `GVN`) from sinking the
intrinsic out of control flow branches, which would create phi nodes on
the returned pointer.
Using `IntrInaccessibleMemOnly` and `IntrReadMem` semantics still
prevent passes from merging or sinking identical calls across branches.
However, this allows the call to be moved within a single control flow
path.
Updates relevant tests and adds a new test to demonstrate a now legal
potential optimization.
This was discovered when
https://github.com/llvm/llvm-project/pull/188792 caused the following
failure:
https://github.com/llvm/llvm-project/actions/runs/24577221310/job/71865579618.
When emitting convergence control tokens, each resource access is then a
user of the convergence control tokens, which makes it's use more
unnecessarily restrictive for optimizations and in this case would
prevent a loop unroll from taking place.
Assisted by: Claude Opus 4.6
Commit: 0dc6e8c41e5f41ce3c7320eb4a1b2f2c9bc3da38
https://github.com/llvm/llvm-project/commit/0dc6e8c41e5f41ce3c7320eb4a1b2f2c9bc3da38
Author: Adel Ejjeh <adel.ejjeh at amd.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCExpr.cpp
Log Message:
-----------
[AMDGPU][NFC] Refactor TryGetMCExprValue into evaluateMCExprs helper (#193859)
Replace the duplicated `TryGetMCExprValue` lambda in
`evaluateExtraSGPRs`, `evaluateTotalNumVGPR`, `evaluateAlignTo`, and
`evaluateOccupancy` with a shared static helper `evaluateMCExprs` that
takes an `initializer_list` of `uint64_t` references, enabling callers
to write:
```cpp
uint64_t VCCUsed, FlatScrUsed, XNACKUsed;
if (!evaluateMCExprs(Args, Asm, {VCCUsed, FlatScrUsed, XNACKUsed}))
return false;
```
Split out from #192306 per reviewer feedback.
This PR was created with the help of Github Copilot Claude Opus.
---------
Co-authored-by: Copilot <copilot at github.com>
Commit: 7c043b7a571c7a05f45110a94e7424a0eaa52fd8
https://github.com/llvm/llvm-project/commit/7c043b7a571c7a05f45110a94e7424a0eaa52fd8
Author: Andrey Pavlenko <andrey.a.pavlenko at gmail.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M mlir/include/mlir/Dialect/XeGPU/IR/XeGPUTypes.td
M mlir/lib/Conversion/VectorToXeGPU/VectorToXeGPU.cpp
M mlir/test/Conversion/VectorToXeGPU/transfer-read-to-xegpu.mlir
M mlir/test/Conversion/VectorToXeGPU/transfer-write-to-xegpu.mlir
Log Message:
-----------
[MLIR][XeGPU][VectorToXeGPU] Fixed lowering of transfer_read/write for rank > 2 (#193308)
If rank > 2, load gather/store scatter are used.
Increased value type rank to 8.
Commit: 61bfd7db9f551fabeb928c141ac1993ee143b37b
https://github.com/llvm/llvm-project/commit/61bfd7db9f551fabeb928c141ac1993ee143b37b
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
A clang/test/CIR/CodeGen/self-assign.c
M clang/test/CIR/IR/invalid-copy.cir
Log Message:
-----------
[CIR] Tolerate identical source and destination in cir.copy (#193852)
The SIBsim4 test in the llvm-test-suite MultiSource tests has code that
initializes a structure with itself. This was triggering a CIR
verifcation error because we were checking for source and destination
addresses matching. Since Clang allows this, this change is updating the
cir.copy operation to allow it.
Commit: b3cc1929966eed250d9207692aa15fc91e3e8a36
https://github.com/llvm/llvm-project/commit/b3cc1929966eed250d9207692aa15fc91e3e8a36
Author: Shafik Yaghmour <shafik.yaghmour at intel.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M clang/lib/AST/ByteCode/Context.cpp
M clang/lib/AST/ByteCode/Context.h
Log Message:
-----------
[NFC][Clang][ByteCode] Apply rule of three to Context and EvalIDScope (#193856)
Static analysis flagged these because they had destructor but did not
define copy constructor or copy assignment. For `EvalIDScope` I defined
them as deleted and was able to default the destructor for `Context`.
Commit: 323c3da8dcb81c0fa478fa837954d95b9f39f83e
https://github.com/llvm/llvm-project/commit/323c3da8dcb81c0fa478fa837954d95b9f39f83e
Author: laoshd <shandong.lao at hpe.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M flang-rt/include/flang-rt/runtime/format-implementation.h
M flang-rt/include/flang-rt/runtime/format.h
M flang-rt/lib/runtime/edit-input.cpp
M flang-rt/lib/runtime/edit-output.cpp
M flang-rt/unittests/Runtime/Format.cpp
M flang-rt/unittests/Runtime/NumericalFormatTest.cpp
M flang/docs/F202X.md
M flang/include/flang/Common/format.h
M flang/include/flang/Parser/format-specification.h
M flang/lib/Parser/io-parsers.cpp
M flang/lib/Parser/unparse.cpp
A flang/test/Semantics/io19.f90
Log Message:
-----------
[flang] [flang-rt] Implement AT edit descriptor for Fortran 202X with appropriate handling and tests (#189157)
This PR is to add AT edit descriptor, a new feature of Fortran 2023, 5.1
US 10.
AT is like A (character output) but trims trailing blanks before
emitting the string. AT is functionally the same as TRIM intrinsic.
AT is treated as a variant of A during parse. The trimming of the
trailing spaces are implemented the same as TRIM(). There exists a
method, LenTrim, that can be used to do the trimming. However it's local
to a different .cpp file, character.cpp. And the code is so simple that
no need to make extra effort to use LenTrim.
AT is output only and do not accept width.
This PR will fix #181379.
Commit: b06f62f7fc82ae464528e364119f30e9c8bbbe42
https://github.com/llvm/llvm-project/commit/b06f62f7fc82ae464528e364119f30e9c8bbbe42
Author: Narayan <nsreekumar6 at gmail.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
A llvm/include/llvm/ABI/TargetInfo.h
M llvm/include/llvm/ABI/Types.h
M llvm/lib/ABI/CMakeLists.txt
A llvm/lib/ABI/TargetInfo.cpp
M llvm/lib/ABI/Types.cpp
Log Message:
-----------
[llvm] Introduce TargetInfo (#190730)
This PR introduces ABIInfo and TargetCodeGenInfo, the abstract ABI
lowering layer for the LLVM ABI library introduced in #158329.
This is a direct parallel to clang::ABIInfo and
clang::TargetCodeGenInfo, but operating entirely on the llvm::abi type
system rather than Clang's AST, keeping ABI logic independent of the
frontend. It is a prerequisite for implementing the target specific
lowering passes that lower FunctionInfo to LLVM IR calling conventions.
Co-authored-by: Nikita Popov <npopov at redhat.com>
Commit: a1a4da0416ad66e31d7cacda3231e4683dd026a8
https://github.com/llvm/llvm-project/commit/a1a4da0416ad66e31d7cacda3231e4683dd026a8
Author: hulxv <hulxxv at gmail.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M libc/shared/math.h
A libc/shared/math/ddivf128.h
A libc/shared/math/ddivl.h
M libc/src/__support/math/CMakeLists.txt
A libc/src/__support/math/ddivf128.h
A libc/src/__support/math/ddivl.h
M libc/src/math/generic/CMakeLists.txt
M libc/src/math/generic/ddivf128.cpp
M libc/src/math/generic/ddivl.cpp
M libc/test/shared/CMakeLists.txt
M libc/test/shared/shared_math_constexpr_test.cpp
M libc/test/shared/shared_math_test.cpp
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[libc][math] Refactor ddiv family to header-only (#182149)
Refactors the ddiv math family to be header-only.
Closes https://github.com/llvm/llvm-project/issues/182148
Target Functions:
- ddivf128
- ddivl
Commit: 8e4f0ce6985354e90caa4deed80331e34cd7fb1c
https://github.com/llvm/llvm-project/commit/8e4f0ce6985354e90caa4deed80331e34cd7fb1c
Author: Helena Kotas <hekotas at microsoft.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/lib/Sema/SemaDeclCXX.cpp
R clang/test/CodeGenHLSL/GlobalDestructors.hlsl
R clang/test/CodeGenHLSL/inline-constructors.hlsl
A clang/test/SemaHLSL/Constructors.hlsl
M clang/test/SemaHLSL/GlobalConstructors.hlsl
Log Message:
-----------
[HLSL] Remove support for user-defined constructors and destructors (#193375)
This change removes the support for user-defined constructors and
destructors.
Authored-by: Sarah Spall <sarahspall at microsoft.com>
Related to #185466
Commit: 589d337d3d442bbf77530452bd2322de73904ba1
https://github.com/llvm/llvm-project/commit/589d337d3d442bbf77530452bd2322de73904ba1
Author: Ryan Buchner <rbuchner at qti.qualcomm.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/RISCV/basic-strided-loads.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/revec-strided-load.ll
Log Message:
-----------
[SLP] Update analyzeRtStrideCandidate() to correctly handle types widen than i8 (including revectorization) (#191878)
Previously there was an implicit assumption that each input access only accessed a single byte.
Commit: b785dc42c7b1877dfae16a15ff4091b699579c8c
https://github.com/llvm/llvm-project/commit/b785dc42c7b1877dfae16a15ff4091b699579c8c
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenModule.cpp
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
A clang/test/CIR/CodeGen/no-proto-then-def.c
M clang/test/CIR/CodeGen/no-prototype.c
A clang/test/CIR/Transforms/cast-bitcast-funcptr-roundtrip-fold.cir
Log Message:
-----------
[CIR] Update uses of no-prototype GetGlobalOp (#193868)
When a no-prototype function is replaced by a proper definition, we
update uses of the previous function, mostly cir::GetGlobalOp
operations. If the result of the GetGlobalOp was being used in a store,
this was leading to verifier errors because the type being stored no
longer matched the expected type. This change fixes that by introducing
a bitcast when the GetGlobalOp is updated. It also introduces a new cast
folder to eliminate cast chains that are circular after this new bitcast
is inserted.
Assisted-by: Cursor / claude-4.7-opus-high
Commit: 3f3c26039f135688f832c1d228f20c32dca366bd
https://github.com/llvm/llvm-project/commit/3f3c26039f135688f832c1d228f20c32dca366bd
Author: Finn Plummer <mail at inbelic.dev>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M llvm/lib/Target/DirectX/DXILLegalizePass.cpp
A llvm/test/CodeGen/DirectX/legalize-switch-unreachable.ll
Log Message:
-----------
[DirectX] Resolve unreachable default branches in switch statements (#193592)
Add a legalization to resolve unreachable default branches in switch
statements. These are introduced when the
`CorrelatedValuePropagationPass` proves all cases of a switch are
covered, leaving the default as an unreachable block.
The default destination is replaced with either the common successor
block or the first switch case destination.
This was discovered from the following case:
https://godbolt.org/z/W7zE1GMT6, where we can see that the unrolling of
the outer loop is not successful and the switch statement with an
`unreachable` branch remains.
Assisted by: Claude Opus 4.6
Commit: a497f90dc0914d3cc6eb82254751115e562181ca
https://github.com/llvm/llvm-project/commit/a497f90dc0914d3cc6eb82254751115e562181ca
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M compiler-rt/lib/sanitizer_common/sanitizer_internal_defs.h
M compiler-rt/lib/ubsan_minimal/ubsan_minimal_handlers.cpp
Log Message:
-----------
[compiler-rt] Improve ubsan-minimal runtime for GPU use (#193597)
Summary:
GPUs are resource constrained, and we don't want to incur too much
overhead for using the runtime over a trap version. Unlike the other
targets, we have cheap `printf` on account of all the complexity being
done on the host, so we use that directly instead of custom formatting.
Additionally, we split the main function out into a helper function.
Listing it as `[cold]` prevents spurious inlining that massively bloated
register costs (this is an error reporting mechanism so hopefully that's
not controversial).
In practice for some basic tests, This cuts the register usage by more
than half and the stack size is no longer dynamically sized. The only
stack I saw was for the PC relative checks. This could be lowered
further with more intelligent PC caching, but this is a good, minimally
invasive, start.
Commit: f24bfb8967cb9a128ca28cb454be6883a347379a
https://github.com/llvm/llvm-project/commit/f24bfb8967cb9a128ca28cb454be6883a347379a
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRV.h
M llvm/lib/Target/SPIRV/SPIRVLegalizeImplicitBinding.cpp
A llvm/lib/Target/SPIRV/SPIRVLegalizeImplicitBinding.h
M llvm/lib/Target/SPIRV/SPIRVLegalizePointerCast.cpp
A llvm/lib/Target/SPIRV/SPIRVLegalizePointerCast.h
M llvm/lib/Target/SPIRV/SPIRVMergeRegionExitTargets.cpp
A llvm/lib/Target/SPIRV/SPIRVMergeRegionExitTargets.h
M llvm/lib/Target/SPIRV/SPIRVPassRegistry.def
M llvm/lib/Target/SPIRV/SPIRVRegularizer.cpp
A llvm/lib/Target/SPIRV/SPIRVRegularizer.h
M llvm/lib/Target/SPIRV/SPIRVTargetMachine.cpp
M llvm/test/CodeGen/SPIRV/ctor-dtor-lowering-ir.ll
M llvm/test/CodeGen/SPIRV/llc-pipeline.ll
A llvm/test/CodeGen/SPIRV/passes/SPIRVLegalizeImplicitBinding.ll
A llvm/test/CodeGen/SPIRV/passes/SPIRVLegalizePointerCast.ll
A llvm/test/CodeGen/SPIRV/passes/SPIRVMergeRegionExitTargets.ll
A llvm/test/CodeGen/SPIRV/passes/SPIRVRegularizer-i1-icmp.ll
M llvm/test/CodeGen/SPIRV/pointers/load-vector-from-array-of-vectors.ll
M llvm/test/CodeGen/SPIRV/pointers/store-array-of-vectors-to-vector.ll
Log Message:
-----------
[SPIR-V][NewPM] Register IR-level passes with the new pass manager (#193660)
Add NPM wrappers for SPIRVRegularizer, SPIRVLegalizeImplicitBinding,
SPIRVLegalizePointerCast, and SPIRVMergeRegionExitTargets
Commit: 7b336dcfce1d66c6764644698a8ac49e1fa5fe36
https://github.com/llvm/llvm-project/commit/7b336dcfce1d66c6764644698a8ac49e1fa5fe36
Author: Philip DePetro <subpremium at hotmail.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M lldb/include/lldb/API/SBExpressionOptions.h
M lldb/include/lldb/Target/Process.h
M lldb/include/lldb/Target/Target.h
M lldb/include/lldb/Target/Thread.h
M lldb/source/API/SBExpressionOptions.cpp
M lldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.cpp
M lldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.h
M lldb/source/Target/Process.cpp
M lldb/source/Target/StopInfo.cpp
M lldb/source/Target/Thread.cpp
M lldb/source/Target/ThreadPlanCallFunction.cpp
A lldb/test/API/commands/expression/expr-with-fork/Makefile
A lldb/test/API/commands/expression/expr-with-fork/TestExprWithFork.py
A lldb/test/API/commands/expression/expr-with-fork/main.cpp
Log Message:
-----------
[lldb] Allow forks to occur in expression evaluation (#184815)
@jimingham You had suggested to @clayborg that we should call DidFork(),
DidVFork() and DidVForkDone() after a corresponding stop in expression
evaluation. Those functions require parameters that are private to the
specific child StopInfo class. I went with reusing the existing
StopInfo::PerformAction() virtual function, rather than create a new one
just for this purpose.
Commit: 600efe3dd9bb8a267c8ebe9faf9a6f5f82e25831
https://github.com/llvm/llvm-project/commit/600efe3dd9bb8a267c8ebe9faf9a6f5f82e25831
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUMCInstLower.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.h
Log Message:
-----------
AMDGPU: Implement getInstSizeVerifyMode (#191461)
Replace the custom instruction size check.
Commit: a3285a1a14dbf9f5c5f013d31d9eb9c14865fc73
https://github.com/llvm/llvm-project/commit/a3285a1a14dbf9f5c5f013d31d9eb9c14865fc73
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M clang/lib/Driver/ToolChain.cpp
M clang/test/Driver/Xarch.c
Log Message:
-----------
clang: Check -Xarch compatibility using Triple parsed architecture. (#189651)
This will allow recognizing any of the triple aliases for the
architecture. This will avoid test failures when the amdgcn triple top
level architecture is renamed.
Commit: 2948f9a784e8d25793d864f8c0f4b9a151d6f771
https://github.com/llvm/llvm-project/commit/2948f9a784e8d25793d864f8c0f4b9a151d6f771
Author: Bruno Cardoso Lopes <bruno.cardoso at gmail.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIRAttrs.td
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/lib/CIR/CodeGen/CIRGenDecl.cpp
M clang/lib/CIR/CodeGen/CIRGenModule.cpp
M clang/lib/CIR/CodeGen/CIRGenModule.h
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
M clang/lib/CIR/Dialect/Transforms/CXXABILowering.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
A clang/test/CIR/CodeGen/annotate-attribute.c
A clang/test/CIR/CodeGen/annotate-attribute.cpp
A clang/test/CIR/IR/annotation.cir
A clang/test/CIR/IR/invalid-annotation.cir
Log Message:
-----------
[CIR] Add `__attribute__((annotate(...)))` support (#193329)
Implement end-to-end (Dialect, CIRGen, Lowering) support for
__attribute__((annotate(...))) on functions and global variables.
Dialect:
- cir::AnnotationAttr (#cir.annotation<name = "...", args = [...]>).
- $annotations on cir.func and cir.global (ArrayAttr of AnnotationAttr).
FuncOp gets a custom parser/printer entry; for GlobalOp it's tacked onto
the assemblyFormat.
CIRGen:
- Annotations are attached as deferred entries in CIRGenModule and
flushed at end-of-TU so the most up-to-date ValueDecl wins (decl
annotations + def annotations both stick).
- emitAnnotationArgs uniques arg ArrayAttrs via FoldingSetNodeID so two
functions with identical args share one ArrayAttr (and one .args
constant in LLVM lowering).
- addGlobalAnnotations supports both GlobalOp and FuncOp paths,
including function-local statics (emitStaticVarDecl).
Lowering:
- CXXABILowering treats AnnotationAttr as legal (no ABI conversion).
- Direct-to-LLVM lowering filters the annotations attribute off
cir.func, then collects (sym_name, AnnotationAttr, loc) tuples
pre-conversion and post-conversion emits @llvm.global.annotations plus
the supporting strings/args constants in section "llvm.metadata" —
bit-for-bit comparable to OGCG. String constants and per-arg structs are
deduplicated; identical args ArrayAttrs share one .args global (an
improvement over OGCG's per-site copies).
Commit: dc41953559a6e34e82320da93e9f2e714556aaaf
https://github.com/llvm/llvm-project/commit/dc41953559a6e34e82320da93e9f2e714556aaaf
Author: Guray Ozen <guray.ozen at gmail.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
M mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp
M mlir/test/Dialect/LLVMIR/nvvm-transcendentals.mlir
M mlir/test/Target/LLVMIR/nvvm/transcendentals.mlir
Log Message:
-----------
[MLIR][NVVM] Add `nvvm.ex2` OP (#193790)
Commit: 25ec1baf2eb92e439289d71f5c3c82e3156bdc0a
https://github.com/llvm/llvm-project/commit/25ec1baf2eb92e439289d71f5c3c82e3156bdc0a
Author: Bruno Cardoso Lopes <bruno.cardoso at gmail.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/lib/CIR/Dialect/Transforms/FlattenCFG.cpp
Log Message:
-----------
[CIR] Fix remaining (part 2) FlattenCFG rewriter contract violations (#192503)
Fix all 17 remaining MLIR expensive pattern check violations in
CIRFlattenCFGPass. Found by MLIR_ENABLE_EXPENSIVE_PATTERN_API_CHECKS=ON.
Fingerprint violations (patterns modifying IR without notifying
rewriter):
- Use rewriter.replaceAllUsesWith() instead of direct
replaceAllUsesWith() in replaceCallWithTryCall (tests: invoke-attrs.cpp,
try-catch.cpp, try-catch-all-with-cleanup.cpp)
- Use rewriter.modifyOpInPlace() for removeCleanupAttr() in TryOp
flattening (tests: flatten-try-op.cir, flatten-cleanup-scope-eh.cir,
flatten-throwing-in-cleanup.cir)
IR verification failures (invalid intermediate IR after pattern
application):
- Expand nested op checks in Switch, Loop, CleanupScope, and TryOp
flattening to include all structured CIR ops (ScopeOp, IfOp, TernaryOp,
etc.), not just CleanupScopeOp. Break/continue/return inside nested
structured ops creates invalid cross-region branches when the enclosing
op hasn't been flattened yet (tests: switch.cir, loop.cpp,
cleanup-scope-return-in-loop.cpp, partial-array-cleanup.cpp, switch.cpp,
typeid.cpp, flatten-cleanup-scope-simple.cir,
flatten-cleanup-scope-multi-exit.cir)
- Relax CIR_ResumeOp ParentOneOf to include all structured ops, since
cir.resume can temporarily appear inside them during flattening (test:
new-delete-deactivation.cpp). Feels weird to do that, but extended
documentation to account for.
- Change loop region constraints from SizedRegion<1> to
MinSizedRegion<1> for cond/step regions, since cleanup scope flattening
inside these regions may create multiple blocks (test:
loop-cond-cleanup.cpp)
Commit: 72ca372fa7c9029d2b7a77c59a4cc24530e99e43
https://github.com/llvm/llvm-project/commit/72ca372fa7c9029d2b7a77c59a4cc24530e99e43
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUMCInstLower.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.h
Log Message:
-----------
Revert "AMDGPU: Implement getInstSizeVerifyMode" (#194026)
Reverts llvm/llvm-project#191461
Fails on miscomputed V_MADMK_F32 size
Commit: ec5862a28e595c86fbc38ce73d3f698f0c8e4b36
https://github.com/llvm/llvm-project/commit/ec5862a28e595c86fbc38ce73d3f698f0c8e4b36
Author: Tom Stellard <tstellar at redhat.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M .github/workflows/issue-subscriber.yml
M .github/workflows/new-issues.yml
M .github/workflows/new-prs.yml
M .github/workflows/pr-subscriber.yml
M .github/workflows/release-asset-audit.yml
Log Message:
-----------
Re-apply: workflows: Use main-branch-only environment when using ISSUE_SUBSCRIBER_TOKEN (#179990) (#193801)
This way we can prevent the secret from being used in user branches.
We originally reverted this because it was spamming the PRs with
'deployment' messages. GitHub has added a new feature to disable these
messages, so it should be safe to re-apply this.
Commit: d4ba0194f52b41855884b00a2baddb19ebd249dd
https://github.com/llvm/llvm-project/commit/d4ba0194f52b41855884b00a2baddb19ebd249dd
Author: Max191 <44243577+Max191 at users.noreply.github.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M flang/lib/Optimizer/Transforms/StackArrays.cpp
M mlir/include/mlir/Analysis/DataFlowFramework.h
M mlir/lib/Analysis/DataFlowFramework.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUPropagateLayout.cpp
A mlir/test/Analysis/DataFlow/test-staged-analyses.mlir
M mlir/test/lib/Analysis/DataFlow/TestDeadCodeAnalysis.cpp
M mlir/test/lib/Analysis/DataFlow/TestDenseBackwardDataFlowAnalysis.cpp
M mlir/test/lib/Analysis/DataFlow/TestDenseForwardDataFlowAnalysis.cpp
M mlir/test/lib/Analysis/DataFlow/TestSparseBackwardDataFlowAnalysis.cpp
M mlir/test/lib/Analysis/TestDataFlowFramework.cpp
M mlir/tools/mlir-opt/mlir-opt.cpp
Log Message:
-----------
[mlir] Add analysis filter in dataflow solver (#192998)
Adds an optional filtering control function to the dataflow solver's
initializeAndRun callback, which controls which analyses will be
initialized when running the solver. This makes it possible to reuse
existing dataflow solver instances that have already run to a fixpoint
without re-initializing all of the analyses that have already converged.
A new analysis and test pass is also added, which illustrates how the
filtering can be useful to run a staged analysis, which would not have
been possible before. The example analysis, called `BarAnalysis`,
depends on the converged state of the `FooAnalysis`. The Bar analysis is
a forward analysis that tracks, for each program point, whether any of
the preceding program points hold a `foo_state` that is divisible by 4.
In the example test, the control flow graph looks like the following:
```
entry-block
/ \
bb0 bb2
\ /
bb1
```
The `foo_state` of `bb1` depends on the `foo_state` of `bb0` and `bb2`.
If the solver goes through `bb0->bb1` before `bb2->bb1`, then there is
an intermediate stage in the analyses where the state of `bb1` could be
divisible by 4, even though the final state of `bb1` will not be
divisible by 4 in the converged state. If the `BarAnalysis` runs on
`bb1` in this intermediate state, then it will get stuck with the
"divisible by 4" state, and the analysis will not yield the desired
results.
This PR ensures that the `BarAnalysis` will see the correct state
`foo_state`, because the `FooAnalysis` will fully run to a fixpoint
before the `BarAnalysis` is loaded, initialized, and run.
The Foo and Bar analyses are just trivial examples, but this pattern is
useful when there are analyses that can be made more effective by using
complementary analyses like integer range/divisibility analyses.
**Note for integration:**
DataFlowSolver::load now stores the concrete analysis TypeID, exposed
via DataFlowAnalysis::getTypeID(). Downstream DataFlowAnalysis
subclasses defined in anonymous namespaces must add
MLIR_DEFINE_EXPLICIT_INTERNAL_INLINE_TYPE_ID(ClassName) to their class
body.
Assisted-by: Codex (gpt-5.4)
Commit: b08ec97d37cc8df35e2f60245b49b10ddb23dcc4
https://github.com/llvm/llvm-project/commit/b08ec97d37cc8df35e2f60245b49b10ddb23dcc4
Author: Thurston Dang <thurston at google.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
A llvm/test/Transforms/LoopVectorize/extract-value-widen.ll
Log Message:
-----------
[LoopVectorize] Don't replace widen with replicate for ExtractValueInst (#193404)
VPWidenRecipe with an underlying ExtractValueInst stores the
ExtractValue's indices() as part of the recipe's "operands",
necessitating special handling (see VPRecipeBuilder::tryToWiden() and
VPWidenRecipe::execute()). This makes it incompatible with conversion to
VPReplicateRecipe, because VPReplicateRecipe's scalarizeInstruction()
may attempt to set each operand of the cloned ExtractValueInst, but the
indices cannot be set via setOperand().
This patch works around the issue by preventing the conversion of
ExtractValueInst-based VPWidenRecipe to VPReplicateRecipe.
Fixes: https://github.com/llvm/llvm-project/issues/193275
Commit: 7de8b11607bf981c146c2e4c0e4e38bde05bb539
https://github.com/llvm/llvm-project/commit/7de8b11607bf981c146c2e4c0e4e38bde05bb539
Author: Justin Fargnoli <jfargnoli at nvidia.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M llvm/include/llvm/Transforms/Utils/UnrollLoop.h
M llvm/lib/Transforms/Scalar/LoopUnrollPass.cpp
M llvm/lib/Transforms/Utils/LoopUnroll.cpp
A llvm/test/Transforms/LoopUnroll/debug-and-remarks.ll
R llvm/test/Transforms/LoopUnroll/debug.ll
Log Message:
-----------
[LoopUnroll] Make optimization remarks more precise (#190714)
This PR adopts the following strategy for emitting optimization remarks
in loop unrolling:
- Emit passing optimization remarks any time we decide to unroll.
- Only emit missed optimization remarks if the user explicitly requested
unrolling and we aren't able to honor their request.
- Only emit passing or missed optimization remarks when we're certain
that unrolling will succeed or fail.
- In lieu of emitting more informative passing/failing optimization
remarks when unrolling may still fail/pass, emit analysis optimization
remarks so users can understand the reason as to why unrolling may have
failed on that loop.
Commit: 719c38062a3b06faee91c255d2b8abc9e1dd3813
https://github.com/llvm/llvm-project/commit/719c38062a3b06faee91c255d2b8abc9e1dd3813
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M lld/test/ELF/fill-trap-ppc.s
M lld/test/ELF/fill-trap.s
Log Message:
-----------
[NFC][lld] Avoid hex address case sensitivity in fill-trap tests (#194037)
Ubuntu is switching from GNU coreutils to Rust version, and new
od util has different case in output.
https://github.com/uutils/coreutils/issues/11985
Commit: 125f69d71ad1778a811461c0bbd30f12607073e5
https://github.com/llvm/llvm-project/commit/125f69d71ad1778a811461c0bbd30f12607073e5
Author: hulxv <hulxxv at gmail.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M libc/shared/math.h
A libc/shared/math/fabs.h
A libc/shared/math/fabsbf16.h
A libc/shared/math/fabsf.h
A libc/shared/math/fabsf128.h
A libc/shared/math/fabsf16.h
A libc/shared/math/fabsl.h
M libc/src/__support/FPUtil/BasicOperations.h
M libc/src/__support/math/CMakeLists.txt
A libc/src/__support/math/fabs.h
A libc/src/__support/math/fabsbf16.h
A libc/src/__support/math/fabsf.h
A libc/src/__support/math/fabsf128.h
A libc/src/__support/math/fabsf16.h
A libc/src/__support/math/fabsl.h
M libc/src/math/generic/CMakeLists.txt
M libc/src/math/generic/fabs.cpp
M libc/src/math/generic/fabsbf16.cpp
M libc/src/math/generic/fabsf.cpp
M libc/src/math/generic/fabsf128.cpp
M libc/src/math/generic/fabsf16.cpp
M libc/src/math/generic/fabsl.cpp
M libc/test/shared/CMakeLists.txt
M libc/test/shared/shared_math_constexpr_test.cpp
M libc/test/shared/shared_math_test.cpp
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[libc][math] Refactor fabs family to header-only (#182173)
Refactors the fabs math family to be header-only.
Closes https://github.com/llvm/llvm-project/issues/182172
Target Functions:
- fabs
- fabsbf16
- fabsf
- fabsf128
- fabsf16
- fabsl
Commit: ad5a7609df9b7a67d588bb99578990e8430939f6
https://github.com/llvm/llvm-project/commit/ad5a7609df9b7a67d588bb99578990e8430939f6
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
A llvm/test/Transforms/SLPVectorizer/X86/split-node-reused-in-later-vector.ll
M llvm/test/Transforms/SLPVectorizer/X86/split-node-throttled.ll
Log Message:
-----------
[SLP]Do not cache sentinel position for SplitVectorize nodes
setInsertPointAfterBundle records LastInstructionToPos[LastInst] = Res
so later bundles reuse the sentinel as an insertion point. For a
SplitVectorize bundle this entry is stale: operand entries are
materialized lazily via recursive vectorizeTree calls and can land in
the IR after the cached sentinel. A later bundle that hits the cache
then inserts its shuffles ahead of values they consume, tripping the
verifier with "Instruction does not dominate all uses".
Fixes #193919
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/194038
Commit: 32eb90bfdf9f28a4cf11d4897e48942977fada78
https://github.com/llvm/llvm-project/commit/32eb90bfdf9f28a4cf11d4897e48942977fada78
Author: Jan Svoboda <jan_svoboda at apple.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M clang/include/clang/DependencyScanning/DependencyScanningService.h
M clang/include/clang/DependencyScanning/InProcessModuleCache.h
M clang/lib/DependencyScanning/InProcessModuleCache.cpp
M clang/lib/Serialization/ModuleCache.cpp
M clang/tools/clang-scan-deps/ClangScanDeps.cpp
M clang/tools/clang-scan-deps/Opts.td
Log Message:
-----------
[clang][deps] Keep module cache in memory (#192347)
With this PR, module cache PCMs are kept in-memory and can be flushed to
disk at the end of the build if desired. Not going to disk at all speeds
up dependency scans by around 4.7% by avoiding contention in the kernel.
Commit: f098aa3b5b58133a5db79692e1aae2a191d27c80
https://github.com/llvm/llvm-project/commit/f098aa3b5b58133a5db79692e1aae2a191d27c80
Author: Jason Molenda <jmolenda at apple.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M lldb/docs/resources/lldbgdbremote.md
M lldb/include/lldb/Target/Thread.h
M lldb/source/Plugins/DynamicLoader/MacOSX-DYLD/DynamicLoaderMacOS.cpp
M lldb/source/Plugins/DynamicLoader/MacOSX-DYLD/DynamicLoaderMacOS.h
M lldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.cpp
M lldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.h
M lldb/source/Plugins/Process/gdb-remote/ThreadGDBRemote.cpp
M lldb/source/Plugins/Process/gdb-remote/ThreadGDBRemote.h
M lldb/tools/debugserver/source/DNB.cpp
M lldb/tools/debugserver/source/DNB.h
M lldb/tools/debugserver/source/JSONGenerator.h
M lldb/tools/debugserver/source/MacOSX/MachProcess.mm
M lldb/tools/debugserver/source/MacOSX/arm64/DNBArchImplARM64.cpp
M lldb/tools/debugserver/source/RNBRemote.cpp
Log Message:
-----------
[lldb][Darwin] debugserver expedite new binary info, lldb use (#192754)
When lldb stops at the "new binaries loaded" internal breakpoint, it
must read the list of addresses of the new binaries out of process
memory, then send a jGetLoadedDynamicLibrariesInfos packet to
debugserver to get the filepath, uuid, and addresses of where all the
segments are loaded in memory.
It's possible for debugserver to find the "new binaries loaded" function
address in the inferior itself, recognize when it has stopped at a
breakpoint there, and expedite some/all of the information lldb is going
to ask for in the stop info packet that we send to lldb. This will make
big improvements to a large-batch-of-binaries loaded stop event, but
also focuses even more on the single-binary-loaded `dlopen()` use case,
which can be quite expensive when many binaries are loaded one by one.
This PR reduces the packet traffic for a new binary load notifications
by
1. When debugserver sees a thread that has hit a breakpoint, and the pc
matches the new-binaries-loaded function address, reads the list of
binaries that have been newly added and includes them in the stop info
packet (or the jThreadsInfo packet) in the `added-binaries` key. The
value is a list (array) of binary addresses.
2. If the number of binaries is small (today: one), debugserver may
collect the full information that jGetLoadedDynamicLibrariesInfos would
send back about it, and also expedite that in the stop info packet (or
jThreadsInfo) in the `detailed-binaries-info` key. This is a JSON
string, and the stop info packet is a semicolon separated series of
key-values, so it must be asciihex encoded, just like the `jstopinfo`
key. In the jThreadsInfo packet, the JSON for the binary information is
included in the response as-is as the value-dictionary.
3. If the remote stub doesn't provide these new keys, lldb will use the
same process as before. However, in
DynamicLoaderMacOS::NotifyBreakpointHit I was reading the load addresses
out of memory individually, with each binary having a 24-byte entry.
lldb's memory cache meant we read 512 bytes per 8-byte read, but when
1000 binaries were being loaded at process launch time, that was 24,000
bytes of VM that we would read in 512 byte batches. This patch changes
that to read the entire VM range that we will be accessing in one large
memory read (as large as the remote gdb RSP stub will support),
dramatically reducing packet traffic in that case.
4. debugserver needs to read the "new binaries loaded" function pointer
out of the "dyld_all_image_infos" structure in the inferior, and it is a
signed function pointer on arm64e processes, so debugserver needs to
strip off the signing bits before comparing the pc. I hoisted the strip
function out of DNBArchImplArm64 into DNBFixAddress(), and the only
complicated bit here is in DNBProcessAddrSize(), when an arm64e
debugserver is debugging an arm64_32 process on a watch. It's not a
common combination (mostly we will have arm64e debugservers debugging
arm64 processes, or arm64_32 debugservers debuggging arm64_32 processe),
but it is supported.
5. A very minor enhancement, I have debugserver now include a new key,
`sizeof_mh_and_loadcmds` in the full binary information that
jGetLoadedDynamicLibrariesInfos returns. When lldb needs to read a
binary out of memory, it needs to read the Mach-O header & load
commands, and it doesn't know the full size of that, so we end up doing
one read of the Mach-O header, then the header + load commands. I'm not
using this information in lldb yet, but I would like to, to improve
that.
At an implementation detail level, ProcessGDBRemote collects these two
new data from the stop packet / jThreadsInfo, and passes them to the
method that creates a new ThreadGDBRemote. I added two methods to the
Thread base class to retrieve the information. DynamicLoaderMacOS will
try to read the data from the thread that hit the "new binaries loaded"
breakpoint, and if the number of entries matches the number expected by
the register value, uses them. Else it falls back to fetching them the
traditional way. On an old debugserver that doesn't support these new
expedited fields, DynamicLoaderMacOS will get back a zero-length of
binary addresses and a null StructuredData dictionary for the detailed
image information, and behave as it always does. I tested this patch
with both the debugserver changes, and without.
Testing is clearly the big questionmark here - I added none. While
writing these patches, I had some bugs and the lldb testsuite on macOS
was very good at finding them, simply with our normal process launching
and dlopen'ing in our existing API tests. I could imagine a test that
would capture the packet log and try to ensure that the expedited
information is being used by lldb and we are not re-fetching the
information, though.
rdar://175033129
---------
Co-authored-by: Jonas Devlieghere <jonas at devlieghere.com>
Co-authored-by: Felipe de Azevedo Piovezan <piovezan.fpi at gmail.com>
Commit: 6fb343619009376c19953a82aa52cf293418c9eb
https://github.com/llvm/llvm-project/commit/6fb343619009376c19953a82aa52cf293418c9eb
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M llvm/include/llvm/BinaryFormat/Dwarf.h
M llvm/include/llvm/DWARFLinker/AddressesMap.h
M llvm/lib/DWARFLinker/Classic/DWARFLinker.cpp
M llvm/lib/DWARFLinker/Classic/DWARFLinkerCompileUnit.cpp
M llvm/test/tools/dsymutil/X86/tls-variable.test
Log Message:
-----------
[dsymutil] Handle DW_OP_GNU_push_tls_address in markEverythingAsKept (#193870)
markEverythingAsKept() only checked for DW_OP_form_tls_address when
deciding whether a TLS variable should be added to accelerator tables,
missing the DW_OP_GNU_push_tls_address extension. This caused TLS
variables using the GNU form to be absent from .apple_names when linking
in update mode (-u) or when processing Clang modules.
The same bug was previously fixed in getVariableRelocAdjustment()
(f9f92f13f62a) but was missed here.
rdar://120678908
Commit: 9805381e5f014ce66d6c066e095f5b554dcacb45
https://github.com/llvm/llvm-project/commit/9805381e5f014ce66d6c066e095f5b554dcacb45
Author: PiJoules <leonardchan at google.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M libc/src/__support/math_extras.h
M libc/src/__support/memory_size.h
M libc/src/search/lfind.cpp
M libc/src/search/lsearch.cpp
Log Message:
-----------
[libc] Move mul_overflow to math_extras.h (#194033)
This way downstream llvm-libc users could use this as part of
math_extras.h.
Commit: a47eca0ae99f3fa39f90acb06de0bbf86c31980e
https://github.com/llvm/llvm-project/commit/a47eca0ae99f3fa39f90acb06de0bbf86c31980e
Author: Alex Langford <alangford at apple.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M lldb/test/API/functionalities/breakpoint/same_cu_name/Makefile
Log Message:
-----------
[lldb] Rewrite make rules for TestFileBreakpointsSameCUName.py (#193871)
The logic for building the test cases did not consider the target
triple. The easiest thing to do is use the CXXFLAGS computed by
Makefile.rules (which calculates this correctly).
Commit: 83302553295529712fb999db22a7d770f18af055
https://github.com/llvm/llvm-project/commit/83302553295529712fb999db22a7d770f18af055
Author: Alex Langford <alangford at apple.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M lldb/test/API/commands/expression/ptrauth/TestPtrAuthExpressions.py
Log Message:
-----------
[lldb] Fix build logic in TestPtrAuthExpressions.py (#193847)
If the triple already has `arm64e` in it, we'll end up with `arm64ee`
which is definitely wrong.
Commit: 39e02c141d03552938d5fe35ab650bd50e2dcc80
https://github.com/llvm/llvm-project/commit/39e02c141d03552938d5fe35ab650bd50e2dcc80
Author: Kewen Meng <Kewen.Meng at amd.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M offload/plugins-nextgen/amdgpu/dynamic_hsa/hsa_ext_amd.h
M offload/plugins-nextgen/amdgpu/src/rtl.cpp
Log Message:
-----------
[Offload][AMDGPU] Use ROCr API for APU check (#193887)
Use ROCr API for checking whether a device is an APU to replace the old
implementation with hard-coded target name. This PR will make the APU
check cleaner and better maintainable.
Tested on MI210, MI300A, Strix Halo (gfx1151).
Commit: 7ec8037f32433322ad643bb54c811dd7a4f68b0c
https://github.com/llvm/llvm-project/commit/7ec8037f32433322ad643bb54c811dd7a4f68b0c
Author: Tom Stellard <tstellar at redhat.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M .github/workflows/issue-release-workflow.yml
Log Message:
-----------
workflows/issue-release-workflow: Use GitHub app for generating tokens (#193825)
This will allow us to eliminate the RELEASE_WORKFLOW_PR_CREATE secret.
Commit: ef739b97b108d81de23f9fc0f6ca6de001482164
https://github.com/llvm/llvm-project/commit/ef739b97b108d81de23f9fc0f6ca6de001482164
Author: Eric Feng <55723758+efric at users.noreply.github.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M mlir/include/mlir/Dialect/AMDGPU/IR/AMDGPUOps.td
M mlir/lib/Conversion/AMDGPUToROCDL/AMDGPUToROCDL.cpp
M mlir/lib/Dialect/AMDGPU/IR/AMDGPUOps.cpp
M mlir/test/Conversion/AMDGPUToROCDL/sparse-mfma-gfx950.mlir
M mlir/test/Dialect/AMDGPU/invalid.mlir
M mlir/test/Dialect/AMDGPU/ops.mlir
Log Message:
-----------
[AMDGPU] Correct gfx950 smfmac sparse index verifier (#193541)
Originally, the smfmac verifier expects for the sparse indices, which
describe which the positions of the non-zero elements per lane, the
following:
```
8 bit source -> require vector<2xi16>, ABID range [0, 1]
16 bit source -> require vector<4xi8>, ABID range [0, 3]
```
which is correct for CDNA3 and what was stated in the CDNA4 ISA
description as well. However, because the CDNA4 variants have double K
of the CDNA3 variants, meaning e.g, for 16 bit variants, each lane
carries 8 non-zero values rather than 4, we need 16 bit sparse indices
to express the full range of non-zero elements. This is in line with the
layout tables presented in the CDNA4 ISA.
Direct comparison for 16 bit elements:
On gfx942; we can select from one of four 8-bit sets of sparse indices
with ABID. Each set represents the location of four non-zero values per
8 following 4:2 structured sparsity. For example:
```
a0 a1 0 0 a3 a4 0 0 | a5 a6 0 0 0 0 a7 a8 | a9 0 0 a10 0 a11 0 a12 | 0 a13 0 a14 0 a15 0
```
On gfx950; because each lane carries 8 non-zero values; we can only
specify the full range of 8 non-zero values per 16 from one of two
16-bit sets. For example:
```
a0 a1 0 0 a3 a4 0 0 a5 a6 0 0 0 0 a7 a8 | a9 0 0 a10 0 a11 0 a12 0 a13 0 a14 0 a15 0
```
Similarly, for 8 bit variants on gfx950, we would need the full 32 bits
to describe the full range of the locations for the 16 non-zero 8 bit
elements. In this case, there is no option to select from different sets
of indices.
The issue arises in downstream use cases if we want to use use a set of
sparse indices targeting gfx950; because we are unable to specify the
full range of the non-zero values at the moment, we will get numerical
issues.
Assisted by: Claude
---------
Signed-off-by: Eric Feng <Eric.Feng at amd.com>
Commit: 0da7c12e43bf8b995c5fdd5e62180546fa007338
https://github.com/llvm/llvm-project/commit/0da7c12e43bf8b995c5fdd5e62180546fa007338
Author: Kartik Ohlan <kartik7ohlan at gmail.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M clang/include/clang/Basic/BuiltinsAMDGPU.td
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx12-err.cl
A clang/test/CodeGenOpenCL/builtins-amdgcn-smfmac-err.cl
Log Message:
-----------
[AMD-GPU] Fix smfmac builtin target (#193999)
Fixes #193882
For builins mentioned below, changed "mai-insts" to "gfx940-insts" so it
can match the backend isGFX940Plus predicate.
Added test coverage and kept the structure similar to
`clang/test/CodeGenOpenCL/builtins-amdgcn-smfmac-err.cl`
__builtin_amdgcn_smfmac_f32_16x16x32_f16
__builtin_amdgcn_smfmac_f32_32x32x16_f16
__builtin_amdgcn_smfmac_f32_16x16x32_bf16
__builtin_amdgcn_smfmac_f32_32x32x16_bf16
__builtin_amdgcn_smfmac_i32_16x16x64_i8
__builtin_amdgcn_smfmac_i32_32x32x32_i8
Commit: bfa88a8d3c3b8885c9e0166afb1c78ede4f24c6c
https://github.com/llvm/llvm-project/commit/bfa88a8d3c3b8885c9e0166afb1c78ede4f24c6c
Author: Hardik Chona <masterhc321 at gmail.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M libc/config/linux/x86_64/entrypoints.txt
M libc/include/wchar.yaml
M libc/src/wchar/CMakeLists.txt
A libc/src/wchar/wcscoll.cpp
A libc/src/wchar/wcscoll.h
M libc/test/src/wchar/CMakeLists.txt
A libc/test/src/wchar/wcscoll_test.cpp
Log Message:
-----------
[libc] Implement wcscoll (#192778)
_Closes #191073_
- `libc/src/wchar/wcscoll.cpp` - Implementation of wcscoll
- `libc/src/wchar/wcscoll.h` - Internal header for wcscoll
- `libc/include/wchar.yaml` - Added wcscoll to public header spec
- `libc/src/wchar/CMakeLists.txt` - Added build target for wcscoll
- `libc/config/linux/x86_64/entrypoints.txt` - Registered wcscoll
entrypoint
- `libc/test/src/wchar/wcscoll_test.cpp` - Unit tests for wcscoll
- `libc/test/src/wchar/CMakeLists.txt` - Added test target for wcscoll
Note: Locale support is not yet implemented. `wcscoll` currently behaves
identically to `wcscmp` until locale support is available in llvm-libc.
Commit: fa2588e3110f31603d92c05ee3cdfc66860f8047
https://github.com/llvm/llvm-project/commit/fa2588e3110f31603d92c05ee3cdfc66860f8047
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M llvm/lib/Transforms/Instrumentation/NumericalStabilitySanitizer.cpp
Log Message:
-----------
[NFC][NSAN] Use `getIntrinsicSignature` instead of `matchIntrinsicSignature` (#194025)
`getIntrinsicSignature` internally handles the decoding of the IIT table
and running the match, which is what this code is doing. So use that
instead of manually doing what `getIntrinsicSignature` does.
Commit: 5b570d1b3b1d525a04b0d3edbffd619510801551
https://github.com/llvm/llvm-project/commit/5b570d1b3b1d525a04b0d3edbffd619510801551
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M mlir/lib/Target/LLVMIR/Dialect/LLVMIR/LLVMToLLVMIRTranslation.cpp
Log Message:
-----------
[NFC][MLIR] Use `getIntrinsicSignature` to verify overloaded intrinsics (#194035)
`getIntrinsicSignature` internally handles the decoding of the IIT table
and running the match, which is what this code is doing. So, use that
instead of manually doing what `getIntrinsicSignature` does.
Commit: da2c4a9efe996e8a6acf02576be9b39cd69a06df
https://github.com/llvm/llvm-project/commit/da2c4a9efe996e8a6acf02576be9b39cd69a06df
Author: Eli Friedman <efriedma at qti.qualcomm.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ExprConstant.cpp
M clang/lib/CodeGen/CGExprConstant.cpp
M clang/test/AST/ByteCode/const-eval.c
Log Message:
-----------
[clang] Add constant evaluation support for CK_ToUnion. (#193370)
Implementation is heavily based on the evaluation code for initializer
lists, but it's different enough that I couldn't figure out a good way
to share the code.
This fixes one of the few remaining gaps where CodeGen can
constant-evaluate a value which AST can't evaluate.
Commit: ebbaa93e005eecf2023341d644cf8f750912e73f
https://github.com/llvm/llvm-project/commit/ebbaa93e005eecf2023341d644cf8f750912e73f
Author: Narayan <nsreekumar6 at gmail.com>
Date: 2026-04-25 (Sat, 25 Apr 2026)
Changed paths:
M llvm/include/llvm/ABI/TargetInfo.h
M llvm/lib/ABI/CMakeLists.txt
A llvm/lib/ABI/Targets/BPF.cpp
Log Message:
-----------
[llvm] Implement the BPF ABI (#194031)
Implements BPFTargetInfo, the first target-specific ABI lowering for the
LLVM ABI library introduced in #158329.
BPFTargetInfo mirrors the BPF ABI rules currently encoded in
`clang::BPFABIInfo` (clang/lib/CodeGen/Targets/BPF.cpp), but operates
entirely on `llvm::abi` types, keeping the logic frontend-independent:
- Empty aggregates and void returns are ignored
- Aggregates ≤64 bits are coerced to an aligned integer type
- Aggregates 65–128 bits are coerced to [2 x i64]
- Aggregates >128 bits and oversized _BitInt types are passed/returned
indirectly
- Promotable integers are sign/zero extended
- All aggregate returns are indirect
Also adds the `createBPFTargetInfo` factory function declaration to
TargetInfo.h.
Commit: 7ea78deff2d1eace00d113bcd4aba694e418a84c
https://github.com/llvm/llvm-project/commit/7ea78deff2d1eace00d113bcd4aba694e418a84c
Author: Tom Stellard <tstellar at redhat.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M .github/workflows/issue-release-workflow.yml
Log Message:
-----------
Revert "workflows/issue-release-workflow: Use GitHub app for generating tokens" (#194058)
Reverts llvm/llvm-project#193825
Fails due to insufficient permissions:
`
github.GithubException.GithubException: 422 {"message": "Validation
Failed", "errors": [{"resource": "PullRequest", "code": "custom",
"field": "fork_collab", "message": "fork_collab Fork collab can't be
granted by someone without permission"}], "documentation_url":
"https://docs.github.com/rest/pulls/pulls#create-a-pull-request",
"status": "422"}
`
Commit: b49855fc5684eebd47d177df1fbfbd329653bbd1
https://github.com/llvm/llvm-project/commit/b49855fc5684eebd47d177df1fbfbd329653bbd1
Author: Jun Wang <jwang_2024 at outlook.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
M llvm/test/MC/AMDGPU/gfx10_asm_mubuf.s
M llvm/test/MC/AMDGPU/gfx7_asm_mubuf.s
M llvm/test/MC/AMDGPU/gfx8_asm_mubuf.s
M llvm/test/MC/AMDGPU/gfx9_asm_mubuf.s
Log Message:
-----------
[AMDGPU][MC] Allow the nolds modifier (#185129)
Some pre-GFX11 buffer_load instructions have two variants: one
requires the lds modifier and one does not allow lds. For the latter
allow nolds to be used.
Commit: 2b43da5ac0fa4c49b7f5f443b6a3a6ffec8b7494
https://github.com/llvm/llvm-project/commit/2b43da5ac0fa4c49b7f5f443b6a3a6ffec8b7494
Author: Leonardo Román Carrillo <leonardoroman at google.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64.h
M llvm/lib/Target/AArch64/AArch64PassRegistry.def
M llvm/lib/Target/AArch64/AArch64StackTaggingPreRA.cpp
M llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
Log Message:
-----------
[NewPM] Port for AArch64StackTaggingPreRA (#194021)
This patch migrates the AArch64StackTaggingPreRA pass to the New Pass
Manager.
Following the standard pattern for pass migrations:
- The core logic has been extracted into a standalone
AArch64StackTaggingPreRAImpl class.
- A new pass manager wrapper (AArch64StackTaggingPreRAPass) has been
created.
- The legacy pass manager wrapper has been renamed to
AArch64StackTaggingPreRALegacy and updated to call the shared
implementation.
- The pass is registered in AArch64PassRegistry.def to make it available
to the New PM.
Commit: d14866f029e94f806f2bccc0c87840d950d9bd50
https://github.com/llvm/llvm-project/commit/d14866f029e94f806f2bccc0c87840d950d9bd50
Author: Peter Collingbourne <pcc at google.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M llvm/utils/gn/secondary/clang/lib/ScalableStaticAnalysisFramework/Analyses/BUILD.gn
Log Message:
-----------
gn build: Port a4538a3ad902
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/194077
Commit: d0c91de53e3b89043ea1527bb4acf24b519093e6
https://github.com/llvm/llvm-project/commit/d0c91de53e3b89043ea1527bb4acf24b519093e6
Author: Sam Elliott <aelliott at qti.qualcomm.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
A clang/test/Driver/Inputs/multilib_linux_tree/usr/bin/.keep
A clang/test/Driver/Inputs/multilib_linux_tree/usr/include/x86_64-unknown-linux-gnu/.keep
A clang/test/Driver/Inputs/multilib_linux_tree/usr/include/x86_64-unknown-linux-gnu/debug/.keep
A clang/test/Driver/Inputs/multilib_linux_tree/usr/include/x86_64-unknown-linux-gnu/noexcept/.keep
A clang/test/Driver/Inputs/multilib_linux_tree/usr/include/x86_64-unknown-linux-gnu/release/.keep
A clang/test/Driver/Inputs/multilib_mingw_tree/bin/.keep
A clang/test/Driver/Inputs/multilib_mingw_tree/include/x86_64-w64-windows-gnu/.keep
A clang/test/Driver/Inputs/multilib_mingw_tree/include/x86_64-w64-windows-gnu/debug/.keep
A clang/test/Driver/Inputs/multilib_mingw_tree/include/x86_64-w64-windows-gnu/noexcept/.keep
A clang/test/Driver/Inputs/multilib_mingw_tree/include/x86_64-w64-windows-gnu/release/.keep
M clang/test/Driver/linux-multilib.yaml
M clang/test/Driver/mingw-multilib.yaml
Log Message:
-----------
[clang][NFC] Linux/Windows Multilib Include Path Tests (#193869)
This adds checks to the tests to show how the include path is changed by
the multilib logic for Linux/Windows added in commit
78820cb91605693b7d768be4ebc8b66181d3e9c3.
Assisted By: Claude
Commit: d1c9b4a5397588bbe8260a05591faf5a661b006a
https://github.com/llvm/llvm-project/commit/d1c9b4a5397588bbe8260a05591faf5a661b006a
Author: Sang Ik Lee <sang.ik.lee at intel.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M mlir/lib/Conversion/XeVMToLLVM/XeVMToLLVM.cpp
M mlir/test/Conversion/XeVMToLLVM/xevm_mx-to-llvm.mlir
M mlir/test/Integration/Dialect/XeVM/GPU/xevm_block_scaled_dpas_bf8.mlir
Log Message:
-----------
[MLIR][XeVM] Update API usage. Some OpenCL APIs are not supported. (#193320)
In such case, use internal APIs for Intel Graphics Compiler directly.
Commit: 5536a4c7122eb799fee189139e27309efb0a6c4d
https://github.com/llvm/llvm-project/commit/5536a4c7122eb799fee189139e27309efb0a6c4d
Author: Zachary Yedidia <zyedidia at gmail.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M llvm/docs/LFI.rst
M llvm/include/llvm/MC/MCInstrDesc.h
M llvm/include/llvm/MC/MCLFIRewriter.h
M llvm/lib/MC/MCInstrDesc.cpp
M llvm/lib/MC/MCLFIRewriter.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCLFIRewriter.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCLFIRewriter.h
A llvm/test/MC/AArch64/LFI/branch.s
A llvm/test/MC/AArch64/LFI/return.s
Log Message:
-----------
[LFI][AArch64] Add rewrites for control flow (#192602)
Adds LFI rewrites for control flow instructions (indirect branches and
returns). Indirect branches must go through `x28`, which is always
guaranteed to hold a sandbox address. Modifications to `x30` must guard
`x30` afterwards, to uphold the invariant that `x30` always holds a
sandbox address. As a result, bare return instructions can be used
without any additional rewrites.
Commit: ca934b892fdd2a23de8494af702b4ab301c8a02b
https://github.com/llvm/llvm-project/commit/ca934b892fdd2a23de8494af702b4ab301c8a02b
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M llvm/include/llvm/DWARFLinker/Classic/DWARFLinker.h
M llvm/include/llvm/DWARFLinker/Classic/DWARFStreamer.h
M llvm/lib/DWARFLinker/Classic/DWARFLinker.cpp
M llvm/lib/DWARFLinker/Classic/DWARFStreamer.cpp
Log Message:
-----------
[dsymutil] Report error when section offsets exceed DWARF32 limit (#193867)
When linking very large binaries, debug section offsets can exceed the 4
GB DWARF32 limit. Previously this caused an assertion in
MCStreamer::emitIntValue when trying to emit an overflowing
DW_FORM_sec_offset value.
Detect the overflow at the point where section offsets are patched in
DWARFStreamer (for .debug_ranges, .debug_rnglists, .debug_loc,
.debug_loclists) and in DWARFLinker (for .debug_line and .debug_addr).
rdar://107413300
Commit: 327f027f108e2013ad02f5a8f345c44fca831665
https://github.com/llvm/llvm-project/commit/327f027f108e2013ad02f5a8f345c44fca831665
Author: Ivan R. Ivanov <iivanov at nvidia.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M offload/plugins-nextgen/amdgpu/src/rtl.cpp
Log Message:
-----------
[offload] Fix compilation (#194081)
Commit: e3bd61890e68303a33fdd33fbdd9abeda1037450
https://github.com/llvm/llvm-project/commit/e3bd61890e68303a33fdd33fbdd9abeda1037450
Author: gulfemsavrun <gulfem at google.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M llvm/docs/CommandGuide/llvm-profgen.rst
M llvm/docs/ReleaseNotes.md
A llvm/include/llvm/ProfileData/ETMTraceDecoder.h
M llvm/lib/ProfileData/CMakeLists.txt
A llvm/lib/ProfileData/ETMTraceDecoder.cpp
A llvm/test/tools/llvm-profgen/Inputs/etm-opencsd.yaml
A llvm/test/tools/llvm-profgen/etm-arch.test
A llvm/test/tools/llvm-profgen/etm-opencsd.test
M llvm/test/tools/llvm-profgen/lit.local.cfg
M llvm/tools/llvm-profgen/PerfReader.cpp
M llvm/tools/llvm-profgen/PerfReader.h
M llvm/tools/llvm-profgen/ProfiledBinary.cpp
M llvm/tools/llvm-profgen/ProfiledBinary.h
M llvm/tools/llvm-profgen/llvm-profgen.cpp
Log Message:
-----------
[llvm-profgen] Add support for ETM trace decoding (#191584)
This patch introduces ETMReader to llvm-profgen,
enabling the reconstruction of execution profiles from ETM formatted
trace data.
- Integrate OpenCSD (CoreSight Decoding Library) as an optional
dependency via the LLVM_ENABLE_OPENCSD flag.
- Implement ETMTraceDecoder in ProfileData to interface with OpenCSD.
- Implement ETMReader, which uses hardware configuration and ELF memory
mapping to decode instruction traces.
- Add the --etm command-line option to specify raw trace inputs.
- Add the --target-triple command-line option to override the target
architecture for the binary.
The implementation targets microcontroller-class (Cortex-M) devices
based on the binary's target triple.
RFC:
https://discourse.llvm.org/t/rfc-add-etm-trace-support-to-llvm-profgen/90525
Commit: 5064b936bec6677445b0c856371bba7c1d8af352
https://github.com/llvm/llvm-project/commit/5064b936bec6677445b0c856371bba7c1d8af352
Author: Jan Svoboda <jan_svoboda at apple.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M clang/lib/DependencyScanning/InProcessModuleCache.cpp
Log Message:
-----------
[clang][deps] Always initialize module cache out params (#194082)
We did not initialize the out parameters in #192347, causing the
"sanitizer-x86_64-linux-fast" bot to complain with:
```
SUMMARY: MemorySanitizer: use-of-uninitialized-value /home/b/sanitizer-x86_64-linux-fast/build/llvm-project/clang/lib/Frontend/CompilerInstance.cpp:1525:63 in compileModuleImpl(clang::CompilerInstance&, clang::SourceLocation, clang::SourceLocation, clang::Module*, clang::ModuleFileName)
Exiting
==clang==3084515==WARNING: MemorySanitizer: use-of-uninitialized-value
#0 0x586360f7a604 in compileModuleImpl(clang::CompilerInstance&, clang::SourceLocation, clang::SourceLocation, clang::Module*, clang::ModuleFileName) /home/b/sanitizer-x86_64-linux-fast/build/llvm-project/clang/lib/Frontend/CompilerInstance.cpp:1525:63
#1 <...>
```
This PR should fix that.
Commit: b4c1e1a14e47c383da308bcd3195b6dee9ba086e
https://github.com/llvm/llvm-project/commit/b4c1e1a14e47c383da308bcd3195b6dee9ba086e
Author: Philip Reames <listmail at philipreames.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M llvm/lib/CodeGen/PreISelIntrinsicLowering.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
M llvm/lib/CodeGen/TargetLoweringBase.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
A llvm/test/CodeGen/RISCV/rvv/fcanonicalize-sdnode.ll
A llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fcanonicalize-sdnode.ll
Log Message:
-----------
[RISCV] Expand fcanonicalize on vector types (#193842)
This change does a couple of related things:
1) It changes the default expansion strategy for scalable
vectors for fcanonicalize. This switches us from
emitting a loop (directly parallel to unrolling)
to using the already available fmul expansion.
2) Mark RISC-V legal scalable vector types as Expand
to leverage the previous item.
3) Wrap fixed vector types in their corresponding
scalable types to avoid unrolling.
The net effect is to improve the lowering for fixed vector cases and to
no longer crash for the scalable ones. We were crashing because the
scalable cases were marked Legal, not Expand. We could have just fixed that, but doing everyone at once seemed like a good investment.
Note that we can also choose to follow Aarch64 and consider a vfmin
based lowering. I left that until later thought it is worthwhile noting
that's what we do for scalar code.
Commit: ecdcd40e233bd2c9d38877ee444c6199f1885b95
https://github.com/llvm/llvm-project/commit/ecdcd40e233bd2c9d38877ee444c6199f1885b95
Author: joaosaffran <joaosaffranllvm at gmail.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M llvm/lib/Target/DirectX/DXILOpLowering.cpp
A llvm/test/CodeGen/DirectX/Metadata/dx_precise.ll
M llvm/test/CodeGen/DirectX/WaveActiveMax.ll
M llvm/test/CodeGen/DirectX/WaveActiveMin.ll
M llvm/test/CodeGen/DirectX/WaveReadLaneAt-vec.ll
M llvm/test/CodeGen/DirectX/WaveReadLaneAt.ll
Log Message:
-----------
[DirectX] Emit `dx.precise` metadata when fast math is not present (#192526)
This patch introduces the ability for DXILOpBuilder to annotate
instructions with `dx.precise` whenever fast math flags are not present.
Fix: https://github.com/llvm/llvm-project/issues/149127
Commit: ec9d7d18bdfe21c30c94c02f14f3613f7b69a17b
https://github.com/llvm/llvm-project/commit/ec9d7d18bdfe21c30c94c02f14f3613f7b69a17b
Author: gulfemsavrun <gulfem at google.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M llvm/docs/CommandGuide/llvm-profgen.rst
M llvm/docs/ReleaseNotes.md
R llvm/include/llvm/ProfileData/ETMTraceDecoder.h
M llvm/lib/ProfileData/CMakeLists.txt
R llvm/lib/ProfileData/ETMTraceDecoder.cpp
R llvm/test/tools/llvm-profgen/Inputs/etm-opencsd.yaml
R llvm/test/tools/llvm-profgen/etm-arch.test
R llvm/test/tools/llvm-profgen/etm-opencsd.test
M llvm/test/tools/llvm-profgen/lit.local.cfg
M llvm/tools/llvm-profgen/PerfReader.cpp
M llvm/tools/llvm-profgen/PerfReader.h
M llvm/tools/llvm-profgen/ProfiledBinary.cpp
M llvm/tools/llvm-profgen/ProfiledBinary.h
M llvm/tools/llvm-profgen/llvm-profgen.cpp
Log Message:
-----------
Revert "[llvm-profgen] Add support for ETM trace decoding" (#194087)
Reverts llvm/llvm-project#191584
Caused build failures in llvm-profgen:
https://lab.llvm.org/buildbot/#/builders/46/builds/34367
https://lab.llvm.org/buildbot/#/builders/10/builds/27229
Commit: e38b8da23b0bfcf0585eda4bb5e2a2b8b3bb7539
https://github.com/llvm/llvm-project/commit/e38b8da23b0bfcf0585eda4bb5e2a2b8b3bb7539
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-04-25 (Sat, 25 Apr 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
Log Message:
-----------
[RISCV][P-ext] Remove dead code from LowerOperation handling of ISD::STORE. NFC (#194088)
We rely on default type legaliation of v2i16 and v4i8 stores for RV64P.
Commit: 0c472c1401584bccc256ff0ae3763bac8ccbb76e
https://github.com/llvm/llvm-project/commit/0c472c1401584bccc256ff0ae3763bac8ccbb76e
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M lldb/source/Expression/IRMemoryMap.cpp
M lldb/unittests/Expression/IRMemoryMapTest.cpp
Log Message:
-----------
[lldb] Handle partial memory region coverage in IRMemoryMap::FindSpace (#194001)
FindSpace walks process memory regions to find addresses that won't
collide with the inferior's real memory. This is necessary even for
host-only allocations because the IR Interpreter works entirely in
inferior virtual addresses. IRMemoryMap remaps those addresses to read
from host memory instead of inferior memory, so overlapping ranges would
silently read the wrong data.
For WebAssembly, GetMemoryRegionInfo succeeds for the first region
(linear memory) but fails for addresses beyond it. The previous fix
(#193124) skipped the memory region walk entirely when `CanJIT()` is
false. However, as Jason points out, that removes the
collision-avoidance mechanism and risks overlapping with real inferior
memory.
Instead, handle the GetMemoryRegionInfo failure gracefully. If the
target can't describe memory beyond a certain point, treat the remaining
address space as unmapped and use it for the allocation. This preserves
the collision avoidance while avoiding the lldbassert.
Commit: 87317d39f44ae99a5522d00dd14f4fe58fc87a21
https://github.com/llvm/llvm-project/commit/87317d39f44ae99a5522d00dd14f4fe58fc87a21
Author: Trevor Gross <tg at trevorgross.com>
Date: 2026-04-25 (Sat, 25 Apr 2026)
Changed paths:
M compiler-rt/lib/builtins/fp_compare_impl.inc
Log Message:
-----------
[compiler-rt][WebAssembly] Use an int as CMP_RESULT (#194093)
LLVM uses an i32 as the default for `getCmpLibcallReturnType`, but
compiler-rt uses a word-sized integer by default. On most physical
hardware this happens to work because `i32` is largely ABI-compatible
with a word. On wasm64, however, they are not compatible so this causes
problems.
Resolve this by using `int` as the comparison result in compiler-rt.
Closes: https://github.com/llvm/llvm-project/issues/75302
Closes: https://github.com/llvm/llvm-project/issues/192416
Commit: 4a7ae4b900fdbc699c4aa57d4490827564f435ba
https://github.com/llvm/llvm-project/commit/4a7ae4b900fdbc699c4aa57d4490827564f435ba
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2026-04-25 (Sat, 25 Apr 2026)
Changed paths:
M llvm/lib/Transforms/IPO/LowerTypeTests.cpp
M llvm/test/Transforms/LowerTypeTests/aarch64-jumptable-dbg.ll
M llvm/test/Transforms/LowerTypeTests/x86-jumptable-dbg.ll
Log Message:
-----------
Revert "Reland: [LowerTypeTests] Add debug info to jump table entries" (#194095)
Reverts llvm/llvm-project#193670
Downstream test failure.
Commit: f478220dd06278c6ee725db710eb587ca80130d2
https://github.com/llvm/llvm-project/commit/f478220dd06278c6ee725db710eb587ca80130d2
Author: Zhaoxin Yang <yangzhaoxin at loongson.cn>
Date: 2026-04-25 (Sat, 25 Apr 2026)
Changed paths:
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/lib/Target/LoongArch/LoongArchISelLowering.h
M llvm/lib/Target/LoongArch/LoongArchLASXInstrInfo.td
M llvm/lib/Target/LoongArch/LoongArchLSXInstrInfo.td
M llvm/test/CodeGen/LoongArch/lasx/ir-instruction/fpext.ll
M llvm/test/CodeGen/LoongArch/lsx/ir-instruction/fpext.ll
Log Message:
-----------
[LoongArch] Add support for vector FP_EXTEND from vxf32 to vxf64 (#164746)
Commit: e66613f38124ff1f39132a15bfdd465f4d18ed8c
https://github.com/llvm/llvm-project/commit/e66613f38124ff1f39132a15bfdd465f4d18ed8c
Author: Fangrui Song <i at maskray.me>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M llvm/lib/Target/CSKY/CSKYInstrInfo.cpp
Log Message:
-----------
[CSKY] Fix build after #191460 (#194102)
Commit: bd1c3081172303588b576ea687a3e78f8a39a4bd
https://github.com/llvm/llvm-project/commit/bd1c3081172303588b576ea687a3e78f8a39a4bd
Author: Igor Kudrin <ikudrin at accesssoftek.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/DiagnosticFrontendKinds.td
M clang/lib/CodeGen/CodeGenModule.cpp
M clang/test/CodeGen/alias.c
M clang/test/Sema/attr-alias-elf.c
A clang/test/SemaObjC/attr-alias.m
M compiler-rt/lib/dfsan/dfsan_custom.cpp
Log Message:
-----------
[Clang][CodeGen] Report when an alias points to an incompatible target (#192397)
Add checks to ensure that an alias and its target have compatible types:
- Generate an error if a function alias points to a variable or vice
versa.
- Issue a warning for mismatches in function types.
- Ignore type discrepancies for variables.
This behavior aligns with similar diagnostics in GCC.
Resolves: #47301
Commit: 6dd373f8aaab96b293a1374d3039b3c658b292e1
https://github.com/llvm/llvm-project/commit/6dd373f8aaab96b293a1374d3039b3c658b292e1
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M compiler-rt/test/sanitizer_common/TestCases/Linux/pthread_join.cpp
Log Message:
-----------
[sanitizer] Relax pthread_join tests for different glibc versions (#194100)
New (2.43) glibc successfully joins already joined threads.
Probably result of
https://sourceware.org/git/?p=glibc.git;a=commitdiff;h=f7648bf44384118b6658ddcd741408fc4fbdd056
Commit: c3df8f8c83372a53f6949c585d1a5a03b775332c
https://github.com/llvm/llvm-project/commit/c3df8f8c83372a53f6949c585d1a5a03b775332c
Author: joaosaffran <joaosaffranllvm at gmail.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/reversebits.ll
Log Message:
-----------
[SPIRV] Add 64 bit lowering for bitreverse (#193068)
Bit reverse didn't handle 64-bit ints; this patch adds such handling.
#fix: https://github.com/llvm/llvm-project/issues/192756
Commit: 7059fc556bfe5e8787a00c47a649459c6ab1a1c6
https://github.com/llvm/llvm-project/commit/7059fc556bfe5e8787a00c47a649459c6ab1a1c6
Author: Igor Kudrin <ikudrin at accesssoftek.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/DiagnosticFrontendKinds.td
M clang/lib/CodeGen/CodeGenModule.cpp
M clang/test/CodeGen/alias.c
M clang/test/Sema/attr-alias-elf.c
R clang/test/SemaObjC/attr-alias.m
M compiler-rt/lib/dfsan/dfsan_custom.cpp
Log Message:
-----------
Revert "[Clang][CodeGen] Report when an alias points to an incompatible target" (#194106)
Reverts llvm/llvm-project#192397
Commit: 2428fbb613be0f2b4468cfa26908186e097262c7
https://github.com/llvm/llvm-project/commit/2428fbb613be0f2b4468cfa26908186e097262c7
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2026-04-25 (Sat, 25 Apr 2026)
Changed paths:
M llvm/test/Other/new-pm-thinlto-postlink-defaults.ll
M llvm/test/Other/new-pm-thinlto-postlink-pgo-defaults.ll
M llvm/test/Other/new-pm-thinlto-postlink-samplepgo-defaults.ll
M llvm/test/Other/new-pm-thinlto-prelink-defaults.ll
M llvm/test/Other/new-pm-thinlto-prelink-pgo-defaults.ll
M llvm/test/Other/new-pm-thinlto-prelink-samplepgo-defaults.ll
Log Message:
-----------
[NFC][ThinLTO] Remove JumpTableToSwitchPass from the test (#194103)
It's there from invalid conflict resolution in #193649.
Commit: 84b0809a84f4b4df18cc78e132a2588d9112ff01
https://github.com/llvm/llvm-project/commit/84b0809a84f4b4df18cc78e132a2588d9112ff01
Author: Alex MacLean <amaclean at nvidia.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h
M llvm/include/llvm/CodeGen/GlobalISel/Utils.h
M llvm/include/llvm/Target/GlobalISel/Combine.td
M llvm/lib/CodeGen/GlobalISel/CSEMIRBuilder.cpp
M llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
M llvm/lib/CodeGen/GlobalISel/Utils.cpp
A llvm/test/CodeGen/AArch64/GlobalISel/combine-constant-fold-count.mir
Log Message:
-----------
[GIsel] Add constant-folding for bit-counting ops (#194010)
Commit: 7bbfee35775e8ece4aa44e13de37a7b4f5b587fe
https://github.com/llvm/llvm-project/commit/7bbfee35775e8ece4aa44e13de37a7b4f5b587fe
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-04-25 (Sat, 25 Apr 2026)
Changed paths:
M clang/lib/AST/ByteCode/Disasm.cpp
Log Message:
-----------
[clang][bytecode][NFC] Add record/union names in Descriptor::dump() (#194002)
Commit: 5e09af5f30a7c68e9253e008a5d63691a0657108
https://github.com/llvm/llvm-project/commit/5e09af5f30a7c68e9253e008a5d63691a0657108
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-04-25 (Sat, 25 Apr 2026)
Changed paths:
M clang/lib/AST/ByteCode/Interp.h
M clang/test/AST/ByteCode/cxx23.cpp
Log Message:
-----------
[clang][bytecode] Reject inc/dec on non-numbers (#193954)
Commit: aeea3191d4162f61ea84c3be9fc3ede6a7883c91
https://github.com/llvm/llvm-project/commit/aeea3191d4162f61ea84c3be9fc3ede6a7883c91
Author: Fangrui Song <i at maskray.me>
Date: 2026-04-25 (Sat, 25 Apr 2026)
Changed paths:
M llvm/include/llvm/MC/MCContext.h
M llvm/include/llvm/MC/MCELFObjectWriter.h
M llvm/lib/MC/ELFObjectWriter.cpp
M llvm/lib/MC/MCAsmStreamer.cpp
M llvm/lib/MC/MCContext.cpp
M llvm/lib/MC/MCELFStreamer.cpp
M llvm/lib/MC/MCObjectStreamer.cpp
M llvm/lib/MC/MCWinCOFFStreamer.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64ELFStreamer.cpp
M llvm/lib/Target/SystemZ/MCTargetDesc/SystemZHLASMAsmStreamer.h
M llvm/lib/Target/X86/MCTargetDesc/X86ELFObjectWriter.cpp
M llvm/lib/Target/X86/X86MCInstLower.cpp
Log Message:
-----------
[MC] Change MCContext::getTargetOptions to return a reference. NFC (#194112)
Since #180464, MCAsmInfo stores a non-null MCTargetOptions pointer set
by
TargetRegistry::createMCAsmInfo, and MCContext's constructor asserts
that
MAI->getTargetOptions() is non-null. Return the options by reference
instead of by pointer so callers can drop the null handling.
Commit: 320a5154ecd3dea719bf1b92e9e3d3c4772c5291
https://github.com/llvm/llvm-project/commit/320a5154ecd3dea719bf1b92e9e3d3c4772c5291
Author: hev <wangrui at loongson.cn>
Date: 2026-04-25 (Sat, 25 Apr 2026)
Changed paths:
A llvm/test/CodeGen/LoongArch/lasx/srar.ll
A llvm/test/CodeGen/LoongArch/lasx/srlr.ll
A llvm/test/CodeGen/LoongArch/lsx/srar.ll
A llvm/test/CodeGen/LoongArch/lsx/srlr.ll
Log Message:
-----------
[LoongArch] Add tests for vector shift-right-and-round combines (#192920)
Commit: 3dc4fd6dd41100f051a63642f449b16324389c96
https://github.com/llvm/llvm-project/commit/3dc4fd6dd41100f051a63642f449b16324389c96
Author: cqwrteur <uwgghhbcad at gmail.com>
Date: 2026-04-24 (Fri, 24 Apr 2026)
Changed paths:
M compiler-rt/lib/sanitizer_common/sanitizer_platform_limits_posix.cpp
Log Message:
-----------
[compiler-rt][sanitizer] Remove linux/scc.h (#194116)
#194110
Linux Kernel has removed scc.h header completely from the source code
Therefore, we need to remove the usage in compiler-rt/sanitizer too.
https://github.com/torvalds/linux/commit/64edfa65062dc4509ba75978116b2f6d392346f5#diff-1ca78e598a5041ee51ae795d168435afad598b82a7a0ce80f215993589b96c7c
Without removing it, not only it breaks compiler-rt but also GCC build
since GCC always builds libsanitizer for linux targets.
After merging this we will need to cherry pick to GCC.
Commit: a693efcc40b1aff43e66802ca53c04b3e1a7f684
https://github.com/llvm/llvm-project/commit/a693efcc40b1aff43e66802ca53c04b3e1a7f684
Author: Gábor Spaits <gaborspaits1 at gmail.com>
Date: 2026-04-25 (Sat, 25 Apr 2026)
Changed paths:
M llvm/lib/Target/RISCV/CMakeLists.txt
A llvm/lib/Target/RISCV/GISel/RISCVInlineAsmLowering.cpp
A llvm/lib/Target/RISCV/GISel/RISCVInlineAsmLowering.h
M llvm/lib/Target/RISCV/RISCVSubtarget.cpp
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator-inline-asm.ll
Log Message:
-----------
[RISCV][GlobalISel] Support RISC-V specific inline asm constraints: 'I', 'J', 'K' and 'S' (#193765)
This patch implements some target-specific constraints for RISC-V: `I`,
`J`, `K` and `S`. These constraints are all for immediate values except
for `S`. The handling of these constraints is implemented with by adding
`RISCVInlineAsmLowering` subclass of `InlineAsmLowering`.
Commit: 3bbfa3e5f07adbffd9512962aade35f432edfb4e
https://github.com/llvm/llvm-project/commit/3bbfa3e5f07adbffd9512962aade35f432edfb4e
Author: hev <wangrui at loongson.cn>
Date: 2026-04-25 (Sat, 25 Apr 2026)
Changed paths:
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/lib/Target/LoongArch/LoongArchLASXInstrInfo.td
M llvm/lib/Target/LoongArch/LoongArchLSXInstrInfo.td
M llvm/test/CodeGen/LoongArch/lasx/srar.ll
M llvm/test/CodeGen/LoongArch/lasx/srlr.ll
M llvm/test/CodeGen/LoongArch/lsx/srar.ll
M llvm/test/CodeGen/LoongArch/lsx/srlr.ll
Log Message:
-----------
[LoongArch] Combine rounded vector shifts to VSRLR/VSRAR (#192921)
Add DAG combines to recognize canonical rounded shift patterns and lower
them to target-specific vector rounded shift instructions.
The combines match vector arithmetic and logical right shifts with
rounding implemented as:
```
add (srl/sra X, shift),
(and (srl X, shift-1), 1)
```
and the shift-by-1 variant:
```
add (srl/sra X, 1),
(and X, 1)
```
Additionally, handle the guarded form generated when shift may be zero:
```
vselect (setcc shift, 0, seteq),
X,
rounded_shift
```
and fold it to the corresponding rounded shift instruction.
Define new target DAG nodes VSRLR and VSRAR and add instruction
selection patterns for both LSX and LASX, including register and
immediate shift forms.
Commit: 55af9c26151bbbec2bb939e4ec9f99bb1a5389e7
https://github.com/llvm/llvm-project/commit/55af9c26151bbbec2bb939e4ec9f99bb1a5389e7
Author: hulxv <hulxxv at gmail.com>
Date: 2026-04-25 (Sat, 25 Apr 2026)
Changed paths:
M libc/shared/math.h
A libc/shared/math/dsubf128.h
A libc/shared/math/dsubl.h
M libc/src/__support/FPUtil/generic/FMA.h
M libc/src/__support/FPUtil/generic/add_sub.h
M libc/src/__support/math/CMakeLists.txt
A libc/src/__support/math/dsubf128.h
A libc/src/__support/math/dsubl.h
M libc/src/math/generic/CMakeLists.txt
M libc/src/math/generic/dsubf128.cpp
M libc/src/math/generic/dsubl.cpp
M libc/test/shared/CMakeLists.txt
M libc/test/shared/shared_math_test.cpp
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[libc][math] Refactor dsub family to header-only (#182160)
Refactors the dsub math family to be header-only.
Closes https://github.com/llvm/llvm-project/issues/182159
Target Functions:
- dsubf128
- dsubl
---------
Co-authored-by: bassiounix <muhammad.m.bassiouni at gmail.com>
Commit: 0ec82abfd2c16ba938eaa5b67b49ed0dfc3d94aa
https://github.com/llvm/llvm-project/commit/0ec82abfd2c16ba938eaa5b67b49ed0dfc3d94aa
Author: Vlad Serebrennikov <serebrennikov.vladislav at gmail.com>
Date: 2026-04-25 (Sat, 25 Apr 2026)
Changed paths:
M clang/test/CXX/drs/cwg25xx.cpp
Log Message:
-----------
[clang] Enable part of CWG2598 test in C++20 mode (#189310)
This is a small fix for `#if __cplusplus >= 202002L` condition, which
accidentally disabled this part of the test in C++20 mode.
Commit: 6443e9b8a5bcfa690d6605d990023d4ab672fe6f
https://github.com/llvm/llvm-project/commit/6443e9b8a5bcfa690d6605d990023d4ab672fe6f
Author: Vlad Serebrennikov <serebrennikov.vladislav at gmail.com>
Date: 2026-04-25 (Sat, 25 Apr 2026)
Changed paths:
M clang/test/CXX/drs/cwg16xx.cpp
M clang/test/CXX/drs/cwg18xx.cpp
M clang/www/cxx_dr_status.html
Log Message:
-----------
[clang] Tests for CWG1670 and CWG1878: `auto` in conversion functions (#187850)
This PR adds tests for
[CWG1670](https://cplusplus.github.io/CWG/issues/1670.html) "`auto` as
_conversion-type-id_" and
[CWG1878](https://cplusplus.github.io/CWG/issues/1878.html) "`operator
auto` template". The long and short of it is that placeholder type
specifier (`auto`) cannot be used to declare conversion function or
conversion function template. We've always diagnosed template case but
not non-template case.
Commit: 4ed36386a276943cfc2549fee0863a008e0d588b
https://github.com/llvm/llvm-project/commit/4ed36386a276943cfc2549fee0863a008e0d588b
Author: Maksim Ivanov <emaxx at google.com>
Date: 2026-04-25 (Sat, 25 Apr 2026)
Changed paths:
M compiler-rt/include/sanitizer/asan_interface.h
M compiler-rt/lib/asan/asan_errors.h
M compiler-rt/lib/asan/asan_interceptors_memintrinsics.h
M compiler-rt/lib/asan/asan_interface.inc
M compiler-rt/lib/asan/asan_interface_internal.h
M compiler-rt/lib/asan/asan_report.cpp
M compiler-rt/lib/asan/asan_report.h
M compiler-rt/test/asan/TestCases/debug_double_free.cpp
A compiler-rt/test/asan/TestCases/debug_invalid_pointer_pair.cpp
A compiler-rt/test/asan/TestCases/debug_memcpy_overlap.cpp
A compiler-rt/test/asan/TestCases/debug_negative_size.cpp
M compiler-rt/test/asan/TestCases/debug_report.cpp
Log Message:
-----------
[asan] API for getting multiple pointer ranges (#181446)
Add an API that, unlike __asan_get_report_address(), can return multiple
addresses and sizes. This allows a handler to inspect the source and the
destination ranges of errors that have more than one pointer involved
(e.g., memcpy-param-overlap).
Fixes #155406.
Assisted-by: Gemini
---------
Co-authored-by: Vitaly Buka <vitalybuka at google.com>
Commit: 5c73c7a3a0574ffd463da610d31d1855b6929fdf
https://github.com/llvm/llvm-project/commit/5c73c7a3a0574ffd463da610d31d1855b6929fdf
Author: Felipe de Azevedo Piovezan <fpiovezan at apple.com>
Date: 2026-04-25 (Sat, 25 Apr 2026)
Changed paths:
M lldb/docs/resources/lldbgdbremote.md
Log Message:
-----------
[lldb] Propose MultiBreakpoint extension to GDB Remote (#192910)
This describes the packet discussed in the RFC:
https://discourse.llvm.org/t/rfc-a-new-packet-to-set-remove-multiple-breakpoints/90623
The following PRs are related:
* [[lldb] Propose MultiBreakpoint extension to GDB
Remote](https://github.com/llvm/llvm-project/pull/192910)
* [[debugserver] Implement
MultiBreakpoint](https://github.com/llvm/llvm-project/pull/192914)
* [[lldb-server][NFC] Factor out code handling breakpoint
packets](https://github.com/llvm/llvm-project/pull/192915)
* [[lldb-server] Implement support for MultiBreakpoint
packet](https://github.com/llvm/llvm-project/pull/192919)
* [[lldb][GDBRemote] Parse MultiBreakpoint+
capability](https://github.com/llvm/llvm-project/pull/192962)
* [[lldb][NFC] Move BreakpointSite::IsEnabled/SetEnabled into
Process](https://github.com/llvm/llvm-project/pull/192964)
* [[lldb] Implement delayed
breakpoints](https://github.com/llvm/llvm-project/pull/192971)
* [[lldb] Override UpdateBreakpointSites in ProcessGDBRemote to use
MultiBreakpoint](https://github.com/llvm/llvm-project/pull/192988)
Commit: 61f311d93ed0542003c82ea9c75a44d753d4febd
https://github.com/llvm/llvm-project/commit/61f311d93ed0542003c82ea9c75a44d753d4febd
Author: Ben Shi <2283975856 at qq.com>
Date: 2026-04-25 (Sat, 25 Apr 2026)
Changed paths:
M llvm/lib/Target/AVR/AVRAsmPrinter.cpp
A llvm/test/CodeGen/AVR/issue-176830.ll
Log Message:
-----------
[AVR] Fix a bug in printing assembly operand with extra code (#193964)
Commit: 3e10b2fe2169227e7e8e338430a404e785e3a089
https://github.com/llvm/llvm-project/commit/3e10b2fe2169227e7e8e338430a404e785e3a089
Author: Ben Shi <2283975856 at qq.com>
Date: 2026-04-25 (Sat, 25 Apr 2026)
Changed paths:
M clang/lib/Basic/Targets/AVR.h
A clang/test/CodeGen/avr/issue-176830.c
Log Message:
-----------
[clang] Fix incorrect register information for AVR (#193940)
Commit: 2f28e1db535bddca42d0954b365a4e5f17bdf534
https://github.com/llvm/llvm-project/commit/2f28e1db535bddca42d0954b365a4e5f17bdf534
Author: Will Hawkins <hawkinsw at obs.cr>
Date: 2026-04-25 (Sat, 25 Apr 2026)
Changed paths:
M libcxx/docs/FeatureTestMacroTable.rst
M libcxx/docs/ReleaseNotes/23.rst
M libcxx/docs/Status/Cxx23Papers.csv
M libcxx/include/CMakeLists.txt
A libcxx/include/__ranges/stride_view.h
M libcxx/include/module.modulemap.in
M libcxx/include/ranges
M libcxx/include/version
M libcxx/modules/std/ranges.inc
A libcxx/test/libcxx/ranges/range.adaptors/range.stride.view/ctor.assert.pass.cpp
A libcxx/test/libcxx/ranges/range.adaptors/range.stride.view/iterator/dereference.assert.pass.cpp
A libcxx/test/libcxx/ranges/range.adaptors/range.stride.view/iterator/increment.assert.pass.cpp
A libcxx/test/libcxx/ranges/range.adaptors/range.stride.view/iterator/iterator.nodiscard.verify.cpp
A libcxx/test/libcxx/ranges/range.adaptors/range.stride.view/iterator/operator_plus_equal.assert.pass.cpp
A libcxx/test/libcxx/ranges/range.adaptors/range.stride.view/nodiscard.verify.cpp
M libcxx/test/std/language.support/support.limits/support.limits.general/ranges.version.compile.pass.cpp
M libcxx/test/std/language.support/support.limits/support.limits.general/version.version.compile.pass.cpp
A libcxx/test/std/ranges/range.adaptors/range.stride.view/adaptor.pass.cpp
A libcxx/test/std/ranges/range.adaptors/range.stride.view/base.pass.cpp
A libcxx/test/std/ranges/range.adaptors/range.stride.view/begin.pass.cpp
A libcxx/test/std/ranges/range.adaptors/range.stride.view/borrowing.compile.pass.cpp
A libcxx/test/std/ranges/range.adaptors/range.stride.view/concept.compile.pass.cpp
A libcxx/test/std/ranges/range.adaptors/range.stride.view/ctad.pass.cpp
A libcxx/test/std/ranges/range.adaptors/range.stride.view/ctor.pass.cpp
A libcxx/test/std/ranges/range.adaptors/range.stride.view/end.pass.cpp
A libcxx/test/std/ranges/range.adaptors/range.stride.view/iterator/base.pass.cpp
A libcxx/test/std/ranges/range.adaptors/range.stride.view/iterator/compare.pass.cpp
A libcxx/test/std/ranges/range.adaptors/range.stride.view/iterator/ctor.copy.pass.cpp
A libcxx/test/std/ranges/range.adaptors/range.stride.view/iterator/ctor.default.pass.cpp
A libcxx/test/std/ranges/range.adaptors/range.stride.view/iterator/decrement.pass.cpp
A libcxx/test/std/ranges/range.adaptors/range.stride.view/iterator/dereference.pass.cpp
A libcxx/test/std/ranges/range.adaptors/range.stride.view/iterator/equal.pass.cpp
A libcxx/test/std/ranges/range.adaptors/range.stride.view/iterator/increment.pass.cpp
A libcxx/test/std/ranges/range.adaptors/range.stride.view/iterator/iter_move.pass.cpp
A libcxx/test/std/ranges/range.adaptors/range.stride.view/iterator/iter_swap.pass.cpp
A libcxx/test/std/ranges/range.adaptors/range.stride.view/iterator/minus.pass.cpp
A libcxx/test/std/ranges/range.adaptors/range.stride.view/iterator/minus_equal.pass.cpp
A libcxx/test/std/ranges/range.adaptors/range.stride.view/iterator/plus.pass.cpp
A libcxx/test/std/ranges/range.adaptors/range.stride.view/iterator/plus_equal.pass.cpp
A libcxx/test/std/ranges/range.adaptors/range.stride.view/iterator/subscript.pass.cpp
A libcxx/test/std/ranges/range.adaptors/range.stride.view/iterator/types.compile.pass.cpp
A libcxx/test/std/ranges/range.adaptors/range.stride.view/size.pass.cpp
A libcxx/test/std/ranges/range.adaptors/range.stride.view/stride.pass.cpp
A libcxx/test/std/ranges/range.adaptors/range.stride.view/types.h
M libcxx/utils/generate_feature_test_macro_components.py
Log Message:
-----------
[libc++] Implement P1899 `ranges::stride_view` (#65200)
Implement `ranges::stride_view` in libc++. This PR was migrated from
Phabricator (https://reviews.llvm.org/D156924).
Closes #105198
Co-authored-by: Louis Dionne <ldionne.2 at gmail.com>
Co-authored-by: A. Jiang <de34 at live.cn>
Commit: 0ad0e899d456f824e520bfef7224a5f5bb2a7581
https://github.com/llvm/llvm-project/commit/0ad0e899d456f824e520bfef7224a5f5bb2a7581
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2026-04-25 (Sat, 25 Apr 2026)
Changed paths:
M libcxx/include/__assert
Log Message:
-----------
[libc++] Remove full header path from assertion messages (#190060)
This creates additional bloat in programs or debug info, without much
additional value beyond just the file name.
Fixes #190058
Commit: 1348766d1d686b8825bdaa2f6638c1783d76a4a7
https://github.com/llvm/llvm-project/commit/1348766d1d686b8825bdaa2f6638c1783d76a4a7
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-04-25 (Sat, 25 Apr 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/PhaseOrdering/X86/avg.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/InstructionsState-is-invalid-0.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/PR38339.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/div-like-mixed-with-undefs.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/reused-scalar-repeated-in-node.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/vectorizable-selects-uniform-cmps.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/basic-strided-loads.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/gather-insert-point-restore.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/reduced-value-repeated-and-vectorized.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/reductions.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/reordered-buildvector-scalars.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/same-node-reused.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/smin-signed-zextended.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/split-vectorize-parent-for-copyables.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/unordered-loads-operands.ll
M llvm/test/Transforms/SLPVectorizer/SystemZ/reuse-non-power-of-2-reorder.ll
M llvm/test/Transforms/SLPVectorizer/X86/PR39774.ll
M llvm/test/Transforms/SLPVectorizer/X86/PR40310.ll
M llvm/test/Transforms/SLPVectorizer/X86/deleted-inst-reduction-attempt.ll
M llvm/test/Transforms/SLPVectorizer/X86/div-possibly-extended-with-poisons.ll
M llvm/test/Transforms/SLPVectorizer/X86/external-used-across-reductions.ll
M llvm/test/Transforms/SLPVectorizer/X86/extractelements-vector-ops-shuffle.ll
M llvm/test/Transforms/SLPVectorizer/X86/extractelemets-extended-by-poison.ll
M llvm/test/Transforms/SLPVectorizer/X86/full-match-with-poison-scalar.ll
M llvm/test/Transforms/SLPVectorizer/X86/full-matched-bv-with-subvectors.ll
M llvm/test/Transforms/SLPVectorizer/X86/gather-with-cmp-user.ll
M llvm/test/Transforms/SLPVectorizer/X86/gathered-loads-non-full-reg.ll
M llvm/test/Transforms/SLPVectorizer/X86/gathered-shuffle-resized.ll
M llvm/test/Transforms/SLPVectorizer/X86/identity-match-splat-less-defined.ll
M llvm/test/Transforms/SLPVectorizer/X86/insert-subvector.ll
M llvm/test/Transforms/SLPVectorizer/X86/load-merge-inseltpoison.ll
M llvm/test/Transforms/SLPVectorizer/X86/load-merge.ll
M llvm/test/Transforms/SLPVectorizer/X86/load-partial-vector-shuffle.ll
M llvm/test/Transforms/SLPVectorizer/X86/matched-gather-part-of-combined.ll
M llvm/test/Transforms/SLPVectorizer/X86/non-power-of-2-order-detection.ll
M llvm/test/Transforms/SLPVectorizer/X86/non-power-of-2-subvectors-insert.ll
M llvm/test/Transforms/SLPVectorizer/X86/non-schedulable-before-main.ll
M llvm/test/Transforms/SLPVectorizer/X86/non-scheduled-inst-extern-use.ll
M llvm/test/Transforms/SLPVectorizer/X86/original-inst-scheduled-after-copyable.ll
M llvm/test/Transforms/SLPVectorizer/X86/parent-node-schedulable-with-multi-copyables.ll
M llvm/test/Transforms/SLPVectorizer/X86/pr47629-inseltpoison.ll
M llvm/test/Transforms/SLPVectorizer/X86/pr47629.ll
M llvm/test/Transforms/SLPVectorizer/X86/pr47642.ll
M llvm/test/Transforms/SLPVectorizer/X86/pr49081.ll
M llvm/test/Transforms/SLPVectorizer/X86/reduced-val-vectorized-in-transform.ll
M llvm/test/Transforms/SLPVectorizer/X86/reorder-reused-masked-gather.ll
M llvm/test/Transforms/SLPVectorizer/X86/reorder-reused-masked-gather2.ll
M llvm/test/Transforms/SLPVectorizer/X86/reordered-masked-loads.ll
M llvm/test/Transforms/SLPVectorizer/X86/replaced-external-in-reduction.ll
M llvm/test/Transforms/SLPVectorizer/X86/reschedule-only-scheduled.ll
M llvm/test/Transforms/SLPVectorizer/X86/resized-bv-values-non-power-of2-node.ll
M llvm/test/Transforms/SLPVectorizer/X86/reuse-extracts-in-wider-vect.ll
M llvm/test/Transforms/SLPVectorizer/X86/revec-non-power-2-to-power-2-large-vect.ll
M llvm/test/Transforms/SLPVectorizer/X86/revec-reduced-value-vectorized-later.ll
M llvm/test/Transforms/SLPVectorizer/X86/same-values-sub-node-with-poisons.ll
M llvm/test/Transforms/SLPVectorizer/X86/shl-to-add-transformation5.ll
M llvm/test/Transforms/SLPVectorizer/X86/shrink_after_reorder.ll
M llvm/test/Transforms/SLPVectorizer/X86/sin-sqrt.ll
M llvm/test/Transforms/SLPVectorizer/X86/split-vectorize-gathered-def-after-use.ll
M llvm/test/Transforms/SLPVectorizer/gathered-consecutive-loads-different-types.ll
M llvm/test/Transforms/SLPVectorizer/insertelement-across-zero.ll
M llvm/test/Transforms/SLPVectorizer/reduced-gathered-vectorized.ll
M llvm/test/Transforms/SLPVectorizer/reduction-whole-regs-loads.ll
M llvm/test/Transforms/SLPVectorizer/reorder-clustered-node.ll
M llvm/test/Transforms/SLPVectorizer/revec-shufflevector.ll
M llvm/test/Transforms/SLPVectorizer/revec.ll
M llvm/test/Transforms/SLPVectorizer/shuffle-mask-resized.ll
Log Message:
-----------
[SLP]Initial support for non-power-of-2 vectorization
Enables non-power-of-2 vectorization within the SLP tree. The root nodes
are still required to be power-of-2, will be addressed in a follow-up
patches.
Reviewers: bababuck, RKSimon, preames, hiraditya, HanKuanChen
Pull Request: https://github.com/llvm/llvm-project/pull/151530
Commit: 6f0b55ec55f3e5e1ccc0d6b0d04a307479218768
https://github.com/llvm/llvm-project/commit/6f0b55ec55f3e5e1ccc0d6b0d04a307479218768
Author: Haocong Lu <haoconglu at qq.com>
Date: 2026-04-25 (Sat, 25 Apr 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp
M clang/lib/CIR/CodeGen/CIRGenTypes.cpp
A clang/test/CIR/CodeGen/fixed-point-literal.c
Log Message:
-----------
[CIR] Upstream missing support for fixed point literal (#193445)
- Upstream CIR CodeGen for fixed point builtin types `_Fract`, `_Accum`
and `_Sat`.
- Upstream CIR CodeGen for fixed point literal
- Part of task https://github.com/llvm/llvm-project/issues/192316
Commit: ada1b812d1a099630dafdc3d1b2f4e67e7197ad3
https://github.com/llvm/llvm-project/commit/ada1b812d1a099630dafdc3d1b2f4e67e7197ad3
Author: David Green <david.green at arm.com>
Date: 2026-04-25 (Sat, 25 Apr 2026)
Changed paths:
M llvm/test/CodeGen/AArch64/arm64-vmul.ll
Log Message:
-----------
[AArch64] Addition tests for add_like Or of smlal/umlal. NFC (#194138)
Commit: f2436980771e8d5a203a6092160550f8c15664e1
https://github.com/llvm/llvm-project/commit/f2436980771e8d5a203a6092160550f8c15664e1
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-04-25 (Sat, 25 Apr 2026)
Changed paths:
M llvm/test/CodeGen/X86/dag-topological-sort.ll
Log Message:
-----------
[X86] dag-topological-sort.ll - add additional test coverage (#194135)
The PR134602 test codegen will converge after #193987
Ensure we test with -combiner-topological-sorting=false as well
Commit: fed92a3de6cefa4f1d62312aa48f494693b00c7c
https://github.com/llvm/llvm-project/commit/fed92a3de6cefa4f1d62312aa48f494693b00c7c
Author: DaniPopes <57450786+DaniPopes at users.noreply.github.com>
Date: 2026-04-25 (Sat, 25 Apr 2026)
Changed paths:
M llvm/lib/ExecutionEngine/Orc/TargetProcess/JITLoaderPerf.cpp
Log Message:
-----------
[ORC] Wrap unconditional dbgs() in LLVM_DEBUG in JITLoaderPerf (#188903)
Fixes #188900
Commit: e80d3a375447009d5498c89b23f746635d9cb351
https://github.com/llvm/llvm-project/commit/e80d3a375447009d5498c89b23f746635d9cb351
Author: David Green <david.green at arm.com>
Date: 2026-04-25 (Sat, 25 Apr 2026)
Changed paths:
A llvm/test/CodeGen/Thumb2/mve-extbuildvec.ll
Log Message:
-----------
[ARM][MVE] Add tests for sext and zext of i1 buildvector. NFC (#194141)
Commit: 44633491b77c3e053aebaba13c017b39a806b045
https://github.com/llvm/llvm-project/commit/44633491b77c3e053aebaba13c017b39a806b045
Author: Hui <hui.xie1990 at gmail.com>
Date: 2026-04-25 (Sat, 25 Apr 2026)
Changed paths:
M libcxx/include/__utility/constant_wrapper.h
M libcxx/test/libcxx/utilities/const.wrap.class/nodiscard.verify.cpp
M libcxx/test/std/utilities/const.wrap.class/call.pass.cpp
M libcxx/test/std/utilities/const.wrap.class/subscript.pass.cpp
Log Message:
-----------
[libc++] Fix constant_wrapper::operator() (#193573)
As Tomasz pointed out on mattermost,
given
```cpp
template <class T>
struct MustBeInt {
static_assert(std::same_as<T, int>);
};
struct Poison {
template <class T>
constexpr auto operator()(T) const noexcept -> MustBeInt<T> {
return {};
}
};
std::cw<Poison{}>(std::cw<5>);
```
This should work according to the wording
https://www.open-std.org/jtc1/sc22/wg21/docs/papers/2026/p3978r3.pdf
```cpp
template<class... Args>
static constexpr decltype(auto) operator()(Args&&... args) noexcept(see below);
```
```
- Let call-expr be constant_wrapper<INVOKE (value, remove_cvref_t<Args>::value...)>{} if all types
in remove_cvref_t<Args>... satisfy constexpr-param and constant_wrapper<INVOKE (value, remove_-
cvref_t<Args>::value...)> is a valid type, otherwise let call-expr be INVOKE (value, std::forward<Args>(args)...).
- Constraints: call-expr is a valid expression.
- Effects: Equivalent to: return call-expr;
- Remarks: The exception specification is equivalent to noexcept(call-expr).
```
so basically the spec says, there are two cases
- constexpr-param case
- runtime case
and if constexpr-param case works, uses it, otherwise fallback to
runtime case if it is valid, otherwise substitution error.
In this case, `std::cw<5>` satisfy `constexpr-param`, and
`constant_wrapper<Poison{}(5)>` is valid , it should just work. however,
our implementation implemented the two cases in two overload
```cpp
template <class... _Args>
requires(__constexpr_param<remove_cvref_t<_Args>> && ...)
_LIBCPP_HIDE_FROM_ABI static constexpr auto __call(_Args&&...) noexcept
-> constant_wrapper<std::invoke(value, remove_cvref_t<_Args>::value...)> {
return {};
}
template <class... _Args>
_LIBCPP_HIDE_FROM_ABI static constexpr auto
__call(_Args&&... __args) noexcept(noexcept(std::invoke(value, std::forward<_Args>(__args)...)))
-> decltype(std::invoke(value, std::forward<_Args>(__args)...)) {
return std::invoke(value, std::forward<_Args>(__args)...);
}
```
The logic is that, both overloads use return type SFINAE and the
constexpr-param case's concept is more constrained so it will be picked
first if constexpr-param case works.
However, in this example, the second overload's return type SFINAE
causes a hard error by the `static_assert` in the user code.
The fix is simply constrain the second overload and not using return
type SFINAE so it short circuits if constexpr-param case is valid.
As a drive by, removed the internal helper function and directly make
the public interface `operator()` two overloads so that we can apply
`[[nodiscard]]` on the constexpr-param case
Commit: 228fabd5be82ac15d14109b90c7ee1cd682b4254
https://github.com/llvm/llvm-project/commit/228fabd5be82ac15d14109b90c7ee1cd682b4254
Author: Brandon Wu <brandon.wu at sifive.com>
Date: 2026-04-25 (Sat, 25 Apr 2026)
Changed paths:
M clang/include/clang/AST/TypeBase.h
M clang/include/clang/Basic/RISCVVTypes.def
M clang/include/clang/Basic/riscv_vector.td
M clang/include/clang/Serialization/ASTBitCodes.h
M clang/lib/Sema/SemaRISCV.cpp
M clang/lib/Support/RISCVVIntrinsicUtils.cpp
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfofp8min/non-policy/non-overloaded/vfncvt.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfofp8min/non-policy/non-overloaded/vfncvtbf16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfofp8min/non-policy/non-overloaded/vfwcvtbf16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfofp8min/non-policy/overloaded/vfncvt.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfofp8min/non-policy/overloaded/vfncvtbf16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfofp8min/non-policy/overloaded/vfwcvtbf16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfofp8min/policy/non-overloaded/vfncvt.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfofp8min/policy/non-overloaded/vfncvtbf16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfofp8min/policy/non-overloaded/vfwcvtbf16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfofp8min/policy/overloaded/vfncvt.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfofp8min/policy/overloaded/vfncvtbf16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfofp8min/policy/overloaded/vfwcvtbf16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-handcrafted/rvv-intrinsic-datatypes.cpp
A clang/test/CodeGenCXX/riscv-mangle-rvv-vectors.cpp
M clang/test/Sema/riscv-types.c
M clang/utils/TableGen/RISCVVEmitter.cpp
Log Message:
-----------
[Clang][RISCV] Introduce OFP8(E4M3, E5M2) RISC-V vector types (#191349)
Currently there's no OFP8 scalar type supported in both clang and llvm
type system, the vector OFP8 RVV types are lowered to i8 llvm types for
now.
The reason to support only clang type is because of intrinsics
definition capability. If we make the clang type also using uint8 vector
types, it's not able to distinguish between E4M3 type and E5M2 type so
that we have to append additional type suffix to it.
intrinsic spec update pr:
https://github.com/riscv-non-isa/riscv-rvv-intrinsic-doc/pull/432
vreinterpret intrinsic PR:
https://github.com/llvm/llvm-project/pull/191626
DONT MERGE: We have to get the intrinsic spec merged first to be able to
make zvfofp8min change
Commit: 5ee6e6d5ef37b329c5693ea934f19b37936a632e
https://github.com/llvm/llvm-project/commit/5ee6e6d5ef37b329c5693ea934f19b37936a632e
Author: Rajveer Singh Bharadwaj <rajveer.developer at icloud.com>
Date: 2026-04-25 (Sat, 25 Apr 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
A llvm/test/CodeGen/AArch64/uaddlp.ll
Log Message:
-----------
[AArch64] Use `AArch64ISD::UADDLP` for manual widening adjacent arithmetic (zext/shuffle combination) (#189255)
Commit: 142a87178aa480cdf6d1c3a28a5fc3a0a4326274
https://github.com/llvm/llvm-project/commit/142a87178aa480cdf6d1c3a28a5fc3a0a4326274
Author: David Green <david.green at arm.com>
Date: 2026-04-25 (Sat, 25 Apr 2026)
Changed paths:
M llvm/lib/Target/ARM/ARMISelLowering.cpp
M llvm/test/CodeGen/Thumb2/mve-extbuildvec.ll
Log Message:
-----------
[ARM][MVE] Transform sext and zext of i1 buildvector (#192519)
This helps by avoiding the difficult predicate generation in scalar, using
natural extends to all-zero or all-ones in scalar as opposed to re-extending
them in vector registers.
Commit: 8cd9673451a814b871fc3d2a3023dd1decc8bab3
https://github.com/llvm/llvm-project/commit/8cd9673451a814b871fc3d2a3023dd1decc8bab3
Author: Ben Shi <2283975856 at qq.com>
Date: 2026-04-25 (Sat, 25 Apr 2026)
Changed paths:
M llvm/lib/Target/AVR/AVRISelLowering.cpp
M llvm/lib/Target/AVR/AVRInstrInfo.td
A llvm/test/CodeGen/AVR/issue-104032.ll
Log Message:
-----------
[AVR] Fix allocating DREGS (#193908)
Commit: 22a2ff741827f3b6b538b63eddce20dcd50900c5
https://github.com/llvm/llvm-project/commit/22a2ff741827f3b6b538b63eddce20dcd50900c5
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-04-25 (Sat, 25 Apr 2026)
Changed paths:
A llvm/test/Transforms/SLPVectorizer/X86/non-vectorizable-call-operand.ll
Log Message:
-----------
[SLP][NFC]Add a test with non-vectorizable functions/intrinsics, but vectorizable operands
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/194143
Commit: 7dff689a58c31600ae6062679b5434edbd65dcdc
https://github.com/llvm/llvm-project/commit/7dff689a58c31600ae6062679b5434edbd65dcdc
Author: David Green <david.green at arm.com>
Date: 2026-04-25 (Sat, 25 Apr 2026)
Changed paths:
M llvm/include/llvm/Target/GlobalISel/Combine.td
Log Message:
-----------
[GlobalISel] Remove duplicate patterns. NFC (#194131)
This looks like a merge conflict from #194010 cause a duplicate line to
appear, causing warning about constant_fold_cast_op and fabs_fneg_fold
being used multiple times.
Commit: 65b9755fd555e84b758e49d01c6a1e6d7fe63947
https://github.com/llvm/llvm-project/commit/65b9755fd555e84b758e49d01c6a1e6d7fe63947
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-04-25 (Sat, 25 Apr 2026)
Changed paths:
M llvm/test/CodeGen/WebAssembly/strided-int-mac.ll
Log Message:
-----------
[NFC][WebAssembly] strided-int-mac.ll - regenerate test checks (#194146)
Use update_llc_test_checks regeneration
Commit: 2a54476802e65d7aabd74c2967e3f48030423c81
https://github.com/llvm/llvm-project/commit/2a54476802e65d7aabd74c2967e3f48030423c81
Author: Akimasa Watanuki <mencotton0410 at gmail.com>
Date: 2026-04-25 (Sat, 25 Apr 2026)
Changed paths:
M clang/test/lit.cfg.py
Log Message:
-----------
[clang][lit] Substitute cir-opt when CIR is enabled (#194129)
Fix the CIR lit substitution introduced by #193665 to use `cir-opt`.
Commit: cabe29eb6e0760bee7be4b31968a0e1bbb32f51a
https://github.com/llvm/llvm-project/commit/cabe29eb6e0760bee7be4b31968a0e1bbb32f51a
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2026-04-25 (Sat, 25 Apr 2026)
Changed paths:
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/check-omp-structure.h
A flang/test/Semantics/OpenMP/branching-program-unit.f90
Log Message:
-----------
[flang][OpenMP] Clear branch labels in all program units (#194152)
The semantic check for branching in or out of an OpenMP construct did
not reset its label information in some cases, leading to false positive
error messages in valid Fortran code.
Commit: 355125414194a56bb09d4f405bb58d612f061194
https://github.com/llvm/llvm-project/commit/355125414194a56bb09d4f405bb58d612f061194
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-04-25 (Sat, 25 Apr 2026)
Changed paths:
R llvm/test/Transforms/SLPVectorizer/X86/non-vectorizable-call-operand.ll
A llvm/test/Transforms/SLPVectorizer/X86/non-vectorizable-inst-operand.ll
Log Message:
-----------
[SLP][NFC]Rename test, add other non-vectorizable inst candidates tests, NFC
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/194153
Commit: 4b87091acf019ea915c08da77701cc9beaba78f4
https://github.com/llvm/llvm-project/commit/4b87091acf019ea915c08da77701cc9beaba78f4
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-04-25 (Sat, 25 Apr 2026)
Changed paths:
M llvm/include/llvm/IR/IRBuilder.h
M llvm/lib/Transforms/Utils/ScalarEvolutionExpander.cpp
M llvm/test/CodeGen/AArch64/sink-and-fold.ll
M llvm/test/Transforms/LoopIdiom/expand-scev-expand-simplifications.ll
M llvm/test/Transforms/LoopStrengthReduce/depth-limit-overrun.ll
M llvm/test/Transforms/LoopStrengthReduce/lsr-rewrite-to-add-one.ll
M llvm/test/Transforms/LoopStrengthReduce/wrong-hoisting-iv.ll
M llvm/test/Transforms/LoopVectorize/AArch64/epilog-vectorization-factors.ll
M llvm/test/Transforms/LoopVectorize/epilog-vectorization-reductions.ll
M llvm/test/Transforms/LoopVectorize/version-stride-with-integer-casts.ll
M polly/lib/CodeGen/IslNodeBuilder.cpp
Log Message:
-----------
[SCEVExp] Use Builder.CreateBinOp in InsertBinOp. (#154148)
SCEVExpander's builder already uses InstSimplifyFolder. Use it to
construct binary ops via CreateBinOp instead of BinaryOperator::Create.
This helps to simplify away a few more instructions during SCEV
expansion.
PR: https://github.com/llvm/llvm-project/pull/154148
Commit: b1763ea1ecc08c4e07aaf1eded89014c59bed593
https://github.com/llvm/llvm-project/commit/b1763ea1ecc08c4e07aaf1eded89014c59bed593
Author: Luke Lau <luke at igalia.com>
Date: 2026-04-25 (Sat, 25 Apr 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.h
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fptrunc-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfptrunc-vp.ll
Log Message:
-----------
[RISCV] Remove codegen for vp_fp_round, vp_fp_extend (#193219)
Part of the work to remove trivial VP intrinsics from the RISC-V
backend, see
https://discourse.llvm.org/t/rfc-remove-codegen-support-for-trivial-vp-intrinsics-in-the-risc-v-backend/87999
This splits off 2 intrinsics from #179622. vp.fpext was previously
expanded in #190589, we only need to expand vp.fptrunc in this PR.
Commit: fad60465ce22a921237fc8ae223680d11e381532
https://github.com/llvm/llvm-project/commit/fad60465ce22a921237fc8ae223680d11e381532
Author: Luke Lau <luke at igalia.com>
Date: 2026-04-25 (Sat, 25 Apr 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vmul-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vshl-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vsra-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vsrl-vp.ll
M llvm/test/CodeGen/RISCV/rvv/sink-splat-operands.ll
M llvm/test/CodeGen/RISCV/rvv/undef-vp-ops.ll
M llvm/test/CodeGen/RISCV/rvv/vnsra-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vnsrl-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vp-vaaddu.ll
M llvm/test/CodeGen/RISCV/rvv/vshl-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vsra-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vsrl-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vwsll-vp.ll
Log Message:
-----------
[RISCV] Expand vp.shl, vp.lshr, vp.ashr (#193603)
Part of the work to remove trivial VP intrinsics from the RISC-V
backend, see
https://discourse.llvm.org/t/rfc-remove-codegen-support-for-trivial-vp-intrinsics-in-the-risc-v-backend/87999
This splits off 3 intrinsics from #179622. The codegen is left in for
now as other places can generate those nodes. performVP_TRUNCATECombine
needs to be updated to match the plain non-VP node when forming vaaddu.
Commit: 6855d70d0153bc1b238a781db0211bdb581cfa4a
https://github.com/llvm/llvm-project/commit/6855d70d0153bc1b238a781db0211bdb581cfa4a
Author: Sirui Mu <msrlancern at gmail.com>
Date: 2026-04-26 (Sun, 26 Apr 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenAtomic.cpp
M clang/lib/CIR/CodeGen/CIRGenExpr.cpp
M clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
M clang/test/CIR/CodeGen/atomic.c
Log Message:
-----------
[CIR] Add support for atomic-to-non-atomic cast (#193784)
This patch adds support for atomic-to-non-atomic casts in CIR.
Related to #192319 .
Assisted-by: Github Copilot / GPT-5.4
Commit: 109f2a2856972a68890168fd434f92b95083b4b5
https://github.com/llvm/llvm-project/commit/109f2a2856972a68890168fd434f92b95083b4b5
Author: Matthias Springer <me at m-sp.org>
Date: 2026-04-25 (Sat, 25 Apr 2026)
Changed paths:
M mlir/include/mlir/Dialect/Math/IR/MathBase.td
M mlir/include/mlir/Dialect/Math/IR/MathOps.td
M mlir/lib/Conversion/MathToLLVM/MathToLLVM.cpp
M mlir/test/Conversion/MathToLLVM/math-to-llvm.mlir
M mlir/test/Dialect/Math/ops.mlir
Log Message:
-----------
[mlir][math] Add rounding modes to `math.fma` (#192839)
Rounding modes have recently been added for `arith` FP operations
(#188458). This commit adds rounding modes to `math.fma`, following the
same design as for `arith` FP operations.
If a rounding mode is present, the LLVM lowering produces
`llvm.intr.experimental.constrained.fma`.
In the absence of a rounding mode, the rounding behavior is deferred to
the target backend.
Assisted-by: claude-opus-4.7-thinking-high
Commit: 1d14d8597df8cc5b71312c01b4c961427b6fd85f
https://github.com/llvm/llvm-project/commit/1d14d8597df8cc5b71312c01b4c961427b6fd85f
Author: A. Jiang <de34 at live.cn>
Date: 2026-04-26 (Sun, 26 Apr 2026)
Changed paths:
M libcxx/docs/FeatureTestMacroTable.rst
M libcxx/docs/ReleaseNotes/23.rst
M libcxx/docs/Status/Cxx2cPapers.csv
M libcxx/include/span
M libcxx/include/version
M libcxx/test/std/containers/views/views.span/span.cons/array.pass.cpp
R libcxx/test/std/containers/views/views.span/span.cons/initializer_list.assert.pass.cpp
M libcxx/test/std/containers/views/views.span/span.cons/initializer_list.pass.cpp
R libcxx/test/std/containers/views/views.span/span.cons/initializer_list.verify.cpp
M libcxx/test/std/containers/views/views.span/span.cons/iterator_len.verify.cpp
M libcxx/test/std/language.support/support.limits/support.limits.general/span.version.compile.pass.cpp
M libcxx/test/std/language.support/support.limits/support.limits.general/version.version.compile.pass.cpp
M libcxx/utils/generate_feature_test_macro_components.py
Log Message:
-----------
[libc++] P4144R1: Remove `span`'s `initializer_list` constructor for C++26 (#191428)
Reverts P2447R6 (implemented in
dbbeee6b8357c5a68543f612f3b2b607f1911b4c). Some test cases that indicate
"old" behavior mentioned in P2447R6 are kept.
Commit: 0eae5cf6ccad7b132bfe69d980df7053764c0845
https://github.com/llvm/llvm-project/commit/0eae5cf6ccad7b132bfe69d980df7053764c0845
Author: Luke Lau <luke at igalia.com>
Date: 2026-04-25 (Sat, 25 Apr 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.h
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-peephole-vmerge-vops.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-setcc-int-vp-mask.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-setcc-int-vp.ll
M llvm/test/CodeGen/RISCV/rvv/setcc-int-vp-mask.ll
M llvm/test/CodeGen/RISCV/rvv/setcc-int-vp.ll
M llvm/test/CodeGen/RISCV/rvv/sink-splat-operands.ll
Log Message:
-----------
[RISCV] Remove codegen for vp.icmp (#193606)
Part of the work to remove trivial VP intrinsics from the RISC-V
backend, see
https://discourse.llvm.org/t/rfc-remove-codegen-support-for-trivial-vp-intrinsics-in-the-risc-v-backend/87999
This splits off vp.icmp from #179622
Commit: 764e10c042db3c8ea1696b087bd3ca9ffad4a677
https://github.com/llvm/llvm-project/commit/764e10c042db3c8ea1696b087bd3ca9ffad4a677
Author: Anshul Nigham <nigham at google.com>
Date: 2026-04-25 (Sat, 25 Apr 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64.h
M llvm/lib/Target/AArch64/AArch64PassRegistry.def
M llvm/lib/Target/AArch64/AArch64SIMDInstrOpt.cpp
M llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
Log Message:
-----------
[NewPM] Adds a port for AArch64SIMDInstrOpt (#188177)
Adds a port for AArch64SIMDInstrOpt
- Refactored to extract base logic as Impl.
- **Note**: Moved theI nstruction Replacement Table and cross-function
cached maps as members of the Impl class.
- **Note**: Updated `InstReplInfo::RC` to be a pointer rather than a
stack object, because we're putting it into MRI
[here](https://github.com/llvm/llvm-project/blob/704c60fe9110256d2698d8e56b8c44ec5d1e733f/llvm/lib/Target/AArch64/AArch64SIMDInstrOpt.cpp#L532).
- Renamed existing pass with "Legacy" suffix and updated references
- Added NewPM pass AArch64SIMDInstrOptPass
- Updated pass type to `aarch64-simd-instr-opt` (prev:
`aarch64-simdinstr-opt`)
No existing `.mir` tests to update.
Commit: 8e3fa9514d6f2d241b7b015f031768bcf7108556
https://github.com/llvm/llvm-project/commit/8e3fa9514d6f2d241b7b015f031768bcf7108556
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2026-04-25 (Sat, 25 Apr 2026)
Changed paths:
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/check-omp-structure.h
Log Message:
-----------
[flang][OpenMP] Replace llvmOmpClause with llvm::omp::Clause (#194162)
Both types, llvmOmpClause (alias of const llvm::omp::Clause) and
llvm::omp::Clause are in use, let's just stick with one.
Commit: 6de092dca37864cd70b55bfeaba1ec24c4382a60
https://github.com/llvm/llvm-project/commit/6de092dca37864cd70b55bfeaba1ec24c4382a60
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-04-25 (Sat, 25 Apr 2026)
Changed paths:
M clang/lib/AST/ByteCode/Interp.h
M clang/lib/AST/ByteCode/Pointer.h
M clang/test/AST/ByteCode/c.c
Log Message:
-----------
[clang][bytecode] Fix crash involving labels and null sub (#194115)
For null pointers, getDeclDesc() may return null, so we can't call
asExpr() on it.
Commit: 8b1d6244de714df1288c611fa245fdc168f5bd8a
https://github.com/llvm/llvm-project/commit/8b1d6244de714df1288c611fa245fdc168f5bd8a
Author: Lucas Chollet <lucas.chollet at serenityos.org>
Date: 2026-04-25 (Sat, 25 Apr 2026)
Changed paths:
A clang/test/Driver/Inputs/empty_tree/.keep
A clang/test/Driver/Inputs/serenity_tree/usr/lib/crtbeginS.o
A clang/test/Driver/Inputs/serenity_tree/usr/lib/crtendS.o
M clang/test/Driver/serenity.cpp
Log Message:
-----------
[clang] Make serenity.cpp more independent of the host (#193981)
Tests matching crt files previously relied on the host system not using
the same file paths as Serenity. This breaks on AIX, as both systems use
`/usr/lib/crt0.o`.
Redirect most tests to an empty sysroot so they match only on the
filename and remain independent of the host system. Also add a test that
verifies crt files can be found in a normal sysroot.
Commit: 548207463a0cbd84624f56092f65ef281764120e
https://github.com/llvm/llvm-project/commit/548207463a0cbd84624f56092f65ef281764120e
Author: Nico Weber <thakis at chromium.org>
Date: 2026-04-25 (Sat, 25 Apr 2026)
Changed paths:
M llvm/utils/gn/secondary/libcxx/include/BUILD.gn
Log Message:
-----------
[gn build] Port 2f28e1db535b (#194165)
Commit: c34d43d4a601eba58317f7e23791668e0803ce6b
https://github.com/llvm/llvm-project/commit/c34d43d4a601eba58317f7e23791668e0803ce6b
Author: Nico Weber <thakis at chromium.org>
Date: 2026-04-25 (Sat, 25 Apr 2026)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/Target/RISCV/BUILD.gn
Log Message:
-----------
[gn build] Port a693efcc40b1 (#194166)
Commit: 87673e4f585738b56ee1743e1a6b55826f8c200f
https://github.com/llvm/llvm-project/commit/87673e4f585738b56ee1743e1a6b55826f8c200f
Author: Nico Weber <thakis at chromium.org>
Date: 2026-04-25 (Sat, 25 Apr 2026)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/CodeGen/BUILD.gn
Log Message:
-----------
[gn build] Port c59c19bf5921 (#194167)
Commit: 93317d19ad94eccdd96bee886d745fbfab6daf60
https://github.com/llvm/llvm-project/commit/93317d19ad94eccdd96bee886d745fbfab6daf60
Author: Rishi Khare <rishiskhare at gmail.com>
Date: 2026-04-25 (Sat, 25 Apr 2026)
Changed paths:
M llvm/lib/Transforms/IPO/Inliner.cpp
Log Message:
-----------
Fix typo in comment in Inliner.cpp (#194172)
Commit: bb1f8229e618c5a3363546613e07ae3fbeef741a
https://github.com/llvm/llvm-project/commit/bb1f8229e618c5a3363546613e07ae3fbeef741a
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-04-25 (Sat, 25 Apr 2026)
Changed paths:
M .github/workflows/containers/github-action-ci-windows/Dockerfile
M .github/workflows/containers/github-action-ci/Dockerfile
Log Message:
-----------
[Github] Bump CI containers to 22.1.4 (#194175)
Commit: e19f36ff8189f1bd6d3b214d2c30ab8ef0639678
https://github.com/llvm/llvm-project/commit/e19f36ff8189f1bd6d3b214d2c30ab8ef0639678
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-04-25 (Sat, 25 Apr 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/PhaseOrdering/X86/avg.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/InstructionsState-is-invalid-0.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/PR38339.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/div-like-mixed-with-undefs.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/reused-scalar-repeated-in-node.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/vectorizable-selects-uniform-cmps.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/basic-strided-loads.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/gather-insert-point-restore.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/reduced-value-repeated-and-vectorized.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/reductions.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/reordered-buildvector-scalars.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/same-node-reused.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/smin-signed-zextended.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/split-vectorize-parent-for-copyables.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/unordered-loads-operands.ll
M llvm/test/Transforms/SLPVectorizer/SystemZ/reuse-non-power-of-2-reorder.ll
M llvm/test/Transforms/SLPVectorizer/X86/PR39774.ll
M llvm/test/Transforms/SLPVectorizer/X86/PR40310.ll
M llvm/test/Transforms/SLPVectorizer/X86/deleted-inst-reduction-attempt.ll
M llvm/test/Transforms/SLPVectorizer/X86/div-possibly-extended-with-poisons.ll
M llvm/test/Transforms/SLPVectorizer/X86/external-used-across-reductions.ll
M llvm/test/Transforms/SLPVectorizer/X86/extractelements-vector-ops-shuffle.ll
M llvm/test/Transforms/SLPVectorizer/X86/extractelemets-extended-by-poison.ll
M llvm/test/Transforms/SLPVectorizer/X86/full-match-with-poison-scalar.ll
M llvm/test/Transforms/SLPVectorizer/X86/full-matched-bv-with-subvectors.ll
M llvm/test/Transforms/SLPVectorizer/X86/gather-with-cmp-user.ll
M llvm/test/Transforms/SLPVectorizer/X86/gathered-loads-non-full-reg.ll
M llvm/test/Transforms/SLPVectorizer/X86/gathered-shuffle-resized.ll
M llvm/test/Transforms/SLPVectorizer/X86/identity-match-splat-less-defined.ll
M llvm/test/Transforms/SLPVectorizer/X86/insert-subvector.ll
M llvm/test/Transforms/SLPVectorizer/X86/load-merge-inseltpoison.ll
M llvm/test/Transforms/SLPVectorizer/X86/load-merge.ll
M llvm/test/Transforms/SLPVectorizer/X86/load-partial-vector-shuffle.ll
M llvm/test/Transforms/SLPVectorizer/X86/matched-gather-part-of-combined.ll
M llvm/test/Transforms/SLPVectorizer/X86/non-power-of-2-order-detection.ll
M llvm/test/Transforms/SLPVectorizer/X86/non-power-of-2-subvectors-insert.ll
M llvm/test/Transforms/SLPVectorizer/X86/non-schedulable-before-main.ll
M llvm/test/Transforms/SLPVectorizer/X86/non-scheduled-inst-extern-use.ll
M llvm/test/Transforms/SLPVectorizer/X86/original-inst-scheduled-after-copyable.ll
M llvm/test/Transforms/SLPVectorizer/X86/parent-node-schedulable-with-multi-copyables.ll
M llvm/test/Transforms/SLPVectorizer/X86/pr47629-inseltpoison.ll
M llvm/test/Transforms/SLPVectorizer/X86/pr47629.ll
M llvm/test/Transforms/SLPVectorizer/X86/pr47642.ll
M llvm/test/Transforms/SLPVectorizer/X86/pr49081.ll
M llvm/test/Transforms/SLPVectorizer/X86/reduced-val-vectorized-in-transform.ll
M llvm/test/Transforms/SLPVectorizer/X86/reorder-reused-masked-gather.ll
M llvm/test/Transforms/SLPVectorizer/X86/reorder-reused-masked-gather2.ll
M llvm/test/Transforms/SLPVectorizer/X86/reordered-masked-loads.ll
M llvm/test/Transforms/SLPVectorizer/X86/replaced-external-in-reduction.ll
M llvm/test/Transforms/SLPVectorizer/X86/reschedule-only-scheduled.ll
M llvm/test/Transforms/SLPVectorizer/X86/resized-bv-values-non-power-of2-node.ll
M llvm/test/Transforms/SLPVectorizer/X86/reuse-extracts-in-wider-vect.ll
M llvm/test/Transforms/SLPVectorizer/X86/revec-non-power-2-to-power-2-large-vect.ll
M llvm/test/Transforms/SLPVectorizer/X86/revec-reduced-value-vectorized-later.ll
M llvm/test/Transforms/SLPVectorizer/X86/same-values-sub-node-with-poisons.ll
M llvm/test/Transforms/SLPVectorizer/X86/shl-to-add-transformation5.ll
M llvm/test/Transforms/SLPVectorizer/X86/shrink_after_reorder.ll
M llvm/test/Transforms/SLPVectorizer/X86/sin-sqrt.ll
M llvm/test/Transforms/SLPVectorizer/X86/split-vectorize-gathered-def-after-use.ll
M llvm/test/Transforms/SLPVectorizer/gathered-consecutive-loads-different-types.ll
M llvm/test/Transforms/SLPVectorizer/insertelement-across-zero.ll
M llvm/test/Transforms/SLPVectorizer/reduced-gathered-vectorized.ll
M llvm/test/Transforms/SLPVectorizer/reduction-whole-regs-loads.ll
M llvm/test/Transforms/SLPVectorizer/reorder-clustered-node.ll
M llvm/test/Transforms/SLPVectorizer/revec-shufflevector.ll
M llvm/test/Transforms/SLPVectorizer/revec.ll
M llvm/test/Transforms/SLPVectorizer/shuffle-mask-resized.ll
Log Message:
-----------
Revert "[SLP]Initial support for non-power-of-2 vectorization"
This reverts commit 1348766d1d686b8825bdaa2f6638c1783d76a4a7 to fix
a crash, reported in https://github.com/llvm/llvm-project/pull/151530#pullrequestreview-4176091133
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/194177
Commit: d36e5246866e6cf7ab2152770e43164157f78aff
https://github.com/llvm/llvm-project/commit/d36e5246866e6cf7ab2152770e43164157f78aff
Author: Anshul Nigham <nigham at google.com>
Date: 2026-04-25 (Sat, 25 Apr 2026)
Changed paths:
A llvm/include/llvm/CodeGen/KCFI.h
M llvm/include/llvm/InitializePasses.h
M llvm/include/llvm/Passes/MachinePassRegistry.def
M llvm/lib/CodeGen/KCFI.cpp
M llvm/lib/Passes/PassBuilder.cpp
M llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
M llvm/lib/Target/ARM/ARMTargetMachine.cpp
M llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
M llvm/lib/Target/X86/X86CodeGenPassBuilder.cpp
M llvm/lib/Target/X86/X86TargetMachine.cpp
M llvm/test/CodeGen/X86/kcfi-arity.ll
M llvm/test/CodeGen/X86/kcfi.ll
M llvm/test/CodeGen/X86/llc-pipeline-npm.ll
Log Message:
-----------
[NewPM] Adds a port for KCFI (#194163)
Standard porting w/ refactored pass logic to support old and new PMs.
Wired in to X86 pass builder.
Commit: d62067abc261f1c3e282ee434f3a1887ccf98308
https://github.com/llvm/llvm-project/commit/d62067abc261f1c3e282ee434f3a1887ccf98308
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-04-25 (Sat, 25 Apr 2026)
Changed paths:
M .github/workflows/containers/libc/Dockerfile
Log Message:
-----------
[Github] Drop LLVM 21 installation from libc Dockerfile (#194178)
The compiler version was bumped in
8abce0a63c10124aa26a070ead80a68f705c95f9, so we no longer need to
include this. We should probably just hash pin the version in future
workflows for future toolchain upgrades.
Commit: 28de393b6412f4149a25029f4201dc7ebdb3c9f4
https://github.com/llvm/llvm-project/commit/28de393b6412f4149a25029f4201dc7ebdb3c9f4
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-04-25 (Sat, 25 Apr 2026)
Changed paths:
M compiler-rt/test/profile/instrprof-tmpdir.c
Log Message:
-----------
[Profile] Reenable instrprof-tmpdir.c (#194181)
env -u is supported by the internal shell which is now the default
everywhere.
Commit: 8eef5077b646a2d24fe65fa8d0092a87c4cd0e2d
https://github.com/llvm/llvm-project/commit/8eef5077b646a2d24fe65fa8d0092a87c4cd0e2d
Author: Ramkumar Ramachandra <artagnon at tenstorrent.com>
Date: 2026-04-25 (Sat, 25 Apr 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanUtils.cpp
M llvm/lib/Transforms/Vectorize/VPlanUtils.h
Log Message:
-----------
[VPlan] Fix assert in finding WideCanIV (NFC) (#193269)
addActiveLaneMask asserts that the return value of a find_if is
contextully convertible to true, when finding a WideCanonicalIV recipe:
what it should really be checking that the iterator is not the end
iterator. Fix this assert by introducing and using a variant of
vputils::findUserOf.
Commit: b5ac484470b9ceda96addcbc946f9ded4c5ef972
https://github.com/llvm/llvm-project/commit/b5ac484470b9ceda96addcbc946f9ded4c5ef972
Author: Davide Grohmann <davide.grohmann at arm.com>
Date: 2026-04-25 (Sat, 25 Apr 2026)
Changed paths:
M llvm/include/llvm/ADT/DenseMap.h
Log Message:
-----------
[DenseMap] Resolves asan + msvc build syntax errors (#193695)
The problem was introduced by #183457 as an asan workaround for clang
builds to silence false positices, so the fix here just enables the
workaround for clang builds.
Fixes #189323
Signed-off-by: Davide Grohmann <davide.grohmann at arm.com>
Commit: bbd4d67f0ba75ce0cf20bc9a91ea632ebbb59636
https://github.com/llvm/llvm-project/commit/bbd4d67f0ba75ce0cf20bc9a91ea632ebbb59636
Author: hulxv <hulxxv at gmail.com>
Date: 2026-04-26 (Sun, 26 Apr 2026)
Changed paths:
M libc/shared/math.h
A libc/shared/math/fdiv.h
A libc/shared/math/fdivf128.h
A libc/shared/math/fdivl.h
M libc/src/__support/math/CMakeLists.txt
A libc/src/__support/math/fdiv.h
A libc/src/__support/math/fdivf128.h
A libc/src/__support/math/fdivl.h
M libc/src/math/generic/CMakeLists.txt
M libc/src/math/generic/fdiv.cpp
M libc/src/math/generic/fdivf128.cpp
M libc/src/math/generic/fdivl.cpp
M libc/test/shared/CMakeLists.txt
M libc/test/shared/shared_math_constexpr_test.cpp
M libc/test/shared/shared_math_test.cpp
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[libc][math] Refactor fdiv family to header-only (#182192)
Refactors the fdiv math family to be header-only.
Closes https://github.com/llvm/llvm-project/issues/182191
Target Functions:
- fdiv
- fdivf128
- fdivl
---------
Co-authored-by: Muhammad Bassiouni <60100307+bassiounix at users.noreply.github.com>
Commit: 23cc957f50710b431854e5281a434fcdc419c284
https://github.com/llvm/llvm-project/commit/23cc957f50710b431854e5281a434fcdc419c284
Author: hulxv <hulxxv at gmail.com>
Date: 2026-04-25 (Sat, 25 Apr 2026)
Changed paths:
M libc/shared/math.h
A libc/shared/math/fmaximum_mag_num.h
A libc/shared/math/fmaximum_mag_numbf16.h
A libc/shared/math/fmaximum_mag_numf.h
M libc/src/__support/FPUtil/BasicOperations.h
M libc/src/__support/math/CMakeLists.txt
A libc/src/__support/math/fmaximum_mag_num.h
A libc/src/__support/math/fmaximum_mag_numbf16.h
A libc/src/__support/math/fmaximum_mag_numf.h
M libc/src/math/generic/CMakeLists.txt
M libc/src/math/generic/fmaximum_mag_num.cpp
M libc/src/math/generic/fmaximum_mag_numbf16.cpp
M libc/src/math/generic/fmaximum_mag_numf.cpp
M libc/test/shared/CMakeLists.txt
M libc/test/shared/shared_math_constexpr_test.cpp
M libc/test/shared/shared_math_test.cpp
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[libc][math] Refactor fmaximum_mag_num family to header-only (#182169)
Refactors the fmaximum_mag_num math family to be header-only.
Closes https://github.com/llvm/llvm-project/issues/182168
Target Functions:
- fmaximum_mag_num
- fmaximum_mag_numbf16
- fmaximum_mag_numf
---------
Co-authored-by: Muhammad Bassiouni <60100307+bassiounix at users.noreply.github.com>
Commit: fc99b677598162682f845d31fa3ece5ec9d38b2f
https://github.com/llvm/llvm-project/commit/fc99b677598162682f845d31fa3ece5ec9d38b2f
Author: Muhammad Bassiouni <60100307+bassiounix at users.noreply.github.com>
Date: 2026-04-26 (Sun, 26 Apr 2026)
Changed paths:
M libc/shared/math.h
R libc/shared/math/fmaximum_mag_num.h
R libc/shared/math/fmaximum_mag_numbf16.h
R libc/shared/math/fmaximum_mag_numf.h
M libc/src/__support/FPUtil/BasicOperations.h
M libc/src/__support/math/CMakeLists.txt
R libc/src/__support/math/fmaximum_mag_num.h
R libc/src/__support/math/fmaximum_mag_numbf16.h
R libc/src/__support/math/fmaximum_mag_numf.h
M libc/src/math/generic/CMakeLists.txt
M libc/src/math/generic/fmaximum_mag_num.cpp
M libc/src/math/generic/fmaximum_mag_numbf16.cpp
M libc/src/math/generic/fmaximum_mag_numf.cpp
M libc/test/shared/CMakeLists.txt
M libc/test/shared/shared_math_constexpr_test.cpp
M libc/test/shared/shared_math_test.cpp
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
Revert "[libc][math] Refactor fmaximum_mag_num family to header-only" (#194183)
Reverts llvm/llvm-project#182169
Commit: cb9b66cb610797051fa5310c70ec6cf1ef55a5d6
https://github.com/llvm/llvm-project/commit/cb9b66cb610797051fa5310c70ec6cf1ef55a5d6
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-04-25 (Sat, 25 Apr 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/PhaseOrdering/X86/avg.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/InstructionsState-is-invalid-0.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/PR38339.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/div-like-mixed-with-undefs.ll
A llvm/test/Transforms/SLPVectorizer/AArch64/long-non-power-of-2.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/reused-scalar-repeated-in-node.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/vectorizable-selects-uniform-cmps.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/basic-strided-loads.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/gather-insert-point-restore.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/reduced-value-repeated-and-vectorized.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/reductions.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/reordered-buildvector-scalars.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/same-node-reused.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/smin-signed-zextended.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/split-vectorize-parent-for-copyables.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/unordered-loads-operands.ll
M llvm/test/Transforms/SLPVectorizer/SystemZ/reuse-non-power-of-2-reorder.ll
M llvm/test/Transforms/SLPVectorizer/X86/PR39774.ll
M llvm/test/Transforms/SLPVectorizer/X86/PR40310.ll
M llvm/test/Transforms/SLPVectorizer/X86/deleted-inst-reduction-attempt.ll
M llvm/test/Transforms/SLPVectorizer/X86/div-possibly-extended-with-poisons.ll
M llvm/test/Transforms/SLPVectorizer/X86/external-used-across-reductions.ll
M llvm/test/Transforms/SLPVectorizer/X86/extractelements-vector-ops-shuffle.ll
M llvm/test/Transforms/SLPVectorizer/X86/extractelemets-extended-by-poison.ll
M llvm/test/Transforms/SLPVectorizer/X86/full-match-with-poison-scalar.ll
M llvm/test/Transforms/SLPVectorizer/X86/full-matched-bv-with-subvectors.ll
M llvm/test/Transforms/SLPVectorizer/X86/gather-with-cmp-user.ll
M llvm/test/Transforms/SLPVectorizer/X86/gathered-loads-non-full-reg.ll
M llvm/test/Transforms/SLPVectorizer/X86/gathered-shuffle-resized.ll
M llvm/test/Transforms/SLPVectorizer/X86/identity-match-splat-less-defined.ll
M llvm/test/Transforms/SLPVectorizer/X86/insert-subvector.ll
M llvm/test/Transforms/SLPVectorizer/X86/load-merge-inseltpoison.ll
M llvm/test/Transforms/SLPVectorizer/X86/load-merge.ll
M llvm/test/Transforms/SLPVectorizer/X86/load-partial-vector-shuffle.ll
M llvm/test/Transforms/SLPVectorizer/X86/matched-gather-part-of-combined.ll
M llvm/test/Transforms/SLPVectorizer/X86/non-power-of-2-order-detection.ll
M llvm/test/Transforms/SLPVectorizer/X86/non-power-of-2-subvectors-insert.ll
M llvm/test/Transforms/SLPVectorizer/X86/non-schedulable-before-main.ll
M llvm/test/Transforms/SLPVectorizer/X86/non-scheduled-inst-extern-use.ll
M llvm/test/Transforms/SLPVectorizer/X86/original-inst-scheduled-after-copyable.ll
M llvm/test/Transforms/SLPVectorizer/X86/parent-node-schedulable-with-multi-copyables.ll
M llvm/test/Transforms/SLPVectorizer/X86/pr47629-inseltpoison.ll
M llvm/test/Transforms/SLPVectorizer/X86/pr47629.ll
M llvm/test/Transforms/SLPVectorizer/X86/pr47642.ll
M llvm/test/Transforms/SLPVectorizer/X86/pr49081.ll
M llvm/test/Transforms/SLPVectorizer/X86/reduced-val-vectorized-in-transform.ll
M llvm/test/Transforms/SLPVectorizer/X86/reorder-reused-masked-gather.ll
M llvm/test/Transforms/SLPVectorizer/X86/reorder-reused-masked-gather2.ll
M llvm/test/Transforms/SLPVectorizer/X86/reordered-masked-loads.ll
M llvm/test/Transforms/SLPVectorizer/X86/replaced-external-in-reduction.ll
M llvm/test/Transforms/SLPVectorizer/X86/reschedule-only-scheduled.ll
M llvm/test/Transforms/SLPVectorizer/X86/resized-bv-values-non-power-of2-node.ll
M llvm/test/Transforms/SLPVectorizer/X86/reuse-extracts-in-wider-vect.ll
M llvm/test/Transforms/SLPVectorizer/X86/revec-non-power-2-to-power-2-large-vect.ll
M llvm/test/Transforms/SLPVectorizer/X86/revec-reduced-value-vectorized-later.ll
M llvm/test/Transforms/SLPVectorizer/X86/same-values-sub-node-with-poisons.ll
M llvm/test/Transforms/SLPVectorizer/X86/shl-to-add-transformation5.ll
M llvm/test/Transforms/SLPVectorizer/X86/shrink_after_reorder.ll
M llvm/test/Transforms/SLPVectorizer/X86/sin-sqrt.ll
M llvm/test/Transforms/SLPVectorizer/X86/split-vectorize-gathered-def-after-use.ll
M llvm/test/Transforms/SLPVectorizer/gathered-consecutive-loads-different-types.ll
M llvm/test/Transforms/SLPVectorizer/insertelement-across-zero.ll
M llvm/test/Transforms/SLPVectorizer/reduced-gathered-vectorized.ll
M llvm/test/Transforms/SLPVectorizer/reduction-whole-regs-loads.ll
M llvm/test/Transforms/SLPVectorizer/reorder-clustered-node.ll
M llvm/test/Transforms/SLPVectorizer/revec-shufflevector.ll
M llvm/test/Transforms/SLPVectorizer/revec.ll
M llvm/test/Transforms/SLPVectorizer/shuffle-mask-resized.ll
Log Message:
-----------
[SLP]Initial support for non-power-of-2 vectorization
Enables non-power-of-2 vectorization within the SLP tree. The root nodes
are still required to be power-of-2, will be addressed in a follow-up
patches.
Recommit after revert in e19f36ff8189f1bd6d3b214d2c30ab8ef0639678
Original Pull Request: https://github.com/llvm/llvm-project/pull/151530
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/194189
Commit: cd2cf7393f7f58828350db35f790a0902dc6fbe7
https://github.com/llvm/llvm-project/commit/cd2cf7393f7f58828350db35f790a0902dc6fbe7
Author: Amir Ayupov <aaupov at fb.com>
Date: 2026-04-25 (Sat, 25 Apr 2026)
Changed paths:
M bolt/include/bolt/Profile/DataAggregator.h
M bolt/unittests/Profile/DataAggregator.cpp
Log Message:
-----------
[BOLT] Add unit tests for pre-aggregated profile parsing (#192390)
Add PreAggregatedTestHelper fixture with friend access to DataAggregator
internals. Add tests for parseHexField and all pre-aggregated entry
types (B, F, f, r, T, R).
Commit: 46154fef0e481640950601c4a599b6d32b2a8e87
https://github.com/llvm/llvm-project/commit/46154fef0e481640950601c4a599b6d32b2a8e87
Author: Amir Ayupov <aaupov at fb.com>
Date: 2026-04-25 (Sat, 25 Apr 2026)
Changed paths:
M bolt/docs/profiles.md
M bolt/lib/Profile/DataAggregator.cpp
M bolt/lib/Profile/DataReader.cpp
M bolt/unittests/Profile/DataAggregator.cpp
Log Message:
-----------
[BOLT] Support negative hex in pre-aggregated profile (#192391)
Handle signed values in parseHexField by falling back to int64_t parsing
when uint64_t fails. This allows pre-aggregated profile tools to use -1
for BR_ONLY, -2 for FT_EXTERNAL_ORIGIN, -3 for FT_EXTERNAL_RETURN.
Guard the external address reset loop in parseAggregatedLBREntry to
preserve sentinel values (offsets >= FT_EXTERNAL_RETURN).
Add tests for -1/-2/-3 in parseHexField and T entries with -1,
ffffffffffffffff, and buildid:-1 as BR_ONLY.
Commit: 24f46293b02c1599ac53170820772b59c635fed3
https://github.com/llvm/llvm-project/commit/24f46293b02c1599ac53170820772b59c635fed3
Author: Dave Lee <davelee.com at gmail.com>
Date: 2026-04-25 (Sat, 25 Apr 2026)
Changed paths:
M lldb/test/API/commands/thread/backtrace/TestThreadBacktraceRepeat.py
Log Message:
-----------
[lldb][test] Use assertIn in TestThreadBacktraceRepeat.py (NFC) (#194193)
I broke this test locally, and fixed the assets to produce more useful
output upon failure.
Commit: 71816ef062df569c4a0e99204ab79a283bf1dda7
https://github.com/llvm/llvm-project/commit/71816ef062df569c4a0e99204ab79a283bf1dda7
Author: Kiriti Ponduri <123718855+udaykiriti at users.noreply.github.com>
Date: 2026-04-26 (Sun, 26 Apr 2026)
Changed paths:
M libc/src/__support/FPUtil/BasicOperations.h
M libc/src/__support/FPUtil/generic/add_sub.h
M libc/src/__support/math/fdim.h
M libc/src/__support/math/fdimbf16.h
M libc/src/__support/math/fdimf.h
M libc/src/__support/math/fdimf128.h
M libc/src/__support/math/fdimf16.h
M libc/src/__support/math/fdiml.h
M libc/test/shared/CMakeLists.txt
M libc/test/shared/shared_math_constexpr_test.cpp
Log Message:
-----------
[libc][math] Qualify fdim funtions to constexpr (#194137)
Signed-off-by: udaykiriti <udaykiriti624 at gmail.com>
Co-authored-by: Muhammad Bassiouni <60100307+bassiounix at users.noreply.github.com>
Commit: 75b450f3d45b84306747025378e1797e9514dc03
https://github.com/llvm/llvm-project/commit/75b450f3d45b84306747025378e1797e9514dc03
Author: Amir Ayupov <aaupov at fb.com>
Date: 2026-04-25 (Sat, 25 Apr 2026)
Changed paths:
A bolt/test/X86/Inputs/pre-aggregated-bad-hex.txt
A bolt/test/X86/Inputs/pre-aggregated-bad-type.txt
A bolt/test/X86/pre-aggregated-records.s
Log Message:
-----------
[BOLT] Add tests for pre-aggregated parsing (#193843)
Extends e2e coverage of pre-aggregated profile parsing to match the
unit-test coverage added in #192390:
- R (Return) records, including the branch=0 fallback path that
rewrites to the FT_EXTERNAL_RETURN sentinel.
- r (FT_EXTERNAL_RETURN) records.
- B and T records using the negative -1 hex form (#192391),
which is parsed as the BR_ONLY/FT_ONLY sentinel.
- Error paths: invalid record type letter and malformed hex address
(perf2bolt is expected to exit non-zero with a parser error).
The two error-path inputs are tiny raw files under Inputs/ since they
contain intentionally malformed records that link_fdata doesn't process.
Test Plan:
added bolt/test/X86/pre-aggregated-records.s
Commit: de7c63ed04363c0ab416b982a6c900720575b439
https://github.com/llvm/llvm-project/commit/de7c63ed04363c0ab416b982a6c900720575b439
Author: Amir Ayupov <aaupov at fb.com>
Date: 2026-04-25 (Sat, 25 Apr 2026)
Changed paths:
M llvm/tools/llvm-profgen/Options.h
M llvm/tools/llvm-profgen/PerfReader.cpp
M llvm/tools/llvm-profgen/ProfileGenerator.cpp
Log Message:
-----------
[llvm-profgen] Add --time-profgen (#191930)
Add `NamedRegionTimer`s to main profgen phases:
- Parse and aggregate trace (`parseAndAggregateTrace`)
- Unwind samples (`unwindSamples`)
- Generate profile (`ProfileGenerator::generateProfile`)
- Generate CS profile (`CSProfileGenerator::generateProfile`)
Test Plan:
```
$ llvm-profgen --time-profgen ...
===-------------------------------------------------------------------------===
llvm-profgen
===-------------------------------------------------------------------------===
Total Execution Time: 2826.6549 seconds (2873.3410 wall clock)
---User Time--- --System Time-- --User+System-- ---Wall Time--- --- Name ---
1059.4929 ( 38.1%) 8.5146 ( 17.3%) 1068.0075 ( 37.8%) 1090.6604 ( 38.0%) Generate CS profile
892.6504 ( 32.1%) 39.8720 ( 80.9%) 932.5224 ( 33.0%) 950.7938 ( 33.1%) Parse and aggregate trace
825.2141 ( 29.7%) 0.9110 ( 1.8%) 826.1250 ( 29.2%) 831.8868 ( 29.0%) Unwind samples
2777.3573 (100.0%) 49.2975 (100.0%) 2826.6549 (100.0%) 2873.3410 (100.0%) Total
```
Commit: 4c7dc9c1783fa10e5e99e28ed25103a046c02c7d
https://github.com/llvm/llvm-project/commit/4c7dc9c1783fa10e5e99e28ed25103a046c02c7d
Author: hulxv <hulxxv at gmail.com>
Date: 2026-04-26 (Sun, 26 Apr 2026)
Changed paths:
M libc/shared/math.h
A libc/shared/math/fmaximum_mag_num.h
A libc/shared/math/fmaximum_mag_numbf16.h
A libc/shared/math/fmaximum_mag_numf.h
M libc/src/__support/FPUtil/BasicOperations.h
M libc/src/__support/math/CMakeLists.txt
A libc/src/__support/math/fmaximum_mag_num.h
A libc/src/__support/math/fmaximum_mag_numbf16.h
A libc/src/__support/math/fmaximum_mag_numf.h
M libc/src/math/generic/CMakeLists.txt
M libc/src/math/generic/fmaximum_mag_num.cpp
M libc/src/math/generic/fmaximum_mag_numbf16.cpp
M libc/src/math/generic/fmaximum_mag_numf.cpp
M libc/test/shared/CMakeLists.txt
M libc/test/shared/shared_math_constexpr_test.cpp
M libc/test/shared/shared_math_test.cpp
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
Reland "[libc][math] Refactor fmaximum_mag_num family to header-only" (#194194)
Reland #182169
---------
Co-authored-by: Muhammad Bassiouni <60100307+bassiounix at users.noreply.github.com>
Commit: b5471cc17a03e2f42a01ed4f124fdca481f6cc7d
https://github.com/llvm/llvm-project/commit/b5471cc17a03e2f42a01ed4f124fdca481f6cc7d
Author: Fangrui Song <i at maskray.me>
Date: 2026-04-25 (Sat, 25 Apr 2026)
Changed paths:
M llvm/lib/MC/MCObjectStreamer.cpp
M llvm/test/MC/AsmParser/directive_fill.s
Log Message:
-----------
[MC] Always lower .fill to MCFillFragment (#194164)
Constant-count, constant-pattern .fill expands inline into the current
fragment via emitIntValue per byte, wasting both memory and time (a
redundant copy at MCAssembler.cpp). #50974 reports a 4s compile dropping
to 0.6s when the loop is removed.
Drop the inline path so .fill always becomes MCFillFragment.
This cannot be done before commit 507efbcce03d (2023) allowed
label differences to be separated by a MCFillFragment.
In directive_fill.s, the parse time warning is now diagnosed by
MCAssembler.
Commit: 486e97a19f8fd34ce29e12a9de6e7033e93998d8
https://github.com/llvm/llvm-project/commit/486e97a19f8fd34ce29e12a9de6e7033e93998d8
Author: 🍌Shawn <m18824909883 at 163.com>
Date: 2026-04-26 (Sun, 26 Apr 2026)
Changed paths:
M clang/include/clang/Sema/Initialization.h
Log Message:
-----------
[clang][NFC] Fix typo in HLSL initialization comment (#194124)
Commit: b614c152def35fe4411208570327b81ce43e8ba5
https://github.com/llvm/llvm-project/commit/b614c152def35fe4411208570327b81ce43e8ba5
Author: Fangrui Song <i at maskray.me>
Date: 2026-04-26 (Sun, 26 Apr 2026)
Changed paths:
M clang/lib/Parse/ParseStmtAsm.cpp
M clang/tools/driver/cc1as_main.cpp
M llvm/include/llvm/MC/MCParser/MCTargetAsmParser.h
M llvm/include/llvm/MC/TargetRegistry.h
M llvm/lib/CodeGen/AsmPrinter/AsmPrinterInlineAsm.cpp
M llvm/lib/MC/MCParser/MCTargetAsmParser.cpp
M llvm/lib/Object/ModuleSymbolTable.cpp
M llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
M llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
M llvm/lib/Target/AVR/AsmParser/AVRAsmParser.cpp
M llvm/lib/Target/BPF/AsmParser/BPFAsmParser.cpp
M llvm/lib/Target/CSKY/AsmParser/CSKYAsmParser.cpp
M llvm/lib/Target/Hexagon/AsmParser/HexagonAsmParser.cpp
M llvm/lib/Target/Lanai/AsmParser/LanaiAsmParser.cpp
M llvm/lib/Target/LoongArch/AsmParser/LoongArchAsmParser.cpp
M llvm/lib/Target/M68k/AsmParser/M68kAsmParser.cpp
M llvm/lib/Target/MSP430/AsmParser/MSP430AsmParser.cpp
M llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
M llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp
M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
M llvm/lib/Target/Sparc/AsmParser/SparcAsmParser.cpp
M llvm/lib/Target/SystemZ/AsmParser/SystemZAsmParser.cpp
M llvm/lib/Target/VE/AsmParser/VEAsmParser.cpp
M llvm/lib/Target/WebAssembly/AsmParser/WebAssemblyAsmParser.cpp
M llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
M llvm/lib/Target/Xtensa/AsmParser/XtensaAsmParser.cpp
M llvm/tools/llvm-exegesis/lib/SnippetFile.cpp
M llvm/tools/llvm-mc-assemble-fuzzer/llvm-mc-assemble-fuzzer.cpp
M llvm/tools/llvm-mc/llvm-mc.cpp
M llvm/tools/llvm-mca/CodeRegionGenerator.cpp
M llvm/tools/llvm-ml/llvm-ml.cpp
M llvm/unittests/MC/SystemZ/SystemZAsmLexerTest.cpp
M mlir/lib/Target/LLVM/ROCDL/Target.cpp
Log Message:
-----------
[MC] Drop MCTargetOptions parameter from MCTargetAsmParser (#194120)
Since #180464, MCAsmInfo holds the canonical MCTargetOptions.
The MCTargetAsmParser::MCOptions member is a redundant by-value copy,
which may have inconsistent values (llvm-exegesis passes a temporary
MCTargetOptions(), but this probably doesn't matter in practice; other
in-tree uses are correct).
Remove the field in favor of getParser().getContext().getTargetOptions,
and remove the MCTargetOptions parameter from the base ctor, all
subclass ctors, Target::createMCAsmParser, MCAsmParserCtorTy, and
RegisterMCAsmParser.
Commit: 0ccb181514cda5245ed031b210a2d97282bc1ff0
https://github.com/llvm/llvm-project/commit/0ccb181514cda5245ed031b210a2d97282bc1ff0
Author: Matt Turner <mattst88 at gmail.com>
Date: 2026-04-25 (Sat, 25 Apr 2026)
Changed paths:
M compiler-rt/lib/sanitizer_common/sanitizer_redefine_builtins.h
Log Message:
-----------
[compiler-rt] Use asm .set only for Hexagon (#194160)
Two incompatible assembler syntaxes exist for symbol assignment:
```
sym = val -- accepted by most GNU assembler targets; rejected by
Hexagon, which interprets it as a mnemonic
.set sym, val -- accepted by Hexagon; rejected by Alpha, which
reserves .set for assembler mode flags
```
Switch all to `sym = val`, and opt out Hexagon to `.set sym`.
Fixes: dbb03f8f606e ("[compiler-rt] Replace assignment w/.set directive
(#107667)")
---------
Co-authored-by: Vitaly Buka <vitalybuka at google.com>
Commit: e7164d42243b8cac55c6c1f91a507608c414c361
https://github.com/llvm/llvm-project/commit/e7164d42243b8cac55c6c1f91a507608c414c361
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-04-25 (Sat, 25 Apr 2026)
Changed paths:
M libclc/CMakeLists.txt
Log Message:
-----------
[libclc] Only check the triple architecture for libclc (#194149)
Summary:
Previously, `nvptx64--` would reject `nvptx64-unknown-unknown`. Two
options, either normalize all the triples in CMake, or just check the
architecture. I went with the former because it makes it easier for
people to pass different values.
Commit: a75e6a59ede46e838e9a02bafe59aa9eb4c1ac60
https://github.com/llvm/llvm-project/commit/a75e6a59ede46e838e9a02bafe59aa9eb4c1ac60
Author: Nishant Patel <nishant.b.patel at intel.com>
Date: 2026-04-25 (Sat, 25 Apr 2026)
Changed paths:
M mlir/include/mlir/Dialect/XeGPU/IR/XeGPUOps.td
M mlir/include/mlir/Dialect/XeGPU/IR/XeGPUTypes.td
M mlir/lib/Conversion/XeGPUToXeVM/XeGPUToXeVM.cpp
M mlir/lib/Dialect/XeGPU/IR/XeGPUOps.cpp
M mlir/lib/Dialect/XeGPU/TransformOps/XeGPUTransformOps.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUBlocking.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUPropagateLayout.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUSubgroupDistribute.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUUnroll.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUWgToSgDistribute.cpp
M mlir/test/Dialect/XeGPU/invalid.mlir
M mlir/test/Dialect/XeGPU/layout.mlir
M mlir/test/Dialect/XeGPU/ops.mlir
M mlir/test/Dialect/XeGPU/propagate-layout-inst-data.mlir
M mlir/test/Dialect/XeGPU/propagate-layout-subgroup.mlir
M mlir/test/Dialect/XeGPU/propagate-layout.mlir
M mlir/test/Dialect/XeGPU/xegpu-blocking.mlir
M mlir/test/Dialect/XeGPU/xegpu-recover-layout.mlir
R mlir/test/Dialect/XeGPU/xegpu-unroll-patterns-no-desc-offsets.mlir
M mlir/test/Dialect/XeGPU/xegpu-unroll-patterns.mlir
M mlir/test/Dialect/XeGPU/xegpu-vector-linearize.mlir
M mlir/test/Dialect/XeGPU/xegpu-wg-to-sg-elemwise.mlir
M mlir/test/Dialect/XeGPU/xegpu-wg-to-sg-rr.mlir
R mlir/test/Dialect/XeGPU/xegpu-wg-to-sg-unify-ops-rr.mlir
R mlir/test/Dialect/XeGPU/xegpu-wg-to-sg-unify-ops.mlir
M mlir/test/Dialect/XeGPU/xegpu-wg-to-sg.mlir
M mlir/test/lib/Dialect/XeGPU/TestXeGPUTransforms.cpp
Log Message:
-----------
[MLIR][XeGPU] Remove offsets from create_nd_tdesc & remove update_nd_offset, move offsets to load/store/prefetch ops (#193330)
This PR removes the optional offsets/const_offsets operands on
xegpu.create_nd_tdesc and instead mandates offsets directly on the
consuming load, store, and prefetch ops. It also deprecates the
update_nd_offset op.
Commit: c2a9725b570407d1b057134e90d11c53bbc48b63
https://github.com/llvm/llvm-project/commit/c2a9725b570407d1b057134e90d11c53bbc48b63
Author: Longsheng Mou <longshengmou at gmail.com>
Date: 2026-04-26 (Sun, 26 Apr 2026)
Changed paths:
M mlir/include/mlir/Dialect/Math/IR/MathOps.td
M mlir/lib/Dialect/Math/IR/MathOps.cpp
M mlir/test/Dialect/Math/canonicalize.mlir
Log Message:
-----------
[mlir][math] Add constant folding for sincos/cbrt (#194130)
Adds constant folder for `math.sincos` and `math.cbrt`.
Commit: 682cf7231700c90d12460250b1cad7656cd76dc5
https://github.com/llvm/llvm-project/commit/682cf7231700c90d12460250b1cad7656cd76dc5
Author: Longsheng Mou <longshengmou at gmail.com>
Date: 2026-04-26 (Sun, 26 Apr 2026)
Changed paths:
M mlir/lib/Dialect/Arith/IR/ArithOps.cpp
M mlir/test/Dialect/Arith/canonicalize.mlir
Log Message:
-----------
[mlir][arith] Fold subi(a, subi(a, b)) to b (#194134)
Add a folder for `arith.subi` that simplifies `subi(a, subi(a, b))` to
`b` using the algebraic identity `a - (a - b) = b`.
Commit: c01226500856d65145c37f9c44b82e6f7c60a806
https://github.com/llvm/llvm-project/commit/c01226500856d65145c37f9c44b82e6f7c60a806
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-04-26 (Sun, 26 Apr 2026)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/test/AST/ByteCode/functions.cpp
Log Message:
-----------
[clang][bytecode] Reject functions with dependent return type (#194114)
This unfortunately crashes the current interpreter as well.
Commit: bd75c10199a159a20720f8ee5c00afebb033f46e
https://github.com/llvm/llvm-project/commit/bd75c10199a159a20720f8ee5c00afebb033f46e
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-04-25 (Sat, 25 Apr 2026)
Changed paths:
M libcxx/utils/ci/docker/linux-builder-base.dockerfile
Log Message:
-----------
[libcxx] Include python3-yaml and rsync in container (#194182)
rsync is needed for installing the kernel headers for the libc build.
The yaml python package is needed for libc's hdrgen. This means we no
longer have to install these utilities at runtime.
They should be small enough relative to the existing container image
size to not really have an impact in that regard.
Commit: 33f2036f35093d97989285762cb2570ebcde4eb4
https://github.com/llvm/llvm-project/commit/33f2036f35093d97989285762cb2570ebcde4eb4
Author: Fangrui Song <i at maskray.me>
Date: 2026-04-26 (Sun, 26 Apr 2026)
Changed paths:
M bolt/include/bolt/Core/BinaryContext.h
M bolt/lib/Core/BinaryContext.cpp
M llvm/include/llvm/MC/MCAsmInfo.h
M llvm/include/llvm/MC/MCAsmInfoCOFF.h
M llvm/include/llvm/MC/MCAsmInfoDarwin.h
M llvm/include/llvm/MC/MCAsmInfoELF.h
M llvm/include/llvm/MC/MCAsmInfoGOFF.h
M llvm/include/llvm/MC/MCAsmInfoWasm.h
M llvm/include/llvm/MC/MCAsmInfoXCOFF.h
M llvm/include/llvm/MC/TargetRegistry.h
M llvm/lib/CodeGen/AsmPrinter/DIE.cpp
M llvm/lib/MC/MCAsmInfo.cpp
M llvm/lib/MC/MCAsmInfoCOFF.cpp
M llvm/lib/MC/MCAsmInfoDarwin.cpp
M llvm/lib/MC/MCAsmInfoELF.cpp
M llvm/lib/MC/MCAsmInfoGOFF.cpp
M llvm/lib/MC/MCAsmInfoWasm.cpp
M llvm/lib/MC/MCAsmInfoXCOFF.cpp
M llvm/lib/MC/MCContext.cpp
M llvm/lib/MC/MCParser/MCAsmParser.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCAsmInfo.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCAsmInfo.h
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCTargetDesc.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCAsmInfo.cpp
M llvm/lib/Target/ARC/MCTargetDesc/ARCMCAsmInfo.cpp
M llvm/lib/Target/ARC/MCTargetDesc/ARCMCAsmInfo.h
M llvm/lib/Target/ARC/MCTargetDesc/ARCMCTargetDesc.cpp
M llvm/lib/Target/ARM/MCTargetDesc/ARMMCAsmInfo.cpp
M llvm/lib/Target/ARM/MCTargetDesc/ARMMCAsmInfo.h
M llvm/lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.cpp
M llvm/lib/Target/AVR/MCTargetDesc/AVRMCAsmInfo.cpp
M llvm/lib/Target/BPF/MCTargetDesc/BPFMCAsmInfo.h
M llvm/lib/Target/CSKY/MCTargetDesc/CSKYMCAsmInfo.cpp
M llvm/lib/Target/CSKY/MCTargetDesc/CSKYMCAsmInfo.h
M llvm/lib/Target/CSKY/MCTargetDesc/CSKYMCTargetDesc.cpp
M llvm/lib/Target/DirectX/MCTargetDesc/DirectXMCTargetDesc.cpp
M llvm/lib/Target/Hexagon/AsmParser/HexagonAsmParser.cpp
M llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCAsmInfo.cpp
M llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCAsmInfo.h
M llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCTargetDesc.cpp
M llvm/lib/Target/Lanai/MCTargetDesc/LanaiMCAsmInfo.cpp
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchMCAsmInfo.cpp
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchMCAsmInfo.h
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchMCTargetDesc.cpp
M llvm/lib/Target/M68k/MCTargetDesc/M68kMCAsmInfo.cpp
M llvm/lib/Target/M68k/MCTargetDesc/M68kMCAsmInfo.h
M llvm/lib/Target/M68k/MCTargetDesc/M68kMCTargetDesc.cpp
M llvm/lib/Target/MSP430/MCTargetDesc/MSP430MCAsmInfo.cpp
M llvm/lib/Target/MSP430/MCTargetDesc/MSP430MCAsmInfo.h
M llvm/lib/Target/MSP430/MCTargetDesc/MSP430MCTargetDesc.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsMCAsmInfo.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsMCAsmInfo.h
M llvm/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.cpp
M llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXMCAsmInfo.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCAsmInfo.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCAsmInfo.h
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCAsmInfo.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCAsmInfo.h
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCTargetDesc.cpp
M llvm/lib/Target/SPIRV/MCTargetDesc/SPIRVMCAsmInfo.cpp
M llvm/lib/Target/Sparc/MCTargetDesc/SparcMCAsmInfo.cpp
M llvm/lib/Target/Sparc/MCTargetDesc/SparcMCAsmInfo.h
M llvm/lib/Target/Sparc/MCTargetDesc/SparcMCTargetDesc.cpp
M llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCAsmInfo.cpp
M llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCAsmInfo.h
M llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCTargetDesc.cpp
M llvm/lib/Target/VE/MCTargetDesc/VEMCAsmInfo.cpp
M llvm/lib/Target/VE/MCTargetDesc/VEMCAsmInfo.h
M llvm/lib/Target/VE/MCTargetDesc/VEMCTargetDesc.cpp
M llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCAsmInfo.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86MCAsmInfo.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86MCAsmInfo.h
M llvm/lib/Target/X86/MCTargetDesc/X86MCTargetDesc.cpp
M llvm/lib/Target/XCore/MCTargetDesc/XCoreMCAsmInfo.cpp
M llvm/lib/Target/XCore/MCTargetDesc/XCoreMCAsmInfo.h
M llvm/lib/Target/XCore/MCTargetDesc/XCoreMCTargetDesc.cpp
M llvm/lib/Target/Xtensa/MCTargetDesc/XtensaMCAsmInfo.cpp
M llvm/lib/Target/Xtensa/MCTargetDesc/XtensaMCAsmInfo.h
M llvm/lib/Target/Xtensa/MCTargetDesc/XtensaMCTargetDesc.cpp
M llvm/unittests/CodeGen/MFCommon.inc
M llvm/unittests/CodeGen/MachineInstrTest.cpp
M llvm/unittests/CodeGen/MachineOperandTest.cpp
M llvm/unittests/Target/AArch64/AArch64InstPrinterTest.cpp
Log Message:
-----------
[MC] Add MCTargetOptions to MCAsmInfo constructor. NFC (#194200)
Since #180464 the canonical MCTargetOptions pointer is stored in
MCAsmInfo, but it is bound after construction via `setTargetOptions`
called from TargetRegistry::createMCAsmInfo.
Direct constructions in unit tests can leave the pointer null, leading
to a runtime assert failure. Add MCTargetOptions to every MCAsmInfo
subclass constructor, store it as a reference in MCAsmInfo, and remove
`setTargetOptions()`.
Commit: 32a9f63bb2533a9d564f8d114b139e821aa52415
https://github.com/llvm/llvm-project/commit/32a9f63bb2533a9d564f8d114b139e821aa52415
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-04-26 (Sun, 26 Apr 2026)
Changed paths:
M clang/lib/AST/ByteCode/Interp.cpp
M clang/lib/AST/ByteCode/Interp.h
M clang/test/Sema/static-init.c
Log Message:
-----------
[clang][bytecode] Fix some problems with ptr-to-int casts (#193988)
1) When doing integral casts on a pointer-casted-to-integral, check the
bitwidth we're casting _to_, not the one we're casting _from_.
2) When the pointer we're casting to an integral is a dummy pointer,
don't forget to check the bitwidth.
Commit: 49b0451ec690dfc76690c19032bdc97c2889000b
https://github.com/llvm/llvm-project/commit/49b0451ec690dfc76690c19032bdc97c2889000b
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-04-25 (Sat, 25 Apr 2026)
Changed paths:
M libcxx/utils/ci/docker/docker-compose.yml
Log Message:
-----------
[libcxx] Bump base image version to most recent (#194209)
To pull in the changes from bd75c10199a159a20720f8ee5c00afebb033f46e.
Commit: a0e42c2c47080af4c31c43b801b55e8fa7c68db4
https://github.com/llvm/llvm-project/commit/a0e42c2c47080af4c31c43b801b55e8fa7c68db4
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-04-26 (Sun, 26 Apr 2026)
Changed paths:
M clang/lib/AST/ByteCode/Integral.h
M clang/lib/AST/ByteCode/Interp.h
M clang/lib/AST/ByteCode/Primitives.h
M clang/test/AST/ByteCode/functions.cpp
Log Message:
-----------
[clang][bytecode] Add new IntegralType for function addresses (#194206)
We used to use just `::Address` for functions, which later caused
problems because we casted the pointer to `ValueDecl*` and passed it to
`Program::getOrCreateGlobal()`, which doesn't work of course.
Commit: ab57f940f48b6209f1b958ff4fd26c69b54a1804
https://github.com/llvm/llvm-project/commit/ab57f940f48b6209f1b958ff4fd26c69b54a1804
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-04-25 (Sat, 25 Apr 2026)
Changed paths:
M libcxx/utils/ci/images/libcxx_next_runners.txt
Log Message:
-----------
[libcxx] Bump next runner set (#194211)
So that we can pick up changes in
49b0451ec690dfc76690c19032bdc97c2889000b.
Commit: d593279c0b2891f0b0c8af3f70a1a0383b4ad1b5
https://github.com/llvm/llvm-project/commit/d593279c0b2891f0b0c8af3f70a1a0383b4ad1b5
Author: Princeton Ferro <pferro at nvidia.com>
Date: 2026-04-26 (Sun, 26 Apr 2026)
Changed paths:
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
M llvm/lib/Target/NVPTX/NVPTXISelLowering.h
M llvm/test/CodeGen/NVPTX/fp-contract-f32x2.ll
Log Message:
-----------
[NVPTX] Scalarize `contract FMUL v2f32` to enable FMA fusion (#192815)
SM100+ legalizes `FMUL v2f32`, blocking the scalar FADD->FMA combiner.
Scalarize it when `contract` (or `allowFMA()`) is set and every lane
feeds a single `contract` FADD.
Commit: aa3de782ec5c9d5bb7c9d4bbe879330a2e7acfa6
https://github.com/llvm/llvm-project/commit/aa3de782ec5c9d5bb7c9d4bbe879330a2e7acfa6
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-04-26 (Sun, 26 Apr 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/AArch64/spillcost-call-between-operands.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/spillcost-loop-backedge.ll
Log Message:
-----------
[SLP] Fix spill-cost cache lookup and predecessor scan
A cached intra-block scan that stopped at a call or budget limit only
proves the sub-range below the stop point is call-free; do not reuse
the cached bit for queries whose First lies above it. Also switch the
cross-block predecessor scan to "exists a call-free backward path"
semantics, skip blocks strictly dominated by Root, and memoize only
the (Root, OpParent) key. Fixes a false-positive spill cost that was
blocking profitable vectorization.
Reviewers: RKSimon, hiraditya, bababuck
Pull Request: https://github.com/llvm/llvm-project/pull/192709
Commit: 6439bbe0213e650a18855319f2b9d4b82802a96e
https://github.com/llvm/llvm-project/commit/6439bbe0213e650a18855319f2b9d4b82802a96e
Author: David Green <david.green at arm.com>
Date: 2026-04-26 (Sun, 26 Apr 2026)
Changed paths:
M llvm/lib/Target/ARM/ARMISelLowering.cpp
M llvm/test/CodeGen/ARM/hoist-and-by-const-from-lshr-in-eqcmp-zero.ll
M llvm/test/CodeGen/ARM/hoist-and-by-const-from-shl-in-eqcmp-zero.ll
Log Message:
-----------
Revert "[ARM] Fold SELECT (AND(X,1) == 0), C1, C2 -> XOR(C1,AND(NEG(AND(X,1)),XOR(C1,C2)) in Thumb1 (#185898)" (#194230)
This reverts commit 1823355d06b854854701a8ba430aa1f6be9994f4 due to
performance
regressions in benchmarks.
Commit: 4dafdf64b203bb49fe2d9be25675e5450fed33c6
https://github.com/llvm/llvm-project/commit/4dafdf64b203bb49fe2d9be25675e5450fed33c6
Author: hev <wangrui at loongson.cn>
Date: 2026-04-26 (Sun, 26 Apr 2026)
Changed paths:
M llvm/include/llvm/CodeGen/ValueTypes.td
M llvm/test/Analysis/CostModel/ARM/arith-overflow.ll
M llvm/test/TableGen/CPtrWildcard.td
Log Message:
-----------
[CodeGen] Add <2 x i128> value type (#193910)
Commit: 2d789ff783024f928699ea5b2fb95b25824217b7
https://github.com/llvm/llvm-project/commit/2d789ff783024f928699ea5b2fb95b25824217b7
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-04-26 (Sun, 26 Apr 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlanConstruction.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.h
M llvm/lib/Transforms/Vectorize/VPlanUtils.cpp
M llvm/lib/Transforms/Vectorize/VPlanUtils.h
M llvm/test/Transforms/LoopVectorize/VPlan/vplan-print-after-all.ll
M llvm/test/Transforms/LoopVectorize/induction.ll
M llvm/test/Transforms/LoopVectorize/interleaved-accesses.ll
M llvm/test/Transforms/LoopVectorize/tail-folding-vectorization-factor-1.ll
Log Message:
-----------
[VPlan] Verify and handle FOR legality during header phi creation (NFC). (#191298)
Move the logic to validate FOR users and introduce the split directly to
header phi creation. It makes sense to introduce the header phi and the
splice together.
It also means sinking only needs to be done once, instead for each
VPlan.
Depends on https://github.com/llvm/llvm-project/pull/190681.
PR: https://github.com/llvm/llvm-project/pull/191298
Commit: c65bcf2b0b8eb5814844469fc7281ef453444a53
https://github.com/llvm/llvm-project/commit/c65bcf2b0b8eb5814844469fc7281ef453444a53
Author: Takashi Idobe <idobetakashi at gmail.com>
Date: 2026-04-26 (Sun, 26 Apr 2026)
Changed paths:
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp
M llvm/lib/Transforms/InstCombine/InstCombineInternal.h
A llvm/test/Transforms/InstCombine/divceil.ll
M llvm/test/Transforms/InstCombine/fls.ll
Log Message:
-----------
[InstCombine] Div ceil optimizations (#190175)
Relates: https://github.com/llvm/llvm-project/issues/187838
This PR improves handling of `div_ceil` from rust (which emits a div +
rem).
Currently, these three rust functions:
```rust
use std::hint::assert_unchecked;
#[unsafe(no_mangle)]
pub fn div_ceil_without_assume(x: u32) -> u32 {
x.div_ceil(7)
}
#[unsafe(no_mangle)]
pub fn div_ceil_with_assume(x: u32) -> u32 {
unsafe {
assert_unchecked(x <= u32::MAX - 7);
}
x.div_ceil(7)
}
#[unsafe(no_mangle)]
pub fn div_ceil_with_range(x: u32) -> u32 {
x.count_zeros().div_ceil(7)
}
```
Will emit this IR (cleaned up): The IR looks pretty good to me as both
the assert_unchecked and the popcount are providing range information.
```llvm
define noundef range(i32 0, 613566758) i32 @div_ceil_without_assume(i32 noundef %x) unnamed_addr {
start:
%d = udiv i32 %x, 7
%r = urem i32 %x, 7
%_4.not = icmp ne i32 %r, 0
%0 = zext i1 %_4.not to i32
%_0.sroa.0.0 = add nuw nsw i32 %d, %0
ret i32 %_0.sroa.0.0
}
define noundef range(i32 0, 613566757) i32 @div_ceil_with_assume(i32 noundef %x) unnamed_addr {
start:
%cond = icmp ult i32 %x, -7
tail call void @llvm.assume(i1 %cond)
%d = udiv i32 %x, 7
%r = urem i32 %x, 7
%_5.not = icmp ne i32 %r, 0
%0 = zext i1 %_5.not to i32
%_0.sroa.0.0 = add nuw nsw i32 %d, %0
ret i32 %_0.sroa.0.0
}
define noundef range(i32 0, 6) i32 @div_ceil_with_range(i32 noundef %x) unnamed_addr {
start:
%self = xor i32 %x, -1
%0 = tail call range(i32 0, 33) i32 @llvm.ctpop.i32(i32 %self)
%d.lhs.trunc = trunc nuw nsw i32 %0 to i8
%d3 = udiv i8 %d.lhs.trunc, 7
%d.zext = zext nneg i8 %d3 to i32
%r4 = urem i8 %d.lhs.trunc, 7
%_6.not = icmp ne i8 %r4, 0
%1 = zext i1 %_6.not to i32
%_0.sroa.0.0 = add nuw nsw i32 %1, %d.zext
ret i32 %_0.sroa.0.0
}
declare void @llvm.assume(i1 noundef)
declare i32 @llvm.ctpop.i32(i32)
```
After running through opt and llc on main with popcnt for less noise:
`build/bin/opt -O2 -S < test.ll | build/bin/llc --x86-asm-syntax=intel
-mattr=+popcnt -O2 -o -`
```asm
div_ceil_without_assume: # @div_ceil_without_assume
mov eax, edi
movabs rcx, 2635249153617166336
mul rcx
lea eax, [8*rdx]
mov ecx, edx
sub ecx, eax
xor eax, eax
add ecx, edi
setne al
add eax, edx
ret
div_ceil_with_assume: # @div_ceil_with_assume
mov eax, edi
movabs rcx, 2635249153617166336
mul rcx
lea eax, [8*rdx]
mov ecx, edx
sub ecx, eax
xor eax, eax
add ecx, edi
setne al
add eax, edx
ret
div_ceil_with_range: # @div_ceil_with_range
not edi
popcnt ecx, edi
lea eax, [rcx + 8*rcx]
lea edx, [rcx + 4*rax]
shr edx, 8
lea esi, [8*rdx]
sub esi, edx
xor eax, eax
cmp cl, sil
setne al
add eax, edx
ret
```
(as a sidenote, just running llc seems to generate better code? I find
this a bit odd)
`build/bin/llc test.ll --x86-asm-syntax=intel -mattr=+popcnt -O2 -o -`
```asm
div_ceil_without_assume: # @div_ceil_without_assume
mov eax, edi
movabs rcx, 2635249153617166336
mul rcx
mov rax, rdx
imul ecx, edi, -1227133513
cmp ecx, 613566757
sbb eax, -1
ret
div_ceil_with_assume: # @div_ceil_with_assume
mov eax, edi
movabs rcx, 2635249153617166336
mul rcx
mov rax, rdx
imul ecx, edi, -1227133513
cmp ecx, 613566757
sbb eax, -1
ret
div_ceil_with_range: # @div_ceil_with_range
not edi
popcnt ecx, edi
lea eax, [rcx + 8*rcx]
lea eax, [rcx + 4*rax]
shr eax, 8
imul ecx, ecx, -73
cmp cl, 37
```
Anyway the llvm IR when run through opt at -O2:
On main:
The only changes I see are the urem being rewritten to a mul + sub for
all the instructions, and the range information is persisted but not
used.
```llvm
define noundef range(i32 0, 613566758) i32 @div_ceil_without_assume(i32 noundef %x) unnamed_addr {
start:
%d = udiv i32 %x, 7
%0 = mul i32 %d, 7
%r.decomposed = sub i32 %x, %0
%_4.not = icmp ne i32 %r.decomposed, 0
%1 = zext i1 %_4.not to i32
%_0.sroa.0.0 = add nuw nsw i32 %d, %1
ret i32 %_0.sroa.0.0
}
define noundef range(i32 0, 613566757) i32 @div_ceil_with_assume(i32 noundef %x) unnamed_addr {
start:
%cond = icmp ult i32 %x, -7
tail call void @llvm.assume(i1 %cond)
%d = udiv i32 %x, 7
%0 = mul i32 %d, 7
%r.decomposed = sub i32 %x, %0
%_5.not = icmp ne i32 %r.decomposed, 0
%1 = zext i1 %_5.not to i32
%_0.sroa.0.0 = add nuw nsw i32 %d, %1
ret i32 %_0.sroa.0.0
}
define noundef range(i32 0, 6) i32 @div_ceil_with_range(i32 noundef %x) unnamed_addr {
start:
%self = xor i32 %x, -1
%0 = tail call range(i32 0, 33) i32 @llvm.ctpop.i32(i32 %self)
%d.lhs.trunc = trunc nuw nsw i32 %0 to i8
%d3 = udiv i8 %d.lhs.trunc, 7
%d.zext = zext nneg i8 %d3 to i32
%1 = mul i8 %d3, 7
%r4.decomposed = sub i8 %d.lhs.trunc, %1
%_6.not = icmp ne i8 %r4.decomposed, 0
%2 = zext i1 %_6.not to i32
%_0.sroa.0.0 = add nuw nsw i32 %2, %d.zext
ret i32 %_0.sroa.0.0
}
declare void @llvm.assume(i1 noundef)
declare i32 @llvm.ctpop.i32(i32)
```
However, both the assume and the popcount provide range information so
we can do an optimization. Div_ceil is emitted as a udiv and urem. We
can combine them given the following rules:
Assuming you have floor division of X / Y, we can add Y - 1 to X and
floor division will always give us (floor_divide(X / Y) + 1) which gives
us the same result.
So the formula in general is:
```
div_ceil(X, Y) = X / Y + (1 if X % Y > 0 else 0) -> X + Y - 1 / Y
```
But this fails since I forgot about wrapping. So we need a condition
that X + Y - 1 does not wrap, and of course Y cannot be 0. Technically
we should ignore Y / 1 since that's a trivial identity.
That gets us:
```
add(udiv(X, Y), zext(icmp ne(urem(X, Y), 0))) -> udiv(add nuw(X, Y - 1), Y)
```
[Alive proof here](https://alive2.llvm.org/ce/z/nBvyv4)
This is where I thought I was done, because this should handle the range
and assume case (the assume case provides less information than the
popcount because popcount's range is narrower for X). So I thought I was
done.
Unfortunately this only optimizes one case (the assume case with the
wide code). The culprit here is in the popcount case, there's a trunc
for the popcount to bound it to an i8 since narrower arithmetic allows
for better optimizations before zero extending.
```llvm
%d.lhs.trunc = trunc nuw nsw i32 %0 to i8
%d3 = udiv i8 %d.lhs.trunc, 7
%d.zext = zext nneg i8 %d3 to i32
%r4 = urem i8 %d.lhs.trunc, 7
%_6.not = icmp ne i8 %r4, 0
%1 = zext i1 %_6.not to i32
```
So we need to handle another form, when the udiv needs to be zexted to
the return type (because it was previously trunced, due to the
popcount).
```
add(zext(udiv(X, Y)), zext(icmp ne(urem(X, Y), 0))) -> zext(udiv(add nuw(X, Y - 1), Y))
```
[Alive2 Proof](https://alive2.llvm.org/ce/z/w7bRZW)
There was another oddity I found that trunced information wasn't passing
constant ranges, so I added that to ValueTracking.cpp to fix this fold
too.
On this branch the IR now transforms:
```llvm
define noundef range(i32 0, 613566758) i32 @div_ceil_without_assume(i32 noundef %x) unnamed_addr {
start:
%d = udiv i32 %x, 7
%0 = mul i32 %d, 7
%r.decomposed = sub i32 %x, %0
%_4.not = icmp ne i32 %r.decomposed, 0
%1 = zext i1 %_4.not to i32
%_0.sroa.0.0 = add nuw nsw i32 %d, %1
ret i32 %_0.sroa.0.0
}
define noundef range(i32 0, 613566757) i32 @div_ceil_with_assume(i32 noundef %x) unnamed_addr {
start:
%cond = icmp ult i32 %x, -7
tail call void @llvm.assume(i1 %cond)
%0 = add nuw i32 %x, 6
%_0.sroa.0.0 = udiv i32 %0, 7
ret i32 %_0.sroa.0.0
}
define noundef range(i32 0, 6) i32 @div_ceil_with_range(i32 noundef %x) unnamed_addr {
start:
%self = xor i32 %x, -1
%0 = tail call range(i32 0, 33) i32 @llvm.ctpop.i32(i32 %self)
%d.lhs.trunc = trunc nuw nsw i32 %0 to i8
%1 = add nuw nsw i8 %d.lhs.trunc, 6
%2 = udiv i8 %1, 7
%_0.sroa.0.0 = zext nneg i8 %2 to i32
ret i32 %_0.sroa.0.0
}
declare void @llvm.assume(i1 noundef)
declare i32 @llvm.ctpop.i32(i32)
```
And we get this asm emitted:
```asm
div_ceil_without_assume: # @div_ceil_without_assume
mov eax, edi
movabs rcx, 2635249153617166336
mul rcx
lea eax, [8*rdx]
mov ecx, edx
sub ecx, eax
xor eax, eax
add ecx, edi
setne al
add eax, edx
ret
div_ceil_with_assume: # @div_ceil_with_assume
lea eax, [rdi + 6]
movabs rcx, 2635249153617166336
mul rcx
mov rax, rdx
ret
div_ceil_with_range: # @div_ceil_with_range
not edi
popcnt eax, edi
add al, 6
movzx eax, al
imul eax, eax, 147
shr eax, 10
ret
```
Commit: 72c8f98f74f2b4f9677d0d5e3dc91bc4d6cb39f4
https://github.com/llvm/llvm-project/commit/72c8f98f74f2b4f9677d0d5e3dc91bc4d6cb39f4
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2026-04-26 (Sun, 26 Apr 2026)
Changed paths:
M flang/examples/FeatureList/FeatureList.cpp
M flang/include/flang/Parser/dump-parse-tree.h
M flang/include/flang/Parser/parse-tree.h
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Parser/openmp-parsers.cpp
M flang/lib/Parser/unparse.cpp
M flang/lib/Semantics/assignment.cpp
M flang/lib/Semantics/assignment.h
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/check-omp-structure.h
M flang/lib/Semantics/resolve-directives.cpp
M flang/lib/Semantics/resolve-names.cpp
M flang/lib/Semantics/rewrite-parse-tree.cpp
M flang/lib/Semantics/unparse-with-symbols.cpp
M flang/test/Parser/OpenMP/declare-mapper-unparse.f90
M flang/test/Parser/OpenMP/declare-reduction-combiner.f90
M flang/test/Parser/OpenMP/declare-reduction-multi.f90
M flang/test/Parser/OpenMP/declare-reduction-operator.f90
M flang/test/Parser/OpenMP/declare-reduction-unparse.f90
M flang/test/Parser/OpenMP/declare-target-indirect-tree.f90
M flang/test/Parser/OpenMP/declare-target-to-clause.f90
M flang/test/Parser/OpenMP/declare_target-device_type.f90
M flang/test/Parser/OpenMP/enter-automap-modifier.f90
M flang/test/Parser/OpenMP/linear-clause.f90
M flang/test/Parser/OpenMP/openmp6-directive-spellings.f90
M flang/test/Semantics/OpenMP/simd-only.f90
Log Message:
-----------
[flang][OpenMP] Rename "declare constructs" to directives, NFC (#194240)
Only executable directives are constructs in OpenMP, so, for example,
"declare mapper" is not a construct.
Apply
find flang/ \( -name '*.cpp' -o -name '*.h' -o -name '*.f90' \) -exec sed \
-i -E -e 's/OpenMP(Declare[A-Za-z]*)Construct\b/Omp\1Directive/g' {} \;
plus local formatting updates as needed.
Commit: 91805dc497de9ceb1bfcaafd0098c6705d2d5c93
https://github.com/llvm/llvm-project/commit/91805dc497de9ceb1bfcaafd0098c6705d2d5c93
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-04-26 (Sun, 26 Apr 2026)
Changed paths:
A llvm/test/Transforms/SLPVectorizer/X86/select-copyable-cmp-poison.ll
Log Message:
-----------
[SLP][NFC]Add a test with the incorrect vectorization for fully matched, but reordered, node, NFC
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/194244
Commit: 8efcfc2495f3b6686a94f3b2bdaaa4dd8ce7aeab
https://github.com/llvm/llvm-project/commit/8efcfc2495f3b6686a94f3b2bdaaa4dd8ce7aeab
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-04-26 (Sun, 26 Apr 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/X86/select-copyable-cmp-poison.ll
M llvm/test/Transforms/SLPVectorizer/X86/shrink_after_reorder.ll
M llvm/test/Transforms/SLPVectorizer/revec.ll
Log Message:
-----------
[SLP] Reuse diamond-matched gather across asymmetric reorder/reuse
processBuildVector's perfect-diamond match used Entries.front()->isSame(
E->Scalars) only, missing matches where E carries the reorder/reuse and
the entry is canonical. Two TreeEntries with the same effective scalar
layout but different raw orderings then build independent gathers; one
emits a fill-in shufflevector for reused lanes while the other leaves
poison there.
Fixes #194191.
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/194247
Commit: 7b43dcd755e4d0cb18326f81080daa642ff4e630
https://github.com/llvm/llvm-project/commit/7b43dcd755e4d0cb18326f81080daa642ff4e630
Author: David Green <david.green at arm.com>
Date: 2026-04-26 (Sun, 26 Apr 2026)
Changed paths:
M llvm/test/CodeGen/AArch64/neon-rshrn.ll
Log Message:
-----------
[AArch64] Add disjoint or tests for rshrn and raddhn. NFC (#194252)
These should already be OK, as the os disjoint or connot round up.
Commit: fbac55b82be9bf849d8a9c2514c01cb24a2a264f
https://github.com/llvm/llvm-project/commit/fbac55b82be9bf849d8a9c2514c01cb24a2a264f
Author: JP Hafer <146973677+jph-13 at users.noreply.github.com>
Date: 2026-04-26 (Sun, 26 Apr 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
A llvm/test/CodeGen/AArch64/scvtf-div-mul-combine.ll
Log Message:
-----------
[AArch64] Optimize vector fmul(sitofp/uitofp, 1/2^N) -> scvtf/ucvtf (#141480)
When a vector integer-to-float conversion is followed by a multiply with a
reciprocal power-of-two constant, we can fold both operations into a single
SCVTF or UCVTF instruction with a fixed-point shift operand.
For example, `fmul(sitofp(v2i32 x), <0.5, 0.5>)` becomes `scvtf.2s v0, v0, #1`.
This is a reworked version with several improvements over the original
submission:
- Rewrite the C++ operand matcher to share implementation with the existing
`SelectCVTFixedPointVec` (MOVIshift, FMOV, and DUP handling with correct
truncation for f16)
- Add `uitofp`/`ucvtf` patterns via a `CVTFRecipPat` multiclass
- Add full GlobalISel support (`GIComplexOperandMatcher` + renderer)
Supported vector types: `v2f32`, `v4f32`, `v2f64`, `v4f16`, `v8f16`.
Fixes #94909
Commit: 694f1b425ae370e5fc615038dba90cb1cfcadd30
https://github.com/llvm/llvm-project/commit/694f1b425ae370e5fc615038dba90cb1cfcadd30
Author: Christoph Grüninger <foss at grueninger.de>
Date: 2026-04-26 (Sun, 26 Apr 2026)
Changed paths:
M .github/workflows/libcxx-build-and-test.yaml
Log Message:
-----------
Remove GitHub Action seanmiddleditch/gha-setup-ninja (#194218)
>From the GitHubAction
[README](https://github.com/seanmiddleditch/gha-setup-ninja/blob/master/README.md):
"This action is no longer necessary, as ninja is now
included on all default GitHub runner instances."
Commit: 4e6d01dd5bc6d10166e8b8f1fbf36c862ca04e10
https://github.com/llvm/llvm-project/commit/4e6d01dd5bc6d10166e8b8f1fbf36c862ca04e10
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-04-26 (Sun, 26 Apr 2026)
Changed paths:
M .github/workflows/libcxx-build-and-test.yaml
Log Message:
-----------
[libcxx][Github] Bump libcxx runners to the next runner set (#194212)
To pick up some recent container changes that add additional tools for
the LLVM libc build.
Commit: a562a10f7379c158a858be0cabf52d9dca5fd1c4
https://github.com/llvm/llvm-project/commit/a562a10f7379c158a858be0cabf52d9dca5fd1c4
Author: Ebuka Ezike <yerimyah1 at gmail.com>
Date: 2026-04-26 (Sun, 26 Apr 2026)
Changed paths:
M lldb/tools/lldb-dap/DAP.cpp
M lldb/tools/lldb-dap/DAP.h
M lldb/tools/lldb-dap/DAPSessionManager.cpp
M lldb/tools/lldb-dap/EventHelper.cpp
Log Message:
-----------
lldb-dap: Fix race condition in event threads creation (#194012)
Move the registration of the SBListener to before
the event threads (`ProgressEventThread` and `EventThread`) start
This prevents a race condition where a stop event
could be missed if it was sent immediately after thread creation, which
would lead to a deadlock. It is most likely to happen under heavy CPU
load with test that fails early like
TestDAP_commands::test_command_directive_abort_on_error_init_commands.
Relevant logs.
```sh
# Event thread deadlock.
0x00007348BC000BE0 Listener('lldb-dap.progress.listener')::GetEventInternal, timeout = 1000000 us, event_mask = 0
0x00005b72419d1640 Broadcaster("lldb-dap")::BroadcastEvent (event_sp = 0x5b7241eebb60 Event: broadcaster = 0x5b72418e0df0 (lldb-dap), type = 0x00000001, data = <NULL>, unique=false) hijack = 0x0000000000000000
0x00005B7241898440 Listener('lldb.Debugger')::GetEventInternal, timeout = 1000000 us, event_mask = 0
0x7348bc000be0 Listener::GetEventInternal() timed out for lldb-dap.progress.listener
0x00007348BC000BE0 Listener('lldb-dap.progress.listener')::GetEventInternal, timeout = 1000000 us, event_mask = 0
```
```sh
# Progress thread deadlock.
0x000057798AB6B440 Listener('lldb.Debugger')::GetEventInternal, timeout = <infinite>, event_mask = 0
0x000057798aca4640 Broadcaster("lldb-dap")::BroadcastEvent (event_sp = 0x57798b0b9d80 Event: broadcaster = 0x57798abb3df0 (lldb-dap), type = 0x00000001, data = <NULL>, unique=false) hijack = 0x0000000000000000
0x57798ab6b440 Listener('lldb.Debugger')::AddEvent (event_sp = {0x57798b0b9d80})
0x57798ab6b440 'lldb.Debugger' Listener::FindNextEventInternal(broadcaster=(nil), event_type_mask=0x00000000, remove=1) event 0x57798b0b9d80
0x000057798aca4640 Broadcaster("lldb-dap")::BroadcastEvent (event_sp = 0x57798b1be800 Event: broadcaster = 0x57798abb3df0 (lldb-dap), type = 0x00000002, data = <NULL>, unique=false) hijack = 0x0000000000000000
0x000078023C000BE0 Listener('lldb-dap.progress.listener')::GetEventInternal, timeout = <infinite>, event_mask = 0
```
Commit: 8f65ad583a019cde822b19cf24b0df68a5242792
https://github.com/llvm/llvm-project/commit/8f65ad583a019cde822b19cf24b0df68a5242792
Author: Pedro Lobo <pedro.lobo at tecnico.ulisboa.pt>
Date: 2026-04-26 (Sun, 26 Apr 2026)
Changed paths:
M llvm/lib/Analysis/ConstantFolding.cpp
M llvm/test/Transforms/InstSimplify/load.ll
Log Message:
-----------
[ConstantFolding] Fold byte loads from constant globals (#194074)
Handle byte types in `FoldReinterpretLoadFromConst` and
`ConstantFoldLoadFromUniformValue` so loads from constant globals fold.
Commit: 3b20615594360fdb0f0e328d0d83ae572474b370
https://github.com/llvm/llvm-project/commit/3b20615594360fdb0f0e328d0d83ae572474b370
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-04-26 (Sun, 26 Apr 2026)
Changed paths:
A llvm/test/Transforms/LoopVectorize/VPlan/widen-canonical-iv-register-pressure.ll
A llvm/test/Transforms/LoopVectorize/X86/widen-canonical-iv-register-pressure.ll
Log Message:
-----------
[LV] Add test cases where wide IV can cause spills. (#194260)
Add test cases showing cases where replacing VPWidenCanonicalIVRecipe
with VPWidenIntOrFPinductionPHIRecipe is profitable/not profitable due
to introducing spills.
Commit: 544d003630475c65f6d85d1edb4467e9d7a16c0f
https://github.com/llvm/llvm-project/commit/544d003630475c65f6d85d1edb4467e9d7a16c0f
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-04-26 (Sun, 26 Apr 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/test/Transforms/LoopVectorize/VPlan/vplan-print-after-all.ll
Log Message:
-----------
[VPlan] Use RUN_VPLAN_PASS for later VPlan transforms. (#194261)
Convert a number of later VPlan transform invocations to use
RUN_VPLAN_PASS. Enables more accurate transform printing, as well as
extra verification.
This should migrate all remaining transforms that can be moved without
changes.
Commit: 28c4c25c0cdf4bb41059fb48927f0f866b72bd5a
https://github.com/llvm/llvm-project/commit/28c4c25c0cdf4bb41059fb48927f0f866b72bd5a
Author: Midhunesh <midhunesh.p at ibm.com>
Date: 2026-04-26 (Sun, 26 Apr 2026)
Changed paths:
M compiler-rt/lib/sanitizer_common/sanitizer_allocator_dlsym.h
Log Message:
-----------
[Asan]Add align argument to Realloc() (#194255)
Add align argument to the function Realloc() to ensure original
allocation alignment through realloc
Commit: 4ef52fe4652810ca816250b00c996d65672dd2d0
https://github.com/llvm/llvm-project/commit/4ef52fe4652810ca816250b00c996d65672dd2d0
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-04-26 (Sun, 26 Apr 2026)
Changed paths:
M libcxx/utils/ci/run-buildbot
Log Message:
-----------
[libcxx] Remove package installation for generic-llvm-libc (#194259)
Now that these packages are installed by default in the container image,
we no longer need to install them each time we do a build.
Commit: 13cee9be088057f198e08ee7217ed2af08cfd825
https://github.com/llvm/llvm-project/commit/13cee9be088057f198e08ee7217ed2af08cfd825
Author: martin0413133 <129967631+martin0413133 at users.noreply.github.com>
Date: 2026-04-26 (Sun, 26 Apr 2026)
Changed paths:
M compiler-rt/lib/sanitizer_common/sanitizer_posix.cpp
Log Message:
-----------
[sanitizer] Fix race condition in GetNamedMappingFd with decorate_pro… (#190981)
…c_maps=1
Multi-threaded programs crash randomly when
ASAN_OPTIONS=decorate_proc_maps=1 is enabled due to filename collision
in /dev/shm.
Root Cause:
All threads use the same filename format '/dev/shm/<PID> [name]',
causing race conditions where one thread deletes a file created by
another thread, resulting in ENOENT errors.
Solution:
Add thread ID (TID) to the filename to ensure uniqueness:
- Old format: /dev/shm/<PID> [name]
- New format: /dev/shm/<PID>.<TID> [name]
This ensures each thread has a unique filename, eliminating the race
condition.
Testing:
- Original version: 30% crash rate (6 crashes in 20 runs)
- Fixed version: 0% crash rate (0 crashes in 50 runs)
Fixes #190604
Commit: 57494cc7b4e8b59714ee9e312812d8421f41d27c
https://github.com/llvm/llvm-project/commit/57494cc7b4e8b59714ee9e312812d8421f41d27c
Author: Thurston Dang <thurston at google.com>
Date: 2026-04-26 (Sun, 26 Apr 2026)
Changed paths:
M compiler-rt/lib/sanitizer_common/sanitizer_posix.cpp
Log Message:
-----------
Revert "[sanitizer] Fix race condition in GetNamedMappingFd with decorate_pro…" (#194271)
Reverts llvm/llvm-project#190981 due to buildbot failure
(https://lab.llvm.org/buildbot/#/builders/66/builds/29993):
```
SanitizerCommon-asan-i386-Linux :: Linux/decorate_proc_maps.cpp
```
Commit: 652700b4cb3c87294f2d78cb87df5e394e589984
https://github.com/llvm/llvm-project/commit/652700b4cb3c87294f2d78cb87df5e394e589984
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M compiler-rt/lib/sanitizer_common/sanitizer_posix.cpp
Log Message:
-----------
Reland "[sanitizer] Fix race condition in GetNamedMappingFd with decorate_pro…"" (#194273)
Reverts llvm/llvm-project#194271
Relands llvm/llvm-project#190981.
ThreadID is u64, format must be `%llu`.
Commit: 09306f776fc04272e3ef8a5fdb09b06a84713ffd
https://github.com/llvm/llvm-project/commit/09306f776fc04272e3ef8a5fdb09b06a84713ffd
Author: Luke Lau <luke at igalia.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
M llvm/test/CodeGen/RISCV/rvv/dont-sink-splat-operands.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-insert-subvector-shuffle.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-peephole-vmerge-vops.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vadd-vp-mask.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vadd-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vmacc-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vmul-vp-mask.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vmul-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vnmsac-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vrsub-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vsub-vp-mask.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vsub-vp.ll
M llvm/test/CodeGen/RISCV/rvv/rvv-peephole-vmerge-vops.ll
M llvm/test/CodeGen/RISCV/rvv/sink-splat-operands.ll
M llvm/test/CodeGen/RISCV/rvv/undef-vp-ops.ll
M llvm/test/CodeGen/RISCV/rvv/vadd-vp-mask.ll
M llvm/test/CodeGen/RISCV/rvv/vadd-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vandn-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vmul-vp-mask.ll
M llvm/test/CodeGen/RISCV/rvv/vmul-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vp-vaaddu.ll
M llvm/test/CodeGen/RISCV/rvv/vrsub-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vsub-vp-mask.ll
M llvm/test/CodeGen/RISCV/rvv/vsub-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vwadd-vp.ll
Log Message:
-----------
[RISCV] Remove codegen for vp_add, vp_mul, vp_sub (#194173)
Part of the work to remove trivial VP intrinsics from the RISC-V
backend, see
https://discourse.llvm.org/t/rfc-remove-codegen-support-for-trivial-vp-intrinsics-in-the-risc-v-backend/87999
This splits off 3 intrinsics from #179622. These are expanded and
removed in lockstep so we don't break the multiply-accumulate patterns.
Commit: ef09defc0f4d2a0e52e4d4bd2239088241310051
https://github.com/llvm/llvm-project/commit/ef09defc0f4d2a0e52e4d4bd2239088241310051
Author: Ruiling, Song <ruiling.song at amd.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
A llvm/test/CodeGen/AMDGPU/wqm-propagate-for-execz-side-effect.mir
Log Message:
-----------
[test][AMDGPU] Precommit test for Back-propagate wqm for sources of side-effect instruction (#193394)
Commit: e042f67503e5cbf0480b3c24719c3a57dde1453b
https://github.com/llvm/llvm-project/commit/e042f67503e5cbf0480b3c24719c3a57dde1453b
Author: ZhaoQi <zhaoqi01 at loongson.cn>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M llvm/lib/Target/LoongArch/LoongArchInstrInfo.cpp
M llvm/lib/Target/LoongArch/LoongArchInstrInfo.h
A llvm/test/CodeGen/LoongArch/stackslot.mir
Log Message:
-----------
[LoongArch] Override `isLoadFromStackSlot/isStoreToStackSlot` to expose more optimizations (#164561)
Commit: db572086d0bb11b59004b2f27bfad03669a9c7db
https://github.com/llvm/llvm-project/commit/db572086d0bb11b59004b2f27bfad03669a9c7db
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M llvm/test/CodeGen/X86/machine-block-hash.mir
Log Message:
-----------
[X86] Mark machine-block-hash.mir as XFAIL on big-endian hosts (#194279)
Test introduced in #193107 assumes `stable_hash_combine` is stable,
but it turns out it's not true.
Commit: 41236fb837ecf9fbf632d158833ec5edac509799
https://github.com/llvm/llvm-project/commit/41236fb837ecf9fbf632d158833ec5edac509799
Author: Madhur Amilkanthwar <madhura at nvidia.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/GVN.cpp
M llvm/test/Transforms/GVN/tbaa.ll
Log Message:
-----------
[GVN] Propagate isMemorySSAEnabled() into ValueTable (#193938)
`GVNPass::runImpl()` calls `VN.setMemorySSA(MSSA)` with a single
argument. The second parameter of `ValueTable::setMemorySSA()`,
`MSSAEnabled`, defaults to `false`, so `ValueTable::IsMSSAEnabled`
remains false even when the pass is configured with
`-enable-gvn-memoryssa=1` or `-passes='gvn<memoryssa>'`.
The MemorySSA-backed value-numbering paths in
`ValueTable::lookupOrAddCall()` and `ValueTable::computeLoadStoreVN()`
are gated on `IsMSSAEnabled`, making them unreachable from runImpl() on
main today.
This patch forwards isMemorySSAEnabled() as the second argument to
setMemorySSA(), so selecting the MemorySSA backend actually enables
MemorySSA-aware value numbering.
Commit: 2a09db4d6a6ab6281b8b52f5057fe89fe0935d23
https://github.com/llvm/llvm-project/commit/2a09db4d6a6ab6281b8b52f5057fe89fe0935d23
Author: Ruiling, Song <ruiling.song at amd.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIWholeQuadMode.cpp
M llvm/test/CodeGen/AMDGPU/wqm-propagate-for-execz-side-effect.mir
Log Message:
-----------
AMDGPU: Back-propagate wqm for sources of side-effect instruction (#193395)
For readfirstlane instruction, as it would get undefined value if exec
is zero. To handle the case that only helper lanes execute the parent
block, we let the readfirstlane to execute under wqm. But this is not
enough. If the parent block was also executed by non-helper lanes, we
also need to make sure its sources were calculated under wqm. Otherwise,
if the instruction that generate the source of readfirstlane was
executed under exact mode, the value would contain garbage data in help
lane. The garbage data in helper lane maybe returned by the
readfirstlane running under wqm.
To fix this issue, we need to enforce the back-propagation of wqm for
instructions like readfirstlane. This was only done if the instruction
was possibly in the middle of wqm region (by checking OutNeeds).
Commit: 504930b655af9a49c0596b2aa68f1b763a599bab
https://github.com/llvm/llvm-project/commit/504930b655af9a49c0596b2aa68f1b763a599bab
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M llvm/test/CodeGen/X86/machine-block-hash.mir
Log Message:
-----------
[X86] Remove update_mir_test_checks.py NOTE (#194278)
The test checks printer output, not MIR.
It was probably copy-pasted in #193107 from other test.
Commit: 1f9c611b0997205568f226e0f0ecd22cb96e4f77
https://github.com/llvm/llvm-project/commit/1f9c611b0997205568f226e0f0ecd22cb96e4f77
Author: Madhur Amilkanthwar <madhura at nvidia.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M llvm/test/Transforms/LoopFusion/double_loop_nest_inner_guard.ll
M llvm/test/Transforms/LoopFusion/triple_loop_nest_inner_guard.ll
Log Message:
-----------
[LoopFusion][NFC] UTC gen some tests (#193755)
Some variables need rename as UTC normalizes IR value names. Also,
remove dead variable `%M` and `%N` from
`double_loop_nest_inner_guard.ll`
Commit: 4d2d6a0d92e068a367168706fb768f9dd1c0ad8a
https://github.com/llvm/llvm-project/commit/4d2d6a0d92e068a367168706fb768f9dd1c0ad8a
Author: Zhaoxin Yang <yangzhaoxin at loongson.cn>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/test/CodeGen/LoongArch/lsx/ir-instruction/fpext.ll
M llvm/test/CodeGen/LoongArch/vector-fp-imm.ll
Log Message:
-----------
[LoongArch] Type legalize v2f32 loads by using an f64 load and a scalar_to_vector (#164943)
On 64-bit targets the generic legalize will use an i64 load and a
scalar_to_vector for us. But on 32-bit targets, i64 isn't legal, and the
generic legalizer will end up emitting two 32-bit loads. This patch uses
f64 to avoid the splitting entirely and the redundant int->fp
conversion.
Commit: 4ab33dc39b569f2e33eeec24c2c5c9ae013fe5ea
https://github.com/llvm/llvm-project/commit/4ab33dc39b569f2e33eeec24c2c5c9ae013fe5ea
Author: Luke Lau <luke at igalia.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-peephole-vmerge-vops.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfnmsac-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vmacc-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vnmsac-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vselect-vp-bf16.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vselect-vp.ll
M llvm/test/CodeGen/RISCV/rvv/rvv-peephole-vmerge-vops.ll
M llvm/test/CodeGen/RISCV/rvv/sink-splat-operands.ll
M llvm/test/CodeGen/RISCV/rvv/vfmacc-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfmsac-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfnmacc-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfnmsac-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vmacc-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vmadd-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vnmsac-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vselect-vp-bf16.ll
M llvm/test/CodeGen/RISCV/rvv/vselect-vp.ll
Log Message:
-----------
[RISCV] Remove codegen for vp_select (#194199)
Part of the work to remove trivial VP intrinsics from the RISC-V
backend, see
https://discourse.llvm.org/t/rfc-remove-codegen-support-for-trivial-vp-intrinsics-in-the-risc-v-backend/87999
This splits off vp.select from #179622
Commit: bee932f0c98d720b66994cb6500d227d219110b8
https://github.com/llvm/llvm-project/commit/bee932f0c98d720b66994cb6500d227d219110b8
Author: Antonio Frighetto <me at antoniofrighetto.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
A llvm/test/CodeGen/NVPTX/unknown-intrinsic.ll
Log Message:
-----------
[NVPTX] Improve error diagnostic when handling unknown intrinsics (#191194)
Following up on #146726, it may be desirable to gracefully fail the
compilation in the presence of unknown NVVM intrinsics, which
cannot be lowered by the NVPTX backend, rather than silently
emitting invalid PTX.
Commit: 30c5cfd5b78010146bfd06d19083dfa9c76bbc1a
https://github.com/llvm/llvm-project/commit/30c5cfd5b78010146bfd06d19083dfa9c76bbc1a
Author: Luke Lau <luke at igalia.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M llvm/lib/CodeGen/ExpandVectorPredication.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfclass-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfclass-vp.ll
Log Message:
-----------
[RISCV] Remove codegen for vp_is_fpclass (#193222)
Part of the work to remove trivial VP intrinsics from the RISC-V
backend, see
https://discourse.llvm.org/t/rfc-remove-codegen-support-for-trivial-vp-intrinsics-in-the-risc-v-backend/87999
This splits off vp_is_fpclass from #179622.
Commit: 9b787812e1700800fc927f104c5911aebdaec6eb
https://github.com/llvm/llvm-project/commit/9b787812e1700800fc927f104c5911aebdaec6eb
Author: Chaitanya <Krishna.Sankisa at amd.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenBuiltinAMDGPU.cpp
A clang/test/CIR/CodeGenHIP/builtins-amdgcn.hip
Log Message:
-----------
[CIR][AMDGPU] Add lowering for amdgcn_div_scale builtins (#192931)
Upstreaming clangIR PR: https://github.com/llvm/clangir/pull/2050
This PR adds support for lowering of _builtin_amdgcn_div_scale* amdgpu
builtins to clangIR.
Followed similar lowering from reference clang->llvmir in
clang/lib/CodeGen/TargetBuiltins/AMDGPU.cpp.
Commit: 58f2c189c4232351bd22dfdbb7ab45e084406cca
https://github.com/llvm/llvm-project/commit/58f2c189c4232351bd22dfdbb7ab45e084406cca
Author: Piotr Fusik <p.fusik at samsung.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineShifts.cpp
A llvm/test/Transforms/InstCombine/shift-sub.ll
Log Message:
-----------
[InstCombine] Fold shift of a constant into a reverse shift (#192982)
C1 << (C2 - X) -> (C1 << C2) >> X
C1 << (C2 ^ X) -> (C1 << C2) >> X (if equivalent to the above)
C1 >> (C2 - X) -> (C1 >> C2) << X (right shift modes match)
C1 >> (C2 ^ X) -> (C1 >> C2) << X (if equivalent to the above)
Proof: https://alive2.llvm.org/ce/z/q-4soi
Commit: 8119f1854948b50358bbfaea08f207f51970f06c
https://github.com/llvm/llvm-project/commit/8119f1854948b50358bbfaea08f207f51970f06c
Author: Khem Raj <khem.raj at oss.qualcomm.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M libcxxabi/src/cxa_personality.cpp
Log Message:
-----------
libcxxabi: declare __gnu_unwind_frame in cxa_personality (#189787)
ARM EHABI builds of libcxxabi fail with clang-22+ because
cxa_personality.cpp calls __gnu_unwind_frame without a visible
declaration, triggering:
error: use of undeclared identifier '__gnu_unwind_frame'
Add an extern "C" forward declaration before the EHABI unwind helper so
the source compiles correctly.
Signed-off-by: Khem Raj <khem.raj at oss.qualcomm.com>
Commit: f57f184f87d1caedc778bb1f1a972757083e998d
https://github.com/llvm/llvm-project/commit/f57f184f87d1caedc778bb1f1a972757083e998d
Author: jeanPerier <jperier at nvidia.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M flang/include/flang/Lower/PFTBuilder.h
M flang/include/flang/Semantics/tools.h
M flang/lib/Lower/Bridge.cpp
M flang/lib/Lower/PFTBuilder.cpp
M flang/lib/Semantics/tools.cpp
M flang/test/Lower/OpenMP/target-map-complex.f90
M flang/test/Lower/c-interoperability.f90
A flang/test/Lower/host_module_variable_instantiation.f90
A flang/test/Lower/proc_pointer_hidden_by_generic.f90
Log Message:
-----------
[flang] only instantiate required symbols from parent modules (#193689)
Currently lowering is instantiating (creating
fir.address_of/hlfir.declare) for all module variables from host module
and submodules (for instance, in the new
host_module_variable_instantiation.f90 test, a fir.address_of was
generated the unused var2 inside the procedure foo).
This created a lot of noise (and in the worst cases, compile time
performance issues), and also some extra complexity at least for OpenACC
where the IR acc routine ended up referencing globals that are no
actually needed, creating the need to copy them on the GPU or to have
custom logic to ignore the globals.
This patch addresses this by doing a visit of the parse tree to detect
the required symbols and only instantiate those.
Commit: 13e98d834101efd1794cdd026377c508293ee21b
https://github.com/llvm/llvm-project/commit/13e98d834101efd1794cdd026377c508293ee21b
Author: Fangrui Song <i at maskray.me>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M bolt/include/bolt/Core/BinaryContext.h
M bolt/lib/Core/BinaryContext.cpp
M clang/lib/Parse/ParseStmtAsm.cpp
M clang/tools/driver/cc1as_main.cpp
M lldb/source/Plugins/Disassembler/LLVMC/DisassemblerLLVMC.cpp
M lldb/source/Plugins/Instruction/MIPS/EmulateInstructionMIPS.cpp
M lldb/source/Plugins/Instruction/MIPS64/EmulateInstructionMIPS64.cpp
M llvm/include/llvm/MC/MCContext.h
M llvm/include/llvm/Passes/CodeGenPassBuilder.h
M llvm/include/llvm/Target/TargetMachine.h
M llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
M llvm/lib/CodeGen/AsmPrinter/AsmPrinterInlineAsm.cpp
M llvm/lib/CodeGen/CodeGenTargetMachineImpl.cpp
M llvm/lib/CodeGen/MachineVerifier.cpp
M llvm/lib/CodeGen/ShrinkWrap.cpp
M llvm/lib/CodeGen/TargetFrameLoweringImpl.cpp
M llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp
M llvm/lib/CodeGen/TargetPassConfig.cpp
M llvm/lib/DWARFLinker/Classic/DWARFStreamer.cpp
M llvm/lib/DWARFLinker/Parallel/DWARFEmitterImpl.cpp
M llvm/lib/DWARFLinker/Parallel/DebugLineSectionEmitter.h
M llvm/lib/DebugInfo/LogicalView/Readers/LVBinaryReader.cpp
M llvm/lib/ExecutionEngine/RuntimeDyld/RuntimeDyldChecker.cpp
M llvm/lib/MC/MCContext.cpp
M llvm/lib/MC/MCDisassembler/Disassembler.cpp
M llvm/lib/Object/ModuleSymbolTable.cpp
M llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
M llvm/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp
M llvm/lib/Target/AArch64/AArch64MachineFunctionInfo.cpp
M llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
M llvm/lib/Target/AMDGPU/AMDGPUMCInstLower.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/ARC/ARCInstrInfo.cpp
M llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
M llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp
M llvm/lib/Target/ARM/ARMFrameLowering.cpp
M llvm/lib/Target/ARM/ARMSubtarget.cpp
M llvm/lib/Target/ARM/ARMTargetObjectFile.cpp
M llvm/lib/Target/ARM/Thumb2SizeReduction.cpp
M llvm/lib/Target/AVR/AVRInstrInfo.cpp
M llvm/lib/Target/CSKY/CSKYInstrInfo.cpp
M llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
M llvm/lib/Target/LoongArch/LoongArchInstrInfo.cpp
M llvm/lib/Target/M68k/M68kMCInstLower.cpp
M llvm/lib/Target/MSP430/MSP430InstrInfo.cpp
M llvm/lib/Target/Mips/MipsInstrInfo.cpp
M llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
M llvm/lib/Target/Sparc/SparcInstrInfo.cpp
M llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyCFGStackify.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyExceptionInfo.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyFrameLowering.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyLateEHPrepare.cpp
M llvm/lib/Target/X86/X86CodeGenPassBuilder.cpp
M llvm/lib/Target/X86/X86FastISel.cpp
M llvm/lib/Target/X86/X86FrameLowering.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86InstrInfo.cpp
M llvm/lib/Target/X86/X86MCInstLower.cpp
M llvm/lib/Target/X86/X86TargetMachine.cpp
M llvm/lib/Target/Xtensa/XtensaInstrInfo.cpp
M llvm/tools/llvm-cfi-verify/lib/FileAnalysis.cpp
M llvm/tools/llvm-dwp/llvm-dwp.cpp
M llvm/tools/llvm-exegesis/lib/DisassemblerHelper.cpp
M llvm/tools/llvm-exegesis/lib/SnippetFile.cpp
M llvm/tools/llvm-jitlink/llvm-jitlink.cpp
M llvm/tools/llvm-mc-assemble-fuzzer/llvm-mc-assemble-fuzzer.cpp
M llvm/tools/llvm-mc/llvm-mc.cpp
M llvm/tools/llvm-mca/llvm-mca.cpp
M llvm/tools/llvm-ml/Disassembler.cpp
M llvm/tools/llvm-ml/llvm-ml.cpp
M llvm/tools/llvm-objdump/MachODump.cpp
M llvm/tools/llvm-objdump/llvm-objdump.cpp
M llvm/tools/llvm-profgen/ProfiledBinary.cpp
M llvm/tools/llvm-rtdyld/llvm-rtdyld.cpp
M llvm/tools/sancov/sancov.cpp
M llvm/unittests/CodeGen/MachineInstrTest.cpp
M llvm/unittests/CodeGen/MachineOperandTest.cpp
M llvm/unittests/DebugInfo/DWARF/DWARFExpressionCopyBytesTest.cpp
M llvm/unittests/DebugInfo/DWARF/DwarfGenerator.cpp
M llvm/unittests/MC/AMDGPU/Disassembler.cpp
M llvm/unittests/MC/DwarfDebugFrameCIE.cpp
M llvm/unittests/MC/DwarfLineTableHeaders.cpp
M llvm/unittests/MC/DwarfLineTables.cpp
M llvm/unittests/MC/SystemZ/SystemZAsmLexerTest.cpp
M llvm/unittests/MC/SystemZ/SystemZMCDisassemblerTest.cpp
M llvm/unittests/MC/X86/X86MCDisassemblerTest.cpp
M llvm/unittests/Target/AArch64/AArch64InstPrinterTest.cpp
M llvm/unittests/tools/llvm-mca/MCATestBase.cpp
M mlir/lib/Target/LLVM/ROCDL/Target.cpp
Log Message:
-----------
[MC] Take MCAsmInfo by reference in MCContext and TargetMachine. NFC (#194280)
Both MCContext::MCContext and TargetMachine::getMCAsmInfo treat
MCAsmInfo as a pointer that must be non-null. Make the contract
explicit:
* MCContext's constructor takes `const MCAsmInfo &MAI`.
* TargetMachine::getMCAsmInfo returns `const MCAsmInfo &`.
Make this change now since the MCContext ctor has recently been updated.
Commit: 796d2ec4165a063ab9d1512a769978313dc18bc7
https://github.com/llvm/llvm-project/commit/796d2ec4165a063ab9d1512a769978313dc18bc7
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-masked-load.ll
M llvm/test/CodeGen/LoongArch/lasx/vxi1-masks.ll
M llvm/test/CodeGen/NVPTX/i16x2-instructions.ll
M llvm/test/CodeGen/PowerPC/masked-sdiv.ll
M llvm/test/CodeGen/PowerPC/masked-srem.ll
M llvm/test/CodeGen/PowerPC/masked-udiv.ll
M llvm/test/CodeGen/PowerPC/masked-urem.ll
M llvm/test/CodeGen/RISCV/rvv/incorrect-extract-subvector-combine.ll
M llvm/test/CodeGen/X86/dag-topological-sort.ll
M llvm/test/CodeGen/X86/pr134602.ll
Log Message:
-----------
[DAG] visitAND - attempt to fold (and buildvector(), buildvector()) -> buildvector() (#193987)
See if we can fold all elements of an AND of buildvectors: AND(-1,X) -> X, AND(0,X) -> 0, etc.
Companion to ##183032
Commit: cab0c0dd79b20ae1114a0b40f6756ab6d7c3b70b
https://github.com/llvm/llvm-project/commit/cab0c0dd79b20ae1114a0b40f6756ab6d7c3b70b
Author: Varad Rahul Kamthe <133588066+varadk27 at users.noreply.github.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
M mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp
M mlir/test/Dialect/LLVMIR/nvvm.mlir
M mlir/test/Target/LLVMIR/nvvmir-invalid.mlir
M mlir/test/Target/LLVMIR/nvvmir.mlir
Log Message:
-----------
[MLIR][NVVM] Add movmatrix Op (#193995)
Add `movmatrix` to MLIR NVVM dialect, which moves a row-major matrix across all threads in a warp and writes the
transposed elements to the destination.
Commit: dc19e4b0b6c9a10633958046d2e27b597ba7e37e
https://github.com/llvm/llvm-project/commit/dc19e4b0b6c9a10633958046d2e27b597ba7e37e
Author: Hao Ren <123687754+moomoohorse321 at users.noreply.github.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M mlir/lib/Conversion/NVGPUToNVVM/NVGPUToNVVM.cpp
M mlir/test/Conversion/NVGPUToNVVM/nvgpu-to-nvvm.mlir
Log Message:
-----------
[mlir][NVGPUToNVVM] Support BF16 mma.sync lowering (#194203)
Let NVGPUToNVVM to recognize BF16 MMA operand element types
Pack `vector<2xbf16>` fragments to `i32` before emitting
`nvvm.mma.sync`.
This matches the PTX operand encoding for `m16n8k16` BF16 MMA
instructions.
Add a conversion test for `nvgpu.mma.sync` `bf16xbf16` to `f32`
lowering.
Co-authored-by: Hao Ren <rhao8608 at gmail.com>
Commit: 2c39855fb790df3f75c9272311b6a8ecbb603a17
https://github.com/llvm/llvm-project/commit/2c39855fb790df3f75c9272311b6a8ecbb603a17
Author: David Sherwood <david.sherwood at arm.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
A llvm/test/CodeGen/AArch64/sanitize_vec_pow.ll
Log Message:
-----------
[AArch64] Sanitise pow inputs using a target DAG combine (#192958)
Sometimes we see LLVM IR like this:
%pow = call fast <4 x float> @llvm.pow.v4f32(...)
%fcmp = fcmp fast ...
%res = select <4 x i1> %fcmp, <4 x float> %val, <4 x float> %pow
where the pow intrinsic is called unconditionally, but only certain
lanes of the result are used. In fact, LLVM actively encourages code
like this due to the intrinsic being marked as safe to speculatively
execute. However, we know when using certain vector libraries like
ArmPL that this can be very costly if the unused lanes would take
the pow call down an expensive path. For example, if an input to
pow is a special value (inf, NaN, -0) then it triggers slow special
case handling, and ultimately the result is going to be ignored
anyway. For this reason we prefer to sanitise the pow input to
use 'safe' values when we know the result is going to be discarded.
The above example LLVM IR would then look like
%fcmp = fcmp fast ...
%sel = select <4 x i1>, <4 x float> splat(float 1.0), ...
%pow = call fast <4 x float> @llvm.pow.v4f32(<4 x float> %sel, ...)
%res = select <4 x i1> %fcmp, <4 x float> %val, <4 x float> %pow
where the value 1.0 is chosen due to the fact pow is known to always
return 1.0 for all powers.
Commit: 6b25ae4fed5f7bd75c2b1bc011aa3d5de3bd29c2
https://github.com/llvm/llvm-project/commit/6b25ae4fed5f7bd75c2b1bc011aa3d5de3bd29c2
Author: Fangrui Song <i at maskray.me>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M clang-tools-extra/clangd/Config.h
M clang/lib/StaticAnalyzer/Checkers/WebKit/PtrTypesSemantics.h
M llvm/include/llvm/ADT/FoldingSet.h
M llvm/include/llvm/ADT/STLExtras.h
M llvm/include/llvm/ADT/StableHashing.h
M llvm/include/llvm/ExecutionEngine/Orc/WaitingOnGraph.h
M llvm/lib/Support/FoldingSet.cpp
M llvm/unittests/Support/xxhashTest.cpp
Log Message:
-----------
[ADT] Fix IWYU for hashing-adjacent files (#194297)
Add explicit includes so these files keep building after we trim
transitive includes from xxhash.h.
For example, FoldingSet.cpp calls llvm::uninitialized_copy, which is
declared in llvm/ADT/STLExtras.h and today reaches the file only
transitively.
Also drop the vestigial `#include "llvm/ADT/Hashing.h"` from
llvm/ADT/STLExtras.h — no name from Hashing.h is used there.
Commit: 3d893f3e232236749ed1988667d039369b3c98bf
https://github.com/llvm/llvm-project/commit/3d893f3e232236749ed1988667d039369b3c98bf
Author: David Sherwood <david.sherwood at arm.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M llvm/test/Transforms/LoopVectorize/AArch64/masked-call.ll
M llvm/test/Transforms/LoopVectorize/AArch64/wider-VF-for-callinst.ll
M llvm/test/Transforms/LoopVectorize/hints-trans.ll
M llvm/test/Transforms/LoopVectorize/scalable-trunc-min-bitwidth.ll
Log Message:
-----------
[LV][NFC] Remove instsimplify pass run from all tests (#193722)
The instsimplify pass was only giving minor incidental improvements that
aren't essential to what is being tested.
Commit: 7189c4bb83d90c383741a9480fceca9c7bf74b27
https://github.com/llvm/llvm-project/commit/7189c4bb83d90c383741a9480fceca9c7bf74b27
Author: David Sherwood <david.sherwood at arm.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M llvm/test/CodeGen/AArch64/veclib-llvm.pow.ll
Log Message:
-----------
[AArch64][NFC] Fix veclib-llvm.pow.ll test to run all pre-isel passes (#193996)
Commit: 89894b67484694aeaaec9c6bac6a09d71c347e6f
https://github.com/llvm/llvm-project/commit/89894b67484694aeaaec9c6bac6a09d71c347e6f
Author: Pavel Labath <pavel at labath.sk>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M libc/hdr/types/CMakeLists.txt
A libc/hdr/types/struct_cmsghdr.h
M libc/include/CMakeLists.txt
M libc/include/llvm-libc-macros/linux/sys-socket-macros.h
M libc/include/llvm-libc-types/CMakeLists.txt
A libc/include/llvm-libc-types/struct_cmsghdr.h
M libc/include/sys/socket.yaml
M libc/test/src/sys/socket/linux/CMakeLists.txt
M libc/test/src/sys/socket/linux/sendmsg_recvmsg_test.cpp
Log Message:
-----------
[libc] Add struct cmsghdr and associated macros (#193756)
The macros are the main source of subtlety. The interesting aspects are:
- some implementations CMSG_ALIGN the size of struct cmsghdr, but this
is a noop. Instead of doing that, I added an assertion in the test.
- POSIX permits CMSG_NXTHDR to return null if the buffer has no space
for the data array, and this behavior differs between implementations.
This implementation does not do that in order to match CMSG_FIRSTHDR,
which doesn't have such an option.
- some implementations redirect the CMSG_NXTHDR macro to an (extern or
static inline) function. I implemented this inside the macro to avoid
having to define a (private ?) entry point for that function.
---------
Co-authored-by: Jeff Bailey <jbailey at raspberryginger.com>
Commit: 166c2418cf3e9c976f59e079e6a3400cc3c44c4b
https://github.com/llvm/llvm-project/commit/166c2418cf3e9c976f59e079e6a3400cc3c44c4b
Author: Adrian Kuegel <akuegel at google.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
Log Message:
-----------
[Bazel] Add linkopts to adjust for changes in 9ec6788 (#194314)
We need to link against crypt32.lib to avoid linker errors on Windows.
Commit: 1fee6a1e04de55ec218f9f38cbf2f60fc43acd26
https://github.com/llvm/llvm-project/commit/1fee6a1e04de55ec218f9f38cbf2f60fc43acd26
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M clang/lib/AST/ByteCode/Interp.cpp
M clang/lib/AST/ByteCode/Interp.h
M clang/test/AST/ByteCode/new-delete.cpp
Log Message:
-----------
[clang][bytecode] Ignore GetPtrDerivedPop on non-record pointers (#194005)
Now that we do this for `GetPtrBase`, we need to do it here, too. This
broke in the attached test case, but fully fixing it requires some
seemingly unrelated changes to `delete` handling.
Commit: 521f55348a345952522b2ad14f9b4885c48a3f86
https://github.com/llvm/llvm-project/commit/521f55348a345952522b2ad14f9b4885c48a3f86
Author: forking-google-bazel-bot[bot] <265904573+forking-google-bazel-bot[bot]@users.noreply.github.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/test/src/sys/socket/BUILD.bazel
Log Message:
-----------
[Bazel] Fixes 89894b6 (#194321)
This fixes 89894b67484694aeaaec9c6bac6a09d71c347e6f.
Co-authored-by: Google Bazel Bot <google-bazel-bot at google.com>
Commit: 3aed0816fed922391ed0638f67ea8b6d09bebbdc
https://github.com/llvm/llvm-project/commit/3aed0816fed922391ed0638f67ea8b6d09bebbdc
Author: Usha Gupta <usha.gupta at arm.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M llvm/lib/Transforms/AggressiveInstCombine/AggressiveInstCombine.cpp
A llvm/test/Transforms/AggressiveInstCombine/fold-split-ctlz.ll
A llvm/test/Transforms/AggressiveInstCombine/fold-split-cttz.ll
Log Message:
-----------
[AggressiveInstCombine] Fold split-width i32 cttz/ctlz patterns into wide i64 intrinsics (#192296)
This patch teaches `AggressiveInstCombine ` to recognize and fold common split-width i32 cttz/ctlz intrinsic calls into a single full-width i64
cttz/ctlz intrinsic.
For ex:
```
define i32 @src(i64 %val) {
%lo = trunc i64 %val to i32
%cmp = icmp eq i32 %lo, 0
%shr = lshr i64 %val, 32
%hi = trunc i64 %shr to i32
%cttz_hi = call i32 @llvm.cttz.i32(i32 %hi, i1 true)
%hi_plus32 = or i32 %cttz_hi, 32
%cttz_lo = call i32 @llvm.cttz.i32(i32 %lo, i1 true)
%result = select i1 %cmp, i32 %hi_plus32, i32 %cttz_lo
ret i32 %result
}
define i32 @tgt(i64 %val) {
%cttz64 = call i64 @llvm.cttz.i64(i64 %val, i1 false)
%result = trunc i64 %cttz64 to i32
ret i32 %result
}
```
and similarly for ctlz intrinsic.
Alive proof for the 2 folds added by this patch.
cttz:
https://alive2.llvm.org/ce/z/-s14-s
ctlz:
https://alive2.llvm.org/ce/z/WfQepH
Commit: 295a7a9f75b839394b49d4ec59b2df33b30cd4fd
https://github.com/llvm/llvm-project/commit/295a7a9f75b839394b49d4ec59b2df33b30cd4fd
Author: Julian Brown <julian.brown at amd.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M openmp/runtime/src/kmp_taskdeps.cpp
M openmp/runtime/src/kmp_tasking.cpp
Log Message:
-----------
[OpenMP] Make loop index unsigned in __kmpc_omp_task_with_deps/__kmp_omp_task
NFC.
Co-authored-by: Adrian Munera <adrian.munera at bsc.es>
Reviewers: ro-i
Pull Request: https://github.com/llvm/llvm-project/pull/194044
Commit: b4701103890bb918296e232b4a1ba23ffeb7a2f7
https://github.com/llvm/llvm-project/commit/b4701103890bb918296e232b4a1ba23ffeb7a2f7
Author: Julian Brown <julian.brown at amd.com>
Date: 2026-04-27 (Mon, 27 Apr 2026)
Changed paths:
M .github/workflows/containers/github-action-ci-windows/Dockerfile
M .github/workflows/containers/github-action-ci/Dockerfile
M .github/workflows/containers/libc/Dockerfile
M .github/workflows/issue-subscriber.yml
M .github/workflows/libcxx-build-and-test.yaml
M .github/workflows/new-issues.yml
M .github/workflows/new-prs.yml
M .github/workflows/pr-subscriber.yml
M .github/workflows/release-asset-audit.yml
M bolt/docs/profiles.md
M bolt/include/bolt/Core/BinaryContext.h
M bolt/include/bolt/Profile/DataAggregator.h
M bolt/lib/Core/BinaryContext.cpp
M bolt/lib/Passes/JTFootprintReduction.cpp
M bolt/lib/Profile/DataAggregator.cpp
M bolt/lib/Profile/DataReader.cpp
M bolt/test/AArch64/unsupported-passes.test
A bolt/test/X86/Inputs/pre-aggregated-bad-hex.txt
A bolt/test/X86/Inputs/pre-aggregated-bad-type.txt
A bolt/test/X86/pre-aggregated-records.s
M bolt/unittests/Profile/DataAggregator.cpp
M clang-tools-extra/clang-change-namespace/tool/ClangChangeNamespace.cpp
M clang-tools-extra/clang-include-fixer/find-all-symbols/tool/FindAllSymbolsMain.cpp
M clang-tools-extra/clang-include-fixer/tool/ClangIncludeFixer.cpp
M clang-tools-extra/clang-move/tool/ClangMove.cpp
M clang-tools-extra/clang-reorder-fields/tool/ClangReorderFields.cpp
M clang-tools-extra/clangd/Config.h
M clang-tools-extra/clangd/ModulesBuilder.cpp
M clang-tools-extra/clangd/unittests/PrerequisiteModulesTest.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
A clang-tools-extra/test/clang-change-namespace/argument-parsing-error-no-abort.cpp
A clang-tools-extra/test/clang-include-fixer/argument-parsing-error-no-abort.cpp
A clang-tools-extra/test/clang-include-fixer/find-all-symbols/argument-parsing-error-no-abort.cpp
A clang-tools-extra/test/clang-move/argument-parsing-error-no-abort.cpp
A clang-tools-extra/test/clang-reorder-fields/argument-parsing-error-no-abort.cpp
M clang/docs/ReleaseNotes.rst
M clang/include/clang/AST/OpenMPClause.h
M clang/include/clang/AST/TypeBase.h
M clang/include/clang/Analysis/Analyses/LifetimeSafety/Facts.h
M clang/include/clang/Analysis/Analyses/LifetimeSafety/FactsGenerator.h
M clang/include/clang/Analysis/Analyses/LifetimeSafety/LifetimeSafety.h
M clang/include/clang/Analysis/Analyses/LifetimeSafety/Loans.h
M clang/include/clang/Basic/BuiltinsAMDGPU.td
M clang/include/clang/Basic/DiagnosticGroups.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Basic/RISCVVTypes.def
M clang/include/clang/Basic/arm_sve.td
M clang/include/clang/Basic/riscv_vector.td
M clang/include/clang/CIR/Dialect/Builder/CIRBaseBuilder.h
M clang/include/clang/CIR/Dialect/IR/CIRAttrs.td
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/include/clang/DependencyScanning/DependencyScanningService.h
M clang/include/clang/DependencyScanning/InProcessModuleCache.h
M clang/include/clang/Sema/Initialization.h
M clang/include/clang/Sema/Sema.h
M clang/include/clang/Serialization/ASTBitCodes.h
M clang/include/clang/Tooling/CommonOptionsParser.h
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ByteCode/Context.cpp
M clang/lib/AST/ByteCode/Context.h
M clang/lib/AST/ByteCode/Disasm.cpp
M clang/lib/AST/ByteCode/Integral.h
M clang/lib/AST/ByteCode/Interp.cpp
M clang/lib/AST/ByteCode/Interp.h
M clang/lib/AST/ByteCode/Pointer.cpp
M clang/lib/AST/ByteCode/Pointer.h
M clang/lib/AST/ByteCode/Primitives.h
M clang/lib/AST/ExprConstant.cpp
M clang/lib/AST/StmtProfile.cpp
M clang/lib/Analysis/LifetimeSafety/Checker.cpp
M clang/lib/Analysis/LifetimeSafety/FactsGenerator.cpp
M clang/lib/Analysis/LifetimeSafety/Loans.cpp
M clang/lib/Basic/OffloadArch.cpp
M clang/lib/Basic/Targets/AVR.h
M clang/lib/Basic/Targets/SPIR.cpp
M clang/lib/CIR/CodeGen/CIRGenAtomic.cpp
M clang/lib/CIR/CodeGen/CIRGenBuilder.cpp
M clang/lib/CIR/CodeGen/CIRGenBuiltin.cpp
M clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp
M clang/lib/CIR/CodeGen/CIRGenBuiltinAMDGPU.cpp
M clang/lib/CIR/CodeGen/CIRGenCXX.cpp
M clang/lib/CIR/CodeGen/CIRGenCall.cpp
M clang/lib/CIR/CodeGen/CIRGenCoroutine.cpp
M clang/lib/CIR/CodeGen/CIRGenDecl.cpp
M clang/lib/CIR/CodeGen/CIRGenDeclCXX.cpp
M clang/lib/CIR/CodeGen/CIRGenExpr.cpp
M clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
M clang/lib/CIR/CodeGen/CIRGenModule.cpp
M clang/lib/CIR/CodeGen/CIRGenModule.h
M clang/lib/CIR/CodeGen/CIRGenTypes.cpp
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
M clang/lib/CIR/Dialect/Transforms/CXXABILowering.cpp
M clang/lib/CIR/Dialect/Transforms/FlattenCFG.cpp
M clang/lib/CIR/Dialect/Transforms/LoweringPrepare.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
M clang/lib/CodeGen/CGCall.cpp
M clang/lib/CodeGen/CGExprAgg.cpp
M clang/lib/CodeGen/CGExprConstant.cpp
M clang/lib/CodeGen/CGOpenMPRuntime.cpp
M clang/lib/CodeGen/CGOpenMPRuntime.h
M clang/lib/CodeGen/CGStmtOpenMP.cpp
M clang/lib/CodeGen/CodeGenFunction.h
M clang/lib/CodeGen/ItaniumCXXABI.cpp
M clang/lib/CodeGen/MicrosoftCXXABI.cpp
M clang/lib/CodeGen/TargetInfo.h
M clang/lib/CodeGen/Targets/AMDGPU.cpp
M clang/lib/CodeGen/Targets/SPIR.cpp
M clang/lib/DependencyScanning/InProcessModuleCache.cpp
M clang/lib/Driver/Driver.cpp
M clang/lib/Driver/ToolChain.cpp
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/Driver/ToolChains/Darwin.cpp
M clang/lib/Parse/ParseStmtAsm.cpp
M clang/lib/Sema/SemaAMDGPU.cpp
M clang/lib/Sema/SemaDecl.cpp
M clang/lib/Sema/SemaDeclCXX.cpp
M clang/lib/Sema/SemaLifetimeSafety.h
M clang/lib/Sema/SemaOpenMP.cpp
M clang/lib/Sema/SemaRISCV.cpp
M clang/lib/Sema/SemaType.cpp
M clang/lib/Serialization/ASTReader.cpp
M clang/lib/Serialization/ModuleCache.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/PtrTypesSemantics.h
M clang/lib/Support/RISCVVIntrinsicUtils.cpp
M clang/test/AST/ByteCode/c.c
M clang/test/AST/ByteCode/const-eval.c
M clang/test/AST/ByteCode/cxx23.cpp
M clang/test/AST/ByteCode/functions.cpp
A clang/test/AST/ByteCode/libcxx/constexpr-unknown-getbase.cpp
A clang/test/AST/ByteCode/libcxx/static-reference-load.cpp
M clang/test/AST/ByteCode/new-delete.cpp
M clang/test/AST/ByteCode/records.cpp
M clang/test/AST/ByteCode/unions.cpp
M clang/test/CIR/CodeGen/amdgpu-array-addrspace.cpp
A clang/test/CIR/CodeGen/annotate-attribute.c
A clang/test/CIR/CodeGen/annotate-attribute.cpp
M clang/test/CIR/CodeGen/array-init-loop-exprs.cpp
M clang/test/CIR/CodeGen/array.cpp
M clang/test/CIR/CodeGen/atomic.c
M clang/test/CIR/CodeGen/binassign.c
M clang/test/CIR/CodeGen/complex.cpp
M clang/test/CIR/CodeGen/coro-task.cpp
A clang/test/CIR/CodeGen/fixed-point-literal.c
M clang/test/CIR/CodeGen/new-delete-deactivation.cpp
M clang/test/CIR/CodeGen/new-delete.cpp
M clang/test/CIR/CodeGen/new.cpp
M clang/test/CIR/CodeGen/no-odr-use.cpp
A clang/test/CIR/CodeGen/no-proto-then-def.c
M clang/test/CIR/CodeGen/no-prototype.c
A clang/test/CIR/CodeGen/nonnull.c
M clang/test/CIR/CodeGen/paren-list-agg-init.cpp
M clang/test/CIR/CodeGen/pointers.cpp
A clang/test/CIR/CodeGen/self-assign.c
M clang/test/CIR/CodeGen/static-local.cpp
M clang/test/CIR/CodeGen/union.c
M clang/test/CIR/CodeGen/vector-ext-element.cpp
M clang/test/CIR/CodeGen/vla.c
M clang/test/CIR/CodeGenBuiltins/builtin-constant-p.c
M clang/test/CIR/CodeGenBuiltins/builtin-new-delete.cpp
M clang/test/CIR/CodeGenCXX/new-array-init.cpp
A clang/test/CIR/CodeGenHIP/builtins-amdgcn.hip
M clang/test/CIR/CodeGenOpenACC/combined-copy.c
A clang/test/CIR/IR/annotation.cir
M clang/test/CIR/IR/await.cir
A clang/test/CIR/IR/co-return.cir
A clang/test/CIR/IR/coro-body.cir
M clang/test/CIR/IR/func.cir
A clang/test/CIR/IR/invalid-annotation.cir
M clang/test/CIR/IR/invalid-await.cir
A clang/test/CIR/IR/invalid-co-return.cir
M clang/test/CIR/IR/invalid-copy.cir
A clang/test/CIR/IR/invalid-coro-body.cir
M clang/test/CIR/IR/invalid-static-local.cir
M clang/test/CIR/IR/static-local.cir
A clang/test/CIR/Transforms/cast-bitcast-funcptr-roundtrip-fold.cir
M clang/test/CXX/drs/cwg16xx.cpp
M clang/test/CXX/drs/cwg18xx.cpp
M clang/test/CXX/drs/cwg25xx.cpp
A clang/test/ClangScanDeps/p1689-mf-nested-dir.c
M clang/test/CodeGen/AArch64/neon-intrinsics.c
M clang/test/CodeGen/AArch64/neon/intrinsics.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfofp8min/non-policy/non-overloaded/vfncvt.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfofp8min/non-policy/non-overloaded/vfncvtbf16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfofp8min/non-policy/non-overloaded/vfwcvtbf16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfofp8min/non-policy/overloaded/vfncvt.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfofp8min/non-policy/overloaded/vfncvtbf16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfofp8min/non-policy/overloaded/vfwcvtbf16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfofp8min/policy/non-overloaded/vfncvt.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfofp8min/policy/non-overloaded/vfncvtbf16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfofp8min/policy/non-overloaded/vfwcvtbf16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfofp8min/policy/overloaded/vfncvt.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfofp8min/policy/overloaded/vfncvtbf16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfofp8min/policy/overloaded/vfwcvtbf16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-handcrafted/rvv-intrinsic-datatypes.cpp
A clang/test/CodeGen/avr/issue-176830.c
M clang/test/CodeGenCXX/no-elide-constructors.cpp
A clang/test/CodeGenCXX/riscv-mangle-rvv-vectors.cpp
A clang/test/CodeGenHIP/sret-lifetime-markers.cpp
M clang/test/CodeGenHIP/sret-nontrivial-copyable.hip
M clang/test/CodeGenHIP/store-addr-space.hip
R clang/test/CodeGenHLSL/GlobalDestructors.hlsl
R clang/test/CodeGenHLSL/inline-constructors.hlsl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx12-err.cl
A clang/test/CodeGenOpenCL/builtins-amdgcn-smfmac-err.cl
A clang/test/Driver/Inputs/empty_tree/.keep
A clang/test/Driver/Inputs/multilib_linux_tree/usr/bin/.keep
A clang/test/Driver/Inputs/multilib_linux_tree/usr/include/x86_64-unknown-linux-gnu/.keep
A clang/test/Driver/Inputs/multilib_linux_tree/usr/include/x86_64-unknown-linux-gnu/debug/.keep
A clang/test/Driver/Inputs/multilib_linux_tree/usr/include/x86_64-unknown-linux-gnu/noexcept/.keep
A clang/test/Driver/Inputs/multilib_linux_tree/usr/include/x86_64-unknown-linux-gnu/release/.keep
A clang/test/Driver/Inputs/multilib_mingw_tree/bin/.keep
A clang/test/Driver/Inputs/multilib_mingw_tree/include/x86_64-w64-windows-gnu/.keep
A clang/test/Driver/Inputs/multilib_mingw_tree/include/x86_64-w64-windows-gnu/debug/.keep
A clang/test/Driver/Inputs/multilib_mingw_tree/include/x86_64-w64-windows-gnu/noexcept/.keep
A clang/test/Driver/Inputs/multilib_mingw_tree/include/x86_64-w64-windows-gnu/release/.keep
A clang/test/Driver/Inputs/serenity_tree/usr/lib/crtbeginS.o
A clang/test/Driver/Inputs/serenity_tree/usr/lib/crtendS.o
M clang/test/Driver/Xarch.c
M clang/test/Driver/aarch64-v97a.c
M clang/test/Driver/basic-block-address-map.c
M clang/test/Driver/darwin-objc-selector-stubs.m
M clang/test/Driver/linux-multilib.yaml
M clang/test/Driver/mingw-multilib.yaml
M clang/test/Driver/print-supported-extensions-aarch64.c
M clang/test/Driver/serenity.cpp
M clang/test/Misc/languageOptsOpenCL.cl
R clang/test/Modules/callable-require-clause-merge.cppm
M clang/test/Modules/polluted-operator.cppm
M clang/test/OpenMP/amdgcn_sret_ctor.cpp
A clang/test/OpenMP/taskgraph_taskwait_nodeps.cpp
M clang/test/PCH/pragma-redefine-extname.c
M clang/test/PCH/pragma-redefine-extname.h
A clang/test/Refactor/argument-parsing-error-no-abort.cpp
M clang/test/Sema/Inputs/lifetime-analysis.h
M clang/test/Sema/redefine_extname.cpp
M clang/test/Sema/riscv-types.c
M clang/test/Sema/static-init.c
M clang/test/Sema/warn-lifetime-safety-suggestions.cpp
M clang/test/Sema/warn-lifetime-safety.cpp
A clang/test/SemaHLSL/Constructors.hlsl
M clang/test/SemaHLSL/GlobalConstructors.hlsl
A clang/test/SemaOpenCL/zero-length-array.cl
A clang/test/Tooling/argument-parsing-error-no-abort.cpp
M clang/test/lit.cfg.py
M clang/tools/clang-check/ClangCheck.cpp
M clang/tools/clang-refactor/ClangRefactor.cpp
M clang/tools/clang-scan-deps/ClangScanDeps.cpp
M clang/tools/clang-scan-deps/Opts.td
M clang/tools/driver/cc1as_main.cpp
M clang/utils/TableGen/ClangOptionDocEmitter.cpp
M clang/utils/TableGen/HLSLEmitter.cpp
M clang/utils/TableGen/RISCVVEmitter.cpp
M clang/www/cxx_dr_status.html
M clang/www/cxx_status.html
M compiler-rt/cmake/Modules/AllSupportedArchDefs.cmake
M compiler-rt/include/sanitizer/asan_interface.h
M compiler-rt/lib/asan/asan_errors.h
M compiler-rt/lib/asan/asan_interceptors_memintrinsics.h
M compiler-rt/lib/asan/asan_interface.inc
M compiler-rt/lib/asan/asan_interface_internal.h
M compiler-rt/lib/asan/asan_report.cpp
M compiler-rt/lib/asan/asan_report.h
M compiler-rt/lib/builtins/fp_compare_impl.inc
M compiler-rt/lib/sanitizer_common/sanitizer_allocator_dlsym.h
M compiler-rt/lib/sanitizer_common/sanitizer_internal_defs.h
M compiler-rt/lib/sanitizer_common/sanitizer_platform_limits_posix.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_posix.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_redefine_builtins.h
M compiler-rt/lib/tysan/tysan.cpp
M compiler-rt/lib/tysan/tysan_platform.h
M compiler-rt/lib/ubsan_minimal/ubsan_minimal_handlers.cpp
M compiler-rt/test/asan/TestCases/debug_double_free.cpp
A compiler-rt/test/asan/TestCases/debug_invalid_pointer_pair.cpp
A compiler-rt/test/asan/TestCases/debug_memcpy_overlap.cpp
A compiler-rt/test/asan/TestCases/debug_negative_size.cpp
M compiler-rt/test/asan/TestCases/debug_report.cpp
M compiler-rt/test/profile/instrprof-tmpdir.c
M compiler-rt/test/sanitizer_common/TestCases/Linux/pthread_join.cpp
M flang-rt/include/flang-rt/runtime/format-implementation.h
M flang-rt/include/flang-rt/runtime/format.h
M flang-rt/lib/runtime/edit-input.cpp
M flang-rt/lib/runtime/edit-output.cpp
M flang-rt/unittests/Runtime/Format.cpp
M flang-rt/unittests/Runtime/NumericalFormatTest.cpp
M flang/docs/Directives.md
M flang/docs/F202X.md
M flang/examples/FeatureList/FeatureList.cpp
M flang/include/flang/Common/format.h
M flang/include/flang/Lower/OpenMP.h
M flang/include/flang/Lower/PFTBuilder.h
M flang/include/flang/Optimizer/Dialect/FIROps.td
M flang/include/flang/Optimizer/Transforms/Passes.td
M flang/include/flang/Parser/dump-parse-tree.h
M flang/include/flang/Parser/format-specification.h
M flang/include/flang/Parser/openmp-utils.h
M flang/include/flang/Parser/parse-tree.h
M flang/include/flang/Semantics/tools.h
M flang/lib/Frontend/CompilerInvocation.cpp
M flang/lib/Lower/Bridge.cpp
M flang/lib/Lower/OpenMP/DataSharingProcessor.cpp
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Lower/PFTBuilder.cpp
M flang/lib/Optimizer/Builder/IntrinsicCall.cpp
M flang/lib/Optimizer/CodeGen/CodeGen.cpp
M flang/lib/Optimizer/Passes/Pipelines.cpp
M flang/lib/Optimizer/Transforms/AddDebugInfo.cpp
M flang/lib/Optimizer/Transforms/StackArrays.cpp
M flang/lib/Parser/Fortran-parsers.cpp
M flang/lib/Parser/io-parsers.cpp
M flang/lib/Parser/openmp-parsers.cpp
M flang/lib/Parser/program-parsers.cpp
M flang/lib/Parser/unparse.cpp
M flang/lib/Semantics/assignment.cpp
M flang/lib/Semantics/assignment.h
M flang/lib/Semantics/canonicalize-directives.cpp
M flang/lib/Semantics/canonicalize-omp.cpp
M flang/lib/Semantics/check-omp-loop.cpp
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/check-omp-structure.h
M flang/lib/Semantics/expression.cpp
M flang/lib/Semantics/resolve-directives.cpp
M flang/lib/Semantics/resolve-names.cpp
M flang/lib/Semantics/rewrite-parse-tree.cpp
M flang/lib/Semantics/tools.cpp
M flang/lib/Semantics/unparse-with-symbols.cpp
M flang/module/__fortran_builtins.f90
M flang/test/Driver/do_concurrent_to_omp_cli.f90
A flang/test/Fir/fake_use-codegen.fir
A flang/test/Lower/Intrinsics/c_devptr_eq_ne.f90
M flang/test/Lower/OpenMP/Todo/omp-default-clause-inner-loop.f90
M flang/test/Lower/OpenMP/target-map-complex.f90
M flang/test/Lower/c-interoperability.f90
A flang/test/Lower/host_module_variable_instantiation.f90
A flang/test/Lower/inlinealways-directive.f90
M flang/test/Lower/namelist-common-block.f90
M flang/test/Lower/nested-where.f90
M flang/test/Lower/nullify.f90
M flang/test/Lower/optional-value-caller.f90
M flang/test/Lower/pointer-args-caller.f90
M flang/test/Lower/pointer-assignments.f90
M flang/test/Lower/pointer-association-polymorphic.f90
M flang/test/Lower/pointer-default-init.f90
M flang/test/Lower/pointer-disassociate.f90
M flang/test/Lower/pre-fir-tree03.f90
A flang/test/Lower/proc_pointer_hidden_by_generic.f90
M flang/test/Parser/OpenMP/bind-clause.f90
M flang/test/Parser/OpenMP/cross-label-do.f90
M flang/test/Parser/OpenMP/declare-mapper-unparse.f90
M flang/test/Parser/OpenMP/declare-reduction-combiner.f90
M flang/test/Parser/OpenMP/declare-reduction-multi.f90
M flang/test/Parser/OpenMP/declare-reduction-operator.f90
M flang/test/Parser/OpenMP/declare-reduction-unparse.f90
M flang/test/Parser/OpenMP/declare-target-indirect-tree.f90
M flang/test/Parser/OpenMP/declare-target-to-clause.f90
M flang/test/Parser/OpenMP/declare_target-device_type.f90
M flang/test/Parser/OpenMP/depth-clause.f90
M flang/test/Parser/OpenMP/do-interchange.f90
M flang/test/Parser/OpenMP/do-tile-size.f90
M flang/test/Parser/OpenMP/doacross-clause.f90
M flang/test/Parser/OpenMP/enter-automap-modifier.f90
M flang/test/Parser/OpenMP/fuse-looprange.f90
M flang/test/Parser/OpenMP/fuse01.f90
M flang/test/Parser/OpenMP/fuse02.f90
M flang/test/Parser/OpenMP/in-reduction-clause.f90
M flang/test/Parser/OpenMP/interchange-permutation.f90
M flang/test/Parser/OpenMP/interchange.f90
M flang/test/Parser/OpenMP/linear-clause.f90
M flang/test/Parser/OpenMP/loop-transformation-construct01.f90
M flang/test/Parser/OpenMP/loop-transformation-construct02.f90
M flang/test/Parser/OpenMP/loop-transformation-construct03.f90
M flang/test/Parser/OpenMP/loop-transformation-construct04.f90
M flang/test/Parser/OpenMP/loop-transformation-construct05.f90
M flang/test/Parser/OpenMP/masked-unparse.f90
M flang/test/Parser/OpenMP/master-unparse.f90
M flang/test/Parser/OpenMP/nonblock-do-nested-omp.f90
M flang/test/Parser/OpenMP/openmp6-directive-spellings.f90
M flang/test/Parser/OpenMP/order-clause01.f90
M flang/test/Parser/OpenMP/ordered-depend.f90
M flang/test/Parser/OpenMP/parallel-loop-unparse.f90
M flang/test/Parser/OpenMP/reduction-modifier.f90
M flang/test/Parser/OpenMP/target-loop-unparse.f90
M flang/test/Parser/OpenMP/taskloop.f90
M flang/test/Parser/OpenMP/threadset-clause.f90
M flang/test/Parser/OpenMP/tile-size.f90
M flang/test/Parser/OpenMP/tile.f90
M flang/test/Parser/OpenMP/transparent-clause.f90
M flang/test/Parser/OpenMP/unroll-full.f90
M flang/test/Parser/OpenMP/unroll-heuristic.f90
M flang/test/Parser/OpenMP/unroll-partial.f90
A flang/test/Parser/conditional-arg.f90
A flang/test/Parser/inlinealways-directive.f90
A flang/test/Semantics/OpenMP/branching-program-unit.f90
M flang/test/Semantics/OpenMP/parallel-master-goto.f90
M flang/test/Semantics/OpenMP/simd-only.f90
A flang/test/Semantics/conditional-arg.f90
A flang/test/Semantics/inlinealways-directive01.f90
A flang/test/Semantics/io19.f90
A flang/test/Transforms/debug-fake-use.fir
M flang/unittests/Semantics/OpenMPUtils.cpp
M libc/cmake/modules/prepare_libc_gpu_build.cmake
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/docs/CMakeLists.txt
M libc/docs/dev/undefined_behavior.rst
M libc/docs/headers/index.rst
M libc/hdr/types/CMakeLists.txt
A libc/hdr/types/struct_cmsghdr.h
M libc/include/CMakeLists.txt
M libc/include/llvm-libc-macros/linux/sys-socket-macros.h
M libc/include/llvm-libc-macros/pthread-macros.h
M libc/include/llvm-libc-types/CMakeLists.txt
A libc/include/llvm-libc-types/pthread_cond_t.h
A libc/include/llvm-libc-types/struct_cmsghdr.h
M libc/include/pthread.yaml
M libc/include/sys/socket.yaml
M libc/include/sys/types.yaml
M libc/include/wchar.yaml
M libc/shared/math.h
A libc/shared/math/ddivf128.h
A libc/shared/math/ddivl.h
A libc/shared/math/dmulf128.h
A libc/shared/math/dmull.h
A libc/shared/math/dsubf128.h
A libc/shared/math/dsubl.h
A libc/shared/math/fabs.h
A libc/shared/math/fabsbf16.h
A libc/shared/math/fabsf.h
A libc/shared/math/fabsf128.h
A libc/shared/math/fabsf16.h
A libc/shared/math/fabsl.h
A libc/shared/math/fdiv.h
A libc/shared/math/fdivf128.h
A libc/shared/math/fdivl.h
A libc/shared/math/fmaximum_mag_num.h
A libc/shared/math/fmaximum_mag_numbf16.h
A libc/shared/math/fmaximum_mag_numf.h
M libc/src/__support/FPUtil/BasicOperations.h
M libc/src/__support/FPUtil/generic/FMA.h
M libc/src/__support/FPUtil/generic/add_sub.h
M libc/src/__support/math/CMakeLists.txt
A libc/src/__support/math/ddivf128.h
A libc/src/__support/math/ddivl.h
A libc/src/__support/math/dmulf128.h
A libc/src/__support/math/dmull.h
A libc/src/__support/math/dsubf128.h
A libc/src/__support/math/dsubl.h
A libc/src/__support/math/fabs.h
A libc/src/__support/math/fabsbf16.h
A libc/src/__support/math/fabsf.h
A libc/src/__support/math/fabsf128.h
A libc/src/__support/math/fabsf16.h
A libc/src/__support/math/fabsl.h
M libc/src/__support/math/fdim.h
M libc/src/__support/math/fdimbf16.h
M libc/src/__support/math/fdimf.h
M libc/src/__support/math/fdimf128.h
M libc/src/__support/math/fdimf16.h
M libc/src/__support/math/fdiml.h
A libc/src/__support/math/fdiv.h
A libc/src/__support/math/fdivf128.h
A libc/src/__support/math/fdivl.h
A libc/src/__support/math/fmaximum_mag_num.h
A libc/src/__support/math/fmaximum_mag_numbf16.h
A libc/src/__support/math/fmaximum_mag_numf.h
M libc/src/__support/math_extras.h
M libc/src/__support/memory_size.h
M libc/src/__support/threads/CndVar.h
M libc/src/__support/threads/mutex.h
M libc/src/__support/threads/unix_mutex.h
M libc/src/math/generic/CMakeLists.txt
M libc/src/math/generic/ddivf128.cpp
M libc/src/math/generic/ddivl.cpp
M libc/src/math/generic/dmulf128.cpp
M libc/src/math/generic/dmull.cpp
M libc/src/math/generic/dsubf128.cpp
M libc/src/math/generic/dsubl.cpp
M libc/src/math/generic/fabs.cpp
M libc/src/math/generic/fabsbf16.cpp
M libc/src/math/generic/fabsf.cpp
M libc/src/math/generic/fabsf128.cpp
M libc/src/math/generic/fabsf16.cpp
M libc/src/math/generic/fabsl.cpp
M libc/src/math/generic/fdiv.cpp
M libc/src/math/generic/fdivf128.cpp
M libc/src/math/generic/fdivl.cpp
M libc/src/math/generic/fmaximum_mag_num.cpp
M libc/src/math/generic/fmaximum_mag_numbf16.cpp
M libc/src/math/generic/fmaximum_mag_numf.cpp
M libc/src/pthread/CMakeLists.txt
A libc/src/pthread/pthread_cond_broadcast.cpp
A libc/src/pthread/pthread_cond_broadcast.h
A libc/src/pthread/pthread_cond_clockwait.cpp
A libc/src/pthread/pthread_cond_clockwait.h
A libc/src/pthread/pthread_cond_destroy.cpp
A libc/src/pthread/pthread_cond_destroy.h
A libc/src/pthread/pthread_cond_init.cpp
A libc/src/pthread/pthread_cond_init.h
A libc/src/pthread/pthread_cond_signal.cpp
A libc/src/pthread/pthread_cond_signal.h
A libc/src/pthread/pthread_cond_timedwait.cpp
A libc/src/pthread/pthread_cond_timedwait.h
A libc/src/pthread/pthread_cond_utils.h
A libc/src/pthread/pthread_cond_wait.cpp
A libc/src/pthread/pthread_cond_wait.h
M libc/src/search/lfind.cpp
M libc/src/search/lsearch.cpp
M libc/src/wchar/CMakeLists.txt
A libc/src/wchar/wcscoll.cpp
A libc/src/wchar/wcscoll.h
M libc/test/CMakeLists.txt
M libc/test/include/CMakeLists.txt
M libc/test/integration/CMakeLists.txt
M libc/test/integration/src/pthread/CMakeLists.txt
A libc/test/integration/src/pthread/pthread_cond_test.cpp
M libc/test/lit.site.cfg.py.in
M libc/test/shared/CMakeLists.txt
M libc/test/shared/shared_math_constexpr_test.cpp
M libc/test/shared/shared_math_test.cpp
M libc/test/src/sys/socket/linux/CMakeLists.txt
M libc/test/src/sys/socket/linux/sendmsg_recvmsg_test.cpp
M libc/test/src/time/mktime_test.cpp
M libc/test/src/wchar/CMakeLists.txt
A libc/test/src/wchar/wcscoll_test.cpp
A libc/utils/docgen/dlfcn.yaml
A libc/utils/docgen/sys/select.yaml
A libc/utils/docgen/sys/uio.yaml
M libclc/CMakeLists.txt
M libclc/cmake/modules/CMakeDetermineCLCCompiler.cmake
M libclc/test/CMakeLists.txt
M libcxx/docs/FeatureTestMacroTable.rst
M libcxx/docs/ReleaseNotes/23.rst
M libcxx/docs/Status/Cxx23Papers.csv
M libcxx/docs/Status/Cxx2cPapers.csv
M libcxx/include/CMakeLists.txt
M libcxx/include/__assert
A libcxx/include/__ranges/stride_view.h
M libcxx/include/__utility/constant_wrapper.h
M libcxx/include/module.modulemap.in
M libcxx/include/ranges
M libcxx/include/span
M libcxx/include/version
M libcxx/modules/std/ranges.inc
A libcxx/test/libcxx/ranges/range.adaptors/range.stride.view/ctor.assert.pass.cpp
A libcxx/test/libcxx/ranges/range.adaptors/range.stride.view/iterator/dereference.assert.pass.cpp
A libcxx/test/libcxx/ranges/range.adaptors/range.stride.view/iterator/increment.assert.pass.cpp
A libcxx/test/libcxx/ranges/range.adaptors/range.stride.view/iterator/iterator.nodiscard.verify.cpp
A libcxx/test/libcxx/ranges/range.adaptors/range.stride.view/iterator/operator_plus_equal.assert.pass.cpp
A libcxx/test/libcxx/ranges/range.adaptors/range.stride.view/nodiscard.verify.cpp
M libcxx/test/libcxx/utilities/const.wrap.class/nodiscard.verify.cpp
M libcxx/test/std/containers/views/views.span/span.cons/array.pass.cpp
R libcxx/test/std/containers/views/views.span/span.cons/initializer_list.assert.pass.cpp
M libcxx/test/std/containers/views/views.span/span.cons/initializer_list.pass.cpp
R libcxx/test/std/containers/views/views.span/span.cons/initializer_list.verify.cpp
M libcxx/test/std/containers/views/views.span/span.cons/iterator_len.verify.cpp
M libcxx/test/std/language.support/support.limits/support.limits.general/ranges.version.compile.pass.cpp
M libcxx/test/std/language.support/support.limits/support.limits.general/span.version.compile.pass.cpp
M libcxx/test/std/language.support/support.limits/support.limits.general/version.version.compile.pass.cpp
A libcxx/test/std/ranges/range.adaptors/range.stride.view/adaptor.pass.cpp
A libcxx/test/std/ranges/range.adaptors/range.stride.view/base.pass.cpp
A libcxx/test/std/ranges/range.adaptors/range.stride.view/begin.pass.cpp
A libcxx/test/std/ranges/range.adaptors/range.stride.view/borrowing.compile.pass.cpp
A libcxx/test/std/ranges/range.adaptors/range.stride.view/concept.compile.pass.cpp
A libcxx/test/std/ranges/range.adaptors/range.stride.view/ctad.pass.cpp
A libcxx/test/std/ranges/range.adaptors/range.stride.view/ctor.pass.cpp
A libcxx/test/std/ranges/range.adaptors/range.stride.view/end.pass.cpp
A libcxx/test/std/ranges/range.adaptors/range.stride.view/iterator/base.pass.cpp
A libcxx/test/std/ranges/range.adaptors/range.stride.view/iterator/compare.pass.cpp
A libcxx/test/std/ranges/range.adaptors/range.stride.view/iterator/ctor.copy.pass.cpp
A libcxx/test/std/ranges/range.adaptors/range.stride.view/iterator/ctor.default.pass.cpp
A libcxx/test/std/ranges/range.adaptors/range.stride.view/iterator/decrement.pass.cpp
A libcxx/test/std/ranges/range.adaptors/range.stride.view/iterator/dereference.pass.cpp
A libcxx/test/std/ranges/range.adaptors/range.stride.view/iterator/equal.pass.cpp
A libcxx/test/std/ranges/range.adaptors/range.stride.view/iterator/increment.pass.cpp
A libcxx/test/std/ranges/range.adaptors/range.stride.view/iterator/iter_move.pass.cpp
A libcxx/test/std/ranges/range.adaptors/range.stride.view/iterator/iter_swap.pass.cpp
A libcxx/test/std/ranges/range.adaptors/range.stride.view/iterator/minus.pass.cpp
A libcxx/test/std/ranges/range.adaptors/range.stride.view/iterator/minus_equal.pass.cpp
A libcxx/test/std/ranges/range.adaptors/range.stride.view/iterator/plus.pass.cpp
A libcxx/test/std/ranges/range.adaptors/range.stride.view/iterator/plus_equal.pass.cpp
A libcxx/test/std/ranges/range.adaptors/range.stride.view/iterator/subscript.pass.cpp
A libcxx/test/std/ranges/range.adaptors/range.stride.view/iterator/types.compile.pass.cpp
A libcxx/test/std/ranges/range.adaptors/range.stride.view/size.pass.cpp
A libcxx/test/std/ranges/range.adaptors/range.stride.view/stride.pass.cpp
A libcxx/test/std/ranges/range.adaptors/range.stride.view/types.h
M libcxx/test/std/utilities/const.wrap.class/call.pass.cpp
M libcxx/test/std/utilities/const.wrap.class/subscript.pass.cpp
M libcxx/utils/ci/docker/docker-compose.yml
M libcxx/utils/ci/docker/linux-builder-base.dockerfile
M libcxx/utils/ci/images/libcxx_next_runners.txt
M libcxx/utils/ci/run-buildbot
M libcxx/utils/generate_feature_test_macro_components.py
M libcxx/utils/libcxx/test/config.py
M libcxxabi/src/cxa_personality.cpp
M lld/test/ELF/fill-trap-ppc.s
M lld/test/ELF/fill-trap.s
M lldb/docs/resources/lldbgdbremote.md
M lldb/docs/use/aarch64-linux.md
M lldb/include/lldb/API/SBExpressionOptions.h
M lldb/include/lldb/Target/ABI.h
M lldb/include/lldb/Target/MemoryRegionInfo.h
M lldb/include/lldb/Target/Process.h
M lldb/include/lldb/Target/Target.h
M lldb/include/lldb/Target/Thread.h
M lldb/include/lldb/ValueObject/ValueObject.h
M lldb/packages/Python/lldbsuite/test/lldbtest.py
M lldb/packages/Python/lldbsuite/test/tools/lldb-dap/dap_server.py
M lldb/packages/Python/lldbsuite/test/tools/lldb-server/gdbremote_testcase.py
M lldb/source/API/SBCommandInterpreter.cpp
M lldb/source/API/SBExpressionOptions.cpp
M lldb/source/Commands/CommandObjectBreakpoint.cpp
M lldb/source/Commands/CommandObjectBreakpointCommand.cpp
M lldb/source/Commands/CommandObjectCommands.cpp
M lldb/source/Commands/CommandObjectDisassemble.cpp
M lldb/source/Commands/CommandObjectExpression.cpp
M lldb/source/Commands/CommandObjectFrame.cpp
M lldb/source/Commands/CommandObjectLog.cpp
M lldb/source/Commands/CommandObjectMemory.cpp
M lldb/source/Commands/CommandObjectMemoryTag.cpp
M lldb/source/Expression/IRMemoryMap.cpp
M lldb/source/Plugins/ABI/AArch64/ABISysV_arm64.cpp
M lldb/source/Plugins/ABI/AArch64/ABISysV_arm64.h
M lldb/source/Plugins/Disassembler/LLVMC/DisassemblerLLVMC.cpp
M lldb/source/Plugins/DynamicLoader/MacOSX-DYLD/DynamicLoaderMacOS.cpp
M lldb/source/Plugins/DynamicLoader/MacOSX-DYLD/DynamicLoaderMacOS.h
M lldb/source/Plugins/Instruction/MIPS/EmulateInstructionMIPS.cpp
M lldb/source/Plugins/Instruction/MIPS64/EmulateInstructionMIPS64.cpp
M lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.h
M lldb/source/Plugins/Process/Utility/LinuxProcMaps.cpp
M lldb/source/Plugins/Process/Utility/RegisterFlagsDetector_arm64.cpp
M lldb/source/Plugins/Process/Utility/RegisterFlagsDetector_arm64.h
M lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_arm64.cpp
M lldb/source/Plugins/Process/elf-core/RegisterContextPOSIXCore_arm64.cpp
M lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationClient.cpp
M lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationServerLLGS.cpp
M lldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.cpp
M lldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.h
M lldb/source/Plugins/Process/gdb-remote/ThreadGDBRemote.cpp
M lldb/source/Plugins/Process/gdb-remote/ThreadGDBRemote.h
M lldb/source/Target/MemoryRegionInfo.cpp
M lldb/source/Target/Process.cpp
M lldb/source/Target/StopInfo.cpp
M lldb/source/Target/Thread.cpp
M lldb/source/Target/ThreadPlanCallFunction.cpp
M lldb/source/ValueObject/ValueObject.cpp
M lldb/test/API/commands/breakpoint/command/list/TestBreakpointCommandList.py
M lldb/test/API/commands/command/container/TestContainerCommands.py
M lldb/test/API/commands/command/delete/TestCommandDelete.py
M lldb/test/API/commands/command/invalid-args/TestInvalidArgsCommand.py
M lldb/test/API/commands/expression/dont_allow_jit/TestAllowJIT.py
A lldb/test/API/commands/expression/expr-with-fork/Makefile
A lldb/test/API/commands/expression/expr-with-fork/TestExprWithFork.py
A lldb/test/API/commands/expression/expr-with-fork/main.cpp
M lldb/test/API/commands/expression/ptrauth/TestPtrAuthExpressions.py
M lldb/test/API/commands/frame/recognizer/TestFrameRecognizer.py
M lldb/test/API/commands/log/invalid-args/TestInvalidArgsLog.py
M lldb/test/API/commands/process/signal/TestProcessSignal.py
M lldb/test/API/commands/register/register_command/TestRegisters.py
M lldb/test/API/commands/target/modules/search-paths/insert/TestTargetModulesSearchpathsInsert.py
M lldb/test/API/commands/target/stop-hook/delete/TestTargetStopHookDelete.py
M lldb/test/API/commands/target/stop-hook/disable/TestTargetStopHookDisable.py
M lldb/test/API/commands/target/stop-hook/enable/TestTargetStopHookEnable.py
M lldb/test/API/commands/thread/backtrace/TestThreadBacktraceRepeat.py
M lldb/test/API/commands/thread/select/TestThreadSelect.py
M lldb/test/API/functionalities/breakpoint/breakpoint_command/TestBreakpointCommand.py
M lldb/test/API/functionalities/breakpoint/same_cu_name/Makefile
M lldb/test/API/functionalities/gdb_remote_client/TestGDBServerTargetXML.py
M lldb/test/API/functionalities/plugins/python_os_plugin/os_plugin_in_dsym/TestOSIndSYM.py
M lldb/test/API/functionalities/statusline/TestStatusline.py
M lldb/test/API/functionalities/target-new-solib-notifications/TestModuleLoadedNotifys.py
M lldb/test/API/linux/aarch64/permission_overlay/TestAArch64LinuxPOE.py
M lldb/test/API/linux/aarch64/permission_overlay/main.c
M lldb/test/Shell/Commands/list-header.test
M lldb/test/Shell/Minidump/disassemble-no-module.yaml
M lldb/tools/debugserver/source/DNB.cpp
M lldb/tools/debugserver/source/DNB.h
M lldb/tools/debugserver/source/JSONGenerator.h
M lldb/tools/debugserver/source/MacOSX/MachProcess.mm
M lldb/tools/debugserver/source/MacOSX/arm64/DNBArchImplARM64.cpp
M lldb/tools/debugserver/source/RNBRemote.cpp
M lldb/tools/lldb-dap/DAP.cpp
M lldb/tools/lldb-dap/DAP.h
M lldb/tools/lldb-dap/DAPSessionManager.cpp
M lldb/tools/lldb-dap/EventHelper.cpp
M lldb/tools/lldb-dap/Handler/RequestHandler.cpp
M lldb/unittests/Expression/IRMemoryMapTest.cpp
M lldb/unittests/Process/Utility/LinuxProcMapsTest.cpp
M lldb/unittests/Process/gdb-remote/GDBRemoteCommunicationClientTest.cpp
M llvm/docs/LFI.rst
M llvm/docs/LangRef.rst
M llvm/docs/ReleaseNotes.md
A llvm/include/llvm/ABI/TargetInfo.h
M llvm/include/llvm/ABI/Types.h
M llvm/include/llvm/ADT/DenseMap.h
M llvm/include/llvm/ADT/FoldingSet.h
M llvm/include/llvm/ADT/STLExtras.h
M llvm/include/llvm/ADT/StableHashing.h
M llvm/include/llvm/Analysis/VecFuncs.def
M llvm/include/llvm/BinaryFormat/Dwarf.h
M llvm/include/llvm/CodeGen/BasicTTIImpl.h
M llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h
M llvm/include/llvm/CodeGen/GlobalISel/Utils.h
A llvm/include/llvm/CodeGen/KCFI.h
A llvm/include/llvm/CodeGen/MachineIDFSSAUpdater.h
M llvm/include/llvm/CodeGen/TargetInstrInfo.h
M llvm/include/llvm/CodeGen/TargetLowering.h
M llvm/include/llvm/CodeGen/ValueTypes.td
M llvm/include/llvm/DWARFLinker/AddressesMap.h
M llvm/include/llvm/DWARFLinker/Classic/DWARFLinker.h
M llvm/include/llvm/DWARFLinker/Classic/DWARFStreamer.h
M llvm/include/llvm/ExecutionEngine/Orc/WaitingOnGraph.h
M llvm/include/llvm/IR/IRBuilder.h
M llvm/include/llvm/IR/Intrinsics.td
M llvm/include/llvm/IR/IntrinsicsDirectX.td
M llvm/include/llvm/IR/IntrinsicsSPIRV.td
M llvm/include/llvm/IR/RuntimeLibcalls.td
M llvm/include/llvm/InitializePasses.h
M llvm/include/llvm/MC/MCAsmInfo.h
M llvm/include/llvm/MC/MCAsmInfoCOFF.h
M llvm/include/llvm/MC/MCAsmInfoDarwin.h
M llvm/include/llvm/MC/MCAsmInfoELF.h
M llvm/include/llvm/MC/MCAsmInfoGOFF.h
M llvm/include/llvm/MC/MCAsmInfoWasm.h
M llvm/include/llvm/MC/MCAsmInfoXCOFF.h
M llvm/include/llvm/MC/MCContext.h
M llvm/include/llvm/MC/MCELFObjectWriter.h
M llvm/include/llvm/MC/MCInstrDesc.h
M llvm/include/llvm/MC/MCLFIRewriter.h
M llvm/include/llvm/MC/MCParser/MCTargetAsmParser.h
M llvm/include/llvm/MC/TargetRegistry.h
M llvm/include/llvm/Passes/CodeGenPassBuilder.h
M llvm/include/llvm/Passes/MachinePassRegistry.def
M llvm/include/llvm/Target/GlobalISel/Combine.td
M llvm/include/llvm/Target/TargetMachine.h
M llvm/include/llvm/Transforms/Utils/LowerVectorIntrinsics.h
M llvm/include/llvm/Transforms/Utils/UnrollLoop.h
M llvm/lib/ABI/CMakeLists.txt
A llvm/lib/ABI/TargetInfo.cpp
A llvm/lib/ABI/Targets/BPF.cpp
M llvm/lib/ABI/Types.cpp
M llvm/lib/Analysis/AliasAnalysisEvaluator.cpp
M llvm/lib/Analysis/ConstantFolding.cpp
M llvm/lib/Analysis/LazyValueInfo.cpp
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
M llvm/lib/CodeGen/AsmPrinter/AsmPrinterInlineAsm.cpp
M llvm/lib/CodeGen/AsmPrinter/DIE.cpp
M llvm/lib/CodeGen/CMakeLists.txt
M llvm/lib/CodeGen/CodeGenTargetMachineImpl.cpp
M llvm/lib/CodeGen/ExpandVectorPredication.cpp
M llvm/lib/CodeGen/GlobalISel/CSEMIRBuilder.cpp
M llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
M llvm/lib/CodeGen/GlobalISel/Utils.cpp
M llvm/lib/CodeGen/KCFI.cpp
A llvm/lib/CodeGen/MachineIDFSSAUpdater.cpp
M llvm/lib/CodeGen/MachineOutliner.cpp
M llvm/lib/CodeGen/MachineVerifier.cpp
M llvm/lib/CodeGen/PreISelIntrinsicLowering.cpp
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/lib/CodeGen/ShrinkWrap.cpp
M llvm/lib/CodeGen/TargetFrameLoweringImpl.cpp
M llvm/lib/CodeGen/TargetInstrInfo.cpp
M llvm/lib/CodeGen/TargetLoweringBase.cpp
M llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp
M llvm/lib/CodeGen/TargetPassConfig.cpp
M llvm/lib/DWARFLinker/Classic/DWARFLinker.cpp
M llvm/lib/DWARFLinker/Classic/DWARFLinkerCompileUnit.cpp
M llvm/lib/DWARFLinker/Classic/DWARFStreamer.cpp
M llvm/lib/DWARFLinker/Parallel/DWARFEmitterImpl.cpp
M llvm/lib/DWARFLinker/Parallel/DebugLineSectionEmitter.h
M llvm/lib/DebugInfo/LogicalView/Readers/LVBinaryReader.cpp
M llvm/lib/ExecutionEngine/Orc/TargetProcess/JITLoaderPerf.cpp
M llvm/lib/ExecutionEngine/RuntimeDyld/RuntimeDyldChecker.cpp
M llvm/lib/IR/ModuleSummaryIndex.cpp
M llvm/lib/MC/ELFObjectWriter.cpp
M llvm/lib/MC/MCAsmInfo.cpp
M llvm/lib/MC/MCAsmInfoCOFF.cpp
M llvm/lib/MC/MCAsmInfoDarwin.cpp
M llvm/lib/MC/MCAsmInfoELF.cpp
M llvm/lib/MC/MCAsmInfoGOFF.cpp
M llvm/lib/MC/MCAsmInfoWasm.cpp
M llvm/lib/MC/MCAsmInfoXCOFF.cpp
M llvm/lib/MC/MCAsmStreamer.cpp
M llvm/lib/MC/MCContext.cpp
M llvm/lib/MC/MCDisassembler/Disassembler.cpp
M llvm/lib/MC/MCELFStreamer.cpp
M llvm/lib/MC/MCInstrDesc.cpp
M llvm/lib/MC/MCLFIRewriter.cpp
M llvm/lib/MC/MCObjectFileInfo.cpp
M llvm/lib/MC/MCObjectStreamer.cpp
M llvm/lib/MC/MCParser/MCAsmParser.cpp
M llvm/lib/MC/MCParser/MCTargetAsmParser.cpp
M llvm/lib/MC/MCWinCOFFStreamer.cpp
M llvm/lib/Object/COFFObjectFile.cpp
M llvm/lib/Object/ModuleSymbolTable.cpp
M llvm/lib/Object/WindowsResource.cpp
M llvm/lib/Passes/PassBuilder.cpp
M llvm/lib/Support/FoldingSet.cpp
M llvm/lib/Target/AArch64/AArch64.h
M llvm/lib/Target/AArch64/AArch64Features.td
M llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
M llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64InstrFormats.td
M llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.h
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp
M llvm/lib/Target/AArch64/AArch64MachineFunctionInfo.cpp
M llvm/lib/Target/AArch64/AArch64PassRegistry.def
M llvm/lib/Target/AArch64/AArch64SIMDInstrOpt.cpp
M llvm/lib/Target/AArch64/AArch64StackTaggingPreRA.cpp
M llvm/lib/Target/AArch64/AArch64SystemOperands.td
M llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
M llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
M llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64ELFStreamer.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCAsmInfo.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCAsmInfo.h
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCLFIRewriter.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCLFIRewriter.h
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCTargetDesc.cpp
M llvm/lib/Target/AArch64/Utils/AArch64BaseInfo.cpp
M llvm/lib/Target/AArch64/Utils/AArch64BaseInfo.h
M llvm/lib/Target/AMDGPU/AMDGPUMCInstLower.cpp
M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCAsmInfo.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCExpr.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.h
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
M llvm/lib/Target/AMDGPU/SILowerI1Copies.cpp
M llvm/lib/Target/AMDGPU/SIWholeQuadMode.cpp
M llvm/lib/Target/AMDGPU/VOPDInstructions.td
M llvm/lib/Target/ARC/ARCInstrInfo.cpp
M llvm/lib/Target/ARC/MCTargetDesc/ARCMCAsmInfo.cpp
M llvm/lib/Target/ARC/MCTargetDesc/ARCMCAsmInfo.h
M llvm/lib/Target/ARC/MCTargetDesc/ARCMCTargetDesc.cpp
M llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
M llvm/lib/Target/ARM/ARMBaseInstrInfo.h
M llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp
M llvm/lib/Target/ARM/ARMFrameLowering.cpp
M llvm/lib/Target/ARM/ARMISelLowering.cpp
M llvm/lib/Target/ARM/ARMInstrThumb2.td
M llvm/lib/Target/ARM/ARMSubtarget.cpp
M llvm/lib/Target/ARM/ARMTargetMachine.cpp
M llvm/lib/Target/ARM/ARMTargetObjectFile.cpp
M llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
M llvm/lib/Target/ARM/MCTargetDesc/ARMMCAsmInfo.cpp
M llvm/lib/Target/ARM/MCTargetDesc/ARMMCAsmInfo.h
M llvm/lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.cpp
M llvm/lib/Target/ARM/Thumb2SizeReduction.cpp
M llvm/lib/Target/AVR/AVRAsmPrinter.cpp
M llvm/lib/Target/AVR/AVRISelLowering.cpp
M llvm/lib/Target/AVR/AVRInstrInfo.cpp
M llvm/lib/Target/AVR/AVRInstrInfo.td
M llvm/lib/Target/AVR/AsmParser/AVRAsmParser.cpp
M llvm/lib/Target/AVR/MCTargetDesc/AVRMCAsmInfo.cpp
M llvm/lib/Target/BPF/AsmParser/BPFAsmParser.cpp
M llvm/lib/Target/BPF/MCTargetDesc/BPFMCAsmInfo.h
M llvm/lib/Target/CSKY/AsmParser/CSKYAsmParser.cpp
M llvm/lib/Target/CSKY/CSKYInstrInfo.cpp
M llvm/lib/Target/CSKY/MCTargetDesc/CSKYMCAsmInfo.cpp
M llvm/lib/Target/CSKY/MCTargetDesc/CSKYMCAsmInfo.h
M llvm/lib/Target/CSKY/MCTargetDesc/CSKYMCTargetDesc.cpp
M llvm/lib/Target/DirectX/DXILLegalizePass.cpp
M llvm/lib/Target/DirectX/DXILOpBuilder.cpp
M llvm/lib/Target/DirectX/DXILOpLowering.cpp
M llvm/lib/Target/DirectX/DXILPrepare.cpp
M llvm/lib/Target/DirectX/DXILWriter/DXILBitcodeWriter.cpp
M llvm/lib/Target/DirectX/DXILWriter/DXILValueEnumerator.cpp
M llvm/lib/Target/DirectX/MCTargetDesc/DirectXMCTargetDesc.cpp
M llvm/lib/Target/Hexagon/AsmParser/HexagonAsmParser.cpp
M llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
M llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCAsmInfo.cpp
M llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCAsmInfo.h
M llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCTargetDesc.cpp
M llvm/lib/Target/Lanai/AsmParser/LanaiAsmParser.cpp
M llvm/lib/Target/Lanai/MCTargetDesc/LanaiMCAsmInfo.cpp
M llvm/lib/Target/LoongArch/AsmParser/LoongArchAsmParser.cpp
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/lib/Target/LoongArch/LoongArchISelLowering.h
M llvm/lib/Target/LoongArch/LoongArchInstrInfo.cpp
M llvm/lib/Target/LoongArch/LoongArchInstrInfo.h
M llvm/lib/Target/LoongArch/LoongArchLASXInstrInfo.td
M llvm/lib/Target/LoongArch/LoongArchLSXInstrInfo.td
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchMCAsmInfo.cpp
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchMCAsmInfo.h
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchMCTargetDesc.cpp
M llvm/lib/Target/M68k/AsmParser/M68kAsmParser.cpp
M llvm/lib/Target/M68k/M68kMCInstLower.cpp
M llvm/lib/Target/M68k/MCTargetDesc/M68kMCAsmInfo.cpp
M llvm/lib/Target/M68k/MCTargetDesc/M68kMCAsmInfo.h
M llvm/lib/Target/M68k/MCTargetDesc/M68kMCTargetDesc.cpp
M llvm/lib/Target/MSP430/AsmParser/MSP430AsmParser.cpp
M llvm/lib/Target/MSP430/MCTargetDesc/MSP430MCAsmInfo.cpp
M llvm/lib/Target/MSP430/MCTargetDesc/MSP430MCAsmInfo.h
M llvm/lib/Target/MSP430/MCTargetDesc/MSP430MCTargetDesc.cpp
M llvm/lib/Target/MSP430/MSP430InstrInfo.cpp
M llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsMCAsmInfo.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsMCAsmInfo.h
M llvm/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.cpp
M llvm/lib/Target/Mips/MipsBranchExpansion.cpp
M llvm/lib/Target/Mips/MipsInstrInfo.cpp
M llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXMCAsmInfo.cpp
M llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
M llvm/lib/Target/NVPTX/NVPTXISelLowering.h
M llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCAsmInfo.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCAsmInfo.h
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp
M llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
M llvm/lib/Target/RISCV/CMakeLists.txt
A llvm/lib/Target/RISCV/GISel/RISCVInlineAsmLowering.cpp
A llvm/lib/Target/RISCV/GISel/RISCVInlineAsmLowering.h
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCAsmInfo.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCAsmInfo.h
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCTargetDesc.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.h
M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfo.h
M llvm/lib/Target/RISCV/RISCVSubtarget.cpp
M llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
M llvm/lib/Target/SPIRV/MCTargetDesc/SPIRVMCAsmInfo.cpp
M llvm/lib/Target/SPIRV/SPIRV.h
M llvm/lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp
M llvm/lib/Target/SPIRV/SPIRVISelLowering.cpp
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
M llvm/lib/Target/SPIRV/SPIRVLegalizeImplicitBinding.cpp
A llvm/lib/Target/SPIRV/SPIRVLegalizeImplicitBinding.h
M llvm/lib/Target/SPIRV/SPIRVLegalizePointerCast.cpp
A llvm/lib/Target/SPIRV/SPIRVLegalizePointerCast.h
M llvm/lib/Target/SPIRV/SPIRVMergeRegionExitTargets.cpp
A llvm/lib/Target/SPIRV/SPIRVMergeRegionExitTargets.h
M llvm/lib/Target/SPIRV/SPIRVPassRegistry.def
M llvm/lib/Target/SPIRV/SPIRVRegularizer.cpp
A llvm/lib/Target/SPIRV/SPIRVRegularizer.h
M llvm/lib/Target/SPIRV/SPIRVTargetMachine.cpp
M llvm/lib/Target/SPIRV/SPIRVTypeInst.cpp
M llvm/lib/Target/SPIRV/SPIRVTypeInst.h
M llvm/lib/Target/Sparc/AsmParser/SparcAsmParser.cpp
M llvm/lib/Target/Sparc/MCTargetDesc/SparcMCAsmInfo.cpp
M llvm/lib/Target/Sparc/MCTargetDesc/SparcMCAsmInfo.h
M llvm/lib/Target/Sparc/MCTargetDesc/SparcMCTargetDesc.cpp
M llvm/lib/Target/Sparc/SparcInstrInfo.cpp
M llvm/lib/Target/SystemZ/AsmParser/SystemZAsmParser.cpp
M llvm/lib/Target/SystemZ/MCTargetDesc/SystemZHLASMAsmStreamer.h
M llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCAsmInfo.cpp
M llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCAsmInfo.h
M llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCTargetDesc.cpp
M llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
M llvm/lib/Target/VE/AsmParser/VEAsmParser.cpp
M llvm/lib/Target/VE/MCTargetDesc/VEMCAsmInfo.cpp
M llvm/lib/Target/VE/MCTargetDesc/VEMCAsmInfo.h
M llvm/lib/Target/VE/MCTargetDesc/VEMCTargetDesc.cpp
M llvm/lib/Target/WebAssembly/AsmParser/WebAssemblyAsmParser.cpp
M llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCAsmInfo.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyCFGStackify.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyExceptionInfo.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyFrameLowering.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyLateEHPrepare.cpp
M llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86ELFObjectWriter.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86MCAsmInfo.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86MCAsmInfo.h
M llvm/lib/Target/X86/MCTargetDesc/X86MCTargetDesc.cpp
M llvm/lib/Target/X86/X86CodeGenPassBuilder.cpp
M llvm/lib/Target/X86/X86FastISel.cpp
M llvm/lib/Target/X86/X86FrameLowering.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86InstrInfo.cpp
M llvm/lib/Target/X86/X86MCInstLower.cpp
M llvm/lib/Target/X86/X86TargetMachine.cpp
M llvm/lib/Target/XCore/MCTargetDesc/XCoreMCAsmInfo.cpp
M llvm/lib/Target/XCore/MCTargetDesc/XCoreMCAsmInfo.h
M llvm/lib/Target/XCore/MCTargetDesc/XCoreMCTargetDesc.cpp
M llvm/lib/Target/Xtensa/AsmParser/XtensaAsmParser.cpp
M llvm/lib/Target/Xtensa/MCTargetDesc/XtensaMCAsmInfo.cpp
M llvm/lib/Target/Xtensa/MCTargetDesc/XtensaMCAsmInfo.h
M llvm/lib/Target/Xtensa/MCTargetDesc/XtensaMCTargetDesc.cpp
M llvm/lib/Target/Xtensa/XtensaInstrInfo.cpp
M llvm/lib/Transforms/AggressiveInstCombine/AggressiveInstCombine.cpp
M llvm/lib/Transforms/IPO/FunctionImport.cpp
M llvm/lib/Transforms/IPO/Inliner.cpp
M llvm/lib/Transforms/IPO/LowerTypeTests.cpp
M llvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp
M llvm/lib/Transforms/InstCombine/InstCombineInternal.h
M llvm/lib/Transforms/InstCombine/InstCombineShifts.cpp
M llvm/lib/Transforms/Instrumentation/NumericalStabilitySanitizer.cpp
M llvm/lib/Transforms/Scalar/ExpandMemCmp.cpp
M llvm/lib/Transforms/Scalar/GVN.cpp
M llvm/lib/Transforms/Scalar/LoopUnrollPass.cpp
M llvm/lib/Transforms/Utils/FunctionImportUtils.cpp
M llvm/lib/Transforms/Utils/LoopUnroll.cpp
M llvm/lib/Transforms/Utils/LowerVectorIntrinsics.cpp
M llvm/lib/Transforms/Utils/ScalarEvolutionExpander.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.h
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/lib/Transforms/Vectorize/VPlanConstruction.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.h
M llvm/lib/Transforms/Vectorize/VPlanUtils.cpp
M llvm/lib/Transforms/Vectorize/VPlanUtils.h
A llvm/test/Analysis/BasicAA/atomics.ll
M llvm/test/Analysis/CostModel/AArch64/loop_dependence_mask.ll
M llvm/test/Analysis/CostModel/ARM/arith-overflow.ll
M llvm/test/CodeGen/AArch64/Atomics/aarch64-atomic-store-outline_atomics.ll
M llvm/test/CodeGen/AArch64/Atomics/aarch64-atomic-store-rcpc.ll
M llvm/test/CodeGen/AArch64/Atomics/aarch64-atomic-store-v8_1a.ll
M llvm/test/CodeGen/AArch64/Atomics/aarch64-atomic-store-v8a.ll
M llvm/test/CodeGen/AArch64/Atomics/aarch64-atomicrmw-lse2.ll
M llvm/test/CodeGen/AArch64/Atomics/aarch64-atomicrmw-lse2_lse128.ll
M llvm/test/CodeGen/AArch64/Atomics/aarch64-atomicrmw-lsfe.ll
M llvm/test/CodeGen/AArch64/Atomics/aarch64-atomicrmw-outline_atomics.ll
M llvm/test/CodeGen/AArch64/Atomics/aarch64-atomicrmw-rcpc.ll
M llvm/test/CodeGen/AArch64/Atomics/aarch64-atomicrmw-rcpc3.ll
M llvm/test/CodeGen/AArch64/Atomics/aarch64-atomicrmw-v8_1a.ll
M llvm/test/CodeGen/AArch64/Atomics/aarch64-atomicrmw-v8a.ll
M llvm/test/CodeGen/AArch64/Atomics/aarch64-atomicrmw-v8a_fp.ll
M llvm/test/CodeGen/AArch64/GlobalISel/arm64-atomic.ll
A llvm/test/CodeGen/AArch64/GlobalISel/combine-constant-fold-count.mir
M llvm/test/CodeGen/AArch64/GlobalISel/localizer-arm64-tti.ll
M llvm/test/CodeGen/AArch64/aarch64-sys-intrinsic.ll
M llvm/test/CodeGen/AArch64/aarch64-tbz.ll
M llvm/test/CodeGen/AArch64/alias_mask.ll
A llvm/test/CodeGen/AArch64/alias_mask_i128.ll
M llvm/test/CodeGen/AArch64/alias_mask_nosve.ll
M llvm/test/CodeGen/AArch64/alias_mask_scalable.ll
M llvm/test/CodeGen/AArch64/alias_mask_scalable_nosve2.ll
M llvm/test/CodeGen/AArch64/arm64-vmul.ll
M llvm/test/CodeGen/AArch64/bf16-v8-instructions.ll
M llvm/test/CodeGen/AArch64/cpa-globalisel.ll
M llvm/test/CodeGen/AArch64/misched-fusion-cmp-bcc.ll
M llvm/test/CodeGen/AArch64/neon-rshrn.ll
M llvm/test/CodeGen/AArch64/pcsections.ll
A llvm/test/CodeGen/AArch64/sanitize_vec_pow.ll
A llvm/test/CodeGen/AArch64/scvtf-div-mul-combine.ll
M llvm/test/CodeGen/AArch64/sink-and-fold.ll
M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-masked-load.ll
A llvm/test/CodeGen/AArch64/uaddlp.ll
M llvm/test/CodeGen/AArch64/veclib-llvm.pow.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-divergent-i1-used-outside-loop.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-structurizer.mir
M llvm/test/CodeGen/AMDGPU/si-i1-copies.mir
M llvm/test/CodeGen/AMDGPU/si-lower-i1-copies-order-of-phi-incomings.mir
A llvm/test/CodeGen/AMDGPU/wqm-propagate-for-execz-side-effect.mir
A llvm/test/CodeGen/AVR/issue-104032.ll
A llvm/test/CodeGen/AVR/issue-176830.ll
M llvm/test/CodeGen/DirectX/BufferLoad-sm61.ll
M llvm/test/CodeGen/DirectX/BufferLoad.ll
M llvm/test/CodeGen/DirectX/BufferStore-sm61.ll
M llvm/test/CodeGen/DirectX/BufferStore.ll
M llvm/test/CodeGen/DirectX/CreateHandle-NURI.ll
M llvm/test/CodeGen/DirectX/CreateHandle.ll
M llvm/test/CodeGen/DirectX/CreateHandleFromBinding-NURI.ll
M llvm/test/CodeGen/DirectX/CreateHandleFromBinding.ll
A llvm/test/CodeGen/DirectX/Metadata/dx_precise.ll
M llvm/test/CodeGen/DirectX/UAddc.ll
M llvm/test/CodeGen/DirectX/WaveActiveMax.ll
M llvm/test/CodeGen/DirectX/WaveActiveMin.ll
M llvm/test/CodeGen/DirectX/WaveGetLaneIndex.ll
M llvm/test/CodeGen/DirectX/WaveReadLaneAt-vec.ll
M llvm/test/CodeGen/DirectX/WaveReadLaneAt.ll
M llvm/test/CodeGen/DirectX/abs.ll
M llvm/test/CodeGen/DirectX/acos.ll
M llvm/test/CodeGen/DirectX/asin.ll
M llvm/test/CodeGen/DirectX/atan.ll
M llvm/test/CodeGen/DirectX/ceil.ll
M llvm/test/CodeGen/DirectX/comput_ids.ll
M llvm/test/CodeGen/DirectX/cos.ll
M llvm/test/CodeGen/DirectX/cosh.ll
M llvm/test/CodeGen/DirectX/countbits.ll
M llvm/test/CodeGen/DirectX/dot4add_i8packed.ll
M llvm/test/CodeGen/DirectX/dot4add_u8packed.ll
M llvm/test/CodeGen/DirectX/exp.ll
M llvm/test/CodeGen/DirectX/fdot.ll
M llvm/test/CodeGen/DirectX/floor.ll
M llvm/test/CodeGen/DirectX/fma.ll
M llvm/test/CodeGen/DirectX/fmad.ll
M llvm/test/CodeGen/DirectX/fmax.ll
M llvm/test/CodeGen/DirectX/fmin.ll
M llvm/test/CodeGen/DirectX/frac.ll
M llvm/test/CodeGen/DirectX/idot.ll
M llvm/test/CodeGen/DirectX/imad.ll
M llvm/test/CodeGen/DirectX/is_fpclass.ll
M llvm/test/CodeGen/DirectX/isinf.ll
M llvm/test/CodeGen/DirectX/isnan.ll
A llvm/test/CodeGen/DirectX/legalize-switch-unreachable.ll
M llvm/test/CodeGen/DirectX/log.ll
M llvm/test/CodeGen/DirectX/log10.ll
M llvm/test/CodeGen/DirectX/log2.ll
M llvm/test/CodeGen/DirectX/reversebits.ll
M llvm/test/CodeGen/DirectX/round.ll
M llvm/test/CodeGen/DirectX/rsqrt.ll
M llvm/test/CodeGen/DirectX/saturate.ll
M llvm/test/CodeGen/DirectX/sin.ll
M llvm/test/CodeGen/DirectX/sinh.ll
M llvm/test/CodeGen/DirectX/smax.ll
M llvm/test/CodeGen/DirectX/smin.ll
M llvm/test/CodeGen/DirectX/splitdouble.ll
M llvm/test/CodeGen/DirectX/sqrt.ll
M llvm/test/CodeGen/DirectX/tan.ll
M llvm/test/CodeGen/DirectX/tanh.ll
M llvm/test/CodeGen/DirectX/trunc.ll
M llvm/test/CodeGen/DirectX/umad.ll
M llvm/test/CodeGen/DirectX/umax.ll
M llvm/test/CodeGen/DirectX/umin.ll
A llvm/test/CodeGen/LoongArch/lasx/ir-instruction/fpext.ll
M llvm/test/CodeGen/LoongArch/lasx/ir-instruction/shuffle-as-xvshuf4i.ll
A llvm/test/CodeGen/LoongArch/lasx/srar.ll
A llvm/test/CodeGen/LoongArch/lasx/srlr.ll
M llvm/test/CodeGen/LoongArch/lasx/vec-shuffle-byte-rotate.ll
M llvm/test/CodeGen/LoongArch/lasx/vxi1-masks.ll
A llvm/test/CodeGen/LoongArch/lsx/ir-instruction/fpext.ll
A llvm/test/CodeGen/LoongArch/lsx/srar.ll
A llvm/test/CodeGen/LoongArch/lsx/srlr.ll
A llvm/test/CodeGen/LoongArch/stackslot.mir
M llvm/test/CodeGen/LoongArch/vector-fp-imm.ll
M llvm/test/CodeGen/NVPTX/fp-contract-f32x2.ll
M llvm/test/CodeGen/NVPTX/i16x2-instructions.ll
A llvm/test/CodeGen/NVPTX/unknown-intrinsic.ll
M llvm/test/CodeGen/PowerPC/masked-sdiv.ll
M llvm/test/CodeGen/PowerPC/masked-srem.ll
M llvm/test/CodeGen/PowerPC/masked-udiv.ll
M llvm/test/CodeGen/PowerPC/masked-urem.ll
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator-inline-asm.ll
M llvm/test/CodeGen/RISCV/combine-is_fpclass.ll
M llvm/test/CodeGen/RISCV/rvv/dont-sink-splat-operands.ll
A llvm/test/CodeGen/RISCV/rvv/fcanonicalize-sdnode.ll
A llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fcanonicalize-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fptrunc-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-insert-subvector-shuffle.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-peephole-vmerge-vops.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-setcc-int-vp-mask.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-setcc-int-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-deinterleave2.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-zipeven-zipodd.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vadd-vp-mask.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vadd-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfclass-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfnmsac-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vmacc-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vmul-vp-mask.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vmul-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vnmsac-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vrsub-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vselect-vp-bf16.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vselect-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vshl-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vsra-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vsrl-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vsub-vp-mask.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vsub-vp.ll
M llvm/test/CodeGen/RISCV/rvv/incorrect-extract-subvector-combine.ll
M llvm/test/CodeGen/RISCV/rvv/rvv-peephole-vmerge-vops.ll
M llvm/test/CodeGen/RISCV/rvv/setcc-int-vp-mask.ll
M llvm/test/CodeGen/RISCV/rvv/setcc-int-vp.ll
M llvm/test/CodeGen/RISCV/rvv/sink-splat-operands.ll
M llvm/test/CodeGen/RISCV/rvv/undef-vp-ops.ll
M llvm/test/CodeGen/RISCV/rvv/vadd-vp-mask.ll
M llvm/test/CodeGen/RISCV/rvv/vadd-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vandn-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vector-deinterleave-fixed.ll
M llvm/test/CodeGen/RISCV/rvv/vector-interleave-fixed.ll
M llvm/test/CodeGen/RISCV/rvv/vfclass-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfmacc-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfmsac-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfnmacc-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfnmsac-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfptrunc-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vmacc-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vmadd-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vmul-vp-mask.ll
M llvm/test/CodeGen/RISCV/rvv/vmul-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vnmsac-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vnsra-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vnsrl-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vp-vaaddu.ll
M llvm/test/CodeGen/RISCV/rvv/vrsub-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vselect-vp-bf16.ll
M llvm/test/CodeGen/RISCV/rvv/vselect-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vshl-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vsra-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vsrl-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vsub-vp-mask.ll
M llvm/test/CodeGen/RISCV/rvv/vsub-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vwadd-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vwsll-vp.ll
M llvm/test/CodeGen/SPIRV/ctor-dtor-lowering-ir.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_memory_access_aliasing/alias-load-store-atomic.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/reversebits.ll
M llvm/test/CodeGen/SPIRV/llc-pipeline.ll
A llvm/test/CodeGen/SPIRV/passes/SPIRVLegalizeImplicitBinding.ll
A llvm/test/CodeGen/SPIRV/passes/SPIRVLegalizePointerCast.ll
A llvm/test/CodeGen/SPIRV/passes/SPIRVMergeRegionExitTargets.ll
A llvm/test/CodeGen/SPIRV/passes/SPIRVRegularizer-i1-icmp.ll
M llvm/test/CodeGen/SPIRV/pointers/load-vector-from-array-of-vectors.ll
M llvm/test/CodeGen/SPIRV/pointers/store-array-of-vectors-to-vector.ll
A llvm/test/CodeGen/SPIRV/transcoding/atomic-load-store-unsupported.ll
M llvm/test/CodeGen/SPIRV/transcoding/load-atomic.ll
M llvm/test/CodeGen/SPIRV/transcoding/store-atomic.ll
A llvm/test/CodeGen/Thumb2/mve-extbuildvec.ll
M llvm/test/CodeGen/WebAssembly/strided-int-mac.ll
M llvm/test/CodeGen/X86/basic-block-address-map-function-sections.ll
M llvm/test/CodeGen/X86/basic-block-address-map.ll
M llvm/test/CodeGen/X86/dag-topological-sort.ll
M llvm/test/CodeGen/X86/freeze-binary.ll
M llvm/test/CodeGen/X86/kcfi-arity.ll
M llvm/test/CodeGen/X86/kcfi.ll
M llvm/test/CodeGen/X86/known-never-zero.ll
M llvm/test/CodeGen/X86/llc-pipeline-npm.ll
M llvm/test/CodeGen/X86/machine-block-hash.mir
M llvm/test/CodeGen/X86/masked-sdiv.ll
M llvm/test/CodeGen/X86/masked-srem.ll
M llvm/test/CodeGen/X86/masked-udiv.ll
M llvm/test/CodeGen/X86/masked-urem.ll
M llvm/test/CodeGen/X86/pr134602.ll
M llvm/test/CodeGen/X86/vector-sext.ll
M llvm/test/CodeGen/X86/vector-zext.ll
M llvm/test/DebugInfo/AArch64/fallthrough-branch.ll
A llvm/test/MC/AArch64/LFI/branch.s
A llvm/test/MC/AArch64/LFI/return.s
R llvm/test/MC/AArch64/armv9.7a-mpamv2-diagnostics.s
M llvm/test/MC/AArch64/armv9.7a-mpamv2.s
M llvm/test/MC/AMDGPU/gfx10_asm_mubuf.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3p.s
M llvm/test/MC/AMDGPU/gfx7_asm_mubuf.s
M llvm/test/MC/AMDGPU/gfx8_asm_mubuf.s
M llvm/test/MC/AMDGPU/gfx9_asm_mubuf.s
A llvm/test/MC/ARM/thumb-hvc-virt-diagnostics.s
M llvm/test/MC/AsmParser/directive_fill.s
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop3p.txt
A llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vopd3_unused_operands.txt
M llvm/test/Other/new-pm-thinlto-postlink-defaults.ll
M llvm/test/Other/new-pm-thinlto-postlink-pgo-defaults.ll
M llvm/test/Other/new-pm-thinlto-postlink-samplepgo-defaults.ll
M llvm/test/Other/new-pm-thinlto-prelink-defaults.ll
M llvm/test/Other/new-pm-thinlto-prelink-pgo-defaults.ll
M llvm/test/Other/new-pm-thinlto-prelink-samplepgo-defaults.ll
M llvm/test/TableGen/CPtrWildcard.td
A llvm/test/ThinLTO/X86/reduce-promotion-distributed.ll
A llvm/test/ThinLTO/X86/reduce-promotion-same-local-name-distributed.ll
A llvm/test/Transforms/AggressiveInstCombine/fold-split-ctlz.ll
A llvm/test/Transforms/AggressiveInstCombine/fold-split-cttz.ll
M llvm/test/Transforms/CorrelatedValuePropagation/vectors.ll
R llvm/test/Transforms/DeadStoreElimination/fence-todo.ll
M llvm/test/Transforms/DeadStoreElimination/fence.ll
A llvm/test/Transforms/DirectX/getpointer-sink-behavior.ll
M llvm/test/Transforms/GVN/no-sink-dxgetpointer.ll
M llvm/test/Transforms/GVN/tbaa.ll
A llvm/test/Transforms/InstCombine/divceil.ll
M llvm/test/Transforms/InstCombine/fls.ll
A llvm/test/Transforms/InstCombine/shift-sub.ll
M llvm/test/Transforms/InstSimplify/load.ll
M llvm/test/Transforms/LICM/atomics.ll
M llvm/test/Transforms/LoopFusion/double_loop_nest_inner_guard.ll
M llvm/test/Transforms/LoopFusion/triple_loop_nest_inner_guard.ll
M llvm/test/Transforms/LoopIdiom/expand-scev-expand-simplifications.ll
M llvm/test/Transforms/LoopStrengthReduce/depth-limit-overrun.ll
M llvm/test/Transforms/LoopStrengthReduce/lsr-rewrite-to-add-one.ll
M llvm/test/Transforms/LoopStrengthReduce/wrong-hoisting-iv.ll
A llvm/test/Transforms/LoopUnroll/debug-and-remarks.ll
R llvm/test/Transforms/LoopUnroll/debug.ll
M llvm/test/Transforms/LoopVectorize/AArch64/epilog-vectorization-factors.ll
M llvm/test/Transforms/LoopVectorize/AArch64/masked-call.ll
M llvm/test/Transforms/LoopVectorize/AArch64/wider-VF-for-callinst.ll
M llvm/test/Transforms/LoopVectorize/RISCV/first-order-recurrence-scalable-vf1.ll
M llvm/test/Transforms/LoopVectorize/RISCV/iv-select-cmp.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-fixed-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/VPlan/vplan-print-after-all.ll
A llvm/test/Transforms/LoopVectorize/VPlan/widen-canonical-iv-register-pressure.ll
M llvm/test/Transforms/LoopVectorize/X86/amdlibm-calls.ll
A llvm/test/Transforms/LoopVectorize/X86/widen-canonical-iv-register-pressure.ll
M llvm/test/Transforms/LoopVectorize/epilog-vectorization-reductions.ll
A llvm/test/Transforms/LoopVectorize/extract-value-widen.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence-tail-folding.ll
M llvm/test/Transforms/LoopVectorize/hints-trans.ll
M llvm/test/Transforms/LoopVectorize/induction.ll
M llvm/test/Transforms/LoopVectorize/interleaved-accesses.ll
M llvm/test/Transforms/LoopVectorize/optsize.ll
M llvm/test/Transforms/LoopVectorize/scalable-trunc-min-bitwidth.ll
M llvm/test/Transforms/LoopVectorize/tail-folding-vectorization-factor-1.ll
M llvm/test/Transforms/LoopVectorize/version-stride-with-integer-casts.ll
M llvm/test/Transforms/LowerTypeTests/aarch64-jumptable-dbg.ll
M llvm/test/Transforms/LowerTypeTests/x86-jumptable-dbg.ll
M llvm/test/Transforms/PhaseOrdering/X86/avg.ll
M llvm/test/Transforms/PreISelIntrinsicLowering/AArch64/expand-exp.ll
R llvm/test/Transforms/PreISelIntrinsicLowering/AArch64/expand-fp-math-binary.ll
M llvm/test/Transforms/PreISelIntrinsicLowering/AArch64/expand-fp-math.ll
M llvm/test/Transforms/PreISelIntrinsicLowering/AArch64/expand-log.ll
R llvm/test/Transforms/PreISelIntrinsicLowering/RISCV/expand-fp-math-binary.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/InstructionsState-is-invalid-0.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/PR38339.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/div-like-mixed-with-undefs.ll
A llvm/test/Transforms/SLPVectorizer/AArch64/long-non-power-of-2.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/reused-scalar-repeated-in-node.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/slp-fma-loss.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/spillcost-call-between-operands.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/spillcost-loop-backedge.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/vectorizable-selects-uniform-cmps.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/basic-strided-loads.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/gather-insert-point-restore.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/reduced-value-repeated-and-vectorized.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/reductions.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/reordered-buildvector-scalars.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/revec-strided-load.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/same-node-reused.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/smin-signed-zextended.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/split-vectorize-parent-for-copyables.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/unordered-loads-operands.ll
M llvm/test/Transforms/SLPVectorizer/SystemZ/reuse-non-power-of-2-reorder.ll
M llvm/test/Transforms/SLPVectorizer/X86/PR39774.ll
M llvm/test/Transforms/SLPVectorizer/X86/PR40310.ll
M llvm/test/Transforms/SLPVectorizer/X86/deleted-inst-reduction-attempt.ll
M llvm/test/Transforms/SLPVectorizer/X86/div-possibly-extended-with-poisons.ll
M llvm/test/Transforms/SLPVectorizer/X86/external-used-across-reductions.ll
M llvm/test/Transforms/SLPVectorizer/X86/extractelements-vector-ops-shuffle.ll
M llvm/test/Transforms/SLPVectorizer/X86/extractelemets-extended-by-poison.ll
M llvm/test/Transforms/SLPVectorizer/X86/full-match-with-poison-scalar.ll
M llvm/test/Transforms/SLPVectorizer/X86/full-matched-bv-with-subvectors.ll
M llvm/test/Transforms/SLPVectorizer/X86/gather-with-cmp-user.ll
M llvm/test/Transforms/SLPVectorizer/X86/gathered-loads-non-full-reg.ll
M llvm/test/Transforms/SLPVectorizer/X86/gathered-shuffle-resized.ll
M llvm/test/Transforms/SLPVectorizer/X86/identity-match-splat-less-defined.ll
M llvm/test/Transforms/SLPVectorizer/X86/insert-subvector.ll
M llvm/test/Transforms/SLPVectorizer/X86/load-merge-inseltpoison.ll
M llvm/test/Transforms/SLPVectorizer/X86/load-merge.ll
M llvm/test/Transforms/SLPVectorizer/X86/load-partial-vector-shuffle.ll
M llvm/test/Transforms/SLPVectorizer/X86/matched-gather-part-of-combined.ll
M llvm/test/Transforms/SLPVectorizer/X86/non-power-of-2-order-detection.ll
M llvm/test/Transforms/SLPVectorizer/X86/non-power-of-2-subvectors-insert.ll
M llvm/test/Transforms/SLPVectorizer/X86/non-schedulable-before-main.ll
M llvm/test/Transforms/SLPVectorizer/X86/non-scheduled-inst-extern-use.ll
A llvm/test/Transforms/SLPVectorizer/X86/non-vectorizable-inst-operand.ll
M llvm/test/Transforms/SLPVectorizer/X86/original-inst-scheduled-after-copyable.ll
M llvm/test/Transforms/SLPVectorizer/X86/parent-node-schedulable-with-multi-copyables.ll
M llvm/test/Transforms/SLPVectorizer/X86/pr47629-inseltpoison.ll
M llvm/test/Transforms/SLPVectorizer/X86/pr47629.ll
M llvm/test/Transforms/SLPVectorizer/X86/pr47642.ll
M llvm/test/Transforms/SLPVectorizer/X86/pr49081.ll
M llvm/test/Transforms/SLPVectorizer/X86/reduced-val-vectorized-in-transform.ll
M llvm/test/Transforms/SLPVectorizer/X86/reorder-reused-masked-gather.ll
M llvm/test/Transforms/SLPVectorizer/X86/reorder-reused-masked-gather2.ll
M llvm/test/Transforms/SLPVectorizer/X86/reordered-masked-loads.ll
M llvm/test/Transforms/SLPVectorizer/X86/replaced-external-in-reduction.ll
M llvm/test/Transforms/SLPVectorizer/X86/reschedule-only-scheduled.ll
M llvm/test/Transforms/SLPVectorizer/X86/resized-bv-values-non-power-of2-node.ll
M llvm/test/Transforms/SLPVectorizer/X86/reuse-extracts-in-wider-vect.ll
M llvm/test/Transforms/SLPVectorizer/X86/revec-non-power-2-to-power-2-large-vect.ll
M llvm/test/Transforms/SLPVectorizer/X86/revec-reduced-value-vectorized-later.ll
M llvm/test/Transforms/SLPVectorizer/X86/same-values-sub-node-with-poisons.ll
A llvm/test/Transforms/SLPVectorizer/X86/select-copyable-cmp-poison.ll
M llvm/test/Transforms/SLPVectorizer/X86/shl-to-add-transformation5.ll
M llvm/test/Transforms/SLPVectorizer/X86/shrink_after_reorder.ll
M llvm/test/Transforms/SLPVectorizer/X86/sin-sqrt.ll
A llvm/test/Transforms/SLPVectorizer/X86/split-node-reused-in-later-vector.ll
M llvm/test/Transforms/SLPVectorizer/X86/split-node-throttled.ll
M llvm/test/Transforms/SLPVectorizer/X86/split-vectorize-gathered-def-after-use.ll
M llvm/test/Transforms/SLPVectorizer/gathered-consecutive-loads-different-types.ll
M llvm/test/Transforms/SLPVectorizer/insertelement-across-zero.ll
M llvm/test/Transforms/SLPVectorizer/reduced-gathered-vectorized.ll
M llvm/test/Transforms/SLPVectorizer/reduction-whole-regs-loads.ll
M llvm/test/Transforms/SLPVectorizer/reorder-clustered-node.ll
M llvm/test/Transforms/SLPVectorizer/revec-shufflevector.ll
M llvm/test/Transforms/SLPVectorizer/revec.ll
M llvm/test/Transforms/SLPVectorizer/shuffle-mask-resized.ll
M llvm/test/Transforms/SimplifyCFG/DirectX/no-sink-dxgetpointer.ll
M llvm/test/tools/dsymutil/X86/tls-variable.test
M llvm/test/tools/dxil-dis/debug-info.ll
A llvm/test/tools/dxil-dis/di-compile-unit-versioned-language.ll
A llvm/test/tools/dxil-dis/vla.ll
M llvm/test/tools/llvm-rc/windres-target.test
M llvm/tools/llvm-cfi-verify/lib/FileAnalysis.cpp
M llvm/tools/llvm-dwp/llvm-dwp.cpp
M llvm/tools/llvm-exegesis/lib/DisassemblerHelper.cpp
M llvm/tools/llvm-exegesis/lib/SnippetFile.cpp
M llvm/tools/llvm-jitlink/llvm-jitlink.cpp
M llvm/tools/llvm-mc-assemble-fuzzer/llvm-mc-assemble-fuzzer.cpp
M llvm/tools/llvm-mc/llvm-mc.cpp
M llvm/tools/llvm-mca/CodeRegionGenerator.cpp
M llvm/tools/llvm-mca/llvm-mca.cpp
M llvm/tools/llvm-ml/Disassembler.cpp
M llvm/tools/llvm-ml/llvm-ml.cpp
M llvm/tools/llvm-objdump/MachODump.cpp
M llvm/tools/llvm-objdump/llvm-objdump.cpp
M llvm/tools/llvm-profgen/Options.h
M llvm/tools/llvm-profgen/PerfReader.cpp
M llvm/tools/llvm-profgen/ProfileGenerator.cpp
M llvm/tools/llvm-profgen/ProfiledBinary.cpp
M llvm/tools/llvm-rc/llvm-rc.cpp
M llvm/tools/llvm-rtdyld/llvm-rtdyld.cpp
M llvm/tools/sancov/sancov.cpp
M llvm/unittests/CodeGen/MFCommon.inc
M llvm/unittests/CodeGen/MachineInstrTest.cpp
M llvm/unittests/CodeGen/MachineOperandTest.cpp
M llvm/unittests/DebugInfo/DWARF/DWARFExpressionCopyBytesTest.cpp
M llvm/unittests/DebugInfo/DWARF/DwarfGenerator.cpp
M llvm/unittests/MC/AMDGPU/Disassembler.cpp
M llvm/unittests/MC/DwarfDebugFrameCIE.cpp
M llvm/unittests/MC/DwarfLineTableHeaders.cpp
M llvm/unittests/MC/DwarfLineTables.cpp
M llvm/unittests/MC/SystemZ/SystemZAsmLexerTest.cpp
M llvm/unittests/MC/SystemZ/SystemZMCDisassemblerTest.cpp
M llvm/unittests/MC/X86/X86MCDisassemblerTest.cpp
M llvm/unittests/Support/xxhashTest.cpp
M llvm/unittests/Target/AArch64/AArch64InstPrinterTest.cpp
M llvm/unittests/TargetParser/TargetParserTest.cpp
M llvm/unittests/tools/llvm-mca/MCATestBase.cpp
M llvm/utils/gn/secondary/clang/lib/ScalableStaticAnalysisFramework/Analyses/BUILD.gn
M llvm/utils/gn/secondary/libcxx/include/BUILD.gn
M llvm/utils/gn/secondary/libcxx/src/BUILD.gn
M llvm/utils/gn/secondary/lldb/test/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/CodeGen/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/Target/RISCV/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/Transforms/Vectorize/BUILD.gn
M llvm/utils/gn/secondary/llvm/unittests/MC/BUILD.gn
M mlir/include/mlir/Analysis/DataFlowFramework.h
M mlir/include/mlir/Dialect/AMDGPU/IR/AMDGPUOps.td
M mlir/include/mlir/Dialect/CommonFolders.h
M mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
M mlir/include/mlir/Dialect/Math/IR/MathBase.td
M mlir/include/mlir/Dialect/Math/IR/MathOps.td
M mlir/include/mlir/Dialect/Vector/IR/VectorOps.td
M mlir/include/mlir/Dialect/XeGPU/IR/XeGPUDialect.td
M mlir/include/mlir/Dialect/XeGPU/IR/XeGPUOps.td
M mlir/include/mlir/Dialect/XeGPU/IR/XeGPUTypes.td
M mlir/include/mlir/IR/DialectRegistry.h
M mlir/include/mlir/Transforms/Passes.td
M mlir/lib/Analysis/DataFlowFramework.cpp
M mlir/lib/Conversion/AMDGPUToROCDL/AMDGPUToROCDL.cpp
M mlir/lib/Conversion/MathToLLVM/MathToLLVM.cpp
M mlir/lib/Conversion/NVGPUToNVVM/NVGPUToNVVM.cpp
M mlir/lib/Conversion/TosaToLinalg/TosaToLinalg.cpp
M mlir/lib/Conversion/VectorToXeGPU/VectorToXeGPU.cpp
M mlir/lib/Conversion/XeGPUToXeVM/XeGPUToXeVM.cpp
M mlir/lib/Conversion/XeVMToLLVM/XeVMToLLVM.cpp
M mlir/lib/Dialect/AMDGPU/IR/AMDGPUOps.cpp
M mlir/lib/Dialect/Arith/IR/ArithOps.cpp
M mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp
M mlir/lib/Dialect/Linalg/Transforms/ShardingInterfaceImpl.cpp
M mlir/lib/Dialect/Math/IR/MathOps.cpp
M mlir/lib/Dialect/Vector/IR/VectorOps.cpp
M mlir/lib/Dialect/Vector/Transforms/LowerVectorContract.cpp
M mlir/lib/Dialect/XeGPU/IR/XeGPUDialect.cpp
M mlir/lib/Dialect/XeGPU/IR/XeGPUOps.cpp
M mlir/lib/Dialect/XeGPU/TransformOps/XeGPUTransformOps.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUBlocking.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUPropagateLayout.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUSubgroupDistribute.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUUnroll.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUWgToSgDistribute.cpp
M mlir/lib/IR/Dialect.cpp
M mlir/lib/IR/MLIRContext.cpp
M mlir/lib/Pass/Pass.cpp
M mlir/lib/Target/LLVM/ROCDL/Target.cpp
M mlir/lib/Target/LLVMIR/Dialect/LLVMIR/LLVMToLLVMIRTranslation.cpp
M mlir/lib/Tools/mlir-opt/MlirOptMain.cpp
M mlir/lib/Transforms/Canonicalizer.cpp
A mlir/test/Analysis/DataFlow/test-staged-analyses.mlir
M mlir/test/Conversion/AMDGPUToROCDL/sparse-mfma-gfx950.mlir
M mlir/test/Conversion/MathToLLVM/math-to-llvm.mlir
M mlir/test/Conversion/NVGPUToNVVM/nvgpu-to-nvvm.mlir
M mlir/test/Conversion/TosaToLinalg/tosa-to-linalg-resize.mlir
M mlir/test/Conversion/VectorToXeGPU/transfer-read-to-xegpu.mlir
M mlir/test/Conversion/VectorToXeGPU/transfer-write-to-xegpu.mlir
M mlir/test/Conversion/XeVMToLLVM/xevm_mx-to-llvm.mlir
M mlir/test/Dialect/AMDGPU/invalid.mlir
M mlir/test/Dialect/AMDGPU/ops.mlir
M mlir/test/Dialect/Arith/canonicalize.mlir
A mlir/test/Dialect/EmitC/arith/ops.mlir
A mlir/test/Dialect/LLVMIR/nvvm-transcendentals.mlir
M mlir/test/Dialect/LLVMIR/nvvm.mlir
M mlir/test/Dialect/Math/canonicalize.mlir
M mlir/test/Dialect/Math/ops.mlir
M mlir/test/Dialect/Vector/vector-contract-to-dot-transforms.mlir
M mlir/test/Dialect/XeGPU/invalid.mlir
M mlir/test/Dialect/XeGPU/layout.mlir
M mlir/test/Dialect/XeGPU/ops.mlir
M mlir/test/Dialect/XeGPU/propagate-layout-inst-data.mlir
M mlir/test/Dialect/XeGPU/propagate-layout-subgroup.mlir
M mlir/test/Dialect/XeGPU/propagate-layout.mlir
M mlir/test/Dialect/XeGPU/xegpu-blocking.mlir
M mlir/test/Dialect/XeGPU/xegpu-recover-layout.mlir
R mlir/test/Dialect/XeGPU/xegpu-unroll-patterns-no-desc-offsets.mlir
M mlir/test/Dialect/XeGPU/xegpu-unroll-patterns.mlir
M mlir/test/Dialect/XeGPU/xegpu-vector-linearize.mlir
M mlir/test/Dialect/XeGPU/xegpu-wg-to-sg-elemwise.mlir
M mlir/test/Dialect/XeGPU/xegpu-wg-to-sg-rr.mlir
R mlir/test/Dialect/XeGPU/xegpu-wg-to-sg-unify-ops-rr.mlir
R mlir/test/Dialect/XeGPU/xegpu-wg-to-sg-unify-ops.mlir
M mlir/test/Dialect/XeGPU/xegpu-wg-to-sg.mlir
M mlir/test/Integration/Dialect/XeVM/GPU/xevm_block_scaled_dpas_bf8.mlir
A mlir/test/Target/LLVMIR/nvvm/transcendentals.mlir
M mlir/test/Target/LLVMIR/nvvmir-invalid.mlir
M mlir/test/Target/LLVMIR/nvvmir.mlir
A mlir/test/Transforms/canonicalize-filter-dialects.mlir
M mlir/test/lib/Analysis/DataFlow/TestDeadCodeAnalysis.cpp
M mlir/test/lib/Analysis/DataFlow/TestDenseBackwardDataFlowAnalysis.cpp
M mlir/test/lib/Analysis/DataFlow/TestDenseForwardDataFlowAnalysis.cpp
M mlir/test/lib/Analysis/DataFlow/TestSparseBackwardDataFlowAnalysis.cpp
M mlir/test/lib/Analysis/TestDataFlowFramework.cpp
M mlir/test/lib/Dialect/Test/TestPatterns.cpp
M mlir/test/lib/Dialect/XeGPU/TestXeGPUTransforms.cpp
M mlir/tools/mlir-opt/mlir-opt.cpp
M offload/plugins-nextgen/amdgpu/dynamic_hsa/hsa_ext_amd.h
M offload/plugins-nextgen/amdgpu/src/rtl.cpp
M openmp/docs/design/Runtimes.rst
M openmp/module/CMakeLists.txt
M openmp/runtime/src/kmp.h
M openmp/runtime/src/kmp_taskdeps.cpp
M openmp/runtime/src/kmp_taskdeps.h
M openmp/runtime/src/kmp_tasking.cpp
M polly/lib/CodeGen/IslNodeBuilder.cpp
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/test/src/sys/socket/BUILD.bazel
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
Log Message:
-----------
[𝘀𝗽𝗿] changes introduced through rebase
Created using spr 1.3.5
[skip ci]
Compare: https://github.com/llvm/llvm-project/compare/29d8721c4f5c...b4701103890b
To unsubscribe from these emails, change your notification settings at https://github.com/llvm/llvm-project/settings/notifications
More information about the All-commits
mailing list