[all-commits] [llvm/llvm-project] dc19e4: [mlir][NVGPUToNVVM] Support BF16 mma.sync lowering...

[Hao Ren via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: dc19e4b0b6c9a10633958046d2e27b597ba7e37e
      https://github.com/llvm/llvm-project/commit/dc19e4b0b6c9a10633958046d2e27b597ba7e37e
  Author: Hao Ren <123687754+moomoohorse321 at users.noreply.github.com>
  Date:   2026-04-27 (Mon, 27 Apr 2026)

  Changed paths:
    M mlir/lib/Conversion/NVGPUToNVVM/NVGPUToNVVM.cpp
    M mlir/test/Conversion/NVGPUToNVVM/nvgpu-to-nvvm.mlir

  Log Message:
  -----------
  [mlir][NVGPUToNVVM] Support BF16 mma.sync lowering (#194203)

Let NVGPUToNVVM to recognize BF16 MMA operand element types
Pack `vector<2xbf16>` fragments to `i32` before emitting
`nvvm.mma.sync`.
This matches the PTX operand encoding for `m16n8k16` BF16 MMA
instructions.

Add a conversion test for `nvgpu.mma.sync` `bf16xbf16` to `f32`
lowering.

Co-authored-by: Hao Ren <rhao8608 at gmail.com>



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