[all-commits] [llvm/llvm-project] c2ba46: AMDGPU: Skip last corrections in afn f64 reciprocal

[Matt Arsenault via All-commits]

  Branch: refs/heads/users/arsenm/amdgpu/skip-last-corrections-fast-f64-rcp
  Home:   https://github.com/llvm/llvm-project
  Commit: c2ba462706b2fc889b2d831fa2570b1f7bc2f90c
      https://github.com/llvm/llvm-project/commit/c2ba462706b2fc889b2d831fa2570b1f7bc2f90c
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2026-04-22 (Wed, 22 Apr 2026)

  Changed paths:
    M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
    M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
    M llvm/test/CodeGen/AMDGPU/GlobalISel/fdiv.f64.ll
    M llvm/test/CodeGen/AMDGPU/fdiv.f64.ll
    M llvm/test/CodeGen/AMDGPU/fneg-combines.new.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.rcp.ll
    M llvm/test/CodeGen/AMDGPU/rsq.f64.ll

  Log Message:
  -----------
  AMDGPU: Skip last corrections in afn f64 reciprocal

Device libs has a fast reciprocal macro that is close
to the fast division expansion, but skips the last terms
compared to the full division.

The basic reciprocal handling has identical output to this
macro. The negative reciprocal case has different fneg placement
and smaller code size, but I believe should be the same.



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