[all-commits] [llvm/llvm-project] 26b7fd: [VPlan] Support plain CFG plans in the verifier. (...

[Florian Hahn via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 26b7fd51095221e03ce2a2170b6d168652ba3c7d
      https://github.com/llvm/llvm-project/commit/26b7fd51095221e03ce2a2170b6d168652ba3c7d
  Author: Florian Hahn <flo at fhahn.com>
  Date:   2026-04-19 (Sun, 19 Apr 2026)

  Changed paths:
    M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
    M llvm/lib/Transforms/Vectorize/VPlanAnalysis.cpp
    M llvm/lib/Transforms/Vectorize/VPlanConstruction.cpp
    M llvm/lib/Transforms/Vectorize/VPlanVerifier.cpp
    M llvm/test/Transforms/LoopVectorize/VPlan/vplan-print-after-all.ll

  Log Message:
  -----------
  [VPlan] Support plain CFG plans in the verifier. (#181817)

Update the verifier to support verifying plain CFG plans in the verifier
and add missing support for switch opcodes in type analysis.

This allows the verifier to handle early plain-CFG plans, allowing using
RUN_PASS wrapper for early transforms.

PR: https://github.com/llvm/llvm-project/pull/181817



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