[all-commits] [llvm/llvm-project] 5afba8: [GVN] use `AssertingVH` for leaders to improve com...
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Branch: refs/heads/users/c8ef/fold_left_first
Home: https://github.com/llvm/llvm-project
Commit: 5afba800906a5e69518abfb1995567c6186cfd6d
https://github.com/llvm/llvm-project/commit/5afba800906a5e69518abfb1995567c6186cfd6d
Author: Princeton Ferro <pferro at nvidia.com>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M llvm/include/llvm/IR/ValueHandle.h
M llvm/include/llvm/Transforms/Scalar/GVN.h
M llvm/lib/Transforms/Scalar/GVN.cpp
M llvm/unittests/IR/ValueHandleTest.cpp
Log Message:
-----------
[GVN] use `AssertingVH` for leaders to improve compilation time (#175870)
Replace the manual check in `verifyRemoved()` with `AssertingVH`
instrumentation. For cases where the leader table becomes very large,
this is a cheaper way to verify we don't have dangling entries in the
leader table.
For this change, we must implement a move constructor for `AssertingVH`
so that we can keep the first entry as an inline-allocated node that
will be handled correctly as the table grows.
Commit: 2ae04112967e16e8cddfd4c1d35de7c74504b8c0
https://github.com/llvm/llvm-project/commit/2ae04112967e16e8cddfd4c1d35de7c74504b8c0
Author: Luke Lau <luke at igalia.com>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fpext-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfma-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfmacc-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfmsac-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfmuladd-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfneg-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfnmacc-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfnmsac-vp.ll
M llvm/test/CodeGen/RISCV/rvv/pr171231.ll
M llvm/test/CodeGen/RISCV/rvv/sink-splat-operands.ll
M llvm/test/CodeGen/RISCV/rvv/vfma-vp-combine.ll
M llvm/test/CodeGen/RISCV/rvv/vfma-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfmuladd-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfneg-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfpext-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfwadd-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfwmacc-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfwmsac-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfwnmacc-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfwnmsac-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vreductions-fp-vp.ll
Log Message:
-----------
[RISCV] Expand vp.fma, fp.fmuladd, vp.fneg, vp.fpext (#190589)
Part of the work to remove trivial VP intrinsics from the RISC-V
backend, see
https://discourse.llvm.org/t/rfc-remove-codegen-support-for-trivial-vp-intrinsics-in-the-risc-v-backend/87999
This PR expands four intrinsics before codegen, but doesn't remove the
codegen handling yet as both DAGCombiner and type legalization can
create these nodes.
vp.fneg and vp.fpext are expanded in lockstep with the fma/fmuladd
intrinsics since some test cases for vfmacc etc. also use these
intrinsics, and mixing dynamic and constant vls causes some of the more
complex patterns to be missed.
The fixed-length VP vfmacc, vfmsac, vfnmacc and vfnmsac tests also need
to replace the EVL of the vp.merge/vp.select with an immediate otherwise
the resulting vmerge.vvm can't be folded into them. This only happens
for fixed vector intrinsics with no passthru, since we end up with a
constant vl from the fixed vector and dynamic vl from the vp.merge that
prevents folding.
As far as I'm aware we don't emit fixed length vp.merges in practice,
since we only emit vp.merge in the loop vectorizer, and we only use it
with EVL tail folding which requires a scalable VF.
Commit: 86e790076ab022573705aafae552ec3a3e2032a7
https://github.com/llvm/llvm-project/commit/86e790076ab022573705aafae552ec3a3e2032a7
Author: Georgiy Samoylov <Ignitor21838 at gmail.com>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M lldb/source/Host/common/Socket.cpp
M lldb/unittests/Host/SocketTest.cpp
M lldb/unittests/Process/gdb-remote/GDBRemoteCommunicationServerLLGSTest.cpp
Log Message:
-----------
[lldb] Fix lldb-server host and port address parsing (#191414)
This patch fixes 2 problems in lldb-server argument parser:
1. Let's try to start lldb-server with incorrect arguments
```
./lldb-server platform --listen *:1111--server
```
Current behavior
* lldb-server run in gdbserver mode with port 1111
Expected behavior
* fail, as `1111–server` is not a number
2. And try to start lldb-server with host:port specification without
colon
```
./lldb-server gdbserver 1111 ./test
Launched './test' as process 186...
lldb-server-local_build
lldb-server: llvm-project/lldb/source/Host/common/TCPSocket.cpp:245: virtual Status lldb_private::TCPSocket::Listen(llvm::StringRef, int): Assertion `error.Fail()' failed.
PLEASE submit a bug report to https://github.com/llvm/llvm-project/issues/ and include the crash backtrace.
Stack dump:
0. Program arguments: ./lldb-server gdbserver 1111 ./test
Stack dump without symbol names (ensure you have llvm-symbolizer in your PATH or set the environment var `LLVM_SYMBOLIZER_PATH` to point to it):
0 lldb-server 0x0000002ab86d0ca2
1 lldb-server 0x0000002ab86ced06
2 lldb-server 0x0000002ab86d1428
3 linux-vdso.so.1 0x0000003f8e7fd800 __vdso_rt_sigreturn + 0
4 libc.so.6 0x0000003f8e2b264a
5 libc.so.6 0x0000003f8e27b1ac gsignal + 18
6 libc.so.6 0x0000003f8e26c14c abort + 180
7 libc.so.6 0x0000003f8e2760cc
8 libc.so.6 0x0000003f8e27610e __assert_perror_fail + 0
9 lldb-server 0x0000002ab86eb628
10 lldb-server 0x0000002ab86f1010
11 lldb-server 0x0000002ab86eeee0
12 lldb-server 0x0000002ab86eee5c
13 lldb-server 0x0000002ab863ef3a
14 lldb-server 0x0000002ab864067c
15 lldb-server 0x0000002ab86438da
16 libc.so.6 0x0000003f8e26c476
17 libc.so.6 0x0000003f8e26c51e __libc_start_main + 116
18 lldb-server 0x0000002ab863ce64
Aborted
```
We expect to see an error instead of lldb-server crash in this case
Commit: 52a250ea1b8d6b34da4e437d89dda246d5e87e6f
https://github.com/llvm/llvm-project/commit/52a250ea1b8d6b34da4e437d89dda246d5e87e6f
Author: Juan Manuel Martinez Caamaño <jmartinezcaamao at gmail.com>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M lldb/source/Plugins/TypeSystem/Clang/TypeSystemClang.cpp
M lldb/source/Symbol/Variable.cpp
M lldb/source/ValueObject/ValueObject.cpp
M llvm/include/llvm/Support/Error.h
M llvm/tools/llvm-readobj/ELFDumper.cpp
Log Message:
-----------
[NFC] Replace `expectedToStdOptional` with `expectedToOptional` (#191359)
Both implementations are currently equivalent. This is likely a leftover
from the past, when `llvm::Optional` existed.
Commit: 91c0fdfe13928838864d9618ea28dcbe9a112b8c
https://github.com/llvm/llvm-project/commit/91c0fdfe13928838864d9618ea28dcbe9a112b8c
Author: Schrodinger ZHU Yifan <yifanzhu at rochester.edu>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/include/pthread.yaml
M libc/src/__support/threads/mutex.h
M libc/src/pthread/CMakeLists.txt
A libc/src/pthread/pthread_mutex_trylock.cpp
A libc/src/pthread/pthread_mutex_trylock.h
M libc/test/integration/src/pthread/CMakeLists.txt
M libc/test/integration/src/pthread/pthread_mutex_test.cpp
Log Message:
-----------
[libc] add posix_mutex_trylock support (#191531)
Expose existing trylock internal operation to posix interface.
POSIX.1-2024 only specifies the `EBUSY` error case.
Assisted-by: Codex with gpt-5.4 default fast
Commit: bc8c18165fc394eaf4455f0ca86b3511b85f0427
https://github.com/llvm/llvm-project/commit/bc8c18165fc394eaf4455f0ca86b3511b85f0427
Author: Luke Lau <luke at igalia.com>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vmax-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vmaxu-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vmin-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vminu-vp.ll
M llvm/test/CodeGen/RISCV/rvv/sink-splat-operands.ll
M llvm/test/CodeGen/RISCV/rvv/vmax-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vmaxu-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vmin-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vminu-vp.ll
Log Message:
-----------
[RISCV] Remove codegen for vp_{u,s}{max,min} (#191640)
Part of the work to remove trivial VP intrinsics from the RISC-V
backend, see
https://discourse.llvm.org/t/rfc-remove-codegen-support-for-trivial-vp-intrinsics-in-the-risc-v-backend/87999
This splits off 4 intrinsics from #179622.
Commit: fefa5a89711e29feb8a9c2b15af9a2b75d862462
https://github.com/llvm/llvm-project/commit/fefa5a89711e29feb8a9c2b15af9a2b75d862462
Author: Lang Hames <lhames at gmail.com>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M llvm/include/llvm/ExecutionEngine/Orc/MachOPlatform.h
M llvm/lib/ExecutionEngine/Orc/MachOPlatform.cpp
Log Message:
-----------
[ORC] Add MachOPlatform::HeaderOptions customization callback. (#191819)
This change aims to make it easier for MachOPlatform clients to
customize JITDylib MachO headers.
At MachOPlatform construction time clients can now supply a
MachOPlatform::HeaderOptionsBuilder. The supplied callback will be
called by setupJITDylib to create the HeaderOptions for the JITDylib
being set up.
No testcase: Constructing a MachOPlatform instance requires the ORC
runtime, which we can't require for LLVM unit or regression suite tests.
We should look at testing this functionality in the new ORC runtime once
it's ready.
Commit: 9192300315e1efc2f6054d4786b96ada8b7ac520
https://github.com/llvm/llvm-project/commit/9192300315e1efc2f6054d4786b96ada8b7ac520
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M flang/include/flang/Semantics/openmp-utils.h
M flang/lib/Semantics/openmp-utils.cpp
Log Message:
-----------
[flang][OpenMP] Implement GetGeneratedNestDepthWithReason (#191718)
For a loop-nest-generating construct this function returns the number of
loops in the generated loop nest.
A loop-nest-transformation construct can be thought of as replacing N
nested loops with K nested loops, where
N = GetAffectedNestDepthWithReason
K = GetGeneratedNestDepthWithReason
Commit: 386e67da649161349cea2fba7401c0829f248bc1
https://github.com/llvm/llvm-project/commit/386e67da649161349cea2fba7401c0829f248bc1
Author: Utkarsh Saxena <usx at google.com>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M clang/include/clang/Analysis/Analyses/LifetimeSafety/LifetimeSafety.h
M clang/lib/Analysis/LifetimeSafety/Checker.cpp
M clang/lib/Sema/AnalysisBasedWarnings.cpp
M clang/lib/Sema/SemaLifetimeSafety.h
M clang/test/Sema/warn-lifetime-analysis-nocfg.cpp
M clang/test/Sema/warn-lifetime-safety-suggestions.cpp
M clang/test/Sema/warn-lifetime-safety.cpp
Log Message:
-----------
[LifetimeSafety] Suggest/infer annotation in constructors (#191699)
This change improves the lifetime safety checker to detect when
constructor parameters escape to class fields and suggest appropriate
`[[clang::lifetimebound]]` annotations.
```cpp
struct A {
View v;
A(const MyObj& obj) : v(obj) {} // Now suggests [[clang::lifetimebound]]
};
```
Commit: 96ae4136d0b18b0257a05f33cc296e6a1f32b314
https://github.com/llvm/llvm-project/commit/96ae4136d0b18b0257a05f33cc296e6a1f32b314
Author: Lang Hames <lhames at gmail.com>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M llvm/examples/Kaleidoscope/BuildingAJIT/Chapter3/KaleidoscopeJIT.h
M llvm/examples/Kaleidoscope/BuildingAJIT/Chapter4/KaleidoscopeJIT.h
M llvm/examples/OrcV2Examples/LLJITWithExecutorProcessControl/LLJITWithExecutorProcessControl.cpp
Log Message:
-----------
[ORC] Fix examples after 6dbf9d1ac5e (forward declaration of MemoryAc… (#191834)
…cess).
6dbf9d1ac5e forward declared the MemoryAccess class in
ExecutorProcessControl.h, breaking some examples that were depending on
the transitive include. (See e.g.
https://lab.llvm.org/buildbot/#/builders/80/builds/21875).
This commit adds the missing #includes to the broken examples.
Commit: 3f45921068c31935f7d34e9131c68284ddfccdb6
https://github.com/llvm/llvm-project/commit/3f45921068c31935f7d34e9131c68284ddfccdb6
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoP.td
M llvm/test/CodeGen/RISCV/rv32p.ll
M llvm/test/CodeGen/RISCV/rvp-ext-rv32.ll
M llvm/test/CodeGen/RISCV/rvp-ext-rv64.ll
A llvm/test/MC/RISCV/rv32p-aliases-valid.s
M llvm/test/MC/RISCV/rv32p-valid.s
A llvm/test/MC/RISCV/rv64p-aliases-valid.s
Log Message:
-----------
[RISCV] Add an initial set of InstAliases for P extension. (#180315)
These are now listed in the asciidoc spec here
https://github.com/riscv/riscv-p-spec
I got some help on this from AI, but I reviewed it. Test cases were
fully generated with AI.
Commit: 977c516ca85dfe49163c96a4d84da5ee5690bac7
https://github.com/llvm/llvm-project/commit/977c516ca85dfe49163c96a4d84da5ee5690bac7
Author: Jonathan Thackray <jonathan.thackray at arm.com>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64SystemOperands.td
M llvm/test/MC/AArch64/armv9.7a-gcie.s
Log Message:
-----------
[AArch64][llvm] Add GICv5 ICH_PPI_HVIR{0,1}_EL2 system registers (#191818)
Add GICv5 `ICH_PPI_HVIR{0,1}_EL2` system registers (Interrupt
Controller PPI Hide Virtual Interrupt Registers). These registers
are added because a hypervisor may want to only expose a subset of the
PPIs to the virtual machine and hide the remaining PPIs.
The only way the hypervisor can do this is by trapping all the PPI ICV
registers which leads to additional code complexity and adds performance
overhead especially for nested virtualization.
These are documented here:
https://developer.arm.com/documentation/111107/latest/AArch64-Registers/ICH-PPI-HVIR-n--EL2--Interrupt-Controller-PPI-Hide-Virtual-Interrupt-Registers
Commit: f058eaa7c56e1a23c69815ca89ad8148c6e84ebe
https://github.com/llvm/llvm-project/commit/f058eaa7c56e1a23c69815ca89ad8148c6e84ebe
Author: Pankaj Dwivedi <pankajkumar.divedi at amd.com>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M llvm/include/llvm/ADT/GenericUniformityImpl.h
M llvm/include/llvm/Analysis/UniformityAnalysis.h
M llvm/include/llvm/CodeGen/MachineUniformityAnalysis.h
M llvm/lib/Analysis/UniformityAnalysis.cpp
M llvm/lib/CodeGen/MachineUniformityAnalysis.cpp
Log Message:
-----------
[NFC][UniformityAnalysis] Rename variables in uniformity analysis to follow LLVM conventions (#191134)
Follow-up to
#[189948](https://github.com/llvm/llvm-project/pull/189948#discussion_r3027394937).
Addresses review feedback
Co-authored-by: padivedi <padivedi at amd.com>
Commit: e0adc50e6413a1fb5656d45abcc65966027adaa0
https://github.com/llvm/llvm-project/commit/e0adc50e6413a1fb5656d45abcc65966027adaa0
Author: Alex Duran <alejandro.duran at intel.com>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M offload/plugins-nextgen/level_zero/src/L0Kernel.cpp
M offload/test/offloading/ompx_bare_multi_dim.cpp
Log Message:
-----------
[OFFLOAD][L0] Handle group sizes correctly for multidimensional bare kernels (#191770)
Don't use the L0 heuristics if all the dimensions are specified by the
user code.
Commit: 212d612bae9542cc404491336ef79d7ea27f470f
https://github.com/llvm/llvm-project/commit/212d612bae9542cc404491336ef79d7ea27f470f
Author: Chi-Chun, Chen <chichun.chen at hpe.com>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M llvm/include/llvm/Frontend/OpenMP/OMPIRBuilder.h
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
M llvm/unittests/Frontend/OpenMPIRBuilderTest.cpp
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
M mlir/test/Target/LLVMIR/openmp-iterator.mlir
M mlir/test/Target/LLVMIR/openmp-todo.mlir
Log Message:
-----------
[mlir][llvm][OpenMP] Support iterator modifier in depend clause (#190026)
Add translation from the MLIR OpenMP depend clause with iterator
modifier to LLVM IR. `buildDependData` (in OpenMPToLLVMIRTranslation)
allocates a single `kmp_depend_info` array sized to hold both locator
(non-iterated) and iterated entries. Locator dependencies use the
existing static path (a vector of `DependData`), while iterated
dependencies use a dynamically-sized path (`DepArray`, `NumDeps`).
The reason both paths are not unified under the dynamic allocation is
that the existing locator path emits actual `kmp_depend_info` entries
inside OMPIRBuilder methods (`createTask`, `createTarget`), whereas the
iterator path must emit the iterator loop in OpenMPToLLVMIRTranslation
(since the convention is to not pass MLIR ops into the OMPIRBuilder).
Unifying them would require modifying existing depend clause tests.
The `OMPIRBuilder::DependenciesInfo` struct is extended to hold either a
`SmallVector<DependData>` (locator path) or a pre-built `{DepArray,
NumDeps}` pair (iterator path). The single-entry `emitTaskDependency`
helper is made public so the translation layer can fill individual
`kmp_depend_info` entries inside the iterator loop body.
This patch is part of the feature work for #188061.
Assisted with copilot.
Commit: 22e6a261fae1eb57105cc131592026701f283e0e
https://github.com/llvm/llvm-project/commit/22e6a261fae1eb57105cc131592026701f283e0e
Author: Paul Kirth <paulkirth at google.com>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M clang-tools-extra/clang-doc/BitcodeReader.cpp
M clang-tools-extra/clang-doc/BitcodeReader.h
M clang-tools-extra/clang-doc/JSONGenerator.cpp
M clang-tools-extra/clang-doc/MDGenerator.cpp
M clang-tools-extra/clang-doc/Mapper.cpp
M clang-tools-extra/clang-doc/Representation.cpp
M clang-tools-extra/clang-doc/Representation.h
M clang-tools-extra/clang-doc/Serialize.cpp
M clang-tools-extra/clang-doc/Serialize.h
M clang-tools-extra/clang-doc/YAMLGenerator.cpp
M clang-tools-extra/clang-doc/benchmarks/ClangDocBenchmark.cpp
M clang-tools-extra/clang-doc/tool/ClangDocMain.cpp
M clang-tools-extra/unittests/clang-doc/BitcodeTest.cpp
M clang-tools-extra/unittests/clang-doc/ClangDocTest.cpp
M clang-tools-extra/unittests/clang-doc/ClangDocTest.h
M clang-tools-extra/unittests/clang-doc/GeneratorTest.cpp
M clang-tools-extra/unittests/clang-doc/JSONGeneratorTest.cpp
M clang-tools-extra/unittests/clang-doc/MDGeneratorTest.cpp
M clang-tools-extra/unittests/clang-doc/MergeTest.cpp
M clang-tools-extra/unittests/clang-doc/SerializeTest.cpp
M clang-tools-extra/unittests/clang-doc/YAMLGeneratorTest.cpp
Log Message:
-----------
Revert clang-doc arena merging patches (#191668)
This is a set of squashed reverts of recent clang doc patches, since its
breaking something on Darwin builders:
https://lab.llvm.org/buildbot/#/builders/23/builds/19172
Revert "[clang-doc][nfc] Default initialize all StringRef members
(#191641)"
This reverts commit 155b9b354c1d91661be9f6d0432a96e47cfc2700.
Revert "[clang-doc] Initialize StringRef members in Info types
(#191637)"
This reverts commit 489dab3827b255d21ea38b1e3f45ddb08bd10a87.
Revert "[clang-doc] Initialize member variable (#191570)"
This reverts commit 5d64a44a84af31f9e99d42cccffa4f01c0be2e0b.
Revert "[clang-doc] Merge data into persistent memory (#190056)"
This reverts commit 21e0034c69489eff3b09929e5e13ea34b3dd0e5a.
Revert "[clang-doc] Support deep copy between arenas for merging
(#190055)"
This reverts commit c70dae8b0cee46af1411bc4e4ba6fc28e2babf3e.
Commit: 7b4c9bb2069536e0df18597795b858e18a1cbaaf
https://github.com/llvm/llvm-project/commit/7b4c9bb2069536e0df18597795b858e18a1cbaaf
Author: Md Abdullah Shahneous Bari <md.abdullah.shahneous.bari at intel.com>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
A mlir/cmake/modules/Findocloc.cmake
M mlir/include/mlir/Target/LLVM/XeVM/Utils.h
M mlir/lib/Target/LLVM/CMakeLists.txt
M mlir/lib/Target/LLVM/XeVM/Target.cpp
Log Message:
-----------
[mlir][XeVM] Use libocloc API for binary generation. (#188353)
This PR improves native binary generation by avoiding
`llvm::sys::ExecuteAndWait` call for ocloc and instead
leveraging `oclocInvoke()` that consumes an in-memory SPIR-V string.
Co-authored-by: Artem Kroviakov <artem.kroviakov at intel.com>
Commit: 058d80d814f45f98c7a16d93b85136426d5cdd1b
https://github.com/llvm/llvm-project/commit/058d80d814f45f98c7a16d93b85136426d5cdd1b
Author: Alexis Perry-Holby <aperry at lanl.gov>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
A flang/docs/MeetingNotes/2026/2026-04-08.md
Log Message:
-----------
[flang] Adding meeting notes for the April 8, 2026 Flang call (#191003)
Commit: 23361e18ac41c3460e0cf79d0cd58beafd5c0a84
https://github.com/llvm/llvm-project/commit/23361e18ac41c3460e0cf79d0cd58beafd5c0a84
Author: hulxv <hulxxv at gmail.com>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M libc/shared/math.h
A libc/shared/math/copysign.h
A libc/shared/math/copysignbf16.h
A libc/shared/math/copysignf.h
A libc/shared/math/copysignf128.h
A libc/shared/math/copysignf16.h
A libc/shared/math/copysignl.h
M libc/src/__support/FPUtil/ManipulationFunctions.h
M libc/src/__support/math/CMakeLists.txt
A libc/src/__support/math/copysign.h
A libc/src/__support/math/copysignbf16.h
A libc/src/__support/math/copysignf.h
A libc/src/__support/math/copysignf128.h
A libc/src/__support/math/copysignf16.h
A libc/src/__support/math/copysignl.h
M libc/src/math/generic/CMakeLists.txt
M libc/src/math/generic/copysign.cpp
M libc/src/math/generic/copysignbf16.cpp
M libc/src/math/generic/copysignf.cpp
M libc/src/math/generic/copysignf128.cpp
M libc/src/math/generic/copysignf16.cpp
M libc/src/math/generic/copysignl.cpp
M libc/test/shared/CMakeLists.txt
M libc/test/shared/shared_math_constexpr_test.cpp
M libc/test/shared/shared_math_test.cpp
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[libc][math] Refactor copysign family to header-only (#182137)
Refactors the copysign math family to be header-only.
Closes https://github.com/llvm/llvm-project/issues/182136
Target Functions:
- copysign
- copysignbf16
- copysignf
- copysignf128
- copysignf16
- copysignl
---------
Co-authored-by: bassiounix <muhammad.m.bassiouni at gmail.com>
Commit: 05411b993108a5125c04cf4e3792c1061fb5b050
https://github.com/llvm/llvm-project/commit/05411b993108a5125c04cf4e3792c1061fb5b050
Author: Snehasish Kumar <mail at snehasish.net>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M llvm/lib/Transforms/IPO/SampleProfileMatcher.cpp
Log Message:
-----------
[SamplePGO] Optimize the basename matching logic for matching unused profiles (#191523)
This change optimizes the basename matching logic in
`SampleProfileMatcher::matchFunctionsWithoutProfileByBasename` by
replacing the existing O(N*M) nested loop with an O(N+M) hash-based
lookup, while strictly preserving the original matching semantics. The
previous implementation relied on a substring heuristic
(`ProfName.contains(BaseName)`) to bypass expensive demangling
operations during the nested iteration; however, in codebases with
common or overlapping function names, this heuristic frequently
evaluated to true, resulting in redundant demangling and quadratic time
complexity. The updated approach demangles each profile name exactly
once and utilizes a `StringMap` to perform O(1) lookups against the
orphan functions. This eliminates the need for the substring pre-check
while maintaining the exact same constraints: establishing a strict 1:1
mapping between orphaned IR functions and profile entries, and correctly
identifying and rejecting ambiguous matches where multiple entities
share the same demangled basename.
Results in a 9x speedup on a large module with common basenames.
Commit: 6d39df0104136fc7e459a3d3a1787644d0621942
https://github.com/llvm/llvm-project/commit/6d39df0104136fc7e459a3d3a1787644d0621942
Author: David Green <david.green at arm.com>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/test/CodeGen/AArch64/arm64-stur.ll
M llvm/test/CodeGen/AArch64/merge-store.ll
M llvm/test/CodeGen/AArch64/st1-lane.ll
M llvm/test/CodeGen/AArch64/sve-fixed-length-extract-subvector.ll
Log Message:
-----------
[AArch64] Add tablegen patterns for store of high-half. (#190320)
This helps remove the extract but mean less efficient addressing modes.
Commit: b07a0250e154a245cac39344d30f9beb9883f9d0
https://github.com/llvm/llvm-project/commit/b07a0250e154a245cac39344d30f9beb9883f9d0
Author: Slava Zakharin <szakharin at nvidia.com>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M flang/include/flang/Optimizer/Dialect/FIROps.td
M flang/include/flang/Optimizer/HLFIR/HLFIROps.td
M flang/test/Transforms/licm.fir
Log Message:
-----------
[flang] Make more [HL]FIR operations Pure. (#191309)
This patch addresses cases where an operation seems obviously Pure to me.
Made-with: Cursor
Commit: f1a99ff328f2d44685022be91201dcc6e9a70a9e
https://github.com/llvm/llvm-project/commit/f1a99ff328f2d44685022be91201dcc6e9a70a9e
Author: Slava Zakharin <szakharin at nvidia.com>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M flang/lib/Optimizer/Analysis/AliasAnalysis.cpp
A flang/test/Transforms/licm-non-addressable-resource.mlir
Log Message:
-----------
[flang] Recognize non-addressable resources in FIR AA. (#191577)
Same as in #187423 change for CSE, we can assume that an effect
on a non-addressable resource cannot affect memory pointed to
by 'location'.
Commit: 68c10f601b596385d2c8dd73c7b542be3b87a244
https://github.com/llvm/llvm-project/commit/68c10f601b596385d2c8dd73c7b542be3b87a244
Author: Joel E. Denny <jdenny.ornl at gmail.com>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M llvm/include/llvm/Support/BranchProbability.h
M llvm/lib/Transforms/Utils/LoopUnroll.cpp
M llvm/lib/Transforms/Utils/LoopUnrollRuntime.cpp
Log Message:
-----------
[LoopUnroll] Record conditional latch info (#182403)
This patch makes no functional change and so introduces no new tests or
documentation, but it is not merely refactoring.
This patch gathers conditional latch info needed for PR #179520, which
fixes block frequencies when LoopUnroll converts a conditional latch in
an unrolled loop iteration to unconditional. Without PR #179520, this
patch is useless and should not land.
Commit: e34412476cf11eefd141db578770e738843e04a9
https://github.com/llvm/llvm-project/commit/e34412476cf11eefd141db578770e738843e04a9
Author: Luke Lau <luke at igalia.com>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
M llvm/test/CodeGen/RISCV/rvv/bitreverse-vp.ll
M llvm/test/CodeGen/RISCV/rvv/bswap-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-bitreverse-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-bswap-vp.ll
Log Message:
-----------
[RISCV] Remove codegen for vp_bitreverse, vp_bswap (#191643)
Part of the work to remove trivial VP intrinsics from the RISC-V
backend, see
https://discourse.llvm.org/t/rfc-remove-codegen-support-for-trivial-vp-intrinsics-in-the-risc-v-backend/87999
This splits off 2 intrinsics from #179622.
Commit: a20fea899e2adb34f604ef7e81e408701cba109b
https://github.com/llvm/llvm-project/commit/a20fea899e2adb34f604ef7e81e408701cba109b
Author: Jeffrey Byrnes <jeffrey.byrnes at amd.com>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/VOP3Instructions.td
M llvm/test/CodeGen/AMDGPU/GlobalISel/fdiv.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fdiv.f32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fdiv.f64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.div.scale.ll
M llvm/test/CodeGen/AMDGPU/bf16.ll
M llvm/test/CodeGen/AMDGPU/dagcombine-select.ll
M llvm/test/CodeGen/AMDGPU/fdiv.f16.ll
M llvm/test/CodeGen/AMDGPU/fdiv.ll
M llvm/test/CodeGen/AMDGPU/fdiv_flags.f32.ll
M llvm/test/CodeGen/AMDGPU/freeze-binary.ll
M llvm/test/CodeGen/AMDGPU/repeated-divisor.ll
M llvm/test/CodeGen/AMDGPU/rsq.f32-safe.ll
M llvm/test/CodeGen/AMDGPU/rsq.f64.ll
A llvm/test/CodeGen/AMDGPU/schedmodel-dummywrite.mir
M llvm/test/tools/llvm-mca/AMDGPU/gfx10-double.s
M llvm/test/tools/llvm-mca/AMDGPU/gfx11-double.s
Log Message:
-----------
[AMDGPU] Use WriteSALUDummy for v_div_scale* (#191670)
This uses the new HWWriteRes for v_div_scale*
For an explanation of why we want to do this , see
https://github.com/llvm/llvm-project/pull/190095 . In short, the
scheduler will not try to cover the full latency of the instructions
without this new modelling.
For a clear example of this, see the changes to
llvm/test/CodeGen/AMDGPU/schedmodel-dummywrite.mir in the git log of
this PR.
Commit: 1b2ccc16ce90b52ebd1f1629e5a95bc4203c1dc1
https://github.com/llvm/llvm-project/commit/1b2ccc16ce90b52ebd1f1629e5a95bc4203c1dc1
Author: Joel E. Denny <jdenny.ornl at gmail.com>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
A llvm/test/Transforms/LoopUnroll/branch-weights-freq/unroll-complete.ll
M llvm/test/Transforms/LoopUnroll/branch-weights-freq/unroll-epilog.ll
A llvm/test/Transforms/LoopUnroll/branch-weights-freq/unroll-partial-unconditional-latch.ll
M llvm/test/Transforms/LoopUnroll/branch-weights-freq/unroll-partial.ll
M llvm/test/Transforms/LoopUnroll/loop-probability-one.ll
Log Message:
-----------
[LoopUnroll] Fix freqs for unconditional latches: introduce tests (#191008)
This patch introduces all tests for PR #179520 but with current results
so that it is easier to see which results PR #179520 improves. This
patch should not land without PR #179520.
Commit: b25ecac3c3cc759f100d2c9b2b8379f9eb76241b
https://github.com/llvm/llvm-project/commit/b25ecac3c3cc759f100d2c9b2b8379f9eb76241b
Author: Caroline Newcombe <caroline.newcombe at hpe.com>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M flang/lib/Lower/ConvertExprToHLFIR.cpp
A flang/test/Lower/HLFIR/conditional-expr.f90
Log Message:
-----------
[flang] Implement conditional expressions lowering (F2023) (#186490)
## Implement Lowering for Fortran 2023 Conditional Expressions (R1002)
***This PR contains the lowering steps only for ease of review. DO NOT
MERGE until #186489 is merged.***
Implements Fortran 2023 conditional expressions with syntax: `result =
(condition ? value1 : condition2 ? value2 : ... : elseValue)`
Issue: #176999
Discourse:
https://discourse.llvm.org/t/rfc-adding-conditional-expressions-in-flang-f2023/89869/1
-- note that some of the details provided in the RFC post are no longer
accurate
### Implementation Details
**Lowering to HLFIR:**
- Lazy evaluation via nested if-then-else control flow
- Only the selected branch is evaluated
- Temporary allocation with proper cleanup
- Special handling for:
- CHARACTER types with deferred length
- Arrays (shape determined by selected branch per F2023 10.1.4(7))
- Derived types
**LIT Testing:**
- Lowering tests: HLFIR code generation verification
- Note: Executable tests will be added to the llvm-test-suite repo
(https://github.com/llvm/llvm-test-suite/pull/369)
**Limitations**
- Conditional arguments are not yet supported. This work is planned
- #180592
- Polymorphic types (CLASS) not yet supported in lowering
- Both limitations will emit clear error message if encountered
### Examples
```
! Simple conditional
x = (flag ? 10 : 20)
! Chained
result = (x > 0 ? 1 : x < 0 ? -1 : 0)
! Examples from F2023
( ABS (RESIDUAL)<=TOLERANCE ? ’ok’ : ’did not converge’ )
( I>0 .AND. I<=SIZE (A) ? A (I) : PRESENT (VAL) ? VAL : 0.0 )
```
AI Usage Disclosure: AI tools (Claude Sonnet 4.5) were used to assist
with implementation of this feature and test code generation. I have
reviewed, modified, and tested all AI-generated code.
Commit: cd773a64de9a90756f652e1092ea490ba4275dc3
https://github.com/llvm/llvm-project/commit/cd773a64de9a90756f652e1092ea490ba4275dc3
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M mlir/include/mlir/Dialect/OpenACC/Transforms/ACCSpecializePatterns.h
Log Message:
-----------
[OpenACC] Fix IR verification failures in acc-specialize passes (#188961)
When MLIR_ENABLE_EXPENSIVE_PATTERN_API_CHECKS is enabled, the greedy
driver verifies the IR after each pattern application. The specialize
passes failed because ACCOpReplaceWithVarConversion would run on a data
entry op (e.g. acc.create) before container ops that use it in their
dataOperands were processed. After replacement, the container op held a
non-data-entry operand (e.g. a func arg), failing the acc dialect's
dataOperands verifier.
Fix: in ACCOpReplaceWithVarConversion, defer by returning failure() when
any user of the data entry op's result is a container op that validates
its operands as data entry ops (acc.data, acc.parallel, acc.serial,
acc.kernels, acc.host_data, acc.kernel_environment, acc.declare_enter,
acc.enter_data). The greedy driver will process the container op first
(via ACCRegionUnwrapConversion or ACCDeclareEnterOpConversion), removing
the use, after which the data entry op can be safely replaced.
Assisted-by: Claude Code
Fix a failure present with MLIR_ENABLE_EXPENSIVE_PATTERN_API_CHECKS=ON.
Commit: 8c60833132e75b9ef50f9497ab0de0cfd1c5f5f5
https://github.com/llvm/llvm-project/commit/8c60833132e75b9ef50f9497ab0de0cfd1c5f5f5
Author: Tom Eccles <tom.eccles at arm.com>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M mlir/include/mlir/Dialect/OpenMP/OpenMPOps.td
M mlir/include/mlir/Target/LLVMIR/ModuleTranslation.h
M mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
M mlir/lib/Target/LLVMIR/ModuleTranslation.cpp
M mlir/test/Dialect/OpenMP/invalid.mlir
M mlir/test/Dialect/OpenMP/ops.mlir
A mlir/test/Target/LLVMIR/openmp-taskloop-local-bounds.mlir
Log Message:
-----------
[mlir][OpenMP] Support pure taskloop-local loop bounds (#190992)
Follow up to https://github.com/llvm/llvm-project/pull/190827
Assisted-by: codex
Commit: a60d6982cd0a495d2d5e2c0a219f63de289cc1c9
https://github.com/llvm/llvm-project/commit/a60d6982cd0a495d2d5e2c0a219f63de289cc1c9
Author: David Tenty <daltenty at ibm.com>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Driver/ToolChains/AIX.cpp
M clang/test/Driver/aix-ld.c
M compiler-rt/lib/profile/InstrProfilingPlatformAIX.c
M compiler-rt/test/profile/instrprof-merge-entry-cover.c
M compiler-rt/test/profile/instrprof-merge.c
M compiler-rt/test/profile/instrprof-write-file-atexit-explicitly.c
M compiler-rt/test/profile/profile_test.h
Log Message:
-----------
[clang][driver][AIX] Change linker bcdtor mode to default to mbr (#191265)
The bcdtor mode affects how the AIX linker choose to pull in static
constructors and destructors
(https://www.ibm.com/docs/en/aix/7.2.0?topic=l-ld-command) to the link.
The current setting of `all` makes static init in archive members live
regardless of if the archive member would be otherwise referenced,
causing that whole archive member to become part of the link.
This default was initially retained for compatibility purposes with
historical compilers on the platform which defaulted to this setting.
Unfortunately this greedy pulling in of static init can have unintended
consequences for applications, for example for programs linked against
parts of compiler-rt which contain optional instrumentation (containing
static initializers) which may be unused as these now become live in all
programs regardless of use.
For that reason and similar reasons, this PR switches the default to
`mbr`, which only extracts static init from archive members which would
otherwise be referenced. This gives a behaviour very consistent with
linkers on other platforms (e.g. Linux).
Users requiring the old default behaviour can manually pass
`-bcdtors:all` on the link step which will override any default we pass
here.
Commit: 465673edc3abdb7f0fc595dc790ad421cc022513
https://github.com/llvm/llvm-project/commit/465673edc3abdb7f0fc595dc790ad421cc022513
Author: Utkarsh Saxena <usx at google.com>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M clang/include/clang/Analysis/Analyses/LifetimeSafety/FactsGenerator.h
M clang/lib/Analysis/CFG.cpp
M clang/lib/Analysis/LifetimeSafety/FactsGenerator.cpp
M clang/test/Sema/warn-lifetime-safety.cpp
Log Message:
-----------
[CFG] Fix cleanup ordering for CXXDefaultInitExpr
(#191786)
Fixes CFG construction for default member initializers when
`AddCXXDefaultInitExprInCtors` is enabled by correcting the execution
order of cleanups.
E.g., in
```cpp
struct H {
std::string_view v = std::string("x");
H() {}
};
```
Previously, destructors for temporaries in default initializers
for`std::string("x")` was sequenced _before_ the member initialization,
causing false negatives in lifetime safety analysis because the
temporary appeared to be destroyed prematurely before making to a
origin.
Resolved this by modifying `CFGBuilder::addInitializer` to defer these
cleanups to the end of the initialization full-expression.
_(AI-assisted with HITL)_
Commit: 46fd15a21ad90b463747452e7e68c669a30dbd52
https://github.com/llvm/llvm-project/commit/46fd15a21ad90b463747452e7e68c669a30dbd52
Author: Kai <47328809+kcloudy0717 at users.noreply.github.com>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M clang/test/CodeGenHLSL/builtins/QuadReadAcrossX.hlsl
M clang/test/SemaHLSL/BuiltIns/QuadReadAcrossX-errors.hlsl
Log Message:
-----------
[CodeGen][HLSL] Improved QuadReadAcrossX CodeGen test (#188488)
This PR improves CodeGenHLSL tests for QuadReadAcrossX. It should cover
all supported types along with 16-bit types. Using regex captures to
simplify writing checks for subsequent test cases.
Commit: f285a55b9cd70818b1f4e8bb4fddbe32fe8caa52
https://github.com/llvm/llvm-project/commit/f285a55b9cd70818b1f4e8bb4fddbe32fe8caa52
Author: Keith Smiley <keithbsmiley at gmail.com>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M lld/ELF/AArch64ErrataFix.h
Log Message:
-----------
[lld] Add missing include in AArch64ErrataFix (NFC) (#190664)
This header assumed SmallVector would be included before it
Commit: 1b275a177fe7c2f74c3575bce2932ba37086a507
https://github.com/llvm/llvm-project/commit/1b275a177fe7c2f74c3575bce2932ba37086a507
Author: Fangrui Song <i at maskray.me>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M clang/include/clang/Options/Options.td
M clang/lib/Driver/ToolChains/Flang.cpp
M flang/include/flang/Frontend/CodeGenOptions.def
M flang/lib/Frontend/CompilerInstance.cpp
M flang/lib/Frontend/CompilerInvocation.cpp
M flang/test/Driver/fintegrated-as.f90
Log Message:
-----------
[flang] -fno-integrated-as: set DisableIntegratedAS (#191346)
https://reviews.llvm.org/D124669 added -fno-integrated-as driver option
but not the fc1 option.
As a result, the backend kept MCAsmInfo::useIntegratedAssembler() set
and emitted LLVM-only directives such as `.prefalign`
(https://github.com/llvm/llvm-project/pull/155529), which GNU as
rejects:
```
a.s: Assembler messages:
a.s: Error: unknown pseudo-op: `.prefalign'
```
Follow clang and introduce fc1 -no-integrated-as to set
`CodeGenOpts.DisableIntegratedAS` and
llvm::TargetOptions::DisableIntegratedAS.
Commit: 4ffd51e21c6a45ed04d58615bf289592b8b696b4
https://github.com/llvm/llvm-project/commit/4ffd51e21c6a45ed04d58615bf289592b8b696b4
Author: joaosaffran <joaosaffranllvm at gmail.com>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M llvm/lib/Target/DirectX/DXILOpLowering.cpp
A llvm/test/CodeGen/DirectX/is_nonuniform_within_loop.ll
A llvm/test/CodeGen/DirectX/is_nonuniform_within_loop_nuri.ll
Log Message:
-----------
[HLSL][DirectX] Avoid visited values when searching in `hasNonUniformIndex` (#189498)
This patch fixes `hasNonUniformIndex` search so that it accounts for any
path that connects nuri to index access to return true
fix: https://github.com/llvm/llvm-project/issues/189438
---------
Co-authored-by: Joao Saffran <jderezende at microsoft.com>
Commit: 13d91555bce09cd666853443bebe81b3183eeec6
https://github.com/llvm/llvm-project/commit/13d91555bce09cd666853443bebe81b3183eeec6
Author: Joel E. Denny <jdenny.ornl at gmail.com>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M llvm/lib/Transforms/Utils/LoopUnroll.cpp
M llvm/test/Transforms/LoopUnroll/branch-weights-freq/unroll-complete.ll
M llvm/test/Transforms/LoopUnroll/branch-weights-freq/unroll-epilog.ll
M llvm/test/Transforms/LoopUnroll/branch-weights-freq/unroll-partial-unconditional-latch.ll
Log Message:
-----------
[LoopUnroll] Fix freqs for unconditional latches: N<=2 (#179520)
As another step in issue #135812, this patch fixes block frequencies
when LoopUnroll converts a conditional latch in an unrolled loop
iteration to unconditional. It thus includes complete loop unrolling
(the conditional backedge becomes an unconditional loop exit), which
might be applied to the original loop or to its remainder loop.
As explained in detail in the header comments on the
fixProbContradiction function that this patch introduces, these
conversions mean LoopUnroll has proven that the original uniform latch
probability is incorrect for the original loop iterations associated
with the converted latches. However, LoopUnroll often is able to perform
these corrections for only some iterations, leaving other iterations
with the original latch probability, and thus corrupting the aggregate
effect on the total frequency of the original loop body.
This patch ensures that the total frequency of the original loop body,
summed across all its occurrences in the unrolled loop after the
aforementioned conversions, is the same as in the original loop. Unlike
other patches in this series, this patch cannot derive the required
latch probabilities directly from the original uniform latch probability
because it has been proven incorrect for some original loop iterations.
Instead, this patch computes entirely new probabilities for the
remaining N conditional latches in the unrolled loop.
This patch only handles N <= 2, for which it uses simple formulas to
compute a single uniform probability across the latches. Future patches
will handle N > 2.
This patch series does not consider the presence of non-latch loop
exits, and I do not have a solid plan for that case. See fixme comments
this patch introduces.
This patch depends on PR #182403 and PR #191008.
Commit: aea7db5a70c3ada06974059fa4ea4d9b590e2166
https://github.com/llvm/llvm-project/commit/aea7db5a70c3ada06974059fa4ea4d9b590e2166
Author: Utkarsh Saxena <usx at google.com>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M clang/lib/Analysis/LifetimeSafety/Origins.cpp
M clang/test/Sema/warn-lifetime-safety-dangling-field.cpp
M clang/test/Sema/warn-lifetime-safety-suggestions.cpp
M clang/test/Sema/warn-lifetime-safety.cpp
Log Message:
-----------
[LifetimeSafety] Detect dangling field of base class (#191831)
Fixes: https://github.com/llvm/llvm-project/issues/191823
Commit: 82c7192a0874017a391ccfde44b0a2e4e07ca4c1
https://github.com/llvm/llvm-project/commit/82c7192a0874017a391ccfde44b0a2e4e07ca4c1
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M mlir/lib/Dialect/Vector/IR/VectorOps.cpp
M mlir/test/Dialect/Vector/canonicalize.mlir
Log Message:
-----------
[MLIR][Vector] Fix multi_reduction fold to handle empty reduction dims for any rank (#188983)
The fold for `vector.multi_reduction` only handled the rank-1 case with
no reduction dimensions. For higher-rank vectors (e.g.,
`vector<2x3xf32>`) with empty reduction dims `[]`, the fold returned
null, allowing `ElideUnitDimsInMultiDimReduction` to fire incorrectly.
That canonicalization pattern checks that all *reduced* dims have size
1, but with zero reduction dims the check trivially passes, and the
pattern then computes `acc op source` (e.g., `acc + source`) instead of
the correct no-op result (`source`).
This caused `--canonicalize` to produce a different value than
`--lower-vector-multi-reduction` for the same program:
vector.mask %m { vector.multi_reduction <add>, %src, %src [] :
vector<3x3xi32> to vector<3x3xi32> } : vector<3x3xi1> -> vector<3x3xi32>
* Without --lower-vector-multi-reduction: `src + src` (e.g., 2)
* With --lower-vector-multi-reduction: `src` (e.g., 1)
Fix the fold to return `source` for any rank when `reduction_dims` is
empty. This makes the empty-dims case consistent: the operation is a
noop regardless of rank, and `ElideUnitDimsInMultiDimReduction` no
longer gets a chance to mishandle it.
Fixes #129415
Assisted-by: Claude Code
Commit: 2f51a1664da90ae5be3f9c8532d59517a67829e3
https://github.com/llvm/llvm-project/commit/2f51a1664da90ae5be3f9c8532d59517a67829e3
Author: Fateme Hosseini <Fhossein at qti.qualcomm.com>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M llvm/lib/Target/Hexagon/HexagonISelLoweringHVX.cpp
A llvm/test/CodeGen/Hexagon/hvx-concat-scalar-preds.ll
Log Message:
-----------
[Hexagon] Fix inner CONCAT_VECTORS type in combineConcatOfScalarPreds (#191756)
The inner CONCAT_VECTORS result type was hardcoded to MVT::v8i1, which
is only correct when BitBytes == 1. Otherwise, the inner concat produces
fewer elements than 8, causing an assertion failure:
Assertion `(Ops[0].getValueType().getVectorElementCount() * Ops.size())
== VT.getVectorElementCount() && "Incorrect element count in vector
concatenation!"' failed.
Fix by computing the inner vector type dynamically based on BitBytes.
Commit: c8688a97b5f5eda18d219502f6bbe288e5e8b695
https://github.com/llvm/llvm-project/commit/c8688a97b5f5eda18d219502f6bbe288e5e8b695
Author: Eugene Epshteyn <eepshteyn at nvidia.com>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M flang/test/Lower/Intrinsics/storage_size.f90
M flang/test/Lower/Intrinsics/sum.f90
M flang/test/Lower/Intrinsics/system_clock.f90
M flang/test/Lower/Intrinsics/trailz.f90
M flang/test/Lower/Intrinsics/transfer.f90
Log Message:
-----------
[flang][NFC] Converted five tests from old lowering to new lowering (part 42) (#191751)
Tests converted from test/Lower/Intrinsics: storage_size.f90, sum.f90,
system_clock.f90, trailz.f90, transfer.f90
Commit: e28704544f6a62f63488196d3e9de206c4f1c998
https://github.com/llvm/llvm-project/commit/e28704544f6a62f63488196d3e9de206c4f1c998
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M mlir/lib/Dialect/Shard/Transforms/Partition.cpp
M mlir/test/Dialect/Shard/resharding-partition.mlir
Log Message:
-----------
[MLIR][Shard] Fix three bugs in ND mesh resharding in Partition pass (#189241)
A new MoveLastSplitAxisPattern class handles the case where the last
grid axis of one tensor dimension is moved to the front of another
tensor dimension's split axes, e.g. [[0, 1], [2]] -> [[0], [1, 2]].
The three bugs fixed are:
1. detectMoveLastSplitAxisInResharding: compared source.back() with
target.back() instead of target.front(), preventing the pattern from
being detected for resharding like [[0,1],[2]] -> [[0],[1,2]].
2. targetShardingInMoveLastAxis: axes were appended with push_back but
should be inserted at the front, producing wrong split_axes order.
3. handlePartialAxesDuringResharding: a copy_if wrote results into the
wrong output variable (addressed structurally by the clean
implementation).
Fixes #136117
Assisted-by: Claude Code
Commit: 3bf9639ec04544902670ab4199401ac470c1fcca
https://github.com/llvm/llvm-project/commit/3bf9639ec04544902670ab4199401ac470c1fcca
Author: Thurston Dang <thurston at google.com>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanConstruction.cpp
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
Log Message:
-----------
Revert "[VPlan] Handle calls in VPInstruction:opcodeMayReadOrWriteFromMemory." (#191851)
Reverts llvm/llvm-project#190681 due to buildbot breakage
(https://github.com/llvm/llvm-project/pull/190681#issuecomment-4234999482).
Commit: b0b2b1ceb78c9cb2da540d713632c6e95a8ff3d1
https://github.com/llvm/llvm-project/commit/b0b2b1ceb78c9cb2da540d713632c6e95a8ff3d1
Author: Alexandre Ganea <aganea at havenstudios.com>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M llvm/lib/DebugInfo/GSYM/GsymCreator.cpp
Log Message:
-----------
Revert "[GSYM] Silence cast warning" (#191853)
Reverts llvm/llvm-project#191561
This is not required anymore.
Commit: dd0c7f1f344f22a29d3c483966f89ffb5f70850e
https://github.com/llvm/llvm-project/commit/dd0c7f1f344f22a29d3c483966f89ffb5f70850e
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M mlir/lib/Dialect/Linalg/TransformOps/LinalgTransformOps.cpp
M mlir/test/Dialect/Linalg/tile-to-forall.mlir
Log Message:
-----------
[MLIR][Linalg] Fix crash in tileToForallOpImpl for rank-0 ops (#189000)
When tiling a rank-0 linalg.generic op, tileUsingSCF returns an empty
loops vector (rank-0 ops have no parallel dimensions and produce no
scf.forall). Two call sites unconditionally accessed
tilingResult.loops.front(), causing a crash:
- tileToForallOpImpl: the loop normalization block was entered whenever
mixedNumThreads was empty, regardless of whether any loops exist. Guard
it with \!tilingResult.loops.empty().
- TileUsingForallOp::apply: tileOps.push_back was called
unconditionally. Guard it with \!tilingResult.loops.empty().
Add regression tests for both the tile_sizes and num_threads paths,
verifying that the linalg.generic is preserved and no scf.forall is
emitted.
Fixes #187073
Assisted-by: Claude Code
Commit: 42804379944cd0b221f9557ce219d4dc77a6055a
https://github.com/llvm/llvm-project/commit/42804379944cd0b221f9557ce219d4dc77a6055a
Author: Charles Zablit <c_zablit at apple.com>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M lldb/packages/Python/lldbsuite/test/decorators.py
M lldb/source/Host/common/Terminal.cpp
M lldb/test/API/terminal/hidden_frame_markers/TestHiddenFrameMarkers.py
Log Message:
-----------
[lldb][windows] re-enable unicode tests on Windows (#190828)
This patch re-enables unicode tests on Windows by improving the
`Terminal::SupportsUnicode` check.
Checking that the stdout handle is a `FILE_TYPE_CHAR` is a better
heuristic than always returning true, which assumed we were always using
a terminal and never piping the output.
Commit: 2244ccb244affa5d291f63f6f1c17b98358cb89b
https://github.com/llvm/llvm-project/commit/2244ccb244affa5d291f63f6f1c17b98358cb89b
Author: Chenguang Wang <w3cing at gmail.com>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[bazel][mlir] Fix OpenMP compilation. (#191866)
Broken by #190992.
Commit: 8a59ab1c8a80443590cf9cb43fb44d2022a1d5a1
https://github.com/llvm/llvm-project/commit/8a59ab1c8a80443590cf9cb43fb44d2022a1d5a1
Author: Guo Chen <guochen2 at amd.com>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/VOP1Instructions.td
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.fp8.ll
Log Message:
-----------
Revert "[AMDGPU][True16] add true16 pattern for cvt_pk_fp32_f8 (#1800… (#191835)
an issue reported with this patch
https://github.com/llvm/llvm-project/issues/191241. Revert for now and
reenable later
This reverts commit e71da01f0f908417723a54cf8829a734a37fa173.
Commit: 4440e87baef3b28d1c6b06c389a861174c670b8d
https://github.com/llvm/llvm-project/commit/4440e87baef3b28d1c6b06c389a861174c670b8d
Author: Ingo Müller <ingomueller at google.com>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M mlir/include/mlir/Bindings/Python/NanobindAdaptors.h
M mlir/test/python/dialects/python_test.py
M mlir/test/python/lib/PythonTestModuleNanobind.cpp
Log Message:
-----------
[mlir:python] Fix crash in from_python in type casters. (#191764)
This PR fixes a crash due to a failed assertion in the `from_python`
implementations of the type casters. The assertion obviously only
triggers if assertions are enabled, which isn't the case for many Python
installations, *and* if a Python capsule of the wrong type is attempted
to be used, so this this isn't triggered easily. The problem is that the
conversion from Python capsules may set the Python error indicator but
the callers of the type casters do not expect that. In fact, if there
are several operloads of a function, the first may cause the error
indicator to be set and the second runs into the assertion. The fix is
to unset the error indicator after a failed capsule conversion, which is
indicated with the return value of the function anyways.
In alternative fix would be to unset the error indicator *inside* the
`mlirPythonCapsuleTo*` functions; however, their documentations does say
that the Python error indicator is set, so I assume that some callers
may *want* to see the indicator and that the responsibility to handle it
is on them.
Signed-off-by: Ingo Müller <ingomueller at google.com>
Commit: fbd0bcf55447c94dfa27bafb096f32e9c083f7ee
https://github.com/llvm/llvm-project/commit/fbd0bcf55447c94dfa27bafb096f32e9c083f7ee
Author: Lang Hames <lhames at gmail.com>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M llvm/examples/OrcV2Examples/LLJITWithExecutorProcessControl/LLJITWithExecutorProcessControl.cpp
Log Message:
-----------
[ORC] Fix include order in example. (#191869)
Commit: 7725b6f4729ef06f2e55d3269ab7096b2e49d55e
https://github.com/llvm/llvm-project/commit/7725b6f4729ef06f2e55d3269ab7096b2e49d55e
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVLogicalOps.td
M mlir/lib/Dialect/SPIRV/IR/SPIRVOpDefinition.cpp
Log Message:
-----------
[NFC][mlir][SPIR-V] Rename getUnaryOpResultType to getMatchingBoolType (#191773)
The old name was misleading because this function is not specific to
unary ops
suggested in
https://github.com/llvm/llvm-project/pull/189099#discussion_r3051945317
Commit: 79647b11b2df6209cbbc80ebcf0e1cb60bd3df52
https://github.com/llvm/llvm-project/commit/79647b11b2df6209cbbc80ebcf0e1cb60bd3df52
Author: adams381 <adams at nvidia.com>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIRTypeConstraints.td
M clang/include/clang/CIR/Dialect/IR/CIRTypes.td
A clang/test/CIR/IR/invalid-bitint.cir
Log Message:
-----------
[CIR] Exclude _BitInt from fundamental integer type constraints (#191493)
Follow-up to #188113 per @erichkeane's feedback: `isFundamentalIntType`
and `isFundamental()` should not disagree.
The previous patch added `!isBitInt()` only inside
`IntType::isFundamental()`, leaving the underlying TableGen predicates
(`CIR_AnyFundamentalIntType` etc.) unaware of `_BitInt`. That meant
`isSignedFundamental()` and `isUnsignedFundamental()` were silently
wrong — a `_BitInt(32)` would pass them.
This patch adds a `CIR_IsNotBitIntPred` to the three fundamental-int
constraint defs so everything stays consistent. `isFundamental()` now
just forwards to `isFundamentalIntType()` with no extra logic.
Includes an `invalid-bitint.cir` test that checks a `_BitInt(32)` is
rejected where a fundamental unsigned int is required.
Made with [Cursor](https://cursor.com)
Commit: da86595eb2417b33b2633902e8fed8e221043093
https://github.com/llvm/llvm-project/commit/da86595eb2417b33b2633902e8fed8e221043093
Author: adams381 <adams at nvidia.com>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M clang/test/CIR/CodeGen/binop.c
M clang/test/CIR/CodeGen/c89-implicit-int.c
M clang/test/CIR/CodeGen/empty.cpp
M clang/test/CIR/CodeGen/expressions.cpp
M clang/test/CIR/CodeGen/forward-enum.c
M clang/test/CIR/CodeGen/static-vars.c
Log Message:
-----------
[CIR][NFC] Add LLVM and OGCG checks to six codegen tests (#191536)
Add CIR-to-LLVM and classic codegen RUN lines to empty.cpp,
c89-implicit-int.c, expressions.cpp, binop.c, forward-enum.c, and
static-vars.c so each test verifies LLVM IR output from both pipelines.
Made with [Cursor](https://cursor.com)
Commit: 34991575b2d414ba491ffa3f2c1722414c364cba
https://github.com/llvm/llvm-project/commit/34991575b2d414ba491ffa3f2c1722414c364cba
Author: Leandro Lupori <leandro.lupori at linaro.org>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M lldb/test/API/functionalities/scripted_frame_provider/pass_through_prefix/TestFrameProviderPassThroughPrefix.py
M lldb/test/API/functionalities/scripted_frame_provider/thread_filter/TestFrameProviderThreadFilter.py
Log Message:
-----------
[lldb] Fix tests on Linux on Arm (32-bit) after #181071 (#191861)
PR #181071 caused regressions on Linux on Arm. These are being tracked
in:
- #191855
- #191859
This PR disables the failing tests for now, to fix the broken buildbot.
Commit: 1b1d450fbf9125ee35d05876b16d5c521084a521
https://github.com/llvm/llvm-project/commit/1b1d450fbf9125ee35d05876b16d5c521084a521
Author: Lang Hames <lhames at gmail.com>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M llvm/include/llvm/ExecutionEngine/Orc/MachOBuilder.h
M llvm/include/llvm/ExecutionEngine/Orc/MachOPlatform.h
M llvm/lib/ExecutionEngine/Orc/MachOPlatform.cpp
Log Message:
-----------
[ORC] Add UUID support to MachOPlatform::HeaderOptions. (#191873)
MachOPlatform::HeaderOptions now includes an optional UUID field. If
set, this will be used to build an LC_UUID load command for the
JITDylib's MachO header.
No testcase: MachOPlatform construction requires the ORC runtime, which
we can't require in LLVM regression or unit tests. In the future we
should test this through the ORC runtime.
Commit: db89a15f8f3a423385aae8c228487053126183d1
https://github.com/llvm/llvm-project/commit/db89a15f8f3a423385aae8c228487053126183d1
Author: Ryan Buchner <rbuchner at qti.qualcomm.com>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M llvm/test/Transforms/SLPVectorizer/RISCV/revec-strided-load.ll
Log Message:
-----------
[SLP][NFC] Add tests for runtime strided loads during revectorization (#191875)
Depending on the case, SLP either misses optimizing re-vectorized runtime
strided loads (and use a gather instead) or produces the incorrect
strided load.
Commit: d1dbb099264993720863eab39cd7ec9d9fc51e89
https://github.com/llvm/llvm-project/commit/d1dbb099264993720863eab39cd7ec9d9fc51e89
Author: Dan Liew <dan at su-root.co.uk>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M llvm/include/llvm/Support/UniqueBBID.h
Log Message:
-----------
[NFC] Try to unbreak the module builds due to missing `StringRef.h` include in `UniqueBBID.h` (#191877)
The modules build of LLVM broke when this patch landed
```
commit 2f422a52fde267757ce48041af6e731421fed2a3
Author: Rahman Lavaee <rahmanl at google.com>
Date: Fri Apr 10 15:58:16 2026 -0700
[Codegen, X86] Add prefetch insertion based on Propeller profile (#166324)
```
with an error like:
```
[2026-04-11T10:33:41.699Z] While building module 'LLVM_Utils' imported from /Users/ec2-user/jenkins/workspace/m.org_clang-stage2-Rthinlto_main/llvm-project/llvm/lib/Demangle/Demangle.cpp:13:
[2026-04-11T10:33:41.699Z] In file included from <module-includes>:321:
[2026-04-11T10:33:41.699Z] /Users/ec2-user/jenkins/workspace/m.org_clang-stage2-Rthinlto_main/llvm-project/llvm/include/llvm/Support/UniqueBBID.h:40:3: error: missing '#include "llvm/ADT/StringRef.h"'; 'StringRef' must be declared before it is used
[2026-04-11T10:33:41.699Z] 40 | StringRef TargetFunction;
[2026-04-11T10:33:41.699Z] | ^
[2026-04-11T10:33:41.699Z] /Users/ec2-user/jenkins/workspace/m.org_clang-stage2-Rthinlto_main/llvm-project/llvm/include/llvm/ADT/StringRef.h:55:24: note: declaration here is not visible
[2026-04-11T10:33:41.699Z] 55 | class LLVM_GSL_POINTER StringRef {
[2026-04-11T10:33:41.699Z] | ^
[2026-04-11T10:33:41.699Z] /Users/ec2-user/jenkins/workspace/m.org_clang-stage2-Rthinlto_main/llvm-project/llvm/lib/Demangle/Demangle.cpp:13:10: fatal error: could not build module 'LLVM_Utils'
[2026-04-11T10:33:41.699Z] 13 | #include "llvm/Demangle/Demangle.h"
[2026-04-11T10:33:41.699Z] | ~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~~~
```
https://ci.swift.org/job/llvm.org/job/clang-stage2-Rthinlto/job/main/150/
This patch tries to fix that by adding the missing include.
rdar://174555346
Commit: 94d9d9c76201058378a8a74f49b7b057f695ccc4
https://github.com/llvm/llvm-project/commit/94d9d9c76201058378a8a74f49b7b057f695ccc4
Author: SiliconA-Z <gfunni234 at gmail.com>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
M llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp
M llvm/test/CodeGen/ARM/rotate-add.ll
A llvm/test/CodeGen/ARM/shift-mod.ll
Log Message:
-----------
[ARM] Take advantage of built-in mod of shift amount in variable-shift rotations (#157208)
This does exactly what AArch64 does.
Commit: 6adef02db58873b1ef5cd2fac967bf1072567751
https://github.com/llvm/llvm-project/commit/6adef02db58873b1ef5cd2fac967bf1072567751
Author: Henry Baba-Weiss <henry.babaweiss at gmail.com>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/CodeGen/Targets/X86.cpp
M clang/test/CodeGen/regcall.c
M clang/test/CodeGen/regcall4.c
M clang/test/CodeGenCXX/regcall.cpp
M clang/test/CodeGenCXX/regcall4.cpp
Log Message:
-----------
[X86][regcall] Rework struct classification for non-Windows x86-64 targets (#187134)
Currently, when `X86_64ABIInfo::classifyRegCallStructTypeImpl`
classifies a struct argument or return value as direct, it leaves the
LLVM IR coerce type unspecified, implicitly relying on
`CodeGenTypes::ConvertType` to eventually construct a default IR type
based on the struct's layout. This conversion is neither stable nor
guaranteed to adhere to the ABI's classification rules.
Instead, rewrite `classifyRegCallStructTypeImpl` to construct an
explicit sequence of coerce types, using the existing field
classification to obtain a coerce type for each member of the struct.
Also, rename the function to `passRegCallStructTypeDirectly` and return
a boolean instead, so that now `classifyRegCallStructType` is the only
place that computes `ABIArgInfo`.
This rewrite also fixes several other issues with the `X86_64ABIInfo`
implementation of `__regcall`:
* Empty structs are now ignored instead of being misclassified as
direct.
* Arrays are now classified specially based on the element type, since
`X86_64ABIInfo::classifyArgumentType` ignores standalone array types.
* SSE registers used for return values are now correctly reused for
arguments, matching the 64-bit Windows behavior.
Since this is an ABI change, it has the potential to cause
incompatibilities with `__regcall` code compiled by earlier versions of
Clang. Specifically:
* Because SSE return registers can now be reused as argument registers,
functions will now pass more floating point arguments in SSE registers.
* `_Complex float` struct fields are now passed in one SSE register
instead of two.
Fixes #62999
Fixes #98635
Commit: 7a1f880d7f41e2dcf0f99fad15521af05bcc70e3
https://github.com/llvm/llvm-project/commit/7a1f880d7f41e2dcf0f99fad15521af05bcc70e3
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
M llvm/test/CodeGen/RISCV/rvp-ext-rv32.ll
M llvm/test/CodeGen/RISCV/rvp-ext-rv64.ll
Log Message:
-----------
[RISCV][P-ext] Use li for all ones splat_vector. (#191748)
li -1 can be compressed to c.li.
Commit: 0dbb38adf9afca4f9571e771e30ac24b370b12eb
https://github.com/llvm/llvm-project/commit/0dbb38adf9afca4f9571e771e30ac24b370b12eb
Author: Erich Keane <ekeane at nvidia.com>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenExpr.cpp
M clang/lib/CIR/CodeGen/CIRGenExprAggregate.cpp
A clang/test/CIR/CodeGen/cast.c
Log Message:
-----------
[[CIR]] Implement 'to-union' cast. (#191485)
This ends up being pretty trivial/can only really happen in 2 ways, the
only useful way is via an extension. This patch implements this.
This doesn't really affect anything as it is a pretty rarely used
feature and thus doesn't appear in the test suite I've seen, but I saw
it while investigating something else.
Commit: 7d383ecdb656c84d8a08fd7a6ad1c162846a78ea
https://github.com/llvm/llvm-project/commit/7d383ecdb656c84d8a08fd7a6ad1c162846a78ea
Author: Jianhui Li <jian.hui.li at intel.com>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M mlir/include/mlir/Dialect/XeGPU/Transforms/XeGPULayoutImpl.h
M mlir/lib/Dialect/XeGPU/IR/XeGPUDialect.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPULayoutImpl.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUPropagateLayout.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUSubgroupDistribute.cpp
M mlir/test/Dialect/XeGPU/subgroup-distribute-unit.mlir
Log Message:
-----------
[MLIR][XeGPU] Adding Layout Utility inferMaskOffsetLayoutForScatterIO (#191573)
This PR add a new layout utility function, named
inferMaskOffsetLayoutForScatterIO(), to support the propagation and
lowering of XeGPU scatter IO operations.
Commit: 7099c02b45ae641602e1026b1448ab8d6e2f4f51
https://github.com/llvm/llvm-project/commit/7099c02b45ae641602e1026b1448ab8d6e2f4f51
Author: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M llvm/test/CodeGen/AMDGPU/minmax3-tree-reduction.ll
Log Message:
-----------
[AMDGPU] Update minmax3-tree-reduction.ll for true16. NFC (#191879)
Commit: c9f175bed493ccbe6c85a5c4e4fb7f1b800123a2
https://github.com/llvm/llvm-project/commit/c9f175bed493ccbe6c85a5c4e4fb7f1b800123a2
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVBase.td
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVIntelExtOps.td
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVTypes.h
M mlir/lib/Dialect/SPIRV/IR/SPIRVTypes.cpp
M mlir/test/Dialect/SPIRV/IR/intel-ext-ops.mlir
M mlir/test/Target/SPIRV/intel-ext-ops.mlir
Log Message:
-----------
[mlir][SPIR-V] Add support for SPV_INTEL_masked_gather_scatter extension (#189099)
Add MaskedGather/MaskedScatter ops and VectorOfPointerType for
SPV_INTEL_masked_gather_scatter extension implemented in #185418
Commit: ca318abfe65a3224b8b6286f836ee4335fde9d95
https://github.com/llvm/llvm-project/commit/ca318abfe65a3224b8b6286f836ee4335fde9d95
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanConstruction.cpp
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
A llvm/test/Transforms/LoopVectorize/early-exit-calls.ll
A llvm/test/Transforms/LoopVectorize/early-exit-unary-ops.ll
Log Message:
-----------
Reapply "[VPlan] Handle calls in VPInstruction:opcodeMayReadOrWriteFromMemory." (#191886)
This reverts commit
https://github.com/llvm/llvm-project/commit/3bf9639ec04544902670ab4199401ac470c1fcca.
The reapply adds trivial support for ExtractValue and InsertValue to fix
the crash causing the revert.
Original message:
Retrieve the called function and check its memory attributes, to
determine if a VPInstruction calling a function reads or writes memory.
Use it to strengthen assert in areAllLoadsDereferenceable.
PR: https://github.com/llvm/llvm-project/pull/190681
Commit: 46167f96bd2c5999297591ef362f3b7f051fd757
https://github.com/llvm/llvm-project/commit/46167f96bd2c5999297591ef362f3b7f051fd757
Author: Joshua Batista <jbatista at microsoft.com>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M clang/include/clang/Basic/DiagnosticDriverKinds.td
M clang/include/clang/Basic/DiagnosticGroups.td
M clang/include/clang/Options/Options.td
M clang/lib/Driver/Driver.cpp
M clang/lib/Driver/ToolChains/HLSL.cpp
M clang/lib/Driver/ToolChains/HLSL.h
A clang/test/Driver/dxc_spirv-val_missing.hlsl
A clang/test/Driver/dxc_spirv-val_path.hlsl
M clang/test/lit.cfg.py
Log Message:
-----------
Add spirv-val compilation step when targeting SPIR-V (#188150)
Clang-dxc.exe currently uses dxv by default after compiling HLSL that
targets DXIL, assuming dxv can be found. However, there is no
counterpart for SPIR-V. This PR changes clang-dxc.exe so that the DXC
driver inserts a step to run spirv-val when SPIR-V is the target. It
also accounts for whether or not the -Fo option is passed. In all cases,
spirv-val will be run, as long as the target is SPIR-V and the spirv-val
executable can be found on the PATH.
This PR also adds a new option --spirv-val-path, a counterpart to
--dxv-path, for specifying an explicit path to spirv-val.
Key differences from dxv: Unlike dxv, which validates and signs DXIL
containers and produces an output file, spirv-val is a pure validator —
it checks the SPIR-V binary and exits with a status code without
producing output. Because of this, the compile step writes directly to
-Fo and spirv-val validates the file in-place.
Additional fixes:
- Fixes a duplicate "validator not found" warning that was emitted twice
per invocation — once from BuildActions and once from isLastJob (via
GetNamedOutputPath). This was a pre-existing bug introduced by #130436
(https://github.com/llvm/llvm-project/pull/130436). Fixed by
adding a Diagnose parameter to requiresValidation so only one call site
emits the diagnostic.
- Fixes an "unused argument" warning for -Vd when targeting SPIR-V,
caused by early returns in requiresValidation before the argument was
claimed.
- Adds a new SPIRVValidation diagnostic group and
warn_drv_dxc_missing_spirv_val diagnostic for the missing spirv-val
warning.
Fixes https://github.com/llvm/llvm-project/issues/142669
Assisted by: Claude Opus 4.6
Commit: 2a9c32496b5e8e63844597f638bdf67e4732fd35
https://github.com/llvm/llvm-project/commit/2a9c32496b5e8e63844597f638bdf67e4732fd35
Author: Petr Hosek <phosek at google.com>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M clang/cmake/caches/Release.cmake
M llvm/CMakeLists.txt
M llvm/cmake/config-ix.cmake
R llvm/cmake/modules/FindLibXml2.cmake
M llvm/lib/WindowsManifest/CMakeLists.txt
Log Message:
-----------
Revert "[cmake] Add support for statically linking libxml2" (#191609)
Reverts llvm/llvm-project#166867
Commit: 654da0889be5016c86e9cb8f8425dadcfa93096c
https://github.com/llvm/llvm-project/commit/654da0889be5016c86e9cb8f8425dadcfa93096c
Author: Alex Duran <alejandro.duran at intel.com>
Date: 2026-04-14 (Tue, 14 Apr 2026)
Changed paths:
M offload/test/offloading/interop-print.c
Log Message:
-----------
[OFFLOAD][OpenMP][L0] Add Intel strings to interop-print test (#191901)
Commit: 72ed4cf3c25467bfdfd866aaae83db8f9a3a4253
https://github.com/llvm/llvm-project/commit/72ed4cf3c25467bfdfd866aaae83db8f9a3a4253
Author: Kyungtak Woo <kevinwkt at google.com>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[bazel] Exclude use_header_modules from some nanobind targets (#191898)
Excluding use_header_modules from some nanobind targets
Commit: ef1a2ff1837a4716ed933853528c47206b0260c8
https://github.com/llvm/llvm-project/commit/ef1a2ff1837a4716ed933853528c47206b0260c8
Author: Dan Liew <dan at su-root.co.uk>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M compiler-rt/lib/tysan/tysan.cpp
M compiler-rt/lib/tysan/tysan_interceptors.cpp
M compiler-rt/test/sanitizer_common/CMakeLists.txt
M compiler-rt/test/sanitizer_common/TestCases/Linux/aligned_alloc-alignment.cpp
M compiler-rt/test/sanitizer_common/TestCases/Linux/allocator_returns_null_std.cpp
M compiler-rt/test/sanitizer_common/TestCases/Linux/decorate_proc_maps.cpp
M compiler-rt/test/sanitizer_common/TestCases/Linux/deepbind.cpp
M compiler-rt/test/sanitizer_common/TestCases/Linux/free_aligned_sized.c
M compiler-rt/test/sanitizer_common/TestCases/Linux/free_sized.c
M compiler-rt/test/sanitizer_common/TestCases/Linux/malloc_usable_size.c
M compiler-rt/test/sanitizer_common/TestCases/Linux/mlock_test.cpp
M compiler-rt/test/sanitizer_common/TestCases/Linux/mprobe.cpp
M compiler-rt/test/sanitizer_common/TestCases/Linux/pvalloc-overflow.cpp
M compiler-rt/test/sanitizer_common/TestCases/Linux/release_to_os_test.cpp
M compiler-rt/test/sanitizer_common/TestCases/Linux/replace_dlopen_main_program_test.cpp
M compiler-rt/test/sanitizer_common/TestCases/Linux/resize_tls_dynamic.cpp
M compiler-rt/test/sanitizer_common/TestCases/Linux/soft_rss_limit_mb_test.cpp
M compiler-rt/test/sanitizer_common/TestCases/Linux/tls_get_addr.c
M compiler-rt/test/sanitizer_common/TestCases/Linux/tls_malloc_hook.c
M compiler-rt/test/sanitizer_common/TestCases/Linux/unexpected_format_specifier_test.cpp
M compiler-rt/test/sanitizer_common/TestCases/Posix/huge_malloc.c
M compiler-rt/test/sanitizer_common/TestCases/Posix/mmap_write_exec.cpp
M compiler-rt/test/sanitizer_common/TestCases/Posix/posix_memalign-alignment.cpp
M compiler-rt/test/sanitizer_common/TestCases/Posix/print-module-map.cpp
M compiler-rt/test/sanitizer_common/TestCases/Posix/sanitizer_set_death_callback_test.cpp
M compiler-rt/test/sanitizer_common/TestCases/Posix/weak_hook_test.cpp
M compiler-rt/test/sanitizer_common/TestCases/allocator_interface.cpp
M compiler-rt/test/sanitizer_common/TestCases/allocator_returns_null.cpp
M compiler-rt/test/sanitizer_common/TestCases/compress_stack_depot.cpp
M compiler-rt/test/sanitizer_common/TestCases/corelimit.cpp
M compiler-rt/test/sanitizer_common/TestCases/get_allocated_begin.cpp
M compiler-rt/test/sanitizer_common/TestCases/hard_rss_limit_mb_test.cpp
M compiler-rt/test/sanitizer_common/TestCases/malloc_hook.cpp
M compiler-rt/test/sanitizer_common/TestCases/malloc_hook_get_allocated_size_fast.cpp
M compiler-rt/test/sanitizer_common/TestCases/max_allocation_size.cpp
M compiler-rt/test/sanitizer_common/TestCases/reallocarray-overflow.cpp
M compiler-rt/test/sanitizer_common/TestCases/sanitizer_coverage_symbolize.cpp
M compiler-rt/test/sanitizer_common/TestCases/sanitizer_coverage_trace_pc_guard-dso.cpp
M compiler-rt/test/sanitizer_common/TestCases/sanitizer_coverage_trace_pc_guard.cpp
M compiler-rt/test/sanitizer_common/lit.common.cfg.py
Log Message:
-----------
Unbreak macOS builds broken by #183310 (#191899)
Revert "[TySan][Sanitizer Common] Make TySan compatible with sanitizer common… (#183310)" and
"[TySan][Sanitizer Common] Enable TySan testing in the sanitizer commo… (#191385)"
This reverts commit d043b9e38dd9494c3c56018b2cbaf44fe205b110 and dd0c5ebe69e580066de100c8c2ba5430a1aeee44.
d043b9e38dd9494c3c56018b2cbaf44fe205b110 broke the macOS bots
https://ci.swift.org/job/llvm.org/job/clang-stage1-RA-cmake-incremental/job/main/638/consoleFull#-1919712802f80d942a-f672-4696-b0d9-c66cae8aa9dd
with an error that looks like:
```
/Users/ec2-user/jenkins/workspace/llvm.org/as-lldb-cmake/llvm-project/compiler-rt/lib/tysan/../sanitizer_common/sanitizer_signal_interceptors.inc:136:3: error: expected expression
136 | INIT_SIGNAL;
| ^
/Users/ec2-user/jenkins/workspace/llvm.org/as-lldb-cmake/llvm-project/compiler-rt/lib/tysan/../sanitizer_common/sanitizer_signal_interceptors.inc:77:21: note: expanded from macro 'INIT_SIGNAL'
77 | #define INIT_SIGNAL COMMON_INTERCEPT_FUNCTION(signal)
| ^
/Users/ec2-user/jenkins/workspace/llvm.org/as-lldb-cmake/llvm-project/compiler-rt/lib/tysan/tysan_interceptors.cpp:51:41: note: expanded from macro 'COMMON_INTERCEPT_FUNCTION'
51 | #define COMMON_INTERCEPT_FUNCTION(name) TYSAN_INTERCEPT_FUNC(name)
| ^
/Users/ec2-user/jenkins/workspace/llvm.org/as-lldb-cmake/llvm-project/compiler-rt/lib/tysan/tysan_interceptors.cpp:27:34: note: expanded from macro 'TYSAN_INTERCEPT_FUNC'
27 | if (!INTERCEPT_FUNCTION(name))
```
unfortunately reverting just d043b9e38dd9494c3c56018b2cbaf44fe205b110 doesn't work cleanly because another commit (dd0c5ebe69e580066de100c8c2ba5430a1aeee44) enabled testing and the testing fails when we revert just d043b9e38dd9494c3c56018b2cbaf44fe205b110. So this commit reverts dd0c5ebe69e580066de100c8c2ba5430a1aeee44 too.
It would've been nice to have to separate revert commits but it seems GitHub won't let me do this and forces commits to be squashed.
rdar://174648152
Commit: a41d9ac73f5b469b1087844b6bc0987a5a028993
https://github.com/llvm/llvm-project/commit/a41d9ac73f5b469b1087844b6bc0987a5a028993
Author: Matthew Nagy <matthew.nagy at sony.com>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
Log Message:
-----------
Revert "[TySan][Sanitizer Common] Enable TySan testing in the sanitizer commo…" (#191902)
Reverts llvm/llvm-project#191385
Some tests seem to be failing, but not under all environments, possibly
due to non-tysan related reasons. Clearly I need to look more into this
before enabling this
Commit: 25cd5cb3642226887004a9ac1192a8ecb25217a3
https://github.com/llvm/llvm-project/commit/25cd5cb3642226887004a9ac1192a8ecb25217a3
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M llvm/test/MC/RISCV/rv32p-aliases-valid.s
M llvm/test/MC/RISCV/rv64p-aliases-valid.s
Log Message:
-----------
[RISCV][P-ext] Add assembler tests showing that li can use pli.b/h/w instruction. (#191839)
Commit: d900d20dbb812fb7276dac13d7d6f1acfeda2def
https://github.com/llvm/llvm-project/commit/d900d20dbb812fb7276dac13d7d6f1acfeda2def
Author: Daniel Thornburgh <dthorn at google.com>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M clang/cmake/caches/Fuchsia-stage2.cmake
Log Message:
-----------
Revert "[CMake] Enable static libxml2 for Fuchsia toolchain" (#191900)
Reverts llvm/llvm-project#191657
Broke Fuchsia CI.
Commit: a0e19ca0f4c549582bb2ab7ed66866a7a3de16f3
https://github.com/llvm/llvm-project/commit/a0e19ca0f4c549582bb2ab7ed66866a7a3de16f3
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
Log Message:
-----------
[SLP][NFC] Make calculateTreeCostAndTrimNonProfitable compatible
with processBuildVector, NFC
processBuildVector adjusts the scalars to match the entry vector factor,
while calculateTreeCostAndTrimNonProfitable does not. Sync the behovior
to avoid potential issues. Currently it does not affect the cost
estimations, so it is NFC.
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/191905
Commit: f5ef1edaccdbe727de504c5e530d671b3efc06ca
https://github.com/llvm/llvm-project/commit/f5ef1edaccdbe727de504c5e530d671b3efc06ca
Author: Elvis Wang <elvis.wang at sifive.com>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
A llvm/test/Transforms/LoopVectorize/RISCV/conditional-scalar-assignment-fold-tail.ll
A llvm/test/Transforms/LoopVectorize/RISCV/conditional-scalar-assignment.ll
A llvm/test/Transforms/LoopVectorize/RISCV/iv-select-cmp.ll
M llvm/test/Transforms/LoopVectorize/RISCV/select-cmp-reduction.ll
Log Message:
-----------
Reapply "[LV] Enable scalable FindLast on RISCV. (#184931)" (#190938)
Orginal PR: https://github.com/llvm/llvm-project/pull/184931
Original PR message:
This patch enables FindLast reduction vectorization with scalable
vectors
on RISCV.
Fixed the previous crash by
https://github.com/llvm/llvm-project/pull/191166 and
https://github.com/llvm/llvm-project/pull/191517
Commit: 1a50fab6e6a4a5eff2697c5141813979e4a337f7
https://github.com/llvm/llvm-project/commit/1a50fab6e6a4a5eff2697c5141813979e4a337f7
Author: Med Ismail Bennani <ismail at bennani.ma>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M lldb/examples/python/crashlog.py
M lldb/examples/python/crashlog_scripted_process.py
M lldb/include/lldb/Target/StackFrameList.h
M lldb/source/Plugins/Process/scripted/ScriptedThread.cpp
M lldb/source/Target/StackFrameList.cpp
A lldb/test/Shell/ScriptInterpreter/Python/Crashlog/Inputs/a.out.inline.crash
A lldb/test/Shell/ScriptInterpreter/Python/Crashlog/Inputs/a.out.inline.ips
A lldb/test/Shell/ScriptInterpreter/Python/Crashlog/Inputs/inline_test.c
A lldb/test/Shell/ScriptInterpreter/Python/Crashlog/inline_crashlog.test
A lldb/test/Shell/ScriptInterpreter/Python/Crashlog/inline_crashlog_json.test
Log Message:
-----------
[lldb/crashlog] Fix inlined frames in crashlog scripted process (#191132)
When loading a crashlog using scripted process, inlined frames get lost.
This happens because `ScriptedThread::LoadArtificialStackFrames` creates
all frames as concrete frames via `SetFrameAtIndex`, completely
bypassing the inline frame synthesis that
`StackFrameList::FetchFramesUpTo` normally performs using
`GetParentOfInlinedScope`. Since two crashlog frames share the same PC
when one is inlined into the other, `CalculateSymbolContext` resolves
both to the innermost inlined scope, which causes the containing
function to be dropped from the backtrace.
This patch fixes the issue in two parts:
- On the Python side, `resolve_stackframes` now skips frames whose PC
matches the next frame's PC. These are inlined frames that LLDB will
synthesize from debug info when it processes the concrete frames we
provide. Indices are renumbered accordingly, and `len(frames) == 0` is
used for first-frame detection.
- On the C++ side, `LoadArtificialStackFrames` now replicates the inline
synthesis loop from `FetchFramesUpTo`: after creating each concrete
frame, it calls `GetParentOfInlinedScope` in a loop and creates a
`StackFrame` for each inlined parent scope.
rdar://154981041
Signed-off-by: Med Ismail Bennani <ismail at bennani.ma>
Commit: d32e0d35ea4327990ab37edb72bc7a4e7974720b
https://github.com/llvm/llvm-project/commit/d32e0d35ea4327990ab37edb72bc7a4e7974720b
Author: h-vetinari <h.vetinari at gmx.com>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M clang/www/c_status.html
Log Message:
-----------
[clang][docs] mark v22 as released (#191612)
The following features are now released and should be marked as such:
Named loops, v3 -> e4a1b5f
_COUNTER pre-defiend macro: -> df1d786
Allow calling static inline within extern inline: -> 8e60adc
Commit: 23674b9cf3e45194f3f0b7ca0ada8a558f1d9c6d
https://github.com/llvm/llvm-project/commit/23674b9cf3e45194f3f0b7ca0ada8a558f1d9c6d
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenCleanup.cpp
M clang/lib/CIR/CodeGen/CIRGenDecl.cpp
M clang/lib/CIR/CodeGen/CIRGenExprAggregate.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
M clang/lib/CIR/Dialect/Transforms/FlattenCFG.cpp
A clang/test/CIR/CodeGen/lambda-dtor-field.cpp
Log Message:
-----------
[CIR] Implement handling for lambda capture of destructured types (#191316)
Lambda captures of variables that require destruction requires us to
created cleanup scopes with deferred deactivation. That is, the cleanup
scope is created, but added to a list that automatically deactivates the
cleanup when we exit the scope in the compiler code where the lambda is
being generated. This deferred deactivation mechanism will be needed for
other use cases as well, so it is implemented in a general way, which
closely follows the classic codegen handling.
Assisted-by: Cursor / claude-4.6-opus-high
Commit: f1cec8e5b966bfa9a7e31cca5e0731333377ad30
https://github.com/llvm/llvm-project/commit/f1cec8e5b966bfa9a7e31cca5e0731333377ad30
Author: Florian Mayer <fmayer at google.com>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M llvm/test/Instrumentation/HWAddressSanitizer/alloca.ll
Log Message:
-----------
[NFC] [HWASan] precommit test for -hwasan-tag-bits (#191907)
Commit: a6a2a717c57aaa3fd3beb98bfa55c2f2f285a024
https://github.com/llvm/llvm-project/commit/a6a2a717c57aaa3fd3beb98bfa55c2f2f285a024
Author: Erich Keane <ekeane at nvidia.com>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M clang/lib/Sema/TreeTransform.h
M clang/test/SemaOpenACC/loop-construct-collapse-clause.cpp
Log Message:
-----------
[OpenACC] Fix Crash on collapse that doesn't check its transform (#191836)
GH191833 reports a problem with tree transformation of a collapse clause
when the expression in the clause is invalid. This patch makes sure we
skip out of transforming this clause if it ever encounters an invalid
expression.
I also analyzed the rest of the clauses in this visitor and found 1
other that was suspicious, so I added a check for that one as well. The
rest seemingly were all done correctly.
Fixes: #191833
Commit: f0f96c7f788b90e48a6925437e918c3196913325
https://github.com/llvm/llvm-project/commit/f0f96c7f788b90e48a6925437e918c3196913325
Author: hidekisaito <hidekido at amd.com>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPULowerIntrinsics.cpp
A llvm/test/CodeGen/AMDGPU/lower-intrinsics-noalias-metadata.ll
Log Message:
-----------
[AMDGPU] Preserve scoped-AA metadata when lowering barriers to wave_barrier (#191858)
AMDGPULowerIntrinsics downgrades s_barrier/s_barrier_wait to
wave_barrier on single-wave workgroups, but dropped all metadata from
the original instruction. The lost !noalias and !alias.scope metadata
prevented MemorySSA's optimized walker from skipping past the barrier,
causing isClobberedInFunction to walk further and reach unrelated
side-effecting defs (e.g. tensor_load_to_lds) that are misclassified
as clobbers — ultimately losing !amdgpu.noclobber on global loads.
Copy !noalias, !alias.scope, and !tbaa from the old instruction to the
replacement wave_barrier.
Made-with: Cursor
Commit: af0471c1918ab76915bb3750655ffd3281a0b9e7
https://github.com/llvm/llvm-project/commit/af0471c1918ab76915bb3750655ffd3281a0b9e7
Author: Jason Molenda <jmolenda at apple.com>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M lldb/include/lldb/Target/Process.h
M lldb/include/lldb/lldb-enumerations.h
M lldb/source/Plugins/DynamicLoader/MacOSX-DYLD/DynamicLoaderMacOS.cpp
M lldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.cpp
M lldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.h
M lldb/source/Plugins/Process/scripted/ScriptedProcess.cpp
M lldb/source/Plugins/Process/scripted/ScriptedProcess.h
M lldb/tools/debugserver/source/DNB.cpp
M lldb/tools/debugserver/source/DNB.h
M lldb/tools/debugserver/source/DNBDefs.h
M lldb/tools/debugserver/source/MacOSX/MachProcess.h
M lldb/tools/debugserver/source/MacOSX/MachProcess.mm
M lldb/tools/debugserver/source/RNBRemote.cpp
Log Message:
-----------
[lldb][Darwin] Fetch detailed binary info in chunks (#190720)
When binaries have been loaded into a process on Darwin, lldb sends a
jGetLoadedDynamicLibrariesInfos packet to get the filepath, uuid, load
address, and detailed information from the mach header/load commands.
For a large UI app, the number of binaries that can be loaded (through
various dependencies) can exceed a thousand these days, and requesting
detailed information on all of those can result in debugserver
allocating too much memory when running in constrained environments, and
being killed.
In 2023 I laid the groundwork to fetch detailed information in chunks,
instead of one large request. The main challenge with this is when we
first attach to a process that is running, we send a "tell me about all
binaries loaded", and that prevents lldb from chunking the reply; the
packet design for jGetLoadedDynamicLibrariesInfos assumes the entire
reply is sent in one packet, instead of the typical gdb remote serial
protocol trick of a response with partial data starting with 'm' and a
response with a complete reply starting with 'l'. The 2023 change is to
add a new key to this packet, `report_load_commands` and when that is
set to `false`, only the load address of the binaries is reported.
lldb then uses the array of load addresses of all the binaries to fetch
detailed information about them in smaller groupings.
This PR implements the lldb side of that work.
Process::GetLoadedDynamicLibrariesInfos now takes a `bool
include_mh_and_load_commands`, ProcessGDBRemote sends that as an
argument in the jGetLoadedDynamicLibrariesInfos packet.
DynamicLoaderMacOS::DoInitialImageFetch is changed to only get the load
addresses on initial attach. If the reply includes the full binary
information (not just load addresses) -- when talking to an old
debugserver -- we will use that information instead of re-fetching it.
On a newer debugserver that only sent the load addresses, we'll send
this list of addresses to the standard method we use when dyld has told
us to load binaries at addresses already.
DynamicLoaderMacOS::AddBinaries, which takes a list of addresses and
fetches detailed information about them, is updated to request only 600
binaries at a time. A typical UI app will be in the 700-1000 binary
range these days, so this will turn one large fetch into two, in most
cases. There are some system UI processes that have many dependencies
that could require three fetches. I picked this number so most debug
sessions will be handled by two requests.
In debugserver MachProcess::FormatDynamicLibrariesIntoJSON, I removed
the obsolete-for-three-years-now `mod_date` field. I was sending back
the binary filepaths for this "don't send the detailed information"
version of the packet - I don't need that, and it just increases the
size, so I stopped sending filepaths in this mode.
I also added a new field for when we ARE sending detailed information,
`sizeof_mh_and_loadcmds`. I don't use this in lldb yet, but when we are
told about a binary and need to read it from memory today, we have an
initial read to get the mach header, which tells us the size of the load
commands. Then we have a second read of the mach header plus load
commands, before we can start binary processing in earnest. This is an
extra read packet and very unnecessary, given that debugserver knows how
large the mach header + load commands are. So I'm returning it here, and
at some point I'll find a way to pipe that into a new memory object file
creation method in lldb. It's one of those "I should really find a way
to remove that extra read some day" cleanups, and while I was in this
area, I'd add this first piece of that.
I don't have a test for this. I've been thinking about an API test that
creates 700 dylibs with empty functions in each, runs it, and confirms
all of the dylibs were loaded. I'd have to grab a packet log to be
completely sure we didn't read the full binary list in one go. But I
worry that compiling and linking even 700 do-nothing dylibs might be too
much. Maybe I should add a setting in DynamicLoaderMacOS::AddBinaries to
reduce the maximum number of binaries that can be read at once, and have
a small nubmer of dylibs. When by-hand testing this, I had a maximum of
5 binaries being queried in one packet.
rdar://109428337
Commit: 87eabed13056b8ebc6657d4175d551efbd3c3d22
https://github.com/llvm/llvm-project/commit/87eabed13056b8ebc6657d4175d551efbd3c3d22
Author: Haowei <haowei at google.com>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M llvm/utils/lit/lit/llvm/config.py
Log Message:
-----------
[lit] Prevent "lld" from being substituted by LIT in llvm-driver tests (#191893)
We are seeing test failures in "passthrough-lld.test" as LIT
substitutes the "ld.lld" string in the test file to the full
path to the lld. However, the "-flavor" flag does not expect
a full path. It just need a name of the linker so it fails.
This patch modifies the lld matching regex in the use_lld
function in llvm/utils/lit/lit/llvm/config.py. It prevents
LIT from substitute any lld tool strings that are not
standalone.
Commit: 72df1fc645116566cc7240b48c0bc824b504dc47
https://github.com/llvm/llvm-project/commit/72df1fc645116566cc7240b48c0bc824b504dc47
Author: Florian Mayer <fmayer at google.com>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M llvm/lib/Transforms/Instrumentation/HWAddressSanitizer.cpp
M llvm/test/Instrumentation/HWAddressSanitizer/alloca.ll
Log Message:
-----------
[HWASan] Add hwasan-tag-bits flag (#191088)
This can be used to make sure the stack tagging does not use the top bit
of
the pointer. This is useful when HWASan is used in combination with
signed-integer-overflow detection. Some code uses arithmetic on intptr_t
that overflows for sufficiently large pointers.
Commit: bfff42cd6733f451135cda9605557cdea59affc2
https://github.com/llvm/llvm-project/commit/bfff42cd6733f451135cda9605557cdea59affc2
Author: Thurston Dang <thurston at google.com>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M libcxx/docs/ReleaseNotes/23.rst
M libcxx/docs/Status/Cxx2cPapers.csv
M libcxx/include/__format/format_functions.h
M libcxx/include/format
M libcxx/modules/std/format.inc
R libcxx/test/std/utilities/format/format.fmt.string/ctor.dynamic-format-string.pass.cpp
A libcxx/test/std/utilities/format/format.fmt.string/ctor.runtime-format-string.pass.cpp
R libcxx/test/std/utilities/format/format.functions/format.dynamic_format.pass.cpp
R libcxx/test/std/utilities/format/format.functions/format.locale.dynamic_format.pass.cpp
A libcxx/test/std/utilities/format/format.functions/format.locale.runtime_format.pass.cpp
A libcxx/test/std/utilities/format/format.functions/format.runtime_format.pass.cpp
R libcxx/test/std/utilities/format/format.syn/dynamic_format_string.pass.cpp
A libcxx/test/std/utilities/format/format.syn/runtime_format_string.pass.cpp
M libcxx/utils/generate_feature_test_macro_components.py
Log Message:
-----------
Revert "[libc++][format] P3953R3: Rename `std::runtime_format` (#189657)" (#191912)
This reverts commit 67c893eebc793cea8b0d12b9037d3117191b76eb due to
buildbot breakage
(https://github.com/llvm/llvm-project/pull/189657#issuecomment-4231358706,
https://github.com/llvm/llvm-project/pull/189657#issuecomment-4239964862).
Commit: 5753b3f5fd39252a84f9c659d493c404edc00ab4
https://github.com/llvm/llvm-project/commit/5753b3f5fd39252a84f9c659d493c404edc00ab4
Author: hidekisaito <hidekido at amd.com>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPULowerIntrinsics.cpp
M llvm/test/CodeGen/AMDGPU/lower-intrinsics-noalias-metadata.ll
Log Message:
-----------
[AMDGPU] Preserve metadata in all barrier lowering paths (#191916)
Extend copyMetadata to every call-to-call replacement in
AMDGPULowerIntrinsics, not just the single-wave s_barrier →
wave_barrier path. This covers:
- s_cluster_barrier → wave_barrier (single-wave)
- s_cluster_barrier → signal_isfirst + wait + signal + wait (multi-wave)
- s_barrier → signal + wait (split barriers)
Add GFX11 and GFX12 RUN lines and test functions for all lowering
paths to verify metadata preservation.
Made-with: Cursor
Commit: aab5c1075a94b8600f2b31dd62aa4f2e0cd238cb
https://github.com/llvm/llvm-project/commit/aab5c1075a94b8600f2b31dd62aa4f2e0cd238cb
Author: Ye Luo <yeluo at anl.gov>
Date: 2026-04-14 (Tue, 14 Apr 2026)
Changed paths:
M openmp/device/include/Synchronization.h
Log Message:
-----------
[Offload] Revert part of #187138. Workaround #191910 (#191925)
Closes #191910
---------
Co-authored-by: Joseph Huber <huberjn at outlook.com>
Commit: 12f636d4425ae2c89479ae65a581b8bc5ef53571
https://github.com/llvm/llvm-project/commit/12f636d4425ae2c89479ae65a581b8bc5ef53571
Author: Wenju He <wenju.he at intel.com>
Date: 2026-04-14 (Tue, 14 Apr 2026)
Changed paths:
M libclc/cmake/modules/CMakeCLCInformation.cmake
M libclc/cmake/modules/CMakeDetermineCLCCompiler.cmake
Log Message:
-----------
Revert "[libclc][CMake] Use clang/llvm-ar on Windows (#186726)" (#191745)
This reverts commit 4abb927bacf37f18f6359a41639a6d1b3bffffb5.
The code is not needed since 121f5a96ff38 because the C compiler is now
always just-built clang in in-tree build. In addition, CMAKE_AR is
llvm-ar and CMAKE_RANLIB is llvm-ranlib.
Commit: 2874480930113855d3a433aeaf6ece4db0027bb3
https://github.com/llvm/llvm-project/commit/2874480930113855d3a433aeaf6ece4db0027bb3
Author: Twice <twice at apache.org>
Date: 2026-04-14 (Tue, 14 Apr 2026)
Changed paths:
M mlir/docs/Bindings/Python.md
M mlir/python/mlir/dialects/ext.py
M mlir/test/python/dialects/ext.py
M mlir/test/python/dialects/transform_op_interface.py
M mlir/test/python/integration/dialects/bf.py
Log Message:
-----------
[MLIR][Python] Migrate `result(infer_type=True)` to a new field specifier (#191849)
Currrently the signature of `result(..)` is:
```python
result(*, infer_type: bool = False, default_factory: Callable[[], Any] | None = None, kw_only: bool = False) -> Result
```
so when users use `result(infer_type=True)`, the type checkers will
still get `kw_only=False` (from the signature), but actually the
`kw_only` should be `True` (it should follow the value of `infer_type`).
users can use `result(infer_type=True, kw_only=True)` but it's
unnecessarily verbose.
So it may introduce an incompatibility when we start to use
`dataclass_transform`. currently it's fine because we just don't use
`dataclass_transform`. But when we use, we may require a breaking
change.
This PR migrates such use to a new field specifier named
`infer_result()`.
Commit: 93871c569de11f5b80bf1dd6175bb4ce95a93238
https://github.com/llvm/llvm-project/commit/93871c569de11f5b80bf1dd6175bb4ce95a93238
Author: David Rivera <davidriverg at gmail.com>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIRCUDAAttrs.td
M clang/include/clang/CIR/Dialect/IR/CIRDialect.td
M clang/include/clang/CIR/MissingFeatures.h
M clang/lib/CIR/CodeGen/CIRGenCall.cpp
M clang/lib/CIR/CodeGen/CIRGenModule.cpp
M clang/lib/CIR/Dialect/Transforms/LoweringPrepare.cpp
A clang/test/CIR/CodeGenCUDA/device-stub.cu
M clang/test/CIR/CodeGenCUDA/kernel-call.cu
M clang/test/CIR/CodeGenCUDA/kernel-stub-name.cu
M clang/test/CIR/CodeGenHIP/simple.cpp
Log Message:
-----------
[CIR][CUDA] Global emission for fatbin symbols (#187636)
Commit: 42ce5c1481015795a615171acec33a268f4482aa
https://github.com/llvm/llvm-project/commit/42ce5c1481015795a615171acec33a268f4482aa
Author: Jacques Pienaar <jacques+gh at japienaar.info>
Date: 2026-04-14 (Tue, 14 Apr 2026)
Changed paths:
A utils/bazel/llvm-project-overlay/mlir/test/Bytecode/BUILD.bazel
Log Message:
-----------
[bazel] Restore MLIR bytecode tests. (#191938)
These seemed to have gotten removed here.
Commit: 92dde7997192c40841e50f51c25f8ecf598f2a6d
https://github.com/llvm/llvm-project/commit/92dde7997192c40841e50f51c25f8ecf598f2a6d
Author: Chaitanya <Krishna.Sankisa at amd.com>
Date: 2026-04-14 (Tue, 14 Apr 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenModule.cpp
M clang/lib/CIR/CodeGen/CIRGenModule.h
A clang/test/CIR/CodeGen/attr-retain.c
A clang/test/CIR/CodeGen/attr-used.c
A clang/test/CIR/CodeGen/keep-persistent-storage-variables.cpp
A clang/test/CIR/CodeGen/keep-static-consts.cpp
A clang/test/CIR/CodeGenHIP/hip-cuid.hip
Log Message:
-----------
[CIR] Add addLLVMUsed and addLLVMCompilerUsed methods to CIRGenModule (#188189)
Upstreaming clangIR PR: https://github.com/llvm/clangir/pull/2092
This PR adds support for emitting llvm.used and llvm.compiler.used
global arrays in CIR.
Added addUsedGlobal() and addCompilerUsedGlobal() methods to
CIRGenModule
Adds __hip_cuid_* to llvm.compiler.used for HIP compilation.
Followed OGCG implementation in clang/lib/CodeGen/CodeGenModule.cpp
Commit: f2a71ca9418046af3390833d52c5a20be78f3670
https://github.com/llvm/llvm-project/commit/f2a71ca9418046af3390833d52c5a20be78f3670
Author: Leonardo Román Carrillo <leonardoroman at google.com>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M clang/test/OpenMP/split_driver_smoke.c
Log Message:
-----------
[clang][OpenMP][test] Use -fopenmp=libomp explicitly in driver smoke test (#191936)
Using -fopenmp uses the default openmp lib, which defaults to libomp but
may be something else. This test only passes with libomp, so it passes
when using default, but fails downstream if configured for something
else, like libgomp.
Commit: c2624b5205b81516047792147e9dc50f55c22e18
https://github.com/llvm/llvm-project/commit/c2624b5205b81516047792147e9dc50f55c22e18
Author: Rahman Lavaee <rahmanl at google.com>
Date: 2026-04-14 (Tue, 14 Apr 2026)
Changed paths:
M llvm/lib/CodeGen/InsertCodePrefetch.cpp
Log Message:
-----------
[NFC] Use stable_sort to fix the basic-block-sections-code-prefetch.l test. (#191941)
This fixes https://lab.llvm.org/buildbot/#/builders/187/builds/18954.
Commit: 93a67259cf23a555bf3905ce0f6ff349014689f0
https://github.com/llvm/llvm-project/commit/93a67259cf23a555bf3905ce0f6ff349014689f0
Author: aokblast <aokblast at FreeBSD.org>
Date: 2026-04-14 (Tue, 14 Apr 2026)
Changed paths:
M clang/lib/Driver/ToolChains/FreeBSD.h
M clang/test/Driver/coverage-ld.c
M clang/test/Driver/instrprof-ld.c
M clang/test/Driver/sanitizer-ld.c
Log Message:
-----------
[ToolChains][FreeBSD] Set default Linker to LLD for FreeBSD (#190596)
When the linker is specified as ld, toolchain applies special handling
by invoking (triple)-ld instead of resolving ld via standard PATH
lookup. This causes GNU ld installed via the system package manager to
take the precedence (since (triple)-ld appears earlier in the search
path), effectively overriding ld.lld.
As a result, we set the default Linker on FreeBSD to ld.lld to indicate
we want to use lld by default.
Commit: 8619a5efd84b10b9cb4ea33449c38fa6390f9baa
https://github.com/llvm/llvm-project/commit/8619a5efd84b10b9cb4ea33449c38fa6390f9baa
Author: Sairudra More <sairudra60 at gmail.com>
Date: 2026-04-14 (Tue, 14 Apr 2026)
Changed paths:
M flang/lib/Lower/OpenMP/OpenMP.cpp
A flang/test/Lower/OpenMP/declare-target-named-main-interface.f90
M flang/test/Lower/OpenMP/real10.f90
Log Message:
-----------
[flang][OpenMP] Avoid marking named main programs as declare target (#190250)
A bare `!$omp declare target` could incorrectly mark `_QQmain` as
`omp.declare_target` when it appeared in an interface body inside a
named
main program. That pulled host-only callees into device compilation and
caused offload link failures.
Fix this by skipping main programs in the implicit-capture path.
Also add a regression test for the named-main interface case and update
`real10.f90` to use a valid container for the bare `declare target`
form.
This fixes offload link failures where `_QQmain` was incorrectly treated
as
a device function and pulled in host-only symbols such as Fortran I/O
runtime calls.
Minimal reproducer:
```fortran
program named_main
interface
subroutine sub_a(x)
!$omp declare target
integer, intent(inout) :: x
end subroutine
end interface
integer :: v
!$omp target
call sub_a(v)
!$omp end target
end program
Commit: f4e1a51d10bc38b9f4d7420d8ad4c0569b016673
https://github.com/llvm/llvm-project/commit/f4e1a51d10bc38b9f4d7420d8ad4c0569b016673
Author: Sergei Barannikov <barannikov88 at gmail.com>
Date: 2026-04-14 (Tue, 14 Apr 2026)
Changed paths:
M bolt/lib/Core/BinaryContext.cpp
M bolt/lib/Core/DIEBuilder.cpp
M bolt/lib/Core/DebugData.cpp
M bolt/lib/Core/DebugNames.cpp
M bolt/lib/Profile/BoltAddressTranslation.cpp
M bolt/lib/Rewrite/BuildIDRewriter.cpp
M bolt/lib/Rewrite/DWARFRewriter.cpp
M bolt/lib/Rewrite/GNUPropertyRewriter.cpp
M bolt/lib/Rewrite/LinuxKernelRewriter.cpp
M bolt/lib/Rewrite/RewriteInstance.cpp
M bolt/lib/Rewrite/SDTRewriter.cpp
M bolt/lib/Target/X86/X86MCPlusBuilder.cpp
Log Message:
-----------
[bolt] Remove unused argument of DataExtractor constructor (NFC) (#191841)
`AddressSize` parameter is not used by `DataExtractor` and will be
removed in the future. See #190519 for more context.
I took the liberty of switching from using the `StringRef` constructor
overload to `ArrayRef` where appropriate.
Commit: d9c02ffa4d519245903ba8d168b3bafeb1a396af
https://github.com/llvm/llvm-project/commit/d9c02ffa4d519245903ba8d168b3bafeb1a396af
Author: Sergei Barannikov <barannikov88 at gmail.com>
Date: 2026-04-14 (Tue, 14 Apr 2026)
Changed paths:
M compiler-rt/lib/xray/tests/unit/fdr_controller_test.cpp
M compiler-rt/lib/xray/tests/unit/fdr_log_writer_test.cpp
M llvm/lib/XRay/InstrumentationMap.cpp
M llvm/lib/XRay/Profile.cpp
M llvm/lib/XRay/Trace.cpp
M llvm/tools/llvm-xray/xray-fdr-dump.cpp
M llvm/unittests/XRay/FDRProducerConsumerTest.cpp
M llvm/unittests/XRay/FDRTraceWriterTest.cpp
Log Message:
-----------
[XRay] Remove unused argument of DataExtractor constructor (NFC) (#191864)
`AddressSize` parameter is not used by `DataExtractor` and will be
removed in the future. See #190519 for more context.
Commit: b8b596294fc5d829e59cbc67fda36751e3dca015
https://github.com/llvm/llvm-project/commit/b8b596294fc5d829e59cbc67fda36751e3dca015
Author: Rahman Lavaee <rahmanl at google.com>
Date: 2026-04-14 (Tue, 14 Apr 2026)
Changed paths:
M llvm/lib/CodeGen/InsertCodePrefetch.cpp
Log Message:
-----------
[NFC] clang-format llvm/lib/CodeGen/InsertCodePrefetch.cpp. (#191959)
Commit: 4ea9b490ba4bae6834e4568aba1be45c1d18ba2f
https://github.com/llvm/llvm-project/commit/4ea9b490ba4bae6834e4568aba1be45c1d18ba2f
Author: nataliakokoromyti <nataliakokoromyti at gmail.com>
Date: 2026-04-14 (Tue, 14 Apr 2026)
Changed paths:
M clang-tools-extra/clangd/TidyFastChecks.inc
Log Message:
-----------
[clangd] Update TidyFastChecks.inc via TidyFastChecks.py (#191096)
Updated
[TidyFastCheck.inc](https://github.com/llvm/llvm-project/blob/main/clang-tools-extra/clangd/TidyFastChecks.inc#L1)
that has been stale for a while using this
[script](https://github.com/llvm/llvm-project/blob/main/clang-tools-extra/clangd/TidyFastChecks.py),
as discussed in #190531. In the thread, there was some conversation on
the limitations of doing this manually at every new release (adding the
script to the release checklist would definitely help) but it seems like
this is the only low-risk solution for now.
Commit: 6a883943241664d083c610c0ba3106dbe79a72ae
https://github.com/llvm/llvm-project/commit/6a883943241664d083c610c0ba3106dbe79a72ae
Author: Pengcheng Wang <wangpengcheng.pp at bytedance.com>
Date: 2026-04-14 (Tue, 14 Apr 2026)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/riscv_vector.td
M clang/include/clang/Basic/riscv_vector_common.td
M clang/include/clang/Support/RISCVVIntrinsicUtils.h
M clang/lib/Support/RISCVVIntrinsicUtils.cpp
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vpaire.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vpairo.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vunzipe.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vunzipo.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vzip.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vpaire.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vpairo.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vunzipe.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vunzipo.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vzip.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vpaire.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vpairo.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vunzipe.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vunzipo.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vzip.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vpaire.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vpairo.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vunzipe.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vunzipo.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vzip.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvzip/non-policy/non-overloaded/vpaire.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvzip/non-policy/non-overloaded/vpairo.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvzip/non-policy/non-overloaded/vunzipe.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvzip/non-policy/non-overloaded/vunzipo.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvzip/non-policy/non-overloaded/vzip.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvzip/non-policy/overloaded/vpaire.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvzip/non-policy/overloaded/vpairo.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvzip/non-policy/overloaded/vunzipe.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvzip/non-policy/overloaded/vunzipo.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvzip/non-policy/overloaded/vzip.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvzip/policy/non-overloaded/vpaire.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvzip/policy/non-overloaded/vpairo.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvzip/policy/non-overloaded/vunzipe.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvzip/policy/non-overloaded/vunzipo.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvzip/policy/non-overloaded/vzip.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvzip/policy/overloaded/vpaire.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvzip/policy/overloaded/vpairo.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvzip/policy/overloaded/vunzipe.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvzip/policy/overloaded/vunzipo.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvzip/policy/overloaded/vzip.c
M llvm/include/llvm/IR/IntrinsicsRISCV.td
M llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
M llvm/lib/Target/RISCV/RISCVInstrInfoZvzip.td
A llvm/test/CodeGen/RISCV/rvv/vpaire.ll
A llvm/test/CodeGen/RISCV/rvv/vpairo.ll
A llvm/test/CodeGen/RISCV/rvv/vunzipe.ll
A llvm/test/CodeGen/RISCV/rvv/vunzipo.ll
A llvm/test/CodeGen/RISCV/rvv/vzip.ll
Log Message:
-----------
[RISCV] Add Zvzip intrinsics (#186342)
In the RVV Clang builtins generator, a new prototype descriptor
`d` was added to represent vectors with `2 x LMUL`.
The `.ll` tests were generated by LLM and I have reviewed them.
And the .c tests were generated by
https://github.com/riscv-non-isa/riscv-rvv-intrinsic-doc/pull/431.
Commit: 8c9ce1293726734a661f88a97852be200e24449c
https://github.com/llvm/llvm-project/commit/8c9ce1293726734a661f88a97852be200e24449c
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-04-14 (Tue, 14 Apr 2026)
Changed paths:
M clang/lib/AST/ByteCode/Disasm.cpp
M clang/lib/AST/ByteCode/Program.h
Log Message:
-----------
[clang][bytecode] Use qualified name in `Function::dump()` (#191958)
Commit: 78cd6c9b28f99e201bf44c84044517820f32305e
https://github.com/llvm/llvm-project/commit/78cd6c9b28f99e201bf44c84044517820f32305e
Author: NeKon69 <nobodqwe at gmail.com>
Date: 2026-04-14 (Tue, 14 Apr 2026)
Changed paths:
M clang/include/clang/Analysis/Analyses/LifetimeSafety/FactsGenerator.h
M clang/lib/Analysis/LifetimeSafety/FactsGenerator.cpp
M clang/test/Sema/warn-lifetime-safety-invalidations.cpp
M clang/test/Sema/warn-lifetime-safety.cpp
Log Message:
-----------
[LifetimeSafety] Detect use-after-scope through fields in member calls (#191731)
Add `UseFact`s for field origins when calling instance methods.
Fixes #182945
---------
Co-authored-by: Utkarsh Saxena <usx at google.com>
Commit: c61b070ec2d5f42faf26d961b85b070c0b5ebe5c
https://github.com/llvm/llvm-project/commit/c61b070ec2d5f42faf26d961b85b070c0b5ebe5c
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-04-14 (Tue, 14 Apr 2026)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
Log Message:
-----------
[clang][bytecode] Use `CopyArray` for primitive ArrayInitLoops (#191956)
This reduces the bytecode output for the copy constructor of a struct
such as:
```c++
struct Buffer {
struct {
char D[N];
} V;
Buffer() = default;
};
```
from
```
Buffer<5>::(unnamed struct)::(unnamed struct at array.cpp:873:3) 0x7d38d2de3f80
frame size: 104
arg size: 96
rvo: 0
this arg: 1
0 GetPtrThisField 16
16 GetParamPtr 0
32 GetPtrFieldPop 16
48 InitScope 0
64 SetLocalPtr 40
80 GetLocalPtr 40
96 ArrayDecay
104 ExpandPtr
112 ConstUint64 0
128 ArrayElemPtrPopUint64
136 LoadPopSint8
144 InitElemSint8 0
160 GetLocalPtr 40
176 ArrayDecay
184 ExpandPtr
192 ConstUint64 1
208 ArrayElemPtrPopUint64
216 LoadPopSint8
224 InitElemSint8 1
240 GetLocalPtr 40
256 ArrayDecay
264 ExpandPtr
272 ConstUint64 2
288 ArrayElemPtrPopUint64
296 LoadPopSint8
304 InitElemSint8 2
320 GetLocalPtr 40
336 ArrayDecay
344 ExpandPtr
352 ConstUint64 3
368 ArrayElemPtrPopUint64
376 LoadPopSint8
384 InitElemSint8 3
400 GetLocalPtr 40
416 ArrayDecay
424 ExpandPtr
432 ConstUint64 4
448 ArrayElemPtrPopUint64
456 LoadPopSint8
464 InitElemSint8 4
480 FinishInitPop
488 Destroy 0
504 Destroy 0
520 RetVoid
```
(where `N = 5`).
to:
```
Buffer<5>::(unnamed struct)::(unnamed struct at array.cpp:873:3) 0x7c85b9fe3f80
frame size: 0
arg size: 96
rvo: 0
this arg: 1
0 GetPtrThisField 16
16 GetParamPtr 0
32 GetPtrFieldPop 16
48 CopyArraySint8 0 0 5
80 FinishInitPop
88 RetVoid
```
Commit: 4b4aa3b7911dcf5cda2cd166e39b8d5d97c20183
https://github.com/llvm/llvm-project/commit/4b4aa3b7911dcf5cda2cd166e39b8d5d97c20183
Author: Vedant Neve <vedantneve13 at gmail.com>
Date: 2026-04-14 (Tue, 14 Apr 2026)
Changed paths:
M llvm/include/llvm/CodeGen/SDPatternMatch.h
M llvm/unittests/CodeGen/SelectionDAGPatternMatchTest.cpp
Log Message:
-----------
[DAG] Add funnel-shift matchers to SDPatternMatch (Fixes #185880) (#186593)
Add new SelectionDAG pattern matchers for funnel shifts:
- m_FShL and m_FShR as ternary wrappers for ISD::FSHL/ISD::FSHR
- m_FShLLike and m_FShRLike to match:
-- direct FSHL/FSHR nodes
-- ROTL/ROTR equivalents (binding both X and Y to the same rotate operand)
-- OR(SHL(X, C), SRL(Y, BW - C)) forms (including commuted OR)
Also add unit tests covering positive and negative cases for:
- direct funnel-shif matching
- rotate equivalence matching
- OR-based funnel-shift-like patterns
Fixes #185880
Commit: 08fb46468e9b03d8f13e8c3d9e40f7e9adff1a1d
https://github.com/llvm/llvm-project/commit/08fb46468e9b03d8f13e8c3d9e40f7e9adff1a1d
Author: Kartik Ohlan <kartik7ohlan at gmail.com>
Date: 2026-04-14 (Tue, 14 Apr 2026)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
A llvm/test/CodeGen/X86/gfni-or-fold.ll
Log Message:
-----------
[AVX-512] Fix for disjoint-or-fold (VGF2P8AFFINEQB) (#190896)
Fixes #190502
Added implementation of helper combineOrWithGF2P8AFFINEQB and wired the logic with combineOrXorWithSETCC:
Fold: (GF2P8AFFINEQB(X, Y, Imm) or_disjoint SplatVal) -> GF2P8AFFINEQB(X, Y, Imm ^ SplatVal)
When OR is disjoint (no common bits), the splat constant can be folded directly into the GF2P8AFFINEQB immediate via XOR.
Commit: dd034aef4a4631860180a81ff17129f50cc41dbb
https://github.com/llvm/llvm-project/commit/dd034aef4a4631860180a81ff17129f50cc41dbb
Author: Qihan Cai <caiqihan021 at hotmail.com>
Date: 2026-04-14 (Tue, 14 Apr 2026)
Changed paths:
M llvm/lib/Target/X86/X86CompressEVEX.cpp
M llvm/test/CodeGen/X86/evex-to-vex-compress.mir
Log Message:
-----------
[X86] Fix VPMOVPattern folding for extended registers (#191760)
Fixes a problem that tryCompressVPMOVPattern incorrectly folds
instruction using extended registers into VEX. Introduced relevant tests
in MIR.
AI Statement: I used AI to write the tests.
Fixes #191304
Commit: c83832275136474dd9ad0a34c8e0e764a2853cc0
https://github.com/llvm/llvm-project/commit/c83832275136474dd9ad0a34c8e0e764a2853cc0
Author: eiytoq <eiytoq at outlook.com>
Date: 2026-04-14 (Tue, 14 Apr 2026)
Changed paths:
M libcxx/docs/Status/Cxx2cIssues.csv
M libcxx/include/__mdspan/mdspan.h
M libcxx/include/mdspan
M libcxx/test/std/containers/views/mdspan/mdspan/deduction.pass.cpp
Log Message:
-----------
[libc++] LWG4511: Inconsistency between the deduction guide of `std::mdspan` taking `(data_handle_type, mapping_type, accessor_type)` and the corresponding constructor (#191950)
No functional change; this only removes a redundant const qualifier.
Fixes: #189860
Commit: 2332c5d1e1fc9ee98a70ac9df9e34a4f206ac29d
https://github.com/llvm/llvm-project/commit/2332c5d1e1fc9ee98a70ac9df9e34a4f206ac29d
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-04-14 (Tue, 14 Apr 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.h
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlanHelpers.h
M llvm/test/Transforms/LoopVectorize/conditional-assignment.ll
M llvm/test/tools/UpdateTestChecks/update_analyze_test_checks/Inputs/x86-loopvectorize-costmodel.ll
M llvm/test/tools/UpdateTestChecks/update_analyze_test_checks/Inputs/x86-loopvectorize-costmodel.ll.expected
M llvm/test/tools/UpdateTestChecks/update_analyze_test_checks/loopvectorize-costmodel.test
Log Message:
-----------
[LV] Remove legacy selectVectorizationFactor and assert (NFCI) (#190838)
Almost all recipes now go through ::computeCost to properly compute
their costs using the VPlan-based cost model. There are currently no
known cases where the VPlan-based cost model returns an incorrect cost
vs the legacy cost model. I check the remaining open issues with reports
of the assertion triggering and in all cases the VPlan-based cost model
is more accurate, which is causing the divergence.
There are still some fall-back paths, mostly via precomputeCosts, but
those cannot be easily removed without triggering the assert, as the
VPlan-based cost model is more accurate for those cases. An example of
this is https://github.com/llvm/llvm-project/pull/187056.
Fixes https://github.com/llvm/llvm-project/issues/38575.
Fixes https://github.com/llvm/llvm-project/issues/149651.
Fixes https://github.com/llvm/llvm-project/issues/182646.
Fixes https://github.com/llvm/llvm-project/issues/183739.
Fixes https://github.com/llvm/llvm-project/issues/187523.
PR: https://github.com/llvm/llvm-project/pull/190838
Commit: 0756e5985f0c329365c0b0de9fb66dad6abd5d76
https://github.com/llvm/llvm-project/commit/0756e5985f0c329365c0b0de9fb66dad6abd5d76
Author: Sander de Smalen <sander.desmalen at arm.com>
Date: 2026-04-14 (Tue, 14 Apr 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64Features.td
M llvm/lib/Target/AArch64/AArch64InstrFormats.td
M llvm/lib/Target/AArch64/AArch64InstrInfo.h
M llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp
M llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
M llvm/lib/Target/AArch64/SVEInstrFormats.td
M llvm/test/CodeGen/AArch64/active_lane_mask.ll
M llvm/test/CodeGen/AArch64/combine-storetomstore.ll
M llvm/test/CodeGen/AArch64/complex-deinterleaving-reductions-predicated-scalable.ll
M llvm/test/CodeGen/AArch64/dag-combine-concat-vectors.ll
M llvm/test/CodeGen/AArch64/extract-vector-elt-sve.ll
M llvm/test/CodeGen/AArch64/intrinsic-cttz-elts-sve.ll
M llvm/test/CodeGen/AArch64/intrinsic-vector-match-sve2.ll
M llvm/test/CodeGen/AArch64/rcpc3-sve.ll
M llvm/test/CodeGen/AArch64/sme-pstate-sm-changing-call-disable-coalescing.ll
M llvm/test/CodeGen/AArch64/sve-bf16-compares.ll
M llvm/test/CodeGen/AArch64/sve-cmp-select.ll
A llvm/test/CodeGen/AArch64/sve-distinct-predicate-dst.ll
M llvm/test/CodeGen/AArch64/sve-fcvt.ll
M llvm/test/CodeGen/AArch64/sve-fixed-length-fp-select.ll
M llvm/test/CodeGen/AArch64/sve-fixed-length-insert-vector-elt.ll
M llvm/test/CodeGen/AArch64/sve-fixed-length-int-select.ll
M llvm/test/CodeGen/AArch64/sve-fixed-length-int-vselect.ll
M llvm/test/CodeGen/AArch64/sve-fixed-length-masked-128bit-loads.ll
M llvm/test/CodeGen/AArch64/sve-fixed-length-masked-128bit-stores.ll
M llvm/test/CodeGen/AArch64/sve-fixed-length-masked-gather.ll
M llvm/test/CodeGen/AArch64/sve-fixed-length-masked-loads.ll
M llvm/test/CodeGen/AArch64/sve-fixed-length-masked-scatter.ll
M llvm/test/CodeGen/AArch64/sve-fixed-length-masked-stores.ll
M llvm/test/CodeGen/AArch64/sve-fixed-length-subvector.ll
M llvm/test/CodeGen/AArch64/sve-insert-element.ll
M llvm/test/CodeGen/AArch64/sve-intrinsics-int-compares.ll
M llvm/test/CodeGen/AArch64/sve-ld-post-inc.ll
M llvm/test/CodeGen/AArch64/sve-load-compare-store.ll
M llvm/test/CodeGen/AArch64/sve-mask-partition.ll
M llvm/test/CodeGen/AArch64/sve-masked-compressstore.ll
M llvm/test/CodeGen/AArch64/sve-nontemporal-masked-ldst.ll
M llvm/test/CodeGen/AArch64/sve-pred-selectop.ll
M llvm/test/CodeGen/AArch64/sve-pred-selectop2.ll
M llvm/test/CodeGen/AArch64/sve-pred-selectop3.ll
M llvm/test/CodeGen/AArch64/sve-ptest-removal-brk.ll
M llvm/test/CodeGen/AArch64/sve-ptest-removal-cmpeq.ll
M llvm/test/CodeGen/AArch64/sve-ptest-removal-cmpge.ll
M llvm/test/CodeGen/AArch64/sve-ptest-removal-cmpgt.ll
M llvm/test/CodeGen/AArch64/sve-ptest-removal-cmphi.ll
M llvm/test/CodeGen/AArch64/sve-ptest-removal-cmphs.ll
M llvm/test/CodeGen/AArch64/sve-ptest-removal-cmple.ll
M llvm/test/CodeGen/AArch64/sve-ptest-removal-cmplo.ll
M llvm/test/CodeGen/AArch64/sve-ptest-removal-cmpls.ll
M llvm/test/CodeGen/AArch64/sve-ptest-removal-cmplt.ll
M llvm/test/CodeGen/AArch64/sve-ptest-removal-cmpne.ll
M llvm/test/CodeGen/AArch64/sve-ptest-removal-log.ll
M llvm/test/CodeGen/AArch64/sve-ptest-removal-match.ll
M llvm/test/CodeGen/AArch64/sve-punpklo-combine.ll
A llvm/test/CodeGen/AArch64/sve-regalloc-hint-unique-predicate-dst.mir
M llvm/test/CodeGen/AArch64/sve-scmp.ll
M llvm/test/CodeGen/AArch64/sve-select.ll
M llvm/test/CodeGen/AArch64/sve-setcc.ll
M llvm/test/CodeGen/AArch64/sve-smulo-sdnode.ll
M llvm/test/CodeGen/AArch64/sve-split-insert-elt.ll
M llvm/test/CodeGen/AArch64/sve-split-int-pred-reduce.ll
M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-fp-select.ll
M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-fp-vselect.ll
M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-insert-vector-elt.ll
M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-int-compares.ll
M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-int-immediates.ll
M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-int-select.ll
M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-int-vselect.ll
M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-masked-gather-scatter.ll
M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-masked-load.ll
M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-masked-store.ll
M llvm/test/CodeGen/AArch64/sve-trunc.ll
M llvm/test/CodeGen/AArch64/sve-ucmp.ll
M llvm/test/CodeGen/AArch64/sve-umulo-sdnode.ll
M llvm/test/CodeGen/AArch64/sve-vector-compress.ll
Log Message:
-----------
[AArch64] Hint regalloc to choose distinct predicate for MATCH/CMP (#190139)
For some cores it is preferable to choose a destination predicate
register that does not match the governing predicate.
The hint is conservative in that it tries not to pick a callee-save
register if it's not already used/allocated for other purposes, as that
would introduce new spills/fills. Note that this might be preferable if
the instruction is executed in a loop, but it might also be less
preferable for small functions that have an SVE interface (p4-p15 are
caller-preserved).
It is enabled for all cores by default, but it can be disabled by adding
the `disable-distinct-dst-reg-cmp-match` feature. This feature can also
be added to specific cores if this behaviour is undesirable.
Commit: eb9a9b91ea65a7b0da1f84511df1c81805a4f7fd
https://github.com/llvm/llvm-project/commit/eb9a9b91ea65a7b0da1f84511df1c81805a4f7fd
Author: Luke Hutton <luke.hutton at arm.com>
Date: 2026-04-14 (Tue, 14 Apr 2026)
Changed paths:
M mlir/lib/Dialect/Tosa/IR/TosaOps.cpp
Log Message:
-----------
[mlir][tosa] Create and use utility to print shapes (#191774)
Follow up for #191300
Commit: fa720e7d5e5483b93b6098cf4d13dcebaf01ca92
https://github.com/llvm/llvm-project/commit/fa720e7d5e5483b93b6098cf4d13dcebaf01ca92
Author: Ian Tayler Lessa <ian.taylerlessa at arm.com>
Date: 2026-04-14 (Tue, 14 Apr 2026)
Changed paths:
M mlir/lib/Dialect/Tosa/IR/TosaCanonicalizations.cpp
M mlir/test/Dialect/Tosa/canonicalize.mlir
Log Message:
-----------
[mlir][tosa] Optimize non-narrowing float casts (#191439)
Extend the existing NonNarrowingCastsOptimization to also cover casts
between floating point types f32, f16, bf16, f8E4M3FN and F8E5M2. Avoid
introducing direct casts between f8 types since those are not allowed in
TOSA.
Also expand the set of cases that are considering non-narrowing by only
checking if the cast we're trying to remove is non-narrowing. Example
i16 -> i32 -> i8 would have been rejected before, but it is now safely
converted to a single i16 -> i8 tosa.cast, since the behaviour should
identical for the entire input space.
Finally disallow the optimization in the case when the cast that we
would remove involves integer types of different signedness.
Signed-off-by: Ian Tayler Lessa <ian.taylerlessa at arm.com>
Commit: 8beed11857172b89af2cf4c790bd51beee905506
https://github.com/llvm/llvm-project/commit/8beed11857172b89af2cf4c790bd51beee905506
Author: Alex Voicu <alexandru.voicu at amd.com>
Date: 2026-04-14 (Tue, 14 Apr 2026)
Changed paths:
M clang/lib/Driver/ToolChains/AMDGPU.cpp
M clang/lib/Driver/ToolChains/HIPAMD.cpp
Log Message:
-----------
[Driver][HIP] Do not default to `hidden` visibility for AMDGCNSPIRV (#191820)
SPIR-V cannot encode hidden for now, which leads to quirky errors. For
now we deal with this at run time, as part of JIT. Once SPIR-V learns
about `hidden` it'll be revisited.
Commit: bdec04f74395d14010ddf9aa4e3017504f70cfdb
https://github.com/llvm/llvm-project/commit/bdec04f74395d14010ddf9aa4e3017504f70cfdb
Author: Lukacma <Marian.Lukac at arm.com>
Date: 2026-04-14 (Tue, 14 Apr 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-add-sdot-i16-i32.ll
A llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-add-sdot-i8-i16.ll
Log Message:
-----------
[AArch64] Add new dot insts. to cost model (#189642)
This patch builds on #184659 and #184649 and adds cost modelling for new
dot instructions variants, codegened in those patches.
Commit: a044447a1ef8a02dce387e6837c967610b87c6e3
https://github.com/llvm/llvm-project/commit/a044447a1ef8a02dce387e6837c967610b87c6e3
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-04-14 (Tue, 14 Apr 2026)
Changed paths:
M llvm/test/CodeGen/SPIRV/hlsl-resources/cbuffer.ll
Log Message:
-----------
[NFC][SPIR-V] Fix cbuffer.ll test to pass spirv-val validation (#191940)
Mark `main()` function as a compute shader entry point with numthreads
attribute so the test produces valid SPIR-V
related to https://github.com/llvm/llvm-project/issues/190736
Commit: 06c1aa3ca74cf73df07d1ef3fff9b476e5aedaab
https://github.com/llvm/llvm-project/commit/06c1aa3ca74cf73df07d1ef3fff9b476e5aedaab
Author: Weibo He <NewSigma at 163.com>
Date: 2026-04-14 (Tue, 14 Apr 2026)
Changed paths:
M llvm/docs/Coroutines.rst
M llvm/include/llvm/Transforms/Coroutines/CoroShape.h
M llvm/lib/Transforms/Coroutines/CoroEarly.cpp
M llvm/lib/Transforms/Coroutines/Coroutines.cpp
M llvm/test/Transforms/Coroutines/coro-debug.ll
R llvm/test/Transforms/Coroutines/gh105595.ll
Log Message:
-----------
[CoroEarly][IR] Clarify semantic of llvm.coro.end (#191752)
We introduced a workaround for the following pattern in #139243:
``` LLVM
define void @fn() presplitcoroutine {
%__promise = alloca ptr, align 8
...
coro.ret:
call void @llvm.coro.end(ptr null, i1 false, token none)
store ptr null, ptr %__promise, align 8
ret void
}
```
where DSE considers `__promise` dead after the return and eliminates the
store, leading to a miscompilation.
However, after #151067, the problematic pattern is gone. And it
currently looks like:
``` LLVM
gro.conv:
store ptr null, ptr %__promise, align 8
br label %after.gro.conv
after.gro.conv:
br i1 %body.done, label %coro.cleanup, label %coro.ret
coro.ret:
call void @llvm.coro.end(ptr null, i1 false, token none)
ret void
```
DSE cannot eliminate the store because `__promise` escapes through
`coro.id`, and `coro.end` post-dominates the store. It turns out that
accessing the coroutine frame after `coro.end` is not safe. This patch
proposes clarifying the semantics of `coro.end` and reverting the
workaround, as it confuses alias analyses. I have scanned the tests and
updated the uses of the coroutine frame after `coro.end`.
Commit: 1b804e20b9d258c8f0b454d43013cf2300f0df26
https://github.com/llvm/llvm-project/commit/1b804e20b9d258c8f0b454d43013cf2300f0df26
Author: Zhijie Wang <yesterda9 at gmail.com>
Date: 2026-04-14 (Tue, 14 Apr 2026)
Changed paths:
M clang/include/clang/Analysis/Analyses/LifetimeSafety/Facts.h
M clang/include/clang/Analysis/Analyses/LifetimeSafety/LifetimeAnnotations.h
M clang/lib/Analysis/LifetimeSafety/Dataflow.h
M clang/lib/Analysis/LifetimeSafety/Facts.cpp
M clang/lib/Analysis/LifetimeSafety/FactsGenerator.cpp
M clang/lib/Analysis/LifetimeSafety/LifetimeAnnotations.cpp
M clang/lib/Analysis/LifetimeSafety/LiveOrigins.cpp
M clang/lib/Analysis/LifetimeSafety/LoanPropagation.cpp
M clang/lib/Analysis/LifetimeSafety/Origins.cpp
M clang/test/Sema/Inputs/lifetime-analysis.h
M clang/test/Sema/warn-lifetime-safety-dangling-field.cpp
M clang/test/Sema/warn-lifetime-safety-invalidations.cpp
M clang/test/Sema/warn-lifetime-safety-noescape.cpp
M clang/test/Sema/warn-lifetime-safety-suggestions.cpp
M clang/test/Sema/warn-lifetime-safety.cpp
Log Message:
-----------
[LifetimeSafety] Track origins through std::function (#191123)
1. Recognizes `std::function` and `std::move_only_function` as types
that can carry origins from a wrapped lambda's captures, propagating
origins through both construction and assignment.
2. Adds a kill-only mechanism (i.e., a new `KillOriginFact`) to clear
old loans when the RHS has no origins.
Fixes #186009
Commit: 7c3b4995cf17b847306b96783830bca46c56d6c4
https://github.com/llvm/llvm-project/commit/7c3b4995cf17b847306b96783830bca46c56d6c4
Author: Konrad Kleine <kkleine at redhat.com>
Date: 2026-04-14 (Tue, 14 Apr 2026)
Changed paths:
M llvm/lib/DebugInfo/DWARF/DWARFDebugMacro.cpp
Log Message:
-----------
[llvm][DebugInfo] formatv in DWARFDebugMacro (#191987)
This relates to #35980.
Commit: 90ccb1cc9e47fa0d7acc2aa0750fe8d5a46c7757
https://github.com/llvm/llvm-project/commit/90ccb1cc9e47fa0d7acc2aa0750fe8d5a46c7757
Author: Konrad Kleine <kkleine at redhat.com>
Date: 2026-04-14 (Tue, 14 Apr 2026)
Changed paths:
M llvm/lib/DebugInfo/DWARF/DWARFDebugLine.cpp
Log Message:
-----------
[llvm][DebugInfo] formatv in DWARFDebugLine (#191986)
This relates to #35980.
Commit: 444ffde12de32e88cfcda2098e2eea0876850139
https://github.com/llvm/llvm-project/commit/444ffde12de32e88cfcda2098e2eea0876850139
Author: Konrad Kleine <kkleine at redhat.com>
Date: 2026-04-14 (Tue, 14 Apr 2026)
Changed paths:
M llvm/lib/DebugInfo/DWARF/DWARFDebugFrame.cpp
Log Message:
-----------
[llvm][DebugInfo] formatv in DWARFDebugFrame (#191984)
This relates to #35980.
Commit: 3fe0bdfaa592cc0d7ce9f695a94522fa92366c6f
https://github.com/llvm/llvm-project/commit/3fe0bdfaa592cc0d7ce9f695a94522fa92366c6f
Author: Zachary Yedidia <zyedidia at gmail.com>
Date: 2026-04-14 (Tue, 14 Apr 2026)
Changed paths:
M llvm/docs/LFI.rst
M llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
A llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCLFIRewriter.cpp
A llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCLFIRewriter.h
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCTargetDesc.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/CMakeLists.txt
A llvm/test/MC/AArch64/LFI/reserved.s
A llvm/test/MC/AArch64/LFI/sys.s
A llvm/test/MC/AArch64/LFI/tp.s
Log Message:
-----------
[LFI][AArch64] Add AArch64 LFI rewrites for system instructions (#186896)
This builds on the MCLFIRewriter infrastructure to add the
AArch64-specific LFI rewriter, which rewrites AArch64 instructions for
LFI sandboxing during the assembler step.
The initial rewriter handles system instructions: system calls, thread
pointer accesses, and also rejects modifications to reserved registers.
Commit: cabb972810f8e2e06fcba64d8fe967c3573c6c07
https://github.com/llvm/llvm-project/commit/cabb972810f8e2e06fcba64d8fe967c3573c6c07
Author: Davide Grohmann <davide.grohmann at arm.com>
Date: 2026-04-14 (Tue, 14 Apr 2026)
Changed paths:
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVTosaOps.td
Log Message:
-----------
[mlir][spirv] Mark several SPIR-V TOSA Ext Inst ops as NoMemoryEffects (#191814)
Initially such ops were marked Pure wrongly since they could overflow or
underflow the accumulator and result in undefined behavior.
Signed-off-by: Davide Grohmann <davide.grohmann at arm.com>
Commit: 4c543ac848e0db170eaa223a734c1fed26468e24
https://github.com/llvm/llvm-project/commit/4c543ac848e0db170eaa223a734c1fed26468e24
Author: Konrad Kleine <kkleine at redhat.com>
Date: 2026-04-14 (Tue, 14 Apr 2026)
Changed paths:
M llvm/lib/DebugInfo/DWARF/DWARFDebugRangeList.cpp
Log Message:
-----------
[llvm][DebugInfo] formatv in DWARFDebugRangeList (#191989)
This relates to #35980.
Commit: 1e68dcc740c902ba418bd06e4e9677742b39acb8
https://github.com/llvm/llvm-project/commit/1e68dcc740c902ba418bd06e4e9677742b39acb8
Author: Konrad Kleine <kkleine at redhat.com>
Date: 2026-04-14 (Tue, 14 Apr 2026)
Changed paths:
M llvm/lib/DebugInfo/DWARF/DWARFDebugRnglists.cpp
Log Message:
-----------
[llvm][DebugInfo] formatv in DWARFDebugRnglists (#191991)
This relates to #35980.
Commit: d023386c5b054a6958d5aa1e156308ed0fcfcfa4
https://github.com/llvm/llvm-project/commit/d023386c5b054a6958d5aa1e156308ed0fcfcfa4
Author: Konrad Kleine <kkleine at redhat.com>
Date: 2026-04-14 (Tue, 14 Apr 2026)
Changed paths:
M llvm/lib/DebugInfo/DWARF/DWARFDie.cpp
Log Message:
-----------
[llvm][DebugInfo] formatv in DWARFDie (#191992)
This relates to #35980.
Commit: 8417922cb4e25d79e8c362a6bf2b5d6aca882582
https://github.com/llvm/llvm-project/commit/8417922cb4e25d79e8c362a6bf2b5d6aca882582
Author: Sergei Barannikov <barannikov88 at gmail.com>
Date: 2026-04-14 (Tue, 14 Apr 2026)
Changed paths:
M lldb/source/Target/RegisterContextUnwind.cpp
Log Message:
-----------
[lldb] Start using formatv() in RegisterContextUnwind (NFCI) (#191576)
This introduces two macros that do the same
`UnwindLogMsg()`/`UnwindLogMsgVerbose()` functions, but allow using
`formatv()`-style formatting. In addition to the benefits that the
`formatv()` function provides, this makes `log enable -F lldb unwind`
print the correct methods names from which the messages originate
(previously, it printed the name of one of those two helper methods).
I didn't replace all function calls with macros because there are too
many of them for one PR. This only replaces calls whose format string
contains no specifiers or only '%s' specifiers.
Commit: 20c2216d916180f3cff9b5bbb2cd3c645fd1d866
https://github.com/llvm/llvm-project/commit/20c2216d916180f3cff9b5bbb2cd3c645fd1d866
Author: Konrad Kleine <kkleine at redhat.com>
Date: 2026-04-14 (Tue, 14 Apr 2026)
Changed paths:
M llvm/lib/DebugInfo/DWARF/DWARFListTable.cpp
Log Message:
-----------
[llvm][DebugInfo] formatv in DWARFListTable (#191996)
This relates to #35980.
Commit: 2e07997236188c1cf8fed4534304a007f2d09330
https://github.com/llvm/llvm-project/commit/2e07997236188c1cf8fed4534304a007f2d09330
Author: Konrad Kleine <kkleine at redhat.com>
Date: 2026-04-14 (Tue, 14 Apr 2026)
Changed paths:
M llvm/lib/DebugInfo/DWARF/DWARFTypeUnit.cpp
Log Message:
-----------
[llvm][DebugInfo] formatv in DWARFTypeUnit (#191997)
This relates to #35980.
Commit: 9f1da15276e18b165c54c00b2ccf2c54839c61f1
https://github.com/llvm/llvm-project/commit/9f1da15276e18b165c54c00b2ccf2c54839c61f1
Author: Konrad Kleine <kkleine at redhat.com>
Date: 2026-04-14 (Tue, 14 Apr 2026)
Changed paths:
M llvm/lib/DebugInfo/DWARF/DWARFUnwindTablePrinter.cpp
Log Message:
-----------
[llvm][DebugInfo] formatv in DWARFUnwindTablePrinter (#191999)
This relates to #35980.
Commit: cf3a6c8431f9a5b91f9faa77384a70029745dce8
https://github.com/llvm/llvm-project/commit/cf3a6c8431f9a5b91f9faa77384a70029745dce8
Author: Konrad Kleine <kkleine at redhat.com>
Date: 2026-04-14 (Tue, 14 Apr 2026)
Changed paths:
M llvm/lib/DebugInfo/LogicalView/Readers/LVCodeViewVisitor.cpp
Log Message:
-----------
[llvm][DebugInfo] formatv in LVCodeViewVisitor (#192010)
This relates to #35980.
Commit: 34e5b955ddf809feb9ca8fd145e581471f684477
https://github.com/llvm/llvm-project/commit/34e5b955ddf809feb9ca8fd145e581471f684477
Author: Konrad Kleine <kkleine at redhat.com>
Date: 2026-04-14 (Tue, 14 Apr 2026)
Changed paths:
M llvm/lib/DebugInfo/LogicalView/Readers/LVBinaryReader.cpp
Log Message:
-----------
[llvm][DebugInfo] formatv in LVBinaryReader (#192009)
This relates to #35980.
Commit: 453d0e229d7a0288a65d16a15ba79948c4fff303
https://github.com/llvm/llvm-project/commit/453d0e229d7a0288a65d16a15ba79948c4fff303
Author: Konrad Kleine <kkleine at redhat.com>
Date: 2026-04-14 (Tue, 14 Apr 2026)
Changed paths:
M llvm/lib/DebugInfo/LogicalView/Core/LVScope.cpp
Log Message:
-----------
[llvm][DebugInfo] formatv in LVScope (#192008)
This relates to #35980.
Commit: 65c462aa91e63ca545fd55f81e29f7b57b0a9d3d
https://github.com/llvm/llvm-project/commit/65c462aa91e63ca545fd55f81e29f7b57b0a9d3d
Author: Konrad Kleine <kkleine at redhat.com>
Date: 2026-04-14 (Tue, 14 Apr 2026)
Changed paths:
M llvm/lib/DebugInfo/LogicalView/Core/LVRange.cpp
Log Message:
-----------
[llvm][DebugInfo] formatv in LVRange (#192006)
This relates to #35980.
Commit: 8a5dc1275c45a88e8f9d72230d1df71ee9caeb98
https://github.com/llvm/llvm-project/commit/8a5dc1275c45a88e8f9d72230d1df71ee9caeb98
Author: Konrad Kleine <kkleine at redhat.com>
Date: 2026-04-14 (Tue, 14 Apr 2026)
Changed paths:
M llvm/lib/DebugInfo/LogicalView/Core/LVObject.cpp
Log Message:
-----------
[llvm][DebugInfo] formatv in LVObject (#192004)
This relates to #35980.
Commit: 941b0f40fdab6b9b141ad80f3e8fcc020b41e441
https://github.com/llvm/llvm-project/commit/941b0f40fdab6b9b141ad80f3e8fcc020b41e441
Author: Konrad Kleine <kkleine at redhat.com>
Date: 2026-04-14 (Tue, 14 Apr 2026)
Changed paths:
M llvm/lib/DebugInfo/LogicalView/Core/LVLocation.cpp
Log Message:
-----------
[llvm][DebugInfo] formatv in LVLocation (#192003)
This relates to #35980.
Commit: 2b593be98121e363d38644183210bf1933604a5a
https://github.com/llvm/llvm-project/commit/2b593be98121e363d38644183210bf1933604a5a
Author: Konrad Kleine <kkleine at redhat.com>
Date: 2026-04-14 (Tue, 14 Apr 2026)
Changed paths:
M llvm/lib/DebugInfo/LogicalView/Core/LVElement.cpp
Log Message:
-----------
[llvm][DebugInfo] formatv in LVElement (#192002)
This relates to #35980.
Commit: 297510f80397a553023cfe34ca5d08a507327163
https://github.com/llvm/llvm-project/commit/297510f80397a553023cfe34ca5d08a507327163
Author: David CARLIER <devnexen at gmail.com>
Date: 2026-04-14 (Tue, 14 Apr 2026)
Changed paths:
M bolt/runtime/common.h
M bolt/runtime/instr.cpp
Log Message:
-----------
[BOLT][runtime] harden profile file open. (#191669)
Commit: 8b5b987cfa7bff5b46bd8b384a52347ab74f6e4c
https://github.com/llvm/llvm-project/commit/8b5b987cfa7bff5b46bd8b384a52347ab74f6e4c
Author: David CARLIER <devnexen at gmail.com>
Date: 2026-04-14 (Tue, 14 Apr 2026)
Changed paths:
M bolt/runtime/instr.cpp
Log Message:
-----------
[BOLT][runtime] fix readlink bound check in getBinaryPath. (#191666)
Ret was uint32_t truncating the uint64_t __readlink return, and was
compared against the unrelated getdents64 BufSize (1024) instead of
sizeof(TargetPath) (NameMax, 4096). A truncated readlink of exactly
NameMax bytes also wrote one byte past TargetPath.
Commit: 1207be6e79c3fbc16625b0184bdf8d7a166b0a16
https://github.com/llvm/llvm-project/commit/1207be6e79c3fbc16625b0184bdf8d7a166b0a16
Author: Sergei Barannikov <barannikov88 at gmail.com>
Date: 2026-04-14 (Tue, 14 Apr 2026)
Changed paths:
M lldb/include/lldb/Target/RegisterContextUnwind.h
M lldb/source/Target/RegisterContextUnwind.cpp
Log Message:
-----------
[lldb] Use UNWIND_LOG macro in more places in RegisterContextUnwind (#192032)
Replace calls to `UnwindLogMsg()`/`UnwindLogMsgVerbose()` with
`UNWIND_LOG`/`UNWIND_LOG_VERBOSE` macros introduced in 8417922c.
This replaces calls whose format string contains only '%d' and sometimes
'%s' specifiers, the rest will be addressed in a future patch.
As a result of this change, the `UnwindLogMsgVerbose()` is no longer
used and has been removed.
Commit: 270e0652dfa27091eb927113d16969122ac02a08
https://github.com/llvm/llvm-project/commit/270e0652dfa27091eb927113d16969122ac02a08
Author: A. Jiang <de34 at live.cn>
Date: 2026-04-14 (Tue, 14 Apr 2026)
Changed paths:
M libcxx/docs/ReleaseNotes/23.rst
M libcxx/docs/Status/Cxx2cPapers.csv
M libcxx/include/__format/format_functions.h
M libcxx/include/format
M libcxx/modules/std/format.inc
A libcxx/test/std/utilities/format/format.fmt.string/ctor.dynamic-format-string.pass.cpp
R libcxx/test/std/utilities/format/format.fmt.string/ctor.runtime-format-string.pass.cpp
A libcxx/test/std/utilities/format/format.functions/format.dynamic_format.pass.cpp
A libcxx/test/std/utilities/format/format.functions/format.locale.dynamic_format.pass.cpp
R libcxx/test/std/utilities/format/format.functions/format.locale.runtime_format.pass.cpp
R libcxx/test/std/utilities/format/format.functions/format.runtime_format.pass.cpp
A libcxx/test/std/utilities/format/format.syn/dynamic_format_string.pass.cpp
R libcxx/test/std/utilities/format/format.syn/runtime_format_string.pass.cpp
M libcxx/utils/generate_feature_test_macro_components.py
Log Message:
-----------
Reapply "[libc++][format] P3953R3: Rename `std::runtime_format` (#189657)" (#191939)
This reverts commit bfff42cd6733f451135cda9605557cdea59affc2.
Commit: 60fdca0466a1e232b62dff1032bc5968fdca7fed
https://github.com/llvm/llvm-project/commit/60fdca0466a1e232b62dff1032bc5968fdca7fed
Author: Paul Walker <paul.walker at arm.com>
Date: 2026-04-14 (Tue, 14 Apr 2026)
Changed paths:
M llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp
M llvm/test/CodeGen/NVPTX/globals_init.ll
Log Message:
-----------
[LLVM][NVPTX] Add vector ConstantInt/FP support to bufferAggregateConstant. (#182544)
Commit: a7993befd9a6c80ca1bc07ae5db2b644eae235a7
https://github.com/llvm/llvm-project/commit/a7993befd9a6c80ca1bc07ae5db2b644eae235a7
Author: David Sherwood <david.sherwood at arm.com>
Date: 2026-04-14 (Tue, 14 Apr 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/aarch64-predication.ll
M llvm/test/Transforms/LoopVectorize/AArch64/predication_costs.ll
Log Message:
-----------
[LV] Don't skip VPlan cost model for div/rem instructions (#187056)
In LoopVectorizationPlanner::precomputeCosts we are skipping calculation
of costs using the VPlan cost model, instead preferring to use the
legacy costs. This helps to prevent the legacy and vplan cost model
assert firing, but really we should be encouraging full use of the VPlan
cost model.
I've created this initial PR to stop skipping the computation costs for
udiv/urem/sdiv/srem instructions. The VPlan costs seem to match up
nicely.
I intend to follow up with more PRs to move more opcodes across.
Commit: 12af401f6ab586aad5ee86103e6c5dd6aa798e88
https://github.com/llvm/llvm-project/commit/12af401f6ab586aad5ee86103e6c5dd6aa798e88
Author: ioana ghiban <ioana.ghiban at arm.com>
Date: 2026-04-14 (Tue, 14 Apr 2026)
Changed paths:
M mlir/lib/Conversion/MathToEmitC/MathToEmitC.cpp
M mlir/test/Conversion/MathToEmitC/math-to-emitc.mlir
A mlir/test/Dialect/EmitC/math/ops.mlir
Log Message:
-----------
[mlir][EmitC] Convert math::RoundEvenOp, SqrtOp and RsqrtOp (#190158)
This patch extends the Math-to-EmitC conversion to cover `math.roundeven` and
`math.sqrt` for scalar f32/f64 values.
`math.roundeven` and `math.sqrt` are lowered to `emitc.call_opaque` using the
appropriate target-specific names:
C: `roundevenf` / `roundeven`, `sqrtf` / `sqrt`
C++: `std::roundeven`, `std::sqrt`
The patch also adds coverage for `math.rsqrt`. There is no direct EmitC
lowering for `math.rsqrt`; instead, the new tests verify the existing expansion
path through `-math-expand-ops=ops=rsqrt`, followed by `-convert-math-to-emitc`
and `-convert-arith-to-emitc`. This ensures the cross-dialect lowering sequence
produces the expected `emitc.constant`, `emitc.call_opaque`, and `emitc.div`
operations for f32/f64.
Unsupported cases remain unchanged. In particular, the new test documents that
f16 math.rsqrt is not lowered because math.sqrt is only converted for f32/f64.
Commit: f2b5dc225889df4ca368db0f481c67dddf19c471
https://github.com/llvm/llvm-project/commit/f2b5dc225889df4ca368db0f481c67dddf19c471
Author: Stefan Gränitz <stefan.graenitz at gmail.com>
Date: 2026-04-14 (Tue, 14 Apr 2026)
Changed paths:
M lldb/packages/Python/lldbsuite/test/lldbtest.py
M lldb/test/API/symstore/TestSymStore.py
Log Message:
-----------
[lldb] Fix: Disable shared build dir when testing with PDB (#190991)
The mechanism to disable `SHARED_BUILD_TESTCASE` for tests
that set `TEST_WITH_PDB_DEBUG_INFO` doesn't work. The property
was set on the wrong object. This patch fixes it and moves the assignment
after the for-loop, since the respective dict only exists there.
Commit: 78820cb91605693b7d768be4ebc8b66181d3e9c3
https://github.com/llvm/llvm-project/commit/78820cb91605693b7d768be4ebc8b66181d3e9c3
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-04-14 (Tue, 14 Apr 2026)
Changed paths:
M clang/include/clang/Driver/ToolChain.h
M clang/lib/Driver/ToolChain.cpp
M clang/lib/Driver/ToolChains/BareMetal.cpp
M clang/lib/Driver/ToolChains/BareMetal.h
M clang/lib/Driver/ToolChains/CommonArgs.cpp
M clang/lib/Driver/ToolChains/Gnu.cpp
M clang/lib/Driver/ToolChains/Linux.cpp
M clang/lib/Driver/ToolChains/MinGW.cpp
A clang/test/Driver/linux-multilib.yaml
A clang/test/Driver/mingw-multilib.yaml
Log Message:
-----------
[Clang] Enable multilib library support for Linux/Windows (#188584)
Summary:
This PR standardizes the logic used in the baremtal build to the common
toolchain interface. We then use this to handle the support in Linux and
Windows.
The multilib functionality allows us to select variant libraries based
off of a configuration file. For example, if the `multilib.yaml` file
detects `-fsanitize=address` it will automatically use the libraries
inside of `asan/` instead. These are layered so they do not necessarily
need to be complete library builds. More documentation can be found at
https://clang.llvm.org/docs/Multilib.html.
The motivation for this is so platforms like ROCm can use a more
standard way to ship debug / asan variants of libraries like OpenMP or
similar for both GPU an CPU targets.
Commit: 356f2fcf412b19e37a98c61abf36917cad3455d6
https://github.com/llvm/llvm-project/commit/356f2fcf412b19e37a98c61abf36917cad3455d6
Author: Petar Avramovic <Petar.Avramovic at amd.com>
Date: 2026-04-14 (Tue, 14 Apr 2026)
Changed paths:
A llvm/test/tools/UpdateTestChecks/update_mir_test_checks/Inputs/x86-filter.mir
A llvm/test/tools/UpdateTestChecks/update_mir_test_checks/Inputs/x86-filter.mir.filter-out.expected
A llvm/test/tools/UpdateTestChecks/update_mir_test_checks/Inputs/x86-filter.mir.filter.expected
A llvm/test/tools/UpdateTestChecks/update_mir_test_checks/x86-filter.test
M llvm/utils/UpdateTestChecks/mir.py
M llvm/utils/update_mir_test_checks.py
Log Message:
-----------
[UpdateTestChecks] Add --filter/--filter-out support to update_mir_test_checks.py (#191059)
These options were already accepted by the script but silently ignored.
This patch makes them functional, consistent with
update_llc_test_checks.py.
Co-Authored-By: Claude Sonnet 4.6 <noreply at anthropic.com>
Commit: 0d20c873ddaa6699083510d77a749bf96046de7c
https://github.com/llvm/llvm-project/commit/0d20c873ddaa6699083510d77a749bf96046de7c
Author: Jan André Reuter <j.reuter at fz-juelich.de>
Date: 2026-04-14 (Tue, 14 Apr 2026)
Changed paths:
M clang/test/OpenMP/cancel_codegen.cpp
M clang/test/OpenMP/irbuilder_for_iterator.cpp
M clang/test/OpenMP/irbuilder_for_rangefor.cpp
M clang/test/OpenMP/irbuilder_for_unsigned.c
M clang/test/OpenMP/irbuilder_for_unsigned_auto.c
M clang/test/OpenMP/irbuilder_for_unsigned_down.c
M clang/test/OpenMP/irbuilder_for_unsigned_dynamic.c
M clang/test/OpenMP/irbuilder_for_unsigned_dynamic_chunked.c
M clang/test/OpenMP/irbuilder_for_unsigned_runtime.c
M clang/test/OpenMP/irbuilder_for_unsigned_static_chunked.c
M clang/test/OpenMP/irbuilder_nested_parallel_for.c
M clang/test/OpenMP/irbuilder_unroll_partial_factor_for.c
M clang/test/OpenMP/irbuilder_unroll_partial_heuristic_constant_for.c
M clang/test/OpenMP/irbuilder_unroll_partial_heuristic_runtime_for.c
M clang/test/OpenMP/irbuilder_unroll_unroll_partial_factor.c
M clang/test/OpenMP/nested_loop_codegen.cpp
A flang/test/Integration/OpenMP/workshare-ident-flag.f90
M llvm/include/llvm/Frontend/OpenMP/OMPKinds.def
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
M mlir/test/Target/LLVMIR/omptarget-parallel-wsloop.mlir
M mlir/test/Target/LLVMIR/openmp-cancel-distribute-parallel-loop.mlir
M mlir/test/Target/LLVMIR/openmp-cancel.mlir
M mlir/test/Target/LLVMIR/openmp-cancellation-point.mlir
M mlir/test/Target/LLVMIR/openmp-composite-simd-if.mlir
M mlir/test/Target/LLVMIR/openmp-dist_schedule_with_wsloop.mlir
M mlir/test/Target/LLVMIR/openmp-llvm.mlir
M mlir/test/Target/LLVMIR/openmp-reduction-array-sections.mlir
M mlir/test/Target/LLVMIR/openmp-reduction-sections.mlir
M mlir/test/Target/LLVMIR/openmp-simd-guided.mlir
Log Message:
-----------
[OMPIRBuilder] Pass work loop type in ident flags (#189347)
Flang uses the OMPIRBuilder to lower OpenMP constructs to LLVM IR.
When dealing with work sharing constructs, such as DO, DISTRIBUTE or
SECTIONS/SECTION, OMPIRBuilder needs to construct the call to the OpenMP
runtime, typically `__kmpc_for_static_init` or
`__kmpc_dist_for_static_init`.
The first passed flag to these functions is the `ident_t` struct,
defined in `kmp.h`. Most of the arguments are reserved for usage in
Fortran and unused in `openmp`. However, the `flags` argument is used
throughout the code base to identify specific constructs, such as the
type of work sharing construct.
In https://github.com/llvm/llvm-project/issues/112545, it was identified
that Flang does not provide the correct `ident_t` flags when calling
into e.g. `__kmpc_for_static_init`, causing the following runtime
warning to appear when the OpenMP Tools Interface is used:
```
OMP: Warning #189: OMPT: Cannot determine workshare type; using the default (loop) instead. This issue is fixed in an up-to-date compiler.
```
This PR adds a test, verifying that the work sharing constructs provide
the correct flags to the runtime call. The IR check for SECTIONS/SECTION
maps against `KMP_IDENT_WORK_LOOP`, as the OMPIRBuilder converts the
SECTIONS construct into a DO loop with a switch-case for every SECTION
clause.
In addition, `OMPIRBuilder` is modified, so that the work loop type is
passed via `ident_t.flags` to the respective
`__kmpc_for_static_init`/`__kmpc_dist_for_static_init` calls, letting
the test pass and the `libomp` warning disappear.
Wherever possible, provide the mapping based on the passed `LoopType`.
If not available, I implemented the decision based on the
`DistScheduleSchedType`, or in case of `applyDynamicWorkshareLoop`,
hard-coded this to `OMP_IDENT_FLAG_WORK_LOOP`.
---
As this is the first time dealing with `OMPIRBuilder`, I'm not sure if I
missed anything while implementing these changes.
If there's anything that can be improved here, e.g. with the ident flag
mapping, I'm very grateful for any feedback. I tried to implement this
with the best of my understanding based on taking a look at the existing
code and tests.
For example, I was not sure if adding a test to
`flang/test/Integration/OpenMP/` is the correct approach here, or if I
rather should try to modify
`unittests/Frontend/OpenMPIRBuilderTest.cpp`. In the end, the former
looked to me more straight-forward.
---
Fixes https://github.com/llvm/llvm-project/issues/112545
---------
Signed-off-by: Jan André Reuter <j.reuter at fz-juelich.de>
Commit: 6cfbc25102d95f1afa69351c36767d9d8c25c21a
https://github.com/llvm/llvm-project/commit/6cfbc25102d95f1afa69351c36767d9d8c25c21a
Author: Baranov Victor <bar.victor.2002 at gmail.com>
Date: 2026-04-14 (Tue, 14 Apr 2026)
Changed paths:
M clang-tools-extra/clang-tidy/bugprone/RedundantBranchConditionCheck.cpp
M clang-tools-extra/clang-tidy/misc/MisleadingBidirectionalCheck.cpp
Log Message:
-----------
[clang-tidy][NFC] Fix clang-format (#192044)
Commit: 224c429e858f8171852990a6f7b2b3590eeaffb7
https://github.com/llvm/llvm-project/commit/224c429e858f8171852990a6f7b2b3590eeaffb7
Author: Sirui Mu <msrlancern at gmail.com>
Date: 2026-04-14 (Tue, 14 Apr 2026)
Changed paths:
A clang/docs/CIR/ABILowering.md
A clang/docs/CIR/CleanupAndEHDesign.md
A clang/docs/CIR/CodeDuplication.rst
A clang/docs/CIR/_raw/PostProcessCIRDocs.py
A clang/docs/CIR/index.rst
M clang/docs/CMakeLists.txt
R clang/docs/ClangIRABILowering.md
R clang/docs/ClangIRCleanupAndEHDesign.md
R clang/docs/ClangIRCodeDuplication.rst
M clang/docs/conf.py
M clang/docs/index.rst
M clang/include/clang/CIR/Dialect/CMakeLists.txt
M clang/include/clang/CIR/Dialect/IR/CIRAttrs.td
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/include/clang/CIR/Dialect/IR/CIRTypes.td
M clang/include/clang/CIR/Dialect/IR/CMakeLists.txt
Log Message:
-----------
[clang][CIR][doc] Add auto-generated ClangIR documentation (#190354)
ClangIR has a collection of documentation pages that we want to upstream
as part of the main clang documentation. These pages are originally
available at https://clangir.org/, maintained in the [incubator
repository](https://github.com/llvm/clangir) which has been archived a
few months ago.
This patch makes a first step towards the upstreaming of ClangIR
documentation. The pages included in this patch are those automatically
generated from MLIR TableGen. Specifically, this patch makes the
following changes to the main clang documentation tree:
- It adds a new subdirectory `CIR` under `clang/docs` to hold all
ClangIR documentation. There are already 3 ClangIR design documents put
under `clang/docs`, and this patch moves all of them to this new
subdirectory.
- It touches the necessary CMake files and Python scripts to:
- Generate ClangIR language reference automatically from MLIR TableGen
when building the clang documentation with `CLANG_ENABLE_CIR=ON`.
- Incorporate these automatically generated documents (if any) into the
main clang documentation build tree.
Commit: d8c95e6ea4fbd6526641b87353bb31ce439afe8c
https://github.com/llvm/llvm-project/commit/d8c95e6ea4fbd6526641b87353bb31ce439afe8c
Author: Jeff Bailey <jbailey at raspberryginger.com>
Date: 2026-04-14 (Tue, 14 Apr 2026)
Changed paths:
M libc/include/CMakeLists.txt
M libc/include/llvm-libc-types/CMakeLists.txt
A libc/include/llvm-libc-types/mcontext_t.h
A libc/include/llvm-libc-types/ucontext_t.h
A libc/include/llvm-libc-types/x86_64/mcontext_t.h
A libc/include/llvm-libc-types/x86_64/ucontext_t.h
A libc/include/ucontext.h.def
A libc/include/ucontext.yaml
Log Message:
-----------
[libc] Add ucontext types and headers (#191789)
Added mcontext_t and ucontext_t types for x86_64 Linux, and the
ucontext.h header definition. Used a dispatcher pattern for mcontext_t
and ucontext_t to support future architecture ports, mirroring the
pattern used in FPUtil.
Definitions are based on the Linux kernel ABI for x86_64.
Co-authored-by: Pavel Labath <pavel at labath.sk>
Commit: be1f7941b851427be01abac112057a50f8d333d2
https://github.com/llvm/llvm-project/commit/be1f7941b851427be01abac112057a50f8d333d2
Author: Erich Keane <ekeane at nvidia.com>
Date: 2026-04-14 (Tue, 14 Apr 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenCall.cpp
M clang/lib/CIR/CodeGen/CIRGenClass.cpp
M clang/lib/CIR/CodeGen/CIRGenExprAggregate.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
M clang/lib/CIR/CodeGen/CIRGenTypes.h
A clang/test/CIR/CodeGen/inherited-ctors.cpp
Log Message:
-----------
[CIR] Inheriting Constructor/inheriting ctor inlining lowering (#191467)
In cases with inheritance/vertual tables/etc, we need to generate a
series of constructors to delegate to. There are a handful slightly
different cases where we need to generate these/generate calls to these,
so this patch does that lowering.
The test check-lines are a bit confusing thanks to the ordering
differences between declarations. However the LLVM/OGCG lines are copy
pasted (plus minor attribute differences), with the exception of the
call to a delegated constructor.
One thing of note here: There is a difference in behavior with the
delegated constructor, which is called out in the test in a comment.
Classic codegen has a bug where it correctly creates the declaration
without arguments (since this constructor is only for initializing the
vtable pointers, arguments aren't necessary). However, when
classic-codegen creates the call, it doesn't omit them.
This isn't a problem there, however in CIR, this causes us to fail the
verifier, so this fixes that in CIR, but leaves it alone in OGCG.
Commit: ae2e4768f9bdcbb2c33906708a0ab6e2a7059734
https://github.com/llvm/llvm-project/commit/ae2e4768f9bdcbb2c33906708a0ab6e2a7059734
Author: Matheus Izvekov <mizvekov at gmail.com>
Date: 2026-04-14 (Tue, 14 Apr 2026)
Changed paths:
M clang/include/clang/APINotes/Types.h
M clang/include/clang/AST/ASTConcept.h
M clang/include/clang/AST/Decl.h
M clang/include/clang/AST/TemplateName.h
M clang/include/clang/AST/TypeBase.h
M clang/include/clang/Basic/Diagnostic.h
A clang/include/clang/Basic/OptionalUnsigned.h
M clang/include/clang/Basic/Specifiers.h
R clang/include/clang/Basic/UnsignedOrNone.h
M clang/lib/APINotes/APINotesTypes.cpp
M clang/lib/AST/Type.cpp
M clang/lib/Sema/Sema.cpp
M clang/lib/Sema/SemaExpr.cpp
M clang/lib/Sema/SemaExprObjC.cpp
M clang/lib/Sema/SemaType.cpp
Log Message:
-----------
[clang] NFC: Refactor UnsignedOrNone into OptionalUnsigned<T> with enum support (#191828)
This kind optional is simpler to use when it needs to be represented in
a bitfield, because it has an `unsigned` integer representation which
avoids overflows. This applies to enums as well.
This also adds a single use of this new functionality, migrating users
of `std::optional<NullabilityKind>`
This optional used to be represented as two members in a bitfield, and
this simplifies things down to one.
Commit: 91ebd4ac4ac4b11653a26b3a04af5b94ccda7e4c
https://github.com/llvm/llvm-project/commit/91ebd4ac4ac4b11653a26b3a04af5b94ccda7e4c
Author: Matheus Izvekov <mizvekov at gmail.com>
Date: 2026-04-14 (Tue, 14 Apr 2026)
Changed paths:
M clang/lib/Sema/SemaAvailability.cpp
M clang/lib/Sema/SemaCXXScopeSpec.cpp
M clang/lib/Sema/SemaTemplate.cpp
M clang/test/APINotes/templates.cpp
M clang/test/AST/HLSL/StructuredBuffers-AST.hlsl
M clang/test/AST/HLSL/TypedBuffers-AST.hlsl
M clang/test/AST/HLSL/ast-dump-SpirvType.hlsl
M clang/test/AST/HLSL/matrix-alias.hlsl
M clang/test/AST/HLSL/vector-alias.hlsl
M clang/test/AST/ast-dump-decl-context-json.cpp
M clang/test/AST/ast-dump-decl.cpp
M clang/test/AST/ast-dump-invalid.cpp
M clang/test/AST/ast-dump-openmp-begin-declare-variant_namespace_1.cpp
M clang/test/AST/ast-dump-openmp-begin-declare-variant_reference.cpp
M clang/test/AST/ast-dump-openmp-begin-declare-variant_template_3.cpp
M clang/test/AST/ast-dump-template-decls-json.cpp
M clang/test/AST/ast-dump-template-decls.cpp
M clang/test/AST/ast-dump-template-json-win32-mangler-crash.cpp
M clang/test/AST/ast-dump-templates.cpp
M clang/test/AST/float16.cpp
M clang/test/AST/new-unknown-type.cpp
M clang/test/Import/builtin-template/test.cpp
M clang/test/Import/enum/test.cpp
M clang/test/Import/namespace/test.cpp
M clang/test/Import/template-specialization/test.cpp
M clang/test/Modules/cxx-templates.cpp
M clang/test/ParserHLSL/hlsl_resource_class_attr.hlsl
M clang/test/SemaTemplate/make_integer_seq.cpp
Log Message:
-----------
[clang] fix some places where used decls were not marked as referenced (#191848)
Fixes some entities not being marked as referenced despite being used in
source code.
Also ties diagnostic-of-use to such references, because I don't think
there is a reason to have one without the other, even though I can't
think of a diagnosable entity which was not already covered before.
Commit: 4c7c3eaf3289845208942a10f8f7494880f93197
https://github.com/llvm/llvm-project/commit/4c7c3eaf3289845208942a10f8f7494880f93197
Author: Fabio D'Urso <fdurso at google.com>
Date: 2026-04-14 (Tue, 14 Apr 2026)
Changed paths:
M compiler-rt/lib/scudo/standalone/wrappers_c.cpp
Log Message:
-----------
[scudo] Do not define some entrypoints on Fuchsia (#191826)
These entrypoints were defined separately in wrappers_c_bionic.cpp
(which Fuchsia did not include in the build) before #190857 and,
therefore, were not exposed to Fuchsia's Scudo clients.
With #190857, they have been merged into the main wrappers_c.cpp file,
removing this separation.
This commit makes them conditionally-defined to not be building for
Fuchsia, to restore the pre-#190857 ABI.
Commit: 14ee89214c437495ef35419534bd657b2ddae768
https://github.com/llvm/llvm-project/commit/14ee89214c437495ef35419534bd657b2ddae768
Author: Alex Duran <alejandro.duran at intel.com>
Date: 2026-04-14 (Tue, 14 Apr 2026)
Changed paths:
M offload/test/offloading/interop-print.c
Log Message:
-----------
[OFFLOAD] Fix interop-print test commands (#191969)
Using %libomptarget-run-generic will fail or run an incorrect binary if
the previous %libomptarget-compile becames ignored because there's no
such device. Switching to use %libomptarget-compile-and-run-* which
doesn't have this issue.
Fixes post-merge issue of #191901
Commit: 44926b35d3160199ea4a60a34c3dcdb6837aa9ec
https://github.com/llvm/llvm-project/commit/44926b35d3160199ea4a60a34c3dcdb6837aa9ec
Author: Pavel Labath <pavel at labath.sk>
Date: 2026-04-14 (Tue, 14 Apr 2026)
Changed paths:
M llvm/include/llvm/ObjectYAML/DWARFYAML.h
M llvm/lib/ObjectYAML/DWARFEmitter.cpp
M llvm/lib/ObjectYAML/DWARFYAML.cpp
M llvm/test/tools/yaml2obj/ELF/DWARF/debug-line-v5.yaml
Log Message:
-----------
[DWARFYAML] Add support for v5 debug_line entry formats (#191358)
This lets us specify the *format* of the directory and file name
entries, but not the entries themselves.
Commit: 16f793876e0768f6e322918d1cd99f4d85a2e30d
https://github.com/llvm/llvm-project/commit/16f793876e0768f6e322918d1cd99f4d85a2e30d
Author: Alexandre Perez <alexandreperez at meta.com>
Date: 2026-04-14 (Tue, 14 Apr 2026)
Changed paths:
M lldb/source/Target/StackFrameList.cpp
M lldb/test/API/functionalities/scripted_frame_provider/TestScriptedFrameProvider.py
Log Message:
-----------
[lldb] Fix synthetic frame identity loss during incremental fetches (#191903)
When `SyntheticStackFrameList::FetchFramesUpTo` is called incrementally,
PC-less synthetic frames can end up with identical `StackID` values.
This happens because `num_synthetic_frames` is reset to zero on each
call, handing out duplicate call frame addresses. Since PC-less frames
all share `LLDB_INVALID_ADDRESS` as their PC, the `StackID` equality
check cannot distinguish them, and `ExecutionContextRef` resolves the
wrong frame.
The fix counts existing synthetic frames in `m_frames` before starting
the fetch loop so new frames receive unique call frame addresses.
Commit: 03f6faa2c35d48d1a403c31d1587050aa168304b
https://github.com/llvm/llvm-project/commit/03f6faa2c35d48d1a403c31d1587050aa168304b
Author: Graham Hunter <graham.hunter at arm.com>
Date: 2026-04-14 (Tue, 14 Apr 2026)
Changed paths:
M llvm/test/Analysis/CostModel/AArch64/masked_ldst_vls.ll
Log Message:
-----------
[NFC][AArch64][TTI] Autogenerate masked_ldst_vls check lines (#192048)
Precommit before changing the cost model.
Commit: 56ce7ede7d290758bc00dd8596f65639d1c3544f
https://github.com/llvm/llvm-project/commit/56ce7ede7d290758bc00dd8596f65639d1c3544f
Author: Sander de Smalen <sander.desmalen at arm.com>
Date: 2026-04-14 (Tue, 14 Apr 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp
Log Message:
-----------
[AArch64] Fix strict weak ordering violation in regalloc hints sort. (#192055)
This fixes an error with expensive checks after landing #190139.
The issue was:
Error: comparison doesn't meet irreflexive requirements, assert(!(a <
a)).
because it could have previously returned 'true' in the ordering
function if registers A and B were equal.
Also made NFC change to rename 'HandleMatchCmpPredicateHint' ->
'HandleDestructivePredicateHint' (that was missed in the review).
Commit: 66d78d00e517f75b4011ce669d1319289876bb7b
https://github.com/llvm/llvm-project/commit/66d78d00e517f75b4011ce669d1319289876bb7b
Author: zhijian lin <zhijian at ca.ibm.com>
Date: 2026-04-14 (Tue, 14 Apr 2026)
Changed paths:
M llvm/lib/Target/PowerPC/PPCISelLowering.cpp
M llvm/test/CodeGen/PowerPC/bit_floor.ll
Log Message:
-----------
[PowerPC] fix Inefficient std::bit_floor(x) (#183361)
Fix Inefficient asm of std::bit_floor(x) for powerpc.
Commit: c7903ce8ae3213e2f406432ce9c4ac73f2cec209
https://github.com/llvm/llvm-project/commit/c7903ce8ae3213e2f406432ce9c4ac73f2cec209
Author: Brian Cain <brian.cain at oss.qualcomm.com>
Date: 2026-04-14 (Tue, 14 Apr 2026)
Changed paths:
M clang/lib/Driver/ToolChain.cpp
M clang/test/Driver/fsanitize-cfi.c
M llvm/lib/Transforms/IPO/LowerTypeTests.cpp
M llvm/test/Transforms/LowerTypeTests/function-weak.ll
M llvm/test/Transforms/LowerTypeTests/function.ll
Log Message:
-----------
[Hexagon] Add CFI-ICall sanitizer support (#191754)
Enable -fsanitize=cfi-icall for Hexagon targets:
- Add Hexagon to the CFI-ICall allow-list in the Clang driver.
- Add Hexagon jump table support in LowerTypeTests: 4-byte entries using
the `jump` instruction, and route Hexagon through the native function
bit-set builder.
Commit: 20edc8496df3b2e5fc08df89c6ca7b77f5e2aaf8
https://github.com/llvm/llvm-project/commit/20edc8496df3b2e5fc08df89c6ca7b77f5e2aaf8
Author: Brian Cain <brian.cain at oss.qualcomm.com>
Date: 2026-04-14 (Tue, 14 Apr 2026)
Changed paths:
M compiler-rt/lib/tysan/tysan.cpp
Log Message:
-----------
[compiler-rt][TySan] Use pointer-width types for shadow memory ops (#191602)
The TySan runtime used uint64_t/int64_t casts for shadow memory pointer
arithmetic and interior-byte marker values. These are incorrect on
32-bit targets where pointers are 4 bytes: the shadow entries are
pointer-sized, so the offsets and marker values must also be
pointer-sized.
Replace uint64_t/int64_t with uptr/sptr (sanitizer_common's
pointer-width typedefs) throughout SetShadowType, GetNotAllBadTD,
GetNotAllUnkTD, and __tysan_instrument_mem_inst. This is a no-op on
64-bit targets (where uptr == uint64_t) and fixes shadow corruption on
32-bit targets.
Commit: 4f5e8792a4fb5147c4e5c97fa75a89e1d1f6b682
https://github.com/llvm/llvm-project/commit/4f5e8792a4fb5147c4e5c97fa75a89e1d1f6b682
Author: Brian Cain <brian.cain at oss.qualcomm.com>
Date: 2026-04-14 (Tue, 14 Apr 2026)
Changed paths:
M clang/lib/Driver/ToolChains/Linux.cpp
M clang/test/Driver/sanitizer-ld.c
Log Message:
-----------
[clang][Driver] Enable -fsanitize=type for Hexagon Linux (#191604)
Allow the TypeSanitizer to be used on Hexagon Linux targets.
Commit: b3a508675ca39eca980c2f5a438004d7e7f233a8
https://github.com/llvm/llvm-project/commit/b3a508675ca39eca980c2f5a438004d7e7f233a8
Author: Amina Chabane <amina.chabane at arm.com>
Date: 2026-04-14 (Tue, 14 Apr 2026)
Changed paths:
A bolt/test/AArch64/tail-duplication-cache.s
A bolt/test/AArch64/tail-duplication-pass.s
M bolt/test/X86/tail-duplication-pass.s
Log Message:
-----------
[BOLT][AArch64] Extend test coverage for TailDuplication in AArch64 (#191453)
Adds tests for tail duplication with modes aggressive/cache/moderate for
AArch64. Tests are based on respective X86 tests.
Fix up an incorrect comment on X86/tail-duplication-pass.s.
Commit: 94bb1b0590f43b517f290053b74e72e38101aa9b
https://github.com/llvm/llvm-project/commit/94bb1b0590f43b517f290053b74e72e38101aa9b
Author: Graham Hunter <graham.hunter at arm.com>
Date: 2026-04-14 (Tue, 14 Apr 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/test/Analysis/CostModel/AArch64/masked_ldst.ll
M llvm/test/Analysis/CostModel/AArch64/masked_ldst_vls.ll
Log Message:
-----------
[AArch64][TTI] Increase cost for masked memory operations requiring splitting (#191417)
If we need to split the memory operation, we'll also need to split the
mask.
This has a performance benefit in some cases when the loop vectorizer is
asked to maximize bandwidth and ends up choosing a VF that's too high
when tail folding. The costs of splitting the masks are not accounted
for in the current model, so this is something of a brute-force approach
to avoiding the wider VFs.
Commit: 0037a636fde9d9a426a18e8963a5bab016187a6c
https://github.com/llvm/llvm-project/commit/0037a636fde9d9a426a18e8963a5bab016187a6c
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-04-14 (Tue, 14 Apr 2026)
Changed paths:
A llvm/test/Transforms/SLPVectorizer/X86/reduction-shl1-add-merge.ll
Log Message:
-----------
[SLP][NFC]Add extra test for add/shl transformation opportunity in reductions, NFC
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/192072
Commit: b6c9cbe69d96ac80c3ed42b09c19dddc15df464e
https://github.com/llvm/llvm-project/commit/b6c9cbe69d96ac80c3ed42b09c19dddc15df464e
Author: Nashe Mncube <nashe.mncube at arm.com>
Date: 2026-04-14 (Tue, 14 Apr 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64.td
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/lib/Target/AArch64/AArch64Processors.td
A llvm/lib/Target/AArch64/AArch64SchedC1Ultra.td
M llvm/lib/Target/AArch64/AArch64SchedPredNeoverse.td
M llvm/lib/Target/AArch64/AArch64SchedPredicates.td
A llvm/test/tools/llvm-mca/AArch64/Cortex/C1Ultra-basic-instructions.s
A llvm/test/tools/llvm-mca/AArch64/Cortex/C1Ultra-bf16-instructions.s
A llvm/test/tools/llvm-mca/AArch64/Cortex/C1Ultra-complxnum-instructions.s
A llvm/test/tools/llvm-mca/AArch64/Cortex/C1Ultra-flag-manipulation-instructions.s
A llvm/test/tools/llvm-mca/AArch64/Cortex/C1Ultra-forwarding.s
A llvm/test/tools/llvm-mca/AArch64/Cortex/C1Ultra-fp16fml-instructions.s
A llvm/test/tools/llvm-mca/AArch64/Cortex/C1Ultra-fptoint-instructions.s
A llvm/test/tools/llvm-mca/AArch64/Cortex/C1Ultra-i8mm-instructions.s
A llvm/test/tools/llvm-mca/AArch64/Cortex/C1Ultra-mte-instructions.s
A llvm/test/tools/llvm-mca/AArch64/Cortex/C1Ultra-neon-instructions.s
A llvm/test/tools/llvm-mca/AArch64/Cortex/C1Ultra-rcpc-immo-instructions.s
A llvm/test/tools/llvm-mca/AArch64/Cortex/C1Ultra-sve-instructions.s
A llvm/test/tools/llvm-mca/AArch64/Cortex/C1Ultra-writeback.s
A llvm/test/tools/llvm-mca/AArch64/Inputs/flag-manipulation-instructions.s
Log Message:
-----------
[AArch64] C1-Ultra Scheduling model (#182251)
This patch adds the C1-Ultra scheduling model. This model is largely
based on the Neoverse V3 scheduling model with appropriate changes made
based on information available in the software optimization guide for
this core.
https://developer.arm.com/documentation/111079/3-0
Commit: ff04d0d6cd5dbb21122cefc13a68afd51b65067a
https://github.com/llvm/llvm-project/commit/ff04d0d6cd5dbb21122cefc13a68afd51b65067a
Author: David Stuttard <david.stuttard at amd.com>
Date: 2026-04-14 (Tue, 14 Apr 2026)
Changed paths:
M llvm/utils/TableGen/DFAPacketizerEmitter.cpp
Log Message:
-----------
[TableGen] Fix the non-determinism in DFAPacketizerEmitter.cpp (#192037)
Sort the std::set ProcItinList by Record name, not the pointer address.
---------
Co-authored-by: Bao, Qiaojin (Fred) <Qiaojin.Bao at amd.com>
Commit: 1737a913ed015796c9ba843de6c410c727070022
https://github.com/llvm/llvm-project/commit/1737a913ed015796c9ba843de6c410c727070022
Author: Jan André Reuter <j.reuter at fz-juelich.de>
Date: 2026-04-14 (Tue, 14 Apr 2026)
Changed paths:
M openmp/runtime/test/ompt/misc/control_tool.c
Log Message:
-----------
[OpenMP][OMPT] Revert `control_tool.c` changes from #191429 (#192069)
On s390x, the changes to `control_tool.c` cause a different return
address to be returned from the call to `print_current_address(0)`. Due
to the strictness of the current address returned by this call, this
lead to a test failure.
Since the return values of `omp_control_tool` are checked in separate
tests already, revert the changes to ensure that the return address
stays at the expected value.
Signed-off-by: Jan André Reuter <j.reuter at fz-juelich.de>
Commit: be831e2a674397bea730c56d4a2c9ffd150a74c9
https://github.com/llvm/llvm-project/commit/be831e2a674397bea730c56d4a2c9ffd150a74c9
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-04-14 (Tue, 14 Apr 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/test/CodeGen/RISCV/rvv/vector-extract-last-active.ll
Log Message:
-----------
[TargetLowering] Prevent expandVectorFindLastActive from creating illegal vector types during vector op legalization. (#190914)
This code needs to create a step vector but we only have a mask vector
type. If the step vector is too large it might not be an MVT. This
causes the getSimpleVT() call for getTypeAction to fail. We can replace
that with the EVT version of getTypeAction, but we'll still fail trying
to legalize the vselect. The getOperationAction query will return Expand
for non-simple VTs. ExpandVSELECT will try to unroll the vselect which
will fail for scalable vectors. We could hack that to not unroll
scalable vectors, but that would be a hack.
To fix this, split the FIND_LAST_ACTIVE into two if the step vector
needs to be split. Those will recursively legalize and eventually arrive
at a size we can create a valid step vector for.
One existing test changes because it created an illegal type which
happened to still be an MVT. This allowed getOperationAction to return
Legal, even though the type isn't legal.
Fixes the assertion mentioned in #187458.
Assisted-by: Claude Sonnet 4.5
Commit: 8c77fed3eebf424682537c8f05b82485a0bf3e49
https://github.com/llvm/llvm-project/commit/8c77fed3eebf424682537c8f05b82485a0bf3e49
Author: Jonathan Schleifer <js at nil.im>
Date: 2026-04-14 (Tue, 14 Apr 2026)
Changed paths:
M llvm/include/llvm/TargetParser/Triple.h
M llvm/lib/TargetParser/Triple.cpp
Log Message:
-----------
Run clang-format on TargetParser/Triple.{cpp,h} (#192064)
It already got inconsistent because new changes require complying with
clang-format on CI, while everything old is not complying with it.
Commit: bbeae6932d653b8a71a3a985af0ccf97e13e2e08
https://github.com/llvm/llvm-project/commit/bbeae6932d653b8a71a3a985af0ccf97e13e2e08
Author: Eugene Epshteyn <eepshteyn at nvidia.com>
Date: 2026-04-14 (Tue, 14 Apr 2026)
Changed paths:
M flang/test/Lower/Intrinsics/verify.f90
M flang/test/Lower/io-char-array.f90
M flang/test/Lower/io-implied-do-fixes.f90
M flang/test/Lower/io-item-list.f90
M flang/test/Lower/io-statement-1.f90
Log Message:
-----------
[flang][NFC] Converted five tests from old lowering to new lowering (part 44) (#191926)
Tests converted from test/Lower/Intrinsics: verify.f90
Tests converted from test/Lower: io-char-array.f90,
io-implied-do-fixes.f90, io-item-list.f90, io-statement-1.f90
Commit: 61aebacee7487ab168d2cf6757697ae178762dd8
https://github.com/llvm/llvm-project/commit/61aebacee7487ab168d2cf6757697ae178762dd8
Author: Susan Tan (ス-ザン タン) <zujunt at nvidia.com>
Date: 2026-04-14 (Tue, 14 Apr 2026)
Changed paths:
M flang/lib/Optimizer/Transforms/FIRToMemRef.cpp
A flang/test/Transforms/FIRToMemRef/slice-projected.mlir
Log Message:
-----------
[flang][FIRToMemRef] Fix lowering of complex array component slices (z%re, z%im) (#191846)
fir.slice with a path component (z%re, z%im) was silently dropped by
FIRToMemRef. Since memref.reinterpret_cast cannot change element type,
layout must come from the projected box descriptor via
fir.box_dims/fir.box_elesize rather than the triplets. Only
complex-array projections are handled here —
sizeof(complex<T>)/sizeof(T) = 2 is always exact for divsi. Derived-type
component projections bail out to downstream FIR-to-LLVM lowering where
strides can be non-integer.
Commit: 2b49a90b82ec5cf753f1ebafddb9790660c1aaa9
https://github.com/llvm/llvm-project/commit/2b49a90b82ec5cf753f1ebafddb9790660c1aaa9
Author: David Rivera <davidriverg at gmail.com>
Date: 2026-04-14 (Tue, 14 Apr 2026)
Changed paths:
M clang/lib/CIR/Dialect/Transforms/LoweringPrepare.cpp
M clang/test/CIR/CodeGenCUDA/device-stub.cu
Log Message:
-----------
[CIR][CUDA] Handle CUDA module constructor and destructor emission. (#188673)
Commit: 034d4dcad6396d1241e8262e69871b8d61da7e4f
https://github.com/llvm/llvm-project/commit/034d4dcad6396d1241e8262e69871b8d61da7e4f
Author: Corentin Jabot <corentinjabot at gmail.com>
Date: 2026-04-14 (Tue, 14 Apr 2026)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/SemaChecking.cpp
A clang/test/SemaCXX/gh135694.cpp
Log Message:
-----------
[Clang] Diagnose invalid non-dependent calls in dependent contexts. (#190965)
We were bailing out from checking calls expressions in a dependent
context, but if the expression itself was not dependent it's never
checked again.
Fixes #135694
Commit: 530688456deef791dc294891e82d44ca4e6c307f
https://github.com/llvm/llvm-project/commit/530688456deef791dc294891e82d44ca4e6c307f
Author: Daniel Paoliello <danpao at microsoft.com>
Date: 2026-04-14 (Tue, 14 Apr 2026)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/CodeGenOptions.def
M clang/include/clang/Basic/CodeGenOptions.h
M clang/include/clang/Options/Options.td
M clang/lib/CodeGen/CodeGenModule.cpp
M clang/lib/Driver/ToolChains/Clang.cpp
A clang/test/CodeGen/cfguard-mechanism.c
M clang/test/Driver/cl-options.c
M llvm/docs/LangRef.rst
M llvm/include/llvm/Support/CodeGen.h
M llvm/include/llvm/Transforms/CFGuard.h
M llvm/lib/Passes/PassBuilder.cpp
M llvm/lib/Passes/PassRegistry.def
M llvm/lib/Target/AArch64/AArch64Arm64ECCallLowering.cpp
M llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
M llvm/lib/Target/ARM/ARMTargetMachine.cpp
M llvm/lib/Target/X86/X86CallingConv.td
M llvm/lib/Target/X86/X86CodeGenPassBuilder.cpp
M llvm/lib/Target/X86/X86RegisterInfo.cpp
M llvm/lib/Target/X86/X86TargetMachine.cpp
M llvm/lib/Transforms/CFGuard/CFGuard.cpp
M llvm/test/CodeGen/AArch64/cfguard-module-flag.ll
M llvm/test/CodeGen/ARM/cfguard-module-flag.ll
M llvm/test/CodeGen/X86/cfguard-module-flag.ll
A llvm/test/Linker/cfguard.ll
Log Message:
-----------
[win] Add a flag to control the Control Flow Guard mechanism on Windows (#176276)
Windows Control Flow Guard (CFG) has two different "mechanisms" or
"patterns":
* Dispatch: the caller calls into the CFG function, which both checks
the target callee and then calls it.
* Check: the caller calls the CFG function which only checks the target
callee and then must separately call the callee.
LLVM has followed MSVC's pattern for selecting the mechanism based on
the target architecture. These defaults in MSVC are based on tests for
performance: Dispatch produces a smaller code size, whereas Check is
more friendly to branch predictors.
It is possible, however, for a given workload, call pattern or target
CPU that someone may want to select a different mechanism to use for
their code.
This change adds a new Clang and CC1 flag to force a CFG mechanism:
`-fwin-cfg-mechanism`. This can be set to `automatic` (lets LLVM choose
a mechanism), `force-dispatch` or `force-check`.
Also adds the support for the equivalent MSVC flag
`/d2guardcfgdispatch`.
NOTE: Arm64EC only supports the check mechanism. It should be noted that
MSVC emits the "dispatch" name for the call checker (for legacy reasons)
but uses the check mechanism.
Commit: 4a37b03357a9c5a40be292818969523c666c3115
https://github.com/llvm/llvm-project/commit/4a37b03357a9c5a40be292818969523c666c3115
Author: Harry Ramsey <harryramseybusiness at gmail.com>
Date: 2026-04-14 (Tue, 14 Apr 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/test/Analysis/CostModel/AArch64/cttz.ll
M llvm/test/CodeGen/AArch64/cttz.ll
Log Message:
-----------
[AArch64][ISel] Add lowering for fixed-width `cttz` intrinsic (#190988)
This patch enables NEON to generate more efficient `cttz` intrinsics by
utilising `rbit` and `ctlz` instructions when they are legal.
# Alive Proof
https://alive2.llvm.org/ce/z/qgrT_7
```
define <8 x i8> @src_v8i8(<8 x i8> %a) {
#0:
%r = cttz <8 x i8> %a, 1
ret <8 x i8> %r
}
=>
define <8 x i8> @tgt_v8i8(<8 x i8> %a) {
#0:
%rbit = bitreverse <8 x i8> %a
%clz = ctlz <8 x i8> %rbit, 0
ret <8 x i8> %clz
}
Transformation seems to be correct!
----------------------------------------
define <16 x i8> @src_v16i8(<16 x i8> %a) {
#0:
%r = cttz <16 x i8> %a, 1
ret <16 x i8> %r
}
=>
define <16 x i8> @tgt_v16i8(<16 x i8> %a) {
#0:
%rbit = bitreverse <16 x i8> %a
%clz = ctlz <16 x i8> %rbit, 0
ret <16 x i8> %clz
}
Transformation seems to be correct!
```
Commit: 7b744a511e989df39f0a49f80528b0580348b863
https://github.com/llvm/llvm-project/commit/7b744a511e989df39f0a49f80528b0580348b863
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-04-14 (Tue, 14 Apr 2026)
Changed paths:
M mlir/lib/Dialect/MLProgram/Transforms/PipelineGlobalOps.cpp
M mlir/test/Dialect/MLProgram/pipeline-globals.mlir
Log Message:
-----------
[MLIR][MLProgram] Fix crash in mlprogram-pipeline-globals on unresolvable callees (#189244)
The `MLProgramPipelineGlobals` pass crashed with a null pointer dereference
when a `CallOpInterface` operation referred to a callee symbol that could not
be resolved in the IR (e.g. an external function defined outside the module).
Instead conservatively bail out when a callee symbol cannot be resolved,
causing the pass to (preserving all loads/stores). This is consistent with
how Value-based callees are handled.
Fixes #109649
Assisted-by: Claude Code
Commit: c47c3344dc01a86e34168623120820a29785a3d1
https://github.com/llvm/llvm-project/commit/c47c3344dc01a86e34168623120820a29785a3d1
Author: Keith Smiley <keithbsmiley at gmail.com>
Date: 2026-04-14 (Tue, 14 Apr 2026)
Changed paths:
M mlir/include/mlir/Dialect/AMDGPU/IR/AMDGPUEnums.h
Log Message:
-----------
[mlir][AMD] Add missing includes to AMDGPUEnums.h (NFC) (#191077)
This header assumed these had been imported
Commit: 3ba18a675bf8bbfc4d52427e895a518a5685f19b
https://github.com/llvm/llvm-project/commit/3ba18a675bf8bbfc4d52427e895a518a5685f19b
Author: Justin Fargnoli <jfargnoli at nvidia.com>
Date: 2026-04-14 (Tue, 14 Apr 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/LoopUnrollPass.cpp
M llvm/test/Transforms/LoopUnroll/debug.ll
Log Message:
-----------
[LoopUnroll] Fix misleading runtime unroll debug message (#190709)
Avoid the confusing `Runtime unrolling with count: 0` `LLVM_DEBUG`
statement.
Commit: 142d3c2a445365498e8e7d8a2926595ac0508615
https://github.com/llvm/llvm-project/commit/142d3c2a445365498e8e7d8a2926595ac0508615
Author: Chi-Chun, Chen <chichun.chen at hpe.com>
Date: 2026-04-14 (Tue, 14 Apr 2026)
Changed paths:
M llvm/include/llvm/Frontend/OpenMP/OMPIRBuilder.h
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
Log Message:
-----------
[NFC][OMPIRBuilder][OpenMP] Pass AffinityData by reference instead of… (#191863)
… value
Commit: 8a69fb096cb3f3f99ee9bf25247f4b0bc442ca84
https://github.com/llvm/llvm-project/commit/8a69fb096cb3f3f99ee9bf25247f4b0bc442ca84
Author: hanbeom <kese111 at gmail.com>
Date: 2026-04-15 (Wed, 15 Apr 2026)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp
M llvm/test/Transforms/InstCombine/add.ll
Log Message:
-----------
[InstCombine] Fold (X + C) + (Y & ~C) to X + (Y | C) (#191334)
Add an InstCombine fold for masked overwrite patterns where the add
constant matches the cleared bits in the mask:
(X + C) + (Y & ~C) -> X + (Y | C)
Since `Y & ~C` clears all bits set in C, adding C cannot generate carry
through those bits and is equivalent to setting them with `or`.
Proof: https://alive2.llvm.org/ce/z/277UFK
Fixed: https://github.com/llvm/llvm-project/issues/191171
Commit: 40a585e742ed6b28306d7511380079325ba1a003
https://github.com/llvm/llvm-project/commit/40a585e742ed6b28306d7511380079325ba1a003
Author: Jan Leyonberg <jan_sjodin at yahoo.com>
Date: 2026-04-14 (Tue, 14 Apr 2026)
Changed paths:
M clang/lib/Frontend/CompilerInvocation.cpp
A clang/test/CIR/Driver/clangir.c
Log Message:
-----------
[CIR] Disable CIR pipeline for LLVM IR inputs (#187729)
When -fclangir is passed and the input is LLVM IR (e.g. during the
backend phase of OpenMP offloading), the CIR frontend pipeline is not
applicable.
Co-authored-by: Claude Opus 4.6 <noreply at anthropic.com>
Commit: 934f795064ab201553945c59b13ce2ae543d4fcd
https://github.com/llvm/llvm-project/commit/934f795064ab201553945c59b13ce2ae543d4fcd
Author: Lucas Chollet <lucas.chollet at serenityos.org>
Date: 2026-04-14 (Tue, 14 Apr 2026)
Changed paths:
M clang/lib/Basic/Targets.cpp
M clang/lib/Basic/Targets/OSTargets.h
M clang/lib/Driver/CMakeLists.txt
M clang/lib/Driver/Driver.cpp
M clang/lib/Driver/ToolChain.cpp
A clang/lib/Driver/ToolChains/Serenity.cpp
A clang/lib/Driver/ToolChains/Serenity.h
M clang/lib/Lex/InitHeaderSearch.cpp
A clang/test/Driver/Inputs/resource_dir_with_per_target_subdir/lib/aarch64-unknown-serenity/clang_rt.crtbegin.o
A clang/test/Driver/Inputs/resource_dir_with_per_target_subdir/lib/aarch64-unknown-serenity/clang_rt.crtend.o
A clang/test/Driver/Inputs/resource_dir_with_per_target_subdir/lib/riscv64-unknown-serenity/clang_rt.crtbegin.o
A clang/test/Driver/Inputs/resource_dir_with_per_target_subdir/lib/riscv64-unknown-serenity/clang_rt.crtend.o
A clang/test/Driver/Inputs/resource_dir_with_per_target_subdir/lib/x86_64-unknown-serenity/clang_rt.crtbegin.o
A clang/test/Driver/Inputs/resource_dir_with_per_target_subdir/lib/x86_64-unknown-serenity/clang_rt.crtend.o
A clang/test/Driver/Inputs/serenity_tree/usr/include/c++/v1/.keep
A clang/test/Driver/Inputs/serenity_tree/usr/lib/crt0.o
A clang/test/Driver/serenity.cpp
A clang/test/Preprocessor/init-serenityos.c
Log Message:
-----------
[clang] Add support for SerenityOS (#187941)
Adds support for the $arch-unknown-serenity target to the Clang front
end. This makes the compiler look for libraries and headers in the right
places, and enables some security mitigations like stack-smashing
protection and position-independent code by default.
----
A first attempt at upstreaming this patch was made
[here](https://reviews.llvm.org/D154396). I hope I fixed everything
mentioned there.
I intentionally kept `/usr/local/` in the default lookup path. I
consider it the more practical option, and I’d prefer to have the patch
merged as is and revisit the FIXME later. If this is absolutely
unacceptable to the maintainers, I will happily drop it and keep it as a
local patch until we address the underlying issue.
@MaskRay, @brad0 as you already reviewed the original patch.
---------
Co-authored-by: Daniel Bertalan <dani at danielbertalan.dev>
Co-authored-by: kleines Filmröllchen <filmroellchen at serenityos.org>
Co-authored-by: Andrew Kaster <akaster at serenityos.org>
Co-authored-by: Dan Klishch <danilklishch at gmail.com>
Commit: b29bfa5e9b2b1cd395566759f5f0f27cb706fe94
https://github.com/llvm/llvm-project/commit/b29bfa5e9b2b1cd395566759f5f0f27cb706fe94
Author: Jeff Bailey <jbailey at raspberryginger.com>
Date: 2026-04-14 (Tue, 14 Apr 2026)
Changed paths:
M libc/include/llvm-libc-types/__futex_word.h
Log Message:
-----------
[libc][NFC] Fix GCC build in __futex_word.h (#192078)
Included __llvm-libc-common.h in __futex_word.h to fix a build failure
with GCC.
GCC in C++ mode does not recognize _Alignas without the mapping to
alignas provided in __llvm-libc-common.h.
The failure was introduced in commit 91c0fdfe1392.
Commit: ae1e3eb379cde6b5d2e31104b4dbbbcf42298f3e
https://github.com/llvm/llvm-project/commit/ae1e3eb379cde6b5d2e31104b4dbbbcf42298f3e
Author: Andrei Elovikov <andrei.elovikov at sifive.com>
Date: 2026-04-14 (Tue, 14 Apr 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPRecipeBuilder.h
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.h
A llvm/test/Transforms/LoopVectorize/AArch64/ordered-reduction-with-invariant-stores.ll
M llvm/test/Transforms/LoopVectorize/AArch64/predication_costs.ll
M llvm/test/Transforms/LoopVectorize/VPlan/vplan-print-after-all.ll
Log Message:
-----------
[NFCI][VPlan] Split initial mem-widening into a separate transformation (#182592)
Preparation change before implementing stride-multiversioning as a
VPlan-based transformation. Might help
https://github.com/llvm/llvm-project/pull/147297/ as well.
Commit: 1a233a8acf836744b1d547c74c27422a57100853
https://github.com/llvm/llvm-project/commit/1a233a8acf836744b1d547c74c27422a57100853
Author: German Gambon <ggambon at tesla.com>
Date: 2026-04-14 (Tue, 14 Apr 2026)
Changed paths:
M mlir/include/mlir/IR/BuiltinTypes.td
M mlir/test/Dialect/Quant/Bytecode/types.mlir
M mlir/test/Dialect/Quant/parse-uniform.mlir
Log Message:
-----------
[mlir][quant] Print actual quant storage type when signed (#187300)
Without the fix, bytecode serialization roundtrip breaks for types that
don't have custom bytecode serializers and contain quant types, since
the fallback mechanism prints the type and the quant printer coerces
signed to signless types. E.g. `!custom<!quant.uniform<ui8:f32, 0.1>>`
will print as `u8` when serializing and later be created as a signless
`i8` when deserializing.
Commit: d24d4b64e81ca3a2161772886a05a16ed8927080
https://github.com/llvm/llvm-project/commit/d24d4b64e81ca3a2161772886a05a16ed8927080
Author: Thurston Dang <thurston at google.com>
Date: 2026-04-14 (Tue, 14 Apr 2026)
Changed paths:
M compiler-rt/lib/sanitizer_common/tests/sanitizer_bitvector_test.cpp
Log Message:
-----------
[sanitizer] Add missing bitcast to sanitizer_bitvector_test.cpp (#192090)
Fixes buildbot report
(https://lab.llvm.org/buildbot/#/builders/66/builds/29379):
/home/b/sanitizer-x86_64-linux/build/llvm-project/compiler-rt/lib/sanitizer_common/tests/sanitizer_bitvector_test.cpp:64:29:
error: format specifies type 'unsigned long' but the argument has type
'uptr' (aka 'unsigned int') [-Werror,-Wformat]
64 | fprintf(stderr, "%lu ", idx);
| ~~~ ^~~
| %u
Commit: 472aa4e326be7f1ea7b182f2e55193474f22e6de
https://github.com/llvm/llvm-project/commit/472aa4e326be7f1ea7b182f2e55193474f22e6de
Author: adams381 <adams at nvidia.com>
Date: 2026-04-14 (Tue, 14 Apr 2026)
Changed paths:
M clang/lib/CIR/Dialect/IR/CIRTypes.cpp
M clang/unittests/CIR/CMakeLists.txt
A clang/unittests/CIR/UnionTypeSizeTest.cpp
Log Message:
-----------
[CIR] Fix union RecordType::getTypeSizeInBits to return bits (#191516)
RecordType::getTypeSizeInBits for unions was calling
dataLayout.getTypeSize (which returns bytes) instead of
dataLayout.getTypeSizeInBits. This returned a value 8x too
small. Also handle the empty-union case where
getLargestMember returns nullptr.
Commit: 2b77a527dcc60384c8d88ae6e583d16bfa2b472b
https://github.com/llvm/llvm-project/commit/2b77a527dcc60384c8d88ae6e583d16bfa2b472b
Author: adams381 <adams at nvidia.com>
Date: 2026-04-14 (Tue, 14 Apr 2026)
Changed paths:
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
M clang/test/CIR/CodeGenBuiltins/builtin-memchr.c
Log Message:
-----------
[CIR] Add noundef to memchr declaration and call sites (#191457)
The memchr LLVM declaration created by MemChrOp lowering had no
arg_attrs, so the lowered IR was missing `noundef` on all three
parameters. OGCG emits `noundef` on them.
Adds `noundef` to both the `@memchr` declaration and each
`call @memchr` instruction.
Made with [Cursor](https://cursor.com)
Commit: 516c4d97a50d413a6a0381bbcfa7892b08da07c2
https://github.com/llvm/llvm-project/commit/516c4d97a50d413a6a0381bbcfa7892b08da07c2
Author: Sergei Barannikov <barannikov88 at gmail.com>
Date: 2026-04-14 (Tue, 14 Apr 2026)
Changed paths:
M lldb/include/lldb/Target/RegisterContextUnwind.h
M lldb/source/Target/RegisterContextUnwind.cpp
Log Message:
-----------
[lldb] Replace remaining uses of `UnwindLogMsg()` with UNWIND_LOG macro (#192038)
This mostly replaces `"0x%" PRIx64` with `"{:x}"`, but also replaces
'%d' (used for register / scheme numbers and CFA offsets) and '%s' with
simple `{}`, removing the now redundant casts and calls to
`GetCString()` / `AsCString()`.
`UnwindLogMsg()` is no longer used and has been removed.
Commit: 9145467cba6b6ce352b62f8499bb5afb725ce325
https://github.com/llvm/llvm-project/commit/9145467cba6b6ce352b62f8499bb5afb725ce325
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-04-14 (Tue, 14 Apr 2026)
Changed paths:
M llvm/include/llvm/TargetParser/RISCVTargetParser.h
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVInstPrinter.cpp
M llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
M llvm/test/CodeGen/RISCV/rvv/mixed-float-bf16-arith.ll
Log Message:
-----------
[RISCV] Prevent emitting vsetvli with e32alt or e64alt. (#191960)
The e32alt and e64alt encodings for vtype are reserved.
Non-fp instructions ignore altfmt and we want to use that to avoid
vtype toggle when using load, store, slide, gather, etc. to manipulate
bf16 vectors. This is why we have a Demanded bit for AltFmt.
We need to make sure we don't keep the AltFmt set when we're changing
SEW to 32 or 64.
A new isValidVType function has been added to help catch illegal
vtype earlier.
Commit: 1e8bcec49ef757bc0ac5eb4b224a4439acdb69df
https://github.com/llvm/llvm-project/commit/1e8bcec49ef757bc0ac5eb4b224a4439acdb69df
Author: Bruno Cardoso Lopes <bruno.cardoso at gmail.com>
Date: 2026-04-14 (Tue, 14 Apr 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenBuiltin.cpp
A clang/test/CIR/CodeGen/builtin-verbose-trap.cpp
Log Message:
-----------
[CIR] Implement __builtin_verbose_trap (#191935)
Route BI__builtin_verbose_trap to the existing emitTrap() path so that
it no longer hits the NYI fallback. Debug info message attachment from
the string arguments is not yet implemented (tracked by
MissingFeatures::generateDebugInfo).
This is the single largest NYI category in libcxx testing, unblocking
~1,008 test failures.
Commit: 05c982a2fd9a07e3b2f314284742a084ba9ac6e7
https://github.com/llvm/llvm-project/commit/05c982a2fd9a07e3b2f314284742a084ba9ac6e7
Author: Shonie Caplan <94767648+shoniecaplan at users.noreply.github.com>
Date: 2026-04-15 (Wed, 15 Apr 2026)
Changed paths:
M llvm/lib/IR/Instruction.cpp
M llvm/test/Transforms/InstCombine/freeze.ll
Log Message:
-----------
[IR] treat nofpclass as a poison-generating return attribute (#192016)
- For: #191338
Failing nofpclass attribute will generate poison.
This change adds nofpclass attributes to
`hasPoisonGeneratingReturnAttributes`/`dropPoisonGeneratingReturnAttributes`.
Commit: 560004b2b1f83f05b7380e515199ca8f1fc6d5f3
https://github.com/llvm/llvm-project/commit/560004b2b1f83f05b7380e515199ca8f1fc6d5f3
Author: Raghu Maddhipatla <7686592+raghavendhra at users.noreply.github.com>
Date: 2026-04-14 (Tue, 14 Apr 2026)
Changed paths:
M flang/lib/Lower/OpenMP/ClauseProcessor.cpp
M flang/lib/Lower/OpenMP/ClauseProcessor.h
M flang/lib/Lower/OpenMP/OpenMP.cpp
R flang/test/Lower/OpenMP/Todo/omp-declarative-allocate-align.f90
R flang/test/Lower/OpenMP/Todo/omp-declarative-allocate.f90
A flang/test/Lower/OpenMP/omp-declarative-allocate-align.f90
A flang/test/Lower/OpenMP/omp-declarative-allocate.f90
M llvm/include/llvm/Frontend/OpenMP/OMPIRBuilder.h
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
M mlir/include/mlir/Dialect/OpenMP/OpenMPClauses.td
M mlir/include/mlir/Dialect/OpenMP/OpenMPOps.td
M mlir/include/mlir/Target/LLVMIR/LLVMTranslationDialectInterface.td
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
M mlir/test/Dialect/OpenMP/ops.mlir
A mlir/test/Target/LLVMIR/openmp-allocate-directive.mlir
Log Message:
-----------
[Flang] [OpenMP] [MLIR] Add lowering support for OMP ALLOCATE directives and its clauses (#187167)
This patch implementation is primarily focused on
- Lowering to LLVM IR, by generating appropriate kmpc_alloc() and kmpc_alligned_alloc() calls for variable(s) and before the end of scope generating kmpc_free() for the same variable(s).
- Also handled, usage of array variables in the OMP ALLOCATE directive.
- Define omp.allocate_free operation in MLIR and slight changes to existing MLIR definition of ALLOCATOR clause.
- Add test cases for variations of usage of OMP ALLOCATE directive and its clauses ALIGN and ALLOCATOR.
Commit: c1d6f7609e16d16864063c6d98feed1a9cdc3270
https://github.com/llvm/llvm-project/commit/c1d6f7609e16d16864063c6d98feed1a9cdc3270
Author: Nick Begg <nick at stunttruck.net>
Date: 2026-04-14 (Tue, 14 Apr 2026)
Changed paths:
M llvm/docs/CommandGuide/lit.rst
M llvm/utils/lit/lit/ProgressBar.py
M llvm/utils/lit/lit/cl_arguments.py
M llvm/utils/lit/lit/display.py
Log Message:
-----------
[lit] Add an option to lit which ratelimits progressbar output. (#186479)
Add a new option --min-output-interval, which ratelimits updates to the
progress bar.
When running Lit with the full curses progressbar, it updates both the
bar, and the status text below on every test completion. Running
check-llvm on my laptop runs about 44k tests and takes about 260 seconds
for a release build. Or about 171 tests/second on average.
Moreover, when ssh'd to another host, this generates quite a bit of
traffic. Using tcpdump, I measured the traffic for a run of check-llvm
and -clang. With all updates, its about 8.7 megabytes. With a rate limit
of 5 update/sec, this came down to 175 kilobytes. This can be
significant on slow/metered connections.
This patch adds an option to limit lit's output to once per a given
interval. This only affects the progressbar and status message below,
not any log messages above. It also does not affect anything when not
running with the full progressbar (eg outputting to a logfile).
---------
Co-authored-by: Nick Begg <neek78 at users.noreply.github.com>
Co-authored-by: Alexander Richardson <mail at alexrichardson.me>
Commit: 1bc571918422612d2ce4e3621955d94eca37aa24
https://github.com/llvm/llvm-project/commit/1bc571918422612d2ce4e3621955d94eca37aa24
Author: David Green <david.green at arm.com>
Date: 2026-04-14 (Tue, 14 Apr 2026)
Changed paths:
M llvm/test/Analysis/CostModel/AArch64/fptoi_sat.ll
A llvm/test/Analysis/CostModel/AArch64/sve-fptoi_sat.ll
Log Message:
-----------
[AArch64] Add additional cost coverage for SVE fptosi.sat and fptoui.sat. NFC (#192095)
Commit: a8f36ccb2a24ef4abcbff58b2f36ce2deacefd54
https://github.com/llvm/llvm-project/commit/a8f36ccb2a24ef4abcbff58b2f36ce2deacefd54
Author: Zachary Yedidia <zyedidia at gmail.com>
Date: 2026-04-14 (Tue, 14 Apr 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
Log Message:
-----------
[AArch64] Check Subtarget via STI in getInstSizeInBytes (#192089)
The InstSizes test (`llvm/unittests/Target/AArch64/InstSizes.cpp`)
destroys the Subtarget field early (`ST` created on the stack in
[`createInstrInfo`](https://github.com/llvm/llvm-project/blob/40a585e742ed6b28306d7511380079325ba1a003/llvm/unittests/Target/AArch64/InstSizes.cpp#L32)),
causing a use-after-free if it is used in `getInstSizeInBytes`. This
causes a failure when running the test with hwasan (reported by build
bot). To fix this, this PR switches to using `STI` instead of
`Subtarget` in `getInstSizeInBytes` for checking `isLFI`, which survives
for the lifetime of the test.
I think fixing the test itself (the root of the issue, as far as I can
tell) would be more involved. Perhaps I should open an issue for it
though?
I have tested the fix on an AArch64 machine with hwasan to confirm that
it resolves the issue.
Commit: 3e9449886bb2d4e0d5a07a424e3178cf409e08c2
https://github.com/llvm/llvm-project/commit/3e9449886bb2d4e0d5a07a424e3178cf409e08c2
Author: Nico Weber <thakis at chromium.org>
Date: 2026-04-14 (Tue, 14 Apr 2026)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/Target/AArch64/MCTargetDesc/BUILD.gn
Log Message:
-----------
[gn build] Port 3fe0bdfaa592 (#192096)
[gn build] Port 3fe0bdfaa592
Commit: 585a4a22e1ded03123a13823b1bed6790107dc59
https://github.com/llvm/llvm-project/commit/585a4a22e1ded03123a13823b1bed6790107dc59
Author: Nico Weber <thakis at chromium.org>
Date: 2026-04-14 (Tue, 14 Apr 2026)
Changed paths:
M llvm/utils/gn/secondary/clang/unittests/CIR/BUILD.gn
Log Message:
-----------
[gn build] Port 472aa4e326be (#192098)
[gn build] Port 472aa4e326be
Commit: 7b4c8215b4e4837c2371d984cbc924c905867d44
https://github.com/llvm/llvm-project/commit/7b4c8215b4e4837c2371d984cbc924c905867d44
Author: Nico Weber <thakis at chromium.org>
Date: 2026-04-14 (Tue, 14 Apr 2026)
Changed paths:
M llvm/utils/gn/secondary/llvm/unittests/ExecutionEngine/Orc/BUILD.gn
Log Message:
-----------
[gn build] Port a2bf43d6b18d (#192100)
[gn build] Port a2bf43d6b18d
Commit: 51822a6dd975c510694ade81d8f1fb47eee7bfa6
https://github.com/llvm/llvm-project/commit/51822a6dd975c510694ade81d8f1fb47eee7bfa6
Author: Nico Weber <thakis at chromium.org>
Date: 2026-04-14 (Tue, 14 Apr 2026)
Changed paths:
M llvm/utils/gn/secondary/clang/lib/ScalableStaticAnalysisFramework/Analyses/BUILD.gn
Log Message:
-----------
[gn build] Port fc12e59d1d8b (#192101)
[gn build] Port fc12e59d1d8b
Commit: 11f3a56938b9eba5e0ccabda2984cae4b052dfe7
https://github.com/llvm/llvm-project/commit/11f3a56938b9eba5e0ccabda2984cae4b052dfe7
Author: Sean Perry <perry at ca.ibm.com>
Date: 2026-04-14 (Tue, 14 Apr 2026)
Changed paths:
M clang/include/clang/Basic/HLSLIntrinsics.td
Log Message:
-----------
Use ascii for dashes (#191892)
Use the standard ascii character for the dashes.
Commit: 4326a54708ffe72a223c4fa831b5f4e6e10d8aa7
https://github.com/llvm/llvm-project/commit/4326a54708ffe72a223c4fa831b5f4e6e10d8aa7
Author: Antonio Frighetto <me at antoniofrighetto.com>
Date: 2026-04-14 (Tue, 14 Apr 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/GVN.cpp
Log Message:
-----------
[GVN] Clean up `reportMayClobberedLoad` to use the dependency instruction (NFC) (#192103)
Minor opportunity to clean `reportMayClobberedLoad` routine, which was
previously receiving the entire `MemDepResult` object, though only using
the dependency instruction.
Co-authored-by: Momchil Velikov <momchil.velikov at arm.com>
Commit: ce8251e60a367d8c65c74795b354dfaa4f387ec3
https://github.com/llvm/llvm-project/commit/ce8251e60a367d8c65c74795b354dfaa4f387ec3
Author: Nerixyz <nerixdev at outlook.de>
Date: 2026-04-14 (Tue, 14 Apr 2026)
Changed paths:
M lldb/cmake/modules/AddLLDB.cmake
M lldb/docs/CMakeLists.txt
A lldb/docs/_ext/build_include.py
A lldb/docs/_ext/lldb_setting.py
A lldb/docs/_static/lldb-setting.css
M lldb/docs/conf.py
M lldb/docs/index.rst
A lldb/docs/use/settings.md
A lldb/scripts/gen-property-docs-from-json.py
M lldb/source/Core/CMakeLists.txt
M lldb/source/Interpreter/CMakeLists.txt
M lldb/source/Plugins/DynamicLoader/Darwin-Kernel/CMakeLists.txt
M lldb/source/Plugins/JITLoader/GDB/CMakeLists.txt
M lldb/source/Plugins/Language/CPlusPlus/CMakeLists.txt
M lldb/source/Plugins/ObjectFile/PECOFF/CMakeLists.txt
M lldb/source/Plugins/Platform/Android/CMakeLists.txt
M lldb/source/Plugins/Platform/MacOSX/CMakeLists.txt
M lldb/source/Plugins/Platform/QemuUser/CMakeLists.txt
M lldb/source/Plugins/Platform/WebAssembly/CMakeLists.txt
M lldb/source/Plugins/Process/CMakeLists.txt
M lldb/source/Plugins/Process/FreeBSD-Kernel-Core/CMakeLists.txt
M lldb/source/Plugins/Process/MacOSX-Kernel/CMakeLists.txt
M lldb/source/Plugins/Process/gdb-remote/CMakeLists.txt
M lldb/source/Plugins/StructuredData/DarwinLog/CMakeLists.txt
M lldb/source/Plugins/SymbolFile/DWARF/CMakeLists.txt
M lldb/source/Plugins/SymbolFile/PDB/CMakeLists.txt
M lldb/source/Plugins/SymbolLocator/Debuginfod/CMakeLists.txt
M lldb/source/Plugins/Trace/CMakeLists.txt
M lldb/source/Plugins/Trace/intel-pt/CMakeLists.txt
M lldb/source/Target/CMakeLists.txt
Log Message:
-----------
[LLDB][Docs] List available settings (#168245)
This PR adds a documentation page that lists all available settings. The
page is automatically generated.
Having the settings listed in the online documentation makes it easier
to search for users. It also has the advantage of being indexed by
search engines.
To generate the docs, we first generate JSON out of the TableGen
definitions with `-dump-json`.
Once all properties are available as JSON, a Markdown file with the
merged documentation (`settings.md`) is generated. I chose Markdown over
RST, because some descriptions already use backticks, which would become
references in RST.
Currently, enum names/descriptions are not visible, because they're
defined in C++. In the future, these could be moved to TableGen as well.
Commit: 3f8fa457e218882505d322112058f0fa568885bd
https://github.com/llvm/llvm-project/commit/3f8fa457e218882505d322112058f0fa568885bd
Author: Nico Weber <thakis at chromium.org>
Date: 2026-04-14 (Tue, 14 Apr 2026)
Changed paths:
M clang/test/Driver/serenity.cpp
Log Message:
-----------
[clang] Attempt to unbreak clang/test/Driver/serenity.cpp on bots (#192105)
The c++/v1 paths aren't found on bots, so remove them for now until this
is analyzed.
Match on `-isysroot` to get SYSROOT var instead.
Also remove what looks like one unintentional SYSROOT: capture for
crt0.o.
Commit: 6d11ac44f27476b7cab311eb3cfb0ef30d6cd27a
https://github.com/llvm/llvm-project/commit/6d11ac44f27476b7cab311eb3cfb0ef30d6cd27a
Author: Nico Weber <thakis at chromium.org>
Date: 2026-04-14 (Tue, 14 Apr 2026)
Changed paths:
M llvm/utils/gn/secondary/clang/lib/Driver/BUILD.gn
Log Message:
-----------
[gn build] Port 934f795064ab (#192107)
Commit: 838bf51cc242dcfdbb5a82ada1aaedf84a70a22c
https://github.com/llvm/llvm-project/commit/838bf51cc242dcfdbb5a82ada1aaedf84a70a22c
Author: Paweł Bylica <pawel at hepcolgum.band>
Date: 2026-04-14 (Tue, 14 Apr 2026)
Changed paths:
M compiler-rt/lib/sanitizer_common/sanitizer_haiku.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_linux.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_mac.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_netbsd.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_posix.h
M compiler-rt/lib/sanitizer_common/sanitizer_solaris.cpp
Log Message:
-----------
[sanitizer] Make internal_close_range available on all POSIX platforms (#191971)
Make internal_close_range available on all POSIX platforms so callers
can use it without platform-specific #if guards. Platforms without
close_range return -1, letting callers fall back gracefully.
Currently only FreeBSD has a real implementation. A TODO is left for
adding Linux support (__NR_close_range, kernel 5.9+).
The Linux support will be added in
https://github.com/llvm/llvm-project/pull/191450.
Commit: 01a83d3405f3745f2da80ec797aa30b35dc5861a
https://github.com/llvm/llvm-project/commit/01a83d3405f3745f2da80ec797aa30b35dc5861a
Author: Björn Schäpers <bjoern at hazardy.de>
Date: 2026-04-14 (Tue, 14 Apr 2026)
Changed paths:
M clang/lib/Format/ContinuationIndenter.cpp
Log Message:
-----------
[clang-format][NFC] Remove superflous checks (#191872)
Doesn't change anything, must be a leftover now handled by some other
code.
Commit: 1c46118228527a406362952cade120f380190ef9
https://github.com/llvm/llvm-project/commit/1c46118228527a406362952cade120f380190ef9
Author: Sean Perry <perry at ca.ibm.com>
Date: 2026-04-14 (Tue, 14 Apr 2026)
Changed paths:
M clang/include/clang/Basic/FileManager.h
M clang/lib/Basic/Module.cpp
M clang/lib/Serialization/ASTReader.cpp
M clang/lib/Serialization/ModuleManager.cpp
Log Message:
-----------
Load AST files as binary on z/OS (#191840)
The ast files need to be loaded as binary on z/OS to avoid translation.
Add the `IsText=false` option to all of the relevant file open calls.
Commit: ae0c5dc04f44e4ab69f3eb3a5eb959478d44372e
https://github.com/llvm/llvm-project/commit/ae0c5dc04f44e4ab69f3eb3a5eb959478d44372e
Author: Sean Perry <perry at ca.ibm.com>
Date: 2026-04-14 (Tue, 14 Apr 2026)
Changed paths:
M clang/test/CodeGen/2006-01-23-FileScopeAsm.c
M clang/test/CodeGen/asm_incbin.c
Log Message:
-----------
Mark tests as unsupported on z/OS (#191843)
z/OS has a platform specific requirement to not allow asm statements at
file scope. These tests generate that message rather than the expected
IR. Mark the tests as unsupported on z/OS.
Commit: 9c94881fade218ffdc64407c04db8c963571366f
https://github.com/llvm/llvm-project/commit/9c94881fade218ffdc64407c04db8c963571366f
Author: Nico Weber <thakis at chromium.org>
Date: 2026-04-14 (Tue, 14 Apr 2026)
Changed paths:
M clang/test/Driver/serenity.cpp
Log Message:
-----------
[clang] Attempt to unbreak clang/test/Driver/serenity.cpp on bots more (#192113)
This snippet fails on (at least) this bot:
https://lab.llvm.org/buildbot/#/builders/10/builds/26512
Commit: a36e9d1d57b12de3674689a617ab7452ed43d9a2
https://github.com/llvm/llvm-project/commit/a36e9d1d57b12de3674689a617ab7452ed43d9a2
Author: adams381 <adams at nvidia.com>
Date: 2026-04-14 (Tue, 14 Apr 2026)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIRDialect.td
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/lib/CIR/CodeGen/CIRGenVTables.cpp
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
M clang/test/CIR/CodeGen/thunks.cpp
Log Message:
-----------
[CIR] Add musttail thunks and covariant return null-check (#191255)
Implement variadic thunk emission via musttail and null-check
pointer returns in covariant thunk adjustment, matching classic
codegen behavior.
Adds musttail UnitAttr to cir.call/cir.try_call with lowering
to LLVM::MustTail.
Made with [Cursor](https://cursor.com)
Commit: f62b1382ac3be3ec40ef31160bc63c5127b3a481
https://github.com/llvm/llvm-project/commit/f62b1382ac3be3ec40ef31160bc63c5127b3a481
Author: adams381 <adams at nvidia.com>
Date: 2026-04-14 (Tue, 14 Apr 2026)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIRTypes.td
M clang/lib/CIR/CodeGen/CIRGenTypes.cpp
M clang/test/CIR/CodeGen/bitint.c
M clang/test/CIR/IR/bitint.cir
Log Message:
-----------
[CIR] Raise IntType max bitwidth to match LLVM IR (#191499)
Follow-up to #188113 per @erichkeane's feedback about the 128-bit cap.
CIR's IntType was hard-limited to 128 bits, which meant any _BitInt
wider than that hit an errorNYI. LLVM IR goes up to 2^23 (about 8
million bits), and there are real tests/users at those sizes. This
raises CIR's limit to match and drops the guard that was working around
it.
Tests: added a _BitInt(256) global to bitint.c and a 1024-bit round-trip
to bitint.cir.
Made with [Cursor](https://cursor.com)
Commit: a3d643d575f7d9b63229246eba93283c8c8b1f57
https://github.com/llvm/llvm-project/commit/a3d643d575f7d9b63229246eba93283c8c8b1f57
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2026-04-14 (Tue, 14 Apr 2026)
Changed paths:
M flang/lib/Optimizer/CodeGen/CodeGen.cpp
M flang/test/Fir/CUDA/cuda-code-gen.mlir
Log Message:
-----------
[flang][cuda] Fix invalid address space in addressof op conversion (#192111)
The change in lowering order introduced in
https://github.com/llvm/llvm-project/pull/183268 exposed an issue when
converting addressof op pointing to globals with different address
space. Look at the fir::GlobalOp when it has not been converted.
Commit: 13d67bffb1cb6e5231453dba3416108e85b2d6bf
https://github.com/llvm/llvm-project/commit/13d67bffb1cb6e5231453dba3416108e85b2d6bf
Author: Alex Voicu <alexandru.voicu at amd.com>
Date: 2026-04-14 (Tue, 14 Apr 2026)
Changed paths:
M clang/test/CodeGen/amdgpu-builtin-is-invocable.c
M clang/test/CodeGen/amdgpu-builtin-processor-is.c
M clang/test/CodeGenCXX/dynamic-cast-address-space.cpp
M llvm/lib/TargetParser/TargetParser.cpp
Log Message:
-----------
[NFC][SPIRV] Re-factor feature map initialisation for AMDGCN flavoured SPIR-V (#192067)
AMDGCN flavoured SPIR-V must support the union of all AMDGCN features,
as we cannot early adjudicate on this or that feature's availability. We
were hand filling in the feature map, which was error prone and led to
constant grind as new features were added. This patch moves to a
programmatic approach where we iterate through all AMDGCN GPUs and
collect features, thus establishing the union. With this change AMDGCN
flavoured SPIR-V will automatically pick up new features as they come
along.
Commit: 6cf19c6b200804c0c453108e44617ca0c9a0679e
https://github.com/llvm/llvm-project/commit/6cf19c6b200804c0c453108e44617ca0c9a0679e
Author: Paul Kirth <paulkirth at google.com>
Date: 2026-04-14 (Tue, 14 Apr 2026)
Changed paths:
M clang/cmake/caches/Fuchsia-stage2-instrumented.cmake
M clang/cmake/caches/Fuchsia.cmake
Log Message:
-----------
[clang][cmake] Add check-clang-extra to bootstrap targets for Fuchsia (#192104)
Not having these prevents us from testing the clang-tool-extra targets
in our CI and multi stage builds.
Commit: 152592b346a8edddd4b6d6ac59494f81fdb7eb2c
https://github.com/llvm/llvm-project/commit/152592b346a8edddd4b6d6ac59494f81fdb7eb2c
Author: Zhen Wang <zhenw at nvidia.com>
Date: 2026-04-14 (Tue, 14 Apr 2026)
Changed paths:
M flang/lib/Semantics/definable.cpp
A flang/test/Semantics/cuf26.cuf
Log Message:
-----------
[flang][cuda] Allow host variables to be defined in device subprograms under -gpu=unified (#192118)
When `-gpu=unified` (or `-gpu=mem:unified`) is enabled, host variables
should be definable in device subprograms because HMM/ATS makes all host
memory accessible from the GPU.
The definability check in `WhyNotDefinableBase` was unconditionally
rejecting host variables in device contexts. This fix skips that check
when `CudaUnified` is enabled.
Commit: 214f2de6b61919ca76f7cb7769cd98031de25431
https://github.com/llvm/llvm-project/commit/214f2de6b61919ca76f7cb7769cd98031de25431
Author: Haojian Wu <hokein.wu at gmail.com>
Date: 2026-04-14 (Tue, 14 Apr 2026)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/SemaTemplateDeductionGuide.cpp
M clang/test/SemaCXX/cxx20-ctad-type-alias.cpp
Log Message:
-----------
[clang] Fix assertion crash in CTAD for alias templates with non-dependent type (#191885)
When building deduction guides, clang assumes that the return type of
the deduction guide would always be a dependent type
(`TemplateSpecializationType`), but this is not true for invalid case,
where the alias RHS is a non-dependent class template specialization, it
is represented as a `RecordType` instead.
Fixes #190517.
Commit: 4d33826d60acf6cc95a52b380954556a84c9cbb7
https://github.com/llvm/llvm-project/commit/4d33826d60acf6cc95a52b380954556a84c9cbb7
Author: Slava Zakharin <szakharin at nvidia.com>
Date: 2026-04-14 (Tue, 14 Apr 2026)
Changed paths:
M flang/lib/Optimizer/Transforms/LoopInvariantCodeMotion.cpp
M flang/test/Transforms/CUF/cuf-kernel-licm.fir
Log Message:
-----------
[flang] Fixed issues in nested LICM. (#192117)
First change is to check the hoisting safety for all nested
operations of the candidate. This prevents hoistings of
region operations as in the added test.
When hoisting operations from nested regions we have to
check every parent region for `canMoveOutOf`, otherwise,
illegal hoisting may happen. This second change is NFC,
because all operations that support `OperationMoveOpInterface`
currently also support `LoopLikeOpInterface` and their regions
are not considered for nested hoisting. Anyway, it is worth
fixing it.
Commit: 08932ddde177a7f9dacf5d34e209c48f3d52800e
https://github.com/llvm/llvm-project/commit/08932ddde177a7f9dacf5d34e209c48f3d52800e
Author: serge-sans-paille <sguelton at mozilla.com>
Date: 2026-04-14 (Tue, 14 Apr 2026)
Changed paths:
M clang-tools-extra/clang-tidy/modernize/UseStdBitCheck.cpp
M clang-tools-extra/clang-tidy/modernize/UseStdBitCheck.h
M clang-tools-extra/docs/clang-tidy/checks/modernize/use-std-bit.rst
M clang-tools-extra/test/clang-tidy/checkers/modernize/use-std-bit.cpp
Log Message:
-----------
[clang-tidy] Detect std::rot[lr] pattern within modernize.use-std-bit (#186324)
Basically turning `x << N | x >> (64 - N)` into `std::rotl(x, N)`.
Commit: 2fe82e377f890d11e5915526f97ef7dce8a2d1d4
https://github.com/llvm/llvm-project/commit/2fe82e377f890d11e5915526f97ef7dce8a2d1d4
Author: Stanley Gambarin <stanley.gambarin at intel.com>
Date: 2026-04-14 (Tue, 14 Apr 2026)
Changed paths:
M llvm/test/TableGen/GlobalISelEmitter/GlobalISelEmitter.td
M llvm/utils/TableGen/Common/GlobalISel/GlobalISelMatchTable.cpp
Log Message:
-----------
[GlobalISel] use constexpr LLT types when creating ISel data (#191574)
The GlobalISel uses a lookup table to map LLTs which is constructed
prior to initialization of extended LLT functionality, resulting in
ANY_SCALAR entries. During instruction selection, a hash-based
lookup is done on actual INTEGER/FLOAT LLTs. But hash values of
ANY_SCALAR do not match those of INTEGER/FLOAT, causing a failure.
Workaround is the use constexpr LLT, which encodes INTEGER/FLOAT LLT.
Assisted-by: Claude Opus 4.6
Commit: ce170c94dd41209a36b8eaf5af6ca9edd625ddd3
https://github.com/llvm/llvm-project/commit/ce170c94dd41209a36b8eaf5af6ca9edd625ddd3
Author: David Green <david.green at arm.com>
Date: 2026-04-14 (Tue, 14 Apr 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
Log Message:
-----------
[AArch64] Cleanup of fptosi costs. NFC (#192144)
This contains some minor formatting changes, along with moving some code
closer
to where it belongs - keeping fixed length costs together, moving a
WideTy
block before the definition and use of ConversionTbl.
Commit: 104b63b3705d672333294aa551e8381285030262
https://github.com/llvm/llvm-project/commit/104b63b3705d672333294aa551e8381285030262
Author: Bruno Cardoso Lopes <bruno.cardoso at gmail.com>
Date: 2026-04-14 (Tue, 14 Apr 2026)
Changed paths:
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
Log Message:
-----------
[CIR] Fix heap-use-after-free in IndirectBrOp lowering (#191949)
The previous code called op->getBlock()->eraseArgument(0) to remove a
block argument when the poison attribute was set (unreachable block with
no predecessors). This directly mutated the IR, freeing the
BlockArgument while the MLIR dialect conversion framework still held
references to it. When the framework later replayed changes in
applyRewrites(), it dereferenced the freed BlockArgument, causing a
heap-use-after-free detected by ASAN.
Found by running check-clang-cir under ASAN
(test: clang/test/CIR/CodeGen/label-values.c).
The fix removes the eraseArgument call entirely. The MLIR conversion
framework tracks block arguments and handles their lifecycle. A block
with no predecessors naturally produces no PHI node in LLVM IR, so
manual removal was unnecessary.
Additional cleanup:
- Use adaptor.getAddr() directly instead of creating an unnecessary
BitcastOp (CIR ptr already converts to LLVM ptr).
- Use adaptor.getSuccOperands() instead of op.getSuccOperands() to
ensure successor operands go through type conversion.
- Use replaceOpWithNewOp instead of separate create + replaceOp.
Commit: 8b054e8669d2f2eebe688392d2f01ea8ebb9677f
https://github.com/llvm/llvm-project/commit/8b054e8669d2f2eebe688392d2f01ea8ebb9677f
Author: khaki3 <47756807+khaki3 at users.noreply.github.com>
Date: 2026-04-14 (Tue, 14 Apr 2026)
Changed paths:
M flang/lib/Lower/ConvertVariable.cpp
A flang/test/Lower/OpenACC/acc-declare-use-associated.f90
Log Message:
-----------
[flang][OpenACC] Propagate acc.declare attribute to fir.global for USEd module variables (#192141)
When a module with `!$acc declare` is compiled separately from the
program that USEs it, `declareGlobal()` creates `fir.global` without the
`acc.declare` attribute. This causes implicit data mappings to override
device data that should already be present via `acc declare`.
The fix reads the symbol's `AccDeclare`/`AccCreate`/`AccCopyIn`/etc.
flags (already set from the `.mod` file by semantics) and attaches the
`acc.declare` attribute to the `fir.global`.
Commit: 8d734fdae5f55add3dcc67f6ad4ce8d6d8f7af69
https://github.com/llvm/llvm-project/commit/8d734fdae5f55add3dcc67f6ad4ce8d6d8f7af69
Author: Stefan Mada <smada at nvidia.com>
Date: 2026-04-14 (Tue, 14 Apr 2026)
Changed paths:
M llvm/lib/CodeGen/MachineFunction.cpp
Log Message:
-----------
Added better datalayout incompatible error message (#191862)
The existing datalayout incompatible error assert does not help with
debugging, as it does not print the datalayouts in question.
This change makes this failure give more useful information.
Commit: 3b4731fed7abbb91b6789ce6ebb597fbf441edbd
https://github.com/llvm/llvm-project/commit/3b4731fed7abbb91b6789ce6ebb597fbf441edbd
Author: Iñaki V Arrechea <inakiarrechea at google.com>
Date: 2026-04-14 (Tue, 14 Apr 2026)
Changed paths:
M llvm/include/llvm/Analysis/FunctionPropertiesAnalysis.h
M llvm/include/llvm/Analysis/InstCount.h
Log Message:
-----------
Make Passes Required - func-properties-stats and instcount (#192130)
These passes count different types of instructions and we want to see
them even though optnone is enabled
Commit: c24bb1cd59ff1418cfaeb521d4e7b7f5610ddba3
https://github.com/llvm/llvm-project/commit/c24bb1cd59ff1418cfaeb521d4e7b7f5610ddba3
Author: Paweł Bylica <pawel at hepcolgum.band>
Date: 2026-04-15 (Wed, 15 Apr 2026)
Changed paths:
M compiler-rt/lib/sanitizer_common/sanitizer_posix_libcdep.cpp
Log Message:
-----------
[sanitizer] Generalize FD closing in StartSubprocess (#192114)
Use internal_close_range with a fallback to the sysconf(_SC_OPEN_MAX)
loop. This removes the platform-specific #if and lets all platforms
benefit from close_range when supported.
Follow-up to #191971.
Commit: 18ab5209d7130ddb34fc58249b6e12cc8c5bb597
https://github.com/llvm/llvm-project/commit/18ab5209d7130ddb34fc58249b6e12cc8c5bb597
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-04-14 (Tue, 14 Apr 2026)
Changed paths:
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVMatInt.cpp
M llvm/test/CodeGen/RISCV/rv32p.ll
M llvm/test/CodeGen/RISCV/rv64p.ll
M llvm/test/MC/RISCV/rv32p-aliases-valid.s
M llvm/test/MC/RISCV/rv64p-aliases-valid.s
Log Message:
-----------
[RISCV][P-ext] Support plui.h/w in generateInstSeqImpl. (#192137)
There's some overlap in the pli/plui encodings. I've modified the code
to prefer pli.b over pli.h and to prefer pli.h over plui.h. This matches
what we do in the splat_vector path in RISCVISelDAGToDAG.
Commit: 5d7a143ec677353ba45e1233494a67fbd9e0bf90
https://github.com/llvm/llvm-project/commit/5d7a143ec677353ba45e1233494a67fbd9e0bf90
Author: Alex <filaka771 at gmail.com>
Date: 2026-04-15 (Wed, 15 Apr 2026)
Changed paths:
M clang/lib/StaticAnalyzer/Core/AnalyzerOptions.cpp
A clang/unittests/StaticAnalyzer/AnalyzerFormattingTest.cpp
M clang/unittests/StaticAnalyzer/CMakeLists.txt
Log Message:
-----------
[analyzer] Fix alignment of entries in -analyzer-help (#190570)
Fix a formatting bug in `AnalyzerOptions::printFormattedEntry` (used by
`clang -cc1 -print-analyzer-options`), which led to misalignment of a
checker description.
This commit ensures that `printFormattedEntry` inserts a newline in the
corner case when the length of the name of a checker is exactly equal to
`EntryWidth`. (In this situation the old code inserted a space between
the name and the description, so this description was not aligned with
the other descriptions.)
Additionally this commit also fixes the corner case where the pad before
the checker name (specified by `InitialPad`) is 0. Before the fix, due
to `llvm::raw_formatted_ostream::PadToColumn` logic, `InitialPad = 0`
still added one space character as padding before the checker name.
Fortunately `InitialPad = 0` was never used in the program, so this bug
was not visible to the user.
These changes are both tested by the freshly added unit tests.
Commit: 392f76ac68c0d2e0c0eb8aa1907329f5a94db29d
https://github.com/llvm/llvm-project/commit/392f76ac68c0d2e0c0eb8aa1907329f5a94db29d
Author: Slava Zakharin <szakharin at nvidia.com>
Date: 2026-04-14 (Tue, 14 Apr 2026)
Changed paths:
M flang/include/flang/Optimizer/Support/Utils.h
M flang/lib/Optimizer/Analysis/AliasAnalysis.cpp
M flang/lib/Optimizer/Support/Utils.cpp
M flang/lib/Optimizer/Transforms/LoopInvariantCodeMotion.cpp
A flang/test/Transforms/licm-allocmem-cufaloc.mlir
Log Message:
-----------
[flang] Recognize generic allocations in Flang LICM. (#191923)
Instead of matching particular operations like `fir.alloca`
we can use `MemoryEffectOpInterface` to figure out if a location
is a new allocation.
Commit: 18519f34650db7fc8e1885ac0293c1e9a5f1b071
https://github.com/llvm/llvm-project/commit/18519f34650db7fc8e1885ac0293c1e9a5f1b071
Author: Ashlyn <pale.auraaaa at gmail.com>
Date: 2026-04-14 (Tue, 14 Apr 2026)
Changed paths:
M lld/COFF/DriverUtils.cpp
M lld/test/COFF/subsystem.test
M llvm/test/tools/llvm-objcopy/COFF/subsystem.test
M llvm/tools/llvm-objcopy/ObjcopyOptions.cpp
Log Message:
-----------
[lld][llvm-objcopy] Enable Xbox subsystem for PE images. (#191779)
This patch enables selecting the Xbox subsystem (IMAGE_SUBSYSTEM_XBOX)
for PE images. Certain existing tools used in the Xbox homebrew scene
expect images to use the Xbox subsystem, so it's nice to be able to set
this within the LLVM toolchain instead of invoking yet another tool or
manually patching the binaries.
Commit: 282b2720fe1fd9a75f25e91ade6adaf1466c0869
https://github.com/llvm/llvm-project/commit/282b2720fe1fd9a75f25e91ade6adaf1466c0869
Author: Erich Keane <ekeane at nvidia.com>
Date: 2026-04-14 (Tue, 14 Apr 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenExpr.cpp
A clang/test/CIR/CodeGen/cast-cxx20.cpp
Log Message:
-----------
[CIR] Implement array-to-incomplete-array cast (#192138)
This is a noop cast that is allowed in some situations in C++20, and is
validated with one of the test suites. This patch adds a very defensive
NYI diagnostic to replace the other one, plus implements the array decay
case.
Commit: af9ebd272fdbf91e4b53c400db578266a7b23480
https://github.com/llvm/llvm-project/commit/af9ebd272fdbf91e4b53c400db578266a7b23480
Author: 4ast <alexei.starovoitov at gmail.com>
Date: 2026-04-14 (Tue, 14 Apr 2026)
Changed paths:
M llvm/lib/Target/BPF/BPFISelLowering.cpp
M llvm/lib/Target/BPF/BTFDebug.cpp
A llvm/test/CodeGen/BPF/BTF/array-no-dimension.ll
A llvm/test/CodeGen/BPF/BTF/char-utf.ll
M llvm/test/CodeGen/BPF/warn-call.ll
Log Message:
-----------
Fixes for compile rust code (#192134)
Signed-off-by: Alexei Starovoitov <ast at kernel.org>
Co-authored-by: Alexei Starovoitov <ast at kernel.org>
Commit: 8d0997fb84d6b3fd8818e2c81b812a0dfc4e0b8f
https://github.com/llvm/llvm-project/commit/8d0997fb84d6b3fd8818e2c81b812a0dfc4e0b8f
Author: Jason Molenda <jmolenda at apple.com>
Date: 2026-04-14 (Tue, 14 Apr 2026)
Changed paths:
M lldb/packages/Python/lldbsuite/test/lldbutil.py
Log Message:
-----------
[lldb][debugserver] Fix lldb testsuite routine parsing logs (#192157)
I changed how lldb and debugserver fetch binaries when attaching to a
process (only fetching the addresses of binaries, not the detailed
information) but a utility function was parsing the log file and
expected the detailed information in the initial response. Updated it to
expect detailed information in the initial response, or in the
subsequent query when the first response is addresses-only.
Commit: f09850a332cd161bca0a1218e4f66869bc8b1a28
https://github.com/llvm/llvm-project/commit/f09850a332cd161bca0a1218e4f66869bc8b1a28
Author: khaki3 <47756807+khaki3 at users.noreply.github.com>
Date: 2026-04-14 (Tue, 14 Apr 2026)
Changed paths:
M flang/lib/Optimizer/CodeGen/CodeGen.cpp
M flang/test/Fir/CUDA/cuda-code-gen.mlir
Log Message:
-----------
[flang][CodeGen] Fix address space mismatch for CUF globals in AddrOfOpConversion (#190408)
AddrOfOpConversion in CodeGen.cpp only handled `LLVM::GlobalOp` when
determining the address space for `llvm.mlir.addressof`. When the global
was still a `fir::GlobalOp` (not yet converted), it fell back to address
space 0, breaking CUF constant globals (addr_space 4) and AMDGPU targets
(global addr_space 1).
This extends the upstream fix (#192111, which only covered Constant) to
also handle Shared and Managed CUF data attributes, and returns
`std::nullopt` instead of 0 for non-CUF globals so the target's default
address space is preserved.
Commit: c9fd0dbbcd0b05153b2a2e20658f7c147fe42ccb
https://github.com/llvm/llvm-project/commit/c9fd0dbbcd0b05153b2a2e20658f7c147fe42ccb
Author: Alexandre Ganea <aganea at havenstudios.com>
Date: 2026-04-14 (Tue, 14 Apr 2026)
Changed paths:
M llvm/cmake/modules/LLVMExternalProjectUtils.cmake
M llvm/utils/release/build_llvm_release.bat
Log Message:
-----------
[CMake] Pass ZLIB_LIBRARY_* to runtimes bootstrap (#191555)
Runtimes external project (compiler-rt / combined runtimes) reconfigures
with an initial cache that did not propagate `ZLIB_LIBRARY_RELEASE`.
CMake 4.x `FindZLIB` may leave `ZLIB_LIBRARY` unset while finding
headers, leading to:
```
-- Could NOT find ZLIB (missing: ZLIB_LIBRARY) (found version "...")
```
and later when loading LLVM exports from the main build:
```
The link interface of target "LLVMSupport" contains: ZLIB::ZLIB
but the target was not found.
```
This was found by building the Windows installer with:
```
llvm\utils\release\build_llvm_release.bat --x64 --version 23.0.0 --skip-checkout --local-python
```
Commit: d8331bae70ca7ed9dc711718e6a0f49c97066887
https://github.com/llvm/llvm-project/commit/d8331bae70ca7ed9dc711718e6a0f49c97066887
Author: Elvis Wang <elvis.wang at sifive.com>
Date: 2026-04-15 (Wed, 15 Apr 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/test/Transforms/LoopVectorize/VPlan/AArch64/sve2-histcnt-vplan.ll
M llvm/test/Transforms/LoopVectorize/VPlan/PowerPC/vplan-force-tail-with-evl.ll
M llvm/test/Transforms/LoopVectorize/VPlan/X86/vplan-vp-intrinsics.ll
M llvm/test/Transforms/LoopVectorize/VPlan/conditional-scalar-assignment-vplan.ll
M llvm/test/Transforms/LoopVectorize/VPlan/early_exit_with_stores_vplan.ll
M llvm/test/Transforms/LoopVectorize/VPlan/first-order-recurrence-chains-vplan.ll
M llvm/test/Transforms/LoopVectorize/VPlan/first-order-recurrence-sink-replicate-region.ll
M llvm/test/Transforms/LoopVectorize/VPlan/icmp-uniforms.ll
M llvm/test/Transforms/LoopVectorize/VPlan/interleave-and-scalarize-only.ll
M llvm/test/Transforms/LoopVectorize/VPlan/phi-with-fastflags-vplan.ll
M llvm/test/Transforms/LoopVectorize/VPlan/uncountable-early-exit-vplan.ll
M llvm/test/Transforms/LoopVectorize/VPlan/vplan-iv-transforms.ll
M llvm/test/Transforms/LoopVectorize/VPlan/vplan-print-after-all.ll
M llvm/test/Transforms/LoopVectorize/VPlan/vplan-printing-before-execute.ll
M llvm/test/Transforms/LoopVectorize/VPlan/vplan-printing-metadata.ll
M llvm/test/Transforms/LoopVectorize/VPlan/vplan-printing-reductions.ll
M llvm/test/Transforms/LoopVectorize/VPlan/vplan-printing.ll
M llvm/test/Transforms/LoopVectorize/VPlan/vplan-sink-scalars-and-merge-vf1.ll
M llvm/test/Transforms/LoopVectorize/VPlan/vplan-sink-scalars-and-merge.ll
Log Message:
-----------
[LV][VPlan] Print VPlan after construction and initial optimizations. NFC (#187443)
This patch add a helper pass `printOptimizedVPlan` to print the plan at
the end of the VPlan construction and optimize pipeline.
This patch enables the opportunity that we can further clamp and attach
VF range after `VPlanTransforms::optimize` and not changing the test
printing (#172799).
Commit: 3a4d1c7e77cbb2138478b7ce1f2473d18bbb7d1d
https://github.com/llvm/llvm-project/commit/3a4d1c7e77cbb2138478b7ce1f2473d18bbb7d1d
Author: Jim Lin <jim at andestech.com>
Date: 2026-04-15 (Wed, 15 Apr 2026)
Changed paths:
M llvm/lib/Target/RISCV/GISel/RISCVInstructionSelector.cpp
M llvm/test/CodeGen/RISCV/GlobalISel/double-fcmp.ll
M llvm/test/CodeGen/RISCV/GlobalISel/float-fcmp.ll
Log Message:
-----------
[RISCV][GISel] Use a single FEQ for fcmp ord/uno x, x (#192022)
When both operands of an ORD/UNO compare are the same register,
the double-FEQ + AND sequence is redundant: a single FEQ x, x
gives the same result. Addresses the FIXME in selectFCmp.
Commit: 1a3934365c9b59d00f47db06202b34c62d4b1794
https://github.com/llvm/llvm-project/commit/1a3934365c9b59d00f47db06202b34c62d4b1794
Author: Shilei Tian <i at tianshilei.me>
Date: 2026-04-14 (Tue, 14 Apr 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPULowerExecSync.cpp
M llvm/lib/Target/AMDGPU/AMDGPULowerModuleLDSPass.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.h
A llvm/test/CodeGen/AMDGPU/lds-link-time-named-barrier.ll
A llvm/test/CodeGen/AMDGPU/lower-module-lds-link-time-classify.ll
A llvm/test/CodeGen/AMDGPU/lower-module-lds-link-time-global-scope.ll
A llvm/test/CodeGen/AMDGPU/lower-module-lds-link-time-internal-func.ll
A llvm/test/CodeGen/AMDGPU/lower-module-lds-link-time-internal-multi-user.ll
Log Message:
-----------
[AMDGPU] Add object linking support for LDS and named barrier lowering in the middle end (#191645)
This is the first patch in a series introducing object linking support
for AMDGPU.
This PR adds the `-amdgpu-enable-object-linking` flag to enable object
linking in the backend. It also updates the `AMDGPULowerModuleLDSPass`
and `AMDGPULowerExecSync` passes to support lowering LDS and named
barrier globals when object linking is enabled.
Commit: 348061d58dfe5e59027a0d6d51f916197cdd8d68
https://github.com/llvm/llvm-project/commit/348061d58dfe5e59027a0d6d51f916197cdd8d68
Author: Med Ismail Bennani <ismail at bennani.ma>
Date: 2026-04-14 (Tue, 14 Apr 2026)
Changed paths:
M lldb/include/lldb/Target/Process.h
M lldb/source/Target/Process.cpp
M lldb/source/Target/Thread.cpp
A lldb/test/API/functionalities/scripted_frame_provider/was_hit_deadlock/Makefile
A lldb/test/API/functionalities/scripted_frame_provider/was_hit_deadlock/TestWasHitWithFrameProviderDeadlock.py
A lldb/test/API/functionalities/scripted_frame_provider/was_hit_deadlock/bkpt_resolver.py
A lldb/test/API/functionalities/scripted_frame_provider/was_hit_deadlock/frame_provider.py
A lldb/test/API/functionalities/scripted_frame_provider/was_hit_deadlock/main.c
Log Message:
-----------
[lldb] Fix deadlock when scripted frame providers load on private state thread (#191913)
Frame providers are an overlay on top of the parent reality (the
unwinder stack). The private state thread (PST) manages the stop of that
parent reality, so the correct view for PST logic IS the parent --
providers should only be applied once the process has settled and
clients query the stopped state.
When a scripted breakpoint's `was_hit` callback calls
`EvaluateExpression` on the PST, `RunThreadPlan` spawns an override PST
(Thread B) and reassigns `m_current_private_state_thread_sp` to it. Two
threads then need to see parent frames:
- Thread B (override PST): processes stop events via
`HandlePrivateEvent` -> `ShouldStop` -> `GetStackFrameList`. If it loads
a provider, the provider's Python code can acquire locks held by Thread
A, causing a deadlock.
- Thread A (original PST): processes events inline via
`FindNextEventInternal` -> `DoOnRemoval` -> `GetStackFrameList`. After
the override is created, `CurrentThreadIsPrivateStateThread` no longer
recognizes Thread A (it checks against
`m_current_private_state_thread_sp`, which now points to Thread B).
The existing re-entrancy guard in `GetStackFrameList` (e1cd558) only
triggers when a provider is already active. In the deadlock scenario,
provider loading is being initiated for the first time, so the guard
does not trigger.
This patch introduces `PrivateStateThreadGuard`, an RAII guard that sets
a `thread_local` flag checked by `GetStackFrameList` to return parent
frames instead of loading providers. The guard is activated in two
places:
- `RunPrivateStateThread`: for override PSTs only (identified via a new
`is_override` flag on `PrivateStateThread`). The original PST does not
set the guard here, so normal stepping still sees provider-augmented
frames.
- `RunThreadPlan`: for the original PST, scoped to the event processing
window when an override has been spawned.
rdar://174679105
Signed-off-by: Med Ismail Bennani <ismail at bennani.ma>
Commit: 18f63d1375d00fa8cac9951340e2ca0f68b4b6fa
https://github.com/llvm/llvm-project/commit/18f63d1375d00fa8cac9951340e2ca0f68b4b6fa
Author: Wenju He <wenju.he at intel.com>
Date: 2026-04-15 (Wed, 15 Apr 2026)
Changed paths:
M .ci/compute_projects.py
M .ci/compute_projects_test.py
M .ci/monolithic-linux.sh
M .ci/monolithic-windows.sh
M libclc/README.md
M llvm/runtimes/CMakeLists.txt
Log Message:
-----------
[runtimes] Aggregate per-target runtime checks in top-level check-${runtime_name} (#191743)
When a per-target runtime build exports a
check-${runtime_name}-${target} proxy, make the top-level
check-${runtime_name} target depend on it, creating
check-${runtime_name} on demand (it may not exist).
This applies regardless of whether the runtime comes from the default
LLVM_ENABLE_RUNTIMES set or from a target-specific
RUNTIMES_<target>_LLVM_ENABLE_RUNTIMES override.
This allows a single `check-${runtime_name}` command to trigger all
per-target tests for that runtime.
Commit: 19d1b348f02f21fba5ca17bef5001d2a063ee430
https://github.com/llvm/llvm-project/commit/19d1b348f02f21fba5ca17bef5001d2a063ee430
Author: Wenju He <wenju.he at intel.com>
Date: 2026-04-15 (Wed, 15 Apr 2026)
Changed paths:
M libclc/CMakeLists.txt
Log Message:
-----------
[libclc][CMake][NFC] Delete dead code LLVM_PACKAGE_VERSION (#191943)
Use of LLVM_PACKAGE_VERSION in AddLibclc.cmake was dropped by e20ae16ce672.
Commit: c1fc739b5d6b731bf0fb4477d4605102407a933b
https://github.com/llvm/llvm-project/commit/c1fc739b5d6b731bf0fb4477d4605102407a933b
Author: Wenju He <wenju.he at intel.com>
Date: 2026-04-15 (Wed, 15 Apr 2026)
Changed paths:
M libclc/CMakeLists.txt
Log Message:
-----------
[libclc] Only add test folder when LLVM_INCLUDE_TESTS is ON (#191948)
Commit: 9f6f26f86cf1899402da83a9b35e0fab55fa2a4f
https://github.com/llvm/llvm-project/commit/9f6f26f86cf1899402da83a9b35e0fab55fa2a4f
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-04-15 (Wed, 15 Apr 2026)
Changed paths:
M llvm/lib/Transforms/Utils/LoopUtils.cpp
Log Message:
-----------
[LSR][IndVarSimplify] Update assertion message (#192168)
rewriteLoopExitValues is called by both LSR and IndVarSimplify. Update
the assertion message to match this reality rather than only mentioning
IndVarSimplify.
Commit: 480048253f117cff5e93bb5bbced94a6ef24adc6
https://github.com/llvm/llvm-project/commit/480048253f117cff5e93bb5bbced94a6ef24adc6
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-04-14 (Tue, 14 Apr 2026)
Changed paths:
M llvm/test/CodeGen/RISCV/rv64p.ll
Log Message:
-----------
[RISCV] Add test showing constant materialization using pli.h/pli.w+srli/slli. NFC (#192159)
Commit: c3650687e0b7317b686b9187d15d2c4c63e05f8b
https://github.com/llvm/llvm-project/commit/c3650687e0b7317b686b9187d15d2c4c63e05f8b
Author: Roy Shi <royitaqi at users.noreply.github.com>
Date: 2026-04-14 (Tue, 14 Apr 2026)
Changed paths:
M llvm/include/llvm/DebugInfo/GSYM/CallSiteInfo.h
M llvm/include/llvm/DebugInfo/GSYM/ExtractRanges.h
M llvm/include/llvm/DebugInfo/GSYM/FileEntry.h
M llvm/include/llvm/DebugInfo/GSYM/FileWriter.h
M llvm/include/llvm/DebugInfo/GSYM/FunctionInfo.h
A llvm/include/llvm/DebugInfo/GSYM/GlobalData.h
M llvm/include/llvm/DebugInfo/GSYM/GsymCreator.h
A llvm/include/llvm/DebugInfo/GSYM/GsymCreatorV1.h
A llvm/include/llvm/DebugInfo/GSYM/GsymCreatorV2.h
A llvm/include/llvm/DebugInfo/GSYM/GsymDataExtractor.h
M llvm/include/llvm/DebugInfo/GSYM/GsymReader.h
A llvm/include/llvm/DebugInfo/GSYM/GsymReaderV1.h
A llvm/include/llvm/DebugInfo/GSYM/GsymReaderV2.h
A llvm/include/llvm/DebugInfo/GSYM/GsymTypes.h
M llvm/include/llvm/DebugInfo/GSYM/Header.h
A llvm/include/llvm/DebugInfo/GSYM/HeaderV2.h
M llvm/include/llvm/DebugInfo/GSYM/InlineInfo.h
M llvm/include/llvm/DebugInfo/GSYM/LineTable.h
M llvm/include/llvm/DebugInfo/GSYM/MergedFunctionsInfo.h
M llvm/include/llvm/DebugInfo/GSYM/StringTable.h
M llvm/lib/DebugInfo/GSYM/CMakeLists.txt
M llvm/lib/DebugInfo/GSYM/CallSiteInfo.cpp
M llvm/lib/DebugInfo/GSYM/DwarfTransformer.cpp
M llvm/lib/DebugInfo/GSYM/ExtractRanges.cpp
M llvm/lib/DebugInfo/GSYM/FileWriter.cpp
M llvm/lib/DebugInfo/GSYM/FunctionInfo.cpp
A llvm/lib/DebugInfo/GSYM/GlobalData.cpp
M llvm/lib/DebugInfo/GSYM/GsymCreator.cpp
A llvm/lib/DebugInfo/GSYM/GsymCreatorV1.cpp
A llvm/lib/DebugInfo/GSYM/GsymCreatorV2.cpp
M llvm/lib/DebugInfo/GSYM/GsymReader.cpp
A llvm/lib/DebugInfo/GSYM/GsymReaderV1.cpp
A llvm/lib/DebugInfo/GSYM/GsymReaderV2.cpp
M llvm/lib/DebugInfo/GSYM/Header.cpp
A llvm/lib/DebugInfo/GSYM/HeaderV2.cpp
M llvm/lib/DebugInfo/GSYM/InlineInfo.cpp
M llvm/lib/DebugInfo/GSYM/LineTable.cpp
M llvm/lib/DebugInfo/GSYM/MergedFunctionsInfo.cpp
M llvm/lib/DebugInfo/Symbolize/Symbolize.cpp
M llvm/tools/llvm-gsymutil/Opts.td
M llvm/tools/llvm-gsymutil/llvm-gsymutil.cpp
M llvm/unittests/DebugInfo/GSYM/CMakeLists.txt
M llvm/unittests/DebugInfo/GSYM/GSYMTest.cpp
A llvm/unittests/DebugInfo/GSYM/GSYMV2Test.cpp
A llvm/unittests/DebugInfo/GSYM/GsymDataExtractorTest.cpp
Log Message:
-----------
Make GSYM 64 bit safe and add a new version 2 of the GSYM files (#190353)
# Motivation
GSYM files are approaching the need for 64 bit offsets in the GSYM
files. We also want to add more global data to GSYM files. Right now the
GSYM file format is:
```
Header
AddressOffsets
AddressInfoOffsets
FileTable
StringTable
FunctionInfos
```
The location of the `AddressOffsets`, `AddressInfoOffsets` and
`FileTable` are always immediately following the Header. The
`StringTable` is pointed to by the header and the header uses 32 bit
integers for the string table file offset and file size. The
`AddressInfoOffsets` are fixed at 32 bits as well. So with the current
format, we can't have any string or function info with an offset >= 4G.
# GSYM V2 design (64 bit safe and extensible)
This new design increments the GSYM version to 2 and we are adding a new
`GlobalInfoType` enum which allows us to specify the file offset and
file size of all of the things in the global data table to be 64 bit
safe. Everything is now in the global info data (listed below). The new
design is extensible: new global info types can be added in the future,
and the order that they appear in the file can be changed/optimized.
* UUID (optional)
* AddressOffsets table
* AddressInfoOffsets table
* File table
* String table
* FunctionInfo data
We are also adding a new `StringTableEncoding` enum so that new string
table encodings can be added in the future.
GSYM V2 files can be produced by using the new `--oputput-version=2`
option. For example:
```
llvm-gsymutil --convert my.dSYM -o my.gSYM --output-version=2
```
# Tests
**Unit tests**: Extended existing tests (`GSYMTests.cpp`) to cover both
v1 and v2. Added new V2 tests (`GSYMV2Tests.cpp`).
```
ninja DebugInfoGSYMTests SupportTests
unittests/DebugInfo/GSYM/DebugInfoGSYMTests
unittests/Support/SupportTests --gtest_filter='*DataExtractor*'
bin/llvm-lit \
../llvm-project/llvm/test/tools/llvm-gsymutil/X86/elf-dwarf.yaml \
../llvm-project/llvm/test/tools/llvm-gsymutil/X86/mach-dwarf.yaml
```
**Parity tests to V1 (manual)**:
* All tests were conducted on a very large DSYM (9.24 GB) and the GSYMs
generated from it (3.42~3.57 GB).
* All correctness tests were conducted on both little-endian and
big-endian machines.
* **Data parity (on-par)**: The new gsymutil [generates the exact same
GSYM v1 file as the baseline
gsymutil](https://gist.github.com/royitaqi/746c15ec22725cf89a1f5c6d9fb396aa),
both using a single thread.
* **Performance parity/improvement (on-par; v2 convert is 2.8x
faster)**:
* **Parse + lookup**: The new gsymutil is [2% (GSYM v1 file) and 3%
(GSYM v2 file) slower than the baseline
gsymutil](https://gist.github.com/royitaqi/9789b92d63ae74a806c776f32a33e4fb)
(1.56s vs. 1.52s).
* **Convert**: The new gsymutil is [on par (GSYM v1 file) and 2.8x
faster (GSYM v2 file) than the baseline
gsymutil](https://gist.github.com/royitaqi/17aa69408bc5a3416fae9e192b1dc1ce)
(102s vs. 288s).
* **Memory footprint parity (on-par)**:
* **Convert**: The new gsymutil uses the same amount of memory as the
base line gsymutil (13 GB when converting a 2.52 GB DSYM; 42 GB when
converting a 9.24 GB DSYM) since the memory peak is in `finalize()`
which is before `encode()`.
* **Segment correctness (on-par)**: The new gsymutil [generates
segmented GSYM v2
files](https://gist.github.com/royitaqi/9bea5b3d50f13247d577ea91fbc6368a),
whose content
([seg1](https://gist.github.com/royitaqi/5b95a793b548f2f44edca250d64366b4),
[seg2](https://gist.github.com/royitaqi/f64730cbd1885ac9c0b9136e03e7742e),
[seg3](https://gist.github.com/royitaqi/2ce585fae910c57784cafafe4fb4cdcb))
match that of a [single GSYM v2
file](https://gist.github.com/royitaqi/475499477b9dbb1dea81f5d653ec39bf).
Commit: bfa4de2fb858f493471aba68b8e2b9bb030f10e4
https://github.com/llvm/llvm-project/commit/bfa4de2fb858f493471aba68b8e2b9bb030f10e4
Author: joaosaffran <joaosaffranllvm at gmail.com>
Date: 2026-04-14 (Tue, 14 Apr 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
A llvm/test/CodeGen/SPIRV/llvm-intrinsics/ctpop-vk.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/ctpop.ll
Log Message:
-----------
[SPIRV]Implementing PopCount for 16 and 64 bits (#191283)
`OpBitCount` only supports 32bit types. So this patch modifies the
codegen to follow a similar pattern as `firstbithigh` and `firstbitlow`.
On 8 and 16 bits, the parameters are zero-extended to 32 bits. With 64
bits it is bitcasting into 2xi32 types. The logic is adapted to larger
component counts as well.
Fix: https://github.com/llvm/llvm-project/issues/142677
---------
Co-authored-by: Joao Saffran <jderezende at microsoft.com>
Commit: 1e311716785daee38da0e6418d93ee6557a2585f
https://github.com/llvm/llvm-project/commit/1e311716785daee38da0e6418d93ee6557a2585f
Author: Shilei Tian <i at tianshilei.me>
Date: 2026-04-14 (Tue, 14 Apr 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
Log Message:
-----------
[NFC][AMDGPU] clang-format AMDGPUAsmPrinter.cpp (#192176)
Commit: 9b8611b1c5b3d454b2c5e052c00f7285d733d496
https://github.com/llvm/llvm-project/commit/9b8611b1c5b3d454b2c5e052c00f7285d733d496
Author: Wenju He <wenju.he at intel.com>
Date: 2026-04-15 (Wed, 15 Apr 2026)
Changed paths:
M openmp/CMakeLists.txt
Log Message:
-----------
[OpenMP] Create check-openmp target for device targets (#192175)
offload/cmake/caches/AMDGPUBot.cmake enables
RUNTIMES_amdgcn-amd-amdhsa_LLVM_ENABLE_RUNTIMES="openmp". In that
sub-build, check-openmp target doesn't exist and there is build error
`unknown target 'check-openmp'` after 18f63d1375d0, which makes
top-level check-openmp depend on check-openmp-amdgcn-amd-amdhsa.
In openmp, the device targets only call add_subdirectory(device), which
doesn't calls construct_check_openmp_target() and check-openmp target
doesn't exist. `ninja check-openmp-amdgcn-amd-amdhsa` also fails with
the same error before 18f63d1375d0.
Fix by adding construct_check_openmp_target() for device targets as well.
Assisted-by: Claude Sonnet 4.6
Commit: 5f62bae5666c3cad5439587fa0f330b92467241a
https://github.com/llvm/llvm-project/commit/5f62bae5666c3cad5439587fa0f330b92467241a
Author: Zhen Wang <zhenw at nvidia.com>
Date: 2026-04-14 (Tue, 14 Apr 2026)
Changed paths:
M flang/docs/Directives.md
M flang/include/flang/Support/Fortran.h
M flang/lib/Support/Fortran.cpp
M flang/test/Semantics/cuf10.cuf
Log Message:
-----------
[flang][cuda] Fix ignore_tkr(m) to also cover CUDA unified attribute (#192131)
The ignore_tkr(m) directive suppresses CUDA managed attribute checking
on dummy arguments, but it was not covering the unified attribute. This
caused a spurious error when passing a plain host array to a unified
dummy with ignore_tkr(m):
```
error: dummy argument 'x=' has ATTRIBUTES(UNIFIED) but its associated actual argument has no CUDA data attribute
```
Extend the IgnoreTKR::Managed check in AreCompatibleCUDADataAttrs to
accept Unified in addition to Managed and no-attribute.
Commit: f32f6a829374239e68cb2e8bb2a00908cb248745
https://github.com/llvm/llvm-project/commit/f32f6a829374239e68cb2e8bb2a00908cb248745
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-04-14 (Tue, 14 Apr 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
A llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vp-splice-bf16.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vp-splice.ll
A llvm/test/CodeGen/RISCV/rvv/vp-splice-bf16.ll
M llvm/test/CodeGen/RISCV/rvv/vp-splice.ll
Log Message:
-----------
[RISCV] Enable use of vfslide1up in lowerVPSpliceExperimental for bf16 vectors with Zvfbfa (#192169)
Commit: c9f09d305b555d0312cc76e665ba919be2d78236
https://github.com/llvm/llvm-project/commit/c9f09d305b555d0312cc76e665ba919be2d78236
Author: Jiaqi He <heturing at gmail.com>
Date: 2026-04-15 (Wed, 15 Apr 2026)
Changed paths:
M clang-tools-extra/clang-tidy/bugprone/BugproneTidyModule.cpp
M clang-tools-extra/clang-tidy/bugprone/CMakeLists.txt
A clang-tools-extra/clang-tidy/bugprone/SignedBitwiseCheck.cpp
A clang-tools-extra/clang-tidy/bugprone/SignedBitwiseCheck.h
M clang-tools-extra/clang-tidy/hicpp/CMakeLists.txt
M clang-tools-extra/clang-tidy/hicpp/HICPPTidyModule.cpp
R clang-tools-extra/clang-tidy/hicpp/SignedBitwiseCheck.cpp
R clang-tools-extra/clang-tidy/hicpp/SignedBitwiseCheck.h
M clang-tools-extra/docs/ReleaseNotes.rst
A clang-tools-extra/docs/clang-tidy/checks/bugprone/signed-bitwise.rst
M clang-tools-extra/docs/clang-tidy/checks/hicpp/signed-bitwise.rst
M clang-tools-extra/docs/clang-tidy/checks/list.rst
A clang-tools-extra/test/clang-tidy/checkers/bugprone/signed-bitwise-bug34747.cpp
A clang-tools-extra/test/clang-tidy/checkers/bugprone/signed-bitwise-integer-literals.cpp
A clang-tools-extra/test/clang-tidy/checkers/bugprone/signed-bitwise-standard-types.cpp
A clang-tools-extra/test/clang-tidy/checkers/bugprone/signed-bitwise-standard-types.h
A clang-tools-extra/test/clang-tidy/checkers/bugprone/signed-bitwise.cpp
R clang-tools-extra/test/clang-tidy/checkers/hicpp/signed-bitwise-bug34747.cpp
R clang-tools-extra/test/clang-tidy/checkers/hicpp/signed-bitwise-integer-literals.cpp
R clang-tools-extra/test/clang-tidy/checkers/hicpp/signed-bitwise-standard-types.cpp
R clang-tools-extra/test/clang-tidy/checkers/hicpp/signed-bitwise-standard-types.h
R clang-tools-extra/test/clang-tidy/checkers/hicpp/signed-bitwise.cpp
Log Message:
-----------
[clang-tidy] Rename hicpp-signed-bitwise to bugprone-signed-bitwise (#190449)
Part of https://github.com/llvm/llvm-project/issues/183462.
Closes https://github.com/llvm/llvm-project/issues/183465.
---------
Co-authored-by: EugeneZelenko <eugene.zelenko at gmail.com>
Commit: 73c7a6121956ceea1bc935c57292e5811e05e650
https://github.com/llvm/llvm-project/commit/73c7a6121956ceea1bc935c57292e5811e05e650
Author: Brian Cain <brian.cain at oss.qualcomm.com>
Date: 2026-04-15 (Wed, 15 Apr 2026)
Changed paths:
M clang/lib/Driver/ToolChains/Hexagon.cpp
M clang/test/Driver/hexagon-toolchain-elf.c
M clang/test/Driver/hexagon-toolchain-linux.c
Log Message:
-----------
[Hexagon] Add LTO options to Hexagon driver link args (#191336)
The Hexagon driver's constructHexagonLinkArgs() was not calling
addLTOOptions(). This meant that LTO plugin options weren't forwarded to
the linker.
This caused a crash when using ThinLTO with -fenable-matrix on
llvm-test-suite/SingleSource/UnitTests/matrix-types-spec.cpp:
LowerMatrixIntrinsicsPass did not run in the LTO backend because
-enable-matrix was not forwarded via -plugin-opt.
Add the addLTOOptions() call to both the musl and bare-metal code paths
in constructHexagonLinkArgs().
Commit: 3ecf8724de1744f92e311115d4f3834a49a15b7b
https://github.com/llvm/llvm-project/commit/3ecf8724de1744f92e311115d4f3834a49a15b7b
Author: Björn Schäpers <bjoern at hazardy.de>
Date: 2026-04-15 (Wed, 15 Apr 2026)
Changed paths:
M clang/lib/Format/Format.cpp
M clang/unittests/Format/FormatTest.cpp
Log Message:
-----------
[clang-format] Detect language for file templates (#191502)
Fixes #191295.
Commit: 4720d95026c7ef71e9743135d58fd6cdb06988e7
https://github.com/llvm/llvm-project/commit/4720d95026c7ef71e9743135d58fd6cdb06988e7
Author: Jan Voung <jvoung at google.com>
Date: 2026-04-15 (Wed, 15 Apr 2026)
Changed paths:
M clang-tools-extra/clang-tidy/bugprone/UncheckedOptionalAccessCheck.cpp
M clang-tools-extra/test/clang-tidy/checkers/bugprone/Inputs/unchecked-optional-access/std/types/optional.h
M clang-tools-extra/test/clang-tidy/checkers/bugprone/unchecked-optional-access.cpp
M clang/include/clang/Analysis/FlowSensitive/Models/UncheckedOptionalAccessModel.h
M clang/lib/Analysis/FlowSensitive/Models/UncheckedOptionalAccessModel.cpp
Log Message:
-----------
Fix registered matcher for bugprone-unchecked-optional-access (recent changes to libcxx) (#191681)
Further fix for #187788. Previous attempt in PR #188044 only updated the
model and model tests, but forgot to update the registered matcher.
Commit: 63febe07c8878a0695cdbc5551df8cd854828cf3
https://github.com/llvm/llvm-project/commit/63febe07c8878a0695cdbc5551df8cd854828cf3
Author: Cullen Rhodes <cullen.rhodes at arm.com>
Date: 2026-04-15 (Wed, 15 Apr 2026)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/CallLowering.cpp
Log Message:
-----------
[GISel][CallLowering] Improve arg flags setting compile-time (#191761)
addFlagsUsingAttrFn is hot and showing up in compile-time profiles via
llvm::CallLowering::lowerCall. The culprit is std::function callback.
Switching to set flags based on AttributeSet directly is a -0.25%
compile-time improvement on CTMark AArch64 O0.
https://llvm-compile-time-tracker.com/compare.php?from=d35cd21a3757ab6028024f0b47bc9d802d06eae6&to=e717c7017faf2cb386f0d02715fb55d252b3ae42&stat=instructions%3Au
Commit: 2acf87994f34e4d28c9c43b994263e62d98076fa
https://github.com/llvm/llvm-project/commit/2acf87994f34e4d28c9c43b994263e62d98076fa
Author: Konrad Kleine <kkleine at redhat.com>
Date: 2026-04-15 (Wed, 15 Apr 2026)
Changed paths:
M llvm/lib/DebugInfo/DWARF/DWARFContext.cpp
Log Message:
-----------
[llvm][DebugInfo] formatv in DWARFContext (#191983)
This relates to #35980.
Co-authored-by: Sergei Barannikov <barannikov88 at gmail.com>
Commit: 7ae5fe63dd979eae13ea04e166f94056ec1306ca
https://github.com/llvm/llvm-project/commit/7ae5fe63dd979eae13ea04e166f94056ec1306ca
Author: Paweł Bylica <pawel at hepcolgum.band>
Date: 2026-04-15 (Wed, 15 Apr 2026)
Changed paths:
M compiler-rt/lib/sanitizer_common/sanitizer_linux.cpp
Log Message:
-----------
[sanitizer] Use close_range on Linux to close FDs in StartSubprocess (#191450)
Enable the close_range syscall on Linux when __NR_close_range is
available in kernel headers (Linux 5.9+). On older kernels, the
syscall returns ENOSYS and callers fall back gracefully.
This fixes the slow FD closing loop in StartSubprocess when
RLIMIT_NOFILE is high (e.g. 1B in Docker environments).
Fixes https://github.com/llvm/llvm-project/issues/63297.
Fixes https://github.com/llvm/llvm-project/issues/152459.
Commit: 7145f8986a82df677e67493b47243fd65aac8653
https://github.com/llvm/llvm-project/commit/7145f8986a82df677e67493b47243fd65aac8653
Author: Zeyi Xu <mitchell.xu2 at gmail.com>
Date: 2026-04-15 (Wed, 15 Apr 2026)
Changed paths:
M clang-tools-extra/clang-tidy/performance/PreferSingleCharOverloadsCheck.cpp
A clang-tools-extra/test/clang-tidy/checkers/performance/prefer-single-char-overloads-alias.cpp
Log Message:
-----------
[clang-tidy] Emit deprecation warning for preformance-faster-string-find (#191922)
Related discussion in:
https://github.com/llvm/llvm-project/pull/186946#discussion_r2983649044
Commit: 738ead2c739a6b1999db63a187185d00e534c747
https://github.com/llvm/llvm-project/commit/738ead2c739a6b1999db63a187185d00e534c747
Author: Evan Wilde <ewilde at apple.com>
Date: 2026-04-15 (Wed, 15 Apr 2026)
Changed paths:
M lldb/source/Plugins/Process/FreeBSD/NativeProcessFreeBSD.cpp
M lldb/source/Plugins/Process/NetBSD/NativeProcessNetBSD.cpp
Log Message:
-----------
[lldb] Fix FreeBSD/NetBSD plugin build after AsCString API change (#192110)
The argument to `AsCString` was made explicit in
116b045b1e2bff462afff0dc0b06218e6074f427.
```
/home/ewilde/llvm-project/freebsd-lldb-build/lldb/source/Plugins/Process/FreeBSD/NativeProcessFreeBSD.cpp:754:48: error: too few arguments to function call, single argument 'value_if_empty' was not specified
754 | module_file_spec.GetFilename().AsCString());
| ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ^
/home/ewilde/llvm-project/freebsd-lldb-build/lldb/include/lldb/Utility/ConstString.h:183:15: note: 'AsCString' declared here
183 | const char *AsCString(const char *value_if_empty) const {
| ^ ~~~~~~~~~~~~~~~~~~~~~~~~~~
1 error generated.
```
Not all use-sites were updated to pass an argument resulting in build
failures. I'm updating the errors in the FreeBSD and NetBSD plugins to
use formatv instead of expanding the C String, like what is done on
Linux, avoiding the issue entirely.
rdar://174675042
Commit: 789f30c73ef4e6a26974a3813fda4aab21790296
https://github.com/llvm/llvm-project/commit/789f30c73ef4e6a26974a3813fda4aab21790296
Author: Stefan Gränitz <stefan.graenitz at gmail.com>
Date: 2026-04-15 (Wed, 15 Apr 2026)
Changed paths:
M lldb/source/Plugins/SymbolLocator/Debuginfod/CMakeLists.txt
M lldb/source/Plugins/SymbolLocator/Debuginfod/SymbolLocatorDebuginfod.cpp
M lldb/source/Plugins/SymbolLocator/SymStore/CMakeLists.txt
M lldb/source/Plugins/SymbolLocator/SymStore/SymbolLocatorSymStore.cpp
M llvm/include/llvm/Debuginfod/Debuginfod.h
A llvm/include/llvm/HTTP/HTTPClient.h
A llvm/include/llvm/HTTP/HTTPServer.h
A llvm/include/llvm/HTTP/StreamedHTTPResponseHandler.h
R llvm/include/llvm/Support/HTTP/HTTPClient.h
R llvm/include/llvm/Support/HTTP/HTTPServer.h
R llvm/include/llvm/Support/HTTP/StreamedHTTPResponseHandler.h
M llvm/lib/CMakeLists.txt
M llvm/lib/Debuginfod/CMakeLists.txt
M llvm/lib/Debuginfod/Debuginfod.cpp
A llvm/lib/HTTP/CMakeLists.txt
A llvm/lib/HTTP/HTTPClient.cpp
A llvm/lib/HTTP/HTTPServer.cpp
A llvm/lib/HTTP/StreamedHTTPResponseHandler.cpp
M llvm/lib/Support/CMakeLists.txt
R llvm/lib/Support/HTTP/CMakeLists.txt
R llvm/lib/Support/HTTP/HTTPClient.cpp
R llvm/lib/Support/HTTP/HTTPServer.cpp
R llvm/lib/Support/HTTP/StreamedHTTPResponseHandler.cpp
M llvm/tools/llvm-cov/CMakeLists.txt
M llvm/tools/llvm-cov/CodeCoverage.cpp
M llvm/tools/llvm-debuginfod-find/CMakeLists.txt
M llvm/tools/llvm-debuginfod-find/llvm-debuginfod-find.cpp
M llvm/tools/llvm-debuginfod/CMakeLists.txt
M llvm/tools/llvm-debuginfod/llvm-debuginfod.cpp
M llvm/tools/llvm-objdump/CMakeLists.txt
M llvm/tools/llvm-objdump/llvm-objdump.cpp
M llvm/tools/llvm-profdata/CMakeLists.txt
M llvm/tools/llvm-profdata/llvm-profdata.cpp
M llvm/tools/llvm-symbolizer/CMakeLists.txt
M llvm/tools/llvm-symbolizer/llvm-symbolizer.cpp
M llvm/unittests/CMakeLists.txt
M llvm/unittests/Debuginfod/CMakeLists.txt
M llvm/unittests/Debuginfod/DebuginfodTests.cpp
A llvm/unittests/HTTP/CMakeLists.txt
A llvm/unittests/HTTP/HTTPServerTests.cpp
M llvm/unittests/Support/CMakeLists.txt
R llvm/unittests/Support/HTTP/CMakeLists.txt
R llvm/unittests/Support/HTTP/HTTPServerTests.cpp
Log Message:
-----------
[llvm] Move libSupportHTTP to top-level libHTTP (NFC) (#191202)
The HTTP implementation depends on CURL and would preferably not be part
of the LLVM dylib. This was not possible as a nested library under
libSupport, because libSupport itself is part of the LLVM dylib. This
patch moves the HTTP code into a separate top-level library that is
independent from libSupport and excluded from the LLVM dylib.
Commit: 72e666d290a96fe8b286a7f668641ef377c4ea73
https://github.com/llvm/llvm-project/commit/72e666d290a96fe8b286a7f668641ef377c4ea73
Author: Minsoo Choo <minsoochoo0122 at proton.me>
Date: 2026-04-15 (Wed, 15 Apr 2026)
Changed paths:
M llvm/docs/ReleaseNotes.md
Log Message:
-----------
[lldb][FreeBSDKernel] Add release notes for refresh-threads (#191399)
Fixes: 9116344c02bf0b9ec037451d12935d7539c48679 (#188692)
Assisted-by: Claude
---------
Signed-off-by: Minsoo Choo <minsoochoo0122 at proton.me>
Commit: 257aa195199cb10e5f4559399f91bbb6713ea93b
https://github.com/llvm/llvm-project/commit/257aa195199cb10e5f4559399f91bbb6713ea93b
Author: Minsoo Choo <minsoochoo0122 at proton.me>
Date: 2026-04-15 (Wed, 15 Apr 2026)
Changed paths:
M lldb/source/Plugins/Process/FreeBSD-Kernel-Core/RegisterContextFreeBSDKernelCore_x86_64.cpp
Log Message:
-----------
[lldb][FreeBSDKernel] Supply values for CS/SS registers (#192207)
These two values ensure that CPU was in kernel privilege at the time of
crash. This change is from KGDB's `amd64fbsd-kern.c`.
Signed-off-by: Minsoo Choo <minsoochoo0122 at proton.me>
Commit: 120cbbd88bf6b6c723176684a12c64393abe7e95
https://github.com/llvm/llvm-project/commit/120cbbd88bf6b6c723176684a12c64393abe7e95
Author: Kunqiu Chen <camsyn at foxmail.com>
Date: 2026-04-15 (Wed, 15 Apr 2026)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
M llvm/test/Transforms/InstCombine/fold-fcmp-trunc.ll
M llvm/test/Transforms/InstCombine/known-never-nan.ll
Log Message:
-----------
[InstCombine] Fold `fptrunc(x) ord/uno [ C | fptrunc(y) ]` to `x ord/uno [ C | y ]` (#185844)
Recognize TWO new patterns and fold them as follows:
```
fptrunc(x) ord/uno C --> x ord/uno 0
fptrunc(x) ord/uno fptrunc(y) --> x ord/uno y
```
Fixes #185698
Alive2: https://alive2.llvm.org/ce/z/YvXnBJ
IR diff: https://github.com/dtcxzyw/llvm-opt-benchmark/pull/3551
CompTime impact: https://github.com/dtcxzyw/llvm-opt-benchmark/pull/3552
Commit: cee66b7a4bd7597061e880a3dd3a218167787710
https://github.com/llvm/llvm-project/commit/cee66b7a4bd7597061e880a3dd3a218167787710
Author: Aaditya <115080342+easyonaadit at users.noreply.github.com>
Date: 2026-04-15 (Wed, 15 Apr 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
Log Message:
-----------
[AMDGPU]Refactor `lowerWaveReduce` for maintainability (#189223)
The function to lower wave reduce pseudos is already quite
large ,and there are yet a few more operations to support.
Refactoring some of the code to make it more manageable.
Summary of changes:
1. Moved the expansion for `V_CNDMASK_B64_PSEUDO` to a
separate function. It's needed for 64 bit dpp operations.
2. Collapsed `getIdentityValueFor32BitWaveReduction` and
`getIdentityValueFor64BitWaveReduction` into a single
function which returns a 64 bit unsigned value.
3. Modified `getDPPOpcForWaveReduction` to also return
the `Clamp` opcode.
4. Added a lambda: `BuildRegSequence` and a static function
`ExtractSubRegs` as those code blocks are repeated with
little variation.
5. Moved logic for setting identity value in inactive lanes
to `BuildSetInactiveInstr`.
Commit: ef36f92e40e419ff3b4413da5608cfcf1d2bea85
https://github.com/llvm/llvm-project/commit/ef36f92e40e419ff3b4413da5608cfcf1d2bea85
Author: David Sherwood <david.sherwood at arm.com>
Date: 2026-04-15 (Wed, 15 Apr 2026)
Changed paths:
M llvm/test/Transforms/LoopVectorize/AArch64/sve2-histcnt-epilogue.ll
M llvm/test/Transforms/LoopVectorize/LoongArch/loongarch-interleaved.ll
M llvm/test/Transforms/LoopVectorize/X86/slm-no-vectorize.ll
M llvm/test/Transforms/LoopVectorize/optsize.ll
M llvm/test/Transforms/LoopVectorize/pr31190.ll
M llvm/test/Transforms/LoopVectorize/tripcount.ll
Log Message:
-----------
[LV][NFC] Remove "REQUIRES: asserts" line from some tests (#191795)
Several tests seemed to require asserts despite not testing any debug
output so I have removed the line.
Commit: 15ce7e18295a972c9ab13046f371ed808b3a6e53
https://github.com/llvm/llvm-project/commit/15ce7e18295a972c9ab13046f371ed808b3a6e53
Author: Aaditya <115080342+easyonaadit at users.noreply.github.com>
Date: 2026-04-15 (Wed, 15 Apr 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.max.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.min.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.umax.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.umin.ll
Log Message:
-----------
[AMDGPU] DPP wave reduction for long types - 1 (#189224)
Supported Ops: `min`, `max`, `umin`, `umax`
Commit: 66b946d23c667138e9cb3e024eeba01df464b096
https://github.com/llvm/llvm-project/commit/66b946d23c667138e9cb3e024eeba01df464b096
Author: Aaditya <115080342+easyonaadit at users.noreply.github.com>
Date: 2026-04-15 (Wed, 15 Apr 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.add.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.sub.ll
Log Message:
-----------
[AMDGPU] DPP wave reduction for long types - 2 (#189225)
Supported Ops: `add`, `sub`
Commit: ed1199a9d452bd31df3b20a8e8a9d2e00632f823
https://github.com/llvm/llvm-project/commit/ed1199a9d452bd31df3b20a8e8a9d2e00632f823
Author: Aaditya <115080342+easyonaadit at users.noreply.github.com>
Date: 2026-04-15 (Wed, 15 Apr 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.and.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.or.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.xor.ll
Log Message:
-----------
[AMDGPU] DPP wave reduction for long types - 3 (#189226)
Supported Ops: `and`, `or`, `xor`
Commit: bc54a63e37ad81941bc68813bbf7badd5f24d60d
https://github.com/llvm/llvm-project/commit/bc54a63e37ad81941bc68813bbf7badd5f24d60d
Author: Aaditya <115080342+easyonaadit at users.noreply.github.com>
Date: 2026-04-15 (Wed, 15 Apr 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.fmax.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.fmin.ll
Log Message:
-----------
[AMDGPU] DPP wave reduction for double types - 1 (#189390)
Supported Ops: `fmin` and `fmax`
Commit: b05b77a830f68894b67480bdf42d737bb046c19d
https://github.com/llvm/llvm-project/commit/b05b77a830f68894b67480bdf42d737bb046c19d
Author: Aaditya <115080342+easyonaadit at users.noreply.github.com>
Date: 2026-04-15 (Wed, 15 Apr 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.fadd.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.fsub.ll
Log Message:
-----------
[AMDGPU] DPP wave reduction for double types - 2 (#189391)
Supported Ops: `fadd` and `fsub`
Commit: ca867c7d9450b3e72157433585bb858468a308d6
https://github.com/llvm/llvm-project/commit/ca867c7d9450b3e72157433585bb858468a308d6
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-04-15 (Wed, 15 Apr 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVBuiltins.cpp
M llvm/test/CodeGen/SPIRV/transcoding/OpAllAny.ll
Log Message:
-----------
[SPIR-V] Convert integer vector to bool vector for OpAny/OpAll (#191804)
OpenCL any()/all() builtins receive integer vectors, but OpAny/OpAll
require boolean vector inputs per the SPIR-V spec
related to https://github.com/llvm/llvm-project/issues/190736
Commit: 3cc9f63d81eb85f9f5ed5161b565871e0785511f
https://github.com/llvm/llvm-project/commit/3cc9f63d81eb85f9f5ed5161b565871e0785511f
Author: Baranov Victor <bar.victor.2002 at gmail.com>
Date: 2026-04-15 (Wed, 15 Apr 2026)
Changed paths:
M clang-tools-extra/docs/clang-tidy/checks/list.rst
Log Message:
-----------
[clang-tidy][NFC] Mark cert-err33-c as alias in check list (#192224)
Commit: 0563360ae1ac21b278b307a6b34f3f0cea023949
https://github.com/llvm/llvm-project/commit/0563360ae1ac21b278b307a6b34f3f0cea023949
Author: macurtis-amd <macurtis at amd.com>
Date: 2026-04-15 (Wed, 15 Apr 2026)
Changed paths:
M llvm/include/llvm/Passes/TargetPassRegistry.inc
A llvm/test/CodeGen/AMDGPU/new-pm-machine-analysis.mir
Log Message:
-----------
[NewPM] Teach llc -passes to handle target machine analysis (#191704)
Commit: 6cbae7b8b5e5805b70256737929a9683afecb57f
https://github.com/llvm/llvm-project/commit/6cbae7b8b5e5805b70256737929a9683afecb57f
Author: Stefan Gränitz <stefan.graenitz at gmail.com>
Date: 2026-04-15 (Wed, 15 Apr 2026)
Changed paths:
M llvm/unittests/Debuginfod/CMakeLists.txt
Log Message:
-----------
[llvm] Fix: DebuginfodTests must link libHTTP after 789f30c73ef4 (#192225)
Commit: 40690e55a8bac17d71604b651562985051a05cd9
https://github.com/llvm/llvm-project/commit/40690e55a8bac17d71604b651562985051a05cd9
Author: Alexandre Ganea <aganea at havenstudios.com>
Date: 2026-04-15 (Wed, 15 Apr 2026)
Changed paths:
M openmp/runtime/src/kmp_alloc.cpp
Log Message:
-----------
[openmp] Fix Darwin after 988e00e (#192135)
As per
https://github.com/llvm/llvm-project/pull/191556#issuecomment-4246459320
Commit: b78e9faa702604a92af207f2f1b51c6984e33667
https://github.com/llvm/llvm-project/commit/b78e9faa702604a92af207f2f1b51c6984e33667
Author: Lang Hames <lhames at gmail.com>
Date: 2026-04-15 (Wed, 15 Apr 2026)
Changed paths:
M llvm/examples/OrcV2Examples/LLJITWithCustomObjectLinkingLayer/LLJITWithCustomObjectLinkingLayer.cpp
M llvm/examples/OrcV2Examples/LLJITWithGDBRegistrationListener/LLJITWithGDBRegistrationListener.cpp
M llvm/examples/OrcV2Examples/LLJITWithObjectLinkingLayerPlugin/LLJITWithObjectLinkingLayerPlugin.cpp
M llvm/include/llvm-c/LLJIT.h
M llvm/include/llvm/ExecutionEngine/Orc/LLJIT.h
M llvm/lib/ExecutionEngine/Orc/LLJIT.cpp
M llvm/lib/ExecutionEngine/Orc/OrcV2CBindings.cpp
M llvm/tools/lli/lli.cpp
M mlir/lib/ExecutionEngine/ExecutionEngine.cpp
Log Message:
-----------
[ORC] Add MemMgr arg to LLJITBuilder::ObjectLinkingLayerCreator. (#192214)
LinkGraphLinkingLayer and ObjectLinkingLayer will start requiring a
jitlink::JITLinkMemoryManager argument in an upcoming commit. In
preparation for that, this patch threads a MemMgr argument through the
LLJITBuilder::ObjectLinkingLayerCreator factory type.
Note: This patch does not thread the argument through the C API
(LLVMOrcLLJITBuilderObjectLinkingLayerCreatorFunction) yet so as to not
break compatibility. All current users of the C API construct
RuntimeDyld instances, which would have to ignore this argument anyway.
If we don't update the
LLVMOrcLLJITBuilderObjectLinkingLayerCreatorFunction type before
RuntimeDyld is removed then that will be a good time to update it, since
all existing users were going to have to rewrite their code anyway.
Commit: 6b6461ccdedd344a3ba90bb4ae0283f6db7741d2
https://github.com/llvm/llvm-project/commit/6b6461ccdedd344a3ba90bb4ae0283f6db7741d2
Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
Date: 2026-04-15 (Wed, 15 Apr 2026)
Changed paths:
A llvm/test/CodeGen/AArch64/vector-absolute-difference.ll
Log Message:
-----------
[AArch64] Add a few tests showing vector absolute differences (NFC) (#191383)
Commit: 8a12039aa538b13451b1864e7eafbbe04d58b6f3
https://github.com/llvm/llvm-project/commit/8a12039aa538b13451b1864e7eafbbe04d58b6f3
Author: Roy Shi <royitaqi at users.noreply.github.com>
Date: 2026-04-15 (Wed, 15 Apr 2026)
Changed paths:
M llvm/include/llvm/ADT/bit.h
Log Message:
-----------
[llvm adt] Use `__builtin_bswap16` in `byteswap()` when available (#190002)
The 32-bit and 64-bit branch of the code has the same pattern of using
`__builtin_bswapXX` when available (before trying to use
`_byteswap_XXXXX`). But the 16-bit branch doesn't do this (it only tries
to use the latter).
It seems `__builtin_bswap16` is a thing (see
[doc](https://gcc.gnu.org/onlinedocs/gcc/Byte-Swapping-Builtins.html)),
so I wonder if we just forgot to use it in the 16-bit branch.
Adding it and hope it helps (i.e. faster than the default shift-and-or
approach).
Commit: 0b3afd35c41d5424e8a0e156f78f8a293934b6a5
https://github.com/llvm/llvm-project/commit/0b3afd35c41d5424e8a0e156f78f8a293934b6a5
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-04-15 (Wed, 15 Apr 2026)
Changed paths:
M mlir/lib/Dialect/LLVMIR/IR/LLVMMemorySlot.cpp
M mlir/test/Dialect/LLVMIR/sroa-intrinsics.mlir
Log Message:
-----------
[MLIR][LLVM] Fix non-deterministic alloca order in SROA under LLVM_REVERSE_ITERATION (#192087)
AllocaOp::destructure iterated over usedIndices (SmallPtrSet) whose
order depends on pointer values, causing allocas for destructured
subslots to be emitted in a non-deterministic order when
LLVM_REVERSE_ITERATION is enabled. Sort indices ascending by integer
value before creating allocas to guarantee a stable output order. Update
four test cases in sroa-intrinsics.mlir whose CHECK patterns relied on
the old non-deterministic ordering.
Assisted-by: Claude Code
Co-authored-by: Claude Sonnet 4.6 <noreply at anthropic.com>
Commit: 156494bf18eb0f6eed5b3788f671b5515c516b45
https://github.com/llvm/llvm-project/commit/156494bf18eb0f6eed5b3788f671b5515c516b45
Author: Jacques Pienaar <jacques+gh at japienaar.info>
Date: 2026-04-15 (Wed, 15 Apr 2026)
Changed paths:
M mlir/lib/Bytecode/Reader/BytecodeReader.cpp
M mlir/test/Bytecode/uselist_orders.mlir
Log Message:
-----------
[mlirbc] Fix use-list ordering during deserialization (#191942)
This patch fixes an issue in the MLIR bytecode reader where use-lists
were incorrectly reconstructed when they had permutations that are not
own inverse. Fixed the use-list reconstruction mapping logic in to
correctly restore the stable memory order of uses, both full shuffle and
index-pair encodings consistently.
Gemini/LLM assisted.
Commit: 7a894a96014ebc319bc225a8e8107ee78794bff3
https://github.com/llvm/llvm-project/commit/7a894a96014ebc319bc225a8e8107ee78794bff3
Author: Konrad Kleine <kkleine at redhat.com>
Date: 2026-04-15 (Wed, 15 Apr 2026)
Changed paths:
M llvm/unittests/Support/FormatVariadicTest.cpp
Log Message:
-----------
[llvm][DebugInfo] Add more format/formatv equivalence tests (#191980)
The idea for this commit is to show how `formatv()` format strings need
to be constructed in order to achieve the same output as with
`format()`.
This relates to #35980.
Co-authored-by: Sergei Barannikov <barannikov88 at gmail.com>
Commit: 5cc6df520eef0ca9ab329a2eb6f14cf0c3717b22
https://github.com/llvm/llvm-project/commit/5cc6df520eef0ca9ab329a2eb6f14cf0c3717b22
Author: zackc6 <112835067+zackc6 at users.noreply.github.com>
Date: 2026-04-15 (Wed, 15 Apr 2026)
Changed paths:
M mlir/lib/Conversion/FuncToLLVM/FuncToLLVM.cpp
Log Message:
-----------
[mlir][FuncToLLVM][NFC] Refactor convertFuncOpToLLVMFuncOp into helpers (#192218)
Split convertFuncOpToLLVMFuncOp into focused helper functions for
signature conversion, llvm.func creation, attribute propagation, and
C-wrapper handling.
This reduces nesting and improves readability while preserving existing
lowering behavior.
Commit: ad8a6275912c2d9e2410ea4c1481d7ec88279383
https://github.com/llvm/llvm-project/commit/ad8a6275912c2d9e2410ea4c1481d7ec88279383
Author: Nico Weber <thakis at chromium.org>
Date: 2026-04-15 (Wed, 15 Apr 2026)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/Debuginfod/BUILD.gn
A llvm/utils/gn/secondary/llvm/lib/HTTP/BUILD.gn
R llvm/utils/gn/secondary/llvm/lib/Support/HTTP/BUILD.gn
M llvm/utils/gn/secondary/llvm/tools/llvm-cov/BUILD.gn
M llvm/utils/gn/secondary/llvm/tools/llvm-debuginfod-find/BUILD.gn
M llvm/utils/gn/secondary/llvm/tools/llvm-debuginfod/BUILD.gn
M llvm/utils/gn/secondary/llvm/tools/llvm-objdump/BUILD.gn
M llvm/utils/gn/secondary/llvm/tools/llvm-profdata/BUILD.gn
M llvm/utils/gn/secondary/llvm/tools/llvm-symbolizer/BUILD.gn
M llvm/utils/gn/secondary/llvm/unittests/BUILD.gn
A llvm/utils/gn/secondary/llvm/unittests/HTTP/BUILD.gn
R llvm/utils/gn/secondary/llvm/unittests/Support/HTTP/BUILD.gn
Log Message:
-----------
[gn] port 789f30c73ef4e6a2 (llvm/lib/HTTP) (#192248)
Commit: 13e0f6c411fc0e284db2dac838aa9a9065d72a7f
https://github.com/llvm/llvm-project/commit/13e0f6c411fc0e284db2dac838aa9a9065d72a7f
Author: Nico Weber <thakis at chromium.org>
Date: 2026-04-15 (Wed, 15 Apr 2026)
Changed paths:
M llvm/utils/gn/secondary/clang-tools-extra/clang-tidy/bugprone/BUILD.gn
M llvm/utils/gn/secondary/clang-tools-extra/clang-tidy/hicpp/BUILD.gn
Log Message:
-----------
[gn build] Port c9f09d305b55 (#192251)
[gn build] Port c9f09d305b55
Commit: 36034461747dad3c3d74285bf6d7e5ffd1ef889e
https://github.com/llvm/llvm-project/commit/36034461747dad3c3d74285bf6d7e5ffd1ef889e
Author: Nico Weber <thakis at chromium.org>
Date: 2026-04-15 (Wed, 15 Apr 2026)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/DebugInfo/GSYM/BUILD.gn
M llvm/utils/gn/secondary/llvm/unittests/DebugInfo/GSYM/BUILD.gn
Log Message:
-----------
[gn build] Port c3650687e0b7 (#192250)
[gn build] Port c3650687e0b7
Commit: a10674f3dce4e8bc2bbac56dd6b7a73d61a4b70c
https://github.com/llvm/llvm-project/commit/a10674f3dce4e8bc2bbac56dd6b7a73d61a4b70c
Author: Nico Weber <thakis at chromium.org>
Date: 2026-04-15 (Wed, 15 Apr 2026)
Changed paths:
M llvm/utils/gn/secondary/clang/unittests/StaticAnalyzer/BUILD.gn
Log Message:
-----------
[gn build] Port 5d7a143ec677 (#192249)
[gn build] Port 5d7a143ec677
Commit: 6ec03a7fea2103ac103b767c03ed3065d3922356
https://github.com/llvm/llvm-project/commit/6ec03a7fea2103ac103b767c03ed3065d3922356
Author: Erich Keane <ekeane at nvidia.com>
Date: 2026-04-15 (Wed, 15 Apr 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenExprAggregate.cpp
M clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
A clang/test/CIR/CodeGen/array-init-loop-exprs.cpp
Log Message:
-----------
[CIR] Implement 'ArrayInitLoopExpr lowering' in ExprAgg. (#192053)
This ended up being a fairly common pattern: a copy operation on a
structure with an array inside of it. Classic-Codegen has a few
different ways of initializing/copying an array, of which this is one.
However, this patch uses the array-init functionality we already have.
This ends up being a bit verbose, but will make sure we don't have to
worry about separately handling throwing types/etc for this AST node.
Additionally, this has to handle the ArrayInitIndexExpr, but that is as
simple as making sure we properly cache the index value when doing our
initialization.
Commit: 95b8fb64c5b102ee92d6c0229f8762be84ab1668
https://github.com/llvm/llvm-project/commit/95b8fb64c5b102ee92d6c0229f8762be84ab1668
Author: Erich Keane <ekeane at nvidia.com>
Date: 2026-04-15 (Wed, 15 Apr 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp
M clang/test/CIR/CodeGen/cast-cxx20.cpp
Log Message:
-----------
[CIR] Handle scalar lowering of qualification-changes (#192152)
Similar to the previous Expr-change that I made, this does the same with
pointers-to-arrays (and other types). The new implementation is
effectively a copy/paste of the classic-codegen, so it maintains our
current invariants/assumptions about changes via emitLoadOfLValue.
Commit: c3d7f77a2b27ee92366aeac1b9114a33be3245ba
https://github.com/llvm/llvm-project/commit/c3d7f77a2b27ee92366aeac1b9114a33be3245ba
Author: Erich Keane <ekeane at nvidia.com>
Date: 2026-04-15 (Wed, 15 Apr 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenFunction.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
M clang/test/CIR/CodeGen/three-way-cmp.cpp
Log Message:
-----------
[CIR] Lower PsuedoObjectExpr LValues (#192108)
This ends up being pretty much copy/paste from classic-codegen, so it
doesn't have anything particularly novel.
I DID switch the return type of the helper function to be a variant
instead of a manually-put-together pair, and switched to range-for, but
otherwise it should be identical.
However, I was uanble to reproduce a few of the branches, so NYIs were
left in place until we can figure them out. At least some of them are
going to be for RValue versions.
Commit: f7464cbdea73a337ee285e119023673249d5600e
https://github.com/llvm/llvm-project/commit/f7464cbdea73a337ee285e119023673249d5600e
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-04-15 (Wed, 15 Apr 2026)
Changed paths:
M mlir/lib/Dialect/Bufferization/Transforms/OneShotModuleBufferize.cpp
M mlir/test/Dialect/Bufferization/Transforms/one-shot-module-bufferize.mlir
Log Message:
-----------
[MLIR][Bufferization] Fix foldMemRefCasts dropping ranked return type for unranked->ranked cast (#189249)
When one-shot-bufferize with bufferize-function-boundaries is used and a
function returns a ranked tensor that is produced by casting from an
unranked intermediate (e.g. a call to a function returning
tensor<*xf32>), the foldMemRefCasts post-processing step incorrectly
unpacked the memref.cast from unranked to ranked memref, downgrading the
function return type to the unranked memref type and using the unranked
value as the return operand.
The fix is in unpackCast(): do not unpack a cast whose source is an
unranked memref and whose result is a ranked memref, since doing so
would lose type specificity.
Fixes https://github.com/llvm/llvm-project/issues/176739
Assisted-by: Claude Code
Commit: 8a42e2ffc5ffb756ad838db297ac23d4fa78a05f
https://github.com/llvm/llvm-project/commit/8a42e2ffc5ffb756ad838db297ac23d4fa78a05f
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-04-15 (Wed, 15 Apr 2026)
Changed paths:
M mlir/lib/Dialect/Math/Transforms/AlgebraicSimplification.cpp
Log Message:
-----------
[MLIR][Math] Move exponent threshold check before IR creation in PowIStrengthReduction (#188955)
PowIStrengthReduction::matchAndRewrite was creating the `one` constant
(using complex::ConstantOp::create for complex::PowiOp) before the
threshold check that guards whether the rewrite is profitable. When the
exponent exceeds the threshold, the pattern returned failure() after IR
was already modified, violating
MLIR_ENABLE_EXPENSIVE_PATTERN_API_CHECKS.
Fix: reorder so the abs(exponent) computation and threshold check occur
before any IR creation.
Assisted-by: Claude Code
Fix a failure present with MLIR_ENABLE_EXPENSIVE_PATTERN_API_CHECKS=ON.
Commit: 7a48740f3c122a9e45172f609ef22335962248e3
https://github.com/llvm/llvm-project/commit/7a48740f3c122a9e45172f609ef22335962248e3
Author: CHANDRA GHALE <chandra.nitdgp at gmail.com>
Date: 2026-04-15 (Wed, 15 Apr 2026)
Changed paths:
M flang/lib/Semantics/resolve-names.cpp
M flang/test/Semantics/stmt-func02.f90
A flang/test/Semantics/stmt-func03.f90
Log Message:
-----------
[Flang] Fix statement-function shadowing to avoid false unresolved-symbol internal error (#189360)
When a statement function shadows a host-associated internal procedure
name, HandleStmtFunction creates a local symbol but leaves name.symbol
pointing to the host SubprogramNameDetails.
Because of that stale pointer, AnalyzeStmtFunctionStmt exits early (it
expects SubprogramDetails), so the RHS is never resolved and flang emits
a false `internal error: "Internal: no symbol found".` Clearing
name.symbol after creating the local shadow symbol lets it re-resolve
correctly and fixes the issue.
---------
Co-authored-by: Chandra Ghale <ghale at pe34genoa.hpc.amslabs.hpecorp.net>
Commit: 3d40731f4d20b43cd5668aa0d5b34607996c4182
https://github.com/llvm/llvm-project/commit/3d40731f4d20b43cd5668aa0d5b34607996c4182
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-04-15 (Wed, 15 Apr 2026)
Changed paths:
M mlir/lib/Conversion/FuncToLLVM/FuncToLLVM.cpp
Log Message:
-----------
[MLIR] Fix a mismatch between the function return type and the returned value type (NFC) (#192258)
This fixes the build on some platform where the inferred count differs.
Commit: 75d74ee6d59cdb667d2cd490c52e42efec2ce850
https://github.com/llvm/llvm-project/commit/75d74ee6d59cdb667d2cd490c52e42efec2ce850
Author: Konrad Kleine <kkleine at redhat.com>
Date: 2026-04-15 (Wed, 15 Apr 2026)
Changed paths:
M llvm/lib/DebugInfo/LogicalView/Core/LVReader.cpp
Log Message:
-----------
[llvm][DebugInfo] Use formatv in LVReader (#192007)
This relates to #35980.
Commit: 3174b3d61617b1d5766eb5ca14a3025af6d972e6
https://github.com/llvm/llvm-project/commit/3174b3d61617b1d5766eb5ca14a3025af6d972e6
Author: Christian Sigg <csigg at google.com>
Date: 2026-04-15 (Wed, 15 Apr 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/lldb/source/Plugins/BUILD.bazel
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
M utils/bazel/llvm-project-overlay/llvm/unittests/BUILD.bazel
M utils/bazel/llvm-project-overlay/mlir/test/Bytecode/BUILD.bazel
Log Message:
-----------
[bazel] Port 789f30c (#192261)
Commit: 18021237534da5efd9ae6bd9f1b79243d608b58f
https://github.com/llvm/llvm-project/commit/18021237534da5efd9ae6bd9f1b79243d608b58f
Author: Zhijie Wang <yesterda9 at gmail.com>
Date: 2026-04-15 (Wed, 15 Apr 2026)
Changed paths:
M clang/include/clang/Analysis/Analyses/LifetimeSafety/FactsGenerator.h
M clang/lib/Analysis/LifetimeSafety/FactsGenerator.cpp
M clang/test/Sema/warn-lifetime-safety.cpp
Log Message:
-----------
[LifetimeSafety] Propagate origins through explicit cast expressions (#192180)
Before this PR, `FactsGenerator` handled cast nodes with
`VisitImplicitCastExpr` (`CastKind` switch case) and
`VisitCXXFunctionalCastExpr` (handle`gsl::Pointer` types). Other
explicit casts (`CStyleCastExpr`, `CXXStaticCastExpr`, ...) had no
handler, so origin was silently dropped. This is the root cause of
#190912: the dangle in `a = StringView(s);` is missed even though the
equivalent `StringView tmp(s); a = tmp;` is reported.
The policy for "does this cast propagate origin?" is a function of
`CastKind`, independent of whether the cast is implicit or explicit.
This PR replaces `VisitImplicitCastExpr` with a generic `VisitCastExpr`.
`VisitCXXFunctionalCastExpr` is retained only to preserve the
`handleTestPoint` logic, then delegates to `VisitCastExpr`.
This mirrors `clang/lib/AST/ExprConstant.cpp`, where each evaluator
implements only `VisitCastExpr` and switches on `CastKind`; the few
ExprClass-specific overrides (e.g., `VisitCXXDynamicCastExpr`) exist
solely to attach constexpr-validity diagnostics before delegating back.
Scope: the set of `CastKind`s that propagate origin is unchanged.
Fixes: #190912
Commit: d87e2eadbb124e34537df1e75c73b71dd09a7a30
https://github.com/llvm/llvm-project/commit/d87e2eadbb124e34537df1e75c73b71dd09a7a30
Author: Corentin Jabot <corentinjabot at gmail.com>
Date: 2026-04-15 (Wed, 15 Apr 2026)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/SemaDeclCXX.cpp
M clang/test/SemaCXX/coroutines.cpp
Log Message:
-----------
[Clang] Diagnose `co_await` expressions in default arguments of nested functions (#191817)
co_await/co_yield expressions are not allowed in default arguments. We
were checking they do not appear outside of function contexts, which
include default arguments of the corresponding function, but it missed
default arguments of functions declared in the body of another
functions.
Because parsing default argument isn't done in a dedicated scope, we do
additional checks in `ActOnParamDefaultArgument`. Because the checks is
done in two places, we cannot introduce a more precise diagnostic.
It might be worth considering a parse scope for default arguments in the
future.
Fixes #98923
Commit: b9077c8e6aaa6c23c0735977fb52a264c6709071
https://github.com/llvm/llvm-project/commit/b9077c8e6aaa6c23c0735977fb52a264c6709071
Author: Nerixyz <nerixdev at outlook.de>
Date: 2026-04-15 (Wed, 15 Apr 2026)
Changed paths:
M lldb/docs/_ext/build_include.py
M lldb/docs/_ext/lldb_setting.py
M lldb/scripts/gen-property-docs-from-json.py
Log Message:
-----------
[lldb][Docs] Fix presentation of some default values (#192239)
There were two bugs with the display of default values:
1. If a default value contains a backtick, that would render
incorrectly. For example
[`disassembly-format`](https://lldb.llvm.org/use/settings.html#disassembly-format).
Fixed by doing the wrapping when we generate the Markdown instead of
when parsing the directive. MyST will already parse the content of the
directive as Markdown. We can escape backticks inside the string by
changing the fence. Markdown can take any number of backticks at the
start as long as they match the amount at the end
([spec](https://spec.commonmark.org/0.31.2/#code-spans)).
2. When the docs were built on Windows, UTF-8 was not correctly picked
up, because the default encoding isn't utf8 there.
[`separator`](https://lldb.llvm.org/use/settings.html#separator) was one
example (renders correctly on the Website but not on my machine).
Commit: e2195ff09dedf0e9eb1148a9fad96229158b75ae
https://github.com/llvm/llvm-project/commit/e2195ff09dedf0e9eb1148a9fad96229158b75ae
Author: Balázs Benics <benicsbalazs at gmail.com>
Date: 2026-04-15 (Wed, 15 Apr 2026)
Changed paths:
M clang/test/Analysis/bstring.c
Log Message:
-----------
[analyzer] Fix 'bstring.c' test on Mingw (#192252)
Addresses
https://github.com/llvm/llvm-project/pull/191061#issuecomment-4250948488
Co-authored-by: Martin Storsjö <martin at martin.st>
Commit: f194504eff0e64022a95f9e92ca0babb17415b8e
https://github.com/llvm/llvm-project/commit/f194504eff0e64022a95f9e92ca0babb17415b8e
Author: Anshil Gandhi <95053726+gandhi56 at users.noreply.github.com>
Date: 2026-04-15 (Wed, 15 Apr 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
A llvm/test/CodeGen/AMDGPU/GlobalISel/trunc-brc.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointers-memcpy.ll
Log Message:
-----------
[AMDGPU][GlobalISel] Implement missing rules for G_TRUNC legalization (#180647)
Implement G_TRUNC (result, source) register bank rules for sizes {32,
64, 96, 128, 160, 256, 512} with two generic wildcard rules using
UniBRC/DivBRC predicates and SgprBRC/VgprBRC apply IDs.
Commit: 0bced2162c78a4f7d3d13c78a524ba5d1be98f89
https://github.com/llvm/llvm-project/commit/0bced2162c78a4f7d3d13c78a524ba5d1be98f89
Author: Lang Hames <lhames at gmail.com>
Date: 2026-04-15 (Wed, 15 Apr 2026)
Changed paths:
M llvm/tools/llvm-jitlink/llvm-jitlink-statistics.cpp
M llvm/tools/llvm-jitlink/llvm-jitlink.cpp
M llvm/tools/llvm-jitlink/llvm-jitlink.h
Log Message:
-----------
[llvm-jitlink] Hold Session::ObjLayer by unique_ptr. (#192253)
This will simplify the Session construction process when we remove
jitlink::JITLinkMemoryManager ownership from ExecutorProcessControl in
an upcoming patch.
(Reason: ObjectLinkingLayer's constructor will require a
JITLinkMemoryManager, which we'll want to cerate after the
ExecutionSession has been initialized. Creating a JITLinkMemoryManager
is generally a fallible operation, so we want to be able to bail on
construction of the ObjectLinkingLayer entirely if we can't create a
memory manager for it).
Commit: e0f5ad74be2b2f127442f721c70c6753c41e6d8c
https://github.com/llvm/llvm-project/commit/e0f5ad74be2b2f127442f721c70c6753c41e6d8c
Author: Corentin Jabot <corentinjabot at gmail.com>
Date: 2026-04-15 (Wed, 15 Apr 2026)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/SemaOverload.cpp
M clang/test/CXX/drs/cwg24xx.cpp
Log Message:
-----------
[Clang] Fix handling of overloads differing only by constraints and ref-qualifiers (#192018)
We should only error about inconsistent qualifiers if the functions are
actually overloads.
Fixes #120812
Commit: 54ae11d3f096732d826aa89a71e3b7ceca811f2d
https://github.com/llvm/llvm-project/commit/54ae11d3f096732d826aa89a71e3b7ceca811f2d
Author: Corentin Jabot <corentinjabot at gmail.com>
Date: 2026-04-15 (Wed, 15 Apr 2026)
Changed paths:
A clang/test/CXX/drs/cwg31xx.cpp
M clang/www/cxx_dr_status.html
Log Message:
-----------
[Clang][NFC] Mark 3106 as implemented. (#192256)
This was a wording clarification, but we add a test nonetheless.
Commit: 0f2afde1c2276a61435e8f9909c13f6e2208b936
https://github.com/llvm/llvm-project/commit/0f2afde1c2276a61435e8f9909c13f6e2208b936
Author: Erich Keane <ekeane at nvidia.com>
Date: 2026-04-15 (Wed, 15 Apr 2026)
Changed paths:
M clang/lib/Sema/SemaOpenACC.cpp
M clang/test/SemaOpenACC/routine-construct-clauses.cpp
Log Message:
-----------
[OpenACC] Fix invalid routine case where 'bind' didn't exist (#192270)
For some reason I'd failed to check the result of `find_if` and just
assumed that the `bind` clause must exist! Looking through my other
tests, I've validated every other combination other than this one for
some reason.
Fixes: #192245
Commit: da8abd84801362080232638abff9d399558cd82a
https://github.com/llvm/llvm-project/commit/da8abd84801362080232638abff9d399558cd82a
Author: Konrad Kleine <kkleine at redhat.com>
Date: 2026-04-15 (Wed, 15 Apr 2026)
Changed paths:
M llvm/lib/DebugInfo/LogicalView/Core/LVCompare.cpp
Log Message:
-----------
[llvm][DebugInfo] Use formatv in LVCompare (#192001)
This relates to #35980.
Commit: cb961d331f40368d1856ad2dc00fde7ef3deb9e2
https://github.com/llvm/llvm-project/commit/cb961d331f40368d1856ad2dc00fde7ef3deb9e2
Author: Max Graey <maxgraey at gmail.com>
Date: 2026-04-15 (Wed, 15 Apr 2026)
Changed paths:
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/lib/CodeGen/GlobalISel/GISelValueTracking.cpp
M llvm/lib/Support/KnownFPClass.cpp
M llvm/test/Transforms/Attributor/nofpclass-powi.ll
M llvm/unittests/Analysis/ValueTrackingTest.cpp
M llvm/unittests/CodeGen/GlobalISel/KnownFPClassTest.cpp
Log Message:
-----------
[ValueTracking][KnownFPClass] Cover known no-infinity cases for powi (#191736)
Teach `computeKnownFPClass` to infer non-infinity cass for `powi`.
Rules out `inf` for `powi(x, exp)` when:
- `x ?= inf` && `exp > 0`
- `x ?= +/-0` && `exp < 0`
- `x ?= finite` && `|exp| > 1`
- `x ?= subnormal` && `exp ?= -1` (special asym case after |exp| > 1)
where `?=` is maybe equal.
It's a bit conservative, and we could refine it further, but I'd take an
iterative improvement.
Commit: 4e3a074501cae5f132293d56f9987ded94ee72be
https://github.com/llvm/llvm-project/commit/4e3a074501cae5f132293d56f9987ded94ee72be
Author: 8051Enthusiast <8051Enthusiast at protonmail.com>
Date: 2026-04-15 (Wed, 15 Apr 2026)
Changed paths:
M llvm/lib/Transforms/Utils/SimplifyCFG.cpp
A llvm/test/Transforms/SimplifyCFG/X86/switch-to-lookup-comdat.ll
Log Message:
-----------
[SimplifyCFG] Reuse function comdat for switch lookup table (#190995)
Fixes #190994.
As the switch table is extracted from the function, the table should be
removed when the function is removed, and therefore inherits the comdat
of the function.
Commit: cd0f775fbc9075897475e4b4cdf56be4a7148d43
https://github.com/llvm/llvm-project/commit/cd0f775fbc9075897475e4b4cdf56be4a7148d43
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2026-04-15 (Wed, 15 Apr 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenDecl.cpp
M clang/lib/CIR/CodeGen/CIRGenExprAggregate.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
M clang/test/CIR/CodeGen/partial-array-cleanup.cpp
Log Message:
-----------
[CIR] Handle irregular partial init destroy (#192158)
This implements CIR handling for the case where an array of a destructed
type is being initialized using an initializer list and therefore the
address of the last successfully constructed element must be loaded from
a temporary variable before the partial array destroy loop can begin.
In classic codegen this shares its implementation with the general array
ctor/dtor handling, but in CIR we have dedicated operations to abstract
array ctors/dtors, so the implementation of the irregular partial
destruction happens in a different place in codegen.
Assisted-by: Cursor / claude-4.6-opus-high
Commit: 70e5ec47d2bdd8f54f5c2df3ec8b606d42f11804
https://github.com/llvm/llvm-project/commit/70e5ec47d2bdd8f54f5c2df3ec8b606d42f11804
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2026-04-15 (Wed, 15 Apr 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenCleanup.cpp
M clang/lib/CIR/CodeGen/CIRGenDecl.cpp
M clang/lib/CIR/CodeGen/CIRGenExpr.cpp
M clang/lib/CIR/CodeGen/CIRGenExprAggregate.cpp
M clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
M clang/lib/CIR/CodeGen/CIRGenStmt.cpp
A clang/test/CIR/CodeGen/cleanup-conditional-eh.cpp
A clang/test/CIR/CodeGen/cleanup-conditional.cpp
Log Message:
-----------
[CIR] Handle full expression cleanups in conditional branches (#191479)
This adds CIR support for handling full expression cleanups in
conditional branches. Because CIR uses structured control flow, it was
necessary to handle these cleanups differently than is done in classic
codegen. CIR speculatively creates a cleanup scope when an
ExprWithCleanups contains a conditional operator and maintains a
dedicated stack of these deferred cleanups, which is added to the
cleanup scope at the end of the full expression with an active flag used
to control whether the cleanup should be executed based on any branches
that may have been taken during the conditional expression evaluation.
This is similar to the mechanism used for lifetime extended cleanups,
but the timing of when the cleanups are moved to the main EH stack is
different, so we need to maintain two different pending cleanup stacks.
We are able to use the same PendingCleanupEntry class for both.
Assisted-by: Cursor / claude-4.6-opus-high
Commit: 150e62532fd3b063f80626dbcebf0aa131a5b1c6
https://github.com/llvm/llvm-project/commit/150e62532fd3b063f80626dbcebf0aa131a5b1c6
Author: Jan Leyonberg <jan_sjodin at yahoo.com>
Date: 2026-04-15 (Wed, 15 Apr 2026)
Changed paths:
M clang/lib/CIR/Dialect/OpenMP/RegisterOpenMPExtensions.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/CMakeLists.txt
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
A clang/test/CIR/Lowering/omp-target-map.cir
Log Message:
-----------
[CIR][OpenMP] Add OpenMP-to-LLVM type conversion for CIR-to-LLVM lowering (#190063)
Register OpenMP conversion legality and patterns in the CIR-to-LLVM pass
so that OpenMP operations (e.g. omp.map.info, omp.target) have their CIR
types converted to LLVM types during lowering. Without this,
the conversion leaves behind unrealized_conversion_cast ops that cause
translation to LLVM IR to fail.
Also registers omp::PointerLikeType on cir::PointerType so that CIR
pointers are accepted as operands in OpenMP map operations.
Assised-by: Cursor / Claude Opus 4.6
Commit: 7f521050d2c4141200b5f7cd75f81db99d26bcad
https://github.com/llvm/llvm-project/commit/7f521050d2c4141200b5f7cd75f81db99d26bcad
Author: vangthao95 <vang.thao at amd.com>
Date: 2026-04-15 (Wed, 15 Apr 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeHelper.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeHelper.h
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.h
M llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.i16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.i8.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.ll
M llvm/test/CodeGen/AMDGPU/indirect-reg-read-imm-idx.ll
Log Message:
-----------
AMDGPU/GlobalISel: RegBankLegalize rules for G_INSERT_VECTOR_ELT (#191296)
Commit: a11c24d34aba240777cbc944bd4e39f0c1349bb8
https://github.com/llvm/llvm-project/commit/a11c24d34aba240777cbc944bd4e39f0c1349bb8
Author: Chi-Chun, Chen <chichun.chen at hpe.com>
Date: 2026-04-15 (Wed, 15 Apr 2026)
Changed paths:
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
M mlir/test/Target/LLVMIR/openmp-teams-distribute-reduction.mlir
Log Message:
-----------
[mlir][OpenMP] Fix teams reduction assert with sibling distributes (#191475)
Avoid double-mapping teams reduction block arguments when multiple
sibling `omp.distribute` ops appear under the same `omp.teams`.
Replace `teamsReductionContainedInDistribute` with
`getDistributeCapturingTeamsReduction`, which returns the unique
`omp::DistributeOp` containing all non-debug uses of the teams reduction
block arguments, or null if no such distribute exists. In that case,
reduction setup falls back to the teams op.
This ensures only the owning distribute handles reduction setup and
prevents `moduleTranslation.mapValue()` from being called multiple times
for the same block arguments.
Fixes https://github.com/llvm/llvm-project/issues/191470
Assisted with Copilot and GPT-5.4
Commit: f6dcdbe1561b9c4eb492902b207c86ce103b5353
https://github.com/llvm/llvm-project/commit/f6dcdbe1561b9c4eb492902b207c86ce103b5353
Author: vangthao95 <vang.thao at amd.com>
Date: 2026-04-15 (Wed, 15 Apr 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
M llvm/test/CodeGen/AMDGPU/returnaddress.ll
Log Message:
-----------
AMDGPU/GlobalISel: RegBankLegalize rules for returnaddress (#191318)
Commit: 5043d096b00f0782e60834271fe67f164a1e85a3
https://github.com/llvm/llvm-project/commit/5043d096b00f0782e60834271fe67f164a1e85a3
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-04-15 (Wed, 15 Apr 2026)
Changed paths:
M mlir/lib/Dialect/Vector/Transforms/VectorDistribute.cpp
Log Message:
-----------
[MLIR][Vector] Fix WarpOpScfForOp and WarpOpScfIfOp leaving invalid ops after region moves (#188951)
WarpOpScfForOp::matchAndRewrite called mergeBlocks() to move forOp's
body block into the inner WarpOp. mergeBlocks() erases the source block,
leaving forOp with an empty body region (0 blocks). Since scf.for
requires exactly 1 body block, IR verification fails with "region with 1
blocks" after the pattern succeeds. Additionally, when forOp had no init
args, the pattern was missing the scf.yield terminator in the new ForOp.
WarpOpScfIfOp::matchAndRewrite had the same issue: takeBody() emptied
the ifOp's then/else regions, leaving scf.if with 0 blocks.
Fix:
- Restore the conditional scf.yield creation (only when newForOp has
results).
- After merging/taking the regions, replace the remaining op's results
with ub.poison and erase the now-invalid op from the new WarpOp's body.
Assisted-by: Claude Code
Fix a failure present with MLIR_ENABLE_EXPENSIVE_PATTERN_API_CHECKS=ON.
Commit: 70cf763a42d55dcf89687c9e84478eb007561654
https://github.com/llvm/llvm-project/commit/70cf763a42d55dcf89687c9e84478eb007561654
Author: Keith Smiley <keithbsmiley at gmail.com>
Date: 2026-04-15 (Wed, 15 Apr 2026)
Changed paths:
M clang/cmake/caches/Release.cmake
M llvm/CMakeLists.txt
M llvm/cmake/config-ix.cmake
A llvm/cmake/modules/FindLibXml2.cmake
M llvm/lib/WindowsManifest/CMakeLists.txt
Log Message:
-----------
Reapply "[cmake] Add support for statically linking libxml2" (#192088)
This applies a fix for windows not discovering libxml
This reverts commit 2a9c32496b5e8e63844597f638bdf67e4732fd35.
Commit: d1fd44fac1bb2fb344fa48cbdc372b86e3516d58
https://github.com/llvm/llvm-project/commit/d1fd44fac1bb2fb344fa48cbdc372b86e3516d58
Author: michaelselehov <michael.selehov at amd.com>
Date: 2026-04-15 (Wed, 15 Apr 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp
A llvm/test/CodeGen/AMDGPU/machine-scheduler-revert-slot-monotonicity.mir
Log Message:
-----------
[AMDGPU][Scheduler] Fix non-monotonic SlotIndex after schedule revert (#192039)
modifyRegionSchedule restores the original instruction order by splicing
MIs before RegionEnd. When an MI is already at the expected position
(MII == RegionEnd) its SlotIndex was left unchanged, even though earlier
splices may have shifted neighboring indices. This could leave a stale,
lower-numbered slot on a non-moved MI, breaking SlotIndex monotonicity
and corrupting LiveIntervals.
The corruption surfaced as a "register isn't live" assertion in
GCNDownwardRPTracker when PreRARematStage's finalizeGCNSchedStage
globally reverted regions that were already locally reverted by
checkScheduling.
Fix by calling LIS->handleMove for non-moved MIs whose SlotIndex has
become non-monotonic (PrevIdx >= MI_Idx). Additionally, track whether
checkScheduling already reverted a region and skip the redundant global
revert in finalizeGCNSchedStage.
Assisted-by: Claude Opus
Commit: 33a1181470db75e284b091267d431ed15e12843c
https://github.com/llvm/llvm-project/commit/33a1181470db75e284b091267d431ed15e12843c
Author: Florian Mayer <fmayer at google.com>
Date: 2026-04-15 (Wed, 15 Apr 2026)
Changed paths:
M clang/unittests/Analysis/FlowSensitive/UncheckedStatusOrAccessModelTestFixture.cpp
Log Message:
-----------
[NFC] [FlowSensitive] [StatusOr] add test for co_return (#192160)
Commit: 60246dc28d170447299babf2f14706a2156b5488
https://github.com/llvm/llvm-project/commit/60246dc28d170447299babf2f14706a2156b5488
Author: Maiowaa <soodkushagar387 at gmail.com>
Date: 2026-04-15 (Wed, 15 Apr 2026)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp
M llvm/test/Transforms/InstCombine/add.ll
Log Message:
-----------
[InstCombine] Generalize zext(add X, -C) + C folding (#191723)
This patch generalizes an existing InstCombine optimization:
zext(X - 1) + 1 → zext(X)
to support arbitrary constants C:
zext(X - C) + C → zext(X)
when X is known to be >= C using KnownBits analysis.
This avoids missed simplifications for non-unit constants while ensuring
correctness under wrap semantics.
Includes test coverage for:
- Positive case where the fold applies
- Negative case where the fold must not apply
### Correctness Proof
We consider the transform:
zext(add(X, -C)) + C → zext(X)
under the conditions:
1) X u>= C (unsigned comparison)
2) C fits in the bitwidth of X (i.e., representable in NarrowBW bits)
The inner operation is performed in the narrower bitwidth n:
add(X, -C) = (X - C) mod 2^n
Since X u>= C, the subtraction does not underflow, so:
(X - C) mod 2^n = X - C
Applying zero extension:
zext(X - C) + C = (X - C) + C = X
Thus:
= zext(X)
---
### Alive2 Validation
The transform was validated using Alive2 with symbolic C.
The constraint that C fits in NarrowBW bits is modeled using llvm.ctlz,
and the precondition X u>= C is enforced via llvm.assume.
Alive2 verifies the transformation under these conditions:
https://alive2.llvm.org/ce/z/jCVPWr
Commit: 158434ae5e2d6bece6db4a1447eee2df6380321b
https://github.com/llvm/llvm-project/commit/158434ae5e2d6bece6db4a1447eee2df6380321b
Author: Charles Zablit <c_zablit at apple.com>
Date: 2026-04-15 (Wed, 15 Apr 2026)
Changed paths:
M lldb/source/Host/windows/PseudoConsole.cpp
Log Message:
-----------
[lldb][windows] use a marker to drain the ConPTY's init sequence (#191472)
This patch improves the ConPTY method that drains the init sequence. It
uses a string marker to ensure that the init sequence has been received.
The previous implementation was prone to race condition, because the
method could return before all the init sequence was received.
This only seems to reproduce on windows-server-2019.
Commit: d05b3e0489070ea4e45676ede0159b299a9b030c
https://github.com/llvm/llvm-project/commit/d05b3e0489070ea4e45676ede0159b299a9b030c
Author: vangthao95 <vang.thao at amd.com>
Date: 2026-04-15 (Wed, 15 Apr 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.barrier.signal.isfirst.ll
M llvm/test/CodeGen/AMDGPU/s-barrier.ll
M llvm/test/CodeGen/AMDGPU/s-wakeup-barrier.ll
Log Message:
-----------
AMDGPU/GlobalISel: RegBankLegalize rules for split barrier intrinsics (#192170)
Add RegBankLegalize rules for the following split barrier intrinsics:
llvm.amdgcn.s.barrier.init
llvm.amdgcn.s.barrier.join
llvm.amdgcn.s.barrier.leave
llvm.amdgcn.s.barrier.signal.isfirst
llvm.amdgcn.s.barrier.signal.var
llvm.amdgcn.s.get.barrier.state
llvm.amdgcn.s.get.named.barrier.state
llvm.amdgcn.s.wakeup.barrier
Commit: 55f40c851b0e647a4476e5db8be45958f7ef2ffc
https://github.com/llvm/llvm-project/commit/55f40c851b0e647a4476e5db8be45958f7ef2ffc
Author: Ryan Mansfield <ryan_mansfield at apple.com>
Date: 2026-04-15 (Wed, 15 Apr 2026)
Changed paths:
M llvm/docs/CommandGuide/llvm-otool.rst
M llvm/test/tools/llvm-objdump/MachO/archive-headers.test
M llvm/tools/llvm-objdump/MachODump.cpp
M llvm/tools/llvm-objdump/OtoolOpts.td
M llvm/tools/llvm-objdump/llvm-objdump.cpp
Log Message:
-----------
[llvm-otool] Add -a option to print archive headers (#189411)
Wire up llvm-otool's -a to the existing --archive-headers machinery with
a default of displaying all architectures to match classic otool
behaviour.
Commit: d0b78277f0322b627e192324ac77274ebfedc210
https://github.com/llvm/llvm-project/commit/d0b78277f0322b627e192324ac77274ebfedc210
Author: Jonas Paulsson <paulson1 at linux.ibm.com>
Date: 2026-04-15 (Wed, 15 Apr 2026)
Changed paths:
M llvm/include/llvm/CodeGen/MachineScheduler.h
M llvm/lib/CodeGen/MachineScheduler.cpp
M llvm/lib/Target/SystemZ/SystemZMachineScheduler.cpp
Log Message:
-----------
[MachineScheduler] Improve handling of phys regs in GenericScheduler. (NFC). (#187572)
Factor out the handling of coalesced preg COPYs from SystemZMachineScheduler.cpp into MachineScheduler.cpp.
This extends the handling to other types of instructions than COPYs or immediate
loads, such as Load Address and takes care of maintaining the original input
order if both SUs are biased the same way in the same zone.
Another target that uses GenericScheduler can enable this by setting the new
MachineSchedPolicy member BiasPRegsExtra to true (default false). In a derived
scheduling strategy, this could be used either by passing /*BiasPRegsExtra=*/true
to biasPhysReg() (extra instruction detection), or by calling tryBiasPhysRegs()
instead which also preserves the original order if biased the same way.
Commit: 7aee3933330033040ffc3edc75d752f6431c8dd7
https://github.com/llvm/llvm-project/commit/7aee3933330033040ffc3edc75d752f6431c8dd7
Author: Michael Spencer <bigcheesegs at gmail.com>
Date: 2026-04-15 (Wed, 15 Apr 2026)
Changed paths:
M clang/include/clang/Serialization/ModuleCache.h
M clang/lib/Serialization/ModuleCache.cpp
A clang/test/Modules/prune-no-toplevel.m
M clang/tools/libclang/BuildSystem.cpp
Log Message:
-----------
[clang][modules] Don't prune the top level module cache for implicitly built modules (#192171)
There are build systems that put explicitly built modules in the same
module cache directory as implicitly built modules. Pruning those in an
implicit build can cause the build to fail due to missing modules.
rdar://174790709
Commit: da09b04cf166ccc2fb50217649c54960a2753cfe
https://github.com/llvm/llvm-project/commit/da09b04cf166ccc2fb50217649c54960a2753cfe
Author: 8051Enthusiast <8051Enthusiast at protonmail.com>
Date: 2026-04-15 (Wed, 15 Apr 2026)
Changed paths:
M llvm/lib/Transforms/Utils/SimplifyCFG.cpp
R llvm/test/Transforms/SimplifyCFG/X86/switch-to-lookup-comdat.ll
Log Message:
-----------
Revert "[SimplifyCFG] Reuse function comdat for switch lookup table (#190995)" (#192294)
This reverts commit 4e3a074501cae5f132293d56f9987ded94ee72be.
CI broke with errors that look very much like they're caused by #190995.
I can't merge, so someone else will have to.
https://lab.llvm.org/buildbot/#/builders/94/builds/16933
https://lab.llvm.org/buildbot/#/builders/55/builds/26779
Commit: 19474da20b879ea67bb839120e13323671de5e1d
https://github.com/llvm/llvm-project/commit/19474da20b879ea67bb839120e13323671de5e1d
Author: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
Date: 2026-04-15 (Wed, 15 Apr 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
M llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.h
M llvm/test/CodeGen/AMDGPU/hsa.ll
M llvm/test/CodeGen/AMDGPU/stack-realign-kernel.ll
Log Message:
-----------
[AMDGPU] Fix .Lfunc_end label placement (#191526)
Now it is placed after the kernel descriptor, even the section is
.rodata, which is wrong. This allows proper code size calculation in MC.
Commit: 1f0ded8b123789d8056e8429c92f3dad51935565
https://github.com/llvm/llvm-project/commit/1f0ded8b123789d8056e8429c92f3dad51935565
Author: Charles Zablit <c_zablit at apple.com>
Date: 2026-04-15 (Wed, 15 Apr 2026)
Changed paths:
M lldb/cmake/modules/FindPythonAndSwig.cmake
M lldb/docs/resources/build.rst
M llvm/docs/ReleaseNotes.md
Log Message:
-----------
[lldb][windows] recommend building with Python 3.11 (#191159)
As of https://github.com/llvm/llvm-project/pull/176387 and release 22,
official builds of lldb on Windows use Python 3.11 both on x64 and
arm64.
The Windows lldb build bots use 3.11+ versions of Python:
[lldb-x86_64-win](https://lab.llvm.org/buildbot/#/builders/211) -
`3.12.7`
[lldb-remote-linux-win](https://lab.llvm.org/buildbot/#/builders/197) -
`3.12.7`
[lldb-aarch64-windows](https://lab.llvm.org/buildbot/#/builders/141) -
`3.11.9`
This patch changes the cmake config and documentation to recommend
building lldb on Windows with Python 3.11 or more recent.
In the future, given the reduced number of lldb maintainers on Windows
compared to other platforms, bumping the Python version on Windows would
help reduce the surface area of Python related bugs.
Commit: c4865380622f229188f29ef23d09eb3a564762ca
https://github.com/llvm/llvm-project/commit/c4865380622f229188f29ef23d09eb3a564762ca
Author: Lei Huang <lei at ca.ibm.com>
Date: 2026-04-15 (Wed, 15 Apr 2026)
Changed paths:
M clang/include/clang/Basic/BuiltinsPPC.def
M clang/lib/Basic/Targets/PPC.cpp
M clang/lib/Basic/Targets/PPC.h
A clang/test/CodeGen/PowerPC/builtins-ecc.c
A clang/test/Sema/PowerPC/builtins-ecc-error.c
M llvm/include/llvm/IR/IntrinsicsPowerPC.td
M llvm/lib/Target/PowerPC/PPCInstrFuture.td
M llvm/lib/Target/PowerPC/PPCInstrP10.td
A llvm/test/CodeGen/PowerPC/builtins-ecc.ll
Log Message:
-----------
[PowerPC] Implement Elliptic Curve Cryptography Builtins (#184681)
Add support for the following ISA Future elliptic curve cryptograpy
builtins.
* Builtins with immediate parameters:
vector unsigned char __builtin_xxmulmul(vector unsigned char, vector
unsigned char, unsigned int);
vector unsigned char __builtin_xxmulmulhiadd(vector unsigned char,
vector unsigned char, unsigned int, unsigned int, unsigned int); vector
unsigned char __builtin_xxmulmulloadd(vector unsigned char, vector
unsigned char, unsigned int, unsigned int); vector unsigned char
__builtin_xxssumudm(vector unsigned char, vector unsigned char, unsigned
int);
vector unsigned char __builtin_xxssumudmc(vector unsigned char, vector
unsigned char, unsigned int);
vector unsigned char __builtin_xxssumudmcext(vector unsigned char,
vector unsigned char, vector unsigned char, unsigned int);
* Builtins with two vector parameters (no immediates):
vector unsigned char __builtin_xsaddadduqm(vector unsigned char, vector
unsigned char);
vector unsigned char __builtin_xsaddaddsuqm(vector unsigned char, vector
unsigned char);
vector unsigned char __builtin_xsaddsubuqm(vector unsigned char, vector
unsigned char);
vector unsigned char __builtin_xsaddsubsuqm(vector unsigned char, vector
unsigned char);
vector unsigned char __builtin_xsmerge2t1uqm(vector unsigned char,
vector unsigned char);
vector unsigned char __builtin_xsmerge2t2uqm(vector unsigned char,
vector unsigned char);
vector unsigned char __builtin_xsmerge2t3uqm(vector unsigned char,
vector unsigned char);
vector unsigned char __builtin_xsmerge3t1uqm(vector unsigned char,
vector unsigned char);
vector unsigned char __builtin_xsrebase2t1uqm(vector unsigned char,
vector unsigned char);
vector unsigned char __builtin_xsrebase2t2uqm(vector unsigned char,
vector unsigned char);
vector unsigned char __builtin_xsrebase2t3uqm(vector unsigned char,
vector unsigned char);
vector unsigned char __builtin_xsrebase2t4uqm(vector unsigned char,
vector unsigned char);
vector unsigned char __builtin_xsrebase3t1uqm(vector unsigned char,
vector unsigned char);
vector unsigned char __builtin_xsrebase3t2uqm(vector unsigned char,
vector unsigned char);
vector unsigned char __builtin_xsrebase3t3uqm(vector unsigned char,
vector unsigned char);
Assisted by AI.
Commit: d0f8d719b58aaf422b8a31edd423ee27b746aaf0
https://github.com/llvm/llvm-project/commit/d0f8d719b58aaf422b8a31edd423ee27b746aaf0
Author: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
Date: 2026-04-15 (Wed, 15 Apr 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPU.td
Log Message:
-----------
[AMDGPU] Enable real true16 on gfx1250 (#190452)
Commit: 83a0866d0faf96fd1e4bf2526acd9afdcb231a69
https://github.com/llvm/llvm-project/commit/83a0866d0faf96fd1e4bf2526acd9afdcb231a69
Author: Deric C. <cheung.deric at gmail.com>
Date: 2026-04-15 (Wed, 15 Apr 2026)
Changed paths:
M clang/lib/Sema/SemaExprCXX.cpp
A clang/test/AST/HLSL/hlsl-constructors-template.hlsl
Log Message:
-----------
[HLSL] Mark vector and matrix constructor-turned-InitListExprs as ListInitializations (#192151)
Fixes #189086
This PR fixes a bug for HLSL where vector and matrix constructors that
have been turned into initializer lists via
https://github.com/llvm/llvm-project/blob/18519f34650db7fc8e1885ac0293c1e9a5f1b071/clang/lib/Sema/SemaInit.cpp#L6993-L7000
were not marked with ListInitialization = true, which causes template
re-instantiation to fail because the initialization with a InitListExpr
gets classified as a InitializationKind::IK_Direct instead of a
InitializationKind::IK_DirectList when ListInitialization is false.
Assisted-by: Claude Opus 4.6
Commit: 92421023db331cbecfda066c8180892f19f77568
https://github.com/llvm/llvm-project/commit/92421023db331cbecfda066c8180892f19f77568
Author: Dave Lee <davelee.com at gmail.com>
Date: 2026-04-15 (Wed, 15 Apr 2026)
Changed paths:
M lldb/packages/Python/lldbsuite/test/lldbutil.py
Log Message:
-----------
[lldb] Declare return type of lldbutil.run_to_source_breakpoint (#190028)
Helpful for remembering the types of the four return values (and their
order).
Commit: 9fb207e396f10c020be5312e56328e675c0729fa
https://github.com/llvm/llvm-project/commit/9fb207e396f10c020be5312e56328e675c0729fa
Author: Konrad Kleine <kkleine at redhat.com>
Date: 2026-04-15 (Wed, 15 Apr 2026)
Changed paths:
M llvm/lib/DebugInfo/DWARF/DWARFExpressionPrinter.cpp
Log Message:
-----------
[llvm][DebugInfo] Use formatv in DWARFExpressionPrinter (#191993)
This relates to #35980.
Commit: 9663ef399f327106f6c7307d08490c958db5c091
https://github.com/llvm/llvm-project/commit/9663ef399f327106f6c7307d08490c958db5c091
Author: Eugene Epshteyn <eepshteyn at nvidia.com>
Date: 2026-04-15 (Wed, 15 Apr 2026)
Changed paths:
M flang/test/Lower/io-statement-2.f90
M flang/test/Lower/io-statement-3.f90
M flang/test/Lower/io-statement-big-unit-checks.f90
M flang/test/Lower/io-statement-open-options.f90
M flang/test/Lower/io-write.f90
Log Message:
-----------
[flang][NFC] Converted five tests from old lowering to new lowering (part 45) (#192265)
Tests converted from test/Lower: io-statement-2.f90, io-statement-3.f90,
io-statement-big-unit-checks.f90, io-statement-open-options.f90,
io-write.f90
Commit: 5e928acc511b93dd74c38d19d5e8c84b23f0c5cf
https://github.com/llvm/llvm-project/commit/5e928acc511b93dd74c38d19d5e8c84b23f0c5cf
Author: Corentin Jabot <corentinjabot at gmail.com>
Date: 2026-04-15 (Wed, 15 Apr 2026)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/AST/ASTContext.h
M clang/lib/AST/ASTContext.cpp
M clang/lib/Sema/SemaConcept.cpp
M clang/test/SemaTemplate/concepts.cpp
Log Message:
-----------
[Clang] Add default arguments to the parameter mapping (#192071)
We were not adding default argument to the parameter mapping as such,
two constraint which only differed by the mapping of a parameter only
referenced in a default argument were considered identical.
Fixes #188640
Commit: 4d41344c7995f213e176136cc27afc794a68b0f2
https://github.com/llvm/llvm-project/commit/4d41344c7995f213e176136cc27afc794a68b0f2
Author: Aviral Goel <aviralg at users.noreply.github.com>
Date: 2026-04-15 (Wed, 15 Apr 2026)
Changed paths:
M clang/tools/clang-ssaf-format/CMakeLists.txt
Log Message:
-----------
[clang][ssaf] Fix plugin crash on AIX by adding `SUPPORT_PLUGINS` to `clang-ssaf-format` (#192292)
This change fixes a crash when running the `with-plugin.test` lit tests
on AIX. The crash is caused by a missing `-Wl, -brtl` linker flag.
Without this flag, the dynamic linker cannot resolve symbols from the
host executable when loading shared libraries via `dlopen`. So when the
plugin's static initializer runs and tries to register into the
`llvm::Registry` (calling `getRegistryLinkListInstance` defined in the
host via `LLVM_INSTANTIATE_REGISTRY`), the symbol resolves to `null`,
crashing the process.
The fix is to use `SUPPORT_PLUGINS` flag in `add_llvm_executable`, like
other tools in llvm. For AIX, this flag adds `-Wl, -brtl` to enable
runtime linking; for Non-AIX platforms, it sets `LLVM_NO_DEAD_STRIP` to
prevent the linker from stripping symbols that plugins reference at load
time.
Commit: 09bd12cccbc0dc1b66d482a62f56e8ddc5aa1e7c
https://github.com/llvm/llvm-project/commit/09bd12cccbc0dc1b66d482a62f56e8ddc5aa1e7c
Author: adams381 <adams at nvidia.com>
Date: 2026-04-15 (Wed, 15 Apr 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenCall.cpp
M clang/test/CIR/CodeGen/fp-math-precision-opts.c
A clang/test/CIR/CodeGen/nofpclass.c
Log Message:
-----------
[CIR] Add nofpclass for fast-math flags (#191455)
When `-menable-no-infs` or `-menable-no-nans` is set, OGCG adds
`nofpclass(nan inf)` to FP arguments and return values. CIR was missing
this.
Adds the check in `constructFunctionReturnAttributes` and
`constructFunctionArgumentAttributes`, gated on
`hasFloatingRepresentation()` (same condition classic codegen uses in
`canApplyNoFPClass`).
The MLIR LLVM dialect already has `llvm.nofpclass` from #188374, so only
the CIRGen side is needed here.
Test covers float, double, `_Complex double`, and a non-FP control case.
Made with [Cursor](https://cursor.com)
Commit: 75b9b7197dee865e8ca73ed26373d944c837ed09
https://github.com/llvm/llvm-project/commit/75b9b7197dee865e8ca73ed26373d944c837ed09
Author: sstwcw <su3e8a96kzlver at posteo.net>
Date: 2026-04-15 (Wed, 15 Apr 2026)
Changed paths:
M clang/lib/Format/FormatToken.h
M clang/lib/Format/FormatTokenLexer.cpp
M clang/lib/Format/FormatTokenLexer.h
M clang/lib/Format/UnwrappedLineParser.cpp
M clang/unittests/Format/FormatTestVerilog.cpp
M clang/unittests/Format/TokenAnnotatorTest.cpp
Log Message:
-----------
[clang-format] Skip protected data blocks in Verilog (#190695)
A Verilog file can have encrypted stuff (sections 34 and O in the spec).
This patch makes the formatter skip it. Previously the formatter could
mess it up by treating it as ordinary code.
Now the entire block following the `pragma protect` line is treated as a
single token.
The keywords added in this patch only mean special things in the pragma
lines. Thus they are not added to `VerilogExtraKeywords`.
While the files containing the stuff are machine generated, it is a bad
idea for a formatter to break code. For example, one may wish to run the
formatter on an entire project containing both ordinary and encrypted
files. Another use case is formatting the prototypes in files that
contain clear text prototypes in and encrypted implementation.
Commit: e47cbe9d046cc16cd113eeb56e4157558d649aae
https://github.com/llvm/llvm-project/commit/e47cbe9d046cc16cd113eeb56e4157558d649aae
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2026-04-15 (Wed, 15 Apr 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenExprAggregate.cpp
A clang/test/CIR/CodeGen/paren-init-list-eh.cpp
M clang/test/CIR/CodeGen/paren-init-list.cpp
Log Message:
-----------
[CIR] Implement cleanup handling for destructor ILE initializers (#192172)
This adds EH cleanup handling for C++ initializer list expressions
containing destructed types. The necessary support for deferred
deactivation cleanups was already in place, so this just needed to push
the deferred destroy cleanup when the init list element is constructed.
Commit: a152ed4369a43751087979d69d316b7e4cf190f1
https://github.com/llvm/llvm-project/commit/a152ed4369a43751087979d69d316b7e4cf190f1
Author: Zachary Yedidia <zyedidia at gmail.com>
Date: 2026-04-15 (Wed, 15 Apr 2026)
Changed paths:
M llvm/lib/MC/MCLFI.cpp
Log Message:
-----------
[LFI][NFC] Mark lfi-enable-rewriter flag as hidden (#192143)
This flag is meant for debugging so it should be hidden.
Commit: c3a22516888b94a4ad9919d0c224540fe1eb771c
https://github.com/llvm/llvm-project/commit/c3a22516888b94a4ad9919d0c224540fe1eb771c
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2026-04-15 (Wed, 15 Apr 2026)
Changed paths:
M flang/lib/Optimizer/CodeGen/CodeGen.cpp
M flang/test/Fir/CUDA/cuda-code-gen.mlir
Log Message:
-----------
[flang][cuda] Fix managed address space mismatch on host side (#192304)
Managed should not map to global
Commit: fced80904ca5eaf4e0361ba91f594d3cc902f125
https://github.com/llvm/llvm-project/commit/fced80904ca5eaf4e0361ba91f594d3cc902f125
Author: Jianhui Li <jian.hui.li at intel.com>
Date: 2026-04-15 (Wed, 15 Apr 2026)
Changed paths:
M mlir/include/mlir/Dialect/XeGPU/IR/XeGPUOps.td
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUPropagateLayout.cpp
M mlir/test/Dialect/XeGPU/propagate-layout-subgroup.mlir
M mlir/test/Dialect/XeGPU/resolve-layout-conflicts.mlir
Log Message:
-----------
[MLIR][XeGPU] Add propagation support for convert_layout op (#191598)
As title
Commit: c0f73c807ddad11f5262f570fee25479226b3fd3
https://github.com/llvm/llvm-project/commit/c0f73c807ddad11f5262f570fee25479226b3fd3
Author: Colin He <50345320+CPlusMinus2000 at users.noreply.github.com>
Date: 2026-04-15 (Wed, 15 Apr 2026)
Changed paths:
M mlir/lib/Transforms/Utils/DialectConversion.cpp
M mlir/test/Transforms/test-legalize-type-conversion.mlir
Log Message:
-----------
[mlir] Use a container with deterministic iteration order for unrealized materializations (#191323)
Iteration over unrealized materializations in DialectConversion is
non-deterministic as the materialization metadata is stored in a
DenseMap. Replacing with a Vector-backed `llvm::MapVector` restores
deterministic behaviour.
This container is iterated for example here:
https://github.com/llvm/llvm-project/blob/main/mlir/lib/Transforms/Utils/DialectConversion.cpp#L3250
Commit: 444d1cd76a34cceaf73712e9a5ed5c5bcb92b9ce
https://github.com/llvm/llvm-project/commit/444d1cd76a34cceaf73712e9a5ed5c5bcb92b9ce
Author: sstwcw <su3e8a96kzlver at posteo.net>
Date: 2026-04-15 (Wed, 15 Apr 2026)
Changed paths:
M clang/lib/Format/UnwrappedLineParser.cpp
Log Message:
-----------
[clang-format][NFC] Update comment (#192301)
The code changed in adba2aadf2.
Commit: 02fdc8f8de83e11785102c2972503c50252a9760
https://github.com/llvm/llvm-project/commit/02fdc8f8de83e11785102c2972503c50252a9760
Author: GeorgeHuyubo <113479859+GeorgeHuyubo at users.noreply.github.com>
Date: 2026-04-15 (Wed, 15 Apr 2026)
Changed paths:
M lldb/include/lldb/Core/Debugger.h
M lldb/include/lldb/Core/Statusline.h
M lldb/source/Core/Debugger.cpp
M lldb/source/Core/Statusline.cpp
M lldb/source/Target/Process.cpp
Log Message:
-----------
[lldb] Fix stale Symbol pointer crash in statusline after 'target symbols add' (#188377)
Context:
lldb might crash when running to a debuggee crashing state and do a
target symbols add command.
Backtrace:
```
#0 0x000055ca6790dc65 llvm::sys::PrintStackTrace(llvm::raw_ostream&, int) /home/hyubo/osmeta/external/llvm-project/llvm/lib/Support/Unix/Signals.inc:848:11
#1 0x000055ca6790e434 PrintStackTraceSignalHandler(void*) /home/hyubo/osmeta/external/llvm-project/llvm/lib/Support/Unix/Signals.inc:931:1
#2 0x000055ca6790b839 llvm::sys::RunSignalHandlers() /home/hyubo/osmeta/external/llvm-project/llvm/lib/Support/Signals.cpp:104:5
#3 0x000055ca6790ff6b SignalHandler(int, siginfo_t*, void*) /home/hyubo/osmeta/external/llvm-project/llvm/lib/Support/Unix/Signals.inc:430:38
#4 0x00007fe9e5e44560 __restore_rt /home/engshare/third-party2/glibc/2.34/src/glibc-2.34/signal/../sysdeps/unix/sysv/linux/libc_sigaction.c:13:0
#5 0x00007fe9e5f25649 syscall /home/engshare/third-party2/glibc/2.34/src/glibc-2.34/misc/../sysdeps/unix/sysv/linux/x86_64/syscall.S:38:0
#6 0x00007fe9ec649170 SignalHandler(int, siginfo_t*, void*) /home/hyubo/osmeta/external/llvm-project/llvm/lib/Support/Unix/Signals.inc:429:7
#7 0x00007fe9e5e44560 __restore_rt /home/engshare/third-party2/glibc/2.34/src/glibc-2.34/signal/../sysdeps/unix/sysv/linux/libc_sigaction.c:13:0
#8 0x00007fe9ebb77bf0 lldb_private::operator<(lldb_private::StackID const&, lldb_private::StackID const&) /home/hyubo/osmeta/external/llvm-project/lldb/source/Target/StackID.cpp:99:16
#9 0x00007fe9ebb6863d CompareStackID(std::shared_ptr<lldb_private::StackFrame> const&, lldb_private::StackID const&) /home/hyubo/osmeta/external/llvm-project/lldb/source/Target/StackFrameList.cpp:683:3
#10 0x00007fe9ebb6d049 bool __gnu_cxx::__ops::_Iter_comp_val<bool (*)(std::shared_ptr<lldb_private::StackFrame> const&, lldb_private::StackID const&)>::operator()<__gnu_cxx::__normal_iterator<std::shared_ptr<lldb_private::StackFrame>*, std::vector<std::shared_ptr<lldb_private::StackFrame>, std::allocator<std::shared_ptr<lldb_private::StackFrame>>>>, lldb_private::StackID const>(__gnu_cxx::__normal_iterator<std::shared_ptr<lldb_private::StackFrame>*, std::vector<std::shared_ptr<lldb_private::StackFrame>, std::allocator<std::shared_ptr<lldb_private::StackFrame>>>>, lldb_private::StackID const&) /mnt/gvfs/third-party2/libgcc/d1129753c8361ac8e9453c0f4291337a4507ebe6/11.x/platform010/5684a5a/include/c++/11.x/bits/predefined_ops.h:196:4
#11 0x00007fe9ebb6cefe __gnu_cxx::__normal_iterator<std::shared_ptr<lldb_private::StackFrame>*, std::vector<std::shared_ptr<lldb_private::StackFrame>, std::allocator<std::shared_ptr<lldb_private::StackFrame>>>> std::__lower_bound<__gnu_cxx::__normal_iterator<std::shared_ptr<lldb_private::StackFrame>*, std::vector<std::shared_ptr<lldb_private::StackFrame>, std::allocator<std::shared_ptr<lldb_private::StackFrame>>>>, lldb_private::StackID, __gnu_cxx::__ops::_Iter_comp_val<bool (*)(std::shared_ptr<lldb_private::StackFrame> const&, lldb_private::StackID const&)>>(__gnu_cxx::__normal_iterator<std::shared_ptr<lldb_private::StackFrame>*, std::vector<std::shared_ptr<lldb_private::StackFrame>, std::allocator<std::shared_ptr<lldb_private::StackFrame>>>>, __gnu_cxx::__normal_iterator<std::shared_ptr<lldb_private::StackFrame>*, std::vector<std::shared_ptr<lldb_private::StackFrame>, std::allocator<std::shared_ptr<lldb_private::StackFrame>>>>, lldb_private::StackID const&, __gnu_cxx::__ops::_Iter_comp_val<bool (*)(std::shared_ptr<lldb_private::StackFrame> const&, lldb_private::StackID const&)>) /mnt/gvfs/third-party2/libgcc/d1129753c8361ac8e9453c0f4291337a4507ebe6/11.x/platform010/5684a5a/include/c++/11.x/bits/stl_algobase.h:1464:8
#12 0x00007fe9ebb6cdfc __gnu_cxx::__normal_iterator<std::shared_ptr<lldb_private::StackFrame>*, std::vector<std::shared_ptr<lldb_private::StackFrame>, std::allocator<std::shared_ptr<lldb_private::StackFrame>>>> std::lower_bound<__gnu_cxx::__normal_iterator<std::shared_ptr<lldb_private::StackFrame>*, std::vector<std::shared_ptr<lldb_private::StackFrame>, std::allocator<std::shared_ptr<lldb_private::StackFrame>>>>, lldb_private::StackID, bool (*)(std::shared_ptr<lldb_private::StackFrame> const&, lldb_private::StackID const&)>(__gnu_cxx::__normal_iterator<std::shared_ptr<lldb_private::StackFrame>*, std::vector<std::shared_ptr<lldb_private::StackFrame>, std::allocator<std::shared_ptr<lldb_private::StackFrame>>>>, __gnu_cxx::__normal_iterator<std::shared_ptr<lldb_private::StackFrame>*, std::vector<std::shared_ptr<lldb_private::StackFrame>, std::allocator<std::shared_ptr<lldb_private::StackFrame>>>>, lldb_private::StackID const&, bool (*)(std::shared_ptr<lldb_private::StackFrame> const&, lldb_private::StackID const&)) /mnt/gvfs/third-party2/libgcc/d1129753c8361ac8e9453c0f4291337a4507ebe6/11.x/platform010/5684a5a/include/c++/11.x/bits/stl_algo.h:2062:14
#13 0x00007fe9ebb685fa auto llvm::lower_bound<std::vector<std::shared_ptr<lldb_private::StackFrame>, std::allocator<std::shared_ptr<lldb_private::StackFrame>>>&, lldb_private::StackID const&, bool (*)(std::shared_ptr<lldb_private::StackFrame> const&, lldb_private::StackID const&)>(std::vector<std::shared_ptr<lldb_private::StackFrame>, std::allocator<std::shared_ptr<lldb_private::StackFrame>>>&, lldb_private::StackID const&, bool (*)(std::shared_ptr<lldb_private::StackFrame> const&, lldb_private::StackID const&)) /home/hyubo/osmeta/external/llvm-project/llvm/include/llvm/ADT/STLExtras.h:2001:10
#14 0x00007fe9ebb68441 lldb_private::StackFrameList::GetFrameWithStackID(lldb_private::StackID const&) /home/hyubo/osmeta/external/llvm-project/lldb/source/Target/StackFrameList.cpp:697:11
#15 0x00007fe9ebbee395 lldb_private::Thread::GetFrameWithStackID(lldb_private::StackID const&) /home/hyubo/osmeta/external/llvm-project/lldb/include/lldb/Target/Thread.h:459:7
#16 0x00007fe9ebac7cf7 lldb_private::ExecutionContextRef::GetFrameSP() const /home/hyubo/osmeta/external/llvm-project/lldb/source/Target/ExecutionContext.cpp:643:25
#17 0x00007fe9ebac80e1 lldb_private::GetStoppedExecutionContext(lldb_private::ExecutionContextRef const*) /home/hyubo/osmeta/external/llvm-project/lldb/source/Target/ExecutionContext.cpp:164:34
#18 0x00007fe9eb8903fa lldb_private::Statusline::Redraw(std::optional<lldb_private::ExecutionContextRef>) /home/hyubo/osmeta/external/llvm-project/lldb/source/Core/Statusline.cpp:139:7
#19 0x00007fe9eb7ac8be lldb_private::Debugger::RedrawStatusline(std::optional<lldb_private::ExecutionContextRef>) /home/hyubo/osmeta/external/llvm-project/lldb/source/Core/Debugger.cpp:1233:3
#20 0x00007fe9eb804d1e lldb_private::IOHandlerEditline::RedrawCallback() /home/hyubo/osmeta/external/llvm-project/lldb/source/Core/IOHandler.cpp:446:3
#21 0x00007fe9eb80aa81 lldb_private::IOHandlerEditline::IOHandlerEditline(lldb_private::Debugger&, lldb_private::IOHandler::Type, std::shared_ptr<lldb_private::File> const&, std::shared_ptr<lldb_private::LockableStreamFile> const&, std::shared_ptr<lldb_private::LockableStreamFile> const&, unsigned int, char const*, llvm::StringRef, llvm::StringRef, bool, bool, unsigned int, lldb_private::IOHandlerDelegate&)::$_2::operator()() const /home/hyubo/osmeta/external/llvm-project/lldb/source/Core/IOHandler.cpp:262:73
#22 0x00007fe9eb80aa5d void llvm::detail::UniqueFunctionBase<void>::CallImpl<lldb_private::IOHandlerEditline::IOHandlerEditline(lldb_private::Debugger&, lldb_private::IOHandler::Type, std::shared_ptr<lldb_private::File> const&, std::shared_ptr<lldb_private::LockableStreamFile> const&, std::shared_ptr<lldb_private::LockableStreamFile> const&, unsigned int, char const*, llvm::StringRef, llvm::StringRef, bool, bool, unsigned int, lldb_private::IOHandlerDelegate&)::$_2>(void*) /home/hyubo/osmeta/external/llvm-project/llvm/include/llvm/ADT/FunctionExtras.h:213:5
#23 0x00007fe9eb93bfbf llvm::unique_function<void ()>::operator()() /home/hyubo/osmeta/external/llvm-project/llvm/include/llvm/ADT/FunctionExtras.h:365:5
#24 0x00007fe9eb93bb80 lldb_private::Editline::GetCharacter(wchar_t*) /home/hyubo/osmeta/external/llvm-project/lldb/source/Host/common/Editline.cpp:0:5
#25 0x00007fe9eb941a18 lldb_private::Editline::ConfigureEditor(bool)::$_0::operator()(editline*, wchar_t*) const /home/hyubo/osmeta/external/llvm-project/lldb/source/Host/common/Editline.cpp:1287:5
#26 0x00007fe9eb9419e2 lldb_private::Editline::ConfigureEditor(bool)::$_0::__invoke(editline*, wchar_t*) /home/hyubo/osmeta/external/llvm-project/lldb/source/Host/common/Editline.cpp:1286:27
#27 0x00007fe9f3384e26 el_getc /home/engshare/third-party2/libedit/3.1/src/libedit/src/read.c:439:14
#28 0x00007fe9f3384e26 el_getc /home/engshare/third-party2/libedit/3.1/src/libedit/src/read.c:400:1
#29 0x00007fe9f3384f90 read_getcmd /home/engshare/third-party2/libedit/3.1/src/libedit/src/read.c:247:14
#30 0x00007fe9f3384f90 el_gets /home/engshare/third-party2/libedit/3.1/src/libedit/src/read.c:586:14
#31 0x00007fe9eb9409f3 lldb_private::Editline::GetLine(std::__cxx11::basic_string<char, std::char_traits<char>, std::allocator<char>>&, bool&) /home/hyubo/osmeta/external/llvm-project/lldb/source/Host/common/Editline.cpp:1636:16
#32 0x00007fe9eb8044d7 lldb_private::IOHandlerEditline::GetLine(std::__cxx11::basic_string<char, std::char_traits<char>, std::allocator<char>>&, bool&) /home/hyubo/osmeta/external/llvm-project/lldb/source/Core/IOHandler.cpp:339:5
#33 0x00007fe9eb805609 lldb_private::IOHandlerEditline::Run() /home/hyubo/osmeta/external/llvm-project/lldb/source/Core/IOHandler.cpp:600:11
#34 0x00007fe9eb7b214c lldb_private::Debugger::RunIOHandlers() /home/hyubo/osmeta/external/llvm-project/lldb/source/Core/Debugger.cpp:1280:16
#35 0x00007fe9eb98f00f lldb_private::CommandInterpreter::RunCommandInterpreter(lldb_private::CommandInterpreterRunOptions&) /home/hyubo/osmeta/external/llvm-project/lldb/source/Interpreter/CommandInterpreter.cpp:3620:16
#36 0x00007fe9eb4f0e09 lldb::SBDebugger::RunCommandInterpreter(bool, bool) /home/hyubo/osmeta/external/llvm-project/lldb/source/API/SBDebugger.cpp:1234:42
#37 0x000055ca6788d6b0 Driver::MainLoop() /home/hyubo/osmeta/external/llvm-project/lldb/tools/driver/Driver.cpp:677:3
#38 0x000055ca6788e226 main /home/hyubo/osmeta/external/llvm-project/lldb/tools/driver/Driver.cpp:887:17
#39 0x00007fe9e5e2c657 __libc_start_call_main /home/engshare/third-party2/glibc/2.34/src/glibc-2.34/csu/../sysdeps/nptl/libc_start_call_main.h:58:16
#40 0x00007fe9e5e2c718 call_init /home/engshare/third-party2/glibc/2.34/src/glibc-2.34/csu/../csu/libc-start.c:128:20
#41 0x00007fe9e5e2c718 __libc_start_main at GLIBC_2.2.5 /home/engshare/third-party2/glibc/2.34/src/glibc-2.34/csu/../csu/libc-start.c:379:5
#42 0x000055ca67889a11 _start /home/engshare/third-party2/glibc/2.34/src/glibc-2.34/csu/../sysdeps/x86_64/start.S:118:0
Segmentation fault (core dumped)
```
When `target symbols add` is run, `Symtab::AddSymbol()` can reallocate
the underlying `std::vector<Symbol>` and resize it, invalidating all
existing Symbol* pointers. While `Process::Flush()` clears stale stack
frames, the statusline caches its own `ExecutionContextRef` containing a
`StackID` with a `SymbolContextScope*` (which can be a `Symbol*`). This
cached reference is not cleared by `Process::Flush()`, so the next
statusline redraw accesses a dangling pointer and crashes.
Fix this by adding `Statusline::Flush()` which clears the cached frame,
`Debugger::Flush()` which forwards to it under the statusline mutex, and
calling `Debugger::Flush()` from `Process::Flush()` so that all flush
paths (symbol add, exec, module load) also invalidate the statusline's
stale state.
After this fix, lldb is not crashing anymore, new symbols from a symbol
file are correctly loaded
---------
Co-authored-by: George Hu <georgehuyubo at gmail.com>
Commit: 27ff65192c0d4f3c5a6585d49da3ddb138a811b6
https://github.com/llvm/llvm-project/commit/27ff65192c0d4f3c5a6585d49da3ddb138a811b6
Author: Pekka Jääskeläinen <pekka.jaaskelainen at tuni.fi>
Date: 2026-04-15 (Wed, 15 Apr 2026)
Changed paths:
M clang/lib/Basic/Targets.cpp
M clang/lib/Basic/Targets/TCE.cpp
M clang/lib/Basic/Targets/TCE.h
M clang/lib/CodeGen/CodeGenModule.cpp
M clang/lib/Driver/Driver.cpp
M clang/lib/Driver/ToolChains/TCE.cpp
M clang/lib/Driver/ToolChains/TCE.h
M clang/test/CodeGen/target-data.c
M llvm/include/llvm/TargetParser/Triple.h
M llvm/lib/TargetParser/TargetDataLayout.cpp
M llvm/lib/TargetParser/Triple.cpp
Log Message:
-----------
[OpenASIP] Update the TCE target defs for OpenASIP 2.2 (#176698)
OpenASIP (ex. TCE*) is a special target which has only a stub target
definition in the LLVM side that has resided in LLVM for over 15 years.
I'm the original contributors of this stub.
Due to needing various other patches to LLVM that were not nicely
upstreamable, the upstream TCE target defs have long been unupdated.
However, with the recent changes to the vectorization types etc. I
managed to minimize the required LLVM TCE patch to this one and with
this patch OpenASIP can be (finally!) used without a patched LLVM for
VLIW/TTA customization. RISC-V operation set customization still
requires a patch to polish and upstream (TBD).
This patch:
* Introduces a 64b variant of an OpenASIP target.
* Unifies the datalayouts of the different target variants to make it
compatible with OpenASIP v2.2 and above.
* Updates the OpenCL address space IDs to be compatible with the latest
PoCL backends.
* Implements Triple::computeDataLayout() for completeness.
The patch is very unintrusive and I'd love to backport it in the LLVM 22
release as well.
[*] More info:
https://blog.llvm.org/2010/06/tce-project-co-design-of-application.html
https://openasip.org
The actual backends for the customized processors are generated on the
fly with a backend generator of the OpenASIP project based on a target
definition file and loaded as plugins to the LLVM framework. This
mechanism enables fast "design space exploration" of
application-specific processors designed with the toolset as only a
small part of the compiler has to be regenerated for new design
candidates.
Commit: 4df814a5c04fb0cb5c3d1afafe22b3ae2275fb3f
https://github.com/llvm/llvm-project/commit/4df814a5c04fb0cb5c3d1afafe22b3ae2275fb3f
Author: Jianhui Li <jian.hui.li at intel.com>
Date: 2026-04-15 (Wed, 15 Apr 2026)
Changed paths:
M mlir/include/mlir/Dialect/XeGPU/IR/XeGPUAttrs.td
M mlir/include/mlir/Dialect/XeGPU/IR/XeGPUDialect.td
M mlir/lib/Dialect/XeGPU/IR/XeGPUDialect.cpp
M mlir/lib/Dialect/XeGPU/IR/XeGPUOps.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUWgToSgDistribute.cpp
M mlir/test/Dialect/XeGPU/invalid.mlir
M mlir/test/Dialect/XeGPU/propagate-layout-subgroup.mlir
M mlir/test/Dialect/XeGPU/transform-ops.mlir
Log Message:
-----------
[MLIR][XeGPU] Refactor isEvenlyDistributable() to Layout attribute interface (#191945)
This PR refactor isEvenlyDistributable() to layout attribute interface
isDistributable(), and used them in all anchor operations to check the
shape can be ditributed with the anchor layout.
Commit: 9fb6c65cbb89339f61ce94d25eefa09443ef5eef
https://github.com/llvm/llvm-project/commit/9fb6c65cbb89339f61ce94d25eefa09443ef5eef
Author: Maryam Moghadas <maryammo at ca.ibm.com>
Date: 2026-04-15 (Wed, 15 Apr 2026)
Changed paths:
M llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
M llvm/lib/Target/PowerPC/PPCISelLowering.cpp
M llvm/lib/Target/PowerPC/PPCISelLowering.h
M llvm/lib/Target/PowerPC/PPCInstr64Bit.td
M llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
M llvm/lib/Target/PowerPC/PPCInstrInfo.h
M llvm/lib/Target/PowerPC/PPCInstrInfo.td
M llvm/test/CodeGen/PowerPC/amo-enable.ll
Log Message:
-----------
[PowerPC] Rework AMO load with Compare and Swap Not Equal to use post-RA pseudo expansion (#190698)
Replace the dummy call lowering with a PPCPostRAExpPseudo that hardcodes
X8/X9/X10 post-RA to satisfy the 3 consecutive register constraint for
lwat/ldat FC=16, addressing reviewer feedback.
Commit: cdfd0b60d2f30d91087227ea90f16e43af3ff875
https://github.com/llvm/llvm-project/commit/cdfd0b60d2f30d91087227ea90f16e43af3ff875
Author: Corentin Kerisit <corentin.kerisit at gmail.com>
Date: 2026-04-15 (Wed, 15 Apr 2026)
Changed paths:
M clang/lib/Headers/__clang_cuda_runtime_wrapper.h
Log Message:
-----------
[CUDA] Change __CUDACC__ definition to 1 (#189457)
I recently encountered an issue where `nccl` used `#if __CUDACC__` ,
assuming `__CUDACC__` is not only defined but having a #if-able value.
https://github.com/NVIDIA/nccl/blob/v2.28.3-1/src/include/nccl_device/coop.h#L18
Looking at nvcc invocation, I see that:
```
echo "" | nvcc -x cu -E -Xcompiler -dM - | grep __CUDACC__
#define __CUDACC__ 1
```
Changing __CUDACC__ to 1 to match what NVIDIA downstream code
assumptions.
Commit: 89e736d1df16ee8aea85eb22eb625482e7e9eae2
https://github.com/llvm/llvm-project/commit/89e736d1df16ee8aea85eb22eb625482e7e9eae2
Author: Slava Zakharin <szakharin at nvidia.com>
Date: 2026-04-15 (Wed, 15 Apr 2026)
Changed paths:
M flang/lib/Optimizer/Analysis/AliasAnalysis.cpp
A flang/test/Analysis/AliasAnalysis/modref-call-memory-effects.fir
M flang/test/lib/Analysis/AliasAnalysis/TestAliasAnalysis.cpp
Log Message:
-----------
[flang][test] Experimental support of MemoryEffectOpInterface for fir.call. (#191580)
I would like to experiment with `fir.call` implementing
`MemoryEffectOpInterface`. So the main change is the fall-through
path in FIR AA. It should be NFC for Flang.
Commit: e540f8006fb1902671d80308fa6ebd79b6231d4b
https://github.com/llvm/llvm-project/commit/e540f8006fb1902671d80308fa6ebd79b6231d4b
Author: Moazin K. <moazinkhatri at gmail.com>
Date: 2026-04-15 (Wed, 15 Apr 2026)
Changed paths:
M flang/include/flang/Optimizer/Dialect/FIROps.td
M flang/lib/Optimizer/Dialect/FIROps.cpp
A flang/test/Fir/box-elesize-canonicalize.fir
M flang/test/Lower/volatile-string.f90
Log Message:
-----------
[flang] implements a rewrite pattern to constant fold fir::BoxEleSizeOp (#192320)
Implements a rewrite pattern to constant fold an `fir::BoxEleSizeOp`
when possible.
Commit: 35dcb5c1303b251d8728bd4f8ed93ff4316eea3a
https://github.com/llvm/llvm-project/commit/35dcb5c1303b251d8728bd4f8ed93ff4316eea3a
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2026-04-15 (Wed, 15 Apr 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenDecl.cpp
M clang/lib/CIR/CodeGen/CIRGenExprAggregate.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
A clang/test/CIR/CodeGen/cleanup-automatic-eh.cpp
Log Message:
-----------
[CIR] Add EH handling for lifetime extended cleanups (#192305)
This adds code to call pushDestroyAndDeferDeactivation from the
pushLifetimeExtendedDestroy function. This was needed to generate the
correct code for lifetime extended cleanups when exceptions are enabled.
An extended version of the cleanup with automatic storage duration is
used as a test case.
To make this work correctly, I had to add a CleanupDeactivationScope to
RunCleanupsScope and force deactivation when forceCleanup is called.
This matches the corresponding code in classic codegen.
I surveyed other places where classic codegen is using
CleanupDeactivationScope and added a MissingFeatures marker in one
location where it was not previously marked. Other places where it was
missing were already marked in this way.
Commit: 7c08b8ea10d87988f070b12afa873ccb14bb1e9f
https://github.com/llvm/llvm-project/commit/7c08b8ea10d87988f070b12afa873ccb14bb1e9f
Author: PiJoules <leonardchan at google.com>
Date: 2026-04-15 (Wed, 15 Apr 2026)
Changed paths:
M compiler-rt/lib/hwasan/hwasan_mapping.h
Log Message:
-----------
[compiler-rt][Fuchsia] Use dynamic shadow global in hwasan runtime (#192148)
For now, the global is still default initialized to zero.
Commit: 957f6f6e791b8e12abd91ef1e8815d69dc360a70
https://github.com/llvm/llvm-project/commit/957f6f6e791b8e12abd91ef1e8815d69dc360a70
Author: vangthao95 <vang.thao at amd.com>
Date: 2026-04-15 (Wed, 15 Apr 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeHelper.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.h
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.buffer.prefetch.data.ll
Log Message:
-----------
AMDGPU/GlobalISel: RegBankLegalize rules for G_AMDGPU_S_BUFFER_PREFETCH (#191315)
Commit: c859d7e76155a1257563212d0ab909e45d037d6f
https://github.com/llvm/llvm-project/commit/c859d7e76155a1257563212d0ab909e45d037d6f
Author: Konrad Kleine <kkleine at redhat.com>
Date: 2026-04-15 (Wed, 15 Apr 2026)
Changed paths:
M llvm/lib/DebugInfo/DWARF/DWARFAcceleratorTable.cpp
Log Message:
-----------
[llvm][DebugInfo] Use formatv in DWARFAcceleratorTable (#191981)
This relates to #35980.
Commit: 1202ddcfe067d5ceab199266e98c098c06ce98a3
https://github.com/llvm/llvm-project/commit/1202ddcfe067d5ceab199266e98c098c06ce98a3
Author: vangthao95 <vang.thao at amd.com>
Date: 2026-04-15 (Wed, 15 Apr 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUSearchableTables.td
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/always_uniform.ll
Log Message:
-----------
[AMDGPU] Mark s_get_*_barrier_state intrinsics always uniform (#192190)
Both intrinsics return a 32-bit SGPR value containing the barrier's
member count and signal count.
Commit: 5c928535c0ae18f37e47faa9bb265ea75f1700c4
https://github.com/llvm/llvm-project/commit/5c928535c0ae18f37e47faa9bb265ea75f1700c4
Author: Jan Svoboda <jan_svoboda at apple.com>
Date: 2026-04-15 (Wed, 15 Apr 2026)
Changed paths:
M clang/include/clang/Serialization/InMemoryModuleCache.h
M clang/include/clang/Serialization/ModuleCache.h
M clang/include/clang/Serialization/ModuleManager.h
M clang/lib/DependencyScanning/InProcessModuleCache.cpp
M clang/lib/Frontend/CompilerInstance.cpp
M clang/lib/Serialization/ASTReader.cpp
M clang/lib/Serialization/InMemoryModuleCache.cpp
M clang/lib/Serialization/ModuleCache.cpp
M clang/lib/Serialization/ModuleManager.cpp
M clang/unittests/Serialization/InMemoryModuleCacheTest.cpp
Log Message:
-----------
[clang] Store size & mtime in in-memory module cache (#190207)
In this PR, the in-memory module cache now stores the size and
modification time of PCM files. This is needed so that the
`ModuleManager` doesn't need to consult the file system to obtain this
information, which _might_ be in a different state than when we stored
the PCM file buffer into the in-memory cache.
Commit: ae4a02f9a8815b1a342bb83f3a6eb1bb177a6b40
https://github.com/llvm/llvm-project/commit/ae4a02f9a8815b1a342bb83f3a6eb1bb177a6b40
Author: vangthao95 <vang.thao at amd.com>
Date: 2026-04-15 (Wed, 15 Apr 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
M llvm/test/CodeGen/AMDGPU/asyncmark-gfx12plus.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.global.load.async.to.lds.ll
Log Message:
-----------
AMDGPU/GlobalISel: RegBankLegalize rules for async LDS loads (#192179)
Add RegBankLegalize rules for async LDS load intrinsics:
llvm.amdgcn.asyncmark
llvm.amdgcn.wait.asyncmark
llvm.amdgcn.global.load.async.to.lds.b8
llvm.amdgcn.global.load.async.to.lds.b32
llvm.amdgcn.global.load.async.to.lds.b64
llvm.amdgcn.global.load.async.to.lds.b128
Commit: cbe64931e791ba565b4dea3eab30135326531777
https://github.com/llvm/llvm-project/commit/cbe64931e791ba565b4dea3eab30135326531777
Author: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
Date: 2026-04-15 (Wed, 15 Apr 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstructions.td
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.128bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.16bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.48bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.64bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.96bit.ll
M llvm/test/CodeGen/AMDGPU/atomicrmw-bf16-gfx11plus.ll
M llvm/test/CodeGen/AMDGPU/bf16-conversions.ll
M llvm/test/CodeGen/AMDGPU/bf16-math.ll
M llvm/test/CodeGen/AMDGPU/bf16.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fmax.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fmin.ll
M llvm/test/CodeGen/AMDGPU/dagcombine-fmul-sel.ll
M llvm/test/CodeGen/AMDGPU/divergence-driven-buildvector.ll
M llvm/test/CodeGen/AMDGPU/fabs.bf16.ll
M llvm/test/CodeGen/AMDGPU/fcanonicalize-elimination.bf16.ll
M llvm/test/CodeGen/AMDGPU/fcanonicalize.bf16.ll
M llvm/test/CodeGen/AMDGPU/fdiv.bf16.ll
M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fmax.ll
M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fmin.ll
M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fsub.ll
M llvm/test/CodeGen/AMDGPU/flat-saddr-load.ll
M llvm/test/CodeGen/AMDGPU/fmax3-maximumnum.ll
M llvm/test/CodeGen/AMDGPU/fmed3.bf16.ll
M llvm/test/CodeGen/AMDGPU/fmin3-minimumnum.ll
M llvm/test/CodeGen/AMDGPU/fptosi-sat-vector.ll
M llvm/test/CodeGen/AMDGPU/fptoui-sat-vector.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fmax.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fmin.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fsub.ll
M llvm/test/CodeGen/AMDGPU/global-load-xcnt.ll
M llvm/test/CodeGen/AMDGPU/global-saddr-load.ll
M llvm/test/CodeGen/AMDGPU/isel-amdgpu-cs-chain-preserve-cc.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ballot.i32.ll
M llvm/test/CodeGen/AMDGPU/llvm.exp2.bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.log.ll
M llvm/test/CodeGen/AMDGPU/llvm.log10.ll
M llvm/test/CodeGen/AMDGPU/llvm.log2.ll
M llvm/test/CodeGen/AMDGPU/mad-mix-bf16.ll
M llvm/test/CodeGen/AMDGPU/mad-mix-hi-bf16.ll
M llvm/test/CodeGen/AMDGPU/mad-mix-hi.ll
M llvm/test/CodeGen/AMDGPU/maximumnum.bf16.ll
M llvm/test/CodeGen/AMDGPU/minimumnum.bf16.ll
M llvm/test/CodeGen/AMDGPU/minmax3-tree-reduction.ll
Log Message:
-----------
[AMDGPU] Enable true16 pattern to build vectors (0, vgpr) (#191896)
Fixes: https://github.com/llvm/llvm-project/issues/190796
Commit: 66432130ac1cd4be97772cd6455bd433dd35a179
https://github.com/llvm/llvm-project/commit/66432130ac1cd4be97772cd6455bd433dd35a179
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-04-15 (Wed, 15 Apr 2026)
Changed paths:
M mlir/lib/Dialect/SPIRV/IR/SPIRVOps.cpp
M mlir/test/Dialect/SPIRV/IR/structure-ops.mlir
Log Message:
-----------
[mlir][SPIR-V] Reject initializer on Import-linkage GlobalVariable (#192302)
Per the SPIR-V spec, a module-scope OpVariable with Import linkage must
not have an initializer
Commit: 76d7fddd411c58510f93ef246b2b22cc45c5f120
https://github.com/llvm/llvm-project/commit/76d7fddd411c58510f93ef246b2b22cc45c5f120
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2026-04-15 (Wed, 15 Apr 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenExprAggregate.cpp
M clang/lib/CIR/CodeGen/CIRGenStmt.cpp
M clang/test/CIR/CodeGen/abstract-cond.c
M clang/test/CIR/CodeGen/cleanup-conditional-eh.cpp
M clang/test/CIR/CodeGen/cleanup-conditional.cpp
M clang/test/CIR/CodeGen/coro-task.cpp
M clang/test/CIR/CodeGen/dtors.cpp
M clang/test/CIR/CodeGen/initializer-list-two-pointers.cpp
M clang/test/CIR/CodeGen/instantiate-init.cpp
M clang/test/CIR/CodeGen/lambda-dtor-field.cpp
M clang/test/CIR/CodeGen/lambda.cpp
M clang/test/CIR/CodeGen/new-delete-deactivation.cpp
M clang/test/CIR/CodeGen/paren-init-list-eh.cpp
M clang/test/CIR/CodeGen/paren-init-list.cpp
M clang/test/CIR/CodeGen/statement-exprs.c
M clang/test/CIR/CodeGen/trivial-ctor-const-init.cpp
M clang/test/CIR/CodeGenBuiltins/builtin-bit-cast.cpp
Log Message:
-----------
[CIR] Simplify expr with cleanup scopes (#192344)
This change simplifies the level of scopes we build around aggregate
expressions with cleanups and return values involving expressions with
cleanups. This removes unnecessary scopes and lexical scopes that were
created around the expressions and brings the code back into alignment
with the corresponding classic codegen implementation of these handlers.
Commit: 151d5366b66d273f1fccbc9a977aeecd04718c48
https://github.com/llvm/llvm-project/commit/151d5366b66d273f1fccbc9a977aeecd04718c48
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-04-15 (Wed, 15 Apr 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
Log Message:
-----------
[VPlan] Remove VPConstantInt restriction for epilogue fold (NFC) (#192345)
The restriction is not needed currently. Removing it generalizes the
pattern in preparation of future changes.
Commit: d1e1d54befaa58fd969edb106712eb6fb8944ff3
https://github.com/llvm/llvm-project/commit/d1e1d54befaa58fd969edb106712eb6fb8944ff3
Author: Jasmine Tang <jjasmine at igalia.com>
Date: 2026-04-15 (Wed, 15 Apr 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-fexp2.mir
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.exp2.ll
Log Message:
-----------
[AMDGPU]: Add regbank legalize rules for amdgcn exp2 intrinsics (#191953)
Commit: 925e2c67831d47b69dcd50d6c4de4e0442b33e53
https://github.com/llvm/llvm-project/commit/925e2c67831d47b69dcd50d6c4de4e0442b33e53
Author: Ryan Mansfield <ryan_mansfield at apple.com>
Date: 2026-04-15 (Wed, 15 Apr 2026)
Changed paths:
M clang/tools/libclang/CMakeLists.txt
Log Message:
-----------
[Clang][CMake] Fix libclang.dylib not relinking when libclang.map changes (#189698)
Commit: bbc6a54f54467de1a459298d8a8390307223f3df
https://github.com/llvm/llvm-project/commit/bbc6a54f54467de1a459298d8a8390307223f3df
Author: Nishant Patel <nishant.b.patel at intel.com>
Date: 2026-04-15 (Wed, 15 Apr 2026)
Changed paths:
M mlir/include/mlir/Dialect/XeGPU/IR/XeGPUAttrs.td
M mlir/include/mlir/Dialect/XeGPU/IR/XeGPUOps.td
M mlir/include/mlir/Dialect/XeGPU/IR/XeGPUTypes.td
M mlir/lib/Conversion/XeGPUToXeVM/XeGPUToXeVM.cpp
M mlir/lib/Dialect/XeGPU/IR/XeGPUDialect.cpp
M mlir/lib/Dialect/XeGPU/IR/XeGPUOps.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUBlocking.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUPropagateLayout.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUSubgroupDistribute.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUUnroll.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUWgToSgDistribute.cpp
M mlir/lib/Dialect/XeGPU/Utils/XeGPUUtils.cpp
M mlir/test/Dialect/XeGPU/invalid.mlir
M mlir/test/Dialect/XeGPU/ops.mlir
M mlir/test/Dialect/XeGPU/propagate-layout.mlir
M mlir/test/Dialect/XeGPU/xegpu-blocking.mlir
M mlir/test/Dialect/XeGPU/xegpu-unroll-patterns.mlir
M mlir/test/lib/Dialect/XeGPU/TestXeGPUTransforms.cpp
Log Message:
-----------
[MLIR][XeGPU] Remove create tdesc & update offset op from xegpu dialect (#182804)
This PR removes create_tdesc and update_offset ops from the XeGPU
dialect, as scatter load/store/prefetch now accept memref+offsets
directly.
Commit: 5dc1fd4c3cee70cbace96ba085abeccae7c67c22
https://github.com/llvm/llvm-project/commit/5dc1fd4c3cee70cbace96ba085abeccae7c67c22
Author: Jan Leyonberg <jan_sjodin at yahoo.com>
Date: 2026-04-15 (Wed, 15 Apr 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenCall.cpp
A clang/test/CIR/CodeGen/amdgpu-call-addrspace-cast.cpp
Log Message:
-----------
[CIR] Add address space casts for pointer arguments when creating a call (#192303)
This patch checks if the expected type for an argument is the same as
the actual type. If types are pointers but with different address spaces
then add an address space cast to make the pointer types match.
Assised-by: Cursor / Claude Opus 4.6
Commit: d430d89d5550e2e5aa1a72c7e5e1232ef1766da6
https://github.com/llvm/llvm-project/commit/d430d89d5550e2e5aa1a72c7e5e1232ef1766da6
Author: David Rivera <davidriverg at gmail.com>
Date: 2026-04-15 (Wed, 15 Apr 2026)
Changed paths:
M clang/lib/CIR/Dialect/Transforms/LoweringPrepare.cpp
M clang/test/CIR/CodeGenCUDA/device-stub.cu
Log Message:
-----------
[CIR][CUDA] Do Runtime Kernel Registration (#188926)
Related:
https://github.com/issues/assigned?issue=llvm%7Cllvm-project%7C179278,
https://github.com/llvm/llvm-project/issues/175871
More registration shenanigans -> Generates `__cuda_register_globals`
that associates the fatbin with kernels that contain `__global__`
qualifiers with the runtime.
Generated equivalent runtime code:
``` C
// Called once per kernel to register it with the CUDA runtime.
void __cuda_register_globals(void **fatbinHandle) {
__cudaRegisterFunction(
fatbinHandle,
(const char *)&_Z25__device_stub__kernelfunciii, // host-side stub ptr
(char *)__cuda_kernelname_str, // device-side mangled name
(char *)__cuda_kernelname_str, // device-side mangled name
-1, // thread limit (-1 = no limit)
NULL, NULL, NULL, NULL, NULL
);
}
void __cuda_module_ctor() {
__cuda_gpubin_handle = __cudaRegisterFatBinary(&__cuda_fatbin_wrapper);
__cuda_register_globals(__cuda_gpubin_handle); // ==== NEW
// TODO: Register shadow variables
__cudaRegisterFatBinaryEnd(__cuda_gpubin_handle); // CUDA >= 10.1
atexit(__cuda_module_dtor);
}
```
Commit: eab567a3eac0a8e3a565dd40159632ee9f569538
https://github.com/llvm/llvm-project/commit/eab567a3eac0a8e3a565dd40159632ee9f569538
Author: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
Date: 2026-04-15 (Wed, 15 Apr 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstructions.td
M llvm/test/CodeGen/AMDGPU/add.v2i16.ll
M llvm/test/CodeGen/AMDGPU/build_vector.gfx11plus.ll
M llvm/test/CodeGen/AMDGPU/divergence-driven-buildvector.ll
M llvm/test/CodeGen/AMDGPU/fcanonicalize.f16.ll
M llvm/test/CodeGen/AMDGPU/flat-saddr-load.ll
M llvm/test/CodeGen/AMDGPU/global-saddr-load.ll
M llvm/test/CodeGen/AMDGPU/sub.v2i16.ll
M llvm/test/CodeGen/AMDGPU/true16-imm-folded-to-0-regression.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-umax.ll
Log Message:
-----------
[AMDGPU] Add true16 patterns for build_vector (vgpr, 0) (#192147)
It is shorter than VOP3 `and` instruction and in some cases
can save a second move.
Commit: 5b979f51e38b50d57c370c0c9b27688c032f6570
https://github.com/llvm/llvm-project/commit/5b979f51e38b50d57c370c0c9b27688c032f6570
Author: David CARLIER <devnexen at gmail.com>
Date: 2026-04-15 (Wed, 15 Apr 2026)
Changed paths:
M bolt/lib/Passes/Instrumentation.cpp
Log Message:
-----------
[BOLT][Passes] use ADT containers for instrumentation spanning tree. (#192289)
Swap `std::unordered_map<…, std::set<…>>` for
`DenseMap<…, SmallVector<…>>` in `Instrumentation::instrumentFunction`
and switch read paths from `STOutSet[&BB]` to `find()`. This removes
per-set heap allocations, stops inserting empty buckets on every probe,
and replaces linear `is_contained()` scans over a red-black tree with
linear scans over inline `SmallVector` storage (most basic blocks have
at most a couple of spanning-tree out-edges). NFC.
Commit: b2af653a88756b23071f68447bc5c8aba564f9a7
https://github.com/llvm/llvm-project/commit/b2af653a88756b23071f68447bc5c8aba564f9a7
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2026-04-15 (Wed, 15 Apr 2026)
Changed paths:
M clang/include/clang/CIR/MissingFeatures.h
M clang/lib/CIR/CodeGen/CIRGenClass.cpp
M clang/lib/CIR/CodeGen/CIRGenExprAggregate.cpp
M clang/lib/CIR/CodeGen/CIRGenStmt.cpp
Log Message:
-----------
[CIR][NFC] Convert MissingFeatures::requiresCleanups to errorNYI (#192350)
This change adds errorNYI calls in two places that we previously had
requiresCleanups() missing features markers, adds a more specific
missing feature marker for loops, removes one requiresCleanups() where
the handling was already implemented, and deletes a bunch of missing
feature markers there were never used.
Commit: 0a4d3b3543053d90de46d97bc60cfcc9b92abd35
https://github.com/llvm/llvm-project/commit/0a4d3b3543053d90de46d97bc60cfcc9b92abd35
Author: adams381 <adams at nvidia.com>
Date: 2026-04-15 (Wed, 15 Apr 2026)
Changed paths:
A clang/test/CIR/CodeGen/attr-noundef.cpp
A clang/test/CIR/CodeGenCXX/uncopyable-args.cpp
A clang/test/CIR/CodeGenCXX/x86_64-arguments.cpp
Log Message:
-----------
[CIR][ABI][NFC] Add x86_64 ABI parity tests (#191259)
Add three test files for CIR ABI parity on x86_64, all with
CIR/LLVM/OGCG checks:
- uncopyable-args.cpp — 24 functions covering non-copyable and
move-only types (trivial, default-ctor, move-ctor, etc.)
- x86_64-arguments.cpp — 26 functions covering C++ struct passing,
inheritance, member pointers, empty bases, packed structs
- attr-noundef.cpp — 26 functions covering noundef placement on
structs, unions, vectors, member pointers, _BitInt
Made with [Cursor](https://cursor.com)
Commit: f834a48f78077c96f05635effc2ed59d91633aeb
https://github.com/llvm/llvm-project/commit/f834a48f78077c96f05635effc2ed59d91633aeb
Author: adams381 <adams at nvidia.com>
Date: 2026-04-15 (Wed, 15 Apr 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenCall.cpp
A clang/test/CIR/CodeGen/trivial-abi.cpp
Log Message:
-----------
[CIR][ABI] Handle callee-destructed params for trivial_abi (#191257)
Replace errorNYI for isParamDestroyedInCallee with working
implementation: create aggregate temp, mark externally destructed,
emit expr. Unblocks [[trivial_abi]] types on Itanium ABI.
Adds trivial-abi.cpp test covering 17 cases from
CodeGenCXX/trivial_abi.cpp with CIR/LLVM/OGCG checks.
Made with [Cursor](https://cursor.com)
Commit: a3af640a1b5c61e7f31c7212338cd348d9b4a132
https://github.com/llvm/llvm-project/commit/a3af640a1b5c61e7f31c7212338cd348d9b4a132
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2026-04-15 (Wed, 15 Apr 2026)
Changed paths:
M flang/include/flang/Evaluate/tools.h
M flang/lib/Evaluate/tools.cpp
M flang/lib/Semantics/check-cuda.cpp
M flang/test/Lower/CUDA/cuda-data-transfer.cuf
Log Message:
-----------
[flang][cuda] Avoid false positive on multi device symbol with components (#192177)
Semantic was wrongly flagging derived-type components as two device
resident object. Update how we collect symbols and count the number of
device resident object.
Commit: 561cf0c4f5f7c48b434c6c363c233a1b97b0ee63
https://github.com/llvm/llvm-project/commit/561cf0c4f5f7c48b434c6c363c233a1b97b0ee63
Author: Arthur Eubanks <aeubanks at google.com>
Date: 2026-04-15 (Wed, 15 Apr 2026)
Changed paths:
M clang/lib/CodeGen/CodeGenAction.cpp
M flang/lib/Frontend/CompilerInstance.cpp
M llvm/include/llvm/IR/PassTimingInfo.h
M llvm/include/llvm/Pass.h
M llvm/lib/CodeGen/RegAllocBase.cpp
M llvm/lib/CodeGen/RegAllocGreedy.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
M llvm/lib/IRReader/IRReader.cpp
M llvm/lib/Target/AMDGPU/AMDGPUSplitModule.cpp
M llvm/unittests/IR/TimePassesTest.cpp
Log Message:
-----------
[NFC] Move TimePasses globals from Pass.h to PassTimingInfo.h (#192352)
They don't belong in the legacy pass manager-specific header, they apply
to both pass managers, plus the pass manager isn't the right layer to
put the bools anyway.
Commit: 2537596d2292d32e029dbccf4ecee55202c8ec64
https://github.com/llvm/llvm-project/commit/2537596d2292d32e029dbccf4ecee55202c8ec64
Author: Michael Spencer <bigcheesegs at gmail.com>
Date: 2026-04-15 (Wed, 15 Apr 2026)
Changed paths:
M clang/include/clang/Basic/DiagnosticLexKinds.td
M clang/include/clang/Basic/Module.h
M clang/include/clang/Lex/ModuleMap.h
M clang/lib/Lex/ModuleMap.cpp
A clang/test/Modules/duplicate-header-ownership.c
Log Message:
-----------
[clang][modules] Diagnose headers owned by multiple modules (#188538)
Add -Wduplicate-header-ownership, an off by default warning that fires
at include time when a header is owned by multiple top-level modules.
This helps catch overlapping module maps that can cause confusing module
resolution.
Assisted-by: claude-opus-4.6
Commit: e0e2c8d9e065df78c17c4ed34a8133e2a863d94f
https://github.com/llvm/llvm-project/commit/e0e2c8d9e065df78c17c4ed34a8133e2a863d94f
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2026-04-15 (Wed, 15 Apr 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenClass.cpp
A clang/test/CIR/CodeGen/base-init-eh.cpp
Log Message:
-----------
[CIR] Implement EH handling for base class initializer (#192358)
This implements exception handling when a base class initializer is
called from a dervied class' constructor. The cleanup handler to call
the base class dtor was already implemented. We just needed to push the
cleanup on the EH stack.
Commit: cf536231f0be2cdc3d57172a4dfa6e116c550fb6
https://github.com/llvm/llvm-project/commit/cf536231f0be2cdc3d57172a4dfa6e116c550fb6
Author: yronglin <yronglin777 at gmail.com>
Date: 2026-04-16 (Thu, 16 Apr 2026)
Changed paths:
M clang/include/clang/Basic/DiagnosticLexKinds.td
M clang/include/clang/Frontend/CompilerInstance.h
M clang/include/clang/Lex/Preprocessor.h
M clang/lib/Frontend/CompilerInstance.cpp
M clang/lib/Lex/DependencyDirectivesScanner.cpp
M clang/lib/Lex/Lexer.cpp
M clang/lib/Lex/PPDirectives.cpp
M clang/lib/Lex/PPLexerChange.cpp
M clang/lib/Lex/Preprocessor.cpp
M clang/test/Modules/lookup.cpp
M clang/test/Modules/no-stale-modtime.m
A clang/test/Modules/objc-at-import.m
M clang/unittests/Lex/DependencyDirectivesScannerTest.cpp
M clang/utils/ClangVisualizers/clang.natvis
M lldb/test/Shell/Expr/TestClangModuleLoadError_FromExpression.test
Log Message:
-----------
Reapply "[ObjC][Preprocessor] Handle @import directive as a pp-directive" (#189174)
This PR reapply https://github.com/llvm/llvm-project/pull/157726.
Depends: https://github.com/llvm/llvm-project/pull/107168
This patch handle `@import` as a preprocessing directive, and since this
patch, the following import directive will be ill-formed:
```
@import Foo\n;
```
---------
Signed-off-by: yronglin <yronglin777 at gmail.com>
Commit: 18bed37e5ddadb1bf7a3439b746deb43a23699d5
https://github.com/llvm/llvm-project/commit/18bed37e5ddadb1bf7a3439b746deb43a23699d5
Author: Kevin Sala Penades <salapenades1 at llnl.gov>
Date: 2026-04-15 (Wed, 15 Apr 2026)
Changed paths:
M offload/CMakeLists.txt
M offload/plugins-nextgen/cuda/CMakeLists.txt
M offload/plugins-nextgen/cuda/src/rtl.cpp
M offload/test/CMakeLists.txt
M offload/unittests/CMakeLists.txt
M openmp/docs/Building.md
Log Message:
-----------
[offload][OpenMP] Require CUDA 11.8 (#191100)
Commit: 75143099f9c8f56a799c1c89f225debb9caf20f0
https://github.com/llvm/llvm-project/commit/75143099f9c8f56a799c1c89f225debb9caf20f0
Author: Yonah Goldberg <ygoldberg at nvidia.com>
Date: 2026-04-15 (Wed, 15 Apr 2026)
Changed paths:
M llvm/lib/CodeGen/AtomicExpandPass.cpp
M llvm/test/CodeGen/AMDGPU/unsupported-atomics.ll
A llvm/test/CodeGen/NVPTX/atomic-alignment.err.ll
M llvm/test/CodeGen/NVPTX/atomicrmw-expand.err.ll
M llvm/test/CodeGen/NVPTX/atomics-b128.ll
M llvm/test/CodeGen/NVPTX/load-store-atomic.err.ll
M llvm/test/Transforms/AtomicExpand/AMDGPU/unaligned-atomic.ll
Log Message:
-----------
[AtomicExpandPass] Improve atomic expand error messages (#188380)
AtomicExpandPass tells you that an operation is not supported but not why.
Commit: 326a9fa5631ebb497c1137d28469186a76f583ed
https://github.com/llvm/llvm-project/commit/326a9fa5631ebb497c1137d28469186a76f583ed
Author: Zhaoxuan Jiang <jiangzhaoxuan94 at gmail.com>
Date: 2026-04-15 (Wed, 15 Apr 2026)
Changed paths:
M lld/MachO/Arch/ARM64.cpp
M lld/MachO/ConcatOutputSection.cpp
M lld/MachO/ConcatOutputSection.h
M lld/MachO/InputSection.cpp
M lld/MachO/InputSection.h
M lld/MachO/Target.h
A lld/test/MachO/arm64-thunk-branch-addend.s
Log Message:
-----------
[lld][MachO] Key branch-extension thunks on (referent, addend) (#191808)
TextOutputSection::finalize ignored branch relocation addends. Two call
sites branching to the same symbol with different addends therefore
collapsed onto a single thunk.
Key thunkMap on (isec, value, addend) so two call sites with different
addends get independent thunks. The addend is encoded in the thunk's
relocs and is zeroed at the call site after the callee is redirected to
the thunk. Thunk names carry a `+N` suffix when the addend is non-zero.
Commit: 7780e546771cc9a206590c802a9f1b4e4cbd08f6
https://github.com/llvm/llvm-project/commit/7780e546771cc9a206590c802a9f1b4e4cbd08f6
Author: Jim Lin <jim at andestech.com>
Date: 2026-04-16 (Thu, 16 Apr 2026)
Changed paths:
M llvm/include/llvm/CodeGen/AsmPrinterAnalysis.h
Log Message:
-----------
[AsmPrinter] Fix AsmPrinterAnalysis::Result::invalidate to take PreservedAnalyses by const reference (#191742)
The invalidate method was taking PreservedAnalyses by value instead of
by const reference, causing an unnecessary copy on every invalidation
query. All other analysis invalidate methods in LLVM use const
reference.
Co-authored-by: Claude Opus 4.6 (1M context) <noreply at anthropic.com>
Commit: 4a24c685fe4433e86c1022c7fd0b5d5fa3c40e18
https://github.com/llvm/llvm-project/commit/4a24c685fe4433e86c1022c7fd0b5d5fa3c40e18
Author: Jim Lin <jim at andestech.com>
Date: 2026-04-16 (Thu, 16 Apr 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/test/CodeGen/ARM/setcc-logic.ll
Log Message:
-----------
[DAGCombiner] Fold (or (seteq X, 0), (seteq X, -1)) to (setult (add X, 1), 2) (#192183)
This is the De Morgan dual of the existing fold:
(and (setne X, 0), (setne X, -1)) --> (setuge (add X, 1), 2)
The or-of-equalities version checks if X is either 0 or -1, which is
equivalent to (X+1) < 2 (unsigned). This reduces two comparisons and
an or to one add and one comparison.
---------
Co-authored-by: Claude Opus 4.6 (1M context) <noreply at anthropic.com>
Commit: 12a4adf6f2c3d4748a58fd89fcc210d820073c85
https://github.com/llvm/llvm-project/commit/12a4adf6f2c3d4748a58fd89fcc210d820073c85
Author: Kevin Sala Penades <salapenades1 at llnl.gov>
Date: 2026-04-15 (Wed, 15 Apr 2026)
Changed paths:
M offload/cmake/OpenMPTesting.cmake
M offload/include/omptarget.h
M offload/libomptarget/device.cpp
M offload/libomptarget/interface.cpp
M offload/libomptarget/omptarget.cpp
M offload/libomptarget/private.h
M offload/plugins-nextgen/amdgpu/dynamic_hsa/hsa.cpp
M offload/plugins-nextgen/amdgpu/dynamic_hsa/hsa.h
M offload/plugins-nextgen/amdgpu/dynamic_hsa/hsa_ext_amd.h
M offload/plugins-nextgen/amdgpu/src/rtl.cpp
M offload/plugins-nextgen/common/CMakeLists.txt
M offload/plugins-nextgen/common/include/PluginInterface.h
A offload/plugins-nextgen/common/include/RecordReplay.h
M offload/plugins-nextgen/common/src/PluginInterface.cpp
A offload/plugins-nextgen/common/src/RecordReplay.cpp
M offload/plugins-nextgen/cuda/src/rtl.cpp
M offload/test/lit.cfg
M offload/test/lit.site.cfg.in
A offload/test/tools/omp-kernel-replay/record-replay-advanced.cpp
A offload/test/tools/omp-kernel-replay/record-replay-basic.cpp
M offload/tools/kernelreplay/llvm-omp-kernel-replay.cpp
Log Message:
-----------
[offload] Fix kernel record/replay and add extensible mechanism (#190588)
This commit fixes the kernel record replay on both AMD and CUDA devices. It
also re-organizes the record replay code, moves the whole code to separate
files, and makes it extensible to support other record formats (potentially in
the future). The environment variables for controlling the recording have also
been modified.
Commit: 47b5ad2bdb1a8ea0840fb671ae57c128292eb34c
https://github.com/llvm/llvm-project/commit/47b5ad2bdb1a8ea0840fb671ae57c128292eb34c
Author: lonely eagle <2020382038 at qq.com>
Date: 2026-04-16 (Thu, 16 Apr 2026)
Changed paths:
M mlir/lib/Transforms/CSE.cpp
Log Message:
-----------
[mlir][CSE] Fix dominanceInfo analysis preservation (#192279)
The CSE pass calls `markAnalysesPreserved<DominanceInfo,
PostDominanceInfo>()` at the end. While CSE erases operations, it does
not remove their corresponding dominator trees, causing them to be
unnecessarily preserved in memory. This PR addresses the issue by
explicitly calling invalidate within CSE to clean up the dominator trees
for those erased operations.
Commit: 3089120f0cd2fe78911d1bc9703764a07fa7eb32
https://github.com/llvm/llvm-project/commit/3089120f0cd2fe78911d1bc9703764a07fa7eb32
Author: Akira Hatanaka <ahatanak at gmail.com>
Date: 2026-04-15 (Wed, 15 Apr 2026)
Changed paths:
M clang/include/clang/Basic/Attr.td
M clang/include/clang/Basic/AttrDocs.td
M clang/include/clang/Sema/Sema.h
M clang/lib/AST/AttrImpl.cpp
M clang/lib/AST/DeclBase.cpp
M clang/lib/Index/CommentToXML.cpp
M clang/lib/Sema/SemaAPINotes.cpp
M clang/lib/Sema/SemaAvailability.cpp
M clang/lib/Sema/SemaDecl.cpp
M clang/lib/Sema/SemaDeclAttr.cpp
M clang/lib/Sema/SemaHLSL.cpp
A clang/test/Index/annotate-comments-availability-anyappleos.cpp
M clang/test/Sema/attr-availability-anyappleos-ast.c
M clang/test/Sema/attr-availability-anyappleos.c
M clang/tools/libclang/CIndex.cpp
M clang/utils/TableGen/ClangAttrEmitter.cpp
Log Message:
-----------
Redesign handling of anyAppleOS availability attribute (#190817)
Previously, when processing an anyAppleOS availability attribute, clang
replaced it with an implicit platform-specific attribute (e.g., ios,
macos) inferred for the current target. Only the introduced version of
the original anyAppleOS attribute was preserved (as a field on the
inferred attr). This was insufficient for clients such as Swift that
need access to the full original attribute, including deprecated,
obsoleted, and message fields.
This patch preserves the original anyAppleOS attribute on the decl and
attaches the inferred platform-specific attribute to it as a child via
the new InferredAttr field. Most callers use getEffectiveAttr() to
transparently get the inferred attr when present, preserving existing
behavior. Fix-it hints use the presence of an inferred attr to decide
whether to emit "anyAppleOS" or a platform-specific name in the
@available expression. The one behavioral change is in documentation
XML, where availability info is now emitted for both the anyAppleOS attr
and the inferred platform-specific attr.
When an explicit platform-specific attribute (e.g. ios(introduced=26.0))
conflicts with an anyAppleOS-derived attribute for the same platform,
the explicit attribute wins: the anyAppleOS attribute is erased from the
decl so only the explicit one is used.
Commit: dea55c9b0b244d4cbd06d2427b26942608db300c
https://github.com/llvm/llvm-project/commit/dea55c9b0b244d4cbd06d2427b26942608db300c
Author: Longsheng Mou <longshengmou at gmail.com>
Date: 2026-04-16 (Thu, 16 Apr 2026)
Changed paths:
M mlir/lib/Dialect/NVGPU/IR/NVGPUDialect.cpp
M mlir/test/Dialect/NVGPU/invalid.mlir
Log Message:
-----------
[mlir][NVGPU] Validate mmaShape has 3 elements in MmaSyncOp/MmaSparseSyncOp (#190928)
Add validation in MmaSyncOp::verify and MmaSparseSyncOp::verify to
ensure `mmaShape` contains exactly 3 elements before calling
getMmaShapeAsArray() to avoid crash. Fixes
https://github.com/llvm/llvm-project/issues/173378.
Commit: 53cf0d5b9c348bc44def48baf7bf70adc8ff58e6
https://github.com/llvm/llvm-project/commit/53cf0d5b9c348bc44def48baf7bf70adc8ff58e6
Author: Lucas Chollet <lucas.chollet at serenityos.org>
Date: 2026-04-15 (Wed, 15 Apr 2026)
Changed paths:
M clang/test/Driver/serenity.cpp
Log Message:
-----------
[clang] Make serenity.cpp tests pass on clang-with-thin-lto-ubuntu (#192231)
LTO_FULL-NOT was definitely too generic and prone to matching unrelated
content. It would, as an example, match against the build path on
clang-with-thin-lto-ubuntu builder [1].
Making the match more restrictive should avoid this kind of issues.
[1] https://lab.llvm.org/buildbot/#/builders/127/builds/6956
Commit: de5a7f1827700f008dd3a60e05d4a1df78731ba7
https://github.com/llvm/llvm-project/commit/de5a7f1827700f008dd3a60e05d4a1df78731ba7
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-04-15 (Wed, 15 Apr 2026)
Changed paths:
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVMatInt.cpp
M llvm/test/MC/RISCV/rv32p-aliases-valid.s
Log Message:
-----------
[RISCV] Prefer LUI over PLUI.H on RV32. (#192340)
I don't think any of the cases PLUI.H can handle would be eligible for
C.LUI, but still figured it was best to use base ISA instructions when
possible.
Commit: c87a60f617dd43d27a10a9dcf0349b2327568c3b
https://github.com/llvm/llvm-project/commit/c87a60f617dd43d27a10a9dcf0349b2327568c3b
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-04-15 (Wed, 15 Apr 2026)
Changed paths:
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVMatInt.cpp
Log Message:
-----------
[RISCV] Replace Unsigned flag in generateInstSeqImpl with ShiftOpc. NFC (#192363)
Changed ShiftAmount from int to unsigned.
Commit: c340f605deb6c5f47f6deb7bc86d8f277a362cf9
https://github.com/llvm/llvm-project/commit/c340f605deb6c5f47f6deb7bc86d8f277a362cf9
Author: Kevin Sala Penades <salapenades1 at llnl.gov>
Date: 2026-04-15 (Wed, 15 Apr 2026)
Changed paths:
M offload/libomptarget/omptarget.cpp
M offload/plugins-nextgen/common/src/RecordReplay.cpp
Log Message:
-----------
[offload] Fix asserts in kernel record replay (#192379)
This commit fixes issues introduced in PR #190588
Commit: 0e5e9758388e3092a8cd6a0cb1b596039f80743a
https://github.com/llvm/llvm-project/commit/0e5e9758388e3092a8cd6a0cb1b596039f80743a
Author: Phoebe Wang <phoebe.wang at intel.com>
Date: 2026-04-16 (Thu, 16 Apr 2026)
Changed paths:
M llvm/lib/CodeGen/InlineSpiller.cpp
M llvm/lib/CodeGen/LiveRangeEdit.cpp
M llvm/lib/Target/X86/X86InstrInfo.cpp
M llvm/test/CodeGen/X86/apx/add.ll
M llvm/test/CodeGen/X86/apx/sub.ll
Log Message:
-----------
[X86][APX] Reset SubReg for dst and check isVirtual before getInterval/getPhys (#191765)
We have made sure dst operand never has a SubReg. We need to make sure
register is virtual when calling getInterval/getPhys.
Commit: 98449cb8dd7f79a9eade62b5ecb1fa8c614c3a0e
https://github.com/llvm/llvm-project/commit/98449cb8dd7f79a9eade62b5ecb1fa8c614c3a0e
Author: Florian Mayer <fmayer at google.com>
Date: 2026-04-16 (Thu, 16 Apr 2026)
Changed paths:
M compiler-rt/lib/hwasan/hwasan_allocator.cpp
M compiler-rt/lib/hwasan/hwasan_flags.inc
A compiler-rt/test/hwasan/TestCases/tag_mask_smoke.c
Log Message:
-----------
[HWASan] [compiler-rt] Add tag_bits option to HWASan alloc (#192386)
This can be used to make sure the allocator does not use the top bit of
the pointer. This is useful when HWASan is used in combination with
signed-integer-overflow detection. Some code uses arithmetic on intptr_t
that overflows for sufficiently large pointers.
Commit: 13cae27e9e99ab2ca865e9670c9aaa6106d87cb7
https://github.com/llvm/llvm-project/commit/13cae27e9e99ab2ca865e9670c9aaa6106d87cb7
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2026-04-16 (Thu, 16 Apr 2026)
Changed paths:
M flang/include/flang/Evaluate/tools.h
M flang/lib/Evaluate/tools.cpp
M flang/lib/Semantics/check-cuda.cpp
M flang/test/Lower/CUDA/cuda-data-transfer.cuf
Log Message:
-----------
Revert "[flang][cuda] Avoid false positive on multi device symbol with components" (#192393)
Reverts llvm/llvm-project#192177
this breaks some downstream testing
Commit: 72a3cd9e54f16d87f47bc984672999a9b67cd4f4
https://github.com/llvm/llvm-project/commit/72a3cd9e54f16d87f47bc984672999a9b67cd4f4
Author: Tomer Shafir <tomer.shafir8 at gmail.com>
Date: 2026-04-16 (Thu, 16 Apr 2026)
Changed paths:
M llvm/lib/CodeGen/MacroFusion.cpp
A llvm/test/CodeGen/AArch64/macro-fusion-cluster-conflict.mir
Log Message:
-----------
[MacroFusion] Early return when insts already clustered (#191710)
This patch adds an early return to `fuseInstructionPair()` when macro
fused instructions are already clustered, either by an earlier fusion or
another clustering like ld/st clustering, removing the assert.
The assert is generally wrong - there are edge cases where an earlier
ld/st clustering (before macro fusion) reached the assert because it
sets `ParentClusterIdx` and fails. For example, ADRP+LOAD/STORE on
AArch64, thought it seems to be a rare case because the addresses are
ususally unkown at compile time.
It doesn't effectively change how fusions are prioritized - early
fusions still win on fusion-fusion conflicts, like before. But it
changes how we resolve the edge case of ld/st-fusion conflicts:
Previously, fusions would effectively override ld/st clustering in this
case, given that we currently limits instruction membership to at most a
single cluster through `ParentClusterIdx`. Macro fusion runs after ld/st
clustering in the pipelines.
Here we inverse the priorities from MacroFusion's perspective and prefer
earlier ld/st clustering. I think they should be generally preferred
over fusions, because they not only save dispatch and execution slots,
but they also should decrease code size. Of course this heuristic can
fail in some cases. If a new clustering algorithm is added, it would
have to inspect ordering and be placed correctly.
I have inspected several internal workloads, and ld/st-fusion conflicts
very rarely appear.
Commit: ad2bf491badb3c9d58591cf271aff94384e2ede6
https://github.com/llvm/llvm-project/commit/ad2bf491badb3c9d58591cf271aff94384e2ede6
Author: Chuanqi Xu <yedeng.yd at linux.alibaba.com>
Date: 2026-04-16 (Thu, 16 Apr 2026)
Changed paths:
M clang/lib/Serialization/ASTWriter.cpp
M clang/unittests/Serialization/CMakeLists.txt
A clang/unittests/Serialization/CommentsTest.cpp
R clang/unittests/Serialization/NoCommentsTest.cpp
Log Message:
-----------
[C++20] [Modules] Write comments in C++20 modules' module file (#192398)
Previously we avoid writing the comments in C++20 modules' module file.
But this prevents LSP tools to read the comments in it. Although we
thought to add a new option for it and ask LSP to use the new option,
the cost of comments seems to be low and new option raises complexity,
so I prefer to write comments in C++20 modules' module file by default
now.
Commit: bd810585154b7f759689f576e95033a5e5f79593
https://github.com/llvm/llvm-project/commit/bd810585154b7f759689f576e95033a5e5f79593
Author: David Green <david.green at arm.com>
Date: 2026-04-16 (Thu, 16 Apr 2026)
Changed paths:
A llvm/test/CodeGen/Thumb2/mve-clmul.ll
Log Message:
-----------
[ARM][MVE] Add a MVE clmul tests. NFC (#192403)
Taken from the equivalent AArch64 fixed width tests.
Commit: 6279043b5b2613282d68818485b10e4038a511a7
https://github.com/llvm/llvm-project/commit/6279043b5b2613282d68818485b10e4038a511a7
Author: Fangrui Song <i at maskray.me>
Date: 2026-04-16 (Thu, 16 Apr 2026)
Changed paths:
M llvm/lib/MC/MCAssembler.cpp
A llvm/test/MC/ELF/prefalign-internal-align.s
Log Message:
-----------
[MC] Fix .prefalign oscillation when body contains a .p2align (#192402)
The intervening FT_Align's padding depends on where this prefalign
lands, so body_size can oscillate across relaxOnce iterations. When a
downstream section reacts (e.g. .debug_line DWARF deltas crossing a
special-opcode boundary), the outer loop never terminates -- originally
reported as a hang with -O1 -g on
https://github.com/llvm/llvm-project/pull/184032#issuecomment-4235991852
```
static int a;
void b() {}
int c() { for (;;) { int d; for (; a;) return 0; } }
void e() { for (;;) ; }
```
X86 sets both the preferred function alignment
and the loop-header alignment to 16 (X86ISelLowering
setPrefLoopAlignment),
so any function containing a small loop whose first BB gets .p2align 4
lands a same-alignment .p2align inside the prefalign body.
Fix: never decrease ComputedAlign across iterations.
Commit: 982f736c852c06e8ad58300980c8a7b4a79045ff
https://github.com/llvm/llvm-project/commit/982f736c852c06e8ad58300980c8a7b4a79045ff
Author: Aleksandr Platonov <platonov.aleksandr at huawei.com>
Date: 2026-04-16 (Thu, 16 Apr 2026)
Changed paths:
M clang-tools-extra/clangd/ClangdServer.cpp
M clang-tools-extra/clangd/ClangdServer.h
M clang-tools-extra/clangd/CodeComplete.cpp
M clang-tools-extra/clangd/Compiler.h
M clang-tools-extra/clangd/ModulesBuilder.cpp
M clang-tools-extra/clangd/ModulesBuilder.h
M clang-tools-extra/clangd/ParsedAST.cpp
M clang-tools-extra/clangd/Preamble.cpp
M clang-tools-extra/clangd/Preamble.h
M clang-tools-extra/clangd/tool/ClangdMain.cpp
M clang-tools-extra/clangd/unittests/PrerequisiteModulesTest.cpp
Log Message:
-----------
[clangd] Introduce --skip-preamble-build command line option (#189284)
This option allows to disable preamble optimization in clangd. By
default it's false, but became true for TUs which import modules (and
experimental modules support is enabled).
This PR is a try to address C++20 modules problems described here
https://github.com/llvm/llvm-project/pull/187432
Fixes https://github.com/llvm/llvm-project/issues/181770
Commit: d8f63bbc8e20a68e764852a15d67a06fcd14c5bd
https://github.com/llvm/llvm-project/commit/d8f63bbc8e20a68e764852a15d67a06fcd14c5bd
Author: Haojian Wu <hokein.wu at gmail.com>
Date: 2026-04-16 (Thu, 16 Apr 2026)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Lex/Lexer.cpp
A clang/test/Parser/macro-braces-recovery.cpp
Log Message:
-----------
[clang] Fix crash in isAtEndOfMacroExpansion at FileID boundary. (#191734)
During error recovery, a synthetic token (whose length is 0) can be
inserted past the end of a FileID, e.g. inserting ")" when a macro-arg
containing a comma should be guarded by parentheses.
When calculating the location after this token, the calculated
`AfterLoc` can point exactly to the start of the next FileID
(`NextLocalOffset`), any source manager operations on the `AfterLoc` are
invalid.
This patch adds a safe guard in `Lexer::isAtEndOfMacroExpansion` to
prevent passing this invalid location to `SourceManager`.
Fixes #115007
Fixes #21755
Commit: eb8324a472ff720c90fe4d90214c330d4daa1750
https://github.com/llvm/llvm-project/commit/eb8324a472ff720c90fe4d90214c330d4daa1750
Author: Haojian Wu <hokein.wu at gmail.com>
Date: 2026-04-16 (Thu, 16 Apr 2026)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Parse/Parser.h
M clang/lib/Parse/ParseCXXInlineMethods.cpp
M clang/lib/Parse/ParseDeclCXX.cpp
M clang/lib/Parse/Parser.cpp
A clang/test/AST/ast-dump-decl-recovery.cpp
M clang/test/Parser/recovery.cpp
Log Message:
-----------
[clang][Parser] Improve error recovery for missing semicolons in class members. (#190744)
This is something I discovered when doing the investigation for
https://github.com/llvm/llvm-project/pull/188123#issuecomment-4162665482.
This patch improves recovery when a semicolon is missing after a class
member declarations.
When the parser expects a semicolon but encounters a token that is at
the start of a line and is a valid declaration specifier, it injects a
`;` instead of skipping tokens, this allows us to preserve the
declaration after the missing ";" instead of discarding it.
Commit: 882be8f173d49fbbb58660fa556d782947bba33f
https://github.com/llvm/llvm-project/commit/882be8f173d49fbbb58660fa556d782947bba33f
Author: Varad Rahul Kamthe <133588066+varadk27 at users.noreply.github.com>
Date: 2026-04-16 (Thu, 16 Apr 2026)
Changed paths:
M llvm/docs/NVPTXUsage.rst
M llvm/include/llvm/IR/IntrinsicsNVVM.td
M llvm/lib/Target/NVPTX/NVPTXIntrinsics.td
A llvm/test/CodeGen/NVPTX/movmatrix.ll
Log Message:
-----------
[LLVM][NVPTX] Add movmatrix intrinsic and PTX instruction support (#190109)
This change adds NVVM intrinsic and NVPTX backend support for the movmatrix PTX instruction. Tests are added in `movmatrix.ll` and verified through `ptxas-13.1`.
PTX Spec Reference: https://docs.nvidia.com/cuda/parallel-thread-execution/#warp-level-matrix-instructions-movmatrix
Assisted-by: Cursor
Commit: ec1e3aef9a153d71441fe7214151272929b066e1
https://github.com/llvm/llvm-project/commit/ec1e3aef9a153d71441fe7214151272929b066e1
Author: Farid Zakaria <fmzakari at fb.com>
Date: 2026-04-16 (Thu, 16 Apr 2026)
Changed paths:
M bolt/include/bolt/Core/BinaryContext.h
M bolt/lib/Core/BinaryContext.cpp
M bolt/lib/Rewrite/RewriteInstance.cpp
M bolt/lib/Utils/CommandLineOpts.cpp
A bolt/test/X86/lsda-encoding.s
Log Message:
-----------
[BOLT] Update LSDA encoding for x86-64 large code model (#190685)
BOLT hardcoded 4-byte LSDA (exception table) encoding for x86-64. This
is insufficient for large code model binaries where functions in .ltext
sections may be placed at addresses above 2GB, exceeding the range of
DW_EH_PE_udata4/DW_EH_PE_sdata4 encodings.
Detect large code model by checking for .ltext sections
(SHF_X86_64_LARGE) and update LSDAEncoding to use 8-byte pointers:
- Non-PIC: DW_EH_PE_absptr (8-byte absolute)
- PIC: DW_EH_PE_pcrel | DW_EH_PE_sdata8 (8-byte PC-relative)
This was pulled out from
https://github.com/llvm/llvm-project/pull/190637
Commit: 008c3afaad14b5cb1121f56d35e6eed5f48afae8
https://github.com/llvm/llvm-project/commit/008c3afaad14b5cb1121f56d35e6eed5f48afae8
Author: Konrad Kleine <kkleine at redhat.com>
Date: 2026-04-16 (Thu, 16 Apr 2026)
Changed paths:
M llvm/lib/DebugInfo/DWARF/DWARFUnitIndex.cpp
Log Message:
-----------
[llvm][DebugInfo] Use formatv in DWARFUnitIndex (#191998)
This relates to #35980.
Commit: ba1acfdaad3eab0ab1f780761e68c7e3c08bc1e6
https://github.com/llvm/llvm-project/commit/ba1acfdaad3eab0ab1f780761e68c7e3c08bc1e6
Author: Konrad Kleine <kkleine at redhat.com>
Date: 2026-04-16 (Thu, 16 Apr 2026)
Changed paths:
M llvm/lib/DebugInfo/DWARF/DWARFDebugPubTable.cpp
Log Message:
-----------
[llvm][DebugInfo] Use formatv in DWARFDebugPubTable (#191988)
This relates to #35980.
Co-authored-by: Sergei Barannikov <barannikov88 at gmail.com>
Commit: 0499a7962f32cd849296d28e6f2f92af509f41fb
https://github.com/llvm/llvm-project/commit/0499a7962f32cd849296d28e6f2f92af509f41fb
Author: Boyao Wang <wangboyao at bytedance.com>
Date: 2026-04-16 (Thu, 16 Apr 2026)
Changed paths:
M compiler-rt/lib/tsan/rtl/tsan_platform.h
M compiler-rt/test/sanitizer_common/TestCases/Linux/pie_no_aslr.cpp
Log Message:
-----------
[TSAN][RISCV] Fix kHiAppMemEnd boundary for riscv64 (#191170)
This resolves TSan execution failures on riscv64 platforms when Address
Space Layout Randomization (ASLR) is disabled. There was an off-by-one
error in `tsan_platform.h` that caused the sanitizer to fail when memory
is mapped at the edge under non-ASLR environments. We fix this by
extending `kHiAppMemEnd` to cover the full allowed memory range:
`MappingRiscv64_39`: `0x3fffffffffull` -> `0x4000000000ull`
`MappingRiscv64_48`: `0x7fffffffffffull` -> `0x800000000000ull`
We also add riscv64 test support to `pie_no_aslr.cpp`
Commit: 8ac414f2674935f620d540f119bf60bfad21ce7b
https://github.com/llvm/llvm-project/commit/8ac414f2674935f620d540f119bf60bfad21ce7b
Author: Jeremy Johnson <jeremy.johnson at arm.com>
Date: 2026-04-16 (Thu, 16 Apr 2026)
Changed paths:
M mlir/include/mlir/Dialect/Tosa/IR/TosaOpBase.td
M mlir/include/mlir/Dialect/Tosa/IR/TosaOps.td
M mlir/lib/Dialect/Tosa/IR/TosaOps.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaValidation.cpp
M mlir/test/Dialect/Tosa/level_check.mlir
M mlir/test/Dialect/Tosa/ops.mlir
M mlir/test/Dialect/Tosa/tosa-infer-shapes.mlir
M mlir/test/Dialect/Tosa/verifier.mlir
Log Message:
-----------
[mlir][tosa] Add TOSA RESHAPE_BLOCK_SCALED support (#191149)
Experimental operator support, with no validation.
---------
Signed-off-by: Jeremy Johnson <jeremy.johnson at arm.com>
Commit: 3a754f4b9e852fc9c765f1152dc9a11d93cb83b1
https://github.com/llvm/llvm-project/commit/3a754f4b9e852fc9c765f1152dc9a11d93cb83b1
Author: ZhaoQi <zhaoqi01 at loongson.cn>
Date: 2026-04-16 (Thu, 16 Apr 2026)
Changed paths:
A llvm/test/CodeGen/LoongArch/lsx/ir-instruction/shuffle-as-vextrins.ll
Log Message:
-----------
[LoongArch][NFC] Pre-commit tests for `vextrins` (#164065)
Commit: f943685879121b02d568c0ae7e0c95a89a2323e3
https://github.com/llvm/llvm-project/commit/f943685879121b02d568c0ae7e0c95a89a2323e3
Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
Date: 2026-04-16 (Thu, 16 Apr 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.h
M llvm/lib/Transforms/Vectorize/VPlanPatternMatch.h
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
A llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-usabs.ll
A llvm/test/Transforms/LoopVectorize/VPlan/AArch64/partial-reduce-usabs.ll
Log Message:
-----------
[LV] Add support for absolute difference partial reductions (#188043)
This adds support for partial reductions where the extended operand is a
signed or unsigned absolute difference.
We match the absolute difference as `abs(sub(ext(X), ext(Y)))`, where
`type(X) == type(Y)` and both extends are the same kind (sext/zext).
This is then handled the same as an operand without a binop
(`ext(...)`), as we will transform the operand to
`ext(absolute-difference(A, B))` when we rewrite the reduction chain to
partial reductions.
This is an alternative to #162296.
Commit: d60b2b219423cf7f653d0d1f846b143a71d16443
https://github.com/llvm/llvm-project/commit/d60b2b219423cf7f653d0d1f846b143a71d16443
Author: Konrad Kleine <kkleine at redhat.com>
Date: 2026-04-16 (Thu, 16 Apr 2026)
Changed paths:
M llvm/lib/DebugInfo/GSYM/GsymReaderV1.cpp
M llvm/lib/DebugInfo/GSYM/GsymReaderV2.cpp
Log Message:
-----------
[llvm][DebugInfo] Use formatv in GsymReaderV1 and GsymReaderV2 (#192000)
This relates to #35980.
Commit: 169148a6b21471ddc06b99bc7adabae552775b57
https://github.com/llvm/llvm-project/commit/169148a6b21471ddc06b99bc7adabae552775b57
Author: Balázs Kéri <balazs.keri at ericsson.com>
Date: 2026-04-16 (Thu, 16 Apr 2026)
Changed paths:
M clang-tools-extra/clang-tidy/bugprone/ThrowingStaticInitializationCheck.cpp
M clang-tools-extra/clang-tidy/bugprone/ThrowingStaticInitializationCheck.h
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/docs/clang-tidy/checks/bugprone/throwing-static-initialization.rst
A clang-tools-extra/test/clang-tidy/checkers/bugprone/throwing-static-initialization-allow.cpp
Log Message:
-----------
[clang-tidy] Add option 'AllowedTypes' to bugprone-throwing-static-initialization (#192031)
Commit: d6a970d527b53344ee0a97882be28a47724d8007
https://github.com/llvm/llvm-project/commit/d6a970d527b53344ee0a97882be28a47724d8007
Author: David Spickett <david.spickett at arm.com>
Date: 2026-04-16 (Thu, 16 Apr 2026)
Changed paths:
M lldb/test/API/commands/memory/read/TestMemoryRead.py
M lldb/test/API/commands/memory/read/main.c
Log Message:
-----------
[lldb][test] Add tests for repeating "memory read" command (#192063)
Tests that show the effect of #192057.
Until now repeating the command options was only tested in memory
tagging tests, which I don't run often. Here I am adding tests that'll
run anywhere.
Commit: f779ebce55bc5d325bbc985fed3d7b214142af08
https://github.com/llvm/llvm-project/commit/f779ebce55bc5d325bbc985fed3d7b214142af08
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-04-16 (Thu, 16 Apr 2026)
Changed paths:
M clang/lib/AST/ByteCode/Interp.cpp
M clang/lib/AST/ByteCode/Interp.h
M clang/lib/AST/ExprConstant.cpp
M clang/test/AST/ByteCode/builtin-bit-cast-bitfields.cpp
M clang/test/AST/ByteCode/builtin-bit-cast-long-double.cpp
M clang/test/AST/ByteCode/builtin-functions.cpp
M clang/test/AST/ByteCode/constexpr-nqueens.cpp
M clang/test/AST/ByteCode/cxx11.cpp
M clang/test/AST/ByteCode/cxx17.cpp
M clang/test/AST/ByteCode/cxx20.cpp
M clang/test/AST/ByteCode/cxx2a.cpp
M clang/test/AST/ByteCode/lifetimes.cpp
M clang/test/AST/ByteCode/lifetimes26.cpp
M clang/test/AST/ByteCode/literals.cpp
M clang/test/AST/ByteCode/new-delete.cpp
M clang/test/AST/ByteCode/placement-new.cpp
M clang/test/AST/ByteCode/records.cpp
M clang/test/AST/ByteCode/unions.cpp
M clang/test/C/C23/n3006.c
M clang/test/CXX/dcl.decl/dcl.decomp/p3.cpp
M clang/test/CXX/drs/cwg2026.cpp
M clang/test/CXX/drs/cwg3xx.cpp
M clang/test/CXX/expr/expr.const/p2-0x.cpp
M clang/test/Sema/constexpr.c
M clang/test/SemaCXX/builtin-is-within-lifetime.cpp
M clang/test/SemaCXX/constant-expression-cxx11.cpp
M clang/test/SemaCXX/constant-expression-cxx14.cpp
M clang/test/SemaCXX/constant-expression-cxx2a.cpp
M clang/test/SemaCXX/constexpr-builtin-bit-cast.cpp
M clang/test/SemaCXX/constexpr-printing.cpp
M clang/test/SemaCXX/constexpr-value-init.cpp
M clang/test/SemaCXX/cxx2a-constexpr-dynalloc.cpp
M clang/test/SemaCXX/cxx2c-constexpr-placement-new.cpp
M clang/test/SemaCXX/static-assert-cxx26.cpp
Log Message:
-----------
[clang][ExprConst] Add "declared here" notes to uninitialized read diagnostics (#192206)
E.g. for
```c++
constexpr int unInitLocal() {
int a;
return a; // both-note {{read of uninitialized object}}
}
static_assert(unInitLocal() == 0, ""); // both-error {{not an integral constant expression}} \
// both-note {{in call to 'unInitLocal()'}}
```
we now diagnose:
```console
array.cpp:896:15: error: static assertion expression is not an integral constant expression
896 | static_assert(unInitLocal() == 0, ""); // both-error {{not an integral constant expression}} \
| ^~~~~~~~~~~~~~~~~~
array.cpp:894:10: note: read of uninitialized object is not allowed in a constant expression
894 | return a; // both-note {{read of uninitialized object}}
| ^
array.cpp:896:15: note: in call to 'unInitLocal()'
896 | static_assert(unInitLocal() == 0, ""); // both-error {{not an integral constant expression}} \
| ^~~~~~~~~~~~~
array.cpp:893:7: note: declared here
893 | int a;
| ^
1 warning and 1 error generated.
```
and point at the object that we were trying to read from. This adds an
`NoteLValueLocation()` call to the emission of
`note_constexpr_access_uninit`, which is already done in other places:
https://github.com/llvm/llvm-project/blob/7ae5fe63dd979eae13ea04e166f94056ec1306ca/clang/lib/AST/ExprConstant.cpp#L4565-L4570
Commit: 7ddf7719b3dfdfb7925f5ca492c3550b240b095e
https://github.com/llvm/llvm-project/commit/7ddf7719b3dfdfb7925f5ca492c3550b240b095e
Author: zackc6 <112835067+zackc6 at users.noreply.github.com>
Date: 2026-04-16 (Thu, 16 Apr 2026)
Changed paths:
M mlir/lib/Transforms/CSE.cpp
Log Message:
-----------
[mlir][Transforms] Fix CSE memEffectsCache handling for existing entries (NFC) (#192178)
The condition on detecting cache insertion was reversed. The consequence
was that we would always go through the path of "cache hit" first, but
find that the entry was the just-inserted one and then proceed with
updating it. Subsequent attempt could go through the "cache miss" part
and the cache would never be used.
Commit: 0da34b813432d9905b57b91bdf793b58edfdd7fa
https://github.com/llvm/llvm-project/commit/0da34b813432d9905b57b91bdf793b58edfdd7fa
Author: LU-JOHN <John.Lu at amd.com>
Date: 2026-04-16 (Thu, 16 Apr 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp
M llvm/test/CodeGen/AMDGPU/v_swap_b32.mir
Log Message:
-----------
[AMDGPU] Analyze implicit reg operands when generating swaps (#192220)
Fix register usage analysis during swap generation by including implicit
register operands. Critical change was to replace MachineInstr uses/defs
with all_uses/all_defs.
---------
Signed-off-by: John Lu <John.Lu at amd.com>
Commit: 57d2a2c287538adc0297820047f637deb6570c63
https://github.com/llvm/llvm-project/commit/57d2a2c287538adc0297820047f637deb6570c63
Author: Rohit Aggarwal <44664450+rohitaggarwal007 at users.noreply.github.com>
Date: 2026-04-16 (Thu, 16 Apr 2026)
Changed paths:
M llvm/lib/Transforms/AggressiveInstCombine/AggressiveInstCombine.cpp
M llvm/test/Transforms/AggressiveInstCombine/popcount.ll
Log Message:
-----------
[AggressiveInstCombine] POPCNT generation for bit-count pattern (#180917)
The proposal is to enhance LLVM by teaching it to recognize the pattern
and replace it with the hardware POPCNT instruction.
#177109 has the first pattern of the popcnt fold.
---------
Co-authored-by: Rohit Aggarwal <Rohit.Aggarwal at amd.com>
Commit: 537f1240c9cd0ea7fdd4355400e2a8868d09ead5
https://github.com/llvm/llvm-project/commit/537f1240c9cd0ea7fdd4355400e2a8868d09ead5
Author: Ming Yan <ming.yan at terapines.com>
Date: 2026-04-16 (Thu, 16 Apr 2026)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td
M mlir/test/Target/LLVMIR/Import/fastmath.ll
M mlir/test/Target/LLVMIR/llvmir.mlir
Log Message:
-----------
[mlir][LLVM] Add fastmath flags support to fpext/fptrunc ops. (#192185)
Add fastmath attributes to llvm fpext/fptrunc ops,
FastmathFlagsInterface op interface support.
Commit: 4097ec7720f4888f5efe14f3627a6ce0f3b7fc89
https://github.com/llvm/llvm-project/commit/4097ec7720f4888f5efe14f3627a6ce0f3b7fc89
Author: Elio <xiongzile at bytedance.com>
Date: 2026-04-16 (Thu, 16 Apr 2026)
Changed paths:
M libc/test/integration/src/unistd/CMakeLists.txt
M libc/test/integration/src/unistd/getcwd_test.cpp
Log Message:
-----------
[libc][test] Fix getcwd test for symlinked paths (#191426)
The test compared getcwd() with getenv("PWD"), which is not reliable
under symlinked paths: PWD may preserve the logical path while getcwd()
returns the physical path.
Use stat(2) to verify directory identity instead.
Co-authored-by: Zile Xiong <xiongzile99 at gmail.com>
Commit: 10be669bc5a8c6b8b988f3e91760f9d7c391e246
https://github.com/llvm/llvm-project/commit/10be669bc5a8c6b8b988f3e91760f9d7c391e246
Author: Pavel Labath <pavel at labath.sk>
Date: 2026-04-16 (Thu, 16 Apr 2026)
Changed paths:
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/include/llvm-libc-macros/linux/sys-socket-macros.h
M libc/include/sys/socket.yaml
M libc/src/__support/OSUtil/linux/syscall_wrappers/CMakeLists.txt
A libc/src/__support/OSUtil/linux/syscall_wrappers/getsockopt.h
A libc/src/__support/OSUtil/linux/syscall_wrappers/setsockopt.h
M libc/src/sys/socket/CMakeLists.txt
A libc/src/sys/socket/getsockopt.h
M libc/src/sys/socket/linux/CMakeLists.txt
A libc/src/sys/socket/linux/getsockopt.cpp
A libc/src/sys/socket/linux/setsockopt.cpp
A libc/src/sys/socket/setsockopt.h
M libc/test/src/sys/socket/linux/CMakeLists.txt
A libc/test/src/sys/socket/linux/socketopt_test.cpp
Log Message:
-----------
[libc] Implement getsockopt and setsockopt on linux (#192237)
This patch implements getsockopt and setsockopt socket functions on
Linux. It follows the established pattern of wrapping socketcall or
using direct syscalls.
I added a basic test setting a couple of options.
I only added the first couple of simple constants (e.g. whose value does
not depend on the architecture). I've left the others for a separate
patch.
Commit: 38e0a9eb9efbbaa76fde598ccb5b4457ca7dfed1
https://github.com/llvm/llvm-project/commit/38e0a9eb9efbbaa76fde598ccb5b4457ca7dfed1
Author: David Spickett <david.spickett at arm.com>
Date: 2026-04-16 (Thu, 16 Apr 2026)
Changed paths:
M lldb/test/API/linux/aarch64/mte_tag_access/TestAArch64LinuxMTEMemoryTagAccess.py
M lldb/test/API/linux/aarch64/mte_tag_access/main.c
Log Message:
-----------
[lldb][AArch64][Linux] Fix memory tagging tests (#192421)
The test program was relying on mmap calls to allocate pages that were
next to each other, which is not guaranteed but I got away with it on
our simulated systems for a time.
Instead of taking this chance, allocate all the pages once and then
split the allocation by changing the permissions of each page. That
ordering we can rely on.
The repeating tag options test is broken due
to #192057 so I've xfailed it.
Commit: 573f8227f76670bc5fe1cd38650a3d6c8a840e03
https://github.com/llvm/llvm-project/commit/573f8227f76670bc5fe1cd38650a3d6c8a840e03
Author: Pavel Labath <pavel at labath.sk>
Date: 2026-04-16 (Thu, 16 Apr 2026)
Changed paths:
M libc/test/src/sys/socket/linux/socketopt_test.cpp
Log Message:
-----------
[libc] Fix socketopt_test on 32-bit builds (#192423)
This is a follow-up to #192237, fixing build breakage on riscv32.
Commit: 47dfcba42fe13fa7c9c42d193a66452258990fad
https://github.com/llvm/llvm-project/commit/47dfcba42fe13fa7c9c42d193a66452258990fad
Author: Ziliang Zhang <ziliang.zhang at terapines.com>
Date: 2026-04-16 (Thu, 16 Apr 2026)
Changed paths:
M mlir/include/mlir/Dialect/Bufferization/Transforms/OneShotAnalysis.h
M mlir/lib/Dialect/Bufferization/Transforms/OneShotAnalysis.cpp
Log Message:
-----------
[mlir][bufferization] Cache areNonConflictingSubsets results in OneShotAnalysis (#189895)
The `areNonConflictingSubsets` check in `hasReadAfterWriteInterference`
can be expensive when called repeatedly for the same (uRead,
uConflictingWrite) pairs during bufferization analysis. This patch
caches the results to avoid redundant computation.
Specifically, this adds:
- A private `nonConflictingSubsetCache` DenseMap on
`OneShotAnalysisState` to memoize subset conflict results.
- A public `areNonConflictingSubsetsCached` method that wraps the
lookup-or-compute pattern, following the same convention as the existing
`findDefinitionsCached`.
- Cache invalidation in `resetCache()`.
Commit: a7733f9522e2ed81ce97d4eb9775bc8fa75002ab
https://github.com/llvm/llvm-project/commit/a7733f9522e2ed81ce97d4eb9775bc8fa75002ab
Author: Tomer Shafir <tomer.shafir8 at gmail.com>
Date: 2026-04-16 (Thu, 16 Apr 2026)
Changed paths:
M llvm/lib/CodeGen/MacroFusion.cpp
Log Message:
-----------
[MacroFusion] Call Clusters.size() once before assignments (NFC) (#192396)
Commit: d18549bc5d39f82a25458836216d1fc7bdb0369d
https://github.com/llvm/llvm-project/commit/d18549bc5d39f82a25458836216d1fc7bdb0369d
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-04-16 (Thu, 16 Apr 2026)
Changed paths:
M mlir/lib/Conversion/VectorToLLVM/ConvertVectorToLLVM.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorTransforms.cpp
M mlir/test/Conversion/VectorToLLVM/vector-mask-to-llvm.mlir
M mlir/test/Conversion/VectorToLLVM/vector-to-llvm.mlir
M mlir/test/Conversion/VectorToLLVM/vector-xfer-to-llvm.mlir
M mlir/test/Integration/Dialect/Vector/CPU/create-mask.mlir
Log Message:
-----------
[MLIR][Vector] Fix i32 overflow in vector mask lowering for large index bounds (#188782)
When lowering vector masks with `force-32bit-vector-indices=true`, the
mask bound (an `index`-typed value) was cast directly to `i32`. For
values
larger than INT32_MAX (e.g., 2^51), the truncating cast wraps to a small
or negative i32, turning an all-true mask into an all-false one.
Fix both the fixed-size vector path (`buildVectorComparison` in
VectorTransforms.cpp) and the scalable vector path
(`VectorCreateMaskOpConversion` in ConvertVectorToLLVM.cpp) uniformly:
clamp the bound to INT32_MAX via `arith.minsi` in index type before the
cast. For fixed-size vectors `dim` would be a tighter bound (any b >=
dim
already implies all-true), but INT32_MAX is used for consistency across
both paths.
Add a LIT regression test with a 2^51 bound and an integration test that
executes the lowered code to confirm the mask is all-true at runtime.
Fixes #113689
Assisted-by: Claude Code
Commit: cfb272d42541bf5d0b1c6ccf33d54791d418495b
https://github.com/llvm/llvm-project/commit/cfb272d42541bf5d0b1c6ccf33d54791d418495b
Author: ZhaoQi <zhaoqi01 at loongson.cn>
Date: 2026-04-16 (Thu, 16 Apr 2026)
Changed paths:
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/test/CodeGen/LoongArch/lsx/ir-instruction/shuffle-as-vextrins.ll
M llvm/test/CodeGen/LoongArch/lsx/vec-sext.ll
M llvm/test/CodeGen/LoongArch/lsx/vec-shuffle-any-ext.ll
M llvm/test/CodeGen/LoongArch/lsx/vec-trunc.ll
M llvm/test/CodeGen/LoongArch/lsx/vmskcond.ll
Log Message:
-----------
[LoongArch] Custom legalize vector_shuffle to `vextrins` (#164067)
LASX support will be added in a follow-up change.
Commit: 2b3965adc730764b9c88299d8548fbdc437e82bf
https://github.com/llvm/llvm-project/commit/2b3965adc730764b9c88299d8548fbdc437e82bf
Author: Cullen Rhodes <cullen.rhodes at arm.com>
Date: 2026-04-16 (Thu, 16 Apr 2026)
Changed paths:
M llvm/lib/CodeGen/MachineInstr.cpp
Log Message:
-----------
[CodeGen] Add early-exit to getFoldedSpillSize (#192201)
TargetInstrInfo::hasStoreToStackSlot is showing up in compile-time
profiles of sqlite via MachineInstr::getFoldedSpillSize. Adding an
early-exit for non-store instructions is a small win on this and some
other workloads on stage1-aarch64-O0-g.
https://llvm-compile-time-tracker.com/compare.php?from=215f35eb8f1c313ac135ad47db1cc0b99b3ae694&to=4d8ce0a2e30829976c03a9e90b2dc56ab9b60646&stat=instructions%3Au
Commit: 42e0cdf2fcc3455d95be7d875302a0f7cb7c592d
https://github.com/llvm/llvm-project/commit/42e0cdf2fcc3455d95be7d875302a0f7cb7c592d
Author: yronglin <yronglin777 at gmail.com>
Date: 2026-04-16 (Thu, 16 Apr 2026)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/DiagnosticLexKinds.td
M clang/lib/Lex/PPExpressions.cpp
M clang/test/Lexer/cxx-features.cpp
A clang/test/Preprocessor/p2843r3.cpp
M clang/www/cxx_status.html
Log Message:
-----------
[Clang] Implement P2843R3 - Preprocessing is never undefined (#192073)
This PR marks [P2843R3 - Preprocessing is never
undefined](https://wg21.link/P2843) as implemented and add tests.
Fixes https://github.com/llvm/llvm-project/issues/145658
---------
Signed-off-by: yronglin <yronglin777 at gmail.com>
Commit: 3d0d615d2a415a3dd7f79f4dbe481cc36f8073d5
https://github.com/llvm/llvm-project/commit/3d0d615d2a415a3dd7f79f4dbe481cc36f8073d5
Author: Konrad Kleine <kkleine at redhat.com>
Date: 2026-04-16 (Thu, 16 Apr 2026)
Changed paths:
M llvm/lib/DebugInfo/LogicalView/Readers/LVDWARFReader.cpp
Log Message:
-----------
[llvm][DebugInfo] Use formatv in LVDWARFReader (#192011)
This relates to #35980.
Commit: 27de23ff510b4272ce4842811f0959a072445b5d
https://github.com/llvm/llvm-project/commit/27de23ff510b4272ce4842811f0959a072445b5d
Author: Konrad Kleine <kkleine at redhat.com>
Date: 2026-04-16 (Thu, 16 Apr 2026)
Changed paths:
M llvm/lib/DebugInfo/DWARF/DWARFGdbIndex.cpp
Log Message:
-----------
[llvm][DebugInfo] Use formatv in DWARFGdbIndex (#191994)
This relates to #35980.
Co-authored-by: Sergei Barannikov <barannikov88 at gmail.com>
Commit: 167e7e76d6bdb347d6c06294f6ad00ce9821aaaa
https://github.com/llvm/llvm-project/commit/167e7e76d6bdb347d6c06294f6ad00ce9821aaaa
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2026-04-16 (Thu, 16 Apr 2026)
Changed paths:
M flang/include/flang/Semantics/openmp-utils.h
M flang/lib/Semantics/openmp-utils.cpp
M flang/lib/Semantics/resolve-directives.cpp
A flang/test/Semantics/OpenMP/affected-loops.f90
Log Message:
-----------
[flang][OpenMP] Identify DO loops affected by loop-associated construct (#191719)
This is to identify iteration variables of DO loops affected by an
OpenMP loop construct. These variables are privatized as per
data-sharing rules.
Issue: https://github.com/llvm/llvm-project/issues/191249
Commit: 09f6992a4bdd7f8e06c8640d85b60d673a4b7297
https://github.com/llvm/llvm-project/commit/09f6992a4bdd7f8e06c8640d85b60d673a4b7297
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-04-16 (Thu, 16 Apr 2026)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/test/AST/ByteCode/unions.cpp
Log Message:
-----------
[clang][bytecode] Don't implicitly begin union member lifetime... (#192212)
... on assignment operator calls if the LHS type does not have a
non-deleted trivial default constructor.
Commit: 76d51b780dbbc491833e26db63a13c1f47a29c77
https://github.com/llvm/llvm-project/commit/76d51b780dbbc491833e26db63a13c1f47a29c77
Author: dcandler <david.candler at arm.com>
Date: 2026-04-16 (Thu, 16 Apr 2026)
Changed paths:
M libc/CMakeLists.txt
M libc/test/CMakeLists.txt
Log Message:
-----------
[libc][cmake] Remove dependencies for bare-metal hermetic testing (#192242)
Unit tests can be disabled on bare-metal as they will fail to build. To
prevent the check-libc and check-libc-lit targets from always attempting
to build them, the dependencies are now set conditionally according to
the relevant CMake options.
Commit: ac2c986c5830b6c413ddbb0e75b8c1399fdffe85
https://github.com/llvm/llvm-project/commit/ac2c986c5830b6c413ddbb0e75b8c1399fdffe85
Author: Hassnaa Hamdi <hassnaa.hamdi at arm.com>
Date: 2026-04-16 (Thu, 16 Apr 2026)
Changed paths:
M llvm/include/llvm/Analysis/TargetTransformInfo.h
M llvm/include/llvm/Analysis/TargetTransformInfoImpl.h
M llvm/include/llvm/CodeGen/BasicTTIImpl.h
M llvm/lib/Analysis/TargetTransformInfo.cpp
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.h
M llvm/lib/Target/ARM/ARMTargetTransformInfo.cpp
M llvm/lib/Target/ARM/ARMTargetTransformInfo.h
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.h
Log Message:
-----------
[LV][NFC] Rename ScalarEpilogueLowering to EpilogueLowering (#191871)
Rename ScalarEpilogueLowering enum to EpilogueLowering.
The term 'scalar' is misleading given that the epilogue could be
vectorized.
Also rename the enum values to use the tail-folding term instead of
predication, as it's more clear.
Commit: 46bbbde1f3c3bf3a00ae19c3157f7425899b1e87
https://github.com/llvm/llvm-project/commit/46bbbde1f3c3bf3a00ae19c3157f7425899b1e87
Author: Utkarsh Saxena <usx at google.com>
Date: 2026-04-16 (Thu, 16 Apr 2026)
Changed paths:
M clang/lib/Analysis/LifetimeSafety/FactsGenerator.cpp
M clang/lib/Analysis/LifetimeSafety/Origins.cpp
M clang/lib/Sema/SemaAttr.cpp
M clang/lib/Sema/SemaTemplateInstantiateDecl.cpp
M clang/test/Sema/Inputs/lifetime-analysis.h
M clang/test/Sema/warn-lifetime-analysis-nocfg.cpp
M clang/test/Sema/warn-lifetime-safety-dangling-field.cpp
M clang/test/Sema/warn-lifetime-safety-suggestions.cpp
M clang/test/Sema/warn-lifetime-safety.cpp
Log Message:
-----------
[LifetimeSafety] Add lifetimebound inference for std::make_unique (#191632)
Enhanced lifetime safety analysis to support `std::make_unique` by
propagating `lifetimebound` attributes from constructor parameters to
`make_unique` parameters.
- Added special handling for `std::make_unique` in
`inferLifetimeBoundAttribute()` to automatically propagate
`lifetimebound` attributes from the constructed type's constructor
parameters to the corresponding `make_unique` parameters
- Extended GSL owner type handling in assignment operations within
`FactsGenerator::VisitCXXOperatorCallExpr()`
`std::make_unique` is a common factory function that forwards arguments
to constructors. Without this enhancement, lifetime safety analysis
couldn't detect when `make_unique` was being used to create objects with
lifetimebound dependencies, leading to missed warnings about potential
dangling references. This change ensures that lifetime safety analysis
works seamlessly with modern C++ idioms using smart pointer factory
functions.
---
**Current Limitation**: Lifetimebound propagation only occurs when the
constructor parameter is a reference type. This restriction avoids
incorrect loan tracking when value types (pointers, view types like
`string_view`) are passed through forwarding references to
`make_unique`. However, this means some legitimate dangling scenarios
involving value-type parameters are not detected. This limitation
presents an opportunity to experiment with `clang::lifetimebound(2)` to
distinguish between parameter categories and enable more precise
tracking for forwarding references and multi-level pointers in general.
_(AI-assisted with HITL)_
Commit: a9a2d25db9c011c15a6557bc308ea1856efcb058
https://github.com/llvm/llvm-project/commit/a9a2d25db9c011c15a6557bc308ea1856efcb058
Author: Erich Keane <ekeane at nvidia.com>
Date: 2026-04-16 (Thu, 16 Apr 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenFunction.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
A clang/test/CIR/CodeGen/init-list-lvalue.cpp
Log Message:
-----------
[CIR] Implement LValue InitListExpr and FunctionalCastExpr lowering (#192298)
First, this fixes the InitListExpr lowering. This copies the same
implementation from classic-codegen, and adds some tests (this is
otherwise untested in classic codegen?).
Second, while I was writing tests for the above, I accidented into the
FunctionalCastExpr, which just calls emitCastLValue, so this fixes that
as well.
Commit: d78f85e46adca8a29765584e6ed8438058c18003
https://github.com/llvm/llvm-project/commit/d78f85e46adca8a29765584e6ed8438058c18003
Author: David Green <david.green at arm.com>
Date: 2026-04-16 (Thu, 16 Apr 2026)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/GISelValueTracking.cpp
A llvm/test/CodeGen/AArch64/GlobalISel/knownfpclass.ll
Log Message:
-----------
[GlobalISel] Fix getShuffleDemandedElts input lanes in computeKnownFPClass (#192288)
The number of lanes needs to be for the input type, not the return, as
they can be different in GISel. This prevents an assert about invalid
shuffle mask constant from getShuffleDemandedElts.
Commit: 5cf3e0e65b0535104f456e8159b1c80ab40677b5
https://github.com/llvm/llvm-project/commit/5cf3e0e65b0535104f456e8159b1c80ab40677b5
Author: quic-k <kushpal at qti.qualcomm.com>
Date: 2026-04-16 (Thu, 16 Apr 2026)
Changed paths:
M clang/lib/Driver/ToolChains/Hexagon.cpp
M clang/lib/Driver/ToolChains/Hexagon.h
A clang/test/Driver/Inputs/hexagon_tree/Tools/target/picolibc/hexagon-unknown-none-elf/include/c++/readme
A clang/test/Driver/Inputs/hexagon_tree/Tools/target/picolibc/hexagon-unknown-none-elf/include/c++/v1/readme
A clang/test/Driver/Inputs/hexagon_tree/Tools/target/picolibc/hexagon-unknown-none-elf/include/readme
A clang/test/Driver/Inputs/hexagon_tree/Tools/target/picolibc/hexagon-unknown-none-elf/readme
A clang/test/Driver/Inputs/hexagon_tree/Tools/target/picolibc/readme
A clang/test/Driver/hexagon-toolchain-picolibc.c
Log Message:
-----------
[Clang][Hexagon] Use --cstdlib flag to choose Picolibc (#183257)
Update the Hexagon toolchain to use --cstdlib flag to allow users to
choose Picolibc as the C library.
This allows proper selection of C library when targeting
Hexagon environments.
depends on https://github.com/llvm/llvm-project/pull/183254
Signed-off-by: Kushal Pal <kushpal at qti.qualcomm.com>
Commit: 0e5cad062cd55499ae12fd3ef4bdb555dc2169f4
https://github.com/llvm/llvm-project/commit/0e5cad062cd55499ae12fd3ef4bdb555dc2169f4
Author: Erick Ochoa Lopez <erick.ochoalopez at amd.com>
Date: 2026-04-16 (Thu, 16 Apr 2026)
Changed paths:
M mlir/lib/Dialect/Vector/IR/VectorOps.cpp
A mlir/test/Dialect/Vector/canonicalize/vector-extract.mlir
Log Message:
-----------
[mlir][vector] Fold vector extract from insert when trailing unit dims (#192109)
Upstreamed from https://github.com/iree-org/iree/pull/23789
Folds vector.extract from vector.insert when the extract position is a
prefix of the insert position and the remaining (un-indexed) dimensions
of the extracted sub-vector are all size 1. In that case the extracted
value is fully determined by the inserted value.
Example:
%ins = vector.insert %s, %v [3, 0] : f32 into vector<16x1xf32>
%ext = vector.extract %ins [3] : vector<1xf32> from vector<16x1xf32>
folds to:
%ext = vector.broadcast %s : f32 to vector<1xf32>
Co-authored-by: Jakub Kuderski <kubakuderski at gmail.com>
Co-Authored-By: Claude Opus 4.6 (1M context) <noreply at anthropic.com>
Commit: 0162dbc91d5786dd4195555695759f7620f67f58
https://github.com/llvm/llvm-project/commit/0162dbc91d5786dd4195555695759f7620f67f58
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2026-04-16 (Thu, 16 Apr 2026)
Changed paths:
M flang/include/flang/Evaluate/match.h
Log Message:
-----------
[flang] Fix some typos in comments, NFC (#192445)
Commit: 4f50ce24315a03cfb3b9ec2e5480d866c451f1ad
https://github.com/llvm/llvm-project/commit/4f50ce24315a03cfb3b9ec2e5480d866c451f1ad
Author: Shonie Caplan <94767648+shoniecaplan at users.noreply.github.com>
Date: 2026-04-16 (Thu, 16 Apr 2026)
Changed paths:
M llvm/lib/Transforms/IPO/FunctionAttrs.cpp
M llvm/test/Transforms/FunctionAttrs/noundef.ll
Log Message:
-----------
[FunctionAttrs] Don't infer noundef when return has nofpclass (#191822)
- Fixes: #191338
nofpclass violations on a return produce poison.
Poison returns marked noundef are UB.
This turns off noundef inference when nofpclass attributes are present.
---------
Co-authored-by: Shonie Caplan <shonie at genki.com>
Co-authored-by: Yingwei Zheng <dtcxzyw at qq.com>
Commit: c463b75509500e3e8151673fa247766af6cd33e2
https://github.com/llvm/llvm-project/commit/c463b75509500e3e8151673fa247766af6cd33e2
Author: Anatoly Trosinenko <atrosinenko at accesssoftek.com>
Date: 2026-04-16 (Thu, 16 Apr 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
Log Message:
-----------
[AArch64] Factor out handling of AUTRELLOADPAC addend in AsmPrinter (NFC) (#192076)
In `AArch64AsmPrinter`, move the emission of code that handles the
Addend operand of AUTRELLOADPAC from `emitPtrauthAuthResign` to a
separate function.
Make use of recently added helper functions and update the comments.
Refer to named `Pointer` and `Scratch` registers instead of
hardcoding X16 and X17.
Commit: 0a11c04f42666dfb838d08d5176b474256a8f22f
https://github.com/llvm/llvm-project/commit/0a11c04f42666dfb838d08d5176b474256a8f22f
Author: Nico Weber <thakis at chromium.org>
Date: 2026-04-16 (Thu, 16 Apr 2026)
Changed paths:
M llvm/utils/gn/secondary/clang/unittests/Serialization/BUILD.gn
Log Message:
-----------
[gn build] Port ad2bf491badb (#192461)
Commit: 0e3f5504beb0e4ac918f6934fdc7cbf847014e9d
https://github.com/llvm/llvm-project/commit/0e3f5504beb0e4ac918f6934fdc7cbf847014e9d
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-04-16 (Thu, 16 Apr 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_function_pointers/fun-ptr-addrcast.ll
M llvm/test/CodeGen/SPIRV/opencl/device_execution/execute_block.ll
M llvm/test/CodeGen/SPIRV/pointers/PtrCast-null-in-OpSpecConstantOp.ll
A llvm/test/CodeGen/SPIRV/struct-null-pointer-member.ll
Log Message:
-----------
[SPIR-V] Simplify addrspacecast for null in composite constant preprocessing (#192030)
Fold addrspacecast(null) to a typed null pointer during composite
constant preprocessing so that null pointer members in structs and
arrays get the correct SPIR-V pointer type instead of being lowered as
integers. This fixes invalid SPIR-V where OpConstantNull had an integer
type instead of a pointer type, and where OpSpecConstantOp was
unnecessarily emitted for null casts
related to https://github.com/llvm/llvm-project/issues/190736
Commit: 2c67f2fdfc41afd9acfe28e3cb42850a97f1db54
https://github.com/llvm/llvm-project/commit/2c67f2fdfc41afd9acfe28e3cb42850a97f1db54
Author: Georgiy Samoylov <Ignitor21838 at gmail.com>
Date: 2026-04-16 (Thu, 16 Apr 2026)
Changed paths:
M llvm/include/llvm/MC/TargetRegistry.h
M llvm/lib/MC/TargetRegistry.cpp
M llvm/unittests/MC/TargetRegistry.cpp
Log Message:
-----------
[llvm] Add format check for MCSubtargetFeatures (#180943)
`SubtargetFeatures` class has next constraints:
https://github.com/llvm/llvm-project/blob/c9d065abc15846deb95a23fb0b3e1855d3d26314/llvm/include/llvm/TargetParser/SubtargetFeature.h#L167-L174
At this moment feature string isn't checked for fitting in such format.
This leads to assertion failure, for example in lldb:
https://github.com/llvm/llvm-project/pull/180901, when features from
user's input don't meet the requirements.
With implementing additional format check we can avoid such problems.
Commit: 925e2156c71da60a61f1199960f5fff82de35f57
https://github.com/llvm/llvm-project/commit/925e2156c71da60a61f1199960f5fff82de35f57
Author: Mirko Brkušanin <Mirko.Brkusanin at amd.com>
Date: 2026-04-16 (Thu, 16 Apr 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SISchedule.td
M llvm/test/tools/llvm-mca/AMDGPU/gfx12-pseudo-scalar-trans.s
Log Message:
-----------
[AMDGPU] Update gfx12 sched model (#192448)
Commit: c095488da4586f4d98c13f9793088b444e686a4a
https://github.com/llvm/llvm-project/commit/c095488da4586f4d98c13f9793088b444e686a4a
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-04-16 (Thu, 16 Apr 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/RISCV/same-node-reused.ll
M llvm/test/Transforms/SLPVectorizer/X86/deleted-instructions-clear.ll
M llvm/test/Transforms/SLPVectorizer/X86/entries-different-vf.ll
M llvm/test/Transforms/SLPVectorizer/X86/reduction-shl1-add-merge.ll
M llvm/test/Transforms/SLPVectorizer/X86/shl-compatible-with-add.ll
M llvm/test/Transforms/SLPVectorizer/X86/shl-to-add-transformation.ll
M llvm/test/Transforms/SLPVectorizer/X86/shl-to-add-transformation5.ll
M llvm/test/Transforms/SLPVectorizer/X86/shll1-add-sub-combined.ll
Log Message:
-----------
[SLP]Initial compatibility support for shl v, 1 and add v, v
Allows to make shl v, 1 to be compatible with add operations by
modeling it as add v,v
Fixes #40801
Reviewers: bababuck, hiraditya, RKSimon
Pull Request: https://github.com/llvm/llvm-project/pull/181168
Commit: b96818f2e0118fcbf908b0a168ca1d23190ac295
https://github.com/llvm/llvm-project/commit/b96818f2e0118fcbf908b0a168ca1d23190ac295
Author: David Spickett <david.spickett at arm.com>
Date: 2026-04-16 (Thu, 16 Apr 2026)
Changed paths:
M lldb/test/API/tools/lldb-server/TestGdbRemoteHostInfo.py
Log Message:
-----------
[lldb][test] Remove print in TestGdbRemoteHostInfo.py (#192468)
Leftover debugging code, not part of the test's assertions.
Commit: 2f268ec5b04462bebb94bfe07633cdbd3881b2c7
https://github.com/llvm/llvm-project/commit/2f268ec5b04462bebb94bfe07633cdbd3881b2c7
Author: Peng Sun <peng.sun at arm.com>
Date: 2026-04-16 (Thu, 16 Apr 2026)
Changed paths:
M mlir/include/mlir/Dialect/Tosa/IR/TosaComplianceData.h.inc
M mlir/include/mlir/Dialect/Tosa/IR/TosaOps.td
M mlir/lib/Dialect/Tosa/IR/TosaOps.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaProfileCompliance.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaValidation.cpp
M mlir/test/Dialect/Tosa/availability.mlir
M mlir/test/Dialect/Tosa/invalid_extension.mlir
M mlir/test/Dialect/Tosa/ops.mlir
M mlir/test/Dialect/Tosa/tosa-infer-shapes.mlir
M mlir/test/Dialect/Tosa/tosa-validation-version-1p0-invalid.mlir
M mlir/test/Dialect/Tosa/tosa-validation-version-1p1-pro-fp-valid.mlir
M mlir/test/Dialect/Tosa/tosa-validation-version-1p1-valid.mlir
M mlir/test/Dialect/Tosa/verifier.mlir
Log Message:
-----------
[mlir][tosa] Add row_gather_block_scaled op (#192272)
Add `tosa.row_gather_block_scaled` to the MLIR TOSA dialect, aligned
with the current TOSA 1.1 draft spec and the implementation in
`tosa-tools`.
This includes:
- op definition
- verifier and shape inference support
- validation / profile compliance wiring
- availability and extension handling
- lit tests for parsing, verification, shape inference, and version /
extension gating
The op supports both spec-defined forms:
- non-block-scaled: 1 input value tensor, `BLOCK_SIZE_1`, 1 output
- block-scaled: data + scale tensor list, non-`BLOCK_SIZE_1`, 2 outputs
Op-specific level checks for ROW_GATHER_BLOCK_SCALED have been deferred
while the TOSA 1.1 draft is still evolving.
Signed-off-by: Peng Sun <peng.sun at arm.com>
Commit: f472ebed217c51af47cc6eb3ec697d8555b00c50
https://github.com/llvm/llvm-project/commit/f472ebed217c51af47cc6eb3ec697d8555b00c50
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-04-16 (Thu, 16 Apr 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVBuiltins.cpp
M llvm/lib/Target/SPIRV/SPIRVBuiltins.td
A llvm/test/CodeGen/SPIRV/smulextended-builtin.ll
A llvm/test/CodeGen/SPIRV/umulextended-builtin.ll
Log Message:
-----------
[SPIR-V] Add OpSMulExtended and OpUMulExtended builtin support (#187474)
Support OpSMulExtended and OpUMulExtended builtins in a new MulExtended
builtin group and handle both calling conventions: direct struct return
and sret pointer.
Commit: ad554651add849014743f68c0decef3e66b3cdbd
https://github.com/llvm/llvm-project/commit/ad554651add849014743f68c0decef3e66b3cdbd
Author: Mel Chen <mel.chen at sifive.com>
Date: 2026-04-16 (Thu, 16 Apr 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/sve-vector-reverse-mask4.ll
M llvm/test/Transforms/LoopVectorize/AArch64/vector-reverse-mask4.ll
M llvm/test/Transforms/LoopVectorize/RISCV/dbg-tail-folding-by-evl.ll
M llvm/test/Transforms/LoopVectorize/RISCV/predicated-reverse-store.ll
M llvm/test/Transforms/LoopVectorize/RISCV/riscv-vector-reverse.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-reverse-load-store.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-uniform-store.ll
M llvm/test/Transforms/LoopVectorize/VPlan/RISCV/vplan-riscv-vector-reverse.ll
M llvm/test/Transforms/LoopVectorize/X86/masked_load_store.ll
M llvm/unittests/Transforms/Vectorize/VPlanTest.cpp
Log Message:
-----------
Reapply "[VPlan] Extract reverse mask from reverse accesses" (#189930)
Following https://github.com/llvm/llvm-project/pull/146525, separate the
reverse mask from reverse access recipes.
At the same time, remove the unused member variable Reverse from
VPWidenMemoryRecipe.
This will help to reduce redundant reverse mask computations by
VPlan-based common subexpression elimination.
The previous revert was due to an over-aggressive assertion that
incorrectly flagged a reverse load followed by a scatter store as
illegal. This version relaxes the assertion to check the mask only.
Re-land #155579
Base on pre-commit #189928
Commit: e4ebeac8d1ee124016e6fa9fba8e5a05c3737543
https://github.com/llvm/llvm-project/commit/e4ebeac8d1ee124016e6fa9fba8e5a05c3737543
Author: Scott Linder <scott.linder at amd.com>
Date: 2026-04-16 (Thu, 16 Apr 2026)
Changed paths:
M llvm/lib/CodeGen/MachineCopyPropagation.cpp
Log Message:
-----------
[MCP][NFC] Cleanup and prepare to preserve frame-setup/destroy (#186240)
This mixes renames, removing redundant code, avoiding
`else`-after-`return`, etc. with factoring out the `isNeverRedundant`
concept.
Change-Id: I43a62a9415019cdd63c68fd3b915ebb7505d317a
Commit: 232251164fe1fe7336450bfd61810aa9b812c6bb
https://github.com/llvm/llvm-project/commit/232251164fe1fe7336450bfd61810aa9b812c6bb
Author: Leonardo Román Carrillo <leonardoroman at google.com>
Date: 2026-04-16 (Thu, 16 Apr 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp
Log Message:
-----------
[AArch64] Correct comparator in regalloc hints to satisfy strict weak ordering (#192383)
The current comparator will have a strict-weak ordering violation for
the following scenario:
a = GoodReg ((!CSRs.contains(A) || !MRI.def_empty(A) ||
Matrix->isPhysRegUsed(A)) == true) && !Op1Reg
b = BadReg ((!CSRs.contains(A) || !MRI.def_empty(A) ||
Matrix->isPhysRegUsed(A)) == false) && !Op1Reg
c = Op1Reg
Then we would have:
a vs c
A != B && B == Op1Reg && (!CSRs.contains(A) || !MRI.def_empty(A) ||
Matrix->isPhysRegUsed(A)) = true && true && true ->
a < c
a vs b
A != B && B == Op1Reg && (!CSRs.contains(A) || !MRI.def_empty(A) ||
Matrix->isPhysRegUsed(A)) =true && false && false ->
a ~ b
b vs c
A != B && B == Op1Reg && (!CSRs.contains(A) || !MRI.def_empty(A) ||
Matrix->isPhysRegUsed(A)) = true && true && false ->
b ~ c
That will result in a strict-weak ordering violation (a < c && a ~ c),
with the new implementation we define that a < b && a < c.
Commit: 0a984edbcd2e2f094f45e5ec009d444a947aea18
https://github.com/llvm/llvm-project/commit/0a984edbcd2e2f094f45e5ec009d444a947aea18
Author: Chandana Mudda <quic_csinderi at quicinc.com>
Date: 2026-04-16 (Thu, 16 Apr 2026)
Changed paths:
M llvm/lib/Target/Hexagon/HexagonPatterns.td
A llvm/test/CodeGen/Hexagon/sext-mul-v2i16.ll
Log Message:
-----------
[Hexagon] Optimize sext + mul pattern to use vmpyh instruction (#190316)
This patch adds TableGen patterns to recognize and optimize the pattern:
(v2i32 (mul (sext v2i16), (sext v2i16)))
And transforms it to use the M2_vmpy2s_s0 instruction which generates
the efficient vmpyh (vector multiply halfwords) instruction.
The transform is guarded by `nsw` because `M2_vmpy2s_s0` performs a
saturating signed multiply (`vmpyh(...):sat`), so the replacement is
only semantics-preserving when signed overflow is undefined in the IR.
Currently, this pattern expands to:
r3:2 = vsxthw(r0) // Sign extend
r1:0 = vsxthw(r1) // Sign extend
r1 = mpyi(r3,r1) // Scalar multiply
r0 = mpyi(r2,r0) // Scalar multiply
With this patch, it generates:
r1:0 = vmpyh(r0,r1):sat // Single vector multiply
Co-authored-by: Santanu Das <quic_santdas at quicinc.com>
Commit: fce45b3e961cac33e6b26725405a14a5b1f5d733
https://github.com/llvm/llvm-project/commit/fce45b3e961cac33e6b26725405a14a5b1f5d733
Author: Vassil Vassilev <v.g.vassilev at gmail.com>
Date: 2026-04-16 (Thu, 16 Apr 2026)
Changed paths:
M clang/include/clang/Frontend/CompilerInstance.h
M clang/lib/Frontend/CompilerInstance.cpp
A clang/test/Interpreter/ftime-report.cpp
M clang/tools/driver/cc1_main.cpp
M clang/unittests/Support/TimeProfilerTest.cpp
Log Message:
-----------
[Frontend] Consolidate frontend timer setup in CompilerInstance::ExecuteAction. NFC (#192266)
Move the frontend timer creation (-ftime-report) and TimeTraceScope
("ExecuteCompiler") from cc1_main into CompilerInstance::ExecuteAction
via a new private PrepareForExecution() method. This ensures all tools
that use ExecuteAction (cc1, clang-repl, libclang, etc.) get consistent
timing infrastructure without duplicating setup code.
Commit: 5467e556a3756304e5c9a8aa93e309da755eff28
https://github.com/llvm/llvm-project/commit/5467e556a3756304e5c9a8aa93e309da755eff28
Author: Kito Cheng <kito.cheng at sifive.com>
Date: 2026-04-16 (Thu, 16 Apr 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVCallingConv.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVIndirectBranchTracking.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfo.td
M llvm/lib/Target/RISCV/RISCVLandingPadSetup.cpp
M llvm/lib/Target/RISCV/RISCVMachineFunctionInfo.cpp
M llvm/lib/Target/RISCV/RISCVMachineFunctionInfo.h
M llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/brindirect-rv32.mir
M llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/brindirect-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/calls.ll
M llvm/test/CodeGen/RISCV/branch-relaxation-rv32.ll
M llvm/test/CodeGen/RISCV/branch-relaxation-rv64.ll
A llvm/test/CodeGen/RISCV/calls-cf-branch.ll
M llvm/test/CodeGen/RISCV/calls.ll
A llvm/test/CodeGen/RISCV/cf-branch-isel.ll
M llvm/test/CodeGen/RISCV/jumptable-swguarded.ll
M llvm/test/CodeGen/RISCV/kcfi-isel-mir.ll
M llvm/test/CodeGen/RISCV/lpad.ll
M llvm/test/CodeGen/RISCV/machine-outliner-call-reg-live-across.mir
M llvm/test/CodeGen/RISCV/nest-register.ll
M llvm/test/CodeGen/RISCV/opt-w-instrs.mir
M llvm/test/CodeGen/RISCV/pr97304.ll
M llvm/test/CodeGen/RISCV/tail-calls.ll
M llvm/test/CodeGen/RISCV/zicfilp-indirect-branch.ll
Log Message:
-----------
[RISCV] Generate landing pad based on cf-protection-branch flag only (#179960)
Previously, the backend generated lpad instructions when the Zicfilp
extension was enabled. This patch changes the behavior to generate lpad
instructions only when the cf-protection-branch module flag is set
(typically from -fcf-protection=branch).
This aligns with the Clang frontend's intent, which has a comment saying
"Always generate Zicfilp lpad insns, Non-zicfilp CPUs would read them as
NOP".
The Zicfilp extension is no longer required for lpad generation - only
the module flag matters. Tests that previously used
-mattr=+experimental-zicfilp to trigger lpad generation now use the
cf-protection-branch module flag.
Additionally, the selection of NonX7 variants for indirect
branches/calls is now based on the cf-protection-branch module flag
instead of the Zicfilp extension. This ensures consistent behavior: when
cf-protection-branch is enabled, X7 is reserved for landing pad labels
and cannot be used for indirect branch/call target addresses.
Commit: f4e43c43ea7da30c580d5edb1e2f5e12623d1184
https://github.com/llvm/llvm-project/commit/f4e43c43ea7da30c580d5edb1e2f5e12623d1184
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-04-16 (Thu, 16 Apr 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.h
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlan.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanAnalysis.cpp
M llvm/lib/Transforms/Vectorize/VPlanPatternMatch.h
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanUnroll.cpp
M llvm/test/Transforms/LoopVectorize/X86/cost-model.ll
M llvm/test/Transforms/LoopVectorize/X86/pr109581-unused-blend.ll
M llvm/test/Transforms/LoopVectorize/epilog-vectorization-any-of-reductions.ll
M llvm/test/Transforms/LoopVectorize/epilog-vectorization-reductions.ll
M llvm/test/Transforms/LoopVectorize/select-cmp-multiuse.ll
Log Message:
-----------
[VPlan] Remove ComputeAnyOfResult, use ComputeReductionResult. (#190039)
ComputeAnyOfResult is simply a boolean OR reduction. Remove the
dedicated opcode and model directly via ComputeReductionResult.
This simplifies and unifies the code, as well as enabling trivial
constant folding.
PR: https://github.com/llvm/llvm-project/pull/190039
Commit: 9d923ec59516041609038fabeaae8202026adec6
https://github.com/llvm/llvm-project/commit/9d923ec59516041609038fabeaae8202026adec6
Author: Lei Huang <lei at ca.ibm.com>
Date: 2026-04-16 (Thu, 16 Apr 2026)
Changed paths:
M clang/include/clang/Basic/BuiltinsPPC.def
M clang/lib/Headers/altivec.h
M clang/lib/Sema/SemaPPC.cpp
A clang/test/CodeGen/PowerPC/builtins-ppc-deeply-compressed-weights.c
A clang/test/Sema/builtins-ppc-deeply-compressed-weights-error.c
M llvm/include/llvm/IR/IntrinsicsPowerPC.td
M llvm/lib/Target/PowerPC/PPCInstrFuture.td
A llvm/test/CodeGen/PowerPC/deeply-compressed-weights.ll
Log Message:
-----------
[PowerPC] Implement Deeply Compressed Weights Builtins (#184666)
Add support for the following deeply compressed weights builtins for ISA
Future.
- vec_uncompresshn(vector unsigned char, vector unsigned char)
- vec_uncompressln(vector unsigned char, vector unsigned char)
- vec_uncompresshb(vector unsigned char, vector unsigned char)
- vec_uncompresslb(vector unsigned char, vector unsigned char)
- vec_uncompresshh(vector unsigned char, vector unsigned char)
- vec_uncompresslh(vector unsigned char, vector unsigned char)
- vec_unpack_hsn_to_byte(vector unsigned char)
- vec_unpack_lsn_to_byte(vector unsigned char)
- vec_unpack_int4_to_bf16(vector unsigned char, uint2)
- vec_unpack_int8_to_bf16(vector unsigned char, uint1)
- vec_unpack_int4_to_fp32(vector unsigned char, uint3)
- vec_unpack_int8_to_fp32(vector unsigned char, uint2)
Assisted by AI.
Commit: 82467159043f3007e41e81fb921c81beaa234a14
https://github.com/llvm/llvm-project/commit/82467159043f3007e41e81fb921c81beaa234a14
Author: vangthao95 <vang.thao at amd.com>
Date: 2026-04-16 (Thu, 16 Apr 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.add.min.max.ll
Log Message:
-----------
AMDGPU/GlobalISel: RegBankLegalize rules for add_min/max intrinsics (#192356)
Commit: 04cae92976cc89c9747cb057c9d88a4c1bc25db6
https://github.com/llvm/llvm-project/commit/04cae92976cc89c9747cb057c9d88a4c1bc25db6
Author: Alex Voicu <alexandru.voicu at amd.com>
Date: 2026-04-16 (Thu, 16 Apr 2026)
Changed paths:
M clang/lib/Basic/Targets/SPIR.cpp
M clang/test/Preprocessor/predefined-macros.c
Log Message:
-----------
[SPIRV] Conditionally define `__AMDGCN_UNSAFE_FP_ATOMICS__` for AMDGCN flavoured SPIR-V (#192136)
Client apps rely on the `__AMDGCN_UNSAFE_FP_ATOMICS__` macro to guide
optimised execution pathways. We were not defining it for AMDGCN
flavoured SPIR-V, which led to pessimisation.
Commit: 547197d200cbaf7b24b9f14c756310e3b60c8850
https://github.com/llvm/llvm-project/commit/547197d200cbaf7b24b9f14c756310e3b60c8850
Author: woruyu <1214539920 at qq.com>
Date: 2026-04-16 (Thu, 16 Apr 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPU.h
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/lib/Target/AMDGPU/AMDGPUUnifyDivergentExitNodes.cpp
Log Message:
-----------
[NFC][AMDGPU] Rename AMDGPUUnifyDivergentExitNodes to AMDGPUUnifyDivergentExitNodesLegacy (#192399)
### Summary
This NFC patch renames the legacy pass wrapper class for
`AMDGPUUnifyDivergentExitNodes` to
`AMDGPUUnifyDivergentExitNodesLegacy`. This makes the old pass manager
wrapper explicit and avoids ambiguity. No behavior change is intended.
Commit: 1b433e936fbeef8fc1c649ad223719df897d311f
https://github.com/llvm/llvm-project/commit/1b433e936fbeef8fc1c649ad223719df897d311f
Author: Razvan Lupusoru <razvan.lupusoru at gmail.com>
Date: 2026-04-16 (Thu, 16 Apr 2026)
Changed paths:
M mlir/include/mlir/Dialect/OpenACC/OpenACCCGOps.td
M mlir/lib/Dialect/OpenACC/IR/OpenACCCG.cpp
M mlir/lib/Dialect/OpenACC/Utils/OpenACCUtils.cpp
A mlir/test/Dialect/OpenACC/compute-region-canonicalize.mlir
M mlir/unittests/Dialect/OpenACC/OpenACCUtilsCGTest.cpp
Log Message:
-----------
[mlir][acc] Add canonicalization patterns for compute_region (#192376)
This PR improves the APIs for navigating through acc.compute_region
block arguments and also adds canonicalization patterns for those
arguments to remove unused ones and merge duplicates.
Commit: a81621a7b14ffd33d1b3fd7b6134a083f51ea1d3
https://github.com/llvm/llvm-project/commit/a81621a7b14ffd33d1b3fd7b6134a083f51ea1d3
Author: vangthao95 <vang.thao at amd.com>
Date: 2026-04-16 (Thu, 16 Apr 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.perm.pk.ll
Log Message:
-----------
AMDGPU/GlobalISel: RegBankLegalize rules for perm_pk16_b{4,6,8}_u4 (#192368)
Commit: 1317890e1b81b952dbbd6d4011fc9113d4722488
https://github.com/llvm/llvm-project/commit/1317890e1b81b952dbbd6d4011fc9113d4722488
Author: Jiahao Guo <eoonguo at gmail.com>
Date: 2026-04-16 (Thu, 16 Apr 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp
M clang/test/CodeGen/AArch64/neon-intrinsics.c
M clang/test/CodeGen/AArch64/neon/intrinsics.c
Log Message:
-----------
[CIR][AArch64] Lower NEON vrsra_n intrinsics (#191129)
### Summary
Implement CIR lowering for all intrinsics in
https://arm-software.github.io/acle/neon_intrinsics/advsimd.html#vector-rounding-shift-right-and-accumulate
This PR references the implementation from the ClangIR incubator:
https://github.com/llvm/clangir/blob/main/clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp#L4854
AArch64 does not provide a dedicated "rounding shift right by immediate"
instruction. Instead, the `SRSHL` / `URSHL` intrinsics take a signed
per-lane shift amount where a negative value means right shift, so an
immediate right shift by `n` is encoded as a signed vector splat of
`-n`. The three infrastructure changes below exist to support this
encoding at the call site:
- extends `emitNeonShiftVector` with a `neg` parameter so the
right-shift-as-negative-left-shift encoding is handled inside the
helper;
- adds `getSignChangedVectorType` (also mirroring the incubator) used to
construct the signed shift-amount vector type for the unsigned path;
- replaces the `errorNYI` in `emitNeonCallToOp`'s `shift == j` branch
with an actual call to `emitNeonShiftVector`.
Tests: new CHECK lines in clang/test/CodeGen/AArch64/neon/intrinsics.c
under section 2.1.3.2.4.
Part of #185382.
Commit: 7aa2b040236bfa8b60ebec69af60f5a334ee160e
https://github.com/llvm/llvm-project/commit/7aa2b040236bfa8b60ebec69af60f5a334ee160e
Author: Nick Desaulniers <ndesaulniers at google.com>
Date: 2026-04-16 (Thu, 16 Apr 2026)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/stack-clash-dynamic-alloca.ll
M llvm/test/CodeGen/X86/stack-clash-small-alloc-medium-align.ll
Log Message:
-----------
[X86] Use unsigned comparison for stack clash probing loop (#192355)
The stack clash probing loop generated in `EmitLoweredProbedAlloca` used
a signed comparison (`X86::COND_GE`) to determine when the allocation
target had been reached.
In 32-bit mode, memory addresses above `0x80000000` have the sign bit
set. If the stack pointer lands in this region, treating the addresses
as signed integers causes the comparison logic to fail. This leads to
incorrect loop execution, resulting in an infinite loop and a crash
(segmentation fault) when setting up custom stacks for pthreads mapped
above `0x80000000` in a 32b process.
This patch changes the condition code to `X86::COND_AE` (Above or
Equal), which generates an unsigned comparison. This ensures that
addresses are treated correctly as unsigned quantities on all targets.
On 64-bit systems, this change has no practical effect on valid
user-space addresses because they do not use the sign bit (being
restricted to the lower half of the address space). However, using
unsigned comparison is the correct behavior for pointer arithmetic and
bounds checks.
Reported-by: Wonsik Kim <wonsik at google.com>
Commit: dcfe195ef1cb7590207cc7a89765482cfb164767
https://github.com/llvm/llvm-project/commit/dcfe195ef1cb7590207cc7a89765482cfb164767
Author: Scott Linder <scott.linder at amd.com>
Date: 2026-04-16 (Thu, 16 Apr 2026)
Changed paths:
M llvm/lib/CodeGen/MachineCopyPropagation.cpp
Log Message:
-----------
[MCP][NFC] Opinionated refactoring (#186239)
There are a few minor inconsistencies across the pass which I found mildly distracting:
* The use of `Def`/`Dest`/`Dst` to refer to the same thing
* Inconsistent declaration order of `Dst`/`Src` vs `Src`/`Dst`
* Lots of `->getReg()->asMCReg()`, and uses of `Register` when the pass
is always running after RA anyway.
* Some places explicitly `assert(isCopyInstr)` while others just deref
the `optional`.
Standardize on `Dst`/`Src` to match the metaphor and ordering of
`DestSourcePair`.
Assume `std::optional::operator*` will assert in any reasonable
implementation, even though this may technically be undefined behavior.
When asserts are disabled it would be anyway.
The refactor uses structured bindings for a couple reasons:
* Naturally enforces consistent order of `Dst`-then-`Src`
* Requires the use of `auto`, which ensures the declaration is not
implicitly converting from `MCRegister` back to `Register`.
In both cases the explicitness of the name `getDstSrcMCRegs` hopefully
makes the meaning at the callsite clear (`Dst, Src = DstSrc`, and
explicitly mentioning `MCReg`).
Change-Id: Ic58f555e03535d726cdad38dbe3f9c6df1b86460
Commit: ffde06f4c11927c60936802fb439a5195ac0742e
https://github.com/llvm/llvm-project/commit/ffde06f4c11927c60936802fb439a5195ac0742e
Author: Finn Plummer <mail at inbelic.dev>
Date: 2026-04-16 (Thu, 16 Apr 2026)
Changed paths:
M llvm/include/llvm/InitializePasses.h
M llvm/include/llvm/Transforms/Utils.h
A llvm/include/llvm/Transforms/Utils/StripConvergenceIntrinsics.h
M llvm/lib/Passes/PassBuilder.cpp
M llvm/lib/Passes/PassRegistry.def
M llvm/lib/Target/DirectX/DirectXTargetMachine.cpp
M llvm/lib/Target/SPIRV/CMakeLists.txt
M llvm/lib/Target/SPIRV/SPIRV.h
R llvm/lib/Target/SPIRV/SPIRVStripConvergentIntrinsics.cpp
M llvm/lib/Target/SPIRV/SPIRVTargetMachine.cpp
M llvm/lib/Transforms/Utils/CMakeLists.txt
A llvm/lib/Transforms/Utils/StripConvergenceIntrinsics.cpp
M llvm/test/CodeGen/DirectX/llc-pipeline.ll
A llvm/test/CodeGen/DirectX/strip-convergence-intrinsics.ll
M llvm/test/CodeGen/SPIRV/llc-pipeline.ll
A llvm/test/Transforms/StripConvergenceIntrinsics/basic.ll
Log Message:
-----------
[NFC][SPIRV] Move `SPIRVStripConvergenceIntrinsics` to Utils (#188537)
The `SPIRVStripConvergenceIntrinsic` pass was written as a spirv pass as
it is the currently the only target that emits convergence tokens during
codegen. There is nothing target specific to the pass, and, we plan to
emit convergence tokens when targeting DirectX (and all targets in
general), so move the pass to a common place.
The previous pass used temporary `Undef`s, as part of moving the pass we
can simply reverse the traverse order to remove the use of `Undef` as it
is deprecated.
Enables the pass for targeting DirectX and is a pre-req for:
https://github.com/llvm/llvm-project/pull/188792.
Assisted by: Github Copilot
Commit: 9e45a7a4fa86dae50569308df5c5d5ab9a441bdc
https://github.com/llvm/llvm-project/commit/9e45a7a4fa86dae50569308df5c5d5ab9a441bdc
Author: Nick Sarnie <nick.sarnie at intel.com>
Date: 2026-04-16 (Thu, 16 Apr 2026)
Changed paths:
M clang/lib/CodeGen/CGExpr.cpp
M clang/test/OpenMP/target_indirect_codegen.cpp
Log Message:
-----------
[clang][OpenMP] Fix __llvm_omp_indirect_call_lookup signature for targets with non-default program AS (#192470)
The argument and return value for `__llvm_omp_indirect_call_lookup` are
function pointers so make sure they are in the correct address space.
Signed-off-by: Nick Sarnie <nick.sarnie at intel.com>
Commit: 7328b74dceed9764b9195e42f1e6f08f04727157
https://github.com/llvm/llvm-project/commit/7328b74dceed9764b9195e42f1e6f08f04727157
Author: Kelvin Li <kli at ca.ibm.com>
Date: 2026-04-16 (Thu, 16 Apr 2026)
Changed paths:
M flang/lib/Optimizer/CodeGen/CMakeLists.txt
M flang/lib/Optimizer/CodeGen/CodeGen.cpp
M flang/test/Lower/PowerPC/ppc-vec-convert.f90
M flang/test/Lower/PowerPC/ppc-vec-load-elem-order.f90
M flang/test/Lower/PowerPC/ppc-vec-load.f90
M flang/test/Lower/PowerPC/ppc-vec-store-elem-order.f90
M flang/test/Lower/PowerPC/ppc-vec-store.f90
Log Message:
-----------
[flang] Handle ub.poison in lowering (#192454)
This patch is to add the UB dialect registration and UBToLLVM conversion
interface in lowering.
Commit: e90f463db5c2d28ae0d65e2ceccfaa03d4ea7c53
https://github.com/llvm/llvm-project/commit/e90f463db5c2d28ae0d65e2ceccfaa03d4ea7c53
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-04-16 (Thu, 16 Apr 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/X86/bottom-to-top-reorder.ll
M llvm/test/Transforms/SLPVectorizer/X86/copyable_reorder.ll
M llvm/test/Transforms/SLPVectorizer/X86/operand-reorder-with-copyables.ll
M llvm/test/Transforms/SLPVectorizer/X86/reused-last-instruction-in-split-node.ll
Log Message:
-----------
[SLP] Normalize copyable operand order via majority voting
When building operands for entries with copyable elements, non-copyable
lanes of commutative ops may have inconsistent operand order (e.g. some
lanes have load,add while others have add,load). This prevents
VLOperands::reorder() from grouping consecutive loads on one side,
degrading downstream vectorization.
Add majority-voting normalization during buildOperands: track the
(ValueID, ValueID) pair frequency across non-copyable lanes and swap
any lane whose operand types are the exact inverse of the most common
pattern. This makes operand order consistent, enabling better load
grouping.
This is part 1 of #189181.
Reviewers: RKSimon, hiraditya
Pull Request: https://github.com/llvm/llvm-project/pull/191631
Commit: b9ae01500d8b8c6c5b6f35d09bacd11325e67c8f
https://github.com/llvm/llvm-project/commit/b9ae01500d8b8c6c5b6f35d09bacd11325e67c8f
Author: macurtis-amd <macurtis at amd.com>
Date: 2026-04-16 (Thu, 16 Apr 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPU.h
A llvm/lib/Target/AMDGPU/AMDGPUNextUseAnalysis.cpp
A llvm/lib/Target/AMDGPU/AMDGPUNextUseAnalysis.h
M llvm/lib/Target/AMDGPU/AMDGPUPassRegistry.def
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/lib/Target/AMDGPU/CMakeLists.txt
A llvm/test/CodeGen/AMDGPU/NextUseAnalysis/acyclic-014bb.mir
A llvm/test/CodeGen/AMDGPU/NextUseAnalysis/acyclic-770bb.mir
A llvm/test/CodeGen/AMDGPU/NextUseAnalysis/acyclic-cfg-with-self-loop.mir
A llvm/test/CodeGen/AMDGPU/NextUseAnalysis/acyclic-phi-merge-distances.mir
A llvm/test/CodeGen/AMDGPU/NextUseAnalysis/complex-acyclic-cfg-with-4-self-loops.mir
A llvm/test/CodeGen/AMDGPU/NextUseAnalysis/complex-control-flow-11blocks.mir
A llvm/test/CodeGen/AMDGPU/NextUseAnalysis/complex-control-flow-15blocks.mir
A llvm/test/CodeGen/AMDGPU/NextUseAnalysis/complex-single-loop-a.mir
A llvm/test/CodeGen/AMDGPU/NextUseAnalysis/complex-single-loop.mir
A llvm/test/CodeGen/AMDGPU/NextUseAnalysis/double-nested-loops-complex-cfg.mir
A llvm/test/CodeGen/AMDGPU/NextUseAnalysis/if_else_with_loops_nested_in_2_outer_loops.mir
A llvm/test/CodeGen/AMDGPU/NextUseAnalysis/inner_cfg_in_2_nested_loops.mir
A llvm/test/CodeGen/AMDGPU/NextUseAnalysis/loop_nested_in_3_outer_loops_complex_cfg.mir
A llvm/test/CodeGen/AMDGPU/NextUseAnalysis/nested-loops-with-side-exits-a.mir
A llvm/test/CodeGen/AMDGPU/NextUseAnalysis/sequence_2_loops.mir
A llvm/test/CodeGen/AMDGPU/NextUseAnalysis/simple-loop-3blocks.mir
A llvm/test/CodeGen/AMDGPU/NextUseAnalysis/spill-vreg-many-lanes.mir
A llvm/test/CodeGen/AMDGPU/NextUseAnalysis/test_ers_basic_case.mir
A llvm/test/CodeGen/AMDGPU/NextUseAnalysis/test_ers_do_not_spill_restore_inside_loop.mir
A llvm/test/CodeGen/AMDGPU/NextUseAnalysis/test_ers_emit_restore_in_common_dominator.mir
A llvm/test/CodeGen/AMDGPU/NextUseAnalysis/test_ers_emit_restore_in_loop_preheader1.mir
A llvm/test/CodeGen/AMDGPU/NextUseAnalysis/test_ers_emit_restore_in_loop_preheader2.mir
A llvm/test/CodeGen/AMDGPU/NextUseAnalysis/test_ers_emit_restore_in_loop_preheader3.mir
A llvm/test/CodeGen/AMDGPU/NextUseAnalysis/test_ers_emit_restore_in_loop_preheader4.mir
A llvm/test/CodeGen/AMDGPU/NextUseAnalysis/test_ers_keep_spilled_reg_live.mir
A llvm/test/CodeGen/AMDGPU/NextUseAnalysis/test_ers_multiple_spills1.mir
A llvm/test/CodeGen/AMDGPU/NextUseAnalysis/test_ers_multiple_spills2.mir
A llvm/test/CodeGen/AMDGPU/NextUseAnalysis/test_ers_multiple_spills3.mir
A llvm/test/CodeGen/AMDGPU/NextUseAnalysis/test_ers_nested_loops.mir
A llvm/test/CodeGen/AMDGPU/NextUseAnalysis/test_ers_spill_in_common_dominator_and_optimize_restores.mir
A llvm/test/CodeGen/AMDGPU/NextUseAnalysis/test_ers_spill_loop_livethrough_reg.mir
A llvm/test/CodeGen/AMDGPU/NextUseAnalysis/test_ers_spill_loop_value_in_exit_block.mir
A llvm/test/CodeGen/AMDGPU/NextUseAnalysis/three-tier-ranking-nested-loops.mir
A llvm/test/CodeGen/AMDGPU/NextUseAnalysis/triple-nested-loops.mir
A llvm/test/CodeGen/AMDGPU/NextUseAnalysis/two-sequential-loops.mir
Log Message:
-----------
AMDGPU: Add NextUseAnalysis Pass (#178873)
Based on
- https://github.com/llvm/llvm-project/pull/156079 and
- https://github.com/llvm/llvm-project/pull/171520
See those PRs for background.
Provides a compatibility mode option
`--amdgpu-next-use-analysis-compatibility-mode` that produces results
that match either PR #156079 (`compute`) or PR #171520 (`graphics`).
Co-authored-by: alex-t <atimofee at amd.com>
Co-authored-by: Konstantina Mitropoulou <KonstantinaMitropoulou at amd.com>
---------
Co-authored-by: Konstantina Mitropoulou <KonstantinaMitropoulou at amd.com>
Commit: fd8b58ce1c3e71b53a677394da1fcf3994e80585
https://github.com/llvm/llvm-project/commit/fd8b58ce1c3e71b53a677394da1fcf3994e80585
Author: Igor Wodiany <igor.wodiany at amd.com>
Date: 2026-04-16 (Thu, 16 Apr 2026)
Changed paths:
M mlir/test/Dialect/SPIRV/IR/group-ops.mlir
M mlir/test/Dialect/SPIRV/IR/non-uniform-ops.mlir
Log Message:
-----------
[mlir][spirv][nfc] Move GroupNonUniformBallotBitCount tests to `non-uniform-ops.mlir` (#192115)
Tests were incorrectly placed in `group-ops.mlir` since the op is
defined in `SPIRVNonUniformOps.td`.
Commit: 796302a402eb439592042bcbc9469ae2b4582b07
https://github.com/llvm/llvm-project/commit/796302a402eb439592042bcbc9469ae2b4582b07
Author: adams381 <adams at nvidia.com>
Date: 2026-04-16 (Thu, 16 Apr 2026)
Changed paths:
R clang/test/CIR/global-var-simple.cpp
Log Message:
-----------
[CIR][NFC] Remove redundant global-var-simple.cpp test (#192354)
This early smoke test is fully covered by
`clang/test/CIR/CodeGen/globals.cpp` and is no longer needed.
Per @andykaylor's feedback on #191521.
Made with [Cursor](https://cursor.com)
Commit: 3091b9811305b98cf45aaf6ed7b5c2c910b24a6f
https://github.com/llvm/llvm-project/commit/3091b9811305b98cf45aaf6ed7b5c2c910b24a6f
Author: adams381 <adams at nvidia.com>
Date: 2026-04-16 (Thu, 16 Apr 2026)
Changed paths:
M clang/lib/CIR/Dialect/Transforms/LoweringPrepare.cpp
M clang/test/CIR/CodeGen/global-array-dtor.cpp
M clang/test/CIR/CodeGen/global-init.cpp
Log Message:
-----------
[CIR] Add noundef to __cxx_global_array_dtor parameter (#191529)
The synthetic __cxx_global_array_dtor helper created by
LoweringPrepare was missing noundef on its ptr parameter,
causing a mismatch with classic codegen.
Commit: a109303236e2aef39c9abe0f3264af5fa482fe1a
https://github.com/llvm/llvm-project/commit/a109303236e2aef39c9abe0f3264af5fa482fe1a
Author: Matthew Nagy <matthew.nagy at sony.com>
Date: 2026-04-16 (Thu, 16 Apr 2026)
Changed paths:
M compiler-rt/lib/tysan/tysan.cpp
Log Message:
-----------
[TySan] Set and cache tool name. (#192410)
Partial reland of [sanitizer common
support](https://github.com/llvm/llvm-project/pull/183310)
Commit: 53368bf9788b58b80405394e2e7554c3e6b6fc65
https://github.com/llvm/llvm-project/commit/53368bf9788b58b80405394e2e7554c3e6b6fc65
Author: Vatsal Khosla <95174891+VatsalKhosla at users.noreply.github.com>
Date: 2026-04-16 (Thu, 16 Apr 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenAsm.cpp
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
M clang/test/CIR/IR/inline-asm.cir
Log Message:
-----------
[CIR] Fix InlineAsmOp roundtrip parse crash on cir.asm (#186588)
Fix InlineAsmOp parser/printer roundtrip for cir.asm and avoid null
operand_attrs entries that crash alias printing during
--verify-roundtrip.
- Parse attr-dict before optional result arrow to match print order.
- Use non-null sentinel attributes for non-maybe_memory operands and
check UnitAttr explicitly.
- Keep lowering semantics by treating only UnitAttr as maybe_memory
marker.
- Update inline-asm CIR IR test to run with --verify-roundtrip and add
an attr+result coverage case.
Fix https://github.com/llvm/llvm-project/issues/161441
Commit: db9132e636dd8d375a0c6c0191749c2a221350e1
https://github.com/llvm/llvm-project/commit/db9132e636dd8d375a0c6c0191749c2a221350e1
Author: Aman LaChapelle <aman.lachapelle at gmail.com>
Date: 2026-04-16 (Thu, 16 Apr 2026)
Changed paths:
M lldb/include/lldb/Interpreter/OptionGroupVariable.h
M lldb/source/Interpreter/OptionGroupVariable.cpp
Log Message:
-----------
[lldb] Reformat OptionGroupVariable.{h,cpp}, NFC. (#192395)
This patch runs clang-format on OptionGroupVariable.{h,cpp}.
Commit: 6ee930cb48a8716c884bb7d4991c0c1e05b3e766
https://github.com/llvm/llvm-project/commit/6ee930cb48a8716c884bb7d4991c0c1e05b3e766
Author: Nico Weber <thakis at chromium.org>
Date: 2026-04-16 (Thu, 16 Apr 2026)
Changed paths:
M clang/include/clang/Options/Options.td
M clang/test/Driver/cl-options.c
Log Message:
-----------
[clang] Expose -fdiagnostics-show-inlining-chain to clang-cl (#192241)
Commit: 0feabfa1d83356964d4464202db25ac1b4c94f6a
https://github.com/llvm/llvm-project/commit/0feabfa1d83356964d4464202db25ac1b4c94f6a
Author: Nico Weber <thakis at chromium.org>
Date: 2026-04-16 (Thu, 16 Apr 2026)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/Target/AMDGPU/BUILD.gn
Log Message:
-----------
[gn build] Port b9ae01500d8b (#192496)
[gn build] Port b9ae01500d8b
Commit: 9ff4276edf5cd4d614a7a46a4d8bde04d54df68a
https://github.com/llvm/llvm-project/commit/9ff4276edf5cd4d614a7a46a4d8bde04d54df68a
Author: Nico Weber <thakis at chromium.org>
Date: 2026-04-16 (Thu, 16 Apr 2026)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/Transforms/Utils/BUILD.gn
Log Message:
-----------
[gn build] Port ffde06f4c119 (#192498)
Commit: 6c2bf97994c949da8d3252e7fcb18a6d7c70b098
https://github.com/llvm/llvm-project/commit/6c2bf97994c949da8d3252e7fcb18a6d7c70b098
Author: Yoonseo Choi <yoonchoi at amd.com>
Date: 2026-04-16 (Thu, 16 Apr 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
A llvm/test/Transforms/InstCombine/AMDGPU/llvm.amdgcn.cluster.id.ll
A llvm/test/Transforms/InstCombine/AMDGPU/llvm.amdgcn.dispatch.id.ll
A llvm/test/Transforms/InstCombine/AMDGPU/llvm.amdgcn.dispatch.ptr.ll
A llvm/test/Transforms/InstCombine/AMDGPU/llvm.amdgcn.lds.kernel.id.ll
A llvm/test/Transforms/InstCombine/AMDGPU/llvm.amdgcn.queue.ptr.ll
A llvm/test/Transforms/InstCombine/AMDGPU/llvm.amdgcn.workgroup.id.ll
A llvm/test/Transforms/InstCombine/AMDGPU/llvm.amdgcn.workitem.id.ll
Log Message:
-----------
[AMDGPU] InstCombine: fold invalid calls to amdgcn intrinsics into poison values (#191904)
Replace a call to amdgpu intrinsic into a poison value when the call is
invalid because of "amdgpu-no-<xyz>" attribute in the caller function.
Upon
https://github.com/llvm/llvm-project/pull/186925#pullrequestreview-3983414064
Assisted by claude-4.6-sonnet-medium through CURSOR.
Commit: 8b15fc14f5314ceb8576629f3190d4c740590396
https://github.com/llvm/llvm-project/commit/8b15fc14f5314ceb8576629f3190d4c740590396
Author: Bruno Cardoso Lopes <bruno.cardoso at gmail.com>
Date: 2026-04-16 (Thu, 16 Apr 2026)
Changed paths:
M clang/lib/CIR/Dialect/Transforms/FlattenCFG.cpp
Log Message:
-----------
[CIR] Fix FlattenCFG pattern rewriter contract violations (#192359)
Fix patterns in CIRFlattenCFGPass that modify IR but return failure(),
violating the MLIR greedy pattern rewriter contract. The contract
requires that if a pattern modifies IR, it must return success().
- CIRCleanupScopeOpFlattening: always return success() since IR is
modified (blocks split, regions inlined) before error paths
- Ternary op flattening: return success() instead of falling through
after emitError, since splitBlock/createBlock already modified IR
- Use rewriter.moveOpBefore() instead of direct defOp->moveBefore() to
properly notify the rewriter of IR mutations
Found by MLIR_ENABLE_EXPENSIVE_PATTERN_API_CHECKS=ON.
Test: flatten-cleanup-scope-nyi.cir (a silly one since it's testing an
error, but point still valid)
Commit: 81c4ceb90239098e60d706f0a68f68d4dacec7af
https://github.com/llvm/llvm-project/commit/81c4ceb90239098e60d706f0a68f68d4dacec7af
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-04-16 (Thu, 16 Apr 2026)
Changed paths:
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVBase.td
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVLogicalOps.td
M mlir/test/Dialect/SPIRV/IR/logical-ops.mlir
M mlir/test/Target/SPIRV/logical-ops.mlir
Log Message:
-----------
[mlir][SPIR-V] Add spirv.Any and spirv.All ops (#192286)
Commit: 2427dc449759b48ed88920e0768af82a2dce27ca
https://github.com/llvm/llvm-project/commit/2427dc449759b48ed88920e0768af82a2dce27ca
Author: Ryan Buchner <rbuchner at qti.qualcomm.com>
Date: 2026-04-16 (Thu, 16 Apr 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
Log Message:
-----------
[SLP][NFC] Remove unused PtrN parameter from analyzeConstantStrideCandidate() (#191567)
Commit: 0bbfddf03770a870c7f9aa9b888205be38e71446
https://github.com/llvm/llvm-project/commit/0bbfddf03770a870c7f9aa9b888205be38e71446
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-04-16 (Thu, 16 Apr 2026)
Changed paths:
A llvm/test/Transforms/SLPVectorizer/AArch64/spillcost-call-between-operands.ll
Log Message:
-----------
[SLP][NFC]Add a test with the incorrect spill cost calculation between operands
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/192509
Commit: 6b054fdbcd8bd7b3fb850794e0feaa6d6525c793
https://github.com/llvm/llvm-project/commit/6b054fdbcd8bd7b3fb850794e0feaa6d6525c793
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2026-04-16 (Thu, 16 Apr 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenClass.cpp
M clang/lib/CIR/CodeGen/CIRGenDecl.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
A clang/test/CIR/CodeGen/field-init-eh.cpp
Log Message:
-----------
[CIR] Implement EH handling for field initializers (#192360)
This implements the handling to call the dtor for any previously
initialized fields of destructed type if an exception is thrown later in
the initialization of the containing class.
The basic infrastructure to handle this was already in place. We just
needed a function to push an EH-only destroy cleanup on the EH stack and
a call to that function.
Commit: 5aea02a163d94092b54833001e06a26c7e57fb01
https://github.com/llvm/llvm-project/commit/5aea02a163d94092b54833001e06a26c7e57fb01
Author: Nick Sarnie <nick.sarnie at intel.com>
Date: 2026-04-16 (Thu, 16 Apr 2026)
Changed paths:
M offload/test/api/omp_indirect_call_table_manual.c
M offload/test/api/omp_indirect_func_array.c
M offload/test/api/omp_indirect_func_struct.c
M openmp/device/src/Misc.cpp
Log Message:
-----------
[OpenMP][Device] Fix __llvm_omp_indirect_call_lookup function pointer types (#192502)
`__llvm_omp_indirect_call_lookup` takes in and returns a function
pointer, so make sure the types are correct, which includes the correct
address space.
The FE was recently changed to generate the correct code
[here](https://github.com/llvm/llvm-project/pull/192470).
With this change, three function pointer tests start passing.
Signed-off-by: Nick Sarnie <nick.sarnie at intel.com>
Commit: 23dcca9d91110ebdb4e95d01818f7e16071fb21f
https://github.com/llvm/llvm-project/commit/23dcca9d91110ebdb4e95d01818f7e16071fb21f
Author: Yoonseo Choi <Yoonseo.Choi at amd.com>
Date: 2026-04-16 (Thu, 16 Apr 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
R llvm/test/Transforms/InstCombine/AMDGPU/llvm.amdgcn.cluster.id.ll
R llvm/test/Transforms/InstCombine/AMDGPU/llvm.amdgcn.dispatch.id.ll
R llvm/test/Transforms/InstCombine/AMDGPU/llvm.amdgcn.dispatch.ptr.ll
R llvm/test/Transforms/InstCombine/AMDGPU/llvm.amdgcn.lds.kernel.id.ll
R llvm/test/Transforms/InstCombine/AMDGPU/llvm.amdgcn.queue.ptr.ll
R llvm/test/Transforms/InstCombine/AMDGPU/llvm.amdgcn.workgroup.id.ll
R llvm/test/Transforms/InstCombine/AMDGPU/llvm.amdgcn.workitem.id.ll
Log Message:
-----------
Revert "[AMDGPU] InstCombine: fold invalid calls to amdgcn intrinsics into poison values" (#192514)
Reverts llvm/llvm-project#191904
Commit: 2086b8701df4c876646e2049275efbfad5674585
https://github.com/llvm/llvm-project/commit/2086b8701df4c876646e2049275efbfad5674585
Author: Carlos Galvez <carlos.galvez at zenseact.com>
Date: 2026-04-16 (Thu, 16 Apr 2026)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/AST/CommentSema.h
M clang/lib/AST/CommentSema.cpp
M clang/test/Sema/warn-documentation.cpp
Log Message:
-----------
[clang] Fix false positive with -Wdocumentation and explicit instanti… (#178223)
…ations
Solves a use case listed in #64087.
Commit: 38f3d0be121c04b42f0988a25c22ea67543919f8
https://github.com/llvm/llvm-project/commit/38f3d0be121c04b42f0988a25c22ea67543919f8
Author: Scott Linder <scott.linder at amd.com>
Date: 2026-04-16 (Thu, 16 Apr 2026)
Changed paths:
M llvm/lib/CodeGen/MachineCopyPropagation.cpp
M llvm/test/CodeGen/X86/machine-copy-prop.mir
Log Message:
-----------
[MCP] Never eliminate frame-setup/destroy instructions (#186237)
Presumably targets only insert frame instructions which are significant,
and there may be effects MCP doesn't model. Similar to reserved
registers this
is probably overly conservative, but as this causes no codegen change in
any lit test I think it is benign.
The motivation is just to clean up #183149 for AMDGPU, as we can spill
to physical registers, and currently have to spill the EXEC mask purely
to enable debug-info.
Change-Id: I9ea4a09b34464c43322edd2900361bf635efd9f7
Commit: ca3bc44c3090481615bd8fc4b3e64358b845c8bf
https://github.com/llvm/llvm-project/commit/ca3bc44c3090481615bd8fc4b3e64358b845c8bf
Author: Zhen Wang <zhenw at nvidia.com>
Date: 2026-04-16 (Thu, 16 Apr 2026)
Changed paths:
M flang/lib/Optimizer/Builder/IntrinsicCall.cpp
M flang/test/Lower/Intrinsics/transfer.f90
Log Message:
-----------
[flang] Inline scalar-to-scalar TRANSFER for same-size trivial types (#191589)
Inline the TRANSFER intrinsic for scalar-to-scalar cases where the
result is a trivial type (integer, real, etc.) and source and result
have the same storage size. Instead of calling _FortranATransfer, the
lowering now emits a fir.convert on the source address followed by a
fir.load, effectively performing a reinterpret cast.
Commit: 9931b7830f5a411cfdb1bc1f819601a8217a4a21
https://github.com/llvm/llvm-project/commit/9931b7830f5a411cfdb1bc1f819601a8217a4a21
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-04-16 (Thu, 16 Apr 2026)
Changed paths:
M clang/lib/Driver/ToolChains/AMDGPU.cpp
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/Driver/ToolChains/Cuda.cpp
A clang/test/Driver/amdgpu-multilib.yaml
A clang/test/Driver/nvptx-multilib.yaml
Log Message:
-----------
[Clang] Add multilib support for GPU targets (#192285)
Summary:
This PR uses the new, generic multilib support added in
https://github.com/llvm/llvm-project/pull/188584
to also function for GPU targets. This will allow toolchains to easy
provide variants of these GPU libraries (for debug or asan). In
practice, this will look something like this:
```console
-DRUNTIMES_amdgcn-amd-amdhsa+debug_CMAKE_BUILD_TYPE=Debug \
-DRUNTIMES_amdgcn-amd-amdhsa+debug_LIBOMPTARGET_ENABLE_DEBUG=ON \
-DRUNTIMES_amdgcn-amd-amdhsa+debug_LLVM_ENABLE_RUNTIMES=openmp \
-DLLVM_RUNTIME_MULTILIBS=debug \
-DLLVM_RUNTIME_MULTILIB_debug_TARGETS="amdgcn-amd-amdhsa" \
```
This will then install it into the tree like this:
```
<install>/lib/amdgcn-amd-amdhsa/debug/libompdevice.a
```
The user can then activate this like the following (assuming they have a
multilib.yaml in the library directory):
```
clang input.c -fopenmp --offload-arch=gfx942 -fmultilib-flag=debug
```
Commit: bec1019d14d9c9b79b0b5e29ae4b1114942fb67b
https://github.com/llvm/llvm-project/commit/bec1019d14d9c9b79b0b5e29ae4b1114942fb67b
Author: Prabhu Rajasekaran <prabhukr at google.com>
Date: 2026-04-16 (Thu, 16 Apr 2026)
Changed paths:
M clang/cmake/caches/Fuchsia-stage2.cmake
Log Message:
-----------
Revert "[Fuchsia] Stack analysis flags for runtimes" (#192515)
Reverts llvm/llvm-project#175677
We noticed using -fexperimental-call-graph-section with Control Flow
Integrity causes link failures in certain situations. Reverting this
change that sets the call graph section flag until we investigate the
root cause of the problem and handle it in the compiler well.
Commit: e60e400d778ca1734edab609f9db991b1acaab5b
https://github.com/llvm/llvm-project/commit/e60e400d778ca1734edab609f9db991b1acaab5b
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-04-16 (Thu, 16 Apr 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
M llvm/test/CodeGen/RISCV/rv32p.ll
M llvm/test/CodeGen/RISCV/rv64p.ll
Log Message:
-----------
[RISCV][P-ext] Use pli.b when only the lower 2 bytes are used. (#192400)
If the lower 2 bytes are the same and are the only bytes used we
can use pli.b instead of lui+addi.
Commit: f162be248636046a20e71209e139347e084b637a
https://github.com/llvm/llvm-project/commit/f162be248636046a20e71209e139347e084b637a
Author: Nick Desaulniers <ndesaulniers at google.com>
Date: 2026-04-16 (Thu, 16 Apr 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/test/CodeGen/RISCV/rvv/stack-probing-dynamic.ll
M llvm/test/CodeGen/RISCV/stack-clash-prologue.ll
Log Message:
-----------
[RISCV] Use unsigned comparison for stack clash probing loop (#192485)
The stack clash probing loop generated in `emitDynamicProbedAlloc` used
a signed comparison (`RISCV::COND_BLT`) to determine when the allocation
target had been reached.
In 32-bit mode, memory addresses above `0x80000000` have the sign bit
set. If the stack pointer lands in this region, treating the addresses
as signed integers causes the comparison logic to fail.
This patch changes the condition code to `RISCV::COND_BLTU` (Branch if
Less Than Unsigned), which generates an unsigned comparison. This
ensures that addresses are treated correctly as unsigned quantities on
all targets.
On 64-bit systems, this change has no practical effect on valid
user-space addresses because they do not use the sign bit (being
restricted to the lower half of the address space). However, using
unsigned comparison is the correct behavior for pointer arithmetic and
bounds checks.
Link: #192355
Commit: e210f2216df103c57b749e17b125cf002359d307
https://github.com/llvm/llvm-project/commit/e210f2216df103c57b749e17b125cf002359d307
Author: Praneeth Sarode <praneethsarode at gmail.com>
Date: 2026-04-16 (Thu, 16 Apr 2026)
Changed paths:
M clang/docs/MemorySanitizer.rst
M clang/docs/ThreadSanitizer.rst
Log Message:
-----------
[Clang][Docs] Fix malformed code-block directive in MSan and TSan docs (#190461)
The `code-block` directives in MemorySanitizer.rst and
ThreadSanitizer.rst were missing a leading period (`. code-block`
instead of `.. code-block`). This syntax error caused Sphinx to fail to
recognize the directives, resulting in the the subsequent C code being
rendered as plain text rather than a syntax-highlighted block.
The currently broken rendering on the official docs can be seen
[here](https://clang.llvm.org/docs/MemorySanitizer.html#interaction-of-inlining-with-disabling-sanitizer-instrumentation)
and
[here](https://clang.llvm.org/docs/ThreadSanitizer.html#interaction-of-inlining-with-disabling-sanitizer-instrumentation).
Fixed the typos to ensure proper HTML rendering.
Commit: 981da65faca247557efa37f8bc55b6dc36e9b8bd
https://github.com/llvm/llvm-project/commit/981da65faca247557efa37f8bc55b6dc36e9b8bd
Author: Lei Huang <lei at ca.ibm.com>
Date: 2026-04-16 (Thu, 16 Apr 2026)
Changed paths:
M clang/test/ClangScanDeps/prune-scanning-modules.m
M llvm/test/tools/llvm-objcopy/ELF/strip-preserve-atime.test
Log Message:
-----------
Invalidate tests using "touch -a" on Darwin (#192521)
Tests uses 'touch -a' which is known to fail on macOS.
Commit: 19ad75ef7f14e012fa8dac8312d0af4cdd806ee1
https://github.com/llvm/llvm-project/commit/19ad75ef7f14e012fa8dac8312d0af4cdd806ee1
Author: Razvan Lupusoru <razvan.lupusoru at gmail.com>
Date: 2026-04-16 (Thu, 16 Apr 2026)
Changed paths:
M mlir/include/mlir/Dialect/OpenACC/OpenACCCGOps.td
M mlir/lib/Dialect/OpenACC/IR/CMakeLists.txt
M mlir/lib/Dialect/OpenACC/IR/OpenACCCG.cpp
M mlir/lib/Dialect/OpenACC/Transforms/ACCImplicitDeclare.cpp
M mlir/test/Dialect/OpenACC/acc-implicit-declare.mlir
M mlir/unittests/Dialect/OpenACC/CMakeLists.txt
A mlir/unittests/Dialect/OpenACC/OpenACCCGOpsTest.cpp
Log Message:
-----------
[mlir][acc] Ensure implicit declare hoisting works for compute_region (#192501)
Any hoisting across `acc.compute_region` needs to be wired through block
arguments as the region is `IsolatedFromAbove`. Thus update
`ACCImplicitDeclare` to do so by using new API
`wireHoistedValueThroughIns` which handles the value wiring after
hoisting.
Commit: 7039515e0cb5ed48ede8634a7fc58df6f6f93d2e
https://github.com/llvm/llvm-project/commit/7039515e0cb5ed48ede8634a7fc58df6f6f93d2e
Author: Alex Duran <alejandro.duran at intel.com>
Date: 2026-04-16 (Thu, 16 Apr 2026)
Changed paths:
M clang/lib/CodeGen/CGStmtOpenMP.cpp
M clang/test/OpenMP/metadirective_device_arch_codegen.cpp
M offload/test/offloading/ompx_coords.c
Log Message:
-----------
[OpenMP] Fix convention of SPIRV outline functions (#192450)
When creating an outline function for device code we're not setting the
right calling convention when the target is SPIRV. This results in the
calls to the function to be removed by the InstCombine pass as it thinks
is not callable.
Commit: c195385e0b6512736b2edf9d6f576115ccb645cc
https://github.com/llvm/llvm-project/commit/c195385e0b6512736b2edf9d6f576115ccb645cc
Author: Keith Smiley <keithbsmiley at gmail.com>
Date: 2026-04-16 (Thu, 16 Apr 2026)
Changed paths:
M utils/bazel/MODULE.bazel
M utils/bazel/MODULE.bazel.lock
Log Message:
-----------
[bazel] Update rules_python (#192518)
This pulls in this fix
https://github.com/bazel-contrib/rules_python/pull/3420
Commit: 6ff9ca2f1918e60c7e0dad327541dcbb7ea25ff2
https://github.com/llvm/llvm-project/commit/6ff9ca2f1918e60c7e0dad327541dcbb7ea25ff2
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-04-16 (Thu, 16 Apr 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
Log Message:
-----------
[RISCV] Don't check isApplicableToPLI for simm12 constants. (#192522)
It won't match except when the constant is -1, which we should use li
for. This avoids an unecessary call for hasAllWUsers in that case.
Commit: a8f1f387255a56c3080682ad62015670cca697df
https://github.com/llvm/llvm-project/commit/a8f1f387255a56c3080682ad62015670cca697df
Author: Razvan Lupusoru <razvan.lupusoru at gmail.com>
Date: 2026-04-16 (Thu, 16 Apr 2026)
Changed paths:
M mlir/unittests/Dialect/OpenACC/OpenACCCGOpsTest.cpp
Log Message:
-----------
[mlir][acc] Fix OpenACCCGOpsTest ValueRange construction (#192529)
Ensure that `Value`s are used in the `ValueRange` construction to avoid
failure:
`error: call of overloaded ValueRange(mlir::acc::ParWidthOp&) is
ambiguous`
Commit: 2c56a63b4969be7c5938db6e7e085288224b8621
https://github.com/llvm/llvm-project/commit/2c56a63b4969be7c5938db6e7e085288224b8621
Author: David CARLIER <devnexen at gmail.com>
Date: 2026-04-16 (Thu, 16 Apr 2026)
Changed paths:
M bolt/lib/Passes/Instrumentation.cpp
Log Message:
-----------
[BOLT][Passes] switch remaining Instrumentation containers to ADT. (#192525)
Follow-up to #192289. Swap the remaining `std::unordered_set`/
`std::unordered_map` containers in `Instrumentation.cpp` for `DenseSet`/
`DenseMap`: the `BBToSkip` param and `Visited` local in
`hasAArch64ExclusiveMemop`, and `BBToSkip`, `BBToID`, `VisitedSet` in
`instrumentFunction`. Drop the now-unused `<unordered_set>` include.
The swap removes per-element heap allocations on the hot path, stops
inserting empty buckets on probes where a miss is possible, and replaces
hashed-bucket traversal over node-based storage with lookups over inline
`DenseMap` storage. `BBToID` reads keep `operator[]` since the map is
pre-populated for every basic block of the function, so no
default-construct path is ever taken. NFC.
Measured on `llvm-bolt -instrument` against a relocations-linked
clang-23: -1.3% instrumentation-pass wall time, peak RSS unchanged
(dominated by instrumentation output size).
Commit: 046fd10b5e2592f10b4b0f90279d53ad24e71af6
https://github.com/llvm/llvm-project/commit/046fd10b5e2592f10b4b0f90279d53ad24e71af6
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2026-04-16 (Thu, 16 Apr 2026)
Changed paths:
M clang/lib/CodeGen/CGDebugInfo.cpp
M clang/lib/CodeGen/CGDebugInfo.h
M clang/test/DebugInfo/Generic/bounds-checking-debuginfo.c
M clang/test/DebugInfo/Generic/cfi-check-fail-debuginfo.c
M clang/test/DebugInfo/Generic/cfi-icall-generalize-debuginfo.c
M clang/test/DebugInfo/Generic/cfi-icall-normalize2-debuginfo.c
M clang/test/DebugInfo/Generic/ubsan-function-debuginfo.c
M clang/test/DebugInfo/Generic/unsigned-promotion-debuginfo.c
Log Message:
-----------
UBSan: Use ubsan_interface.h for synthetic debug info (#171929)
Before the patch, even with the same synthetic function name, they
counted as different functions, because the file name was different.
This makes it easier to analyze data in performance profiles.
`pprof -lines -top <somefile> | grep __ubsan_check_pointer_overflow`
Before:
```
60368049443 6.26% 6.26% 60383492016 6.26% __ubsan_check_pointer_overflow test-suite/MultiSource/Benchmarks/TSVC/tsc.inc (inline)
43746146224 4.53% 10.79% 43763767409 4.54% __ubsan_check_pointer_overflow test-suite/MultiSource/Benchmarks/SciMark2-C/SparseCompRow.c (inline)
11670846196 1.21% 26.03% 11673592781 1.21% __ubsan_check_pointer_overflow test-suite/MultiSource/Benchmarks/ASC_Sequoia/AMGmk/csr_matvec.c (inline)
7948730683 0.82% 29.07% 7949496154 0.82% __ubsan_check_pointer_overflow test-suite/MultiSource/Benchmarks/ASC_Sequoia/IRSmk/rmatmult3.c (inline)
7442972883 0.77% 30.62% 7447647795 0.77% __ubsan_check_pointer_overflow test-suite/MultiSource/Benchmarks/mafft/Galign11.c (inline)
7181873035 0.74% 32.88% 7182846509 0.74% __ubsan_check_pointer_overflow test-suite/MultiSource/Benchmarks/ASC_Sequoia/AMGmk/relax.c (inline)
7086681860 0.73% 33.61% 7086681860 0.73% __ubsan_check_pointer_overflow test-suite/MultiSource/Benchmarks/SciMark2-C/FFT.c (inline)
6634628163 0.69% 35.03% 6644529197 0.69% __ubsan_check_pointer_overflow test-suite/MultiSource/Benchmarks/Olden/em3d/make_graph.c (inline)
5778832834 0.6% 37.55% 5778832835 0.6% __ubsan_check_pointer_overflow test-suite/MultiSource/Benchmarks/SciMark2-C/LU.c (inline)
5707159214 0.59% 38.14% 5707159214 0.59% __ubsan_check_pointer_overflow test-suite/MultiSource/Benchmarks/SciMark2-C/Random.c (inline)
5265117200 0.55% 40.99% 5266753453 0.55% __ubsan_check_pointer_overflow test-suite/MultiSource/Benchmarks/Trimaran/netbench-url/search.c (inline)
```
After:
```
143372006423 14.76% 14.76% 143426398982 14.76% __ubsan_check_pointer_overflow sanitizer/ubsan_interface.h (inline)
16972753760 1.75% 31.03% 16979483803 1.75% __ubsan_check_pointer_overflow test-suite/MultiSource/Benchmarks/TSVC/tsc.inc (inline)
14296973786 1.47% 32.50% 14297951231 1.47% __ubsan_check_pointer_overflow test-suite/MultiSource/Benchmarks/SciMark2-C/SparseCompRow.c (inline)
7857020738 0.81% 36.93% 7857966628 0.81% __ubsan_check_pointer_overflow test-suite/MultiSource/Benchmarks/ASC_Sequoia/AMGmk/csr_matvec.c (inline)
6956467376 0.72% 41.47% 6958074907 0.72% __ubsan_check_pointer_overflow test-suite/MultiSource/Benchmarks/Olden/em3d/make_graph.c (inline)
5502783427 0.57% 45.07% 5502783429 0.57% __ubsan_check_pointer_overflow test-suite/MultiSource/Benchmarks/SciMark2-C/LU.c (inline)
```
Commit: b2e0403b11de1ce60fbf2aadec0cc4efb44cd4c4
https://github.com/llvm/llvm-project/commit/b2e0403b11de1ce60fbf2aadec0cc4efb44cd4c4
Author: Jeff Bailey <jbailey at raspberryginger.com>
Date: 2026-04-16 (Thu, 16 Apr 2026)
Changed paths:
M libc/config/linux/x86_64/entrypoints.txt
M libc/include/llvm-libc-types/x86_64/ucontext_t.h
M libc/src/CMakeLists.txt
A libc/src/ucontext/CMakeLists.txt
A libc/src/ucontext/getcontext.h
A libc/src/ucontext/setcontext.h
A libc/src/ucontext/x86_64/CMakeLists.txt
A libc/src/ucontext/x86_64/getcontext.cpp
A libc/src/ucontext/x86_64/setcontext.cpp
M libc/test/integration/src/CMakeLists.txt
A libc/test/integration/src/ucontext/CMakeLists.txt
A libc/test/integration/src/ucontext/ucontext_test.cpp
M libc/test/src/CMakeLists.txt
A libc/test/src/ucontext/CMakeLists.txt
A libc/test/src/ucontext/ucontext_test.cpp
Log Message:
-----------
[libc] Implement getcontext and setcontext for x86_64 (#192343)
Implemented getcontext and setcontext for x86_64 architecture in LLVM
libc. These functions use inline assembly with naked attributes to
capture and restore the exact register state.
Added:
* src/ucontext/getcontext.h and setcontext.h
* src/ucontext/x86_64/getcontext.cpp and setcontext.cpp
* Hermetic integration test for register preservation.
* Unit tests for basic functionality and signal mask preservation.
Updated entrypoints for x86_64 Linux.
Commit: c88d891f2b693dbc45a2d0e155974a9541905755
https://github.com/llvm/llvm-project/commit/c88d891f2b693dbc45a2d0e155974a9541905755
Author: Vicky Nguyen <vicky.trucviennguyen at gmail.com>
Date: 2026-04-16 (Thu, 16 Apr 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp
M clang/test/CodeGen/AArch64/neon-intrinsics.c
M clang/test/CodeGen/AArch64/neon/intrinsics.c
Log Message:
-----------
[CIR][AArch64] Upstream pairwise-minimum NEON builtins (#191759)
Related to https://github.com/llvm/llvm-project/issues/185382
CIR lowering for pairwise-minimum intrinsics
(https://arm-software.github.io/acle/neon_intrinsics/advsimd.html#pairwise-minimum)
Port tests from `clang/test/CodeGen/AArch64/neon_intrinsics.c` to
`clang/test/CodeGen/AArch64/neon/intrinsics.c`
Commit: b104dab739ad6ad60ef0725d563d9a4ae640c5bf
https://github.com/llvm/llvm-project/commit/b104dab739ad6ad60ef0725d563d9a4ae640c5bf
Author: gulfemsavrun <gulfem at google.com>
Date: 2026-04-16 (Thu, 16 Apr 2026)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/DiagnosticLexKinds.td
M clang/lib/Lex/PPExpressions.cpp
M clang/test/Lexer/cxx-features.cpp
R clang/test/Preprocessor/p2843r3.cpp
M clang/www/cxx_status.html
Log Message:
-----------
Revert "[Clang] Implement P2843R3 - Preprocessing is never undefined" (#192532)
Reverts llvm/llvm-project#192073
Reason for revert: This change caused build failures on Windows when
compiling libcxx.
Commit: 59c6862804e2638ac8a4b57de505dfb963871d6d
https://github.com/llvm/llvm-project/commit/59c6862804e2638ac8a4b57de505dfb963871d6d
Author: Bill Wendling <morbo at google.com>
Date: 2026-04-16 (Thu, 16 Apr 2026)
Changed paths:
M clang/test/CodeGen/asm.c
Log Message:
-----------
[Clang] Refactor the tests to be more uniform (#191944)
- Add missing "CHECK:" lines to testcases.
- Improve checking to be a bit more readable.
- Move "rm" testcases to the bottom in anticipation of
future refactoring.
Commit: dd81356eacdd78d6781772e4ca5a25482a347b68
https://github.com/llvm/llvm-project/commit/dd81356eacdd78d6781772e4ca5a25482a347b68
Author: Sherman Pay <shermanpay1991 at gmail.com>
Date: 2026-04-16 (Thu, 16 Apr 2026)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/AST/PrettyPrinter.h
M clang/lib/AST/ByteCode/InterpFrame.cpp
M clang/lib/AST/ExprConstant.cpp
M clang/lib/AST/StmtPrinter.cpp
M clang/test/AST/ast-printer-lambda.cpp
A clang/test/AST/constexpr-lambda-diagnostic.cpp
Log Message:
-----------
Suppress printing lambda body for constexpr diagnostics (#185800)
closes #125914
Introduce `SupressLambdaBody` `PrintingPolicy` that is used only for
constexpr diagnostics. This ensures `--print-ast` still works the same.
I also considered other approaches such as modifying the
`PrintingPolicy` in the current `AstContext`, but that might cause
unexpected changes.
Add two tests:
1. To ast-printer-lambda to ensure `--print-ast` works the same.
2. Ensure lambda body is not printed for constexpr diagnostics.
Commit: db4dfdce0b6cb4eaf56804c91ffa91bea1cf16ac
https://github.com/llvm/llvm-project/commit/db4dfdce0b6cb4eaf56804c91ffa91bea1cf16ac
Author: Sharjeel Khan <sharjeelkhan at google.com>
Date: 2026-04-16 (Thu, 16 Apr 2026)
Changed paths:
M libcxx/utils/ci/BOT_OWNERS.txt
Log Message:
-----------
[libc++] Update Android CI owners (#192511)
Add nickdesaulniers as an owner for Android libc++ CI
Commit: 9d51c891b7191914952fa783ffd05acb96dafe2d
https://github.com/llvm/llvm-project/commit/9d51c891b7191914952fa783ffd05acb96dafe2d
Author: 4ast <alexei.starovoitov at gmail.com>
Date: 2026-04-16 (Thu, 16 Apr 2026)
Changed paths:
M llvm/lib/Target/BPF/BPFAsmPrinter.cpp
M llvm/lib/Target/BPF/BPFAsmPrinter.h
M llvm/lib/Target/BPF/BPFISelLowering.h
A llvm/test/CodeGen/BPF/cleanup-reject-typed-catch.ll
A llvm/test/CodeGen/BPF/cleanup-section.ll
Log Message:
-----------
[BPF] Add exception handling support with .bpf_cleanup section (#192164)
Add support for invoke/landingpad/resume instructions in the BPF backend
so that Rust programs compiled with panic=unwind can run cleanup code
(Drop implementations) when bpf_throw fires.
Changes:
1. BPFISelLowering: Define exception pointer and selector registers
(both R0) so SelectionDAG can lower landingpad instructions.
2. BPFAsmPrinter::emitFunctionBodyEnd: Emit a .bpf_cleanup section with
a flat table of (begin, end, landing_pad) triples using
R_BPF_64_NODYLD32 relocations.
The .bpf_cleanup section layout (12 bytes per entry):
u32 begin // start of the invoke region
u32 end // end of the invoke region
u32 landing_pad // address of the cleanup block
The invoke region [begin, end) includes argument setup instructions
before the call. The runtime checks begin <= PC < end to find the
matching landing pad.
Landing pad blocks survive optimization because invoke maintains CFG
edges to them throughout codegen, same as every other backend. The
standard .gcc_except_table and .eh_frame are also emitted by the
existing DwarfCFIException handler; libbpf will ignore them.
In runtime:
- bpf_throw() is called (from panic handler)
- Kernel walks the BPF call stack with arch_bpf_stack_walk()
- For each frame, look up current PC in .bpf_cleanup table
- If match found: redirect execution to the cleanup function . cleanup
function runs Drop impls (bpf_free, rcu_read_unlock, etc.) . calls
_Unwind_Resume() which is patched to just 'ret' by the verifier .
bpf_throw() pops frame goes to next
- If no match: go to next frame
Signed-off-by: Alexei Starovoitov <ast at kernel.org>
Co-authored-by: Alexei Starovoitov <ast at kernel.org>
Commit: 9de94147b5ed83f9078f0f0f3a67b25cc2abb093
https://github.com/llvm/llvm-project/commit/9de94147b5ed83f9078f0f0f3a67b25cc2abb093
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-04-16 (Thu, 16 Apr 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
Log Message:
-----------
[SLP][NFC]Use find instead of lookup for using ArrayRef instead of SmallVector
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/192540
Commit: b3cbad3214fcec02487b5ab4f6652c37ecb3467a
https://github.com/llvm/llvm-project/commit/b3cbad3214fcec02487b5ab4f6652c37ecb3467a
Author: Oleksandr "Alex" Zinenko <git at ozinenko.com>
Date: 2026-04-16 (Thu, 16 Apr 2026)
Changed paths:
M mlir/include/mlir/Dialect/Transform/IR/TransformDialect.h
M mlir/include/mlir/Dialect/Transform/IR/TransformDialect.td
M mlir/include/mlir/Dialect/Transform/IR/TransformTypes.td
M mlir/include/mlir/Dialect/Transform/Interfaces/CMakeLists.txt
M mlir/include/mlir/Dialect/Transform/Interfaces/TransformInterfaces.h
M mlir/include/mlir/Dialect/Transform/Interfaces/TransformInterfaces.td
M mlir/lib/Dialect/Transform/IR/TransformAttrs.cpp
M mlir/lib/Dialect/Transform/IR/TransformDialect.cpp
M mlir/lib/Dialect/Transform/IR/TransformTypes.cpp
M mlir/lib/Dialect/Transform/Interfaces/TransformInterfaces.cpp
A mlir/test/Dialect/Transform/normal-forms.mlir
M mlir/test/Dialect/Transform/ops-invalid.mlir
M mlir/test/lib/Dialect/Transform/CMakeLists.txt
M mlir/test/lib/Dialect/Transform/TestTransformDialectExtension.cpp
M mlir/test/lib/Dialect/Transform/TestTransformDialectExtension.h
M mlir/test/lib/Dialect/Transform/TestTransformDialectExtension.td
Log Message:
-----------
[mlir] transform dialect; add pre/post-condition type (#191813)
Add a transform dialect type denoting additional invariants on payload
IR usable for pre/post-conditions of a transformation. The invariants
are defined as a list of attributes in the type parameter, where the
attribute implements the interface for invariant-checking. This allows
clients to factor out, explicify and deduplicate precondition
verification logic.
This required adding support for Transform dialect extensions injecting
attributes into the dialects similarly to how they already do this for
operations and types.
Co-authored-by: Tim Gymnich <tim at gymni.ch>
Co-authored-by: Martin Lücke <martin.luecke at amd.com>
Assisted-by: Claude Opus 4.3 / Cursor
Co-authored-by: Tim Gymnich <tim at gymni.ch>
Co-authored-by: Martin Lücke <martin.luecke at amd.com>
Commit: 04a502d04d6030ed417b244faf51a35904384924
https://github.com/llvm/llvm-project/commit/04a502d04d6030ed417b244faf51a35904384924
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2026-04-16 (Thu, 16 Apr 2026)
Changed paths:
M flang/include/flang/Evaluate/tools.h
M flang/lib/Evaluate/tools.cpp
M flang/lib/Semantics/check-cuda.cpp
M flang/test/Lower/CUDA/cuda-data-transfer.cuf
Log Message:
-----------
[flang][cuda] Avoid false positive on multi device symbol with components (#192513)
Semantic was wrongly flagging derived-type components as two device
resident object. Update how we collect symbols and count the number of
device resident object.
Commit: fa44ca8e5ef6f57c03ba55a4c7b944c9a3ee633e
https://github.com/llvm/llvm-project/commit/fa44ca8e5ef6f57c03ba55a4c7b944c9a3ee633e
Author: Congzhe Cao <congzhe.cao at huawei.com>
Date: 2026-04-16 (Thu, 16 Apr 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/LoopBoundSplit.cpp
Log Message:
-----------
[LoopBoundSplit] Fix edge connections during transformation (#192106)
Fixed #190672.
The issue is caused by invalid intermediate IR when `getSCEV()` is
called during transformation: the exiting block of `pre-loop` did not
re-connect to preheader of the `post-loop`, causing `LI.verify()`
unable to correctly recompute another LoopInfo for verification.
To fix, reconnect the edge earlier before calling `getSCEV()`.
Also moved the DT updates to more appropriate places right after IR
control flow has changed. and added a few LI and DT verifications to
improve robustness of the pass.
Commit: 22acd64a1b15cd7ccf60393340a59a6e0569edb9
https://github.com/llvm/llvm-project/commit/22acd64a1b15cd7ccf60393340a59a6e0569edb9
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-04-16 (Thu, 16 Apr 2026)
Changed paths:
A llvm/test/Transforms/SLPVectorizer/AArch64/spillcost-loop-backedge.ll
Log Message:
-----------
[SLP][NFC]Add a test with the spill cost overestimation for blocks, dominated by root
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/192556
Commit: 030be3f7045633622158859bb2ffcd99cb5e9f4a
https://github.com/llvm/llvm-project/commit/030be3f7045633622158859bb2ffcd99cb5e9f4a
Author: Sirraide <aeternalmail at gmail.com>
Date: 2026-04-16 (Thu, 16 Apr 2026)
Changed paths:
M clang/test/SemaCXX/void-lambda-return-init.cpp
Log Message:
-----------
[Clang] [Tests] Add more tests for 87104ee (#192555)
Requested by Shafik:
https://github.com/llvm/llvm-project/pull/188904#discussion_r3090555425
Commit: 9f74e0f7df988977a643f847b83ce77b93780442
https://github.com/llvm/llvm-project/commit/9f74e0f7df988977a643f847b83ce77b93780442
Author: forking-google-bazel-bot[bot] <265904573+forking-google-bazel-bot[bot]@users.noreply.github.com>
Date: 2026-04-16 (Thu, 16 Apr 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
M utils/bazel/llvm-project-overlay/mlir/test/BUILD.bazel
Log Message:
-----------
[Bazel] Fixes b3cbad3 (#192554)
This fixes b3cbad3214fcec02487b5ab4f6652c37ecb3467a.
Co-authored-by: Google Bazel Bot <google-bazel-bot at google.com>
Commit: bbf325be7e2d2078cba058e3fb4763d756b15d41
https://github.com/llvm/llvm-project/commit/bbf325be7e2d2078cba058e3fb4763d756b15d41
Author: Aman LaChapelle <aman.lachapelle at gmail.com>
Date: 2026-04-16 (Thu, 16 Apr 2026)
Changed paths:
M lldb/include/lldb/API/SBVariablesOptions.h
M lldb/include/lldb/Interpreter/OptionGroupVariable.h
A lldb/include/lldb/Utility/ValueType.h
M lldb/include/lldb/lldb-enumerations.h
M lldb/source/API/SBVariablesOptions.cpp
M lldb/source/Interpreter/OptionGroupVariable.cpp
Log Message:
-----------
[lldb] Scaffolding for synthetic variable support. (#181500)
This patch handles most of the scaffolding for synthetic variable support that isn't directly tied to functional changes. This patch will be used by one following patch that actually modifies the lldb_private::StackFrame API to allow us to fetch synthetic variables.
There were a couple important/interesting decisions made in this patch that should be noted:
- Any value type may be synthetic, which is why it's a mask applied over the top of another value type.
- When printing frame variables with `fr v`, default to showing synthetic variables.
This new value type mask makes some of the ValueType handling more interesting, but since nothing generates objects with this mask until the next patch, we can land the concept in this patch in some amount of isolation.
Commit: 393207a1408a93fa5831a97a298c5d6dda96617e
https://github.com/llvm/llvm-project/commit/393207a1408a93fa5831a97a298c5d6dda96617e
Author: Brendan Dahl <brendan.dahl at gmail.com>
Date: 2026-04-16 (Thu, 16 Apr 2026)
Changed paths:
M llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyInstrMemory.td
M llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
M llvm/test/CodeGen/WebAssembly/f16-intrinsics.ll
Log Message:
-----------
[WebAssembly] Improve FP16 load and store generation. (#191274)
Previously, these LL instructions were expanded to software emulation
calls, causing performance overhead in benchmarks. By making these
operations legal and providing patterns, we can generate efficient code
using the new instructions.
Commit: daf814c4319b4cbf183a55df0030d0706630999e
https://github.com/llvm/llvm-project/commit/daf814c4319b4cbf183a55df0030d0706630999e
Author: Victor Mustya <victor.mustya at intel.com>
Date: 2026-04-16 (Thu, 16 Apr 2026)
Changed paths:
M libclc/opencl/lib/generic/atomic/atomic_fetch_add.cl
M libclc/opencl/lib/generic/atomic/atomic_fetch_sub.cl
Log Message:
-----------
[libclc] Fix atomic_fetch_add/sub overloads for uintptr_t (#192570)
The overloads taking the memory order and/or scope parameters should
have the `_explicit` suffix, according to the OpenCL C specification.
Commit: 2664fd38127d463765d17573bec238f31a92cbaf
https://github.com/llvm/llvm-project/commit/2664fd38127d463765d17573bec238f31a92cbaf
Author: Abhinav Gaba <abhinav.gaba at intel.com>
Date: 2026-04-16 (Thu, 16 Apr 2026)
Changed paths:
M offload/test/mapping/map_ordering_tgt_exit_data_always_always.c
M offload/test/mapping/map_ordering_tgt_exit_data_delete_from.c
M offload/test/mapping/map_ordering_tgt_exit_data_delete_from_assumedsize.c
M offload/test/mapping/map_ordering_tgt_exit_data_from_delete_assumedsize.c
Log Message:
-----------
[NFC][OpenMP] Make map ordering tests for no host->tgt transfer more robust (#192571)
They were relying on the host value not being seen on the device, but
the value being matched was small enough for the probability of a
successful match against garbage data relatively high.
Now we just rely on the LIBOMPTARGET_DEBUG logs to ensure there wasn't
any transfer.
Commit: 3b1cc610162b118ba422b5dccde2c3718ed55614
https://github.com/llvm/llvm-project/commit/3b1cc610162b118ba422b5dccde2c3718ed55614
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2026-04-16 (Thu, 16 Apr 2026)
Changed paths:
M flang-rt/lib/cuda/pointer.cpp
M flang/include/flang/Runtime/CUDA/pointer.h
M flang/lib/Optimizer/Transforms/CUDA/CUFAllocationConversion.cpp
M flang/test/Fir/CUDA/cuda-allocate.fir
Log Message:
-----------
[flang][cuda] Add missing pointer deallocation entry point (#192566)
We were missing the deallocation entry point for pointer and wiring all
to allocatable deallocate which will trigger Invalid descriptor error.
Commit: 4b6231d410696dad377f4997cc17ac886fcbab57
https://github.com/llvm/llvm-project/commit/4b6231d410696dad377f4997cc17ac886fcbab57
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2026-04-16 (Thu, 16 Apr 2026)
Changed paths:
M flang/include/flang/Optimizer/Dialect/CUF/Attributes/CUFAttr.h
M flang/include/flang/Support/Fortran.h
M flang/lib/Parser/Fortran-parsers.cpp
M flang/lib/Semantics/check-declarations.cpp
M flang/lib/Semantics/resolve-names.cpp
M flang/test/Lower/CUDA/cuda-data-attribute.cuf
M flang/test/Semantics/cuf03.cuf
Log Message:
-----------
[flang][cuda] Accept attributes(value) as a CUDA Fortran extension (#192560)
This is accepted by legacy compiler and is part of some documentation
Commit: c78f80c405a005346f8b2dd3f8605851df294900
https://github.com/llvm/llvm-project/commit/c78f80c405a005346f8b2dd3f8605851df294900
Author: Akimasa Watanuki <mencotton0410 at gmail.com>
Date: 2026-04-17 (Fri, 17 Apr 2026)
Changed paths:
A clang/test/CIR/IR/branch.cir
A clang/test/CIR/IR/do-while.cir
A clang/test/CIR/IR/for.cir
A clang/test/CIR/IR/while.cir
Log Message:
-----------
[CIR][NFC] Upstream IR roundtrip tests for branch and loop ops (#189006)
Add `clang/test/CIR/IR` roundtrip tests for `cir.br`, `cir.brcond`,
`cir.for`, `cir.while`, and `cir.do`.
This adds parser/printer coverage for the textual forms of these
control-flow operations.
Partially addresses #156747.
Commit: 03312094b8243bb54b5bc8d89dea923fc09ce885
https://github.com/llvm/llvm-project/commit/03312094b8243bb54b5bc8d89dea923fc09ce885
Author: Jim Lin <jim at andestech.com>
Date: 2026-04-17 (Fri, 17 Apr 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
A llvm/test/CodeGen/RISCV/rvv/buildvec-sext.ll
Log Message:
-----------
[DAGCombiner] Extend convertBuildVecZextToZext to sign extends (#192372)
Generalize the existing fold that collapses a BUILD_VECTOR of ZERO_EXTEND
(or ANY_EXTEND) of EXTRACT_VECTOR_ELTs into a single vector extend so that
it also handles SIGN_EXTEND. Mixed sign and zero extends remain unsupported
because their high-bit semantics differ, so the combine bails out in that
case.
---------
Co-authored-by: Claude Opus 4.6 (1M context) <noreply at anthropic.com>
Commit: 114f6627d927f560550136c2b43747dc77f3ee9d
https://github.com/llvm/llvm-project/commit/114f6627d927f560550136c2b43747dc77f3ee9d
Author: aokblast <aokblast at FreeBSD.org>
Date: 2026-04-17 (Fri, 17 Apr 2026)
Changed paths:
M llvm/tools/llvm-readobj/ELFDumper.cpp
Log Message:
-----------
[llvm-readobj][ELF] Remove redundant error in reportWarning (#192458)
Commit: 27769d7b5976c40f43f535ef19bcc6f8603fc3f6
https://github.com/llvm/llvm-project/commit/27769d7b5976c40f43f535ef19bcc6f8603fc3f6
Author: Piyou Chen <piyou.chen at sifive.com>
Date: 2026-04-17 (Fri, 17 Apr 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfo.h
M llvm/test/CodeGen/RISCV/machine-outliner-call-x5-liveout.mir
A llvm/test/CodeGen/RISCV/machine-outliner-reserved-regs.mir
A llvm/test/CodeGen/RISCV/machine-outliner-x5-regsave-rv32e.mir
A llvm/test/CodeGen/RISCV/machine-outliner-x5-regsave.mir
Log Message:
-----------
[RISCV] Support MachineOutlinerRegSave for RISCV (#191351)
This patch adds support for the RegSave strategy in the RISC-V
MachineOutliner pass. It uses t1–t6 to preserve the t0 value across the
outlined function call when t0 is unavailable. This enables more
potential outlining candidates.
---------
Co-authored-by: Craig Topper <craig.topper at sifive.com>
Commit: 91fcdab8983a5f014528949183e9992940404782
https://github.com/llvm/llvm-project/commit/91fcdab8983a5f014528949183e9992940404782
Author: Longsheng Mou <longshengmou at gmail.com>
Date: 2026-04-17 (Fri, 17 Apr 2026)
Changed paths:
M mlir/lib/Dialect/MemRef/Transforms/FoldMemRefAliasOps.cpp
M mlir/test/Dialect/MemRef/fold-memref-alias-ops.mlir
Log Message:
-----------
[mlir][memref] Remove unit-stride restriction in SubViewOp folding (#192437)
This PR replaces manual offset/size resolution with `affine::mergeOffsetsSizesAndStrides`, simplifying the code and extending subview-of-subview folding to support non-unit strides.
Commit: 7094eb52d8cbaa9faeb635bfb6f6c06e6cd52b64
https://github.com/llvm/llvm-project/commit/7094eb52d8cbaa9faeb635bfb6f6c06e6cd52b64
Author: Schrodinger ZHU Yifan <yifanzhu at rochester.edu>
Date: 2026-04-16 (Thu, 16 Apr 2026)
Changed paths:
M libc/src/__support/threads/CMakeLists.txt
M libc/src/__support/threads/CndVar.h
M libc/src/__support/threads/darwin/futex_utils.h
A libc/src/__support/threads/futex_utils.h
M libc/src/__support/threads/linux/futex_utils.h
M libc/src/__support/threads/raw_mutex.h
M libc/src/__support/threads/raw_rwlock.h
M libc/src/semaphore/CMakeLists.txt
M libc/src/semaphore/posix_semaphore.h
M libc/test/integration/src/__support/threads/CMakeLists.txt
A libc/test/integration/src/__support/threads/futex_requeue_test.cpp
M libc/test/src/__support/threads/CMakeLists.txt
A libc/test/src/__support/threads/futex_utils_test.cpp
Log Message:
-----------
[libc][threads] adjust futex library and expose requeue API (#192478)
Make futex a common abstraction layer across platforms.
(linux/wasm/macOS/windows/fuchsia all have the support, which we can
align their support later on).
This patch also expose a requeue API that returns ENOSYS on unsupported
platforms. The requeue operation will be needed to reimplement a strict
FIFO style condvar similar to musl.
Additional cleanup is done to change raw syscall return value to
`ErrorOr<int>`.
Assisted-by: Codex with gpt-5.4 medium fast
Commit: 685ee06ff810e818a55b4b0d10f93dd75303a84c
https://github.com/llvm/llvm-project/commit/685ee06ff810e818a55b4b0d10f93dd75303a84c
Author: forking-google-bazel-bot[bot] <265904573+forking-google-bazel-bot[bot]@users.noreply.github.com>
Date: 2026-04-16 (Thu, 16 Apr 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[Bazel] Fixes 7094eb5 (#192584)
This fixes 7094eb52d8cbaa9faeb635bfb6f6c06e6cd52b64.
Co-authored-by: Google Bazel Bot <google-bazel-bot at google.com>
Commit: 7cabc53157287698fa33a310466e9ae4d49c73f9
https://github.com/llvm/llvm-project/commit/7cabc53157287698fa33a310466e9ae4d49c73f9
Author: hev <wangrui at loongson.cn>
Date: 2026-04-17 (Fri, 17 Apr 2026)
Changed paths:
M llvm/test/CodeGen/LoongArch/lasx/ir-instruction/add.ll
M llvm/test/CodeGen/LoongArch/lasx/ir-instruction/sub.ll
M llvm/test/CodeGen/LoongArch/lsx/ir-instruction/add.ll
M llvm/test/CodeGen/LoongArch/lsx/ir-instruction/sub.ll
Log Message:
-----------
[LoongArch][NFC] Add tests for add/sub with negative splat immediates (#191965)
Commit: 2bac8d6ebe9003f6ad575a5e2b4465fd1449dea7
https://github.com/llvm/llvm-project/commit/2bac8d6ebe9003f6ad575a5e2b4465fd1449dea7
Author: hev <wangrui at loongson.cn>
Date: 2026-04-17 (Fri, 17 Apr 2026)
Changed paths:
M llvm/test/CodeGen/LoongArch/lasx/ir-instruction/and.ll
M llvm/test/CodeGen/LoongArch/lasx/ir-instruction/nor.ll
M llvm/test/CodeGen/LoongArch/lasx/ir-instruction/or.ll
M llvm/test/CodeGen/LoongArch/lasx/ir-instruction/xor.ll
M llvm/test/CodeGen/LoongArch/lsx/ir-instruction/and.ll
M llvm/test/CodeGen/LoongArch/lsx/ir-instruction/nor.ll
M llvm/test/CodeGen/LoongArch/lsx/ir-instruction/or.ll
M llvm/test/CodeGen/LoongArch/lsx/ir-instruction/xor.ll
Log Message:
-----------
[LoongArch][NFC] Add tests for bitwise with byte splat immediates (#192216)
Commit: 8398672dca5dcc53b56620b70659e38ea30f2f98
https://github.com/llvm/llvm-project/commit/8398672dca5dcc53b56620b70659e38ea30f2f98
Author: Zhaoxin Yang <yangzhaoxin at loongson.cn>
Date: 2026-04-17 (Fri, 17 Apr 2026)
Changed paths:
A llvm/test/CodeGen/LoongArch/lasx/ir-instruction/fptrunc.ll
A llvm/test/CodeGen/LoongArch/lsx/ir-instruction/fptrunc.ll
Log Message:
-----------
[LoongArch][NFC] Pre-commit tests for vector fptrunc from vxf64 to vxf32 (#164058)
Commit: ab94dbc0569368290c7b400e9b47981193b73e69
https://github.com/llvm/llvm-project/commit/ab94dbc0569368290c7b400e9b47981193b73e69
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-04-17 (Fri, 17 Apr 2026)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ByteCode/Descriptor.h
M clang/lib/AST/ByteCode/Interp.cpp
M clang/lib/AST/ByteCode/Interp.h
M clang/lib/AST/ByteCode/Opcodes.td
M clang/lib/AST/ByteCode/Pointer.cpp
M clang/lib/AST/ByteCode/Pointer.h
M clang/test/AST/ByteCode/cxx20.cpp
Log Message:
-----------
[clang][bytecode] Mark pointers destroyed in destructors (#192460)
We didn't use to do this at all, so calling the destructor explicitly
twice in a row wasn't an error. Calling it and accessing the object
afterwards wasn't an error either.
Commit: fca80b4ff3fc00d95a1ae6412e838c04443f55ef
https://github.com/llvm/llvm-project/commit/fca80b4ff3fc00d95a1ae6412e838c04443f55ef
Author: Chaitanya <Krishna.Sankisa at amd.com>
Date: 2026-04-17 (Fri, 17 Apr 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUSwLowerLDS.cpp
A llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-alloca-placement.ll
Log Message:
-----------
[AMDGPU][ASAN] Move allocas to entry block in amdgpu-sw-lower-lds pass (#190772)
The `amdgpu-sw-lower-lds` pass inserts a workitem-0 check, malloc, and
barrier before the original entry block, creating a new entry block.
This pushes the original allocas into a non-entry block, causing LLVM to
treat them as dynamic allocas.
AMDGPU backend generates incorrect flat addresses for dynamic alloca
addrspacecasts at -O0, causing memory faults when ASan is enabled with
LDS.
This PR hoists constant-size allocas to the new entry block so they
remain static.
Commit: ede75e5d5dfb9b9481c1ae2c332085d24d9744df
https://github.com/llvm/llvm-project/commit/ede75e5d5dfb9b9481c1ae2c332085d24d9744df
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-04-17 (Fri, 17 Apr 2026)
Changed paths:
M clang/lib/AST/ByteCode/Interp.cpp
M clang/test/AST/ByteCode/cxx20.cpp
Log Message:
-----------
[clang][bytecode] Don't diagnose const assignments... (#192593)
... when we're in CPCE mode.
Commit: 19463aab0271572a3e9e2f45ec21014553241c05
https://github.com/llvm/llvm-project/commit/19463aab0271572a3e9e2f45ec21014553241c05
Author: Konrad Kleine <kkleine at redhat.com>
Date: 2026-04-17 (Fri, 17 Apr 2026)
Changed paths:
M llvm/lib/DebugInfo/DWARF/DWARFCFIPrinter.cpp
Log Message:
-----------
[llvm][DebugInfo] Use formatv in DWARFCFIPrinter (#191982)
This relates to #35980.
Commit: b4e75e158e460f66407bd5be7d13a38ff61d816a
https://github.com/llvm/llvm-project/commit/b4e75e158e460f66407bd5be7d13a38ff61d816a
Author: Jeff Bailey <jbailey at raspberryginger.com>
Date: 2026-04-17 (Fri, 17 Apr 2026)
Changed paths:
M libc/src/ucontext/getcontext.h
M libc/src/ucontext/setcontext.h
M libc/src/ucontext/x86_64/getcontext.cpp
M libc/src/ucontext/x86_64/setcontext.cpp
Log Message:
-----------
[libc][nfc] Fix ucontext buildbot failure with noexcept (#192343) (#192601)
Added noexcept to getcontext and setcontext declarations and definitions
to resolve missing attribute warning on aliases.
This fixes failures on builders using GCC like
libc-x86_64-debian-gcc-fullbuild-dbg.
Commit: 10536d48b700e82101d9c8f4a0a87c999b6f9251
https://github.com/llvm/llvm-project/commit/10536d48b700e82101d9c8f4a0a87c999b6f9251
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2026-04-17 (Fri, 17 Apr 2026)
Changed paths:
M clang/lib/CodeGen/BackendUtil.cpp
M llvm/include/llvm/Transforms/IPO/LowerTypeTests.h
M llvm/lib/Passes/PassBuilder.cpp
M llvm/lib/Passes/PassBuilderPipelines.cpp
M llvm/lib/Passes/PassRegistry.def
M llvm/lib/Transforms/IPO/LowerTypeTests.cpp
M llvm/test/Other/fatlto.ll
M llvm/test/Other/new-pm-O0-defaults.ll
M llvm/test/Other/new-pm-lto-defaults.ll
M llvm/test/Other/new-pm-thinlto-postlink-defaults.ll
M llvm/test/Other/new-pm-thinlto-postlink-pgo-defaults.ll
M llvm/test/Other/new-pm-thinlto-postlink-samplepgo-defaults.ll
M llvm/test/ThinLTO/X86/lower_type_test_phi.ll
M llvm/test/Transforms/LowerTypeTests/drop_type_test.ll
M llvm/test/Transforms/LowerTypeTests/drop_type_test_phi.ll
M llvm/test/Transforms/LowerTypeTests/drop_type_test_select.ll
Log Message:
-----------
[CFI] Extract DropTypeTestsPass from LowerTypeTestsPass (#192578)
This patch introduces `DropTypeTestsPass` as a dedicated pass
to handle the dropping of type tests. Previously, this was handled
by `LowerTypeTestsPass` with a specific parameter.
By splitting this into its own pass, we simplify the pass pipeline
construction and make the intent clearer in `PassRegistry.def` and
various pipeline builders.
It's almost NFC, if not opt command line changes.
Commit: 8671b797be7a9b6424ed33b7df1f4869412fe4db
https://github.com/llvm/llvm-project/commit/8671b797be7a9b6424ed33b7df1f4869412fe4db
Author: Mel Chen <mel.chen at sifive.com>
Date: 2026-04-17 (Fri, 17 Apr 2026)
Changed paths:
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-interleave.ll
Log Message:
-----------
[LV][RISCV] Fix incorrect pointer operand in interleaved access tests. nfc (#192464)
In some load cases, the index 1 member used the same pointer as the
index 0 member. This patch corrected the pointer use.
Commit: bcc606cd0e04735af71988498c59362e81a25d8b
https://github.com/llvm/llvm-project/commit/bcc606cd0e04735af71988498c59362e81a25d8b
Author: Frank Schlimbach <frank.schlimbach at intel.com>
Date: 2026-04-17 (Fri, 17 Apr 2026)
Changed paths:
M mlir/lib/Dialect/Shard/Transforms/Partition.cpp
Log Message:
-----------
[NFC][mlir][shard] Unify MoveLastSplitAxisPattern/MoveLastSplitAxisPattern (#192295)
Made MoveLastSplitAxisPattern more general to also cover MoveLastSplitAxisPattern.
Less code, same functionality.
Assisted by claude.
Commit: 2fdd23f7a32c15e07a2217abbcfec35092dffc59
https://github.com/llvm/llvm-project/commit/2fdd23f7a32c15e07a2217abbcfec35092dffc59
Author: Brad Smith <brad at comstyle.com>
Date: 2026-04-17 (Fri, 17 Apr 2026)
Changed paths:
M compiler-rt/lib/builtins/cpu_model/aarch64/hwcap.inc
Log Message:
-----------
[compiler-rt][AArch64][NFC] Sort HWCAP entries (#192370)
Commit: a02d955b334c3b65a08159bb869018e8a7f0f81c
https://github.com/llvm/llvm-project/commit/a02d955b334c3b65a08159bb869018e8a7f0f81c
Author: Matthias Springer <me at m-sp.org>
Date: 2026-04-17 (Fri, 17 Apr 2026)
Changed paths:
M mlir/lib/Dialect/Vector/IR/VectorOps.cpp
M mlir/test/Dialect/Vector/canonicalize.mlir
M mlir/test/Dialect/Vector/vector-contract-to-matrix-intrinsics-transforms.mlir
M mlir/test/Dialect/XeGPU/xegpu-vector-linearize.mlir
Log Message:
-----------
[mlir][vector] Fold poison operands into vector.shuffle mask (#190932)
Fold poison operands into the `vector.shuffle` mask. This commit also
splits up the `vector::ShuffleOp::fold` implementation into multiple
helper functions.
Assisted-by: claude-4.6-opus-high
Commit: 7f5588f35abefa7f961fd471eb5282ab384dc46a
https://github.com/llvm/llvm-project/commit/7f5588f35abefa7f961fd471eb5282ab384dc46a
Author: Dmitrii Makarenko <dmitrii.makarenko at intel.com>
Date: 2026-04-17 (Fri, 17 Apr 2026)
Changed paths:
M mlir/include/mlir/Dialect/Bufferization/IR/BufferizableOpInterface.td
M mlir/lib/Dialect/Bufferization/IR/BufferizableOpInterface.cpp
M mlir/lib/Dialect/Bufferization/Transforms/OneShotAnalysis.cpp
M mlir/lib/Dialect/Bufferization/Transforms/OneShotModuleBufferize.cpp
M mlir/lib/Dialect/SCF/Transforms/BufferizableOpInterfaceImpl.cpp
M mlir/test/Dialect/Bufferization/Transforms/one-shot-module-bufferize.mlir
M mlir/test/lib/Dialect/Test/TestOpDefs.cpp
M mlir/test/lib/Dialect/Test/TestOps.td
Log Message:
-----------
[MLIR] make One-Shot and SCF bufferization TensorLikeType-aware (#189073)
Fix bufferization inconsistencies between builtin tensor types and
custom TensorLikeType implementations across One-Shot analysis/module
paths and SCF bufferization interfaces.
The main issue was a mix of TensorType/RankedTensorType checks in places
that need TensorLikeType-aware handling. This could leave
function-boundary equivalence/aliasing incomplete for custom tensor-like
types, leading to spurious SCF loop equivalence verification failures.
This change:
- switches relevant One-Shot analysis/module checks from TensorType/
RankedTensorType to TensorLikeType;
- updates generic/default aliasing utilities to treat TensorLikeType
consistently;
- updates SCF BufferizableOpInterface implementations
(for/while/if/yield related paths) to use TensorLikeType/BufferLikeType
where appropriate;
- updates test custom ops to provide required aliasing/getBufferType
hooks for custom tensor-like types;
- refreshes and renames custom_types SCF tests to explicitly check
memref replacement after bufferization.
Potential follow-ups / known risk areas:
- SCF.Forall shared_outs still has RankedTensorType assumptions in
signatures/ paths and should be audited for full TensorLikeType
coverage.
- SCF.For and SCF.While resolveConflicts call
allocateTensorForShapedValue, which currently assumes ranked
tensor/memref copy paths; this may still be a limitation for some
tensor-like/unranked scenarios.
---------
Signed-off-by: Dmitrii Makarenko <dmitrii.makarenko at intel.com>
Commit: 1963feb560d6f95c0402c48d3c75bcb06057827c
https://github.com/llvm/llvm-project/commit/1963feb560d6f95c0402c48d3c75bcb06057827c
Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
Date: 2026-04-17 (Fri, 17 Apr 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
Log Message:
-----------
[LV] Replace "BinOp" with "ExtendedOp" in partial reduction transforms (NFCI) (#192422)
"BinOp" as not been accurate for a while (as it's sometime just an
extend). After #188043, it can now also be an "abs" in some cases.
This patch renames "BinOp" to "ExtendedOp" (in line with
matchExtendedReductionOperand). It also updates some doc comments and
tweaks matching the "ExtendedOp" in transformToPartialReduction.
Commit: b2317cc584b84b275a60004226b5962e635c4fda
https://github.com/llvm/llvm-project/commit/b2317cc584b84b275a60004226b5962e635c4fda
Author: Matthias Springer <me at m-sp.org>
Date: 2026-04-17 (Fri, 17 Apr 2026)
Changed paths:
M mlir/include/mlir/Conversion/ArithCommon/AttrToLLVMConverter.h
M mlir/include/mlir/Dialect/Arith/IR/ArithBase.td
M mlir/include/mlir/Dialect/Arith/IR/ArithOps.td
M mlir/lib/Conversion/ArithToLLVM/ArithToLLVM.cpp
M mlir/lib/Conversion/TosaToLinalg/TosaToLinalg.cpp
M mlir/lib/Dialect/Arith/IR/ArithCanonicalization.td
M mlir/lib/Dialect/Arith/IR/ArithOps.cpp
M mlir/test/Conversion/ArithToLLVM/arith-to-llvm.mlir
M mlir/test/Dialect/Arith/canonicalize.mlir
M mlir/test/Dialect/Arith/ops.mlir
Log Message:
-----------
[mlir][arith] Add rounding mode flags to binary arithmetic operations (#188458)
Add rounding mode flags for `addf`, `subf`, `mulf`, `divf`. This
addresses a TODO in the op description.
The folder now takes into account the specified rounding mode. If no
rounding mode is specified, the folders/canonicalizations default to
`rmNearestTiesToEven`. (This behavior has not changed.) This is
documented in the top-level arith dialect documentation. The default
arith rounding mode applies only to "internal" transformations such as
foldings/canonicalizations. In case of an unspecified explicit rounding
mode, the runtime behavior is up to the target backend.
Also add a lowering to LLVM intrinsics such as
`llvm.intr.experimental.constrained.fadd`.
Assisted-by: claude-4.6-opus-high
Commit: 6b0d268fe544b25fd1f82aad4e246f8a74e260ed
https://github.com/llvm/llvm-project/commit/6b0d268fe544b25fd1f82aad4e246f8a74e260ed
Author: Jean-Didier PAILLEUX <jean-didier.pailleux at sipearl.com>
Date: 2026-04-17 (Fri, 17 Apr 2026)
Changed paths:
M flang/include/flang/Lower/MultiImageFortran.h
A flang/include/flang/Optimizer/Builder/MIFCommon.h
M flang/include/flang/Optimizer/Dialect/MIF/MIFOps.td
M flang/include/flang/Optimizer/Transforms/MIFOpConversion.h
M flang/lib/Lower/Allocatable.cpp
M flang/lib/Lower/Bridge.cpp
M flang/lib/Lower/ConvertVariable.cpp
M flang/lib/Lower/MultiImageFortran.cpp
M flang/lib/Optimizer/Builder/CMakeLists.txt
M flang/lib/Optimizer/Builder/IntrinsicCall.cpp
A flang/lib/Optimizer/Builder/MIFCommon.cpp
M flang/lib/Optimizer/Dialect/MIF/CMakeLists.txt
M flang/lib/Optimizer/Dialect/MIF/MIFOps.cpp
M flang/lib/Optimizer/Transforms/MIFOpConversion.cpp
M flang/test/Fir/MIF/change_team.mlir
M flang/test/Fir/MIF/change_team2.mlir
A flang/test/Fir/MIF/coarray-alloc.mlir
M flang/test/Fir/MIF/form_team.mlir
M flang/test/Fir/MIF/get_team.mlir
M flang/test/Fir/MIF/sync_team.mlir
M flang/test/Fir/MIF/team_number.mlir
A flang/test/Lower/MIF/coarray_allocation.f90
A flang/test/Lower/MIF/coarray_allocation2.f90
A flang/test/Lower/MIF/coarray_allocation3.f90
A flang/test/Lower/MIF/coarray_allocation4.f90
A flang/test/Lower/MIF/coarray_allocation5.f90
Log Message:
-----------
[Flang] Adding first lowering for the allocation and deallocation of coarrays (#182110)
This PR add support of coarray allocation and deallocation in Flang and
adds two new operations to MIF:
- `mif::AllocaCoarrayOp` : Allocates a coarray
using `prif_allocate_coarray` PRIF procedure.
- `mif::DeallocaCoarrayOp` : Deallocates a coarray
using `prif_deallocate_coarray` PRIF procedure
This PR does not yet handle allocation for the following cases (which
will be added in future PRs):
- Coarrays with ALLOCATABLE and/or POINTER components (PRIF has
procedures (`prif_(de)allocate`) for this).
- Coarray dummy arguments (PRIF has also procedures for this)
- Finalization of coarrays
- non-ALLOCATABLE SAVE coarrays outside the scoping unit of the main
program (e.g. non-ALLOCATABLE coarrays declared in a module or a
procedure)
Another PR which add support of some basic intrinsics with a coarray as
an argument will follow after this one.
---------
Co-authored-by: Dan Bonachea <dobonachea at lbl.gov>
Commit: 4b2fffab5620fb937e96ef3f2911fc79a3703081
https://github.com/llvm/llvm-project/commit/4b2fffab5620fb937e96ef3f2911fc79a3703081
Author: Zhijie Wang <yesterda9 at gmail.com>
Date: 2026-04-17 (Fri, 17 Apr 2026)
Changed paths:
M clang/lib/Analysis/LifetimeSafety/FactsGenerator.cpp
M clang/test/Sema/warn-lifetime-safety-suggestions.cpp
Log Message:
-----------
[LifetimeSafety] Handle xvalue operand of LValueToRValue cast (#192312)
Under C++23, P2266 wraps the operand of `return p;` in an xvalue NoOp
cast for by-value parameters. The `CK_LValueToRValue` branch in
FactsGenerator guarded on `!SubExpr->isLValue()`, breaking origin flow
and silencing the suggestion for `int* id(int* p) { return p; }`.
Use `isGLValue()`, matching how origins are built and stripped elsewhere
in the analysis.
Only add a RUN in suggestion test file, since some tests in
`warn-lifetime-safety.cpp` cause a hard error under C++23. For example:
`MyObj& f() { MyObj s; return s; }`. `error: non-const lvalue reference
to type 'MyObj' cannot bind to a temporary of type 'MyObj'`.
Fixes: #176292
Commit: 8364db5096b6baa00904242eb323d66f1ef96e94
https://github.com/llvm/llvm-project/commit/8364db5096b6baa00904242eb323d66f1ef96e94
Author: Sander de Smalen <sander.desmalen at arm.com>
Date: 2026-04-17 (Fri, 17 Apr 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/reduction-recurrence-costs-sve.ll
A llvm/test/Transforms/LoopVectorize/AArch64/splice-cost.ll
Log Message:
-----------
[LV] Fix the cost of first order recurrence splice (#192473)
The index had the wrong sign (for splice.right, the sign is negative),
which meant that it calculates the cost of a splice.left operation. For
SVE this makes a difference because a splice.left is lowered using an
unpredicated EXT instruction, whereas a splice.right is lowered using a
predicated SPLICE instruction, which needs a slightly higher cost.
The change in `reduction-recurrence-costs-sve.ll` happens because the
vector loop is now less profitable (higher cost) and therefore requires
a higher trip-count to be profitable (hence the extra umax).
Commit: 3ac04b93d0fe0c4554bf753e57047872f6f55de9
https://github.com/llvm/llvm-project/commit/3ac04b93d0fe0c4554bf753e57047872f6f55de9
Author: Davide Grohmann <davide.grohmann at arm.com>
Date: 2026-04-17 (Fri, 17 Apr 2026)
Changed paths:
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVTosaOps.td
M mlir/test/Dialect/SPIRV/IR/tosa-ops-verification.mlir
Log Message:
-----------
[mlir][spirv] Improve type constraints for SPIR-V Tosa CastOp (#192227)
Signed-off-by: Davide Grohmann <davide.grohmann at arm.com>
Commit: a4cccdc393ec8930c03d633ecf932e47d914466b
https://github.com/llvm/llvm-project/commit/a4cccdc393ec8930c03d633ecf932e47d914466b
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-04-17 (Fri, 17 Apr 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlan.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/predicated-costs.ll
M llvm/test/Transforms/LoopVectorize/RISCV/gather-scatter-cost.ll
M llvm/test/Transforms/LoopVectorize/RISCV/masked_gather_scatter.ll
M llvm/test/Transforms/LoopVectorize/RISCV/riscv-vector-reverse.ll
M llvm/test/Transforms/LoopVectorize/RISCV/runtime-check-dependent-on-stride.ll
M llvm/test/Transforms/LoopVectorize/RISCV/strided-accesses.ll
M llvm/test/Transforms/LoopVectorize/VPlan/RISCV/vplan-riscv-vector-reverse.ll
M llvm/test/Transforms/LoopVectorize/VPlan/conditional-scalar-assignment-vplan.ll
M llvm/test/Transforms/LoopVectorize/VPlan/first-order-recurrence-sink-replicate-region.ll
M llvm/test/Transforms/LoopVectorize/VPlan/icmp-uniforms.ll
M llvm/test/Transforms/LoopVectorize/VPlan/vplan-sink-scalars-and-merge.ll
Log Message:
-----------
[VPlan] Remove constant branches early. (#183397)
Simplify constant branches early, after introducing the check in the
middle block.
This removes any trivial branches in the input CFG (e.g. over-reduced
test cases) early and also folds branches on true/false created by
addMiddleChecks. This allows to check if there's a scalar tail instead
to check if the tail has been folded, as mentioned in
https://github.com/llvm/llvm-project/pull/182507
This requires to remove recipes in the new unreachable blocks, as
otherwise we would fail during verification, due to uses in unreachable
blocks. Alternatively, we may be able to skip verification for uses in
unreachable blocks.
Depends on https://github.com/llvm/llvm-project/pull/181252.
PR: https://github.com/llvm/llvm-project/pull/183397
Commit: 58b65fa67f1fa25c45a92550f99c2d7f7b2c2bec
https://github.com/llvm/llvm-project/commit/58b65fa67f1fa25c45a92550f99c2d7f7b2c2bec
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2026-04-17 (Fri, 17 Apr 2026)
Changed paths:
M cross-project-tests/lit.cfg.py
Log Message:
-----------
[cross-project-tests][lit] Print LLDB version when configuring tests (#192614)
Useful when debugging issues with the LLDB tests.
Commit: 935413c3cb8eabf3e69181c986c8899affa13d7a
https://github.com/llvm/llvm-project/commit/935413c3cb8eabf3e69181c986c8899affa13d7a
Author: Zhaoxin Yang <yangzhaoxin at loongson.cn>
Date: 2026-04-17 (Fri, 17 Apr 2026)
Changed paths:
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/lib/Target/LoongArch/LoongArchISelLowering.h
M llvm/lib/Target/LoongArch/LoongArchLASXInstrInfo.td
M llvm/lib/Target/LoongArch/LoongArchLSXInstrInfo.td
M llvm/test/CodeGen/LoongArch/lasx/ir-instruction/fptrunc.ll
M llvm/test/CodeGen/LoongArch/lsx/ir-instruction/fptrunc.ll
Log Message:
-----------
[LoongArch] Add support for vector FP_ROUND from vxf64 to vxf32 (#164059)
In LoongArch, [x]vfcvt.s.d intstructions require two vector registers
for v4f64->v4f32, v8f64->v8f32 conversions.
This patch handles these cases:
- For FP_ROUND v2f64->v2f32(illegal), add a customized v2f32 widening to
convert it into a target-specific LoongArchISD::VFCVT.
- For FP_ROUND v4f64->v4f32, on LSX platforms, v4f64 is illegal and will
be split into two v2f64->v2f32, resulting in two LoongArchISD::VFCVT.
Finally, they are combined into a single node during combining
LoongArchISD::VPACKEV. On LASX platforms, v4f64->v4f32 can directly
lower to vfcvt.s.d in lowerFP_ROUND.
- For FP_ROUND v8f64->v8f32, on LASX platforms, v8f64 is illegal and
will be split into two v4f64->v4f32 and then combine using
ISD::CONCAT_VECTORS, so we combine two ISD::FP_ROUND to
LoongArchISD::VFCVT in this phase.
Commit: b3661c2da61c5f2b6cca30a3ca2e66dfdf26acd3
https://github.com/llvm/llvm-project/commit/b3661c2da61c5f2b6cca30a3ca2e66dfdf26acd3
Author: hev <wangrui at loongson.cn>
Date: 2026-04-17 (Fri, 17 Apr 2026)
Changed paths:
M llvm/lib/Target/LoongArch/LoongArchISelDAGToDAG.cpp
M llvm/lib/Target/LoongArch/LoongArchISelDAGToDAG.h
M llvm/lib/Target/LoongArch/LoongArchLASXInstrInfo.td
M llvm/lib/Target/LoongArch/LoongArchLSXInstrInfo.td
M llvm/test/CodeGen/LoongArch/lasx/ir-instruction/add.ll
M llvm/test/CodeGen/LoongArch/lasx/ir-instruction/sub.ll
M llvm/test/CodeGen/LoongArch/lsx/ir-instruction/add.ll
M llvm/test/CodeGen/LoongArch/lsx/ir-instruction/sub.ll
Log Message:
-----------
[LoongArch] Select V{ADD,SUB}I for operations with negative splat immediates (#191966)
Currently, vector add/sub with a negative splat immediate is lowered as
a vector splat followed by a register-register operations, e.g.:
```
vrepli.b $vr1, -1
vadd.b $vr0, $vr0, $vr1
```
This misses the opportunity to use the more efficient V{ADD,SUB}I
instruction with a positive immediate.
This patch introduces `selectVSplatImmNeg` to detect negative splat
immediates whose negated value fits in a 5-bit unsigned immediate. New
patterns `(Pat{Vr,Vr}Nimm5)` are added to match:
```
add v, splat(-imm) --> vsubi v, v, imm
sub v, splat(-imm) --> vaddi v, v, imm
```
This avoids materializing the splat constant and reduces the instruction
count.
The transformation is applied for both LSX and LASX vector types.
Commit: 9a3f0a0e136c6a6e23515ba2769de6e6160488d3
https://github.com/llvm/llvm-project/commit/9a3f0a0e136c6a6e23515ba2769de6e6160488d3
Author: Jeff Bailey <jbailey at raspberryginger.com>
Date: 2026-04-17 (Fri, 17 Apr 2026)
Changed paths:
M libc/config/linux/x86_64/headers.txt
Log Message:
-----------
[libc] Add ucontext to public headers for Linux x86_64 (#192621)
Added libc.include.ucontext to TARGET_PUBLIC_HEADERS for Linux x86_64 in
headers.txt.
Commit: 79f31de283b66cc8fa0e372c18d2ca7629829b7d
https://github.com/llvm/llvm-project/commit/79f31de283b66cc8fa0e372c18d2ca7629829b7d
Author: ZhaoQi <zhaoqi01 at loongson.cn>
Date: 2026-04-17 (Fri, 17 Apr 2026)
Changed paths:
A llvm/test/CodeGen/LoongArch/lasx/ir-instruction/shuffle-as-xvextrins.ll
Log Message:
-----------
[LoongArch][NFC] Pre-commit tests for `xvextrins` (#164373)
Commit: 1014eb28e7d4bbfe132b270d885cb9e094e4227a
https://github.com/llvm/llvm-project/commit/1014eb28e7d4bbfe132b270d885cb9e094e4227a
Author: Vincent <janssen.vincentius at gmail.com>
Date: 2026-04-17 (Fri, 17 Apr 2026)
Changed paths:
M mlir/lib/IR/ODSSupport.cpp
A mlir/test/IR/invalid-properties.mlir
Log Message:
-----------
[mlir] Fix copy paste typo in convertFromAttribute (#192484)
It seems that the bool overload for `convertFromAttribute` has a failure
message incorrectly copied over from the string overload's
implementation.
Commit: a82f3093a05bf00bc959ba439a616efa787c8086
https://github.com/llvm/llvm-project/commit/a82f3093a05bf00bc959ba439a616efa787c8086
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-04-17 (Fri, 17 Apr 2026)
Changed paths:
M clang/lib/AST/ByteCode/Interp.cpp
M clang/lib/AST/ByteCode/Interp.h
M clang/lib/AST/ByteCode/Pointer.cpp
M clang/test/AST/ByteCode/new-delete.cpp
M clang/test/SemaCXX/cxx2a-consteval.cpp
Log Message:
-----------
[clang][bytecode] Allow more function calls in CPCE mode (#192597)
We previously didn't diagnose the attached test cases correctly.
Commit: cb5445f0797b01fee6410319df09813bfc8021f6
https://github.com/llvm/llvm-project/commit/cb5445f0797b01fee6410319df09813bfc8021f6
Author: Luke Lau <luke at igalia.com>
Date: 2026-04-17 (Fri, 17 Apr 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoVSDPatterns.td
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
M llvm/test/Analysis/CostModel/RISCV/masked-divrem.ll
M llvm/test/CodeGen/RISCV/rvv/masked-sdiv.ll
M llvm/test/CodeGen/RISCV/rvv/masked-srem.ll
M llvm/test/CodeGen/RISCV/rvv/masked-udiv.ll
M llvm/test/CodeGen/RISCV/rvv/masked-urem.ll
Log Message:
-----------
[RISCV] Lower masked_{u,s}{div,rem} and update TTI (#192543)
The loop vectorizer will soon emit llvm.masked.udiv intrinsics and
friends. The vast majority of the time these will be transformed to
vp.udiv on RISC-V thanks to tail folding, but if it doesn't tail fold or
uses a fixed VF then it will reach instruction selection.
This patch lowers the nodes to the masked pseudo for scalable and fixed
vectors, and updates the TTI to account for it.
Commit: b7716135a88f1424fbb400124d3b57a269b38c75
https://github.com/llvm/llvm-project/commit/b7716135a88f1424fbb400124d3b57a269b38c75
Author: Pengcheng Wang <wangpengcheng.pp at bytedance.com>
Date: 2026-04-17 (Fri, 17 Apr 2026)
Changed paths:
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-deinterleave2.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-int-interleave.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-zipeven-zipodd.ll
M llvm/test/CodeGen/RISCV/rvv/vector-deinterleave-fixed.ll
M llvm/test/CodeGen/RISCV/rvv/vector-deinterleave.ll
M llvm/test/CodeGen/RISCV/rvv/vector-interleave-fixed.ll
M llvm/test/CodeGen/RISCV/rvv/vector-interleave.ll
Log Message:
-----------
[RISCV] Add tests for Zvzip CodeGen (#192591)
Then we can add CodeGen support incrementally.
Commit: 6383afba60e16a9b5b9c62e68fe214f870dd3183
https://github.com/llvm/llvm-project/commit/6383afba60e16a9b5b9c62e68fe214f870dd3183
Author: Ramkumar Ramachandra <artagnon at tenstorrent.com>
Date: 2026-04-17 (Fri, 17 Apr 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
Log Message:
-----------
[VPlan] Use vputils helper in Blend::usesFirstLaneOnly (NFC) (#189697)
Commit: 2b93b3ca7932d415d7f1c3b029f9e39a0a41272e
https://github.com/llvm/llvm-project/commit/2b93b3ca7932d415d7f1c3b029f9e39a0a41272e
Author: Kseniya Tikhomirova <kseniya.tikhomirova at intel.com>
Date: 2026-04-17 (Fri, 17 Apr 2026)
Changed paths:
M libsycl/src/CMakeLists.txt
A libsycl/src/detail/device_image_wrapper.cpp
M libsycl/src/detail/device_image_wrapper.hpp
M libsycl/src/detail/device_impl.hpp
A libsycl/src/detail/device_kernel_info.hpp
R libsycl/src/detail/kernel_id.hpp
M libsycl/src/detail/program_manager.cpp
M libsycl/src/detail/program_manager.hpp
Log Message:
-----------
[libsycl] Add liboffload kernel creation (#188794)
This commit extends ProgramAndKernelManager functionality with kernel
creation.
First, it introduces device kernel info object containing kernel data
that is uniform for submissions of the same kernel. This object helps to
avoid kernel data lookup for subsequent calls of the same kernel. This
data is used to create kernel or to find kernel symbol if it has already
been created.
Second, this commit introduces wrappers to manage kernel related data
and its lifetime. Wrappers are implemented for:
1) programs, wrapper is a RAII helper and calls liboffload
create/release methods for program
2) device images, keeps built programs and provide methods to search
existing programs and to add new ones.
---------
Signed-off-by: Tikhomirova, Kseniya <kseniya.tikhomirova at intel.com>
Co-authored-by: Alexey Bader <alexey.bader at intel.com>
Commit: 7f3ed0c45c52b3ed514b181cf716cae3dae3b947
https://github.com/llvm/llvm-project/commit/7f3ed0c45c52b3ed514b181cf716cae3dae3b947
Author: Paul Walker <paul.walker at arm.com>
Date: 2026-04-17 (Fri, 17 Apr 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
M llvm/test/CodeGen/AArch64/sve-sext-zext.ll
Log Message:
-----------
[LLVM][DAGTypeLegalizer] Maintain scalableness when widening inreg extends. (#192482)
Fixes https://github.com/llvm/llvm-project/issues/187557
Commit: d00a49fc3495f260d8b3125b5d9f4e263ac13166
https://github.com/llvm/llvm-project/commit/d00a49fc3495f260d8b3125b5d9f4e263ac13166
Author: Elio <xiongzile at bytedance.com>
Date: 2026-04-17 (Fri, 17 Apr 2026)
Changed paths:
M libc/config/baremetal/arm/entrypoints.txt
M libc/config/baremetal/riscv/entrypoints.txt
M libc/config/darwin/aarch64/entrypoints.txt
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/arm/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/config/windows/entrypoints.txt
M libc/hdr/types/CMakeLists.txt
A libc/hdr/types/wctype_t.h
A libc/hdr/wctype_overlay.h
M libc/include/CMakeLists.txt
M libc/include/llvm-libc-types/CMakeLists.txt
A libc/include/llvm-libc-types/wctype_t.h
M libc/include/wctype.yaml
M libc/src/__support/wctype_utils.h
M libc/src/wctype/CMakeLists.txt
A libc/src/wctype/iswctype.cpp
A libc/src/wctype/iswctype.h
A libc/src/wctype/wctype.cpp
A libc/src/wctype/wctype.h
M libc/test/src/__support/wctype_utils_test.cpp
M libc/test/src/wctype/CMakeLists.txt
A libc/test/src/wctype/iswctype_test.cpp
A libc/test/src/wctype/wctype_test.cpp
Log Message:
-----------
[libc] Add iswctype and wctype (#191178)
Implement the iswctype and wctype functions from <wctype.h>.
- Add wctype_t type definition.
- Implement wctype to map property strings to classification
descriptors.
- Implement iswctype as a dispatcher over existing wide character
classification functions.
- Add corresponding entrypoints and unit tests.
Refs: https://github.com/llvm/llvm-project/issues/191076
---------
Co-authored-by: Zile Xiong <xiongzile99 at gmail.com>
Commit: 8d488fcd6f7c35b3d256feb0554fd885a9f5ce10
https://github.com/llvm/llvm-project/commit/8d488fcd6f7c35b3d256feb0554fd885a9f5ce10
Author: Benjamin Kramer <benny.kra at googlemail.com>
Date: 2026-04-17 (Fri, 17 Apr 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[bazel] Fix nanobind header build (#192627)
The build was broken by 3b3ac5a1169722bff1ae0f5f8f27a48cc08c3d02
changing textual_hdrs to hdrs - the copts/features weren't copied over,
meaning Nanobind was attempted to be built with exceptions disabled.
Co-authored-by: James Molloy <jmolloy at google.com>
Commit: 96266b71214a2fa0925ea11fe2d01a349eb702e0
https://github.com/llvm/llvm-project/commit/96266b71214a2fa0925ea11fe2d01a349eb702e0
Author: Kryptonite <oalazizi75 at gmail.com>
Date: 2026-04-17 (Fri, 17 Apr 2026)
Changed paths:
M clang-tools-extra/clang-tidy/readability/CMakeLists.txt
M clang-tools-extra/clang-tidy/readability/ReadabilityTidyModule.cpp
A clang-tools-extra/clang-tidy/readability/RedundantLambdaParameterListCheck.cpp
A clang-tools-extra/clang-tidy/readability/RedundantLambdaParameterListCheck.h
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/docs/clang-tidy/checks/list.rst
A clang-tools-extra/docs/clang-tidy/checks/readability/redundant-lambda-parameter-list.rst
A clang-tools-extra/test/clang-tidy/checkers/readability/redundant-lambda-parameter-list.cpp
Log Message:
-----------
[clang-tidy] Add `readability-redundant-lambda-parameter-list` (#190438)
Adds a new clang-tidy check that removes redundant empty parameter lists
from lambda expressions when the rewrite is valid for the active
language standard.
Fixes #190396
Assisted by Claude (Anthropic), all decisions taken in
this PR involved my active judgment
Commit: 91339fd737c67771fd944f17ea9c3e0908e9d418
https://github.com/llvm/llvm-project/commit/91339fd737c67771fd944f17ea9c3e0908e9d418
Author: Ivan Kosarev <ivan.kosarev at amd.com>
Date: 2026-04-17 (Fri, 17 Apr 2026)
Changed paths:
M llvm/lib/CodeGen/MIRPrinter.cpp
M llvm/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-inline-asm.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-unwind-inline-asm.ll
M llvm/test/CodeGen/AArch64/GlobalISel/rbs-matrixindex-regclass-crash.mir
M llvm/test/CodeGen/AArch64/GlobalISel/regbank-inlineasm.mir
M llvm/test/CodeGen/AArch64/aarch64-sme2-asm.ll
M llvm/test/CodeGen/AArch64/aarch64-sve-asm.ll
M llvm/test/CodeGen/AArch64/aarch64-za-clobber.ll
M llvm/test/CodeGen/AArch64/branch-relax-cross-section.mir
M llvm/test/CodeGen/AArch64/callbr-asm-outputs-indirect-isel.ll
M llvm/test/CodeGen/AArch64/emit_fneg_with_non_register_operand.mir
M llvm/test/CodeGen/AArch64/jump-table-compress.mir
M llvm/test/CodeGen/AArch64/machine-latecleanup-inlineasm.mir
M llvm/test/CodeGen/AArch64/misched-fusion-cmp.mir
M llvm/test/CodeGen/AArch64/nested-iv-regalloc.mir
M llvm/test/CodeGen/AArch64/peephole-insvigpr.mir
M llvm/test/CodeGen/AArch64/ptrauth-isel.ll
M llvm/test/CodeGen/AArch64/remat-fmov-vector-imm.mir
M llvm/test/CodeGen/AArch64/shrinkwrap-split-restore-point.mir
M llvm/test/CodeGen/AArch64/wineh9.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inline-asm-mismatched-size.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-inline-asm.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankcombiner-ignore-copies-crash.mir
M llvm/test/CodeGen/AMDGPU/branch-relax-indirect-branch.mir
M llvm/test/CodeGen/AMDGPU/branch-relax-no-terminators.mir
M llvm/test/CodeGen/AMDGPU/buffer-intrinsics-mmo-offsets.ll
M llvm/test/CodeGen/AMDGPU/call-defs-mode-register.ll
M llvm/test/CodeGen/AMDGPU/coalesce-copy-to-agpr-to-av-registers.mir
M llvm/test/CodeGen/AMDGPU/coalescer-early-clobber-subreg.mir
M llvm/test/CodeGen/AMDGPU/dst-sel-hazard.mir
M llvm/test/CodeGen/AMDGPU/endpgm-dce.mir
M llvm/test/CodeGen/AMDGPU/hazards-gfx950.mir
M llvm/test/CodeGen/AMDGPU/inflate-reg-class-vgpr-mfma-to-av-with-load-source.mir
M llvm/test/CodeGen/AMDGPU/inline-asm.i128.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.iglp.opt.exp.large.mir
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.iglp.opt.exp.small.mir
M llvm/test/CodeGen/AMDGPU/local-stack-alloc-add-references.gfx10.mir
M llvm/test/CodeGen/AMDGPU/local-stack-alloc-add-references.gfx8.mir
M llvm/test/CodeGen/AMDGPU/local-stack-alloc-add-references.gfx9.mir
M llvm/test/CodeGen/AMDGPU/machine-scheduler-sink-trivial-remats.mir
M llvm/test/CodeGen/AMDGPU/machine-sink-cycle.mir
M llvm/test/CodeGen/AMDGPU/machine-sink-loop-var-out-of-divergent-loop-swdev407790.mir
M llvm/test/CodeGen/AMDGPU/mai-hazards.mir
M llvm/test/CodeGen/AMDGPU/no-limit-coalesce.mir
M llvm/test/CodeGen/AMDGPU/optimize-exec-mask-pre-ra-no-fold-exec-copy.mir
M llvm/test/CodeGen/AMDGPU/partial-regcopy-and-spill-missed-at-regalloc.ll
M llvm/test/CodeGen/AMDGPU/regalloc-failure-overlapping-insert-assert.mir
M llvm/test/CodeGen/AMDGPU/regalloc-undef-copy-fold.mir
M llvm/test/CodeGen/AMDGPU/remaining-virtual-register-operands.mir
M llvm/test/CodeGen/AMDGPU/rename-independent-subregs.mir
M llvm/test/CodeGen/AMDGPU/rewrite-vgpr-mfma-to-agpr-copy-from.mir
M llvm/test/CodeGen/AMDGPU/rewrite-vgpr-mfma-to-agpr-subreg-insert-extract.mir
M llvm/test/CodeGen/AMDGPU/rewrite-vgpr-mfma-to-agpr-subreg-src2-chain.mir
M llvm/test/CodeGen/AMDGPU/sched-assert-dead-def-subreg-use-other-subreg.mir
M llvm/test/CodeGen/AMDGPU/sched-handleMoveUp-subreg-def-across-subreg-def.mir
M llvm/test/CodeGen/AMDGPU/sink-after-control-flow-postra.mir
M llvm/test/CodeGen/AMDGPU/spill-regpressure-less.mir
M llvm/test/CodeGen/AMDGPU/spill-vector-superclass.ll
M llvm/test/CodeGen/AMDGPU/subreg-undef-def-with-other-subreg-defs.mir
M llvm/test/CodeGen/AMDGPU/swdev282079.mir
M llvm/test/CodeGen/AMDGPU/vccz-corrupt-bug-workaround.mir
M llvm/test/CodeGen/AMDGPU/verify-gfx90a-aligned-vgprs.mir
M llvm/test/CodeGen/AMDGPU/vgpr-mark-last-scratch-load.mir
M llvm/test/CodeGen/AMDGPU/vopc-remat.mir
M llvm/test/CodeGen/ARM/ifcvt-diamond-unanalyzable-common.mir
M llvm/test/CodeGen/ARM/inlineasmbr-if-cvt.mir
M llvm/test/CodeGen/ARM/machine-outliner-noreturn.mir
M llvm/test/CodeGen/ARM/machine-outliner-unoutlinable.mir
M llvm/test/CodeGen/LoongArch/inline-asm-clobbers-fcc.mir
M llvm/test/CodeGen/MIR/Generic/inline-asm-bad-mem-constraint.mir
M llvm/test/CodeGen/MIR/Generic/inline-asm-bad-regclass.mir
M llvm/test/CodeGen/MIR/Generic/inline-asm-extra-info.mir
M llvm/test/CodeGen/MIR/Generic/inline-asm-no-constraint.mir
M llvm/test/CodeGen/MIR/Generic/inline-asm-tiedto-bad-operand-number.mir
M llvm/test/CodeGen/MIR/Generic/inline-asm-tiedto-missing-colon.mir
M llvm/test/CodeGen/MIR/Generic/inline-asm-tiedto-missing-dollar.mir
M llvm/test/CodeGen/MIR/X86/early-clobber-register-flag.mir
M llvm/test/CodeGen/MIR/X86/inline-asm-registers.mir
M llvm/test/CodeGen/MIR/X86/inline-asm-rm-exhaustion.mir
M llvm/test/CodeGen/MIR/X86/inline-asm.mir
M llvm/test/CodeGen/Mips/longbranch/branch-limits-fp-micromips.mir
M llvm/test/CodeGen/Mips/longbranch/branch-limits-fp-micromipsr6.mir
M llvm/test/CodeGen/Mips/longbranch/branch-limits-fp-mips.mir
M llvm/test/CodeGen/Mips/longbranch/branch-limits-fp-mipsr6.mir
M llvm/test/CodeGen/Mips/longbranch/branch-limits-int-microMIPS.mir
M llvm/test/CodeGen/Mips/longbranch/branch-limits-int-micromipsr6.mir
M llvm/test/CodeGen/Mips/longbranch/branch-limits-int-mips64.mir
M llvm/test/CodeGen/Mips/longbranch/branch-limits-int-mips64r6.mir
M llvm/test/CodeGen/Mips/longbranch/branch-limits-int-mipsr6.mir
M llvm/test/CodeGen/Mips/longbranch/branch-limits-int.mir
M llvm/test/CodeGen/Mips/longbranch/branch-limits-msa.mir
M llvm/test/CodeGen/PowerPC/aix-lower-jump-table-mir.ll
M llvm/test/CodeGen/PowerPC/aix-print-pc.mir
M llvm/test/CodeGen/PowerPC/alignlongjumptest.mir
M llvm/test/CodeGen/PowerPC/callbr-asm-outputs-indirect-isel.ll
M llvm/test/CodeGen/PowerPC/ctrloops32.mir
M llvm/test/CodeGen/PowerPC/ctrloops64.mir
M llvm/test/CodeGen/PowerPC/shrink-wrap.mir
M llvm/test/CodeGen/RISCV/branch-rel.mir
M llvm/test/CodeGen/RISCV/rvv/pr99782.ll
M llvm/test/CodeGen/RISCV/rvv/vsetvli-insert.mir
M llvm/test/CodeGen/RISCV/zdinx-spill.ll
M llvm/test/CodeGen/RISCV/zilsd-spill.ll
M llvm/test/CodeGen/SystemZ/twoaddr-kill.mir
M llvm/test/CodeGen/Thumb/high-reg-clobber.mir
M llvm/test/CodeGen/Thumb2/LowOverheadLoops/out-of-range-cbz.mir
M llvm/test/CodeGen/Thumb2/high-reg-spill.mir
M llvm/test/CodeGen/Thumb2/pipeliner-inlineasm.mir
M llvm/test/CodeGen/X86/apx/flags-copy-lowering.mir
M llvm/test/CodeGen/X86/callbr-asm-different-indirect-target.mir
M llvm/test/CodeGen/X86/callbr-asm-kill.mir
M llvm/test/CodeGen/X86/callbr-asm-outputs-indirect-isel-m32.ll
M llvm/test/CodeGen/X86/callbr-asm-outputs-indirect-isel.ll
M llvm/test/CodeGen/X86/callbr-asm-outputs-regallocfast.mir
M llvm/test/CodeGen/X86/cfi-xmm.ll
M llvm/test/CodeGen/X86/early-clobber.mir
M llvm/test/CodeGen/X86/flags-copy-lowering.mir
M llvm/test/CodeGen/X86/fp16-reload.mir
M llvm/test/CodeGen/X86/inline-asm-avx512f-x-constraint.ll
M llvm/test/CodeGen/X86/inline-asm-default-clobbers.ll
M llvm/test/CodeGen/X86/peephole-copy.mir
M llvm/test/CodeGen/X86/pr86880.mir
M llvm/test/CodeGen/X86/regallocfast-callbr-asm-spills-after-reload.mir
M llvm/test/CodeGen/X86/scheduler-asm-moves.mir
M llvm/test/CodeGen/X86/stack-folding-bmi2.mir
M llvm/test/CodeGen/X86/stack-folding-fp-nofpexcept.mir
M llvm/test/CodeGen/X86/statepoint-invoke-ra-enter-at-end.mir
M llvm/test/CodeGen/X86/switch-jmp-edge-split.mir
M llvm/test/CodeGen/X86/tail-dup-asm-goto.ll
Log Message:
-----------
[AMDGPU][NFC] Update MIR tests to use symbolic INLINEASM operands (#186839)
Commit: c872a64173f75e0285b44ffb27fd771ea3383f20
https://github.com/llvm/llvm-project/commit/c872a64173f75e0285b44ffb27fd771ea3383f20
Author: StefanPaulet <65234821+StefanPaulet at users.noreply.github.com>
Date: 2026-04-17 (Fri, 17 Apr 2026)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/lib/Sema/SemaDeclCXX.cpp
M clang/test/CXX/drs/cwg17xx.cpp
M clang/test/SemaCXX/cxx1z-constexpr-lambdas.cpp
M clang/test/SemaCXX/lambda-expressions.cpp
M clang/test/SemaTemplate/GH75426.cpp
M clang/test/SemaTemplate/concepts.cpp
M clang/www/cxx_dr_status.html
Log Message:
-----------
[clang] Add diagnostic for friend declaration of closure type member (#191419)
Clang allows friend declarations of closure type members, which is
disallowed per CWG 1780 (Issue #26540).
Added a new diagnostic when the friend declaration targets a member of a
`CXXRecordDecl` that is a lambda.
---------
Co-authored-by: Corentin Jabot <corentinjabot at gmail.com>
Commit: 873a2597118c473fd0038d6b9270503b79dbce69
https://github.com/llvm/llvm-project/commit/873a2597118c473fd0038d6b9270503b79dbce69
Author: idubinov <idubinov at amd.com>
Date: 2026-04-17 (Fri, 17 Apr 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVPreLegalizer.cpp
M llvm/test/CodeGen/SPIRV/trunc-nonstd-bitwidth.ll
Log Message:
-----------
[SPIRV] Fix trunc nonstandard int types (#191393)
In some cases, the trunc dst type was widened to higher bit size, which
changes behavior of the instruction.
Now, in case of need of widening, the trunc instruction is replaced with
AND with appropriate mask.
Assisted-by: Claude Code.
---------
Co-authored-by: Marcos Maronas <mmaronas at amd.com>
Co-authored-by: Arseniy Obolenskiy <gooddoog at student.su>
Commit: fa7d199f3eb3655b2bbc76ffa5f35cf74d3a53a5
https://github.com/llvm/llvm-project/commit/fa7d199f3eb3655b2bbc76ffa5f35cf74d3a53a5
Author: Benjamin Kramer <benny.kra at googlemail.com>
Date: 2026-04-17 (Fri, 17 Apr 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[bazel] Port d00a49fc3495f260d8b3125b5d9f4e263ac13166 (#192637)
Commit: 027ca61e5cc040c4db1d6219a9843b81432d5ea6
https://github.com/llvm/llvm-project/commit/027ca61e5cc040c4db1d6219a9843b81432d5ea6
Author: Aaron Ballman <aaron at aaronballman.com>
Date: 2026-04-17 (Fri, 17 Apr 2026)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Lex/LiteralSupport.cpp
M clang/test/C/C2y/n3353.c
Log Message:
-----------
Suppress octal literal diagnostics from system macros (#192481)
We emit two kinds of diagnostics related to octal literals. One is a
compat/extension warning for use of 0o as the literal prefix and the
other is a deprecation warning for use of 0 as the literal prefix.
Clang now suppresses both of those diagnostics when the octal literal
comes from a macro expansion of a macro defined in a system header.
Those are not uses of the literal the user has any control over,
generally, so the diagnostics are not helpful in that case.
Fixes #192389
Commit: 15e523bb7ebe35a4e3bf114fb26efe324b9112da
https://github.com/llvm/llvm-project/commit/15e523bb7ebe35a4e3bf114fb26efe324b9112da
Author: Rolf Morel <rolfmorel at gmail.com>
Date: 2026-04-17 (Fri, 17 Apr 2026)
Changed paths:
M .github/CODEOWNERS
Log Message:
-----------
[MLIR][CODEOWNERS] Update CODEOWNERS to include MLIR Shard Dialect (#192642)
Add CODEOWNERS for MLIR Shard Dialect.
Commit: e270662c0b2c3a24211f200fe758a84b45b25fcd
https://github.com/llvm/llvm-project/commit/e270662c0b2c3a24211f200fe758a84b45b25fcd
Author: NagaChaitanya Vellanki <pnagato at protonmail.com>
Date: 2026-04-17 (Fri, 17 Apr 2026)
Changed paths:
M clang/docs/LanguageExtensions.rst
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/BuiltinHeaders.def
M clang/include/clang/Basic/Builtins.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
M clang/lib/AST/ExprConstant.cpp
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/CodeGen/CodeGenFunction.h
M clang/lib/Sema/SemaChecking.cpp
A clang/test/CodeGen/Inputs/stdbit.h
A clang/test/CodeGen/builtin-stdc-bit-functions.c
A clang/test/Sema/Inputs/stdbit.h
A clang/test/Sema/builtin-stdc-bit-functions.c
A clang/test/SemaCXX/constexpr-builtin-stdc-bit-functions.cpp
Log Message:
-----------
[clang]Implement the c23 stdc bit builtins (#185978)
This patch implements the following C23 bit builtins
__builtin_stdc_leading_zeros/ones
__builtin_stdc_trailing_zeros/ones
__builtin_stdc_first_leading/trailing_zero/one
__builtin_stdc_count_zeros/ones
__builtin_stdc_has_single_bit
__builtin_stdc_bit_width
__builtin_stdc_bit_floor
__builtin_stdc_bit_ceil
Additional Notes:
* Supports all unsigned integer types including _BitInt and __int128
* lowers to llvm.ctlz / llvm.cttz / llvm.ctpop intrinsics
* constexpr support
Addresses: #79630
Commit: ed19c7775f6eae5be5f238adc67114330b8daf61
https://github.com/llvm/llvm-project/commit/ed19c7775f6eae5be5f238adc67114330b8daf61
Author: Yoni Katzuv <yoni.katzuv at quantum-machines.co>
Date: 2026-04-17 (Fri, 17 Apr 2026)
Changed paths:
M mlir/include/mlir/Dialect/Async/IR/Async.h
M mlir/include/mlir/Dialect/Func/IR/FuncOps.h
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVOps.h
M mlir/include/mlir/IR/BuiltinOps.h
Log Message:
-----------
[mlir] Fix definition of type traits struct member for some ops (#192047)
This commit fixes all appearences of `numLowBitsAvailable` to the
correct `NumLowBitsAvailable`. Prior to this change, instantiation of
templates like `llvm::PointerIntPair<mlir::ModuleOp, 3>` would not
compile.
See usage of `NumLowBitsAvailable`:
https://github.com/llvm/llvm-project/blob/224c429e858f8171852990a6f7b2b3590eeaffb7/llvm/include/llvm/ADT/PointerIntPair.h#L169
Commit: e13c07bc57cbe13da73053d57387563fb79660c6
https://github.com/llvm/llvm-project/commit/e13c07bc57cbe13da73053d57387563fb79660c6
Author: Lucas Chollet <lucas.chollet at serenityos.org>
Date: 2026-04-17 (Fri, 17 Apr 2026)
Changed paths:
M clang/test/Driver/serenity.cpp
Log Message:
-----------
[clang] Reland NO_LIBCXX test in serenity.cpp (#192638)
The test was first introduced in 934f7950 and then removed in 9c94881f.
The first iteration was depending on the default runtime being
compiler-rt, which isn't true for all bots and thus caused failures:
https://lab.llvm.org/buildbot/#/builders/10/builds/26512
The new version of the test doesn't depend on the compiler runtime.
Commit: 7dddddc3185da662c70cac5ca14f60480b211ef0
https://github.com/llvm/llvm-project/commit/7dddddc3185da662c70cac5ca14f60480b211ef0
Author: Sairudra More <sairudra60 at gmail.com>
Date: 2026-04-17 (Fri, 17 Apr 2026)
Changed paths:
M flang-rt/lib/runtime/type-info.cpp
M flang-rt/unittests/Runtime/Descriptor.cpp
Log Message:
-----------
[flang-rt] Fix REAL(10)/COMPLEX(10) component sizes in runtime type info (#192049)
This fixes a crash caused by incorrect component sizes in runtime type
info.
For REAL(10) and COMPLEX(10) components,
`Component::GetElementByteSize()` was using the Fortran kind value as
the byte size. On x86-64 that underestimates the actual storage size, so
component size computation can be wrong for extended-precision types.
This patch routes REAL and COMPLEX component sizes through
`Descriptor::BytesFor()`, which matches the runtime’s existing
storage-size handling. I also added a runtime unit test covering the
relevant `Descriptor::BytesFor()` storage-size behavior for REAL and
COMPLEX kinds, including kind 10.
Fixes #192085
---------
Co-authored-by: Sairudra More <moresair at pe31.hpc.amslabs.hpecorp.net>
Commit: 4c7ed8dc849be29e6fb5ee869f4cc6024604b823
https://github.com/llvm/llvm-project/commit/4c7ed8dc849be29e6fb5ee869f4cc6024604b823
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-04-17 (Fri, 17 Apr 2026)
Changed paths:
M llvm/test/CodeGen/SPIRV/AtomicBuiltinsFloat.ll
M llvm/test/CodeGen/SPIRV/CheckCapKernelWithoutKernel.ll
M llvm/test/CodeGen/SPIRV/ExecutionMode_GLCompute.ll
M llvm/test/CodeGen/SPIRV/FOrdGreaterThanEqual_bool.ll
M llvm/test/CodeGen/SPIRV/FOrdGreaterThanEqual_int.ll
M llvm/test/CodeGen/SPIRV/OpVectorInsertDynamic.ll
M llvm/test/CodeGen/SPIRV/SpecConstants/bool-spirv-specconstant.ll
M llvm/test/CodeGen/SPIRV/TruncToBool.ll
M llvm/test/CodeGen/SPIRV/assume.ll
M llvm/test/CodeGen/SPIRV/basic_int_types_spirvdis.ll
M llvm/test/CodeGen/SPIRV/branching/OpSwitch32.ll
M llvm/test/CodeGen/SPIRV/branching/OpSwitchChar.ll
M llvm/test/CodeGen/SPIRV/branching/analyze-branch-opt.ll
M llvm/test/CodeGen/SPIRV/branching/if-merging.ll
M llvm/test/CodeGen/SPIRV/branching/if-non-merging.ll
M llvm/test/CodeGen/SPIRV/capability-Int64Atomics-store.ll
M llvm/test/CodeGen/SPIRV/capability-Int64Atomics.ll
M llvm/test/CodeGen/SPIRV/capability-Shader.ll
M llvm/test/CodeGen/SPIRV/capability-integers.ll
M llvm/test/CodeGen/SPIRV/constant/local-aggregate-constant.ll
M llvm/test/CodeGen/SPIRV/constant/local-arbitrary-width-integers-constants-type-promotion.ll
M llvm/test/CodeGen/SPIRV/constant/local-bool-constants.ll
M llvm/test/CodeGen/SPIRV/constant/local-float-point-constants.ll
M llvm/test/CodeGen/SPIRV/constant/local-integers-constants.ll
M llvm/test/CodeGen/SPIRV/constant/local-null-constants.ll
M llvm/test/CodeGen/SPIRV/constant/local-vector-matrix-constants.ll
M llvm/test/CodeGen/SPIRV/debug-info/no-nonsemantic-without-extension.ll
M llvm/test/CodeGen/SPIRV/event_no_group_cap.ll
M llvm/test/CodeGen/SPIRV/exec_mode_float_control_khr.ll
M llvm/test/CodeGen/SPIRV/expect.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_EXT_relaxed_printf_string_address_space/builtin_printf.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_EXT_relaxed_printf_string_address_space/non-constant-printf.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_EXT_shader_atomic_float_add/atomicrmw_faddfsub_double.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_EXT_shader_atomic_float_add/atomicrmw_faddfsub_half.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_EXT_shader_atomic_float_min_max/atomicrmw_fminfmax_double.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_EXT_shader_atomic_float_min_max/atomicrmw_fminfmax_float.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_EXT_shader_atomic_float_min_max/atomicrmw_fminfmax_half.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_16bit_atomics/atomic_bfloat16_load_store_xchg.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_16bit_atomics/atomic_int16_arithmetic.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_16bit_atomics/atomic_int16_load_store_xchg_cmpxchg.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_16bit_atomics/atomicrmw_faddfsub_bfloat16.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_16bit_atomics/atomicrmw_fminfmax_bfloat16.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_joint_matrix/cooperative_matrix_bf16.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_joint_matrix/cooperative_matrix_checked.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_joint_matrix/cooperative_matrix_get_coord.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_joint_matrix/cooperative_matrix_packed.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_joint_matrix/cooperative_matrix_prefetch.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_joint_matrix/cooperative_matrix_tf32.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_memory_access_aliasing/alias-barrier.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_memory_access_aliasing/alias-empty-md.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_memory_access_aliasing/alias-load-store-struct.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_memory_access_aliasing/alias-load-store.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_predicated_io/predicated_io_generic.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_subgroups/builtin-op-wrappers.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_KHR_no_integer_wrap_decoration.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_KHR_uniform_group_instructions/uniform-group-instructions.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_NV_shader_atomic_fp16_vector/atomicrmw_faddfsub_vec_float16.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_NV_shader_atomic_fp16_vector/atomicrmw_fminfmax_vec_float16.ll
M llvm/test/CodeGen/SPIRV/extensions/enable-all-extensions-but-one.ll
M llvm/test/CodeGen/SPIRV/extensions/enable-all-extensions.ll
M llvm/test/CodeGen/SPIRV/extensions/unused-but-allowed-SPV_INTEL_arbitrary_precision_integers.ll
M llvm/test/CodeGen/SPIRV/freeze.ll
M llvm/test/CodeGen/SPIRV/function/alloca-load-store.ll
M llvm/test/CodeGen/SPIRV/function/identity-function.ll
M llvm/test/CodeGen/SPIRV/function/multiple-anonymous-functions.ll
M llvm/test/CodeGen/SPIRV/function/trivial-function-definition.ll
M llvm/test/CodeGen/SPIRV/function/trivial-function-with-attributes.ll
M llvm/test/CodeGen/SPIRV/function/trivial-function-with-call.ll
M llvm/test/CodeGen/SPIRV/function/variadics-lowering-builtin-substr-in-name.ll
M llvm/test/CodeGen/SPIRV/function/variadics-lowering-namespace-printf.ll
M llvm/test/CodeGen/SPIRV/global-var-intrinsic.ll
M llvm/test/CodeGen/SPIRV/half_extension.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/rcp.ll
M llvm/test/CodeGen/SPIRV/hlsl-resources/cbuffer_unused.ll
M llvm/test/CodeGen/SPIRV/image-unoptimized.ll
M llvm/test/CodeGen/SPIRV/image.ll
M llvm/test/CodeGen/SPIRV/image_decl_func_arg.ll
M llvm/test/CodeGen/SPIRV/image_dim.ll
M llvm/test/CodeGen/SPIRV/instructions/call-complex-function.ll
M llvm/test/CodeGen/SPIRV/instructions/call-trivial-function.ll
M llvm/test/CodeGen/SPIRV/instructions/fcmp.ll
M llvm/test/CodeGen/SPIRV/instructions/float-casts.ll
M llvm/test/CodeGen/SPIRV/instructions/float-fast-flags.ll
M llvm/test/CodeGen/SPIRV/instructions/intrinsics.ll
M llvm/test/CodeGen/SPIRV/instructions/scalar-bitwise-operations.ll
M llvm/test/CodeGen/SPIRV/instructions/scalar-floating-point-arithmetic.ll
M llvm/test/CodeGen/SPIRV/instructions/undef-nested-composite-store.ll
M llvm/test/CodeGen/SPIRV/instructions/undef-simple-composite-store.ll
M llvm/test/CodeGen/SPIRV/instructions/unreachable.ll
M llvm/test/CodeGen/SPIRV/instructions/vector-bitwise-operations.ll
M llvm/test/CodeGen/SPIRV/instructions/vector-floating-point-arithmetic.ll
M llvm/test/CodeGen/SPIRV/instructions/vector-integer-arithmetic.ll
M llvm/test/CodeGen/SPIRV/linkage/LinkOnceODR.ll
M llvm/test/CodeGen/SPIRV/linkage/LinkOnceODRFun.ll
M llvm/test/CodeGen/SPIRV/linked-list.ll
M llvm/test/CodeGen/SPIRV/llc-pipeline.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/assume.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/bswap.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/ceil.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/ctlz.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/ctpop.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/cttz.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/debugtrap.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/expect.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/fabs.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/fshl.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/fshr.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/invariant.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/maxnum.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/memset.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/nearbyint.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/sqrt.ll
M llvm/test/CodeGen/SPIRV/logical-access-chain.ll
M llvm/test/CodeGen/SPIRV/mangled_function.ll
M llvm/test/CodeGen/SPIRV/multi_md.ll
M llvm/test/CodeGen/SPIRV/no_capability_shader.ll
M llvm/test/CodeGen/SPIRV/opaque_pointers.ll
M llvm/test/CodeGen/SPIRV/opencl/basic/get_global_offset.ll
M llvm/test/CodeGen/SPIRV/opencl/basic/progvar_prog_scope_init.ll
M llvm/test/CodeGen/SPIRV/opencl/basic/progvar_prog_scope_uninit.ll
M llvm/test/CodeGen/SPIRV/opencl/get_global_id.ll
M llvm/test/CodeGen/SPIRV/opencl/get_num_groups.ll
M llvm/test/CodeGen/SPIRV/opencl/metadata/fp_contractions_metadata.ll
M llvm/test/CodeGen/SPIRV/opencl/metadata/no_fp_contractions_metadata.ll
M llvm/test/CodeGen/SPIRV/opencl/metadata/opencl_version_metadata.ll
M llvm/test/CodeGen/SPIRV/opencl/vstore2.ll
M llvm/test/CodeGen/SPIRV/physical-layout/generator-magic-number.ll
M llvm/test/CodeGen/SPIRV/physical-layout/spirv-version.ll
M llvm/test/CodeGen/SPIRV/preprocess-metadata.ll
M llvm/test/CodeGen/SPIRV/pstruct.ll
M llvm/test/CodeGen/SPIRV/read_image.ll
M llvm/test/CodeGen/SPIRV/sitofp-with-bool.ll
M llvm/test/CodeGen/SPIRV/spec_const_decoration.ll
M llvm/test/CodeGen/SPIRV/spirv-tools-dis.ll
M llvm/test/CodeGen/SPIRV/spirv.Queue.ll
M llvm/test/CodeGen/SPIRV/spirv_param_decorations_quals.ll
M llvm/test/CodeGen/SPIRV/store.ll
M llvm/test/CodeGen/SPIRV/transcoding/DecorationMaxByteOffset.ll
M llvm/test/CodeGen/SPIRV/transcoding/GlobalFunAnnotate.ll
M llvm/test/CodeGen/SPIRV/transcoding/NoSignedUnsignedWrap.ll
M llvm/test/CodeGen/SPIRV/transcoding/OpConstantBool.ll
M llvm/test/CodeGen/SPIRV/transcoding/OpConstantSampler.ll
M llvm/test/CodeGen/SPIRV/transcoding/OpImageQuerySize.ll
M llvm/test/CodeGen/SPIRV/transcoding/OpImageReadMS.ll
M llvm/test/CodeGen/SPIRV/transcoding/OpImageSampleExplicitLod.ll
M llvm/test/CodeGen/SPIRV/transcoding/OpenCL/sub_group_mask.ll
M llvm/test/CodeGen/SPIRV/transcoding/RelationalOperators.ll
M llvm/test/CodeGen/SPIRV/transcoding/RelationalOperatorsFUnord.ll
M llvm/test/CodeGen/SPIRV/transcoding/ReqdSubgroupSize.ll
M llvm/test/CodeGen/SPIRV/transcoding/SpecConstantComposite.ll
M llvm/test/CodeGen/SPIRV/transcoding/TransFNeg.ll
M llvm/test/CodeGen/SPIRV/transcoding/image_get_size_with_access_qualifiers.ll
M llvm/test/CodeGen/SPIRV/transcoding/memory_access.ll
M llvm/test/CodeGen/SPIRV/transcoding/optional-core-features-multiple.ll
M llvm/test/CodeGen/SPIRV/transcoding/readonly.ll
M llvm/test/CodeGen/SPIRV/transcoding/sub_group_ballot.ll
M llvm/test/CodeGen/SPIRV/transcoding/sub_group_clustered_reduce.ll
M llvm/test/CodeGen/SPIRV/transcoding/sub_group_non_uniform_arithmetic.ll
M llvm/test/CodeGen/SPIRV/transcoding/sub_group_non_uniform_vote.ll
M llvm/test/CodeGen/SPIRV/transcoding/vec8.ll
M llvm/test/CodeGen/SPIRV/transcoding/vec_type_hint.ll
M llvm/test/CodeGen/SPIRV/uitofp-with-bool.ll
M llvm/test/CodeGen/SPIRV/vk-pushconstant-access.ll
M llvm/test/CodeGen/SPIRV/vk-pushconstant-layout-natural.ll
Log Message:
-----------
[NFC][SPIR-V] Enable testing using spirv-val in CodeGen tests (#192407)
Commit: 0b88e333b0fee5d78bbc66f62369230c1b29ff39
https://github.com/llvm/llvm-project/commit/0b88e333b0fee5d78bbc66f62369230c1b29ff39
Author: Paul Walker <paul.walker at arm.com>
Date: 2026-04-17 (Fri, 17 Apr 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
M llvm/test/Analysis/CostModel/AArch64/masked-divrem.ll
M llvm/test/CodeGen/AArch64/masked-sdiv-fixed-length.ll
M llvm/test/CodeGen/AArch64/masked-sdiv-scalable.ll
M llvm/test/CodeGen/AArch64/masked-udiv-fixed-length.ll
M llvm/test/CodeGen/AArch64/masked-udiv-scalable.ll
A llvm/test/CodeGen/AArch64/sve-fixed-length-masked-div.ll
A llvm/test/CodeGen/AArch64/sve-fixed-length-masked-rem.ll
Log Message:
-----------
[LLVM][CodeGen][SVE] Add custom lowering for ISD::MASKED_SDIV/UDIV. (#191164)
Also refactor custom lowering of ISD::SDIV/UDIV to replace uses of
Arch64ISD::PRED_SDIV/UDIV with the new target independent equivalents.
Commit: c74c4a8bf6f7663e1fc645e3bd43935791f33123
https://github.com/llvm/llvm-project/commit/c74c4a8bf6f7663e1fc645e3bd43935791f33123
Author: Michael Jones <michaelrj at google.com>
Date: 2026-04-17 (Fri, 17 Apr 2026)
Changed paths:
A libc/include/string.h.def
M libc/include/string.yaml
Log Message:
-----------
[libc] Fix missing strings symbols in string.h (#192640)
The glibc string.h includes strings.h if it's in the default mode. Added
to allow more programs to be built.
Commit: efd8a91ee1e10e10fa7eeab06abbee91c5c5232d
https://github.com/llvm/llvm-project/commit/efd8a91ee1e10e10fa7eeab06abbee91c5c5232d
Author: Luke Lau <luke at igalia.com>
Date: 2026-04-17 (Fri, 17 Apr 2026)
Changed paths:
A llvm/test/Transforms/LoopVectorize/find-last-iv-sinkable-expr-tail-folding.ll
M llvm/test/Transforms/LoopVectorize/find-last-iv-sinkable-expr.ll
Log Message:
-----------
[VPlan] Split sinkable FindLastIV tail folding tests into new test. NFC (#191195)
Follow up to
https://github.com/llvm/llvm-project/pull/191176#pullrequestreview-4082422318
Commit: 1ba89ddd9b2baa5e5a1fdd98dfccc07cbfc1c0c3
https://github.com/llvm/llvm-project/commit/1ba89ddd9b2baa5e5a1fdd98dfccc07cbfc1c0c3
Author: Fred Tingaud <95592999+frederic-tingaud-sonarsource at users.noreply.github.com>
Date: 2026-04-17 (Fri, 17 Apr 2026)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/AST/ExprCXX.h
M clang/include/clang/AST/Stmt.h
M clang/lib/AST/ExprCXX.cpp
M clang/lib/Sema/SemaOverload.cpp
M clang/lib/Serialization/ASTReaderStmt.cpp
M clang/lib/Serialization/ASTWriterDecl.cpp
M clang/lib/Serialization/ASTWriterStmt.cpp
A clang/test/AST/ast-dump-cxx20-reversed-operator.cpp
Log Message:
-----------
[AST]Fix Location and Range for reversed rewritten CXXOperatorCallExpr (#192467)
In C++20+, when `a != b` is automatically rewritten to `!(b == a)`, the
range and sourceLocation of the generated nodes are incorrect and the
range has begin > end.
Assisted-by: Claude code
Commit: ab799d32d54eba0fb7562a2ed331a63f6fb750ee
https://github.com/llvm/llvm-project/commit/ab799d32d54eba0fb7562a2ed331a63f6fb750ee
Author: forking-google-bazel-bot[bot] <265904573+forking-google-bazel-bot[bot]@users.noreply.github.com>
Date: 2026-04-17 (Fri, 17 Apr 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[Bazel] Fixes c74c4a8 (#192646)
This fixes c74c4a8bf6f7663e1fc645e3bd43935791f33123.
Co-authored-by: Google Bazel Bot <google-bazel-bot at google.com>
Commit: ea7e7527d104fb46789ba74eafe154bfa3c67fef
https://github.com/llvm/llvm-project/commit/ea7e7527d104fb46789ba74eafe154bfa3c67fef
Author: Weronika Lewandowska <weronika.lewandowska at intel.com>
Date: 2026-04-17 (Fri, 17 Apr 2026)
Changed paths:
M offload/tools/deviceinfo/llvm-offload-device-info.cpp
Log Message:
-----------
[offload] Add backend L0 to offload deviceinfo tool (#192622)
Commit: 9fa05b0377de8d9f573b9a7f026bd202ef9e897a
https://github.com/llvm/llvm-project/commit/9fa05b0377de8d9f573b9a7f026bd202ef9e897a
Author: lonely eagle <2020382038 at qq.com>
Date: 2026-04-17 (Fri, 17 Apr 2026)
Changed paths:
M mlir/lib/Dialect/MemRef/IR/MemRefOps.cpp
M mlir/test/Dialect/MemRef/invalid.mlir
M mlir/test/Dialect/MemRef/ops.mlir
Log Message:
-----------
[mlir][memref] Make memref.cast areCastCompatible return true when meet same types (#192029)
When both the source and destination types of `memref.cast` are
unranked, it causes an IR verification failure, which impacts downstream
projects and its behavior is inconsistent with the documentation. To
address this, this PR now allows the operation to return true if the
source and destination types are identical.
Commit: 705cdc3a9d0adb4c0667aa840a1f23165eca297b
https://github.com/llvm/llvm-project/commit/705cdc3a9d0adb4c0667aa840a1f23165eca297b
Author: LU-JOHN <John.Lu at amd.com>
Date: 2026-04-17 (Fri, 17 Apr 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_global_pointer.ll
M llvm/test/CodeGen/AMDGPU/v_swap_b16.ll
M llvm/test/CodeGen/AMDGPU/v_swap_b32.mir
M llvm/test/CodeGen/AMDGPU/whole-wave-functions.ll
Log Message:
-----------
Reland "[AMDGPU] Generate more swaps" #184164 (#192452)
After fixing analysis of implicit register operands when matching a swap
in https://github.com/llvm/llvm-project/pull/192220, reland #184164.
#184164 was reverted in
https://github.com/llvm/llvm-project/pull/187723.
---------
Signed-off-by: John Lu <John.Lu at amd.com>
Commit: e5bb8046685769be4f1ed685a583a8a615f8abc8
https://github.com/llvm/llvm-project/commit/e5bb8046685769be4f1ed685a583a8a615f8abc8
Author: Nico Weber <thakis at chromium.org>
Date: 2026-04-17 (Fri, 17 Apr 2026)
Changed paths:
M llvm/utils/gn/secondary/clang-tools-extra/clang-tidy/readability/BUILD.gn
Log Message:
-----------
[gn build] Port 96266b71214a (#192663)
Commit: 00177ef8c57987d4105b9f088a6f52ec6374adf8
https://github.com/llvm/llvm-project/commit/00177ef8c57987d4105b9f088a6f52ec6374adf8
Author: Nico Weber <thakis at chromium.org>
Date: 2026-04-17 (Fri, 17 Apr 2026)
Changed paths:
M clang/include/clang/Options/Options.td
M clang/test/Driver/cl-options.c
Log Message:
-----------
[clang] Exposse -fdiagnostics-print-source-range-info to clang-cl (#192500)
Commit: ed9da27de8789d5052b152e2b7f64d3ea354a23a
https://github.com/llvm/llvm-project/commit/ed9da27de8789d5052b152e2b7f64d3ea354a23a
Author: Oleksandr "Alex" Zinenko <git at ozinenko.com>
Date: 2026-04-17 (Fri, 17 Apr 2026)
Changed paths:
M mlir/include/mlir/Dialect/Transform/IR/TransformOps.td
M mlir/include/mlir/Dialect/Transform/Interfaces/TransformInterfaces.h
M mlir/include/mlir/Dialect/Transform/Interfaces/TransformInterfaces.td
M mlir/lib/Dialect/Transform/IR/TransformDialect.cpp
M mlir/lib/Dialect/Transform/IR/TransformOps.cpp
M mlir/lib/Dialect/Transform/IR/TransformTypes.cpp
M mlir/lib/Dialect/Transform/Interfaces/TransformInterfaces.cpp
M mlir/test/Dialect/Transform/normal-forms.mlir
M mlir/test/lib/Dialect/Transform/TestTransformDialectExtension.cpp
M mlir/test/lib/Dialect/Transform/TestTransformDialectExtension.td
Log Message:
-----------
[mlir] add normal form checked transform interface (#192647)
This interface can be implemented by operations that guarantee certain
normal forms for themselves and their regions. The operations provide
the list of normal forms they guarantee. This interface interacts with
the typed transform handles removing the need for them to check normal
forms that are guaranteed (and preserved by transforms).
Provide a simple `transform.payload` operation to carry a list of normal
forms and implement the interface.
This exposes the fact that the transform interpreter may be running the
verifier too much, but this is a pre-existing beavior that is orthogonal
to this patch.
Assisted-by: Claude Opus 4.7 / Cursor
Commit: 456bf22d5dfd0010c376190b4fca83d5d7cbb857
https://github.com/llvm/llvm-project/commit/456bf22d5dfd0010c376190b4fca83d5d7cbb857
Author: Lukacma <Marian.Lukac at arm.com>
Date: 2026-04-17 (Fri, 17 Apr 2026)
Changed paths:
M clang/include/clang/Basic/BuiltinsAArch64.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp
M clang/lib/CodeGen/TargetBuiltins/ARM.cpp
M clang/lib/Headers/arm_acle.h
M clang/lib/Sema/SemaARM.cpp
R clang/test/CodeGen/AArch64/pcdphint-atomic-store.c
M clang/test/CodeGen/arm_acle.c
M clang/test/CodeGen/builtins-arm64.c
R clang/test/Sema/AArch64/pcdphint-atomic-store.c
M llvm/include/llvm/IR/IntrinsicsAArch64.td
M llvm/lib/IR/Verifier.cpp
M llvm/lib/Target/AArch64/AArch64ExpandPseudoInsts.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
R llvm/test/CodeGen/AArch64/pcdphint-atomic-store.ll
M llvm/test/Verifier/AArch64/intrinsic-immarg.ll
Log Message:
-----------
Remove __arm_atomic_store_with_stshh from llvm (#192419)
This patch is revert of #181386 with some manual changes applied due to
revert conflicts.
Current implementation of __arm_atomic_store_with_stshh is incorrect as
it doesn't enforce the memory ordering constraints as can be seen
[here](https://godbolt.org/z/n5YnbaT8E). Different solution will need to
be implemented, but removing for now so users don't pick this up.
Commit: 0863312900d38ee124fa31c5842d3f3009ffd73f
https://github.com/llvm/llvm-project/commit/0863312900d38ee124fa31c5842d3f3009ffd73f
Author: Eugene Epshteyn <eepshteyn at nvidia.com>
Date: 2026-04-17 (Fri, 17 Apr 2026)
Changed paths:
M flang/test/Lower/logical-operations.f90
M flang/test/Lower/loops2.f90
M flang/test/Lower/loops3.f90
M flang/test/Lower/memory-alloc.f90
M flang/test/Lower/zero-size.f90
Log Message:
-----------
[flang][NFC] Converted five tests from old lowering to new lowering (part 46) (#192439)
Tests converted from test/Lower: logical-operations.f90, loops2.f90,
loops3.f90, memory-alloc.f90, zero-size.f90
Commit: 735b15239c493fce6a5033776470892f30d7e00e
https://github.com/llvm/llvm-project/commit/735b15239c493fce6a5033776470892f30d7e00e
Author: Jeff Bailey <jbailey at raspberryginger.com>
Date: 2026-04-17 (Fri, 17 Apr 2026)
Changed paths:
M libc/src/strings/strcasecmp.cpp
M libc/src/strings/strncasecmp.cpp
M libc/test/src/string/strcmp_test.cpp
M libc/test/src/strings/strcasecmp_test.cpp
M libc/test/src/strings/strncasecmp_test.cpp
Log Message:
-----------
[libc] Fix strcasecmp/strncasecmp signedness and add tests (#192632)
Fixed character signedness bug in strcasecmp and strncasecmp
implementations in src/strings/ where characters > 127 were not
correctly handled.
Added LIBC_CRASH_ON_NULLPTR checks to both functions.
Enhanced unit tests in test/src/strings/ to be comprehensive without
duplicating basic case insensitivity tests.
Updated assertions in strcasecmp_test, strncasecmp_test, and strcmp_test
to check for sign instead of exact value.
Commit: bf3cc1754024c08164d78e42bb55928d41953e95
https://github.com/llvm/llvm-project/commit/bf3cc1754024c08164d78e42bb55928d41953e95
Author: Luke Hutton <luke.hutton at arm.com>
Date: 2026-04-17 (Fri, 17 Apr 2026)
Changed paths:
M mlir/include/mlir/Dialect/Tosa/IR/TargetEnv.h
M mlir/lib/Dialect/Tosa/IR/TargetEnv.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaValidation.cpp
M mlir/test/Dialect/Tosa/tosa-validation-version-1p0-invalid.mlir
M mlir/test/Dialect/Tosa/tosa-validation-version-1p0-pro-fp-invalid.mlir
Log Message:
-----------
[mlir][tosa] Add `draft` information to specification version (#192122)
The draft flag can be used by useful to indicate that a specification
version is not yet finalized, and may be subject to change. This is
particularly important for serialized formats that offer guarantees
around backwards compatibility. By exposing `draft` information in the
specification version in the target environment, we can allow consumers
to query this information.
Commit: b077718c8911dea21efc4d21b2abbf2d85435640
https://github.com/llvm/llvm-project/commit/b077718c8911dea21efc4d21b2abbf2d85435640
Author: Brian Cain <brian.cain at oss.qualcomm.com>
Date: 2026-04-17 (Fri, 17 Apr 2026)
Changed paths:
M bolt/include/bolt/Core/MCPlus.h
M bolt/include/bolt/Core/MCPlusBuilder.h
Log Message:
-----------
[BOLT] Support non-null MCInst operands in annotation handling (#192188)
The annotation sentinel in BOLT is a null MCInst operand appended after
all prime operands. However, some architectures (e.g. Hexagon) use
non-null MCInst operands as legitimate prime operands for duplex
sub-instructions. The existing code treated any MCInst operand as the
annotation sentinel, causing duplex sub-instructions to be
misidentified.
In getNumPrimeOperands(), only treat a null MCInst operand as the
sentinel. In getAnnotationInstOp(), skip non-null MCInst operands when
searching for the annotation sentinel.
Commit: 03d3d6bf8acd67b6f194075846df54f2497b7b19
https://github.com/llvm/llvm-project/commit/03d3d6bf8acd67b6f194075846df54f2497b7b19
Author: forking-google-bazel-bot[bot] <265904573+forking-google-bazel-bot[bot]@users.noreply.github.com>
Date: 2026-04-17 (Fri, 17 Apr 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[Bazel] Fixes 735b152 (#192673)
This fixes 735b15239c493fce6a5033776470892f30d7e00e.
Co-authored-by: Google Bazel Bot <google-bazel-bot at google.com>
Commit: 0993b11a12e1eacd63ae8c84e0a5cff9e3f09ef6
https://github.com/llvm/llvm-project/commit/0993b11a12e1eacd63ae8c84e0a5cff9e3f09ef6
Author: Balázs Benics <benicsbalazs at gmail.com>
Date: 2026-04-17 (Fri, 17 Apr 2026)
Changed paths:
M clang/include/clang/AST/ASTContext.h
M clang/lib/AST/ASTContext.cpp
Log Message:
-----------
[clang] Clear ASTContext::TUDecl in 'cleanup' for easier debugging (#191697)
While the ASTContext has more things inside, I think we should at least
clear the TUDecl so that when traversing the (dangling) AST would
immediately step on the null-dereference instead of chasing dangling
pointers and crash later.
I was bitten by this in #191058.
This commit should be NFC - assuming that people didn't traverse already
dangling ASTs.
Commit: 56bb0a4fce3030b62ce842e5b06e8ecc5b816de1
https://github.com/llvm/llvm-project/commit/56bb0a4fce3030b62ce842e5b06e8ecc5b816de1
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-04-17 (Fri, 17 Apr 2026)
Changed paths:
M llvm/test/CodeGen/SPIRV/lit.local.cfg
Log Message:
-----------
[SPIR-V] Use ToolSubst for spirv-tools lit substitutions (#192462)
Bare-string substitutions match as substrings and the replacement path
contains the tool name, causing corrupted RUN lines
The issue is reproducible, for example, when path to llvm has tool name
substring at any point
Commit: ea2f50817fa32560f8fac227b58d6a2a9626df3b
https://github.com/llvm/llvm-project/commit/ea2f50817fa32560f8fac227b58d6a2a9626df3b
Author: Luke Hutton <luke.hutton at arm.com>
Date: 2026-04-17 (Fri, 17 Apr 2026)
Changed paths:
M mlir/test/Dialect/Tosa/tosa-validation-version-1p0-invalid.mlir
Log Message:
-----------
[mlir][tosa] Fix validation test (#192679)
Fixes a validation test after a merge race condition with
https://github.com/llvm/llvm-project/pull/192122 and
https://github.com/llvm/llvm-project/pull/192272.
Commit: b7e915c59354cf4e78a37363fab514ad21ebb29c
https://github.com/llvm/llvm-project/commit/b7e915c59354cf4e78a37363fab514ad21ebb29c
Author: Caroline Newcombe <caroline.newcombe at hpe.com>
Date: 2026-04-17 (Fri, 17 Apr 2026)
Changed paths:
M flang/lib/Lower/ConvertExprToHLFIR.cpp
M flang/test/Lower/HLFIR/conditional-expr.f90
Log Message:
-----------
[flang] Conditional expressions lowering: use fir.if SSA results for trivial scalar types (#192338)
For trivial scalar types (INTEGER, REAL, COMPLEX, LOGICAL, UNSIGNED),
generate `fir.if` with SSA results instead of allocating a temporary and
using `hlfir.assign`. This avoids the alloca/declare/assign/load pattern
for types that can be passed directly as SSA values.
Non-trivial scalar types (derived types, characters) continue to use the
existing temporary-based paths.
The LIT test expectations have been updated accordingly, and a test case
was added.
Commit: 7ce828298b4882c12f8218f37159b3df2be036f3
https://github.com/llvm/llvm-project/commit/7ce828298b4882c12f8218f37159b3df2be036f3
Author: v-zhangxiaomeng5 <v-zhangxiaomeng5 at xiaomi.com>
Date: 2026-04-17 (Fri, 17 Apr 2026)
Changed paths:
M libcxx/src/ios.cpp
Log Message:
-----------
[libc++] Fix realloc bug in ios.cpp (#177526)
When realloc fails in the function register_callback in `ios.cpp`, the
memory will be leaked, then `__fn_` is assigned as `nullptr`,
dereferencing `__fn_` causes UB. The fix is quite simple which aligns to
`iword & pword` for `realloc`, i.e. return directly if `realloc` fails.
Regarding testing for this bug fix, because `realloc` is a C function
that we can't replace, there is no way to exercise that path easily.
Commit: 49a7f37154df354167ed3420cbee00a305e0316f
https://github.com/llvm/llvm-project/commit/49a7f37154df354167ed3420cbee00a305e0316f
Author: Steven Wu <stevenwu at apple.com>
Date: 2026-04-17 (Fri, 17 Apr 2026)
Changed paths:
M llvm/lib/CAS/MappedFileRegionArena.cpp
A llvm/test/tools/llvm-cas/mapping-size-too-small.test
Log Message:
-----------
[CAS] Fix assertion failure when opening CAS with smaller mapping size (#192565)
When opening an existing large CAS using a smaller requested mapping
size, the file size can be smaller than capacity while holding only a
shared lock. Replace the assertion with a graceful lock upgrade to
exclusive before resizing the file.
Commit: a342f779af8ccaebeedaec7a59dc789a0c7e8db3
https://github.com/llvm/llvm-project/commit/a342f779af8ccaebeedaec7a59dc789a0c7e8db3
Author: Jeff Bailey <jbailey at raspberryginger.com>
Date: 2026-04-17 (Fri, 17 Apr 2026)
Changed paths:
M libc/include/llvm-libc-types/x86_64/mcontext_t.h
M libc/include/llvm-libc-types/x86_64/ucontext_t.h
Log Message:
-----------
[libc] Fix ucontext_t and mcontext_t for C compliance (#192648)
* x86_64/ucontext_t.h: Removed alignas to fix C compilation error.
* x86_64/mcontext_t.h: Updated include guard to prevent collision.
Commit: 69112990ebc6ade572b74c79e2535aa3bbf071fa
https://github.com/llvm/llvm-project/commit/69112990ebc6ade572b74c79e2535aa3bbf071fa
Author: Jeff Bailey <jbailey at raspberryginger.com>
Date: 2026-04-17 (Fri, 17 Apr 2026)
Changed paths:
M libc/include/limits.yaml
M libc/include/llvm-libc-macros/limits-macros.h
Log Message:
-----------
[libc] Various limits adds and fixes (#192672)
Implemented and corrected POSIX limits:
* Corrected _POSIX_NAME_MAX and _POSIX_PATH_MAX definitions.
* Added PATH_MAX for Linux.
* Added _POSIX_THREAD_DESTRUCTOR_ITERATIONS and
PTHREAD_DESTRUCTOR_ITERATIONS.
* Updated limits.yaml to include these macros.
Commit: fd647ca46564e60915d3108a3dd2f0eb0499a6c1
https://github.com/llvm/llvm-project/commit/fd647ca46564e60915d3108a3dd2f0eb0499a6c1
Author: Sander de Smalen <sander.desmalen at arm.com>
Date: 2026-04-17 (Fri, 17 Apr 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/test/CodeGen/AArch64/f16f32dot-fixed-length-fdot.ll
Log Message:
-----------
[AArch64] Fix codegen for FEAT_F16F32DOT with SVE2/SME. (#192668)
When compiling with +sve2/+sme, don't override to use Custom lowering
for PARTIAL_REDUCE_FMLA when it previously determined the operation was
legal due to +f16f32dot/+fp16fml.
Commit: d9b43e2e31b4f0b06e35f65e40c5aafdf67f3ae9
https://github.com/llvm/llvm-project/commit/d9b43e2e31b4f0b06e35f65e40c5aafdf67f3ae9
Author: Michael Jones <michaelrj at google.com>
Date: 2026-04-17 (Fri, 17 Apr 2026)
Changed paths:
M libc/src/__support/CMakeLists.txt
A libc/src/__support/wctype_impl.h
M libc/src/__support/wctype_utils.h
M libc/src/wctype/CMakeLists.txt
M libc/src/wctype/iswctype.cpp
M libc/src/wctype/wctype.cpp
Log Message:
-----------
[libc] Reorganize iswctype to avoid GPU/libc++ error (#192659)
After #191178 there were build errors when building the libc++
hand-in-hand pieces due to header layering.
Written with the assistance of Gemini
Commit: 6e94ad04a118cf7113463715900b772d77247bce
https://github.com/llvm/llvm-project/commit/6e94ad04a118cf7113463715900b772d77247bce
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2026-04-17 (Fri, 17 Apr 2026)
Changed paths:
M flang/lib/Evaluate/fold-implementation.h
M flang/test/Evaluate/rewrite01.f90
A flang/test/Evaluate/rewrite09.f90
M flang/test/Lower/HLFIR/array-ctor-as-elemental.f90
M flang/test/Lower/HLFIR/array-ctor-as-inlined-temp.f90
M flang/test/Lower/HLFIR/array-ctor-as-runtime-temp.f90
Log Message:
-----------
[flang] Fold x + 0, 0 + x and x - 0 for INTEGER and UNSIGNED (#192479)
This fixes https://github.com/llvm/llvm-project/issues/191928.
Commit: 2c9a1a74fb7b6c3297d16fa98a0b5432317067f7
https://github.com/llvm/llvm-project/commit/2c9a1a74fb7b6c3297d16fa98a0b5432317067f7
Author: Chris Apple <cja-private at pm.me>
Date: 2026-04-17 (Fri, 17 Apr 2026)
Changed paths:
M clang/lib/Driver/SanitizerArgs.cpp
M clang/test/Driver/fsanitize-realtime.c
Log Message:
-----------
[clang][rtsan] Disallow type and realtime sanitizer combo (#192681)
Both of these sanitizer runtimes define similar interceptors, so they
may not be used together
Commit: 8656768ceb131c67da789bf95558b7485ae540a3
https://github.com/llvm/llvm-project/commit/8656768ceb131c67da789bf95558b7485ae540a3
Author: quic-k <kushpal at qti.qualcomm.com>
Date: 2026-04-17 (Fri, 17 Apr 2026)
Changed paths:
M clang/test/Driver/hexagon-toolchain-picolibc.c
Log Message:
-----------
[Hexagon] Relax toolchain check to accept ld in driver test (#192596)
Fixes failures in
https://lab.llvm.org/buildbot/#/builders/145/builds/13829
https://lab.llvm.org/buildbot/#/builders/124/builds/2152
Signed-off-by: Kushal Pal <kushpal at qti.qualcomm.com>
Commit: fce4a1eab3801c250eb6a271d0248a7b6293fa19
https://github.com/llvm/llvm-project/commit/fce4a1eab3801c250eb6a271d0248a7b6293fa19
Author: Sirui Mu <msrlancern at gmail.com>
Date: 2026-04-18 (Sat, 18 Apr 2026)
Changed paths:
R clang/docs/CIR/ABILowering.md
A clang/docs/CIR/ABILowering.rst
R clang/docs/CIR/CleanupAndEHDesign.md
A clang/docs/CIR/CleanupAndEHDesign.rst
Log Message:
-----------
[CIR][docs] Migrate existing Markdown documents to reStructuredText format (#192066)
This patch migrates the existing ClangIR documents that are written in
Markdown format to reStructuredText format to align CIR's documents with
clang's documentation policy.
Closes #191850 .
Commit: 3183e576bb25defeabf8e000a05846d16fc73174
https://github.com/llvm/llvm-project/commit/3183e576bb25defeabf8e000a05846d16fc73174
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-04-17 (Fri, 17 Apr 2026)
Changed paths:
M llvm/test/CodeGen/X86/masked_gather_scatter.ll
Log Message:
-----------
[X86] masked_gather_scatter.ll - regenerate with VPADD asm comments (#192685)
Commit: 5de013ddcb0e93269541a9e209220414ab46d36a
https://github.com/llvm/llvm-project/commit/5de013ddcb0e93269541a9e209220414ab46d36a
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-04-17 (Fri, 17 Apr 2026)
Changed paths:
A llvm/test/CodeGen/X86/pr192034.ll
Log Message:
-----------
[X86] Add test coverage for #192034 (#192686)
Commit: b2ca7319ca38553d111b9519dfc7a4a2e2e3ac3b
https://github.com/llvm/llvm-project/commit/b2ca7319ca38553d111b9519dfc7a4a2e2e3ac3b
Author: artyo_Om <art.maklakov28 at gmail.com>
Date: 2026-04-17 (Fri, 17 Apr 2026)
Changed paths:
M llvm/lib/CodeGen/MachineBlockPlacement.cpp
A llvm/test/CodeGen/X86/block-placement-triangle-profile-likely-prob.mir
Log Message:
-----------
[CodeGen] Fix profiled triangular CFG threshold in MachineBlockPlacement (#188752)
Fix an assertion failure in MachineBlockPlacement for profiled
triangular CFGs with large -profile-likely-prob values.
The existing triangular-CFG threshold scaling can produce a
BranchProbability greater than 1. Capping to `BranchProbability(100,
100)` added.
Commit: ecb2d8173782f547efac8db304c0eb41f2b0d632
https://github.com/llvm/llvm-project/commit/ecb2d8173782f547efac8db304c0eb41f2b0d632
Author: Ayush Sahay <quic_asahay at quicinc.com>
Date: 2026-04-17 (Fri, 17 Apr 2026)
Changed paths:
M lldb/source/Plugins/Process/Windows/Common/NativeProcessWindows.cpp
Log Message:
-----------
[lldb][Windows] Read/Write PC after suspending thread (#191371)
Currently, we access the PC before suspending the thread in case of a
software breakpoint exception. However, we can't reliably read or write
the thread context while the thread is running. So, suspend the thread
first and then read or write the PC when handling a software breakpoint
exception.
Co-authored-by: Ayush Sahay <asahay at qti.qualcomm.com>
Commit: 25b0ab2d4f7a7a4b165b26d31dd563ef4dde4f17
https://github.com/llvm/llvm-project/commit/25b0ab2d4f7a7a4b165b26d31dd563ef4dde4f17
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2026-04-17 (Fri, 17 Apr 2026)
Changed paths:
M .ci/compute_projects.py
M .ci/compute_projects_test.py
M cross-project-tests/debuginfo-tests/dexter-tests/memvars/const-branch.c
Log Message:
-----------
[ci][llvm] Run cross-project-tests on llvm/ changes (#188522)
This patch ensures we run the `cross-project-tests` on `llvm/` PRs. At
the very least those tests depend on debug-info and
`llvm/ADT/`/`llvm/Support` (and the data-formatters that also live in
`llvm/`).
This would've helped catch
https://github.com/llvm/llvm-project/pull/188483 at pre-merge time.
Commit: d1f742532b9286196d0c60e9364a99095ba8cdd4
https://github.com/llvm/llvm-project/commit/d1f742532b9286196d0c60e9364a99095ba8cdd4
Author: jumerckx <31353884+jumerckx at users.noreply.github.com>
Date: 2026-04-17 (Fri, 17 Apr 2026)
Changed paths:
M mlir/lib/IR/OperationSupport.cpp
M mlir/test/IR/operation-equality.mlir
Log Message:
-----------
[mlir] Propagate `checkCommutativeEquivalent` into `isRegionEquivalentTo` (#192670)
The `checkCommutativeEquivalent` callback was not forwarded when
recursing into nested regions via `isRegionEquivalentTo`, causing silent
fallback to strict operand-order comparison for ops inside regions. Fix
by propagating the callback through the call site, and add a lit test
covering this case.
Commit: 4284bd02269d65ed7d5efc477ecf5b9fde8a5cef
https://github.com/llvm/llvm-project/commit/4284bd02269d65ed7d5efc477ecf5b9fde8a5cef
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-04-17 (Fri, 17 Apr 2026)
Changed paths:
M llvm/test/CodeGen/X86/avx-vperm2x128.ll
M llvm/test/CodeGen/X86/insertps-combine.ll
M llvm/test/CodeGen/X86/var-permute-128.ll
M llvm/test/CodeGen/X86/var-permute-256.ll
M llvm/test/CodeGen/X86/var-permute-512.ll
M llvm/test/CodeGen/X86/vector-shuffle-combining-avx2.ll
M llvm/test/CodeGen/X86/vector-shuffle-combining-xop.ll
M llvm/test/CodeGen/X86/vector-shuffle-combining.ll
Log Message:
-----------
[X86] Regenerate shuffle lowering tests with VPADD asm comments (#192690)
Reduces diffs in upcoming patches
Commit: f14644d085de8e835125b4260e3f3ceee8681f93
https://github.com/llvm/llvm-project/commit/f14644d085de8e835125b4260e3f3ceee8681f93
Author: Kevin Sala Penades <salapenades1 at llnl.gov>
Date: 2026-04-17 (Fri, 17 Apr 2026)
Changed paths:
M offload/include/Shared/APITypes.h
M offload/include/device.h
M offload/include/omptarget.h
M offload/liboffload/src/OffloadImpl.cpp
M offload/libomptarget/device.cpp
M offload/libomptarget/interface.cpp
M offload/libomptarget/omptarget.cpp
M offload/libomptarget/private.h
M offload/plugins-nextgen/common/include/PluginInterface.h
M offload/plugins-nextgen/common/include/RecordReplay.h
M offload/plugins-nextgen/common/src/PluginInterface.cpp
M offload/plugins-nextgen/common/src/RecordReplay.cpp
A offload/test/tools/omp-kernel-replay/record-replay-diff-teams-threads.cpp
A offload/test/tools/omp-kernel-replay/record-replay-diff-threads.cpp
M offload/tools/kernelreplay/llvm-omp-kernel-replay.cpp
Log Message:
-----------
[offload] Add mechanism to return info to kernel replay tool (#192611)
This commit adds a mechanism to return information about a kernel replay
to outer replay tool. This mechanism allows verifying the replay memory
output when using different launch configurations (e.g., different number
of teams or threads) than the one used for recording.
It also adds a new KernelExtraArgsTy structure that is only generated by
the offload/libomptarget runtime components (unlike KernelArgsTy). These
runtime arguments can be used by future extensions, including extensions
not related to kernel record replay.
Commit: a8c80fe41fde8c66434af91fd5a0f2d3b71b28be
https://github.com/llvm/llvm-project/commit/a8c80fe41fde8c66434af91fd5a0f2d3b71b28be
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2026-04-17 (Fri, 17 Apr 2026)
Changed paths:
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/check-omp-structure.h
Log Message:
-----------
[flang][OpenMP] Clean up check-omp-structure.h, NFC (#192695)
Group declarations to make it clear in which of the check-omp-*.cpp
files a given function is defined.
Delete declarations that don't have corresponding definitions.
Rename private member variable to follow naming convention.
Commit: fdff641f760d529c9484ecdd48b00d07d203f9a7
https://github.com/llvm/llvm-project/commit/fdff641f760d529c9484ecdd48b00d07d203f9a7
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-04-17 (Fri, 17 Apr 2026)
Changed paths:
M mlir/lib/Dialect/Vector/IR/VectorOps.cpp
Log Message:
-----------
[MLIR] Fix -Wunused-variable (#192698)
Inline the variable given the call does not have side effects and the
variable name does not add any clarity.
Commit: 001b1b60121e30a6b9066e54d9a35a7a341a0918
https://github.com/llvm/llvm-project/commit/001b1b60121e30a6b9066e54d9a35a7a341a0918
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-04-17 (Fri, 17 Apr 2026)
Changed paths:
M mlir/lib/Dialect/Vector/IR/VectorOps.cpp
Log Message:
-----------
[MLIR] Fix forward fdff641f760d529c9484ecdd48b00d07d203f9a7 (#192701)
ninja check-mlir somehow did not catch this...
Commit: 546cc690020e4e4317cd05ea833d5e6ff00ec161
https://github.com/llvm/llvm-project/commit/546cc690020e4e4317cd05ea833d5e6ff00ec161
Author: Dmitrii Kuragin <kuraginmail at gmail.com>
Date: 2026-04-17 (Fri, 17 Apr 2026)
Changed paths:
M clang-tools-extra/clang-tidy/cppcoreguidelines/InitVariablesCheck.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
A clang-tools-extra/test/clang-tidy/checkers/cppcoreguidelines/init-variables-objcxx.mm
Log Message:
-----------
[Clang-Tidy] Fixed `cppcoreguidelines-init-variables` to handle ObjC for-in loops. (#191306)
The check used to report false positive in case of for-in loop in
Objective-C[++]:
```
for (NSString *value in values) {
...
}
```
With the report message:
```
...: warning: variable 'value' is not initialized [cppcoreguidelines-init-variables]
for (NSString *value in values) {
^
= NULL
```
This PR exclude the for-in loop from the the matcher in order to avoid
the false-positive.
Fixes #62106
Commit: 2253d7575a52918b37012e20d2fa5d6758bc8017
https://github.com/llvm/llvm-project/commit/2253d7575a52918b37012e20d2fa5d6758bc8017
Author: Lei Huang <lei at ca.ibm.com>
Date: 2026-04-17 (Fri, 17 Apr 2026)
Changed paths:
M clang/include/clang/Basic/BuiltinsPPC.def
M clang/lib/Headers/altivec.h
A clang/test/CodeGen/PowerPC/builtins-post-quantum-crypto.c
A clang/test/Sema/PowerPC/builtins-post-quantum-crypto-error.c
M llvm/include/llvm/IR/IntrinsicsPowerPC.td
M llvm/lib/Target/PowerPC/PPCInstrFuture.td
A llvm/test/CodeGen/PowerPC/post-quantum-crypto.ll
Log Message:
-----------
[PowerPC] Add builtins for Post Quantum Cryptography Acceleration (#184717)
This patch implements Post Quantum Cryptography (PQC) Acceleration
builtins for PowerPC's future ISA by ensuring that vector operations
(vec_add, vec_sub, vec_mul, vec_mulh) correctly map to VSX instructions
(xvadduwm, xvadduhm, xvsubuwm, xvsubuhm, xvmuluwm, xvmuluhm, xvmulhsw,
xvmulhsh, xvmulhuw, xvmulhuh) when targeting mcpu=future.
Implement new builtin for vec_mulh:
* vector short vec_mulh(vector signed short, vector signed short)
* vector unsigned short vec_mulh(vector unsigned short, vector unsigned
short)
Assisted by AI.
Commit: e8c8cbb06a5285b19a009af15d05d3f9fd09bfee
https://github.com/llvm/llvm-project/commit/e8c8cbb06a5285b19a009af15d05d3f9fd09bfee
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2026-04-17 (Fri, 17 Apr 2026)
Changed paths:
M lldb/source/Core/Debugger.cpp
A lldb/test/API/functionalities/breakpoint/breakpoint_command_auto_continue/Makefile
A lldb/test/API/functionalities/breakpoint/breakpoint_command_auto_continue/TestBreakpointCommandAutoContinue.py
A lldb/test/API/functionalities/breakpoint/breakpoint_command_auto_continue/bpcmd.py
A lldb/test/API/functionalities/breakpoint/breakpoint_command_auto_continue/main.cpp
Log Message:
-----------
[lldb] Don't adopt in the ExecutionContext from auto-continue events (#191433)
When a breakpoint auto-continues, the event handler receives a "stopped
but restarted" event. During the transition where we step over the
breakpoint (before continuing), the public state hasn't yet been set to
running. This caused the `DefaultEventHandler` to call
`ExecutionContextRef` with `adopt_selected=true`, which would fetch
stale thread/frame state and needlessly (and incorrectly) interrupt the
target to compute the execution context (used by the statusline). This
PR fixes that by not doing that.
Fixes #190956
Co-authored-by: Jim Ingham <jingham at apple.com>
Commit: 0fd21b102286f3a920950d650cb50420b0f94fc3
https://github.com/llvm/llvm-project/commit/0fd21b102286f3a920950d650cb50420b0f94fc3
Author: Erich Keane <ekeane at nvidia.com>
Date: 2026-04-17 (Fri, 17 Apr 2026)
Changed paths:
M clang/lib/Sema/SemaOpenACC.cpp
M clang/test/SemaOpenACC/compute-construct-firstprivate-clause.cpp
M clang/test/SemaOpenACC/compute-construct-private-clause.cpp
M clang/test/SemaOpenACC/compute-construct-reduction-clause.cpp
Log Message:
-----------
[OpenACC] Require a complete type for vars-with-restrictions (#192680)
The bug report shows a case where an incomplete type was passed to a
var-list in a clause that has a restriction. Only the 'private',
'firstprivate', and 'reduction' clauses have such restrictions on what
they can reference, so only those will cause problems.
This patch adds a 'completeness' requirement for all 3 of those to make
sure we can properly enforce our restrictions.
Fixes: #192664
Commit: 50b859cca1ccf7d174ee61a8a130ae14220209e4
https://github.com/llvm/llvm-project/commit/50b859cca1ccf7d174ee61a8a130ae14220209e4
Author: Addmisol <addmisol9 at gmail.com>
Date: 2026-04-17 (Fri, 17 Apr 2026)
Changed paths:
M clang/lib/CodeGen/Targets/AMDGPU.cpp
A clang/test/CodeGen/amdgpu-abi-struct-coerce.c
M clang/test/CodeGen/amdgpu-variadic-call.c
M clang/test/CodeGenOpenCL/amdgpu-abi-struct-coerce.cl
M clang/test/Headers/amdgcn-openmp-device-math-complex.c
Log Message:
-----------
[AMDGPU] Stop coercing structs with FP and int fields to integer arrays (#185083)
Fixes #184150
This PR fixes the ABI lowering code for small aggregates (≤64 bits) on
AMDGPU targets to selectively coerce based on element types:
- Structs containing only sub-32-bit integers (char, short): Continue to
coerce to i16/i32/[2 x i32] for efficient register packing
- Structs containing floats or full-sized integers (i32, i64, float,
double): Preserve original types using ABIArgInfo::getDirect() without
coercion
Previously, ALL small aggregates were unconditionally coerced to integer
types. A struct like { float, int } would be lowered to [2 x i32],
losing the floating-point type information. This prevented attaching
FP-specific attributes like nofpclass to the float
component.
Changes
- clang/lib/CodeGen/Targets/AMDGPU.cpp: Added
containsOnlyPackableIntegerTypes() helper function that recursively
checks if an aggregate contains only sub-32-bit integer types. Updated
classifyReturnType and classifyArgumentType to use this helper - only
coercing
aggregates that contain exclusively small integers, while preserving
types for aggregates containing floats or full-sized integers.
- clang/test/CodeGenOpenCL/amdgpu-abi-struct-coerce.cl: Updated expected
output to reflect that char-only structs are still coerced (e.g.,
struct_char_x8 -> [2 x i32]) while preserving correct behavior.
- clang/test/CodeGen/amdgpu-abi-struct-coerce.c: Added test coverage for
various struct types including mixed float/int fields, demonstrating the
selective coercion behavior.
Before/After
// Struct with float - NOW preserves types
typedef struct { float f; int i; } fp_int_pair;
Before: define [2 x i32] @ foo([2 x i32] %x.coerce)
After: define %struct.fp_int_pair @ foo(float %x.coerce0, i32
%x.coerce1)
// Struct with only small integers - STILL coerced for efficiency
typedef struct { char a, b, c, d, e, f, g, h; } eight_chars;
Before: define [2 x i32] @ bar([2 x i32] %x.coerce)
After: define [2 x i32] @ bar([2 x i32] %x.coerce) // Unchanged
Test Plan
- Updated existing ABI tests in amdgpu-abi-struct-coerce.cl
- Added new test amdgpu-abi-struct-coerce.c for mixed FP/int structs
- Updated affected OpenMP complex math header tests
Commit: 38ab75da336d7c0f9c87bf4fab9ce858dfa8a208
https://github.com/llvm/llvm-project/commit/38ab75da336d7c0f9c87bf4fab9ce858dfa8a208
Author: Baranov Victor <bar.victor.2002 at gmail.com>
Date: 2026-04-17 (Fri, 17 Apr 2026)
Changed paths:
M llvm/utils/git/github-automation.py
Log Message:
-----------
[Github][CI] Add note about AI tools in good-first-issue text (#173109)
After https://github.com/llvm/llvm-project/pull/172515, we have a new
paragraph in LLVM policy about AI:
> The one exception we reserve is for GitHub issues labelled with the
“good first issue” label. These issues are selected by LLVM contributors
to help newcomers get familiar with the code base. Thus, it makes no
sense to fix them using AI tools. Using AI tools to fix issues labelled
as “good first issues” is forbidden.
We should add disclosure about it in the introduction note for
developers to see clearly.
---------
Co-authored-by: Reid Kleckner <rkleckner at nvidia.com>
Commit: 12771e9568972500a217481ab5c9960a596ba184
https://github.com/llvm/llvm-project/commit/12771e9568972500a217481ab5c9960a596ba184
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2026-04-17 (Fri, 17 Apr 2026)
Changed paths:
M lldb/test/API/lang/c/ptrauth/TestPtrAuth.py
M lldb/test/API/lang/c/ptrauth/main.c
Log Message:
-----------
[lldb] Convert TestPtrAuth.py from an inline to a regular test (NFC) (#192705)
This PR changes TestPtrAuth.py from an inline to a "regular" API test.
The motivation for this is #191416 and the need to specify parameters to
the build.
Commit: 1b62eaa2bf051a8207c86454ede3420e9f9d4886
https://github.com/llvm/llvm-project/commit/1b62eaa2bf051a8207c86454ede3420e9f9d4886
Author: khaki3 <47756807+khaki3 at users.noreply.github.com>
Date: 2026-04-17 (Fri, 17 Apr 2026)
Changed paths:
M flang/include/flang/Lower/OpenACC.h
M flang/lib/Lower/Bridge.cpp
M flang/lib/Lower/OpenACC.cpp
M flang/test/Lower/OpenACC/acc-loop-collapse-force-lowering.f90
A flang/test/Lower/OpenACC/acc-loop-collapse-force-non-tightly-nested.f90
M flang/test/Semantics/OpenACC/acc-collapse-force.f90
Log Message:
-----------
[flang][acc] Fix crash on collapse(force:N) with non-tightly nested loops (#191310)
When collapse(force:N) is applied to non-tightly nested loops, the
compiler could crash or generate redundant inner loops.
Crashes occurred because getNestedEvaluations() was called without
checking hasNestedEvaluations() first. Add guards in hasEarlyReturn(),
createRegionOp(), and the collapse-force sinking logic in Bridge.cpp.
Redundant inner loops were generated because processDoLoopBounds
absorbed N levels of do-loops into the outer acc.loop, but the PFT
walker still generated separate acc.loop ops for those same loops.
Fix by tracking absorbed DoConstruct* pointers in visitLoopControl
and skipping them in genFIR(DoConstruct).
Commit: d84356e74f5357a3a22317d4e766e244c28865b6
https://github.com/llvm/llvm-project/commit/d84356e74f5357a3a22317d4e766e244c28865b6
Author: vangthao95 <vang.thao at amd.com>
Date: 2026-04-17 (Fri, 17 Apr 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.add.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.and.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.fadd.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.fmax.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.fmin.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.fsub.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.max.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.min.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.or.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.sub.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.umax.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.umin.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.xor.ll
Log Message:
-----------
AMDGPU/GlobalISel: RegBankLegalize rules for wave_reduce intrinsics (#192377)
Commit: cd0b558c195bd4d13aa311f081722fea51459a47
https://github.com/llvm/llvm-project/commit/cd0b558c195bd4d13aa311f081722fea51459a47
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2026-04-17 (Fri, 17 Apr 2026)
Changed paths:
M flang/lib/Semantics/resolve-names.cpp
M flang/test/Lower/OpenACC/acc-host-data-cuda-device.f90
Log Message:
-----------
[flang][cuda][openacc] use the ultimate symbol to set the implicit device attribute (#192553)
The attribute was not applied when the symbol had a UseDetails. Use the
ultimate symbol so we get the proper ObjectEntityDetails to apply the
implicit attribute.
Commit: 2b8311ef3e6484679370d60b369aa189f48981b9
https://github.com/llvm/llvm-project/commit/2b8311ef3e6484679370d60b369aa189f48981b9
Author: khaki3 <47756807+khaki3 at users.noreply.github.com>
Date: 2026-04-17 (Fri, 17 Apr 2026)
Changed paths:
M flang/include/flang/Semantics/symbol.h
M flang/lib/Lower/CallInterface.cpp
M flang/lib/Semantics/resolve-directives.cpp
A flang/test/Lower/OpenACC/acc-routine-named-external.f90
Log Message:
-----------
[flang][OpenACC] Support acc routine info on ProcEntityDetails for separate compilation (#192367)
When !$acc routine(name) vector is used in a caller for an external
subroutine, the symbol has ProcEntityDetails (not SubprogramDetails).
The routine info (vector/worker/gang/seq) was silently lost because
AddRoutineInfoToSymbol only handled SubprogramDetails, and CallInterface
only checked SubprogramDetails for openACCRoutineInfos.
Add openACCRoutineInfos storage to ProcEntityDetails and handle it in
both AddRoutineInfoToSymbol and CallInterface so the parallelism level
is properly lowered to acc.routine with the correct keyword.
Commit: f6916bded9f5306057824c5be7c5a877baa1bdc3
https://github.com/llvm/llvm-project/commit/f6916bded9f5306057824c5be7c5a877baa1bdc3
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-04-17 (Fri, 17 Apr 2026)
Changed paths:
M llvm/test/Transforms/LoopVectorize/AArch64/outer_loop_prefer_scalable.ll
M llvm/test/Transforms/LoopVectorize/AArch64/outer_loop_test1_no_explicit_vect_width.ll
M llvm/test/Transforms/LoopVectorize/X86/outer_loop_test1_no_explicit_vect_width.ll
M llvm/test/Transforms/LoopVectorize/dbg-outer-loop-vect.ll
M llvm/test/Transforms/LoopVectorize/non-widenable-intrinsics-outer-loop.ll
M llvm/test/Transforms/LoopVectorize/outer-loop-inner-latch-successors.ll
M llvm/test/Transforms/LoopVectorize/outer-loop-vec-phi-predecessor-order.ll
M llvm/test/Transforms/LoopVectorize/outer-loop-wide-phis.ll
M llvm/test/Transforms/LoopVectorize/outer_loop_hcfg_construction.ll
M llvm/test/Transforms/LoopVectorize/outer_loop_scalable.ll
M llvm/test/Transforms/LoopVectorize/outer_loop_test1.ll
M llvm/test/Transforms/LoopVectorize/outer_loop_test2.ll
M llvm/test/Transforms/LoopVectorize/vplan-native-path-inner-loop-with-runtime-checks.ll
M llvm/test/Transforms/LoopVectorize/vplan-outer-loop-uncomputable-trip-count.ll
Log Message:
-----------
[LV] Modernize outer loop tests check lines (NFC) (#192689)
Re-generate check lines with latest UTC, adjust naming for consistency.
Commit: 55e8c5e0eaea9943c2039a8add9525ed90dad03a
https://github.com/llvm/llvm-project/commit/55e8c5e0eaea9943c2039a8add9525ed90dad03a
Author: adeshcom14 <aadikane at amd.com>
Date: 2026-04-17 (Fri, 17 Apr 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
M llvm/lib/Target/AMDGPU/SOPInstructions.td
M llvm/test/CodeGen/AMDGPU/async-buffer-loads.ll
M llvm/test/CodeGen/AMDGPU/asyncmark-gfx12plus.ll
M llvm/test/CodeGen/AMDGPU/asyncmark-pregfx12.ll
Log Message:
-----------
[AMDGPU] Mark ASYNCMARK as meta instruction to fix hazard cycle miscounting (#189981)
ASYNCMARK emits no hardware code it is used for tracking purpose but was
not marked as meta, causing getNumWaitStates to return 1 and
GCNHazardRecognizer to incorrectly count it as a pipeline cycle.
This patch marks ASYNCMARK as meta-Instruction so it correctly reports 0
wait states.
Fixes: #186878
Commit: 86397f49c7725f35a51517a8290cb4207c97771d
https://github.com/llvm/llvm-project/commit/86397f49c7725f35a51517a8290cb4207c97771d
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2026-04-17 (Fri, 17 Apr 2026)
Changed paths:
M lldb/packages/Python/lldbsuite/test/builders/builder.py
M lldb/packages/Python/lldbsuite/test/builders/darwin.py
M lldb/packages/Python/lldbsuite/test/configuration.py
M lldb/packages/Python/lldbsuite/test/dotest.py
M lldb/packages/Python/lldbsuite/test/dotest_args.py
M lldb/packages/Python/lldbsuite/test/lldbplatformutil.py
M lldb/packages/Python/lldbsuite/test/make/Makefile.rules
M lldb/test/API/commands/expression/ptrauth-auth-traps/Makefile
M lldb/test/API/commands/expression/ptrauth-auth-traps/TestPtrAuthAuthTraps.py
M lldb/test/API/commands/expression/ptrauth-objc/Makefile
M lldb/test/API/commands/expression/ptrauth-objc/TestPtrAuthObjectiveC.py
M lldb/test/API/commands/expression/ptrauth-vtable/Makefile
M lldb/test/API/commands/expression/ptrauth-vtable/TestPtrAuthVTableExpressions.py
M lldb/test/API/commands/expression/ptrauth/Makefile
M lldb/test/API/commands/expression/ptrauth/TestPtrAuthExpressions.py
M lldb/test/API/lang/c/ptrauth/Makefile
M lldb/test/API/lang/c/ptrauth/TestPtrAuth.py
Log Message:
-----------
[lldb] Rally around triple rather than arch in the API tests (#191416)
This PR removes as much uses of arch as possible, in favor of using
triple directly. Most of the changes are in the builder, which no longer
passes `ARCH` to Make, and of course in Makefile.rules.
This significantly simplifies the remote Darwin test suite, as it
previously had to try and piece together the triple from the platform
and the arch. As an added benefit, we now go through the same code path
for host and remote test runs.
I have tested this on Darwin and Linux and made the changes with the
remote test suites in mind, but it's possible I missed something not
caught by my local testing.
Commit: 1bf82626f7024cc66d46d07dfebd55d0acb44b29
https://github.com/llvm/llvm-project/commit/1bf82626f7024cc66d46d07dfebd55d0acb44b29
Author: Razvan Lupusoru <razvan.lupusoru at gmail.com>
Date: 2026-04-17 (Fri, 17 Apr 2026)
Changed paths:
M flang/lib/Lower/OpenACC.cpp
A flang/test/Lower/OpenACC/acc-declare-global-component-not-supported.f90
M flang/test/Lower/OpenACC/acc-declare.f90
Log Message:
-----------
[flang][acc] Accept component reference in non-global `acc declare` (#192563)
The current TODO was being issued for all cases of `acc declare`
including ones which are treated as a subroutine-scope lifetime. Since
the latter use normal data mapping clauses without the need for
ctors/dtors, accept them. However, still emit TODO for the cases where
component references are `acc declare`d in global context.
Commit: 809b4cfa2b15f1e5699ff00c842266e5362ccd32
https://github.com/llvm/llvm-project/commit/809b4cfa2b15f1e5699ff00c842266e5362ccd32
Author: Jonathan Thackray <jonathan.thackray at arm.com>
Date: 2026-04-17 (Fri, 17 Apr 2026)
Changed paths:
M llvm/utils/lit/lit/Test.py
M llvm/utils/lit/lit/TestTimes.py
M llvm/utils/lit/lit/discovery.py
A llvm/utils/lit/tests/Inputs/malformed-test-times/a.txt
A llvm/utils/lit/tests/Inputs/malformed-test-times/b.txt
A llvm/utils/lit/tests/Inputs/malformed-test-times/lit.cfg
A llvm/utils/lit/tests/Inputs/malformed-test-times/lit_test_times
A llvm/utils/lit/tests/malformed-test-times.py
Log Message:
-----------
[llvm-lit] Error on malformed `.lit_test_times` entries instead of stack trace (#191305)
When running `llvm-lit`, I sometimes hit a traceback, because a
`.lit_test_times.txt` file has got corrupted (not sure how).
However, it's non-obvious what the issue is (you just get a traceback),
so I've fixed this as follows:
`read_test_times()` currently assumes every line in
`.lit_test_times.txt`
contains a floating-point time followed by a test path. If the file
contains a blank line, a line without a path, or a non-numeric time,
`llvm-lit` will now error with: `fatal: found malformed timing data in`
+ filename.
Add test coverage for this too.
Commit: faf63e97020c589eea64ddfcc64e0fbc1a40d8c4
https://github.com/llvm/llvm-project/commit/faf63e97020c589eea64ddfcc64e0fbc1a40d8c4
Author: Kelvin Li <kli at ca.ibm.com>
Date: 2026-04-17 (Fri, 17 Apr 2026)
Changed paths:
M flang/test/Lower/PowerPC/ppc-intrinsics.f90
M flang/test/Lower/PowerPC/ppc-mma-accumulator-move-clear.f90
M flang/test/Lower/PowerPC/ppc-mma-assemble-disassemble.f90
M flang/test/Lower/PowerPC/ppc-mma-outer-product-1.f90
M flang/test/Lower/PowerPC/ppc-mma-outer-product-2.f90
M flang/test/Lower/PowerPC/ppc-pwr10-vec-intrinsics.f90
M flang/test/Lower/PowerPC/ppc-vec-abs.f90
M flang/test/Lower/PowerPC/ppc-vec-add-and-mul-sub-xor.f90
M flang/test/Lower/PowerPC/ppc-vec-any.f90
M flang/test/Lower/PowerPC/ppc-vec-cmp.f90
M flang/test/Lower/PowerPC/ppc-vec-cvf-elem-order.f90
M flang/test/Lower/PowerPC/ppc-vec-max-min-madd-nmsub.f90
M flang/test/Lower/PowerPC/ppc-vec-merge-elem-order.f90
M flang/test/Lower/PowerPC/ppc-vec-merge.f90
M flang/test/Lower/PowerPC/ppc-vec-perm-elem-order.f90
M flang/test/Lower/PowerPC/ppc-vec-perm.f90
M flang/test/Lower/PowerPC/ppc-vec-sel.f90
M flang/test/Lower/PowerPC/ppc-vec-shift-be-le.f90
M flang/test/Lower/PowerPC/ppc-vec-shift.f90
M flang/test/Lower/PowerPC/ppc-vec-splat-elem-order.f90
M flang/test/Lower/PowerPC/ppc-vector-types.f90
Log Message:
-----------
[flang][PPC] Remove -flang-experimental-hlfir flag in ppc vector tests (NFC) (#192715)
Commit: 3b45641a3d9b40c1c7210e4cf66a473a9f720d44
https://github.com/llvm/llvm-project/commit/3b45641a3d9b40c1c7210e4cf66a473a9f720d44
Author: Anshul Nigham <nigham at google.com>
Date: 2026-04-17 (Fri, 17 Apr 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64.h
M llvm/lib/Target/AArch64/AArch64PassRegistry.def
M llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
M llvm/lib/Target/AArch64/GISel/AArch64PostLegalizerLowering.cpp
M llvm/test/CodeGen/AArch64/GlobalISel/lower-neon-vector-fcmp.mir
M llvm/test/CodeGen/AArch64/GlobalISel/postlegalizer-lowering-rev.mir
M llvm/test/CodeGen/AArch64/GlobalISel/postlegalizer-lowering-shuf-to-ins.mir
M llvm/test/CodeGen/AArch64/GlobalISel/postlegalizer-lowering-uzp.mir
M llvm/test/CodeGen/AArch64/GlobalISel/postlegalizer-lowering-zip.mir
Log Message:
-----------
[NewPM] Adds a port for AArch64PostLegalizerLowering (#190718)
Standard porting (extraction into a helper function shared across legacy
and new PM passes).
Dropped unused include `TargetPassConfig.h`
Commit: 37a8c718182a1dc25e46ae2295f172abb3791d78
https://github.com/llvm/llvm-project/commit/37a8c718182a1dc25e46ae2295f172abb3791d78
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2026-04-17 (Fri, 17 Apr 2026)
Changed paths:
M lldb/source/Commands/CommandObjectDWIMPrint.cpp
M lldb/source/Commands/CommandObjectDisassemble.cpp
M lldb/source/Commands/CommandObjectSource.cpp
M lldb/source/Commands/CommandObjectThread.cpp
M lldb/source/Interpreter/CommandInterpreter.cpp
M lldb/source/Interpreter/CommandReturnObject.cpp
M lldb/source/Target/Thread.cpp
M lldb/test/Shell/Commands/command-disassemble-process.yaml
M lldb/test/Shell/Commands/command-disassemble.s
M lldb/test/Shell/Commands/command-list-reach-beginning-of-file.test
M lldb/test/Shell/Commands/command-list-reach-end-of-file.test
M lldb/test/Shell/Driver/LocalLLDBInit.test
Log Message:
-----------
[lldb] Assert lack of trailing period or newlines in diagnostics (#191447)
This PR adds an assert to `CommandReturnObject::{AppendNote,
AppendWarning}` to ensure the diagnostics don't end with a newline,
which is added by the function, or a period, which goes against the
coding standards.
I added a little helper that asserts in assert-enabled builds and trim
the diagnostic otherwise. I know that goes against the notion that
"asserts are preconditions" and therefore you shouldn't handle the case
where they don't hold (something I generally advocate for) but I think
we should prioritize a consistent user experience over purity.
We should do the same thing for `AppendError`, but currently there are
still too many violations that need to be cleaned up and if the compiler
emits non-compliant diagnostics, we may not be able to do this at all.
Commit: 6c3d84cbdf987e3f2eb113fb4e9212c56b54c6b5
https://github.com/llvm/llvm-project/commit/6c3d84cbdf987e3f2eb113fb4e9212c56b54c6b5
Author: Arthur Eubanks <aeubanks at google.com>
Date: 2026-04-17 (Fri, 17 Apr 2026)
Changed paths:
M llvm/include/llvm/Transforms/Utils/ValueMapper.h
M llvm/lib/Linker/IRMover.cpp
M llvm/lib/Transforms/Utils/ValueMapper.cpp
A llvm/test/Transforms/FunctionImport/Inputs/inline-history.ll
A llvm/test/Transforms/FunctionImport/inline-history.ll
Log Message:
-----------
[ThinLTO] Drop !inline_history metadata when importing functions (#192564)
In #190876 we now have functions in ValueAsMetadata (!inline_history
metadata). This has caused undefined symbol linker errors in some
ThinLTO builds. The following is what's going on:
@f in module A is getting imported from module A to module B, and it has
a call with !inline_history pointing to @g in module A, so a declaration
for @g is also imported into module B. But @g gets internalized in
module A, causing the undefined symbol error at link time due to
memprof's ICP in module B creating a call to @g since we can ICP a call
to any declaration.
To avoid pulling in a function declaration that may be wrong, simply
drop !inline_history metadata when importing functions. They aren't
necessary for correctness, they only prevent inlining explosion in some
recursive edge cases. Worst case is we do another round of inlining
through mutually recursive functions and then stop again due to newly
added !inline_history metadata, which should be fine; the inlining
explosion typically happens because we keep inlining through mutually
recursive functions.
Commit: bf10fc870e0db55a81db1d0da768011370113101
https://github.com/llvm/llvm-project/commit/bf10fc870e0db55a81db1d0da768011370113101
Author: Keith Smiley <keithbsmiley at gmail.com>
Date: 2026-04-17 (Fri, 17 Apr 2026)
Changed paths:
M llvm/utils/lit/tests/filter-failed-delete.py
M llvm/utils/lit/tests/filter-failed-rerun.py
M llvm/utils/lit/tests/filter-failed.py
Log Message:
-----------
[lit] Fix tests when run via symlinks (#192530)
If the path to Inputs/filter-failed was a symlink, it would copy the
symlinks, and then edit the same files, leading to flaky failures if the
tests ran in parallel.
Commit: 8e424e318de2f7b51b0fea27915601c4a38cdb13
https://github.com/llvm/llvm-project/commit/8e424e318de2f7b51b0fea27915601c4a38cdb13
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-04-17 (Fri, 17 Apr 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
M llvm/test/CodeGen/RISCV/rv64p.ll
Log Message:
-----------
[RISCV] Support emitting plui.h for i32 constants on RV64. (#192534)
If the constant was originally i32, it will be sign or zero
extended to i64 during type legalization. If we can prove the
upper bits aren't used we can duplicate the lower bits to allow
RISCVMatInt to select plui.h.
Commit: 59a509aa80e57c420d06f364b02f0159f7f70775
https://github.com/llvm/llvm-project/commit/59a509aa80e57c420d06f364b02f0159f7f70775
Author: Zachary Yedidia <zyedidia at gmail.com>
Date: 2026-04-17 (Fri, 17 Apr 2026)
Changed paths:
M llvm/docs/LFI.rst
Log Message:
-----------
[LFI][Doc] Update documentation for planned features (#192128)
This PR updates the LFI documentation to be a little less
AArch64-specific in anticipation of x86-64 support. I've also updated
the planned names for the `no-lfi-stores`/`no-lfi-loads` features, and
updated the planned rewrite sequence for `x30` modifications to make it
more PAC-compatible for when we include support for that.
Commit: ee82ab9cf406a22ad801db4e906a1444209046d3
https://github.com/llvm/llvm-project/commit/ee82ab9cf406a22ad801db4e906a1444209046d3
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-04-17 (Fri, 17 Apr 2026)
Changed paths:
M llvm/lib/Passes/PassBuilderPipelines.cpp
M llvm/test/Other/new-pm-defaults.ll
M llvm/test/Other/new-pm-thinlto-postlink-defaults.ll
M llvm/test/Other/new-pm-thinlto-postlink-pgo-defaults.ll
M llvm/test/Other/new-pm-thinlto-postlink-samplepgo-defaults.ll
M llvm/test/Other/new-pm-thinlto-prelink-defaults.ll
M llvm/test/Other/new-pm-thinlto-prelink-pgo-defaults.ll
M llvm/test/Other/new-pm-thinlto-prelink-samplepgo-defaults.ll
Log Message:
-----------
[JTS][Passes] Enable JTS By Default (#190674)
Now that the compile-time issues have been fixed (#190092) and given
that was the last known blocker for enabling this pass, try enabling it
by default again.
Previous attempts at enablement are in
https://github.com/llvm/llvm-project/pull/82546 and
https://github.com/llvm/llvm-project/pull/83229 which were
reverted/never landed due to causing compile time explosions in
std::variant heavy code such as flang with old libstdc++ versions.
https://llvm-compile-time-tracker.com/compare.php?from=2aa4100fa710ed83c5acd7505c27b4498f727c8e&to=4d80149901a224a90505c3b30192dab20cca5358&stat=instructions:u
Compile time looks like it should just be noise.
Commit: dcc86448c37a95ed3195dd3631dde9c4a24fbbee
https://github.com/llvm/llvm-project/commit/dcc86448c37a95ed3195dd3631dde9c4a24fbbee
Author: Anshul Nigham <nigham at google.com>
Date: 2026-04-17 (Fri, 17 Apr 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64.h
M llvm/lib/Target/AArch64/AArch64PassRegistry.def
M llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
M llvm/lib/Target/AArch64/GISel/AArch64PostSelectOptimize.cpp
M llvm/test/CodeGen/AArch64/GlobalISel/postselectopt-constrain-new-regop.mir
M llvm/test/CodeGen/AArch64/GlobalISel/postselectopt-dead-cc-defs-in-fcmp.mir
M llvm/test/CodeGen/AArch64/GlobalISel/postselectopt-dead-cc-defs.mir
M llvm/test/CodeGen/AArch64/GlobalISel/postselectopt-xclass-copies.mir
Log Message:
-----------
[NewPM] Adds a port for AArch64PostSelectOptimize (#192599)
Standard porting with updated tests.
Note: Removed unused dep on TargetPassConfig for legacy pass.
Commit: a3292e8924528420989c23a8e79174f9b9cb3840
https://github.com/llvm/llvm-project/commit/a3292e8924528420989c23a8e79174f9b9cb3840
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2026-04-17 (Fri, 17 Apr 2026)
Changed paths:
A lldb/packages/Python/lldbsuite/test/make/mach_thread.h
M lldb/test/API/functionalities/thread/thread_exit/main.cpp
Log Message:
-----------
[lldb] Fix TestThreadExit.py flakiness (#190976)
When `pthread_join` returns, the target thread signals its internal
semaphore, but the underlying Mach thread hasn't been removed from the
task yet with `thread_terminate`.
The flakiness is the result of the debugger stopping the process halts
the dying thread mid-termination. There is no Mach API to distinguish a
dying thread from a live one: it appears as `TH_STATE_STOPPED`, like any
other suspended thread.
This PR adds a helper (`wait_for_thread_cleanup`) that polls
`task_threads` to ensure the Mach thread is actually gone before the
breakpoint. Since there might be other tests that are affected by this
race, I put it in a common location so it can be reused.
Commit: 0f4b9a7f2efaadd617994741bd2e61642ef2f96b
https://github.com/llvm/llvm-project/commit/0f4b9a7f2efaadd617994741bd2e61642ef2f96b
Author: Madhur Kumar <152476790+MadhurKumar004 at users.noreply.github.com>
Date: 2026-04-17 (Fri, 17 Apr 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/test/CodeGen/AArch64/pr86717.ll
M llvm/test/CodeGen/RISCV/pr84200.ll
A llvm/test/CodeGen/X86/sub-to-xor-masked.ll
Log Message:
-----------
[DAGCombiner] Fold `sub nuw C, x` -> `xor x, C` when C is a mask (#192692)
fixes : https://github.com/llvm/llvm-project/issues/86874
Alive proof: https://alive2.llvm.org/ce/z/YKCPCA
Commit: 184edc1b7d2816c1e43eb2d740ff3e7831e97eb6
https://github.com/llvm/llvm-project/commit/184edc1b7d2816c1e43eb2d740ff3e7831e97eb6
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-04-17 (Fri, 17 Apr 2026)
Changed paths:
M llvm/lib/Passes/PassBuilderPipelines.cpp
M llvm/test/Other/new-pm-defaults.ll
M llvm/test/Other/new-pm-thinlto-postlink-defaults.ll
M llvm/test/Other/new-pm-thinlto-postlink-pgo-defaults.ll
M llvm/test/Other/new-pm-thinlto-postlink-samplepgo-defaults.ll
M llvm/test/Other/new-pm-thinlto-prelink-defaults.ll
M llvm/test/Other/new-pm-thinlto-prelink-pgo-defaults.ll
M llvm/test/Other/new-pm-thinlto-prelink-samplepgo-defaults.ll
Log Message:
-----------
Revert "[JTS][Passes] Enable JTS By Default" (#192737)
Reverts llvm/llvm-project#190674
Causes an assertion failure when doing a multi-stage PGO build.
https://lab.llvm.org/buildbot/#/builders/113/builds/12349
Commit: 5b938b8c0366c387c2d03e7db7445dbb3b131f16
https://github.com/llvm/llvm-project/commit/5b938b8c0366c387c2d03e7db7445dbb3b131f16
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2026-04-17 (Fri, 17 Apr 2026)
Changed paths:
M clang/include/clang/CIR/MissingFeatures.h
M clang/lib/CIR/CodeGen/CIRGenItaniumCXXABI.cpp
M clang/test/CIR/CodeGen/rtti-member-pointer.cpp
M clang/test/CIR/CodeGen/rtti-qualfn.cpp
M clang/test/CIR/CodeGenCXX/vtable-linkage.cpp
Log Message:
-----------
[CIR] Fix typeinfo linkage and comdat (#192721)
We weren't properly setting the linkage on typeinfo objects, leading to
multiple definition linking error when typeinfo for a class was
referenced in multiple source files. We had the correct linkage
available in the buildTypeInfo function, but we weren't doing anything
with it. This also prevented us from hitting the diagnostic saying that
we should have set the comdat attribute for the typeinfo. This change
fixes both of those problems.
Commit: ce1631a322f9db1c5630b6db403c6bf29a9144a7
https://github.com/llvm/llvm-project/commit/ce1631a322f9db1c5630b6db403c6bf29a9144a7
Author: Min-Yih Hsu <min.hsu at sifive.com>
Date: 2026-04-17 (Fri, 17 Apr 2026)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
A llvm/test/Transforms/InstCombine/fold-vp-load.ll
Log Message:
-----------
[InstCombine] Fold bitcast into vp.load (#192173)
Similar to normal loads, we should be able to fold bitcast into
`vp.load` if (1) mask is all-ones (2) either the new vector type has a
larger known minimum length than that of the original vector, or you
need to make sure the original EVL can be exact divided by the
decreasing factor (of the known minimum length).
This patch adds such folding pattern, though it only support cases where
the new vector type has a larger known minimum length.
Commit: 8758917028fed2bdc713ecacfac696a621ca1638
https://github.com/llvm/llvm-project/commit/8758917028fed2bdc713ecacfac696a621ca1638
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2026-04-17 (Fri, 17 Apr 2026)
Changed paths:
M flang/include/flang/Optimizer/Transforms/Passes.td
M flang/lib/Optimizer/Transforms/CUDA/CUFDeviceGlobal.cpp
A flang/test/Fir/CUDA/cuda-device-global-preserve.f90
M flang/test/Fir/CUDA/cuda-device-global.f90
Log Message:
-----------
[flang][cuda] Add option to preserve global with no use for debug info (#192731)
Commit: bfdf30a8d0437ec8999ad03e00c6ceea6397c833
https://github.com/llvm/llvm-project/commit/bfdf30a8d0437ec8999ad03e00c6ceea6397c833
Author: nvptm <pmathew at nvidia.com>
Date: 2026-04-17 (Fri, 17 Apr 2026)
Changed paths:
M flang/include/flang/Optimizer/Support/InternalNames.h
M flang/lib/Optimizer/Support/InternalNames.cpp
Log Message:
-----------
[flang] NameUniquer helper for detecting module-scope data (#192733)
Add NameUniquer::isModuleScopeDataUniquedName to detect uniqued names
for module-scope data (variables, named constants, and common blocks),
excluding procedures and other prefixed symbols.
Commit: 913141e63916622ec63c8670584eb6f71403ff84
https://github.com/llvm/llvm-project/commit/913141e63916622ec63c8670584eb6f71403ff84
Author: Amara Emerson <amara at apple.com>
Date: 2026-04-17 (Fri, 17 Apr 2026)
Changed paths:
M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.h
M llvm/test/CodeGen/AArch64/arm64-zip.ll
M llvm/test/CodeGen/AArch64/dup.ll
M llvm/test/CodeGen/AArch64/vec-combine-compare-to-bitmask.ll
Log Message:
-----------
[AArch64][GlobalISel] Fix nonterminating legalization for <8 x s4> vectors. (#192747)
G_CONCAT_VECTORS with <16 x s4> sources hits the bitcast legalization
path, which round-trips through scalar types (e.g. s32) and regenerates
<8 x s4> vectors via G_UNMERGE_VALUES and G_BUILD_VECTOR. The
G_BUILD_VECTOR is then widened to <8 x s8> (via .minScalarOrElt(0, s8)),
producing G_ANYEXT/G_TRUNC artifact pairs. The artifact combiner folds
these pairs away, restoring the original <8 x s4> types, which feeds
back into G_CONCAT_VECTORS again.
This change:
* Adds .minScalarOrElt(1, s8) to the G_ICMP rules to ensure operand
vector elements are at least s8. This causes <16 x s4> operands to be
widened
to <16 x s8>, and the result type follows via minScalarEltSameAs.
* Add custom legalization for G_CONCAT_VECTORS when element size < 8.
The custom handler widens source operands via G_ANYEXT (e.g.
<8 x s4> -> <8 x s8>), concats the widened vectors (producing a
legal type like <16 x s8>), and truncs the result back to the
original type.
The code is bad but we can fix that later, some fallbacks are fixed with
this.
rdar://153760145
Commit: 12a9996192f66e7b3b5534b43e50b2e387214097
https://github.com/llvm/llvm-project/commit/12a9996192f66e7b3b5534b43e50b2e387214097
Author: serge-sans-paille <sguelton at mozilla.com>
Date: 2026-04-17 (Fri, 17 Apr 2026)
Changed paths:
M clang-tools-extra/clang-tidy/bugprone/UseAfterMoveCheck.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
A clang-tools-extra/test/clang-tidy/checkers/bugprone/use-after-move-derived-to-base.cpp
Log Message:
-----------
[clang-tidy] Prevent false-positive in presence of derived-to-base cast in bugprone.use-after-move (#189638)
The following scenario is quite common, but was reported as a
use-after-move:
```cpp
struct Base {
Base(Base&&);
};
struct C : Base {
int field;
C(C&& c) :
Base(std::move(c)), // << only moves through the base type
field(c.field) // << this is a valid use-after-move
{}
};
```
Fix this by checking field origin when the moved value is immediately
cast to base.
Commit: 24154a55d698a98e7b6d2aae1778b79f15ce5b09
https://github.com/llvm/llvm-project/commit/24154a55d698a98e7b6d2aae1778b79f15ce5b09
Author: PiJoules <leonardchan at google.com>
Date: 2026-04-17 (Fri, 17 Apr 2026)
Changed paths:
M clang/lib/CodeGen/BackendUtil.cpp
M lld/COFF/InputFiles.cpp
M lld/COFF/LTO.cpp
M lld/COFF/LTO.h
M lld/COFF/SymbolTable.cpp
M lld/ELF/Driver.cpp
M lld/ELF/LTO.cpp
M lld/ELF/LTO.h
R lld/test/COFF/lto-libcall-archive-bitcode.test
R lld/test/ELF/lto/libcall-archive-bitcode.test
R lld/test/wasm/lto/libcall-archive-bitcode.ll
M lld/wasm/LTO.cpp
M lld/wasm/LTO.h
M lld/wasm/SymbolTable.cpp
M llvm/docs/ReleaseNotes.md
M llvm/include/llvm/LTO/LTO.h
M llvm/include/llvm/LTO/LTOBackend.h
M llvm/lib/LTO/LTO.cpp
M llvm/lib/LTO/LTOBackend.cpp
M llvm/lib/LTO/LTOCodeGenerator.cpp
M llvm/lib/LTO/ThinLTOCodeGenerator.cpp
R llvm/test/LTO/Resolution/X86/libcall-external.ll
R llvm/test/LTO/Resolution/X86/libcall-in-thin-link.ll
R llvm/test/LTO/Resolution/X86/libcall-in-tu.ll
M llvm/tools/llvm-lto2/llvm-lto2.cpp
Log Message:
-----------
Revert "Reland "[LTO][LLD] Prevent invalid LTO libfunc transforms (#164916)"" (#192741)
Reverts llvm/llvm-project#190642
A bisect shows this as the change leading to the link failure at
https://g-issues.fuchsia.dev/issues/503377901
Commit: 699b6bd9cbe2897839fb4c38b310479b887ccd37
https://github.com/llvm/llvm-project/commit/699b6bd9cbe2897839fb4c38b310479b887ccd37
Author: Ryan Buchner <rbuchner at qti.qualcomm.com>
Date: 2026-04-17 (Fri, 17 Apr 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
M llvm/test/Analysis/CostModel/RISCV/arith-int.ll
Log Message:
-----------
[RISCV] Cost UDIV/UREM by a constant power of 2 as a SHL/AND in getArithmeticInstrCost() (#179570)
Similar to behavior in X86 and AArch64.
---------
Co-authored-by: Ryan Buchner <rbuchner at qti.qualcomm.com>
Co-authored-by: Luke Lau <luke_lau at icloud.com>
Commit: 5cda8d956cc72a8a3a5edaa41b545f790491695c
https://github.com/llvm/llvm-project/commit/5cda8d956cc72a8a3a5edaa41b545f790491695c
Author: Shilei Tian <i at tianshilei.me>
Date: 2026-04-17 (Fri, 17 Apr 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
A llvm/test/CodeGen/AMDGPU/lds-link-time-codegen-named-barrier.ll
A llvm/test/CodeGen/AMDGPU/lds-link-time-codegen.ll
Log Message:
-----------
[AMDGPU] Emit the relocation symbol for LDS and named barrier when object linking is enabled (#192380)
Commit: da663a1b9519bbe012e7684c39c5b26727444eb6
https://github.com/llvm/llvm-project/commit/da663a1b9519bbe012e7684c39c5b26727444eb6
Author: Syadus Sefat <42645939+mssefat at users.noreply.github.com>
Date: 2026-04-17 (Fri, 17 Apr 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeHelper.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.h
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.scalef32.sr.pk.ll
Log Message:
-----------
[AMDGPU][GlobalIsel] Add regbank support for cvt_scalef32_sr_pk_f6_f116/32 intrinsics (#192745)
This patch adds register bank legalization rules for
cvt_scalef32_sr_pk_f6_f116/32 intrinsics in the AMDGPU GlobalISel
pipeline.
Commit: 695e1baf61c533056e6cc6eff707a681f804db42
https://github.com/llvm/llvm-project/commit/695e1baf61c533056e6cc6eff707a681f804db42
Author: vangthao95 <vang.thao at amd.com>
Date: 2026-04-17 (Fri, 17 Apr 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.global.store.async.from.lds.ll
Log Message:
-----------
AMDGPU/GlobalISel: RegBankLegalize rules for async LDS stores (#192717)
Commit: 058398c4ceaf880b82a8a85a087f362fd8b48d75
https://github.com/llvm/llvm-project/commit/058398c4ceaf880b82a8a85a087f362fd8b48d75
Author: Chengjun <chengjunp at Nvidia.com>
Date: 2026-04-17 (Fri, 17 Apr 2026)
Changed paths:
M llvm/lib/Target/NVPTX/NVVMIntrRange.cpp
M llvm/test/CodeGen/NVPTX/intr-range.ll
A llvm/test/CodeGen/NVPTX/reqntid-const-fold.ll
Log Message:
-----------
[NVPTX] Constant fold blockDim when reqntid is specified (#191575)
Currently, NVPTX cannot fold the `ntid.x/y/z` intrinsic calls into const
values when `reqntid` is specified, which prevents the code from further
optimization.
Therefore, in this change, we extend the `NVVMIntrRange` pass to:
- Tighten `ntid.x/y/z` intrinsic calls to one value range, which can be
const folded in later InstCombine pass
- Tighten `tid.x/y/z` range attributes to use per-dimension reqntid
bounds
- When .reqntid exceeds hardware limits, garbage-in/garbage-out
Commit: 6886505f9cd56e2bfcc9ba7ff3c08be17bf221e6
https://github.com/llvm/llvm-project/commit/6886505f9cd56e2bfcc9ba7ff3c08be17bf221e6
Author: Kyungtak Woo <kevinwkt at google.com>
Date: 2026-04-17 (Fri, 17 Apr 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64.h
M llvm/lib/Target/AArch64/AArch64PassRegistry.def
M llvm/lib/Target/AArch64/AArch64RedundantCondBranchPass.cpp
M llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
M llvm/test/CodeGen/AArch64/cbz_wzr.mir
Log Message:
-----------
[NewPM] Port AArch64RedundantCondBranch to the new pass manager (#190897)
Adds a newPM pass for AArch64RedundantCondBranch
- Refactors base logic into an Impl class
- Renames old pass with the "Legacy" suffix
- Adds the new pass manager pass using refactored logic
- Updated existing .mir tests to also test with the New Pass Manager.
Context and motivation in
https://llvm.org/docs/NewPassManager.html#status-of-the-new-and-legacy-pass-managers
Commit: 63e032b0ad2ff0e74769020e769d9c795fa7dce7
https://github.com/llvm/llvm-project/commit/63e032b0ad2ff0e74769020e769d9c795fa7dce7
Author: Usama Hameed <u_hameed at apple.com>
Date: 2026-04-18 (Sat, 18 Apr 2026)
Changed paths:
M clang/test/CodeGen/ubsan-aggregate-null-align.c
Log Message:
-----------
[UBSan][test] Make aggregate alignment test precise for Darwin
Darwin adds an alignment check on dest, which was causing test failure.
rdar://120802910
Commit: b87f23a38ea0ece767a80d2ecc3685c36959ae88
https://github.com/llvm/llvm-project/commit/b87f23a38ea0ece767a80d2ecc3685c36959ae88
Author: Romain Paquet <rpqt at rpqt.fr>
Date: 2026-04-18 (Sat, 18 Apr 2026)
Changed paths:
M mlir/docs/Tutorials/MlirOpt.md
Log Message:
-----------
[mlir][docs] Rename fusion option name in MlirOpt tutorial (#184635)
Options have been renamed in #128405
Commit: 25df9f28c4abe2a803407c18b8cb43b530f48d4d
https://github.com/llvm/llvm-project/commit/25df9f28c4abe2a803407c18b8cb43b530f48d4d
Author: Longsheng Mou <longshengmou at gmail.com>
Date: 2026-04-18 (Sat, 18 Apr 2026)
Changed paths:
M mlir/lib/Dialect/Tensor/Transforms/FoldTensorSubsetOps.cpp
M mlir/test/Dialect/Tensor/fold-tensor-subset-ops.mlir
Log Message:
-----------
[mlir][tensor] Remove unit-stride restriction in InsertSliceOp folding (#192600)
This PR replaces manual offset/size resolution with `affine::mergeOffsetsSizesAndStrides`, simplifying the code and extending subview-of-subview folding to support non-unit strides.
Commit: 492f5d70b2b154bb3352c671437b3a8591afcfaa
https://github.com/llvm/llvm-project/commit/492f5d70b2b154bb3352c671437b3a8591afcfaa
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-04-18 (Sat, 18 Apr 2026)
Changed paths:
M llvm/test/CodeGen/RISCV/attributes.ll
Log Message:
-----------
[RISCV] Add missing RUN line for RV32P to attributes.ll. NFC (#192750)
Commit: 029abe67307acdd2191fc6b2171eefadc531583a
https://github.com/llvm/llvm-project/commit/029abe67307acdd2191fc6b2171eefadc531583a
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2026-04-17 (Fri, 17 Apr 2026)
Changed paths:
M lldb/include/lldb/Core/Debugger.h
M lldb/source/Commands/CommandObjectDWIMPrint.cpp
M lldb/source/Core/Debugger.cpp
M lldb/source/Interpreter/CommandInterpreter.cpp
M lldb/source/Interpreter/CommandObject.cpp
M lldb/source/Target/Target.cpp
M lldb/unittests/Core/DebuggerTest.cpp
Log Message:
-----------
[lldb] Store the dummy target in the selected execution context (#190496)
Store the dummy target in the selected execution context. There's no
reason for everybody to have to independently fall back to the dummy
target.
Commit: 43e798e4d831b5133e3cf6d30c6315e3e4a71078
https://github.com/llvm/llvm-project/commit/43e798e4d831b5133e3cf6d30c6315e3e4a71078
Author: Alexander Kornienko <alexfh at google.com>
Date: 2026-04-18 (Sat, 18 Apr 2026)
Changed paths:
M clang/lib/CodeGen/CodeGenModule.cpp
A clang/test/CodeGenCXX/bpf-debug-info-alias.cpp
Log Message:
-----------
[BPF] Handle aliases in CodeGenModule::EmitExternalDeclaration. Fixes #192365 (#192374)
Adds handling of global aliases in
CodeGenModule::EmitExternalDeclaration. This fixes a clang crash on some
real code, see llvm#192365.
Commit: ebbcd427522ea494ec2277275eb679c993f5f323
https://github.com/llvm/llvm-project/commit/ebbcd427522ea494ec2277275eb679c993f5f323
Author: Jason Molenda <jmolenda at apple.com>
Date: 2026-04-17 (Fri, 17 Apr 2026)
Changed paths:
M lldb/packages/Python/lldbsuite/test/builders/builder.py
M lldb/packages/Python/lldbsuite/test/builders/darwin.py
M lldb/packages/Python/lldbsuite/test/configuration.py
M lldb/packages/Python/lldbsuite/test/dotest.py
M lldb/packages/Python/lldbsuite/test/dotest_args.py
M lldb/packages/Python/lldbsuite/test/lldbplatformutil.py
M lldb/packages/Python/lldbsuite/test/make/Makefile.rules
M lldb/test/API/commands/expression/ptrauth-auth-traps/Makefile
M lldb/test/API/commands/expression/ptrauth-auth-traps/TestPtrAuthAuthTraps.py
M lldb/test/API/commands/expression/ptrauth-objc/Makefile
M lldb/test/API/commands/expression/ptrauth-objc/TestPtrAuthObjectiveC.py
M lldb/test/API/commands/expression/ptrauth-vtable/Makefile
M lldb/test/API/commands/expression/ptrauth-vtable/TestPtrAuthVTableExpressions.py
M lldb/test/API/commands/expression/ptrauth/Makefile
M lldb/test/API/commands/expression/ptrauth/TestPtrAuthExpressions.py
M lldb/test/API/lang/c/ptrauth/Makefile
M lldb/test/API/lang/c/ptrauth/TestPtrAuth.py
Log Message:
-----------
Revert "[lldb] Rally around triple rather than arch in the API tests (#191416)" (#192763)
Temoprarily reverting while we look at the TestMacCatalyst.py and
TestRosetta.py fails introduced by this PR, to unblock the CI.
This reverts commit 86397f49c7725f35a51517a8290cb4207c97771d.
Commit: 780a9593b908018abd409f928df9d411a11f69c8
https://github.com/llvm/llvm-project/commit/780a9593b908018abd409f928df9d411a11f69c8
Author: Dave Lee <davelee.com at gmail.com>
Date: 2026-04-17 (Fri, 17 Apr 2026)
Changed paths:
M lldb/include/lldb/ValueObject/DILParser.h
M lldb/source/Target/StackFrame.cpp
M lldb/source/ValueObject/DILParser.cpp
Log Message:
-----------
[lldb] Remove unused bool members of DILParser (NFC) (#192572)
These options are used by DIL's `Interpreter`, but are unused by the
Parser.
Commit: 499593c01dd5d6aa47207abe06a382c30157a5e3
https://github.com/llvm/llvm-project/commit/499593c01dd5d6aa47207abe06a382c30157a5e3
Author: hev <wangrui at loongson.cn>
Date: 2026-04-18 (Sat, 18 Apr 2026)
Changed paths:
M llvm/lib/Target/LoongArch/LoongArchISelDAGToDAG.cpp
M llvm/lib/Target/LoongArch/LoongArchISelDAGToDAG.h
M llvm/lib/Target/LoongArch/LoongArchLASXInstrInfo.td
M llvm/lib/Target/LoongArch/LoongArchLSXInstrInfo.td
M llvm/test/CodeGen/LoongArch/lasx/ctpop-ctlz.ll
M llvm/test/CodeGen/LoongArch/lasx/ir-instruction/and.ll
M llvm/test/CodeGen/LoongArch/lasx/ir-instruction/icmp.ll
M llvm/test/CodeGen/LoongArch/lasx/ir-instruction/nor.ll
M llvm/test/CodeGen/LoongArch/lasx/ir-instruction/or.ll
M llvm/test/CodeGen/LoongArch/lasx/ir-instruction/xor.ll
M llvm/test/CodeGen/LoongArch/lasx/xvmskcond.ll
M llvm/test/CodeGen/LoongArch/lsx/ctpop-ctlz.ll
M llvm/test/CodeGen/LoongArch/lsx/ir-instruction/and.ll
M llvm/test/CodeGen/LoongArch/lsx/ir-instruction/icmp.ll
M llvm/test/CodeGen/LoongArch/lsx/ir-instruction/nor.ll
M llvm/test/CodeGen/LoongArch/lsx/ir-instruction/or.ll
M llvm/test/CodeGen/LoongArch/lsx/ir-instruction/xor.ll
M llvm/test/CodeGen/LoongArch/pr177863.ll
Log Message:
-----------
[LoongArch] Select `V{AND,OR,XOR,NOR}I.B` for bitwise with byte splat immediates (#192217)
The `V{AND,OR,XOR,NOR}I.B` instructions operate on byte elements and
accept an 8-bit immediate. However, when the same byte splat constant is
used with wider vector element types (e.g. v8i16, v4i32, v2i64),
instruction selection currently falls back to materializing the constant
in a temporary register.
```
vrepli.b -1
vxor.v
```
even though the immediate form is available:
```
vxori.b 255
```
This happens because selectVSplatImm requires the splat bit width to
match the vector element size, preventing matching byte splat immediates
for non-i8 vector types.
Generalize selectVSplatImm to optionally accept an explicit element bit
width and introduce a new vsplat_i8_uimm8 pattern to detect byte splat
immediates independently of the vector element type. Use this pattern to
extend the V*I.B instruction patterns to wider vector element types.
This enables direct selection of byte-immediate bitwise instructions,
reduces instruction count, and avoids unnecessary temporary registers in
common mask operations.
Commit: 6bb3a3563025d55177e5416277c52cb1801ec2c1
https://github.com/llvm/llvm-project/commit/6bb3a3563025d55177e5416277c52cb1801ec2c1
Author: 🍌Shawn <m18824909883 at 163.com>
Date: 2026-04-18 (Sat, 18 Apr 2026)
Changed paths:
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/lib/Sema/SemaChecking.cpp
M clang/test/Sema/builtin-align.c
M clang/test/SemaCXX/builtin-align-cxx.cpp
Log Message:
-----------
[clang] Improve diagnostics for `__builtin_align` builtins with floating/member pointer operands (#192650)
Improve diagnostics for `__builtin_align_up`, `__builtin_align_down`,
and `__builtin_is_aligned` when the first operand has an invalid type.
Clang already emits `err_typecheck_expect_scalar_operand` for
unsupported operands, but the message is generic. This patch adds
follow-up notes to clarify three common invalid cases:
* floating point operands (“floating point types are not allowed here”)
* C++ member pointer operands (“member pointers are not allowed here”)
* plain-function-pointer ("function pointers are not allowed here")
Commit: 63ae74b78a11f6c61136dbc445652929389eb9ab
https://github.com/llvm/llvm-project/commit/63ae74b78a11f6c61136dbc445652929389eb9ab
Author: Vlad Serebrennikov <serebrennikov.vladislav at gmail.com>
Date: 2026-04-18 (Sat, 18 Apr 2026)
Changed paths:
M clang/test/CXX/drs/cwg2947.cpp
M clang/www/cxx_dr_status.html
Log Message:
-----------
[clang] Update C++ DR status page (#192768)
Now that Croydon motions are reflected in `cwg_index.html`.
Commit: 4b0dd87d3a29af0b35f6f40551abc49ad422f6f9
https://github.com/llvm/llvm-project/commit/4b0dd87d3a29af0b35f6f40551abc49ad422f6f9
Author: fineg74 <61437305+fineg74 at users.noreply.github.com>
Date: 2026-04-18 (Sat, 18 Apr 2026)
Changed paths:
M clang/lib/Headers/CMakeLists.txt
M clang/lib/Headers/__clang_spirv_libdevice_declares.h
A clang/lib/Headers/__clang_spirv_math.h
M clang/lib/Headers/openmp_wrappers/math.h
Log Message:
-----------
[OFFLOAD] Introduce OpenMP math wrappers for SPIRV backend (#192139)
This PR is a first step to introduce math OpenMP wrappers for SPIRV
backend.
As a first step only API that either mapped to existing SPIRV API or has
straightforward implementation is introduced.
Commit: 40333cde2bbd62936d67478eab15ed1fa55b0532
https://github.com/llvm/llvm-project/commit/40333cde2bbd62936d67478eab15ed1fa55b0532
Author: Shivam Gupta <shivam98.tkg at gmail.com>
Date: 2026-04-18 (Sat, 18 Apr 2026)
Changed paths:
M llvm/docs/CommandGuide/FileCheck.rst
M llvm/include/llvm/FileCheck/FileCheck.h
M llvm/lib/FileCheck/FileCheck.cpp
M llvm/lib/FileCheck/FileCheckImpl.h
A llvm/test/FileCheck/diff/diff-blank-stray.txt
A llvm/test/FileCheck/diff/diff-empty-check.txt
A llvm/test/FileCheck/diff/diff-label-boundary.txt
A llvm/test/FileCheck/diff/diff-label-fuzzy-match.txt
A llvm/test/FileCheck/diff/diff-label-next.txt
A llvm/test/FileCheck/diff/diff-multi-block.txt
A llvm/test/FileCheck/diff/diff-multi-failres.txt
A llvm/test/FileCheck/diff/diff-multi-mismatch.txt
A llvm/test/FileCheck/diff/diff-next-stray-line.txt
A llvm/test/FileCheck/diff/diff-regex-escaping.txt
A llvm/test/FileCheck/diff/diff-resync-after-noise.txt
A llvm/test/FileCheck/diff/diff-resync-high-noise.txt
A llvm/test/FileCheck/diff/diff-skipped-expected.txt
A llvm/test/FileCheck/diff/diff-stress-large-input.txt
M llvm/utils/FileCheck/FileCheck.cpp
Log Message:
-----------
[FileCheck] Add a diff output option for FileCheck (#187120)
This patch adds a `--diff` flag to FileCheck to address the readability
of traditional FileCheck output which can be difficult to parse by
human, especially when dealing with multiple substitutions or large
input files with many mismatches and additional context. This feature
provides a more familiar, scannable format for developers by rendering
mismatches as diffs.
There are two diff modes, split and unified both with substitution and
no-substitution version however to make it easier for reviewer, this
only have unified with no substitution.
Functional description of PR-
`getDiffContext` -
It provides the surrounding context for the mismatch. It uses the
`SourceMgr` to find the Line using `LineNo`. Once it found the pointer,
it scans forward until it hits a newline (\n or \r) or the end of the
memory buffer, then it trim to remove the whitespaces.
`renderDiff`
This function handle the printing of diff, print header(expected and
actual line number), one line context before the target line, mismatch
i.e. expected line and actual line and finally one line after context.
`printDiff`
This does the preparation for printing the diff. It has `CheckStr` with
which it find the expected (pattern) line, It resolve the actual line
either with `OverwriteActualLine` (which it gets from handleDiffFailure
which uses fuzzy match `diag` vector) or with directly `SourceMgr`. It
then asked for Line context from `getDiffContext` and finally call
`renderDiff` for actual printing.
`handleDiffFailure`
This function is important. it first print header of input file and
pattern file path. Then do main task of finding the target input line
for the check pattern line. It uses fuzzy match to find most intended
match. If there is none then target line default to next input line in
the buffer. It then move the `CheckRegion` for next Check line.
`checkInput`
This is where we intercept the flow for diff output. checkInput function
traverse on each check line of each check label. It find the MatchPos,
if it is `npos` then break the loop for check label but in our case we
also call `handleDiffFailure` for printing mismatch. We also have a
handling of check-next and check-empty where even if `MatchPos` is > 0
i.e. there is match later, we intercept then call `handleDiffFailure`
for printing the gap as mismatch.
Example -
`$ cat input.ll`
```llvm
define i32 @sum() {
%res = add nsw i32 10, 20
ret i64 %res
}
```
`$ cat test.txt`
```llvm
; CHECK-LABEL: define i32 @calculate()
; CHECK: %res = add nsw i32 20, 10
; CHECK-NEXT: ret i32 %res
```
`$bin/FileCheck ./test.txt --input-file=./input.ll --diff=unidiff`
```llvm
--- ./test.txt
+++ ./input.ll
@@ -2 +2 @@
define i32 @cal() {
-%res = add nsw i32 20, 10
+%res = add nsw i32 10, 20
ret i64 %res
FileCheck: Found 1 unique textual mismatch.
```
Fixes #77257
Assisted by Gemini AI.
Commit: 877dd33b427361a048bb123ecb383f3b14b9400e
https://github.com/llvm/llvm-project/commit/877dd33b427361a048bb123ecb383f3b14b9400e
Author: Connector Switch <c8ef at outlook.com>
Date: 2026-04-18 (Sat, 18 Apr 2026)
Changed paths:
M compiler-rt/test/sanitizer_common/TestCases/Linux/internal_symbolizer.cpp
M compiler-rt/test/sanitizer_common/TestCases/print-stack-trace.cpp
Log Message:
-----------
Revert "XFAIL symbolizer test for TySan" (#192770)
Reverts llvm/llvm-project#191810
Relates to https://github.com/llvm/llvm-project/pull/191902
Commit: d1abc8240fca7c5783aca3f329cb66fca3eec4ba
https://github.com/llvm/llvm-project/commit/d1abc8240fca7c5783aca3f329cb66fca3eec4ba
Author: Connector Switch <c8ef at outlook.com>
Date: 2026-04-18 (Sat, 18 Apr 2026)
Changed paths:
M .ci/compute_projects.py
M .ci/compute_projects_test.py
M .ci/monolithic-linux.sh
M .ci/monolithic-windows.sh
M .github/CODEOWNERS
M bolt/include/bolt/Core/BinaryContext.h
M bolt/include/bolt/Core/MCPlus.h
M bolt/include/bolt/Core/MCPlusBuilder.h
M bolt/lib/Core/BinaryContext.cpp
M bolt/lib/Core/DIEBuilder.cpp
M bolt/lib/Core/DebugData.cpp
M bolt/lib/Core/DebugNames.cpp
M bolt/lib/Passes/Instrumentation.cpp
M bolt/lib/Profile/BoltAddressTranslation.cpp
M bolt/lib/Rewrite/BuildIDRewriter.cpp
M bolt/lib/Rewrite/DWARFRewriter.cpp
M bolt/lib/Rewrite/GNUPropertyRewriter.cpp
M bolt/lib/Rewrite/LinuxKernelRewriter.cpp
M bolt/lib/Rewrite/RewriteInstance.cpp
M bolt/lib/Rewrite/SDTRewriter.cpp
M bolt/lib/Target/X86/X86MCPlusBuilder.cpp
M bolt/lib/Utils/CommandLineOpts.cpp
M bolt/runtime/common.h
M bolt/runtime/instr.cpp
A bolt/test/AArch64/tail-duplication-cache.s
A bolt/test/AArch64/tail-duplication-pass.s
A bolt/test/X86/lsda-encoding.s
M bolt/test/X86/tail-duplication-pass.s
M clang-tools-extra/clang-doc/BitcodeReader.cpp
M clang-tools-extra/clang-doc/BitcodeReader.h
M clang-tools-extra/clang-doc/JSONGenerator.cpp
M clang-tools-extra/clang-doc/MDGenerator.cpp
M clang-tools-extra/clang-doc/Mapper.cpp
M clang-tools-extra/clang-doc/Representation.cpp
M clang-tools-extra/clang-doc/Representation.h
M clang-tools-extra/clang-doc/Serialize.cpp
M clang-tools-extra/clang-doc/Serialize.h
M clang-tools-extra/clang-doc/YAMLGenerator.cpp
M clang-tools-extra/clang-doc/benchmarks/ClangDocBenchmark.cpp
M clang-tools-extra/clang-doc/tool/ClangDocMain.cpp
M clang-tools-extra/clang-tidy/bugprone/BugproneTidyModule.cpp
M clang-tools-extra/clang-tidy/bugprone/CMakeLists.txt
M clang-tools-extra/clang-tidy/bugprone/RedundantBranchConditionCheck.cpp
A clang-tools-extra/clang-tidy/bugprone/SignedBitwiseCheck.cpp
A clang-tools-extra/clang-tidy/bugprone/SignedBitwiseCheck.h
M clang-tools-extra/clang-tidy/bugprone/ThrowingStaticInitializationCheck.cpp
M clang-tools-extra/clang-tidy/bugprone/ThrowingStaticInitializationCheck.h
M clang-tools-extra/clang-tidy/bugprone/UncheckedOptionalAccessCheck.cpp
M clang-tools-extra/clang-tidy/bugprone/UseAfterMoveCheck.cpp
M clang-tools-extra/clang-tidy/cppcoreguidelines/InitVariablesCheck.cpp
M clang-tools-extra/clang-tidy/hicpp/CMakeLists.txt
M clang-tools-extra/clang-tidy/hicpp/HICPPTidyModule.cpp
R clang-tools-extra/clang-tidy/hicpp/SignedBitwiseCheck.cpp
R clang-tools-extra/clang-tidy/hicpp/SignedBitwiseCheck.h
M clang-tools-extra/clang-tidy/misc/MisleadingBidirectionalCheck.cpp
M clang-tools-extra/clang-tidy/modernize/UseStdBitCheck.cpp
M clang-tools-extra/clang-tidy/modernize/UseStdBitCheck.h
M clang-tools-extra/clang-tidy/performance/PreferSingleCharOverloadsCheck.cpp
M clang-tools-extra/clang-tidy/readability/CMakeLists.txt
M clang-tools-extra/clang-tidy/readability/ReadabilityTidyModule.cpp
A clang-tools-extra/clang-tidy/readability/RedundantLambdaParameterListCheck.cpp
A clang-tools-extra/clang-tidy/readability/RedundantLambdaParameterListCheck.h
M clang-tools-extra/clangd/ClangdServer.cpp
M clang-tools-extra/clangd/ClangdServer.h
M clang-tools-extra/clangd/CodeComplete.cpp
M clang-tools-extra/clangd/Compiler.h
M clang-tools-extra/clangd/ModulesBuilder.cpp
M clang-tools-extra/clangd/ModulesBuilder.h
M clang-tools-extra/clangd/ParsedAST.cpp
M clang-tools-extra/clangd/Preamble.cpp
M clang-tools-extra/clangd/Preamble.h
M clang-tools-extra/clangd/TidyFastChecks.inc
M clang-tools-extra/clangd/tool/ClangdMain.cpp
M clang-tools-extra/clangd/unittests/PrerequisiteModulesTest.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
A clang-tools-extra/docs/clang-tidy/checks/bugprone/signed-bitwise.rst
M clang-tools-extra/docs/clang-tidy/checks/bugprone/throwing-static-initialization.rst
M clang-tools-extra/docs/clang-tidy/checks/hicpp/signed-bitwise.rst
M clang-tools-extra/docs/clang-tidy/checks/list.rst
M clang-tools-extra/docs/clang-tidy/checks/modernize/use-std-bit.rst
A clang-tools-extra/docs/clang-tidy/checks/readability/redundant-lambda-parameter-list.rst
M clang-tools-extra/test/clang-tidy/checkers/bugprone/Inputs/unchecked-optional-access/std/types/optional.h
A clang-tools-extra/test/clang-tidy/checkers/bugprone/signed-bitwise-bug34747.cpp
A clang-tools-extra/test/clang-tidy/checkers/bugprone/signed-bitwise-integer-literals.cpp
A clang-tools-extra/test/clang-tidy/checkers/bugprone/signed-bitwise-standard-types.cpp
A clang-tools-extra/test/clang-tidy/checkers/bugprone/signed-bitwise-standard-types.h
A clang-tools-extra/test/clang-tidy/checkers/bugprone/signed-bitwise.cpp
A clang-tools-extra/test/clang-tidy/checkers/bugprone/throwing-static-initialization-allow.cpp
M clang-tools-extra/test/clang-tidy/checkers/bugprone/unchecked-optional-access.cpp
A clang-tools-extra/test/clang-tidy/checkers/bugprone/use-after-move-derived-to-base.cpp
A clang-tools-extra/test/clang-tidy/checkers/cppcoreguidelines/init-variables-objcxx.mm
R clang-tools-extra/test/clang-tidy/checkers/hicpp/signed-bitwise-bug34747.cpp
R clang-tools-extra/test/clang-tidy/checkers/hicpp/signed-bitwise-integer-literals.cpp
R clang-tools-extra/test/clang-tidy/checkers/hicpp/signed-bitwise-standard-types.cpp
R clang-tools-extra/test/clang-tidy/checkers/hicpp/signed-bitwise-standard-types.h
R clang-tools-extra/test/clang-tidy/checkers/hicpp/signed-bitwise.cpp
M clang-tools-extra/test/clang-tidy/checkers/modernize/use-std-bit.cpp
A clang-tools-extra/test/clang-tidy/checkers/performance/prefer-single-char-overloads-alias.cpp
A clang-tools-extra/test/clang-tidy/checkers/readability/redundant-lambda-parameter-list.cpp
M clang-tools-extra/unittests/clang-doc/BitcodeTest.cpp
M clang-tools-extra/unittests/clang-doc/ClangDocTest.cpp
M clang-tools-extra/unittests/clang-doc/ClangDocTest.h
M clang-tools-extra/unittests/clang-doc/GeneratorTest.cpp
M clang-tools-extra/unittests/clang-doc/JSONGeneratorTest.cpp
M clang-tools-extra/unittests/clang-doc/MDGeneratorTest.cpp
M clang-tools-extra/unittests/clang-doc/MergeTest.cpp
M clang-tools-extra/unittests/clang-doc/SerializeTest.cpp
M clang-tools-extra/unittests/clang-doc/YAMLGeneratorTest.cpp
M clang/cmake/caches/Fuchsia-stage2-instrumented.cmake
M clang/cmake/caches/Fuchsia-stage2.cmake
M clang/cmake/caches/Fuchsia.cmake
A clang/docs/CIR/ABILowering.rst
A clang/docs/CIR/CleanupAndEHDesign.rst
A clang/docs/CIR/CodeDuplication.rst
A clang/docs/CIR/_raw/PostProcessCIRDocs.py
A clang/docs/CIR/index.rst
M clang/docs/CMakeLists.txt
R clang/docs/ClangIRABILowering.md
R clang/docs/ClangIRCleanupAndEHDesign.md
R clang/docs/ClangIRCodeDuplication.rst
M clang/docs/LanguageExtensions.rst
M clang/docs/MemorySanitizer.rst
M clang/docs/ReleaseNotes.rst
M clang/docs/ThreadSanitizer.rst
M clang/docs/conf.py
M clang/docs/index.rst
M clang/include/clang/APINotes/Types.h
M clang/include/clang/AST/ASTConcept.h
M clang/include/clang/AST/ASTContext.h
M clang/include/clang/AST/CommentSema.h
M clang/include/clang/AST/Decl.h
M clang/include/clang/AST/ExprCXX.h
M clang/include/clang/AST/PrettyPrinter.h
M clang/include/clang/AST/Stmt.h
M clang/include/clang/AST/TemplateName.h
M clang/include/clang/AST/TypeBase.h
M clang/include/clang/Analysis/Analyses/LifetimeSafety/Facts.h
M clang/include/clang/Analysis/Analyses/LifetimeSafety/FactsGenerator.h
M clang/include/clang/Analysis/Analyses/LifetimeSafety/LifetimeAnnotations.h
M clang/include/clang/Analysis/Analyses/LifetimeSafety/LifetimeSafety.h
M clang/include/clang/Analysis/FlowSensitive/Models/UncheckedOptionalAccessModel.h
M clang/include/clang/Basic/Attr.td
M clang/include/clang/Basic/AttrDocs.td
M clang/include/clang/Basic/BuiltinHeaders.def
M clang/include/clang/Basic/Builtins.td
M clang/include/clang/Basic/BuiltinsAArch64.td
M clang/include/clang/Basic/BuiltinsPPC.def
M clang/include/clang/Basic/CodeGenOptions.def
M clang/include/clang/Basic/CodeGenOptions.h
M clang/include/clang/Basic/Diagnostic.h
M clang/include/clang/Basic/DiagnosticDriverKinds.td
M clang/include/clang/Basic/DiagnosticGroups.td
M clang/include/clang/Basic/DiagnosticLexKinds.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Basic/FileManager.h
M clang/include/clang/Basic/HLSLIntrinsics.td
M clang/include/clang/Basic/Module.h
A clang/include/clang/Basic/OptionalUnsigned.h
M clang/include/clang/Basic/Specifiers.h
R clang/include/clang/Basic/UnsignedOrNone.h
M clang/include/clang/Basic/riscv_vector.td
M clang/include/clang/Basic/riscv_vector_common.td
M clang/include/clang/CIR/Dialect/CMakeLists.txt
M clang/include/clang/CIR/Dialect/IR/CIRAttrs.td
M clang/include/clang/CIR/Dialect/IR/CIRCUDAAttrs.td
M clang/include/clang/CIR/Dialect/IR/CIRDialect.td
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/include/clang/CIR/Dialect/IR/CIRTypeConstraints.td
M clang/include/clang/CIR/Dialect/IR/CIRTypes.td
M clang/include/clang/CIR/Dialect/IR/CMakeLists.txt
M clang/include/clang/CIR/MissingFeatures.h
M clang/include/clang/Driver/ToolChain.h
M clang/include/clang/Frontend/CompilerInstance.h
M clang/include/clang/Lex/ModuleMap.h
M clang/include/clang/Lex/Preprocessor.h
M clang/include/clang/Options/Options.td
M clang/include/clang/Parse/Parser.h
M clang/include/clang/Sema/Sema.h
M clang/include/clang/Serialization/InMemoryModuleCache.h
M clang/include/clang/Serialization/ModuleCache.h
M clang/include/clang/Serialization/ModuleManager.h
M clang/include/clang/Support/RISCVVIntrinsicUtils.h
M clang/lib/APINotes/APINotesTypes.cpp
M clang/lib/AST/ASTContext.cpp
M clang/lib/AST/AttrImpl.cpp
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ByteCode/Descriptor.h
M clang/lib/AST/ByteCode/Disasm.cpp
M clang/lib/AST/ByteCode/Interp.cpp
M clang/lib/AST/ByteCode/Interp.h
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
M clang/lib/AST/ByteCode/InterpFrame.cpp
M clang/lib/AST/ByteCode/Opcodes.td
M clang/lib/AST/ByteCode/Pointer.cpp
M clang/lib/AST/ByteCode/Pointer.h
M clang/lib/AST/ByteCode/Program.h
M clang/lib/AST/CommentSema.cpp
M clang/lib/AST/DeclBase.cpp
M clang/lib/AST/ExprCXX.cpp
M clang/lib/AST/ExprConstant.cpp
M clang/lib/AST/StmtPrinter.cpp
M clang/lib/AST/Type.cpp
M clang/lib/Analysis/CFG.cpp
M clang/lib/Analysis/FlowSensitive/Models/UncheckedOptionalAccessModel.cpp
M clang/lib/Analysis/LifetimeSafety/Checker.cpp
M clang/lib/Analysis/LifetimeSafety/Dataflow.h
M clang/lib/Analysis/LifetimeSafety/Facts.cpp
M clang/lib/Analysis/LifetimeSafety/FactsGenerator.cpp
M clang/lib/Analysis/LifetimeSafety/LifetimeAnnotations.cpp
M clang/lib/Analysis/LifetimeSafety/LiveOrigins.cpp
M clang/lib/Analysis/LifetimeSafety/LoanPropagation.cpp
M clang/lib/Analysis/LifetimeSafety/Origins.cpp
M clang/lib/Basic/Module.cpp
M clang/lib/Basic/Targets.cpp
M clang/lib/Basic/Targets/OSTargets.h
M clang/lib/Basic/Targets/PPC.cpp
M clang/lib/Basic/Targets/PPC.h
M clang/lib/Basic/Targets/SPIR.cpp
M clang/lib/Basic/Targets/TCE.cpp
M clang/lib/Basic/Targets/TCE.h
M clang/lib/CIR/CodeGen/CIRGenAsm.cpp
M clang/lib/CIR/CodeGen/CIRGenBuiltin.cpp
M clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp
M clang/lib/CIR/CodeGen/CIRGenCall.cpp
M clang/lib/CIR/CodeGen/CIRGenClass.cpp
M clang/lib/CIR/CodeGen/CIRGenCleanup.cpp
M clang/lib/CIR/CodeGen/CIRGenDecl.cpp
M clang/lib/CIR/CodeGen/CIRGenExpr.cpp
M clang/lib/CIR/CodeGen/CIRGenExprAggregate.cpp
M clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
M clang/lib/CIR/CodeGen/CIRGenItaniumCXXABI.cpp
M clang/lib/CIR/CodeGen/CIRGenModule.cpp
M clang/lib/CIR/CodeGen/CIRGenModule.h
M clang/lib/CIR/CodeGen/CIRGenStmt.cpp
M clang/lib/CIR/CodeGen/CIRGenTypes.cpp
M clang/lib/CIR/CodeGen/CIRGenTypes.h
M clang/lib/CIR/CodeGen/CIRGenVTables.cpp
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
M clang/lib/CIR/Dialect/IR/CIRTypes.cpp
M clang/lib/CIR/Dialect/OpenMP/RegisterOpenMPExtensions.cpp
M clang/lib/CIR/Dialect/Transforms/FlattenCFG.cpp
M clang/lib/CIR/Dialect/Transforms/LoweringPrepare.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/CMakeLists.txt
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
M clang/lib/CodeGen/BackendUtil.cpp
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/CodeGen/CGDebugInfo.cpp
M clang/lib/CodeGen/CGDebugInfo.h
M clang/lib/CodeGen/CGExpr.cpp
M clang/lib/CodeGen/CGStmtOpenMP.cpp
M clang/lib/CodeGen/CodeGenAction.cpp
M clang/lib/CodeGen/CodeGenFunction.h
M clang/lib/CodeGen/CodeGenModule.cpp
M clang/lib/CodeGen/TargetBuiltins/ARM.cpp
M clang/lib/CodeGen/Targets/AMDGPU.cpp
M clang/lib/CodeGen/Targets/X86.cpp
M clang/lib/DependencyScanning/InProcessModuleCache.cpp
M clang/lib/Driver/CMakeLists.txt
M clang/lib/Driver/Driver.cpp
M clang/lib/Driver/SanitizerArgs.cpp
M clang/lib/Driver/ToolChain.cpp
M clang/lib/Driver/ToolChains/AIX.cpp
M clang/lib/Driver/ToolChains/AMDGPU.cpp
M clang/lib/Driver/ToolChains/BareMetal.cpp
M clang/lib/Driver/ToolChains/BareMetal.h
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/Driver/ToolChains/CommonArgs.cpp
M clang/lib/Driver/ToolChains/Cuda.cpp
M clang/lib/Driver/ToolChains/Flang.cpp
M clang/lib/Driver/ToolChains/FreeBSD.h
M clang/lib/Driver/ToolChains/Gnu.cpp
M clang/lib/Driver/ToolChains/HIPAMD.cpp
M clang/lib/Driver/ToolChains/HLSL.cpp
M clang/lib/Driver/ToolChains/HLSL.h
M clang/lib/Driver/ToolChains/Hexagon.cpp
M clang/lib/Driver/ToolChains/Hexagon.h
M clang/lib/Driver/ToolChains/Linux.cpp
M clang/lib/Driver/ToolChains/MinGW.cpp
A clang/lib/Driver/ToolChains/Serenity.cpp
A clang/lib/Driver/ToolChains/Serenity.h
M clang/lib/Driver/ToolChains/TCE.cpp
M clang/lib/Driver/ToolChains/TCE.h
M clang/lib/Format/ContinuationIndenter.cpp
M clang/lib/Format/Format.cpp
M clang/lib/Format/FormatToken.h
M clang/lib/Format/FormatTokenLexer.cpp
M clang/lib/Format/FormatTokenLexer.h
M clang/lib/Format/UnwrappedLineParser.cpp
M clang/lib/Frontend/CompilerInstance.cpp
M clang/lib/Frontend/CompilerInvocation.cpp
M clang/lib/Headers/CMakeLists.txt
M clang/lib/Headers/__clang_cuda_runtime_wrapper.h
M clang/lib/Headers/__clang_spirv_libdevice_declares.h
A clang/lib/Headers/__clang_spirv_math.h
M clang/lib/Headers/altivec.h
M clang/lib/Headers/arm_acle.h
M clang/lib/Headers/openmp_wrappers/math.h
M clang/lib/Index/CommentToXML.cpp
M clang/lib/Lex/DependencyDirectivesScanner.cpp
M clang/lib/Lex/InitHeaderSearch.cpp
M clang/lib/Lex/Lexer.cpp
M clang/lib/Lex/LiteralSupport.cpp
M clang/lib/Lex/ModuleMap.cpp
M clang/lib/Lex/PPDirectives.cpp
M clang/lib/Lex/PPLexerChange.cpp
M clang/lib/Lex/Preprocessor.cpp
M clang/lib/Parse/ParseCXXInlineMethods.cpp
M clang/lib/Parse/ParseDeclCXX.cpp
M clang/lib/Parse/Parser.cpp
M clang/lib/Sema/AnalysisBasedWarnings.cpp
M clang/lib/Sema/Sema.cpp
M clang/lib/Sema/SemaAPINotes.cpp
M clang/lib/Sema/SemaARM.cpp
M clang/lib/Sema/SemaAttr.cpp
M clang/lib/Sema/SemaAvailability.cpp
M clang/lib/Sema/SemaCXXScopeSpec.cpp
M clang/lib/Sema/SemaChecking.cpp
M clang/lib/Sema/SemaConcept.cpp
M clang/lib/Sema/SemaDecl.cpp
M clang/lib/Sema/SemaDeclAttr.cpp
M clang/lib/Sema/SemaDeclCXX.cpp
M clang/lib/Sema/SemaExpr.cpp
M clang/lib/Sema/SemaExprCXX.cpp
M clang/lib/Sema/SemaExprObjC.cpp
M clang/lib/Sema/SemaHLSL.cpp
M clang/lib/Sema/SemaLifetimeSafety.h
M clang/lib/Sema/SemaOpenACC.cpp
M clang/lib/Sema/SemaOverload.cpp
M clang/lib/Sema/SemaPPC.cpp
M clang/lib/Sema/SemaTemplate.cpp
M clang/lib/Sema/SemaTemplateDeductionGuide.cpp
M clang/lib/Sema/SemaTemplateInstantiateDecl.cpp
M clang/lib/Sema/SemaType.cpp
M clang/lib/Sema/TreeTransform.h
M clang/lib/Serialization/ASTReader.cpp
M clang/lib/Serialization/ASTReaderStmt.cpp
M clang/lib/Serialization/ASTWriter.cpp
M clang/lib/Serialization/ASTWriterDecl.cpp
M clang/lib/Serialization/ASTWriterStmt.cpp
M clang/lib/Serialization/InMemoryModuleCache.cpp
M clang/lib/Serialization/ModuleCache.cpp
M clang/lib/Serialization/ModuleManager.cpp
M clang/lib/StaticAnalyzer/Core/AnalyzerOptions.cpp
M clang/lib/Support/RISCVVIntrinsicUtils.cpp
M clang/test/APINotes/templates.cpp
M clang/test/AST/ByteCode/builtin-bit-cast-bitfields.cpp
M clang/test/AST/ByteCode/builtin-bit-cast-long-double.cpp
M clang/test/AST/ByteCode/builtin-functions.cpp
M clang/test/AST/ByteCode/constexpr-nqueens.cpp
M clang/test/AST/ByteCode/cxx11.cpp
M clang/test/AST/ByteCode/cxx17.cpp
M clang/test/AST/ByteCode/cxx20.cpp
M clang/test/AST/ByteCode/cxx2a.cpp
M clang/test/AST/ByteCode/lifetimes.cpp
M clang/test/AST/ByteCode/lifetimes26.cpp
M clang/test/AST/ByteCode/literals.cpp
M clang/test/AST/ByteCode/new-delete.cpp
M clang/test/AST/ByteCode/placement-new.cpp
M clang/test/AST/ByteCode/records.cpp
M clang/test/AST/ByteCode/unions.cpp
M clang/test/AST/HLSL/StructuredBuffers-AST.hlsl
M clang/test/AST/HLSL/TypedBuffers-AST.hlsl
M clang/test/AST/HLSL/ast-dump-SpirvType.hlsl
A clang/test/AST/HLSL/hlsl-constructors-template.hlsl
M clang/test/AST/HLSL/matrix-alias.hlsl
M clang/test/AST/HLSL/vector-alias.hlsl
A clang/test/AST/ast-dump-cxx20-reversed-operator.cpp
M clang/test/AST/ast-dump-decl-context-json.cpp
A clang/test/AST/ast-dump-decl-recovery.cpp
M clang/test/AST/ast-dump-decl.cpp
M clang/test/AST/ast-dump-invalid.cpp
M clang/test/AST/ast-dump-openmp-begin-declare-variant_namespace_1.cpp
M clang/test/AST/ast-dump-openmp-begin-declare-variant_reference.cpp
M clang/test/AST/ast-dump-openmp-begin-declare-variant_template_3.cpp
M clang/test/AST/ast-dump-template-decls-json.cpp
M clang/test/AST/ast-dump-template-decls.cpp
M clang/test/AST/ast-dump-template-json-win32-mangler-crash.cpp
M clang/test/AST/ast-dump-templates.cpp
M clang/test/AST/ast-printer-lambda.cpp
A clang/test/AST/constexpr-lambda-diagnostic.cpp
M clang/test/AST/float16.cpp
M clang/test/AST/new-unknown-type.cpp
M clang/test/Analysis/bstring.c
M clang/test/C/C23/n3006.c
M clang/test/C/C2y/n3353.c
M clang/test/CIR/CodeGen/abstract-cond.c
A clang/test/CIR/CodeGen/amdgpu-call-addrspace-cast.cpp
A clang/test/CIR/CodeGen/array-init-loop-exprs.cpp
A clang/test/CIR/CodeGen/attr-noundef.cpp
A clang/test/CIR/CodeGen/attr-retain.c
A clang/test/CIR/CodeGen/attr-used.c
A clang/test/CIR/CodeGen/base-init-eh.cpp
M clang/test/CIR/CodeGen/binop.c
M clang/test/CIR/CodeGen/bitint.c
A clang/test/CIR/CodeGen/builtin-verbose-trap.cpp
M clang/test/CIR/CodeGen/c89-implicit-int.c
A clang/test/CIR/CodeGen/cast-cxx20.cpp
A clang/test/CIR/CodeGen/cast.c
A clang/test/CIR/CodeGen/cleanup-automatic-eh.cpp
A clang/test/CIR/CodeGen/cleanup-conditional-eh.cpp
A clang/test/CIR/CodeGen/cleanup-conditional.cpp
M clang/test/CIR/CodeGen/coro-task.cpp
M clang/test/CIR/CodeGen/dtors.cpp
M clang/test/CIR/CodeGen/empty.cpp
M clang/test/CIR/CodeGen/expressions.cpp
A clang/test/CIR/CodeGen/field-init-eh.cpp
M clang/test/CIR/CodeGen/forward-enum.c
M clang/test/CIR/CodeGen/fp-math-precision-opts.c
M clang/test/CIR/CodeGen/global-array-dtor.cpp
M clang/test/CIR/CodeGen/global-init.cpp
A clang/test/CIR/CodeGen/inherited-ctors.cpp
A clang/test/CIR/CodeGen/init-list-lvalue.cpp
M clang/test/CIR/CodeGen/initializer-list-two-pointers.cpp
M clang/test/CIR/CodeGen/instantiate-init.cpp
A clang/test/CIR/CodeGen/keep-persistent-storage-variables.cpp
A clang/test/CIR/CodeGen/keep-static-consts.cpp
A clang/test/CIR/CodeGen/lambda-dtor-field.cpp
M clang/test/CIR/CodeGen/lambda.cpp
M clang/test/CIR/CodeGen/new-delete-deactivation.cpp
A clang/test/CIR/CodeGen/nofpclass.c
A clang/test/CIR/CodeGen/paren-init-list-eh.cpp
M clang/test/CIR/CodeGen/paren-init-list.cpp
M clang/test/CIR/CodeGen/partial-array-cleanup.cpp
M clang/test/CIR/CodeGen/rtti-member-pointer.cpp
M clang/test/CIR/CodeGen/rtti-qualfn.cpp
M clang/test/CIR/CodeGen/statement-exprs.c
M clang/test/CIR/CodeGen/static-vars.c
M clang/test/CIR/CodeGen/three-way-cmp.cpp
M clang/test/CIR/CodeGen/thunks.cpp
A clang/test/CIR/CodeGen/trivial-abi.cpp
M clang/test/CIR/CodeGen/trivial-ctor-const-init.cpp
M clang/test/CIR/CodeGenBuiltins/builtin-bit-cast.cpp
M clang/test/CIR/CodeGenBuiltins/builtin-memchr.c
A clang/test/CIR/CodeGenCUDA/device-stub.cu
M clang/test/CIR/CodeGenCUDA/kernel-call.cu
M clang/test/CIR/CodeGenCUDA/kernel-stub-name.cu
A clang/test/CIR/CodeGenCXX/uncopyable-args.cpp
M clang/test/CIR/CodeGenCXX/vtable-linkage.cpp
A clang/test/CIR/CodeGenCXX/x86_64-arguments.cpp
A clang/test/CIR/CodeGenHIP/hip-cuid.hip
M clang/test/CIR/CodeGenHIP/simple.cpp
A clang/test/CIR/Driver/clangir.c
M clang/test/CIR/IR/bitint.cir
A clang/test/CIR/IR/branch.cir
A clang/test/CIR/IR/do-while.cir
A clang/test/CIR/IR/for.cir
M clang/test/CIR/IR/inline-asm.cir
A clang/test/CIR/IR/invalid-bitint.cir
A clang/test/CIR/IR/while.cir
A clang/test/CIR/Lowering/omp-target-map.cir
R clang/test/CIR/global-var-simple.cpp
M clang/test/CXX/dcl.decl/dcl.decomp/p3.cpp
M clang/test/CXX/drs/cwg17xx.cpp
M clang/test/CXX/drs/cwg2026.cpp
M clang/test/CXX/drs/cwg24xx.cpp
M clang/test/CXX/drs/cwg2947.cpp
A clang/test/CXX/drs/cwg31xx.cpp
M clang/test/CXX/drs/cwg3xx.cpp
M clang/test/CXX/expr/expr.const/p2-0x.cpp
M clang/test/ClangScanDeps/prune-scanning-modules.m
M clang/test/CodeGen/2006-01-23-FileScopeAsm.c
M clang/test/CodeGen/AArch64/neon-intrinsics.c
M clang/test/CodeGen/AArch64/neon/intrinsics.c
R clang/test/CodeGen/AArch64/pcdphint-atomic-store.c
A clang/test/CodeGen/Inputs/stdbit.h
A clang/test/CodeGen/PowerPC/builtins-ecc.c
A clang/test/CodeGen/PowerPC/builtins-post-quantum-crypto.c
A clang/test/CodeGen/PowerPC/builtins-ppc-deeply-compressed-weights.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vpaire.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vpairo.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vunzipe.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vunzipo.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vzip.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vpaire.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vpairo.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vunzipe.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vunzipo.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vzip.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vpaire.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vpairo.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vunzipe.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vunzipo.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vzip.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vpaire.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vpairo.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vunzipe.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vunzipo.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vzip.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvzip/non-policy/non-overloaded/vpaire.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvzip/non-policy/non-overloaded/vpairo.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvzip/non-policy/non-overloaded/vunzipe.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvzip/non-policy/non-overloaded/vunzipo.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvzip/non-policy/non-overloaded/vzip.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvzip/non-policy/overloaded/vpaire.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvzip/non-policy/overloaded/vpairo.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvzip/non-policy/overloaded/vunzipe.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvzip/non-policy/overloaded/vunzipo.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvzip/non-policy/overloaded/vzip.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvzip/policy/non-overloaded/vpaire.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvzip/policy/non-overloaded/vpairo.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvzip/policy/non-overloaded/vunzipe.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvzip/policy/non-overloaded/vunzipo.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvzip/policy/non-overloaded/vzip.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvzip/policy/overloaded/vpaire.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvzip/policy/overloaded/vpairo.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvzip/policy/overloaded/vunzipe.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvzip/policy/overloaded/vunzipo.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvzip/policy/overloaded/vzip.c
A clang/test/CodeGen/amdgpu-abi-struct-coerce.c
M clang/test/CodeGen/amdgpu-builtin-is-invocable.c
M clang/test/CodeGen/amdgpu-builtin-processor-is.c
M clang/test/CodeGen/amdgpu-variadic-call.c
M clang/test/CodeGen/arm_acle.c
M clang/test/CodeGen/asm.c
M clang/test/CodeGen/asm_incbin.c
A clang/test/CodeGen/builtin-stdc-bit-functions.c
M clang/test/CodeGen/builtins-arm64.c
A clang/test/CodeGen/cfguard-mechanism.c
M clang/test/CodeGen/regcall.c
M clang/test/CodeGen/regcall4.c
M clang/test/CodeGen/target-data.c
M clang/test/CodeGen/ubsan-aggregate-null-align.c
A clang/test/CodeGenCXX/bpf-debug-info-alias.cpp
M clang/test/CodeGenCXX/dynamic-cast-address-space.cpp
M clang/test/CodeGenCXX/regcall.cpp
M clang/test/CodeGenCXX/regcall4.cpp
M clang/test/CodeGenHLSL/builtins/QuadReadAcrossX.hlsl
M clang/test/CodeGenOpenCL/amdgpu-abi-struct-coerce.cl
M clang/test/DebugInfo/Generic/bounds-checking-debuginfo.c
M clang/test/DebugInfo/Generic/cfi-check-fail-debuginfo.c
M clang/test/DebugInfo/Generic/cfi-icall-generalize-debuginfo.c
M clang/test/DebugInfo/Generic/cfi-icall-normalize2-debuginfo.c
M clang/test/DebugInfo/Generic/ubsan-function-debuginfo.c
M clang/test/DebugInfo/Generic/unsigned-promotion-debuginfo.c
A clang/test/Driver/Inputs/hexagon_tree/Tools/target/picolibc/hexagon-unknown-none-elf/include/c++/readme
A clang/test/Driver/Inputs/hexagon_tree/Tools/target/picolibc/hexagon-unknown-none-elf/include/c++/v1/readme
A clang/test/Driver/Inputs/hexagon_tree/Tools/target/picolibc/hexagon-unknown-none-elf/include/readme
A clang/test/Driver/Inputs/hexagon_tree/Tools/target/picolibc/hexagon-unknown-none-elf/readme
A clang/test/Driver/Inputs/hexagon_tree/Tools/target/picolibc/readme
A clang/test/Driver/Inputs/resource_dir_with_per_target_subdir/lib/aarch64-unknown-serenity/clang_rt.crtbegin.o
A clang/test/Driver/Inputs/resource_dir_with_per_target_subdir/lib/aarch64-unknown-serenity/clang_rt.crtend.o
A clang/test/Driver/Inputs/resource_dir_with_per_target_subdir/lib/riscv64-unknown-serenity/clang_rt.crtbegin.o
A clang/test/Driver/Inputs/resource_dir_with_per_target_subdir/lib/riscv64-unknown-serenity/clang_rt.crtend.o
A clang/test/Driver/Inputs/resource_dir_with_per_target_subdir/lib/x86_64-unknown-serenity/clang_rt.crtbegin.o
A clang/test/Driver/Inputs/resource_dir_with_per_target_subdir/lib/x86_64-unknown-serenity/clang_rt.crtend.o
A clang/test/Driver/Inputs/serenity_tree/usr/include/c++/v1/.keep
A clang/test/Driver/Inputs/serenity_tree/usr/lib/crt0.o
M clang/test/Driver/aix-ld.c
A clang/test/Driver/amdgpu-multilib.yaml
M clang/test/Driver/cl-options.c
M clang/test/Driver/coverage-ld.c
A clang/test/Driver/dxc_spirv-val_missing.hlsl
A clang/test/Driver/dxc_spirv-val_path.hlsl
M clang/test/Driver/fsanitize-cfi.c
M clang/test/Driver/fsanitize-realtime.c
M clang/test/Driver/hexagon-toolchain-elf.c
M clang/test/Driver/hexagon-toolchain-linux.c
A clang/test/Driver/hexagon-toolchain-picolibc.c
M clang/test/Driver/instrprof-ld.c
A clang/test/Driver/linux-multilib.yaml
A clang/test/Driver/mingw-multilib.yaml
A clang/test/Driver/nvptx-multilib.yaml
M clang/test/Driver/sanitizer-ld.c
A clang/test/Driver/serenity.cpp
M clang/test/Headers/amdgcn-openmp-device-math-complex.c
M clang/test/Import/builtin-template/test.cpp
M clang/test/Import/enum/test.cpp
M clang/test/Import/namespace/test.cpp
M clang/test/Import/template-specialization/test.cpp
A clang/test/Index/annotate-comments-availability-anyappleos.cpp
A clang/test/Interpreter/ftime-report.cpp
M clang/test/Modules/cxx-templates.cpp
A clang/test/Modules/duplicate-header-ownership.c
M clang/test/Modules/lookup.cpp
M clang/test/Modules/no-stale-modtime.m
A clang/test/Modules/objc-at-import.m
A clang/test/Modules/prune-no-toplevel.m
M clang/test/OpenMP/cancel_codegen.cpp
M clang/test/OpenMP/irbuilder_for_iterator.cpp
M clang/test/OpenMP/irbuilder_for_rangefor.cpp
M clang/test/OpenMP/irbuilder_for_unsigned.c
M clang/test/OpenMP/irbuilder_for_unsigned_auto.c
M clang/test/OpenMP/irbuilder_for_unsigned_down.c
M clang/test/OpenMP/irbuilder_for_unsigned_dynamic.c
M clang/test/OpenMP/irbuilder_for_unsigned_dynamic_chunked.c
M clang/test/OpenMP/irbuilder_for_unsigned_runtime.c
M clang/test/OpenMP/irbuilder_for_unsigned_static_chunked.c
M clang/test/OpenMP/irbuilder_nested_parallel_for.c
M clang/test/OpenMP/irbuilder_unroll_partial_factor_for.c
M clang/test/OpenMP/irbuilder_unroll_partial_heuristic_constant_for.c
M clang/test/OpenMP/irbuilder_unroll_partial_heuristic_runtime_for.c
M clang/test/OpenMP/irbuilder_unroll_unroll_partial_factor.c
M clang/test/OpenMP/metadirective_device_arch_codegen.cpp
M clang/test/OpenMP/nested_loop_codegen.cpp
M clang/test/OpenMP/split_driver_smoke.c
M clang/test/OpenMP/target_indirect_codegen.cpp
A clang/test/Parser/macro-braces-recovery.cpp
M clang/test/Parser/recovery.cpp
M clang/test/ParserHLSL/hlsl_resource_class_attr.hlsl
A clang/test/Preprocessor/init-serenityos.c
M clang/test/Preprocessor/predefined-macros.c
R clang/test/Sema/AArch64/pcdphint-atomic-store.c
M clang/test/Sema/Inputs/lifetime-analysis.h
A clang/test/Sema/Inputs/stdbit.h
A clang/test/Sema/PowerPC/builtins-ecc-error.c
A clang/test/Sema/PowerPC/builtins-post-quantum-crypto-error.c
M clang/test/Sema/attr-availability-anyappleos-ast.c
M clang/test/Sema/attr-availability-anyappleos.c
M clang/test/Sema/builtin-align.c
A clang/test/Sema/builtin-stdc-bit-functions.c
A clang/test/Sema/builtins-ppc-deeply-compressed-weights-error.c
M clang/test/Sema/constexpr.c
M clang/test/Sema/warn-documentation.cpp
M clang/test/Sema/warn-lifetime-analysis-nocfg.cpp
M clang/test/Sema/warn-lifetime-safety-dangling-field.cpp
M clang/test/Sema/warn-lifetime-safety-invalidations.cpp
M clang/test/Sema/warn-lifetime-safety-noescape.cpp
M clang/test/Sema/warn-lifetime-safety-suggestions.cpp
M clang/test/Sema/warn-lifetime-safety.cpp
M clang/test/SemaCXX/builtin-align-cxx.cpp
M clang/test/SemaCXX/builtin-is-within-lifetime.cpp
M clang/test/SemaCXX/constant-expression-cxx11.cpp
M clang/test/SemaCXX/constant-expression-cxx14.cpp
M clang/test/SemaCXX/constant-expression-cxx2a.cpp
M clang/test/SemaCXX/constexpr-builtin-bit-cast.cpp
A clang/test/SemaCXX/constexpr-builtin-stdc-bit-functions.cpp
M clang/test/SemaCXX/constexpr-printing.cpp
M clang/test/SemaCXX/constexpr-value-init.cpp
M clang/test/SemaCXX/coroutines.cpp
M clang/test/SemaCXX/cxx1z-constexpr-lambdas.cpp
M clang/test/SemaCXX/cxx20-ctad-type-alias.cpp
M clang/test/SemaCXX/cxx2a-consteval.cpp
M clang/test/SemaCXX/cxx2a-constexpr-dynalloc.cpp
M clang/test/SemaCXX/cxx2c-constexpr-placement-new.cpp
A clang/test/SemaCXX/gh135694.cpp
M clang/test/SemaCXX/lambda-expressions.cpp
M clang/test/SemaCXX/static-assert-cxx26.cpp
M clang/test/SemaCXX/void-lambda-return-init.cpp
M clang/test/SemaHLSL/BuiltIns/QuadReadAcrossX-errors.hlsl
M clang/test/SemaOpenACC/compute-construct-firstprivate-clause.cpp
M clang/test/SemaOpenACC/compute-construct-private-clause.cpp
M clang/test/SemaOpenACC/compute-construct-reduction-clause.cpp
M clang/test/SemaOpenACC/loop-construct-collapse-clause.cpp
M clang/test/SemaOpenACC/routine-construct-clauses.cpp
M clang/test/SemaTemplate/GH75426.cpp
M clang/test/SemaTemplate/concepts.cpp
M clang/test/SemaTemplate/make_integer_seq.cpp
M clang/test/lit.cfg.py
M clang/tools/clang-ssaf-format/CMakeLists.txt
M clang/tools/driver/cc1_main.cpp
M clang/tools/libclang/BuildSystem.cpp
M clang/tools/libclang/CIndex.cpp
M clang/tools/libclang/CMakeLists.txt
M clang/unittests/Analysis/FlowSensitive/UncheckedStatusOrAccessModelTestFixture.cpp
M clang/unittests/CIR/CMakeLists.txt
A clang/unittests/CIR/UnionTypeSizeTest.cpp
M clang/unittests/Format/FormatTest.cpp
M clang/unittests/Format/FormatTestVerilog.cpp
M clang/unittests/Format/TokenAnnotatorTest.cpp
M clang/unittests/Lex/DependencyDirectivesScannerTest.cpp
M clang/unittests/Serialization/CMakeLists.txt
A clang/unittests/Serialization/CommentsTest.cpp
M clang/unittests/Serialization/InMemoryModuleCacheTest.cpp
R clang/unittests/Serialization/NoCommentsTest.cpp
A clang/unittests/StaticAnalyzer/AnalyzerFormattingTest.cpp
M clang/unittests/StaticAnalyzer/CMakeLists.txt
M clang/unittests/Support/TimeProfilerTest.cpp
M clang/utils/ClangVisualizers/clang.natvis
M clang/utils/TableGen/ClangAttrEmitter.cpp
M clang/www/c_status.html
M clang/www/cxx_dr_status.html
M compiler-rt/lib/builtins/cpu_model/aarch64/hwcap.inc
M compiler-rt/lib/hwasan/hwasan_allocator.cpp
M compiler-rt/lib/hwasan/hwasan_flags.inc
M compiler-rt/lib/hwasan/hwasan_mapping.h
M compiler-rt/lib/profile/InstrProfilingPlatformAIX.c
M compiler-rt/lib/sanitizer_common/sanitizer_haiku.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_linux.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_mac.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_netbsd.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_posix.h
M compiler-rt/lib/sanitizer_common/sanitizer_posix_libcdep.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_solaris.cpp
M compiler-rt/lib/sanitizer_common/tests/sanitizer_bitvector_test.cpp
M compiler-rt/lib/scudo/standalone/wrappers_c.cpp
M compiler-rt/lib/tsan/rtl/tsan_platform.h
M compiler-rt/lib/tysan/tysan.cpp
M compiler-rt/lib/tysan/tysan_interceptors.cpp
M compiler-rt/lib/xray/tests/unit/fdr_controller_test.cpp
M compiler-rt/lib/xray/tests/unit/fdr_log_writer_test.cpp
A compiler-rt/test/hwasan/TestCases/tag_mask_smoke.c
M compiler-rt/test/profile/instrprof-merge-entry-cover.c
M compiler-rt/test/profile/instrprof-merge.c
M compiler-rt/test/profile/instrprof-write-file-atexit-explicitly.c
M compiler-rt/test/profile/profile_test.h
M compiler-rt/test/sanitizer_common/CMakeLists.txt
M compiler-rt/test/sanitizer_common/TestCases/Linux/aligned_alloc-alignment.cpp
M compiler-rt/test/sanitizer_common/TestCases/Linux/allocator_returns_null_std.cpp
M compiler-rt/test/sanitizer_common/TestCases/Linux/decorate_proc_maps.cpp
M compiler-rt/test/sanitizer_common/TestCases/Linux/deepbind.cpp
M compiler-rt/test/sanitizer_common/TestCases/Linux/free_aligned_sized.c
M compiler-rt/test/sanitizer_common/TestCases/Linux/free_sized.c
M compiler-rt/test/sanitizer_common/TestCases/Linux/internal_symbolizer.cpp
M compiler-rt/test/sanitizer_common/TestCases/Linux/malloc_usable_size.c
M compiler-rt/test/sanitizer_common/TestCases/Linux/mlock_test.cpp
M compiler-rt/test/sanitizer_common/TestCases/Linux/mprobe.cpp
M compiler-rt/test/sanitizer_common/TestCases/Linux/pie_no_aslr.cpp
M compiler-rt/test/sanitizer_common/TestCases/Linux/pvalloc-overflow.cpp
M compiler-rt/test/sanitizer_common/TestCases/Linux/release_to_os_test.cpp
M compiler-rt/test/sanitizer_common/TestCases/Linux/replace_dlopen_main_program_test.cpp
M compiler-rt/test/sanitizer_common/TestCases/Linux/resize_tls_dynamic.cpp
M compiler-rt/test/sanitizer_common/TestCases/Linux/soft_rss_limit_mb_test.cpp
M compiler-rt/test/sanitizer_common/TestCases/Linux/tls_get_addr.c
M compiler-rt/test/sanitizer_common/TestCases/Linux/tls_malloc_hook.c
M compiler-rt/test/sanitizer_common/TestCases/Linux/unexpected_format_specifier_test.cpp
M compiler-rt/test/sanitizer_common/TestCases/Posix/huge_malloc.c
M compiler-rt/test/sanitizer_common/TestCases/Posix/mmap_write_exec.cpp
M compiler-rt/test/sanitizer_common/TestCases/Posix/posix_memalign-alignment.cpp
M compiler-rt/test/sanitizer_common/TestCases/Posix/print-module-map.cpp
M compiler-rt/test/sanitizer_common/TestCases/Posix/sanitizer_set_death_callback_test.cpp
M compiler-rt/test/sanitizer_common/TestCases/Posix/weak_hook_test.cpp
M compiler-rt/test/sanitizer_common/TestCases/allocator_interface.cpp
M compiler-rt/test/sanitizer_common/TestCases/allocator_returns_null.cpp
M compiler-rt/test/sanitizer_common/TestCases/compress_stack_depot.cpp
M compiler-rt/test/sanitizer_common/TestCases/corelimit.cpp
M compiler-rt/test/sanitizer_common/TestCases/get_allocated_begin.cpp
M compiler-rt/test/sanitizer_common/TestCases/hard_rss_limit_mb_test.cpp
M compiler-rt/test/sanitizer_common/TestCases/malloc_hook.cpp
M compiler-rt/test/sanitizer_common/TestCases/malloc_hook_get_allocated_size_fast.cpp
M compiler-rt/test/sanitizer_common/TestCases/max_allocation_size.cpp
M compiler-rt/test/sanitizer_common/TestCases/print-stack-trace.cpp
M compiler-rt/test/sanitizer_common/TestCases/reallocarray-overflow.cpp
M compiler-rt/test/sanitizer_common/TestCases/sanitizer_coverage_symbolize.cpp
M compiler-rt/test/sanitizer_common/TestCases/sanitizer_coverage_trace_pc_guard-dso.cpp
M compiler-rt/test/sanitizer_common/TestCases/sanitizer_coverage_trace_pc_guard.cpp
M compiler-rt/test/sanitizer_common/lit.common.cfg.py
M cross-project-tests/debuginfo-tests/dexter-tests/memvars/const-branch.c
M cross-project-tests/lit.cfg.py
M flang-rt/lib/cuda/pointer.cpp
M flang-rt/lib/runtime/type-info.cpp
M flang-rt/unittests/Runtime/Descriptor.cpp
M flang/docs/Directives.md
A flang/docs/MeetingNotes/2026/2026-04-08.md
M flang/include/flang/Evaluate/match.h
M flang/include/flang/Evaluate/tools.h
M flang/include/flang/Frontend/CodeGenOptions.def
M flang/include/flang/Lower/MultiImageFortran.h
M flang/include/flang/Lower/OpenACC.h
A flang/include/flang/Optimizer/Builder/MIFCommon.h
M flang/include/flang/Optimizer/Dialect/CUF/Attributes/CUFAttr.h
M flang/include/flang/Optimizer/Dialect/FIROps.td
M flang/include/flang/Optimizer/Dialect/MIF/MIFOps.td
M flang/include/flang/Optimizer/HLFIR/HLFIROps.td
M flang/include/flang/Optimizer/Support/InternalNames.h
M flang/include/flang/Optimizer/Support/Utils.h
M flang/include/flang/Optimizer/Transforms/MIFOpConversion.h
M flang/include/flang/Optimizer/Transforms/Passes.td
M flang/include/flang/Runtime/CUDA/pointer.h
M flang/include/flang/Semantics/openmp-utils.h
M flang/include/flang/Semantics/symbol.h
M flang/include/flang/Support/Fortran.h
M flang/lib/Evaluate/fold-implementation.h
M flang/lib/Evaluate/tools.cpp
M flang/lib/Frontend/CompilerInstance.cpp
M flang/lib/Frontend/CompilerInvocation.cpp
M flang/lib/Lower/Allocatable.cpp
M flang/lib/Lower/Bridge.cpp
M flang/lib/Lower/CallInterface.cpp
M flang/lib/Lower/ConvertExprToHLFIR.cpp
M flang/lib/Lower/ConvertVariable.cpp
M flang/lib/Lower/MultiImageFortran.cpp
M flang/lib/Lower/OpenACC.cpp
M flang/lib/Lower/OpenMP/ClauseProcessor.cpp
M flang/lib/Lower/OpenMP/ClauseProcessor.h
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Optimizer/Analysis/AliasAnalysis.cpp
M flang/lib/Optimizer/Builder/CMakeLists.txt
M flang/lib/Optimizer/Builder/IntrinsicCall.cpp
A flang/lib/Optimizer/Builder/MIFCommon.cpp
M flang/lib/Optimizer/CodeGen/CMakeLists.txt
M flang/lib/Optimizer/CodeGen/CodeGen.cpp
M flang/lib/Optimizer/Dialect/FIROps.cpp
M flang/lib/Optimizer/Dialect/MIF/CMakeLists.txt
M flang/lib/Optimizer/Dialect/MIF/MIFOps.cpp
M flang/lib/Optimizer/Support/InternalNames.cpp
M flang/lib/Optimizer/Support/Utils.cpp
M flang/lib/Optimizer/Transforms/CUDA/CUFAllocationConversion.cpp
M flang/lib/Optimizer/Transforms/CUDA/CUFDeviceGlobal.cpp
M flang/lib/Optimizer/Transforms/FIRToMemRef.cpp
M flang/lib/Optimizer/Transforms/LoopInvariantCodeMotion.cpp
M flang/lib/Optimizer/Transforms/MIFOpConversion.cpp
M flang/lib/Parser/Fortran-parsers.cpp
M flang/lib/Semantics/check-cuda.cpp
M flang/lib/Semantics/check-declarations.cpp
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/check-omp-structure.h
M flang/lib/Semantics/definable.cpp
M flang/lib/Semantics/openmp-utils.cpp
M flang/lib/Semantics/resolve-directives.cpp
M flang/lib/Semantics/resolve-names.cpp
M flang/lib/Support/Fortran.cpp
A flang/test/Analysis/AliasAnalysis/modref-call-memory-effects.fir
M flang/test/Driver/fintegrated-as.f90
M flang/test/Evaluate/rewrite01.f90
A flang/test/Evaluate/rewrite09.f90
M flang/test/Fir/CUDA/cuda-allocate.fir
M flang/test/Fir/CUDA/cuda-code-gen.mlir
A flang/test/Fir/CUDA/cuda-device-global-preserve.f90
M flang/test/Fir/CUDA/cuda-device-global.f90
M flang/test/Fir/MIF/change_team.mlir
M flang/test/Fir/MIF/change_team2.mlir
A flang/test/Fir/MIF/coarray-alloc.mlir
M flang/test/Fir/MIF/form_team.mlir
M flang/test/Fir/MIF/get_team.mlir
M flang/test/Fir/MIF/sync_team.mlir
M flang/test/Fir/MIF/team_number.mlir
A flang/test/Fir/box-elesize-canonicalize.fir
A flang/test/Integration/OpenMP/workshare-ident-flag.f90
M flang/test/Lower/CUDA/cuda-data-attribute.cuf
M flang/test/Lower/CUDA/cuda-data-transfer.cuf
M flang/test/Lower/HLFIR/array-ctor-as-elemental.f90
M flang/test/Lower/HLFIR/array-ctor-as-inlined-temp.f90
M flang/test/Lower/HLFIR/array-ctor-as-runtime-temp.f90
A flang/test/Lower/HLFIR/conditional-expr.f90
M flang/test/Lower/Intrinsics/storage_size.f90
M flang/test/Lower/Intrinsics/sum.f90
M flang/test/Lower/Intrinsics/system_clock.f90
M flang/test/Lower/Intrinsics/trailz.f90
M flang/test/Lower/Intrinsics/transfer.f90
M flang/test/Lower/Intrinsics/verify.f90
A flang/test/Lower/MIF/coarray_allocation.f90
A flang/test/Lower/MIF/coarray_allocation2.f90
A flang/test/Lower/MIF/coarray_allocation3.f90
A flang/test/Lower/MIF/coarray_allocation4.f90
A flang/test/Lower/MIF/coarray_allocation5.f90
A flang/test/Lower/OpenACC/acc-declare-global-component-not-supported.f90
A flang/test/Lower/OpenACC/acc-declare-use-associated.f90
M flang/test/Lower/OpenACC/acc-declare.f90
M flang/test/Lower/OpenACC/acc-host-data-cuda-device.f90
M flang/test/Lower/OpenACC/acc-loop-collapse-force-lowering.f90
A flang/test/Lower/OpenACC/acc-loop-collapse-force-non-tightly-nested.f90
A flang/test/Lower/OpenACC/acc-routine-named-external.f90
R flang/test/Lower/OpenMP/Todo/omp-declarative-allocate-align.f90
R flang/test/Lower/OpenMP/Todo/omp-declarative-allocate.f90
A flang/test/Lower/OpenMP/declare-target-named-main-interface.f90
A flang/test/Lower/OpenMP/omp-declarative-allocate-align.f90
A flang/test/Lower/OpenMP/omp-declarative-allocate.f90
M flang/test/Lower/OpenMP/real10.f90
M flang/test/Lower/PowerPC/ppc-intrinsics.f90
M flang/test/Lower/PowerPC/ppc-mma-accumulator-move-clear.f90
M flang/test/Lower/PowerPC/ppc-mma-assemble-disassemble.f90
M flang/test/Lower/PowerPC/ppc-mma-outer-product-1.f90
M flang/test/Lower/PowerPC/ppc-mma-outer-product-2.f90
M flang/test/Lower/PowerPC/ppc-pwr10-vec-intrinsics.f90
M flang/test/Lower/PowerPC/ppc-vec-abs.f90
M flang/test/Lower/PowerPC/ppc-vec-add-and-mul-sub-xor.f90
M flang/test/Lower/PowerPC/ppc-vec-any.f90
M flang/test/Lower/PowerPC/ppc-vec-cmp.f90
M flang/test/Lower/PowerPC/ppc-vec-convert.f90
M flang/test/Lower/PowerPC/ppc-vec-cvf-elem-order.f90
M flang/test/Lower/PowerPC/ppc-vec-load-elem-order.f90
M flang/test/Lower/PowerPC/ppc-vec-load.f90
M flang/test/Lower/PowerPC/ppc-vec-max-min-madd-nmsub.f90
M flang/test/Lower/PowerPC/ppc-vec-merge-elem-order.f90
M flang/test/Lower/PowerPC/ppc-vec-merge.f90
M flang/test/Lower/PowerPC/ppc-vec-perm-elem-order.f90
M flang/test/Lower/PowerPC/ppc-vec-perm.f90
M flang/test/Lower/PowerPC/ppc-vec-sel.f90
M flang/test/Lower/PowerPC/ppc-vec-shift-be-le.f90
M flang/test/Lower/PowerPC/ppc-vec-shift.f90
M flang/test/Lower/PowerPC/ppc-vec-splat-elem-order.f90
M flang/test/Lower/PowerPC/ppc-vec-store-elem-order.f90
M flang/test/Lower/PowerPC/ppc-vec-store.f90
M flang/test/Lower/PowerPC/ppc-vector-types.f90
M flang/test/Lower/io-char-array.f90
M flang/test/Lower/io-implied-do-fixes.f90
M flang/test/Lower/io-item-list.f90
M flang/test/Lower/io-statement-1.f90
M flang/test/Lower/io-statement-2.f90
M flang/test/Lower/io-statement-3.f90
M flang/test/Lower/io-statement-big-unit-checks.f90
M flang/test/Lower/io-statement-open-options.f90
M flang/test/Lower/io-write.f90
M flang/test/Lower/logical-operations.f90
M flang/test/Lower/loops2.f90
M flang/test/Lower/loops3.f90
M flang/test/Lower/memory-alloc.f90
M flang/test/Lower/volatile-string.f90
M flang/test/Lower/zero-size.f90
M flang/test/Semantics/OpenACC/acc-collapse-force.f90
A flang/test/Semantics/OpenMP/affected-loops.f90
M flang/test/Semantics/cuf03.cuf
M flang/test/Semantics/cuf10.cuf
A flang/test/Semantics/cuf26.cuf
M flang/test/Semantics/stmt-func02.f90
A flang/test/Semantics/stmt-func03.f90
M flang/test/Transforms/CUF/cuf-kernel-licm.fir
A flang/test/Transforms/FIRToMemRef/slice-projected.mlir
A flang/test/Transforms/licm-allocmem-cufaloc.mlir
A flang/test/Transforms/licm-non-addressable-resource.mlir
M flang/test/Transforms/licm.fir
M flang/test/lib/Analysis/AliasAnalysis/TestAliasAnalysis.cpp
M libc/CMakeLists.txt
M libc/config/baremetal/arm/entrypoints.txt
M libc/config/baremetal/riscv/entrypoints.txt
M libc/config/darwin/aarch64/entrypoints.txt
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/arm/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/config/linux/x86_64/headers.txt
M libc/config/windows/entrypoints.txt
M libc/hdr/types/CMakeLists.txt
A libc/hdr/types/wctype_t.h
A libc/hdr/wctype_overlay.h
M libc/include/CMakeLists.txt
M libc/include/limits.yaml
M libc/include/llvm-libc-macros/limits-macros.h
M libc/include/llvm-libc-macros/linux/sys-socket-macros.h
M libc/include/llvm-libc-types/CMakeLists.txt
M libc/include/llvm-libc-types/__futex_word.h
A libc/include/llvm-libc-types/mcontext_t.h
A libc/include/llvm-libc-types/ucontext_t.h
A libc/include/llvm-libc-types/wctype_t.h
A libc/include/llvm-libc-types/x86_64/mcontext_t.h
A libc/include/llvm-libc-types/x86_64/ucontext_t.h
M libc/include/pthread.yaml
A libc/include/string.h.def
M libc/include/string.yaml
M libc/include/sys/socket.yaml
A libc/include/ucontext.h.def
A libc/include/ucontext.yaml
M libc/include/wctype.yaml
M libc/shared/math.h
A libc/shared/math/copysign.h
A libc/shared/math/copysignbf16.h
A libc/shared/math/copysignf.h
A libc/shared/math/copysignf128.h
A libc/shared/math/copysignf16.h
A libc/shared/math/copysignl.h
M libc/src/CMakeLists.txt
M libc/src/__support/CMakeLists.txt
M libc/src/__support/FPUtil/ManipulationFunctions.h
M libc/src/__support/OSUtil/linux/syscall_wrappers/CMakeLists.txt
A libc/src/__support/OSUtil/linux/syscall_wrappers/getsockopt.h
A libc/src/__support/OSUtil/linux/syscall_wrappers/setsockopt.h
M libc/src/__support/math/CMakeLists.txt
A libc/src/__support/math/copysign.h
A libc/src/__support/math/copysignbf16.h
A libc/src/__support/math/copysignf.h
A libc/src/__support/math/copysignf128.h
A libc/src/__support/math/copysignf16.h
A libc/src/__support/math/copysignl.h
M libc/src/__support/threads/CMakeLists.txt
M libc/src/__support/threads/CndVar.h
M libc/src/__support/threads/darwin/futex_utils.h
A libc/src/__support/threads/futex_utils.h
M libc/src/__support/threads/linux/futex_utils.h
M libc/src/__support/threads/mutex.h
M libc/src/__support/threads/raw_mutex.h
M libc/src/__support/threads/raw_rwlock.h
A libc/src/__support/wctype_impl.h
M libc/src/__support/wctype_utils.h
M libc/src/math/generic/CMakeLists.txt
M libc/src/math/generic/copysign.cpp
M libc/src/math/generic/copysignbf16.cpp
M libc/src/math/generic/copysignf.cpp
M libc/src/math/generic/copysignf128.cpp
M libc/src/math/generic/copysignf16.cpp
M libc/src/math/generic/copysignl.cpp
M libc/src/pthread/CMakeLists.txt
A libc/src/pthread/pthread_mutex_trylock.cpp
A libc/src/pthread/pthread_mutex_trylock.h
M libc/src/semaphore/CMakeLists.txt
M libc/src/semaphore/posix_semaphore.h
M libc/src/strings/strcasecmp.cpp
M libc/src/strings/strncasecmp.cpp
M libc/src/sys/socket/CMakeLists.txt
A libc/src/sys/socket/getsockopt.h
M libc/src/sys/socket/linux/CMakeLists.txt
A libc/src/sys/socket/linux/getsockopt.cpp
A libc/src/sys/socket/linux/setsockopt.cpp
A libc/src/sys/socket/setsockopt.h
A libc/src/ucontext/CMakeLists.txt
A libc/src/ucontext/getcontext.h
A libc/src/ucontext/setcontext.h
A libc/src/ucontext/x86_64/CMakeLists.txt
A libc/src/ucontext/x86_64/getcontext.cpp
A libc/src/ucontext/x86_64/setcontext.cpp
M libc/src/wctype/CMakeLists.txt
A libc/src/wctype/iswctype.cpp
A libc/src/wctype/iswctype.h
A libc/src/wctype/wctype.cpp
A libc/src/wctype/wctype.h
M libc/test/CMakeLists.txt
M libc/test/integration/src/CMakeLists.txt
M libc/test/integration/src/__support/threads/CMakeLists.txt
A libc/test/integration/src/__support/threads/futex_requeue_test.cpp
M libc/test/integration/src/pthread/CMakeLists.txt
M libc/test/integration/src/pthread/pthread_mutex_test.cpp
A libc/test/integration/src/ucontext/CMakeLists.txt
A libc/test/integration/src/ucontext/ucontext_test.cpp
M libc/test/integration/src/unistd/CMakeLists.txt
M libc/test/integration/src/unistd/getcwd_test.cpp
M libc/test/shared/CMakeLists.txt
M libc/test/shared/shared_math_constexpr_test.cpp
M libc/test/shared/shared_math_test.cpp
M libc/test/src/CMakeLists.txt
M libc/test/src/__support/threads/CMakeLists.txt
A libc/test/src/__support/threads/futex_utils_test.cpp
M libc/test/src/__support/wctype_utils_test.cpp
M libc/test/src/string/strcmp_test.cpp
M libc/test/src/strings/strcasecmp_test.cpp
M libc/test/src/strings/strncasecmp_test.cpp
M libc/test/src/sys/socket/linux/CMakeLists.txt
A libc/test/src/sys/socket/linux/socketopt_test.cpp
A libc/test/src/ucontext/CMakeLists.txt
A libc/test/src/ucontext/ucontext_test.cpp
M libc/test/src/wctype/CMakeLists.txt
A libc/test/src/wctype/iswctype_test.cpp
A libc/test/src/wctype/wctype_test.cpp
M libclc/CMakeLists.txt
M libclc/README.md
M libclc/cmake/modules/CMakeCLCInformation.cmake
M libclc/cmake/modules/CMakeDetermineCLCCompiler.cmake
M libclc/opencl/lib/generic/atomic/atomic_fetch_add.cl
M libclc/opencl/lib/generic/atomic/atomic_fetch_sub.cl
M libcxx/docs/Status/Cxx2cIssues.csv
M libcxx/include/__mdspan/mdspan.h
M libcxx/include/mdspan
M libcxx/src/ios.cpp
M libcxx/test/std/containers/views/mdspan/mdspan/deduction.pass.cpp
M libcxx/utils/ci/BOT_OWNERS.txt
M libsycl/src/CMakeLists.txt
A libsycl/src/detail/device_image_wrapper.cpp
M libsycl/src/detail/device_image_wrapper.hpp
M libsycl/src/detail/device_impl.hpp
A libsycl/src/detail/device_kernel_info.hpp
R libsycl/src/detail/kernel_id.hpp
M libsycl/src/detail/program_manager.cpp
M libsycl/src/detail/program_manager.hpp
M lld/COFF/DriverUtils.cpp
M lld/COFF/InputFiles.cpp
M lld/COFF/LTO.cpp
M lld/COFF/LTO.h
M lld/COFF/SymbolTable.cpp
M lld/ELF/AArch64ErrataFix.h
M lld/ELF/Driver.cpp
M lld/ELF/LTO.cpp
M lld/ELF/LTO.h
M lld/MachO/Arch/ARM64.cpp
M lld/MachO/ConcatOutputSection.cpp
M lld/MachO/ConcatOutputSection.h
M lld/MachO/InputSection.cpp
M lld/MachO/InputSection.h
M lld/MachO/Target.h
R lld/test/COFF/lto-libcall-archive-bitcode.test
M lld/test/COFF/subsystem.test
R lld/test/ELF/lto/libcall-archive-bitcode.test
A lld/test/MachO/arm64-thunk-branch-addend.s
R lld/test/wasm/lto/libcall-archive-bitcode.ll
M lld/wasm/LTO.cpp
M lld/wasm/LTO.h
M lld/wasm/SymbolTable.cpp
M lldb/cmake/modules/AddLLDB.cmake
M lldb/cmake/modules/FindPythonAndSwig.cmake
M lldb/docs/CMakeLists.txt
A lldb/docs/_ext/build_include.py
A lldb/docs/_ext/lldb_setting.py
A lldb/docs/_static/lldb-setting.css
M lldb/docs/conf.py
M lldb/docs/index.rst
M lldb/docs/resources/build.rst
A lldb/docs/use/settings.md
M lldb/examples/python/crashlog.py
M lldb/examples/python/crashlog_scripted_process.py
M lldb/include/lldb/API/SBVariablesOptions.h
M lldb/include/lldb/Core/Debugger.h
M lldb/include/lldb/Core/Statusline.h
M lldb/include/lldb/Interpreter/OptionGroupVariable.h
M lldb/include/lldb/Target/Process.h
M lldb/include/lldb/Target/RegisterContextUnwind.h
M lldb/include/lldb/Target/StackFrameList.h
A lldb/include/lldb/Utility/ValueType.h
M lldb/include/lldb/ValueObject/DILParser.h
M lldb/include/lldb/lldb-enumerations.h
M lldb/packages/Python/lldbsuite/test/decorators.py
M lldb/packages/Python/lldbsuite/test/lldbtest.py
M lldb/packages/Python/lldbsuite/test/lldbutil.py
A lldb/packages/Python/lldbsuite/test/make/mach_thread.h
A lldb/scripts/gen-property-docs-from-json.py
M lldb/source/API/SBVariablesOptions.cpp
M lldb/source/Commands/CommandObjectDWIMPrint.cpp
M lldb/source/Commands/CommandObjectDisassemble.cpp
M lldb/source/Commands/CommandObjectSource.cpp
M lldb/source/Commands/CommandObjectThread.cpp
M lldb/source/Core/CMakeLists.txt
M lldb/source/Core/Debugger.cpp
M lldb/source/Core/Statusline.cpp
M lldb/source/Host/common/Socket.cpp
M lldb/source/Host/common/Terminal.cpp
M lldb/source/Host/windows/PseudoConsole.cpp
M lldb/source/Interpreter/CMakeLists.txt
M lldb/source/Interpreter/CommandInterpreter.cpp
M lldb/source/Interpreter/CommandObject.cpp
M lldb/source/Interpreter/CommandReturnObject.cpp
M lldb/source/Interpreter/OptionGroupVariable.cpp
M lldb/source/Plugins/DynamicLoader/Darwin-Kernel/CMakeLists.txt
M lldb/source/Plugins/DynamicLoader/MacOSX-DYLD/DynamicLoaderMacOS.cpp
M lldb/source/Plugins/JITLoader/GDB/CMakeLists.txt
M lldb/source/Plugins/Language/CPlusPlus/CMakeLists.txt
M lldb/source/Plugins/ObjectFile/PECOFF/CMakeLists.txt
M lldb/source/Plugins/Platform/Android/CMakeLists.txt
M lldb/source/Plugins/Platform/MacOSX/CMakeLists.txt
M lldb/source/Plugins/Platform/QemuUser/CMakeLists.txt
M lldb/source/Plugins/Platform/WebAssembly/CMakeLists.txt
M lldb/source/Plugins/Process/CMakeLists.txt
M lldb/source/Plugins/Process/FreeBSD-Kernel-Core/CMakeLists.txt
M lldb/source/Plugins/Process/FreeBSD-Kernel-Core/RegisterContextFreeBSDKernelCore_x86_64.cpp
M lldb/source/Plugins/Process/FreeBSD/NativeProcessFreeBSD.cpp
M lldb/source/Plugins/Process/MacOSX-Kernel/CMakeLists.txt
M lldb/source/Plugins/Process/NetBSD/NativeProcessNetBSD.cpp
M lldb/source/Plugins/Process/Windows/Common/NativeProcessWindows.cpp
M lldb/source/Plugins/Process/gdb-remote/CMakeLists.txt
M lldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.cpp
M lldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.h
M lldb/source/Plugins/Process/scripted/ScriptedProcess.cpp
M lldb/source/Plugins/Process/scripted/ScriptedProcess.h
M lldb/source/Plugins/Process/scripted/ScriptedThread.cpp
M lldb/source/Plugins/StructuredData/DarwinLog/CMakeLists.txt
M lldb/source/Plugins/SymbolFile/DWARF/CMakeLists.txt
M lldb/source/Plugins/SymbolFile/PDB/CMakeLists.txt
M lldb/source/Plugins/SymbolLocator/Debuginfod/CMakeLists.txt
M lldb/source/Plugins/SymbolLocator/Debuginfod/SymbolLocatorDebuginfod.cpp
M lldb/source/Plugins/SymbolLocator/SymStore/CMakeLists.txt
M lldb/source/Plugins/SymbolLocator/SymStore/SymbolLocatorSymStore.cpp
M lldb/source/Plugins/Trace/CMakeLists.txt
M lldb/source/Plugins/Trace/intel-pt/CMakeLists.txt
M lldb/source/Plugins/TypeSystem/Clang/TypeSystemClang.cpp
M lldb/source/Symbol/Variable.cpp
M lldb/source/Target/CMakeLists.txt
M lldb/source/Target/Process.cpp
M lldb/source/Target/RegisterContextUnwind.cpp
M lldb/source/Target/StackFrame.cpp
M lldb/source/Target/StackFrameList.cpp
M lldb/source/Target/Target.cpp
M lldb/source/Target/Thread.cpp
M lldb/source/ValueObject/DILParser.cpp
M lldb/source/ValueObject/ValueObject.cpp
M lldb/test/API/commands/memory/read/TestMemoryRead.py
M lldb/test/API/commands/memory/read/main.c
A lldb/test/API/functionalities/breakpoint/breakpoint_command_auto_continue/Makefile
A lldb/test/API/functionalities/breakpoint/breakpoint_command_auto_continue/TestBreakpointCommandAutoContinue.py
A lldb/test/API/functionalities/breakpoint/breakpoint_command_auto_continue/bpcmd.py
A lldb/test/API/functionalities/breakpoint/breakpoint_command_auto_continue/main.cpp
M lldb/test/API/functionalities/scripted_frame_provider/TestScriptedFrameProvider.py
M lldb/test/API/functionalities/scripted_frame_provider/pass_through_prefix/TestFrameProviderPassThroughPrefix.py
M lldb/test/API/functionalities/scripted_frame_provider/thread_filter/TestFrameProviderThreadFilter.py
A lldb/test/API/functionalities/scripted_frame_provider/was_hit_deadlock/Makefile
A lldb/test/API/functionalities/scripted_frame_provider/was_hit_deadlock/TestWasHitWithFrameProviderDeadlock.py
A lldb/test/API/functionalities/scripted_frame_provider/was_hit_deadlock/bkpt_resolver.py
A lldb/test/API/functionalities/scripted_frame_provider/was_hit_deadlock/frame_provider.py
A lldb/test/API/functionalities/scripted_frame_provider/was_hit_deadlock/main.c
M lldb/test/API/functionalities/thread/thread_exit/main.cpp
M lldb/test/API/lang/c/ptrauth/TestPtrAuth.py
M lldb/test/API/lang/c/ptrauth/main.c
M lldb/test/API/linux/aarch64/mte_tag_access/TestAArch64LinuxMTEMemoryTagAccess.py
M lldb/test/API/linux/aarch64/mte_tag_access/main.c
M lldb/test/API/symstore/TestSymStore.py
M lldb/test/API/terminal/hidden_frame_markers/TestHiddenFrameMarkers.py
M lldb/test/API/tools/lldb-server/TestGdbRemoteHostInfo.py
M lldb/test/Shell/Commands/command-disassemble-process.yaml
M lldb/test/Shell/Commands/command-disassemble.s
M lldb/test/Shell/Commands/command-list-reach-beginning-of-file.test
M lldb/test/Shell/Commands/command-list-reach-end-of-file.test
M lldb/test/Shell/Driver/LocalLLDBInit.test
M lldb/test/Shell/Expr/TestClangModuleLoadError_FromExpression.test
A lldb/test/Shell/ScriptInterpreter/Python/Crashlog/Inputs/a.out.inline.crash
A lldb/test/Shell/ScriptInterpreter/Python/Crashlog/Inputs/a.out.inline.ips
A lldb/test/Shell/ScriptInterpreter/Python/Crashlog/Inputs/inline_test.c
A lldb/test/Shell/ScriptInterpreter/Python/Crashlog/inline_crashlog.test
A lldb/test/Shell/ScriptInterpreter/Python/Crashlog/inline_crashlog_json.test
M lldb/tools/debugserver/source/DNB.cpp
M lldb/tools/debugserver/source/DNB.h
M lldb/tools/debugserver/source/DNBDefs.h
M lldb/tools/debugserver/source/MacOSX/MachProcess.h
M lldb/tools/debugserver/source/MacOSX/MachProcess.mm
M lldb/tools/debugserver/source/RNBRemote.cpp
M lldb/unittests/Core/DebuggerTest.cpp
M lldb/unittests/Host/SocketTest.cpp
M lldb/unittests/Process/gdb-remote/GDBRemoteCommunicationServerLLGSTest.cpp
M llvm/cmake/config-ix.cmake
M llvm/cmake/modules/FindLibXml2.cmake
M llvm/cmake/modules/LLVMExternalProjectUtils.cmake
M llvm/docs/CommandGuide/FileCheck.rst
M llvm/docs/CommandGuide/lit.rst
M llvm/docs/CommandGuide/llvm-otool.rst
M llvm/docs/Coroutines.rst
M llvm/docs/LFI.rst
M llvm/docs/LangRef.rst
M llvm/docs/NVPTXUsage.rst
M llvm/docs/ReleaseNotes.md
M llvm/examples/Kaleidoscope/BuildingAJIT/Chapter3/KaleidoscopeJIT.h
M llvm/examples/Kaleidoscope/BuildingAJIT/Chapter4/KaleidoscopeJIT.h
M llvm/examples/OrcV2Examples/LLJITWithCustomObjectLinkingLayer/LLJITWithCustomObjectLinkingLayer.cpp
M llvm/examples/OrcV2Examples/LLJITWithExecutorProcessControl/LLJITWithExecutorProcessControl.cpp
M llvm/examples/OrcV2Examples/LLJITWithGDBRegistrationListener/LLJITWithGDBRegistrationListener.cpp
M llvm/examples/OrcV2Examples/LLJITWithObjectLinkingLayerPlugin/LLJITWithObjectLinkingLayerPlugin.cpp
M llvm/include/llvm-c/LLJIT.h
M llvm/include/llvm/ADT/GenericUniformityImpl.h
M llvm/include/llvm/ADT/bit.h
M llvm/include/llvm/Analysis/FunctionPropertiesAnalysis.h
M llvm/include/llvm/Analysis/InstCount.h
M llvm/include/llvm/Analysis/TargetTransformInfo.h
M llvm/include/llvm/Analysis/TargetTransformInfoImpl.h
M llvm/include/llvm/Analysis/UniformityAnalysis.h
M llvm/include/llvm/CodeGen/AsmPrinterAnalysis.h
M llvm/include/llvm/CodeGen/BasicTTIImpl.h
M llvm/include/llvm/CodeGen/MachineScheduler.h
M llvm/include/llvm/CodeGen/MachineUniformityAnalysis.h
M llvm/include/llvm/CodeGen/SDPatternMatch.h
M llvm/include/llvm/DebugInfo/GSYM/CallSiteInfo.h
M llvm/include/llvm/DebugInfo/GSYM/ExtractRanges.h
M llvm/include/llvm/DebugInfo/GSYM/FileEntry.h
M llvm/include/llvm/DebugInfo/GSYM/FileWriter.h
M llvm/include/llvm/DebugInfo/GSYM/FunctionInfo.h
A llvm/include/llvm/DebugInfo/GSYM/GlobalData.h
M llvm/include/llvm/DebugInfo/GSYM/GsymCreator.h
A llvm/include/llvm/DebugInfo/GSYM/GsymCreatorV1.h
A llvm/include/llvm/DebugInfo/GSYM/GsymCreatorV2.h
A llvm/include/llvm/DebugInfo/GSYM/GsymDataExtractor.h
M llvm/include/llvm/DebugInfo/GSYM/GsymReader.h
A llvm/include/llvm/DebugInfo/GSYM/GsymReaderV1.h
A llvm/include/llvm/DebugInfo/GSYM/GsymReaderV2.h
A llvm/include/llvm/DebugInfo/GSYM/GsymTypes.h
M llvm/include/llvm/DebugInfo/GSYM/Header.h
A llvm/include/llvm/DebugInfo/GSYM/HeaderV2.h
M llvm/include/llvm/DebugInfo/GSYM/InlineInfo.h
M llvm/include/llvm/DebugInfo/GSYM/LineTable.h
M llvm/include/llvm/DebugInfo/GSYM/MergedFunctionsInfo.h
M llvm/include/llvm/DebugInfo/GSYM/StringTable.h
M llvm/include/llvm/Debuginfod/Debuginfod.h
M llvm/include/llvm/ExecutionEngine/Orc/LLJIT.h
M llvm/include/llvm/ExecutionEngine/Orc/MachOBuilder.h
M llvm/include/llvm/ExecutionEngine/Orc/MachOPlatform.h
M llvm/include/llvm/FileCheck/FileCheck.h
M llvm/include/llvm/Frontend/OpenMP/OMPIRBuilder.h
M llvm/include/llvm/Frontend/OpenMP/OMPKinds.def
A llvm/include/llvm/HTTP/HTTPClient.h
A llvm/include/llvm/HTTP/HTTPServer.h
A llvm/include/llvm/HTTP/StreamedHTTPResponseHandler.h
M llvm/include/llvm/IR/IntrinsicsAArch64.td
M llvm/include/llvm/IR/IntrinsicsNVVM.td
M llvm/include/llvm/IR/IntrinsicsPowerPC.td
M llvm/include/llvm/IR/IntrinsicsRISCV.td
M llvm/include/llvm/IR/PassTimingInfo.h
M llvm/include/llvm/IR/ValueHandle.h
M llvm/include/llvm/InitializePasses.h
M llvm/include/llvm/LTO/LTO.h
M llvm/include/llvm/LTO/LTOBackend.h
M llvm/include/llvm/MC/TargetRegistry.h
M llvm/include/llvm/ObjectYAML/DWARFYAML.h
M llvm/include/llvm/Pass.h
M llvm/include/llvm/Passes/TargetPassRegistry.inc
M llvm/include/llvm/Support/BranchProbability.h
M llvm/include/llvm/Support/CodeGen.h
M llvm/include/llvm/Support/Error.h
R llvm/include/llvm/Support/HTTP/HTTPClient.h
R llvm/include/llvm/Support/HTTP/HTTPServer.h
R llvm/include/llvm/Support/HTTP/StreamedHTTPResponseHandler.h
M llvm/include/llvm/Support/UniqueBBID.h
M llvm/include/llvm/TargetParser/RISCVTargetParser.h
M llvm/include/llvm/TargetParser/Triple.h
M llvm/include/llvm/Transforms/CFGuard.h
M llvm/include/llvm/Transforms/Coroutines/CoroShape.h
M llvm/include/llvm/Transforms/IPO/LowerTypeTests.h
M llvm/include/llvm/Transforms/Scalar/GVN.h
M llvm/include/llvm/Transforms/Utils.h
A llvm/include/llvm/Transforms/Utils/StripConvergenceIntrinsics.h
M llvm/include/llvm/Transforms/Utils/ValueMapper.h
M llvm/lib/Analysis/TargetTransformInfo.cpp
M llvm/lib/Analysis/UniformityAnalysis.cpp
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/lib/CAS/MappedFileRegionArena.cpp
M llvm/lib/CMakeLists.txt
M llvm/lib/CodeGen/AtomicExpandPass.cpp
M llvm/lib/CodeGen/GlobalISel/CallLowering.cpp
M llvm/lib/CodeGen/GlobalISel/GISelValueTracking.cpp
M llvm/lib/CodeGen/InlineSpiller.cpp
M llvm/lib/CodeGen/InsertCodePrefetch.cpp
M llvm/lib/CodeGen/LiveRangeEdit.cpp
M llvm/lib/CodeGen/MIRPrinter.cpp
M llvm/lib/CodeGen/MachineBlockPlacement.cpp
M llvm/lib/CodeGen/MachineCopyPropagation.cpp
M llvm/lib/CodeGen/MachineFunction.cpp
M llvm/lib/CodeGen/MachineInstr.cpp
M llvm/lib/CodeGen/MachineScheduler.cpp
M llvm/lib/CodeGen/MachineUniformityAnalysis.cpp
M llvm/lib/CodeGen/MacroFusion.cpp
M llvm/lib/CodeGen/RegAllocBase.cpp
M llvm/lib/CodeGen/RegAllocGreedy.cpp
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/lib/DebugInfo/DWARF/DWARFAcceleratorTable.cpp
M llvm/lib/DebugInfo/DWARF/DWARFCFIPrinter.cpp
M llvm/lib/DebugInfo/DWARF/DWARFContext.cpp
M llvm/lib/DebugInfo/DWARF/DWARFDebugFrame.cpp
M llvm/lib/DebugInfo/DWARF/DWARFDebugLine.cpp
M llvm/lib/DebugInfo/DWARF/DWARFDebugMacro.cpp
M llvm/lib/DebugInfo/DWARF/DWARFDebugPubTable.cpp
M llvm/lib/DebugInfo/DWARF/DWARFDebugRangeList.cpp
M llvm/lib/DebugInfo/DWARF/DWARFDebugRnglists.cpp
M llvm/lib/DebugInfo/DWARF/DWARFDie.cpp
M llvm/lib/DebugInfo/DWARF/DWARFExpressionPrinter.cpp
M llvm/lib/DebugInfo/DWARF/DWARFGdbIndex.cpp
M llvm/lib/DebugInfo/DWARF/DWARFListTable.cpp
M llvm/lib/DebugInfo/DWARF/DWARFTypeUnit.cpp
M llvm/lib/DebugInfo/DWARF/DWARFUnitIndex.cpp
M llvm/lib/DebugInfo/DWARF/DWARFUnwindTablePrinter.cpp
M llvm/lib/DebugInfo/GSYM/CMakeLists.txt
M llvm/lib/DebugInfo/GSYM/CallSiteInfo.cpp
M llvm/lib/DebugInfo/GSYM/DwarfTransformer.cpp
M llvm/lib/DebugInfo/GSYM/ExtractRanges.cpp
M llvm/lib/DebugInfo/GSYM/FileWriter.cpp
M llvm/lib/DebugInfo/GSYM/FunctionInfo.cpp
A llvm/lib/DebugInfo/GSYM/GlobalData.cpp
M llvm/lib/DebugInfo/GSYM/GsymCreator.cpp
A llvm/lib/DebugInfo/GSYM/GsymCreatorV1.cpp
A llvm/lib/DebugInfo/GSYM/GsymCreatorV2.cpp
M llvm/lib/DebugInfo/GSYM/GsymReader.cpp
A llvm/lib/DebugInfo/GSYM/GsymReaderV1.cpp
A llvm/lib/DebugInfo/GSYM/GsymReaderV2.cpp
M llvm/lib/DebugInfo/GSYM/Header.cpp
A llvm/lib/DebugInfo/GSYM/HeaderV2.cpp
M llvm/lib/DebugInfo/GSYM/InlineInfo.cpp
M llvm/lib/DebugInfo/GSYM/LineTable.cpp
M llvm/lib/DebugInfo/GSYM/MergedFunctionsInfo.cpp
M llvm/lib/DebugInfo/LogicalView/Core/LVCompare.cpp
M llvm/lib/DebugInfo/LogicalView/Core/LVElement.cpp
M llvm/lib/DebugInfo/LogicalView/Core/LVLocation.cpp
M llvm/lib/DebugInfo/LogicalView/Core/LVObject.cpp
M llvm/lib/DebugInfo/LogicalView/Core/LVRange.cpp
M llvm/lib/DebugInfo/LogicalView/Core/LVReader.cpp
M llvm/lib/DebugInfo/LogicalView/Core/LVScope.cpp
M llvm/lib/DebugInfo/LogicalView/Readers/LVBinaryReader.cpp
M llvm/lib/DebugInfo/LogicalView/Readers/LVCodeViewVisitor.cpp
M llvm/lib/DebugInfo/LogicalView/Readers/LVDWARFReader.cpp
M llvm/lib/DebugInfo/Symbolize/Symbolize.cpp
M llvm/lib/Debuginfod/CMakeLists.txt
M llvm/lib/Debuginfod/Debuginfod.cpp
M llvm/lib/ExecutionEngine/Orc/LLJIT.cpp
M llvm/lib/ExecutionEngine/Orc/MachOPlatform.cpp
M llvm/lib/ExecutionEngine/Orc/OrcV2CBindings.cpp
M llvm/lib/FileCheck/FileCheck.cpp
M llvm/lib/FileCheck/FileCheckImpl.h
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
A llvm/lib/HTTP/CMakeLists.txt
A llvm/lib/HTTP/HTTPClient.cpp
A llvm/lib/HTTP/HTTPServer.cpp
A llvm/lib/HTTP/StreamedHTTPResponseHandler.cpp
M llvm/lib/IR/Instruction.cpp
M llvm/lib/IR/Verifier.cpp
M llvm/lib/IRReader/IRReader.cpp
M llvm/lib/LTO/LTO.cpp
M llvm/lib/LTO/LTOBackend.cpp
M llvm/lib/LTO/LTOCodeGenerator.cpp
M llvm/lib/LTO/ThinLTOCodeGenerator.cpp
M llvm/lib/Linker/IRMover.cpp
M llvm/lib/MC/MCAssembler.cpp
M llvm/lib/MC/MCLFI.cpp
M llvm/lib/MC/TargetRegistry.cpp
M llvm/lib/ObjectYAML/DWARFEmitter.cpp
M llvm/lib/ObjectYAML/DWARFYAML.cpp
M llvm/lib/Passes/PassBuilder.cpp
M llvm/lib/Passes/PassBuilderPipelines.cpp
M llvm/lib/Passes/PassRegistry.def
M llvm/lib/Support/CMakeLists.txt
R llvm/lib/Support/HTTP/CMakeLists.txt
R llvm/lib/Support/HTTP/HTTPClient.cpp
R llvm/lib/Support/HTTP/HTTPServer.cpp
R llvm/lib/Support/HTTP/StreamedHTTPResponseHandler.cpp
M llvm/lib/Support/KnownFPClass.cpp
M llvm/lib/Target/AArch64/AArch64.h
M llvm/lib/Target/AArch64/AArch64.td
M llvm/lib/Target/AArch64/AArch64Arm64ECCallLowering.cpp
M llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
M llvm/lib/Target/AArch64/AArch64ExpandPseudoInsts.cpp
M llvm/lib/Target/AArch64/AArch64Features.td
M llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64InstrFormats.td
M llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.h
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/lib/Target/AArch64/AArch64PassRegistry.def
M llvm/lib/Target/AArch64/AArch64Processors.td
M llvm/lib/Target/AArch64/AArch64RedundantCondBranchPass.cpp
M llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp
M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
A llvm/lib/Target/AArch64/AArch64SchedC1Ultra.td
M llvm/lib/Target/AArch64/AArch64SchedPredNeoverse.td
M llvm/lib/Target/AArch64/AArch64SchedPredicates.td
M llvm/lib/Target/AArch64/AArch64SystemOperands.td
M llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.h
M llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.h
M llvm/lib/Target/AArch64/GISel/AArch64PostLegalizerLowering.cpp
M llvm/lib/Target/AArch64/GISel/AArch64PostSelectOptimize.cpp
A llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCLFIRewriter.cpp
A llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCLFIRewriter.h
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCTargetDesc.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/CMakeLists.txt
M llvm/lib/Target/AArch64/SVEInstrFormats.td
M llvm/lib/Target/AMDGPU/AMDGPU.h
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
M llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.h
M llvm/lib/Target/AMDGPU/AMDGPULowerExecSync.cpp
M llvm/lib/Target/AMDGPU/AMDGPULowerIntrinsics.cpp
M llvm/lib/Target/AMDGPU/AMDGPULowerModuleLDSPass.cpp
A llvm/lib/Target/AMDGPU/AMDGPUNextUseAnalysis.cpp
A llvm/lib/Target/AMDGPU/AMDGPUNextUseAnalysis.h
M llvm/lib/Target/AMDGPU/AMDGPUPassRegistry.def
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeHelper.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeHelper.h
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.h
M llvm/lib/Target/AMDGPU/AMDGPUSearchableTables.td
M llvm/lib/Target/AMDGPU/AMDGPUSplitModule.cpp
M llvm/lib/Target/AMDGPU/AMDGPUSwLowerLDS.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.h
M llvm/lib/Target/AMDGPU/AMDGPUUnifyDivergentExitNodes.cpp
M llvm/lib/Target/AMDGPU/CMakeLists.txt
M llvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
M llvm/lib/Target/AMDGPU/SIInstructions.td
M llvm/lib/Target/AMDGPU/SISchedule.td
M llvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp
M llvm/lib/Target/AMDGPU/SOPInstructions.td
M llvm/lib/Target/AMDGPU/VOP1Instructions.td
M llvm/lib/Target/AMDGPU/VOP3Instructions.td
M llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp
M llvm/lib/Target/ARM/ARMTargetMachine.cpp
M llvm/lib/Target/ARM/ARMTargetTransformInfo.cpp
M llvm/lib/Target/ARM/ARMTargetTransformInfo.h
M llvm/lib/Target/BPF/BPFAsmPrinter.cpp
M llvm/lib/Target/BPF/BPFAsmPrinter.h
M llvm/lib/Target/BPF/BPFISelLowering.cpp
M llvm/lib/Target/BPF/BPFISelLowering.h
M llvm/lib/Target/BPF/BTFDebug.cpp
M llvm/lib/Target/DirectX/DXILOpLowering.cpp
M llvm/lib/Target/DirectX/DirectXTargetMachine.cpp
M llvm/lib/Target/Hexagon/HexagonISelLoweringHVX.cpp
M llvm/lib/Target/Hexagon/HexagonPatterns.td
M llvm/lib/Target/LoongArch/LoongArchISelDAGToDAG.cpp
M llvm/lib/Target/LoongArch/LoongArchISelDAGToDAG.h
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/lib/Target/LoongArch/LoongArchISelLowering.h
M llvm/lib/Target/LoongArch/LoongArchLASXInstrInfo.td
M llvm/lib/Target/LoongArch/LoongArchLSXInstrInfo.td
M llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp
M llvm/lib/Target/NVPTX/NVPTXIntrinsics.td
M llvm/lib/Target/NVPTX/NVVMIntrRange.cpp
M llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
M llvm/lib/Target/PowerPC/PPCISelLowering.cpp
M llvm/lib/Target/PowerPC/PPCISelLowering.h
M llvm/lib/Target/PowerPC/PPCInstr64Bit.td
M llvm/lib/Target/PowerPC/PPCInstrFuture.td
M llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
M llvm/lib/Target/PowerPC/PPCInstrInfo.h
M llvm/lib/Target/PowerPC/PPCInstrInfo.td
M llvm/lib/Target/PowerPC/PPCInstrP10.td
M llvm/lib/Target/RISCV/GISel/RISCVInstructionSelector.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVInstPrinter.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVMatInt.cpp
M llvm/lib/Target/RISCV/RISCVCallingConv.cpp
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVIndirectBranchTracking.cpp
M llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfo.h
M llvm/lib/Target/RISCV/RISCVInstrInfo.td
M llvm/lib/Target/RISCV/RISCVInstrInfoP.td
M llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
M llvm/lib/Target/RISCV/RISCVInstrInfoVSDPatterns.td
M llvm/lib/Target/RISCV/RISCVInstrInfoZvzip.td
M llvm/lib/Target/RISCV/RISCVLandingPadSetup.cpp
M llvm/lib/Target/RISCV/RISCVMachineFunctionInfo.cpp
M llvm/lib/Target/RISCV/RISCVMachineFunctionInfo.h
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
M llvm/lib/Target/SPIRV/CMakeLists.txt
M llvm/lib/Target/SPIRV/SPIRV.h
M llvm/lib/Target/SPIRV/SPIRVBuiltins.cpp
M llvm/lib/Target/SPIRV/SPIRVBuiltins.td
M llvm/lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
M llvm/lib/Target/SPIRV/SPIRVPreLegalizer.cpp
R llvm/lib/Target/SPIRV/SPIRVStripConvergentIntrinsics.cpp
M llvm/lib/Target/SPIRV/SPIRVTargetMachine.cpp
M llvm/lib/Target/SystemZ/SystemZMachineScheduler.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyInstrMemory.td
M llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
M llvm/lib/Target/X86/X86CallingConv.td
M llvm/lib/Target/X86/X86CodeGenPassBuilder.cpp
M llvm/lib/Target/X86/X86CompressEVEX.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86InstrInfo.cpp
M llvm/lib/Target/X86/X86RegisterInfo.cpp
M llvm/lib/Target/X86/X86TargetMachine.cpp
M llvm/lib/TargetParser/TargetDataLayout.cpp
M llvm/lib/TargetParser/TargetParser.cpp
M llvm/lib/TargetParser/Triple.cpp
M llvm/lib/Transforms/AggressiveInstCombine/AggressiveInstCombine.cpp
M llvm/lib/Transforms/CFGuard/CFGuard.cpp
M llvm/lib/Transforms/Coroutines/CoroEarly.cpp
M llvm/lib/Transforms/Coroutines/Coroutines.cpp
M llvm/lib/Transforms/IPO/FunctionAttrs.cpp
M llvm/lib/Transforms/IPO/LowerTypeTests.cpp
M llvm/lib/Transforms/IPO/SampleProfileMatcher.cpp
M llvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
M llvm/lib/Transforms/Instrumentation/HWAddressSanitizer.cpp
M llvm/lib/Transforms/Scalar/GVN.cpp
M llvm/lib/Transforms/Scalar/LoopBoundSplit.cpp
M llvm/lib/Transforms/Scalar/LoopUnrollPass.cpp
M llvm/lib/Transforms/Utils/CMakeLists.txt
M llvm/lib/Transforms/Utils/LoopUnroll.cpp
M llvm/lib/Transforms/Utils/LoopUnrollRuntime.cpp
M llvm/lib/Transforms/Utils/LoopUtils.cpp
A llvm/lib/Transforms/Utils/StripConvergenceIntrinsics.cpp
M llvm/lib/Transforms/Utils/ValueMapper.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.h
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/lib/Transforms/Vectorize/VPRecipeBuilder.h
M llvm/lib/Transforms/Vectorize/VPlan.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanAnalysis.cpp
M llvm/lib/Transforms/Vectorize/VPlanHelpers.h
M llvm/lib/Transforms/Vectorize/VPlanPatternMatch.h
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.h
M llvm/lib/Transforms/Vectorize/VPlanUnroll.cpp
M llvm/lib/XRay/InstrumentationMap.cpp
M llvm/lib/XRay/Profile.cpp
M llvm/lib/XRay/Trace.cpp
M llvm/runtimes/CMakeLists.txt
M llvm/test/Analysis/CostModel/AArch64/cttz.ll
M llvm/test/Analysis/CostModel/AArch64/fptoi_sat.ll
M llvm/test/Analysis/CostModel/AArch64/masked-divrem.ll
M llvm/test/Analysis/CostModel/AArch64/masked_ldst.ll
M llvm/test/Analysis/CostModel/AArch64/masked_ldst_vls.ll
A llvm/test/Analysis/CostModel/AArch64/sve-fptoi_sat.ll
M llvm/test/Analysis/CostModel/RISCV/arith-int.ll
M llvm/test/Analysis/CostModel/RISCV/masked-divrem.ll
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/always_uniform.ll
M llvm/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-inline-asm.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-unwind-inline-asm.ll
A llvm/test/CodeGen/AArch64/GlobalISel/knownfpclass.ll
M llvm/test/CodeGen/AArch64/GlobalISel/lower-neon-vector-fcmp.mir
M llvm/test/CodeGen/AArch64/GlobalISel/postlegalizer-lowering-rev.mir
M llvm/test/CodeGen/AArch64/GlobalISel/postlegalizer-lowering-shuf-to-ins.mir
M llvm/test/CodeGen/AArch64/GlobalISel/postlegalizer-lowering-uzp.mir
M llvm/test/CodeGen/AArch64/GlobalISel/postlegalizer-lowering-zip.mir
M llvm/test/CodeGen/AArch64/GlobalISel/postselectopt-constrain-new-regop.mir
M llvm/test/CodeGen/AArch64/GlobalISel/postselectopt-dead-cc-defs-in-fcmp.mir
M llvm/test/CodeGen/AArch64/GlobalISel/postselectopt-dead-cc-defs.mir
M llvm/test/CodeGen/AArch64/GlobalISel/postselectopt-xclass-copies.mir
M llvm/test/CodeGen/AArch64/GlobalISel/rbs-matrixindex-regclass-crash.mir
M llvm/test/CodeGen/AArch64/GlobalISel/regbank-inlineasm.mir
M llvm/test/CodeGen/AArch64/aarch64-sme2-asm.ll
M llvm/test/CodeGen/AArch64/aarch64-sve-asm.ll
M llvm/test/CodeGen/AArch64/aarch64-za-clobber.ll
M llvm/test/CodeGen/AArch64/active_lane_mask.ll
M llvm/test/CodeGen/AArch64/arm64-stur.ll
M llvm/test/CodeGen/AArch64/arm64-zip.ll
M llvm/test/CodeGen/AArch64/branch-relax-cross-section.mir
M llvm/test/CodeGen/AArch64/callbr-asm-outputs-indirect-isel.ll
M llvm/test/CodeGen/AArch64/cbz_wzr.mir
M llvm/test/CodeGen/AArch64/cfguard-module-flag.ll
M llvm/test/CodeGen/AArch64/combine-storetomstore.ll
M llvm/test/CodeGen/AArch64/complex-deinterleaving-reductions-predicated-scalable.ll
M llvm/test/CodeGen/AArch64/cttz.ll
M llvm/test/CodeGen/AArch64/dag-combine-concat-vectors.ll
M llvm/test/CodeGen/AArch64/dup.ll
M llvm/test/CodeGen/AArch64/emit_fneg_with_non_register_operand.mir
M llvm/test/CodeGen/AArch64/extract-vector-elt-sve.ll
M llvm/test/CodeGen/AArch64/f16f32dot-fixed-length-fdot.ll
M llvm/test/CodeGen/AArch64/intrinsic-cttz-elts-sve.ll
M llvm/test/CodeGen/AArch64/intrinsic-vector-match-sve2.ll
M llvm/test/CodeGen/AArch64/jump-table-compress.mir
M llvm/test/CodeGen/AArch64/machine-latecleanup-inlineasm.mir
A llvm/test/CodeGen/AArch64/macro-fusion-cluster-conflict.mir
M llvm/test/CodeGen/AArch64/masked-sdiv-fixed-length.ll
M llvm/test/CodeGen/AArch64/masked-sdiv-scalable.ll
M llvm/test/CodeGen/AArch64/masked-udiv-fixed-length.ll
M llvm/test/CodeGen/AArch64/masked-udiv-scalable.ll
M llvm/test/CodeGen/AArch64/merge-store.ll
M llvm/test/CodeGen/AArch64/misched-fusion-cmp.mir
M llvm/test/CodeGen/AArch64/nested-iv-regalloc.mir
R llvm/test/CodeGen/AArch64/pcdphint-atomic-store.ll
M llvm/test/CodeGen/AArch64/peephole-insvigpr.mir
M llvm/test/CodeGen/AArch64/pr86717.ll
M llvm/test/CodeGen/AArch64/ptrauth-isel.ll
M llvm/test/CodeGen/AArch64/rcpc3-sve.ll
M llvm/test/CodeGen/AArch64/remat-fmov-vector-imm.mir
M llvm/test/CodeGen/AArch64/shrinkwrap-split-restore-point.mir
M llvm/test/CodeGen/AArch64/sme-pstate-sm-changing-call-disable-coalescing.ll
M llvm/test/CodeGen/AArch64/st1-lane.ll
M llvm/test/CodeGen/AArch64/sve-bf16-compares.ll
M llvm/test/CodeGen/AArch64/sve-cmp-select.ll
A llvm/test/CodeGen/AArch64/sve-distinct-predicate-dst.ll
M llvm/test/CodeGen/AArch64/sve-fcvt.ll
M llvm/test/CodeGen/AArch64/sve-fixed-length-extract-subvector.ll
M llvm/test/CodeGen/AArch64/sve-fixed-length-fp-select.ll
M llvm/test/CodeGen/AArch64/sve-fixed-length-insert-vector-elt.ll
M llvm/test/CodeGen/AArch64/sve-fixed-length-int-select.ll
M llvm/test/CodeGen/AArch64/sve-fixed-length-int-vselect.ll
M llvm/test/CodeGen/AArch64/sve-fixed-length-masked-128bit-loads.ll
M llvm/test/CodeGen/AArch64/sve-fixed-length-masked-128bit-stores.ll
A llvm/test/CodeGen/AArch64/sve-fixed-length-masked-div.ll
M llvm/test/CodeGen/AArch64/sve-fixed-length-masked-gather.ll
M llvm/test/CodeGen/AArch64/sve-fixed-length-masked-loads.ll
A llvm/test/CodeGen/AArch64/sve-fixed-length-masked-rem.ll
M llvm/test/CodeGen/AArch64/sve-fixed-length-masked-scatter.ll
M llvm/test/CodeGen/AArch64/sve-fixed-length-masked-stores.ll
M llvm/test/CodeGen/AArch64/sve-fixed-length-subvector.ll
M llvm/test/CodeGen/AArch64/sve-insert-element.ll
M llvm/test/CodeGen/AArch64/sve-intrinsics-int-compares.ll
M llvm/test/CodeGen/AArch64/sve-ld-post-inc.ll
M llvm/test/CodeGen/AArch64/sve-load-compare-store.ll
M llvm/test/CodeGen/AArch64/sve-mask-partition.ll
M llvm/test/CodeGen/AArch64/sve-masked-compressstore.ll
M llvm/test/CodeGen/AArch64/sve-nontemporal-masked-ldst.ll
M llvm/test/CodeGen/AArch64/sve-pred-selectop.ll
M llvm/test/CodeGen/AArch64/sve-pred-selectop2.ll
M llvm/test/CodeGen/AArch64/sve-pred-selectop3.ll
M llvm/test/CodeGen/AArch64/sve-ptest-removal-brk.ll
M llvm/test/CodeGen/AArch64/sve-ptest-removal-cmpeq.ll
M llvm/test/CodeGen/AArch64/sve-ptest-removal-cmpge.ll
M llvm/test/CodeGen/AArch64/sve-ptest-removal-cmpgt.ll
M llvm/test/CodeGen/AArch64/sve-ptest-removal-cmphi.ll
M llvm/test/CodeGen/AArch64/sve-ptest-removal-cmphs.ll
M llvm/test/CodeGen/AArch64/sve-ptest-removal-cmple.ll
M llvm/test/CodeGen/AArch64/sve-ptest-removal-cmplo.ll
M llvm/test/CodeGen/AArch64/sve-ptest-removal-cmpls.ll
M llvm/test/CodeGen/AArch64/sve-ptest-removal-cmplt.ll
M llvm/test/CodeGen/AArch64/sve-ptest-removal-cmpne.ll
M llvm/test/CodeGen/AArch64/sve-ptest-removal-log.ll
M llvm/test/CodeGen/AArch64/sve-ptest-removal-match.ll
M llvm/test/CodeGen/AArch64/sve-punpklo-combine.ll
A llvm/test/CodeGen/AArch64/sve-regalloc-hint-unique-predicate-dst.mir
M llvm/test/CodeGen/AArch64/sve-scmp.ll
M llvm/test/CodeGen/AArch64/sve-select.ll
M llvm/test/CodeGen/AArch64/sve-setcc.ll
M llvm/test/CodeGen/AArch64/sve-sext-zext.ll
M llvm/test/CodeGen/AArch64/sve-smulo-sdnode.ll
M llvm/test/CodeGen/AArch64/sve-split-insert-elt.ll
M llvm/test/CodeGen/AArch64/sve-split-int-pred-reduce.ll
M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-fp-select.ll
M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-fp-vselect.ll
M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-insert-vector-elt.ll
M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-int-compares.ll
M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-int-immediates.ll
M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-int-select.ll
M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-int-vselect.ll
M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-masked-gather-scatter.ll
M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-masked-load.ll
M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-masked-store.ll
M llvm/test/CodeGen/AArch64/sve-trunc.ll
M llvm/test/CodeGen/AArch64/sve-ucmp.ll
M llvm/test/CodeGen/AArch64/sve-umulo-sdnode.ll
M llvm/test/CodeGen/AArch64/sve-vector-compress.ll
M llvm/test/CodeGen/AArch64/vec-combine-compare-to-bitmask.ll
A llvm/test/CodeGen/AArch64/vector-absolute-difference.ll
M llvm/test/CodeGen/AArch64/wineh9.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/fdiv.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fdiv.f32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fdiv.f64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/inline-asm-mismatched-size.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.i16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.i8.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-inline-asm.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.div.scale.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankcombiner-ignore-copies-crash.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-fexp2.mir
A llvm/test/CodeGen/AMDGPU/GlobalISel/trunc-brc.ll
A llvm/test/CodeGen/AMDGPU/NextUseAnalysis/acyclic-014bb.mir
A llvm/test/CodeGen/AMDGPU/NextUseAnalysis/acyclic-770bb.mir
A llvm/test/CodeGen/AMDGPU/NextUseAnalysis/acyclic-cfg-with-self-loop.mir
A llvm/test/CodeGen/AMDGPU/NextUseAnalysis/acyclic-phi-merge-distances.mir
A llvm/test/CodeGen/AMDGPU/NextUseAnalysis/complex-acyclic-cfg-with-4-self-loops.mir
A llvm/test/CodeGen/AMDGPU/NextUseAnalysis/complex-control-flow-11blocks.mir
A llvm/test/CodeGen/AMDGPU/NextUseAnalysis/complex-control-flow-15blocks.mir
A llvm/test/CodeGen/AMDGPU/NextUseAnalysis/complex-single-loop-a.mir
A llvm/test/CodeGen/AMDGPU/NextUseAnalysis/complex-single-loop.mir
A llvm/test/CodeGen/AMDGPU/NextUseAnalysis/double-nested-loops-complex-cfg.mir
A llvm/test/CodeGen/AMDGPU/NextUseAnalysis/if_else_with_loops_nested_in_2_outer_loops.mir
A llvm/test/CodeGen/AMDGPU/NextUseAnalysis/inner_cfg_in_2_nested_loops.mir
A llvm/test/CodeGen/AMDGPU/NextUseAnalysis/loop_nested_in_3_outer_loops_complex_cfg.mir
A llvm/test/CodeGen/AMDGPU/NextUseAnalysis/nested-loops-with-side-exits-a.mir
A llvm/test/CodeGen/AMDGPU/NextUseAnalysis/sequence_2_loops.mir
A llvm/test/CodeGen/AMDGPU/NextUseAnalysis/simple-loop-3blocks.mir
A llvm/test/CodeGen/AMDGPU/NextUseAnalysis/spill-vreg-many-lanes.mir
A llvm/test/CodeGen/AMDGPU/NextUseAnalysis/test_ers_basic_case.mir
A llvm/test/CodeGen/AMDGPU/NextUseAnalysis/test_ers_do_not_spill_restore_inside_loop.mir
A llvm/test/CodeGen/AMDGPU/NextUseAnalysis/test_ers_emit_restore_in_common_dominator.mir
A llvm/test/CodeGen/AMDGPU/NextUseAnalysis/test_ers_emit_restore_in_loop_preheader1.mir
A llvm/test/CodeGen/AMDGPU/NextUseAnalysis/test_ers_emit_restore_in_loop_preheader2.mir
A llvm/test/CodeGen/AMDGPU/NextUseAnalysis/test_ers_emit_restore_in_loop_preheader3.mir
A llvm/test/CodeGen/AMDGPU/NextUseAnalysis/test_ers_emit_restore_in_loop_preheader4.mir
A llvm/test/CodeGen/AMDGPU/NextUseAnalysis/test_ers_keep_spilled_reg_live.mir
A llvm/test/CodeGen/AMDGPU/NextUseAnalysis/test_ers_multiple_spills1.mir
A llvm/test/CodeGen/AMDGPU/NextUseAnalysis/test_ers_multiple_spills2.mir
A llvm/test/CodeGen/AMDGPU/NextUseAnalysis/test_ers_multiple_spills3.mir
A llvm/test/CodeGen/AMDGPU/NextUseAnalysis/test_ers_nested_loops.mir
A llvm/test/CodeGen/AMDGPU/NextUseAnalysis/test_ers_spill_in_common_dominator_and_optimize_restores.mir
A llvm/test/CodeGen/AMDGPU/NextUseAnalysis/test_ers_spill_loop_livethrough_reg.mir
A llvm/test/CodeGen/AMDGPU/NextUseAnalysis/test_ers_spill_loop_value_in_exit_block.mir
A llvm/test/CodeGen/AMDGPU/NextUseAnalysis/three-tier-ranking-nested-loops.mir
A llvm/test/CodeGen/AMDGPU/NextUseAnalysis/triple-nested-loops.mir
A llvm/test/CodeGen/AMDGPU/NextUseAnalysis/two-sequential-loops.mir
M llvm/test/CodeGen/AMDGPU/add.v2i16.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.128bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.16bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.48bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.64bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.96bit.ll
A llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-alloca-placement.ll
M llvm/test/CodeGen/AMDGPU/async-buffer-loads.ll
M llvm/test/CodeGen/AMDGPU/asyncmark-gfx12plus.ll
M llvm/test/CodeGen/AMDGPU/asyncmark-pregfx12.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_global_pointer.ll
M llvm/test/CodeGen/AMDGPU/atomicrmw-bf16-gfx11plus.ll
M llvm/test/CodeGen/AMDGPU/bf16-conversions.ll
M llvm/test/CodeGen/AMDGPU/bf16-math.ll
M llvm/test/CodeGen/AMDGPU/bf16.ll
M llvm/test/CodeGen/AMDGPU/branch-relax-indirect-branch.mir
M llvm/test/CodeGen/AMDGPU/branch-relax-no-terminators.mir
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fmax.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fmin.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointers-memcpy.ll
M llvm/test/CodeGen/AMDGPU/buffer-intrinsics-mmo-offsets.ll
M llvm/test/CodeGen/AMDGPU/build_vector.gfx11plus.ll
M llvm/test/CodeGen/AMDGPU/call-defs-mode-register.ll
M llvm/test/CodeGen/AMDGPU/coalesce-copy-to-agpr-to-av-registers.mir
M llvm/test/CodeGen/AMDGPU/coalescer-early-clobber-subreg.mir
M llvm/test/CodeGen/AMDGPU/dagcombine-fmul-sel.ll
M llvm/test/CodeGen/AMDGPU/dagcombine-select.ll
M llvm/test/CodeGen/AMDGPU/divergence-driven-buildvector.ll
M llvm/test/CodeGen/AMDGPU/dst-sel-hazard.mir
M llvm/test/CodeGen/AMDGPU/endpgm-dce.mir
M llvm/test/CodeGen/AMDGPU/fabs.bf16.ll
M llvm/test/CodeGen/AMDGPU/fcanonicalize-elimination.bf16.ll
M llvm/test/CodeGen/AMDGPU/fcanonicalize.bf16.ll
M llvm/test/CodeGen/AMDGPU/fcanonicalize.f16.ll
M llvm/test/CodeGen/AMDGPU/fdiv.bf16.ll
M llvm/test/CodeGen/AMDGPU/fdiv.f16.ll
M llvm/test/CodeGen/AMDGPU/fdiv.ll
M llvm/test/CodeGen/AMDGPU/fdiv_flags.f32.ll
M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fmax.ll
M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fmin.ll
M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fsub.ll
M llvm/test/CodeGen/AMDGPU/flat-saddr-load.ll
M llvm/test/CodeGen/AMDGPU/fmax3-maximumnum.ll
M llvm/test/CodeGen/AMDGPU/fmed3.bf16.ll
M llvm/test/CodeGen/AMDGPU/fmin3-minimumnum.ll
M llvm/test/CodeGen/AMDGPU/fptosi-sat-vector.ll
M llvm/test/CodeGen/AMDGPU/fptoui-sat-vector.ll
M llvm/test/CodeGen/AMDGPU/freeze-binary.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fmax.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fmin.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fsub.ll
M llvm/test/CodeGen/AMDGPU/global-load-xcnt.ll
M llvm/test/CodeGen/AMDGPU/global-saddr-load.ll
M llvm/test/CodeGen/AMDGPU/hazards-gfx950.mir
M llvm/test/CodeGen/AMDGPU/hsa.ll
M llvm/test/CodeGen/AMDGPU/indirect-reg-read-imm-idx.ll
M llvm/test/CodeGen/AMDGPU/inflate-reg-class-vgpr-mfma-to-av-with-load-source.mir
M llvm/test/CodeGen/AMDGPU/inline-asm.i128.ll
M llvm/test/CodeGen/AMDGPU/isel-amdgpu-cs-chain-preserve-cc.ll
A llvm/test/CodeGen/AMDGPU/lds-link-time-codegen-named-barrier.ll
A llvm/test/CodeGen/AMDGPU/lds-link-time-codegen.ll
A llvm/test/CodeGen/AMDGPU/lds-link-time-named-barrier.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.add.min.max.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ballot.i32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.fp8.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.scalef32.sr.pk.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.exp2.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.global.load.async.to.lds.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.global.store.async.from.lds.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.iglp.opt.exp.large.mir
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.iglp.opt.exp.small.mir
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.perm.pk.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.add.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.and.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.fadd.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.fmax.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.fmin.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.fsub.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.max.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.min.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.or.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.sub.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.umax.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.umin.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.xor.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.barrier.signal.isfirst.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.buffer.prefetch.data.ll
M llvm/test/CodeGen/AMDGPU/llvm.exp2.bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.log.ll
M llvm/test/CodeGen/AMDGPU/llvm.log10.ll
M llvm/test/CodeGen/AMDGPU/llvm.log2.ll
M llvm/test/CodeGen/AMDGPU/local-stack-alloc-add-references.gfx10.mir
M llvm/test/CodeGen/AMDGPU/local-stack-alloc-add-references.gfx8.mir
M llvm/test/CodeGen/AMDGPU/local-stack-alloc-add-references.gfx9.mir
A llvm/test/CodeGen/AMDGPU/lower-intrinsics-noalias-metadata.ll
A llvm/test/CodeGen/AMDGPU/lower-module-lds-link-time-classify.ll
A llvm/test/CodeGen/AMDGPU/lower-module-lds-link-time-global-scope.ll
A llvm/test/CodeGen/AMDGPU/lower-module-lds-link-time-internal-func.ll
A llvm/test/CodeGen/AMDGPU/lower-module-lds-link-time-internal-multi-user.ll
A llvm/test/CodeGen/AMDGPU/machine-scheduler-revert-slot-monotonicity.mir
M llvm/test/CodeGen/AMDGPU/machine-scheduler-sink-trivial-remats.mir
M llvm/test/CodeGen/AMDGPU/machine-sink-cycle.mir
M llvm/test/CodeGen/AMDGPU/machine-sink-loop-var-out-of-divergent-loop-swdev407790.mir
M llvm/test/CodeGen/AMDGPU/mad-mix-bf16.ll
M llvm/test/CodeGen/AMDGPU/mad-mix-hi-bf16.ll
M llvm/test/CodeGen/AMDGPU/mad-mix-hi.ll
M llvm/test/CodeGen/AMDGPU/mai-hazards.mir
M llvm/test/CodeGen/AMDGPU/maximumnum.bf16.ll
M llvm/test/CodeGen/AMDGPU/minimumnum.bf16.ll
M llvm/test/CodeGen/AMDGPU/minmax3-tree-reduction.ll
A llvm/test/CodeGen/AMDGPU/new-pm-machine-analysis.mir
M llvm/test/CodeGen/AMDGPU/no-limit-coalesce.mir
M llvm/test/CodeGen/AMDGPU/optimize-exec-mask-pre-ra-no-fold-exec-copy.mir
M llvm/test/CodeGen/AMDGPU/partial-regcopy-and-spill-missed-at-regalloc.ll
M llvm/test/CodeGen/AMDGPU/regalloc-failure-overlapping-insert-assert.mir
M llvm/test/CodeGen/AMDGPU/regalloc-undef-copy-fold.mir
M llvm/test/CodeGen/AMDGPU/remaining-virtual-register-operands.mir
M llvm/test/CodeGen/AMDGPU/rename-independent-subregs.mir
M llvm/test/CodeGen/AMDGPU/repeated-divisor.ll
M llvm/test/CodeGen/AMDGPU/returnaddress.ll
M llvm/test/CodeGen/AMDGPU/rewrite-vgpr-mfma-to-agpr-copy-from.mir
M llvm/test/CodeGen/AMDGPU/rewrite-vgpr-mfma-to-agpr-subreg-insert-extract.mir
M llvm/test/CodeGen/AMDGPU/rewrite-vgpr-mfma-to-agpr-subreg-src2-chain.mir
M llvm/test/CodeGen/AMDGPU/rsq.f32-safe.ll
M llvm/test/CodeGen/AMDGPU/rsq.f64.ll
M llvm/test/CodeGen/AMDGPU/s-barrier.ll
M llvm/test/CodeGen/AMDGPU/s-wakeup-barrier.ll
M llvm/test/CodeGen/AMDGPU/sched-assert-dead-def-subreg-use-other-subreg.mir
M llvm/test/CodeGen/AMDGPU/sched-handleMoveUp-subreg-def-across-subreg-def.mir
A llvm/test/CodeGen/AMDGPU/schedmodel-dummywrite.mir
M llvm/test/CodeGen/AMDGPU/sink-after-control-flow-postra.mir
M llvm/test/CodeGen/AMDGPU/spill-regpressure-less.mir
M llvm/test/CodeGen/AMDGPU/spill-vector-superclass.ll
M llvm/test/CodeGen/AMDGPU/stack-realign-kernel.ll
M llvm/test/CodeGen/AMDGPU/sub.v2i16.ll
M llvm/test/CodeGen/AMDGPU/subreg-undef-def-with-other-subreg-defs.mir
M llvm/test/CodeGen/AMDGPU/swdev282079.mir
M llvm/test/CodeGen/AMDGPU/true16-imm-folded-to-0-regression.ll
M llvm/test/CodeGen/AMDGPU/unsupported-atomics.ll
M llvm/test/CodeGen/AMDGPU/v_swap_b16.ll
M llvm/test/CodeGen/AMDGPU/v_swap_b32.mir
M llvm/test/CodeGen/AMDGPU/vccz-corrupt-bug-workaround.mir
M llvm/test/CodeGen/AMDGPU/vector-reduce-umax.ll
M llvm/test/CodeGen/AMDGPU/verify-gfx90a-aligned-vgprs.mir
M llvm/test/CodeGen/AMDGPU/vgpr-mark-last-scratch-load.mir
M llvm/test/CodeGen/AMDGPU/vopc-remat.mir
M llvm/test/CodeGen/AMDGPU/whole-wave-functions.ll
M llvm/test/CodeGen/ARM/cfguard-module-flag.ll
M llvm/test/CodeGen/ARM/ifcvt-diamond-unanalyzable-common.mir
M llvm/test/CodeGen/ARM/inlineasmbr-if-cvt.mir
M llvm/test/CodeGen/ARM/machine-outliner-noreturn.mir
M llvm/test/CodeGen/ARM/machine-outliner-unoutlinable.mir
M llvm/test/CodeGen/ARM/rotate-add.ll
M llvm/test/CodeGen/ARM/setcc-logic.ll
A llvm/test/CodeGen/ARM/shift-mod.ll
A llvm/test/CodeGen/BPF/BTF/array-no-dimension.ll
A llvm/test/CodeGen/BPF/BTF/char-utf.ll
A llvm/test/CodeGen/BPF/cleanup-reject-typed-catch.ll
A llvm/test/CodeGen/BPF/cleanup-section.ll
M llvm/test/CodeGen/BPF/warn-call.ll
A llvm/test/CodeGen/DirectX/is_nonuniform_within_loop.ll
A llvm/test/CodeGen/DirectX/is_nonuniform_within_loop_nuri.ll
M llvm/test/CodeGen/DirectX/llc-pipeline.ll
A llvm/test/CodeGen/DirectX/strip-convergence-intrinsics.ll
A llvm/test/CodeGen/Hexagon/hvx-concat-scalar-preds.ll
A llvm/test/CodeGen/Hexagon/sext-mul-v2i16.ll
M llvm/test/CodeGen/LoongArch/inline-asm-clobbers-fcc.mir
M llvm/test/CodeGen/LoongArch/lasx/ctpop-ctlz.ll
M llvm/test/CodeGen/LoongArch/lasx/ir-instruction/add.ll
M llvm/test/CodeGen/LoongArch/lasx/ir-instruction/and.ll
A llvm/test/CodeGen/LoongArch/lasx/ir-instruction/fptrunc.ll
M llvm/test/CodeGen/LoongArch/lasx/ir-instruction/icmp.ll
M llvm/test/CodeGen/LoongArch/lasx/ir-instruction/nor.ll
M llvm/test/CodeGen/LoongArch/lasx/ir-instruction/or.ll
A llvm/test/CodeGen/LoongArch/lasx/ir-instruction/shuffle-as-xvextrins.ll
M llvm/test/CodeGen/LoongArch/lasx/ir-instruction/sub.ll
M llvm/test/CodeGen/LoongArch/lasx/ir-instruction/xor.ll
M llvm/test/CodeGen/LoongArch/lasx/xvmskcond.ll
M llvm/test/CodeGen/LoongArch/lsx/ctpop-ctlz.ll
M llvm/test/CodeGen/LoongArch/lsx/ir-instruction/add.ll
M llvm/test/CodeGen/LoongArch/lsx/ir-instruction/and.ll
A llvm/test/CodeGen/LoongArch/lsx/ir-instruction/fptrunc.ll
M llvm/test/CodeGen/LoongArch/lsx/ir-instruction/icmp.ll
M llvm/test/CodeGen/LoongArch/lsx/ir-instruction/nor.ll
M llvm/test/CodeGen/LoongArch/lsx/ir-instruction/or.ll
A llvm/test/CodeGen/LoongArch/lsx/ir-instruction/shuffle-as-vextrins.ll
M llvm/test/CodeGen/LoongArch/lsx/ir-instruction/sub.ll
M llvm/test/CodeGen/LoongArch/lsx/ir-instruction/xor.ll
M llvm/test/CodeGen/LoongArch/lsx/vec-sext.ll
M llvm/test/CodeGen/LoongArch/lsx/vec-shuffle-any-ext.ll
M llvm/test/CodeGen/LoongArch/lsx/vec-trunc.ll
M llvm/test/CodeGen/LoongArch/lsx/vmskcond.ll
M llvm/test/CodeGen/LoongArch/pr177863.ll
M llvm/test/CodeGen/MIR/Generic/inline-asm-bad-mem-constraint.mir
M llvm/test/CodeGen/MIR/Generic/inline-asm-bad-regclass.mir
M llvm/test/CodeGen/MIR/Generic/inline-asm-extra-info.mir
M llvm/test/CodeGen/MIR/Generic/inline-asm-no-constraint.mir
M llvm/test/CodeGen/MIR/Generic/inline-asm-tiedto-bad-operand-number.mir
M llvm/test/CodeGen/MIR/Generic/inline-asm-tiedto-missing-colon.mir
M llvm/test/CodeGen/MIR/Generic/inline-asm-tiedto-missing-dollar.mir
M llvm/test/CodeGen/MIR/X86/early-clobber-register-flag.mir
M llvm/test/CodeGen/MIR/X86/inline-asm-registers.mir
M llvm/test/CodeGen/MIR/X86/inline-asm-rm-exhaustion.mir
M llvm/test/CodeGen/MIR/X86/inline-asm.mir
M llvm/test/CodeGen/Mips/longbranch/branch-limits-fp-micromips.mir
M llvm/test/CodeGen/Mips/longbranch/branch-limits-fp-micromipsr6.mir
M llvm/test/CodeGen/Mips/longbranch/branch-limits-fp-mips.mir
M llvm/test/CodeGen/Mips/longbranch/branch-limits-fp-mipsr6.mir
M llvm/test/CodeGen/Mips/longbranch/branch-limits-int-microMIPS.mir
M llvm/test/CodeGen/Mips/longbranch/branch-limits-int-micromipsr6.mir
M llvm/test/CodeGen/Mips/longbranch/branch-limits-int-mips64.mir
M llvm/test/CodeGen/Mips/longbranch/branch-limits-int-mips64r6.mir
M llvm/test/CodeGen/Mips/longbranch/branch-limits-int-mipsr6.mir
M llvm/test/CodeGen/Mips/longbranch/branch-limits-int.mir
M llvm/test/CodeGen/Mips/longbranch/branch-limits-msa.mir
A llvm/test/CodeGen/NVPTX/atomic-alignment.err.ll
M llvm/test/CodeGen/NVPTX/atomicrmw-expand.err.ll
M llvm/test/CodeGen/NVPTX/atomics-b128.ll
M llvm/test/CodeGen/NVPTX/globals_init.ll
M llvm/test/CodeGen/NVPTX/intr-range.ll
M llvm/test/CodeGen/NVPTX/load-store-atomic.err.ll
A llvm/test/CodeGen/NVPTX/movmatrix.ll
A llvm/test/CodeGen/NVPTX/reqntid-const-fold.ll
M llvm/test/CodeGen/PowerPC/aix-lower-jump-table-mir.ll
M llvm/test/CodeGen/PowerPC/aix-print-pc.mir
M llvm/test/CodeGen/PowerPC/alignlongjumptest.mir
M llvm/test/CodeGen/PowerPC/amo-enable.ll
M llvm/test/CodeGen/PowerPC/bit_floor.ll
A llvm/test/CodeGen/PowerPC/builtins-ecc.ll
M llvm/test/CodeGen/PowerPC/callbr-asm-outputs-indirect-isel.ll
M llvm/test/CodeGen/PowerPC/ctrloops32.mir
M llvm/test/CodeGen/PowerPC/ctrloops64.mir
A llvm/test/CodeGen/PowerPC/deeply-compressed-weights.ll
A llvm/test/CodeGen/PowerPC/post-quantum-crypto.ll
M llvm/test/CodeGen/PowerPC/shrink-wrap.mir
M llvm/test/CodeGen/RISCV/GlobalISel/double-fcmp.ll
M llvm/test/CodeGen/RISCV/GlobalISel/float-fcmp.ll
M llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/brindirect-rv32.mir
M llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/brindirect-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/calls.ll
M llvm/test/CodeGen/RISCV/attributes.ll
M llvm/test/CodeGen/RISCV/branch-rel.mir
M llvm/test/CodeGen/RISCV/branch-relaxation-rv32.ll
M llvm/test/CodeGen/RISCV/branch-relaxation-rv64.ll
A llvm/test/CodeGen/RISCV/calls-cf-branch.ll
M llvm/test/CodeGen/RISCV/calls.ll
A llvm/test/CodeGen/RISCV/cf-branch-isel.ll
M llvm/test/CodeGen/RISCV/jumptable-swguarded.ll
M llvm/test/CodeGen/RISCV/kcfi-isel-mir.ll
M llvm/test/CodeGen/RISCV/lpad.ll
M llvm/test/CodeGen/RISCV/machine-outliner-call-reg-live-across.mir
M llvm/test/CodeGen/RISCV/machine-outliner-call-x5-liveout.mir
A llvm/test/CodeGen/RISCV/machine-outliner-reserved-regs.mir
A llvm/test/CodeGen/RISCV/machine-outliner-x5-regsave-rv32e.mir
A llvm/test/CodeGen/RISCV/machine-outliner-x5-regsave.mir
M llvm/test/CodeGen/RISCV/nest-register.ll
M llvm/test/CodeGen/RISCV/opt-w-instrs.mir
M llvm/test/CodeGen/RISCV/pr84200.ll
M llvm/test/CodeGen/RISCV/pr97304.ll
M llvm/test/CodeGen/RISCV/rv32p.ll
M llvm/test/CodeGen/RISCV/rv64p.ll
M llvm/test/CodeGen/RISCV/rvp-ext-rv32.ll
M llvm/test/CodeGen/RISCV/rvp-ext-rv64.ll
M llvm/test/CodeGen/RISCV/rvv/bitreverse-vp.ll
M llvm/test/CodeGen/RISCV/rvv/bswap-vp.ll
A llvm/test/CodeGen/RISCV/rvv/buildvec-sext.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-bitreverse-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-bswap-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fpext-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-deinterleave2.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-int-interleave.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-zipeven-zipodd.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfma-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfmacc-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfmsac-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfmuladd-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfneg-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfnmacc-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfnmsac-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vmax-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vmaxu-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vmin-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vminu-vp.ll
A llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vp-splice-bf16.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vp-splice.ll
M llvm/test/CodeGen/RISCV/rvv/masked-sdiv.ll
M llvm/test/CodeGen/RISCV/rvv/masked-srem.ll
M llvm/test/CodeGen/RISCV/rvv/masked-udiv.ll
M llvm/test/CodeGen/RISCV/rvv/masked-urem.ll
M llvm/test/CodeGen/RISCV/rvv/mixed-float-bf16-arith.ll
M llvm/test/CodeGen/RISCV/rvv/pr171231.ll
M llvm/test/CodeGen/RISCV/rvv/pr99782.ll
M llvm/test/CodeGen/RISCV/rvv/sink-splat-operands.ll
M llvm/test/CodeGen/RISCV/rvv/stack-probing-dynamic.ll
M llvm/test/CodeGen/RISCV/rvv/vector-deinterleave-fixed.ll
M llvm/test/CodeGen/RISCV/rvv/vector-deinterleave.ll
M llvm/test/CodeGen/RISCV/rvv/vector-extract-last-active.ll
M llvm/test/CodeGen/RISCV/rvv/vector-interleave-fixed.ll
M llvm/test/CodeGen/RISCV/rvv/vector-interleave.ll
M llvm/test/CodeGen/RISCV/rvv/vfma-vp-combine.ll
M llvm/test/CodeGen/RISCV/rvv/vfma-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfmuladd-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfneg-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfpext-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfwadd-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfwmacc-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfwmsac-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfwnmacc-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfwnmsac-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vmax-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vmaxu-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vmin-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vminu-vp.ll
A llvm/test/CodeGen/RISCV/rvv/vp-splice-bf16.ll
M llvm/test/CodeGen/RISCV/rvv/vp-splice.ll
A llvm/test/CodeGen/RISCV/rvv/vpaire.ll
A llvm/test/CodeGen/RISCV/rvv/vpairo.ll
M llvm/test/CodeGen/RISCV/rvv/vreductions-fp-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vsetvli-insert.mir
A llvm/test/CodeGen/RISCV/rvv/vunzipe.ll
A llvm/test/CodeGen/RISCV/rvv/vunzipo.ll
A llvm/test/CodeGen/RISCV/rvv/vzip.ll
M llvm/test/CodeGen/RISCV/stack-clash-prologue.ll
M llvm/test/CodeGen/RISCV/tail-calls.ll
M llvm/test/CodeGen/RISCV/zdinx-spill.ll
M llvm/test/CodeGen/RISCV/zicfilp-indirect-branch.ll
M llvm/test/CodeGen/RISCV/zilsd-spill.ll
M llvm/test/CodeGen/SPIRV/AtomicBuiltinsFloat.ll
M llvm/test/CodeGen/SPIRV/CheckCapKernelWithoutKernel.ll
M llvm/test/CodeGen/SPIRV/ExecutionMode_GLCompute.ll
M llvm/test/CodeGen/SPIRV/FOrdGreaterThanEqual_bool.ll
M llvm/test/CodeGen/SPIRV/FOrdGreaterThanEqual_int.ll
M llvm/test/CodeGen/SPIRV/OpVectorInsertDynamic.ll
M llvm/test/CodeGen/SPIRV/SpecConstants/bool-spirv-specconstant.ll
M llvm/test/CodeGen/SPIRV/TruncToBool.ll
M llvm/test/CodeGen/SPIRV/assume.ll
M llvm/test/CodeGen/SPIRV/basic_int_types_spirvdis.ll
M llvm/test/CodeGen/SPIRV/branching/OpSwitch32.ll
M llvm/test/CodeGen/SPIRV/branching/OpSwitchChar.ll
M llvm/test/CodeGen/SPIRV/branching/analyze-branch-opt.ll
M llvm/test/CodeGen/SPIRV/branching/if-merging.ll
M llvm/test/CodeGen/SPIRV/branching/if-non-merging.ll
M llvm/test/CodeGen/SPIRV/capability-Int64Atomics-store.ll
M llvm/test/CodeGen/SPIRV/capability-Int64Atomics.ll
M llvm/test/CodeGen/SPIRV/capability-Shader.ll
M llvm/test/CodeGen/SPIRV/capability-integers.ll
M llvm/test/CodeGen/SPIRV/constant/local-aggregate-constant.ll
M llvm/test/CodeGen/SPIRV/constant/local-arbitrary-width-integers-constants-type-promotion.ll
M llvm/test/CodeGen/SPIRV/constant/local-bool-constants.ll
M llvm/test/CodeGen/SPIRV/constant/local-float-point-constants.ll
M llvm/test/CodeGen/SPIRV/constant/local-integers-constants.ll
M llvm/test/CodeGen/SPIRV/constant/local-null-constants.ll
M llvm/test/CodeGen/SPIRV/constant/local-vector-matrix-constants.ll
M llvm/test/CodeGen/SPIRV/debug-info/no-nonsemantic-without-extension.ll
M llvm/test/CodeGen/SPIRV/event_no_group_cap.ll
M llvm/test/CodeGen/SPIRV/exec_mode_float_control_khr.ll
M llvm/test/CodeGen/SPIRV/expect.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_EXT_relaxed_printf_string_address_space/builtin_printf.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_EXT_relaxed_printf_string_address_space/non-constant-printf.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_EXT_shader_atomic_float_add/atomicrmw_faddfsub_double.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_EXT_shader_atomic_float_add/atomicrmw_faddfsub_half.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_EXT_shader_atomic_float_min_max/atomicrmw_fminfmax_double.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_EXT_shader_atomic_float_min_max/atomicrmw_fminfmax_float.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_EXT_shader_atomic_float_min_max/atomicrmw_fminfmax_half.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_16bit_atomics/atomic_bfloat16_load_store_xchg.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_16bit_atomics/atomic_int16_arithmetic.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_16bit_atomics/atomic_int16_load_store_xchg_cmpxchg.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_16bit_atomics/atomicrmw_faddfsub_bfloat16.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_16bit_atomics/atomicrmw_fminfmax_bfloat16.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_function_pointers/fun-ptr-addrcast.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_joint_matrix/cooperative_matrix_bf16.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_joint_matrix/cooperative_matrix_checked.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_joint_matrix/cooperative_matrix_get_coord.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_joint_matrix/cooperative_matrix_packed.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_joint_matrix/cooperative_matrix_prefetch.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_joint_matrix/cooperative_matrix_tf32.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_memory_access_aliasing/alias-barrier.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_memory_access_aliasing/alias-empty-md.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_memory_access_aliasing/alias-load-store-struct.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_memory_access_aliasing/alias-load-store.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_predicated_io/predicated_io_generic.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_subgroups/builtin-op-wrappers.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_KHR_no_integer_wrap_decoration.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_KHR_uniform_group_instructions/uniform-group-instructions.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_NV_shader_atomic_fp16_vector/atomicrmw_faddfsub_vec_float16.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_NV_shader_atomic_fp16_vector/atomicrmw_fminfmax_vec_float16.ll
M llvm/test/CodeGen/SPIRV/extensions/enable-all-extensions-but-one.ll
M llvm/test/CodeGen/SPIRV/extensions/enable-all-extensions.ll
M llvm/test/CodeGen/SPIRV/extensions/unused-but-allowed-SPV_INTEL_arbitrary_precision_integers.ll
M llvm/test/CodeGen/SPIRV/freeze.ll
M llvm/test/CodeGen/SPIRV/function/alloca-load-store.ll
M llvm/test/CodeGen/SPIRV/function/identity-function.ll
M llvm/test/CodeGen/SPIRV/function/multiple-anonymous-functions.ll
M llvm/test/CodeGen/SPIRV/function/trivial-function-definition.ll
M llvm/test/CodeGen/SPIRV/function/trivial-function-with-attributes.ll
M llvm/test/CodeGen/SPIRV/function/trivial-function-with-call.ll
M llvm/test/CodeGen/SPIRV/function/variadics-lowering-builtin-substr-in-name.ll
M llvm/test/CodeGen/SPIRV/function/variadics-lowering-namespace-printf.ll
M llvm/test/CodeGen/SPIRV/global-var-intrinsic.ll
M llvm/test/CodeGen/SPIRV/half_extension.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/rcp.ll
M llvm/test/CodeGen/SPIRV/hlsl-resources/cbuffer.ll
M llvm/test/CodeGen/SPIRV/hlsl-resources/cbuffer_unused.ll
M llvm/test/CodeGen/SPIRV/image-unoptimized.ll
M llvm/test/CodeGen/SPIRV/image.ll
M llvm/test/CodeGen/SPIRV/image_decl_func_arg.ll
M llvm/test/CodeGen/SPIRV/image_dim.ll
M llvm/test/CodeGen/SPIRV/instructions/call-complex-function.ll
M llvm/test/CodeGen/SPIRV/instructions/call-trivial-function.ll
M llvm/test/CodeGen/SPIRV/instructions/fcmp.ll
M llvm/test/CodeGen/SPIRV/instructions/float-casts.ll
M llvm/test/CodeGen/SPIRV/instructions/float-fast-flags.ll
M llvm/test/CodeGen/SPIRV/instructions/intrinsics.ll
M llvm/test/CodeGen/SPIRV/instructions/scalar-bitwise-operations.ll
M llvm/test/CodeGen/SPIRV/instructions/scalar-floating-point-arithmetic.ll
M llvm/test/CodeGen/SPIRV/instructions/undef-nested-composite-store.ll
M llvm/test/CodeGen/SPIRV/instructions/undef-simple-composite-store.ll
M llvm/test/CodeGen/SPIRV/instructions/unreachable.ll
M llvm/test/CodeGen/SPIRV/instructions/vector-bitwise-operations.ll
M llvm/test/CodeGen/SPIRV/instructions/vector-floating-point-arithmetic.ll
M llvm/test/CodeGen/SPIRV/instructions/vector-integer-arithmetic.ll
M llvm/test/CodeGen/SPIRV/linkage/LinkOnceODR.ll
M llvm/test/CodeGen/SPIRV/linkage/LinkOnceODRFun.ll
M llvm/test/CodeGen/SPIRV/linked-list.ll
M llvm/test/CodeGen/SPIRV/lit.local.cfg
M llvm/test/CodeGen/SPIRV/llc-pipeline.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/assume.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/bswap.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/ceil.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/ctlz.ll
A llvm/test/CodeGen/SPIRV/llvm-intrinsics/ctpop-vk.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/ctpop.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/cttz.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/debugtrap.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/expect.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/fabs.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/fshl.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/fshr.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/invariant.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/maxnum.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/memset.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/nearbyint.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/sqrt.ll
M llvm/test/CodeGen/SPIRV/logical-access-chain.ll
M llvm/test/CodeGen/SPIRV/mangled_function.ll
M llvm/test/CodeGen/SPIRV/multi_md.ll
M llvm/test/CodeGen/SPIRV/no_capability_shader.ll
M llvm/test/CodeGen/SPIRV/opaque_pointers.ll
M llvm/test/CodeGen/SPIRV/opencl/basic/get_global_offset.ll
M llvm/test/CodeGen/SPIRV/opencl/basic/progvar_prog_scope_init.ll
M llvm/test/CodeGen/SPIRV/opencl/basic/progvar_prog_scope_uninit.ll
M llvm/test/CodeGen/SPIRV/opencl/device_execution/execute_block.ll
M llvm/test/CodeGen/SPIRV/opencl/get_global_id.ll
M llvm/test/CodeGen/SPIRV/opencl/get_num_groups.ll
M llvm/test/CodeGen/SPIRV/opencl/metadata/fp_contractions_metadata.ll
M llvm/test/CodeGen/SPIRV/opencl/metadata/no_fp_contractions_metadata.ll
M llvm/test/CodeGen/SPIRV/opencl/metadata/opencl_version_metadata.ll
M llvm/test/CodeGen/SPIRV/opencl/vstore2.ll
M llvm/test/CodeGen/SPIRV/physical-layout/generator-magic-number.ll
M llvm/test/CodeGen/SPIRV/physical-layout/spirv-version.ll
M llvm/test/CodeGen/SPIRV/pointers/PtrCast-null-in-OpSpecConstantOp.ll
M llvm/test/CodeGen/SPIRV/preprocess-metadata.ll
M llvm/test/CodeGen/SPIRV/pstruct.ll
M llvm/test/CodeGen/SPIRV/read_image.ll
M llvm/test/CodeGen/SPIRV/sitofp-with-bool.ll
A llvm/test/CodeGen/SPIRV/smulextended-builtin.ll
M llvm/test/CodeGen/SPIRV/spec_const_decoration.ll
M llvm/test/CodeGen/SPIRV/spirv-tools-dis.ll
M llvm/test/CodeGen/SPIRV/spirv.Queue.ll
M llvm/test/CodeGen/SPIRV/spirv_param_decorations_quals.ll
M llvm/test/CodeGen/SPIRV/store.ll
A llvm/test/CodeGen/SPIRV/struct-null-pointer-member.ll
M llvm/test/CodeGen/SPIRV/transcoding/DecorationMaxByteOffset.ll
M llvm/test/CodeGen/SPIRV/transcoding/GlobalFunAnnotate.ll
M llvm/test/CodeGen/SPIRV/transcoding/NoSignedUnsignedWrap.ll
M llvm/test/CodeGen/SPIRV/transcoding/OpAllAny.ll
M llvm/test/CodeGen/SPIRV/transcoding/OpConstantBool.ll
M llvm/test/CodeGen/SPIRV/transcoding/OpConstantSampler.ll
M llvm/test/CodeGen/SPIRV/transcoding/OpImageQuerySize.ll
M llvm/test/CodeGen/SPIRV/transcoding/OpImageReadMS.ll
M llvm/test/CodeGen/SPIRV/transcoding/OpImageSampleExplicitLod.ll
M llvm/test/CodeGen/SPIRV/transcoding/OpenCL/sub_group_mask.ll
M llvm/test/CodeGen/SPIRV/transcoding/RelationalOperators.ll
M llvm/test/CodeGen/SPIRV/transcoding/RelationalOperatorsFUnord.ll
M llvm/test/CodeGen/SPIRV/transcoding/ReqdSubgroupSize.ll
M llvm/test/CodeGen/SPIRV/transcoding/SpecConstantComposite.ll
M llvm/test/CodeGen/SPIRV/transcoding/TransFNeg.ll
M llvm/test/CodeGen/SPIRV/transcoding/image_get_size_with_access_qualifiers.ll
M llvm/test/CodeGen/SPIRV/transcoding/memory_access.ll
M llvm/test/CodeGen/SPIRV/transcoding/optional-core-features-multiple.ll
M llvm/test/CodeGen/SPIRV/transcoding/readonly.ll
M llvm/test/CodeGen/SPIRV/transcoding/sub_group_ballot.ll
M llvm/test/CodeGen/SPIRV/transcoding/sub_group_clustered_reduce.ll
M llvm/test/CodeGen/SPIRV/transcoding/sub_group_non_uniform_arithmetic.ll
M llvm/test/CodeGen/SPIRV/transcoding/sub_group_non_uniform_vote.ll
M llvm/test/CodeGen/SPIRV/transcoding/vec8.ll
M llvm/test/CodeGen/SPIRV/transcoding/vec_type_hint.ll
M llvm/test/CodeGen/SPIRV/trunc-nonstd-bitwidth.ll
M llvm/test/CodeGen/SPIRV/uitofp-with-bool.ll
A llvm/test/CodeGen/SPIRV/umulextended-builtin.ll
M llvm/test/CodeGen/SPIRV/vk-pushconstant-access.ll
M llvm/test/CodeGen/SPIRV/vk-pushconstant-layout-natural.ll
M llvm/test/CodeGen/SystemZ/twoaddr-kill.mir
M llvm/test/CodeGen/Thumb/high-reg-clobber.mir
M llvm/test/CodeGen/Thumb2/LowOverheadLoops/out-of-range-cbz.mir
M llvm/test/CodeGen/Thumb2/high-reg-spill.mir
A llvm/test/CodeGen/Thumb2/mve-clmul.ll
M llvm/test/CodeGen/Thumb2/pipeliner-inlineasm.mir
M llvm/test/CodeGen/WebAssembly/f16-intrinsics.ll
M llvm/test/CodeGen/X86/apx/add.ll
M llvm/test/CodeGen/X86/apx/flags-copy-lowering.mir
M llvm/test/CodeGen/X86/apx/sub.ll
M llvm/test/CodeGen/X86/avx-vperm2x128.ll
A llvm/test/CodeGen/X86/block-placement-triangle-profile-likely-prob.mir
M llvm/test/CodeGen/X86/callbr-asm-different-indirect-target.mir
M llvm/test/CodeGen/X86/callbr-asm-kill.mir
M llvm/test/CodeGen/X86/callbr-asm-outputs-indirect-isel-m32.ll
M llvm/test/CodeGen/X86/callbr-asm-outputs-indirect-isel.ll
M llvm/test/CodeGen/X86/callbr-asm-outputs-regallocfast.mir
M llvm/test/CodeGen/X86/cfguard-module-flag.ll
M llvm/test/CodeGen/X86/cfi-xmm.ll
M llvm/test/CodeGen/X86/early-clobber.mir
M llvm/test/CodeGen/X86/evex-to-vex-compress.mir
M llvm/test/CodeGen/X86/flags-copy-lowering.mir
M llvm/test/CodeGen/X86/fp16-reload.mir
A llvm/test/CodeGen/X86/gfni-or-fold.ll
M llvm/test/CodeGen/X86/inline-asm-avx512f-x-constraint.ll
M llvm/test/CodeGen/X86/inline-asm-default-clobbers.ll
M llvm/test/CodeGen/X86/insertps-combine.ll
M llvm/test/CodeGen/X86/machine-copy-prop.mir
M llvm/test/CodeGen/X86/masked_gather_scatter.ll
M llvm/test/CodeGen/X86/peephole-copy.mir
A llvm/test/CodeGen/X86/pr192034.ll
M llvm/test/CodeGen/X86/pr86880.mir
M llvm/test/CodeGen/X86/regallocfast-callbr-asm-spills-after-reload.mir
M llvm/test/CodeGen/X86/scheduler-asm-moves.mir
M llvm/test/CodeGen/X86/stack-clash-dynamic-alloca.ll
M llvm/test/CodeGen/X86/stack-clash-small-alloc-medium-align.ll
M llvm/test/CodeGen/X86/stack-folding-bmi2.mir
M llvm/test/CodeGen/X86/stack-folding-fp-nofpexcept.mir
M llvm/test/CodeGen/X86/statepoint-invoke-ra-enter-at-end.mir
A llvm/test/CodeGen/X86/sub-to-xor-masked.ll
M llvm/test/CodeGen/X86/switch-jmp-edge-split.mir
M llvm/test/CodeGen/X86/tail-dup-asm-goto.ll
M llvm/test/CodeGen/X86/var-permute-128.ll
M llvm/test/CodeGen/X86/var-permute-256.ll
M llvm/test/CodeGen/X86/var-permute-512.ll
M llvm/test/CodeGen/X86/vector-shuffle-combining-avx2.ll
M llvm/test/CodeGen/X86/vector-shuffle-combining-xop.ll
M llvm/test/CodeGen/X86/vector-shuffle-combining.ll
A llvm/test/FileCheck/diff/diff-blank-stray.txt
A llvm/test/FileCheck/diff/diff-empty-check.txt
A llvm/test/FileCheck/diff/diff-label-boundary.txt
A llvm/test/FileCheck/diff/diff-label-fuzzy-match.txt
A llvm/test/FileCheck/diff/diff-label-next.txt
A llvm/test/FileCheck/diff/diff-multi-block.txt
A llvm/test/FileCheck/diff/diff-multi-failres.txt
A llvm/test/FileCheck/diff/diff-multi-mismatch.txt
A llvm/test/FileCheck/diff/diff-next-stray-line.txt
A llvm/test/FileCheck/diff/diff-regex-escaping.txt
A llvm/test/FileCheck/diff/diff-resync-after-noise.txt
A llvm/test/FileCheck/diff/diff-resync-high-noise.txt
A llvm/test/FileCheck/diff/diff-skipped-expected.txt
A llvm/test/FileCheck/diff/diff-stress-large-input.txt
M llvm/test/Instrumentation/HWAddressSanitizer/alloca.ll
R llvm/test/LTO/Resolution/X86/libcall-external.ll
R llvm/test/LTO/Resolution/X86/libcall-in-thin-link.ll
R llvm/test/LTO/Resolution/X86/libcall-in-tu.ll
A llvm/test/Linker/cfguard.ll
A llvm/test/MC/AArch64/LFI/reserved.s
A llvm/test/MC/AArch64/LFI/sys.s
A llvm/test/MC/AArch64/LFI/tp.s
M llvm/test/MC/AArch64/armv9.7a-gcie.s
A llvm/test/MC/ELF/prefalign-internal-align.s
A llvm/test/MC/RISCV/rv32p-aliases-valid.s
M llvm/test/MC/RISCV/rv32p-valid.s
A llvm/test/MC/RISCV/rv64p-aliases-valid.s
M llvm/test/Other/fatlto.ll
M llvm/test/Other/new-pm-O0-defaults.ll
M llvm/test/Other/new-pm-lto-defaults.ll
M llvm/test/Other/new-pm-thinlto-postlink-defaults.ll
M llvm/test/Other/new-pm-thinlto-postlink-pgo-defaults.ll
M llvm/test/Other/new-pm-thinlto-postlink-samplepgo-defaults.ll
M llvm/test/TableGen/GlobalISelEmitter/GlobalISelEmitter.td
M llvm/test/ThinLTO/X86/lower_type_test_phi.ll
M llvm/test/Transforms/AggressiveInstCombine/popcount.ll
M llvm/test/Transforms/AtomicExpand/AMDGPU/unaligned-atomic.ll
M llvm/test/Transforms/Attributor/nofpclass-powi.ll
M llvm/test/Transforms/Coroutines/coro-debug.ll
R llvm/test/Transforms/Coroutines/gh105595.ll
M llvm/test/Transforms/FunctionAttrs/noundef.ll
A llvm/test/Transforms/FunctionImport/Inputs/inline-history.ll
A llvm/test/Transforms/FunctionImport/inline-history.ll
M llvm/test/Transforms/InstCombine/add.ll
M llvm/test/Transforms/InstCombine/fold-fcmp-trunc.ll
A llvm/test/Transforms/InstCombine/fold-vp-load.ll
M llvm/test/Transforms/InstCombine/freeze.ll
M llvm/test/Transforms/InstCombine/known-never-nan.ll
A llvm/test/Transforms/LoopUnroll/branch-weights-freq/unroll-complete.ll
M llvm/test/Transforms/LoopUnroll/branch-weights-freq/unroll-epilog.ll
A llvm/test/Transforms/LoopUnroll/branch-weights-freq/unroll-partial-unconditional-latch.ll
M llvm/test/Transforms/LoopUnroll/branch-weights-freq/unroll-partial.ll
M llvm/test/Transforms/LoopUnroll/debug.ll
M llvm/test/Transforms/LoopUnroll/loop-probability-one.ll
M llvm/test/Transforms/LoopVectorize/AArch64/aarch64-predication.ll
A llvm/test/Transforms/LoopVectorize/AArch64/ordered-reduction-with-invariant-stores.ll
M llvm/test/Transforms/LoopVectorize/AArch64/outer_loop_prefer_scalable.ll
M llvm/test/Transforms/LoopVectorize/AArch64/outer_loop_test1_no_explicit_vect_width.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-add-sdot-i16-i32.ll
A llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-add-sdot-i8-i16.ll
A llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-usabs.ll
M llvm/test/Transforms/LoopVectorize/AArch64/predicated-costs.ll
M llvm/test/Transforms/LoopVectorize/AArch64/predication_costs.ll
M llvm/test/Transforms/LoopVectorize/AArch64/reduction-recurrence-costs-sve.ll
A llvm/test/Transforms/LoopVectorize/AArch64/splice-cost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-vector-reverse-mask4.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve2-histcnt-epilogue.ll
M llvm/test/Transforms/LoopVectorize/AArch64/vector-reverse-mask4.ll
M llvm/test/Transforms/LoopVectorize/LoongArch/loongarch-interleaved.ll
A llvm/test/Transforms/LoopVectorize/RISCV/conditional-scalar-assignment-fold-tail.ll
A llvm/test/Transforms/LoopVectorize/RISCV/conditional-scalar-assignment.ll
M llvm/test/Transforms/LoopVectorize/RISCV/dbg-tail-folding-by-evl.ll
M llvm/test/Transforms/LoopVectorize/RISCV/gather-scatter-cost.ll
A llvm/test/Transforms/LoopVectorize/RISCV/iv-select-cmp.ll
M llvm/test/Transforms/LoopVectorize/RISCV/masked_gather_scatter.ll
M llvm/test/Transforms/LoopVectorize/RISCV/predicated-reverse-store.ll
M llvm/test/Transforms/LoopVectorize/RISCV/riscv-vector-reverse.ll
M llvm/test/Transforms/LoopVectorize/RISCV/runtime-check-dependent-on-stride.ll
M llvm/test/Transforms/LoopVectorize/RISCV/select-cmp-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/strided-accesses.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-interleave.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-reverse-load-store.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-uniform-store.ll
A llvm/test/Transforms/LoopVectorize/VPlan/AArch64/partial-reduce-usabs.ll
M llvm/test/Transforms/LoopVectorize/VPlan/AArch64/sve2-histcnt-vplan.ll
M llvm/test/Transforms/LoopVectorize/VPlan/PowerPC/vplan-force-tail-with-evl.ll
M llvm/test/Transforms/LoopVectorize/VPlan/RISCV/vplan-riscv-vector-reverse.ll
M llvm/test/Transforms/LoopVectorize/VPlan/X86/vplan-vp-intrinsics.ll
M llvm/test/Transforms/LoopVectorize/VPlan/conditional-scalar-assignment-vplan.ll
M llvm/test/Transforms/LoopVectorize/VPlan/early_exit_with_stores_vplan.ll
M llvm/test/Transforms/LoopVectorize/VPlan/first-order-recurrence-chains-vplan.ll
M llvm/test/Transforms/LoopVectorize/VPlan/first-order-recurrence-sink-replicate-region.ll
M llvm/test/Transforms/LoopVectorize/VPlan/icmp-uniforms.ll
M llvm/test/Transforms/LoopVectorize/VPlan/interleave-and-scalarize-only.ll
M llvm/test/Transforms/LoopVectorize/VPlan/phi-with-fastflags-vplan.ll
M llvm/test/Transforms/LoopVectorize/VPlan/uncountable-early-exit-vplan.ll
M llvm/test/Transforms/LoopVectorize/VPlan/vplan-iv-transforms.ll
M llvm/test/Transforms/LoopVectorize/VPlan/vplan-print-after-all.ll
M llvm/test/Transforms/LoopVectorize/VPlan/vplan-printing-before-execute.ll
M llvm/test/Transforms/LoopVectorize/VPlan/vplan-printing-metadata.ll
M llvm/test/Transforms/LoopVectorize/VPlan/vplan-printing-reductions.ll
M llvm/test/Transforms/LoopVectorize/VPlan/vplan-printing.ll
M llvm/test/Transforms/LoopVectorize/VPlan/vplan-sink-scalars-and-merge-vf1.ll
M llvm/test/Transforms/LoopVectorize/VPlan/vplan-sink-scalars-and-merge.ll
M llvm/test/Transforms/LoopVectorize/X86/cost-model.ll
M llvm/test/Transforms/LoopVectorize/X86/masked_load_store.ll
M llvm/test/Transforms/LoopVectorize/X86/outer_loop_test1_no_explicit_vect_width.ll
M llvm/test/Transforms/LoopVectorize/X86/pr109581-unused-blend.ll
M llvm/test/Transforms/LoopVectorize/X86/slm-no-vectorize.ll
M llvm/test/Transforms/LoopVectorize/conditional-assignment.ll
M llvm/test/Transforms/LoopVectorize/dbg-outer-loop-vect.ll
A llvm/test/Transforms/LoopVectorize/early-exit-calls.ll
A llvm/test/Transforms/LoopVectorize/early-exit-unary-ops.ll
M llvm/test/Transforms/LoopVectorize/epilog-vectorization-any-of-reductions.ll
M llvm/test/Transforms/LoopVectorize/epilog-vectorization-reductions.ll
A llvm/test/Transforms/LoopVectorize/find-last-iv-sinkable-expr-tail-folding.ll
M llvm/test/Transforms/LoopVectorize/find-last-iv-sinkable-expr.ll
M llvm/test/Transforms/LoopVectorize/non-widenable-intrinsics-outer-loop.ll
M llvm/test/Transforms/LoopVectorize/optsize.ll
M llvm/test/Transforms/LoopVectorize/outer-loop-inner-latch-successors.ll
M llvm/test/Transforms/LoopVectorize/outer-loop-vec-phi-predecessor-order.ll
M llvm/test/Transforms/LoopVectorize/outer-loop-wide-phis.ll
M llvm/test/Transforms/LoopVectorize/outer_loop_hcfg_construction.ll
M llvm/test/Transforms/LoopVectorize/outer_loop_scalable.ll
M llvm/test/Transforms/LoopVectorize/outer_loop_test1.ll
M llvm/test/Transforms/LoopVectorize/outer_loop_test2.ll
M llvm/test/Transforms/LoopVectorize/pr31190.ll
M llvm/test/Transforms/LoopVectorize/select-cmp-multiuse.ll
M llvm/test/Transforms/LoopVectorize/tripcount.ll
M llvm/test/Transforms/LoopVectorize/vplan-native-path-inner-loop-with-runtime-checks.ll
M llvm/test/Transforms/LoopVectorize/vplan-outer-loop-uncomputable-trip-count.ll
M llvm/test/Transforms/LowerTypeTests/drop_type_test.ll
M llvm/test/Transforms/LowerTypeTests/drop_type_test_phi.ll
M llvm/test/Transforms/LowerTypeTests/drop_type_test_select.ll
M llvm/test/Transforms/LowerTypeTests/function-weak.ll
M llvm/test/Transforms/LowerTypeTests/function.ll
A llvm/test/Transforms/SLPVectorizer/AArch64/spillcost-call-between-operands.ll
A llvm/test/Transforms/SLPVectorizer/AArch64/spillcost-loop-backedge.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/revec-strided-load.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/same-node-reused.ll
M llvm/test/Transforms/SLPVectorizer/X86/bottom-to-top-reorder.ll
M llvm/test/Transforms/SLPVectorizer/X86/copyable_reorder.ll
M llvm/test/Transforms/SLPVectorizer/X86/deleted-instructions-clear.ll
M llvm/test/Transforms/SLPVectorizer/X86/entries-different-vf.ll
M llvm/test/Transforms/SLPVectorizer/X86/operand-reorder-with-copyables.ll
A llvm/test/Transforms/SLPVectorizer/X86/reduction-shl1-add-merge.ll
M llvm/test/Transforms/SLPVectorizer/X86/reused-last-instruction-in-split-node.ll
M llvm/test/Transforms/SLPVectorizer/X86/shl-compatible-with-add.ll
M llvm/test/Transforms/SLPVectorizer/X86/shl-to-add-transformation.ll
M llvm/test/Transforms/SLPVectorizer/X86/shl-to-add-transformation5.ll
M llvm/test/Transforms/SLPVectorizer/X86/shll1-add-sub-combined.ll
A llvm/test/Transforms/StripConvergenceIntrinsics/basic.ll
M llvm/test/Verifier/AArch64/intrinsic-immarg.ll
M llvm/test/tools/UpdateTestChecks/update_analyze_test_checks/Inputs/x86-loopvectorize-costmodel.ll
M llvm/test/tools/UpdateTestChecks/update_analyze_test_checks/Inputs/x86-loopvectorize-costmodel.ll.expected
M llvm/test/tools/UpdateTestChecks/update_analyze_test_checks/loopvectorize-costmodel.test
A llvm/test/tools/UpdateTestChecks/update_mir_test_checks/Inputs/x86-filter.mir
A llvm/test/tools/UpdateTestChecks/update_mir_test_checks/Inputs/x86-filter.mir.filter-out.expected
A llvm/test/tools/UpdateTestChecks/update_mir_test_checks/Inputs/x86-filter.mir.filter.expected
A llvm/test/tools/UpdateTestChecks/update_mir_test_checks/x86-filter.test
A llvm/test/tools/llvm-cas/mapping-size-too-small.test
A llvm/test/tools/llvm-mca/AArch64/Cortex/C1Ultra-basic-instructions.s
A llvm/test/tools/llvm-mca/AArch64/Cortex/C1Ultra-bf16-instructions.s
A llvm/test/tools/llvm-mca/AArch64/Cortex/C1Ultra-complxnum-instructions.s
A llvm/test/tools/llvm-mca/AArch64/Cortex/C1Ultra-flag-manipulation-instructions.s
A llvm/test/tools/llvm-mca/AArch64/Cortex/C1Ultra-forwarding.s
A llvm/test/tools/llvm-mca/AArch64/Cortex/C1Ultra-fp16fml-instructions.s
A llvm/test/tools/llvm-mca/AArch64/Cortex/C1Ultra-fptoint-instructions.s
A llvm/test/tools/llvm-mca/AArch64/Cortex/C1Ultra-i8mm-instructions.s
A llvm/test/tools/llvm-mca/AArch64/Cortex/C1Ultra-mte-instructions.s
A llvm/test/tools/llvm-mca/AArch64/Cortex/C1Ultra-neon-instructions.s
A llvm/test/tools/llvm-mca/AArch64/Cortex/C1Ultra-rcpc-immo-instructions.s
A llvm/test/tools/llvm-mca/AArch64/Cortex/C1Ultra-sve-instructions.s
A llvm/test/tools/llvm-mca/AArch64/Cortex/C1Ultra-writeback.s
A llvm/test/tools/llvm-mca/AArch64/Inputs/flag-manipulation-instructions.s
M llvm/test/tools/llvm-mca/AMDGPU/gfx10-double.s
M llvm/test/tools/llvm-mca/AMDGPU/gfx11-double.s
M llvm/test/tools/llvm-mca/AMDGPU/gfx12-pseudo-scalar-trans.s
M llvm/test/tools/llvm-objcopy/COFF/subsystem.test
M llvm/test/tools/llvm-objcopy/ELF/strip-preserve-atime.test
M llvm/test/tools/llvm-objdump/MachO/archive-headers.test
M llvm/test/tools/yaml2obj/ELF/DWARF/debug-line-v5.yaml
M llvm/tools/lli/lli.cpp
M llvm/tools/llvm-cov/CMakeLists.txt
M llvm/tools/llvm-cov/CodeCoverage.cpp
M llvm/tools/llvm-debuginfod-find/CMakeLists.txt
M llvm/tools/llvm-debuginfod-find/llvm-debuginfod-find.cpp
M llvm/tools/llvm-debuginfod/CMakeLists.txt
M llvm/tools/llvm-debuginfod/llvm-debuginfod.cpp
M llvm/tools/llvm-gsymutil/Opts.td
M llvm/tools/llvm-gsymutil/llvm-gsymutil.cpp
M llvm/tools/llvm-jitlink/llvm-jitlink-statistics.cpp
M llvm/tools/llvm-jitlink/llvm-jitlink.cpp
M llvm/tools/llvm-jitlink/llvm-jitlink.h
M llvm/tools/llvm-lto2/llvm-lto2.cpp
M llvm/tools/llvm-objcopy/ObjcopyOptions.cpp
M llvm/tools/llvm-objdump/CMakeLists.txt
M llvm/tools/llvm-objdump/MachODump.cpp
M llvm/tools/llvm-objdump/OtoolOpts.td
M llvm/tools/llvm-objdump/llvm-objdump.cpp
M llvm/tools/llvm-profdata/CMakeLists.txt
M llvm/tools/llvm-profdata/llvm-profdata.cpp
M llvm/tools/llvm-readobj/ELFDumper.cpp
M llvm/tools/llvm-symbolizer/CMakeLists.txt
M llvm/tools/llvm-symbolizer/llvm-symbolizer.cpp
M llvm/tools/llvm-xray/xray-fdr-dump.cpp
M llvm/unittests/Analysis/ValueTrackingTest.cpp
M llvm/unittests/CMakeLists.txt
M llvm/unittests/CodeGen/GlobalISel/KnownFPClassTest.cpp
M llvm/unittests/CodeGen/SelectionDAGPatternMatchTest.cpp
M llvm/unittests/DebugInfo/GSYM/CMakeLists.txt
M llvm/unittests/DebugInfo/GSYM/GSYMTest.cpp
A llvm/unittests/DebugInfo/GSYM/GSYMV2Test.cpp
A llvm/unittests/DebugInfo/GSYM/GsymDataExtractorTest.cpp
M llvm/unittests/Debuginfod/CMakeLists.txt
M llvm/unittests/Debuginfod/DebuginfodTests.cpp
M llvm/unittests/Frontend/OpenMPIRBuilderTest.cpp
A llvm/unittests/HTTP/CMakeLists.txt
A llvm/unittests/HTTP/HTTPServerTests.cpp
M llvm/unittests/IR/TimePassesTest.cpp
M llvm/unittests/IR/ValueHandleTest.cpp
M llvm/unittests/MC/TargetRegistry.cpp
M llvm/unittests/Support/CMakeLists.txt
M llvm/unittests/Support/FormatVariadicTest.cpp
R llvm/unittests/Support/HTTP/CMakeLists.txt
R llvm/unittests/Support/HTTP/HTTPServerTests.cpp
M llvm/unittests/Transforms/Vectorize/VPlanTest.cpp
M llvm/unittests/XRay/FDRProducerConsumerTest.cpp
M llvm/unittests/XRay/FDRTraceWriterTest.cpp
M llvm/utils/FileCheck/FileCheck.cpp
M llvm/utils/TableGen/Common/GlobalISel/GlobalISelMatchTable.cpp
M llvm/utils/TableGen/DFAPacketizerEmitter.cpp
M llvm/utils/UpdateTestChecks/mir.py
M llvm/utils/git/github-automation.py
M llvm/utils/gn/secondary/clang-tools-extra/clang-tidy/bugprone/BUILD.gn
M llvm/utils/gn/secondary/clang-tools-extra/clang-tidy/hicpp/BUILD.gn
M llvm/utils/gn/secondary/clang-tools-extra/clang-tidy/readability/BUILD.gn
M llvm/utils/gn/secondary/clang/lib/Driver/BUILD.gn
M llvm/utils/gn/secondary/clang/lib/ScalableStaticAnalysisFramework/Analyses/BUILD.gn
M llvm/utils/gn/secondary/clang/unittests/CIR/BUILD.gn
M llvm/utils/gn/secondary/clang/unittests/Serialization/BUILD.gn
M llvm/utils/gn/secondary/clang/unittests/StaticAnalyzer/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/DebugInfo/GSYM/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/Debuginfod/BUILD.gn
A llvm/utils/gn/secondary/llvm/lib/HTTP/BUILD.gn
R llvm/utils/gn/secondary/llvm/lib/Support/HTTP/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/Target/AArch64/MCTargetDesc/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/Target/AMDGPU/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/Transforms/Utils/BUILD.gn
M llvm/utils/gn/secondary/llvm/tools/llvm-cov/BUILD.gn
M llvm/utils/gn/secondary/llvm/tools/llvm-debuginfod-find/BUILD.gn
M llvm/utils/gn/secondary/llvm/tools/llvm-debuginfod/BUILD.gn
M llvm/utils/gn/secondary/llvm/tools/llvm-objdump/BUILD.gn
M llvm/utils/gn/secondary/llvm/tools/llvm-profdata/BUILD.gn
M llvm/utils/gn/secondary/llvm/tools/llvm-symbolizer/BUILD.gn
M llvm/utils/gn/secondary/llvm/unittests/BUILD.gn
M llvm/utils/gn/secondary/llvm/unittests/DebugInfo/GSYM/BUILD.gn
M llvm/utils/gn/secondary/llvm/unittests/ExecutionEngine/Orc/BUILD.gn
A llvm/utils/gn/secondary/llvm/unittests/HTTP/BUILD.gn
R llvm/utils/gn/secondary/llvm/unittests/Support/HTTP/BUILD.gn
M llvm/utils/lit/lit/ProgressBar.py
M llvm/utils/lit/lit/Test.py
M llvm/utils/lit/lit/TestTimes.py
M llvm/utils/lit/lit/cl_arguments.py
M llvm/utils/lit/lit/discovery.py
M llvm/utils/lit/lit/display.py
M llvm/utils/lit/lit/llvm/config.py
A llvm/utils/lit/tests/Inputs/malformed-test-times/a.txt
A llvm/utils/lit/tests/Inputs/malformed-test-times/b.txt
A llvm/utils/lit/tests/Inputs/malformed-test-times/lit.cfg
A llvm/utils/lit/tests/Inputs/malformed-test-times/lit_test_times
M llvm/utils/lit/tests/filter-failed-delete.py
M llvm/utils/lit/tests/filter-failed-rerun.py
M llvm/utils/lit/tests/filter-failed.py
A llvm/utils/lit/tests/malformed-test-times.py
M llvm/utils/release/build_llvm_release.bat
M llvm/utils/update_mir_test_checks.py
A mlir/cmake/modules/Findocloc.cmake
M mlir/docs/Bindings/Python.md
M mlir/docs/Tutorials/MlirOpt.md
M mlir/include/mlir/Bindings/Python/NanobindAdaptors.h
M mlir/include/mlir/Conversion/ArithCommon/AttrToLLVMConverter.h
M mlir/include/mlir/Dialect/AMDGPU/IR/AMDGPUEnums.h
M mlir/include/mlir/Dialect/Arith/IR/ArithBase.td
M mlir/include/mlir/Dialect/Arith/IR/ArithOps.td
M mlir/include/mlir/Dialect/Async/IR/Async.h
M mlir/include/mlir/Dialect/Bufferization/IR/BufferizableOpInterface.td
M mlir/include/mlir/Dialect/Bufferization/Transforms/OneShotAnalysis.h
M mlir/include/mlir/Dialect/Func/IR/FuncOps.h
M mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td
M mlir/include/mlir/Dialect/OpenACC/OpenACCCGOps.td
M mlir/include/mlir/Dialect/OpenACC/Transforms/ACCSpecializePatterns.h
M mlir/include/mlir/Dialect/OpenMP/OpenMPClauses.td
M mlir/include/mlir/Dialect/OpenMP/OpenMPOps.td
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVBase.td
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVIntelExtOps.td
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVLogicalOps.td
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVOps.h
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVTosaOps.td
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVTypes.h
M mlir/include/mlir/Dialect/Tosa/IR/TargetEnv.h
M mlir/include/mlir/Dialect/Tosa/IR/TosaComplianceData.h.inc
M mlir/include/mlir/Dialect/Tosa/IR/TosaOpBase.td
M mlir/include/mlir/Dialect/Tosa/IR/TosaOps.td
M mlir/include/mlir/Dialect/Transform/IR/TransformDialect.h
M mlir/include/mlir/Dialect/Transform/IR/TransformDialect.td
M mlir/include/mlir/Dialect/Transform/IR/TransformOps.td
M mlir/include/mlir/Dialect/Transform/IR/TransformTypes.td
M mlir/include/mlir/Dialect/Transform/Interfaces/CMakeLists.txt
M mlir/include/mlir/Dialect/Transform/Interfaces/TransformInterfaces.h
M mlir/include/mlir/Dialect/Transform/Interfaces/TransformInterfaces.td
M mlir/include/mlir/Dialect/XeGPU/IR/XeGPUAttrs.td
M mlir/include/mlir/Dialect/XeGPU/IR/XeGPUDialect.td
M mlir/include/mlir/Dialect/XeGPU/IR/XeGPUOps.td
M mlir/include/mlir/Dialect/XeGPU/IR/XeGPUTypes.td
M mlir/include/mlir/Dialect/XeGPU/Transforms/XeGPULayoutImpl.h
M mlir/include/mlir/IR/BuiltinOps.h
M mlir/include/mlir/IR/BuiltinTypes.td
M mlir/include/mlir/Target/LLVM/XeVM/Utils.h
M mlir/include/mlir/Target/LLVMIR/LLVMTranslationDialectInterface.td
M mlir/include/mlir/Target/LLVMIR/ModuleTranslation.h
M mlir/lib/Bytecode/Reader/BytecodeReader.cpp
M mlir/lib/Conversion/ArithToLLVM/ArithToLLVM.cpp
M mlir/lib/Conversion/FuncToLLVM/FuncToLLVM.cpp
M mlir/lib/Conversion/MathToEmitC/MathToEmitC.cpp
M mlir/lib/Conversion/TosaToLinalg/TosaToLinalg.cpp
M mlir/lib/Conversion/VectorToLLVM/ConvertVectorToLLVM.cpp
M mlir/lib/Conversion/XeGPUToXeVM/XeGPUToXeVM.cpp
M mlir/lib/Dialect/Arith/IR/ArithCanonicalization.td
M mlir/lib/Dialect/Arith/IR/ArithOps.cpp
M mlir/lib/Dialect/Bufferization/IR/BufferizableOpInterface.cpp
M mlir/lib/Dialect/Bufferization/Transforms/OneShotAnalysis.cpp
M mlir/lib/Dialect/Bufferization/Transforms/OneShotModuleBufferize.cpp
M mlir/lib/Dialect/LLVMIR/IR/LLVMMemorySlot.cpp
M mlir/lib/Dialect/Linalg/TransformOps/LinalgTransformOps.cpp
M mlir/lib/Dialect/MLProgram/Transforms/PipelineGlobalOps.cpp
M mlir/lib/Dialect/Math/Transforms/AlgebraicSimplification.cpp
M mlir/lib/Dialect/MemRef/IR/MemRefOps.cpp
M mlir/lib/Dialect/MemRef/Transforms/FoldMemRefAliasOps.cpp
M mlir/lib/Dialect/NVGPU/IR/NVGPUDialect.cpp
M mlir/lib/Dialect/OpenACC/IR/CMakeLists.txt
M mlir/lib/Dialect/OpenACC/IR/OpenACCCG.cpp
M mlir/lib/Dialect/OpenACC/Transforms/ACCImplicitDeclare.cpp
M mlir/lib/Dialect/OpenACC/Utils/OpenACCUtils.cpp
M mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
M mlir/lib/Dialect/SCF/Transforms/BufferizableOpInterfaceImpl.cpp
M mlir/lib/Dialect/SPIRV/IR/SPIRVOpDefinition.cpp
M mlir/lib/Dialect/SPIRV/IR/SPIRVOps.cpp
M mlir/lib/Dialect/SPIRV/IR/SPIRVTypes.cpp
M mlir/lib/Dialect/Shard/Transforms/Partition.cpp
M mlir/lib/Dialect/Tensor/Transforms/FoldTensorSubsetOps.cpp
M mlir/lib/Dialect/Tosa/IR/TargetEnv.cpp
M mlir/lib/Dialect/Tosa/IR/TosaCanonicalizations.cpp
M mlir/lib/Dialect/Tosa/IR/TosaOps.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaProfileCompliance.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaValidation.cpp
M mlir/lib/Dialect/Transform/IR/TransformAttrs.cpp
M mlir/lib/Dialect/Transform/IR/TransformDialect.cpp
M mlir/lib/Dialect/Transform/IR/TransformOps.cpp
M mlir/lib/Dialect/Transform/IR/TransformTypes.cpp
M mlir/lib/Dialect/Transform/Interfaces/TransformInterfaces.cpp
M mlir/lib/Dialect/Vector/IR/VectorOps.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorDistribute.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorTransforms.cpp
M mlir/lib/Dialect/XeGPU/IR/XeGPUDialect.cpp
M mlir/lib/Dialect/XeGPU/IR/XeGPUOps.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUBlocking.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPULayoutImpl.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUPropagateLayout.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUSubgroupDistribute.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUUnroll.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUWgToSgDistribute.cpp
M mlir/lib/Dialect/XeGPU/Utils/XeGPUUtils.cpp
M mlir/lib/ExecutionEngine/ExecutionEngine.cpp
M mlir/lib/IR/ODSSupport.cpp
M mlir/lib/IR/OperationSupport.cpp
M mlir/lib/Target/LLVM/CMakeLists.txt
M mlir/lib/Target/LLVM/XeVM/Target.cpp
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
M mlir/lib/Target/LLVMIR/ModuleTranslation.cpp
M mlir/lib/Transforms/CSE.cpp
M mlir/lib/Transforms/Utils/DialectConversion.cpp
M mlir/python/mlir/dialects/ext.py
M mlir/test/Bytecode/uselist_orders.mlir
M mlir/test/Conversion/ArithToLLVM/arith-to-llvm.mlir
M mlir/test/Conversion/MathToEmitC/math-to-emitc.mlir
M mlir/test/Conversion/VectorToLLVM/vector-mask-to-llvm.mlir
M mlir/test/Conversion/VectorToLLVM/vector-to-llvm.mlir
M mlir/test/Conversion/VectorToLLVM/vector-xfer-to-llvm.mlir
M mlir/test/Dialect/Arith/canonicalize.mlir
M mlir/test/Dialect/Arith/ops.mlir
M mlir/test/Dialect/Bufferization/Transforms/one-shot-module-bufferize.mlir
A mlir/test/Dialect/EmitC/math/ops.mlir
M mlir/test/Dialect/LLVMIR/sroa-intrinsics.mlir
M mlir/test/Dialect/Linalg/tile-to-forall.mlir
M mlir/test/Dialect/MLProgram/pipeline-globals.mlir
M mlir/test/Dialect/MemRef/fold-memref-alias-ops.mlir
M mlir/test/Dialect/MemRef/invalid.mlir
M mlir/test/Dialect/MemRef/ops.mlir
M mlir/test/Dialect/NVGPU/invalid.mlir
M mlir/test/Dialect/OpenACC/acc-implicit-declare.mlir
A mlir/test/Dialect/OpenACC/compute-region-canonicalize.mlir
M mlir/test/Dialect/OpenMP/invalid.mlir
M mlir/test/Dialect/OpenMP/ops.mlir
M mlir/test/Dialect/Quant/Bytecode/types.mlir
M mlir/test/Dialect/Quant/parse-uniform.mlir
M mlir/test/Dialect/SPIRV/IR/group-ops.mlir
M mlir/test/Dialect/SPIRV/IR/intel-ext-ops.mlir
M mlir/test/Dialect/SPIRV/IR/logical-ops.mlir
M mlir/test/Dialect/SPIRV/IR/non-uniform-ops.mlir
M mlir/test/Dialect/SPIRV/IR/structure-ops.mlir
M mlir/test/Dialect/SPIRV/IR/tosa-ops-verification.mlir
M mlir/test/Dialect/Shard/resharding-partition.mlir
M mlir/test/Dialect/Tensor/fold-tensor-subset-ops.mlir
M mlir/test/Dialect/Tosa/availability.mlir
M mlir/test/Dialect/Tosa/canonicalize.mlir
M mlir/test/Dialect/Tosa/invalid_extension.mlir
M mlir/test/Dialect/Tosa/level_check.mlir
M mlir/test/Dialect/Tosa/ops.mlir
M mlir/test/Dialect/Tosa/tosa-infer-shapes.mlir
M mlir/test/Dialect/Tosa/tosa-validation-version-1p0-invalid.mlir
M mlir/test/Dialect/Tosa/tosa-validation-version-1p0-pro-fp-invalid.mlir
M mlir/test/Dialect/Tosa/tosa-validation-version-1p1-pro-fp-valid.mlir
M mlir/test/Dialect/Tosa/tosa-validation-version-1p1-valid.mlir
M mlir/test/Dialect/Tosa/verifier.mlir
A mlir/test/Dialect/Transform/normal-forms.mlir
M mlir/test/Dialect/Transform/ops-invalid.mlir
M mlir/test/Dialect/Vector/canonicalize.mlir
A mlir/test/Dialect/Vector/canonicalize/vector-extract.mlir
M mlir/test/Dialect/Vector/vector-contract-to-matrix-intrinsics-transforms.mlir
M mlir/test/Dialect/XeGPU/invalid.mlir
M mlir/test/Dialect/XeGPU/ops.mlir
M mlir/test/Dialect/XeGPU/propagate-layout-subgroup.mlir
M mlir/test/Dialect/XeGPU/propagate-layout.mlir
M mlir/test/Dialect/XeGPU/resolve-layout-conflicts.mlir
M mlir/test/Dialect/XeGPU/subgroup-distribute-unit.mlir
M mlir/test/Dialect/XeGPU/transform-ops.mlir
M mlir/test/Dialect/XeGPU/xegpu-blocking.mlir
M mlir/test/Dialect/XeGPU/xegpu-unroll-patterns.mlir
M mlir/test/Dialect/XeGPU/xegpu-vector-linearize.mlir
A mlir/test/IR/invalid-properties.mlir
M mlir/test/IR/operation-equality.mlir
M mlir/test/Integration/Dialect/Vector/CPU/create-mask.mlir
M mlir/test/Target/LLVMIR/Import/fastmath.ll
M mlir/test/Target/LLVMIR/llvmir.mlir
M mlir/test/Target/LLVMIR/omptarget-parallel-wsloop.mlir
A mlir/test/Target/LLVMIR/openmp-allocate-directive.mlir
M mlir/test/Target/LLVMIR/openmp-cancel-distribute-parallel-loop.mlir
M mlir/test/Target/LLVMIR/openmp-cancel.mlir
M mlir/test/Target/LLVMIR/openmp-cancellation-point.mlir
M mlir/test/Target/LLVMIR/openmp-composite-simd-if.mlir
M mlir/test/Target/LLVMIR/openmp-dist_schedule_with_wsloop.mlir
M mlir/test/Target/LLVMIR/openmp-iterator.mlir
M mlir/test/Target/LLVMIR/openmp-llvm.mlir
M mlir/test/Target/LLVMIR/openmp-reduction-array-sections.mlir
M mlir/test/Target/LLVMIR/openmp-reduction-sections.mlir
M mlir/test/Target/LLVMIR/openmp-simd-guided.mlir
A mlir/test/Target/LLVMIR/openmp-taskloop-local-bounds.mlir
M mlir/test/Target/LLVMIR/openmp-teams-distribute-reduction.mlir
M mlir/test/Target/LLVMIR/openmp-todo.mlir
M mlir/test/Target/SPIRV/intel-ext-ops.mlir
M mlir/test/Target/SPIRV/logical-ops.mlir
M mlir/test/Transforms/test-legalize-type-conversion.mlir
M mlir/test/lib/Dialect/Test/TestOpDefs.cpp
M mlir/test/lib/Dialect/Test/TestOps.td
M mlir/test/lib/Dialect/Transform/CMakeLists.txt
M mlir/test/lib/Dialect/Transform/TestTransformDialectExtension.cpp
M mlir/test/lib/Dialect/Transform/TestTransformDialectExtension.h
M mlir/test/lib/Dialect/Transform/TestTransformDialectExtension.td
M mlir/test/lib/Dialect/XeGPU/TestXeGPUTransforms.cpp
M mlir/test/python/dialects/ext.py
M mlir/test/python/dialects/python_test.py
M mlir/test/python/dialects/transform_op_interface.py
M mlir/test/python/integration/dialects/bf.py
M mlir/test/python/lib/PythonTestModuleNanobind.cpp
M mlir/unittests/Dialect/OpenACC/CMakeLists.txt
A mlir/unittests/Dialect/OpenACC/OpenACCCGOpsTest.cpp
M mlir/unittests/Dialect/OpenACC/OpenACCUtilsCGTest.cpp
M offload/CMakeLists.txt
M offload/cmake/OpenMPTesting.cmake
M offload/include/Shared/APITypes.h
M offload/include/device.h
M offload/include/omptarget.h
M offload/liboffload/src/OffloadImpl.cpp
M offload/libomptarget/device.cpp
M offload/libomptarget/interface.cpp
M offload/libomptarget/omptarget.cpp
M offload/libomptarget/private.h
M offload/plugins-nextgen/amdgpu/dynamic_hsa/hsa.cpp
M offload/plugins-nextgen/amdgpu/dynamic_hsa/hsa.h
M offload/plugins-nextgen/amdgpu/dynamic_hsa/hsa_ext_amd.h
M offload/plugins-nextgen/amdgpu/src/rtl.cpp
M offload/plugins-nextgen/common/CMakeLists.txt
M offload/plugins-nextgen/common/include/PluginInterface.h
A offload/plugins-nextgen/common/include/RecordReplay.h
M offload/plugins-nextgen/common/src/PluginInterface.cpp
A offload/plugins-nextgen/common/src/RecordReplay.cpp
M offload/plugins-nextgen/cuda/CMakeLists.txt
M offload/plugins-nextgen/cuda/src/rtl.cpp
M offload/plugins-nextgen/level_zero/src/L0Kernel.cpp
M offload/test/CMakeLists.txt
M offload/test/api/omp_indirect_call_table_manual.c
M offload/test/api/omp_indirect_func_array.c
M offload/test/api/omp_indirect_func_struct.c
M offload/test/lit.cfg
M offload/test/lit.site.cfg.in
M offload/test/mapping/map_ordering_tgt_exit_data_always_always.c
M offload/test/mapping/map_ordering_tgt_exit_data_delete_from.c
M offload/test/mapping/map_ordering_tgt_exit_data_delete_from_assumedsize.c
M offload/test/mapping/map_ordering_tgt_exit_data_from_delete_assumedsize.c
M offload/test/offloading/interop-print.c
M offload/test/offloading/ompx_bare_multi_dim.cpp
M offload/test/offloading/ompx_coords.c
A offload/test/tools/omp-kernel-replay/record-replay-advanced.cpp
A offload/test/tools/omp-kernel-replay/record-replay-basic.cpp
A offload/test/tools/omp-kernel-replay/record-replay-diff-teams-threads.cpp
A offload/test/tools/omp-kernel-replay/record-replay-diff-threads.cpp
M offload/tools/deviceinfo/llvm-offload-device-info.cpp
M offload/tools/kernelreplay/llvm-omp-kernel-replay.cpp
M offload/unittests/CMakeLists.txt
M openmp/CMakeLists.txt
M openmp/device/include/Synchronization.h
M openmp/device/src/Misc.cpp
M openmp/docs/Building.md
M openmp/runtime/src/kmp_alloc.cpp
M openmp/runtime/test/ompt/misc/control_tool.c
M utils/bazel/MODULE.bazel
M utils/bazel/MODULE.bazel.lock
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
M utils/bazel/llvm-project-overlay/lldb/source/Plugins/BUILD.bazel
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
M utils/bazel/llvm-project-overlay/llvm/unittests/BUILD.bazel
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
M utils/bazel/llvm-project-overlay/mlir/test/BUILD.bazel
A utils/bazel/llvm-project-overlay/mlir/test/Bytecode/BUILD.bazel
Log Message:
-----------
Merge branch 'main' into users/c8ef/fold_left_first
Compare: https://github.com/llvm/llvm-project/compare/fefd36b6d030...d1abc8240fca
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