[all-commits] [llvm/llvm-project] 85f485: [LoongArch] Select `V{AND, OR, XOR, NOR}I.B` for bitw...

[hev via All-commits]

  Branch: refs/heads/users/hev/vbitsi
  Home:   https://github.com/llvm/llvm-project
  Commit: 85f485e8f3e3eb136808e33a17858b08ea6397be
      https://github.com/llvm/llvm-project/commit/85f485e8f3e3eb136808e33a17858b08ea6397be
  Author: WANG Rui <wangrui at loongson.cn>
  Date:   2026-04-17 (Fri, 17 Apr 2026)

  Changed paths:
    M llvm/lib/Target/LoongArch/AsmParser/LoongArchAsmParser.cpp
    M llvm/lib/Target/LoongArch/LoongArchISelDAGToDAG.cpp
    M llvm/lib/Target/LoongArch/LoongArchISelDAGToDAG.h
    M llvm/lib/Target/LoongArch/LoongArchInstrInfo.td
    M llvm/lib/Target/LoongArch/LoongArchLASXInstrInfo.td
    M llvm/lib/Target/LoongArch/LoongArchLSXInstrInfo.td
    M llvm/test/CodeGen/LoongArch/lasx/ctpop-ctlz.ll
    M llvm/test/CodeGen/LoongArch/lasx/ir-instruction/and.ll
    M llvm/test/CodeGen/LoongArch/lasx/ir-instruction/icmp.ll
    M llvm/test/CodeGen/LoongArch/lasx/ir-instruction/nor.ll
    M llvm/test/CodeGen/LoongArch/lasx/ir-instruction/or.ll
    M llvm/test/CodeGen/LoongArch/lasx/ir-instruction/xor.ll
    M llvm/test/CodeGen/LoongArch/lasx/xvmskcond.ll
    M llvm/test/CodeGen/LoongArch/lsx/ctpop-ctlz.ll
    M llvm/test/CodeGen/LoongArch/lsx/ir-instruction/and.ll
    M llvm/test/CodeGen/LoongArch/lsx/ir-instruction/icmp.ll
    M llvm/test/CodeGen/LoongArch/lsx/ir-instruction/nor.ll
    M llvm/test/CodeGen/LoongArch/lsx/ir-instruction/or.ll
    M llvm/test/CodeGen/LoongArch/lsx/ir-instruction/xor.ll
    M llvm/test/CodeGen/LoongArch/pr177863.ll

  Log Message:
  -----------
  [LoongArch] Select `V{AND,OR,XOR,NOR}I.B` for bitwise with byte splat immediates

The `V{AND,OR,XOR,NOR}I.B` instructions operate on byte elements and accept
an 8-bit immediate. However, when the same byte splat constant is used with
wider vector element types (e.g. v8i16, v4i32, v2i64), instruction selection
currently falls back to materializing the constant in a temporary register.

```
vrepli.b  -1
vxor.v
```

even though the immediate form is available:

```
vxori.b 255
```

This happens because selectVSplatImm requires the splat bit width to match
the vector element size, preventing matching byte splat immediates for
non-i8 vector types.

Generalize selectVSplatImm to optionally accept an explicit element bit
width and introduce a new vsplat_i8_uimm8 pattern to detect byte splat
immediates independently of the vector element type. Use this pattern to
extend the V*I.B instruction patterns to wider vector element types.

This enables direct selection of byte-immediate bitwise instructions,
reduces instruction count, and avoids unnecessary temporary registers in
common mask operations.


  Commit: 7cb8a80f3049b68ff2f14dffa2dc7e9e631f3040
      https://github.com/llvm/llvm-project/commit/7cb8a80f3049b68ff2f14dffa2dc7e9e631f3040
  Author: WANG Rui <wangrui at loongson.cn>
  Date:   2026-04-17 (Fri, 17 Apr 2026)

  Changed paths:
    M llvm/lib/Target/LoongArch/AsmParser/LoongArchAsmParser.cpp
    M llvm/lib/Target/LoongArch/LoongArchInstrInfo.td
    M llvm/lib/Target/LoongArch/LoongArchLASXInstrInfo.td
    M llvm/lib/Target/LoongArch/LoongArchLSXInstrInfo.td

  Log Message:
  -----------
  Address wanglei's comments


Compare: https://github.com/llvm/llvm-project/compare/5a432e2e3647...7cb8a80f3049

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