[all-commits] [llvm/llvm-project] ad5546: Reapply "[VPlan] Extract reverse mask from reverse...

[Mel Chen via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: ad554651add849014743f68c0decef3e66b3cdbd
      https://github.com/llvm/llvm-project/commit/ad554651add849014743f68c0decef3e66b3cdbd
  Author: Mel Chen <mel.chen at sifive.com>
  Date:   2026-04-16 (Thu, 16 Apr 2026)

  Changed paths:
    M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
    M llvm/lib/Transforms/Vectorize/VPlan.h
    M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
    M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
    M llvm/test/Transforms/LoopVectorize/AArch64/sve-vector-reverse-mask4.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/vector-reverse-mask4.ll
    M llvm/test/Transforms/LoopVectorize/RISCV/dbg-tail-folding-by-evl.ll
    M llvm/test/Transforms/LoopVectorize/RISCV/predicated-reverse-store.ll
    M llvm/test/Transforms/LoopVectorize/RISCV/riscv-vector-reverse.ll
    M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-reverse-load-store.ll
    M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-uniform-store.ll
    M llvm/test/Transforms/LoopVectorize/VPlan/RISCV/vplan-riscv-vector-reverse.ll
    M llvm/test/Transforms/LoopVectorize/X86/masked_load_store.ll
    M llvm/unittests/Transforms/Vectorize/VPlanTest.cpp

  Log Message:
  -----------
  Reapply "[VPlan] Extract reverse mask from reverse accesses" (#189930)

Following https://github.com/llvm/llvm-project/pull/146525, separate the
reverse mask from reverse access recipes.
At the same time, remove the unused member variable Reverse from
VPWidenMemoryRecipe.
This will help to reduce redundant reverse mask computations by
VPlan-based common subexpression elimination.

The previous revert was due to an over-aggressive assertion that
incorrectly flagged a reverse load followed by a scatter store as
illegal. This version relaxes the assertion to check the mask only.

Re-land #155579
Base on pre-commit #189928



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