[all-commits] [llvm/llvm-project] 27ff65: [OpenASIP] Update the TCE target defs for OpenASIP...

[Pekka Jääskeläinen via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 27ff65192c0d4f3c5a6585d49da3ddb138a811b6
      https://github.com/llvm/llvm-project/commit/27ff65192c0d4f3c5a6585d49da3ddb138a811b6
  Author: Pekka Jääskeläinen <pekka.jaaskelainen at tuni.fi>
  Date:   2026-04-15 (Wed, 15 Apr 2026)

  Changed paths:
    M clang/lib/Basic/Targets.cpp
    M clang/lib/Basic/Targets/TCE.cpp
    M clang/lib/Basic/Targets/TCE.h
    M clang/lib/CodeGen/CodeGenModule.cpp
    M clang/lib/Driver/Driver.cpp
    M clang/lib/Driver/ToolChains/TCE.cpp
    M clang/lib/Driver/ToolChains/TCE.h
    M clang/test/CodeGen/target-data.c
    M llvm/include/llvm/TargetParser/Triple.h
    M llvm/lib/TargetParser/TargetDataLayout.cpp
    M llvm/lib/TargetParser/Triple.cpp

  Log Message:
  -----------
  [OpenASIP] Update the TCE target defs for OpenASIP 2.2 (#176698)

OpenASIP (ex. TCE*) is a special target which has only a stub target
definition in the LLVM side that has resided in LLVM for over 15 years.
I'm the original contributors of this stub.

Due to needing various other patches to LLVM that were not nicely
upstreamable, the upstream TCE target defs have long been unupdated.
However, with the recent changes to the vectorization types etc. I
managed to minimize the required LLVM TCE patch to this one and with
this patch OpenASIP can be (finally!) used without a patched LLVM for
VLIW/TTA customization. RISC-V operation set customization still
requires a patch to polish and upstream (TBD).

This patch:

* Introduces a 64b variant of an OpenASIP target.
* Unifies the datalayouts of the different target variants to make it
compatible with OpenASIP v2.2 and above.
* Updates the OpenCL address space IDs to be compatible with the latest
PoCL backends.
* Implements Triple::computeDataLayout() for completeness.

The patch is very unintrusive and I'd love to backport it in the LLVM 22
release as well.

[*] More info:
https://blog.llvm.org/2010/06/tce-project-co-design-of-application.html
https://openasip.org

The actual backends for the customized processors are generated on the
fly with a backend generator of the OpenASIP project based on a target
definition file and loaded as plugins to the LLVM framework. This
mechanism enables fast "design space exploration" of
application-specific processors designed with the toolset as only a
small part of the compiler has to be regenerated for new design
candidates.



To unsubscribe from these emails, change your notification settings at https://github.com/llvm/llvm-project/settings/notifications