[all-commits] [llvm/llvm-project] cee66b: [AMDGPU]Refactor `lowerWaveReduce` for maintainabi...

[Aaditya via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: cee66b7a4bd7597061e880a3dd3a218167787710
      https://github.com/llvm/llvm-project/commit/cee66b7a4bd7597061e880a3dd3a218167787710
  Author: Aaditya <115080342+easyonaadit at users.noreply.github.com>
  Date:   2026-04-15 (Wed, 15 Apr 2026)

  Changed paths:
    M llvm/lib/Target/AMDGPU/SIISelLowering.cpp

  Log Message:
  -----------
  [AMDGPU]Refactor `lowerWaveReduce` for maintainability (#189223)

The function to lower wave reduce pseudos is already quite
large ,and there are yet a few more operations to support.
Refactoring some of the code to make it more manageable.
Summary of changes:
1. Moved the expansion for `V_CNDMASK_B64_PSEUDO` to a
separate function. It's needed for 64 bit dpp operations.

2. Collapsed `getIdentityValueFor32BitWaveReduction` and
`getIdentityValueFor64BitWaveReduction` into a single
function which returns a 64 bit unsigned value.

3. Modified `getDPPOpcForWaveReduction` to also return
the `Clamp` opcode.

4. Added a lambda: `BuildRegSequence` and a static function
`ExtractSubRegs` as those code blocks are repeated with
little variation.

5. Moved logic for setting identity value in inactive lanes
to `BuildSetInactiveInstr`.



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