[all-commits] [llvm/llvm-project] f32f6a: [RISCV] Enable use of vfslide1up in lowerVPSpliceE...

[Craig Topper via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: f32f6a829374239e68cb2e8bb2a00908cb248745
      https://github.com/llvm/llvm-project/commit/f32f6a829374239e68cb2e8bb2a00908cb248745
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2026-04-14 (Tue, 14 Apr 2026)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
    A llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vp-splice-bf16.ll
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vp-splice.ll
    A llvm/test/CodeGen/RISCV/rvv/vp-splice-bf16.ll
    M llvm/test/CodeGen/RISCV/rvv/vp-splice.ll

  Log Message:
  -----------
  [RISCV] Enable use of vfslide1up in lowerVPSpliceExperimental for bf16 vectors with Zvfbfa (#192169)



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