[all-commits] [llvm/llvm-project] 914546: [RISCV] Prevent emitting vsetvli with e32alt or e6...

[Craig Topper via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 9145467cba6b6ce352b62f8499bb5afb725ce325
      https://github.com/llvm/llvm-project/commit/9145467cba6b6ce352b62f8499bb5afb725ce325
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2026-04-14 (Tue, 14 Apr 2026)

  Changed paths:
    M llvm/include/llvm/TargetParser/RISCVTargetParser.h
    M llvm/lib/Target/RISCV/MCTargetDesc/RISCVInstPrinter.cpp
    M llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
    M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
    M llvm/test/CodeGen/RISCV/rvv/mixed-float-bf16-arith.ll

  Log Message:
  -----------
  [RISCV] Prevent emitting vsetvli with e32alt or e64alt. (#191960)

The e32alt and e64alt encodings for vtype are reserved.

Non-fp instructions ignore altfmt and we want to use that to avoid
vtype toggle when using load, store, slide, gather, etc. to manipulate
bf16 vectors. This is why we have a Demanded bit for AltFmt.

We need to make sure we don't keep the AltFmt set when we're changing
SEW to 32 or 64.

A new isValidVType function has been added to help catch illegal
vtype earlier.



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