[all-commits] [llvm/llvm-project] 66157f: [AArch64][llvm] Redefine some isns as an alias of ...
Jonathan Thackray via All-commits
all-commits at lists.llvm.org
Tue Apr 14 07:05:15 PDT 2026
Branch: refs/heads/users/jthackray/fix_sys_aliases
Home: https://github.com/llvm/llvm-project
Commit: 66157f65a29782dba94e6e5837de8de7eed42588
https://github.com/llvm/llvm-project/commit/66157f65a29782dba94e6e5837de8de7eed42588
Author: Jonathan Thackray <jonathan.thackray at arm.com>
Date: 2026-04-14 (Tue, 14 Apr 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64InstrFormats.td
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp
M llvm/test/MC/AArch64/armv8.9a-debug-pmu.s
M llvm/test/MC/AArch64/armv9.4a-gcs.s
M llvm/test/MC/AArch64/armv9.6a-rme-gpc3.s
M llvm/test/MC/AArch64/brbe.s
Log Message:
-----------
[AArch64][llvm] Redefine some isns as an alias of `SYS`
Some instructions are not currently defined as an alias of `SYS`
when they should be, so they don't disassemble back into the
native instruction, but instead disassemble into `SYS`.
Fix these cases and add additional testcase.
Note that I've left `GCSPUSHM` due to a `mayStore`, `GCSSS1` and
`GCSSS2` as they're used in AArch64ISelDAGToDAG.cpp, and `GCSPOPM`
has an intrinsic pattern in AArch64InstrInfo.td. They will disassemble
correctly though, as they use `InstAlias`.
Commit: 537b32c06128149ab491cae0196a8bbc1a722f9e
https://github.com/llvm/llvm-project/commit/537b32c06128149ab491cae0196a8bbc1a722f9e
Author: Jonathan Thackray <jonathan.thackray at arm.com>
Date: 2026-04-14 (Tue, 14 Apr 2026)
Changed paths:
M llvm/test/MC/AArch64/arm64-aliases.s
M llvm/test/MC/AArch64/armv8.9a-debug-pmu.s
M llvm/test/MC/AArch64/armv9.4a-gcs.s
M llvm/test/MC/AArch64/armv9.6a-rme-gpc3.s
A llvm/test/MC/AArch64/armv9a-sysp-pairs.s
M llvm/test/MC/AArch64/brbe.s
Log Message:
-----------
fixup! Move new tests into arm64-aliases.s
Commit: 865fa12f2e0b32eb07177bf312f939ea777dc1cd
https://github.com/llvm/llvm-project/commit/865fa12f2e0b32eb07177bf312f939ea777dc1cd
Author: Jonathan Thackray <jonathan.thackray at arm.com>
Date: 2026-04-14 (Tue, 14 Apr 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
Log Message:
-----------
fixup! Parse instructions in AArch64AsmParser.cpp
Commit: b4582a214515b5f367c2251fb685ef4e927ae8f2
https://github.com/llvm/llvm-project/commit/b4582a214515b5f367c2251fb685ef4e927ae8f2
Author: Jonathan Thackray <jonathan.thackray at arm.com>
Date: 2026-04-14 (Tue, 14 Apr 2026)
Changed paths:
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp
Log Message:
-----------
fixup! Improve printing code for tabs and commas
Commit: c4a194fc2e813f579bf0f2f70fa2fdcf1cb1b684
https://github.com/llvm/llvm-project/commit/c4a194fc2e813f579bf0f2f70fa2fdcf1cb1b684
Author: Jonathan Thackray <jonathan.thackray at arm.com>
Date: 2026-04-14 (Tue, 14 Apr 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
M llvm/lib/Target/AArch64/AArch64InstrFormats.td
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/lib/Target/AArch64/AArch64SchedFalkorDetails.td
M llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp
Log Message:
-----------
fixup! Ensure GCSPUSHM, GCSSS1, GCSPOPM and GCSSS2 are all converted
Commit: 4bc3ec9a05a47f2ddfc2a92dfa56e223e35ca1ce
https://github.com/llvm/llvm-project/commit/4bc3ec9a05a47f2ddfc2a92dfa56e223e35ca1ce
Author: Jonathan Thackray <jonathan.thackray at arm.com>
Date: 2026-04-14 (Tue, 14 Apr 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64InstrFormats.td
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp
M llvm/test/MC/AArch64/arm64-aliases.s
R llvm/test/MC/AArch64/armv9a-sysp-pairs.s
M llvm/test/MC/AArch64/armv9a-sysp.s
M llvm/test/MC/AArch64/armv9a-tlbip.s
Log Message:
-----------
fixup! Add negative tests, and revert 391c34289 (move to aliases in Tablegen)
Commit: ab3cc369e4129565a0a3a410b51c0c3a2b389a30
https://github.com/llvm/llvm-project/commit/ab3cc369e4129565a0a3a410b51c0c3a2b389a30
Author: Jonathan Thackray <jonathan.thackray at arm.com>
Date: 2026-04-14 (Tue, 14 Apr 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64InstrFormats.td
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp
Log Message:
-----------
fixup! SYSL only has dest register
Compare: https://github.com/llvm/llvm-project/compare/9b960103a31e...ab3cc369e412
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