[all-commits] [llvm/llvm-project] 6f1a17: [LoongArch] Select V{ADD, SUB}I for operations with...

[hev via All-commits]

  Branch: refs/heads/users/hev/vsubi
  Home:   https://github.com/llvm/llvm-project
  Commit: 6f1a17f6f164c4d1da86a57de9203b52064af7ea
      https://github.com/llvm/llvm-project/commit/6f1a17f6f164c4d1da86a57de9203b52064af7ea
  Author: WANG Rui <wangrui at loongson.cn>
  Date:   2026-04-14 (Tue, 14 Apr 2026)

  Changed paths:
    M llvm/lib/Target/LoongArch/LoongArchISelDAGToDAG.cpp
    M llvm/lib/Target/LoongArch/LoongArchISelDAGToDAG.h
    M llvm/lib/Target/LoongArch/LoongArchLASXInstrInfo.td
    M llvm/lib/Target/LoongArch/LoongArchLSXInstrInfo.td
    M llvm/test/CodeGen/LoongArch/lasx/ir-instruction/add.ll
    M llvm/test/CodeGen/LoongArch/lasx/ir-instruction/sub.ll
    M llvm/test/CodeGen/LoongArch/lsx/ir-instruction/add.ll
    M llvm/test/CodeGen/LoongArch/lsx/ir-instruction/sub.ll

  Log Message:
  -----------
  [LoongArch] Select V{ADD,SUB}I for operations with negative splat immediates

Currently, vector add/sub with a negative splat immediate is lowered as a
vector splat followed by a register-register add, e.g.:

```
vrepli.b $vr1, -1
vadd.b   $vr0, $vr0, $vr1
```

This misses the opportunity to use the more efficient V{ADD,SUB}I instruction
with a positive immediate.

This patch introduces `selectVSplatImmNeg` to detect negative splat
immediates whose negated value fits in a 5-bit unsigned immediate. New
patterns `(Pat{Vr,Vr}Nimm5)` are added to match:

```
add v, splat(-imm)  -->  vsubi v, v, imm
sub v, splat(-imm)  -->  vaddi v, v, imm
```

This avoids materializing the splat constant and reduces the instruction
count.

The transformation is applied for both LSX and LASX vector types.



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