[all-commits] [llvm/llvm-project] 4994a9: [flang][OpenMP] Remove namespace qualification fro...
Joel E. Denny via All-commits
all-commits at lists.llvm.org
Mon Apr 13 17:39:32 PDT 2026
Branch: refs/heads/users/jdenny-ornl/fix-blockfreq-unroll-unconditional-latches--fast
Home: https://github.com/llvm/llvm-project
Commit: 4994a971358f5b722c32e356854491f3ab8fc833
https://github.com/llvm/llvm-project/commit/4994a971358f5b722c32e356854491f3ab8fc833
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2026-04-06 (Mon, 06 Apr 2026)
Changed paths:
M flang/lib/Semantics/openmp-utils.cpp
Log Message:
-----------
[flang][OpenMP] Remove namespace qualification from GetUpperName, NFC (#190619)
This applies to flang/lib/Semantics/openmp-utils.cpp, since it contains
`using namespace Fortran::parser::omp`.
Commit: 34a16392fa4f131a4329c4ffb5f62a199d4fcd66
https://github.com/llvm/llvm-project/commit/34a16392fa4f131a4329c4ffb5f62a199d4fcd66
Author: Ryotaro Kasuga <kasuga.ryotaro at fujitsu.com>
Date: 2026-04-06 (Mon, 06 Apr 2026)
Changed paths:
M llvm/include/llvm/Analysis/DependenceAnalysis.h
M llvm/lib/Analysis/DependenceAnalysis.cpp
Log Message:
-----------
[DA] Use SmallVector instead of raw new/delete (NFC) (#190586)
Some functions used `new`/`delete` to allocate/free arrays. To avoid
memory leaks, it would be better to avoid using raw pointers. This patch
replaces the use of them with `SmallVector`.
Commit: 8d7823ea8f40cf5df1c623018bf9c0a308fa4a36
https://github.com/llvm/llvm-project/commit/8d7823ea8f40cf5df1c623018bf9c0a308fa4a36
Author: albertbolt1 <45144020+albertbolt1 at users.noreply.github.com>
Date: 2026-04-06 (Mon, 06 Apr 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp
M clang/test/CodeGen/AArch64/neon-intrinsics.c
M clang/test/CodeGen/AArch64/neon/intrinsics.c
Log Message:
-----------
[CIR][AArch64] Added vector intrinsics for shift left (#187516)
Added vector intrinsics for
vshlq_n_s8
vshlq_n_s16
vshlq_n_s32
vshlq_n_s64
vshlq_n_u8
vshlq_n_u16
vshlq_n_u32
vshlq_n_u64
vshl_n_s8
vshl_n_s16
vshl_n_s32
vshl_n_s64
vshl_n_u8
vshl_n_u16
vshl_n_u32
vshl_n_u64
these cover all the vector intrinsics for constant shift
the method followed
1) the vectors for quad words are of the form `64x2`, `32x4`, `16x8`,
`8x16` and the shift is a constant value but for shift left we need both
of them to be vectors so we take the constant shift and convert it into
a vector of respective form, for `64x2` we convert the constant to
`64x2`, I have learnt that this process is also called **splat**
2) After splat we have that the lhs and rhs are of the same size hence
the shift left can be applied
3) There is one issue though, the ops[0] is not of the right size, for
quad words it falls back to the default int8*16 in the function, so I am
converting it to the required size using bit casting, `8x16` = `64x2` so
we can bitcast and get the vector array in the right form.
Wrote the test cases for all the intrinsics listed above
#185382
Commit: 06e666a8f6c1a6555650cdbe641e0bbd5d0a00f0
https://github.com/llvm/llvm-project/commit/06e666a8f6c1a6555650cdbe641e0bbd5d0a00f0
Author: Ruoyu Qiu <cabbaken at outlook.com>
Date: 2026-04-06 (Mon, 06 Apr 2026)
Changed paths:
A llvm/test/Analysis/DependenceAnalysis/banerjee-overflow.ll
Log Message:
-----------
[DA] Add overflow test for BanerjeeMIVtest (#190468)
Commit: 930ef7736e0bb4550821e4d66beb498f974bb837
https://github.com/llvm/llvm-project/commit/930ef7736e0bb4550821e4d66beb498f974bb837
Author: Eric Feng <55723758+efric at users.noreply.github.com>
Date: 2026-04-06 (Mon, 06 Apr 2026)
Changed paths:
M mlir/include/mlir/Dialect/AMDGPU/IR/AMDGPUOps.td
M mlir/lib/Conversion/AMDGPUToROCDL/AMDGPUToROCDL.cpp
M mlir/test/Conversion/AMDGPUToROCDL/gfx1250.mlir
M mlir/test/Dialect/AMDGPU/ops.mlir
Log Message:
-----------
[mlir][amdgpu] Add optional write mask to amdgpu.global_load_async_to_lds (#190498)
Commit: 348295ac056cb7ac3a9a9641d2b670866ddcf01b
https://github.com/llvm/llvm-project/commit/348295ac056cb7ac3a9a9641d2b670866ddcf01b
Author: Henrich Lauko <xlauko at mail.muni.cz>
Date: 2026-04-06 (Mon, 06 Apr 2026)
Changed paths:
M clang/include/clang/CIR/Dialect/Builder/CIRBaseBuilder.h
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/include/clang/CIR/Dialect/IR/CIRTypes.td
M clang/lib/CIR/CodeGen/CIRGenExprAggregate.cpp
M clang/lib/CIR/CodeGen/CIRGenValue.h
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
M clang/lib/CIR/Dialect/IR/CIRMemorySlot.cpp
M clang/lib/CIR/Dialect/IR/CIRTypes.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
A clang/test/CIR/CodeGen/aggregate-copy-overlap.cpp
M clang/test/CIR/CodeGen/no-unique-address.cpp
M clang/test/CIR/IR/copy.cir
M clang/test/CIR/IR/invalid-copy.cir
Log Message:
-----------
[CIR] Use data size in emitAggregateCopy for overlapping copies (#186702)
Add skip_tail_padding property to cir.copy to handle
potentially-overlapping
subobject copies directly, instead of falling back to cir.libc.memcpy.
When
set, the lowering uses the record's data size (excluding tail padding)
for
the memcpy length. This keeps typed semantics and promotability of
cir.copy.
Also fix CXXABILowering to preserve op properties when recreating
operations,
and expose RecordType::computeStructDataSize() for computing data size
of
padded record types.
Commit: 9265f9284c1306d30f5e63efaec805b308fe0457
https://github.com/llvm/llvm-project/commit/9265f9284c1306d30f5e63efaec805b308fe0457
Author: adams381 <adams at nvidia.com>
Date: 2026-04-06 (Mon, 06 Apr 2026)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/LLVMDialect.td
M mlir/lib/Target/LLVMIR/AttrKindDetail.h
M mlir/test/Target/LLVMIR/Import/function-attributes.ll
M mlir/test/Target/LLVMIR/llvmir.mlir
Log Message:
-----------
[mlir][ABI] Add writable, dead_on_unwind, dead_on_return, nofpclass param attrs to LLVM dialect (#188374)
The MLIR LLVM dialect is missing support for several parameter
attributes that
exist in LLVM IR: `writable`, `dead_on_unwind`, `dead_on_return`, and
`nofpclass`. This adds them to the kind-to-name mapping in
`AttrKindDetail.h`
and the corresponding name accessors in `LLVMDialect.td`.
The existing generic conversion infrastructure in `ModuleTranslation`
and
`ModuleImport` picks them up automatically — `writable` and
`dead_on_unwind`
round-trip as `UnitAttr`, while `dead_on_return` and `nofpclass`
round-trip as
`IntegerAttr`.
CIR needs these to match classic codegen's ABI output (sret gets
`writable
dead_on_unwind`, indirect args get `dead_on_return`, fast-math FP args
get
`nofpclass`).
Commit: baa1e5008bba4bf9a6204b7d0620a95312cb304b
https://github.com/llvm/llvm-project/commit/baa1e5008bba4bf9a6204b7d0620a95312cb304b
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2026-04-06 (Mon, 06 Apr 2026)
Changed paths:
M flang/lib/Semantics/check-cuda.cpp
M flang/test/Semantics/cuf25.cuf
Log Message:
-----------
[flang][cuda] Do not consider kernel result as host variable (#190626)
Commit: e7ac60c56b2310288921e05b977e1cd4796b115a
https://github.com/llvm/llvm-project/commit/e7ac60c56b2310288921e05b977e1cd4796b115a
Author: forking-google-bazel-bot[bot] <265904573+forking-google-bazel-bot[bot]@users.noreply.github.com>
Date: 2026-04-06 (Mon, 06 Apr 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[Bazel] Fixes ce1a9fd (#190577)
This fixes ce1a9fd76640929fe340c5c5d1bb493ea09ca9bc.
Co-authored-by: Google Bazel Bot <google-bazel-bot at google.com>
Commit: 5b33f85a08d2ed9bf6230e64ed968cec8f07840d
https://github.com/llvm/llvm-project/commit/5b33f85a08d2ed9bf6230e64ed968cec8f07840d
Author: Domenic Nutile <domenic.nutile at gmail.com>
Date: 2026-04-06 (Mon, 06 Apr 2026)
Changed paths:
M llvm/docs/AMDGPUUsage.rst
M llvm/lib/Target/AMDGPU/AMDGPUAttributes.def
M llvm/lib/Target/AMDGPU/AMDGPUAttributor.cpp
M llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/always_uniform.ll
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/workitem-intrinsics.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-divergent-i1-phis-no-lane-mask-merging.ll
M llvm/test/CodeGen/AMDGPU/addrspacecast-constantexpr.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-attributor-flat-scratch-init-asan.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-attributor-min-agpr-alloc.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-attributor-nocallback-intrinsics.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-attributor-trap-leaf.ll
A llvm/test/CodeGen/AMDGPU/amdgpu-uniform-intrinsic-wwm-single-lane.ll
M llvm/test/CodeGen/AMDGPU/annotate-kernel-features-hsa-call.ll
M llvm/test/CodeGen/AMDGPU/annotate-kernel-features-hsa.ll
M llvm/test/CodeGen/AMDGPU/annotate-kernel-features.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_single_lane.ll
M llvm/test/CodeGen/AMDGPU/attributor-flatscratchinit-undefined-behavior.ll
M llvm/test/CodeGen/AMDGPU/attributor-flatscratchinit.ll
A llvm/test/CodeGen/AMDGPU/attributor-wwm.ll
M llvm/test/CodeGen/AMDGPU/direct-indirect-call.ll
M llvm/test/CodeGen/AMDGPU/duplicate-attribute-indirect.ll
M llvm/test/CodeGen/AMDGPU/implicitarg-offset-attributes.ll
M llvm/test/CodeGen/AMDGPU/indirect-call-set-from-other-function.ll
M llvm/test/CodeGen/AMDGPU/issue120256-annotate-constexpr-addrspacecast.ll
M llvm/test/CodeGen/AMDGPU/load-constant-always-uniform.ll
M llvm/test/CodeGen/AMDGPU/propagate-flat-work-group-size.ll
M llvm/test/CodeGen/AMDGPU/propagate-waves-per-eu.ll
M llvm/test/CodeGen/AMDGPU/recursive_global_initializer.ll
M llvm/test/CodeGen/AMDGPU/remove-no-kernel-id-attribute.ll
M llvm/test/CodeGen/AMDGPU/simple-indirect-call-2.ll
M llvm/test/CodeGen/AMDGPU/simple-indirect-call.ll
M llvm/test/CodeGen/AMDGPU/uniform-work-group-attribute-missing.ll
M llvm/test/CodeGen/AMDGPU/uniform-work-group-multistep.ll
M llvm/test/CodeGen/AMDGPU/uniform-work-group-nested-function-calls.ll
M llvm/test/CodeGen/AMDGPU/uniform-work-group-prevent-attribute-propagation.ll
M llvm/test/CodeGen/AMDGPU/uniform-work-group-propagate-attribute.ll
M llvm/test/CodeGen/AMDGPU/uniform-work-group-recursion-test.ll
M llvm/test/CodeGen/AMDGPU/uniform-work-group-test.ll
M llvm/test/Transforms/JumpThreading/divergent-target-test.ll
M llvm/test/Transforms/SimpleLoopUnswitch/AMDGPU/nontrivial-unswitch-divergent-target.ll
M llvm/test/Transforms/SpeculativeExecution/single-lane-execution.ll
Log Message:
-----------
[AMDGPU] Change isSingleLaneExecution to account for WWM enabling lanes even if there's only one workitem (#188316)
This issue was discovered during some downstream work around Vulkan CTS
tests, specifically
`dEQP-VK.subgroups.arithmetic.compute.subgroupadd_float`
---------
Co-authored-by: Matt Arsenault <arsenm2 at gmail.com>
Commit: 0bef4c7aabd085e38a0c42857168b05716674329
https://github.com/llvm/llvm-project/commit/0bef4c7aabd085e38a0c42857168b05716674329
Author: Wooseok Lee <wolee at amd.com>
Date: 2026-04-06 (Mon, 06 Apr 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/VOP3Instructions.td
M llvm/test/CodeGen/AMDGPU/and_or.ll
M llvm/test/CodeGen/AMDGPU/or3.ll
Log Message:
-----------
[AMDGPU] Add v2i32 and/or patterns for VOP3 AND_OR and OR3 operations (#188375)
Add ThreeOp_v2i32_Pats pattern class to support v2i32 vector operations
for AND_OR_B32 and OR3_B32 instructions. The new patterns check the
v2i32 and-or or or-or instruction sequence, extract individual 32-bit
elements from v2i32 operands, and applies the and_or or or3 vop3
operations.
Commit: 0d14772a91a5c0bbefb59d6dd5a6c0f54f8ed4ea
https://github.com/llvm/llvm-project/commit/0d14772a91a5c0bbefb59d6dd5a6c0f54f8ed4ea
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-04-06 (Mon, 06 Apr 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoP.td
M llvm/test/CodeGen/RISCV/rv32p.ll
M llvm/test/CodeGen/RISCV/rv64p.ll
Log Message:
-----------
[RISCV][P-ext] Add isel patterns for for macc*.h00/macc*.w00. (#190444)
The RV32 macc*.h00 instructions take the lower half words from rs1 and
rs2, compute the full word product by extending the inputs, and
add to rd. The RV64 macc*.w00 is similar but operates on words
and produces a double word result.
I've restricted this to case where the multiply has a single use.
We don't have a general macc that multiplies the full xlen bits
of rs1 and rs2, so I'm allowing the input to be sext_inreg/and or
have sufficient sign/zero bits according to
ComputeNumSignBits/computeKnownBits.
We should also add mul*.h00/mul.*w00 patterns, but those we should
restrict to at least one input being sext_inreg/and and prefer
regular mul when there are no sext_inreg/and.
Commit: b44d2c977ce2e5dbf9f227bd6ade5d85ae69a463
https://github.com/llvm/llvm-project/commit/b44d2c977ce2e5dbf9f227bd6ade5d85ae69a463
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-04-06 (Mon, 06 Apr 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
A llvm/test/CodeGen/RISCV/rvv/pr189037.ll
Log Message:
-----------
[RISCV] Use a vector MemVT when converting store+extractelt into a vector store. (#190107)
This is needed so that `allowsMemoryAccessForAlignment` checks for
unaligned vector memory
support instead of unaligned scalar memory support when called from
`RISCVTargetLowering::expandUnalignedVPStore`
While there remove incorrect setting of the truncating store flag
on the vector instruction. And restrict the transform to simple stores
since we don't have tests for volatile or atomic.
Fixes #189037
Commit: 38c53b3eb9f8dc25dd82f7918884a319a3aa597d
https://github.com/llvm/llvm-project/commit/38c53b3eb9f8dc25dd82f7918884a319a3aa597d
Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
Date: 2026-04-06 (Mon, 06 Apr 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp
M clang/test/CodeGen/AArch64/neon/intrinsics.c
Log Message:
-----------
[clang][cir][nfc] Fix comments, add missing EOF (#190623)
Commit: eb065bf028af8a1eb64dcf8f9ecb72138d221706
https://github.com/llvm/llvm-project/commit/eb065bf028af8a1eb64dcf8f9ecb72138d221706
Author: vangthao95 <vang.thao at amd.com>
Date: 2026-04-06 (Mon, 06 Apr 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeHelper.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeHelper.h
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.h
M llvm/test/CodeGen/AMDGPU/GlobalISel/extractelement.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-extract-vector-elt.mir
Log Message:
-----------
AMDGPU/GlobalISel: RegBankLegalize rules for G_EXTRACT_VECTOR_ELT (#189144)
Commit: 72d4ce9889a0bae9645de1a07cb051d0205cb964
https://github.com/llvm/llvm-project/commit/72d4ce9889a0bae9645de1a07cb051d0205cb964
Author: Arthur Eubanks <aeubanks at google.com>
Date: 2026-04-06 (Mon, 06 Apr 2026)
Changed paths:
M llvm/docs/LangRef.rst
M llvm/include/llvm/Analysis/InlineOrder.h
M llvm/include/llvm/IR/FixedMetadataKinds.def
M llvm/include/llvm/Transforms/Utils/Cloning.h
M llvm/lib/Analysis/InlineOrder.cpp
M llvm/lib/IR/Verifier.cpp
M llvm/lib/Transforms/IPO/AlwaysInliner.cpp
M llvm/lib/Transforms/IPO/Inliner.cpp
M llvm/lib/Transforms/IPO/ModuleInliner.cpp
M llvm/lib/Transforms/IPO/PartialInlining.cpp
M llvm/lib/Transforms/Utils/CloneFunction.cpp
M llvm/lib/Transforms/Utils/InlineFunction.cpp
M llvm/test/Transforms/Inline/debug-invoke.ll
A llvm/test/Transforms/Inline/inline-history-2.ll
R llvm/test/Transforms/Inline/inline-history-noinline.ll
A llvm/test/Transforms/Inline/inline-history.ll
M llvm/test/Transforms/Inline/inline-recursive-fn2.ll
A llvm/test/Verifier/inline-history-metadata.ll
M llvm/unittests/Analysis/InlineOrderPlugin/InlineOrderPlugin.cpp
Log Message:
-----------
[Inliner] Put inline history into IR as !inline_history metadata (#190092)
So that it's preserved across all inline invocations rather than just
one inliner pass run.
This prevents cases where devirtualization in the simplification
pipeline uncovers inlining opportunities that should be discarded due to
inline history, but we dropped the inline history between inliner pass
runs, causing code size to blow up, sometimes exponentially.
For compile time reasons, we want to limit this to only call sites that
have the potential to inline through SCCs, potentially with the help of
devirtualization. This means that the callee is in a non-trivial
(Ref)SCC, or the call site was previously an indirect call, which can
potentially be devirtualized to call any function.
The CGSCCUpdater::InlinedInternalEdges logic still seems to be relevant
even with this change, as monster_scc.ll blows up if I remove that code.
http://llvm-compile-time-tracker.com/compare.php?from=e830d88e8ae5f44a97cc76136a0a4e83aa9157c0&to=ed535e732fc41b79ab8efda2417886cbd0812f7f&stat=instructions:u
Fixes #186926.
Commit: 37801e9e99c8b8aeb2c94f128d231ed7eee601a6
https://github.com/llvm/llvm-project/commit/37801e9e99c8b8aeb2c94f128d231ed7eee601a6
Author: Tomer Shafir <tomer.shafir8 at gmail.com>
Date: 2026-04-06 (Mon, 06 Apr 2026)
Changed paths:
M llvm/include/llvm/MCA/Stages/InstructionTables.h
M llvm/include/llvm/MCA/Support.h
M llvm/lib/MCA/HardwareUnits/ResourceManager.cpp
M llvm/lib/MCA/Support.cpp
A llvm/test/tools/llvm-exegesis/analysis-processor-resource-masks-debug.test
A llvm/test/tools/llvm-mca/processor-resource-masks-debug.s
A llvm/test/tools/llvm-mca/processor-resources-debug.s
M llvm/tools/llvm-exegesis/lib/SchedClassResolution.cpp
Log Message:
-----------
[MCA] Enhance debug prints of processor resources (#190132)
Previously, `computeProcResourceMasks()` would print resource masks on
debug mode from multiple call sites, creating noise in the debug output.
This patch aims to fix this and also print more info about the
resources.
It splits to 2 types of debug prints for resources:
1. No simulation - mask only
2. Simulation - mask + other info
For 2, it shares printing on a single place in `ResourceManager`
constructor, that should cover all the other simulation cases
indirectly:
1. `llvm/lib/MCA/HardwareUnits/ResourceManager` - covered
2. `llvm/lib/MCA/InstrBuilder.c` - should be covered indirectly - only
used by `llvm-mca` before simulation that constructs a `ResourceManager`
3. `llvm/tools/llvm-mca/Views/SummaryView.cpp` - after simulation that
constructs a `ResourceManager`
4. `llvm/tools/llvm-mca/Views/BottleneckAnalysis.cpp` - after simulation
that constructs a `ResourceManager`
It also adds `BufferSize` to the output, which should be useful to debug
scheduling model + MCA integration.
For 1, it inlines mask-only printing into 2 other callers:
1. `llvm/include/llvm/MCA/Stages/InstructionTables.h`
2. `llvm/tools/llvm-exegesis/lib/SchedClassResolution.cpp`
as they only use the masks there. I think this is a reasonable
duplication across distinguishably different users/tools.
Now every pair of callers, even across groups (1 and 2), effectively
print in a mutually exclusive way.
The patch adds debug tests for the 3 new callers, in the corresponding
root test directories, to drive further location of logically
target-independent tests that just require some target at the root. I
think this convention is more discoverable, and is pretty widely used in
the project.
Commit: 12e957fd7feb388b266fd71ab7960450df6884c1
https://github.com/llvm/llvm-project/commit/12e957fd7feb388b266fd71ab7960450df6884c1
Author: Chinmay Deshpande <chdeshpa at amd.com>
Date: 2026-04-06 (Mon, 06 Apr 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.inverse.ballot.i32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.inverse.ballot.i64.ll
Log Message:
-----------
[AMDGPU][GISel] RegBankLegalize rules for amdgcn_inverse_ballot (#190629)
Commit: 38034d42bdc68b0397531d6c05e21051c2e84ae9
https://github.com/llvm/llvm-project/commit/38034d42bdc68b0397531d6c05e21051c2e84ae9
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-04-06 (Mon, 06 Apr 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-int.ll
Log Message:
-----------
[RISCV] Use EVT instead of MVT in compressShuffleOfShuffles. (#190636)
For the test case I just grabbed a test that exercised this code path
and made the VT non-simple.
Fixes #190605.
Commit: 5c13d2f099353d66d98ed97b482d8d64f907fa7b
https://github.com/llvm/llvm-project/commit/5c13d2f099353d66d98ed97b482d8d64f907fa7b
Author: SiliconA-Z <gfunni234 at gmail.com>
Date: 2026-04-06 (Mon, 06 Apr 2026)
Changed paths:
M llvm/lib/Target/ARM/ARMFeatures.h
M llvm/lib/Target/ARM/ARMISelLowering.cpp
M llvm/lib/Target/ARM/ARMInstrInfo.td
M llvm/lib/Target/ARM/ARMInstrThumb.td
M llvm/lib/Target/ARM/ARMInstrThumb2.td
M llvm/lib/Target/ARM/ARMLatencyMutations.cpp
M llvm/lib/Target/ARM/ARMScheduleM55.td
M llvm/lib/Target/ARM/ARMScheduleM7.td
M llvm/lib/Target/ARM/ARMScheduleM85.td
M llvm/lib/Target/ARM/ARMScheduleR52.td
M llvm/lib/Target/ARM/Thumb2SizeReduction.cpp
M llvm/test/CodeGen/ARM/cmp-to-cmn.ll
M llvm/test/MC/ARM/arm-shift-encoding.s
M llvm/test/MC/ARM/thumb-shift-encoding.s
Log Message:
-----------
[ARM] Enable creation of ARMISD::CMN nodes (#163223)
Map ARMISD::CMN to tCMN instead of armcmpz.
Rename the cmn instructions to match this new reality.
Please note that I do not have merge permissions.
Commit: e11a31f4c7f61a3abb0f9101f3269e5622195788
https://github.com/llvm/llvm-project/commit/e11a31f4c7f61a3abb0f9101f3269e5622195788
Author: neonetizen <justin at neonetizen.net>
Date: 2026-04-06 (Mon, 06 Apr 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp
A clang/test/CodeGen/AArch64/neon/f16-getset.c
M clang/test/CodeGen/AArch64/v8.2a-neon-intrinsics-generic.c
Log Message:
-----------
[CIR][AArch64] Lower FP16 vduph lane intrinsics (#186955)
>From #185382
Lower `vduph_lane_f16` and `vduph_laneq_f16` to `cir::VecExtractOp`
Tests moved from `v8.2a-neon-instrinsics-generic.c` to a new CIR-enabled
test file.
I tried following from notes made in #185852 (BF16)
Commit: 8d442bc5b58c9c8e2a5c321a06c8d9017630ca44
https://github.com/llvm/llvm-project/commit/8d442bc5b58c9c8e2a5c321a06c8d9017630ca44
Author: vporpo <vasileios.porpodas at amd.com>
Date: 2026-04-06 (Mon, 06 Apr 2026)
Changed paths:
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Passes/LoadStoreVec.h
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Passes/LoadStoreVec.cpp
M llvm/test/Transforms/SandboxVectorizer/load_store_vec.ll
Log Message:
-----------
[SandboxVec][LoadStoreVec] Add support for constants (#189769)
Up until now the pass would only vectorize load-store pairs. This patch
implements vectorization of constant-store pairs.
Commit: cdbb1f50142151155096c6b8d2d591f940fe91d1
https://github.com/llvm/llvm-project/commit/cdbb1f50142151155096c6b8d2d591f940fe91d1
Author: Kirill Stoimenov <87100199+kstoimenov at users.noreply.github.com>
Date: 2026-04-06 (Mon, 06 Apr 2026)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
M llvm/lib/Transforms/InstCombine/InstCombineInternal.h
M llvm/lib/Transforms/InstCombine/InstCombineShifts.cpp
M llvm/test/Transforms/InstCombine/apint-shift.ll
M llvm/test/Transforms/InstCombine/icmp-select.ll
R llvm/test/Transforms/InstCombine/icmp-shl-add-to-add.ll
Log Message:
-----------
Revert "[InstCombine] Fix #163110: Support peeling off matching shifts from icmp operands via canEvaluateShifted" (#190638)
Reverts llvm/llvm-project#165975
Breaks Sanitizer bots:
https://lab.llvm.org/buildbot/#/builders/52/builds/16329
Commit: a105f27f611c2a51cb9a16c3af40488061acf947
https://github.com/llvm/llvm-project/commit/a105f27f611c2a51cb9a16c3af40488061acf947
Author: Alexis Engelke <engelke at in.tum.de>
Date: 2026-04-06 (Mon, 06 Apr 2026)
Changed paths:
M llvm/include/llvm/CodeGen/SelectionDAGNodes.h
M llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp
Log Message:
-----------
[Scheduler][NFC] Don't use set to track visited nodes (#190480)
The visited set can grow rather large and we can use an unused field in
SDNode to store the same information without the use of a hash set.
This improves compile times: stage2-O3 -0.14%.
Commit: de0a81091bb65d93c86bf5206fda1daaa4b891f8
https://github.com/llvm/llvm-project/commit/de0a81091bb65d93c86bf5206fda1daaa4b891f8
Author: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
Date: 2026-04-06 (Mon, 06 Apr 2026)
Changed paths:
A llvm/test/MC/AMDGPU/vop3-literal-gfx1250.s
M llvm/test/MC/AMDGPU/vop3-literal.s
Log Message:
-----------
[AMDGPU] Update vop3-literal.s to use fake16 on gfx1250. NFC (#190243)
16-bit instructions there are in fake16 mode and shall also be
compatible with older targets. The purpose of the test is to
check literals, so fake16 or real16 is not important.
Commit: ab43cb8520c065cddbb5ce59a29987602255a2f5
https://github.com/llvm/llvm-project/commit/ab43cb8520c065cddbb5ce59a29987602255a2f5
Author: Brian Cain <brian.cain at oss.qualcomm.com>
Date: 2026-04-06 (Mon, 06 Apr 2026)
Changed paths:
M clang/lib/Driver/ToolChains/Hexagon.cpp
M clang/test/Driver/hexagon-toolchain-linux.c
Log Message:
-----------
[Hexagon] Pass -pie to linker when PIE is the toolchain default (#189723)
The Hexagon driver only checked for an explicit -pie flag when
constructing the link command, ignoring the toolchain's PIE default. For
linux-musl targets, isPIEDefault() returns true (via the Linux toolchain
base class), so the compiler generates PIC/PIE code (-pic-level 2
-pic-is-pie) but the linker never received -pie.
This mismatch caused LTO failures: without -pie the linker sets
Reloc::Static for the LTO backend, which generates GP-relative
(small-data) references that lld cannot resolve.
Use hasFlag() to respect the toolchain default, and guard the -pie
emission against -shared and -r (relocatable) modes.
Commit: 04e2be73a69ff43bb0fe5e8a9bf05a99c5b957fb
https://github.com/llvm/llvm-project/commit/04e2be73a69ff43bb0fe5e8a9bf05a99c5b957fb
Author: Keith Smiley <keithbsmiley at gmail.com>
Date: 2026-04-06 (Mon, 06 Apr 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
M utils/bazel/llvm-project-overlay/third-party/unittest/BUILD.bazel
Log Message:
-----------
[bazel] Fix TestingSupport layering_check (#190630)
I'm not sure if this header is public API upstream but we are using it
that way anyways.
Commit: 412d6941e356f8fa01c8d5fca396881290e16436
https://github.com/llvm/llvm-project/commit/412d6941e356f8fa01c8d5fca396881290e16436
Author: Henry Jiang <henry_jiang2 at apple.com>
Date: 2026-04-06 (Mon, 06 Apr 2026)
Changed paths:
M clang/lib/CrossTU/CrossTranslationUnit.cpp
M clang/lib/Tooling/JSONCompilationDatabase.cpp
A clang/test/VFS/Inputs/invalid-key.yaml
A clang/test/VFS/Inputs/invalid-top-level-key.yaml
M clang/test/VFS/parse-errors.c
M llvm/lib/Remarks/YAMLRemarkParser.cpp
M llvm/lib/Support/VirtualFileSystem.cpp
M llvm/lib/Support/YAMLTraits.cpp
M llvm/lib/Transforms/Utils/SymbolRewriter.cpp
M llvm/tools/sancov/sancov.cpp
Log Message:
-----------
[VFS] Guard against null key/value nodes when parsing YAML overlay (#190506)
When a VFS overlay YAML file contains malformed content such as tabs,
the YAML parser can produce KeyValueNode entries where `getKey` returns
nullptr. The VFS overlay parser then passes the nullptr to
`parseScalarString`, which then calls dyn_cast.
Switch to `dyn_cast_if_present` for the above callsites and a few more.
Commit: fecf609998340a5a2c27346468beba67e58afcc2
https://github.com/llvm/llvm-project/commit/fecf609998340a5a2c27346468beba67e58afcc2
Author: Daniel Thornburgh <dthorn at google.com>
Date: 2026-04-06 (Mon, 06 Apr 2026)
Changed paths:
M clang/lib/CodeGen/BackendUtil.cpp
M lld/COFF/InputFiles.cpp
M lld/COFF/LTO.cpp
M lld/COFF/LTO.h
M lld/COFF/SymbolTable.cpp
M lld/ELF/Driver.cpp
M lld/ELF/LTO.cpp
M lld/ELF/LTO.h
A lld/test/COFF/lto-libcall-archive-bitcode.test
A lld/test/ELF/lto/libcall-archive-bitcode.test
A lld/test/wasm/lto/libcall-archive-bitcode.ll
M lld/wasm/LTO.cpp
M lld/wasm/LTO.h
M lld/wasm/SymbolTable.cpp
M llvm/docs/ReleaseNotes.md
M llvm/include/llvm/LTO/LTO.h
M llvm/include/llvm/LTO/LTOBackend.h
M llvm/lib/LTO/LTO.cpp
M llvm/lib/LTO/LTOBackend.cpp
M llvm/lib/LTO/LTOCodeGenerator.cpp
M llvm/lib/LTO/ThinLTOCodeGenerator.cpp
A llvm/test/LTO/Resolution/X86/libcall-external.ll
A llvm/test/LTO/Resolution/X86/libcall-in-thin-link.ll
A llvm/test/LTO/Resolution/X86/libcall-in-tu.ll
M llvm/tools/llvm-lto2/llvm-lto2.cpp
Log Message:
-----------
Reland "[LTO][LLD] Prevent invalid LTO libfunc transforms (#164916)" (#190642)
This reverts commit 1ec7e86b3a779df2a0af3f37e58c8f5b3a398d7f after issue
#190072 was fixed.
Commit: a2c9146da14919c187e2c11becbbf2933621d9b6
https://github.com/llvm/llvm-project/commit/a2c9146da14919c187e2c11becbbf2933621d9b6
Author: Nerixyz <nerixdev at outlook.de>
Date: 2026-04-06 (Mon, 06 Apr 2026)
Changed paths:
M lldb/source/Plugins/SymbolFile/NativePDB/DWARFLocationExpression.cpp
M lldb/source/Plugins/SymbolFile/NativePDB/DWARFLocationExpression.h
M lldb/source/Plugins/SymbolFile/NativePDB/PdbUtil.cpp
A lldb/test/Shell/SymbolFile/NativePDB/structured-bindings-clang.test
M lldb/test/Shell/SymbolFile/NativePDB/structured-bindings-msvc.test
Log Message:
-----------
[lldb][NativePDB] Handle `S_DEFRANGE_REGISTER_REL_INDIR` (#190336)
Since #189401, LLVM and Clang generate `S_DEFRANGE_REGISTER_REL_INDIR`
for indirect locations. This adds support in LLDB.
The offset added after dereferencing is signed here - unlike in
`S_REGREL32_INDIR` (at least that's the assumption). So I updated
`MakeRegisterBasedIndirectLocationExpressionInternal` to handle the
signedness. This is the reason the MSVC test was changed here.
I didn't find a test case where LLVM emits the record with the `VFRAME`
register. Other than that, the clang test is similar to the MSVC one
except that the locations are slightly different.
Commit: 5e1162eebc2b943a0e5730bd91f7cbfe4bde58eb
https://github.com/llvm/llvm-project/commit/5e1162eebc2b943a0e5730bd91f7cbfe4bde58eb
Author: Lucas Ramirez <11032120+lucas-rami at users.noreply.github.com>
Date: 2026-04-06 (Mon, 06 Apr 2026)
Changed paths:
M llvm/include/llvm/CodeGen/Rematerializer.h
M llvm/lib/CodeGen/Rematerializer.cpp
M llvm/unittests/CodeGen/RematerializerTest.cpp
Log Message:
-----------
[CodeGen] Move rollback capabilities outside of the rematerializer (#184341)
The rematerializer implements support for rolling back
rematerializations by modifying MIs that should normally be deleted in
an attempt to make them "transparent" to other analyses. This involves:
1. setting their opcode to DBG_VALUE and
2. setting their read register operands to the sentinel register.
This approach has several drawbacks.
1. It forces the rematerializer to support tracking these "dead MIs"
(even if support is optional, these data-structures have to exist).
2. It is not actually clear whether this mechanism will interact well
with all other analyses. This is an issue since the intent of the
rematerializer is to be usable in as many contexts as possible.
3. In practice, it has shown itself to be relatively error-prone.
This commit removes rollback support from the rematerializer and moves
those capabilities to a rematerializer listener than can be instantiated
on-demand and implements the same functionality on top of standard
rematerializer operations. The rematerializer now actually deletes MIs
that are no longer useful after rematerializations, and has support for
re-creating them on-demand without requiring additional tracking on its
part.
Commit: 326593b4b47cab59d64acbd456e88abfb77a0f4c
https://github.com/llvm/llvm-project/commit/326593b4b47cab59d64acbd456e88abfb77a0f4c
Author: Aadarsh Keshri <120744385+Aadarsh-Keshri at users.noreply.github.com>
Date: 2026-04-06 (Mon, 06 Apr 2026)
Changed paths:
M clang/include/clang/Serialization/ModuleCache.h
M clang/lib/DependencyScanning/DependencyScannerImpl.cpp
M clang/lib/DependencyScanning/InProcessModuleCache.cpp
M clang/lib/Frontend/CompilerInstance.cpp
M clang/lib/Serialization/ModuleCache.cpp
M llvm/lib/Support/LockFileManager.cpp
M llvm/unittests/Support/LockFileManagerTest.cpp
Log Message:
-----------
[Support][Modules] Removed prepareForGetLock and its usages. Ensured parent directory exists when creating lock file. (#189888)
Following #187372
Commit: 40d5a7d69e957750a2d45ae9dd68f486b5306f77
https://github.com/llvm/llvm-project/commit/40d5a7d69e957750a2d45ae9dd68f486b5306f77
Author: Chinmay Deshpande <chdeshpa at amd.com>
Date: 2026-04-06 (Mon, 06 Apr 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUSearchableTables.td
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/intrinsics.ll
M llvm/test/CodeGen/AMDGPU/fix-wwm-vgpr-copy.ll
Log Message:
-----------
[AMDGPU][UniformityAnalysis] Mark set_inactive and set_inactive_chain_arg as SourceOfDivergence (#190640)
`set_inactive` produces a result that varies per-lane based on the EXEC mask, even when both inputs are uniform.
Commit: 2aa4100fa710ed83c5acd7505c27b4498f727c8e
https://github.com/llvm/llvm-project/commit/2aa4100fa710ed83c5acd7505c27b4498f727c8e
Author: Brian Cain <brian.cain at oss.qualcomm.com>
Date: 2026-04-06 (Mon, 06 Apr 2026)
Changed paths:
M compiler-rt/cmake/Modules/AllSupportedArchDefs.cmake
Log Message:
-----------
[compiler-rt] Add hexagon to libFuzzer supported architectures (#190297)
LibFuzzer builds successfully for Hexagon Linux.
Commit: 950f1de70bbfff9d4581c3102d2107ca6a4512a7
https://github.com/llvm/llvm-project/commit/950f1de70bbfff9d4581c3102d2107ca6a4512a7
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2026-04-06 (Mon, 06 Apr 2026)
Changed paths:
M lldb/include/lldb/Utility/UUID.h
Log Message:
-----------
[lldb] Fix UUID thombstone Key (#190551)
This changes `DenseMapInfo<UUID>::getTombstoneKey()` to return a 1-byte
`{0xFF}` sentinel instead of the empty, default constructed UUID().
Returning the same key for the empty and tombstone value apparently
violates the `DenseMap` invariant.
Commit: 40d394916264903073bccdf0b208f9565cad3ef8
https://github.com/llvm/llvm-project/commit/40d394916264903073bccdf0b208f9565cad3ef8
Author: Steven Wu <stevenwu at apple.com>
Date: 2026-04-06 (Mon, 06 Apr 2026)
Changed paths:
A llvm/tools/llvm-cas-fuzzer/CMakeLists.txt
A llvm/tools/llvm-cas-fuzzer/DummyCASFuzzer.cpp
A llvm/tools/llvm-cas-fuzzer/cas-fuzzer.cpp
Log Message:
-----------
[CAS] Add llvm-cas-fuzzer for ObjectStore::validate() (#190635)
Add a fuzzer that creates an on-disk CAS database, stores objects, then
corrupts the on-disk data files using fuzzer-provided bytes and calls
validate(). The goal is that validate() should either succeed or return
an error, never crash.
The fuzzer supports 6 corruption modes: byte-level mutations, file
truncation, appending garbage, zeroing ranges, standalone file
corruption, and combined mutations with continued CAS operations.
Assisted-By: Claude
Commit: 70d3dcaa6441e6bee4a6982fe900ecaf2f643788
https://github.com/llvm/llvm-project/commit/70d3dcaa6441e6bee4a6982fe900ecaf2f643788
Author: Arthur Eubanks <aeubanks at google.com>
Date: 2026-04-06 (Mon, 06 Apr 2026)
Changed paths:
M llvm/docs/LangRef.rst
M llvm/include/llvm/Analysis/InlineOrder.h
M llvm/include/llvm/IR/FixedMetadataKinds.def
M llvm/include/llvm/Transforms/Utils/Cloning.h
M llvm/lib/Analysis/InlineOrder.cpp
M llvm/lib/IR/Verifier.cpp
M llvm/lib/Transforms/IPO/AlwaysInliner.cpp
M llvm/lib/Transforms/IPO/Inliner.cpp
M llvm/lib/Transforms/IPO/ModuleInliner.cpp
M llvm/lib/Transforms/IPO/PartialInlining.cpp
M llvm/lib/Transforms/Utils/CloneFunction.cpp
M llvm/lib/Transforms/Utils/InlineFunction.cpp
M llvm/test/Transforms/Inline/debug-invoke.ll
R llvm/test/Transforms/Inline/inline-history-2.ll
A llvm/test/Transforms/Inline/inline-history-noinline.ll
R llvm/test/Transforms/Inline/inline-history.ll
M llvm/test/Transforms/Inline/inline-recursive-fn2.ll
R llvm/test/Verifier/inline-history-metadata.ll
M llvm/unittests/Analysis/InlineOrderPlugin/InlineOrderPlugin.cpp
Log Message:
-----------
Revert "[Inliner] Put inline history into IR as !inline_history metadata" (#190666)
Reverts llvm/llvm-project#190092
Crashes reported in
https://github.com/llvm/llvm-project/pull/190092#issuecomment-4194546908
Commit: 1a0ca1019d214a24b55a45704dc71fa183672362
https://github.com/llvm/llvm-project/commit/1a0ca1019d214a24b55a45704dc71fa183672362
Author: Steven Wu <stevenwu at apple.com>
Date: 2026-04-06 (Mon, 06 Apr 2026)
Changed paths:
M llvm/include/llvm/CAS/MappedFileRegionArena.h
M llvm/lib/CAS/DatabaseFile.cpp
M llvm/lib/CAS/MappedFileRegionArena.cpp
M llvm/lib/CAS/OnDiskGraphDB.cpp
M llvm/lib/CAS/OnDiskTrieRawHashMap.cpp
Log Message:
-----------
[CAS] Harden validate() against on-disk corruption (#190634)
Fixes found by fuzzer:
OnDiskTrieRawHashMap:
- Bounds-check data slot offsets in TrieVerifier::visitSlot() before
calling getRecord(), preventing asData() assertion on out-of-bounds
trie entries.
- Validate subtrie headers (NumBits, bounds) before constructing
SubtrieHandle, preventing SEGV in getSlots() from corrupt NumBits.
- Validate arena bump pointer alignment, catching misaligned BumpPtr
that would crash store() with an alignment assertion.
- Fix comma operator bug in getOrCreateRoot() where the
compare_exchange_strong result was discarded, causing asSubtrie()
assertion when RootTrieOffset was corrupted to zero.
OnDiskGraphDB:
- Reject invalid (zero) ref offsets in validate callback, preventing
asData() assertion when corrupt data pool refs are resolved via
recoverFromFileOffset().
- Validate DataRecordHandle layout flags before calling getTotalSize(),
preventing llvm_unreachable on corrupt NumRefsFlags/DataSizeFlags.
- Validate data pool bump pointer alignment, catching misaligned
BumpPtr that would crash store() in DataRecordHandle::constructImpl().
- Check data record refs offset alignment before calling getRefs(),
preventing PointerUnion assertion from misaligned refs pointer.
MappedFileRegionArena:
- Convert assertions in initializeHeader() to errors so corrupted
arena headers return an error on CAS open instead of crashing.
Assisted-By: Claude
Commit: fbe6d794650a3c9d586c020fcf2b4fba3faa2dad
https://github.com/llvm/llvm-project/commit/fbe6d794650a3c9d586c020fcf2b4fba3faa2dad
Author: Congzhe <congzhe.cao at huawei.com>
Date: 2026-04-06 (Mon, 06 Apr 2026)
Changed paths:
M llvm/include/llvm/Transforms/Utils/CodeMoverUtils.h
M llvm/lib/Transforms/Scalar/LoopFuse.cpp
M llvm/lib/Transforms/Utils/CodeMoverUtils.cpp
Log Message:
-----------
[LoopFusion] Fix out-of-date LoopInfo being used during fusion (#189452)
This is fix for
[187902](https://github.com/llvm/llvm-project/issues/187902), where
`LoopInfo` is not in a valid state at the beginning of `ScalarEvolution::createSCEVIter`.
The reason for the bug is that, `mergeLatch()` is called at a place
where control flow and dominator trees have been updated but `LoopInfo`
has not completed the update yet. `mergeLatch()` calls into
`ScalarEvolution` that uses `LoopInfo`, where out-of-date `LoopInfo` would
result in crash or unpredictable results.
This patch moves `mergeLatch()` to the place where `LoopInfo` has
completed its update and hence is in a valid state.
Commit: 92b595b9b4ca71aad9e7cc7d32e4b90a9b051a5b
https://github.com/llvm/llvm-project/commit/92b595b9b4ca71aad9e7cc7d32e4b90a9b051a5b
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2026-04-06 (Mon, 06 Apr 2026)
Changed paths:
M flang/lib/Semantics/check-cuda.cpp
M flang/test/Semantics/cuf25.cuf
Log Message:
-----------
[flang][cuda] Take associate into account for host array diagnostic (#190673)
Commit: 89665812f54feeab985c0c8b72cf3063128e65b2
https://github.com/llvm/llvm-project/commit/89665812f54feeab985c0c8b72cf3063128e65b2
Author: Alexis Engelke <engelke at in.tum.de>
Date: 2026-04-06 (Mon, 06 Apr 2026)
Changed paths:
M llvm/include/llvm/Analysis/BlockFrequencyInfoImpl.h
Log Message:
-----------
[Analysis][NFC] Use block numbers in BlockFrequencyInfo (#190669)
Block pointers are only stored while constructing the analysis, so the
value handle to catch erased blocks is no longer needed when using
stable block numbers.
Commit: 9033e872fd779e682320fe1ad923ea25e7c636f9
https://github.com/llvm/llvm-project/commit/9033e872fd779e682320fe1ad923ea25e7c636f9
Author: Chinmay Deshpande <chdeshpa at amd.com>
Date: 2026-04-06 (Mon, 06 Apr 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.update.dpp.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.update.dpp.mir
Log Message:
-----------
[AMDGPU][GISel] RegBankLegalize rules for update_dpp (#190662)
Commit: d91702733445ea8bc6d6a8f2f50dd6b65e52d106
https://github.com/llvm/llvm-project/commit/d91702733445ea8bc6d6a8f2f50dd6b65e52d106
Author: Zile Xiong <xiongzile at bytedance.com>
Date: 2026-04-06 (Mon, 06 Apr 2026)
Changed paths:
M llvm/lib/ProfileData/Coverage/CoverageMapping.cpp
A llvm/test/tools/llvm-cov/Inputs/main-view-fileid-regression.covmapping
A llvm/test/tools/llvm-cov/Inputs/main-view-fileid-regression.proftext
A llvm/test/tools/llvm-cov/main-view-fileid-regression.test
Log Message:
-----------
[llvm-cov] Guard against empty CountedRegions in findMainViewFileID (#189270)
When processing coverage generated from branch coverage mode, some
functions can reach findMainViewFileID with an empty CountedRegions
list. In that case the current logic still proceeds to infer the main
view file, even though there is no regular counted region available to
do so.
Return std::nullopt early when CountedRegions is empty.
This was observed when reproducing issue #189169 with:
cargo llvm-cov --lib --branch
The issue appears related to branch-only coverage information being
recorded separately in CountedBranchRegions, while
findMainViewFileID currently only consults CountedRegions.
This patch is a defensive fix for the empty-region case; further
investigation may still be needed to determine whether branch regions
should participate in main view file selection.
Co-authored-by: Zile Xiong <xiongzile99 at gmail.com>
Commit: ee51de9836894f829a0811307901434ee592c9be
https://github.com/llvm/llvm-project/commit/ee51de9836894f829a0811307901434ee592c9be
Author: Andrew <dota2drot at gmail.com>
Date: 2026-04-06 (Mon, 06 Apr 2026)
Changed paths:
M llvm/include/llvm/ProfileData/Coverage/CoverageMapping.h
M llvm/lib/ProfileData/Coverage/CoverageMapping.cpp
M llvm/test/tools/llvm-cov/mcdc-const.test
M llvm/test/tools/llvm-cov/mcdc-export-json.test
M llvm/test/tools/llvm-cov/mcdc-general-none.test
M llvm/test/tools/llvm-cov/mcdc-general.test
M llvm/test/tools/llvm-cov/mcdc-macro.test
M llvm/tools/llvm-cov/CodeCoverage.cpp
M llvm/tools/llvm-cov/CoverageExporterJson.cpp
M llvm/tools/llvm-cov/CoverageViewOptions.h
M llvm/tools/llvm-cov/SourceCoverageViewHTML.cpp
M llvm/tools/llvm-cov/SourceCoverageViewText.cpp
Log Message:
-----------
[llvm-cov] add ability to show non executed test vectors for mc/dc coverage (#187517)
- Added `-show-mcdc-non-executed-vectors` option
- Non-executed test vectors now are tracked
- When the opt is present it's get written to UI
Commit: 97d50c149070d104e301159b825657af60613fa4
https://github.com/llvm/llvm-project/commit/97d50c149070d104e301159b825657af60613fa4
Author: Anshul Nigham <nigham at google.com>
Date: 2026-04-06 (Mon, 06 Apr 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64.h
M llvm/lib/Target/AArch64/AArch64PassRegistry.def
M llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
M llvm/lib/Target/AArch64/GISel/AArch64PreLegalizerCombiner.cpp
M llvm/test/CodeGen/AArch64/GlobalISel/combine-2-icmps-of-0-and-or.mir
Log Message:
-----------
[NewPM] Adds a port for AArch64PreLegalizerCombiner (#190567)
Standard porting (note that TargetPassConfig dependency was [removed
earlier](https://github.com/llvm/llvm-project/commit/e27e7e433974b24c90fed9f0b646bed84e47681e)).
---------
Co-authored-by: Matt Arsenault <arsenm2 at gmail.com>
Commit: 9bddf47198582459f954e10fd4920f2afac10e15
https://github.com/llvm/llvm-project/commit/9bddf47198582459f954e10fd4920f2afac10e15
Author: Jianhui Li <jian.hui.li at intel.com>
Date: 2026-04-06 (Mon, 06 Apr 2026)
Changed paths:
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUWgToSgDistribute.cpp
M mlir/test/Dialect/XeGPU/xegpu-wg-to-sg-unify-ops-rr.mlir
M mlir/test/Dialect/XeGPU/xegpu-wg-to-sg-unify-ops.mlir
Log Message:
-----------
[MLIR][XeGPU] Extend Wg-to-Sg Distribution of Multi-Reduction Op for round-robin layout (#189988)
This PR enhance the multi-reduction op pattern of wg-to-sg distribution
pass:
1. allows each sg have multiple distribution of sg_data tiles.
2. expand the slm buffer size.
3. construct the layout based on the partial reduced vector and use
layout.computeDistributedCoords() to compute coordinates. the layout is
constructed so that the store is cooperative, and load overlapps with
neighbour threads.
4. perform save and load.
Commit: af95b0a615260a2868e5581d5fa18b9379b1c8ff
https://github.com/llvm/llvm-project/commit/af95b0a615260a2868e5581d5fa18b9379b1c8ff
Author: Joe Nash <joseph.nash at amd.com>
Date: 2026-04-06 (Mon, 06 Apr 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/andn2.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomicrmw_minmax.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomicrmw_udec_wrap.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomicrmw_uinc_wrap.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/call-outgoing-stack-args.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-short-clamp.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/cvt_f32_ubyte.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/extractelement.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/flat-scratch.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/frem.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.i16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.i8.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.rsq.clamp.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.set.inactive.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/lshr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/mubuf-global.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/mul-known-bits.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/orn2.ll
M llvm/test/CodeGen/AMDGPU/abi-attribute-hints-undefined-behavior.ll
M llvm/test/CodeGen/AMDGPU/agpr-copy-no-free-registers.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_global_pointer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_local_pointer.ll
M llvm/test/CodeGen/AMDGPU/av_movimm_pseudo_expansion.mir
M llvm/test/CodeGen/AMDGPU/calling-conventions.ll
M llvm/test/CodeGen/AMDGPU/chain-hi-to-lo.ll
M llvm/test/CodeGen/AMDGPU/combine_andor_with_cmps.ll
M llvm/test/CodeGen/AMDGPU/dag-divergence-atomic.ll
M llvm/test/CodeGen/AMDGPU/div_i128.ll
M llvm/test/CodeGen/AMDGPU/ds-sub-offset.ll
M llvm/test/CodeGen/AMDGPU/expand-scalar-carry-out-select-user.ll
M llvm/test/CodeGen/AMDGPU/extract_vector_elt-i8.ll
M llvm/test/CodeGen/AMDGPU/fcanonicalize.ll
M llvm/test/CodeGen/AMDGPU/fp-atomics-gfx1200.ll
M llvm/test/CodeGen/AMDGPU/fp64-atomics-gfx90a.ll
M llvm/test/CodeGen/AMDGPU/fptoi.i128.ll
M llvm/test/CodeGen/AMDGPU/fptosi-sat-scalar.ll
M llvm/test/CodeGen/AMDGPU/fptosi-sat-vector.ll
M llvm/test/CodeGen/AMDGPU/fptoui-sat-scalar.ll
M llvm/test/CodeGen/AMDGPU/fptoui-sat-vector.ll
M llvm/test/CodeGen/AMDGPU/gfx-callable-argument-types.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fmax.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fmin.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fsub.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fadd.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fmax.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fmin.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fsub.ll
M llvm/test/CodeGen/AMDGPU/inflate-av-remat-imm.mir
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.atomic.dec.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.atomic.inc.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.atomic.pk.add.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.init.whole.wave-w64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.quadmask.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.readlane.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.umax.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.set.inactive.chain.arg.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.set.inactive.ll
M llvm/test/CodeGen/AMDGPU/llvm.exp.f64.ll
M llvm/test/CodeGen/AMDGPU/llvm.exp10.f64.ll
M llvm/test/CodeGen/AMDGPU/llvm.exp2.f64.ll
M llvm/test/CodeGen/AMDGPU/llvm.set.rounding.ll
M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fmax.ll
M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fmin.ll
M llvm/test/CodeGen/AMDGPU/lrint.ll
M llvm/test/CodeGen/AMDGPU/lround.ll
M llvm/test/CodeGen/AMDGPU/mad_64_32.ll
M llvm/test/CodeGen/AMDGPU/memset-pattern.ll
M llvm/test/CodeGen/AMDGPU/misaligned-vgpr-regsequence.mir
M llvm/test/CodeGen/AMDGPU/move-to-valu-lshl_add.ll
M llvm/test/CodeGen/AMDGPU/offset-split-global.ll
M llvm/test/CodeGen/AMDGPU/packed-fp32.ll
M llvm/test/CodeGen/AMDGPU/promote-constOffset-to-imm.ll
M llvm/test/CodeGen/AMDGPU/reassoc-mul-add-1-to-mad.ll
M llvm/test/CodeGen/AMDGPU/rem_i128.ll
M llvm/test/CodeGen/AMDGPU/roundeven.ll
M llvm/test/CodeGen/AMDGPU/rsq.f64.ll
M llvm/test/CodeGen/AMDGPU/sdiv64.ll
M llvm/test/CodeGen/AMDGPU/shift-i128.ll
M llvm/test/CodeGen/AMDGPU/siloadstoreopt-misaligned-regsequence.ll
M llvm/test/CodeGen/AMDGPU/srem64.ll
M llvm/test/CodeGen/AMDGPU/swdev380865.ll
M llvm/test/CodeGen/AMDGPU/tuple-allocation-failure.ll
M llvm/test/CodeGen/AMDGPU/udiv.ll
M llvm/test/CodeGen/AMDGPU/udiv64.ll
M llvm/test/CodeGen/AMDGPU/urem64.ll
M llvm/test/CodeGen/AMDGPU/v_mov_b64_expand_and_shrink.mir
M llvm/test/CodeGen/AMDGPU/v_mov_b64_expansion.mir
M llvm/test/CodeGen/AMDGPU/vgpr-mark-last-scratch-load.ll
M llvm/test/CodeGen/AMDGPU/wave32.ll
M llvm/test/CodeGen/AMDGPU/widen-smrd-loads.ll
M llvm/test/CodeGen/AMDGPU/wwm-reserved-spill.ll
M llvm/test/CodeGen/AMDGPU/wwm-reserved.ll
Log Message:
-----------
[AMDGPU] Remove implicit super-reg defs on mov64 pseudos (#190379)
The mov64 pseudo is split into two 32 bit movs, but those 32 bit movs
had the full 64-bit register still implicitly defined. VOPD formation is
affected, so we can emit more of them.
Commit: 7087ece044f1313206ce5d5e5115862fe29143c1
https://github.com/llvm/llvm-project/commit/7087ece044f1313206ce5d5e5115862fe29143c1
Author: Jared Hoberock <jaredhoberock at gmail.com>
Date: 2026-04-06 (Mon, 06 Apr 2026)
Changed paths:
M mlir/lib/ExecutionEngine/CudaRuntimeWrappers.cpp
M mlir/test/Integration/GPU/CUDA/async.mlir
Log Message:
-----------
[MLIR][ExecutionEngine] Tolerate CUDA_ERROR_DEINITIALIZED in mgpuModuleUnload (#190563)
`mgpuModuleUnload` may be called from a global destructor (registered by
`SelectObjectAttr`'s `appendToGlobalDtors`) after the CUDA primary
context has already been destroyed during program shutdown. In this
case, `cuModuleUnload` returns `CUDA_ERROR_DEINITIALIZED`, which is
benign since the module's resources are already freed with the context.
## Reproduction
Any program that uses `gpu.launch_func` and is AOT-compiled (via
`mlir-translate --mlir-to-llvmir | llc | cc -lmlir_cuda_runtime`) will
print `'cuModuleUnload(module)' failed with '<unknown>'` on exit. This
is because `SelectObjectAttr` registers the module unload as a global
destructor, which runs after the CUDA primary context is released.
This script reproduces the error message from `mgpuModuleUnload` on my
system:
```
#!/bin/bash
set -e
LLVM_BUILD=${LLVM_BUILD:-$HOME/dev/git/llvm-project-22/build}
cat > /tmp/repro.mlir << 'MLIR'
func.func @main() {
%c1 = arith.constant 1 : index
gpu.launch blocks(%bx, %by, %bz) in (%gx = %c1, %gy = %c1, %gz = %c1)
threads(%tx, %ty, %tz) in (%bsx = %c1, %bsy = %c1, %bsz = %c1) {
gpu.terminator
}
return
}
MLIR
$LLVM_BUILD/bin/mlir-opt /tmp/repro.mlir \
-gpu-lower-to-nvvm-pipeline="cubin-format=fatbin" \
| $LLVM_BUILD/bin/mlir-translate --mlir-to-llvmir -o /tmp/repro.ll
$LLVM_BUILD/bin/llc -relocation-model=pic -filetype=obj /tmp/repro.ll -o /tmp/repro.o
cc /tmp/repro.o \
-L$LLVM_BUILD/lib -Wl,-rpath,$LLVM_BUILD/lib \
-lmlir_cuda_runtime -lmlir_runner_utils -o /tmp/repro
echo "Running:"
/tmp/repro 2>&1
echo "Exit code: $?"
```
## Context
This matches how other projects handle the same shutdown ordering issue:
- Clang CUDA (D48613) switched module cleanup from
`__attribute__((destructor))` to `atexit()`
- GCC libgomp checks context validity before `cuModuleUnload`
- Apache TVM silently ignores `CUDA_ERROR_DEINITIALIZED` on module
unload
Fixes #170833
Commit: ef715849d7962eebfe591f54faeeaf4ffd703954
https://github.com/llvm/llvm-project/commit/ef715849d7962eebfe591f54faeeaf4ffd703954
Author: Shilei Tian <i at tianshilei.me>
Date: 2026-04-06 (Mon, 06 Apr 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIMemoryLegalizer.cpp
Log Message:
-----------
[NFC][AMDGPU] Add some debug prints to SIMemoryLegalizer (#190658)
Commit: 62ce560f68b0a1149d73e56d5d0927d5546b6e20
https://github.com/llvm/llvm-project/commit/62ce560f68b0a1149d73e56d5d0927d5546b6e20
Author: Sergei Barannikov <barannikov88 at gmail.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M lldb/source/Plugins/Disassembler/LLVMC/DisassemblerLLVMC.cpp
Log Message:
-----------
[lldb] Remove some unreachable code (NFC) (#190529)
`isRISCV()` check always returns false because we only get here if
`min_op_byte_size` and `max_op_byte_size` are equal, which is not true
for RISC-V.
Also, replase `if (!got_op)` check with an `else`. The check is
equivalent to
`if (min_op_byte_size != max_op_byte_size)`, and the `if` above checks
for the opposite condition.
Commit: 8a11fe97a299b8b384195d52f317e198bb3a27d4
https://github.com/llvm/llvm-project/commit/8a11fe97a299b8b384195d52f317e198bb3a27d4
Author: Ehsan Amiri <ehsan.amiri at huawei.com>
Date: 2026-04-06 (Mon, 06 Apr 2026)
Changed paths:
M llvm/lib/Analysis/DependenceAnalysis.cpp
M llvm/test/Analysis/DependenceAnalysis/Banerjee.ll
M llvm/test/Analysis/DependenceAnalysis/Propagating.ll
M llvm/test/Analysis/DependenceAnalysis/exact-rdiv-addrec-wrap.ll
Log Message:
-----------
[DA] Require `nsw` for AddRecs involved in GCD test (#186892)
Similar to other tests, we are adding code that the AddRecs used in GCD
test are `nsw`. In this case, all recursively identified `AddRec`s are
also checked. Note that there is already a similar check in
`getConstantCoefficient` for expressions processed in that function.
Commit: 79e669f000c1b8539b4ae1e7be35e74a41144698
https://github.com/llvm/llvm-project/commit/79e669f000c1b8539b4ae1e7be35e74a41144698
Author: Steven Wu <stevenwu at apple.com>
Date: 2026-04-06 (Mon, 06 Apr 2026)
Changed paths:
M llvm/lib/CAS/DatabaseFile.cpp
Log Message:
-----------
[CAS] Revert an unintentional change in #190634 (#190686)
Revert an unintentional change in #190634 that did an unintentional
implicit signed to unsigned cast.
Commit: a8cf1a0352a080b62c3eee1d3aac213bf9d6b416
https://github.com/llvm/llvm-project/commit/a8cf1a0352a080b62c3eee1d3aac213bf9d6b416
Author: Amir Ayupov <aaupov at fb.com>
Date: 2026-04-06 (Mon, 06 Apr 2026)
Changed paths:
M bolt/lib/Profile/DataReader.cpp
A bolt/test/X86/Inputs/pre-aggregated-buildid-empty.txt
M bolt/test/X86/pre-aggregated-perf-buildid.test
Log Message:
-----------
[BOLT] Allow empty buildid in pre-aggregated profile addresses (#190675)
Allow `parseString()` to return an empty `StringRef` when the delimiter
appears at position 0. This enables parsing pre-aggregated profile
addresses with an omitted buildid but preserved colon (`:addr` format),
where the empty buildid corresponds to the main binary.
Previously, `parseString()` rejected zero-length fields by treating
`StringEnd == 0` the same as `StringRef::npos` (delimiter not found).
These are distinct situations: `npos` means no delimiter exists, while
`0` means the field before the delimiter is empty. The fix removes the
`StringEnd == 0` sub-condition so only the missing-delimiter case
errors.
The existing test for buildid-prefixed addresses is extended to also
verify that `:addr` input produces identical output to the plain-address
and non-empty-buildid variants.
Test Plan:
Added empty-buildid input file and extended
`pre-aggregated-perf-buildid.test` to run perf2bolt with `:addr` format
and diff the fdata output against the existing buildid-prefixed result.
Commit: df461c164ccf48854aa3e3898399f355d3fe210a
https://github.com/llvm/llvm-project/commit/df461c164ccf48854aa3e3898399f355d3fe210a
Author: Yeongu Choe <yeongu.choe at icloud.com>
Date: 2026-04-06 (Mon, 06 Apr 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenBuiltin.cpp
A clang/test/CIR/CodeGenBuiltins/builtin-fpclassify.c
Log Message:
-----------
[CIR][CodeGen] Implement __builtin_fpclassify (#187977)
I implemented CIR version of __builtin_fpclassify function.
Commit: e8566f83d2541734ad9b66c474e7f500ce98a280
https://github.com/llvm/llvm-project/commit/e8566f83d2541734ad9b66c474e7f500ce98a280
Author: Piyush Jaiswal <piyushjais98 at gmail.com>
Date: 2026-04-06 (Mon, 06 Apr 2026)
Changed paths:
M lldb/bindings/interface/SBModuleSpecListExtensions.i
M lldb/test/API/python_api/sbmodule/TestSBModule.py
Log Message:
-----------
[lldb][python] Add polymorphic `__getitem__` to `SBModuleSpecList` for Pythonic indexing (#189125)
### Summary
`SBModuleSpecList` already supports `len()` and iteration via `__len__`
and `__iter__`, but is not subscriptable — `specs[0]` raises
`TypeError`.
This adds a `__getitem__` method that supports integer indexing (with
negative index support) and string lookup using `endswith()` matching,
which works for both Unix and Windows paths.
### Supported key types
| Key type | Example | Behavior |
|---|---|---|
| `int` | `specs[0]`, `specs[-1]` | Direct index with negative index
support |
| `str` | `specs['a.out']`, `specs['/usr/lib/liba.dylib']` | Lookup by
basename or partial/full path via `endswith()`. Returns first match or
`None` |
### Error handling
- **`IndexError`** for out-of-bounds integer indices
- **`TypeError`** for unsupported key types (e.g., `float`)
- **`None`** for string lookups with no match
### Before
```python
>>> specs = lldb.SBModuleSpecList.GetModuleSpecifications('/bin/ls')
>>> specs[0]
Traceback (most recent call last):
File "<console>", line 1, in <module>
TypeError: 'SBModuleSpecList' object is not subscriptable
```
### After
```python
>>> import lldb, re
>>> specs = lldb.SBModuleSpecList.GetModuleSpecifications('/bin/ls')
>>> specs[0]
file = '/bin/ls', arch = x86_64-*-linux, uuid = 3CCC0D8A-..., object size = 140928
>>> specs[-1]
file = '/bin/ls', arch = x86_64-*-linux, uuid = 3CCC0D8A-..., object size = 140928
>>> specs['ls']
file = '/bin/ls', arch = x86_64-*-linux, uuid = 3CCC0D8A-..., object size = 140928
>>> specs[999]
IndexError: list index out of range
>>> specs[1.5]
TypeError: unsupported index type: <class 'float'>
```
### Test plan
Added test_module_spec_list_indexing to TestSBModule.py covering:
- Positive and negative integer indexing
- Out-of-bounds raises IndexError
- Unsupported key type raises TypeError
- String lookup by basename and full path (endswith() matching)
- Missing key returns None
```
bin/llvm-lit -sv lldb/test/API/python_api/sbmodule/TestSBModule.py
```
```
PASS: LLDB :: test_GetObjectName_dwarf (TestSBModule.SBModuleAPICase)
PASS: LLDB :: test_GetObjectName_dwo (TestSBModule.SBModuleAPICase)
PASS: LLDB :: test_module_spec_list_indexing_dwarf (TestSBModule.SBModuleAPICase)
PASS: LLDB :: test_module_spec_list_indexing_dwo (TestSBModule.SBModuleAPICase)
----------------------------------------------------------------------
Ran 12 tests in 1.854s
OK (skipped=6)
```
Co-authored-by: Piyush Jaiswal <piyushjais at meta.com>
Commit: 1ae179b3257b1087a0b0e354d5dbc7afd8ddd0e6
https://github.com/llvm/llvm-project/commit/1ae179b3257b1087a0b0e354d5dbc7afd8ddd0e6
Author: Wei Wang <apollo.mobility at gmail.com>
Date: 2026-04-06 (Mon, 06 Apr 2026)
Changed paths:
M llvm/lib/Transforms/IPO/SampleProfileMatcher.cpp
A llvm/test/Transforms/SampleProfile/Inputs/pseudo-probe-stale-profile-backward-matching.prof
A llvm/test/Transforms/SampleProfile/pseudo-probe-stale-profile-backward-matching.ll
Log Message:
-----------
[SampleProfileMatcher] Fix backward matching of non-anchor locations (#190118)
The backward matching loop in `matchNonCallsiteLocs` was ineffective
because `InsertMatching` used `std::unordered_map::insert()` which does
not overwrite existing entries. Since forward matching already inserted
entries for all non-anchor locations, the backward matching for the
second half was silently ignored.
The backward matching can update forward mappings in
`IRToProfileLocationMap` in 2 ways:
- The IR location maps a new different profile location. Change
`insert()` to `insert_or_assign()` so that entry overwrite can happen.
- The IR location maps the same profile location. Add `erase()` to
remove such mapping.
Commit: ce61fe5c48b5b74458e7208f7871e788add2d89e
https://github.com/llvm/llvm-project/commit/ce61fe5c48b5b74458e7208f7871e788add2d89e
Author: Wei Wang <apollo.mobility at gmail.com>
Date: 2026-04-06 (Mon, 06 Apr 2026)
Changed paths:
M llvm/tools/llvm-profgen/MissingFrameInferrer.cpp
M llvm/tools/llvm-profgen/PerfReader.h
M llvm/tools/llvm-profgen/ProfileGenerator.cpp
M llvm/tools/llvm-profgen/ProfileGenerator.h
M llvm/tools/llvm-profgen/llvm-profgen.cpp
Log Message:
-----------
[NFC][llvm-profgen] Fix a few minor issues (#190019)
A few NFC (mostly) fixes:
- Drop unused parameters.
- Check return error.
- Fix return type.
Commit: 8e1ea8af3898361c3320662661a6939c3d1985ed
https://github.com/llvm/llvm-project/commit/8e1ea8af3898361c3320662661a6939c3d1985ed
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-04-06 (Mon, 06 Apr 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoP.td
M llvm/test/CodeGen/RISCV/rv32p.ll
Log Message:
-----------
[RISCV][P-ext] Add isel patterns for mhacc/mhaccu/mhaccsu. (#190670)
Commit: 014d5d51e11ba6e84e16bb97a897fa568a971341
https://github.com/llvm/llvm-project/commit/014d5d51e11ba6e84e16bb97a897fa568a971341
Author: Alex Langford <alangford at apple.com>
Date: 2026-04-06 (Mon, 06 Apr 2026)
Changed paths:
M lldb/packages/Python/lldbsuite/test/make/Makefile.rules
Log Message:
-----------
[lldb] Change most tests to build with system libc++ on Darwin (#190034)
Today, on Darwin platforms, almost every test binary in our test suite
loads two copies of libc++, libc++abi, and libunwind. This is because
each of the test binaries explicitly link against a just-built libc++
(which is explicitly required on Darwin right now) but we don't take the
correct steps to replace the system libc++. Doing so is unnecessary and
potentially error-prone, so most tests should link against the system
libc++ where possible.
Background:
The lldb test suite has a collection of tests that rely on libc++
explicitly. The two biggest categories are data formatter tests (which
make sure that we can correctly display values for std types) and
import-std-module tests (which test that we can import the libc++ std
module). To make sure these tests are run, we require a just-built
libc++ to be used.
All of the test binaries link against the just-built libc++, so it gets
loaded. However, when any system library tries to load libc++, it
attempts to load the system one. dyld checks loaded libraries against
the request to load a new one using the full path, meaning anyone
linking against `/usr/lib/libc++.1.dylib` will get it no matter what
other libc++ dylib is already loaded.
The proper way to handle this is using `DYLD_LIBRARY_PATH`, which
switches dyld to checking the leaf name of a dylib instead of the full
path. In theory this works, but we run into an issue where the system
libc++ has additional symbols and many system libraries fail to load.
Louis Dionne added stubs in libc++abi for these missing symbols, meaning
it would be possible to make this scenario work. This may be useful for
the existing libc++ tests.
Commit: fe07678c1f7a558074d2651b94e7d4369aeaec31
https://github.com/llvm/llvm-project/commit/fe07678c1f7a558074d2651b94e7d4369aeaec31
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2026-04-06 (Mon, 06 Apr 2026)
Changed paths:
M .github/workflows/libcxx-build-and-test.yaml
Log Message:
-----------
[libc++] Switch CI runners to use the latest Docker image (#190363)
Commit: 228b6ae5608baea7120fc4d5d611b3fbd30ce0cb
https://github.com/llvm/llvm-project/commit/228b6ae5608baea7120fc4d5d611b3fbd30ce0cb
Author: Yeongu Choe <yeongu.choe at icloud.com>
Date: 2026-04-06 (Mon, 06 Apr 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenBuiltin.cpp
A clang/test/CIR/CodeGenBuiltins/builtin-signbit.c
Log Message:
-----------
[CIR][CodeGen] Implement __builtin_signbit (#188433)
__builtin_signbit function checks if the sign bit of a floating-point
number is set to 0 or 1.
Commit: aedd4e0850efcdf32d6b0a3ff0c9b61f89c7cfd7
https://github.com/llvm/llvm-project/commit/aedd4e0850efcdf32d6b0a3ff0c9b61f89c7cfd7
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2026-04-06 (Mon, 06 Apr 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenExprConstant.cpp
M clang/test/CIR/CodeGen/static-local.cpp
Log Message:
-----------
[CIR] Handle static local var decl constants (#190699)
This adds the handling for the case where the address of a static local
variable is used to initialize another static local. In this case, the
address of the first variable is emitted as a constant in the
initializer of the second variable.
Commit: 90ec5f2f629580d0f71ff4dfe842e2488043cbaf
https://github.com/llvm/llvm-project/commit/90ec5f2f629580d0f71ff4dfe842e2488043cbaf
Author: Jared Hoberock <jaredhoberock at gmail.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M mlir/test/Integration/GPU/CUDA/async.mlir
Log Message:
-----------
[MLIR][test] Re-disable FileCheck on async.mlir integration test (#190702)
#190563 re-enabled FileCheck on `Integration/GPU/CUDA/async.mlir`, but
the buildbot has shown intermittent wrong-output failures
([example](https://lab.llvm.org/buildbot/#/builders/116/builds/27026)):
the test produces `[42, 42]` instead of the expected `[84, 84]`.
This wrong-output flakiness is distinct from the cleanup-time
`cuModuleUnload` errors that #190563 actually fixes — it's the
underlying issue tracked by #170833. The merged commit message for
#190563 incorrectly says `Fixes #170833`; that issue should be reopened,
since the cleanup-error fix doesn't address the wrong-output behavior.
This PR puts the test back in its previously-disabled state. The runtime
cleanup fix in #190563 is unaffected.
Commit: 94875aea7eec805d54055f55fad99b57e0ad2317
https://github.com/llvm/llvm-project/commit/94875aea7eec805d54055f55fad99b57e0ad2317
Author: Lucas Ramirez <11032120+lucas-rami at users.noreply.github.com>
Date: 2026-04-06 (Mon, 06 Apr 2026)
Changed paths:
M llvm/include/llvm/CodeGen/LiveIntervals.h
M llvm/lib/CodeGen/Rematerializer.cpp
M llvm/unittests/CodeGen/RematerializerTest.cpp
Log Message:
-----------
[CodeGen] Fix multiple connected component issue in rematerializer (#186674)
This fixes a rematerializer issue wherein re-creating the interval of a
non-rematerializable super-register defined over multiple MIs, some of
which defining entirely dead sub-registers, could cause a crash when
changing the order of sub-definitions (for example during scheduling)
because the re-created interval could end up with multiple connected
components, which is illegal. The solution is to split separate
components of the interval in such cases. The added unit test crashes
without that added behavior.
Commit: 511a7aacee6523799fbfd83c9c44b41d118362aa
https://github.com/llvm/llvm-project/commit/511a7aacee6523799fbfd83c9c44b41d118362aa
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2026-04-06 (Mon, 06 Apr 2026)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIRAttrs.td
M clang/lib/CIR/Lowering/DirectToLLVM/CMakeLists.txt
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
M clang/test/CIR/Lowering/poison.cir
M clang/utils/TableGen/CIRLoweringEmitter.cpp
Log Message:
-----------
[CIR][NFC] Use tablegen to create CIRAttrToValue visitor declarations (#187607)
This change introduces TableGen support for indicating CIR attributes
that require a CIRAttrToValue visitor, adds the new flag to all
attributes to which it applies, and replaces the explicit declarations
with the tablegen output.
Commit: fa70ee45be461d5d997fc7aac4e39f48be9d21ee
https://github.com/llvm/llvm-project/commit/fa70ee45be461d5d997fc7aac4e39f48be9d21ee
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2026-04-06 (Mon, 06 Apr 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenBuiltin.cpp
M clang/test/CIR/CodeGenBuiltins/builtins-floating-point.c
Log Message:
-----------
[CIR] Implement __builtin_flt_rounds and __builtin_set_flt_rounds (#190706)
This adds CIR handling for the __builtin_flt_rounds and
__builtin_set_flt_rounds builtin functions. Because the LLVM dialect
does not have dedicated operations for these, I have chosen not to
implement them as operations in CIR either. Instead, we just call the
LLVM intrinsic.
Commit: 82505fbfc870f4a657fbaa66a7514db9f30e030a
https://github.com/llvm/llvm-project/commit/82505fbfc870f4a657fbaa66a7514db9f30e030a
Author: Arthur Eubanks <aeubanks at google.com>
Date: 2026-04-06 (Mon, 06 Apr 2026)
Changed paths:
M llvm/docs/LangRef.rst
M llvm/include/llvm/Analysis/InlineOrder.h
M llvm/include/llvm/IR/FixedMetadataKinds.def
M llvm/include/llvm/Transforms/Utils/Cloning.h
M llvm/lib/Analysis/InlineOrder.cpp
M llvm/lib/IR/Verifier.cpp
M llvm/lib/Transforms/IPO/AlwaysInliner.cpp
M llvm/lib/Transforms/IPO/Inliner.cpp
M llvm/lib/Transforms/IPO/ModuleInliner.cpp
M llvm/lib/Transforms/IPO/PartialInlining.cpp
M llvm/lib/Transforms/Utils/CloneFunction.cpp
M llvm/lib/Transforms/Utils/InlineFunction.cpp
M llvm/test/Transforms/Inline/debug-invoke.ll
A llvm/test/Transforms/Inline/inline-history-2.ll
R llvm/test/Transforms/Inline/inline-history-noinline.ll
A llvm/test/Transforms/Inline/inline-history.ll
M llvm/test/Transforms/Inline/inline-recursive-fn2.ll
A llvm/test/Verifier/inline-history-metadata.ll
M llvm/unittests/Analysis/InlineOrderPlugin/InlineOrderPlugin.cpp
Log Message:
-----------
[Inliner] Put inline history into IR as !inline_history metadata (#190700)
(Reland of #190092 with verifier change to look through GlobalAliases)
So that it's preserved across all inline invocations rather than just
one inliner pass run.
This prevents cases where devirtualization in the simplification
pipeline uncovers inlining opportunities that should be discarded due to
inline history, but we dropped the inline history between inliner pass
runs, causing code size to blow up, sometimes exponentially.
For compile time reasons, we want to limit this to only call sites that
have the potential to inline through SCCs, potentially with the help of
devirtualization. This means that the callee is in a non-trivial
(Ref)SCC, or the call site was previously an indirect call, which can
potentially be devirtualized to call any function.
The CGSCCUpdater::InlinedInternalEdges logic still seems to be relevant
even with this change, as monster_scc.ll blows up if I remove that code.
http://llvm-compile-time-tracker.com/compare.php?from=e830d88e8ae5f44a97cc76136a0a4e83aa9157c0&to=ed535e732fc41b79ab8efda2417886cbd0812f7f&stat=instructions:u
Fixes #186926.
Commit: eb35aa90f66f9752c92bbb6f9fb9916ba9db967a
https://github.com/llvm/llvm-project/commit/eb35aa90f66f9752c92bbb6f9fb9916ba9db967a
Author: Jim Lin <jim at andestech.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoZvk.td
M llvm/test/CodeGen/RISCV/rvv/vrol.ll
Log Message:
-----------
[RISCV] Use per-SEW immediate inversion for vrol intrinsic patterns (#190113)
The VPatBinaryV_VI_VROL multiclass was using InvRot64Imm for all SEW
widths when converting vrol immediate intrinsics to vror.vi. This
produced unnecessarily large immediates for narrower element types
(e.g., 61 instead of 5 for SEW=8 rotate-left by 3).
Use the appropriate InvRot{SEW}Imm transform to match what the SDNode
patterns already do.
Co-authored-by: Claude Opus 4.6 (1M context) <noreply at anthropic.com>
Commit: 75bb30ddbf3bf3b9f01cf1c46fe6d9749f377d9d
https://github.com/llvm/llvm-project/commit/75bb30ddbf3bf3b9f01cf1c46fe6d9749f377d9d
Author: Peter Collingbourne <pcc at google.com>
Date: 2026-04-06 (Mon, 06 Apr 2026)
Changed paths:
M llvm/lib/CodeGen/PreISelIntrinsicLowering.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
M llvm/lib/Transforms/InstCombine/InstCombineLoadStoreAlloca.cpp
M llvm/lib/Transforms/Scalar/GVN.cpp
M llvm/lib/Transforms/Utils/Local.cpp
R llvm/test/Transforms/GVN/PRE/protected-field-ptr.ll
A llvm/test/Transforms/InstCombine/protected-field-ptr.ll
M llvm/test/Transforms/InstCombine/ptrauth-intrinsics.ll
M llvm/test/Transforms/PhaseOrdering/phi-protected-field-ptr.ll
A llvm/test/Transforms/PreISelIntrinsicLowering/emupac.ll
M llvm/test/Transforms/PreISelIntrinsicLowering/protected-field-pointer-addrspace1.ll
M llvm/test/Transforms/PreISelIntrinsicLowering/protected-field-pointer.ll
Log Message:
-----------
Move {load,store}(llvm.protected.field.ptr) lowering to InstCombine.
The previous position of llvm.protected.field.ptr lowering for loads
and stores was problematic as it not only inhibited optimizations such
as DSE (as stores to a llvm.protected.field.ptr were not considered to
must-alias stores to the non-protected.field pointer) but also required
changes to other optimization passes to avoid transformations that would
reduce PFP coverage.
Address this by moving the load/store part of the lowering to
InstCombine, where it will run earlier than the PFP-breaking and
AA-relying transformations. The deactivation symbol, null comparison
and EmuPAC parts of the lowering remain in PreISelLowering.
Now that the transformation inhibitions are no longer needed, remove them
(i.e. partially revert #151649, and revert #182976).
This change resulted in a 2.4% reduction in Fleetbench .text size and
the following improvements to PFP performance overhead for BM_PROTO_Arena
on various microarchitectures:
before after
Apple M2 Ultra 3.5% 3.3%
Google Axion C4A 3.3% 2.9%
Google Axion N4A 2.7% 2.2%
Reviewers: fmayer, nikic, vitalybuka
Reviewed By: fmayer
Pull Request: https://github.com/llvm/llvm-project/pull/186548
Commit: 164505d3480c222980b6351865270789aa083769
https://github.com/llvm/llvm-project/commit/164505d3480c222980b6351865270789aa083769
Author: Sam Elliott <aelliott at qti.qualcomm.com>
Date: 2026-04-06 (Mon, 06 Apr 2026)
Changed paths:
M llvm/utils/TableGen/AsmMatcherEmitter.cpp
Log Message:
-----------
[NFC][AsmMatcher] Add Commented Name for FeatureBitsets (#190688)
Commit: f9adee2f6b1f06ae1623a044128997482da5132c
https://github.com/llvm/llvm-project/commit/f9adee2f6b1f06ae1623a044128997482da5132c
Author: Sameer Sahasrabuddhe <sameer.sahasrabuddhe at amd.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
M llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
M llvm/lib/Target/AMDGPU/SOPInstructions.td
R llvm/test/CodeGen/AMDGPU/asyncmark-err.ll
A llvm/test/CodeGen/AMDGPU/asyncmark-gfx12plus.ll
Log Message:
-----------
[AMDGPU] asyncmark support for ASYNC_CNT (#185813)
The ASYNC_CNT is used to track the progress of asynchronous copies
between global and LDS memories. By including it in asyncmark, the
compiler can now assist the programmer in generating waits for
ASYNC_CNT.
Assisted-By: Claude Sonnet 4.5
This is part of a stack:
- #185813
- #185810
Fixes: LCOMPILER-332
Commit: 613c5b4523d55f3fab3385fc7ed9218777b507b8
https://github.com/llvm/llvm-project/commit/613c5b4523d55f3fab3385fc7ed9218777b507b8
Author: Zhen Wang <zhenw at nvidia.com>
Date: 2026-04-06 (Mon, 06 Apr 2026)
Changed paths:
M flang/lib/Semantics/tools.cpp
M flang/test/Lower/CUDA/cuda-program-global.cuf
Log Message:
-----------
[flang][cuda] Lower unified variables as cuf.alloc in main program scope (#190713)
Remove the unified exception from CanCUDASymbolBeGlobal so unified
variables follow the same cuf.alloc lowering path as other CUDA data
attributes.
Commit: 49093c4a57ba64d384520ddd95a07c8b35fadcc0
https://github.com/llvm/llvm-project/commit/49093c4a57ba64d384520ddd95a07c8b35fadcc0
Author: Gareth Andrew Lloyd <gareth at ignition-web.co.uk>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M clang-tools-extra/clang-tidy/performance/TriviallyDestructibleCheck.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/test/CMakeLists.txt
A clang-tools-extra/test/clang-tidy/checkers/performance/trivially-destructible-module.cpp
M clang-tools-extra/test/lit.cfg.py
Log Message:
-----------
[clang-tidy] Fix performance-trivially-destructible with C++20 modules (#178471)
When a class definition is seen through both a header include and a
C++20 module import, destructors may appear multiple times in the AST's
redeclaration chain. The original matcher used `isFirstDecl()` which
fails in this scenario because the same declaration can appear as both
first and non-first depending on the view.
Replace `unless(isFirstDecl())` with `isOutOfLine()` which correctly
identifies out-of-line definitions by checking whether the lexical
context differs from the semantic context.
Also update clang-tools-extra's lit.cfg.py to call `use_clang()` instead
of `clang_setup()` to make the `%clang` substitution available for
tests.
Fixes #178102
Co-authored-by: Chuanqi Xu <yedeng.yd at linux.alibaba.com>
Commit: e80f32fd20bf15b4515e868962ace7b34b477d09
https://github.com/llvm/llvm-project/commit/e80f32fd20bf15b4515e868962ace7b34b477d09
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2026-04-06 (Mon, 06 Apr 2026)
Changed paths:
M llvm/lib/CodeGen/CodeGenPrepare.cpp
Log Message:
-----------
[CodeGenPrepare] Use Instruction::comesBefore instead of manual ordering (#190485)
After #172329, we noticed that some sources compiled with MSan take
1000x longer to compile. This is caused by quadratic complexity in
tryToSinkFreeOperands, which can be called on a significant number
of instructions within huge basic blocks.
This inefficiency was introduced in 9cfa9b4, which manually iterates
and creates a DenseMap of entire basic blocks for each interesting
instruction.
This patch avoids the manual ordering by using
Instruction::comesBefore(), which provides the exact same
ordering much more efficiently.
Commit: 6870ebca3c65c2b80c929f97d97b58ab3c6a25c2
https://github.com/llvm/llvm-project/commit/6870ebca3c65c2b80c929f97d97b58ab3c6a25c2
Author: Hiroshi Yamauchi <56735936+hjyamauchi at users.noreply.github.com>
Date: 2026-04-06 (Mon, 06 Apr 2026)
Changed paths:
M llvm/include/llvm/Support/FileSystem.h
M llvm/lib/CAS/MappedFileRegionArena.cpp
M llvm/lib/Support/Unix/Path.inc
M llvm/lib/Support/Windows/Path.inc
M llvm/unittests/Support/Path.cpp
Log Message:
-----------
[CAS] Give Windows file mappings names to better ensure same mappings are used (#190692)
Commit: 97ed6485f2ca10fd7e66a8ebe8920136148d6c32
https://github.com/llvm/llvm-project/commit/97ed6485f2ca10fd7e66a8ebe8920136148d6c32
Author: A. Jiang <de34 at live.cn>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M libcxx/docs/Status/Cxx2cIssues.csv
M libcxx/docs/Status/Cxx2cPapers.csv
Log Message:
-----------
[libc++][docs] Update paper and LWG issue lists after 2026-03 meeting (#189901)
[P3726R2](https://wg21.link/P3726R2) is a Core paper but adds
`std::start_lifetime`, so it needs to be listed in libc++'s
documentation.
For LWG issues, see [P4145R0](https://wg21.link/P4145R0) and
[P4146R0](https://wg21.link/P4146R0).
Commit: 73499774152e23e9e58324809a20bd7e3abff275
https://github.com/llvm/llvm-project/commit/73499774152e23e9e58324809a20bd7e3abff275
Author: lonely eagle <2020382038 at qq.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M mlir/lib/Transforms/CSE.cpp
Log Message:
-----------
[mlir][CSE] Fix CSE markAnalysesPreserved<DominanceInfo, PostDominanceInfo> comment (#190471)
The original comment claimed that DominanceInfo and PostDominanceInfo
could be preserved because region operations are not removed. However,
the real reason was that the original CSE only deleted redundant
operations without moving any operation to a different block, leaving
the dominance tree structure unchanged. Part of
https://github.com/llvm/llvm-project/pull/180556.
Commit: 150783e254d82d290fd05ab5c50813a9d7c98fca
https://github.com/llvm/llvm-project/commit/150783e254d82d290fd05ab5c50813a9d7c98fca
Author: lonely eagle <2020382038 at qq.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M mlir/include/mlir/Dialect/ControlFlow/IR/ControlFlowOps.td
M mlir/include/mlir/Interfaces/ControlFlowInterfaces.td
M mlir/include/mlir/Reducer/ReductionNode.h
M mlir/lib/Dialect/ControlFlow/IR/ControlFlowOps.cpp
M mlir/lib/Reducer/CMakeLists.txt
M mlir/lib/Reducer/ReductionNode.cpp
M mlir/lib/Reducer/ReductionTreePass.cpp
M mlir/test/mlir-reduce/reduction-tree.mlir
Log Message:
-----------
Revert "Reland "[mlir][reducer] Add eraseRedundantBlocksInRegion and getSuccessorForwardOperands API to BranchOpInterface"" (#190727)
To decouple the BranchOpInterface implementation from the reduction-tree
changes. Reverts llvm/llvm-project#189253,
Commit: d6d7d0aca0e945b9e859c15f5e6a8b7c458bb2d7
https://github.com/llvm/llvm-project/commit/d6d7d0aca0e945b9e859c15f5e6a8b7c458bb2d7
Author: Kaviya Rajendiran <67495422+kaviya2510 at users.noreply.github.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M clang/include/clang/Options/Options.td
M clang/lib/Driver/ToolChains/Flang.cpp
M flang/include/flang/Frontend/CodeGenOptions.h
M flang/include/flang/Optimizer/Transforms/Passes.td
M flang/include/flang/Tools/CrossToolHelpers.h
M flang/lib/Frontend/CompilerInvocation.cpp
M flang/lib/Frontend/FrontendActions.cpp
M flang/lib/Optimizer/Passes/Pipelines.cpp
M flang/lib/Optimizer/Transforms/FunctionAttr.cpp
A flang/test/Driver/Inputs/pgo-sample.prof
A flang/test/Driver/fprofile-sample-use.f90
A flang/test/Integration/inputs/pgo-sample.prof
A flang/test/Integration/profile-sample-use.f90
M mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td
M mlir/lib/Target/LLVMIR/ModuleImport.cpp
M mlir/lib/Target/LLVMIR/ModuleTranslation.cpp
A mlir/test/Target/LLVMIR/Import/use-sample-profile.ll
A mlir/test/Target/LLVMIR/use-sample-profile.mlir
Log Message:
-----------
[Flang][Driver] Add support for '-fprofile-sample-use' option (#188697)
When the `-fprofile-sample-use=sample.prof` option is passed, the
compiler records the profile file path in `SampleProfileFile` . This
value is later used by the `SampleProfileLoaderPass`, which loads the
sample profile and injects the corresponding profiling metadata in the
LLVM IR.
Commit: cab7d1e485ca02074c7499020b289c726b06d5cf
https://github.com/llvm/llvm-project/commit/cab7d1e485ca02074c7499020b289c726b06d5cf
Author: lonely eagle <2020382038 at qq.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M mlir/lib/Reducer/ReductionTreePass.cpp
A mlir/test/mlir-reduce/false.sh
M mlir/test/mlir-reduce/invalid.mlir
M mlir/test/mlir-reduce/simple-test.mlir
R mlir/test/mlir-reduce/test.sh
A mlir/test/mlir-reduce/true.sh
Log Message:
-----------
[mlir][reducer] Repalce module.emitWarning with module.emitError in ReductionTree pass (#190584)
This PR fixes the diagnostic message for mlir-reduce's reduction-tree
pass when the input module is not "interesting". Previously, running
with the warning pass would fail silently, and enabling debug options
would only show a generic "pass manager run failed" message without any
useful diagnostic information.
Commit: 45494d9c165965a8f5aaccd00c7301c166bcd575
https://github.com/llvm/llvm-project/commit/45494d9c165965a8f5aaccd00c7301c166bcd575
Author: Jim Lin <jim at andestech.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoZa.td
Log Message:
-----------
[RISCV] Fix address type in Zacas seq_cst atomic pattern (#190729)
The seq_cst pattern in AMOCASPat used (vt GPR:$addr) for the address
operand, while all other patterns (monotonic, acquire, release, acq_rel)
consistently use (XLenVT GPR:$addr). This would produce a wrong type for
the address when vt differs from XLenVT (e.g., amocas.d on RV32 where
vt=i64).
Co-authored-by: Claude Opus 4.6 (1M context) <noreply at anthropic.com>
Commit: 9e72ab62987f412f8592dffa54fdef8c63571fbb
https://github.com/llvm/llvm-project/commit/9e72ab62987f412f8592dffa54fdef8c63571fbb
Author: bharsesh <40402884+bharsesh at users.noreply.github.com>
Date: 2026-04-06 (Mon, 06 Apr 2026)
Changed paths:
M clang/lib/Sema/SemaChecking.cpp
M clang/test/Analysis/bstring.c
M clang/test/Sema/warn-fortify-source.c
Log Message:
-----------
[Clang][Sema] Add fortify warnings for bcopy and bzero (#168965) (#186522)
Add fortify warnings for bcopy and bzero as part of
[llvm#142230](https://github.com/llvm/llvm-project/issues/142230)
Commit: b6759f17709a33e4c7fd3d500c4a94446e4100fe
https://github.com/llvm/llvm-project/commit/b6759f17709a33e4c7fd3d500c4a94446e4100fe
Author: Hemang Gadhavi <hemang.gadhavi at ibm.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M lldb/source/Host/aix/Host.cpp
M lldb/source/Plugins/ObjectFile/XCOFF/ObjectFileXCOFF.cpp
M lldb/source/Plugins/ObjectFile/XCOFF/ObjectFileXCOFF.h
M lldb/source/Utility/ArchSpec.cpp
M lldb/test/Shell/ObjectFile/XCOFF/basic-info32.yaml
Log Message:
-----------
[lldb][AIX] Extract CPU type and set up process architecture accordingly (#189910)
This PR is in reference to porting LLDB on AIX. Ref discusssions: [llvm
discourse](https://discourse.llvm.org/t/port-lldb-to-ibm-aix/80640) and
[#101657](https://github.com/llvm/llvm-project/issues/101657).
Complete changes together in this draft:
- [Extending LLDB to work on AIX
#102601](https://github.com/llvm/llvm-project/pull/102601)
Description:
The process architecture was previously initialized using a hardcoded
TCPU_PPC64 CPU type.
The logic has been updated to determine the CPU type dynamically by
inspecting the magic bytes and the XCOFF header. Based on this
information, the appropriate CPU type (TCPU_PPC or TCPU_PPC64) is
selected and used when constructing and setting the ArchSpec.
This change ensures that the process architecture correctly reflects the
underlying binary format.
Commit: a485f1c63475d416b179b78b64cb22397f4085cb
https://github.com/llvm/llvm-project/commit/a485f1c63475d416b179b78b64cb22397f4085cb
Author: Chris Jackson <chris.jackson at amd.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SILowerSGPRSpills.cpp
M llvm/test/CodeGen/AMDGPU/llc-pipeline.ll
M llvm/test/CodeGen/AMDGPU/sgpr-regalloc-flags.ll
A llvm/test/CodeGen/AMDGPU/si-lower-sgpr-spills-cycle-header.ll
A llvm/test/CodeGen/AMDGPU/si-lower-sgpr-spills-cycle-header.mir
A llvm/test/CodeGen/AMDGPU/si-lower-sgpr-spills-initial-insert-in-body.mir
A llvm/test/CodeGen/AMDGPU/si-lower-sgpr-spills-initial-insert-in-latch.mir
A llvm/test/CodeGen/AMDGPU/si-lower-sgpr-spills-multi-entry-cycle.mir
M llvm/test/CodeGen/AMDGPU/spill-sgpr-to-virtual-vgpr.mir
M llvm/test/CodeGen/AMDGPU/spill-vgpr-to-agpr-update-regscavenger.ll
Log Message:
-----------
[AMDGPU][SILowerSGPRSpills] Correct insertion of IMPLICIT_DEF in cycles (#186348)
si-lower-sgpr spills was observed inserting IMPLICIT_DEF for lane VGPR
restores in the cycle header. The virtual VGPR is therefore not live-in
to the header and wwm regallocfast does not insert a restore. This
results in the vgpr being clobbered after each backedge.
Correct this by inserting the IMPLICIT_DEF in a block that dominates
all entries.
Assisted by Claude.
Commit: d55122e4390dc67e393bdf860844f7eebf73809d
https://github.com/llvm/llvm-project/commit/d55122e4390dc67e393bdf860844f7eebf73809d
Author: Aleksandr Platonov <platonov.aleksandr at huawei.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M clang/lib/Rewrite/Rewriter.cpp
M clang/unittests/Rewrite/RewriterTest.cpp
Log Message:
-----------
[clang][Rewriter] Adjust end offset before RewriteBuffer::getMappedOffset() call (#187374)
Without this patch, only cases when a token length increased were
supported.
If a token length decreased, we returned a larger string than expected
(e.g. in the added tests, "xretur " would be returned instead of
"xretur")
Commit: a89f174e502165ac566f922edeaee53329172b22
https://github.com/llvm/llvm-project/commit/a89f174e502165ac566f922edeaee53329172b22
Author: Haojian Wu <hokein.wu at gmail.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M clang/lib/Sema/SemaDecl.cpp
A clang/test/SemaTemplate/GH187909.cpp
Log Message:
-----------
[clang] Fix crash on invalid out-of-line enum definition with template parameters (#188246)
clang crashes when an invalid out-of-line enum definition is provided
with template parameters. In these cases, clang produces a dependent
type within a non-dependent context, violating internal invariants.
The fix is to fallback the underlying type of the enum to `int` during
error recovery in `Sema::ActOnTag` when `Invalid` is true, making it
safe for downstream processing while still preserving the invalid
declaration in the AST.
Fixes #187909
Commit: 8460cb9bbb39372815ded429cd56f31a87bba9dc
https://github.com/llvm/llvm-project/commit/8460cb9bbb39372815ded429cd56f31a87bba9dc
Author: Chuanqi Xu <yedeng.yd at linux.alibaba.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M clang-tools-extra/clang-tidy/ClangTidy.cpp
A clang-tools-extra/test/clang-tidy/infrastructure/cxx20-modules.cppm
M clang-tools-extra/test/lit.cfg.py
M clang/include/clang/ASTMatchers/ASTMatchFinder.h
M clang/lib/ASTMatchers/ASTMatchFinder.cpp
Log Message:
-----------
[clang-tidy] [Modules] Skip checking decls in clang-tidy (#145630) (#190733)
Close https://github.com/llvm/llvm-project/issues/145628
Note that I am not sure if this is the proper fix. On the one hand, the
fix lives in ASTMachers instead of clang-tidy. On the other hand, I feel
this may be a more general fix.
Commit: 4c2e49dc5ce3125be9fb07dcefe9be970ce739ec
https://github.com/llvm/llvm-project/commit/4c2e49dc5ce3125be9fb07dcefe9be970ce739ec
Author: Chuanqi Xu <yedeng.yd at linux.alibaba.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M clang/lib/AST/StmtProfile.cpp
A clang/test/Modules/callable-require-clause-merge.cppm
M clang/test/Modules/polluted-operator.cppm
Log Message:
-----------
[C++20] [Modules] Don't profiling the callee of CXXFoldExpr (#190732)
Close https://github.com/llvm/llvm-project/issues/190333
For the test case, the root cause of the problem is, the compiler
thought the declaration of `operator &&` in consumer.cpp may change the
meaning of '&&' in the requrie clause of `F::operator()`. But it doesn't
make sense. Here we skip profiling the callee to solve the problem. Note
that we've already record the kind of the operator. So '&&' and '||'
won't be confused.
Commit: 39e503438976f45cbf2a8fa99a20bd7daa9e5b4c
https://github.com/llvm/llvm-project/commit/39e503438976f45cbf2a8fa99a20bd7daa9e5b4c
Author: Jiří Filek <52356396+fileho at users.noreply.github.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp
M clang/test/CodeGen/AArch64/bf16-getset-intrinsics.c
M clang/test/CodeGen/AArch64/neon/bf16-getset.c
Log Message:
-----------
[CIR][AArch64] Implement vget_lane_bf16 and vgetq_lane_bf16 builtins (#186866)
Implements vget_lane_bf16 and vgetq_lane_bf16 builtins. Updates test
with CIR test.
Part of #185382
Commit: 774ac3164adea2be906192769922033c938f18f2
https://github.com/llvm/llvm-project/commit/774ac3164adea2be906192769922033c938f18f2
Author: vangthao95 <vang.thao at amd.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.gws.barrier-bundle.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.gws.barrier.ll
Log Message:
-----------
[AMDGPU][NFC] Split and auto-generate ds.gws.barrier test checks (#190680)
Split MIR checks into a separate test file.
Commit: dcd58a8fedc8127479e8553dbeed1f172caae34f
https://github.com/llvm/llvm-project/commit/dcd58a8fedc8127479e8553dbeed1f172caae34f
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M llvm/lib/Analysis/InlineCost.cpp
M llvm/test/Transforms/Inline/attributes.ll
Log Message:
-----------
[Inline] Allow inlining with null_pointer_is_valid mismatch (#190510)
If the callee has null_pointer_is_valid but the caller does not, we
should still inline and add null_pointer_is_valid to the caller (which
is handled by an already existing inline adjustment rule).
This does mean that optimizations in the caller may be reduced by
unnecessarily preserving null checks, but that's still better than not
inlining at all. In particular, this check causes issues with LTO in the
Linux kernel, as the C portions are compiled with null_pointer_is_valid,
but the Rust portions are not.
The test is modified to show that the previous alwaysinline behavior now
always holds.
Commit: 89446086eaed6f07e2c122396570f2985cec62e5
https://github.com/llvm/llvm-project/commit/89446086eaed6f07e2c122396570f2985cec62e5
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M llvm/include/llvm/IR/Instruction.h
Log Message:
-----------
[IR] Remove HasMetadata bit from instructions (#190651)
We were reserving one bit for a HasMetadata flag. However, this flag has
long since been moved into Value itself, prior to being removed from
there as well recently.
Commit: cfdd8bcca85a03c613b06306af20c547764d4436
https://github.com/llvm/llvm-project/commit/cfdd8bcca85a03c613b06306af20c547764d4436
Author: Balázs Kéri <balazs.keri at ericsson.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
A clang-tools-extra/clang-tidy/bugprone/AssignmentInSelectionStatementCheck.cpp
A clang-tools-extra/clang-tidy/bugprone/AssignmentInSelectionStatementCheck.h
M clang-tools-extra/clang-tidy/bugprone/BugproneTidyModule.cpp
M clang-tools-extra/clang-tidy/bugprone/CMakeLists.txt
M clang-tools-extra/clang-tidy/cert/CERTTidyModule.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
A clang-tools-extra/docs/clang-tidy/checks/bugprone/assignment-in-selection-statement.rst
A clang-tools-extra/docs/clang-tidy/checks/cert/exp45-c.rst
M clang-tools-extra/docs/clang-tidy/checks/list.rst
A clang-tools-extra/test/clang-tidy/checkers/bugprone/assignment-in-selection-statement.c
A clang-tools-extra/test/clang-tidy/checkers/bugprone/assignment-in-selection-statement.cpp
Log Message:
-----------
[clang-tidy] Add check 'bugprone-assignment-in-selection-statement' (#180219)
Commit: cb1d61403b18f864d558b7b3d4ab54abac1e23c4
https://github.com/llvm/llvm-project/commit/cb1d61403b18f864d558b7b3d4ab54abac1e23c4
Author: Henrich Lauko <xlauko at mail.muni.cz>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
Log Message:
-----------
[CIR] Use UnitProp for comdat, constant, dso_local (#190518)
Commit: 7fb61f589993da3dc160d65092ca4d7ce685eaac
https://github.com/llvm/llvm-project/commit/7fb61f589993da3dc160d65092ca4d7ce685eaac
Author: Victor Chernyakin <chernyakin.victor.j at outlook.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M clang-tools-extra/clang-tidy/misc/UseInternalLinkageCheck.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
A clang-tools-extra/test/clang-tidy/checkers/misc/use-internal-linkage-module-implementation.cpp
A clang-tools-extra/test/clang-tidy/checkers/misc/use-internal-linkage-module-partition.cpp
M clang-tools-extra/test/clang-tidy/checkers/misc/use-internal-linkage-module.cpp
Log Message:
-----------
[clang-tidy] Make `misc-use-internal-linkage` not diagnose symbols in importable module units (#188679)
Fixes #187884.
Commit: 3078eaaec8e793b49b79e9278dabc67d4f0eb8e3
https://github.com/llvm/llvm-project/commit/3078eaaec8e793b49b79e9278dabc67d4f0eb8e3
Author: Łukasz Plewa <lukasz.plewa at intel.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M offload/plugins-nextgen/level_zero/src/L0Kernel.cpp
M offload/plugins-nextgen/level_zero/src/L0Program.cpp
Log Message:
-----------
[offload] fix invalid symbol handling in l0 plugin (#189442)
Commit: 1e10ab2ddba11f8e5a46cd89e4e579b0b75657d3
https://github.com/llvm/llvm-project/commit/1e10ab2ddba11f8e5a46cd89e4e579b0b75657d3
Author: Martin Storsjö <martin at martin.st>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M lld/test/COFF/gnu-weak.test
Log Message:
-----------
[LLD] [COFF] Remove a now incorrect comment in a test. NFC. (#190489)
This comment was added in 26572002749ee2e7d734e4e0aed4cca0e1c623c3 in
2018. Later in 8f540dad6120d00e3ad896b98cd32bcf00623ccd in 2020, the
LLVM MC layer was adjusted to do essentially the same as GNU binutils
do.
Therefore, I think that this test now technically could be done with
object files generated by llvm-mc as well, instead of bundled binary
object files.
Commit: df081924cf21d3b289f976172f6583cc63ec40fb
https://github.com/llvm/llvm-project/commit/df081924cf21d3b289f976172f6583cc63ec40fb
Author: Martin Storsjö <martin at martin.st>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M lld/COFF/Config.h
M lld/COFF/Driver.cpp
M lld/COFF/SymbolTable.cpp
A lld/test/COFF/export-all-conflict.test
Log Message:
-----------
[LLD] [COFF] Fix crashes for conflicting exports with -export-all-symbols (#190492)
Commit adcdc9cc3740adba3577b328fa3ba492cbccd3a5 (since LLD 17) added a
warning message if there are conflicting attempts to export a specific
symbol.
That commit missed one source of exports, from the LLD specific
-export-all-symbols flag (which only has an effect in mingw mode).
To trigger this case, one needs to have an export set by a def file,
combined with the -export-all-symbols flag (which attempts to export all
global symbols, despite explicit exports through embedded directives or
a def file).
To trigger the warning (and the previous crash), one would have to have
some difference between the export produced by -export-all-symbols and
the one from the def file. That difference could be e.g. that the def
file contained an explicit ordinal, or that the def file lacked a DATA
marking for a symbol that the automatic export of all symbols decides to
export as a data symbol.
This fixes https://github.com/llvm/llvm-project/issues/187318. (In the
repro case in that bug, the def file lacked DATA markings for a data
symbol.)
Commit: c6187d5bd9c7ea46b25dd0f26b9e9bde7ad340da
https://github.com/llvm/llvm-project/commit/c6187d5bd9c7ea46b25dd0f26b9e9bde7ad340da
Author: Alex Duran <alejandro.duran at intel.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M offload/CMakeLists.txt
M offload/cmake/Modules/LibomptargetGetDependencies.cmake
M offload/plugins-nextgen/level_zero/CMakeLists.txt
A offload/plugins-nextgen/level_zero/dynamic_l0/L0DynWrapper.cpp
A offload/plugins-nextgen/level_zero/dynamic_l0/level_zero/ze_api.h
A offload/plugins-nextgen/level_zero/dynamic_l0/level_zero/zes_api.h
R offload/plugins-nextgen/level_zero/src/L0DynWrapper.cpp
Log Message:
-----------
[OFFLOAD][L0] Remove dependence from level zero headers for dlopen build (#189120)
Adds the subset of the Level Zero headers necessary to compile the
plugin when built with dlopen support.
Disclaimer: The headers were mostly generated by Claude.
Commit: 0e150b6760372cf05c71e8d4e4375421270371f1
https://github.com/llvm/llvm-project/commit/0e150b6760372cf05c71e8d4e4375421270371f1
Author: Haojian Wu <hokein.wu at gmail.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M clang/docs/ReleaseNotes.rst
Log Message:
-----------
Add a missing release note for the fix #188246 (#190746)
Commit: 5c6ad65fd3dde88ce9bcd04dda8f07f38d79f2c7
https://github.com/llvm/llvm-project/commit/5c6ad65fd3dde88ce9bcd04dda8f07f38d79f2c7
Author: tedj <tedmjohnson at protonmail.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M flang/lib/Optimizer/Transforms/StackArrays.cpp
A flang/test/Transforms/stack-arrays-block-cfg-scope.fir
A flang/test/Transforms/stack-arrays-nested-scope.fir
A flang/test/Transforms/stack-arrays-scope.f90
Log Message:
-----------
[flang] Fix stack-arrays pass moving alloca across stackrestore scope (#184727)
When a operand is shared between two fir.allocmem ops in different
stacksave/stackrestore scopes, findAllocaInsertionPoint() placed both
allocas at the operand definition site inside the first scope. The first
stackrestore then reclaimed both, leaving the second call with a
dangling pointer.
Add a check for intervening stackrestore ops between the last operand
and the allocmem. If one is found, fall back to the allocmem's own
location, matching the existing bail-out for cross-block operands.
Fixes: https://github.com/llvm/llvm-project/issues/178812
Commit: d4a20e7f7e35da720eea34f3de97356d94b7a494
https://github.com/llvm/llvm-project/commit/d4a20e7f7e35da720eea34f3de97356d94b7a494
Author: Pavel Labath <pavel at labath.sk>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/src/__support/OSUtil/linux/syscall_wrappers/CMakeLists.txt
A libc/src/__support/OSUtil/linux/syscall_wrappers/connect.h
M libc/src/sys/socket/CMakeLists.txt
A libc/src/sys/socket/connect.h
M libc/src/sys/socket/linux/CMakeLists.txt
A libc/src/sys/socket/linux/connect.cpp
M libc/test/src/sys/socket/linux/CMakeLists.txt
A libc/test/src/sys/socket/linux/connect_test.cpp
Log Message:
-----------
[libc] Implement connect(2) on linux (#189668)
I'm using the new syscall wrapper framework, and enabling the entry
point for x86_64, aarch64 and riscv. The associated test currently only
checks for the error code. Once we have listen&accept (which I'm
probably going to tackle next), we can test that the two can talk to
each other.
Commit: b12d54d680f5af54e01c3489aa97ab2b0ce1ddc3
https://github.com/llvm/llvm-project/commit/b12d54d680f5af54e01c3489aa97ab2b0ce1ddc3
Author: Owen Anderson <resistor at mac.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/LoopIdiomRecognize.cpp
M llvm/test/Transforms/LoopIdiom/non-integral-pointers.ll
Log Message:
-----------
[CHERI] Refine LoopIdiomRecognize handling of stable representation non-integral pointers. (#189402)
This makes two changes:
- memset can be formed from stores of null pointers, even if they are
non-integral. Null pointers are already assumed to be equivalent to the
all-zeros bit pattern, and it's not the goal of non-integral pointer
support to change that assumption.
- memcpy can be formed from copies of non-integral pointers. We assume
if the environment provides a memcpy implementation for a non-integral
pointer address space, then that memcpy is non-integral pointer aware.
These changes are not applied to pointers with unstable representation.
Commit: 55a3382be485148a3ab29c8942a07f13e9ba036a
https://github.com/llvm/llvm-project/commit/55a3382be485148a3ab29c8942a07f13e9ba036a
Author: Tharun V K <40231849+tharunvk at users.noreply.github.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
A llvm/test/CodeGen/X86/half-fneg-fabs.ll
Log Message:
-----------
[X86] Add DAG combine to fold promoted f32 sequences for f16 fneg and fabs (#189395)
This patch optimizes f16 fneg and fabs on X86 targets by introducing
a DAG combine to identify and collapse fpext -> fneg/fabs -> fptrunc.
Generally f16 operations are promoted to f32. For bitwise-equivalent
operations like fneg and fabs, this results in unnecessary and
expensive f32 library calls (__extendhfsf2 / __truncsfhf2) or
hardware conversions (vcvtph2ps / vcvtps2ph) at -O0.
Fixes: https://github.com/llvm/llvm-project/issues/188201
---------
Co-authored-by: Phoebe Wang <phoebe.wang at intel.com>
Commit: b9149823d85891044bf34e8654d1a45870e55174
https://github.com/llvm/llvm-project/commit/b9149823d85891044bf34e8654d1a45870e55174
Author: Luke Lau <luke at igalia.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfdiv-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfrdiv-vp.ll
M llvm/test/CodeGen/RISCV/rvv/sink-splat-operands.ll
M llvm/test/CodeGen/RISCV/rvv/undef-vp-ops.ll
M llvm/test/CodeGen/RISCV/rvv/vfdiv-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfrdiv-vp.ll
Log Message:
-----------
[RISCV] Remove codegen for vp_fdiv (#190591)
Part of the work to remove trivial VP intrinsics from the RISC-V
backend, see
https://discourse.llvm.org/t/rfc-remove-codegen-support-for-trivial-vp-intrinsics-in-the-risc-v-backend/87999
This splits off the vp.fdiv intrinsic from #179622.
Commit: 36fa27fe3e11df54c5c20402a45aa90503db4cc6
https://github.com/llvm/llvm-project/commit/36fa27fe3e11df54c5c20402a45aa90503db4cc6
Author: Joshua Rodriguez <josh.rodriguez at arm.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/lib/Target/AArch64/GISel/AArch64RegisterBankInfo.cpp
M llvm/test/CodeGen/AArch64/arm64-int-neon.ll
M llvm/test/CodeGen/AArch64/arm64-vmul.ll
Log Message:
-----------
[AArch64][GlobalISel] Add patterns for scalar sqdmlal/sqdmlsl (#187246)
SQMLAL's instruction selection patterns don't work for GlobalISel when
the intrinsic has scalar operands. This is because the intrinsic has a
slightly different name (int_aarch64_neon_sqdmulls_scalar). As a result,
this leads to sub-optimal code generation.
This patch allows sqdmulls_scalar to lower, and adds GlobalISel versions
of the TableGen patterns to provide this optimisation.
The pattern added performs this mapping:
`SQADD(a, SQDMULL(b,c)) -> SQDMLAL(a, b, c) [And equivalent for
subtraction]`
Commit: c1d6eea9e794f661402341137d228dd735af1056
https://github.com/llvm/llvm-project/commit/c1d6eea9e794f661402341137d228dd735af1056
Author: David Spickett <david.spickett at arm.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M llvm/docs/ReleaseNotes.md
Log Message:
-----------
llvm][docs] Cleanup LLDB release notes (#190760)
* A few items were in the wrong place.
* FreeBSD batch mode check was removed in
d0f5df111865ea4bb9d7d6ff35b517ee1aa7402f.
* Mark some names as plaintext.
* Fix some spellings.
Commit: cb1a912c76364c74e9d9a91f5e70561733358dc8
https://github.com/llvm/llvm-project/commit/cb1a912c76364c74e9d9a91f5e70561733358dc8
Author: Owen Anderson <resistor at mac.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M llvm/test/CodeGen/Generic/2010-11-04-BigByval.ll
Log Message:
-----------
[llvm] Mark Darwin arm64 to UNSUPPORTED for 2010-11-04-BigByval.ll (#190594)
Update AArch64 UNSUPPORTED on CodeGen/Generic/2010-11-04-BigByval.ll to
include Darwin, where it is referred to as arm64 rather than aarch64.
Commit: db3302dc1e42431efa728ebf7a78e3a30593a653
https://github.com/llvm/llvm-project/commit/db3302dc1e42431efa728ebf7a78e3a30593a653
Author: Lucas Ramirez <11032120+lucas-rami at users.noreply.github.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M llvm/lib/CodeGen/Rematerializer.cpp
M llvm/unittests/CodeGen/RematerializerTest.cpp
Log Message:
-----------
[CodeGen] Fix incorrect rematerialization order in rematerializer (#189485)
When rematerializing DAGs of registers wherein multiple paths exist
between some regsters of the DAG, it is possible that the
rematerialization determines an incorrect rematerialization order that
does not ensure that a register's dependencies are rematerialized before
itself; an invariant that is otherwise required.
This fixes that using a simpler recursive logic to determine a correct
rematerialization order that honors this invariant. A minimal unit test
is added that fails on the current implementation.
Commit: 3f583d40455fb498373b17ecf058fae553770395
https://github.com/llvm/llvm-project/commit/3f583d40455fb498373b17ecf058fae553770395
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/find-last-iv-sinkable-expr-epilogue.ll
M llvm/test/Transforms/LoopVectorize/find-last-iv-sinkable-expr-epilogue.ll
M llvm/test/Transforms/LoopVectorize/find-last-iv-sinkable-expr.ll
M llvm/test/Transforms/LoopVectorize/iv-select-cmp-decreasing.ll
Log Message:
-----------
[VPlan] Optimize FindLast of (binop %IV, live-in) by sinking. (#183911)
When we are finding the last occurrence of a value of an expression that
depends on an induction, we can vectorize this by just selecting the IV
and sinking the expression in the middle block
This follows one of @ayalz's suggestions during earlier discussions for
adding support for CAS/FindLast patterns.
This patch starts with the simplest case, where the selected value is a
simple binary expression of a wide IV and a loop-invariant operand.
This should always be profitable, as the current restriction to binary
operators ensures that the width of the wide IV matches the original
reduction width, we won't introduce any new, wider reduction phi
recipes, and remove the boolean reduction + the horizontal reduction in
the loop.
PR: https://github.com/llvm/llvm-project/pull/183911
Commit: de6d86cf281b9ea0f10c593859f77e306db6fbe8
https://github.com/llvm/llvm-project/commit/de6d86cf281b9ea0f10c593859f77e306db6fbe8
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M flang/include/flang/Semantics/openmp-utils.h
M flang/lib/Semantics/openmp-utils.cpp
Log Message:
-----------
[flang][OpenMP] Use OmpDirectiveSpecifications in helper functions (#190644)
This will make them more reusable, for example when processing APPLY
clause in the future.
Issue: https://github.com/llvm/llvm-project/issues/185287
Commit: fe8a597aa62a7872b2e3225bab29dfa5b9747c2d
https://github.com/llvm/llvm-project/commit/fe8a597aa62a7872b2e3225bab29dfa5b9747c2d
Author: Erick Velez <erickvelez7 at gmail.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M clang/lib/ExtractAPI/DeclarationFragments.cpp
A clang/test/ExtractAPI/type-alias.cpp
M clang/test/Index/extract-api-cursor-cpp.cpp
Log Message:
-----------
[clang][ExtractAPI] emit correct spelling for type aliases (#134007)
Previously, C++11 type aliases were serialized using "typedef"
regardless of the source spelling.
This checks if the TypedefNameDecl is actually a TypeAliasDecl and
corrects the spelling.
Commit: aa4c76d8fb2211cf911a73533138baa24f23b34d
https://github.com/llvm/llvm-project/commit/aa4c76d8fb2211cf911a73533138baa24f23b34d
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M mlir/include/mlir/IR/BuiltinDialectBytecode.td
M mlir/unittests/Bytecode/BytecodeTest.cpp
Log Message:
-----------
[mlir][BytecodeReader] Fix crash reading FusedLoc with empty locations (#189228)
FusedLoc::get(context, locs) may return UnknownLoc when locs is empty
and no metadata is provided. The bytecode reader's cBuilder used
cast<FusedLoc>() on this result, which crashes with an assertion
failure.
Fix by giving the FusedLoc DialectAttribute its own cBuilder that passes
Attribute() explicitly, causing getChecked<FusedLoc> to call the
two-parameter storage constructor directly and always produce a
FusedLoc.
Fixes #99626
Assisted-by: Claude Code
Commit: 546787ec97e292391c27fe55ef4549e7ba022afe
https://github.com/llvm/llvm-project/commit/546787ec97e292391c27fe55ef4549e7ba022afe
Author: Davide Grohmann <davide.grohmann at arm.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVTosaTypes.td
M mlir/test/Dialect/SPIRV/IR/tosa-ops-verification.mlir
Log Message:
-----------
[mlir][spirv] Fix SPIRV TOSA per-channel rescale length verification (#190748)
`TensorLengthMatchesPerChannel` was checking `rank(input) - 1` instead
of `input_shape[rank(input) - 1]`. Fix the predicate and update the
rescale verifier tests accordingly.
Signed-off-by: Davide Grohmann <davide.grohmann at arm.com>
Commit: 543ec358dd1ad361edaccba3dfef61236f2788c4
https://github.com/llvm/llvm-project/commit/543ec358dd1ad361edaccba3dfef61236f2788c4
Author: Lang Hames <lhames at gmail.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M orc-rt/include/orc-rt/Session.h
M orc-rt/lib/executor/Session.cpp
M orc-rt/unittests/SessionTest.cpp
Log Message:
-----------
[orc-rt] Add managed-code-calls TaskGroup. (#190740)
Adds a ManagedCodeCallsGroup TaskGroup to Session, and updates the
shutdown sequence to wait until all calls into managed code have
completed before proceeding to shut down the Session's Services and the
Session itself.
To support safe calls into managed code two new helper template methods
are added:
callManagedCodeSync attempts to acquire a TaskGroup::Token for the
ManagedCodeCallsGroup before calling the given function and returning
its result.
callManagedCodeAsync attempts to acquire a TaskGroup::Token for the
ManagedCodeCallsGroup before calling the given async function. The
wrapped Return call for the async function will carry the acquired
Token, ensuring that shutdown waits for the async Return call to be
destroyed (whether or not it's actually called).
Commit: 6d3d88f74c405db660a20103905787fc67087287
https://github.com/llvm/llvm-project/commit/6d3d88f74c405db660a20103905787fc67087287
Author: Petar Avramovic <Petar.Avramovic at amd.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/GCNVOPDUtils.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-short-clamp.ll
M llvm/test/CodeGen/AMDGPU/fcopysign.f16.ll
M llvm/test/CodeGen/AMDGPU/fmed3.bf16.ll
M llvm/test/CodeGen/AMDGPU/fmed3.ll
M llvm/test/CodeGen/AMDGPU/fold-int-pow2-with-fmul-or-fdiv.ll
M llvm/test/CodeGen/AMDGPU/frem.ll
M llvm/test/CodeGen/AMDGPU/llvm.maximum.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.maximum.f32.ll
M llvm/test/CodeGen/AMDGPU/llvm.minimum.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.minimum.f32.ll
M llvm/test/CodeGen/AMDGPU/uniform-vgpr-to-sgpr-return.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-fmaximum.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-fminimum.ll
Log Message:
-----------
AMDGPU: Use SmallSet for VOPD scalar reg tracking (#190650)
Use SmallSet instead of SmallVector for UniqueScalarRegs.
VCC_LO was pushed without uniqueness check, so when both
components used VCC implicitly it was counted twice,
rejecting valid VOPD pairings.
Co-Authored-By: Claude Opus 4.6 <noreply at anthropic.com>
Commit: 211b88b64b0e409a2e294a1fe444b305aa94a2a6
https://github.com/llvm/llvm-project/commit/211b88b64b0e409a2e294a1fe444b305aa94a2a6
Author: Oleksandr Tarasiuk <oleksandr.tarasiuk at outlook.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Parse/Parser.h
M clang/lib/Parse/ParseDecl.cpp
M clang/lib/Parse/ParseObjc.cpp
M clang/lib/Sema/DeclSpec.cpp
M clang/test/CXX/dcl.dcl/dcl.spec/dcl.type/dcl.spec.auto/p3-generic-lambda-1y.cpp
M clang/test/Parser/c2x-auto.c
M clang/test/Sema/c2x-auto.c
M clang/test/Sema/constexpr.c
M clang/test/SemaCXX/auto-cxx0x.cpp
Log Message:
-----------
[Clang] prevent incorrect rejection of auto with reordered declaration specifiers in C23 (#177865)
Fixes #164121
---
This patch addresses the issue where `auto` was incorrectly rejected
with reordered declaration specifiers in C23.
Commit: f40c234191802154d5b3fc3209908c3f2d6e1649
https://github.com/llvm/llvm-project/commit/f40c234191802154d5b3fc3209908c3f2d6e1649
Author: Donát Nagy <donat.nagy at ericsson.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M clang/include/clang/Analysis/AnalysisDeclContext.h
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/CallEvent.h
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/Environment.h
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/ProgramState.h
M clang/lib/Analysis/AnalysisDeclContext.cpp
M clang/lib/StaticAnalyzer/Checkers/UninitializedObject/UninitializedObjectChecker.cpp
M clang/lib/StaticAnalyzer/Core/BugReporter.cpp
M clang/lib/StaticAnalyzer/Core/CallEvent.cpp
M clang/lib/StaticAnalyzer/Core/Environment.cpp
M clang/lib/StaticAnalyzer/Core/ExprEngine.cpp
M clang/lib/StaticAnalyzer/Core/ExprEngineCXX.cpp
M clang/lib/StaticAnalyzer/Core/ExprEngineCallAndReturn.cpp
M clang/lib/StaticAnalyzer/Core/MemRegion.cpp
M clang/lib/StaticAnalyzer/Core/ProgramState.cpp
Log Message:
-----------
[NFC][analyzer] Spread use of 'Expr*' instead of 'Stmt*' (#188319)
When I was browsing the codebase, I was surprised to see that the first
parameter of `ProgramStateRef::BindExpr` was `const Stmt*` instead of
`const Expr*`. As I surveyed calls to `BindExpr`, I realized that
fortunately no code passes non-expression statements to `BindExpr`
(anymore... it seems that earlier we had such hacks) so in this commit
I'm able to change the type of the first parameter to `const Expr*`.
There was a call to `BindExpr` where the first argument was the value of
the data member `StackFrameContext::CallSite`, so I also changed the
type of that member from `const Stmt*` to `const Expr*` because it was
another statement pointer that always pointed to expressions (or null).
This commit prepares the ground for using `Expr*` instead of `Stmt*` in
`EnvironmentEntry`, which is currently a `pair<const Stmt *, const
StackFrameContext *>` and will be updated in follow-up commits.
This commit also includes minor unrelated simplifications and
corrections.
Commit: a6fda587390b6d3bbf00df22a22881561727e9f9
https://github.com/llvm/llvm-project/commit/a6fda587390b6d3bbf00df22a22881561727e9f9
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M libc/shared/rpc.h
Log Message:
-----------
[libc] Fix ordering to make sure event_id is written before interrupt (#190705)
Summary:
Right now this meant we could avoid flushing the event_id write before
firing the interrupt, so it could be unset.
Commit: 64ac9da3b382bff37445cf7c1ffc557f5302fe6a
https://github.com/llvm/llvm-project/commit/64ac9da3b382bff37445cf7c1ffc557f5302fe6a
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M libc/shared/CMakeLists.txt
M libc/shared/rpc.h
M libc/shared/rpc_server.h
R libc/src/__support/RPC/rpc_server.h
M libc/src/__support/arg_list.h
M libc/test/integration/src/stdio/gpu/printf_test.cpp
M libc/test/shared/CMakeLists.txt
M offload/plugins-nextgen/common/src/RPC.cpp
Log Message:
-----------
[libc] Make rpc_server.h independent from libc internals (#190423)
Summary:
It was very convenient to have the RPC server use the internal libc
printing utilities, but it caused a lot of problems. The LLVM libc
internals were never meant to be included arbitrarily and we completely
bypassed this restriction. Furthermore it prevented us from installing
and using these libraries in other contexts. There was a whole host of
hacks around this, leading to endless PPC problems, compiler errors,
etc.
This PR re-uses the old minified format parser I used to use for the GPU
case. We simply parse the formats to get the size, then copy the
strings. The actual printing instead is done by locking the output file
and repeatedly building up the string using the host's `printf`. Slight
test modifications because we no longer can depend on the specific user
printf specification, it may not handle null or binary values for
example.
Commit: 46bef90e9c60ccc79d3fefa881270ac53a88226f
https://github.com/llvm/llvm-project/commit/46bef90e9c60ccc79d3fefa881270ac53a88226f
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M compiler-rt/CMakeLists.txt
M compiler-rt/cmake/Modules/AddCompilerRT.cmake
M compiler-rt/cmake/Modules/AllSupportedArchDefs.cmake
M compiler-rt/cmake/caches/AMDGPU.cmake
M compiler-rt/cmake/config-ix.cmake
M compiler-rt/lib/sanitizer_common/sanitizer_platform.h
M compiler-rt/lib/ubsan_minimal/ubsan_minimal_handlers.cpp
M compiler-rt/test/ubsan_minimal/CMakeLists.txt
M compiler-rt/test/ubsan_minimal/TestCases/local_bounds.cpp
Log Message:
-----------
[compiler-rt] Enable minimal ubsan for GPU targets (#188289)
Summary:
This PR enabled the ubsan-minimal target for the GPU. This should enable
the trivial checks on the GPU-side. I had to make some changes to the
common sanitizer requirements, but I think this is reasonable
considering the common_sanitizer requires a fully hosted environment and
all we needed were the headers.
Commit: 90b9ad74904b8480009d96525779e6c4bbae2ec0
https://github.com/llvm/llvm-project/commit/90b9ad74904b8480009d96525779e6c4bbae2ec0
Author: Jiahao Guo <eoonguo at gmail.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp
M clang/lib/CIR/CodeGen/CIRGenTypes.cpp
M clang/test/CodeGen/AArch64/fp8-intrinsics/acle_neon_fp8_untyped.c
M clang/test/CodeGen/AArch64/neon-intrinsics.c
M clang/test/CodeGen/AArch64/neon/intrinsics.c
M clang/test/CodeGen/AArch64/poly64.c
Log Message:
-----------
[CIR][AArch64] Lower NEON vbsl builtins (#188449)
Part of : https://github.com/llvm/llvm-project/issues/185382
Add CIR lowering for the AArch64 NEON bitwise-select builtins.
Lower the NEON bitwise-select builtins to CIR bitwise operations
implementing the ACLE bitwise-select semantics, including the
floating-point forms.Also add CIR support for `mfloat8` NEON vector
types so `vbsl_mf8` and `vbslq_mf8` lower successfully instead of
hitting the existing NYI in type conversion.
Move and extend the corresponding FileCheck coverage in
`clang/test/CodeGen/AArch64/neon/intrinsics.c`.
Commit: 4d84263b341c3ee1847081c50e1541b62fbcb08c
https://github.com/llvm/llvm-project/commit/4d84263b341c3ee1847081c50e1541b62fbcb08c
Author: Cullen Rhodes <cullen.rhodes at arm.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
Log Message:
-----------
[AArch64][GISel] Skip SME call-attr checks on non-SME targets (#190135)
`fallBackToDAGISel` was constructing `SMECallAttrs` for every call even
when the subtarget had no SME/SME2 support. This shows up in
compile-time profiles without ever triggering a fallback.
https://llvm-compile-time-tracker.com/compare.php?from=ed44820f722aae43f1f00bb3e201300966716973&to=ba75f8fe1f0e44f7456dd282e066b6d6e781ada3&stat=instructions%3Au
Commit: fe1aa0f04a043aa83725ea4fe2e63f639995b52a
https://github.com/llvm/llvm-project/commit/fe1aa0f04a043aa83725ea4fe2e63f639995b52a
Author: Aly ElAshram <71949028+AlyElashram at users.noreply.github.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
A llvm/test/CodeGen/AArch64/neon-mul-shl.ll
Log Message:
-----------
[AArch64] Optimize vector multiplications by certain constants for v2i64 (#183827)
## Summary
This patch optimizes v2i64 multiplications by constants that can be
decomposed into a single shift and an addition/subtraction (i.e.,
constants of the form $2^n \pm 1$).
Unlike 32-bit or 16-bit vectors, AArch64 Advanced SIMD (NEON) lacks a
native v2i64 multiply instruction.
Currently, the compiler scalarizes these operations, By lowering these
specific cases to shl + add/sub, we keep the entire operation within the
SIMD unit, significantly reducing instruction count and execution
latency.
## Technical Details
- Target: AArch64 (With Neon Enabled)
- Transformation: Replaces (mul x, splat(2^n + 1)) with (add (shl x, n),
x) and (mul x, splat(2^n - 1)) with (sub (shl x, n), x).
- Placement: Integrated into performMulCombine in
AArch64ISelLowering.cpp as a targeted gate for v2i64 vector types only
(for now).
Reference Issue : https://github.com/llvm/llvm-project/issues/54651
Fixes : https://github.com/llvm/llvm-project/issues/176985
Commit: 464647891a2fe16b944a8486510ca5b763a3b448
https://github.com/llvm/llvm-project/commit/464647891a2fe16b944a8486510ca5b763a3b448
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
M llvm/test/CodeGen/AMDGPU/lshl64-to-32.ll
M llvm/test/CodeGen/AMDGPU/narrow_math_for_and.ll
M llvm/test/CodeGen/AMDGPU/reassoc-mul-add-1-to-mad.ll
Log Message:
-----------
[AMDGPU] computeKnownBitsForTargetNode - convert AMDGPUISD::MUL_U24/MUL_I24 handling to use KnownBits::mul (#190600)
Remove custom implementation and rely on KnownBits::mul directly
Commit: e633189784212a568f712f474232f7672fb6d7c7
https://github.com/llvm/llvm-project/commit/e633189784212a568f712f474232f7672fb6d7c7
Author: David Green <david.green at arm.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
M llvm/test/CodeGen/AArch64/ctpop.ll
Log Message:
-----------
[AArch64][GISel] Add widenScalarOrEltToNextPow2OrMinSize for small element vector CTPOP (#189397)
This widens small ctpop to at least i8, preventing types like v8i4 from
falling back.
Commit: c1f295559ae442208df55ca28dcf94c47c8b5752
https://github.com/llvm/llvm-project/commit/c1f295559ae442208df55ca28dcf94c47c8b5752
Author: Owen Anderson <resistor at mac.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M clang/test/Driver/print-supported-extensions-riscv.c
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/test/CodeGen/RISCV/features-info.ll
M llvm/unittests/TargetParser/RISCVISAInfoTest.cpp
Log Message:
-----------
[CHERIoT] Define a RISCV target feature for XCheriot. (#189968)
The specification for this extension is publically available here:
https://github.com/CHERIoT-Platform/cheriot-sail/releases/download/v1.0/cheriot-architecture-v1.0.pdf
This change only adds the target feature, without adding any
functionality gated by it yet. This change is intended to enable
DataLayout-related changes in TargetParser, which depend on RISCVISAInfo
being able at least to recognize the name of this extension.
Commit: 4aeefffd2b4648c1edb05318b71b15c7b07d7620
https://github.com/llvm/llvm-project/commit/4aeefffd2b4648c1edb05318b71b15c7b07d7620
Author: Max Graey <maxgraey at gmail.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M llvm/include/llvm/CodeGen/FunctionLoweringInfo.h
M llvm/include/llvm/Support/KnownBits.h
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
Log Message:
-----------
[KnownBits] Mark constructor for KnownBits as explicit (#190253)
To avoid confusion between constant values and bit widths.
Commit: 80853955c43a86bf4d41e0cae0c829dfd38af44c
https://github.com/llvm/llvm-project/commit/80853955c43a86bf4d41e0cae0c829dfd38af44c
Author: Haojian Wu <hokein.wu at gmail.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M clang/docs/ReleaseNotes.rst
Log Message:
-----------
Add a missing release note for the fix #188239 (#190782)
Commit: bb7e19a23ea1db818702853a538a20ba49fad0f6
https://github.com/llvm/llvm-project/commit/bb7e19a23ea1db818702853a538a20ba49fad0f6
Author: Tim Gymnich <tim at gymni.ch>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
M llvm/test/CodeGen/AMDGPU/fmed3.ll
Log Message:
-----------
[GISel] Fix inverted NaN check in lowerFMinimumMaximum (#190704)
The condition for NaN propagation was using `isKnownNeverNaN(Src1)`
instead of `!isKnownNeverNaN(Src1)`, causing NaN propagation to be
skipped when Src1 might be NaN and incorrectly triggered when Src1 was
known non-NaN.
Update fmed3.ll test checks to reflect correct codegen.
Commit: 43360ebd5129fde6a89a99e11bf0edca2fbfcf72
https://github.com/llvm/llvm-project/commit/43360ebd5129fde6a89a99e11bf0edca2fbfcf72
Author: Alexis Engelke <engelke at in.tum.de>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M llvm/include/llvm/Analysis/BlockFrequencyInfoImpl.h
A llvm/test/Transforms/CodeGenPrepare/X86/verify-bfi-updates.ll
Log Message:
-----------
[Analysis] Fix BFI verify accessing deleted blocks (#190780)
The BFI verifier should ignore basic blocks that got deleted (=number is
still allocated but there is no corresponding block in the function)
since the analysis was first created.
Fixup of #190669.
Commit: 3dcdaf8b160441919b51811ec6c395b6595744fa
https://github.com/llvm/llvm-project/commit/3dcdaf8b160441919b51811ec6c395b6595744fa
Author: Tim Gymnich <tim at gymni.ch>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M llvm/include/llvm/Target/GlobalISel/Combine.td
M llvm/lib/CodeGen/GlobalISel/Utils.cpp
M llvm/test/CodeGen/AArch64/GlobalISel/postlegalizer-combiner-constant-fold.mir
Log Message:
-----------
[GISel] Extend ConstantFoldFPBinOp with fminimumnum, fmaximumnum (#190561)
- Add constant folding for G_FMINIMUMNUM and G_FMAXIMUMNUM using the
minimumnum/maximumnum APFloat helpers.
---------
Co-authored-by: Claude Sonnet 4.6 <noreply at anthropic.com>
Commit: 0e4f9ce0450cea43828a08bf4fcf8ca286a67c75
https://github.com/llvm/llvm-project/commit/0e4f9ce0450cea43828a08bf4fcf8ca286a67c75
Author: Sirui Mu <msrlancern at gmail.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/lib/CIR/CodeGen/CIRGenAtomic.cpp
M clang/test/CIR/CodeGen/atomic-scoped.c
Log Message:
-----------
[CIR] Add support for dynamic atomic sync scope (#189699)
This patch adds support for dynamic atomic sync scope values. It emits a
switch statement to handle different possible sync scope values at
runtime.
Assisted-by: GitHub Copilot / Claude Opus 4.6
Commit: 90f326ef7385f8805616d79183bae172880becb0
https://github.com/llvm/llvm-project/commit/90f326ef7385f8805616d79183bae172880becb0
Author: Lang Hames <lhames at gmail.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M orc-rt/docs/Design.md
M orc-rt/include/orc-rt/Service.h
M orc-rt/include/orc-rt/Session.h
Log Message:
-----------
[orc-rt] Update Session shutdown sequence docs / comments. (#190783)
Clarify Session lifecycle contract docs across Service.h, Session.h, and
Design.md, and update to reflect the introduction of the
ManagedCallsTaskGroup (543ec358dd1).
Commit: 038261fa44ced36d05df146451c4db75766bf0fd
https://github.com/llvm/llvm-project/commit/038261fa44ced36d05df146451c4db75766bf0fd
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M flang/lib/Semantics/openmp-utils.cpp
M flang/unittests/CMakeLists.txt
A flang/unittests/Semantics/CMakeLists.txt
A flang/unittests/Semantics/OpenMPUtils.cpp
Log Message:
-----------
[flang][OpenMP] Fix subtle bug in GetAffectedNestDepthWithReason (#190645)
For constructs that allow COLLAPSE or ORDERED clauses, the function
would return an empty value for the affected depth if none of these
clauses were actually present. What should happen is that the return
value should be 1 without a specific reason.
This bug was not detectable with any source program, since the empty
value caused depth checks to be skipped. Detecting the problem would
require a loop nest with a lower depth than needed that the bug would
cause not to be diagnosed. Since the correct value was 1, such a loop
would need to have a depth of 0 and such a nest cannot be constructed.
Issue: https://github.com/llvm/llvm-project/issues/185287
Commit: bd90922f42d8001f36f86a5c4ca5376fb1da0d6b
https://github.com/llvm/llvm-project/commit/bd90922f42d8001f36f86a5c4ca5376fb1da0d6b
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M flang/include/flang/Semantics/openmp-utils.h
M flang/lib/Semantics/check-omp-atomic.cpp
M flang/lib/Semantics/check-omp-structure.cpp
Log Message:
-----------
[flang][OpenMP] Introduce WithSource<T> to couple T with source location (#190646)
The need for that has already happened once with SourcedActionStmt, and
will happen again in upcoming PRs.
Issue: https://github.com/llvm/llvm-project/issues/185287
Commit: 5620a92147a62c40c31c2fb8e8af340737956d15
https://github.com/llvm/llvm-project/commit/5620a92147a62c40c31c2fb8e8af340737956d15
Author: Charles Zablit <c_zablit at apple.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M llvm/utils/lit/lit/ProgressBar.py
Log Message:
-----------
[lit] cross platform progress bar (#189970)
Commit: 47d457b040d52d6df1f86c238e6b3d4b97b46b9b
https://github.com/llvm/llvm-project/commit/47d457b040d52d6df1f86c238e6b3d4b97b46b9b
Author: Erich Keane <ekeane at nvidia.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenExpr.cpp
A clang/test/CIR/CodeGen/mem-expr-fn.cpp
Log Message:
-----------
[CIR] Implement lowering for member-expr of function decl type (#190655)
This patch ends up being pretty trivial to reproduce, and the
implementation is just to call an already implemented function, however
this shows up a few times in various test suites. So I've implemented
it.
Commit: b9e9e7bc5c6083acb32b131be0f61df7dc2274f0
https://github.com/llvm/llvm-project/commit/b9e9e7bc5c6083acb32b131be0f61df7dc2274f0
Author: Erich Keane <ekeane at nvidia.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenExprAggregate.cpp
A clang/test/CIR/CodeGen/agg-init-constexpr.cpp
Log Message:
-----------
[CIR] Implement aggregate-expr-init with a const-expr lowering (#190631)
An aggregate initialized by a ConstantExpr happens when you have a
consteval constructor. This patch implements this lowering.
There is a bit of a difference in decisions between classic-codegen and
cir lowering, where classic-codegen will do init-via-GEP, whereas CIR
does either a struct-store, or a memcpy, otherwise these seem identical.
There IS a branch (if emitting a constant-expr fails) that appears dead
to the best of my knowledge, but since classic-codegen does it, I left
the version there. It is at most a pessimisation of the constant-emit
(just emitting the expression), so it shouldn't cause problems.
Commit: 93b04091aa38b8d5e6429b58b68ccf9c39f091cc
https://github.com/llvm/llvm-project/commit/93b04091aa38b8d5e6429b58b68ccf9c39f091cc
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M llvm/lib/Target/SPIRV/MCTargetDesc/SPIRVInstPrinter.cpp
M llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_memory_access_aliasing/alias-load-store-atomic.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_memory_access_aliasing/alias-masked-load-store.ll
Log Message:
-----------
[SPIR-V] Use OpDecorateId instead of OpDecorate for memory aliasing decorations (#190731)
AliasScopeINTEL and NoAliasINTEL decorations take ID operands, so they
must use OpDecorateId rather than OpDecorate per the SPIR-V spec
related to #190736
Commit: e61fc8c602c76d2d35e26a51195784d02613e2f9
https://github.com/llvm/llvm-project/commit/e61fc8c602c76d2d35e26a51195784d02613e2f9
Author: Iliyan Georgiev <Iliyan.Georgiev at arm.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M mlir/include/mlir/Dialect/Tosa/IR/TosaComplianceData.h.inc
M mlir/include/mlir/Dialect/Tosa/IR/TosaOpBase.td
M mlir/include/mlir/Dialect/Tosa/IR/TosaOps.td
M mlir/lib/Dialect/Tosa/IR/TosaOps.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaProfileCompliance.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaValidation.cpp
M mlir/test/Dialect/Tosa/availability.mlir
M mlir/test/Dialect/Tosa/dynamic_extension.mlir
M mlir/test/Dialect/Tosa/invalid.mlir
M mlir/test/Dialect/Tosa/invalid_extension.mlir
M mlir/test/Dialect/Tosa/level_check.mlir
M mlir/test/Dialect/Tosa/ops.mlir
M mlir/test/Dialect/Tosa/profile_pro_fp_unsupported.mlir
M mlir/test/Dialect/Tosa/profile_pro_int_unsupported.mlir
M mlir/test/Dialect/Tosa/tosa-infer-shapes.mlir
M mlir/test/Dialect/Tosa/tosa-validation-version-1p0-invalid.mlir
A mlir/test/Dialect/Tosa/tosa-validation-version-1p1-invalid.mlir
Log Message:
-----------
[mlir][tosa] Add TOSA Avg Pool 2D Adaptive (#190200)
Implements:
- Operator definition
- Operator verifier
- InferType implementation
- Validation
- Tests
Signed-off-by: Deeptanshu Sekhri <deeptanshu.sekhri at arm.com>
Co-authored-by: Iliyan Georgiev <iliyan.georgiev at arm.com>
Co-authored-by: Deeptanshu Sekhri <deeptanshu.sekhri at arm.com>
Commit: 5a0ef1f63151b03a2ef0269464f331fa2db806f8
https://github.com/llvm/llvm-project/commit/5a0ef1f63151b03a2ef0269464f331fa2db806f8
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M flang/include/flang/Semantics/openmp-utils.h
M flang/lib/Semantics/openmp-utils.cpp
Log Message:
-----------
[flang][OpenMP] Introduce `semantics::omp::LoopControl` (#190647)
This structure will contain the symbol for the iteration variable, the
lower and upper bounds, and the increment if present in the form of
evaluate::Expr. A source construct (such as DO CONCURRENT) may have
several iteration variables, each with its own bounds and increment,
represented by a list of LoopControl structures.
For loop-transformation constructs that produce additional loops the
current code returns an empty list of LoopControls, but it may be
extended in the future to represent the yet-nonexistent loops for more
accurate semantic analysis.
The code introduced in this PR is not executed yet, but will be used in
an upcoming PR.
Issue: https://github.com/llvm/llvm-project/issues/185287
---------
Co-authored-by: Michael Kruse <llvm-project at meinersbur.de>
Commit: e223cbd2fc24f25830bee023044f32d144f3a5b2
https://github.com/llvm/llvm-project/commit/e223cbd2fc24f25830bee023044f32d144f3a5b2
Author: Erich Keane <ekeane at nvidia.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenException.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
A clang/test/CIR/CodeGen/ctor-try-body.cpp
Log Message:
-----------
[CIR] Implement constructor 'try-body' lowering (#190613)
C++ supports the ability to have the 'body' of a constructor be a 'try'
block. The effect of this is that base construction and initializers are
also within the same try/catch chain. This patch implements this
lowering.
Classic codegen does this by just emitting the 'begin' and 'end' try as
their own functions, then can emit the body separately between calls.
However, CIR doesn't really afford us that ability, so this patch
extracts a function that takes a callback object that is used to emit
the function body. This allows us to do a simple 'emitStmt' in the
normal cases, plus a `emitCtorPrologue` followed by `emitStmt` in the
try-body case.
Commit: ecffdc1dba6877c26eef00545f7a0ca04c392132
https://github.com/llvm/llvm-project/commit/ecffdc1dba6877c26eef00545f7a0ca04c392132
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M offload/plugins-nextgen/amdgpu/src/rtl.cpp
Log Message:
-----------
[Offload] Fix trailing '\0' in ISA name (#190791)
Summary:
Recent changes broke this handling by creating a string-ref that
included the null byte. This made the StringRef compare for the
environemtn ISA with the user ISA fail trivially due to mismatching
sizes.
Commit: 43f7050a814ee2ba952ee2e02ace74da03f2b251
https://github.com/llvm/llvm-project/commit/43f7050a814ee2ba952ee2e02ace74da03f2b251
Author: Eugene Epshteyn <eepshteyn at nvidia.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M flang/docs/F202X.md
Log Message:
-----------
[flang] Added a note about Fortran 202X (F202X) (#190627)
Fortran 202X should no longer be used to refer to Fortran 2023 standard.
Commit: 679828edbfeaabdef5b646bf2fa0cf2c120e9080
https://github.com/llvm/llvm-project/commit/679828edbfeaabdef5b646bf2fa0cf2c120e9080
Author: Srividya Sundaram <srividya.sundaram at intel.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M clang/include/clang/Driver/SyclInstallationDetector.h
M clang/lib/Driver/ToolChains/Linux.cpp
M clang/lib/Driver/ToolChains/SYCL.cpp
R clang/test/Driver/Inputs/SYCL/libLLVMSYCL.ll
A clang/test/Driver/Inputs/SYCL/libsycl.ll
M clang/test/Driver/link-device-code.test
M clang/test/Driver/sycl-offload-jit.cpp
Log Message:
-----------
Revert "[Driver] Update SYCL runtime library name and path for target-specific directories" (#190715)
Reverts llvm/llvm-project#189053
Needs to go together with
https://github.com/llvm/llvm-project/pull/188770/
Commit: 116b045b1e2bff462afff0dc0b06218e6074f427
https://github.com/llvm/llvm-project/commit/116b045b1e2bff462afff0dc0b06218e6074f427
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M lldb/include/lldb/DataFormatters/FormattersContainer.h
M lldb/include/lldb/DataFormatters/TypeSynthetic.h
M lldb/include/lldb/Utility/ConstString.h
M lldb/source/API/SBAttachInfo.cpp
M lldb/source/API/SBCommandInterpreter.cpp
M lldb/source/API/SBCommunication.cpp
M lldb/source/API/SBDebugger.cpp
M lldb/source/API/SBEvent.cpp
M lldb/source/API/SBFileSpec.cpp
M lldb/source/API/SBFunction.cpp
M lldb/source/API/SBLanguageRuntime.cpp
M lldb/source/API/SBLaunchInfo.cpp
M lldb/source/API/SBMemoryRegionInfo.cpp
M lldb/source/API/SBModule.cpp
M lldb/source/API/SBPlatform.cpp
M lldb/source/API/SBProcess.cpp
M lldb/source/API/SBSymbol.cpp
M lldb/source/API/SBTarget.cpp
M lldb/source/API/SBThread.cpp
M lldb/source/API/SBValue.cpp
M lldb/source/API/SBWatchpoint.cpp
M lldb/source/Breakpoint/BreakpointResolverFileRegex.cpp
M lldb/source/Commands/CommandObjectFrame.cpp
M lldb/source/Commands/CommandObjectSource.cpp
M lldb/source/Commands/CommandObjectTarget.cpp
M lldb/source/Commands/CommandObjectType.cpp
M lldb/source/Core/AddressRange.cpp
M lldb/source/Core/Debugger.cpp
M lldb/source/Core/Disassembler.cpp
M lldb/source/Core/FormatEntity.cpp
M lldb/source/Core/IOHandlerCursesGUI.cpp
M lldb/source/Core/Mangled.cpp
M lldb/source/Core/Module.cpp
M lldb/source/Core/Section.cpp
M lldb/source/Core/SourceManager.cpp
M lldb/source/DataFormatters/FormatManager.cpp
M lldb/source/DataFormatters/ValueObjectPrinter.cpp
M lldb/source/Expression/IRExecutionUnit.cpp
M lldb/source/Expression/Materializer.cpp
M lldb/source/Plugins/DynamicLoader/Darwin-Kernel/DynamicLoaderDarwinKernel.cpp
M lldb/source/Plugins/DynamicLoader/POSIX-DYLD/DynamicLoaderPOSIXDYLD.cpp
M lldb/source/Plugins/ExpressionParser/Clang/ClangASTSource.cpp
M lldb/source/Plugins/ExpressionParser/Clang/ClangExpressionParser.cpp
M lldb/source/Plugins/ExpressionParser/Clang/ClangExpressionSourceCode.cpp
M lldb/source/Plugins/ExpressionParser/Clang/ClangModulesDeclVendor.cpp
M lldb/source/Plugins/Language/CPlusPlus/BlockPointer.cpp
M lldb/source/Plugins/Language/CPlusPlus/CPlusPlusLanguage.cpp
M lldb/source/Plugins/Language/CPlusPlus/LibCxxVector.cpp
M lldb/source/Plugins/Language/CPlusPlus/MsvcStlVector.cpp
M lldb/source/Plugins/LanguageRuntime/CPlusPlus/ItaniumABIRuntime.cpp
M lldb/source/Plugins/LanguageRuntime/ObjC/AppleObjCRuntime/AppleObjCDeclVendor.cpp
M lldb/source/Plugins/LanguageRuntime/ObjC/AppleObjCRuntime/AppleObjCRuntimeV1.cpp
M lldb/source/Plugins/LanguageRuntime/ObjC/AppleObjCRuntime/AppleObjCRuntimeV2.cpp
M lldb/source/Plugins/LanguageRuntime/ObjC/AppleObjCRuntime/AppleObjCTrampolineHandler.cpp
M lldb/source/Plugins/LanguageRuntime/ObjC/ObjCLanguageRuntime.h
M lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp
M lldb/source/Plugins/ObjectFile/JSON/ObjectFileJSON.cpp
M lldb/source/Plugins/ObjectFile/Mach-O/ObjectFileMachO.cpp
M lldb/source/Plugins/ObjectFile/PECOFF/ObjectFilePECOFF.cpp
M lldb/source/Plugins/Platform/MacOSX/PlatformDarwinDevice.cpp
M lldb/source/Plugins/Process/Linux/NativeProcessLinux.cpp
M lldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.cpp
M lldb/source/Plugins/Process/mach-core/RegisterContextUnifiedCore.cpp
M lldb/source/Plugins/Process/scripted/ScriptedFrame.cpp
M lldb/source/Plugins/Process/scripted/ScriptedThread.cpp
M lldb/source/Plugins/SymbolFile/CTF/SymbolFileCTF.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.cpp
M lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARFDebugMap.cpp
M lldb/source/Plugins/SymbolFile/PDB/SymbolFilePDB.cpp
M lldb/source/Plugins/SymbolFile/Symtab/SymbolFileSymtab.cpp
M lldb/source/Plugins/SystemRuntime/MacOSX/SystemRuntimeMacOSX.cpp
M lldb/source/Plugins/UnwindAssembly/x86/x86AssemblyInspectionEngine.cpp
M lldb/source/Symbol/SymbolContext.cpp
M lldb/source/Symbol/Symtab.cpp
M lldb/source/Symbol/Type.cpp
M lldb/source/Symbol/Variable.cpp
M lldb/source/Target/DynamicRegisterInfo.cpp
M lldb/source/Target/ModuleCache.cpp
M lldb/source/Target/Process.cpp
M lldb/source/Target/RegisterContextUnwind.cpp
M lldb/source/Target/SectionLoadList.cpp
M lldb/source/Target/StackFrame.cpp
M lldb/source/Target/Target.cpp
M lldb/source/Target/Thread.cpp
M lldb/source/Target/ThreadPlanStepInRange.cpp
M lldb/source/Target/ThreadPlanStepOverRange.cpp
M lldb/source/Target/TraceDumper.cpp
M lldb/source/ValueObject/ValueObject.cpp
M lldb/source/ValueObject/ValueObjectSynthetic.cpp
M lldb/unittests/Utility/ConstStringTest.cpp
Log Message:
-----------
[lldb] Make argument to ConstString::AsCString explicit (#190183)
This patch makes the default parameter to ConstString::AsCString
explicit. Currently it defaults to `nullptr`. However, there a bunch of
callsites that do `printf("%s", foo.AsCString())`, which is UB (I have
at least 1 crash on me where this was the root cause).
Alternatively we could change the default to `""` instead of `nullptr`,
but code that did `if (foo.AsCString())` would then change meaning.
Command I ran to generate this patch:
```
rg "\.AsCString\(\)" lldb -l | xargs sed -i '' 's/\.AsCString()/.AsCString(nullptr)/g'
```
There's also a commonly used `Status::AsCString` with a default
parameter. So I added a temporary:
```
const char *AsCString(std::nullptr_t) const = delete;
```
overload to `Status`, and fixed all the compile errors.
In a follow-up PR I intend to change the callsites that do `printf("%s",
foo.AsCString(nullptr)` to pass `""` as the fallback parameter. Another
dangrous pattern is `std::string(error.AsCString(nullptr))`
rdar://171219173
Commit: e03b73138ec62cae8f6ecbe960b67bc6fa1ab9b7
https://github.com/llvm/llvm-project/commit/e03b73138ec62cae8f6ecbe960b67bc6fa1ab9b7
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M lldb/include/lldb/Target/Platform.h
M lldb/include/lldb/Target/Target.h
M lldb/source/Plugins/Platform/MacOSX/PlatformDarwin.cpp
M lldb/source/Target/Platform.cpp
M lldb/source/Target/Target.cpp
M lldb/source/Target/TargetProperties.td
A lldb/test/Shell/Platform/AutoLoad/Darwin/dsym-auto-load-modules-false.test
A lldb/test/Shell/Platform/AutoLoad/Darwin/dsym-auto-load-modules-multiple.test
A lldb/test/Shell/Platform/AutoLoad/Darwin/dsym-auto-load-modules-not-in-dict.test
A lldb/test/Shell/Platform/AutoLoad/Darwin/dsym-auto-load-modules-true.test
A lldb/test/Shell/Platform/AutoLoad/Darwin/dsym-auto-load-modules-warn.test
A lldb/test/Shell/Platform/AutoLoad/UNIX/auto-load-modules-false.test
A lldb/test/Shell/Platform/AutoLoad/UNIX/auto-load-modules-multiple.test
A lldb/test/Shell/Platform/AutoLoad/UNIX/auto-load-modules-not-in-dict.test
A lldb/test/Shell/Platform/AutoLoad/UNIX/auto-load-modules-true.test
A lldb/test/Shell/Platform/AutoLoad/UNIX/auto-load-modules-warn.test
M lldb/unittests/Platform/PlatformDarwinTest.cpp
M lldb/unittests/Platform/PlatformTest.cpp
Log Message:
-----------
[lldb] Add setting to specify (by name) which module's scripting resources can be auto-loaded (#188722)
* Depends on: https://github.com/llvm/llvm-project/pull/189696
This is part of [this
RFC](https://discourse.llvm.org/t/rfc-lldb-moving-libc-data-formatters-out-of-lldb/89591)
which is about turning the libc++ data-formatters into auto-loadable
Python scripts.
Eventually we want the Python data-formatters for `libc++` to be
automatically loaded without requiring user opt-in (since that's how the
builtin formatters have always worked and, in my opinion, we can't
transition to an opt-in model if users have always had the
data-formatters available). To do so we need a way to distinguish which
modules we can *always* auto-load from safe-paths, and which require
`target.load-script-from-symbol-file` to be set to `true`.
This patch adds a setting (`target.auto-load-modules`) that is a
dictionary from module-name to the `LoadScriptFromSymFile` enum,
indicating how the scripts for that module are to be loaded.
Making this a setting also means a user can disable any auto-loading by
clearing it. By default the setting is currently empty. Eventually we'll
want it to contain `libc++.1=true` (and possibly other names which the
`libc++` dylib can commonly have).
**Considerations**:
* I thought about adding an `IsAutoLoadable` API to `FileSpec` and set
it for those that can be auto-loaded. Then we wouldn't have to return
two lists from `LocateExecutableScriptingResources`. I just felt like
`FileSpec` was too high-level of a structure to hold such information so
I opted for the `llvm::SmallDenseMap<FileSpec, LoadScriptFromSymFile>`.
If people favour one approach over the other, I'm happy to reconsider
**AI Usage**:
* Used Claude to generate the unit-test cases and shell tests. Reviewed
and cleaned them up myself.
---------
Co-authored-by: Adrian Prantl <adrian.prantl at gmail.com>
Commit: 2ce48b2691a49e91dc8ecd6dfb7eeb533f77a5c1
https://github.com/llvm/llvm-project/commit/2ce48b2691a49e91dc8ecd6dfb7eeb533f77a5c1
Author: Kacper Doga <doga.kacper at gmail.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M llvm/lib/Analysis/ConstantFolding.cpp
M llvm/test/Transforms/InstCombine/X86/x86-sse4a-inseltpoison.ll
M llvm/test/Transforms/InstCombine/X86/x86-sse4a.ll
M llvm/test/Transforms/InstCombine/cast.ll
M llvm/test/Transforms/InstSimplify/bitcast-vector-fold.ll
M llvm/test/Transforms/SCCP/bitcast-vector-refinement.l.ll
Log Message:
-----------
[ConstantFolding] Fix bitcasting vectors with non-integer ratios (#179640)
For both downcast and upcast this patch introduces support for
bitcasting vectors with non-integer ratios [1, 2]. Also this patch
increases the coherence between casts [3].
1. Fixes a crash on downcast where the ratio is not an integer (e.g., <3
x i32> to <4 x i24>). Previously this led to leading to an incorrect
number of result elements and subsequent crashes in RAUW.
Fixes #179626
2. Fixes a miscompilation on upcast where ratio is not an integer (e.g.,
<4 x i24> to <3 x i32>). Previously this led to wrong result.
Fixes #181195
3. Fix incoherent value emitting between down/up cast
a. When upcasting, emit Poison and Undef not only if the source vector
consists of only one of these values. (e.g., `bitcast <4 x i32> <i32
undef, i32 undef, i32 1, i32 undef> to <2 x i64>` returns `<2 x i64>
<i64 undef, i64 1>`
b. When downcasting, when SrcElt is Poison, handle it as Poison and not
Undef. (e.g., `bitcast <1 x i32> <i32 poison> to <2 x i16>` returns `<2
x i16> poison`
Commit: 668938917493fe05c98d5b725f68dfd17ab8eb2f
https://github.com/llvm/llvm-project/commit/668938917493fe05c98d5b725f68dfd17ab8eb2f
Author: Maryam Moghadas <maryammo at ca.ibm.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M llvm/lib/Target/PowerPC/PPCISelLowering.cpp
M llvm/lib/Target/PowerPC/PPCISelLowering.h
A llvm/test/CodeGen/PowerPC/bitcast-truncate-vec-i1.ll
Log Message:
-----------
[PowerPC] Optimize bitcast(truncate) patterns using vbpermq (#181233)
Use vbpermq and vbpermd to efficiently pack i1 vector bits into scalar
integers, avoiding stack operations during type legalization.
Fixes https://github.com/llvm/llvm-project/issues/171879
Commit: 0b070ab623647c79dfe244f42998a630299cc67a
https://github.com/llvm/llvm-project/commit/0b070ab623647c79dfe244f42998a630299cc67a
Author: Jacques Pienaar <jacques+gh at japienaar.info>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M llvm/include/llvm/Support/LSP/Protocol.h
M llvm/lib/Support/LSP/Protocol.cpp
M mlir/lib/Tools/mlir-lsp-server/LSPServer.cpp
M mlir/lib/Tools/mlir-lsp-server/MLIRServer.cpp
M mlir/lib/Tools/mlir-lsp-server/MLIRServer.h
M mlir/test/mlir-lsp-server/diagnostics.test
A mlir/test/mlir-lsp-server/rooturi_rel_path.test
M mlir/utils/vscode/package.json
Log Message:
-----------
[mlir][lsp] Use rootUri and rootPath for source files (#185479)
When looking up source files, consider the rootUri and rootPath (if set) and filename is non local path.
Commit: 6732640f5f3b2729c245e3b8026637d322c7f31d
https://github.com/llvm/llvm-project/commit/6732640f5f3b2729c245e3b8026637d322c7f31d
Author: Hans Wennborg <hans at hanshq.net>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
A lld/test/COFF/pdb-publics-hashes.s
M llvm/lib/DebugInfo/PDB/Native/GSIStreamBuilder.cpp
Log Message:
-----------
[pdb] Fix public symbol hashing in GSIHashStreamBuilder::finalizeBuckets (#190133)
BulkPublic.Name is not necessarily null terminated, so make sure not to
hash past its actual length.
In practice it would often be null terminated, but in the cases where it
was not, we would compute the wrong hash here, put it in the wrong hash
bucket, preventing debuggers from looking up the symbol by name, causing
issues such as
https://discourse.llvm.org/t/pdb-generated-by-lld-link-doesnt-point-to-correct-entry-point-when-debugged-using-visual-studio/90349
Commit: 292a74fba42d5ca3cdccbe07311054b96c48ae81
https://github.com/llvm/llvm-project/commit/292a74fba42d5ca3cdccbe07311054b96c48ae81
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M flang/include/flang/Semantics/openmp-utils.h
M flang/lib/Semantics/check-omp-loop.cpp
M flang/lib/Semantics/check-omp-structure.h
M flang/lib/Semantics/openmp-utils.cpp
M flang/lib/Semantics/resolve-directives.cpp
M flang/test/Semantics/OpenMP/do22.f90
M flang/test/Semantics/OpenMP/tile06.f90
Log Message:
-----------
[flang][OpenMP] Implement checks for rectangular loops (#190648)
Detect non-rectangular loops, emit diagnostic messages when the
construct requires that the affected loops are rectangular. Delete
similar checks from resolve-directive.cpp.
Issue: https://github.com/llvm/llvm-project/issues/185287
Commit: c146e9fce8b46f2495a57c8ce7696da4da9d2a13
https://github.com/llvm/llvm-project/commit/c146e9fce8b46f2495a57c8ce7696da4da9d2a13
Author: Zile Xiong <xiongzile at bytedance.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
M llvm/test/CodeGen/WebAssembly/simd-bitmask.ll
M llvm/test/CodeGen/WebAssembly/simd-illegal-bitmask.ll
Log Message:
-----------
[WebAssembly] Fix operand order in performBitcastCombine (#190361)
Fix operand order in performBitcastCombine for wide <N x i1> -> iN
bitmask reconstruction.
In performBitcastCombine, when reconstructing i32/i64 bitmask from
multiple v16i1 SetCC results (for N=32 and N=64 cases), the code
incorrectly built SHL nodes with reversed operands:
SHL(16, ReturningInteger) // wrong
SelectionDAG::getNode(ISD::SHL, ...) expects operand 0 to be the value
to shift and operand 1 to be the shift amount.
This produced incorrect DAGs like shl Constant<16>, xxx, leading to
wrong codegen for vector bitmask patterns.
Fixed by swapping the operands:
SHL(ReturningInteger, 16)
Fixes https://github.com/llvm/llvm-project/issues/190358
---------
Co-authored-by: Zile Xiong <xiongzile99 at gmail.com>
Commit: 9a1860c45a915328b392fa1af0bbc75dbe96af7f
https://github.com/llvm/llvm-project/commit/9a1860c45a915328b392fa1af0bbc75dbe96af7f
Author: Rose Hudson <rose.hudson at sony.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/DiagnosticGroups.td
M clang/include/clang/Basic/DiagnosticLexKinds.td
M clang/include/clang/Basic/SourceManager.h
M clang/lib/Lex/PPDirectives.cpp
A clang/test/Lexer/backslash-include-win.c
Log Message:
-----------
[clang][Lex] add -Wnonportable-include-path-separator (#186770)
Emit an warning when #include paths contain backslashes, with a fixit to
convert them all to '/'. This can help users that build only on Windows
to automatically make their #includes more portable. The warning is off
by default due to being noisy and not always desirable.
Commit: 5dc39757e151fb661ceb323ff1b7af43716c5c03
https://github.com/llvm/llvm-project/commit/5dc39757e151fb661ceb323ff1b7af43716c5c03
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M lldb/unittests/Platform/PlatformDarwinTest.cpp
Log Message:
-----------
[lldb][test] PlatformDarwinTest: remove redundant usage of TestingProperties (#190799)
This was failing to compile on Windows bots that built without
assertions:
```
C:\Users\tcwg\llvm-worker\lldb-aarch64-windows\llvm-project\lldb\unittests\Platform\PlatformDarwinTest.cpp
C:\Users\tcwg\llvm-worker\lldb-aarch64-windows\llvm-project\lldb\unittests\Platform\PlatformDarwinTest.cpp(554,3): error: use of undeclared identifier 'TestingProperties'
554 | TestingProperties::GetGlobalTestingProperties().AppendSafeAutoLoadPaths(
| ^
1 error generated.
```
We don't need to set the safe-paths in this particular test, so just
remove it.
Commit: e6c0faf0f16b228a8bada715481ad5ed255dea4d
https://github.com/llvm/llvm-project/commit/e6c0faf0f16b228a8bada715481ad5ed255dea4d
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M lldb/source/Plugins/Platform/MacOSX/PlatformDarwinKernel.cpp
M lldb/source/Plugins/SymbolLocator/DebugSymbols/SymbolLocatorDebugSymbols.cpp
M lldb/unittests/SymbolFile/PDB/SymbolFilePDBTests.cpp
Log Message:
-----------
[lldb][NFC] Adapt missed call-sites to AsCString changes (#190798)
https://github.com/llvm/llvm-project/pull/190183 made the
`ConstString::AsCString` explicit. This patch adjusts some callsites
which now fail to compile but were missed in that PR.
Commit: fa8b3f5f720ba3aee68f8b6b14a424e6b80870b5
https://github.com/llvm/llvm-project/commit/fa8b3f5f720ba3aee68f8b6b14a424e6b80870b5
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.h
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
Log Message:
-----------
[LV] Return best plan directly from selectBestEpiloguePlan (NFC). (#190608)
Change selectEpilogueVectorizationFactor to directly select the best
VPlan and return a clone of it with the VF set to the selected VF.
This this replaces a getPlanFor outside of LVP and makes the interface
more direct and more in line with computeBestVF after
https://github.com/llvm/llvm-project/pull/190385.
PR: https://github.com/llvm/llvm-project/pull/190608
Commit: d630240d4882155371f28458dd3292a9481f8e77
https://github.com/llvm/llvm-project/commit/d630240d4882155371f28458dd3292a9481f8e77
Author: Henry Linjamäki <henry.linjamaki at tuni.fi>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M clang/lib/Driver/ToolChains/HIPSPV.cpp
M clang/test/Driver/hipspv-toolchain.hip
Log Message:
-----------
HIPSPV: a fix for Assertion `isFilename() && "Invalid accessor."' failed (#187655)
AFAICT, this assertion failure was introduced by #181870 and #182930.
These PRs introduced linker options that got passed down to
HIPSPV::Linker which wasn't prepared for any non-file inputs.
Fixed by ignoring non-file arguments.
Commit: b050410cb783026a97d90f75080a6ae6d4472fa1
https://github.com/llvm/llvm-project/commit/b050410cb783026a97d90f75080a6ae6d4472fa1
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M libc/shared/rpc_server.h
Log Message:
-----------
[libc] Fix return code after rewriting GPU printf support (#190797)
Summary:
This just blindly accumulated the return values without checking if they
were errors. printf returns `-1` on failure and fwrite returns the
number successfully written. Because we split these up we need to handle
that correctly.
Commit: 27f52f97d64f19540eb6bc596508c2f4fe7f5db5
https://github.com/llvm/llvm-project/commit/27f52f97d64f19540eb6bc596508c2f4fe7f5db5
Author: Giorgio Marletta <giorgio.marletta at st.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoC.td
A llvm/test/tools/llvm-mca/RISCV/SiFive7/sp-bypass.s
Log Message:
-----------
[llvm-mca][RISC-V] Remove duplicated use of SP from `c.addi4spn` (#189980)
`c.addi4spn` instruction implicitly uses the X2 (SP) register, but in
addition to being present in the Uses list, it is also modeled as an
explicit operand with the SP register class. This duplication causes
missed bypasses in llvm-mca when the instruction needs to read the SP
value written by a previous instruction.
For example, on a `sifive-u74` CPU, the following timeline excerpt
shows that the `c.addi4spn` is issues 2 cycles later than expected by
the GPR bypass:
```
Timeline view:
Index 012345678
[0,0] DeeE . . mv sp, a0
[0,1] . DeeE . addi a1, sp, 12
```
This patch removes SP from the Uses list, relying solely on the
explicit SP operand (as in `c.addi16sp`), which restores the expected
bypass behavior.
A test is added that checks the same scenario for `c.addi16sp` as well,
since a similar issue may also occur there.
Commit: 5358d456895c6ed42ee7ec61848c9925432f1bfe
https://github.com/llvm/llvm-project/commit/5358d456895c6ed42ee7ec61848c9925432f1bfe
Author: Slava Zakharin <szakharin at nvidia.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M flang/lib/Optimizer/Dialect/FIROps.cpp
M flang/test/Transforms/licm.fir
Log Message:
-----------
[flang] Enable speculation of fir.convert with memref<> type. (#190413)
Such `fir.convert`s may appear after FIRToMemref conversion and it would
be good to be able to speculate them.
Commit: dfa1c56358830e6a79a76235b56833dab2ac0b02
https://github.com/llvm/llvm-project/commit/dfa1c56358830e6a79a76235b56833dab2ac0b02
Author: Slava Zakharin <szakharin at nvidia.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M flang/include/flang/Optimizer/Analysis/AliasAnalysis.h
M flang/lib/Optimizer/Analysis/AliasAnalysis.cpp
A flang/test/Analysis/AliasAnalysis/alias-analysis-access-path.fir
A flang/test/Analysis/AliasAnalysis/alias-analysis-derived-type-box-load.fir
M flang/test/Analysis/AliasAnalysis/load-ptr-designate.fir
M flang/test/Analysis/AliasAnalysis/ptr-component.fir
A flang/test/Transforms/tbaa-derived-type-records.fir
Log Message:
-----------
[flang] Disambiguate derived component accesses in AliasAnalysis. (#189516)
This change introduces an AccessPath representation inside the
AliasAnalysis
Source object that tracks the sequence of named component accesses
and pointer/allocatable dereferences from the root variable to the
queried
memory location. The access path is built during the backward walk
in getSource and enables more precise alias analysis for Fortran derived
types.
Previously, accesses to different components of the same derived-type
variable (such as x%a and x%b) were reported as MayAlias
because the analysis could not distinguish them once they traced back
to the same origin. With the access path, the analysis can now identify
when two accesses diverge at a named component step
and return NoAlias for disjoint subobjects.
This patch does not get rid of `followingData` and `isData` completely.
Assisted by Claude.
Commit: 36ed3face93921ae9261ff48d7436f7c7dbe78d0
https://github.com/llvm/llvm-project/commit/36ed3face93921ae9261ff48d7436f7c7dbe78d0
Author: Hans Wennborg <hans at hanshq.net>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M llvm/unittests/DebugInfo/PDB/PublicsStreamTest.cpp
Log Message:
-----------
[pdb] Store symbol names without null terminators in PublicsStreamTest (#190790)
to catch any bugs where code assumes these names are null terminated.
This would have caught (at least in ASan builds) #163755 and the bug
fixed in #190133.
Commit: c5e0fd177551a7f268a6d8c42d98532638efcd0c
https://github.com/llvm/llvm-project/commit/c5e0fd177551a7f268a6d8c42d98532638efcd0c
Author: lntue <lntue at google.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M .github/workflows/libc-shared-tests.yml
Log Message:
-----------
[libc] Add gcc builds to libc-shared-tests precommit CIs. (#190801)
Commit: 4a6adf42d80a91f79c9c7c8d0c7801f9575d40dd
https://github.com/llvm/llvm-project/commit/4a6adf42d80a91f79c9c7c8d0c7801f9575d40dd
Author: Sharjeel Khan <sharjeelkhan at google.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M llvm/lib/Analysis/InstructionSimplify.cpp
A llvm/test/Transforms/CorrelatedValuePropagation/pr187381.ll
Log Message:
-----------
[InstSimplify] Fix Compilation Hang in simplifyExtractValueInst (#190279)
Jump Threading can create self-referential insertvalues which are
allowed by the verifier in unreachable code. These self-referential
insertvalues cause the compilation to hang in simplifyExtractValueInst.
This PR adds a check to break out of the loop if it detects it is a
self-referential insertvalue and adds the reproducer's bitcode as a
test.
Fixes: https://github.com/llvm/llvm-project/issues/187381
Commit: 07a40b33e513c85061a4204b579a8cd8a60e6507
https://github.com/llvm/llvm-project/commit/07a40b33e513c85061a4204b579a8cd8a60e6507
Author: Tom Eccles <tom.eccles at arm.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
M mlir/test/Target/LLVMIR/openmp-taskloop-cancel.mlir
M mlir/test/Target/LLVMIR/openmp-taskloop-cancellation-point.mlir
M mlir/test/Target/LLVMIR/openmp-taskloop-collapse.mlir
M mlir/test/Target/LLVMIR/openmp-taskloop-no-context-struct.mlir
A mlir/test/Target/LLVMIR/openmp-taskloop-outer-bounds.mlir
M mlir/test/Target/LLVMIR/openmp-taskloop.mlir
Log Message:
-----------
[mlir][OpenMP] Fix taskloop outlined step handling (#190198)
The outlined taskloop preheader still used the original function's
casted step value when computing the canonical loop trip count. When
lb/ub/step were defined outside the taskloop body, the outlined function
ended up referring to an instruction from another function, which
crashed LLVM IR verification and finalization.
Reload the task step from the outlined task shareds, alongside lb and
ub, and use that value for the trip-count division. Update the MLIR
taskloop checks and add a regression for outer-scope variable bounds.
Fortran reproducer:
```
subroutine test(lb, ub, step)
integer :: i, lb, ub, step
!$omp taskloop
do i=lb,ub,step
call do_something(i)
enddo
!$omp end taskloop
end subroutine
```
Assisted-by: codex
Commit: 20916c680ecedc21c582f12d2540d24ff551baec
https://github.com/llvm/llvm-project/commit/20916c680ecedc21c582f12d2540d24ff551baec
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUAttributor.cpp
Log Message:
-----------
AMDGPU: Stop creating attributor attributes for declarations (#190800)
Commit: 1604565e5ed772f02d2a2c0ef40bddf4f9e8f35d
https://github.com/llvm/llvm-project/commit/1604565e5ed772f02d2a2c0ef40bddf4f9e8f35d
Author: Hemang Gadhavi <hemang.gadhavi at ibm.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M lldb/source/Plugins/Process/AIX/NativeProcessAIX.cpp
M lldb/tools/lldb-server/lldb-gdbserver.cpp
Log Message:
-----------
[lldb][AIX] Enable NativeProcessAIX Manager for lldb-server (#190173)
This PR is in reference to porting LLDB on AIX. Ref discusssions: [llvm
discourse](https://discourse.llvm.org/t/port-lldb-to-ibm-aix/80640) and
https://github.com/llvm/llvm-project/issues/101657.
Complete changes together in this draft:
- https://github.com/llvm/llvm-project/pull/102601
Description:
This change enables proper AIX processes integration with lldb-server,
ensuring correct loading and handling of AIX target architectures.
It also retrieves the target process architecture from the host and
configures NativeProcessAIX accordingly.
Commit: 894fb64bc1a9b70dcb50b313219eff99f69bc527
https://github.com/llvm/llvm-project/commit/894fb64bc1a9b70dcb50b313219eff99f69bc527
Author: Koakuma <koachan at protonmail.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M llvm/lib/Target/Sparc/Sparc.td
M llvm/lib/Target/Sparc/SparcInstr64Bit.td
M llvm/test/MC/Sparc/sparc64-alu-instructions.s
Log Message:
-----------
[SPARC][IAS] Make 64-bit instructions available in 32-bit mode on V9 (#187534)
When the ISA level is V9, 64-bit instruction definitions should be available
even if currently it's not used by any patterns.
This should allow usage of 64-bit instructions, like `sllx`/`srlx`, in inline
assembly snippets in a source file otherwise intended to target V9 processors
running in 32-bit mode, as found in, for example, the Linux kernel.
Commit: cf784ac314b5eefab3ada8ae125a2de56568ef7d
https://github.com/llvm/llvm-project/commit/cf784ac314b5eefab3ada8ae125a2de56568ef7d
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M lldb/bindings/interface/SBFileSpecExtensions.i
A lldb/test/API/python_api/filespec/TestFileSpecAPI.py
Log Message:
-----------
[lldb] Support comparing FileSpec against Python strings (#190690)
We got a bug report where someone was iterating over the modules and
wanted to verify that the module name was empty and noticed it didn't
trigger.
```
for module in target.module_iter():
if module.file is None or module.file == "":
# Do something
```
My initial hypothesis was that we were somehow skipping modules, but
upon further investigation, it was the string comparison that was the
culprit. The reporter (reasonably) expected the `file` property to
return a string, but in reality it returns a SBFileSpec.
This could be avoided by explicitly comparing with an empty FileSpec,
but that seems needlessly tedious.
```
for module in target.module_iter():
if module.file is None or module.file == lldb.SBFileSpec(""):
# Do something
```
Instead, add support for comparing a SBFileSpec against a string.
rdar://174166420
Commit: 8a103806bd7a056447a92d30d26b59edffb8d61e
https://github.com/llvm/llvm-project/commit/8a103806bd7a056447a92d30d26b59edffb8d61e
Author: Keith Smiley <keithbsmiley at gmail.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M utils/bazel/third_party_build/nanobind.BUILD
Log Message:
-----------
[bazel] Make nanobind link on macOS (#190687)
Previously the mlir libraries that are marked as shared didn't link on
macOS since undefined symbols error by default. This uses nanobind's
list of acceptable undefined python symbols to make these link.
Commit: f2bc625b2ce0a7acfa333ed04931227d3ed38a02
https://github.com/llvm/llvm-project/commit/f2bc625b2ce0a7acfa333ed04931227d3ed38a02
Author: Md Abdullah Shahneous Bari <md.abdullah.shahneous.bari at intel.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M mlir/lib/Target/LLVM/XeVM/Target.cpp
R mlir/test/Conversion/MathToXeVM/native-spirv-builtins.mlir
Log Message:
-----------
[XeVM] Refactor the SPIR-V generation to use SPIR-V backend API. (#189494)
Currently, we use 2 different approach to generate SPIR-V based on
compilation target. If compilation target is `assembly/isa`, an MLIR
interface `translateToISA` is used to convert an LLVM module to SPIR-V
text. For other cases (`bin/fatbin` compilation target) SPIR-V backend
API is used to generate SPIR-V binary.
SPIR-V backend API is more powerful, as it lets one pass the necessary
extensions which is a must if one is using any advanced or
vendor-specific SPIR-V features.
This PR discontinues the usage of MLIR API and consolidates to use
SPIR-V API.
It also ensures that SPIR-V generated from MLIR side is always in binary
format (for both XeVM target and SPIR-V target).
Commit: 58a5ce4997f5f50308af1668915767adf6dbbda9
https://github.com/llvm/llvm-project/commit/58a5ce4997f5f50308af1668915767adf6dbbda9
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M lldb/include/lldb/Symbol/Symbol.h
M lldb/source/Core/Disassembler.cpp
M lldb/source/Plugins/ObjectFile/wasm/ObjectFileWasm.cpp
A lldb/test/Shell/ObjectFile/wasm/wasm-local-decls.yaml
Log Message:
-----------
[lldb] Skip local variable declarations at start of Wasm function (#190093)
In WebAssembly, a function starts with a number of local variable
declarations, sometimes called a function header. These declarations are
*not* instructions, but they are considered to be part of the function,
meaning we can't just pretend like the function starts on the first
instruction. Instead, we treat them like a prologue, albeit one that you
cannot disassemble or set a breakpoint on.
With this PR, we now correctly disassemble the function, matching the
output of `objdump` and breakpoints resolve to the first instruction.
Fixes #189960
Commit: f59009d612c1e23e517d77293fd76855047ace5c
https://github.com/llvm/llvm-project/commit/f59009d612c1e23e517d77293fd76855047ace5c
Author: Tom Eccles <tom.eccles at arm.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M flang/lib/Lower/OpenMP/OpenMP.cpp
A flang/test/Integration/OpenMP/taskloop-alloca-placement.f90
M flang/test/Lower/OpenMP/if-clause.f90
M flang/test/Lower/OpenMP/implicit-dsa.f90
M flang/test/Lower/OpenMP/masked_taskloop.f90
M flang/test/Lower/OpenMP/parallel-masked-taskloop.f90
M flang/test/Lower/OpenMP/taskloop-cancel.f90
M flang/test/Lower/OpenMP/taskloop-collapse.f90
M flang/test/Lower/OpenMP/taskloop-grainsize.f90
A flang/test/Lower/OpenMP/taskloop-inreduction.f90
M flang/test/Lower/OpenMP/taskloop-numtasks.f90
A flang/test/Lower/OpenMP/taskloop-reduction.f90
M flang/test/Lower/OpenMP/taskloop.f90
R flang/test/Lower/taskloop-inreduction.f90
R flang/test/Lower/taskloop-reduction.f90
M mlir/include/mlir/Dialect/OpenMP/OpenMPOps.td
M mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
M mlir/test/Conversion/OpenMPToLLVM/convert-to-llvmir.mlir
M mlir/test/Dialect/OpenMP/invalid.mlir
M mlir/test/Dialect/OpenMP/ops.mlir
M mlir/test/Target/LLVMIR/openmp-taskloop-bounds-cast.mlir
M mlir/test/Target/LLVMIR/openmp-taskloop-cancel.mlir
M mlir/test/Target/LLVMIR/openmp-taskloop-cancellation-point.mlir
M mlir/test/Target/LLVMIR/openmp-taskloop-collapse.mlir
A mlir/test/Target/LLVMIR/openmp-taskloop-context-alloca.mlir
M mlir/test/Target/LLVMIR/openmp-taskloop-final.mlir
M mlir/test/Target/LLVMIR/openmp-taskloop-grainsize.mlir
M mlir/test/Target/LLVMIR/openmp-taskloop-if.mlir
M mlir/test/Target/LLVMIR/openmp-taskloop-mergeable.mlir
M mlir/test/Target/LLVMIR/openmp-taskloop-no-context-struct.mlir
M mlir/test/Target/LLVMIR/openmp-taskloop-nogroup.mlir
M mlir/test/Target/LLVMIR/openmp-taskloop-num_tasks.mlir
M mlir/test/Target/LLVMIR/openmp-taskloop-outer-bounds.mlir
M mlir/test/Target/LLVMIR/openmp-taskloop-priority.mlir
M mlir/test/Target/LLVMIR/openmp-taskloop-untied.mlir
M mlir/test/Target/LLVMIR/openmp-taskloop.mlir
M mlir/test/Target/LLVMIR/openmp-todo.mlir
Log Message:
-----------
[mlir][OpenMP] Separate OutlinableInterface from taskloop LoopWrapper (#188068)
Separate taskloop context and loop lowering into different operations.
This allows us to have separate operations representing the outlinable
interface and the loop wrapper interface so that there is somewhere
better than the loop body to put task-local allocations:
```
omp.taskloop.context {
llvm.alloca ...
omp.taskloop {
omp.loop_nest ... {
...
}
}
omp.terminator
}
```
The tests for the real functional change are
- flang/test/Integration/OpenMP/taskloop-alloca-placement.f90
- mlir/test/Target/LLVMIR/openmp-taskloop-context-alloca.mlir
RFC:
https://discourse.llvm.org/t/rfc-openmp-alloca-placement-for-openmp-loop-wrappers/89512/7
This commit keeps all of the clauses on the omp.taskloop op to minimise
changes that have to go into this one commit. I will follow this by
moving clauses to the operation in which they generate code.
Patch 1/3
Commit: fce08a642fe588ebc15ce9dc6066b30fff741ef5
https://github.com/llvm/llvm-project/commit/fce08a642fe588ebc15ce9dc6066b30fff741ef5
Author: Ravil Dorozhinskii <ravil.aviva.com at gmail.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M mlir/include/mlir/Dialect/AMDGPU/IR/AMDGPUAttrs.td
M mlir/include/mlir/Dialect/AMDGPU/IR/AMDGPUDialect.h
A mlir/include/mlir/Dialect/AMDGPU/IR/AMDGPUEnums.h
M mlir/include/mlir/Dialect/AMDGPU/IR/AMDGPUEnums.td
M mlir/include/mlir/Dialect/AMDGPU/IR/AMDGPUOps.td
M mlir/lib/Conversion/AMDGPUToROCDL/AMDGPUToROCDL.cpp
M mlir/lib/Dialect/AMDGPU/IR/AMDGPUOps.cpp
M mlir/test/Conversion/AMDGPUToROCDL/global-prefetch.mlir
M mlir/test/Dialect/AMDGPU/invalid.mlir
Log Message:
-----------
[AMDGPU][MLIR][NFC] moved enc computation to a dedicated method (#189339)
Tried to adapt `GlobalPrefetchOp` for projects like Triton that do not
use `memref`s but they can still use enums exposed to the AMDGPU
dialects. Therefor, they could benefit from just calling a static method
which converts a bunch of enums to a correct `i32` value expected by the
AMDGCN backend.
Also renamed `TemporalHint` to `LoadTemporalHint` because it turned out
there are temporal hints for store operations (for example,
`buffer_store`) which have slightly different enum values (e.g., `WB`
(write-back) instead of `LU`)
Commit: 5df89ae3da8b24804c17479ce74a930783db045e
https://github.com/llvm/llvm-project/commit/5df89ae3da8b24804c17479ce74a930783db045e
Author: Josh Stone <jistone at redhat.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
A llvm/test/CodeGen/SystemZ/vec-trunc-to-i16.ll
Log Message:
-----------
[CodeGen] Preserve big-endian trunc in concat_vectors (#190701)
A transform from `concat_vectors(trunc(scalar), undef)` to
`scalar_to_vector(scalar)` is only equivalent for little-endian targets.
On big-endian, that would put the extra upper bytes ahead of the desired
truncated bytes. This problem was seen on Rust s390x in [RHEL-147748].
[RHEL-147748]: https://redhat.atlassian.net/browse/RHEL-147748
Assisted-by: Claude Code
Commit: ea5d9c75f3bec95f891f064f413e9d57b54a9aeb
https://github.com/llvm/llvm-project/commit/ea5d9c75f3bec95f891f064f413e9d57b54a9aeb
Author: HighW4y2H3ll <zhenghaohuu at gmail.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M llvm/tools/llvm-profgen/ProfiledBinary.h
Log Message:
-----------
[llvm-profgen] Fix break to continue in PrologEpilogTracker loops (#188565)
In inferPrologAddresses and inferEpilogAddresses, using `break`
incorrectly stops processing all remaining entries when a single
IP.advance() or IP.backward() fails. Change to `continue` so that only
the failing entry is skipped.
Commit: 4ecdf5eed42578b55c0feb7a8fb0d34f44cbbc1c
https://github.com/llvm/llvm-project/commit/4ecdf5eed42578b55c0feb7a8fb0d34f44cbbc1c
Author: Wael Yehia <wmyehia2001 at yahoo.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
Log Message:
-----------
[AIX][ifunc] fix error message creation logic (misbehaves in production builds) (#188060)
I don't know why the old code was causing the function name to come out
empty in the message, in certain builds of llvm.
It's either a misuse[1] of the Twine class, or a bug somewhere else.
So this PR rewrites the logic by building the message into a
SmallString<128>. This logic is part of error handling, so optimizing it
is not important.
[1] I checked the usage and couldn't find anything suspicious
Co-authored-by: Wael Yehia <wyehia at ca.ibm.com>
Commit: 4f040ce3f7d466d90a16aac99c67ddd62d571e7b
https://github.com/llvm/llvm-project/commit/4f040ce3f7d466d90a16aac99c67ddd62d571e7b
Author: forking-google-bazel-bot[bot] <265904573+forking-google-bazel-bot[bot]@users.noreply.github.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[Bazel] Fixes fce08a6 (#190821)
This fixes fce08a642fe588ebc15ce9dc6066b30fff741ef5.
Co-authored-by: Google Bazel Bot <google-bazel-bot at google.com>
Commit: 07e8db61f9e10a5825330d63c36022e849c96116
https://github.com/llvm/llvm-project/commit/07e8db61f9e10a5825330d63c36022e849c96116
Author: Andrew Haberlandt <ahaberlandt at apple.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M compiler-rt/lib/sanitizer_common/sanitizer_common.h
Log Message:
-----------
[sanitizer_common] Fix memory leak in ListOfModules (#190104)
I found a rather old leak in `ListOfModules`. `ListOfModules` has a
member
```
InternalMmapVectorNoCtor<LoadedModule> modules_;
```
Which has neither a constructor nor destructor. As a consequence, we
need to call `Destroy` on it when ListOfModules is destroyed, so that
the memory is released to the OS (via munmap).
rdar://173906291
Commit: 904d3245569d51ecbd9f50ff99e143c4041c8c56
https://github.com/llvm/llvm-project/commit/904d3245569d51ecbd9f50ff99e143c4041c8c56
Author: Zhen Wang <zhenw at nvidia.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M flang/module/cudadevice.f90
M flang/test/Lower/CUDA/cuda-device-proc.cuf
M flang/test/Lower/CUDA/cuda-intrinsic.cuf
M flang/test/Lower/CUDA/cuda-libdevice.cuf
Log Message:
-----------
[flang][cuda] Remove __nv_ binding names from rounding-mode intrinsics in cudadevice (#190722)
Remove name='__nv_...' from bind(c) declarations for 48 rounding-mode
functions in cudadevice.f90, allowing host,device functions to link
against the unprefixed host symbols. The __nv_ prefix for device code is
handled by a downstream pass.
Commit: 835b0acced2d993fc7cfd0ec59cd02547b4f1cd1
https://github.com/llvm/llvm-project/commit/835b0acced2d993fc7cfd0ec59cd02547b4f1cd1
Author: Bryson Miller <andrewmiller77 at protonmail.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVBase.td
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVImageOps.td
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVTypes.h
M mlir/lib/Dialect/SPIRV/IR/SPIRVDialect.cpp
M mlir/lib/Dialect/SPIRV/IR/SPIRVTypes.cpp
M mlir/lib/Target/SPIRV/Deserialization/DeserializeOps.cpp
M mlir/lib/Target/SPIRV/Deserialization/Deserializer.cpp
M mlir/lib/Target/SPIRV/Deserialization/Deserializer.h
M mlir/lib/Target/SPIRV/Serialization/Serializer.cpp
M mlir/test/Dialect/SPIRV/IR/composite-ops.mlir
M mlir/test/Dialect/SPIRV/IR/image-ops.mlir
M mlir/test/Dialect/SPIRV/IR/types.mlir
M mlir/test/Target/SPIRV/image-ops.mlir
M mlir/test/Target/SPIRV/sampled-image.mlir
Log Message:
-----------
[mlir][spirv] Add OpTypeSampler and OpSampledImage support (#189891)
Add missing `!spirv.sampler` type (`OpTypeSampler`, opcode 26) and
`spirv.SampledImage` op (`OpSampledImage`, opcode 86) to the SPIR-V
dialect.
The existing sampling ops (e.g. `spirv.ImageSampleImplicitLod`) consume
`!spirv.sampled_image<...>` values, but there was previously no way to
construct one from a separate image and sampler which is the standard
Vulkan pattern for combined image samplers.
Commit: d78e4ae16c8ff8cfc86cd4bfdc2e586198e94629
https://github.com/llvm/llvm-project/commit/d78e4ae16c8ff8cfc86cd4bfdc2e586198e94629
Author: Andrew <dota2drot at gmail.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M llvm/docs/CommandGuide/llvm-cov.rst
Log Message:
-----------
docs: add ability to show non executed test vectors for mc/dc coverage (#190747)
Add new option `-show-mcdc-non-executed-vectors` to llvm-cov docs
Commit: 87525c5340e8bee3709c9f4b83fae535b074dc8a
https://github.com/llvm/llvm-project/commit/87525c5340e8bee3709c9f4b83fae535b074dc8a
Author: Ruoyu Qiu <cabbaken at outlook.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M llvm/lib/Analysis/DependenceAnalysis.cpp
M llvm/test/Analysis/DependenceAnalysis/banerjee-overflow.ll
Log Message:
-----------
[DA] Add overflow check in BanerjeeMIVtest (#190469)
Add an overflow check in BanerjeeMIVtest.
Fix the related test case added in #190468.
Signed-off-by: Ruoyu Qiu <cabbaken at outlook.com>
Commit: da96fc3dea01b4eedaa83c715f1e7dc616126032
https://github.com/llvm/llvm-project/commit/da96fc3dea01b4eedaa83c715f1e7dc616126032
Author: Tom Eccles <tom.eccles at arm.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Optimizer/Analysis/AliasAnalysis.cpp
M flang/test/Integration/OpenMP/taskloop-alloca-placement.f90
M flang/test/Lower/OpenMP/if-clause.f90
M flang/test/Lower/OpenMP/implicit-dsa.f90
M flang/test/Lower/OpenMP/masked_taskloop.f90
M flang/test/Lower/OpenMP/parallel-masked-taskloop.f90
M flang/test/Lower/OpenMP/taskloop-cancel.f90
M flang/test/Lower/OpenMP/taskloop-collapse.f90
M flang/test/Lower/OpenMP/taskloop-grainsize.f90
M flang/test/Lower/OpenMP/taskloop-inreduction.f90
M flang/test/Lower/OpenMP/taskloop-numtasks.f90
M flang/test/Lower/OpenMP/taskloop-reduction.f90
M flang/test/Lower/OpenMP/taskloop.f90
M mlir/include/mlir/Dialect/OpenMP/OpenMPOps.td
M mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
M mlir/lib/Dialect/OpenMP/Transforms/MarkDeclareTarget.cpp
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
M mlir/test/Conversion/OpenMPToLLVM/convert-to-llvmir.mlir
M mlir/test/Dialect/OpenMP/invalid.mlir
M mlir/test/Dialect/OpenMP/ops.mlir
M mlir/test/Target/LLVMIR/openmp-taskloop-bounds-cast.mlir
M mlir/test/Target/LLVMIR/openmp-taskloop-cancel.mlir
M mlir/test/Target/LLVMIR/openmp-taskloop-cancellation-point.mlir
M mlir/test/Target/LLVMIR/openmp-taskloop-collapse.mlir
M mlir/test/Target/LLVMIR/openmp-taskloop-context-alloca.mlir
M mlir/test/Target/LLVMIR/openmp-taskloop-final.mlir
M mlir/test/Target/LLVMIR/openmp-taskloop-grainsize.mlir
M mlir/test/Target/LLVMIR/openmp-taskloop-if.mlir
M mlir/test/Target/LLVMIR/openmp-taskloop-mergeable.mlir
M mlir/test/Target/LLVMIR/openmp-taskloop-no-context-struct.mlir
M mlir/test/Target/LLVMIR/openmp-taskloop-nogroup.mlir
M mlir/test/Target/LLVMIR/openmp-taskloop-num_tasks.mlir
M mlir/test/Target/LLVMIR/openmp-taskloop-outer-bounds.mlir
M mlir/test/Target/LLVMIR/openmp-taskloop-priority.mlir
M mlir/test/Target/LLVMIR/openmp-taskloop-untied.mlir
M mlir/test/Target/LLVMIR/openmp-taskloop.mlir
M mlir/test/Target/LLVMIR/openmp-todo.mlir
Log Message:
-----------
[mlir][OpenMP] Move taskloop clauses to the context op (#188070)
The clauses are implemented when lowering the context op (which
generates the runtime calls, and handles the outlining of the task
function: including privatization etc). Therefore I thought it made more
sense to put the clauses on this operation rather than on the wrapped
loop.
RFC:
https://discourse.llvm.org/t/rfc-openmp-alloca-placement-for-openmp-loop-wrappers/89512/7
Patch 2/3
Commit: cfec3b8efb6b04edce719ac3f2150330cf82aaff
https://github.com/llvm/llvm-project/commit/cfec3b8efb6b04edce719ac3f2150330cf82aaff
Author: Jianhui Li <jian.hui.li at intel.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M mlir/lib/Dialect/XeGPU/Transforms/XeGPULayoutImpl.cpp
M mlir/test/Dialect/XeGPU/propagate-layout-subgroup.mlir
Log Message:
-----------
[MLIR][XeGPU] Fix Multi-Reduction Layout Rule to Preserve sg_data from consumer layout for non-reduced dims (#189795)
As title
Commit: eb991873d20d62623c271ee01cd7a0ca2e4db63a
https://github.com/llvm/llvm-project/commit/eb991873d20d62623c271ee01cd7a0ca2e4db63a
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M lldb/test/Shell/Platform/AutoLoad/Darwin/dsym-auto-load-modules-multiple.test
Log Message:
-----------
[lldb][test] Fix dsym-auto-load-modules-multiple.test (#190826)
We were compiling without debug-info causing the test to fail on macOS.
This was a silly oversight because I was mainly working on Linux when
working on the last iterations of the patch that added this test.
Commit: d243d55ce4db80a983c8b07647a95d9279cd1fc4
https://github.com/llvm/llvm-project/commit/d243d55ce4db80a983c8b07647a95d9279cd1fc4
Author: Tom Eccles <tom.eccles at arm.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M flang/lib/Lower/OpenMP/DataSharingProcessor.cpp
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/test/Integration/OpenMP/taskloop-alloca-placement.f90
M flang/test/Lower/OpenMP/if-clause.f90
M flang/test/Lower/OpenMP/implicit-dsa.f90
M flang/test/Lower/OpenMP/masked_taskloop.f90
M flang/test/Lower/OpenMP/parallel-masked-taskloop.f90
M flang/test/Lower/OpenMP/taskloop-cancel.f90
M flang/test/Lower/OpenMP/taskloop-collapse.f90
M flang/test/Lower/OpenMP/taskloop-grainsize.f90
M flang/test/Lower/OpenMP/taskloop-inreduction.f90
M flang/test/Lower/OpenMP/taskloop-numtasks.f90
M flang/test/Lower/OpenMP/taskloop-reduction.f90
M flang/test/Lower/OpenMP/taskloop.f90
M mlir/docs/Dialects/OpenMPDialect/_index.md
M mlir/include/mlir/Dialect/OpenMP/OpenMPDialect.h
M mlir/include/mlir/Dialect/OpenMP/OpenMPOps.td
M mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
M mlir/test/Conversion/OpenMPToLLVM/convert-to-llvmir.mlir
M mlir/test/Dialect/OpenMP/invalid.mlir
M mlir/test/Dialect/OpenMP/ops.mlir
M mlir/test/Target/LLVMIR/openmp-taskloop-bounds-cast.mlir
M mlir/test/Target/LLVMIR/openmp-taskloop-cancel.mlir
M mlir/test/Target/LLVMIR/openmp-taskloop-cancellation-point.mlir
M mlir/test/Target/LLVMIR/openmp-taskloop-collapse.mlir
M mlir/test/Target/LLVMIR/openmp-taskloop-context-alloca.mlir
M mlir/test/Target/LLVMIR/openmp-taskloop-final.mlir
M mlir/test/Target/LLVMIR/openmp-taskloop-grainsize.mlir
M mlir/test/Target/LLVMIR/openmp-taskloop-if.mlir
M mlir/test/Target/LLVMIR/openmp-taskloop-mergeable.mlir
M mlir/test/Target/LLVMIR/openmp-taskloop-no-context-struct.mlir
M mlir/test/Target/LLVMIR/openmp-taskloop-nogroup.mlir
M mlir/test/Target/LLVMIR/openmp-taskloop-num_tasks.mlir
M mlir/test/Target/LLVMIR/openmp-taskloop-outer-bounds.mlir
M mlir/test/Target/LLVMIR/openmp-taskloop-priority.mlir
M mlir/test/Target/LLVMIR/openmp-taskloop-untied.mlir
M mlir/test/Target/LLVMIR/openmp-taskloop.mlir
M mlir/test/Target/LLVMIR/openmp-todo.mlir
Log Message:
-----------
[mlir][OpenMP] Rename omp.taskloop to omp.taskloop.wrapper (#188071)
Rename the loop wrapper operation to better distinguish it from the
context op (omp.taskloop.context), which handles outlining and runtime
calls. The new name makes the role of each operation clearer at a
glance.
RFC:
https://discourse.llvm.org/t/rfc-openmp-alloca-placement-for-openmp-loop-wrappers/89512/7
Patch 3/3
Assisted-by: Copilot, Claude Sonnet 4.6
Commit: a974f0a227615aeaca69c041ea612a797bf9b2c1
https://github.com/llvm/llvm-project/commit/a974f0a227615aeaca69c041ea612a797bf9b2c1
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
A llvm/utils/llvm-testing-tools/README.md
A llvm/utils/llvm-testing-tools/pyproject.toml
A llvm/utils/llvm-testing-tools/src/llvm_testing_tools/__init__.py
A llvm/utils/llvm-testing-tools/src/llvm_testing_tools/wrapper.py
Log Message:
-----------
[TestingTools] Add new llvm-testing-tools package (#188888)
This allows for packaging split-file and FileCheck for distribution on
PyPI which will support libc++ wanting to use FileCheck/split-file for
more thorough testing.
Commit: 639818145812ca04837decdc978a74e2b67da829
https://github.com/llvm/llvm-project/commit/639818145812ca04837decdc978a74e2b67da829
Author: satyanarayana reddy janga <satyajanga at fb.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M lldb/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp
A lldb/unittests/Instruction/ARM/TestARMEmulator.cpp
M lldb/unittests/Instruction/CMakeLists.txt
Log Message:
-----------
[lldb] Fix ARM STR T1 encoding using subtract instead of add, add test (#188614)
The STR Thumb T1 encoding had add=false instead of add=true, causing the
emulator to compute the store address as Rn - imm rather than Rn + imm.
This contradicts the ARM spec comment directly above.
Add a unit test that verifies the STR T1 encoding stores to the correct
address (base + offset).
Commit: 1d6ad6e951411ee1153147accde2f6dd7fcb6128
https://github.com/llvm/llvm-project/commit/1d6ad6e951411ee1153147accde2f6dd7fcb6128
Author: Erich Keane <ekeane at nvidia.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M clang/include/clang/CIR/Dialect/Builder/CIRBaseBuilder.h
M clang/test/CIR/CodeGen/pointer-to-member-func.cpp
Log Message:
-----------
[CIR] Implement 'zero attr' creation of method (#190819)
This appears quite a bit in some benchmarks, and is seemingly something
we missed at one point. This patch just implements a 'zero-init' of a
pmf.
Commit: 3dfa02157883145490d5d4591ffe56ba06826c17
https://github.com/llvm/llvm-project/commit/3dfa02157883145490d5d4591ffe56ba06826c17
Author: Alex Langford <alangford at apple.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M lldb/source/API/SBListener.cpp
M lldb/source/Core/Debugger.cpp
Log Message:
-----------
[lldb][NFC] Stop using ConstStrings with BroadcastEventSpec (#190660)
BroadcastEventSpec owns the broadcaster class its configured to listen
for. Broadcasters usually advertise their broadcast class name with
StringRefs so there's no need to put them in the string pool.
The only exception here is SBListener. There are 2 methods that take
`const char *` values. However, that's handled when converting them to
StringRefs.
Commit: c6694e531986bbe2e436cac58213b76ff26085f4
https://github.com/llvm/llvm-project/commit/c6694e531986bbe2e436cac58213b76ff26085f4
Author: Arthur Eubanks <aeubanks at google.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M llvm/docs/LangRef.rst
M llvm/include/llvm/Analysis/InlineOrder.h
M llvm/include/llvm/IR/FixedMetadataKinds.def
M llvm/include/llvm/Transforms/Utils/Cloning.h
M llvm/lib/Analysis/InlineOrder.cpp
M llvm/lib/IR/Verifier.cpp
M llvm/lib/Transforms/IPO/AlwaysInliner.cpp
M llvm/lib/Transforms/IPO/Inliner.cpp
M llvm/lib/Transforms/IPO/ModuleInliner.cpp
M llvm/lib/Transforms/IPO/PartialInlining.cpp
M llvm/lib/Transforms/Utils/CloneFunction.cpp
M llvm/lib/Transforms/Utils/InlineFunction.cpp
M llvm/test/Transforms/Inline/debug-invoke.ll
R llvm/test/Transforms/Inline/inline-history-2.ll
A llvm/test/Transforms/Inline/inline-history-noinline.ll
R llvm/test/Transforms/Inline/inline-history.ll
M llvm/test/Transforms/Inline/inline-recursive-fn2.ll
R llvm/test/Verifier/inline-history-metadata.ll
M llvm/unittests/Analysis/InlineOrderPlugin/InlineOrderPlugin.cpp
Log Message:
-----------
Revert "[Inliner] Put inline history into IR as !inline_history metadata" (#190824)
Reverts llvm/llvm-project#190700
Causes timeouts:
https://github.com/llvm/llvm-project/pull/190700#issuecomment-4198496978
Commit: 16a831655f79a3c034cba7d25ad5cfbfa9f54f37
https://github.com/llvm/llvm-project/commit/16a831655f79a3c034cba7d25ad5cfbfa9f54f37
Author: David Green <david.green at arm.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/test/CodeGen/AMDGPU/sdiv64.ll
M llvm/test/CodeGen/AMDGPU/udiv64.ll
M llvm/test/CodeGen/AMDGPU/urem64.ll
M llvm/test/CodeGen/Thumb2/mve-vmulh.ll
M llvm/test/CodeGen/X86/combine-pmuldq.ll
Log Message:
-----------
[DAG] Use known-bits when creating umulh/smulh. (#160916)
This extends the creation of umulh/smulh instructions to handle cases
where one operand is a zext/sext and the other has enough known-zero or
sign bits to create a mulh. This can be useful when one of the operands
is hoisted out of a loop.
Commit: 4913bd5588ada1dfd0e5a822b016d99b8196ca43
https://github.com/llvm/llvm-project/commit/4913bd5588ada1dfd0e5a822b016d99b8196ca43
Author: Ziqing Luo <ziqing_luo at apple.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M clang/include/clang/ScalableStaticAnalysisFramework/Analyses/UnsafeBufferUsage/UnsafeBufferUsage.h
A clang/include/clang/ScalableStaticAnalysisFramework/Analyses/UnsafeBufferUsage/UnsafeBufferUsageTest.h
M clang/include/clang/ScalableStaticAnalysisFramework/SSAFBuiltinForceLinker.h
M clang/lib/ScalableStaticAnalysisFramework/Analyses/CMakeLists.txt
A clang/lib/ScalableStaticAnalysisFramework/Analyses/UnsafeBufferUsage/UnsafeBufferUsage.cpp
M clang/lib/ScalableStaticAnalysisFramework/Frontend/CMakeLists.txt
A clang/test/Analysis/Scalable/UnsafeBufferUsage/Inputs/tu-summary-bad-element.json
A clang/test/Analysis/Scalable/UnsafeBufferUsage/Inputs/tu-summary-bad-ptr-level.json
A clang/test/Analysis/Scalable/UnsafeBufferUsage/Inputs/tu-summary-no-key.json
A clang/test/Analysis/Scalable/UnsafeBufferUsage/Inputs/tu-summary.json
A clang/test/Analysis/Scalable/UnsafeBufferUsage/tu-summary-serialization.test
M clang/test/Analysis/Scalable/ssaf-format/list.test
M clang/unittests/ScalableStaticAnalysisFramework/Analyses/UnsafeBufferUsage/UnsafeBufferUsageTest.cpp
Log Message:
-----------
[ssaf][UnsafeBufferUsage] Add JSON serialization for UnsafeBufferUsage (#187156)
Implemented and registered a JSONFormat::FormatInfo for
UnsafeBufferUsage analysis
rdar://171920065
---------
Co-authored-by: Balázs Benics <benicsbalazs at gmail.com>
Commit: 824fc35bd9453e1776f098cc5d7123b1034ea510
https://github.com/llvm/llvm-project/commit/824fc35bd9453e1776f098cc5d7123b1034ea510
Author: Benoit Jacob <jacob.benoit.1 at gmail.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M mlir/lib/Dialect/Vector/IR/VectorOps.cpp
R mlir/test/Dialect/Linalg/transform-op-mmt4d-to-fma.mlir
M mlir/test/Dialect/Vector/canonicalize/vector-to-shape-cast.mlir
A mlir/test/Dialect/Vector/vector-multi-reduction-to-fma.mlir
Log Message:
-----------
[mlir][vector] Constrain broadcast->shape_cast folding (#190230)
Fixes https://github.com/llvm/llvm-project/issues/190614.
Do not fold broadcast->shape_cast when that would result in switching
between the two distinct semantic modes of `vector.broadcast`, as
explained in https://github.com/llvm/llvm-project/issues/190614.
This fixes incorrect-result bugs in IREE:
https://github.com/iree-org/iree/issues/23952
---------
Signed-off-by: Benoit Jacob <benoit.jacob at amd.com>
Commit: 3098b4da81c254b40f6bc931bbb1933df12dc0a9
https://github.com/llvm/llvm-project/commit/3098b4da81c254b40f6bc931bbb1933df12dc0a9
Author: Slava Zakharin <szakharin at nvidia.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M flang/include/flang/Optimizer/Transforms/Passes.h
M flang/include/flang/Optimizer/Transforms/Passes.td
M flang/lib/Optimizer/Transforms/LoopInvariantCodeMotion.cpp
M flang/test/Transforms/licm.fir
Log Message:
-----------
[flang] Added LICM hoisting for nested regions. (#190696)
This patch adds a couple of experimental LICM modes
that allow hoisting operations from regions nested
inside a loop, e.g. when there is `fir.if` inside
`fir.do_loop`. The aggressive mode hoists all operations
that are safe to hoist. The cheap mode hoists only
"cheap" operations (currently, only `fir.convert`),
though the definition of "cheap" needs to be worked out.
Commit: a030dfb53b21bd900aeed7830f408a79501418dc
https://github.com/llvm/llvm-project/commit/a030dfb53b21bd900aeed7830f408a79501418dc
Author: Med Ismail Bennani <ismail at bennani.ma>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M lldb/include/lldb/Interpreter/CommandOptionArgumentTable.h
M lldb/include/lldb/Target/Target.h
M lldb/include/lldb/Target/Thread.h
M lldb/include/lldb/lldb-enumerations.h
M lldb/source/Commands/CommandObjectTarget.cpp
M lldb/source/Commands/CommandObjectThread.cpp
M lldb/source/Commands/Options.td
M lldb/source/Interpreter/CommandInterpreter.cpp
M lldb/source/Target/Target.cpp
M lldb/source/Target/Thread.cpp
M lldb/test/API/functionalities/scripted_frame_provider/pass_through_prefix/TestFrameProviderPassThroughPrefix.py
M lldb/test/API/functionalities/scripted_frame_provider/pass_through_prefix/frame_provider.py
A lldb/test/API/functionalities/scripted_frame_provider/thread_filter/Makefile
A lldb/test/API/functionalities/scripted_frame_provider/thread_filter/TestFrameProviderThreadFilter.py
A lldb/test/API/functionalities/scripted_frame_provider/thread_filter/frame_provider.py
A lldb/test/API/functionalities/scripted_frame_provider/thread_filter/main.cpp
Log Message:
-----------
[lldb] Add --provider option to thread backtrace (#181071)
Commit: 9744f1bd64f3d0f09d81a33368378d4ccd1beb91
https://github.com/llvm/llvm-project/commit/9744f1bd64f3d0f09d81a33368378d4ccd1beb91
Author: Brendan Dahl <brendan.dahl at gmail.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M clang/lib/Headers/wasm_simd128.h
M cross-project-tests/intrinsic-header-tests/wasm_simd128.c
M llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
M llvm/test/CodeGen/WebAssembly/f16-intrinsics.ll
M llvm/test/MC/WebAssembly/simd-encodings.s
Log Message:
-----------
[WebAssembly] Support promoting lower lanes of f16x8 to f32x4. (#129786)
Commit: 88a78f651c5e6b89bf6377e06d5fe5e92cd1ae2a
https://github.com/llvm/llvm-project/commit/88a78f651c5e6b89bf6377e06d5fe5e92cd1ae2a
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/lib/CIR/CodeGen/CIRGenClass.cpp
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
M clang/lib/CIR/Dialect/Transforms/LoweringPrepare.cpp
M clang/test/CIR/CodeGen/new.cpp
M clang/test/CIR/IR/array-ctor.cir
A clang/test/CIR/IR/invalid-array-structor.cir
Log Message:
-----------
[CIR] Add support for variable sized array new. (#190656)
This change adds support for array new with variable size. This required
extending the cir.array.ctor operation to accept a value for the size
and a direct pointer to the element size instead of a pointer to an
array.
Assisted-by: Cursor / claude-4.6-opus-high
Assisted-by: Cursor / composer-2-fast
Commit: e382a955c9f8bf07d28daaedcd404ca530df9be4
https://github.com/llvm/llvm-project/commit/e382a955c9f8bf07d28daaedcd404ca530df9be4
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M llvm/test/Transforms/LoopVectorize/AArch64/binop-costs.ll
M llvm/test/Transforms/LoopVectorize/AArch64/type-shrinkage-zext-costs.ll
M llvm/test/Transforms/LoopVectorize/RISCV/reg-usage.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-reduction-cost.ll
M llvm/test/Transforms/LoopVectorize/WebAssembly/int-mac-reduction-costs.ll
M llvm/test/Transforms/LoopVectorize/WebAssembly/memory-interleave.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/handle-iptr-with-data-layout-to-not-assert.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-f32-stride-2.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-f32-stride-3.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-f32-stride-4.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-f32-stride-5.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-f32-stride-6.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-f32-stride-7.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-f32-stride-8.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-f64-stride-2.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-f64-stride-3.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-f64-stride-4.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-f64-stride-5.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-f64-stride-6.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-f64-stride-7.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-f64-stride-8.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-half.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i16-stride-2.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i16-stride-3.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i16-stride-4.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i16-stride-5.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i16-stride-6.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i16-stride-7.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i16-stride-8.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i32-stride-2-indices-0u.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i32-stride-2.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i32-stride-3-indices-01u.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i32-stride-3-indices-0uu.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i32-stride-3.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i32-stride-4-indices-012u.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i32-stride-4-indices-01uu.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i32-stride-4-indices-0uuu.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i32-stride-4.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i32-stride-5.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i32-stride-6.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i32-stride-7.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i32-stride-8.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i64-stride-2.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i64-stride-3.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i64-stride-4.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i64-stride-5.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i64-stride-6.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i64-stride-7.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i64-stride-8.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i8-stride-2.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i8-stride-3.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i8-stride-4.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i8-stride-5.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i8-stride-6.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i8-stride-7.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i8-stride-8.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-f32-stride-2.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-f32-stride-3.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-f32-stride-4.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-f32-stride-5.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-f32-stride-6.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-f32-stride-7.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-f32-stride-8.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-f64-stride-2.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-f64-stride-3.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-f64-stride-4.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-f64-stride-5.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-f64-stride-6.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-f64-stride-7.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-f64-stride-8.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i16-stride-2.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i16-stride-3.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i16-stride-4.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i16-stride-5.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i16-stride-6.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i16-stride-7.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i16-stride-8.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i32-stride-2.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i32-stride-3.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i32-stride-4.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i32-stride-5.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i32-stride-6.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i32-stride-7.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i32-stride-8.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i64-stride-2.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i64-stride-3.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i64-stride-4.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i64-stride-5.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i64-stride-6.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i64-stride-7.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i64-stride-8.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i8-stride-2.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i8-stride-3.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i8-stride-4.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i8-stride-5.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i8-stride-6.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i8-stride-7.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i8-stride-8.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/masked-interleaved-load-i16.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/masked-interleaved-store-i16.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/masked-scatter-i32-with-i8-index.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/masked-scatter-i64-with-i8-index.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/masked-store-i16.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/masked-store-i32.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/masked-store-i64.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/masked-store-i8.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/scatter-i16-with-i8-index.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/scatter-i32-with-i8-index.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/scatter-i64-with-i8-index.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/scatter-i8-with-i8-index.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/strided-load-i16.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/strided-load-i32.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/strided-load-i64.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/strided-load-i8.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/vpinstruction-cost.ll
Log Message:
-----------
[LV] Update remaining tests to use VPlan cost output (NFC). (#190038)
Move remaining tests checking legacy cost output to check the VPlan's
cost model output.
In some cases, checks become much more compact (checking a single
interleave group cost vs checking the individual members which all have
the group's cost). In some cases, auto-generation consistently checks
all relevant VFs.
PR: https://github.com/llvm/llvm-project/pull/190038
Commit: c7c902574cb1eb0da6463f1fd1c4d94c1aba9e33
https://github.com/llvm/llvm-project/commit/c7c902574cb1eb0da6463f1fd1c4d94c1aba9e33
Author: Shanzhi Chen <chenshanzhi at huawei.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp
M bolt/lib/Target/AArch64/CMakeLists.txt
M bolt/unittests/Core/MCPlusBuilder.cpp
Log Message:
-----------
[BOLT][AArch64] Optimize the mov-imm-to-reg operation (#189304)
On AArch64, logical immediate instructions are used to encode some
special immediate values. And even at `-O0` level, the AArch64 backend
would not choose to generate 4 instructions (movz, movk, movk, movk) for
moving such a special value to a 64-bit regiter.
For example, to move the 64-bit value `0x0001000100010001` to `x0`, the
AArch64 backend would not choose a 4-instruction-sequence like
```
movz x0, 0x0001
movk x0, 0x0001, lsl 16
movk x0, 0x0001, lsl 32
movk x0, 0x0001, lsl 48
```
Actually, the AArch64 backend would choose to generate one instruction
```
mov x0, 0x0001000100010001
```
which is essentially
```
orr x1, xzr, 0x0001000100010001
```
We could refer to `AArch64ExpandPseudoImpl::expandMOVImm` and
`AArch64_IMM::expandMOVImm` for related implementation.
Therefore, maybe we could consider to leverage `expandMOVImm` in llvm to
optimize the mov-imm-to-reg operation in BOLT, which would help to speed
up the BOLT-instrumented binary.
Commit: 05f9c66c38c646b4795268a9c6c3aa479c793a8c
https://github.com/llvm/llvm-project/commit/05f9c66c38c646b4795268a9c6c3aa479c793a8c
Author: Valeriy Savchenko <vsavchenko at apple.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
A llvm/test/CodeGen/AArch64/branch-on-bool.ll
Log Message:
-----------
[AArch64] Normalize (bool CC 1) to (bool NewCC 0) in LowerBR_CC (#189380)
Commit: b3c093d957a972e896107abd350605babc0e5c52
https://github.com/llvm/llvm-project/commit/b3c093d957a972e896107abd350605babc0e5c52
Author: Min-Yih Hsu <min.hsu at sifive.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M llvm/test/tools/llvm-mca/RISCV/Inputs/rvv/mask.s
M llvm/test/tools/llvm-mca/RISCV/SiFiveP400/rvv/mask.test
M llvm/test/tools/llvm-mca/RISCV/SiFiveP600/rvv/mask.test
M llvm/test/tools/llvm-mca/RISCV/SiFiveX100/rvv/mask.test
M llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv/mask.test
Log Message:
-----------
[RISCV][MCA] Do not use mask instructions that can potentially be optimized by uArch (#190820)
Context:
https://github.com/llvm/llvm-project/pull/189785#discussion_r3019282209
Some mask instructions have a form that can potentially be optimized by
HW implementation: `vmxor.mm vd, vs, vs` and `vmclr vd, vs`, for
instance. This patch avoids using such instructions in MCA tests.
Commit: 88af28072637213c32cd53c99c4b9d79ded6e746
https://github.com/llvm/llvm-project/commit/88af28072637213c32cd53c99c4b9d79ded6e746
Author: Deric C. <cheung.deric at gmail.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M clang/include/clang/Basic/HLSLIntrinsics.td
M clang/lib/Headers/hlsl/hlsl_alias_intrinsics.h
M clang/lib/Headers/hlsl/hlsl_detail.h
M clang/lib/Headers/hlsl/hlsl_intrinsic_helpers.h
M clang/lib/Headers/hlsl/hlsl_intrinsics.h
M clang/test/CodeGenHLSL/builtins/dst.hlsl
M clang/test/CodeGenHLSL/builtins/ldexp.hlsl
M clang/test/CodeGenHLSL/resources/NonUniformResourceIndex.hlsl
M clang/test/SemaHLSL/BuiltIns/D3DCOLORtoUBYTE4-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/distance-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/dot2add-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/faceforward-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/fmod-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/ldexp-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/length-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/reflect-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/refract-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/smoothstep-errors.hlsl
Log Message:
-----------
[HLSL] Rewrite inline HLSL intrinsics into TableGen (#188362)
Partially addresses https://github.com/llvm/llvm-project/issues/188345.
This PR rewrites all applicable inline HLSL intrinsics from
`hlsl_intrinsics.h` into TableGen.
The unsigned `abs` from `hlsl_alias_intrinsics.h` is also rewritten into
TableGen since it can also be defined inline.
The `NonUniformResourceIndex` is moved from `hlsl_intrinsics.h` over to
`hlsl_alias_intrinsics.h` since it can be defined as an alias.
`__detail::.*_impl` helper functions that were one liners have been
removed, and their corresponding HLSL intrinsics have been defined in
TableGen using the `Body` field instead.
Note that rewriting `refract` in TableGen instead of templates
introduces some significant changes to error messages and also
introduces a new offload test suite failure in the fp16 test because a
call to `refract(x, y, 0.5)` where x and y are half-typed vectors is
ambiguous due to 0.5 being a 32-bit float literal.
The generated `hlsl_inline_intrinsics_gen.inc` file looks like this:
https://gist.github.com/Icohedron/a1c4a47ad0bb184f857430835d7d2ca3
Assisted-by: GitHub Copilot
---------
Co-authored-by: Justin Bogner <mail at justinbogner.com>
Commit: f68868db062bdd7e94affbefd0b59e72650379a3
https://github.com/llvm/llvm-project/commit/f68868db062bdd7e94affbefd0b59e72650379a3
Author: Arthur Eubanks <aeubanks at google.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M llvm/lib/IR/Value.cpp
Log Message:
-----------
Revert "[IR] Use iteration limit in stripPointerCastsAndOffsets" (#190839)
Reverts llvm/llvm-project#190472
Causes crashes:
https://github.com/llvm/llvm-project/pull/190472#issuecomment-4201843466
Commit: f069b82693d43206e5d173cd563e0c80493a9ede
https://github.com/llvm/llvm-project/commit/f069b82693d43206e5d173cd563e0c80493a9ede
Author: Anshul Nigham <nigham at google.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M llvm/lib/Target/AArch64/GISel/AArch64PostLegalizerCombiner.cpp
Log Message:
-----------
[NFC] Drop AArch64PostLegalizerCombiner dep on TargetPassConfig (#190569)
This will enable NewPM porting.
Replaced with the definition in
[AArch64PassConfig::getCSEConfig](https://github.com/llvm/llvm-project/blob/1d549d9a777a6faef6d425cb6482ab1fa6b91bb7/llvm/lib/Target/AArch64/AArch64TargetMachine.cpp#L614)
Commit: bafb2cbe22f4d6c466e6ad82e6fe5a94c4dcd497
https://github.com/llvm/llvm-project/commit/bafb2cbe22f4d6c466e6ad82e6fe5a94c4dcd497
Author: David Pagan <dave.pagan at amd.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/lib/Sema/SemaOpenMP.cpp
A clang/test/OpenMP/declare_target_local_map_messages.cpp
Log Message:
-----------
[clang][OpenMP] declare_target/local clause variable can't be in map clause (#190470)
In OpenMP 6.0, the 'local' clause was added to the declare_target
directive. Variables listed in the 'local' clause are considered to be
device-local. In addition, a new map clause restriction was added:
A device-local variable must not appear as a list item in a map clause.
See OpenMP 6.0 specification section 7.9.6, map Clause, Restrictions, p.
386.
Testing:
- New error messages test for device-local variables defined in
declare_target local clauses (device-local) used in map clauses.
- ninja check-openmp
Commit: 4b31f1ee830820e5a3aa35779069f2e25c38d267
https://github.com/llvm/llvm-project/commit/4b31f1ee830820e5a3aa35779069f2e25c38d267
Author: Leonardo Román Carrillo <leonardoroman at google.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64.h
M llvm/lib/Target/AArch64/AArch64A57FPLoadBalancing.cpp
M llvm/lib/Target/AArch64/AArch64PassRegistry.def
M llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
Log Message:
-----------
[NewPM] Port for AArch64A57FPLoadBalancing (#190652)
Commit: ba01e8d24532153f697b410db250bb82d9864581
https://github.com/llvm/llvm-project/commit/ba01e8d24532153f697b410db250bb82d9864581
Author: agozillon <Andrew.Gozillon at amd.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M flang/lib/Lower/OpenMP/ClauseProcessor.cpp
M flang/lib/Lower/OpenMP/ClauseProcessor.h
M flang/test/Lower/OpenMP/declare-mapper.f90
R flang/test/Lower/OpenMP/target-motion-skip-implicit-mapper.f90
Log Message:
-----------
[Flang][OpenMP] Allow user-defined default mappers to bypass the implicit mapper fence (#189136)
Currently we wall out implicit declare mappers from being applied to
enter/exit/update (which we'll need to address in future PRs, as this
likely should work to some extent for allocatable member mapping). A
side effect of this is that it's causing user-defined default declare
mappers to not apply in scenarios when they should.
I believe these user-defined default declare mappers should apply in all
cases where that type is mapped and no other mapper has been explicitly
specified, as they replace the original default mapping behaviour from
my admittedly shoddy specification reading skills.
The user defined default mappers should "implicitly" apply because:
1. No explicit mapper modifier is specified
2. The fallback behavior should be "as if the modifier was specified
with the default mapper-identifier" (Section 5.9)
3. The user-defined default mapper "overrides the predefined default
mapper for the given type" (Section 5.8.2)
This was 5.2-ish sectioning so information might be outdated for 6+ and
the rules might be changed (if I interpreted them correctly in the first
place).
There's a couple of other tweaks I did in the refactoring, mainly making
sure the explicit mapper can be used in conjunction with possible
specified default mappers for other types. As technically, you're
allowed to specify one mapper and map other bits and pieces in the same
mapping clause and the mapper simply doesn't apply to the other things
not of the same type.
Commit: fc01c111b94f43894b3099553bc0b0e42ef5de2c
https://github.com/llvm/llvm-project/commit/fc01c111b94f43894b3099553bc0b0e42ef5de2c
Author: calebwat <107081575+calebwat at users.noreply.github.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanUtils.cpp
Log Message:
-----------
[NFCI] Check for non-null before dereferencing a VPBB ptr (#190403)
A VPBB variable is possibly null (defined via a ternary), but is
subsequently dereferenced without a check included. This patch adds a
check for it to avoid any possibly null dereference. This was found via
static analysis, there is not a known case right now where this issue is
hit.
Commit: 0ac8fed21e5bf71e65275a3dbb0be1272571519a
https://github.com/llvm/llvm-project/commit/0ac8fed21e5bf71e65275a3dbb0be1272571519a
Author: Moritz Scherer <moritz at mosaic-soc.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
M llvm/test/CodeGen/RISCV/xcvmem.ll
Log Message:
-----------
[RISCV] Use signed target constants for XCVmem post-inc loads (#189276)
First time opening a PR against LLVM, so please let me know if anything
is missing / wrong.
This fixes an assertion in RISC-V DAG isel for CORE-V xcvmem
post-increment loads with negative immediate offsets.
`RISCVDAGToDAGISel::Select` recognizes `xcvmem POST_INC` loads and
checks whether the offset fits the signed 12-bit immediate form used by
`cv.lb/cv.lbu/cv.lh/cv.lhu/cv.lw ... , (rs1), imm12`. That path was
extracting the offset with `getSExtValue()`, but then rebuilding it with
`getTargetConstant(...)`, which takes the unsigned constant path.
For negative offsets, that could trip the APInt assertion:
```
Assertion failed: (llvm::isUIntN(BitWidth, val) && "Value is not an N-bit unsigned value")
```
during `RISC-V DAG->DAG Pattern Instruction Selection`.
The fix is to use `getSignedTargetConstant(...)` for the xcvmem
immediate case.
A regression test is added to llvm/test/CodeGen/RISCV/xcvmem.ll that
covers a reduced negative post-increment load case and checks the
expected codegen:
```asm
lw a2, 0(a0)
cv.lw a1, (a2), -4
sw a2, 0(a0)
mv a0, a1
ret
```
Reproducer before the fix:
```c
int f(int **pp) {
int *p = *pp;
int x = *p;
*pp = p - 1;
return x;
}
```
Example failing invocation:
```bash
clang --target=riscv32-unknown-elf \
-march=rv32imf_zicsr_zifencei_xcvmem \
-mabi=ilp32f -O2 -ffreestanding -c repro.c
```
Validation:
```bash
llc -O3 -mtriple=riscv32 -mattr=+xcvmem -verify-machineinstrs llvm/test/CodeGen/RISCV/xcvmem.ll
```
Confirmed the reduced repro no longer crashes
Commit: 9b16edb9ec068cca09dc01672c987aa8d3c7bdd4
https://github.com/llvm/llvm-project/commit/9b16edb9ec068cca09dc01672c987aa8d3c7bdd4
Author: agozillon <Andrew.Gozillon at amd.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Semantics/resolve-directives.cpp
A flang/test/Lower/OpenMP/common-block-target-update.f90
Log Message:
-----------
[Flang][OpenMP] Fix Common Blocks use in update to/from and target maps causing compiler errors (#187221)
This patch attempts to fix a compiler ICE when common blocks are used in
target update to/from, it seems to stem from the fact that we do not
resolve the symbols in the relevant clauses, so when we later process
the maps we don't have the right symbol that references the common block
that was setup and bound by the fortran lowering. Resolving the names
seems to do the trick.
There is a second issue where when referencing a common block with an
array contained in it and utilising the array within the target region,
we'll currently not accurately map over the bounds and cause a FIR/MLIR
verification error. The fix for this is to simply move the common block
member re-binding/re-materialization for the target region to before the
bounds data re-materialization we do during target region generation.
Commit: 2e29531ff4fee12ef883ad9af54208f9eada8f18
https://github.com/llvm/llvm-project/commit/2e29531ff4fee12ef883ad9af54208f9eada8f18
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.cpp
Log Message:
-----------
[VPlan] Properly preserve IsMaterialized in VPlan::duplicate (NFC). (#190849)
Make sure IsMaterialized is preserved in VPlan::duplicate for
VPSymbolicValues. This is currently NFC.
Split off from approved
https://github.com/llvm/llvm-project/pull/156262.
Commit: 103f821cb0977612fbff270df0e81801e8b93ed4
https://github.com/llvm/llvm-project/commit/103f821cb0977612fbff270df0e81801e8b93ed4
Author: Zyn <103019185+zyn-li at users.noreply.github.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.h
M lldb/source/Plugins/TypeSystem/Clang/TypeSystemClang.cpp
A lldb/test/API/lang/cpp/non-type-template-param-member-ptr/Makefile
A lldb/test/API/lang/cpp/non-type-template-param-member-ptr/TestCppNonTypeTemplateParamPtrToMember.py
A lldb/test/API/lang/cpp/non-type-template-param-member-ptr/main.cpp
Log Message:
-----------
[lldb][DWARFASTParserClang] Handle pointer-to-member-data non-type (#189510)
## Reland Notes
Re applying [187598](https://github.com/llvm/llvm-project/pull/187598)
This is a reland of the original commit which was reverted due to a
failure on the Windows buildbot.
Root cause of the Windows failure:
* The fix introduces TemplateArgument::Declaration (pointing to a
FieldDecl)
* GetValueParamType() in TypeSystemClang.cpp did not handle this kind,
so CreateTemplateParameterList() created a
TemplateTypeParmDecl instead of a NonTypeTemplateParmDecl for the
corresponding template parameter.
* On Windows, the Microsoft name mangler calls
cast<NonTypeTemplateParmDecl>(Parm) when mangling member data pointer
NTTPs, which crashed because Parm was a TemplateTypeParmDecl.
* The Itanium mangler (Linux/Mac) does not inspect the parameter
declaration, so the bug was latent there.
Fix:
* Added TemplateArgument::Declaration to GetValueParamType() so it
returns argument.getParamTypeForDecl(), causing
CreateTemplateParameterList() to create the correct
NonTypeTemplateParmDecl.
* Removed the @skipIfWindows decorator from the test.
## Description
### Problem
MakeAPValue in DWARFASTParserClang.cpp did not handle
pointer-to-member-data non-type template parameters (e.g., template <int
S::*P>), causing LLDB to produce incorrect results or crash.
DWARF encodes pointer-to-member-data NTTPs as
`DW_TAG_template_value_parameter` with a `DW_AT_const_value`
representing the byte offset of the member within the containing struct.
MakeAPValue is responsible for converting this value into a clang
APValue, but it only handled integer/enum and floating-point types. For
pointer-to-member types, it returned `std::nullopt`.
This caused the caller (ParseTemplateDIE) to fall back to creating a
type-only TemplateArgument (kind=Type) instead of a value-carrying one.
When two specializations differ only by which member they point to
(e.g., MemberData<&S::x> / MemberData<&S::y>), both produce identical
TemplateArguments. Clang's
[findSpecialization](https://github.com/llvm/llvm-project/blob/3bc216c29cb42c7d94b617943b1d44afce605588/lldb/source/Plugins/TypeSystem/Clang/TypeSystemClang.cpp#L1674-L1677)
then treats the second as a duplicate, so only one specialization exists
in the AST. The second variable becomes unresolvable.
(See Debugger Evidence section below)
In more complex cases, this triggers an assertion failure in
[clang::CXXRecordDecl::setBases():
cast()](https://github.com/llvm/llvm-project/blob/3bc216c29cb42c7d94b617943b1d44afce605588/clang/lib/AST/DeclCXX.cpp#L219)
argument of incompatible type.
## Fix
MakeAPValue: Added `IsMemberDataPointerType()` to the integral type
check so that pointer-to-member byte offsets produce distinct APValues.
Also replaced the silent return `std::nullopt` for unsupported types
with `lldbassert` so unknown type classes are caught during development.
`ResolveMemberDataPointerToFieldDecl`: New method that follows the DWARF
chain to resolve the byte offset to the actual FieldDecl, creating
TemplateArgument(Declaration) matching clang's own AST:
DW_TAG_template_value_parameter (DW_AT_type)
→ DW_TAG_ptr_to_member_type (DW_AT_containing_type)
→ DW_TAG_structure_type → match DW_TAG_member by byte offset
If resolution fails at any step, falls through to the integer APValue
path as a safe fallback.
Verified by comparing clang's AST (clang -Xclang -ast-dump) with LLDB's
reconstructed AST (image dump ast) — both now produce TemplateArgument
decl '&S::x' referencing the correct FieldDecl.
Commit: a50839de8aab4a42a70d3c8105ecf80ef98f74a2
https://github.com/llvm/llvm-project/commit/a50839de8aab4a42a70d3c8105ecf80ef98f74a2
Author: Erich Keane <ekeane at nvidia.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp
A clang/test/CIR/CodeGen/long-double-inc-dec.cpp
Log Message:
-----------
[CIR] Add lowering for long-double increment/decrement (#190812)
This showed up a handful of times in some benchmarks. Supporting
long-double is pretty trivial, so this patch does so, with some work to
make sure all 3 formats of long-double work in the test (plus some
command-line replacement, hopefully that isn't too confusing).
The NYI is left in place, as we're not yet implementing any of the
'half' types (or other smaller FP types).
Commit: 8918319853fbdf9e6f6cb69e96848f913a22bc31
https://github.com/llvm/llvm-project/commit/8918319853fbdf9e6f6cb69e96848f913a22bc31
Author: Erich Keane <ekeane at nvidia.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenExpr.cpp
A clang/test/CIR/CodeGen/non-scalar-lval-return.cpp
Log Message:
-----------
[CIR] Implement non-scalar lvalue return values (#190795)
I could only get these to happen in C++03 (as we do a
materialize-temporary-expr in later standards), but this does appear in
a number of benchmarks. The implementation ends up being pretty trivial,
as we just have to lower the aggregate correctly.
Commit: e1ec0cfeaaeaba6745e8843a34209cd99aee64aa
https://github.com/llvm/llvm-project/commit/e1ec0cfeaaeaba6745e8843a34209cd99aee64aa
Author: Jeffrey Byrnes <jeffrey.byrnes at amd.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SISchedule.td
M llvm/lib/Target/AMDGPU/VOP1Instructions.td
A llvm/test/tools/llvm-mca/AMDGPU/gfx12-permlane16-cycles.s
Log Message:
-----------
[AMDGPU] Add DummySchedWrite to avoid multiple issue cycles (#190095)
TargetSchedule.td specifies that each explicit def of an instruction
must have an associated SchedWrite type. This is a bit unfortunate due
to the MachineScheduler handling of the ScedWrites.
Each of these different SchedWrite contribute to the number of MicroOps
for the MCSchedClassDesc for the instruction --
https://github.com/llvm/llvm-project/blob/096f9d0aa8edb8bad77e8061a6aa9cbf61bcb5ac/llvm/utils/TableGen/SubtargetEmitter.cpp#L1136
Then in the MachineScheduler.cpp's bumpNode, we grab the numMicroOps
from the MCSchedClassDesc
https://github.com/llvm/llvm-project/blob/3d7eedce5658c41a1b22775938359bfafac47fc9/llvm/lib/CodeGen/MachineScheduler.cpp#L2948
We then use this numMicroOps as how many micro ops we'll need to issue
for this instruction. For our target, the issueWidth per cycle is 1. So,
for these instructions the MachineScheduler thinks they will take
multiple cycles to issue, and we add stalls to the hazardRecognizer
https://github.com/llvm/llvm-project/blob/3d7eedce5658c41a1b22775938359bfafac47fc9/llvm/lib/CodeGen/MachineScheduler.cpp#L3100
Adding these unnecessary stalls throws off analyses in the
HazardRecognizer, which can lead to suboptimal scheduling decisions.
Due to the design, we are essentially pigeonholed into misrepresenting
these instructions. This PR adds new SchedWrite types ( WriteVALUDummy
and WriteSALUDummy ) to honor the rule of "each explicit def must have a
SchedWrite" without adding unnecessary MicroOps to get around the issue.
There are several other instructions that have exposure to this issue,
and addressing them all at once leads to lit test churn of about 170
tests. The intention of this PR is to agree upon the approach, then we
can incrementally roll it out to other instructions.
Commit: bbdf4670df3c17eea7568ea72f5ed62933e3cf59
https://github.com/llvm/llvm-project/commit/bbdf4670df3c17eea7568ea72f5ed62933e3cf59
Author: Med Ismail Bennani <ismail at bennani.ma>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M lldb/test/API/functionalities/scripted_frame_provider/pass_through_prefix/TestFrameProviderPassThroughPrefix.py
Log Message:
-----------
[lldb/test] Remove stale Windows expectedFailure decorators (NFC) (#190855)
This patch removes stale Windows expectedFailure decorators from
TestFrameProviderPassThroughPrefix.py
https://lab.llvm.org/buildbot/#/builders/141/builds/17091
Signed-off-by: Med Ismail Bennani <ismail at bennani.ma>
Commit: 85d99e38e71870327656034250e901e633196fba
https://github.com/llvm/llvm-project/commit/85d99e38e71870327656034250e901e633196fba
Author: Demetrius Kanios <demetrius at kanios.net>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M llvm/lib/Target/WebAssembly/GISel/WebAssemblyCallLowering.cpp
M llvm/test/CodeGen/WebAssembly/GlobalISel/irtranslator/args-simd.ll
M llvm/test/CodeGen/WebAssembly/GlobalISel/irtranslator/args-swiftcc.ll
M llvm/test/CodeGen/WebAssembly/GlobalISel/irtranslator/args.ll
A llvm/test/CodeGen/WebAssembly/GlobalISel/irtranslator/ret-aggregates.ll
A llvm/test/CodeGen/WebAssembly/GlobalISel/irtranslator/ret-basics.ll
A llvm/test/CodeGen/WebAssembly/GlobalISel/irtranslator/ret-simd.ll
Log Message:
-----------
[WebAssembly][GlobalISel] CallLowering `lowerReturn` (#190247)
Implements `WebAssemblyCallLowering::lowerReturn`
Split from #157161
Commit: 6adddb227e7a109eda53f6783e16871c6d714ad9
https://github.com/llvm/llvm-project/commit/6adddb227e7a109eda53f6783e16871c6d714ad9
Author: Keith Smiley <keithbsmiley at gmail.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/clang/BUILD.bazel
Log Message:
-----------
[bazel] Add missing linkopt for macOS tests (#190707)
Mirrors
https://github.com/llvm/llvm-project/blob/228b6ae5608baea7120fc4d5d611b3fbd30ce0cb/clang/lib/DirectoryWatcher/CMakeLists.txt#L12
Commit: a234dfedd13e6066a8dd2f8600f0765d7f62f4e7
https://github.com/llvm/llvm-project/commit/a234dfedd13e6066a8dd2f8600f0765d7f62f4e7
Author: Jan Svoboda <jan_svoboda at apple.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M llvm/lib/Support/Windows/Signals.inc
Log Message:
-----------
[clang] Avoid sandbox violation in Windows signal handler (#190615)
This bypasses the IO sandbox in some of Windows signal handling, which
previously prevented stack traces from being printed.
Commit: 3b6557f178691b97c86724c0744f13bd510de3e3
https://github.com/llvm/llvm-project/commit/3b6557f178691b97c86724c0744f13bd510de3e3
Author: Schrodinger ZHU Yifan <yifanzhu at rochester.edu>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M libc/src/assert/generic/CMakeLists.txt
M libc/src/assert/generic/__assert_fail.cpp
M libc/src/assert/gpu/CMakeLists.txt
M libc/src/assert/gpu/__assert_fail.cpp
M libc/src/compiler/generic/CMakeLists.txt
M libc/src/compiler/generic/__stack_chk_fail.cpp
M libc/src/stdlib/CMakeLists.txt
A libc/src/stdlib/abort.cpp
A libc/src/stdlib/abort_utils.h
M libc/src/stdlib/baremetal/CMakeLists.txt
R libc/src/stdlib/baremetal/abort.cpp
A libc/src/stdlib/baremetal/abort_utils.h
M libc/src/stdlib/gpu/CMakeLists.txt
R libc/src/stdlib/gpu/abort.cpp
A libc/src/stdlib/gpu/abort_utils.h
M libc/src/stdlib/linux/CMakeLists.txt
R libc/src/stdlib/linux/abort.cpp
M libc/src/stdlib/linux/abort_utils.h
M libc/test/integration/src/stdlib/abort_test.cpp
M libc/test/src/assert/assert_test.cpp
Log Message:
-----------
[libc][stdlib] move abort to a header library and cleanup its usage (#190845)
This PR moves abort implementation to a header library so that internal
dependency no longer relies on the entrypoint object.
Additionally, it clean up prior dependency to the entrypoint object and
update staled tests.
Assisted-by: Claude Opus 4.6 <noreply at anthropic.com>
Commit: 8c389f3eb2e713c2195a4d3dd4b6894fab783a10
https://github.com/llvm/llvm-project/commit/8c389f3eb2e713c2195a4d3dd4b6894fab783a10
Author: Michael Spencer <bigcheesegs at gmail.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M clang/include/clang/Frontend/DependencyOutputOptions.h
M clang/include/clang/Frontend/Utils.h
M clang/include/clang/Options/Options.td
M clang/include/clang/Serialization/ASTReader.h
M clang/lib/DependencyScanning/DependencyScannerImpl.cpp
M clang/lib/DependencyScanning/ModuleDepCollector.cpp
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/Frontend/DependencyFile.cpp
M clang/lib/Frontend/Rewrite/FrontendActions.cpp
M clang/lib/Serialization/ASTReader.cpp
M clang/test/ClangScanDeps/generate-modules-path-args.c
A clang/test/Driver/module-file-direct-deps.c
M clang/test/Driver/pch-deps.c
A clang/test/Modules/dependency-gen-direct-module-deps.m
M clang/test/Modules/dependency-gen-pch.m
Log Message:
-----------
[clang] Report direct module deps for explicitly built modules (#190757)
Implicitly built modules do not include PCM paths in .d files because
the compiler is the one managing them, but for explicitly built
modules the build system needs to know about them so that if one is
deleted the build system will rebuild it.
Explicitly built modules should only report direct dependencies, as
the build system knows about each PCM in the module graph. This adds
`-fmodule-file-deps=direct` to support that, and changes dependency
scanning to use this in the explicit build commands it outputs.
Assisted-by: claude-opus-4.6
Commit: 3244cadd4043c36441f7312c6ea06139e3dba18b
https://github.com/llvm/llvm-project/commit/3244cadd4043c36441f7312c6ea06139e3dba18b
Author: Susan Tan (ス-ザン タン) <zujunt at nvidia.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M flang/lib/Optimizer/Transforms/FIRToMemRef.cpp
M flang/test/Transforms/FIRToMemRef/array-coor-block-arg.mlir
M flang/test/Transforms/FIRToMemRef/slice.mlir
Log Message:
-----------
[flang][FIRToMemRef] Preserve descriptor strides for boxed static-shape array_coor (#190859)
Fix FIRToMemRef to avoid the static-shape for descriptor-backed array
operands lowered without reinterpret, so boxed sections with static
extents still preserve runtime stride semantics (e.g. a(1:10:2) in
ASSOCIATE).
Commit: e89a4dfabfac7016819d201dacb6c6c58e6a2365
https://github.com/llvm/llvm-project/commit/e89a4dfabfac7016819d201dacb6c6c58e6a2365
Author: Jim Lin <jim at andestech.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVGISel.td
Log Message:
-----------
[RISCV] Fix typo in ImmPlus1 SDNodeXForm (#190785)
getValuePtrVTpe -> getValueType. Currently dead code since GlobalISel
uses a custom renderer instead of the SDNodeXForm body, but should be
correct in case the SDAG path ever picks up these patterns.
Co-authored-by: Claude Opus 4.6 (1M context) <noreply at anthropic.com>
Commit: 0d640409ad96c71bff8196b54e42993543b1fe92
https://github.com/llvm/llvm-project/commit/0d640409ad96c71bff8196b54e42993543b1fe92
Author: Brian Cain <brian.cain at oss.qualcomm.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
A llvm/include/llvm/ExecutionEngine/JITLink/ELF_hexagon.h
A llvm/include/llvm/ExecutionEngine/JITLink/hexagon.h
M llvm/lib/ExecutionEngine/JITLink/CMakeLists.txt
M llvm/lib/ExecutionEngine/JITLink/ELF.cpp
A llvm/lib/ExecutionEngine/JITLink/ELF_hexagon.cpp
A llvm/lib/ExecutionEngine/JITLink/hexagon.cpp
A llvm/test/ExecutionEngine/JITLink/Hexagon/ELF_hexagon_b22_pcrel.s
A llvm/test/ExecutionEngine/JITLink/Hexagon/ELF_hexagon_combined.s
A llvm/test/ExecutionEngine/JITLink/Hexagon/ELF_hexagon_compound.s
A llvm/test/ExecutionEngine/JITLink/Hexagon/ELF_hexagon_cond_branch.s
A llvm/test/ExecutionEngine/JITLink/Hexagon/ELF_hexagon_const_extender.s
A llvm/test/ExecutionEngine/JITLink/Hexagon/ELF_hexagon_data_relocations.s
A llvm/test/ExecutionEngine/JITLink/Hexagon/ELF_hexagon_duplex.s
A llvm/test/ExecutionEngine/JITLink/Hexagon/ELF_hexagon_hilo16.s
A llvm/test/ExecutionEngine/JITLink/Hexagon/ELF_hexagon_loop.s
A llvm/test/ExecutionEngine/JITLink/Hexagon/ELF_hexagon_mem_relocs.s
A llvm/test/ExecutionEngine/JITLink/Hexagon/ELF_hexagon_minimal.s
A llvm/test/ExecutionEngine/JITLink/Hexagon/ELF_hexagon_noext_branch.s
A llvm/test/ExecutionEngine/JITLink/Hexagon/ELF_hexagon_packet.s
A llvm/test/ExecutionEngine/JITLink/Hexagon/ELF_hexagon_plt.s
A llvm/test/ExecutionEngine/JITLink/Hexagon/lit.local.cfg
Log Message:
-----------
[JITLink] Add Hexagon ELF backend (#189710)
Add JITLink support for Hexagon (ELF32-LE) object files
Commit: 1345ad1b7d37c692548bc2c3d1f1bada71274419
https://github.com/llvm/llvm-project/commit/1345ad1b7d37c692548bc2c3d1f1bada71274419
Author: Wei Wang <apollo.mobility at gmail.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M llvm/lib/Transforms/IPO/SampleProfileMatcher.cpp
Log Message:
-----------
[SampleProf] Check probe-based profile in isProfileUnused (#190852)
`ProbeManager` is only initialized for probe based profile. Add proper
check in `isProfileUnused`.
This fixes: https://github.com/llvm/llvm-project/issues/188897
Commit: dea9b6e1493e663fd7f07f486d96a14d7fbf1cad
https://github.com/llvm/llvm-project/commit/dea9b6e1493e663fd7f07f486d96a14d7fbf1cad
Author: David Truby <david.truby at arm.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M flang-rt/lib/runtime/time-intrinsic.cpp
M flang/include/flang/Common/windows-include.h
Log Message:
-----------
[flang-rt] Add implementation for date_and_time on Windows (#190174)
Commit: 24833808df27fe0b27b4491617dae746dec301ba
https://github.com/llvm/llvm-project/commit/24833808df27fe0b27b4491617dae746dec301ba
Author: Srivarshitha M <mvarshitha17874 at gmail.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenCUDANV.cpp
M clang/test/CIR/CodeGenCUDA/kernel-call.cu
Log Message:
-----------
[CIR][CUDA][HIP] Support stream per thread kernel launch (#188004)
Related: #175871, #179278
When `-fgpu-default-stream=per-thread` is specified, CUDA and HIP
kernels should be launched using the per-thread stream variants of the
launch API instead of the default `cudaLaunchKernel`/`hipLaunchKernel`.
This PR implements that by selecting the correct launch function name in
`emitDeviceStubBodyNew`:
For CUDA: `cudaLaunchKernel_ptsz`
For HIP: `hipLaunchKernel_spt`
This matches the behavior of the OG CodeGen implementation in
`CGCUDANV.cpp`.
Commit: ff400edc1f90533f844a5fd1c3b0e0b110095945
https://github.com/llvm/llvm-project/commit/ff400edc1f90533f844a5fd1c3b0e0b110095945
Author: Peter Collingbourne <pcc at google.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/Demangle/BUILD.gn
Log Message:
-----------
gn build: Port 7162f191b8ce
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/190882
Commit: fb392aeb3d6196ec39a91798b30f5fec6bed1390
https://github.com/llvm/llvm-project/commit/fb392aeb3d6196ec39a91798b30f5fec6bed1390
Author: Michael <michael at mshires.net>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M llvm/lib/Target/X86/X86InstrInfo.cpp
A llvm/test/CodeGen/X86/apx/pr190557.ll
Log Message:
-----------
[X86][APX] Fix segfault in foldMemoryOperandImpl for two-address NDD fold (#190562)
The NoNDDM code path in foldMemoryOperandImpl assumed
NewMI->getOperand(1) is always a register. When IsTwoAddr is true,
fuseTwoAddrInst replaces operands 0-4 with memory address components, so
getOperand(1) is the immediate, not a register. Calling setReg() causes
a segfault in removeOperandFromUseList.
Skip the NoNDDM COPY block when IsTwoAddr is true, since the two-address
fold already correctly handles the dest==src1 constraint.
I believe the issue was introduced with #189222 , the 'NoNDDM' block
calls 'NewMI->getOperand(1).setReg()', but after 'fuseTwoAddrInst',
operand 1 is an immediate, not a register.
Passes all APX regression tests. Unit test included in commit. Fixes
issue #190557.
First time submitting a PR to the LLVM project, please let me know if I
need to fix something! Tagging @phoebewang and @RKSimon as potential
review candidates.
Commit: 37c6cfe1c3888d9af8c9b4b17eccbc8a94447903
https://github.com/llvm/llvm-project/commit/37c6cfe1c3888d9af8c9b4b17eccbc8a94447903
Author: Abhinav Garg <abhinav.garg at amd.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.s.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.s.buffer.load.ll
A llvm/test/CodeGen/AMDGPU/s-buffer-load-mmo-offsets.ll
Log Message:
-----------
[AMDGPU] Fix incorrect MachineMemOperand offsets and sizes in wide s_buffer_load splits (#189890)
When G_AMDGPU_S_BUFFER_LOAD (or its SelectionDAG equivalent) falls back
to MUBUF due to a divergent offset, wide loads (256-bit, 512-bit) are
split into multiple 128-bit chunks. Both code paths that perform this
split had bugs in how they annotated MachineMemOperand (MMO) metadata on
each chunk instruction — reporting wrong offsets and wrong sizes. This
does not affect generated assembly correctness but degrades the analysis
if that MMO metadata is used.
---------
Co-authored-by: Abhinav Garg <abhigarg at amd.com>
Co-authored-by: Jay Foad <jay.foad at gmail.com>
Commit: 1ad91beba9fe14c152370a5d116aa020478a01c3
https://github.com/llvm/llvm-project/commit/1ad91beba9fe14c152370a5d116aa020478a01c3
Author: Takashi Idobe <idobetakashi at gmail.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M llvm/lib/CodeGen/TwoAddressInstructionPass.cpp
M llvm/test/CodeGen/X86/mul-lohi-no-implicit-copy.ll
M llvm/test/CodeGen/X86/pr78897.ll
M llvm/test/CodeGen/X86/tailcallstack64.ll
M llvm/test/CodeGen/X86/tailccstack64.ll
A llvm/test/CodeGen/X86/two-address-subreg-to-reg-kill.mir
Log Message:
-----------
[CodeGen] relax kill copy hoist restriction for vreg to phys reg copies with folded loads (#190304)
Resolves: https://github.com/llvm/llvm-project/issues/62452
Currently, `TwoAddressInstructionPass` has a blanket rule against moving
kill copies, since many copies are better handled later by coalescing.
However, that rule is too strict when the kill is a virtual register to
physical register copy and the current two-address instruction has a
folded load. In that case, keeping the copy in place can force the pass
to break the folded rm form into a mov rm + op rr, even though the
physical register copy itself cannot be coalesced away in the usual
sense.
This fixes a missed optimization where a folded IMUL64rm was rewritten
into MOV64rm + IMUL64rr because a later $rax = COPY %src was kept in
place for mul.
Commit: 4d18039c63bfd3750e87cc44c9f5af98f0affc10
https://github.com/llvm/llvm-project/commit/4d18039c63bfd3750e87cc44c9f5af98f0affc10
Author: Sudharsan Veeravalli <svs at qti.qualcomm.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoXqci.td
M llvm/test/CodeGen/RISCV/xqciac.ll
Log Message:
-----------
[RISCV] Lower (select c, y, 0) -> (qc.muliadd c, y-1) (#190323)
This can be compressed in some cases so prefer `QC_MULIADD` to
`QC_SHLADD`.
Commit: 0f16b90d99855251b1768a370ad9797801197a29
https://github.com/llvm/llvm-project/commit/0f16b90d99855251b1768a370ad9797801197a29
Author: Jim Lin <jim at andestech.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoZvdot4a8i.td
A llvm/test/CodeGen/RISCV/rvv/commutable-zvdot4a8i.ll
Log Message:
-----------
[RISCV] Add isCommutable for VDOTA4 and VDOTA4U (#190090)
Mark PseudoVDOTA4_VV and PseudoVDOTA4U_VV as commutable since both
source operands have the same signedness. VDOTA4SU is left
non-commutable because its operands differ in signedness (signed x
unsigned).
Add findCommutedOpIndices cases for the new commutable pseudos and
a test covering commutable and non-commutable dot product variants.
---------
Co-authored-by: Claude Opus 4.6 <noreply at anthropic.com>
Commit: 55a041baf3d14c24fb5a87254bc55305c7e8f7ce
https://github.com/llvm/llvm-project/commit/55a041baf3d14c24fb5a87254bc55305c7e8f7ce
Author: Ryotaro Kasuga <kasuga.ryotaro at fujitsu.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M llvm/lib/Analysis/DependenceAnalysis.cpp
M llvm/test/Analysis/DependenceAnalysis/Banerjee.ll
M llvm/test/Analysis/DependenceAnalysis/Constraints.ll
M llvm/test/Analysis/DependenceAnalysis/MismatchingNestLevels.ll
M llvm/test/Analysis/DependenceAnalysis/NonCanonicalizedSubscript.ll
M llvm/test/Analysis/DependenceAnalysis/PreliminaryNoValidityCheckFixedSize.ll
M llvm/test/Analysis/DependenceAnalysis/Propagating.ll
M llvm/test/Analysis/DependenceAnalysis/SameSDLoops.ll
M llvm/test/Analysis/DependenceAnalysis/rdiv-minor-algebra.ll
M llvm/test/Transforms/LoopInterchange/large-nested-6d.ll
Log Message:
-----------
[DA] Move no-wrap flag check into checkSubscript (#190770)
Recent patches added no-wrap flag checks to each dependence test (except
for the Banerjee MIV test) to make them sound. These fixes have been
applied one by one to ensure that each dependence test was correctly
updated and the defects were properly addressed. However, ideally, these
functions should not be called at all when the required no-wrap flags
are not set. Specifically, `classifyPair` should tag pairs as
`NonLinear` when either addrec doesn't have the no-wrap flag, which
means that the addrec is as literal non-linear.
This patch moves the existing no-wrap flag checks in the each dependence
test to `checkSubscript`, which is called by `classifyPair`. With this
change, if the addrec doesn't have the no-wrap flag, the pair will be
classified as `NonLinear` and the dependence test will not be invoked at
all. I believe this change makes the code cleaner and consistent with
the meaning of `NonLinear` classification.
Note that this patch doesn't take care of the behavioral change caused
by the Benerjee MIV test, as the test is still not sound and there are
no plans to fix it in the near future.
Commit: 59b1515c070ed10292d75bcc416d6ba1af13090f
https://github.com/llvm/llvm-project/commit/59b1515c070ed10292d75bcc416d6ba1af13090f
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
Log Message:
-----------
[SelectionDAG] Fix typo Chian->Chain. NFC (#190874)
Commit: 7071feb157c700bada63035395632c4192532919
https://github.com/llvm/llvm-project/commit/7071feb157c700bada63035395632c4192532919
Author: Deric C. <cheung.deric at gmail.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M clang/include/clang/Basic/HLSLIntrinsics.td
M clang/lib/Headers/hlsl/hlsl_alias_intrinsics.h
M clang/test/SemaHLSL/BuiltIns/cross-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/f16tof32-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/f32tof16-errors.hlsl
M clang/test/SemaHLSL/WaveBuiltinAvailability.hlsl
Log Message:
-----------
[HLSL] Rewrite HLSL alias intrinsics into TableGen (#188814)
This PR will close issue
https://github.com/llvm/llvm-project/issues/188345 after PR
https://github.com/llvm/llvm-project/pull/188362.
This PR rewrites all applicable alias intrinsics from
`hlsl_alias_intrinsics.h` into TableGen (`HLSLIntrinsics.td`).
There are no significant test changes with this PR.
The generated `hlsl_alias_intrinsics_gen.h` can be seen here:
https://gist.github.com/Icohedron/5b9ed2638da0966e3c7514dcb5095197
The generated `hlsl_inline_intrinsics_gen.h` is the same as in
https://github.com/llvm/llvm-project/pull/188362 since this PR does not
add or modify any inline intrinsics definitions.
Assisted-by: GitHub Copilot
Commit: 413e58089506bea5b8373a1f639987e769b99fc6
https://github.com/llvm/llvm-project/commit/413e58089506bea5b8373a1f639987e769b99fc6
Author: Victor Chernyakin <chernyakin.victor.j at outlook.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M clang-tools-extra/clang-tidy/ClangTidyCheck.h
M clang-tools-extra/clang-tidy/bugprone/DynamicStaticInitializersCheck.cpp
M clang-tools-extra/clang-tidy/bugprone/DynamicStaticInitializersCheck.h
M clang-tools-extra/clang-tidy/bugprone/SuspiciousIncludeCheck.cpp
M clang-tools-extra/clang-tidy/bugprone/SuspiciousIncludeCheck.h
M clang-tools-extra/clang-tidy/google/GlobalNamesInHeadersCheck.cpp
M clang-tools-extra/clang-tidy/google/GlobalNamesInHeadersCheck.h
M clang-tools-extra/clang-tidy/llvmlibc/InlineFunctionDeclCheck.cpp
M clang-tools-extra/clang-tidy/llvmlibc/InlineFunctionDeclCheck.h
M clang-tools-extra/clang-tidy/misc/AnonymousNamespaceInHeaderCheck.cpp
M clang-tools-extra/clang-tidy/misc/AnonymousNamespaceInHeaderCheck.h
M clang-tools-extra/clang-tidy/misc/DefinitionsInHeadersCheck.cpp
M clang-tools-extra/clang-tidy/misc/DefinitionsInHeadersCheck.h
M clang-tools-extra/clang-tidy/misc/UnusedUsingDeclsCheck.cpp
M clang-tools-extra/clang-tidy/misc/UnusedUsingDeclsCheck.h
M clang-tools-extra/clang-tidy/misc/UseAnonymousNamespaceCheck.cpp
M clang-tools-extra/clang-tidy/misc/UseAnonymousNamespaceCheck.h
M clang-tools-extra/clang-tidy/misc/UseInternalLinkageCheck.cpp
M clang-tools-extra/clang-tidy/misc/UseInternalLinkageCheck.h
M clang-tools-extra/clang-tidy/utils/HeaderGuard.cpp
M clang-tools-extra/clang-tidy/utils/HeaderGuard.h
Log Message:
-----------
[clang-tidy][NFC] Don't store a redundant copy of `HeaderFileExtensions` in every check (#190302)
#80333 removed local `HeaderFileExtensions` options; now there's just
the global option, and its value lives in the `ClangTidyContext`. But
every check still stores its own copy of it, a vestige of the old design
which this change fixes.
Commit: 2c0b3b9e421cfffcb6802c9bdfeca9485cd806f5
https://github.com/llvm/llvm-project/commit/2c0b3b9e421cfffcb6802c9bdfeca9485cd806f5
Author: Chuanqi Xu <yedeng.yd at linux.alibaba.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M clang/lib/AST/StmtProfile.cpp
Log Message:
-----------
[NFC] Correct comments grammar and refine it (#190895)
Following https://github.com/llvm/llvm-project/pull/190732
Commit: 9b831391779331d9d03eec642ecc3e2d36cd013c
https://github.com/llvm/llvm-project/commit/9b831391779331d9d03eec642ecc3e2d36cd013c
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M flang/lib/Semantics/expression.cpp
M flang/test/Semantics/cuf04.cuf
Log Message:
-----------
[flang][cuda] Relax check on chevron syntax for bind(c) callee (#190861)
Commit: d7ed5e523c67ba004fab06ecd88eed527746564d
https://github.com/llvm/llvm-project/commit/d7ed5e523c67ba004fab06ecd88eed527746564d
Author: Fangrui Song <i at maskray.me>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M llvm/unittests/MC/DwarfLineTableHeaders.cpp
Log Message:
-----------
[test] Make MCTargetOptions a class member in DwarfLineTableHeaders (#190904)
Similar to commit 6f0b0ecaba1ba311717f86d8e4d8c6b2b4c4cd4b
createMCAsmInfo will store a pointer to the MCTargetOptions argument in
MCAsmInfo. When MCTargetOptions was a local variable in the constructor,
the pointer dangled after the constructor returned.
Commit: 24c7baf528548f809c86a911e2dc66c1aa3e410f
https://github.com/llvm/llvm-project/commit/24c7baf528548f809c86a911e2dc66c1aa3e410f
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVCallLowering.cpp
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/bitreverse_small_type.ll
R llvm/test/CodeGen/SPIRV/transcoding/OpBitReverse-subbyte.ll
R llvm/test/CodeGen/SPIRV/transcoding/OpBitReverse_i2.ll
A llvm/test/CodeGen/SPIRV/transcoding/subbyte-arg-type-mismatch.ll
Log Message:
-----------
[SPIR-V] Fix sub-byte argument type mismatch in call lowering (#189893)
Remove the `MRI->setType()` call in lowerFormalArguments that was
overriding the vreg LLT with the SPIR-V type's LLT, causing a type
mismatch when sub-byte integer arguments (e.g. i2, i4) were preliminary
widened to i8
related to https://github.com/llvm/llvm-project/issues/188703
Commit: 0584d0a6007173bb8d089c4e3e4163606dc681c4
https://github.com/llvm/llvm-project/commit/0584d0a6007173bb8d089c4e3e4163606dc681c4
Author: Sameer Sahasrabuddhe <sameer.sahasrabuddhe at amd.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M clang/include/clang/Basic/DiagnosticGroups.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/lib/Sema/SemaChecking.cpp
A clang/test/CodeGenHIP/atomic-deprecated-fixit.hip
A clang/test/SemaHIP/atomic-deprecated.hip
Log Message:
-----------
[Clang][HIP] Deprecate __hip_atomic_* builtins (#189897)
Emit deprecation warnings for all __hip_atomic_* builtins,
pointing users to their __scoped_atomic_* equivalents.
The warning is ignored by default, and can be enabled with
-Whip-deprecated-builtins. It will be turned on by default eventually
after we have cleaned up all ROCm/HIP headers and put a deprecation
schedule in place.
Also provide a fixit when the scope is a compile-time constant and there
is a direct mapping from the HIP builtin to a Clang builtin. The
compare_exchange builtins differ in how they accept the desired value,
so only a warning (without a fixit) is emitted for those.
This makes #185408 almost redundant for HIP, since the HIP scopes
themselves will disappear once the `__hip_*` builtins are gone. OpenCL
is different because the language itself specifies an enum. A simpler
version of #185408 can be used to emit a warning when Sema recognizes
that a non-OpenCL builtin is being passed an OpenCL scope.
Assisted-By: Claude Opus 4.6
Commit: 0806ccebb3f00df938ec5e5e80f099cc3c898902
https://github.com/llvm/llvm-project/commit/0806ccebb3f00df938ec5e5e80f099cc3c898902
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
Log Message:
-----------
[LegalizeTypes] Remove stray slash from comment. NFC (#190900)
Commit: 5099f1641e49e5d5a084dcf2155dc8a72257c795
https://github.com/llvm/llvm-project/commit/5099f1641e49e5d5a084dcf2155dc8a72257c795
Author: Aviral Goel <aviralg at users.noreply.github.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M clang/include/clang/ScalableStaticAnalysisFramework/Core/Model/PrivateFieldNames.def
M clang/include/clang/ScalableStaticAnalysisFramework/Core/Serialization/JSONFormat.h
M clang/include/clang/ScalableStaticAnalysisFramework/Core/Serialization/SerializationFormat.h
M clang/include/clang/ScalableStaticAnalysisFramework/Core/WholeProgramAnalysis/DerivedAnalysis.h
M clang/include/clang/ScalableStaticAnalysisFramework/Core/WholeProgramAnalysis/WPASuite.h
M clang/lib/ScalableStaticAnalysisFramework/CMakeLists.txt
M clang/lib/ScalableStaticAnalysisFramework/Core/CMakeLists.txt
M clang/lib/ScalableStaticAnalysisFramework/Core/Serialization/JSONFormat/JSONFormatImpl.cpp
M clang/lib/ScalableStaticAnalysisFramework/Core/Serialization/JSONFormat/JSONFormatImpl.h
A clang/lib/ScalableStaticAnalysisFramework/Core/Serialization/JSONFormat/WPASuite.cpp
A clang/lib/ScalableStaticAnalysisFramework/Plugins/CMakeLists.txt
A clang/lib/ScalableStaticAnalysisFramework/Plugins/ExamplePlugin/AnalysisResults.h
A clang/lib/ScalableStaticAnalysisFramework/Plugins/ExamplePlugin/CMakeLists.txt
A clang/lib/ScalableStaticAnalysisFramework/Plugins/ExamplePlugin/PairsAnalysis.cpp
A clang/lib/ScalableStaticAnalysisFramework/Plugins/ExamplePlugin/TagsAnalysis.cpp
A clang/lib/ScalableStaticAnalysisFramework/Plugins/ExamplePlugin/TagsPairsAnalysis.cpp
A clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/duplicate-analysis-name.json
A clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/missing-results.json
A clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/pairs-result-bad-count.json
A clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/pairs-result-bad-pair-counts.json
A clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/pairs-result-entry-not-object.json
A clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/pairs-result-missing-entity-id.json
A clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/result-entry-analysis-name-not-string.json
A clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/result-entry-deserializer-error.json
A clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/result-entry-missing-analysis-name.json
A clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/result-entry-missing-result-field.json
A clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/result-entry-no-format-info.json
A clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/result-entry-not-object.json
A clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/result-entry-result-not-object.json
A clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/results-not-array.json
A clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/rt-all-results.json
A clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/rt-empty.json
A clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/rt-multiple-results.json
A clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/tags-result-bad-element.json
A clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/tags-result-missing-tags.json
A clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/tagspairs-result-bad-field-type.json
A clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/tagspairs-result-missing-field.json
A clang/test/Analysis/Scalable/ssaf-format/WPASuite/with-plugin.test
A clang/test/Analysis/Scalable/ssaf-format/WPASuite/without-plugin.test
A clang/test/Analysis/Scalable/ssaf-format/lit.local.cfg
M clang/test/CMakeLists.txt
M clang/tools/clang-ssaf-format/CMakeLists.txt
M clang/tools/clang-ssaf-format/SSAFFormat.cpp
M clang/unittests/ScalableStaticAnalysisFramework/Frontend/TUSummaryExtractorFrontendActionTest.cpp
M clang/unittests/ScalableStaticAnalysisFramework/Registries/MockSerializationFormat.cpp
M clang/unittests/ScalableStaticAnalysisFramework/Registries/MockSerializationFormat.h
M clang/unittests/ScalableStaticAnalysisFramework/TestFixture.h
Log Message:
-----------
[clang][ssaf] Add JSONFormat support for WPASuite (#187403)
This patch adds `JSONFormat` serialization support for `WPASuite`.
- Adds `readWPASuite` / `writeWPASuite` to the `SerializationFormat`
abstract interface and implements them in `JSONFormat`.
- Introduces `AnalysisResultRegistryGenerator`, a per-format plugin
registry template in `SerializationFormat`, allowing analysis authors to
register (de)serializers for their `AnalysisResult` subtypes with a
single static declaration.
- Extends `PrivateFieldNames.def` with `WPASuite::Data` and
`WPASuite::IdTable`, and adds a `makeWPASuite()` factory to
`SerializationFormat`, so deserialization code can construct a
`WPASuite` incrementally through the same access-controlled pattern
used for all other SSAF data structures.
Commit: 1578bc684e82f33791b14f59d0cd495ab6789d4d
https://github.com/llvm/llvm-project/commit/1578bc684e82f33791b14f59d0cd495ab6789d4d
Author: Fangrui Song <i at maskray.me>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M bolt/lib/Core/BinaryContext.cpp
M llvm/include/llvm/MC/MCAsmInfo.h
M llvm/include/llvm/MC/MCContext.h
M llvm/include/llvm/MC/TargetRegistry.h
M llvm/lib/MC/ELFObjectWriter.cpp
M llvm/lib/MC/MCAsmStreamer.cpp
M llvm/lib/MC/MCContext.cpp
M llvm/lib/MC/MCObjectStreamer.cpp
M llvm/unittests/CodeGen/MFCommon.inc
M llvm/unittests/CodeGen/MachineInstrTest.cpp
M llvm/unittests/CodeGen/MachineOperandTest.cpp
M llvm/unittests/Target/AArch64/AArch64InstPrinterTest.cpp
Log Message:
-----------
[MC] Move MCTargetOptions pointer from MCContext to MCAsmInfo (#180464)
Except MC-internal `MCAsmInfo()` uses, MCAsmInfo is always constructed
with `const MCTargetOptions &` via `TargetRegistry::createMCAsmInfo`
(https://reviews.llvm.org/D41349). Store the pointer in MCAsmInfo and
change `MCContext::getTargetOptions()` to retrieve it from there,
removing the `MCTargetOptions const *TargetOptions` member from
MCContext.
MCContext's constructor still accepts an MCTargetOptions parameter
for now but is often omitted by call sites.
A subsequent change will remove this parameter and update all callers.
Commit: 04f27644209310f0a06fda5e991bb1788eb1b52d
https://github.com/llvm/llvm-project/commit/04f27644209310f0a06fda5e991bb1788eb1b52d
Author: Aviral Goel <aviralg at users.noreply.github.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M clang/include/clang/ScalableStaticAnalysisFramework/Core/Model/PrivateFieldNames.def
M clang/include/clang/ScalableStaticAnalysisFramework/Core/Serialization/JSONFormat.h
M clang/include/clang/ScalableStaticAnalysisFramework/Core/Serialization/SerializationFormat.h
M clang/include/clang/ScalableStaticAnalysisFramework/Core/WholeProgramAnalysis/DerivedAnalysis.h
M clang/include/clang/ScalableStaticAnalysisFramework/Core/WholeProgramAnalysis/WPASuite.h
M clang/lib/ScalableStaticAnalysisFramework/CMakeLists.txt
M clang/lib/ScalableStaticAnalysisFramework/Core/CMakeLists.txt
M clang/lib/ScalableStaticAnalysisFramework/Core/Serialization/JSONFormat/JSONFormatImpl.cpp
M clang/lib/ScalableStaticAnalysisFramework/Core/Serialization/JSONFormat/JSONFormatImpl.h
R clang/lib/ScalableStaticAnalysisFramework/Core/Serialization/JSONFormat/WPASuite.cpp
R clang/lib/ScalableStaticAnalysisFramework/Plugins/CMakeLists.txt
R clang/lib/ScalableStaticAnalysisFramework/Plugins/ExamplePlugin/AnalysisResults.h
R clang/lib/ScalableStaticAnalysisFramework/Plugins/ExamplePlugin/CMakeLists.txt
R clang/lib/ScalableStaticAnalysisFramework/Plugins/ExamplePlugin/PairsAnalysis.cpp
R clang/lib/ScalableStaticAnalysisFramework/Plugins/ExamplePlugin/TagsAnalysis.cpp
R clang/lib/ScalableStaticAnalysisFramework/Plugins/ExamplePlugin/TagsPairsAnalysis.cpp
R clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/duplicate-analysis-name.json
R clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/missing-results.json
R clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/pairs-result-bad-count.json
R clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/pairs-result-bad-pair-counts.json
R clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/pairs-result-entry-not-object.json
R clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/pairs-result-missing-entity-id.json
R clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/result-entry-analysis-name-not-string.json
R clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/result-entry-deserializer-error.json
R clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/result-entry-missing-analysis-name.json
R clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/result-entry-missing-result-field.json
R clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/result-entry-no-format-info.json
R clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/result-entry-not-object.json
R clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/result-entry-result-not-object.json
R clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/results-not-array.json
R clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/rt-all-results.json
R clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/rt-empty.json
R clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/rt-multiple-results.json
R clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/tags-result-bad-element.json
R clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/tags-result-missing-tags.json
R clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/tagspairs-result-bad-field-type.json
R clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/tagspairs-result-missing-field.json
R clang/test/Analysis/Scalable/ssaf-format/WPASuite/with-plugin.test
R clang/test/Analysis/Scalable/ssaf-format/WPASuite/without-plugin.test
R clang/test/Analysis/Scalable/ssaf-format/lit.local.cfg
M clang/test/CMakeLists.txt
M clang/tools/clang-ssaf-format/CMakeLists.txt
M clang/tools/clang-ssaf-format/SSAFFormat.cpp
M clang/unittests/ScalableStaticAnalysisFramework/Frontend/TUSummaryExtractorFrontendActionTest.cpp
M clang/unittests/ScalableStaticAnalysisFramework/Registries/MockSerializationFormat.cpp
M clang/unittests/ScalableStaticAnalysisFramework/Registries/MockSerializationFormat.h
M clang/unittests/ScalableStaticAnalysisFramework/TestFixture.h
Log Message:
-----------
Revert "[clang][ssaf] Add JSONFormat support for WPASuite (#187403)" (#190909)
This reverts commit 5099f1641e49e5d5a084dcf2155dc8a72257c795 since it breaks buildbots.
Commit: 2186dca2f4eee13d9aed033dc1cd7ed33bd59ca3
https://github.com/llvm/llvm-project/commit/2186dca2f4eee13d9aed033dc1cd7ed33bd59ca3
Author: Baranov Victor <bar.victor.2002 at gmail.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M clang-tools-extra/clang-tidy/cppcoreguidelines/MissingStdForwardCheck.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/test/clang-tidy/checkers/cppcoreguidelines/missing-std-forward.cpp
Log Message:
-----------
[clang-tidy] Fix FP in cppcoreguidelines-missing-std-forward in lambda init-list (#190522)
In `TK_IgnoreUnlessSpelledInSource` mode
[`MatchChildASTVisitor::TraverseLambdaExpr`](https://github.com/llvm/llvm-project/blob/main/clang/lib/ASTMatchers/ASTMatchFinder.cpp#L280)
only calls `match()` on each capture-init expression without recursing
into its children. So for `[t{std::forward<T>(t)}]` the `CallExpr`
nested inside the `InitListExpr` is never visited, and
`ForwardCallMatcher` never binds "call".
Fixes https://github.com/llvm/llvm-project/issues/150446.
Commit: ff071d61654e1b4e8e2cba73e58e418d080812f4
https://github.com/llvm/llvm-project/commit/ff071d61654e1b4e8e2cba73e58e418d080812f4
Author: Kareem Ergawy <kareem.ergawy at amd.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M flang/lib/Optimizer/OpenMP/DoConcurrentConversion.cpp
M flang/test/Transforms/DoConcurrent/reduce_device.mlir
A flang/test/Transforms/DoConcurrent/reduce_device_min.f90
A offload/test/offloading/fortran/do-concurrent-to-omp-min-reduce.f90
Log Message:
-----------
[flang][DoConcurrent] Map reduction variables as tofrom ByRef for device offloading (#189378)
Scalar reduction variables in `do concurrent reduce(...)` were being
mapped with `implicit ByCopy` when offloaded to device, because
`genMapInfoOpForLiveIn` treated all trivial types uniformly. This caused
the reduction result to be silently dropped — the device-side reduction
would compute the correct value but never write it back to the host.
Fix by detecting reduction variables and forcing `implicit tofrom ByRef`
mapping, matching the behavior of explicit
`!$omp target teams distribute parallel do reduction(...)`.
Co-authored-by: ergawy <kareem.ergawy at amd.com>
Co-authored-by: Claude <noreply at anthropic.com>
Made-with: Cursor
Fixes: https://github.com/ROCm/llvm-project/issues/1844
Co-authored-by: Claude <noreply at anthropic.com>
Commit: 71260f8df1124852ca3093d2ec8d2615493471c1
https://github.com/llvm/llvm-project/commit/71260f8df1124852ca3093d2ec8d2615493471c1
Author: Nishant Sachdeva <32475507+nishant-sachdeva at users.noreply.github.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M llvm/test/tools/llvm-ir2vec/bindings/ir2vec-getBBEmbMap.py
M llvm/test/tools/llvm-ir2vec/bindings/ir2vec-getFuncEmb.py
M llvm/test/tools/llvm-ir2vec/bindings/ir2vec-getFuncEmbMap.py
M llvm/test/tools/llvm-ir2vec/bindings/ir2vec-getFuncNames.py
M llvm/test/tools/llvm-ir2vec/bindings/ir2vec-getInstEmbMap.py
M llvm/test/tools/llvm-ir2vec/bindings/ir2vec-initEmbedding.py
M llvm/tools/llvm-ir2vec/Bindings/PyIR2Vec.cpp
M llvm/tools/llvm-ir2vec/lib/Utils.cpp
M llvm/tools/llvm-ir2vec/lib/Utils.h
M llvm/tools/llvm-ir2vec/llvm-ir2vec.cpp
Log Message:
-----------
[llvm-ir2vec] Decoupling Vocab loading from initEmbedding (#190507)
This has been done in order to save time during entire dataset
processing. vocab loading should only happen once.
Commit: f26470aeb7668f437c4d669e4a72c614ba775bb4
https://github.com/llvm/llvm-project/commit/f26470aeb7668f437c4d669e4a72c614ba775bb4
Author: Farid Zakaria <fmzakari at fb.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M lld/ELF/LinkerScript.cpp
M lld/test/ELF/x86-64-section-layout.s
Log Message:
-----------
[lld][ELF] Merge .ltext.* input sections into .ltext output section (#190305)
## Motivation
The default output section name rules in `getOutputSectionName()`
already merge .ldata.*, .lrodata.*, and .lbss.* into their respective
output sections, but .ltext.* was missing from the prefix list. This
caused mcmodel=large builds with `-ffunction-sections` to produce a
separate output section for every function instead of combining them
into .ltext.
We actually then ran into a bunch of esoteric issues because we the had
to handle SHN_XINDEX binaries with >65535 sections, so in that sense it
helped us find those gaps :)
## Changes
Add .ltext to the prefix list alongside the other large-model section
prefixes.
Co-authored-by: Grigory Pastukhov <gpastukhov at meta.com>
Commit: 8c8e998757d9aacb4b1b624a27096a9ea340169a
https://github.com/llvm/llvm-project/commit/8c8e998757d9aacb4b1b624a27096a9ea340169a
Author: Jim Lin <jim at andestech.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoXSfmm.td
Log Message:
-----------
[NFC][RISCV] Fix mismatched closing comment in XSfmm instruction definition (#190898)
The closing comment had XSfmm64a32f but the opening predicate uses
XSfmm32a32f.
Co-authored-by: Claude Opus 4.6 (1M context) <noreply at anthropic.com>
Commit: 8054d3705dced397b24ace5ebc4180963a8e8736
https://github.com/llvm/llvm-project/commit/8054d3705dced397b24ace5ebc4180963a8e8736
Author: Lang Hames <lhames at gmail.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M orc-rt/include/orc-rt/Session.h
M orc-rt/lib/executor/Session.cpp
M orc-rt/unittests/SessionTest.cpp
Log Message:
-----------
[orc-rt] Rename ManagedCodeCallsGroup to ManagedCodeTaskGroup. NFC. (#190880)
The new name better reflects this group's purpose: Tokens are needed for
any task that wants to access managed code, whether to call it or access
data.
Commit: 06b82d1a18791bc966e9b18ac34f63c888d10723
https://github.com/llvm/llvm-project/commit/06b82d1a18791bc966e9b18ac34f63c888d10723
Author: Abinaya Saravanan <asaravan at qti.qualcomm.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M llvm/lib/Target/Hexagon/HexagonOptAddrMode.cpp
A llvm/test/CodeGen/Hexagon/opt-addr-mode-large-unodelist.ll
Log Message:
-----------
[Hexagon] Fix O(N^2) compile-time regression in HexagonOptAddrMode (#189531)
In HexagonOptAddrMode::processAddUses, isSafeToExtLR was called inside
the loop over UNodeList with loop-invariant arguments. isSafeToExtLR
iterates over UNodeList, so the total work was O(N^2) in the number of
uses.
The arguments (AddSN, AddMI, BaseReg, UNodeList) do not change across
iterations. Move the call to after the loop; the function returns the
same value regardless of which iteration calls it, and the complexity
drops to O(N).
Background
----------
Commit 8c0483bba2d2 ("RegisterCoalescer: Fix assert on remat to
copy-to-physreg with subregs") introduced register coalescer
rematerialization changes that produce additional uses of A2_addi
instructions on the Hexagon backend, inflating UNodeList. This exposed
the pre-existing O(N^2) behavior in processAddUses.
Measurements
------------
Input: rkvdec-vdpu383-h264.i (Hexagon kernel driver, -O2)
Tool: hexagon-linux-musl-clang (clang-20)
Scenario | HexagonOptAddrMode | Total
--------------------------------------|-------------------|---------
Before blamed commit (baseline) | 1.35 s | ~195 s
After blamed commit, without fix | 221,845 s | >61 h
After blamed commit, with fix | 52.16 s | ~225 s
Fixes: https://github.com/llvm/llvm-project/issues/178535
Commit: 45791a8e2c58ac9fb3e5a8f3b55e4a91e5d99c74
https://github.com/llvm/llvm-project/commit/45791a8e2c58ac9fb3e5a8f3b55e4a91e5d99c74
Author: Srinivasa Ravi <srinivasar at nvidia.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/NVVMRequiresSMTraits.h
M mlir/include/mlir/Dialect/LLVMIR/NVVMRequiresSMTraits.td
M mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp
M mlir/test/Dialect/LLVMIR/nvvm-check-targetSM.mlir
M mlir/test/lib/Dialect/Test/TestOps.td
Log Message:
-----------
[MLIR][NVVM] Add family-specific support to NVVMRequiresSM traits (#185909)
This change adds support for family-conditional SM version requirements
to the `NVVMRequiresSM` traits. The following new traits are added:
- `NVVMRequiresSMf` - Op requires an SM version belonging to one of the
given families.
- `NVVMRequiresSMaOrSMf` - Op requires one of the supported
arch-accelerated versions or an SM version belonging to one of the given
families.
This also changes the underlying checks to use the `FullSMVersion`
instead of booleans to indicate arch-acceleration and family-specific
support to simplify the checks.
Commit: 1c0b2d3abb04ca92dbbf637b30e25829ef90d859
https://github.com/llvm/llvm-project/commit/1c0b2d3abb04ca92dbbf637b30e25829ef90d859
Author: Matthias Springer <me at m-sp.org>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M mlir/lib/Dialect/Vector/IR/VectorOps.cpp
M mlir/test/Dialect/Vector/canonicalize.mlir
M mlir/test/Dialect/XeGPU/xegpu-vector-linearize.mlir
Log Message:
-----------
[mlir][vector] Replace unused shuffle operands / results with poison (#190763)
If a shuffle operand is not used (as indicated by the mask), replace it
with `ub.poison`. This may make the value dead and enable additional
DCE. Also replace the entire shuffle op with `ub.poison` if all selected
values are poisoned.
Assisted-by: claude-4.6-opus-high
Commit: 6ac4e6faf360356978e934b1c4faa1119c59039c
https://github.com/llvm/llvm-project/commit/6ac4e6faf360356978e934b1c4faa1119c59039c
Author: Tomer Shafir <tomer.shafir8 at gmail.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M llvm/tools/llvm-exegesis/lib/Assembler.cpp
Log Message:
-----------
[llvm-exegesis] Pass data layout explicitly to LLJIT (#190789)
This is a defesive change that aims to make sure the target data layout
of both the object compilation and LLJIT is the same, by passing it
explicitly rather than relying similar auto-detection implicitly.
The patch doesnt add a new test but relies on existing ones, as a test
case of different layouts would require to exhibit a misuse of the tool,
doing cross-compilation to change the layout of the compilation. The
tool is not designed to work this way.
Commit: 1d0b3f223b9384ea9bbe2c8c612fb3ecfc01a08c
https://github.com/llvm/llvm-project/commit/1d0b3f223b9384ea9bbe2c8c612fb3ecfc01a08c
Author: Pavel Labath <pavel at labath.sk>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M libc/docs/CMakeLists.txt
M libc/docs/headers/index.rst
A libc/utils/docgen/sys/socket.yaml
Log Message:
-----------
[libc][docs] Add sys/socket.h implementation status (#190751)
Commit: bcc83ef9af57cd9f3b8a252e2db53843394c79aa
https://github.com/llvm/llvm-project/commit/bcc83ef9af57cd9f3b8a252e2db53843394c79aa
Author: Kleis Auke Wolthuizen <github at kleisauke.nl>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M llvm/utils/git/github-automation.py
Log Message:
-----------
github-automation.py: Use raw strings for regex (#184326)
Avoids a `SyntaxWarning: invalid escape sequence`.
As noticed in:
https://github.com/llvm/llvm-project/actions/runs/22620420192/job/65543770329
https://github.com/llvm/llvm-project/actions/runs/22607027706/job/65501262987
Commit: 5a7aab6e9efc5736ed37f24f8546e52d6e192abe
https://github.com/llvm/llvm-project/commit/5a7aab6e9efc5736ed37f24f8546e52d6e192abe
Author: David Sherwood <david.sherwood at arm.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M llvm/test/Transforms/LoopVectorize/2012-10-20-infloop.ll
M llvm/test/Transforms/LoopVectorize/AArch64/aarch64-unroll.ll
M llvm/test/Transforms/LoopVectorize/AArch64/arm64-unroll.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-chained.ll
M llvm/test/Transforms/LoopVectorize/AArch64/pr33053.ll
M llvm/test/Transforms/LoopVectorize/AArch64/pr36032.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-interleaved-accesses-cost.ll
M llvm/test/Transforms/LoopVectorize/AMDGPU/divergent-runtime-check.ll
M llvm/test/Transforms/LoopVectorize/AMDGPU/unroll-in-loop-vectorizer.ll
M llvm/test/Transforms/LoopVectorize/ARM/active-lane-mask.ll
M llvm/test/Transforms/LoopVectorize/ARM/arm-ieee-vectorize.ll
M llvm/test/Transforms/LoopVectorize/Hexagon/maximum-vf-crash.ll
M llvm/test/Transforms/LoopVectorize/Hexagon/minimum-vf.ll
M llvm/test/Transforms/LoopVectorize/LoongArch/loongarch-interleaved.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/interleave_IC.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/massv-altivec.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/massv-calls.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/massv-unsupported.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/reg-usage.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/stride-vectorization.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/vectorize-bswap.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/vectorize-only-for-real.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/vsx-tsvc-s173.ll
M llvm/test/Transforms/LoopVectorize/RISCV/riscv-interleaved.ll
M llvm/test/Transforms/LoopVectorize/RISCV/riscv-unroll.ll
M llvm/test/Transforms/LoopVectorize/RISCV/short-trip-count.ll
M llvm/test/Transforms/LoopVectorize/RISCV/unroll-in-loop-vectorizer.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-half.ll
M llvm/test/Transforms/LoopVectorize/X86/already-vectorized.ll
M llvm/test/Transforms/LoopVectorize/X86/consecutive-ptr-cg-bug.ll
M llvm/test/Transforms/LoopVectorize/X86/fp_to_sint8-cost-model.ll
M llvm/test/Transforms/LoopVectorize/X86/int128_no_gather.ll
M llvm/test/Transforms/LoopVectorize/X86/interleaved-accesses-use-after-free.ll
M llvm/test/Transforms/LoopVectorize/X86/masked_load_store.ll
M llvm/test/Transforms/LoopVectorize/X86/no-vector.ll
M llvm/test/Transforms/LoopVectorize/X86/no_fpmath.ll
M llvm/test/Transforms/LoopVectorize/X86/no_fpmath_with_hotness.ll
M llvm/test/Transforms/LoopVectorize/X86/pr35432.ll
M llvm/test/Transforms/LoopVectorize/X86/pr48340.ll
M llvm/test/Transforms/LoopVectorize/X86/register-assumption.ll
M llvm/test/Transforms/LoopVectorize/X86/scatter_crash.ll
M llvm/test/Transforms/LoopVectorize/X86/strided_load_cost.ll
M llvm/test/Transforms/LoopVectorize/X86/tail_loop_folding.ll
M llvm/test/Transforms/LoopVectorize/X86/uint64_to_fp64-cost-model.ll
M llvm/test/Transforms/LoopVectorize/X86/vector_ptr_load_store.ll
M llvm/test/Transforms/LoopVectorize/X86/vectorization-remarks-missed.ll
M llvm/test/Transforms/LoopVectorize/assume.ll
M llvm/test/Transforms/LoopVectorize/conditional-assignment.ll
M llvm/test/Transforms/LoopVectorize/control-flow.ll
M llvm/test/Transforms/LoopVectorize/dbg.value.ll
M llvm/test/Transforms/LoopVectorize/dereferenceable-info-from-assumption-variable-size.ll
M llvm/test/Transforms/LoopVectorize/diag-missing-instr-debug-loc.ll
M llvm/test/Transforms/LoopVectorize/diag-with-hotness-info-2.ll
M llvm/test/Transforms/LoopVectorize/diag-with-hotness-info.ll
M llvm/test/Transforms/LoopVectorize/ee-crash.ll
M llvm/test/Transforms/LoopVectorize/global_alias.ll
M llvm/test/Transforms/LoopVectorize/if-reduction.ll
M llvm/test/Transforms/LoopVectorize/incorrect-dom-info.ll
M llvm/test/Transforms/LoopVectorize/induction.ll
M llvm/test/Transforms/LoopVectorize/int_sideeffect.ll
M llvm/test/Transforms/LoopVectorize/no_array_bounds.ll
M llvm/test/Transforms/LoopVectorize/no_switch.ll
M llvm/test/Transforms/LoopVectorize/no_switch_disable_vectorization.ll
M llvm/test/Transforms/LoopVectorize/pointer-induction.ll
M llvm/test/Transforms/LoopVectorize/reuse-lcssa-phi-scev-expansion.ll
M llvm/test/Transforms/LoopVectorize/scalable-assume.ll
Log Message:
-----------
[LV][NFC] Remove more unused function attributes from tests (#190786)
Following on from PR #188185 I've removed some more function attributes
from tests that weren't adding any value. As part of this patch I've
also removed some unnecessary `Function Attrs:` comments that live above
functions.
I suspect that there are other attributes that can be removed, for
example see ARM/arm-ieee-vectorize.ll. However, I haven't had chance to
look into these yet as they are more FP and/or target specific and
perhaps require more thought.
Commit: 8e9737804061a2c10db90a69362ee26e3ee4a7bf
https://github.com/llvm/llvm-project/commit/8e9737804061a2c10db90a69362ee26e3ee4a7bf
Author: Sameer Sahasrabuddhe <sameer.sahasrabuddhe at amd.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M llvm/test/CodeGen/AMDGPU/asyncmark-pregfx12.ll
Log Message:
-----------
[NFC][AMDGPU] don't test asyncmark for non-async variants on pre-gfx12 (#190774)
The test for asyncmark on pref-gfx12 targets, checks the effect of async
marks on both async and non-async instructions. This is achieved by a
sed invocation in the RUN line to remove the .async from intrinsic name.
Such a test serves no purpose other than a minor flex. The two sets of
CHECK lines using the WITH and WITHOUT prefix are not easy to compare by
a simple eyeballing. Eliminating this hack makes it easier to add GISEL
variants later. With and without GISEL, the combinations will increase
to four instead of the current two.
Assisted-By: Claude Opus 4.6
Commit: d46af3a78dea1dfb0a6f319e7abbcd6b6e2df64e
https://github.com/llvm/llvm-project/commit/d46af3a78dea1dfb0a6f319e7abbcd6b6e2df64e
Author: Sameer Sahasrabuddhe <sameer.sahasrabuddhe at amd.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
M llvm/test/CodeGen/AMDGPU/asyncmark-gfx12plus.ll
Log Message:
-----------
[AMDGPU] Fix duplicate s_wait_asynccnt on gfx12-plus (#190906)
S_WAIT_ASYNCCNT was missing from counterTypeForInstr(), so isWaitInstr() did not recognize it as a wait instruction. On the fixpoint algorithm's second pass over a loop body, the already-inserted S_WAIT_ASYNCCNT was treated as a normal instruction, causing WAIT_ASYNCMARK to be re-processed and a duplicate S_WAIT_ASYNCCNT to be emitted.
Assisted-By: Claude Opus 4.6
Commit: e54d7ffd55b2acd59b404f1e5af9c68538e4da08
https://github.com/llvm/llvm-project/commit/e54d7ffd55b2acd59b404f1e5af9c68538e4da08
Author: Nathan Gauër <brioche at google.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M clang/lib/Basic/Targets/SPIR.h
M clang/lib/CodeGen/Targets/SPIR.cpp
M clang/test/CodeGenHLSL/builtins/splitdouble.hlsl
M clang/test/CodeGenHLSL/semantics/SV_Position.ps.hlsl
M clang/test/CodeGenHLSL/semantics/SV_Position.vs.hlsl
M clang/test/CodeGenHLSL/semantics/SV_Target.ps.hlsl
M clang/test/CodeGenHLSL/semantics/semantic.arbitrary.hlsl
M clang/test/CodeGenHLSL/semantics/semantic.array.hlsl
M clang/test/CodeGenHLSL/semantics/semantic.array.output.hlsl
M clang/test/CodeGenHLSL/semantics/semantic.explicit-location-output-struct.hlsl
M clang/test/CodeGenHLSL/semantics/semantic.explicit-location.hlsl
M clang/test/CodeGenHLSL/semantics/semantic.explicit-mix-builtin.hlsl
M clang/test/CodeGenHLSL/semantics/semantic.explicit-mix.lib.hlsl
M clang/test/CodeGenHLSL/vk-features/vk.pushconstant.anon-struct.hlsl
M clang/test/CodeGenHLSL/vk-input-builtin.hlsl
M clang/test/CodeGenHLSL/vk-output-builtin.hlsl
M llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp
M llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.h
M llvm/lib/Target/SPIRV/SPIRVSubtarget.cpp
M llvm/lib/TargetParser/TargetDataLayout.cpp
M llvm/test/CodeGen/SPIRV/hlsl-resources/Packed.ll
M llvm/test/CodeGen/SPIRV/hlsl-resources/cbuffer-peeled-array.ll
M llvm/test/CodeGen/SPIRV/pointers/load-vector-from-array-of-vectors.ll
M llvm/test/CodeGen/SPIRV/spirv-explicit-layout.ll
A llvm/test/CodeGen/SPIRV/vk-pushconstant-layout-natural.ll
M llvm/test/CodeGen/SPIRV/vk-pushconstant-layout.ll
M llvm/unittests/Target/SPIRV/SPIRVGlobalRegistryTests.cpp
Log Message:
-----------
[SPIR-V] Change DL for logical SPIR-V (#190807)
This PR originates from bogner@ draft PR. It modifies the triple for
logical SPIR-V to use the new vector sizing feature.
This means updating the tests, and fix one codegen issue:
on the old datalayout, we knew a float3 allocation size was the
same as a float4 allocation. This is now invalid, thus
a store `<4 x float>` into a `<3 x float>` allocation is UB.
Commit: 30a99ce6b4da71654374266537eb88cd845869f6
https://github.com/llvm/llvm-project/commit/30a99ce6b4da71654374266537eb88cd845869f6
Author: Felipe de Azevedo Piovezan <fpiovezan at apple.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M lldb/source/Target/Process.cpp
Log Message:
-----------
[lldb][NFC] Add helper to compute breakpoint's constituent load address (#190762)
This allows the callsite to be simplified.
This also exposes a bug where the variable `ShouldShowError` is guarding
more than the error printing.
Commit: 24799f17429838bd17c16c43e7ed0e85cff78fd7
https://github.com/llvm/llvm-project/commit/24799f17429838bd17c16c43e7ed0e85cff78fd7
Author: Alex Langford <alangford at apple.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M lldb/packages/Python/lldbsuite/test/lldbutil.py
Log Message:
-----------
Reapply "[lldb] Increase timeout on lldbutil.wait_for_file_on_target" (#190833)
Reapplication notes:
After reviewing the test failures that caused the original reverts, I'm
not convinced that this change is related. None of the test failures
failed while timing out waiting for a file.
Original Summary:
I've been tracking sporadic timeouts waiting for a file to appear on
macOS buildbots (and occasionally local development environments). I
believe I've tracked it down to a regression in process launch
performance in macOS.
What I noticed is that running multiple test suites simultaneously
almost always triggered these failures and that the tests were always
waiting on files created by the inferior. Increasing this timeout no
longer triggers the failures on my loaded machine locally.
This timeout moves from about 16 seconds of total wait time to about 127
seconds of total wait time. This may feel a bit extreme, but this is a
performance issue. While I was here, I cleaned up logging code I was
using to investigate the test failures.
rdar://172122213
Commit: efc0bcdf542475301805ed8478a5d5845f44dc53
https://github.com/llvm/llvm-project/commit/efc0bcdf542475301805ed8478a5d5845f44dc53
Author: David Spickett <david.spickett at arm.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M lldb/include/lldb/Interpreter/CommandReturnObject.h
M lldb/source/Commands/CommandObjectMemory.cpp
M lldb/source/Commands/CommandObjectPlatform.cpp
M lldb/source/Commands/CommandObjectTarget.cpp
M lldb/source/Commands/CommandObjectThread.cpp
M lldb/source/Interpreter/CommandInterpreter.cpp
M lldb/source/Interpreter/CommandReturnObject.cpp
Log Message:
-----------
[lldb] Use GetOutputStream instead of repeated AppendMessageWithFormat (#189674)
AppendMessageWithFormat is odd because it's the only AppendMessage...
method that does not add a newline for you.
This PR changes places that use it to output raw text, or build
up a large message. They now use GetOutputStream() instead,
which makes it a bit clearer that we're building one big message,
and where newlines end up.
This removes the last callers of AppendMessageWithFormat, so I am
removing it too.
Commit: 470ba560b7726c385b2899460151565aca4d89d7
https://github.com/llvm/llvm-project/commit/470ba560b7726c385b2899460151565aca4d89d7
Author: A. Jiang <de34 at live.cn>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M libcxx/include/__memory/shared_ptr.h
M libcxx/test/std/utilities/memory/util.smartptr/util.smartptr.shared/util.smartptr.shared.create/allocate_shared.array.unbounded.pass.cpp
M libcxx/test/std/utilities/memory/util.smartptr/util.smartptr.shared/util.smartptr.shared.create/make_shared.array.unbounded.pass.cpp
Log Message:
-----------
[libc++] Properly calculate rounded-up size for `{allocate,make}_shared` (#190315)
Previously, the allocated size might be a bit too small for certain
cases. This patch makes the size calculated with potentially larger
alignment of the whole control block.
Commit: f89b9a0792d011d41dcae0465e9e14facd073e9d
https://github.com/llvm/llvm-project/commit/f89b9a0792d011d41dcae0465e9e14facd073e9d
Author: Hood Chatham <roberthoodchatham at gmail.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M llvm/lib/Target/WebAssembly/WebAssemblyCFGStackify.cpp
M llvm/test/CodeGen/WebAssembly/cfg-stackify-eh-legacy.ll
M llvm/test/CodeGen/WebAssembly/cfg-stackify-eh.ll
M llvm/test/CodeGen/WebAssembly/exception-legacy.ll
M llvm/test/CodeGen/WebAssembly/exception.ll
Log Message:
-----------
[WebAssembly] Fix: fixCallUnwindMismatches after fixCatchUnwindMismatches (#187484)
`fixCallUnwindMismatches()` adds an extra try block around call sites
with incorrect unwind targets. `fixCatchUnwindMismatches()` handles
catch blocks that have incorrect next unwind destinations. Previously we
ran `fixCallUnwindMismatches()` first and then ran
`fixCatchUnwindMismatches()`. The problem is that
`fixCatchUnwindMismatches()` wraps entire try blocks which can change
the unwind destination of the calls inside. If the calls had an
incorrect unwind target to begin with, they will be wrapped already and
so the outer wrapping won't alter their unwind target. However, if they
start out with a correct unwind target, they won't get wrapped and then
that can be messed up by `fixCatchUnwindMismatches()`.
The fix is to run `fixCatchUnwindMismatches()` first.
`fixCallUnwindMismatches()` never messes up the result of
`fixCatchUnwindMismatches()` so this is the correct order.
Resolves #187302
Commit: d4570181674dd6bfb4c7ac3fe663a2578e7ed3a9
https://github.com/llvm/llvm-project/commit/d4570181674dd6bfb4c7ac3fe663a2578e7ed3a9
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M lldb/packages/Python/lldbsuite/test/make/libcxx-simulators-common/compressed_pair.h
Log Message:
-----------
[lldb][test] Remove libc++ dependency in common libcxx-simulators header (#190922)
After we made the test-suite mostly compile against system libc++ (in
https://github.com/llvm/llvm-project/pull/190034), the `invalid-vector`
test started failing on the macOS bots with:
```
/Applications/Xcode.app/Contents/Developer/Platforms/MacOSX.platform/Developer/SDKs/MacOSX15.2.sdk/usr/include/c++/v1 -std=c++20 --driver-mode=g++ -MT main.o -MD -MP -MF main.d -c -o main.o /Users/ec2-user/jenkins/workspace/llvm.org/lldb-cmake/llvm-project/lldb/test/API/functionalities/data-formatter/data-formatter-stl/libcxx-simulators/invalid-vector/main.cpp
[2026-04-07T00:09:44.764Z] /Users/ec2-user/jenkins/workspace/llvm.org/lldb-cmake/llvm-project/lldb/test/API/functionalities/data-formatter/data-formatter-stl/libcxx-simulators/invalid-vector/main.cpp:6:1: error: too few template parameters in template redeclaration
[2026-04-07T00:09:44.764Z] 6 | template <typename T> struct vector {
[2026-04-07T00:09:44.764Z] | ^~~~~~~~~~~~~~~~~~~~~
[2026-04-07T00:09:44.764Z] /Applications/Xcode.app/Contents/Developer/Platforms/MacOSX.platform/Developer/SDKs/MacOSX15.2.sdk/usr/include/c++/v1/iosfwd:167:1: note: previous template declaration is here
[2026-04-07T00:09:44.764Z] 167 | template <class _Tp, class _Alloc = allocator<_Tp> >
[2026-04-07T00:09:44.764Z] | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
```
This patch fixes the error by removing the STL header includes from the
`compressed_pair.h` header. Presumably the `vector` forward declaration
somehow gets pulled in via one of those headers (via `iosfwd`).
The `libcxx-simulators` tests are supposed to be STL-independent, so
removing this dependency works towards that goal.
Commit: b74ac14362679f5dd74d40d1c04b714b988e8374
https://github.com/llvm/llvm-project/commit/b74ac14362679f5dd74d40d1c04b714b988e8374
Author: Sameer Sahasrabuddhe <sameer.sahasrabuddhe at amd.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/test/CodeGen/AMDGPU/asyncmark-gfx12plus.ll
M llvm/test/CodeGen/AMDGPU/asyncmark-max-pregfx12.ll
M llvm/test/CodeGen/AMDGPU/asyncmark-pregfx12.ll
Log Message:
-----------
[AMDGPU] Fix async operations in GlobalISel on gfx12-plus (#190776)
For GFX1250 async LDS intrinsics, map the LDS pointer operand to VGPR
instead of SGPR. These instructions use $vdst/$vdata (VGPROp_32) for the
LDS address, unlike the pre-GFX12 variants which use M0 (SGPR).
Assisted-By: Claude Opus 4.6
Commit: 3140942ee0cca43976e35e2b9efcb3b0784d1214
https://github.com/llvm/llvm-project/commit/3140942ee0cca43976e35e2b9efcb3b0784d1214
Author: David Spickett <david.spickett at arm.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M lldb/include/lldb/Interpreter/CommandReturnObject.h
M lldb/source/Interpreter/CommandReturnObject.cpp
Log Message:
-----------
[lldb] Remove "AppendNoteWithFormat(" (#190941)
This method is surprising because it does not automatically add a
newline like AppendNoteWithFormatv and other AppendNote... functions.
If you need to manage the newlines yourself, you should add an
equivalent of GetOutputStream for notes. See
efc0bcdf542475301805ed8478a5d5845f44dc53 for examples of that done for
messages.
AppendNoteWithFormat( is not used at all either (there are a few callers
of `AppendNoteWithFormatv(`).
Commit: 2033dc430689b4db6c1b22e87d8f9a61edc9e8f6
https://github.com/llvm/llvm-project/commit/2033dc430689b4db6c1b22e87d8f9a61edc9e8f6
Author: Paul Walker <paul.walker at arm.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/test/CodeGen/AArch64/arm64-vcvt-fptoi.ll
M llvm/test/CodeGen/AArch64/bf16-v8-instructions.ll
M llvm/test/CodeGen/AArch64/faddp-half.ll
M llvm/test/CodeGen/AArch64/fcvt_combine.ll
M llvm/test/CodeGen/AArch64/fmla.ll
M llvm/test/CodeGen/AArch64/vecreduce-fadd.ll
M llvm/test/CodeGen/AArch64/vecreduce-fmul.ll
Log Message:
-----------
[LLVM][CodeGen][AArch64] Replace tablegen based lowering of vector half/bfloat operations. (#190164)
We were essentially doing lowering via instruction selection. This patch
removes the tablegen patterns and modifies their operation actions so
they get lowered in the traditional manner.
Commit: ae825cb8cea7f3ac8e5e4096f22713845cf5e501
https://github.com/llvm/llvm-project/commit/ae825cb8cea7f3ac8e5e4096f22713845cf5e501
Author: Zinovy Nis <zinovy.nis at gmail.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M clang-tools-extra/clang-tidy/modernize/UseStringViewCheck.cpp
M clang-tools-extra/docs/clang-tidy/checks/modernize/use-string-view.rst
M clang-tools-extra/test/clang-tidy/checkers/modernize/use-string-view.cpp
Log Message:
-----------
[clang-tidy] Skip overloaded functions in modernize-use-string-view (#183921)
Commit: 3f3d27b428e44de6209674389f2c6c54374acf11
https://github.com/llvm/llvm-project/commit/3f3d27b428e44de6209674389f2c6c54374acf11
Author: Robert Konicar <rkonicar at mail.muni.cz>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M mlir/include/mlir/IR/EnumAttr.td
M mlir/test/lib/Dialect/Test/TestAttrDefs.td
M mlir/test/lib/Dialect/Test/TestEnumDefs.td
M mlir/test/lib/Dialect/Test/TestOps.td
M mlir/test/mlir-tblgen/enums-gen.td
Log Message:
-----------
[MLIR] Add I{8,16}Enum tablegen classes (#190825)
Add utility tablegen classes for creating 8 and 16 bit enums,
simplifying defining enums that fit into smaller types.
Commit: 73a2b9043ebc9e92fb0dcdeb45dc91fb2abeff4b
https://github.com/llvm/llvm-project/commit/73a2b9043ebc9e92fb0dcdeb45dc91fb2abeff4b
Author: David Spickett <david.spickett at arm.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M lldb/docs/use/aarch64-linux.md
M lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp
M lldb/test/API/linux/aarch64/sme_only_registers/TestSMEOnlyRegisters.py
M llvm/docs/ReleaseNotes.md
Log Message:
-----------
[lldb][AArch64][Linux] Handle SME only and kernels < 6.19 (#189982)
Part of #138717.
The feature we need to use to restore non-streaming mode after an
expression enters streaming mode was only added recently in kernel 6.19.
There is no other way to restore this state, so I have adjusted the code
to use the normal FP restore path for every state other than: on an SME
only system and in streaming mode and restoring non-streaming state
If that fails, we're on < 6.19 and all we can do is accept it and
restore the rest of the register state.
I've updated the tests to check kernel version and for < 6.19 remove any
expression tests that hit this specific state. I could have set up
expected state for them, but it's basically undefined behaviour, and I
think it would make the already complex tests even worse.
Documentation now mentions the required version, and release notes link
to that documentation.
Tested on an ARM FVP configured to SME only with kernel 6.18 and 6.19,
and a Graviton 3 with only SVE.
Commit: ddb9ede93313a787dfe8b40748c3c2a530024f76
https://github.com/llvm/llvm-project/commit/ddb9ede93313a787dfe8b40748c3c2a530024f76
Author: Paul Walker <paul.walker at arm.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M llvm/lib/Transforms/Instrumentation/NumericalStabilitySanitizer.cpp
M llvm/test/Instrumentation/NumericalStabilitySanitizer/non_float_store.ll
Log Message:
-----------
[LLVM][NumericalStabilitySanitizer] Extend shadow value tracking to support vector ConstantInts. (#190794)
Commit: ac9c8d11a8fe2c24c5fa20d0d705cd892c14ea12
https://github.com/llvm/llvm-project/commit/ac9c8d11a8fe2c24c5fa20d0d705cd892c14ea12
Author: Sergei Barannikov <barannikov88 at gmail.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M lldb/source/Expression/DWARFExpression.cpp
Log Message:
-----------
[lldb] Replace C-style casts with static_cast in DWARFExpression.cpp (NFC) (#190949)
Suggested in #190556.
Commit: 7ca5698b4c3698d06065e0941df7f23d72913d23
https://github.com/llvm/llvm-project/commit/7ca5698b4c3698d06065e0941df7f23d72913d23
Author: Martin Storsjö <martin at martin.st>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M lld/COFF/InputFiles.cpp
M lld/test/COFF/gnu-weak.test
A lld/test/COFF/weak-preference.test
Log Message:
-----------
[LLD] [COFF] Make weak aliases to implementations take priority over null pointers (#190491)
Normally, one uses weak aliases in one out of two ways.
Either one uses weak definitions to let a weak definition work as
fallback if a strong definition isn't available (which works with
link.exe as well), or as a sort of selectany COMDAT, to let multiple
weak definitions coexist, letting the linker pick any of them. (This
isn't supported by MS link.exe, but requires the LLD extension option
-lld-allow-duplicate-weak, normally implied by the mingw mode.)
Or, one uses weak references, to let a referencing translation unit
check at runtime, whether a symbol was found (at link time) or not,
optionally using the symbol.
In the latter case, the referencing object file provides a fallback
value for the weak symbol, as an absolute null symbol.
Previously, if we had multiple weak externals for the same symbol, we'd
pick any (the first one in practice); this is compatible with either of
the use cases above.
However if both use cases are combined, then we suddenly have multiple
conflicting weak externals for the same symbol; both one (or more)
symbols providing a fallback implementation for the symbol, and the
referencer that provides an absolute null pointer for the symbol.
In these cases, instead of just picking whichever choice the linker saw
first, prefer actual concrete implementations over the absolute null
symbol.
For mingw mode, this makes linking a translation unit referencing a
symbol declared with `__attribute__((weak))` work consistently if
linking it against another translation unit providing that symbol
defined with `__attribute__((weak))`, regardless of the order that those
two object files are linked.
Commit: bc057a38b1b66a27e0c976b544c73ff34fe9eb3a
https://github.com/llvm/llvm-project/commit/bc057a38b1b66a27e0c976b544c73ff34fe9eb3a
Author: Paul Walker <paul.walker at arm.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/test/CodeGen/AArch64/sve-fixed-length-fp-to-int.ll
M llvm/test/CodeGen/AArch64/sve-fixed-length-int-div.ll
M llvm/test/CodeGen/AArch64/sve-fixed-length-int-rem.ll
Log Message:
-----------
[LLVM][CodeGen][AArch64] Improve generated code for SVE VLS truncates. (#190778)
When SVE VLS is enabled we request custom lowering for all ISD::TRUNCATE
operations involving legal types. However, we only custom lower all of
them when NEON is not available and so there are variants that do not
require SVE and can be done via NEON but we are instead falling back to
default expansion, which is this case means scalarisation. This patch
updates custom lowering to mark the variants that have isel patterns
available.
Commit: b384622f61e8ced35b80d9cc02a0c47c0778b878
https://github.com/llvm/llvm-project/commit/b384622f61e8ced35b80d9cc02a0c47c0778b878
Author: Martin Storsjö <martin at martin.st>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M lld/COFF/SymbolTable.cpp
M lld/test/COFF/export-all-conflict.test
Log Message:
-----------
[LLD] [COFF] Explicitly prefer def files and export directives over /export-all-symbols (#190749)
If a def file is specified (or explicit export directives), they should
be preferred over exports from /export-all-symbols. There is no need to
warn about conflicts in these cases, just make a clear preference and
ignore the export with lower preference.
Commit: 66eae4245dfe7177f9a5681912a6dedc14755d05
https://github.com/llvm/llvm-project/commit/66eae4245dfe7177f9a5681912a6dedc14755d05
Author: Sergei Barannikov <barannikov88 at gmail.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M lldb/include/lldb/Expression/DWARFExpression.h
M lldb/source/Expression/CMakeLists.txt
M lldb/source/Expression/DWARFExpression.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFUnit.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFUnit.h
M lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARF.h
M lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARFDwo.cpp
M lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARFDwo.h
M lldb/source/Plugins/SymbolFile/DWARF/SymbolFileWasm.cpp
M lldb/source/Plugins/SymbolFile/DWARF/SymbolFileWasm.h
M lldb/unittests/Expression/DWARFExpressionTest.cpp
M llvm/include/llvm/DebugInfo/DWARF/LowLevel/DWARFExpression.h
Log Message:
-----------
[lldb] Use llvm::DWARFExpression::iterator in DWARFExpression::Evaluate (#190556)
Co-authored-by: Jonas Devlieghere <jonas at devlieghere.com>
Commit: db61d1c24512f106d2c7392e5a7dcb499418e39a
https://github.com/llvm/llvm-project/commit/db61d1c24512f106d2c7392e5a7dcb499418e39a
Author: Lang Hames <lhames at gmail.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M orc-rt/include/orc-rt/QueueingTaskDispatcher.h
M orc-rt/lib/executor/QueueingTaskDispatcher.cpp
M orc-rt/unittests/QueueingTaskDispatcherTest.cpp
Log Message:
-----------
[orc-rt] Refactor QueueingTaskDispatcher to use an external TaskQueue. (#190920)
QueueingTaskDispatcher now takes a TaskQueue by reference rather than
maintaining an internal queue. This lets API clients retain direct
access to the queue after transferring dispatcher ownership to the
Session.
TaskQueue operations (takeFirstIn, takeLastIn) are blocking: callers
wait until a task arrives or the queue is shut down. This enables a
simple client idiom:
```
QueueingTaskDispatcher::TaskQueue TQ;
Session S(std::make_unique<QueueingTaskDispatcher>(TQ), ...);
S.attach(<controller access>);
while (auto T = TQ.takeFirstIn())
T->run();
```
Commit: ada53836f39434770625149002e7d955c381aee0
https://github.com/llvm/llvm-project/commit/ada53836f39434770625149002e7d955c381aee0
Author: David Spickett <david.spickett at arm.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M lldb/test/API/linux/aarch64/sme_only_registers/TestSMEOnlyRegisters.py
A lldb/test/API/linux/aarch64/sme_only_registers/core_simd_on_32
A lldb/test/API/linux/aarch64/sme_only_registers/core_streaming_off_64
M lldb/test/API/linux/aarch64/sme_only_registers/main.c
Log Message:
-----------
[lldb][AArch64][Linux] Add tests for SME only core files (#189985)
Part of #138717.
This did not require any changes to core file handling. Since a static
snapshot of an SME only system looks pretty much the same as one from
the same state on a system with SVE and SME.
For this reason, we're only testing 2 combinations. In total these
include streaming and non-streaming, ZA on and off, and 2 different
vector lengths. I think this is enough to prove that the existing code
is working.
Commit: 5616ad71697e3ef2ab97a937250e9193eee5713d
https://github.com/llvm/llvm-project/commit/5616ad71697e3ef2ab97a937250e9193eee5713d
Author: Lewis Crawford <lcrawford at nvidia.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M llvm/lib/Analysis/ConstantFolding.cpp
M llvm/lib/Target/NVPTX/NVPTXTargetTransformInfo.cpp
M llvm/test/CodeGen/NVPTX/math-intrins-sm80-ptx70-instcombine.ll
M llvm/test/Transforms/InstCombine/NVPTX/nvvm-intrins.ll
Log Message:
-----------
[NVPTX] Lower nvvm.fmax to maximumnum not maxnum (#189976)
Converting nvvm.{fmin/fmax} into llvm.{min/max}num is slightly
incorrect, as {min/max}(a, sNaN) should produce "a" according to the PTX
spec, but LLVM's {min/max}num intrinsics may return either NaN or "a".
Use the {min/max}imumnum intrinsics instead for correct sNaN behaviour.
Also tidy up NVVM FMin/FMax constant-folding using these tighter
definitions of how the NVVM intrinsics map to {min/max}imum and
{min/max}imumnum.
Commit: daf7a8f835c6c385934d73e67bafbf81daaebf5e
https://github.com/llvm/llvm-project/commit/daf7a8f835c6c385934d73e67bafbf81daaebf5e
Author: Rafał Rudnicki <rafal.rudnicki at intel.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUMCInstLower.cpp
M llvm/lib/Target/AMDGPU/AMDGPURewriteAGPRCopyMFMA.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
A llvm/test/CodeGen/AMDGPU/inline-asm-vgpr-range-unsupported-width.ll
Log Message:
-----------
AMDGPU coverity fixes (#182013)
Coverity fixes
Commit: 903cfcf1fe19a01443dce38d68d9b5e5bd730c83
https://github.com/llvm/llvm-project/commit/903cfcf1fe19a01443dce38d68d9b5e5bd730c83
Author: Prerona Chaudhuri <43287592+pchaudhuri-nv at users.noreply.github.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M llvm/include/llvm/IR/IntrinsicsNVVM.td
A llvm/test/CodeGen/NVPTX/dead-shfl.ll
Log Message:
-----------
[NVVM] Update properties for non-sync variants of the SHFL intrinsics (#189615)
Non-sync SHFL variants (shfl without .sync) are pure functions of their SSA operands and the active thread mask. Assign IntrReadMem, IntrInaccessibleMemOnly and IntrWillReturn so that: - Reading the implicit mask state is modeled for correct ordering with other convergent operations - Truly dead non-sync shfl code can still be DCE'd
Sync SHFL variants keep IntrInaccessibleMemOnly (no IntrReadMem, no IntrWillReturn) to model synchronization side effects and prevent unsafe DCE/reordering.
Commit: c7c340b41e4fe424f0f5f68be2f2812ac6d17b41
https://github.com/llvm/llvm-project/commit/c7c340b41e4fe424f0f5f68be2f2812ac6d17b41
Author: Lakreite <lakreite at gmail.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
A llvm/test/CodeGen/AMDGPU/amdgpu-simplify-demanded-bits-for-target-node.ll
R llvm/test/CodeGen/AMDGPU/amdgpu-simplify-demanded-bits-readfirstlane.ll
M llvm/test/CodeGen/AMDGPU/fix-sgpr-copies-wwm.ll
M llvm/test/CodeGen/AMDGPU/fix-wwm-vgpr-copy.ll
Log Message:
-----------
[AMDGPU][CodeGen] Implement SimplifyDemandedBitsForTargetNode for readlane, wwm and set.inactive intrinsics. (#190830)
Propagate demanded bits through readlane, wwm, set.inactive intrinsics
in AMDGPUISelLowering in SimplifyDemandedBitsForTargetNode.
This allows upstream zero/sign extensions to be eliminated when only a
subset of bits is used after intrinsics.
Partially addresses https://github.com/llvm/llvm-project/issues/128390.
Commit: 9e428b7e41ee891cddc911fb70bc23b4997e1d9b
https://github.com/llvm/llvm-project/commit/9e428b7e41ee891cddc911fb70bc23b4997e1d9b
Author: Nathan Gauër <brioche at google.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M llvm/docs/ProgrammersManual.rst
M llvm/include/llvm/Support/Error.h
M llvm/unittests/Support/ErrorTest.cpp
Log Message:
-----------
[LLVM][Support] add nonNull function helper (#188718)
We often see a pattern like:
```
T *ptr = doSomething()
assert(ptr && "doSomething() shouldn't return nullptr");
```
We also have functions like `cantFail`, but those are working with
Expected types.
This commits adds a `nonNull` function, which can be used inline. In
practice, one could use:
```
T *ptr = cast<T>(functionReturningT());
```
But it conveys the meaning that `functionReturningT` might return a
subtype/supertype that we actually cast.
Function behaves like the other error kinds: calls llvm_unreachable,
which may or may not trap depending on the build options. Calling this
function with `nullptr` won't build, but it makes no sense to do so.
---------
Co-authored-by: Jakub Kuderski <kubakuderski at gmail.com>
Commit: ab6394d21a595cf95cb1429a2f0e5779959abce1
https://github.com/llvm/llvm-project/commit/ab6394d21a595cf95cb1429a2f0e5779959abce1
Author: Stefan Gränitz <stefan.graenitz at gmail.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M lldb/source/Plugins/SymbolLocator/SymStore/SymbolLocatorSymStore.cpp
M lldb/test/API/symstore/TestSymStore.py
A llvm/include/llvm/Support/HTTP/StreamedHTTPResponseHandler.h
M llvm/lib/Debuginfod/Debuginfod.cpp
M llvm/lib/Support/HTTP/CMakeLists.txt
A llvm/lib/Support/HTTP/StreamedHTTPResponseHandler.cpp
Log Message:
-----------
[lldb] Bring Debuginfod's StreamedHTTPResponseHandler to SymbolLocatorSymStore (#187687)
SymbolLocatorSymStore used a simple local implementation of
HTTPResponseHandler so far. That was fine for basic usage, but it would
cause issues down the line. This patch hoists the
StreamedHTTPResponseHandler class from libDebuginfod to SupportHTTP and
integrates it in SymbolLocatorSymStore. PDB file downloads will now be
buffered on disk, which is necessary since they can be huge.
We use the opportunity an stop logging 404 responses (file not found on
server) and print warnings for all other erroneous HTTP responses. It
was more complicated before, because the old response handler created
the underlying file in any case. The new one does that only once the
first content package comes in.
Commit: f65341ccfd3f5fbd25663a2d0509ab8d8b9a7a39
https://github.com/llvm/llvm-project/commit/f65341ccfd3f5fbd25663a2d0509ab8d8b9a7a39
Author: zGoldthorpe <Zach.Goldthorpe at amd.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/test/CodeGen/AMDGPU/frem.ll
M llvm/test/CodeGen/AMDGPU/fsqrt.f64.ll
M llvm/test/CodeGen/AMDGPU/llvm.frexp.ll
M llvm/test/CodeGen/AMDGPU/rsq.f64.ll
A llvm/test/CodeGen/AMDGPU/setcc-f64-hi32mask.ll
Log Message:
-----------
[AMDGPU][ISel] Reduce `f64` compare to integer compare of upper half (#188356)
Truncate `f64` `setcc`s to upper 32-bit operands where possible.
These transformations are analogous to those in #181238, but for ordered
and unordered fp comparisons.
Fixes #187996.
Alive2 verification of transformations:
- For `eq` / `ne`: [ZRciR6](https://alive2.llvm.org/ce/z/ZRciR6)
- For `lt` / `ge`: [RDGnqr](https://alive2.llvm.org/ce/z/RDGnqr)
- For `le` / `gt`: [v0jlD5](https://alive2.llvm.org/ce/z/v0jlD5)
Commit: 39c6ed3d080435426d606db70ecceda1cce311bb
https://github.com/llvm/llvm-project/commit/39c6ed3d080435426d606db70ecceda1cce311bb
Author: alowqie <areida at pm.me>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenBuilder.h
M clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp
M clang/test/CodeGen/AArch64/neon-intrinsics.c
M clang/test/CodeGen/AArch64/neon/intrinsics.c
Log Message:
-----------
[CIR][AArch64] add vshr_* builtins (#186693)
Part of https://github.com/llvm/llvm-project/issues/185382
- Moved lowering logic from clangir incubator to upstream
- Added tests, partially reusing tests from
[neon-intrinsics.c](https://github.com/llvm/llvm-project/blob/main/clang/test/CodeGen/AArch64/neon-intrinsics.c)
and
[neon.c](https://github.com/llvm/clangir/blob/main/clang/test/CIR/CodeGen/AArch64/neon.c)
- Made sure that all intrinsics from [Neon
ACLE](https://arm-software.github.io/acle/neon_intrinsics/advsimd.html#vector-shift-right)
are implemented and tested
Commit: 68f138b904588cb33b084ef09726f174db1809d1
https://github.com/llvm/llvm-project/commit/68f138b904588cb33b084ef09726f174db1809d1
Author: Graham Hunter <graham.hunter at arm.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp
M llvm/test/Transforms/InstCombine/truncating-saturate.ll
Log Message:
-----------
[InstCombine] Match a new form of truncating saturation (#189703)
This matches a pattern that clamps an integer value to the range for an
integer type with a smaller bitwidth, before truncating to that type.
alive2: https://alive2.llvm.org/ce/z/WPfmyS
Commit: 1f1ea1ae4151746a03d43cb7b55411d3bd7878bf
https://github.com/llvm/llvm-project/commit/1f1ea1ae4151746a03d43cb7b55411d3bd7878bf
Author: Kai Nacke <kai.peter.nacke at ibm.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
R clang/include/clang/Basic/BuiltinsSystemZ.def
A clang/include/clang/Basic/BuiltinsSystemZ.td
M clang/include/clang/Basic/CMakeLists.txt
M clang/include/clang/Basic/TargetBuiltins.h
M clang/include/module.modulemap
M clang/lib/Basic/Targets/SystemZ.cpp
M clang/utils/TableGen/ClangBuiltinsEmitter.cpp
Log Message:
-----------
[SystemZ] Migrate BuiltinsSystemZ.def to TableGen (#190232)
Migrates BuiltinsSystemZ.def to BuiltinsSystemZ.td, and makes the
necessary code updates. It also introduce type `__uint128_t` to the
TableGen emitter, to have a type for the encoding `ULLLi`.
Migration was done with the help of a script generated by IBM Bob.
Commit: de0cb1cd04891ee7024667ef97e5f30af8a9ff47
https://github.com/llvm/llvm-project/commit/de0cb1cd04891ee7024667ef97e5f30af8a9ff47
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M lldb/include/lldb/Target/Process.h
M lldb/source/Plugins/LanguageRuntime/ObjC/AppleObjCRuntime/AppleObjCRuntimeV2.cpp
M lldb/source/Target/Process.cpp
M lldb/unittests/Target/MemoryTest.cpp
Log Message:
-----------
[lldb] Upstream and adopt ReadUnsignedIntegersFromMemory in AppleObjCRuntimeV2 (#190564)
This PR upstreams ReadUnsignedIntegersFromMemory, which uses the
MultiMemRead packet to speed up reading unsigned numbers from memory.
Felipe landed this on Github because we didn't have a use-case for it
upstream, until now, which uses it to batch up reading ObjC runtime
symbols.
Commit: f73f8754cabd4caf3c9989d8f542d2b9a9f85d07
https://github.com/llvm/llvm-project/commit/f73f8754cabd4caf3c9989d8f542d2b9a9f85d07
Author: lonely eagle <2020382038 at qq.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M mlir/lib/Transforms/CSE.cpp
M mlir/test/Transforms/cse.mlir
Log Message:
-----------
[mlir][CSE] Delete dead code immediately in CSE pass (#190926)
This PR addresses an issue where dead code within a region prevents
essentially identical region ops from being CSE'd. Currently, CSE only
removes dead ops at the end of the pass. This PR fixes the issue by
deleting dead code immediately upon encounter.
Commit: 73e2b0e64186e2386d777e936c92bb25a995a0f4
https://github.com/llvm/llvm-project/commit/73e2b0e64186e2386d777e936c92bb25a995a0f4
Author: adams381 <adams at nvidia.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIRTypes.td
M clang/lib/CIR/CodeGen/CIRGenTypes.cpp
M clang/lib/CIR/Dialect/IR/CIRTypes.cpp
A clang/test/CIR/CodeGen/bitint.c
M clang/test/CIR/CodeGenBuiltins/builtins-overflow.cpp
A clang/test/CIR/IR/bitint.cir
M clang/test/CIR/global-var-simple.cpp
Log Message:
-----------
[CIR][ABI] Add _BitInt flag to IntType (#188113)
Add an optional `bitint` parameter to `cir::IntType` so CIR can
distinguish `_BitInt(N)` from builtin integer types like `__int128`.
Both lower to the same LLVM integer type, but they have different ABI
rules (alignment, passing convention) on x86_64.
The flag is set during CIRGen for `Type::BitInt`, printed/parsed as
`!cir.int<s, 128, bitint>`, and excluded from `isFundamental()`.
Existing 2-arg `IntType::get()` calls continue to work via a default
parameter.
Commit: 2dae0f61cf845d50368f4f5bc9d3e3f92fc41138
https://github.com/llvm/llvm-project/commit/2dae0f61cf845d50368f4f5bc9d3e3f92fc41138
Author: Wendi <uwendi at gmail.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M llvm/docs/QualGroup.rst
Log Message:
-----------
[QualGroup][docs] Clarify biannual membership review and active contributor status (#185884)
This patch updates the LLVM Qualification Group page to reflect the
outcome of the first biannual membership review (Feb 2026).
Changes include:
- clarifying that the members table reflects active contributors,
- removing non-active contributors from the active members list,
- distinguishing active contributors from observers / interested
participants,
- updating the membership review section to describe the biannual review
process.
This is a documentation/process update only.
Commit: 7cb66a448ace7ae2acd84e7e9bec73cfc560efe0
https://github.com/llvm/llvm-project/commit/7cb66a448ace7ae2acd84e7e9bec73cfc560efe0
Author: Fernando Pelliccioni <fpelliccioni at gmail.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M libcxx/docs/Status/Cxx2cIssues.csv
M libcxx/include/__new/placement_new_delete.h
M libcxx/include/new
M libcxx/test/std/language.support/support.dynamic/new.delete/new.delete.placement/new.pass.cpp
M libcxx/test/std/language.support/support.dynamic/new.delete/new.delete.placement/new_array.pass.cpp
Log Message:
-----------
[libc++] Implement LWG4477: placement operator delete should be constexpr (#189915)
Implement the proposed resolution of
[LWG4477](https://cplusplus.github.io/LWG/issue4477).
P2747R2 made placement `operator new` constexpr since C++26, but the
corresponding placement `operator delete` was not. When a constructor
throws during placement new in a constant expression, the placement
delete is invoked and fails because it's not constexpr.
Add `_LIBCPP_CONSTEXPR_SINCE_CXX26` to placement `operator delete(void*,
void*)` and `operator delete[](void*, void*)`.
Closes #189843
Commit: e8606ab23ea1dfbafbd8af0356f7ccede2c67503
https://github.com/llvm/llvm-project/commit/e8606ab23ea1dfbafbd8af0356f7ccede2c67503
Author: forking-google-bazel-bot[bot] <265904573+forking-google-bazel-bot[bot]@users.noreply.github.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/clang/BUILD.bazel
Log Message:
-----------
[Bazel] Fixes 1f1ea1a (#190971)
This fixes 1f1ea1ae4151746a03d43cb7b55411d3bd7878bf.
Co-authored-by: Google Bazel Bot <google-bazel-bot at google.com>
Commit: 5fe235b9862f7fb87012eb06bd71890fa5f41736
https://github.com/llvm/llvm-project/commit/5fe235b9862f7fb87012eb06bd71890fa5f41736
Author: Brian Cain <brian.cain at oss.qualcomm.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M bolt/lib/Rewrite/RewriteInstance.cpp
Log Message:
-----------
[BOLT] Fix strict weak ordering in getCodeSections comparator (#190905)
The compareSections lambda in getCodeSections() violates the strict weak
ordering requirement: when A == B, the comparator can return true (e.g.
via the HotText mover name check), which triggers a _GLIBCXX_DEBUG
assertion on self-comparison.
Add an early identity check to satisfy irreflexivity.
Commit: 49094aff8f03413adcd6463b9c5afadcddc83893
https://github.com/llvm/llvm-project/commit/49094aff8f03413adcd6463b9c5afadcddc83893
Author: Tom Eccles <tom.eccles at arm.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M mlir/include/mlir/Dialect/OpenMP/OpenMPOps.td
M mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
M mlir/test/Dialect/OpenMP/invalid.mlir
Log Message:
-----------
[mlir][OpenMP] Don't allow loop bounds/step from inside the task (#190827)
The omp.taskloop.context region represents what goes inside the outlined
task function. The loop bounds must be passed to the OpenMP runtime call
for taskloop and so this cannot be supported in general.
In a follow up patch I will re-allow pure operations because sinking
constants inside of the tasklooop context will be useful for something
else I am prototyping.
Assisted-by: codex
Commit: 4b00302c99e034777568e943cbdadaa7b47d8c9d
https://github.com/llvm/llvm-project/commit/4b00302c99e034777568e943cbdadaa7b47d8c9d
Author: Ramkumar Ramachandra <artagnon at tenstorrent.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanAnalysis.cpp
M llvm/unittests/Transforms/Vectorize/VPDomTreeTest.cpp
Log Message:
-----------
[VPlan] Strip VPDT-assert forbidding replicate regions (#189342)
VPDominatorTree::properlyDominates currently unnecessarily forbids
replicate regions, as there is no such limitation either in the parent
DominatorTree, or in VPlanCFG. Strip the assert entirely.
Commit: 857edabe190323bc98c14642c907e8e4762ce272
https://github.com/llvm/llvm-project/commit/857edabe190323bc98c14642c907e8e4762ce272
Author: David Spickett <david.spickett at arm.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M lldb/source/Commands/CommandObjectCommands.cpp
M lldb/source/Commands/CommandObjectDisassemble.cpp
M lldb/source/Commands/CommandObjectMemory.cpp
M lldb/source/Commands/CommandObjectProcess.cpp
M lldb/source/Commands/CommandObjectSource.cpp
M lldb/source/Commands/CommandObjectTarget.cpp
M lldb/source/Commands/CommandObjectType.cpp
Log Message:
-----------
[lldb] Convert AppendWarningWithFormat( calls to AppendWarningWithFormatv( (#190951)
The former does not automatically add a newline like the majority of the
other AppendSomethingWithSomething calls do.
So this PR changes all but 1 use of that function to the Formatv version
and removes the explicit newline from the format strings. I also took
advantage of Formatv's ability to handle StringRef and std::string
automatically.
There is one use of AppendWarningWithFormat left, which I will address
in a follow up since it's not so straightforward.
Commit: fba30d5b089e2cd89c45048c0ba64421f03115d4
https://github.com/llvm/llvm-project/commit/fba30d5b089e2cd89c45048c0ba64421f03115d4
Author: David Spickett <david.spickett at arm.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M lldb/include/lldb/Interpreter/CommandReturnObject.h
M lldb/source/Commands/CommandObjectProcess.cpp
M lldb/source/Interpreter/CommandReturnObject.cpp
Log Message:
-----------
[lldb] Remove last use of AppendWarningWithFormat( (#190958)
And remove the function entirely as there are now no
callers.
This last use of AppendWarningWithFormat does not
include a newline in the format string, but I suspect
that it should have done, so I am ok to convert it.
It was added by 56535a090d91ff10a60c884bacbd314dcf9659db,
and the other branches of the if/else will add newlines.
Also it seems like an important message that would benefit
from being on its own line.
There are no tests that expect this specific message,
which makes some sense as it seems to have been added
to cover a race condition that only sometimes happens.
Commit: 96b9266fdaa5b89d8a2f09c162de5404073bc693
https://github.com/llvm/llvm-project/commit/96b9266fdaa5b89d8a2f09c162de5404073bc693
Author: Tomohiro Kashiwada <kikairoya at gmail.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M clang/include/clang/ScalableStaticAnalysisFramework/Core/TUSummary/ExtractorRegistry.h
M clang/lib/ScalableStaticAnalysisFramework/Core/TUSummary/ExtractorRegistry.cpp
M llvm/include/llvm/Support/Registry.h
Log Message:
-----------
[LLVM][Support] Enforce proper instantiations of `Registry<T>` (#185141)
Commit: b17f85c680de3c66b089727837f61cc0504ad215
https://github.com/llvm/llvm-project/commit/b17f85c680de3c66b089727837f61cc0504ad215
Author: Med Ismail Bennani <ismail at bennani.ma>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M lldb/test/API/functionalities/scripted_frame_provider/thread_filter/TestFrameProviderThreadFilter.py
M lldb/test/API/functionalities/scripted_frame_provider/thread_filter/main.cpp
Log Message:
-----------
[lldb/test] Replace pause() with atomic barrier in thread_filter test (#190917)
The TestFrameProviderThreadFilter test was crashing on the ARM Ubuntu CI
with an assertion in StackFrameList::GetFrameAtIndex ("A valid thread
has no frames."):
https://lab.llvm.org/buildbot/#/builders/18/builds/25501
On ARM Linux, the debugger's stop/resume cycle can cause pause() to
return (EINTR from ptrace signals), letting threads exit before the test
accesses their frames.
Replace pause() with an atomic spin-loop barrier that keeps all threads
alive in userspace at a known, unwinding-friendly location.
Signed-off-by: Med Ismail Bennani <ismail at bennani.ma>
Commit: b6b7f3167bc9def81803d4d4fbf2f03f598d59e4
https://github.com/llvm/llvm-project/commit/b6b7f3167bc9def81803d4d4fbf2f03f598d59e4
Author: Brian Cain <brian.cain at oss.qualcomm.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M clang/lib/Driver/ToolChains/Hexagon.cpp
M clang/test/Driver/hexagon-toolchain-linux.c
Log Message:
-----------
[Hexagon] Add sanitizer-aware library paths for Linux/musl targets (#190267)
When compiling with -fsanitize=memory or -fsanitize=address on
hexagon-unknown-linux-musl, the driver now prepends sanitizer-specific
library paths (e.g. $SYSROOT/usr/lib/msan/) before the normal
$SYSROOT/usr/lib/ so that instrumented libraries (libc, libc++, etc.)
are found first by the linker.
Commit: 9a81d3995949135935602557702abc3cf28d3a40
https://github.com/llvm/llvm-project/commit/9a81d3995949135935602557702abc3cf28d3a40
Author: Zhihui Yang <youngwisdm at gmail.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp
M clang/test/CodeGen/AArch64/neon-intrinsics.c
M clang/test/CodeGen/AArch64/neon/intrinsics.c
Log Message:
-----------
[CIR][AArch64] Upstream NEON Minimum (#187935)
Part of https://github.com/llvm/llvm-project/issues/185382
Added intrinsics for
vmin_*
vminq_*
vminnm_*
vminnmq_*
Commit: abd502a44e5ef19a302d943eeb017c29124b96e9
https://github.com/llvm/llvm-project/commit/abd502a44e5ef19a302d943eeb017c29124b96e9
Author: Zile Xiong <xiongzile at bytedance.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M llvm/lib/Target/X86/X86ISelLoweringCall.cpp
M llvm/test/CodeGen/X86/musttail-struct.ll
Log Message:
-----------
[X86] Fix missing ByValTemporaries update in CopyViaTemp path for musttail calls (#190540)
This fixes a miscompilation in musttail calls with byval arguments on
X86.
In the CopyViaTemp path, a temporary stack object is created and the
argument is copied into it.
However, the temporary is not recorded in ByValTemporaries,
so the final lowering phase does not emit the copy to the real outgoing
argument slot.
As a result, the callee may read incorrect values from the stack.
Fix this by recording the temporary in ByValTemporaries so that the
final lowering step correctly copies the argument to the expected stack
location.
Reproducer: https://github.com/llvm/llvm-project/issues/190429
Commit: ecbba86f5984f45f65dff3da0c1e2dc5e31f457e
https://github.com/llvm/llvm-project/commit/ecbba86f5984f45f65dff3da0c1e2dc5e31f457e
Author: vangthao95 <vang.thao at amd.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.gws.init.ll
Log Message:
-----------
[AMDGPU][NFC] Auto-generate ds.gws.init test checks (#190811)
Update ds.gws.init to use auto-generated checks. Missed this test in the
previous pre-commit.
Commit: 5c8c4d8fde0b28135ef071827c6d60ddac5766dc
https://github.com/llvm/llvm-project/commit/5c8c4d8fde0b28135ef071827c6d60ddac5766dc
Author: Chinmay Deshpande <chdeshpa at amd.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeHelper.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.wmma_32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.wmma_64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w64-imm.ll
Log Message:
-----------
[AMDGPU][GISel] RegBankLegalize support for WMMA intrinsics (#190724)
Commit: f3155f00c95916ab9a8800f2c03fdf533f8ada72
https://github.com/llvm/llvm-project/commit/f3155f00c95916ab9a8800f2c03fdf533f8ada72
Author: Deric C. <cheung.deric at gmail.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M clang/include/clang/Basic/HLSLIntrinsics.td
M clang/lib/Headers/hlsl/hlsl_alias_intrinsics.h
M clang/test/SemaHLSL/WaveBuiltinAvailability.hlsl
M clang/test/TableGen/hlsl-intrinsics.td
M clang/utils/TableGen/HLSLEmitter.cpp
Log Message:
-----------
[HLSL] Add missing Shader Model 6.0 availability for wave intrinsics (#189445)
Depends on PR #188814 to be merged first.
This PR fixes Shader Model availability for HLSL wave intrinsics so that
they all require at least SM 6.0.
Furthermore, there wasn't an easy way to specify Shader Model 6.0
availability while maintaining the requirement for Shader Model 6.2 when
16-bit types is enabled and the overload uses half types.
To fix the issue, this PR extends `_HLSL_16BIT_AVAILABILITY` to accept a
3rd optional argument that specifies the Shader Model availability when
16-bit types is disabled.
Example:
```hlsl
// If 16-bit types is enabled, require SM 6.2. Else, require SM 6.0 otherwise.
_HLSL_16BIT_AVAILABILITY(shadermodel, 6.2, 6.0)
_HLSL_BUILTIN_ALIAS(__builtin_hlsl_wave_active_all_equal)
__attribute__((convergent)) bool WaveActiveAllEqual(half);
```
The new `hlsl_alias_intrinsics_gen.inc`:
https://gist.github.com/Icohedron/a6e88efd56de384659efd3314c43851f
Assisted-by: GitHub Copilot
Commit: cd66d79be19b6db00500ba4508b3946ef1caec88
https://github.com/llvm/llvm-project/commit/cd66d79be19b6db00500ba4508b3946ef1caec88
Author: pkarveti <pkarveti at qti.qualcomm.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M llvm/lib/Target/Hexagon/HexagonMachineFunctionInfo.cpp
M llvm/lib/Target/Hexagon/HexagonMachineFunctionInfo.h
M llvm/lib/Target/Hexagon/HexagonRegisterInfo.cpp
M llvm/lib/Target/Hexagon/HexagonTargetMachine.cpp
M llvm/lib/Target/Hexagon/HexagonTargetMachine.h
M llvm/test/CodeGen/Hexagon/aligna-prologue-expansion.mir
Log Message:
-----------
[Hexagon][MIR] Serialize HexagonMachineFunctionInfo::StackAlignBaseReg to MIR (#190003)
This patch adds serialization of HexagonMachineFunctionInfo::StackAlignBaseReg
into MIR. This field stores the physical register used as the aligned-stack base pointer
when a function has both variable-sized stack objects and requires stack
alignment greater than the default.
This replaces the workaround from commit 2e10b6299591 ("[Hexagon] Add AP
register to liveins when used for frame index access") which manually added
AP to liveins. That approach was incorrect because it only updated one
block without updating predecessors, breaking liveness invariants.
Commit: 7056d00090d037469ef304794bf685e79c749886
https://github.com/llvm/llvm-project/commit/7056d00090d037469ef304794bf685e79c749886
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/test/Transforms/InstCombine/clamp-to-minmax.ll
Log Message:
-----------
[InstCombine][ValueTracking] Add m_FMinNum and m_FMaxNum to matchFastFloatClamp. (#188149)
This allows us to recognize clamp patterns if the first part of the
clamp has been turned into minnum/maxnum.
Commit: 0030f5996a690eb539f76fc0075d7d7831b36458
https://github.com/llvm/llvm-project/commit/0030f5996a690eb539f76fc0075d7d7831b36458
Author: Kyungtak Woo <kevinwkt at google.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64.h
M llvm/lib/Target/AArch64/AArch64PassRegistry.def
M llvm/lib/Target/AArch64/AArch64RedundantCopyElimination.cpp
M llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
M llvm/test/CodeGen/AArch64/machine-copy-remove.mir
M llvm/test/CodeGen/AArch64/machine-zero-copy-remove.mir
Log Message:
-----------
[NewPM] Port AArch64RedundantCopyElimination (#190582)
Adds a newPM pass for AArch64RedundantCopyElimination
- Refactors base logic into an Impl class
- Renames old pass with the "Legacy" suffix
- Adds the new pass manager pass using refactored logic
- Updated existing .mir tests to also test with the New Pass Manager.
Context and motivation in
https://llvm.org/docs/NewPassManager.html#status-of-the-new-and-legacy-pass-managers
Commit: dd57f60e6ef60883709489c3d727e52d7322ec0b
https://github.com/llvm/llvm-project/commit/dd57f60e6ef60883709489c3d727e52d7322ec0b
Author: Slava Zakharin <szakharin at nvidia.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M flang/lib/Optimizer/HLFIR/Transforms/SimplifyHLFIRIntrinsics.cpp
M flang/test/HLFIR/simplify-hlfir-intrinsics-count.fir
Log Message:
-----------
[flang] Use reduction recognition friendly pattern for hlfir.count. (#190856)
The change is to select between `0` and `1` based on the condition
and then add the result to the current reduction value.
Commit: 350d672827deaff38e81a859522e5a3bfb584ed3
https://github.com/llvm/llvm-project/commit/350d672827deaff38e81a859522e5a3bfb584ed3
Author: Jason Van Beusekom <jason.van-beusekom at hpe.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M flang/include/flang/Optimizer/Dialect/Support/FIRContext.h
M flang/lib/Lower/Bridge.cpp
M flang/lib/Optimizer/CodeGen/CodeGen.cpp
M flang/lib/Optimizer/Dialect/Support/FIRContext.cpp
A flang/test/Fir/dso-local-macho.fir
A flang/test/Fir/dso-local.fir
M flang/test/Lower/common-block.f90
Log Message:
-----------
[Flang] mark safe external globals as dso_local (#189709)
Globals inside a Fortran module are not marked as dso_local,
which results in their alignment not being promoted.
This fix mimics some of the functionality found in
shouldAssumeDSOLocal in /clang/lib/CIR/CodeGen/CIRGenModule.cpp
Fixes #189069
Commit: 0f3e448c980f083b97ad4c2b93525dd44e7ba743
https://github.com/llvm/llvm-project/commit/0f3e448c980f083b97ad4c2b93525dd44e7ba743
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M llvm/include/llvm/IR/Instructions.h
A llvm/test/Transforms/SimplifyCFG/profile-update-unreachable.ll
Log Message:
-----------
[SimplifyCFG] Update profile metadata regardless of weight count (#190982)
Otherwise we miss updating in cases where we should be updating which
causes assertion failures later due to the fact that the number of cases
no longer matches the number of branch weights.
It looks like this was last touched in #160629, but it doesn't seem like
there is anything there specifically motivating this diff hunk.
Fixes #190901.
Commit: fd09e8f814c7f96a2b9c65b5737e529fd1c62708
https://github.com/llvm/llvm-project/commit/fd09e8f814c7f96a2b9c65b5737e529fd1c62708
Author: klensy <klensy at users.noreply.github.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M clang/test/ExtractAPI/availability.c
M clang/test/ExtractAPI/objc_property.m
Log Message:
-----------
[ExtractAPI] fix filecheck annotation (#92231)
moved fix for ExtractAPI from
https://github.com/llvm/llvm-project/pull/91854,
https://github.com/llvm/llvm-project/pull/91854#pullrequestreview-2052128349
Also noticed typo here, prefix `E` but check for `C`, fixed too:
https://github.com/llvm/llvm-project/blob/ca4a405232cf170f20a2f111bf72beab82095935/clang/test/ExtractAPI/availability.c#L43-L65
Co-authored-by: klensy <nightouser at gmail.com>
Co-authored-by: Prajwal Nadig <pnadig at apple.com>
Commit: 179a6bae77b8cfdf07deac0feb28aaa89aeb9462
https://github.com/llvm/llvm-project/commit/179a6bae77b8cfdf07deac0feb28aaa89aeb9462
Author: 4ast <alexei.starovoitov at gmail.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M llvm/lib/Target/BPF/BPFCallingConv.td
M llvm/lib/Target/BPF/BPFISelLowering.cpp
M llvm/lib/Target/BPF/BPFISelLowering.h
M llvm/test/CodeGen/BPF/atomic-oversize.ll
A llvm/test/CodeGen/BPF/i128_return.ll
A llvm/test/CodeGen/BPF/sret.ll
M llvm/test/CodeGen/BPF/struct_ret1.ll
M llvm/test/CodeGen/BPF/struct_ret2.ll
Log Message:
-----------
bpf: Support aggregate returns (#190894)
i128 and 16 byte structs are now returned in R0:R2 which matches x86
that returns { i64, i32 } in RAX:RDX.
Both skip one register in between (RCX / R1).
Signed-off-by: Alexei Starovoitov <ast at kernel.org>
Co-authored-by: Alexei Starovoitov <ast at kernel.org>
Commit: 5fdc35ff15c8dae0fd5c6e706026eb1c4c2e7305
https://github.com/llvm/llvm-project/commit/5fdc35ff15c8dae0fd5c6e706026eb1c4c2e7305
Author: Min-Yih Hsu <min.hsu at sifive.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
A llvm/test/tools/llvm-mca/RISCV/SiFiveX390/atomic.test
R llvm/test/tools/llvm-mca/RISCV/SiFiveX390/div-fdiv.s
A llvm/test/tools/llvm-mca/RISCV/SiFiveX390/floating-point.test
R llvm/test/tools/llvm-mca/RISCV/SiFiveX390/fractional-lmul-data.s
A llvm/test/tools/llvm-mca/RISCV/SiFiveX390/integer.test
A llvm/test/tools/llvm-mca/RISCV/SiFiveX390/mul-div.test
R llvm/test/tools/llvm-mca/RISCV/SiFiveX390/reductions.s
A llvm/test/tools/llvm-mca/RISCV/SiFiveX390/rvv/arithmetic.test
A llvm/test/tools/llvm-mca/RISCV/SiFiveX390/rvv/bitwise.test
A llvm/test/tools/llvm-mca/RISCV/SiFiveX390/rvv/comparison.test
A llvm/test/tools/llvm-mca/RISCV/SiFiveX390/rvv/conversion.test
A llvm/test/tools/llvm-mca/RISCV/SiFiveX390/rvv/fma.test
A llvm/test/tools/llvm-mca/RISCV/SiFiveX390/rvv/fp.test
A llvm/test/tools/llvm-mca/RISCV/SiFiveX390/rvv/mask.test
A llvm/test/tools/llvm-mca/RISCV/SiFiveX390/rvv/minmax.test
A llvm/test/tools/llvm-mca/RISCV/SiFiveX390/rvv/mul-div.test
A llvm/test/tools/llvm-mca/RISCV/SiFiveX390/rvv/permutation.test
A llvm/test/tools/llvm-mca/RISCV/SiFiveX390/rvv/reduction.test
A llvm/test/tools/llvm-mca/RISCV/SiFiveX390/rvv/strided-load-x0.s
A llvm/test/tools/llvm-mca/RISCV/SiFiveX390/rvv/vle-vse-vlm.test
A llvm/test/tools/llvm-mca/RISCV/SiFiveX390/rvv/vlse-vsse.test
A llvm/test/tools/llvm-mca/RISCV/SiFiveX390/rvv/vlseg-vsseg.test
A llvm/test/tools/llvm-mca/RISCV/SiFiveX390/rvv/vlxe-vsxe.test
R llvm/test/tools/llvm-mca/RISCV/SiFiveX390/strided-load-store.s
R llvm/test/tools/llvm-mca/RISCV/SiFiveX390/strided-load-x0.s
R llvm/test/tools/llvm-mca/RISCV/SiFiveX390/vector-fp.s
R llvm/test/tools/llvm-mca/RISCV/SiFiveX390/vector-integer-arithmetic.s
R llvm/test/tools/llvm-mca/RISCV/SiFiveX390/vle-vse.s
R llvm/test/tools/llvm-mca/RISCV/SiFiveX390/vrgather-vcompress.s
A llvm/test/tools/llvm-mca/RISCV/SiFiveX390/zba.test
A llvm/test/tools/llvm-mca/RISCV/SiFiveX390/zbb.test
A llvm/test/tools/llvm-mca/RISCV/SiFiveX390/zbs.test
A llvm/test/tools/llvm-mca/RISCV/SiFiveX390/zfh.test
A llvm/test/tools/llvm-mca/RISCV/SiFiveX390/zfhmin.test
A llvm/test/tools/llvm-mca/RISCV/SiFiveX390/zicond.test
Log Message:
-----------
[RISCV][MCA] Update `sifive-x390`'s tests to consume input files instead (#190883)
In the same spirit as #189785 , use the new input file system for
sifive-x390's llvm-mca tests.
Commit: 46dc97c0ea7d3bb4e1590388280a9833cc5d3b77
https://github.com/llvm/llvm-project/commit/46dc97c0ea7d3bb4e1590388280a9833cc5d3b77
Author: Sergey Kachkov <109674256+skachkov-sc at users.noreply.github.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M llvm/test/Transforms/SeparateConstOffsetFromGEP/RISCV/split-gep.ll
Log Message:
-----------
[NFC][SeparateConstOffsetFromGEP] Add pre-commit test (#191006)
Commit: 802c5cbe5b4be7eb7b442ddbd76acb781921e5f7
https://github.com/llvm/llvm-project/commit/802c5cbe5b4be7eb7b442ddbd76acb781921e5f7
Author: Caroline Newcombe <caroline.newcombe at hpe.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M flang/examples/FeatureList/FeatureList.cpp
M flang/include/flang/Evaluate/expression.h
M flang/include/flang/Evaluate/fold.h
M flang/include/flang/Evaluate/shape.h
M flang/include/flang/Evaluate/tools.h
M flang/include/flang/Evaluate/traverse.h
M flang/include/flang/Parser/characters.h
M flang/include/flang/Parser/dump-parse-tree.h
M flang/include/flang/Parser/parse-tree.h
M flang/include/flang/Semantics/dump-expr.h
M flang/include/flang/Semantics/expression.h
M flang/lib/Evaluate/check-expression.cpp
M flang/lib/Evaluate/expression.cpp
M flang/lib/Evaluate/fold-implementation.h
M flang/lib/Evaluate/formatting.cpp
M flang/lib/Evaluate/tools.cpp
M flang/lib/Lower/ConvertExpr.cpp
M flang/lib/Lower/ConvertExprToHLFIR.cpp
M flang/lib/Lower/IterationSpace.cpp
M flang/lib/Lower/Support/Utils.cpp
M flang/lib/Parser/expr-parsers.cpp
M flang/lib/Parser/unparse.cpp
M flang/lib/Semantics/definable.cpp
M flang/lib/Semantics/expression.cpp
M flang/lib/Semantics/openmp-utils.cpp
A flang/test/Evaluate/fold-conditional-expr.f90
A flang/test/Parser/conditional-expr.f90
A flang/test/Semantics/conditional-expr.f90
Log Message:
-----------
[flang] Implement conditional expressions parser/semantics (F2023) (#186489)
## Implement Fortran 2023 Conditional Expressions (R1002)
***This PR contains the implementation for parsing and semantic
analysis. Lowering is implemented in a separate PR (#186490)***
Implements Fortran 2023 conditional expressions with syntax: `result =
(condition ? value1 : condition2 ? value2 : ... : elseValue)`
Issue: #176999
Discourse:
https://discourse.llvm.org/t/rfc-adding-conditional-expressions-in-flang-f2023/89869/1
-- note that some of the details provided in the RFC post are no longer
accurate
### Implementation Details
**Parser:**
- Added ConditionalExpr as primary expression (F2023 R1002)
- Right-associative chaining for multi-way conditionals
**Semantics:**
- Expression tree node ConditionalExpr<T> with N conditions and N+1
values
- Strict type checking: all values must have identical type, kind, and
rank
- Conditions must be scalar LOGICAL
**LIT Testing:**
- Parser tests: Syntax validation, precedence, nesting
- Semantic tests: Type checking, error messages
- Note: Executable tests will be added to the llvm-test-suite repo
(https://github.com/llvm/llvm-test-suite/pull/369)
**Limitations**
- Conditional arguments are not yet supported. This work is planned
- #180592
- Polymorphic types (CLASS) not yet supported in lowering
- Both limitations will emit clear error message if encountered
### Examples
```
! Simple conditional
x = (flag ? 10 : 20)
! Chained
result = (x > 0 ? 1 : x < 0 ? -1 : 0)
! Examples from F2023
( ABS (RESIDUAL)<=TOLERANCE ? ’ok’ : ’did not converge’ )
( I>0 .AND. I<=SIZE (A) ? A (I) : PRESENT (VAL) ? VAL : 0.0 )
```
AI Usage Disclosure: AI tools (Claude Sonnet 4.5) were used to assist
with implementation of this feature and test code generation. I have
reviewed, modified, and tested all AI-generated code.
Commit: 3af427539bc6b85a9fe3334b9a0b43d347ea29ac
https://github.com/llvm/llvm-project/commit/3af427539bc6b85a9fe3334b9a0b43d347ea29ac
Author: Arthur Eubanks <aeubanks at google.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M llvm/docs/LangRef.rst
M llvm/include/llvm/Analysis/InlineOrder.h
M llvm/include/llvm/IR/FixedMetadataKinds.def
M llvm/include/llvm/Transforms/Utils/Cloning.h
M llvm/lib/Analysis/InlineOrder.cpp
M llvm/lib/IR/Verifier.cpp
M llvm/lib/Transforms/IPO/AlwaysInliner.cpp
M llvm/lib/Transforms/IPO/Inliner.cpp
M llvm/lib/Transforms/IPO/ModuleInliner.cpp
M llvm/lib/Transforms/IPO/PartialInlining.cpp
M llvm/lib/Transforms/Utils/CloneFunction.cpp
M llvm/lib/Transforms/Utils/InlineFunction.cpp
M llvm/test/Transforms/Inline/debug-invoke.ll
A llvm/test/Transforms/Inline/inline-history-2.ll
A llvm/test/Transforms/Inline/inline-history-3.ll
R llvm/test/Transforms/Inline/inline-history-noinline.ll
A llvm/test/Transforms/Inline/inline-history.ll
M llvm/test/Transforms/Inline/inline-recursive-fn2.ll
A llvm/test/Verifier/inline-history-metadata.ll
M llvm/unittests/Analysis/InlineOrderPlugin/InlineOrderPlugin.cpp
Log Message:
-----------
[Inliner] Put inline history into IR as !inline_history metadata (#190876)
(Reland of #190700 with checks for RefSCCs with one function with a
self-reference, plus determinism fix)
(Reland of #190092 with verifier change to look through GlobalAliases)
So that it's preserved across all inline invocations rather than just
one inliner pass run.
This prevents cases where devirtualization in the simplification
pipeline uncovers inlining opportunities that should be discarded due to
inline history, but we dropped the inline history between inliner pass
runs, causing code size to blow up, sometimes exponentially.
For compile time reasons, we want to limit this to only call sites that
have the potential to inline through SCCs, potentially with the help of
devirtualization. This means that the callee is in a non-trivial
(Ref)SCC, or the call site was previously an indirect call, which can
potentially be devirtualized to call any function.
The CGSCCUpdater::InlinedInternalEdges logic still seems to be relevant
even with this change, as monster_scc.ll blows up if I remove that code.
http://llvm-compile-time-tracker.com/compare.php?from=e830d88e8ae5f44a97cc76136a0a4e83aa9157c0&to=ed535e732fc41b79ab8efda2417886cbd0812f7f&stat=instructions:u
Fixes #186926.
Commit: 8c88fae6764a33affa7e99449694427df9171aa8
https://github.com/llvm/llvm-project/commit/8c88fae6764a33affa7e99449694427df9171aa8
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/scalable-strict-fadd.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-tail-folding-unroll.ll
Log Message:
-----------
[VPlan] Lower CanIVIncrementForPart in convertToConcreteRecipes. (#190844)
Move the lowering of CanonicalIVIncrementForPart from generate() to
convertToConcreteRecipes, converting it to an Add VPInstruction at the
VPlan level. This enables VPlan-level simplifications (e.g., folding add
0, x) and prepares for adding a 3-operand form.
PR: https://github.com/llvm/llvm-project/pull/190844
Commit: 815edc3ff646392bfee2b381d37dd35e4b04f9c5
https://github.com/llvm/llvm-project/commit/815edc3ff646392bfee2b381d37dd35e4b04f9c5
Author: Valeriy Savchenko <vsavchenko at apple.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
M llvm/test/CodeGen/AArch64/arm64-zip.ll
A llvm/test/CodeGen/AArch64/vselect-widen-mask-tree.ll
M llvm/test/CodeGen/X86/bitcast-int-to-vector-bool-sext.ll
Log Message:
-----------
[SelectionDAG] Recurse through mask expression trees in WidenVSELECTMask (#188085)
WidenVSELECTMask currently handles only two mask shapes: a bare SETCC
or a single AND/OR/XOR of exactly two SETCCs. Anything deeper bails out
to the generic condition widening path, which often introduces
unnecessary narrow/widen roundtrips (xtn+sshll on AArch64,
packssdw+vpmovsxwd on X86).
Replace the hand-coded cases with a recursive widenMaskTree that walks
through SETCC, AND/OR/XOR, FREEZE, VECTOR_SHUFFLE, SELECT/VSELECT, and
all-ones/all-zeros BUILD_VECTORs.
Commit: 430e1be254f90d177e997266bc1c2e700e16d1cc
https://github.com/llvm/llvm-project/commit/430e1be254f90d177e997266bc1c2e700e16d1cc
Author: Henrik G. Olsson <hnrklssn at gmail.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M clang-tools-extra/clang-tidy/llvm/CMakeLists.txt
M clang-tools-extra/clang-tidy/llvm/LLVMTidyModule.cpp
A clang-tools-extra/clang-tidy/llvm/RedundantCastingCheck.cpp
A clang-tools-extra/clang-tidy/llvm/RedundantCastingCheck.h
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/docs/clang-tidy/checks/list.rst
A clang-tools-extra/docs/clang-tidy/checks/llvm/redundant-casting.rst
A clang-tools-extra/test/clang-tidy/checkers/llvm/redundant-casting.cpp
M clang/include/clang/ASTMatchers/ASTMatchers.h
M clang/include/clang/ASTMatchers/ASTMatchersInternal.h
Log Message:
-----------
[clang-tidy] detect redundant uses of LLVM's cast, dyn_cast (#189274)
Warns when casting to the same pointee type, or when the target pointee
type is a super type of the argument's pointee type. Supported
functions:
- cast
- cast_if_present
- cast_or_null
- dyn_cast
- dyn_cast_if_present
- dyn_cast_or_null
---------
Co-authored-by: Victor Chernyakin <chernyakin.victor.j at outlook.com>
Commit: eb06b4796c2a53c177516dd45ca63f871fc311bb
https://github.com/llvm/llvm-project/commit/eb06b4796c2a53c177516dd45ca63f871fc311bb
Author: Helena Kotas <hekotas at microsoft.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Sema/SemaHLSL.h
M clang/lib/Sema/SemaExprMember.cpp
M clang/lib/Sema/SemaHLSL.cpp
A clang/test/SemaHLSL/Resources/resources-in-struct-array-error.hlsl
Log Message:
-----------
[HLSL] Diagnose dynamic indexing of struct arrays for resource access (#187132)
Dynamic indexing of structs arrays for resource access is not supported. This change implements the diagnostic for this.
Fixes #187131
Commit: 290ddb9238ec569f8518614ddbc48f8f0445777f
https://github.com/llvm/llvm-project/commit/290ddb9238ec569f8518614ddbc48f8f0445777f
Author: Henry Jiang <henry_jiang2 at apple.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/test/Transforms/LoopVectorize/pseudoprobe.ll
Log Message:
-----------
[VPlan][PseudoProbe] Fix `pseudoprobe` duplication when `VF=1` (#185238)
Fix assertion in `loop-vectorize` on loops that contains
`llvm.pseudoprobe` at VF=1, UF=2. Minimal Reproducer:
https://godbolt.org/z/nrcMWWqMx
Originally in https://reviews.llvm.org/D144066, Pseudoprobes were marked
non-uniform in `isUniformAfterVectorization` even for VF=1 that allows
the `REPLICATE call @llvm.pseudoprobe` to survive until the plan is
executed when VF=1, UF=2, causing the crash.
Instead, `isUniformAfterVectorization` as true even for pseudoprobe when
`VF.isScalar()`.
Commit: f5e568810fe183c748d12f31d3a428629b2ed8de
https://github.com/llvm/llvm-project/commit/f5e568810fe183c748d12f31d3a428629b2ed8de
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
A llvm/test/CodeGen/RISCV/samesign.ll
Log Message:
-----------
[SelectionDAGBuilder] Pass SDNodeFlags to getSetCC instead of using FlagInserter. (#190878)
getSetCC hasn't always had a SDNodeFlags argument. When it was added, it
stopped looking at FlagInserter.
Also remove unnecessary FlagInserter from visitFCmp.
Commit: a25d07caaf2c19f97b1be41030d57f850aefbdcf
https://github.com/llvm/llvm-project/commit/a25d07caaf2c19f97b1be41030d57f850aefbdcf
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M flang/lib/Optimizer/Transforms/CUDA/CUFComputeSharedMemoryOffsetsAndSize.cpp
M flang/test/Fir/CUDA/cuda-shared-offset.mlir
Log Message:
-----------
[flang][cuda] Allow static and dynamic shared memory in a single kernel (#190866)
Commit: ffea943c17effd8977df945a7cabfb120d816ca6
https://github.com/llvm/llvm-project/commit/ffea943c17effd8977df945a7cabfb120d816ca6
Author: Sam Elliott <aelliott at qti.qualcomm.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
A llvm/test/CodeGen/RISCV/pr190868.ll
Log Message:
-----------
[NFC][RISC-V] Add Test for PR190868 (#190908)
Updates #190868
Commit: e9113618cba636b194ee08e8d9eb8cb0bafda092
https://github.com/llvm/llvm-project/commit/e9113618cba636b194ee08e8d9eb8cb0bafda092
Author: SiliconA-Z <gfunni234 at gmail.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M llvm/lib/Target/ARM/ARMISelLowering.cpp
M llvm/test/CodeGen/ARM/sadd_sat.ll
M llvm/test/CodeGen/ARM/sadd_sat_plus.ll
M llvm/test/CodeGen/ARM/ssub_sat.ll
M llvm/test/CodeGen/ARM/ssub_sat_plus.ll
Log Message:
-----------
[ARM] Custom Lowering for SADDO_CARRY and SSUBO_CARRY (#154419)
To do this, I did refactoring to mirror what goes on with AArch64,
including having the carryFlagToValue do the inversion.
While the patterns are not the best, with pattern matching, I hope to at
make it as good as AArch64 on Thumb2 where we have CSEL.
Commit: 95af7de3e9de2fadfbe7b2cbbfaecfdfbc7fd7af
https://github.com/llvm/llvm-project/commit/95af7de3e9de2fadfbe7b2cbbfaecfdfbc7fd7af
Author: Brian Cain <brian.cain at oss.qualcomm.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M llvm/lib/Target/Hexagon/CMakeLists.txt
Log Message:
-----------
[Hexagon] Add missing MIRParser link dependency (#191010)
cd66d79be19b added parseMachineFunctionInfo to HexagonTargetMachine
which calls parseNamedRegisterReference from LLVMMIRParser, but did not
add the library dependency. This causes link failures for executables
like dsymutil and llvm-split when building with BUILD_SHARED_LIBS=OFF.
Add MIRParser to LINK_COMPONENTS.
Commit: cd14ba9c9c0d927d215a698b1e0d47f97812e2b7
https://github.com/llvm/llvm-project/commit/cd14ba9c9c0d927d215a698b1e0d47f97812e2b7
Author: Syadus Sefat <42645939+mssefat at users.noreply.github.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
A llvm/test/Transforms/SLPVectorizer/AMDGPU/notriviallyvectorizableintrinsicoperands.ll
Log Message:
-----------
[NFC][SLP][AMDGPU] Pre-commit test for vectorization of non-trivially-vectorizable intrinsic operands (#191009)
This patch adds pre-commit test for vectorization of
non-trivially-vectorizable intrinsic operands for PR
https://github.com/llvm/llvm-project/pull/189784
Commit: e090c86ab0c7d6775882e124a8bab922c46d5ab3
https://github.com/llvm/llvm-project/commit/e090c86ab0c7d6775882e124a8bab922c46d5ab3
Author: Florian Mayer <fmayer at google.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M clang/lib/Serialization/ASTReader.cpp
M clang/test/Modules/merge-target-features.cpp
Log Message:
-----------
[clang] deduplicate target-features for modules (#187614)
Previously, double passing a target feature would make the module
incompatible with a compilation unit that only passes it once.
The motivating problem is, when we pass -target-features +tagged-globals
as well as -fsanitize=hwaddress, which adds a second copy, the module
is incompatible with one built with only one `-target-features
+tagged-globals`.
Commit: 7cd327dca78b9c45de4caf11f8d525f6f0dedecb
https://github.com/llvm/llvm-project/commit/7cd327dca78b9c45de4caf11f8d525f6f0dedecb
Author: Peter Collingbourne <pcc at google.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/test/CodeGen/X86/cond-loop.ll
Log Message:
-----------
DAGCombine: Prefer to keep cond_loop argument as a setcc.
As with brcond, combines for cond_loop want to see setcc as the direct
argument, so prefer to keep it in that form.
Reviewers: arsenm, fmayer, RKSimon
Pull Request: https://github.com/llvm/llvm-project/pull/190889
Commit: f2b33d794d3674a0c7be44de53aa1d201b1bf3fe
https://github.com/llvm/llvm-project/commit/f2b33d794d3674a0c7be44de53aa1d201b1bf3fe
Author: vporpo <vasileios.porpodas at amd.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
A llvm/lib/Target/AMDGPU/AMDGPUWaitcntUtils.cpp
A llvm/lib/Target/AMDGPU/AMDGPUWaitcntUtils.h
M llvm/lib/Target/AMDGPU/CMakeLists.txt
M llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp
M llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
Log Message:
-----------
[AMDGPU][NFC] Move InstCounterType and Waitcnt to AMDGPUWaitcntUtils.h (#187823)
This patch moves InstCounterType and Waitcnt from Utils/AMDGPUBaseInfo.h
to a more appropriate location, one directory up, in
AMDGPUWaitcntUtils.h. We also need to move a few encoding and decoding
functions that work on Waitcnt. Some of these called static functions
defined in AMDGPUBaseInfo.cpp, like `unpackBits()`, so this patch
introduced new functions in AMDGPUBaseInfo: `decodeLoadcnt()`,
`decodeStorecnt()` and `decodeDscnt()` that do the necessary bit
operations but don't operate on the Waitcnt class directly.
Commit: d8a9c560ed04369f12eb44f12bcbcfc7ddb5f78a
https://github.com/llvm/llvm-project/commit/d8a9c560ed04369f12eb44f12bcbcfc7ddb5f78a
Author: Artem Belevich <tra at google.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M clang/lib/Headers/__clang_cuda_intrinsics.h
A clang/test/Headers/cuda_intrinsics.cu
Log Message:
-----------
[CUDA] refactor in-header implementation of __ld*/__st* with different cache modes. (#190021)
* Generalized creation of the variant sets.
* Added implementations for the missing operation modes. Now we match
what's available in CUDA headers.
* Cleaned up discrepancies in `__asm__ __volatile__` use (needed for
some ops that warm up the cache, but should not be discarded if the load
result is unused)
Manually verified that clang's versions of these functions generate
exactly the same instructions nvcc generates from CUDA headers.
Commit: 14da7e5194293454c54c097431c61c1fe55c5710
https://github.com/llvm/llvm-project/commit/14da7e5194293454c54c097431c61c1fe55c5710
Author: Jon Roelofs <jonathan_roelofs at apple.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M llvm/lib/Support/raw_socket_stream.cpp
M llvm/unittests/Support/raw_socket_stream_test.cpp
Log Message:
-----------
[llvm][Support] Avoid silent truncation of socket paths (#190869)
When the name is too long to fit in sockaddr_un::sun_path's 104
character buffer, we now surface the error condition, rather than
silently truncating and failing the test with an "address in use Bind
error". We also shorten the name a bit to give more headroom on CI
systems that define an explicit TMP_DIR that acts as a prefix to the
path created by these tests.
Commit: 3c3fb6ab30192ac9a5c1923927fa10ec78c5ea29
https://github.com/llvm/llvm-project/commit/3c3fb6ab30192ac9a5c1923927fa10ec78c5ea29
Author: khaki3 <47756807+khaki3 at users.noreply.github.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M flang/lib/Lower/OpenACC.cpp
A flang/test/Lower/OpenACC/acc-do-concurrent-locality.f90
Log Message:
-----------
[flang][OpenACC] Support DO CONCURRENT locality specs inside ACC constructs (#190406)
- Lower DO CONCURRENT locality specs (REDUCE, LOCAL, LOCAL\_INIT) that
appear inside OpenACC compute constructs and combined directives.
- Previously, any locality spec on DO CONCURRENT inside ACC hit a `TODO`
and aborted. This resolves that limitation.
- Per OpenACC 2.17.2, DO CONCURRENT without a loop construct in a
kernels construct is treated as `loop auto`; in a parallel construct it
is treated as `loop independent`. Both cases are covered.
## Mapping
| Locality Spec | ACC Operation |
|---|---|
| `REDUCE(op:vars)` | `acc.reduction` with reduction recipe |
| `LOCAL(vars)` | `acc.private` with privatization recipe |
| `LOCAL_INIT(vars)` | `acc.firstprivate` with firstprivatization recipe
|
| `SHARED` / `DEFAULT(NONE)` | No-op (variables already accessible) |
## Details
- Adds `processDoConcurrentLocalitySpecs` to convert locality specs into
the corresponding ACC data-entry operations and recipes.
- Handles the `HostAssoc` symbol indirection that DO CONCURRENT creates
for LOCAL/LOCAL\_INIT variables: after `remapDataOperandSymbols` binds
the ultimate symbol inside the compute region, the binding is copied to
the `HostAssoc` symbol so that body references resolve correctly.
- Separates `firstprivateOperands` into its own operand segment on
`acc.loop` (previously hardcoded empty).
- Fixes pre-existing build errors where `createOrGetReductionRecipe`,
`createOrGetPrivateRecipe`, and `createOrGetFirstprivateRecipe` were
called with `mlir::Type` instead of `mlir::Value` after an upstream API
change. The original variable is passed (not the acc op result) to
preserve correct recipe names.
- New FileCheck test
`flang/test/Lower/OpenACC/acc-do-concurrent-locality.f90` with 12 cases
covering REDUCE, LOCAL, LOCAL\_INIT, mixed locality, and interop with
explicit ACC clauses — across kernels regions, parallel regions, and
combined directives.
Commit: 5d2b3df220c99c4598c24ae1a7cc4d244d07a525
https://github.com/llvm/llvm-project/commit/5d2b3df220c99c4598c24ae1a7cc4d244d07a525
Author: Ramkumar Ramachandra <artagnon at tenstorrent.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-chained.ll
Log Message:
-----------
[VPlan] Fix incorrect wrap-flags in partial-red transform (#190214)
The flags are incorrect for the transform, and fixes an underlying
miscompile.
Proof: https://alive2.llvm.org/ce/z/tPJnJk
Commit: 6f95604cbd10109892f9fdc7ab8f78f243ebf8a0
https://github.com/llvm/llvm-project/commit/6f95604cbd10109892f9fdc7ab8f78f243ebf8a0
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M lldb/test/API/functionalities/tsan/cpp_global_location/TestTsanCPPGlobalLocation.py
M lldb/test/API/functionalities/tsan/global_location/TestTsanGlobalLocation.py
Log Message:
-----------
[lldb] Disable TestTsan{CPP}GlobalLocation.py on Linux (#191018)
Skip `TestTsanGlobalLocation.py` and `TestTsanCPPGlobalLocation.py` on
Linux. The tests are failing on GreenDragon and at desk.
Tracked by https://github.com/llvm/llvm-project/issues/191012
Commit: 004206ac5533a1b5296a124e23b0c4638b6ef41e
https://github.com/llvm/llvm-project/commit/004206ac5533a1b5296a124e23b0c4638b6ef41e
Author: John Harrison <harjohn at google.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M lldb/tools/lldb-dap/Handler/AttachRequestHandler.cpp
Log Message:
-----------
[lldb-dap] Using an empty target instead of a dummy target. (#189734)
Removing the use of the dummy target and instead letting the debugger
instance create the target it needs.
Commit: bc07dbe657a92ef1aadbfb86d1bf19177c48ad17
https://github.com/llvm/llvm-project/commit/bc07dbe657a92ef1aadbfb86d1bf19177c48ad17
Author: Oskar Wirga <oskar.wirga at gmail.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
M llvm/test/CodeGen/AArch64/ptrauth-reloc.ll
Log Message:
-----------
[AArch64] Add error handling for unsupported bases in lowerConstantPtrAuth (#189474)
This is part of work being done in #188378 and #188638, split out from
#188650.
`lowerConstantPtrAuth` silently miscompiled `ConstantPtrAuth` constants
with non-`GlobalValue` pointer bases — emitting `0 at AUTH(da,0)` instead
of erroring.
Changes:
- Handle `ConstantPointerNull` bases explicitly
- Error via `reportFatalUsageError` on any remaining unresolved base
(e.g. nested ptrauth) instead of silently miscompiling
This PR was mostly developed with LLM assistance
Commit: 046e823c7b9259d9c1aaee8f03b2d5f53f899dd9
https://github.com/llvm/llvm-project/commit/046e823c7b9259d9c1aaee8f03b2d5f53f899dd9
Author: Med Ismail Bennani <ismail at bennani.ma>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M lldb/test/API/functionalities/scripted_frame_provider/thread_filter/main.cpp
Log Message:
-----------
[lldb/test] Add yield to spin loop in thread_filter test (#191025)
This should fix:
https://lab.llvm.org/buildbot/#/builders/211/builds/7439
The timeout might be caused by three threads busy-spinning at 100% CPU,
starving the CI machine.
Add std::this_thread::yield() to the spin loop to reduce CPU pressure
while keeping threads alive at a debugger-friendly location.
Signed-off-by: Med Ismail Bennani <ismail at bennani.ma>
Commit: 54f7104a3484fb33a10c2d66d30d9b05c7a2d80b
https://github.com/llvm/llvm-project/commit/54f7104a3484fb33a10c2d66d30d9b05c7a2d80b
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
Log Message:
-----------
[LV] Replace dead invalidateCostModelingDecisions with assert (NFC) (#190837)
Replace dead invalidateCostModelingDecisions with assertion that no
decisions have been taken yet.
Commit: 3ce68907fff129b1728f692be16c61c8fbd3892a
https://github.com/llvm/llvm-project/commit/3ce68907fff129b1728f692be16c61c8fbd3892a
Author: Julian Lettner <yln at users.noreply.github.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M lldb/tools/driver/lldb-mte-entitlements.plist
Log Message:
-----------
[lldb] Fixup MTE entitlement spelling for MTE driver (#190842)
Fixup for: https://github.com/llvm/llvm-project/pull/186322
Commit: 649c44fc1b39b7e636e74690e15729a178775af5
https://github.com/llvm/llvm-project/commit/649c44fc1b39b7e636e74690e15729a178775af5
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M flang/include/flang/Semantics/openmp-utils.h
M flang/lib/Semantics/check-omp-loop.cpp
M flang/lib/Semantics/openmp-utils.cpp
M flang/lib/Semantics/resolve-directives.cpp
A flang/test/Semantics/OpenMP/do-concurrent-collapse-60.f90
M flang/test/Semantics/OpenMP/do-concurrent-collapse.f90
Log Message:
-----------
[flang][OpenMP] Improve checks for DO CONCURRENT in loop constructs (#190990)
In OpenMP 6.0+ DO CONCURRENT is allowed as an alternative to a Canonical
Loop Nest. In other words, DO CONCURRENT is allowed inside loop
constructs as long as it's the only loop.
Add checks to detect DO CONCURRENT as the root of the associated loop
nest. Remove related checks from resolve-directives.cpp.
Commit: 121f38c69f44108c543152d990f1d3729d72fa1d
https://github.com/llvm/llvm-project/commit/121f38c69f44108c543152d990f1d3729d72fa1d
Author: estewart08 <ethan.stewart at amd.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M libc/shared/CMakeLists.txt
Log Message:
-----------
[libc] - Add rpc_opcodes.h to list of installed headers (#191035)
There is a case when building standalone offload via runtimes where
LLVM_BINARY_DIR is set to the installed llvm location. Currently, this
header is not being installed and results in a build failure.
Fixes issue introduced with #190423.
Commit: 9b64d05e594a8b04393e1cd24c245a435826d47c
https://github.com/llvm/llvm-project/commit/9b64d05e594a8b04393e1cd24c245a435826d47c
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/lib/CIR/CodeGen/CIRGenClass.cpp
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
M clang/lib/CIR/Dialect/Transforms/LoweringPrepare.cpp
M clang/test/CIR/CodeGen/array-ctor.cpp
M clang/test/CIR/CodeGen/array-dtor.cpp
M clang/test/CIR/CodeGen/global-array-dtor.cpp
M clang/test/CIR/CodeGen/global-init.cpp
M clang/test/CIR/CodeGen/new.cpp
A clang/test/CIR/CodeGen/partial-array-cleanup.cpp
M clang/test/CIR/IR/array-ctor.cir
M clang/test/CIR/IR/array-dtor.cir
M clang/test/CIR/IR/invalid-array-structor.cir
Log Message:
-----------
[CIR] Implement partial array destroy handling (#190834)
This implements EH cleanup handling that performs regular partial array
destruction for array constructor loops with a destructed type. Because
CIR represents array construction using an abstract operation, we do not
go through the normal EH stack mechanism. Instead, we add a partial_dtor
region to the cir.array.ctor operation indicating how a single element
should be destructed. When the cir.array.ctor operation is expanded
during LoweringPrepare, we create a cleanup scope with a partial array
dtor loop in an EH cleanup region. This gets further expanded during CFG
flattening to produce a control flow equivalent to that generated by
classic codegen.
Assisted-by: Cursor / claude-4.6-opus-high
Commit: dfc1f2b2070edb32fedd2524662536ccbbaab948
https://github.com/llvm/llvm-project/commit/dfc1f2b2070edb32fedd2524662536ccbbaab948
Author: adams381 <adams at nvidia.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M clang/docs/ClangIRABILowering.md
Log Message:
-----------
[CIR][ABI][NFC] Update ABI lowering design doc with implementation experience (#188617)
Three documentation improvements based on implementation experience:
- Improve Section 4.4 flow diagram: replace flat step-by-step diagram
with
layered version showing which architectural layer (MLIR adapter, LLVM
ABI
library, dialect-specific) owns each step.
- Note dialect-aware type mapping: dialects with custom types (e.g.
cir::IntType is not mlir::IntegerType) may need dialect-aware mapping
alongside the generic mapper to preserve signedness, pointer identity,
and
record field structure.
- Update ABIRewriteContext interface: describe the actual two-method
interface
(rewriteFunctionDefinition, rewriteCallSite) instead of the 15-20
fine-grained methods originally proposed.
Made with [Cursor](https://cursor.com)
Commit: 66722819ffa4bc00d719d206f235dffbde5ec5d8
https://github.com/llvm/llvm-project/commit/66722819ffa4bc00d719d206f235dffbde5ec5d8
Author: vangthao95 <vang.thao at amd.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.ds.gws.init.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.ds.gws.sema.v.mir
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.gws.barrier-bundle.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.gws.barrier.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.gws.init.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.gws.sema.br.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.gws.sema.p.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.gws.sema.release.all.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.gws.sema.v.ll
Log Message:
-----------
AMDGPU/GlobalISel: RegBankLegalize rules for ds_gws ops (#190283)
Commit: 87717bf9f81f7b29466c5d9a30a3453bdfc93941
https://github.com/llvm/llvm-project/commit/87717bf9f81f7b29466c5d9a30a3453bdfc93941
Author: Syadus Sefat <42645939+mssefat at users.noreply.github.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M llvm/include/llvm/Transforms/Vectorize/SLPVectorizer.h
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/AMDGPU/notriviallyvectorizableintrinsicoperands.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/revec.ll
Log Message:
-----------
[SLP][AMDGPU] Vectorize operands of non-trivially-vectorizable intrinsic calls (#189784)
A non-trivially vectorizable target intrinsic (e.g., llvm.amdgcn.exp2,
llvm.amdgcn.log) blocks the SLP vectorizer from building a deeper tree.
This patch finds the operands of such intrinsics and tries them as
independent SLP tree roots so that the operands continues to get
vectorized.
Previously, the SLP vectorizer would terminate tree building at these
intrinsic calls (as NeedToGather nodes). That left their operand chains
(loads, fmul, fsub, etc.) entirely scalar. This patch adds a new seed
discovery pass in vectorizeChainsInBlock.
Commit: 7765fd8653b7670f37c73fef51a8c0b2df36591c
https://github.com/llvm/llvm-project/commit/7765fd8653b7670f37c73fef51a8c0b2df36591c
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M mlir/lib/Dialect/ArmSME/Transforms/EnableArmStreaming.cpp
M mlir/test/Dialect/ArmSME/enable-arm-streaming.mlir
M mlir/test/Dialect/ArmSME/enable-arm-za.mlir
Log Message:
-----------
[mlir][ArmSME] Prefix SME streaming attributes with "llvm." for propagation (#190864)
Function-level attributes enabling SME in the backend (e.g.
arm_streaming, arm_locally_streaming) were dropped when converting
func.func to llvm.func after ed37bdc, because attribute propagation
during FuncToLLVM conversion only preserves attributes prefixed with
"llvm.". Prefix these discardable attributes accordingly.
Commit: c42a957dece2c19454ac3d8d7028e7f16704899b
https://github.com/llvm/llvm-project/commit/c42a957dece2c19454ac3d8d7028e7f16704899b
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenCleanup.cpp
Log Message:
-----------
[CIR][NFC] Remove dead code in popCleanupBlock (#191029)
The CIR popCleanupBlock implementation contained a lot of logic that was
copied from the classic codegen implementation but had become
effectively dead code after the redesign of cleanup and exception
handling in CIR because our cleanups are no longer based on blocks and
branches. This change removes that code.
Commit: 061420021a2b0dc391071a45fe7cc0360236d539
https://github.com/llvm/llvm-project/commit/061420021a2b0dc391071a45fe7cc0360236d539
Author: Dmitry Vasilyev <dvassiliev at accesssoftek.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M lldb/test/API/functionalities/scripted_frame_provider/thread_filter/TestFrameProviderThreadFilter.py
M lldb/test/API/functionalities/scripted_frame_provider/thread_filter/main.cpp
Log Message:
-----------
[lldb] Fix the TestFrameProviderThreadFilter test on Windows (#191046)
This is the update for #191025.
Commit: 9a5904b20d76b24ac64e26b83e6407cc9ddbcc83
https://github.com/llvm/llvm-project/commit/9a5904b20d76b24ac64e26b83e6407cc9ddbcc83
Author: vangthao95 <vang.thao at amd.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.init.exec.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.init.exec.wave32.ll
Log Message:
-----------
AMDGPU/GlobalISel: RegBankLegalize rules for init_exec intrinsics (#191040)
Commit: 270e7b497ec893a43e60a0db35f10c0153200e38
https://github.com/llvm/llvm-project/commit/270e7b497ec893a43e60a0db35f10c0153200e38
Author: bernborgess <62393097+bernborgess at users.noreply.github.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M mlir/include/mlir/IR/Value.h
Log Message:
-----------
[mlir][docs] Fix typos / tweak `mlir::Value` class documentation (#191042)
Commit: 006d352744175de88ee0c071be367c3482c76cfa
https://github.com/llvm/llvm-project/commit/006d352744175de88ee0c071be367c3482c76cfa
Author: Chinmay Deshpande <chdeshpa at amd.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w32-swmmac-index_key.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w64-swmmac-index_key.ll
Log Message:
-----------
[AMDGPU][GISel] RegBankLegalize rules for SWMMAC instructions (#190997)
Commit: b744548871866544f5a6e92290d422f2edd39a51
https://github.com/llvm/llvm-project/commit/b744548871866544f5a6e92290d422f2edd39a51
Author: Paweł Bylica <pawel at hepcolgum.band>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M clang/include/clang/Basic/DiagnosticCommonKinds.td
M clang/lib/CodeGen/CGCall.cpp
A clang/test/CodeGenCXX/musttail-noexcept-error.cpp
A clang/test/CodeGenCXX/musttail-noexcept.cpp
Log Message:
-----------
[Clang] Allow musttail in noexcept functions when callee is nounwind (#190945)
noexcept functions push an EHTerminateScope onto the cleanup stack. The
musttail codegen did not know how to skip this scope, causing a "cannot
compile this tail call skipping over cleanups yet" error even when both
caller and callee are noexcept.
Skip the EHTerminateScope when the callee is nounwind (noexcept). The
callee's own noexcept handler prevents any exception from propagating,
so the caller's terminate handler is unnecessary.
Fixes #53087.
Commit: f49a262fa70cfe4fb83741cbd6a6e30886c560e9
https://github.com/llvm/llvm-project/commit/f49a262fa70cfe4fb83741cbd6a6e30886c560e9
Author: Jianhui Li <jian.hui.li at intel.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M mlir/include/mlir/Dialect/XeGPU/IR/XeGPUTypes.td
M mlir/include/mlir/Dialect/XeGPU/Utils/XeGPUUtils.h
M mlir/lib/Dialect/XeGPU/IR/XeGPUDialect.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUBlocking.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUPeepHoleOptimizer.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUSubgroupDistribute.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUWgToSgDistribute.cpp
M mlir/lib/Dialect/XeGPU/Utils/XeGPUUtils.cpp
M mlir/test/Dialect/XeGPU/xegpu-blocking.mlir
M mlir/test/lib/Dialect/XeGPU/TestXeGPUTransforms.cpp
Log Message:
-----------
[MLIR][XeGPU] TensorDesc Type support generic DistributeLayout instead of Layout (#190401)
This PR allows TensorDesc to support slice layout, not just plain
layout.
Commit: 8d106eb976533e522d30b0b6da78445a8f5ec697
https://github.com/llvm/llvm-project/commit/8d106eb976533e522d30b0b6da78445a8f5ec697
Author: Med Ismail Bennani <ismail at bennani.ma>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M lldb/include/lldb/Target/SyntheticFrameProvider.h
M lldb/include/lldb/Target/Target.h
M lldb/include/lldb/Target/Thread.h
M lldb/include/lldb/Utility/ScriptedMetadata.h
M lldb/include/lldb/lldb-defines.h
M lldb/source/Target/SyntheticFrameProvider.cpp
M lldb/source/Target/Target.cpp
M lldb/source/Target/Thread.cpp
M lldb/test/API/functionalities/scripted_frame_provider/pass_through_prefix/TestFrameProviderPassThroughPrefix.py
Log Message:
-----------
[lldb/Target] Unify frame provider descriptor and chain IDs (#190712)
Replace the two separate ID systems for frame providers — hash-based
descriptor IDs in Target and sequential chain IDs in Thread — with a
single monotonically increasing counter in Target.
Provider IDs are now assigned by
Target::AddScriptedFrameProviderDescriptor
and used directly as the chain ID in Thread, so
RegisterScriptedFrameProvider
returns the same ID used by 'bt --provider'. Also add duplicate
detection to
emit a warning when registering a provider with the same class name and
arguments twice.
Signed-off-by: Med Ismail Bennani <ismail at bennani.ma>
Commit: 69e0367e8221b8002b5d438fb70ff3daf36257fc
https://github.com/llvm/llvm-project/commit/69e0367e8221b8002b5d438fb70ff3daf36257fc
Author: Qiongsi Wu <qiongsiwu at gmail.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M clang/lib/Lex/ModuleMap.cpp
M clang/lib/Tooling/DependencyScanningTool.cpp
A clang/test/ClangScanDeps/modules-byname-dup-module-decl-diag.c
A clang/test/ClangScanDeps/modules-mmap-redef.c
A clang/test/Modules/implicit-module-redefinition-same-file.c
A clang/test/Modules/implicit-module-redefinition.c
Log Message:
-----------
[clang][Modules] Diagnosing Module Redefinition Across ModuleMaps (#190085)
This PR enhances the module redefinition diagnostic to cover a very
specific case.
1. A module, say `B`, is discovered first during header search. In other
words, it is declared in a modulemap that shows up first on the search
paths.
2. `B` is declared again in a different modulemap, which shows up in a
later search path, and the compiler discovers `B` again when it is
searching for a different named module.
See the two tests added for examples of this specific scenario. Under
such a scenario, the compiler now reports the module redefined error.
Note that we are not diagnosing duplicating module definitions globally,
because that requires looking through all search paths and loading all
module maps, which is too expensive.
Assisted-by: claude-opus-4.6
Commit: be072baa33d25dbad9d2cf53c2604b19aa293315
https://github.com/llvm/llvm-project/commit/be072baa33d25dbad9d2cf53c2604b19aa293315
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenFunction.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
Log Message:
-----------
[CIR][NFC] Simplify LexicalScope::cleanup() (#191034)
The LexicalScope::cleanup() function contained a lot of logic that had
been copied from the classic codegen version of this function to
properly handle branching through cleanup blocks. Since CIR cleanups are
no longer based on blocks and branches, this had become dead code. This
change simplifies the function accordiningly. This also removes the
LexicalScope::getCleanupBlock() function which is no longer called, and
the LexicalScope::createCleanupBlock() and
LexicalScope::getOrCreateCleanupBlock() functions which weren't called
even before this change.
Assisted-by: Cursor / claude-4.6-opus-high
Commit: fbdfff47c7e4cdb29512bc78cad5978fa2a86ce9
https://github.com/llvm/llvm-project/commit/fbdfff47c7e4cdb29512bc78cad5978fa2a86ce9
Author: Roland McGrath <mcgrathr at google.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M libcxx/include/__atomic/contention_t.h
M libcxx/include/__cxx03/__atomic/contention_t.h
M libcxx/src/atomic.cpp
Log Message:
-----------
[libc++] Use Fuchsia futex operations (#133571)
The basic futex operations have always been available on Fuchsia.
Wire them up to properly support C++20 atomic notify_*/wait.
Commit: a1418ac932a95113b72020e73e8f9d7808f25973
https://github.com/llvm/llvm-project/commit/a1418ac932a95113b72020e73e8f9d7808f25973
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M flang/lib/Semantics/check-cuda.cpp
A flang/test/Lower/CUDA/cuda-unified.cuf
Log Message:
-----------
[flang][cuda] Disable host array check when unified is enabled (#191054)
Commit: 503357350ce915a53a8147ac584d8b9ae4814be7
https://github.com/llvm/llvm-project/commit/503357350ce915a53a8147ac584d8b9ae4814be7
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
M llvm/test/CodeGen/SPIRV/linkage/linkage-types.ll
Log Message:
-----------
[SPIR-V] Drop initializer for Import linkage type globals (#190942)
Per SPIR-V spec, variable with Import linkage must not have initializer
Fix corresponding spirv-val error:
```
error: A module-scope OpVariable with initialization value cannot be marked with the Import Linkage Type.
```
related to https://github.com/llvm/llvm-project/issues/190736
Commit: 996599ddd95c81cbdf2c12336f3db6baec4499c5
https://github.com/llvm/llvm-project/commit/996599ddd95c81cbdf2c12336f3db6baec4499c5
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
A llvm/test/Transforms/LoopVectorize/VPlan/expand-scev.ll
Log Message:
-----------
[LV] Add VPlan printing tests checking SCEV expansion (NFC). (#191053)
Add additional test cases checking VPlan output of SCEV expansions.
Commit: 996efeaaa20247ac6bcdf5de9bf533c94c8a360f
https://github.com/llvm/llvm-project/commit/996efeaaa20247ac6bcdf5de9bf533c94c8a360f
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M flang/lib/Semantics/expression.cpp
M flang/test/Lower/CUDA/cuda-device-proc.cuf
Log Message:
-----------
[flang][cuda] Implicitly set bind(c) called kernel as global (#191050)
Commit: 075094f9bf460448ffb8f42d7e33925646694268
https://github.com/llvm/llvm-project/commit/075094f9bf460448ffb8f42d7e33925646694268
Author: Michael Jones <michaelrj at google.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M libc/hdr/types/char32_t.h
M libc/shared/rpc_server.h
M libc/src/__support/CMakeLists.txt
M libc/test/src/__support/CMakeLists.txt
Log Message:
-----------
[libc][MacOS] Enable wchar conversion and rpc_server (#191065)
Originally the wchar conversion was disabled due to MacOS not providing
uchar.h. We only needed it for char32_t so this PR just provides it
directly from our headers on MacOS. This also fixes fwrite_unlocked not
being available on MacOS which is needed for rpc_server.h.
Commit: f1c2e3cc68d95a0a4f975fdcbdf099398786a956
https://github.com/llvm/llvm-project/commit/f1c2e3cc68d95a0a4f975fdcbdf099398786a956
Author: Zorojuro <sawantsukumar at gmail.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M libc/shared/math.h
A libc/shared/math/cbrtbf16.h
M libc/src/__support/math/CMakeLists.txt
A libc/src/__support/math/cbrtbf16.h
M libc/src/math/generic/CMakeLists.txt
M libc/src/math/generic/cbrtbf16.cpp
M libc/test/shared/CMakeLists.txt
M libc/test/shared/shared_math_test.cpp
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[libc][math] Refactor cbrtbf16 function header-only (#188204)
Co-authored-by: bassiounix <muhammad.m.bassiouni at gmail.com>
Commit: 59bafb5fdd5c6e29b1d03af2499e05c0d5499e80
https://github.com/llvm/llvm-project/commit/59bafb5fdd5c6e29b1d03af2499e05c0d5499e80
Author: Chinmay Deshpande <chdeshpa at amd.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.monitor.sleep.ll
Log Message:
-----------
[AMDGPU][GISel] RegBankLegalize rules for amdgcn_s_monitor_sleep (#191063)
Commit: d03e8f4fac8edc303dfebeb9929c32b6d31c77c8
https://github.com/llvm/llvm-project/commit/d03e8f4fac8edc303dfebeb9929c32b6d31c77c8
Author: Alexey Samsonov <vonosmas at gmail.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
R libc/include/arpa/inet.h.def
M libc/include/arpa/inet.yaml
R libc/include/complex.h.def
M libc/include/complex.yaml
R libc/include/elf.h.def
M libc/include/elf.yaml
R libc/include/fcntl.h.def
M libc/include/fcntl.yaml
R libc/include/inttypes.h.def
M libc/include/inttypes.yaml
M libc/include/llvm-libc-types/imaxdiv_t.h
R libc/include/netinet/in.h.def
M libc/include/netinet/in.yaml
R libc/include/poll.h.def
M libc/include/poll.yaml
R libc/include/sched.h.def
M libc/include/sched.yaml
R libc/include/signal.h.def
M libc/include/signal.yaml
R libc/include/stdio.h.def
M libc/include/stdio.yaml
R libc/include/stdlib.h.def
M libc/include/stdlib.yaml
R libc/include/sysexits.h.def
M libc/include/sysexits.yaml
R libc/include/termios.h.def
M libc/include/termios.yaml
R libc/include/unistd.h.def
M libc/include/unistd.yaml
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[libc] Remove yet another batch of header template files (#191067)
This follows up on ae63230c23151c16ba68d5213da8bd5459c03a40 and remove
header templates from more C/POSIX standard headers, where templates
only used to `#include` files with macro definitions. We add this logic
to YAML instead - add entries to the `macros` list that point to the
correct `macro_header` to ensure it would be included.
Commit: 6cb4f3955424c37261e90c9970e2a0fcaae4b23f
https://github.com/llvm/llvm-project/commit/6cb4f3955424c37261e90c9970e2a0fcaae4b23f
Author: Naveen Seth Hanig <naveen.hanig at outlook.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M clang/lib/Driver/ModulesDriver.cpp
A clang/test/Driver/modules-driver-clang-modules-only.cpp
M clang/test/Driver/modules-driver-manifest-input-args.cpp
Log Message:
-----------
[clang][ModulesDriver] Add support for Clang modules to -fmodules-driver (#187606)
This PR adds basic support for explicit module builds using Clang
modules only, managed natively by the Clang driver.
(Caching of built modules is not included in this PR.)
RFC for driver-managed module builds:
https://discourse.llvm.org/t/rfc-modules-support-simple-c-20-modules-use-from-the-clang-driver-without-a-build-system
Commit: 17ff42ff9bf301e465f68acd79c4c74f25962fd0
https://github.com/llvm/llvm-project/commit/17ff42ff9bf301e465f68acd79c4c74f25962fd0
Author: Md Abdullah Shahneous Bari <md.abdullah.shahneous.bari at intel.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/XeVMOps.td
M mlir/lib/Conversion/XeGPUToXeVM/XeGPUToXeVM.cpp
M mlir/lib/Conversion/XeVMToLLVM/XeVMToLLVM.cpp
M mlir/test/Conversion/XeGPUToXeVM/loadstore_1d.mlir
M mlir/test/Conversion/XeGPUToXeVM/loadstore_nd.mlir
M mlir/test/Conversion/XeGPUToXeVM/loadstore_nd_sub_byte.mlir
M mlir/test/Conversion/XeGPUToXeVM/loadstoreprefetch.mlir
M mlir/test/Conversion/XeGPUToXeVM/prefetch_nd.mlir
M mlir/test/Conversion/XeGPUToXeVM/prefetch_nd_sub_byte.mlir
M mlir/test/Conversion/XeVMToLLVM/xevm-to-llvm.mlir
Log Message:
-----------
[mlir][XeGPUToXeVM][XeVMToLLVM] Update the default cache-control values. (#190954)
In XeGPU, user can provide cache control value for only certain levels,
they do not have to provide cache-control value for all levels. However,
XeVM requires that each cache level must have a cache-control value. To
solve this issue, XeGPUToXeVM conversion pass adds default value to
cache-levels that does not have a user-provided cache-control value.
This PR updates this process in the following way:
- If no cache-control hint is provided for any levels, use system
default (USE_DEFAULT).
- If any of the levels has at least one cache-control value, use certain
default value for other levels.
If system default (USE_DEFAULT) is used, no cache-control metadata
annotation is necessary.
Commit: 9a14f0f5e75359e07bdef3e9a50cf8c191f92515
https://github.com/llvm/llvm-project/commit/9a14f0f5e75359e07bdef3e9a50cf8c191f92515
Author: Krzysztof Drewniak <Krzysztof.Drewniak at amd.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/test/CodeGen/AMDGPU/s-barrier.ll
M mlir/include/mlir/Dialect/LLVMIR/ROCDLOps.td
Log Message:
-----------
[AMDGPU] Emit s_barrier_signal for s.barrier.signal.var when able (#191028)
When the member count is 0 (which causes the barrier's member count to
be re-used from a previous barrier initialization or
s.barrier.signal.var) and the barrier is constant, we can represent
named barrier signaling with the m0-less form. Enable this behavior.
Assisted by Opus 4.6 which drafted the initial implementation.
Commit: 03d0986b24d5e7a4eacc73729ac4876c7bcb85d0
https://github.com/llvm/llvm-project/commit/03d0986b24d5e7a4eacc73729ac4876c7bcb85d0
Author: Peter Collingbourne <pcc at google.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M llvm/utils/gn/secondary/clang/include/clang/Basic/BUILD.gn
M llvm/utils/gn/secondary/clang/lib/Basic/BUILD.gn
Log Message:
-----------
gn build: Port 1f1ea1ae4151
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/191079
Commit: cdd2a760ff99f213f114c3badf32ed47846bdc56
https://github.com/llvm/llvm-project/commit/cdd2a760ff99f213f114c3badf32ed47846bdc56
Author: Peter Collingbourne <pcc at google.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M llvm/utils/gn/secondary/clang/lib/ScalableStaticAnalysisFramework/Analyses/BUILD.gn
Log Message:
-----------
gn build: Port 4913bd5588ad
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/191080
Commit: 1be9eed7b360e5d1c5027c86fb6e655a8d172012
https://github.com/llvm/llvm-project/commit/1be9eed7b360e5d1c5027c86fb6e655a8d172012
Author: SiliconA-Z <gfunni234 at gmail.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M llvm/lib/Transforms/ObjCARC/ObjCARCOpts.cpp
M llvm/test/Transforms/ObjCARC/test_autorelease_pool.ll
Log Message:
-----------
[ObjCARC] Optimize MayAutorelease by skipping over pools (#188583)
This enables the ARC optimizer to remove autoreleasePoolPush/Pop pairs
that were previously retained. By skipping over nested autorelease
pools, MayAutorelease now correctly recognizes that autoreleases
contained within an inner pool do not escape, allowing the removal of
outer pool boundaries.
Commit: d9e52ccd1aeb572f56806bc8f64005afd47dc617
https://github.com/llvm/llvm-project/commit/d9e52ccd1aeb572f56806bc8f64005afd47dc617
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M .github/workflows/libcxx-build-and-test.yaml
M libcxx/docs/TestingLibcxx.rst
A libcxx/test/requirements.txt
A libcxx/test/selftest/filecheck.negative.sh.cpp
A libcxx/test/selftest/filecheck.sh.cpp
A libcxx/test/selftest/splitfile.sh.cpp
M libcxx/utils/libcxx/test/features/misc.py
Log Message:
-----------
[libc++] Optionally support filecheck and split-file (#165769)
This patch adds optional support for FileCheck and split-file in
libc++'s test suite. Whether FileCheck / split-file is available
can be queried using Lit features.
This should make it possible to test several things that were
previously impossible to test, especially for specific code
generation.
Supersedes #65917 and #188283
Commit: 3b3ac5a1169722bff1ae0f5f8f27a48cc08c3d02
https://github.com/llvm/llvm-project/commit/3b3ac5a1169722bff1ae0f5f8f27a48cc08c3d02
Author: Keith Smiley <keithbsmiley at gmail.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[bazel] Remove unnecessary textual_hdrs usage (#191072)
textual_hdrs is supposed to be used for header files that aren't
standalone, which isn't the case for these mlir headers. Being in
textual_hdrs excludes them from header parsing, which means
layering_check results aren't entirely valid. I'm going to try and
enable header parsing on these targets in a follow up change.
Commit: c98132835667eba2978101e05f6887d9ccc8cfbb
https://github.com/llvm/llvm-project/commit/c98132835667eba2978101e05f6887d9ccc8cfbb
Author: Ryan Buchner <rbuchner at qti.qualcomm.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/RISCV/basic-strided-stores.ll
Log Message:
-----------
[SLP] Create SLP trees starting from constant stride stores (#185964)
Must use `-slp-enable-strided-stores` to enable.
Commit: f7365375d9ecda7b715066e25fcb8730957a3c6a
https://github.com/llvm/llvm-project/commit/f7365375d9ecda7b715066e25fcb8730957a3c6a
Author: Sameer Sahasrabuddhe <sameer.sahasrabuddhe at amd.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
A clang/test/SemaHIP/incorrect-atomic-scope.hip
A clang/test/SemaOpenCL/incorrect-atomic-scope.cl
Log Message:
-----------
[Clang][NFC] tests showcasing incorrect use of HIP and OpenCL memory scope macros (#188890)
The tests demonstrate how incorrect LLVM IR is generated without
diagnostics, when an OpenCL or HIP scope number is passed to an AMDGPU
intrinsic. #185408 lays the groundwork for properly diagnosing this
situation by internally using a separate enum type to represent each set
of scope numbers.
Commit: 53e0c2bfc95e00e2212af2d9954e5d1f91850b7d
https://github.com/llvm/llvm-project/commit/53e0c2bfc95e00e2212af2d9954e5d1f91850b7d
Author: Keith Smiley <keithbsmiley at gmail.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[bazel] Rename PYBIND11 variables (#191095)
These are still used with nanobind so this name was misleading
Commit: 0c36771309f4f87a76a006a3a1430b30bede624a
https://github.com/llvm/llvm-project/commit/0c36771309f4f87a76a006a3a1430b30bede624a
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoZicbo.td
Log Message:
-----------
[RISCV] Remove NoVendorXMIPSCBOP from the Zicbop instructions. (#191015)
The XMIPSCBOP encodings use OP-CUSTOM-0 so there's no encoding overlap
here. Presence of a vendor extension should not disable parsing or
disassembly of a standard extension that doesn't overlap.
Commit: 8ce74e79d9dfe65b408ade6b38558553878c60d4
https://github.com/llvm/llvm-project/commit/8ce74e79d9dfe65b408ade6b38558553878c60d4
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/test/CodeGen/ARM/funnel-shift.ll
M llvm/test/CodeGen/Mips/funnel-shift.ll
M llvm/test/CodeGen/PowerPC/funnel-shift.ll
M llvm/test/CodeGen/X86/funnel-shift.ll
M llvm/test/CodeGen/X86/i128-udiv.ll
Log Message:
-----------
[TargetLowering] Add support for more constants to expandDIVREMByConstant. (#189286)
If we can find a chunk size k where 2^k mod divisor == -1, we can add
the even chunks and subtract the odd chunks. The resulting sum may be
negative, so we need to add 2^k + 1 (a multiple of divisor) for each odd
chunk to ensure the result is positive. We have enough extra bits
between the chunk size and HBitWidth to avoid overflow.
The idea here is similar to checking if a decimal number is divisible by
11. You can add the even digits and subtract the odd digits. If the
resulting sum is divisible by 11 the original number is divisible by 11.
Commit: d0a54493b3e95c3126fccfbbf08db9abbe2b1d01
https://github.com/llvm/llvm-project/commit/d0a54493b3e95c3126fccfbbf08db9abbe2b1d01
Author: Aviral Goel <aviralg at users.noreply.github.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M clang/include/clang/ScalableStaticAnalysisFramework/Core/Model/PrivateFieldNames.def
M clang/include/clang/ScalableStaticAnalysisFramework/Core/Serialization/JSONFormat.h
M clang/include/clang/ScalableStaticAnalysisFramework/Core/Serialization/SerializationFormat.h
M clang/include/clang/ScalableStaticAnalysisFramework/Core/WholeProgramAnalysis/DerivedAnalysis.h
M clang/include/clang/ScalableStaticAnalysisFramework/Core/WholeProgramAnalysis/WPASuite.h
M clang/lib/ScalableStaticAnalysisFramework/CMakeLists.txt
M clang/lib/ScalableStaticAnalysisFramework/Core/CMakeLists.txt
M clang/lib/ScalableStaticAnalysisFramework/Core/Serialization/JSONFormat/JSONFormatImpl.cpp
M clang/lib/ScalableStaticAnalysisFramework/Core/Serialization/JSONFormat/JSONFormatImpl.h
A clang/lib/ScalableStaticAnalysisFramework/Core/Serialization/JSONFormat/WPASuite.cpp
A clang/lib/ScalableStaticAnalysisFramework/Plugins/CMakeLists.txt
A clang/lib/ScalableStaticAnalysisFramework/Plugins/ExamplePlugin/AnalysisResults.h
A clang/lib/ScalableStaticAnalysisFramework/Plugins/ExamplePlugin/CMakeLists.txt
A clang/lib/ScalableStaticAnalysisFramework/Plugins/ExamplePlugin/PairsAnalysis.cpp
A clang/lib/ScalableStaticAnalysisFramework/Plugins/ExamplePlugin/TagsAnalysis.cpp
A clang/lib/ScalableStaticAnalysisFramework/Plugins/ExamplePlugin/TagsPairsAnalysis.cpp
A clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/duplicate-analysis-name.json
A clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/missing-results.json
A clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/pairs-result-bad-count.json
A clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/pairs-result-bad-pair-counts.json
A clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/pairs-result-entry-not-object.json
A clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/pairs-result-missing-entity-id.json
A clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/result-entry-analysis-name-not-string.json
A clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/result-entry-deserializer-error.json
A clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/result-entry-missing-analysis-name.json
A clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/result-entry-missing-result-field.json
A clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/result-entry-no-format-info.json
A clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/result-entry-not-object.json
A clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/result-entry-result-not-object.json
A clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/results-not-array.json
A clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/rt-all-results.json
A clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/rt-empty.json
A clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/rt-multiple-results.json
A clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/tags-result-bad-element.json
A clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/tags-result-missing-tags.json
A clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/tagspairs-result-bad-field-type.json
A clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/tagspairs-result-missing-field.json
A clang/test/Analysis/Scalable/ssaf-format/WPASuite/with-plugin.test
A clang/test/Analysis/Scalable/ssaf-format/WPASuite/without-plugin.test
A clang/test/Analysis/Scalable/ssaf-format/lit.local.cfg
M clang/test/CMakeLists.txt
M clang/tools/clang-ssaf-format/CMakeLists.txt
M clang/tools/clang-ssaf-format/SSAFFormat.cpp
M clang/unittests/ScalableStaticAnalysisFramework/Frontend/TUSummaryExtractorFrontendActionTest.cpp
M clang/unittests/ScalableStaticAnalysisFramework/Registries/MockSerializationFormat.cpp
M clang/unittests/ScalableStaticAnalysisFramework/Registries/MockSerializationFormat.h
M clang/unittests/ScalableStaticAnalysisFramework/TestFixture.h
Log Message:
-----------
[clang][ssaf] Add `JSONFormat` support for `WPASuite` (#191082)
This patch adds `JSONFormat` serialization support for `WPASuite`.
- Adds `readWPASuite` / `writeWPASuite` to the `SerializationFormat`
abstract interface and implements them in `JSONFormat`.
- Introduces `AnalysisResultRegistryGenerator`, a per-format plugin
registry template in `SerializationFormat`, allowing analysis authors to
register (de)serializers for their `AnalysisResult` subtypes with a
single static declaration.
- Extends `PrivateFieldNames.def` with `WPASuite::Data` and
`WPASuite::IdTable`, and adds a `makeWPASuite()` factory to
`SerializationFormat`, so deserialization code can construct a
`WPASuite` incrementally through the same access-controlled pattern used
for all other SSAF data structures.
Commit: e65dd1f8a0c8cfd2255f336e5096232f587ed397
https://github.com/llvm/llvm-project/commit/e65dd1f8a0c8cfd2255f336e5096232f587ed397
Author: Sam Elliott <aelliott at qti.qualcomm.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/test/CodeGen/RISCV/musttail.ll
Log Message:
-----------
[RISCV][NFC] Improve Musttail Comments/Tests (#191093)
In the Target code, this is mostly fixing typos or other comment issues.
In the musttail.ll test, this ensures the tests are more aligned with
their comments, and that the comments are accurate. I inserted some
inline asm clobbers so it's also easier to see what's going on.
Commit: fc48fac95b8b1bad161c705dd4bf71300bd2b609
https://github.com/llvm/llvm-project/commit/fc48fac95b8b1bad161c705dd4bf71300bd2b609
Author: Stefan Schulze Frielinghaus <stefansf at linux.ibm.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M compiler-rt/lib/sanitizer_common/sanitizer_linux_libcdep.cpp
Log Message:
-----------
[TSan] Fix determining static TLS blocks (#183106)
Running gcc test c-c++-common/tsan/tls_race.c on s390 we get:
ThreadSanitizer: CHECK failed: tsan_platform_linux.cpp:618 "((thr_beg))
>= ((tls_addr))" (0x3ffaa35e140, 0x3ffaa35e250) (tid=2419930)
#0 __tsan::CheckUnwind() /devel/src/libsanitizer/tsan/tsan_rtl.cpp:696
(libtsan.so.2+0x91b57)
#1 __sanitizer::CheckFailed(char const*, int, char const*, unsigned long
long, unsigned long long)
/devel/src/libsanitizer/sanitizer_common/sanitizer_termination.cpp:86
(libtsan.so.2+0xd211b)
#2 __tsan::ImitateTlsWrite(__tsan::ThreadState*, unsigned long, unsigned
long) /devel/src/libsanitizer/tsan/tsan_platform_linux.cpp:618
(libtsan.so.2+0x8faa3)
#3 __tsan::ThreadStart(__tsan::ThreadState*, unsigned int, unsigned long
long, __sanitizer::ThreadType)
/devel/src/libsanitizer/tsan/tsan_rtl_thread.cpp:225
(libtsan.so.2+0xaadb5)
#4 __tsan_thread_start_func
/devel/src/libsanitizer/tsan/tsan_interceptors_posix.cpp:1065
(libtsan.so.2+0x3d34d)
#5 start_thread <null> (libc.so.6+0xae70d) (BuildId:
d3b08de1b543c2d15d419bf861b3c2e4c01ac75b)
#6 thread_start <null> (libc.so.6+0x12d2ff) (BuildId:
d3b08de1b543c2d15d419bf861b3c2e4c01ac75b)
In order to determine the static TLS blocks in GetStaticTlsBoundary we
iterate over the modules and try to find the largest range without a
gap. Here we might have that modules are spaced exactly by the
alignment. For example, for the failing test we have:
(gdb) p/x ranges.data_[0]
$1 = {begin = 0x3fff7f9e6b8, end = 0x3fff7f9e740, align = 0x8, tls_modid
= 0x3} (gdb) p/x ranges.data_[1]
$2 = {begin = 0x3fff7f9e740, end = 0x3fff7f9eed0, align = 0x40,
tls_modid = 0x2} (gdb) p/x ranges.data_[2]
$3 = {begin = 0x3fff7f9eed8, end = 0x3fff7f9eef8, align = 0x8, tls_modid
= 0x4} (gdb) p/x ranges.data_[3]
$4 = {begin = 0x3fff7f9eefc, end = 0x3fff7f9ef00, align = 0x4, tls_modid
= 0x1}
where ranges[3].begin == ranges[2].end + ranges[3].align holds. Since in
the loop a strict inequality test is used we compute the wrong address
(gdb) p/x *addr
$5 = 0x3fff7f9eefc
whereas 0x3fff7f9e6b8 is expected which is why we bail out in the
subsequent.
Commit: dabd8cc2334917272fe73b70626fd3a5f9e63cf5
https://github.com/llvm/llvm-project/commit/dabd8cc2334917272fe73b70626fd3a5f9e63cf5
Author: Marian Buschsieweke <maribu at users.noreply.github.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M compiler-rt/lib/sanitizer_common/sanitizer_platform_limits_posix.cpp
Log Message:
-----------
[compiler-rt] fix __sanitizer::struct_sock_fprog_sz availability (#183411)
`struct sock_fprog` is not provided by glibc, but rather by the linux
headers (`#include <linux/filter.h`). It seems that glibc due to an
implementation detail internally includes `<linux/filter.h>` somewhere
other C libs (e.g. musl) do not, which previously caused build failures
and let to disabling `struct sock_fprog` on non-glibc Linux systems.
This adds the missing include and provides it again for all Linux
systems regardless of C lib.
Commit: 42629d7a174a62b98835e2e4c738ccdce027590b
https://github.com/llvm/llvm-project/commit/42629d7a174a62b98835e2e4c738ccdce027590b
Author: Shreeyash Pandey <shreeyash335 at gmail.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/test/CodeGen/AArch64/arm64-atomic.ll
M llvm/test/CodeGen/AArch64/atomicrmw-O0.ll
M llvm/test/CodeGen/AArch64/logical-op-with-not.ll
Log Message:
-----------
[AArch64][CodeGen] match (or x (not y)) to generate mov+orn (#190769)
Fixes: https://github.com/llvm/llvm-project/issues/100045
Adds AddedComplexity to increase the priority the pattern that matches
(or x (not y)) and generates a mov+orn instead of the original mvn+orr.
The number of instructions still stay the same but mov+orn can be
considered better than mvn+orr for two reasons:
1. Symmetry: For the same input with an 'and' instead of 'or', mov+bic
is generated.
2. Optimzation through register rename: If mov is immediate (for
example, 'mov x1, #0x4'), it can be retired early by the register
renamer and never issued for execution.
Commit: 3b9f7913148d0f5d952ce85e8d8dd6ae4fec678b
https://github.com/llvm/llvm-project/commit/3b9f7913148d0f5d952ce85e8d8dd6ae4fec678b
Author: Mads Marquart <mads at marquart.dk>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M compiler-rt/lib/lsan/lsan_common.cpp
Log Message:
-----------
[LSAN] Add extra suppressions on Apple Aarch64 (#117478)
- _fetchInitializingClassList for startup code in dyld.
- dyld4::RuntimeState::_instantiateTLVs for thread locals.
Fixes https://github.com/llvm/llvm-project/issues/115992, now it shows
the following instead (in a project using thread locals):
```
-----------------------------------------------------
Suppressions used:
count bytes template
3 120 *_fetchInitializingClassList*
1 104 *dyld4::RuntimeState::_instantiateTLVs*
-----------------------------------------------------
```
Commit: edff73e19e4448541086431b325df75de62817ba
https://github.com/llvm/llvm-project/commit/edff73e19e4448541086431b325df75de62817ba
Author: Mészáros Gergely <gergely.meszaros at intel.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M llvm/include/llvm/ABI/FunctionInfo.h
Log Message:
-----------
[LLVMABI] Fix build for GCC < 8 (#190974)
`llvm::abi::ArgInfo::get*` functions return `llvm::abi::ArgInfo` by
value, so we need the type to be copyable. It is not though, because of
the non trivially copyable member `MaybeAlign` (`std::optional<Align>`)
in a union, which deletes the implicit copy/move constructors and
assignment operators.
For modern GCC versions and for clang this does not present as a problem
due to named return value optimization (NRVO). It is however not a bug
in old GCC versions, because NRVO is not guaranteed. Similary
`std::optional`
could be trivially copyable, but that is also not guaranteed by the
standard.
Instead of depending on these details of the C++ implementation, move
the `MaybeAlign` member out of the union, and make it a separate member
of `abi::ArgInfo`. We lose the expressiveness from the type system that
`IndirectAttrInfo` always has a defined alignment, but we can get that
back in practice by placing asserts in the code that uses it. Therefore
`llvm::abi::ArgInfo` can still maintain this invariant.
Fixes: #190972
Commit: 82aee4c03a0a6e3ab616b5253edf79b48e013b71
https://github.com/llvm/llvm-project/commit/82aee4c03a0a6e3ab616b5253edf79b48e013b71
Author: Nikita Terentev <svet58585 at mail.ru>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M llvm/lib/DebugInfo/LogicalView/Readers/LVCodeViewReader.cpp
M llvm/lib/DebugInfo/LogicalView/Readers/LVDWARFReader.cpp
M llvm/unittests/DebugInfo/LogicalView/DWARFReaderTest.cpp
Log Message:
-----------
[llvm-debuginfo-analyzer] Fix missed 'else' in LVCodeViewReader and LVDWARFReader.cpp. (#188578)
Issues found PVS studio static analyzer. LVCodeViewReader.cpp. PR for #170117.
4. Potent UB: manipulation of invalid object.
The PVS-Studio warning: V519 The 'FeaturesValue' variable is assigned values twice successively.
Committed on behalf of @Seraphimt
Commit: 3cc34fb973408b0cf1be082ccc78d5f153c25387
https://github.com/llvm/llvm-project/commit/3cc34fb973408b0cf1be082ccc78d5f153c25387
Author: Brian Cain <brian.cain at oss.qualcomm.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M compiler-rt/cmake/caches/hexagon-linux-clangrt.cmake
Log Message:
-----------
[compiler-rt] Enable sanitizers, XRay, etc for hexagon (#190300)
Enable additional compiler-rt components in the hexagon-linux-clangrt
standalone cache file.
Also set CAN_TARGET_hexagon=1 to bypass the try_compile() probe that
fails during cross-compilation, and configure SANITIZER_CXX_ABI to use
the in-tree libc++ to avoid link failures.
Commit: b48f5af727f2c99d0f8c2a0c0ef85737ec682d3f
https://github.com/llvm/llvm-project/commit/b48f5af727f2c99d0f8c2a0c0ef85737ec682d3f
Author: Carlos Alberto Enciso <Carlos.Enciso at sony.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M llvm/lib/DebugInfo/LogicalView/Readers/LVCodeViewReader.cpp
M llvm/lib/DebugInfo/LogicalView/Readers/LVDWARFReader.cpp
M llvm/unittests/DebugInfo/LogicalView/DWARFReaderTest.cpp
Log Message:
-----------
Revert "Fix missed 'else' in LVCodeViewReader and LVDWARFReader.cpp. " (#191109)
Reverts llvm/llvm-project#188578
It cause a test failure on multiple buildbots.
Commit: ec78b2184fe69e27913ba729f3db300f4d26d260
https://github.com/llvm/llvm-project/commit/ec78b2184fe69e27913ba729f3db300f4d26d260
Author: Lang Hames <lhames at gmail.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M orc-rt/unittests/SessionTest.cpp
Log Message:
-----------
[orc-rt] Add ScheduleShutdownFromOnDetachHandler unit test. (#191110)
This test checks that it's safe to call Session::shutdown from an
on-detach handler, and that:
1. The Session does proceed to shut down.
2. All on-detach handlers run before any on-shutdown handlers.
Commit: b55965c6dba9c417b654fc27cff19b6403496fa3
https://github.com/llvm/llvm-project/commit/b55965c6dba9c417b654fc27cff19b6403496fa3
Author: NAKAMURA Takumi <geek4civic at gmail.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M clang/test/Driver/modules-driver-dep-graph.cpp
Log Message:
-----------
clang/test: Prepend a cleanup triggered by #190062 (#191103)
Commit: 501364026acf351a4a21dc52014d1a7ab4993329
https://github.com/llvm/llvm-project/commit/501364026acf351a4a21dc52014d1a7ab4993329
Author: Lang Hames <lhames at gmail.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M orc-rt/include/orc-rt/Session.h
Log Message:
-----------
[orc-rt] Add comment about Session::waitForShutdown usage. NFC. (#191111)
Add a warning not to call Session::waitFromShutdown from on-detach or
on-shutdown handlers.
Commit: 16f02c0940d6ee783c38ca27b44fc158d77e7567
https://github.com/llvm/llvm-project/commit/16f02c0940d6ee783c38ca27b44fc158d77e7567
Author: Phoebe Wang <phoebe.wang at intel.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
A clang/test/CodeGen/X86/pr190962.ll
M llvm/lib/Target/X86/X86FastISel.cpp
M llvm/lib/Target/X86/X86InstrInfo.cpp
M llvm/lib/Target/X86/X86InstrInfo.h
Log Message:
-----------
[X86][APX] Add copy instruction to LiveInterval of SrcReg (#191102)
Fixes: #190962
Commit: 6d49460de1e5ee87de94d48fd72cf3cf3d5bfc5a
https://github.com/llvm/llvm-project/commit/6d49460de1e5ee87de94d48fd72cf3cf3d5bfc5a
Author: Mateusz Mikuła <oss at mateuszmikula.dev>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M clang/lib/Driver/ToolChains/MinGW.cpp
M clang/test/Driver/mingw.cpp
Log Message:
-----------
[Clang] [MinGW] Handle `-nolibc` argument (#182062)
This implementation differs from GCC, but arguably more in line with
Unix systems, because it stops linking of default Win32 system
libraries.
On GCC it works like this:
```
❯ /ucrt64/bin/gcc -### /dev/null -nolibc 2>&1 | tr ' ' '\n' | rg '^\-l' | sort -u
-lgcc
-lgcc_eh
-lkernel32
-lmingw32
-lmingwex
-lmsvcrt
❯ /ucrt64/bin/gcc -### /dev/null 2>&1 | tr ' ' '\n' | rg '^\-l' | sort -u
-ladvapi32
-lgcc
-lgcc_eh
-lkernel32
-lmingw32
-lmingwex
-lmsvcrt
-lpthread
-lshell32
-luser32
```
Clang with this PR:
```
❯ ./bin/clang -### /dev/null -nolibc 2>&1 | tr ' ' '\n' | rg '^"\-l' | sort -u
"-lgcc"
"-lgcc_eh"
```
The motivation for supporting this argument comes from Rust, which wants
to control what is linked, but still utilize compiler builtins. With GCC
that is done by supplying `-nodefaultlibs` and `-lgcc`, but LLVM's
compiler-rt cannot be added back as easily.
`-nolibc --unwindlib=none` that skips Win32 libs would give the parity
with GCC's `-nodefaultlibs -lgcc`.
Commit: 5359e80b812971298e895556e097666b6d426081
https://github.com/llvm/llvm-project/commit/5359e80b812971298e895556e097666b6d426081
Author: Lang Hames <lhames at gmail.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M orc-rt/include/orc-rt/Session.h
M orc-rt/lib/executor/Session.cpp
Log Message:
-----------
[orc-rt] Simplify notification service construction in Session. NFC. (#191113)
We can replace the addNotificationService method with a call to the
generic createService method that was introduced in 98ccac607a9ff.
Commit: ada1a0080748ba43cda2081184f46416aec1f4e9
https://github.com/llvm/llvm-project/commit/ada1a0080748ba43cda2081184f46416aec1f4e9
Author: Fangrui Song <i at maskray.me>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
A llvm/test/MC/ARM/thumb-ldr-stretch.s
A llvm/test/MC/CSKY/lrw-stretch.s
Log Message:
-----------
[test] Add MC relaxation stretch tests (#191118)
Verify:
- ARM tLDRpci instructions don't spuriously widen to t2LDRpci when
upstream branches relax, which would push cbz targets out of range.
This would catch the #184544 regression.
- CSKY lrw16 instructions don't spuriously widen to lrw32 when
upstream branches relax. Similar to ARM.
Commit: 0d42811ea4658b3e86a3801b3bc848324f8540f8
https://github.com/llvm/llvm-project/commit/0d42811ea4658b3e86a3801b3bc848324f8540f8
Author: Cullen Rhodes <cullen.rhodes at arm.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp
Log Message:
-----------
[AArch64] Avoid expensive getStrictlyReservedRegs calls in isAnyArgRegReserved (#190957)
`AArch64RegisterInfo::isAnyArgRegReserved` is used during call lowering
across all instruction selectors (SDAG, GISel, FastISel) to emit an
error if any of the arg registers (x0-x7) are reserved. This puts
`AArch64RegisterInfo::getStrictlyReservedRegs` which computes this in
the hot-path and it shows up in compile-time profiles since it's
computed for every call.
As the intent was to guard against using +reserve-x{0-7} with function
calls we can instead call `isXRegisterReserved` which is faster since
it's a simple BitVector lookup.
Compile-time improves across all instruction selectors on CTMark:
geomean
SDAG ~ -0.14%
GISel ~ -0.6%
FastISel ~ -0.7% (measured locally)
https://llvm-compile-time-tracker.com/compare.php?from=4d84263b341c3ee1847081c50e1541b62fbcb08c&to=23c4576c01d7d5e0e603366b86239e069410c3a7&stat=instructions%3Au
The numbers above are from the initial implementation that cached
`isAnyArgRegReserved`, but local experiments show instead calling
`isXRegisterReserved` is even faster. I also experimented with caching
`getStrictlyReservedRegs`, but the compile-time impact is negligible which
suggests this code isn't particularly hot and worth optimising outside of
call-lowering:
https://llvm-compile-time-tracker.com/compare.php?from=4d84263b341c3ee1847081c50e1541b62fbcb08c&to=38166d5afa9dd53320da0d47d4f056d08f0d75ca&stat=instructions%3Au
so I've also removed the FIXME from `getStrictlyReservedRegs`.
Commit: 4575266a6615f352b53e12cf4510dbad1669b363
https://github.com/llvm/llvm-project/commit/4575266a6615f352b53e12cf4510dbad1669b363
Author: Fangrui Song <i at maskray.me>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M llvm/lib/MC/MCAssembler.cpp
A llvm/test/MC/X86/align-branch-convergence.s
Log Message:
-----------
[MC] Track per-section inner relaxation iterations and add convergence test (#191121)
Count inner iterations (max across sections) instead of outer relaxOnce
calls. This more accurately reflects the work done during relaxation.
Add a test that verifies boundary alignment convergence may require
O(N) iterations where N is the number of BoundaryAlign fragments.
This will be fixed by #190318
Commit: a5ae63917e863dc408a1f355620427e51c154fd9
https://github.com/llvm/llvm-project/commit/a5ae63917e863dc408a1f355620427e51c154fd9
Author: Phoebe Wang <phoebe.wang at intel.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M clang/test/CodeGen/X86/pr190962.ll
Log Message:
-----------
[X86] Fix No available targets failure (#191116)
Commit: 7c1805d66484552700e04da1269ce2e7d53bec4c
https://github.com/llvm/llvm-project/commit/7c1805d66484552700e04da1269ce2e7d53bec4c
Author: Luke Lau <luke at igalia.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M llvm/lib/CodeGen/ExpandVectorPredication.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vcopysign-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfabs-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vcopysign-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfabs-vp.ll
Log Message:
-----------
[RISCV] Remove codegen for vp_fabs, vp_fcopysign (#190592)
Part of the work to remove trivial VP intrinsics from the RISC-V
backend, see
https://discourse.llvm.org/t/rfc-remove-codegen-support-for-trivial-vp-intrinsics-in-the-risc-v-backend/87999
This splits off 2 intrinsics from #179622.
The remaining sign bit intrinsic vp_fneg is expanded in #190589 since
other tests rely on it
Commit: e2b44f1fbe2dbff14b4067836b715f2201e35178
https://github.com/llvm/llvm-project/commit/e2b44f1fbe2dbff14b4067836b715f2201e35178
Author: Kit Dallege <xaum.io at gmail.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M libc/docs/CMakeLists.txt
M libc/docs/headers/index.rst
A libc/utils/docgen/fcntl.yaml
Log Message:
-----------
[libc][docs] Add fcntl.h POSIX header documentation (#188822)
Add YAML documentation for `fcntl.h` listing all functions and macros as
defined in POSIX.1-2024 (IEEE Std 1003.1-2024).
**Functions (6):** creat, fcntl, open, openat, posix_fadvise,
posix_fallocate
**Macros (51):** O_RDONLY, O_WRONLY, O_RDWR, O_APPEND, O_CREAT, O_EXCL,
O_TRUNC, F_DUPFD, F_GETFD, F_SETFD, F_GETFL, F_SETFL, AT_FDCWD,
POSIX_FADV_*, and more.
Part of #122006
Commit: 87491a4c8028636bc794193004771a49cbe32a2b
https://github.com/llvm/llvm-project/commit/87491a4c8028636bc794193004771a49cbe32a2b
Author: Naveen Seth Hanig <naveen.hanig at outlook.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M clang/lib/Driver/ModulesDriver.cpp
R clang/test/Driver/modules-driver-clang-modules-only.cpp
M clang/test/Driver/modules-driver-manifest-input-args.cpp
Log Message:
-----------
Revert "[clang][ModulesDriver] Add support for Clang modules to -fmodules-driver" due to memory leak (#191122)
Reverts llvm/llvm-project#187606 due to a memory leak.
See
https://github.com/llvm/llvm-project/pull/187606#issuecomment-4212198373
Commit: f1aa984e7183aa60f3a989c187cbcd845147b059
https://github.com/llvm/llvm-project/commit/f1aa984e7183aa60f3a989c187cbcd845147b059
Author: Luke Lau <luke at igalia.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.h
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fptosi-vp-mask.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fptosi-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fptoui-vp-mask.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fptoui-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-sitofp-vp-mask.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-sitofp-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-uitofp-vp-mask.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-uitofp-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfptosi-vp-mask.ll
M llvm/test/CodeGen/RISCV/rvv/vfptosi-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfptoui-vp-mask.ll
M llvm/test/CodeGen/RISCV/rvv/vfptoui-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vsitofp-vp-mask.ll
M llvm/test/CodeGen/RISCV/rvv/vsitofp-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vuitofp-vp-mask.ll
M llvm/test/CodeGen/RISCV/rvv/vuitofp-vp.ll
Log Message:
-----------
[RISCV] Remove codegen for vp_fp_to_{u,s}int, vp_{u,s}int_to_fp (#190576)
Part of the work to remove trivial VP intrinsics from the RISC-V
backend, see
https://discourse.llvm.org/t/rfc-remove-codegen-support-for-trivial-vp-intrinsics-in-the-risc-v-backend/87999
This splits off 4 intrinsics from #179622.
Commit: 9162f069a3abf2cf3a2718a5607969bc83680f05
https://github.com/llvm/llvm-project/commit/9162f069a3abf2cf3a2718a5607969bc83680f05
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M llvm/lib/Passes/PassBuilder.cpp
M llvm/test/Other/new-pm-defaults.ll
M llvm/test/Other/new-pm-lto-defaults.ll
M llvm/test/Other/new-pm-thinlto-postlink-defaults.ll
M llvm/test/Other/new-pm-thinlto-postlink-pgo-defaults.ll
M llvm/test/Other/new-pm-thinlto-postlink-samplepgo-defaults.ll
R llvm/test/Transforms/LoopVectorize/X86/metadata-enable.ll
A llvm/test/Transforms/PhaseOrdering/X86/loop-vectorize-metadata.ll
Log Message:
-----------
[Passes] Enable vectorizers at Oz (#190182)
The way this is handled right now is very inconsistent. When using
`-passes="default<Oz>"` (the code modified here), both vectorizers were
disabled. The clang frontend enables SLP at Oz but not LoopVectorize.
All the LTO backends enable both vectorizers at Oz.
I'm proposing here that `default<Oz>` should enable both vectorizers by
default. There seems to be a consensus that this is the right thing to
do for SLP (as both Clang and LTO backends do this). It's a bit less
clear for LoopVectorize, but given that the implementation already has
special handling for minsize functions (like switching to code size for
cost modelling and disabling various size-increasing transforms) I'm
inclined that we should also be enabling it at minsize.
This is part of trying to make optsize/minsize purely attribute based
and independent of the pipeline optimization level.
Commit: 9ba774566e27b76b9c7c2b2ddd108c140e2579fb
https://github.com/llvm/llvm-project/commit/9ba774566e27b76b9c7c2b2ddd108c140e2579fb
Author: Luke Lau <luke at igalia.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M llvm/docs/LangRef.rst
M llvm/include/llvm/CodeGen/ISDOpcodes.h
M llvm/include/llvm/IR/Intrinsics.td
M llvm/include/llvm/Target/TargetSelectionDAG.td
M llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp
M llvm/lib/CodeGen/TargetLoweringBase.cpp
M llvm/lib/IR/Verifier.cpp
A llvm/test/CodeGen/AArch64/masked-sdiv-fixed-length.ll
A llvm/test/CodeGen/AArch64/masked-sdiv-scalable.ll
A llvm/test/CodeGen/AArch64/masked-srem-fixed-length.ll
A llvm/test/CodeGen/AArch64/masked-srem-scalable.ll
A llvm/test/CodeGen/AArch64/masked-udiv-fixed-length.ll
A llvm/test/CodeGen/AArch64/masked-udiv-scalable.ll
A llvm/test/CodeGen/AArch64/masked-urem-fixed-length.ll
A llvm/test/CodeGen/AArch64/masked-urem-scalable.ll
A llvm/test/CodeGen/PowerPC/masked-sdiv.ll
A llvm/test/CodeGen/PowerPC/masked-srem.ll
A llvm/test/CodeGen/PowerPC/masked-udiv.ll
A llvm/test/CodeGen/PowerPC/masked-urem.ll
A llvm/test/CodeGen/RISCV/rvv/masked-sdiv.ll
A llvm/test/CodeGen/RISCV/rvv/masked-srem.ll
A llvm/test/CodeGen/RISCV/rvv/masked-udiv.ll
A llvm/test/CodeGen/RISCV/rvv/masked-urem.ll
A llvm/test/CodeGen/X86/masked-sdiv.ll
A llvm/test/CodeGen/X86/masked-srem.ll
A llvm/test/CodeGen/X86/masked-udiv.ll
A llvm/test/CodeGen/X86/masked-urem.ll
A llvm/test/Verifier/masked-divrem.ll
Log Message:
-----------
[IR] Add llvm.masked.{udiv,sdiv,urem,srem} intrinsics (#189705)
Because division by zero is undefined behaviour, when the loop
vectorizer encounters a div that's not unconditionally executed it needs
to replace its divisor with a non-zero value on any lane that wouldn't
have been executed in the scalar loop:
%safedivisor = select <vscale x 2 x i1> %mask, <vscale x 2 x i64> %divisor, <vscale x 2 x i64> splat (i64 1)
%res = udiv <vscale x 2 x i64> %dividend, %safedivisor
https://godbolt.org/z/jczc3ovbr
We need this for architectures like x86 where division by zero (or
overflow for sdiv/srem) can trap. But on AArch64 and RISC-V division
doesn't trap so we don't actually need to mask off any divisors. Not
only that, but there are also dedicated vector division instructions
that can be predicated.
Originally we tried to optimize this on RISC-V by transforming `udiv x,
(select mask, y, 1) -> vp.udiv x, y, mask`. However this isn't actually
a correct transform because the masked off lanes aren't poison, but x.
So with the safe-divisor pattern we end up losing the information that
the masked off lanes aren't actually used and can be poison.
This patch adds masked intrinsics for udiv and friends to
represent the semantics where the masked off lanes don't trap and
produce poison. This will allow AArch64 and RISC-V to emit their native
predicated division instructions and avoid the redundant select
instruction.
%res = call <vscale x 4 x i32> @llvm.masked.udiv(<vscale x 4 x i32> %x, <vscale x 4 x i32> %y, <vscale x 4 x i1> %m)
Commit: 485265734464e04ab9b2a64e6967157e52fac5d0
https://github.com/llvm/llvm-project/commit/485265734464e04ab9b2a64e6967157e52fac5d0
Author: Lang Hames <lhames at gmail.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M orc-rt/include/orc-rt/Session.h
M orc-rt/lib/executor/Session.cpp
M orc-rt/unittests/SessionTest.cpp
Log Message:
-----------
[orc-rt] Remove Session::waitForShutdown. (#191124)
The existing implementation triggered Session shutdown and then blocked
on a std::future that would be unblocked by an on-shutdown callback that
waitForShutdown had installed. Since there is no guarantee that this
callback would be the last one run, the result was that waitForShutdown
only guaranteed that it would not return until the shutdown sequence had
started (rather than completed).
This could have been fixed, but the Session destructor is already
supposed to block until the Session can be safely destroyed, so a
"working" waitForShutdown would be effectively redundant. Since it was
also a potential footgun (calling it from an on-detach or on-shutdown
callback could deadlock) it was safer to just remove it entirely.
Some Session unit tests do rely on testing properties of the Session
after the shutdown sequence has started, so a new utility has been added
to SessionTests.cpp to support this.
Commit: d512d4ab010a60fc06e65db91e25497840f9679f
https://github.com/llvm/llvm-project/commit/d512d4ab010a60fc06e65db91e25497840f9679f
Author: Pankaj Dwivedi <pankajkumar.divedi at amd.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M llvm/include/llvm/ADT/GenericUniformityImpl.h
M llvm/lib/Analysis/UniformityAnalysis.cpp
Log Message:
-----------
[UniformityAnalysis] Skip CycleAnalysis on targets without branch divergence (#189948)
UniformityAnalysis unconditionally computes CycleAnalysis even on
targets that don't care about divergence, causing measurable
compile-time overhead (see [#99878
(comment)](https://github.com/llvm/llvm-project/pull/175167#issuecomment-4156230947)).
---------
Co-authored-by: padivedi <padivedi at amd.com>
Commit: fcb8fba5b7e7d717dd871528400abd37641aabbb
https://github.com/llvm/llvm-project/commit/fcb8fba5b7e7d717dd871528400abd37641aabbb
Author: Lang Hames <lhames at gmail.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M orc-rt/unittests/SessionTest.cpp
Log Message:
-----------
[orc-rt] Move RedundantAsyncShutdown to SessionTest suite. NFCI. (#191130)
RedundantAsyncShutdown is a Session test, not a ControllerAccess test.
Commit: 5a7c1e0e9086bf048b6261240d331613bdbadcfe
https://github.com/llvm/llvm-project/commit/5a7c1e0e9086bf048b6261240d331613bdbadcfe
Author: Mao Chuanjun <10255501521 at stu.ecnu.edu.cn>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M clang-tools-extra/clang-tidy/readability/NonConstParameterCheck.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/test/clang-tidy/checkers/readability/non-const-parameter.cpp
Log Message:
-----------
[clang-tidy] Fix false positive in readability-non-const-parameter with dependent array subscripts (#190936)
Fixes #60163
---------
Co-authored-by: Zeyi Xu <zeyi2 at nekoarch.cc>
Commit: 623d3bbdc5f7d78085c97261b0baff41901d4739
https://github.com/llvm/llvm-project/commit/623d3bbdc5f7d78085c97261b0baff41901d4739
Author: Phoebe Linck <phoebe.linck at hpe.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M flang/lib/Semantics/check-omp-loop.cpp
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/check-omp-structure.h
A flang/test/Semantics/OpenMP/assumed-size-array-dsa.f90
M flang/test/Semantics/OpenMP/cray-pointer-usage.f90
Log Message:
-----------
[Flang][OpenMP] Data-sharing restrictions on assumed-size arrays (#189324)
Per `OpenMP 5.0 2.19.1 Data-Sharing Attribute Rules`, assumed-size
arrays are predetermined shared and may not appear in a data-sharing
clause besides `shared`.
Patch adds a semantics check for assumed-size arrays appearing in
clauses where they aren't allowed.
Commit: ff3486071d34e21daf0df7ef6a154959772940de
https://github.com/llvm/llvm-project/commit/ff3486071d34e21daf0df7ef6a154959772940de
Author: Yeongu Choe <yeongu.choe at icloud.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M llvm/include/llvm/Support/TargetOpcodes.def
M llvm/include/llvm/Target/GenericOpcodes.td
M llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
A llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-constrained-fcmp.ll
M llvm/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer-info-validation.mir
Log Message:
-----------
[LLVM][GlobalISel] Implement G_STRICT_FCMP in IRTranslator (#190754)
- `G_STRICT_FCMP` and `G_STRICT_FCMPS` are constrained operations in
gMIR.
Commit: 3ad6afe0609b2138b81f773cf4fbe2d464bc26d6
https://github.com/llvm/llvm-project/commit/3ad6afe0609b2138b81f773cf4fbe2d464bc26d6
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M polly/lib/Transform/Canonicalization.cpp
Log Message:
-----------
[Polly] Remove pipeline-level Oz handling for LoopRotate (#191137)
This handling was moved fully into the pass in
1662c200a5b151ad15b7efc82837076d8967dc11. However, that changed
missed the usage of LoopRotate in polly.
Commit: 7fa216bb032aa0a90d5fe9c9b019162d4bb52ae5
https://github.com/llvm/llvm-project/commit/7fa216bb032aa0a90d5fe9c9b019162d4bb52ae5
Author: Max Graey <maxgraey at gmail.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
M llvm/test/Transforms/InstCombine/fp-floor-ceil.ll
Log Message:
-----------
[InstCombine] Simplify `floor`/`ceil` to `trunc` for integral tests (#190620)
Partially fix https://github.com/llvm/llvm-project/issues/188035
Some proof checks:
`fcmp oeq ceil(x), x` -> `fcmp oeq trunc(x), x`
[Proof](https://alive2.llvm.org/ce/z/kLQeFQ)
`fcmp one floor(x), x` -> `fcmp one trunc(x), x`
[Proof](https://alive2.llvm.org/ce/z/vyVAUX)
`fcmp ueq ceil(x), x` -> `fcmp ueq trunc(x), x`
[Proof](https://alive2.llvm.org/ce/z/DbFMZb)
`fcmp une floor(x), x` -> `fcmp une trunc(x), x`
[Proof](https://alive2.llvm.org/ce/z/QVLQLw)
This may be useful for CSE (due to `trunc(x) == x` is quite common
integral test) or further simplifications specific to `trunc`. Also,
`trunc` is cheaper if it lowered to
[libm](https://git.musl-libc.org/cgit/musl/tree/src/math/trunc.c) /
[libc](https://github.com/llvm/llvm-project/blob/b4f50cfd4a3a086db3f88271c9595056a877ef90/libc/src/__support/FPUtil/NearestIntegerOperations.h#L25)
call
Commit: a0908ae29705eea517c9667e07215b0c7dc49ba3
https://github.com/llvm/llvm-project/commit/a0908ae29705eea517c9667e07215b0c7dc49ba3
Author: Balázs Benics <benicsbalazs at gmail.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M clang/docs/analyzer/user-docs/Annotations.rst
M clang/include/clang/Basic/AttrDocs.td
Log Message:
-----------
[clang][docs] Improve documentation of [[ownership_returns]] attribute (#191005)
The 2 parameter use of this attribute wasn't documented.
This clarification is based of the following two commits:
- https://github.com/llvm/llvm-project/commit/d21139a34f51
- https://github.com/llvm/llvm-project/commit/893a303962608
Commit: d404a2e5233cf63018f6f01040b3a2b2bec50cb3
https://github.com/llvm/llvm-project/commit/d404a2e5233cf63018f6f01040b3a2b2bec50cb3
Author: Shreeyash Pandey <shreeyash335 at gmail.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/test/CodeGen/AArch64/arm64-atomic.ll
M llvm/test/CodeGen/AArch64/atomicrmw-O0.ll
M llvm/test/CodeGen/AArch64/logical-op-with-not.ll
Log Message:
-----------
Revert "[AArch64][CodeGen] match (or x (not y)) to generate mov+orn" (#191138)
Reverts llvm/llvm-project#190769
[Need to change email for the commit]
Commit: a9b863ee5260f2eb6259cd828c09d1082f9d9e67
https://github.com/llvm/llvm-project/commit/a9b863ee5260f2eb6259cd828c09d1082f9d9e67
Author: Dhruva <dhruvakodiadka at gmail.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/GISelValueTracking.cpp
A llvm/test/CodeGen/AArch64/GlobalISel/knownbits-stepvector.mir
Log Message:
-----------
[GlobalISel] Add G_STEP_VECTOR to computeKnownBits. (#190598)
This code is adapted from SelectionDAG::computeKnownBits.
part of https://github.com/llvm/llvm-project/issues/150515.
ticks off STEP_VECTOR.
Commit: 3f3a83cd7b95c1d5aa7dfb7698082823c6ae7d5b
https://github.com/llvm/llvm-project/commit/3f3a83cd7b95c1d5aa7dfb7698082823c6ae7d5b
Author: Carson Radtke <nosrac925 at gmail.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/SValBuilder.h
M clang/test/Analysis/atomics.c
Log Message:
-----------
[analyzer] Canonicalize _Atomic pointers in makeNullWithType (#190131)
Fixes #187925
Commit: 85212908f2078271b3cd63807bbcd239ad676104
https://github.com/llvm/llvm-project/commit/85212908f2078271b3cd63807bbcd239ad676104
Author: Sergey Kachkov <109674256+skachkov-sc at users.noreply.github.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/SeparateConstOffsetFromGEP.cpp
M llvm/test/Transforms/SeparateConstOffsetFromGEP/RISCV/split-gep.ll
Log Message:
-----------
[SeparateConstOffsetFromGEP] Fix incorrect inbounds flag in case of non-negative index but negative offset (#190192)
Fixes #190187
Currently, SeparateConstOffsetFromGEP preserves inbounds attribute if
new sequence of GEPs from the same base pointer has non-negative offsets
in each GEP (this was mentioned in
https://github.com/llvm/llvm-project/pull/159515). This statement seems
correct for me (if the sequence consists from 2 GEPs), but current
implementation has a flaw: it checks that constant byte offset and GEP
indices are non-negative. However, in some corner cases we can have a
situation when the index is non-negative, but its offset (in bytes) is
negative, so we can't preserve inbounds attribute. In the example, GEP
index after transformation can have values
`0x7ffffffffffffffd`/`0x7ffffffffffffffe`/`0x7fffffffffffffff`; they are
all non-negative (sign bit is zero), however, after multiplication on
sizeof(i64) they become negative and inbounds can't be preserved
anymore.
The proposed fix is to check that Idx * ElementStride is non-negative
(instead of checking Idx only).
Commit: 0646ebc6dc4fd328ee357d5463487729a50e0530
https://github.com/llvm/llvm-project/commit/0646ebc6dc4fd328ee357d5463487729a50e0530
Author: Pierre van Houtryve <pierre.vanhoutryve at amd.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
A llvm/test/TableGen/GlobalISelCombinerEmitter/match-table-hoisting.td
M llvm/test/TableGen/GlobalISelEmitter/MatchTableOptimizerSameOperand-invalid.td
M llvm/utils/TableGen/Common/GlobalISel/GlobalISelMatchTable.cpp
M llvm/utils/TableGen/Common/GlobalISel/GlobalISelMatchTable.h
Log Message:
-----------
[GlobalISel] Prevent hoisting of CheckIsSameOperand from creating invalid match tables (#190963)
Fixes #188513
This patch adds logic to ask PredicateMatchers whether they'd like to be
hoisted out of a specific Matcher or not.
SameOperandMatcher can use it to check if it's being hoisted out of the
RuleMatcher that defines the operand it relies on.
Assisted-By: Claude Opus 4.6
Context of Use: Claude was only used to add LLVM-style RTTI to the
matcher class (repetitive work). I then reviewed and cleaned up the code
it generated.
Commit: e1ed14fa265e319fd0917f2e5374365aa0b18940
https://github.com/llvm/llvm-project/commit/e1ed14fa265e319fd0917f2e5374365aa0b18940
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
Log Message:
-----------
[VPlan] Add ::getSingleVF() helper and use it (NFC). (#191055)
Suggested as follow-up during recent reviews, including
https://github.com/llvm/llvm-project/pull/190393.
Commit: 918e446ef28ac97df20d6ef2bd50c78e2fe903ac
https://github.com/llvm/llvm-project/commit/918e446ef28ac97df20d6ef2bd50c78e2fe903ac
Author: Raphael Isemann <rise at apple.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M lldb/packages/Python/lldbsuite/test/lldbutil.py
M lldb/test/API/macosx/simulator/TestSimulatorPlatform.py
Log Message:
-----------
[lldb] Handle simulator printout in TestSimulatorPlatform (#189571)
This test invokes a binary in a simulator and then reads the first line
of stderr to parse the PID of the invoked binary.
This approach fails when the simulator itself prints a warning/error on
startup. In this case, we try to parse the error as the PID and fail.
This patch just removes the line limit. It doesn't seem to add any value
as we anyway need to search until we find the PID line, and if there is
no PID line we cannot do anything but time out eventually.
See also rdar://169799464
Commit: 7cccf56ce6bb98cd685ad67b8e4db9293768741c
https://github.com/llvm/llvm-project/commit/7cccf56ce6bb98cd685ad67b8e4db9293768741c
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M mlir/lib/Transforms/CSE.cpp
M mlir/test/Transforms/cse.mlir
Log Message:
-----------
Revert "[mlir][CSE] Delete dead code immediately in CSE pass" (#191146)
Reverts llvm/llvm-project#190926 ; this is crashing on simple examples
like:
```
func.func @test(%arg0: i1) {
%c0_i32 = arith.constant 0 : i32
%0 = arith.select %arg0, %c0_i32, %c0_i32 : i32
%1 = scf.if %arg0 -> (i32) {
%c0_i32_0 = arith.constant 0 : i32
scf.yield %c0_i32_0 : i32
} else {
%c0_i32_0 = arith.constant 0 : i32
scf.yield %c0_i32_0 : i32
}
return
}
```
Commit: b9c8733e29b72be328c5c1218bfd95eb9d32cde8
https://github.com/llvm/llvm-project/commit/b9c8733e29b72be328c5c1218bfd95eb9d32cde8
Author: Rafe Murray <rafemurr at gmail.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp
M clang/test/CodeGen/AArch64/neon/fullfp16.c
M clang/test/CodeGen/AArch64/v8.2a-fp16-intrinsics.c
Log Message:
-----------
[CIR][Aarch64] upstream scalar & vector intrinsics (FP16) (#190310)
This PR upstreams the following fp16 intrinsics as part of #185382:
- vaddh_f16,
- vsubh_f16,
- vmulh_f16,
- vdivh_f16
This is my first PR to LLVM, so any feedback is greatly appreciated!
Commit: 591861911e8a5f2838d7ee025d3f989cbe335710
https://github.com/llvm/llvm-project/commit/591861911e8a5f2838d7ee025d3f989cbe335710
Author: Shreeyash Pandey <shreeyash335 at gmail.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/test/CodeGen/AArch64/arm64-atomic.ll
M llvm/test/CodeGen/AArch64/atomicrmw-O0.ll
M llvm/test/CodeGen/AArch64/logical-op-with-not.ll
Log Message:
-----------
[AArch64][CodeGen] match (or x (not y)) to generate mov+orn (#191145)
Fixes: #100045
Adds a tablegen pattern that matches (or x (not y)) and generates a
mov+orn instead of the original mvn+orr.
The number of instructions still stay the same but mov+orn can be
considered better than mvn+orr for two reasons:
1. Symmetry: For the same input with an 'and' instead of 'or', mov+bic
is generated.
2. Optimzation through register rename: If mov is immediate (for
example, 'mov x1, #0x4'), it can be retired early by the register
renamer and never issued for execution.
This patch was reverted as I wanted to change my email associated with
the patch.
Original patch: #190769
Revert patch: #191138
Change-Id: I244db76a3a102308e17d3c014aebd5d8edd605ca
Commit: bc0b57ee9c500ba0248ee3cce473e3160a1e610f
https://github.com/llvm/llvm-project/commit/bc0b57ee9c500ba0248ee3cce473e3160a1e610f
Author: Pavel Labath <pavel at labath.sk>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/src/__support/OSUtil/linux/syscall_wrappers/CMakeLists.txt
A libc/src/__support/OSUtil/linux/syscall_wrappers/listen.h
M libc/src/sys/socket/CMakeLists.txt
M libc/src/sys/socket/linux/CMakeLists.txt
A libc/src/sys/socket/linux/listen.cpp
A libc/src/sys/socket/listen.h
M libc/test/src/sys/socket/linux/CMakeLists.txt
M libc/test/src/sys/socket/linux/connect_test.cpp
A libc/test/src/sys/socket/linux/listen_test.cpp
Log Message:
-----------
[libc] Implement listen(2) on linux (#190755)
I'm using the new syscall wrapper framework, and enabling the entry
point for x86_64, aarch64 and riscv. I also extend the connect test to
check for successful connection, now that we have that ability.
Commit: a6f967c73ac464bba668df076ec88064a2c5720f
https://github.com/llvm/llvm-project/commit/a6f967c73ac464bba668df076ec88064a2c5720f
Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp
M clang/test/CodeGen/AArch64/neon-intrinsics.c
M clang/test/CodeGen/AArch64/neon/intrinsics.c
Log Message:
-----------
[clang][CIR] Add lowering for vcvt_n_ and vcvtq_n_ conversion intrinsics (#190961)
This PR adds lowering for the conversion intrinsics with an immediate
argument (identified by `_n_` in the intrinsic name), excluding FP16
variants.
It also moves the corresponding tests from:
* clang/test/CodeGen/AArch64/neon_intrinsics.c
to:
* clang/test/CodeGen/AArch64/neon/intrinsics.c
The lowering follows the existing implementation in
CodeGen/TargetBuiltins/ARM.cpp and adds the `getFloatNeonType` helper
to support it. The remaining changes are code motion and refactoring.
Reference:
[1] https://arm-software.github.io/acle/neon_intrinsics/advsimd.html#conversions
Commit: 2d6c41309eef4230191ba861d5f5d36c784f9b60
https://github.com/llvm/llvm-project/commit/2d6c41309eef4230191ba861d5f5d36c784f9b60
Author: Ruoyu Qiu <cabbaken at outlook.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M llvm/test/Analysis/DependenceAnalysis/exact-rdiv-addrec-wrap.ll
Log Message:
-----------
[DA] Remove "FIXME" for a test that has been fixed (#191143)
Commit: 222a643f56777351daa6a926bccc247489380518
https://github.com/llvm/llvm-project/commit/222a643f56777351daa6a926bccc247489380518
Author: Balázs Benics <benicsbalazs at gmail.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M clang/lib/ScalableStaticAnalysisFramework/Frontend/TUSummaryExtractorFrontendAction.cpp
A clang/test/Analysis/Scalable/extraction-works-alongside-compilation.cpp
Log Message:
-----------
[clang][ssaf] Preserve AST after codegen for SSAF extractors (#191058)
This is a use-after-free.
Codegen would drop the AST before starting the optimizations on the LLVM
IR level. This means that the ASTConsumers of the SSAF extractors only
had dangling TU Decls etc.
For now, let's override this option to force-keep the AST alive. Note
that PluginActions already did the same if their consumers were added
after the main frontend-action.
See:
https://github.com/llvm/llvm-project/blob/69e0367e8221b8002b5d438fb70ff3daf36257fc/clang/lib/Frontend/FrontendAction.cpp#L470
```c++
CI.getCodeGenOpts().ClearASTBeforeBackend = false;
```
Long term, we could think about the stability implications of running
the extractors before codegen to be able to drop the AST, thus save
memory for codegen.
However, that would mean that if any of the virtual callbacks of the
ASTConsumers (extractors) would crash/fail, it would drag down the whole
process.
If extractors would only use the HandleTranslationUnitDecl callback,
then we could wrap our `TUSummaryRunner` multiplexer in a crash-safe
`CrashRecoveryContext` - which would ensure that only the runner would
fail, but would continue for codegen.
Personally, I don't really like this continue-after-extractors-crash,
because I'd not put my life on the binary generated such an event. And
if that's the case, then what's the point...
Nevertheless, let's force keep the AST for now.
Commit: 9f47bcdb7c8a0d1be6481df3a5ac09d2eaf02690
https://github.com/llvm/llvm-project/commit/9f47bcdb7c8a0d1be6481df3a5ac09d2eaf02690
Author: Valeriy Savchenko <vsavchenko at apple.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
M llvm/test/CodeGen/AArch64/arm64-zip.ll
R llvm/test/CodeGen/AArch64/vselect-widen-mask-tree.ll
M llvm/test/CodeGen/X86/bitcast-int-to-vector-bool-sext.ll
Log Message:
-----------
Revert "[SelectionDAG] Recurse through mask expression trees in WidenVSELECTMask (#188085)" (#191151)
This reverts commit 815edc3ff646392bfee2b381d37dd35e4b04f9c5.
Commit: ba91dd14b9679c01d559f9314205c09da9146af4
https://github.com/llvm/llvm-project/commit/ba91dd14b9679c01d559f9314205c09da9146af4
Author: David Sherwood <david.sherwood at arm.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M llvm/test/Transforms/LoopVectorize/AArch64/call-costs.ll
M llvm/test/Transforms/LoopVectorize/AArch64/clmul.ll
M llvm/test/Transforms/LoopVectorize/AArch64/conditional-branches-cost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/drop-poison-generating-flags.ll
M llvm/test/Transforms/LoopVectorize/AArch64/epilog-iv-select-cmp.ll
M llvm/test/Transforms/LoopVectorize/AArch64/epilog-vectorization-widen-inductions.ll
M llvm/test/Transforms/LoopVectorize/AArch64/fminimumnum.ll
M llvm/test/Transforms/LoopVectorize/AArch64/force-target-instruction-cost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/interleave-with-gaps.ll
M llvm/test/Transforms/LoopVectorize/AArch64/interleaving-load-store.ll
M llvm/test/Transforms/LoopVectorize/AArch64/interleaving-reduction.ll
M llvm/test/Transforms/LoopVectorize/AArch64/intrinsiccost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/licm-calls.ll
M llvm/test/Transforms/LoopVectorize/AArch64/masked-call-scalarize.ll
M llvm/test/Transforms/LoopVectorize/AArch64/masked-call.ll
M llvm/test/Transforms/LoopVectorize/AArch64/pr151664-cost-hoisted-vector-scalable.ll
M llvm/test/Transforms/LoopVectorize/AArch64/pr73894.ll
M llvm/test/Transforms/LoopVectorize/AArch64/scalable-call.ll
M llvm/test/Transforms/LoopVectorize/AArch64/scalable-strict-fadd.ll
M llvm/test/Transforms/LoopVectorize/AArch64/select-index.ll
M llvm/test/Transforms/LoopVectorize/AArch64/strict-fadd-cost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/strict-fadd.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-vscale-based-trip-counts.ll
M llvm/test/Transforms/LoopVectorize/AArch64/veclib-calls-libsystem-darwin.ll
M llvm/test/Transforms/LoopVectorize/AArch64/veclib-intrinsic-calls.ll
M llvm/test/Transforms/LoopVectorize/AMDGPU/buffer-fat-pointer.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-gather-scatter-tailpred.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-known-trip-count.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-saddsatcost.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-selectandorcost.ll
M llvm/test/Transforms/LoopVectorize/Hexagon/minimum-vf.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/massv-calls.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/massv-unsupported.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/vectorize-bswap.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/vectorize-only-for-real.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/widened-massv-call.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/widened-massv-vfabi-attr.ll
M llvm/test/Transforms/LoopVectorize/RISCV/clmul.ll
M llvm/test/Transforms/LoopVectorize/RISCV/dead-ops-cost.ll
M llvm/test/Transforms/LoopVectorize/RISCV/fminimumnum.ll
M llvm/test/Transforms/LoopVectorize/RISCV/reductions.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-call-intrinsics.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-inloop-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-reduction.ll
M llvm/test/Transforms/LoopVectorize/SystemZ/mem-interleaving-costs-03.ll
M llvm/test/Transforms/LoopVectorize/VPlan/AArch64/widen-call-with-intrinsic-or-libfunc.ll
M llvm/test/Transforms/LoopVectorize/VPlan/interleave-and-scalarize-only.ll
M llvm/test/Transforms/LoopVectorize/VPlan/vplan-dot-printing.ll
M llvm/test/Transforms/LoopVectorize/VPlan/vplan-printing-metadata.ll
M llvm/test/Transforms/LoopVectorize/VPlan/vplan-printing.ll
M llvm/test/Transforms/LoopVectorize/X86/amdlibm-calls.ll
M llvm/test/Transforms/LoopVectorize/X86/clmul.ll
M llvm/test/Transforms/LoopVectorize/X86/cost-model.ll
M llvm/test/Transforms/LoopVectorize/X86/ephemeral-recipes.ll
M llvm/test/Transforms/LoopVectorize/X86/fminimumnum.ll
M llvm/test/Transforms/LoopVectorize/X86/gather_scatter.ll
M llvm/test/Transforms/LoopVectorize/X86/intrinsiccost.ll
M llvm/test/Transforms/LoopVectorize/X86/libm-vector-calls-VF2-VF8.ll
M llvm/test/Transforms/LoopVectorize/X86/libm-vector-calls.ll
M llvm/test/Transforms/LoopVectorize/X86/pointer-runtime-checks-unprofitable.ll
M llvm/test/Transforms/LoopVectorize/X86/pr35432.ll
M llvm/test/Transforms/LoopVectorize/X86/reg-usage-debug.ll
M llvm/test/Transforms/LoopVectorize/X86/register-assumption.ll
M llvm/test/Transforms/LoopVectorize/X86/replicate-recipe-with-only-first-lane-used.ll
M llvm/test/Transforms/LoopVectorize/X86/replicate-uniform-call.ll
M llvm/test/Transforms/LoopVectorize/X86/svml-calls.ll
M llvm/test/Transforms/LoopVectorize/X86/veclib-calls.ll
M llvm/test/Transforms/LoopVectorize/X86/vect.omp.force.ll
M llvm/test/Transforms/LoopVectorize/assume.ll
M llvm/test/Transforms/LoopVectorize/dbg-outer-loop-vect.ll
M llvm/test/Transforms/LoopVectorize/dbg.value.ll
M llvm/test/Transforms/LoopVectorize/debugloc.ll
M llvm/test/Transforms/LoopVectorize/dereferenceable-info-from-assumption-constant-size-needs-loop-guards.ll
M llvm/test/Transforms/LoopVectorize/dereferenceable-info-from-assumption-constant-size.ll
M llvm/test/Transforms/LoopVectorize/dereferenceable-info-from-assumption-variable-size.ll
M llvm/test/Transforms/LoopVectorize/discriminator.ll
M llvm/test/Transforms/LoopVectorize/dont-fold-tail-for-divisible-TC.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence-multiply-recurrences.ll
M llvm/test/Transforms/LoopVectorize/fpsat.ll
M llvm/test/Transforms/LoopVectorize/funcall.ll
M llvm/test/Transforms/LoopVectorize/int_sideeffect.ll
M llvm/test/Transforms/LoopVectorize/intrinsic.ll
M llvm/test/Transforms/LoopVectorize/is_fpclass.ll
M llvm/test/Transforms/LoopVectorize/lifetime.ll
M llvm/test/Transforms/LoopVectorize/minimumnum-maximumnum-reductions.ll
M llvm/test/Transforms/LoopVectorize/minmax_reduction.ll
M llvm/test/Transforms/LoopVectorize/noalias-scope-decl-outer-loop.ll
M llvm/test/Transforms/LoopVectorize/noalias-scope-decl.ll
M llvm/test/Transforms/LoopVectorize/non-widenable-intrinsics-outer-loop.ll
M llvm/test/Transforms/LoopVectorize/predicated-multiple-exits.ll
M llvm/test/Transforms/LoopVectorize/pseudoprobe.ll
M llvm/test/Transforms/LoopVectorize/reduction-inloop-min-max.ll
M llvm/test/Transforms/LoopVectorize/reduction-inloop.ll
M llvm/test/Transforms/LoopVectorize/reuse-lcssa-phi-scev-expansion.ll
M llvm/test/Transforms/LoopVectorize/scalable-assume.ll
M llvm/test/Transforms/LoopVectorize/scalable-lifetime.ll
M llvm/test/Transforms/LoopVectorize/scalable-noalias-scope-decl.ll
M llvm/test/Transforms/LoopVectorize/select-cmp-multiuse.ll
M llvm/test/Transforms/LoopVectorize/select-first-index-fp.ll
M llvm/test/Transforms/LoopVectorize/select-smax-last-index.ll
M llvm/test/Transforms/LoopVectorize/select-smin-last-index.ll
M llvm/test/Transforms/LoopVectorize/select-umax-last-index.ll
M llvm/test/Transforms/LoopVectorize/select-umin-first-index.ll
M llvm/test/Transforms/LoopVectorize/select-umin-last-index.ll
M llvm/test/Transforms/LoopVectorize/single_early_exit.ll
M llvm/test/Transforms/LoopVectorize/smax-idx.ll
M llvm/test/Transforms/LoopVectorize/trip-count-expansion-may-introduce-ub.ll
M llvm/test/Transforms/LoopVectorize/vector-intrinsic-call-cost.ll
M llvm/test/Transforms/LoopVectorize/vector-loop-backedge-elimination.ll
M llvm/test/Transforms/LoopVectorize/vplan-widen-call-instruction.ll
Log Message:
-----------
[LV][NFC] Remove unneeded LLVM intrinsic declarations (#190993)
We no longer need to declare LLVM intrinsics in .ll files as the
intrinsics are populated automatically in the module. Remove the
declarations from tests to reduce test noise and size.
This came from a suggestion on PR #190786.
Commit: cc419f185e13c84ae7d7610016d71a6a65ab1241
https://github.com/llvm/llvm-project/commit/cc419f185e13c84ae7d7610016d71a6a65ab1241
Author: Fady Farag <com.webkit.iidmsa at gmail.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M clang/test/CodeGen/2004-02-13-Memset.c
Log Message:
-----------
[clang][test] Modernize 2004-02-13-Memset.c to use FileCheck (#191092)
Replace `grep | count` verification with `FileCheck` and update `CHECK`
directives with current codegen output.
Commit: c73872a69388895c55a6a6065a471e9e8f1a3e95
https://github.com/llvm/llvm-project/commit/c73872a69388895c55a6a6065a471e9e8f1a3e95
Author: Younan Zhang <zyn7109 at gmail.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M clang/docs/InternalsManual.rst
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Sema/Sema.h
M clang/lib/Sema/SemaConcept.cpp
M clang/lib/Sema/SemaTemplateInstantiate.cpp
Log Message:
-----------
[Clang] Improve concept performance 1/N (#188421)
The concept parameter mapping patch significantly impacted performance
in scenarios where concepts are heavily used, even with
atomic-expression-level caching.
After normalization, we often end up with large atomic expressions
containing numerous duplicate and complex template parameter mappings.
Previously, we were substituting and checking these repeatedly, which
was highly inefficient.
We now cache these substitution results within TemplateInstantiator.
This saves us a lot of duplicate semantic checking and provides us some
performance improvement, as in these regression cases:
usb_ids_gen.cpp:
clang-21: 1.41s
clang-22: 3.90s
This patch: 2.45s
inspector_style_resolver.cpp:
clang-21: 18.21s
clang-22: 22.43s
This patch: 19.01s
(These regressions can be found from the original issue)
While performance is still not so good as clang-21, I think there is
still room for future improvements. E.g. We can cache invalid results
for SFINAE diagnostics, avoid redundant pack unpacking, etc.
Towards https://github.com/llvm/llvm-project/issues/172266
Commit: e765ea92055c6d0d820234d60fcd38fd7b1bceb8
https://github.com/llvm/llvm-project/commit/e765ea92055c6d0d820234d60fcd38fd7b1bceb8
Author: Abid Qadeer <haqadeer at amd.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M flang/test/Transforms/debug-line-table-inc-file.fir
M flang/test/Transforms/debug-line-table.fir
M mlir/include/mlir-c/Dialect/LLVM.h
M mlir/include/mlir/Dialect/LLVMIR/LLVMAttrDefs.td
M mlir/include/mlir/Dialect/LLVMIR/LLVMDialectBytecode.td
M mlir/lib/CAPI/Dialect/LLVM.cpp
M mlir/lib/Dialect/LLVMIR/IR/LLVMAttrs.cpp
M mlir/lib/Target/LLVMIR/DebugImporter.cpp
M mlir/lib/Target/LLVMIR/DebugTranslation.cpp
M mlir/lib/Target/LLVMIR/DebugTranslation.h
M mlir/test/CAPI/llvm.c
M mlir/test/Target/LLVMIR/Import/debug-info.ll
M mlir/test/Target/LLVMIR/Import/global-variables.ll
M mlir/test/Target/LLVMIR/llvmir-debug.mlir
Log Message:
-----------
[mlir][debug] Make DICompileUnitAttr recursive. (#190808)
This PR add `DIRecursiveTypeAttrInterface` to `DICompileUnitAttr`. It
should fix the circular dependency problem we have since
`importedEntities` field was added.
Commit: 01c590876130283d86571089b3b3df1191ac0474
https://github.com/llvm/llvm-project/commit/01c590876130283d86571089b3b3df1191ac0474
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanUnroll.cpp
M llvm/test/Transforms/LoopVectorize/epilog-vectorization-reductions.ll
Log Message:
-----------
[VPlan] Handle AnyOf Or reduction via ComputeReductionResult. (#191049)
Instead of having ComputeAnyOfResult handle the Or reduction of unrolled
parts inline, route it through ComputeReductionResult with
RecurKind::Or. ComputeAnyOfResult now takes a pre-reduced scalar and
only performs the freeze + select.
This is a preparatory step towards removing ComputeAnyOfResult entirely
in https://github.com/llvm/llvm-project/pull/190039.
PR: https://github.com/llvm/llvm-project/pull/191049
Commit: 3529ce05e9a96760ae3b9435ca264cc707bb4dac
https://github.com/llvm/llvm-project/commit/3529ce05e9a96760ae3b9435ca264cc707bb4dac
Author: Lukas Sommer <lukas.sommer at amd.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M mlir/include/mlir/Dialect/Vector/Utils/VectorUtils.h
M mlir/lib/Dialect/Linalg/Transforms/Vectorization.cpp
M mlir/lib/Dialect/Vector/Utils/VectorUtils.cpp
Log Message:
-----------
[mlir][Vector] Make createWriteOrMaskedWrite utility (#190967)
Analog to https://github.com/llvm/llvm-project/pull/89119, make
`createWriteOrMaskedWrite` a vector utility, exposing it for re-use by
downstream users.
This PR is mostly just moving code and updating documentation but also
addresses a `TODO` for `isMaskTriviallyFoldable` to use that utility in
`createReadOrMaskedRead` as well.
No new tests were added, because the functionality is covered by existing tests.
---------
Signed-off-by: Lukas Sommer <lukas.sommer at amd.com>
Commit: 18d5b9ec0cfd09b374636daea047ab5e7dc9bc3e
https://github.com/llvm/llvm-project/commit/18d5b9ec0cfd09b374636daea047ab5e7dc9bc3e
Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
Log Message:
-----------
[LV] Simplify costing partial reduction chain links (NFCI) (#190980)
Previously, `getPartialReductionLinkCost()` needed to figure out what
case `matchExtendedReductionOperand()` matched to compute a cost. This
made adding new cases to `matchExtendedReductionOperand()` more complex
and added some redundancy.
This patch updates `ExtendedReductionOperand` so that it contains all
the information needed to compute the cost ready to pass to
`getPartialReductionCost()`. This means matching new operand forms only
needs to be done in `matchExtendedReductionOperand()`.
This is split off from #188043 (this change simplifies matching absolute
difference operands).
Commit: b78da18357747c435a216324452937bebef6b6d5
https://github.com/llvm/llvm-project/commit/b78da18357747c435a216324452937bebef6b6d5
Author: Balázs Benics <benicsbalazs at gmail.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M clang/test/Analysis/Scalable/extraction-works-alongside-compilation.cpp
Log Message:
-----------
[clang][ssaf][test] Fix the extraction-works-alongside-compilation.cpp test (#191162)
I forgot that we need this `REQUIRES: asserts` for the test.
Fixes build bots not setting `LLVM_ENABLE_ASSERTIONS=ON`.
For example:
https://lab.llvm.org/buildbot/#/builders/11/builds/37623
This fixes up #191058
Commit: 8506466bbf5daa0c79831a116cd4df618d9955ba
https://github.com/llvm/llvm-project/commit/8506466bbf5daa0c79831a116cd4df618d9955ba
Author: Endre Fülöp <endre.fulop at sigmatechnology.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M clang/lib/StaticAnalyzer/Checkers/CStringChecker.cpp
M clang/test/Analysis/bstring.c
M clang/test/Analysis/bstring.cpp
Log Message:
-----------
[analyzer] Fix crash in CStringChecker on zero-size element types (#191061)
Move the null check of Offset before its dereference in checkInit. When
the element type has zero size (e.g., an empty struct in C), the
division returns an empty optional, which was dereferenced
unconditionally.
Fixes #190457
Commit: 629bd872ee61d208c002766f9d2642852afbc0f6
https://github.com/llvm/llvm-project/commit/629bd872ee61d208c002766f9d2642852afbc0f6
Author: Abid Qadeer <haqadeer at amd.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
M llvm/unittests/Frontend/OpenMPIRBuilderTest.cpp
A mlir/test/Target/LLVMIR/omptarget-debug-record-pos.mlir
M mlir/test/Target/LLVMIR/omptarget-debug-var-1.mlir
Log Message:
-----------
[OMPIRBuilder] Move debug records to correct blocks. (#157125)
Consider the following small OpenMP target region:
```
!$omp target map(tofrom: x)
x = x + 1
!$omp end target
```
Currently, when compiled with `flang`, it will generate an outlined
function like below (with irrelevant bits removed).
```
void @__omp_offloading_10303_14e8afc__QQmain_l13(ptr %0, ptr %1) { entry:
%2 = alloca ptr, align 8, addrspace(5)
%3 = addrspacecast ptr addrspace(5) %2 to ptr
...
br i1 %exec_user_code, label %user_code.entry, label %worker.exit
user_code.entry:
%5 = load ptr, ptr %3, align 8, !align !19
br label %omp.region.after_alloca
omp.region.after_alloca:
br label %outlined.body
outlined.body:
br label %omp.target
omp.target:
#dbg_declare(ptr addrspace(5) %2, !20, !DIExpression(), !21)
...
br label %omp.region.cont, !dbg !23
omp.region.cont:
call void @__kmpc_target_deinit()
ret void
worker.exit:
ret void
}
```
Due to how various basic blocks are generated to implement target region
for device, the debug record for variable `x` end up in a different
block to the location of the variable (`%5` in this case). The backend
can drop such debug records.
This PR moves such records in the correct block. If the location field
of the debug record is an `Instruction`, it will ensure that debug
record is in same block as the instruction. If the location is an
`Argument`, the debug record will be moved to the entry block.
Some minor cleanup in the `UpdateDebugRecord` as that brings it to use
the similar logic as in `MoveDebugRecordToCorrectBlock`.
Commit: 9cf815243b91147f0150db0c4ff2436b6920d372
https://github.com/llvm/llvm-project/commit/9cf815243b91147f0150db0c4ff2436b6920d372
Author: theRonShark <ron.lieberman at amd.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M llvm/include/llvm/Transforms/Vectorize/SLPVectorizer.h
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/AMDGPU/notriviallyvectorizableintrinsicoperands.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/revec.ll
Log Message:
-----------
Revert "[SLP][AMDGPU] Vectorize operands of non-trivially-vectorizable intrinsic calls" (#191153)
Reverts llvm/llvm-project#189784
Commit: ebc56070eb8d25c8dc73a2e97caaeb4db0f7c9fa
https://github.com/llvm/llvm-project/commit/ebc56070eb8d25c8dc73a2e97caaeb4db0f7c9fa
Author: Barbara Mitic <bmitic at amd.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M llvm/docs/AMDGPUUsage.rst
M llvm/lib/Target/AMDGPU/AMDGPULowerIntrinsics.cpp
M llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp
M llvm/lib/Target/AMDGPU/AMDGPUSubtarget.h
M llvm/lib/Target/AMDGPU/SIMemoryLegalizer.cpp
M llvm/test/CodeGen/AMDGPU/flat-saddr-atomics.ll
M llvm/test/CodeGen/AMDGPU/global-saddr-atomics.ll
A llvm/test/CodeGen/AMDGPU/memory-legalizer-single-wave-workgroup-memops.ll
Log Message:
-----------
[AMDGPU] Use wavefront scope for single-wave workgroup synchronization (#187673)
Workgroup-scoped fences and non-relaxed workgroup atomics were
previously legalized with synchronization strong enough for multi-wave
workgroups.
When the kernel's maximum flat work-group size does not exceed the
wavefront size, the workgroup contains only a single wavefront, so
workgroup-scoped synchronization is equivalent to wavefront scope and
the stronger legalization is unnecessary.
SIMemoryLegalizer now demotes workgroup scope to wavefront scope
in this case for workgroup-scoped fences and for non-relaxed atomic
load, store, atomicrmw, and cmpxchg operations.
This allows subsequent legalization to operate at wavefront scope.
The decision is based on AMDGPUSubtarget::isSingleWavefrontWorkgroup.
---------
Co-authored-by: Barbara Mitic <Barbara.Mitic at amd.com>
Commit: 87dda6ad8172f7cb89a8a422d825ebc2a5e73e2b
https://github.com/llvm/llvm-project/commit/87dda6ad8172f7cb89a8a422d825ebc2a5e73e2b
Author: Corentin Jabot <corentinjabot at gmail.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/SemaTemplateInstantiateDecl.cpp
M clang/test/SemaCXX/cxx1y-variable-templates_top_level.cpp
Log Message:
-----------
[Clang] Do not create a NoSFINAETrap for variable specialization. (#191000)
There is no thing in the standard that says this should happen outside
of the immediate context.
Fixes #54439
Commit: 93c349b3717f4550d409bf1d0e8600c852df2dca
https://github.com/llvm/llvm-project/commit/93c349b3717f4550d409bf1d0e8600c852df2dca
Author: Joao Victor Amorim Vieira <amorimvictorjoao3 at gmail.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
A llvm/test/CodeGen/RISCV/known-fpclass.ll
Log Message:
-----------
[DAG] computeKnownFPClass - Add handling for AssertNoFPClass (#190185)
Resolves #189478
Adds code to handle AssertNoFPClass in computeKnownFPClass and adds IR
test coverage for RISC-V.
Commit: 42166b6dcf9dcfb165d3a0f03ca64e6e549fbfe4
https://github.com/llvm/llvm-project/commit/42166b6dcf9dcfb165d3a0f03ca64e6e549fbfe4
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/check-prof-info.ll
M llvm/test/Transforms/LoopVectorize/AArch64/epilog-vectorization-widen-inductions.ll
M llvm/test/Transforms/LoopVectorize/branch-weights.ll
M llvm/test/Transforms/LoopVectorize/epilog-iv-select-cmp.ll
M llvm/test/Transforms/LoopVectorize/epilog-vectorization-any-of-reductions.ll
A llvm/test/Transforms/LoopVectorize/epilog-vectorization-dead-epilogue.ll
M llvm/test/Transforms/LoopVectorize/epilog-vectorization-reductions.ll
M llvm/test/Transforms/LoopVectorize/epilog-vectorization-scev-expansion.ll
M llvm/test/Transforms/LoopVectorize/epilog-vectorization-trunc-induction-steps.ll
M llvm/test/Transforms/LoopVectorize/epilog-vectorization-vector-trip-count-zero.ll
M llvm/test/Transforms/LoopVectorize/optimal-epilog-vectorization-limitations.ll
M llvm/test/Transforms/LoopVectorize/optimal-epilog-vectorization-liveout.ll
M llvm/test/Transforms/LoopVectorize/optimal-epilog-vectorization.ll
M llvm/test/Transforms/LoopVectorize/select-min-max-last-index-epilogue.ll
M llvm/test/Transforms/LoopVectorize/unsafe-vf-hint-remark.ll
Log Message:
-----------
[LV] Update forced epilogue VF options to allow different VFs than main. (#190393)
Previously, forced epilogue vector factors via the command line options
required to match the forced main VF (or the VF to be built in general).
This leads to a number of akward tests, where we end up with dead
epilogue vector loops.
Update the logic to build an additional VPlan with the epilogue vector
factor, and require the provided epilogue VF to be < IC * MainLoopVF.
Otherwise, epilogue vectorization is skipped.
This only impacts the forced epilogue VF option used for testing and
ensures epilogue tests to cover more realistic scenarios and make them
more robust w.r.t. to additional VPlan-based folding.
PR: https://github.com/llvm/llvm-project/pull/190393
Commit: 5185fb32e40d2711b8fd368d2a8dc2736d93c57b
https://github.com/llvm/llvm-project/commit/5185fb32e40d2711b8fd368d2a8dc2736d93c57b
Author: smv <32562706+s-mv at users.noreply.github.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/test/CodeGen/RISCV/combine-is_fpclass.ll
Log Message:
-----------
[DAG] computeKnownFPClass - add ISD::FNEG handling + test coverage (#190325)
Fixes #189483
- Implement computeKnownFPClass for ISD::FNEG in SelectionDAG.cpp
- Add tests for RISC-V in llvm/test/CodeGen/RISCV/known-fpclass-fneg.ll
Commit: 3b5b8ec0ab89886e6ac92c237bd0be8be1eff1e6
https://github.com/llvm/llvm-project/commit/3b5b8ec0ab89886e6ac92c237bd0be8be1eff1e6
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M llvm/test/CodeGen/SPIRV/GlobalISel/InstCombine/prelegalizercombiner-length-to-distance.mir
M llvm/test/CodeGen/SPIRV/GlobalISel/InstCombine/prelegalizercombiner-select-to-faceforward.mir
M llvm/test/CodeGen/SPIRV/llc-pipeline.ll
M llvm/test/CodeGen/SPIRV/opencl/device_execution/execute_block.ll
Log Message:
-----------
[NFC][SPIR-V] Remove unnecessary 'REQUIRES: asserts' from tests (#190986)
Remove `REQUIRES: asserts` from tests that don't use any assertions-only
functionality and should run for all build configurations
Commit: 3c7c6fbc87f0a686f74c327b381ce593a1a883d3
https://github.com/llvm/llvm-project/commit/3c7c6fbc87f0a686f74c327b381ce593a1a883d3
Author: Kseniya Tikhomirova <kseniya.tikhomirova at intel.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M libsycl/include/sycl/__impl/aspect.hpp
M libsycl/include/sycl/__impl/info/device_type.hpp
M libsycl/include/sycl/__impl/usm_alloc_type.hpp
M libsycl/include/sycl/__impl/usm_functions.hpp
M libsycl/src/detail/context_impl.hpp
M libsycl/src/detail/device_binary_structures.hpp
M libsycl/src/detail/device_image_wrapper.hpp
M libsycl/src/detail/device_impl.hpp
M libsycl/src/detail/global_objects.hpp
M libsycl/src/detail/kernel_id.hpp
M libsycl/src/detail/offload/offload_topology.hpp
M libsycl/src/detail/offload/offload_utils.hpp
M libsycl/src/detail/platform_impl.cpp
M libsycl/src/detail/platform_impl.hpp
M libsycl/src/detail/program_manager.cpp
M libsycl/src/detail/program_manager.hpp
M libsycl/src/detail/queue_impl.hpp
M libsycl/src/usm_functions.cpp
Log Message:
-----------
[libsycl] Fix comments and align names & types (#190781)
follow-up for https://github.com/llvm/llvm-project/pull/187528
---------
Signed-off-by: Tikhomirova, Kseniya <kseniya.tikhomirova at intel.com>
Commit: 537f29e6e1c2f174f7c0e8d0e614ce92715420f0
https://github.com/llvm/llvm-project/commit/537f29e6e1c2f174f7c0e8d0e614ce92715420f0
Author: Sander de Smalen <sander.desmalen at arm.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/test/CodeGen/AArch64/sme-disable-gisel-fisel.ll
Log Message:
-----------
[AArch64] Fix broken SME code with GlobalISel (#191140)
The checks introduced in #190135 are too restrictive because no SVE or
SME is required to compile streaming-compatible or agnostic-ZA
functions. Now it generates incorrect code for
streaming-compatible/agnostic-ZA functions when the function has no
`+sve` or `+sme`.
Commit: bbf31ad4e413d460ffe8246012df3bfd798c2170
https://github.com/llvm/llvm-project/commit/bbf31ad4e413d460ffe8246012df3bfd798c2170
Author: Corentin Jabot <corentinjabot at gmail.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/SemaTemplate.cpp
M clang/test/SemaCXX/cxx1y-variable-templates_top_level.cpp
Log Message:
-----------
[Clang] Do not try to create invalid variable specializations. (#190960)
When a variable specialization is ambiguous,
we would still create a node for it.
If the first such specialization takes places in a sfinae context, ie
when appearing in a concept, the initial diagnostic was silence, but no
further errors were emitted on that specialization as the variable was
created anyway.
Instead we do not create a specialization in this case.
Fixes #132592
Commit: 0ab4d8556ddb935d3eda044cf6ea118f0686de0e
https://github.com/llvm/llvm-project/commit/0ab4d8556ddb935d3eda044cf6ea118f0686de0e
Author: Rose Hudson <rose.hudson at sony.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M clang/lib/Lex/PPDirectives.cpp
Log Message:
-----------
[clang][Lex] don't run -Wnonportable-include-path-separator if disabled (#191148)
The diagnostic's addition caused a perf regression:
https://llvm-compile-time-tracker.com/compare.php?from=b9149823d85891044bf34e8654d1a45870e55174&to=e2294efaabcc745bf6beacbefbd371595cf3e87f&stat=instructions:u
So, only run its logic if it's actually enabled:
https://llvm-compile-time-tracker.com/compare.php?from=e2294efaabcc745bf6beacbefbd371595cf3e87f&to=52bd4e1441b75b617cf81dfffcb149966616a34a&stat=instructions:u
Commit: d8dc6197ccce334ecbdb6c71eebbf745bbf46857
https://github.com/llvm/llvm-project/commit/d8dc6197ccce334ecbdb6c71eebbf745bbf46857
Author: Luke Lau <luke at igalia.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M llvm/test/Transforms/LoopVectorize/find-last-iv-sinkable-expr.ll
Log Message:
-----------
[VPlan] Test tail folding with find-last-iv-sinkable-expr.ll tests. NFC (#191176)
I believe these are being miscompiled after #183911 since we're no
longer using the original select on the header mask added in
addReductionResultComputation
This is additional test coverage for #191166
Commit: 8341e62c6697ab0bbcaf546eba28d5845577f6ee
https://github.com/llvm/llvm-project/commit/8341e62c6697ab0bbcaf546eba28d5845577f6ee
Author: Shilei Tian <i at tianshilei.me>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp
Log Message:
-----------
[NFC][AMDGPU] Fix a compiler warning caused by a small typo (#191107)
Commit: 9e8ea5677f1c85bea98ddeca9240e1fccf2f1537
https://github.com/llvm/llvm-project/commit/9e8ea5677f1c85bea98ddeca9240e1fccf2f1537
Author: Dmitry Vasilyev <dvassiliev at accesssoftek.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M lldb/test/API/functionalities/scripted_frame_provider/thread_filter/main.cpp
Log Message:
-----------
[lldb] Fix flaky test TestFrameProviderThreadFilter on Windows (#191133)
This is the update for #191046.
Commit: 3ac5c07e202fbb6525a1c689547b2de3c69a9b77
https://github.com/llvm/llvm-project/commit/3ac5c07e202fbb6525a1c689547b2de3c69a9b77
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M llvm/include/llvm/IR/CallingConv.h
M llvm/test/Bitcode/calling-conventions.3.2.ll
M llvm/test/Bitcode/calling-conventions.3.2.ll.bc
M llvm/test/Verifier/call-to-non-callable-functions.ll
Log Message:
-----------
[NVPTX] Do not permit calls to ptx_kernel CC (#190434)
Summary:
Removes support for calling the ptx_kernel CC. Regenerate bitcode that
used it, no auto upgrade because this never worked, it just wasn't
diagnosed.
Commit: 728de5c5f28c49ef085b59ce82e30fae7c658d56
https://github.com/llvm/llvm-project/commit/728de5c5f28c49ef085b59ce82e30fae7c658d56
Author: Ricardo Jesus <rjj at nvidia.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
M llvm/test/CodeGen/AArch64/sve-fixed-length-fp-compares.ll
M llvm/test/CodeGen/AArch64/sve-hadd.ll
M llvm/test/CodeGen/AArch64/sve-int-log.ll
M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-fp-compares.ll
M llvm/test/CodeGen/AArch64/sve2-bsl.ll
Log Message:
-----------
[AArch64][SVE] Use SUBR for unpredicated bitwise NOT. (#191155)
This relies on the identity NOT (x) = -1 - x, which can be lowered as
byte SUBR (x, 255). The recently added pseudos for SUBR (immediate)
should avoid cases where we would risk emitting a MOV.
Commit: a8a83ec1729dad170471c6bc48ef874ff76a3342
https://github.com/llvm/llvm-project/commit/a8a83ec1729dad170471c6bc48ef874ff76a3342
Author: eiytoq <eiytoq at outlook.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/AST/ItaniumMangle.cpp
A clang/test/CodeGenCXX/dtor-local-lambda-mangle.cpp
Log Message:
-----------
[Clang] Fix Itanium mangling crash for local lambda in ctor/dtor (#181068)
Fixes #176395
Note: I need someone to help me merge this PR, since I don't have commit
access.
Commit: c908037066750cf192898012047f4c22830dd47b
https://github.com/llvm/llvm-project/commit/c908037066750cf192898012047f4c22830dd47b
Author: David Sherwood <david.sherwood at arm.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M llvm/test/Transforms/LoopVectorize/12-12-11-if-conv.ll
M llvm/test/Transforms/LoopVectorize/2012-10-20-infloop.ll
M llvm/test/Transforms/LoopVectorize/2012-10-22-isconsec.ll
M llvm/test/Transforms/LoopVectorize/2016-07-27-loop-vec.ll
M llvm/test/Transforms/LoopVectorize/AArch64/Oz-and-forced-vectorize.ll
M llvm/test/Transforms/LoopVectorize/AArch64/aarch64-unroll.ll
M llvm/test/Transforms/LoopVectorize/AArch64/arbitrary-induction-step.ll
M llvm/test/Transforms/LoopVectorize/AArch64/arm64-unroll.ll
M llvm/test/Transforms/LoopVectorize/AArch64/blend-costs.ll
M llvm/test/Transforms/LoopVectorize/AArch64/check-prof-info.ll
M llvm/test/Transforms/LoopVectorize/AArch64/clamped-trip-count.ll
M llvm/test/Transforms/LoopVectorize/AArch64/conditional-branches-cost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/fixed-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/AArch64/fold-tail-low-trip-count.ll
M llvm/test/Transforms/LoopVectorize/AArch64/force-target-instruction-cost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/fully-unrolled-cost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/gather-do-not-vectorize-addressing.ll
M llvm/test/Transforms/LoopVectorize/AArch64/induction-costs-sve.ll
M llvm/test/Transforms/LoopVectorize/AArch64/intrinsiccost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/loop-vectorization-factors.ll
M llvm/test/Transforms/LoopVectorize/AArch64/loopvectorize_pr33804_double.ll
M llvm/test/Transforms/LoopVectorize/AArch64/low_trip_count_predicates.ll
M llvm/test/Transforms/LoopVectorize/AArch64/masked-op-cost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/masked_ldst_sme.ll
M llvm/test/Transforms/LoopVectorize/AArch64/maxbandwidth-regpressure.ll
M llvm/test/Transforms/LoopVectorize/AArch64/maximize-bandwidth-invalidate.ll
M llvm/test/Transforms/LoopVectorize/AArch64/nontemporal-load-store.ll
M llvm/test/Transforms/LoopVectorize/AArch64/outer_loop_test1_no_explicit_vect_width.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-chained.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-dot-product-epilogue.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-dot-product-mixed.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-dot-product-neon.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-dot-product.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-fdot-product.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-no-dotprod.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-sub.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce.ll
M llvm/test/Transforms/LoopVectorize/AArch64/pr151664-cost-hoisted-vector-scalable.ll
M llvm/test/Transforms/LoopVectorize/AArch64/pr36032.ll
M llvm/test/Transforms/LoopVectorize/AArch64/reg-usage.ll
M llvm/test/Transforms/LoopVectorize/AArch64/replicating-load-store-costs-apple.ll
M llvm/test/Transforms/LoopVectorize/AArch64/replicating-load-store-costs.ll
M llvm/test/Transforms/LoopVectorize/AArch64/runtime-check-size-based-threshold.ll
M llvm/test/Transforms/LoopVectorize/AArch64/runtime-check-trip-count-decisions.ll
M llvm/test/Transforms/LoopVectorize/AArch64/scalable-avoid-scalarization.ll
M llvm/test/Transforms/LoopVectorize/AArch64/scalable-call.ll
M llvm/test/Transforms/LoopVectorize/AArch64/scalable-predicate-instruction.ll
M llvm/test/Transforms/LoopVectorize/AArch64/scalable-reductions-tf.ll
M llvm/test/Transforms/LoopVectorize/AArch64/scalable-reductions.ll
M llvm/test/Transforms/LoopVectorize/AArch64/scalable-strict-fadd.ll
M llvm/test/Transforms/LoopVectorize/AArch64/scalar_interleave.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sdiv-pow2.ll
M llvm/test/Transforms/LoopVectorize/AArch64/select-best-vf-tripcount.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sme-vectorize.ll
M llvm/test/Transforms/LoopVectorize/AArch64/strict-fadd-vf1.ll
M llvm/test/Transforms/LoopVectorize/AArch64/strict-fadd.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-basic-vec.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-cond-inv-loads.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-epilog-vect-vscale-tune.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-extract-last-veclane.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-fixed-width-inorder-core.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-fneg.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-gather-scatter-cost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-gather-scatter.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-inductions-unusual-types.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-inductions.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-interleaved-accesses.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-inv-loads.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-inv-store.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-large-strides.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-masked-loadstore.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-select-cmp.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-tail-folding-cost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-tail-folding-option.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-tail-folding-optsize.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-tail-folding-reductions.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-tail-folding-unroll.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-tail-folding.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-type-conv.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-vector-reverse-mask4.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-vector-reverse.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-widen-gep.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-widen-phi.ll
M llvm/test/Transforms/LoopVectorize/AArch64/tail-fold-uniform-memops.ll
M llvm/test/Transforms/LoopVectorize/AArch64/tail-folding-styles.ll
M llvm/test/Transforms/LoopVectorize/AArch64/transform-narrow-interleave-to-widen-memory-cost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/type-shrinkage-insertelt.ll
M llvm/test/Transforms/LoopVectorize/AArch64/type-shrinkage-zext-costs.ll
M llvm/test/Transforms/LoopVectorize/AArch64/vector-reverse-mask4.ll
M llvm/test/Transforms/LoopVectorize/AArch64/vector-reverse.ll
M llvm/test/Transforms/LoopVectorize/AMDGPU/buffer-fat-pointer.ll
M llvm/test/Transforms/LoopVectorize/AMDGPU/divergent-runtime-check.ll
M llvm/test/Transforms/LoopVectorize/AMDGPU/unroll-in-loop-vectorizer.ll
M llvm/test/Transforms/LoopVectorize/ARM/arm-ieee-vectorize.ll
M llvm/test/Transforms/LoopVectorize/ARM/arm-unroll.ll
M llvm/test/Transforms/LoopVectorize/ARM/gcc-examples.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-gather-scatter-tailpred.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-icmpcost.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-known-trip-count.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-maskedldst.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-predstorecost.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-qabs.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-recurrence.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-reduction-predselect.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-reduction-types.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-reductions.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-reg-pressure-vmla.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-saddsatcost.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-selectandorcost.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-shiftcost.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-vldn.ll
M llvm/test/Transforms/LoopVectorize/ARM/pointer_iv.ll
M llvm/test/Transforms/LoopVectorize/ARM/scalar-block-cost.ll
M llvm/test/Transforms/LoopVectorize/ARM/tail-fold-multiple-icmps.ll
M llvm/test/Transforms/LoopVectorize/ARM/tail-folding-allowed.ll
M llvm/test/Transforms/LoopVectorize/ARM/tail-folding-counting-down.ll
M llvm/test/Transforms/LoopVectorize/ARM/tail-folding-not-allowed.ll
M llvm/test/Transforms/LoopVectorize/ARM/tail-folding-prefer-flag.ll
M llvm/test/Transforms/LoopVectorize/ARM/width-detect.ll
M llvm/test/Transforms/LoopVectorize/Hexagon/invalidate-cm-after-invalidating-interleavegroups.ll
M llvm/test/Transforms/LoopVectorize/Hexagon/minimum-vf.ll
M llvm/test/Transforms/LoopVectorize/LoongArch/loongarch-interleaved.ll
M llvm/test/Transforms/LoopVectorize/LoongArch/reg-usage.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/interleave_IC.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/large-loop-rdx.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/optimal-epilog-vectorization-profitability.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/pr30990.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/pr41179.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/predcost.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/reg-usage.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/small-loop-rdx.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/stride-vectorization.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/vectorize-bswap.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/vectorize-only-for-real.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/vplan-scalarivsext-crash.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/vsx-tsvc-s173.ll
M llvm/test/Transforms/LoopVectorize/RISCV/blocks-with-dead-instructions.ll
M llvm/test/Transforms/LoopVectorize/RISCV/fold-tail-low-trip-count.ll
M llvm/test/Transforms/LoopVectorize/RISCV/force-vect-msg.ll
M llvm/test/Transforms/LoopVectorize/RISCV/inloop-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/low-trip-count.ll
M llvm/test/Transforms/LoopVectorize/RISCV/masked_gather_scatter.ll
M llvm/test/Transforms/LoopVectorize/RISCV/only-compute-cost-for-vplan-vfs.ll
M llvm/test/Transforms/LoopVectorize/RISCV/partial-reduce-dot-product.ll
M llvm/test/Transforms/LoopVectorize/RISCV/pr88802.ll
M llvm/test/Transforms/LoopVectorize/RISCV/reductions.ll
M llvm/test/Transforms/LoopVectorize/RISCV/reg-usage-maxbandwidth.ll
M llvm/test/Transforms/LoopVectorize/RISCV/reg-usage.ll
M llvm/test/Transforms/LoopVectorize/RISCV/riscv-interleaved.ll
M llvm/test/Transforms/LoopVectorize/RISCV/riscv-unroll.ll
M llvm/test/Transforms/LoopVectorize/RISCV/riscv-vector-reverse.ll
M llvm/test/Transforms/LoopVectorize/RISCV/select-cmp-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-cost.ll
M llvm/test/Transforms/LoopVectorize/RISCV/truncate-to-minimal-bitwidth-evl-crash.ll
M llvm/test/Transforms/LoopVectorize/RISCV/unroll-in-loop-vectorizer.ll
M llvm/test/Transforms/LoopVectorize/SystemZ/mem-interleaving-costs-03.ll
M llvm/test/Transforms/LoopVectorize/SystemZ/pr38110.ll
M llvm/test/Transforms/LoopVectorize/SystemZ/pr47665.ll
M llvm/test/Transforms/LoopVectorize/SystemZ/predicated-first-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/VE/disable_lv.ll
M llvm/test/Transforms/LoopVectorize/VPlan/AArch64/sve-tail-folding-forced.ll
M llvm/test/Transforms/LoopVectorize/VPlan/AArch64/vplan-printing.ll
M llvm/test/Transforms/LoopVectorize/VPlan/first-order-recurrence-sink-replicate-region.ll
M llvm/test/Transforms/LoopVectorize/VPlan/icmp-uniforms.ll
M llvm/test/Transforms/LoopVectorize/VPlan/vplan-dot-printing.ll
M llvm/test/Transforms/LoopVectorize/VPlan/vplan-printing-reductions.ll
M llvm/test/Transforms/LoopVectorize/VPlan/vplan-printing.ll
M llvm/test/Transforms/LoopVectorize/VPlan/vplan-stress-test-no-explict-vf.ll
M llvm/test/Transforms/LoopVectorize/WebAssembly/int-mac-reduction-costs.ll
M llvm/test/Transforms/LoopVectorize/WebAssembly/memory-interleave.ll
M llvm/test/Transforms/LoopVectorize/WebAssembly/partial-reduce-accumulate.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-half.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/strided-load-i16.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/strided-load-i32.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/strided-load-i64.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/strided-load-i8.ll
M llvm/test/Transforms/LoopVectorize/X86/already-vectorized.ll
M llvm/test/Transforms/LoopVectorize/X86/amdlibm-calls-finite.ll
M llvm/test/Transforms/LoopVectorize/X86/avx1.ll
M llvm/test/Transforms/LoopVectorize/X86/avx512.ll
M llvm/test/Transforms/LoopVectorize/X86/consecutive-ptr-cg-bug.ll
M llvm/test/Transforms/LoopVectorize/X86/consecutive-ptr-uniforms.ll
M llvm/test/Transforms/LoopVectorize/X86/conversion-cost.ll
M llvm/test/Transforms/LoopVectorize/X86/cost-divisor-overflow.ll
M llvm/test/Transforms/LoopVectorize/X86/cost-model-assert.ll
M llvm/test/Transforms/LoopVectorize/X86/cost-model.ll
M llvm/test/Transforms/LoopVectorize/X86/drop-inbounds-flags-for-reverse-vector-pointer.ll
M llvm/test/Transforms/LoopVectorize/X86/fixed-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/X86/float-induction-x86.ll
M llvm/test/Transforms/LoopVectorize/X86/fneg-cost.ll
M llvm/test/Transforms/LoopVectorize/X86/fp32_to_uint32-cost-model.ll
M llvm/test/Transforms/LoopVectorize/X86/fp64_to_uint32-cost-model.ll
M llvm/test/Transforms/LoopVectorize/X86/fp80-widest-type.ll
M llvm/test/Transforms/LoopVectorize/X86/funclet.ll
M llvm/test/Transforms/LoopVectorize/X86/gather-vs-interleave.ll
M llvm/test/Transforms/LoopVectorize/X86/gcc-examples.ll
M llvm/test/Transforms/LoopVectorize/X86/illegal-parallel-loop-uniform-write.ll
M llvm/test/Transforms/LoopVectorize/X86/int128_no_gather.ll
M llvm/test/Transforms/LoopVectorize/X86/interleave-ptradd-with-replicated-operand.ll
M llvm/test/Transforms/LoopVectorize/X86/interleave_short_tc.ll
M llvm/test/Transforms/LoopVectorize/X86/interleaved-accesses-large-gap.ll
M llvm/test/Transforms/LoopVectorize/X86/interleaved-accesses-use-after-free.ll
M llvm/test/Transforms/LoopVectorize/X86/interleaved-accesses-waw-dependency.ll
M llvm/test/Transforms/LoopVectorize/X86/interleaving.ll
M llvm/test/Transforms/LoopVectorize/X86/intrinsiccost.ll
M llvm/test/Transforms/LoopVectorize/X86/invariant-load-gather.ll
M llvm/test/Transforms/LoopVectorize/X86/invariant-store-vectorization.ll
M llvm/test/Transforms/LoopVectorize/X86/libm-vector-calls-VF2-VF8.ll
M llvm/test/Transforms/LoopVectorize/X86/libm-vector-calls-finite.ll
M llvm/test/Transforms/LoopVectorize/X86/libm-vector-calls.ll
M llvm/test/Transforms/LoopVectorize/X86/masked_load_store.ll
M llvm/test/Transforms/LoopVectorize/X86/max-mstore.ll
M llvm/test/Transforms/LoopVectorize/X86/min-trip-count-switch.ll
M llvm/test/Transforms/LoopVectorize/X86/mul_slm_16bit.ll
M llvm/test/Transforms/LoopVectorize/X86/no-vector.ll
M llvm/test/Transforms/LoopVectorize/X86/no_fpmath.ll
M llvm/test/Transforms/LoopVectorize/X86/no_fpmath_with_hotness.ll
M llvm/test/Transforms/LoopVectorize/X86/nontemporal.ll
M llvm/test/Transforms/LoopVectorize/X86/optsize.ll
M llvm/test/Transforms/LoopVectorize/X86/outer_loop_test1_no_explicit_vect_width.ll
M llvm/test/Transforms/LoopVectorize/X86/parallel-loops-after-reg2mem.ll
M llvm/test/Transforms/LoopVectorize/X86/parallel-loops.ll
M llvm/test/Transforms/LoopVectorize/X86/powof2div.ll
M llvm/test/Transforms/LoopVectorize/X86/pr141968-instsimplifyfolder.ll
M llvm/test/Transforms/LoopVectorize/X86/pr23997.ll
M llvm/test/Transforms/LoopVectorize/X86/pr35432.ll
M llvm/test/Transforms/LoopVectorize/X86/pr39160.ll
M llvm/test/Transforms/LoopVectorize/X86/pr42674.ll
M llvm/test/Transforms/LoopVectorize/X86/pr54634.ll
M llvm/test/Transforms/LoopVectorize/X86/pr81872.ll
M llvm/test/Transforms/LoopVectorize/X86/propagate-metadata.ll
M llvm/test/Transforms/LoopVectorize/X86/reg-usage-debug.ll
M llvm/test/Transforms/LoopVectorize/X86/reg-usage.ll
M llvm/test/Transforms/LoopVectorize/X86/register-assumption.ll
M llvm/test/Transforms/LoopVectorize/X86/replicate-recipe-with-only-first-lane-used.ll
M llvm/test/Transforms/LoopVectorize/X86/replicating-load-store-costs.ll
M llvm/test/Transforms/LoopVectorize/X86/runtime-limit.ll
M llvm/test/Transforms/LoopVectorize/X86/scatter_crash.ll
M llvm/test/Transforms/LoopVectorize/X86/slm-no-vectorize.ll
M llvm/test/Transforms/LoopVectorize/X86/small-size.ll
M llvm/test/Transforms/LoopVectorize/X86/strided_load_cost.ll
M llvm/test/Transforms/LoopVectorize/X86/svml-calls-finite.ll
M llvm/test/Transforms/LoopVectorize/X86/uniform-phi.ll
M llvm/test/Transforms/LoopVectorize/X86/uniform_mem_op.ll
M llvm/test/Transforms/LoopVectorize/X86/unroll-pm.ll
M llvm/test/Transforms/LoopVectorize/X86/unroll-small-loops.ll
M llvm/test/Transforms/LoopVectorize/X86/unroll_selection.ll
M llvm/test/Transforms/LoopVectorize/X86/veclib-calls.ll
M llvm/test/Transforms/LoopVectorize/X86/vector_ptr_load_store.ll
M llvm/test/Transforms/LoopVectorize/X86/vectorization-remarks-loopid-dbg.ll
M llvm/test/Transforms/LoopVectorize/X86/vectorization-remarks-missed.ll
M llvm/test/Transforms/LoopVectorize/X86/vectorization-remarks-profitable.ll
M llvm/test/Transforms/LoopVectorize/X86/vectorization-remarks.ll
M llvm/test/Transforms/LoopVectorize/X86/x86_fp80-vector-store.ll
M llvm/test/Transforms/LoopVectorize/align.ll
M llvm/test/Transforms/LoopVectorize/assume.ll
M llvm/test/Transforms/LoopVectorize/bzip_reverse_loops.ll
M llvm/test/Transforms/LoopVectorize/calloc.ll
M llvm/test/Transforms/LoopVectorize/check-no-vectorize.ll
M llvm/test/Transforms/LoopVectorize/check-prof-info.ll
M llvm/test/Transforms/LoopVectorize/conditional-assignment.ll
M llvm/test/Transforms/LoopVectorize/consec_no_gep.ll
M llvm/test/Transforms/LoopVectorize/constantfolder-infer-correct-gepty.ll
M llvm/test/Transforms/LoopVectorize/constantfolder.ll
M llvm/test/Transforms/LoopVectorize/control-flow.ll
M llvm/test/Transforms/LoopVectorize/cpp-new-array.ll
M llvm/test/Transforms/LoopVectorize/create-induction-resume.ll
M llvm/test/Transforms/LoopVectorize/dbg-outer-loop-vect.ll
M llvm/test/Transforms/LoopVectorize/dbg.value.ll
M llvm/test/Transforms/LoopVectorize/debugloc-optimize-vfuf-term.ll
M llvm/test/Transforms/LoopVectorize/debugloc.ll
M llvm/test/Transforms/LoopVectorize/dereferenceable-info-from-assumption-variable-size.ll
M llvm/test/Transforms/LoopVectorize/diag-missing-instr-debug-loc.ll
M llvm/test/Transforms/LoopVectorize/diag-with-hotness-info.ll
M llvm/test/Transforms/LoopVectorize/discriminator.ll
M llvm/test/Transforms/LoopVectorize/early_exit_legality.ll
M llvm/test/Transforms/LoopVectorize/ee-crash.ll
M llvm/test/Transforms/LoopVectorize/epilog-vectorization-any-of-reductions.ll
M llvm/test/Transforms/LoopVectorize/explicit_outer_detection.ll
M llvm/test/Transforms/LoopVectorize/explicit_outer_nonuniform_inner.ll
M llvm/test/Transforms/LoopVectorize/explicit_outer_uniform_diverg_branch.ll
M llvm/test/Transforms/LoopVectorize/extract-last-veclane.ll
M llvm/test/Transforms/LoopVectorize/fcmp-vectorize.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence-complex.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence-multiply-recurrences.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/fix-reduction-dbg.ll
M llvm/test/Transforms/LoopVectorize/float-induction.ll
M llvm/test/Transforms/LoopVectorize/float-minmax-instruction-flag.ll
M llvm/test/Transforms/LoopVectorize/float-reduction.ll
M llvm/test/Transforms/LoopVectorize/forked-pointers.ll
M llvm/test/Transforms/LoopVectorize/fpsat.ll
M llvm/test/Transforms/LoopVectorize/gcc-examples.ll
M llvm/test/Transforms/LoopVectorize/global_alias.ll
M llvm/test/Transforms/LoopVectorize/i8-induction.ll
M llvm/test/Transforms/LoopVectorize/if-conv-crash.ll
M llvm/test/Transforms/LoopVectorize/if-conversion-reduction.ll
M llvm/test/Transforms/LoopVectorize/if-conversion.ll
M llvm/test/Transforms/LoopVectorize/if-pred-non-void.ll
M llvm/test/Transforms/LoopVectorize/if-pred-not-when-safe.ll
M llvm/test/Transforms/LoopVectorize/if-reduction.ll
M llvm/test/Transforms/LoopVectorize/incorrect-dom-info.ll
M llvm/test/Transforms/LoopVectorize/increment.ll
M llvm/test/Transforms/LoopVectorize/induction-step.ll
M llvm/test/Transforms/LoopVectorize/induction.ll
M llvm/test/Transforms/LoopVectorize/infiniteloop.ll
M llvm/test/Transforms/LoopVectorize/instruction-only-used-outside-of-loop.ll
M llvm/test/Transforms/LoopVectorize/interleaved-accesses-different-insert-position.ll
M llvm/test/Transforms/LoopVectorize/interleaved-accesses-gep-nowrap-flags.ll
M llvm/test/Transforms/LoopVectorize/interleaved-accesses-metadata.ll
M llvm/test/Transforms/LoopVectorize/interleaved-accesses.ll
M llvm/test/Transforms/LoopVectorize/intrinsic.ll
M llvm/test/Transforms/LoopVectorize/invariant-store-vectorization-2.ll
M llvm/test/Transforms/LoopVectorize/invariant-store-vectorization.ll
M llvm/test/Transforms/LoopVectorize/iv-select-cmp-decreasing.ll
M llvm/test/Transforms/LoopVectorize/iv-select-cmp-no-wrap.ll
M llvm/test/Transforms/LoopVectorize/iv-select-cmp-trunc.ll
M llvm/test/Transforms/LoopVectorize/iv-select-cmp.ll
M llvm/test/Transforms/LoopVectorize/loop-vect-memdep.ll
M llvm/test/Transforms/LoopVectorize/memory-dep-remarks.ll
M llvm/test/Transforms/LoopVectorize/metadata-unroll.ll
M llvm/test/Transforms/LoopVectorize/metadata-width.ll
M llvm/test/Transforms/LoopVectorize/min-trip-count-known-via-scev.ll
M llvm/test/Transforms/LoopVectorize/minmax_reduction.ll
M llvm/test/Transforms/LoopVectorize/multiple-address-spaces.ll
M llvm/test/Transforms/LoopVectorize/nested-loops-scev-expansion.ll
M llvm/test/Transforms/LoopVectorize/no-interleave-up-front.ll
M llvm/test/Transforms/LoopVectorize/no_array_bounds.ll
M llvm/test/Transforms/LoopVectorize/no_array_bounds_scalable.ll
M llvm/test/Transforms/LoopVectorize/no_int_induction.ll
M llvm/test/Transforms/LoopVectorize/no_outside_user.ll
M llvm/test/Transforms/LoopVectorize/no_switch.ll
M llvm/test/Transforms/LoopVectorize/no_switch_disable_vectorization.ll
M llvm/test/Transforms/LoopVectorize/noalias-md.ll
M llvm/test/Transforms/LoopVectorize/noalias-scope-decl.ll
M llvm/test/Transforms/LoopVectorize/nofloat-report.ll
M llvm/test/Transforms/LoopVectorize/nofloat.ll
M llvm/test/Transforms/LoopVectorize/nontemporal.ll
M llvm/test/Transforms/LoopVectorize/nounroll.ll
M llvm/test/Transforms/LoopVectorize/optimal-epilog-vectorization-limitations.ll
M llvm/test/Transforms/LoopVectorize/optimal-epilog-vectorization-liveout.ll
M llvm/test/Transforms/LoopVectorize/optimal-epilog-vectorization.ll
M llvm/test/Transforms/LoopVectorize/optsize.ll
M llvm/test/Transforms/LoopVectorize/outer-loop-vec-phi-predecessor-order.ll
M llvm/test/Transforms/LoopVectorize/outer-loop-wide-phis.ll
M llvm/test/Transforms/LoopVectorize/outer_loop_hcfg_construction.ll
M llvm/test/Transforms/LoopVectorize/outer_loop_test1.ll
M llvm/test/Transforms/LoopVectorize/outer_loop_test2.ll
M llvm/test/Transforms/LoopVectorize/partial-lcssa.ll
M llvm/test/Transforms/LoopVectorize/phi-hang.ll
M llvm/test/Transforms/LoopVectorize/pointer-induction-unroll.ll
M llvm/test/Transforms/LoopVectorize/pointer-induction.ll
M llvm/test/Transforms/LoopVectorize/pr28541.ll
M llvm/test/Transforms/LoopVectorize/pr31190.ll
M llvm/test/Transforms/LoopVectorize/pr32859.ll
M llvm/test/Transforms/LoopVectorize/pr33706.ll
M llvm/test/Transforms/LoopVectorize/pr35743.ll
M llvm/test/Transforms/LoopVectorize/pr36311.ll
M llvm/test/Transforms/LoopVectorize/pr38697.ll
M llvm/test/Transforms/LoopVectorize/pr38800.ll
M llvm/test/Transforms/LoopVectorize/pr44488-predication.ll
M llvm/test/Transforms/LoopVectorize/pr45525.ll
M llvm/test/Transforms/LoopVectorize/pr47343-expander-lcssa-after-cfg-update.ll
M llvm/test/Transforms/LoopVectorize/pr48832.ll
M llvm/test/Transforms/LoopVectorize/pr50686.ll
M llvm/test/Transforms/LoopVectorize/pr55167-fold-tail-live-out.ll
M llvm/test/Transforms/LoopVectorize/pr59319-loop-access-info-invalidation.ll
M llvm/test/Transforms/LoopVectorize/predicatedinst-loop-invariant.ll
M llvm/test/Transforms/LoopVectorize/preserve-dbg-loc-and-loop-metadata.ll
M llvm/test/Transforms/LoopVectorize/pseudoprobe.ll
M llvm/test/Transforms/LoopVectorize/ptr-induction.ll
M llvm/test/Transforms/LoopVectorize/ptr_loops.ll
M llvm/test/Transforms/LoopVectorize/read-only.ll
M llvm/test/Transforms/LoopVectorize/reduction-inloop-min-max.ll
M llvm/test/Transforms/LoopVectorize/reduction-inloop-pred.ll
M llvm/test/Transforms/LoopVectorize/reduction-inloop-uf4.ll
M llvm/test/Transforms/LoopVectorize/reduction-inloop.ll
M llvm/test/Transforms/LoopVectorize/reduction-minmax-users-and-predicated.ll
M llvm/test/Transforms/LoopVectorize/reduction-predselect.ll
M llvm/test/Transforms/LoopVectorize/reduction-with-invariant-store.ll
M llvm/test/Transforms/LoopVectorize/reduction.ll
M llvm/test/Transforms/LoopVectorize/remarks-multi-exit-loops.ll
M llvm/test/Transforms/LoopVectorize/remarks-reduction-inloop.ll
M llvm/test/Transforms/LoopVectorize/reverse_iter.ll
M llvm/test/Transforms/LoopVectorize/runtime-check-address-space.ll
M llvm/test/Transforms/LoopVectorize/runtime-check-pointer-element-type.ll
M llvm/test/Transforms/LoopVectorize/runtime-check-readonly-address-space.ll
M llvm/test/Transforms/LoopVectorize/runtime-check.ll
M llvm/test/Transforms/LoopVectorize/same-base-access.ll
M llvm/test/Transforms/LoopVectorize/scalable-assume.ll
M llvm/test/Transforms/LoopVectorize/scalable-inductions.ll
M llvm/test/Transforms/LoopVectorize/scalable-noalias-scope-decl.ll
M llvm/test/Transforms/LoopVectorize/scalable-reduction-inloop.ll
M llvm/test/Transforms/LoopVectorize/scalable-trunc-min-bitwidth.ll
M llvm/test/Transforms/LoopVectorize/scalar-select.ll
M llvm/test/Transforms/LoopVectorize/scalarized-bitcast.ll
M llvm/test/Transforms/LoopVectorize/scev-exitlim-crash.ll
M llvm/test/Transforms/LoopVectorize/scev-predicate-reasoning.ll
M llvm/test/Transforms/LoopVectorize/select-cmp-multiuse.ll
M llvm/test/Transforms/LoopVectorize/select-cmp-predicated.ll
M llvm/test/Transforms/LoopVectorize/select-cmp.ll
M llvm/test/Transforms/LoopVectorize/simple-unroll.ll
M llvm/test/Transforms/LoopVectorize/skip-iterations.ll
M llvm/test/Transforms/LoopVectorize/small-loop.ll
M llvm/test/Transforms/LoopVectorize/start-non-zero.ll
M llvm/test/Transforms/LoopVectorize/struct_access.ll
M llvm/test/Transforms/LoopVectorize/tbaa-nodep.ll
M llvm/test/Transforms/LoopVectorize/tripcount.ll
M llvm/test/Transforms/LoopVectorize/uncountable-single-exit-loops.ll
M llvm/test/Transforms/LoopVectorize/uniform-blend.ll
M llvm/test/Transforms/LoopVectorize/unroll-novec-memcheck-metadata.ll
M llvm/test/Transforms/LoopVectorize/unroll.ll
M llvm/test/Transforms/LoopVectorize/unroll_novec.ll
M llvm/test/Transforms/LoopVectorize/unsafe-dep-remark.ll
M llvm/test/Transforms/LoopVectorize/vect.stats.ll
M llvm/test/Transforms/LoopVectorize/vector-intrinsic-call-cost.ll
M llvm/test/Transforms/LoopVectorize/vector-no-scevcheck.ll
M llvm/test/Transforms/LoopVectorize/vectorize-once.ll
M llvm/test/Transforms/LoopVectorize/vectorize-pointer-phis.ll
M llvm/test/Transforms/LoopVectorize/vplan-incomplete-cases.ll
M llvm/test/Transforms/LoopVectorize/vplan-native-path-inner-loop-with-runtime-checks.ll
M llvm/test/Transforms/LoopVectorize/vplan-outer-loop-uncomputable-trip-count.ll
M llvm/test/Transforms/LoopVectorize/vplan-vectorize-inner-loop-reduction.ll
M llvm/test/Transforms/LoopVectorize/write-only.ll
Log Message:
-----------
[LV][NFC] Remove "; preds = " comments from tests (#191163)
The "; preds = " comments in tests add no value so I've removed them.
Commit: b8ea306c8fd45f8ff1e3590791675a60b10c64a1
https://github.com/llvm/llvm-project/commit/b8ea306c8fd45f8ff1e3590791675a60b10c64a1
Author: Jeff Bailey <jbailey at raspberryginger.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M libc/config/linux/aarch64/headers.txt
M libc/config/linux/arm/headers.txt
M libc/config/linux/i386/headers.txt
M libc/config/linux/riscv/headers.txt
M libc/config/linux/x86_64/headers.txt
Log Message:
-----------
[libc] Add cpio.h to Linux target public headers (#191177)
Added libc.include.cpio to TARGET_PUBLIC_HEADERS for all Linux
architectures: aarch64, arm, i386, riscv, and x86_64.
This enables generation of cpio.h when building with
LLVM_LIBC_FULL_BUILD.
Commit: 7685855678825ffad36d4c8521447a810ebe4197
https://github.com/llvm/llvm-project/commit/7685855678825ffad36d4c8521447a810ebe4197
Author: forking-google-bazel-bot[bot] <265904573+forking-google-bazel-bot[bot]@users.noreply.github.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[Bazel] Fixes 3529ce0 (#191161)
This fixes 3529ce05e9a96760ae3b9435ca264cc707bb4dac.
Co-authored-by: Google Bazel Bot <google-bazel-bot at google.com>
Commit: 8f06d7ab6b7185be08b5cf7f9b0293c998176efe
https://github.com/llvm/llvm-project/commit/8f06d7ab6b7185be08b5cf7f9b0293c998176efe
Author: Corentin Jabot <corentinjabot at gmail.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M clang/include/clang/AST/ExprCXX.h
M clang/test/SemaTemplate/concepts.cpp
Log Message:
-----------
[Clang] Fix handling of references to variable templates with an empty argument list (#191154)
In some cases they were treated as having no argument list at all.
Fixes #191016.
Commit: 93845b8ef4790a853068706200d417ef3184a098
https://github.com/llvm/llvm-project/commit/93845b8ef4790a853068706200d417ef3184a098
Author: Raphael Isemann <rise at apple.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M lldb/test/API/tools/lldb-server/TestAppleSimulatorOSType.py
Log Message:
-----------
[lldb][test] Fix call signature in TestAppleSimulatorOSType (#191185)
Commit 918e446ef28ac97df20d6ef2bd50c78e2fe903ac removed the
stderr_lines_to_read argument but didn't adjust the call site in
TestAppleSimulatorOSType. This patch just removes the extra arg here
too.
Commit: 291e4e97777d707079f5fe14326649cfc1eb8337
https://github.com/llvm/llvm-project/commit/291e4e97777d707079f5fe14326649cfc1eb8337
Author: Oleksandr Tarasiuk <oleksandr.tarasiuk at outlook.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/SemaDecl.cpp
M clang/test/SemaCXX/constant-expression-cxx14.cpp
Log Message:
-----------
[Clang] prevent constexpr crash on invalid overrides (#184048)
Fixes #183290
---
This PR fixes a crash during `constexpr` evaluation that occurred after
detecting an invalid override. It now marks the overriding method as
invalid when override checks fail.
Commit: 02b051ae0ad248289576f4b4af238af3675be62a
https://github.com/llvm/llvm-project/commit/02b051ae0ad248289576f4b4af238af3675be62a
Author: Ramkumar Ramachandra <artagnon at tenstorrent.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
Log Message:
-----------
[VPlan] Strip replicate-region-bail in udiv -> lshr simpl (NFC) (#190251)
Since 99aa33d ([VPlan] Explicitly unroll replicate-regions without
live-outs by VF, #188947), VPInstructions in replicate regions can be
handled. The change is non-functional because simplifyRecipes is run
after unrollByUF, which dissolves replicate regions.
Commit: c9223cdbebe39798cf4f56568e8dce371bb0674e
https://github.com/llvm/llvm-project/commit/c9223cdbebe39798cf4f56568e8dce371bb0674e
Author: jeanPerier <jperier at nvidia.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M flang/include/flang/Optimizer/Dialect/FIRType.h
M flang/lib/Optimizer/Builder/Runtime/Allocatable.cpp
M flang/lib/Optimizer/CodeGen/CodeGen.cpp
M flang/lib/Optimizer/Dialect/FIRType.cpp
M flang/lib/Optimizer/Transforms/CUDA/CUFOpConversion.cpp
Log Message:
-----------
[flang][NFC] remove ambiguous fir::unwrapInnerType helper (#191189)
`fir::unwrapInnerType` has the odd behavior of returning an empty type
for things like i32, causing BaseBoxType::unwrapInnerType to return a
null type for fir.box<i32> which was not intended.
Remove the helper, no user really needed the null type behavior, replace
its few usage by fir::getFortranElementType and update
BaseBoxType::unwrapInnerType to do the intended behavior.
Commit: 89dbacb42dd88ce084e1a25a651412dfdfe54a73
https://github.com/llvm/llvm-project/commit/89dbacb42dd88ce084e1a25a651412dfdfe54a73
Author: Ramkumar Ramachandra <artagnon at tenstorrent.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-sub.ll
Log Message:
-----------
[LV] InstCombine-simplify partial-reduce-sub dotp test (#189739)
The input IR shown in the partial-reduce-sub dotp test will never reach
the vectorizer, due to prior simplification by InstCombine. Change it
with this simplification. This is necessary for the simplification in
#187228, whose goal is to make #187589 possible.
Commit: 283a59154531923a0d8dacaac6c1a5a930429ac0
https://github.com/llvm/llvm-project/commit/283a59154531923a0d8dacaac6c1a5a930429ac0
Author: Lang Hames <lhames at gmail.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M orc-rt/include/orc-rt/SPSWrapperFunction.h
M orc-rt/unittests/SPSWrapperFunctionTest.cpp
Log Message:
-----------
[orc-rt] Qualify SPSWrapperFunction in ORC_RT_SPS_WRAPPER macro. (#191196)
This enables use of ORC_RT_SPS_WRAPPER in other namespaces.
Commit: ef31b272d252f8c806f24fc95c41bd2507720c7d
https://github.com/llvm/llvm-project/commit/ef31b272d252f8c806f24fc95c41bd2507720c7d
Author: Kseniya Tikhomirova <kseniya.tikhomirova at intel.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M libsycl/docs/index.rst
A libsycl/include/sycl/__impl/event.hpp
M libsycl/include/sycl/__impl/queue.hpp
M libsycl/include/sycl/sycl.hpp
M libsycl/src/CMakeLists.txt
A libsycl/src/detail/event_impl.cpp
A libsycl/src/detail/event_impl.hpp
M libsycl/src/detail/queue_impl.cpp
M libsycl/src/detail/queue_impl.hpp
A libsycl/src/event.cpp
M libsycl/src/queue.cpp
Log Message:
-----------
[libsycl] add sycl::event and wait functionality to event & queue (#188793)
Depends on https://github.com/llvm/llvm-project/pull/187528.
This is part of the SYCL support upstreaming effort. The relevant RFCs
can be found here:
https://discourse.llvm.org/t/rfc-add-full-support-for-the-sycl-programming-model/74080
https://discourse.llvm.org/t/rfc-sycl-runtime-upstreaming/74479
---------
Signed-off-by: Tikhomirova, Kseniya <kseniya.tikhomirova at intel.com>
Commit: eabe979d5cf58998fda4c1cba41b6802a37164a7
https://github.com/llvm/llvm-project/commit/eabe979d5cf58998fda4c1cba41b6802a37164a7
Author: Balázs Benics <benicsbalazs at gmail.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M clang/docs/analyzer/user-docs/Annotations.rst
M clang/include/clang/Basic/AttrDocs.td
Log Message:
-----------
[clang][docs] Further improve the docs of the ownership_returns attribute (#191197)
This addresses:
https://github.com/llvm/llvm-project/pull/191005#discussion_r3058171126
https://github.com/llvm/llvm-project/pull/191005#discussion_r3058173173
I've reviewed the uses of "argument" and "parameter" and tried to
consolidate them to the best of my abilities.
This patch fixes up #191005
Commit: 4b5a4b054bf72ea74d64720717f8e9ee72f92fe5
https://github.com/llvm/llvm-project/commit/4b5a4b054bf72ea74d64720717f8e9ee72f92fe5
Author: Adel Ejjeh <adel.ejjeh at amd.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
M llvm/lib/Transforms/Scalar/LoopUnrollPass.cpp
R llvm/test/Transforms/LoopUnroll/AMDGPU/expensive-tripcount.ll
A llvm/test/Transforms/LoopUnroll/expensive-tripcount.ll
Log Message:
-----------
[LoopUnroll] Enable allowexpensivetripcounts when user provides pragma (#181267)
Loops with an explicit unroll pragma (`#pragma unroll` / `#pragma clang
loop unroll(enable)`) that have an expensive runtime trip count
currently don't get unrolled because `UP.AllowExpensiveTripCount`
defaults to false. The pragma is silently ignored. This is not the case
when an unroll factor is specified (`PragmaCount > 0`), where the pass
sets `UP.AllowExpensiveTripCount = true`.
**Solution:**
Set `UP.AllowExpensiveTripCount` and `UP.Runtime` to true for for loops
that have an unroll pramga at the beginning of `computeUnrollCount()`.
I've also added a new lit test `expensive-tripcount.ll` that verifies
pragma-driven unrolling with expensive trip counts will work as
expected.
---------
Co-authored-by: Justin Fargnoli <jfargnoli at nvidia.com>
Commit: dd4360d29230d23188ddf581e4897705b2c4f771
https://github.com/llvm/llvm-project/commit/dd4360d29230d23188ddf581e4897705b2c4f771
Author: Adel Ejjeh <adel.ejjeh at amd.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M llvm/lib/Transforms/Utils/ScalarEvolutionExpander.cpp
M llvm/test/Transforms/IndVarSimplify/X86/loop-invariant-conditions.ll
A llvm/test/Transforms/LoopUnroll/AMDGPU/scev-mul-expansion-cost.ll
Log Message:
-----------
[SCEV] Fix scMulExpr cost for multiply by -1 and power-of-2 (#191033)
Currently, SCEV's cost model will always return the cost of a Multiply
for `scMulExpr`, without taking into account the cases where
`SCEVExpander::visitMulExpr` does not actually emit a multiply. This PR
addresses two of these cases:
- `-1 * X`: generates `sub 0, X`
- `2^k * X`: generates `shl X, k`
This mismatch matters on targets where integer multiply is expensive
because it can block runtime unrolling by overestimating the cost of
expanding the trip count calculation.
This patch checks the constant operand in two-operand `scMulExpr` and
counts it as a subtract if it is -1 or a shift-left if it is a power of
2.
The patch also introduces a new lit test, and udpates
`IndVarSimplify/X86/loop-invariant-conditions.ll` because it now
correctly estimates the cost of `-1 * start` which allows IndVarSimplify
to simplify the induction variable.
Assisted-by: Cursor (Claude)
Commit: a13f661f70ab069980b8f0983a5b1223afd9384b
https://github.com/llvm/llvm-project/commit/a13f661f70ab069980b8f0983a5b1223afd9384b
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoZicbo.td
M llvm/test/CodeGen/RISCV/prefetch.ll
M llvm/test/MC/RISCV/rvzicbom-invalid.s
M llvm/test/MC/RISCV/rvzicbop-valid.s
M llvm/test/MC/RISCV/rvzicboz-invalid.s
Log Message:
-----------
[RISCV] Allow prefetch hints without Zicbop. (#191027)
The prefetch encodings are ORI with x0 destination. To be consistent
with other hints like Zihintntl, we should always allow these.
Commit: 772354979ffa7e61b0e85b68fbe2aa1a5e597aef
https://github.com/llvm/llvm-project/commit/772354979ffa7e61b0e85b68fbe2aa1a5e597aef
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M libcxx/utils/ci/lnt/README.md
M libcxx/utils/ci/lnt/run-benchmarks
M libcxx/utils/ci/lnt/runners/apple-m5-clang21
M libcxx/utils/ci/lnt/runners/apple-m5-xcode26
A libcxx/utils/ci/lnt/submit-benchmarks
Log Message:
-----------
[libc++] Split benchmark generation and submission into two scripts (#191211)
This makes it easier to locally replicate perf CI setups locally without
actually making submissions to the LNT instance.
Commit: b4a49883ce7a896eeb1fae88ca5abe0746d01168
https://github.com/llvm/llvm-project/commit/b4a49883ce7a896eeb1fae88ca5abe0746d01168
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M clang/lib/CodeGen/CodeGenFunction.cpp
A clang/test/CodeGen/AMDGPU/sanitizer.c
Log Message:
-----------
[HIP] Fix ubsan function checks applied to kernel functions (#188872)
Summary:
The 'function' check requires inserting eight bytes of magic before each
function. The HIP runtime expects and enforces 256 byte alignment. When
the instrumentation inserts the eight bytes this is done after the
alignment, which means that the HIP runtime then points the PC to an
invalid instruction by truncating the address to 256 byte alignment. The
OpenMP runtime doesn't do this.
The purpose of this function is to handle indirect calls, and it's
impossible to indirectly call a kernel anyway, so we should just
suppress this in this case. The only other solution would be to add the
alignment back before we emit the label, but that would be meaningless
because it'd just replace the magic bytes with zeroes.
Commit: 6a7c14115c7ae0a8460e6717ff6f4e9091fc32e1
https://github.com/llvm/llvm-project/commit/6a7c14115c7ae0a8460e6717ff6f4e9091fc32e1
Author: Zhijie Wang <yesterda9 at gmail.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M clang/docs/LifetimeSafety.rst
Log Message:
-----------
[LifetimeSafety] Document record type origin tracking for lifetimebound calls (#189508)
Update the doc for #187917
Commit: ef281e905927147d64b74ce9ec7fd14332f929b1
https://github.com/llvm/llvm-project/commit/ef281e905927147d64b74ce9ec7fd14332f929b1
Author: Sang Ik Lee <sang.ik.lee at intel.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M mlir/test/Integration/GPU/LevelZero/gpu-addf32-to-spirv.mlir
M mlir/test/Integration/GPU/LevelZero/gpu-addi64-to-spirv.mlir
M mlir/test/Integration/GPU/LevelZero/gpu-memcpy-addf32-to-spirv.mlir
M mlir/test/Integration/GPU/LevelZero/gpu-reluf32-to-spirv.mlir
Log Message:
-----------
[MLIR][GPU] Fix LevelZero wrapper integration tests. (#191060)
LevelZero wrapper has been updated to accept SPIR-V binary for JIT
wrapper.
Update gpu-module-to-binary pass format option to isa to use JIT.
Commit: e76d803359f1993cb66c6c100e3648ff0cb4afc4
https://github.com/llvm/llvm-project/commit/e76d803359f1993cb66c6c100e3648ff0cb4afc4
Author: Tim Gymnich <tim at gymni.ch>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M llvm/include/llvm/Support/KnownFPClass.h
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/lib/Support/KnownFPClass.cpp
A llvm/test/Transforms/Attributor/nofpclass-trig.ll
M llvm/test/Transforms/InstSimplify/known-never-infinity.ll
M llvm/test/Transforms/InstSimplify/known-never-nan.ll
Log Message:
-----------
[Support] KnownFPClass: add static helpers for more trig intrinsics (#190609)
Add KnownFPClass::tan, sinh, cosh, tanh, asin, acos, atan, and atan2
static helper methods, following the same pattern as the existing
sin/cos helpers.
Co-authored-by: Claude Sonnet 4.6 <noreply at anthropic.com>
Commit: fa89983d45e25cb2d64773148b43c7b4ab8c5d1b
https://github.com/llvm/llvm-project/commit/fa89983d45e25cb2d64773148b43c7b4ab8c5d1b
Author: Utkarsh Saxena <usx at google.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M .github/new-prs-labeler.yml
Log Message:
-----------
Add LifetimeSafety documentation to PR labeler (#191215)
Commit: 6ca63c1018a0a89912bbf1b30ef28f42ed14e76a
https://github.com/llvm/llvm-project/commit/6ca63c1018a0a89912bbf1b30ef28f42ed14e76a
Author: Keith Smiley <keithbsmiley at gmail.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVTosaOps.h
Log Message:
-----------
[mlir][spirv] Add missing include statements and header guard (NFC) (#191078)
Previously this header assumed these other includes had already been
included
Commit: 1ecd855a4d95b1295c17a36c13d911dc4ca0f0b9
https://github.com/llvm/llvm-project/commit/1ecd855a4d95b1295c17a36c13d911dc4ca0f0b9
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M libcxx/utils/ci/lnt/README.md
A libcxx/utils/ci/lnt/run-benchbot
R libcxx/utils/ci/lnt/runners/README.md
R libcxx/utils/ci/lnt/runners/apple-m5-clang21
R libcxx/utils/ci/lnt/runners/apple-m5-xcode26
Log Message:
-----------
[libc++] Replace individual LNT runner scripts by run-benchbot (#191221)
The run-benchbot script is similar to the run-buildbot script. Its goal
is to provide a unified entry point for all the libc++ LNT runners.
Commit: 2763b22413c4f8406087a1ffb5aa3d67f8f49edd
https://github.com/llvm/llvm-project/commit/2763b22413c4f8406087a1ffb5aa3d67f8f49edd
Author: vangthao95 <vang.thao at amd.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.interp.p1.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.interp.mov.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.interp.p1.f16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.interp.p1.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.interp.p2.f16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.interp.p2.mir
M llvm/test/CodeGen/AMDGPU/diverge-interp-mov-lower.ll
M llvm/test/CodeGen/AMDGPU/fsub-as-fneg-src-modifier.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.interp.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.interp.inreg.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.interp.ll
Log Message:
-----------
AMDGPU/GlobalISel: RegBankLegalize rules for interp intrinsics (#191086)
Commit: f3db4b72a5c2a5001a4ff6af9e2e01dcd57fd584
https://github.com/llvm/llvm-project/commit/f3db4b72a5c2a5001a4ff6af9e2e01dcd57fd584
Author: Chinmay Deshpande <chdeshpa at amd.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.setprio.inc.wg.ll
Log Message:
-----------
[AMDGPU][GISel] RegBankLegalize rules for amdgcn_s_setprio_inc_wg (#191064)
Commit: 2c7bc4226dacdb87604ac690195a4f10141b54e3
https://github.com/llvm/llvm-project/commit/2c7bc4226dacdb87604ac690195a4f10141b54e3
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
A .github/workflows/release-llvm-testing-tools.yml
Log Message:
-----------
[Github][TestingTools] Add workflow to build llvm-testing-tools
Add a github workflow to build the package. This just adds manylinux239
support for x86. Eventually we want to set up Windows/MacOS/AArch64
Linux and trusted publishing to automatically push this out to PyPI, but
for now this should be sufficient for testing.
Reviewers: ldionne, Michael137
Pull Request: https://github.com/llvm/llvm-project/pull/188891
Commit: 212a216e425469be5b9c6e74f6ebb92993f54653
https://github.com/llvm/llvm-project/commit/212a216e425469be5b9c6e74f6ebb92993f54653
Author: vangthao95 <vang.thao at amd.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.fdot2.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fdot2.f16.f16.ll
Log Message:
-----------
AMDGPU/GlobalISel: RegBankLegalize rules for fdot2 (#191066)
Commit: 6a12adb5a8de1a5eed17bbcfa886397ba6931f13
https://github.com/llvm/llvm-project/commit/6a12adb5a8de1a5eed17bbcfa886397ba6931f13
Author: 4ast <alexei.starovoitov at gmail.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M llvm/test/CodeGen/BPF/struct_ret1.ll
M llvm/test/CodeGen/BPF/struct_ret2.ll
Log Message:
-----------
[bpf] make tests endian agnostic (#191206)
fix s390 failures:
https://lab.llvm.org/buildbot/#/builders/42/builds/8534
Signed-off-by: Alexei Starovoitov <ast at kernel.org>
Co-authored-by: Alexei Starovoitov <ast at kernel.org>
Commit: e21759ff4931db082dfdcc87ac3bf70ddd356abe
https://github.com/llvm/llvm-project/commit/e21759ff4931db082dfdcc87ac3bf70ddd356abe
Author: Kacper Doga <kacper.doga at intel.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M llvm/lib/Analysis/BasicAliasAnalysis.cpp
A llvm/test/Analysis/BasicAA/gep-decompose-bitcast-vector-type-mismatch.ll
Log Message:
-----------
[BasicAA] Fix assertion failure in alias() caused by non-pointer base in DecomposeGEPExpression (#191180)
When stripping a bitcast in DecomposeGEPExpression, the resulting
operand may have a non-scalar-pointer type (e.g. <1 x ptr>). Proceeding
with such a type as the decomposition base violates the AA assumption
that all pointers are scalar pointer types, triggering an assertion
failure on alias() call.
Add a type check in the bitcast/addrspacecast handling path to return
not stripped V as base when the stripped operand is not a scalar pointer
type.
Add a lit test verifying no crash on valid IR containing such a bitcast,
and checking that the alias query conservatively returns MayAlias.
Fixes #191157
Commit: 9d38eba6e73b70030518d3ed09a01bb06b36d44b
https://github.com/llvm/llvm-project/commit/9d38eba6e73b70030518d3ed09a01bb06b36d44b
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp
M llvm/test/Transforms/InstCombine/sub-xor-cmp.ll
Log Message:
-----------
[InstCombine][ProfCheck] Mark unknown select profiles in sub xor fold (#191192)
Mark the weights as explicitly unknown given we cannot statically infer
the weights without value profiling due to the select being synthesized
from a binary operation.
Commit: 857a98e50e279c0c1cf3658337dadb347f7ff5c4
https://github.com/llvm/llvm-project/commit/857a98e50e279c0c1cf3658337dadb347f7ff5c4
Author: Andrew Haberlandt <ahaberlandt at apple.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M compiler-rt/lib/sanitizer_common/sanitizer_mac.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_mac.h
Log Message:
-----------
[compiler-rt] [Darwin] Move macOS ASAN reservation above 512G (#191039)
On macOS, the first 512G may contain platform-specific reservations. To
ensure compatibility with these reservations, this changes ASAN to
always map shadow memory above 512G on macOS.
rdar://174252720
Commit: 070d708d86629d8c8deae2a95c6e071f30ba9c5c
https://github.com/llvm/llvm-project/commit/070d708d86629d8c8deae2a95c6e071f30ba9c5c
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M libcxx/utils/ci/lnt/run-benchbot
Log Message:
-----------
[libc++] Minor tweaks to run-benchbot (#191233)
- Support multiple runs of run-benchbot on the same commit
- Add support for passing a path to SPEC
Commit: e77ac8049afab1ed6dcd048a65c0e5c030293c84
https://github.com/llvm/llvm-project/commit/e77ac8049afab1ed6dcd048a65c0e5c030293c84
Author: Paul Walker <paul.walker at arm.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M clang/include/clang/Basic/arm_sve.td
M clang/lib/CodeGen/TargetBuiltins/ARM.cpp
M clang/test/CodeGen/AArch64/sme-intrinsics/acle_sme_ld1.c
M clang/test/CodeGen/AArch64/sme-intrinsics/acle_sme_ld1_vnum.c
M clang/test/CodeGen/AArch64/sme-intrinsics/acle_sme_ldr.c
M clang/test/CodeGen/AArch64/sme-intrinsics/acle_sme_st1.c
M clang/test/CodeGen/AArch64/sme-intrinsics/acle_sme_st1_vnum.c
M clang/test/CodeGen/AArch64/sme-intrinsics/acle_sme_str.c
M clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_ldr_str_zt.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ld1.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ld1ro.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ld1rq.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ld1sb.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ld1sh.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ld1sw.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ld1ub.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ld1uh.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ld1uw.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ld2.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ld3.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ld4.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ldff1.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ldff1sb.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ldff1sh.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ldff1sw.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ldff1ub.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ldff1uh.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ldff1uw.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ldnf1.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ldnf1sb.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ldnf1sh.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ldnf1sw.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ldnf1ub.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ldnf1uh.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ldnf1uw.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ldnt1.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_prfb.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_prfd.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_prfh.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_prfw.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_st1.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_st1b.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_st1h.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_st1w.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_st2.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_st3.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_st4.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_stnt1.c
M clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_ldnt1.c
M clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_ldnt1sb.c
M clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_ldnt1sh.c
M clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_ldnt1sw.c
M clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_ldnt1ub.c
M clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_ldnt1uh.c
M clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_ldnt1uw.c
M clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_stnt1.c
M clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_stnt1b.c
M clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_stnt1h.c
M clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_stnt1w.c
M clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_ld1.c
M clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_ld1_single.c
M clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_ldnt1.c
M clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_load_struct.c
M clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_loads.c
M clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_st1.c
M clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_st1_single.c
M clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_stnt1.c
M clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_store.c
M clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_store_struct.c
M llvm/include/llvm/IR/IntrinsicsAArch64.td
M llvm/lib/IR/AutoUpgrade.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/test/Bitcode/upgrade-aarch64-sve-intrinsics.ll
M llvm/test/CodeGen/AArch64/sve-coalesce-ptrue-intrinsics.ll
M llvm/test/Instrumentation/MemorySanitizer/AArch64/sme2-intrinsics-add-mini.ll
M llvm/test/Instrumentation/MemorySanitizer/AArch64/sme2-intrinsics-add.ll
M llvm/test/Transforms/InstCombine/AArch64/sve-intrinsic-comb-no-active-lanes-stores.ll
M llvm/test/Transforms/InstCombine/AArch64/sve-intrinsic-gatherscatter.ll
M llvm/test/Transforms/InstCombine/scalable-trunc.ll
M llvm/test/Transforms/InterleavedAccess/AArch64/scalable-deinterleave-intrinsics.ll
M llvm/test/Transforms/InterleavedAccess/AArch64/sve-deinterleave4.ll
M llvm/test/Transforms/InterleavedAccess/AArch64/sve-interleave4.ll
M llvm/test/Transforms/InterleavedAccess/AArch64/sve-interleaved-accesses.ll
M llvm/test/Transforms/PhaseOrdering/AArch64/sve-interleave-vectorization.ll
M mlir/include/mlir/Dialect/ArmSME/IR/ArmSMEIntrinsicOps.td
Log Message:
-----------
[LLVM][AArch64] Remove addrspace(0) restriction from all SVE/SME memory intrinsics. (#189992)
This requirement was not intentional, just the result of convenience.
Fixes: https://github.com/llvm/llvm-project/issues/183265
---------
Co-authored-by: nikhil-m-k <nikhil_mk at yahoo.com>
Commit: e9c78be316180a86529d7ac2ba41e4ec976fca33
https://github.com/llvm/llvm-project/commit/e9c78be316180a86529d7ac2ba41e4ec976fca33
Author: Fangrui Song <i at maskray.me>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M llvm/include/llvm/MC/MCAssembler.h
M llvm/lib/MC/MCAssembler.cpp
M llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
M llvm/lib/Target/CSKY/MCTargetDesc/CSKYAsmBackend.cpp
M llvm/test/MC/ARM/thumb-ldr-stretch.s
M llvm/test/MC/CSKY/lrw-stretch.s
M llvm/test/MC/ELF/relax-branch-align.s
M llvm/test/MC/X86/align-branch-convergence.s
Log Message:
-----------
Reland [MC] Fuse relaxation and layout into a single forward pass (#190318)
This relands debb2514ea7f, which was reverted by #189548 due to ARM
spurious `cbz` out of range error (Chromium, Android).
---
Replace the two-pass inner loop in relaxOnce (relaxFragment +
layoutSection) with a single forward pass that sets each fragment's
offset before processing it.
- Extract relaxAlign from layoutSection's FT_Align handling and call
it from relaxFragment. FT_Align padding is computed inline with the
tracked Offset, so alignment fragments always see fresh upstream
offsets. This structurally eliminates the O(N) convergence pitfall
where stale offsets caused each iteration to fix only one more
alignment fragment.
- The new MCAssembler::Stretch field tracks the cumulative upstream size
delta. In evaluateFixup, for PCRel fixups during relaxation, Stretch
is added to forward-reference target values (LayoutOrder comparison).
This makes displacement = target_old - source_old, identical to the
old two-pass approach, preventing premature relaxation for
span-dependent instructions.
- FT_Fill/FT_Org removed from relaxFragment; `if (F.Offset != Offset) in
the fused loop detects their size changes.
- layoutSection is retained for initial layout and post-finishLayout.
This fixes the FT_BoundaryAlign linear time convergence issue reported
by #176535. In addition, backward branches near the short/near boundary
may benefit from tighter encoding when a .p2align between the target and
the branch absorbs upstream growth (see relax-branch-align.s).
Key commits that updated relaxFragment/layoutSection:
- 742ecfc13e8a [MC] Relax MCFillFragment and compute fragment offsets
eagerly
- 9f66ebe42715 MC: Eliminate redundant fragment relaxation
- df71243fa885 MC: Evaluate .org during fragment relaxation
- b1d58f025e83 MCAssembler: Simplify fragment relaxation
- 58d16db8b5d2 MCAssembler: Simplify relaxation of FT_Fill and FT_Org
---
Fix for the ARM regression (see thumb-ldr-stretch.s):
ARM `evaluateFixup` pre-seeds Value with
`(F.Offset + fixup_offset) % 4` for Thumb's AlignDown(PC, 4) semantics.
The full displacement formulas:
```
Old two-pass:
(source_old % 4) + target_old - source_old
= target_old - alignDown(source_old, 4)
Reverted buggy fused:
(source_new % 4) + target_old - source_new + Stretch
= target_old + Stretch - alignDown(source_new, 4)
Fixed fused:
((source_new - Stretch) % 4) + target_old - source_new + Stretch
= (source_old % 4) + target_old - source_old
= target_old - alignDown(source_old, 4)
```
With the fused pass, F.Offset is already updated by Stretch, so the
pre-seed used the new offset while the generic Stretch compensation
assumed the old offset, producing a misaligned displacement. This caused
spurious tLDRpci -> t2LDRpci relaxation (+2 bytes each), which cascaded
to push the initial CBZ target out of range.
The fix uses pre-Stretch source offsets for the AlignDown(PC, 4)
pre-seed in evaluateFixup, leading to the same displacement
as the old two-pass algorithm.
Commit: 20b6ec66967ac2a8f932863c1abf251e5b17a843
https://github.com/llvm/llvm-project/commit/20b6ec66967ac2a8f932863c1abf251e5b17a843
Author: Hans Wennborg <hans at hanshq.net>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M clang/test/CMakeLists.txt
Log Message:
-----------
[clang][ssaf] Fix CLANG_PLUGIN_SUPPORT=OFF SSAFExamplePlugin cmake errors (#191229)
Such builds would fail with:
```
...
CMake Error at cmake/modules/AddLLVM.cmake:2245 (add_dependencies):
The dependency target "SSAFExamplePlugin" of target
"check-clang-utils-update_cc_test_checks" does not exist.
...
```
This fixes it by using the same condition for the test dependency as is
used for deciding to build the plugin in
clang/lib/ScalableStaticAnalysisFramework/Plugins/CMakeLists.txt
Commit: e3adaf0be8b71a66028ddcdb9897c67dd0804fd3
https://github.com/llvm/llvm-project/commit/e3adaf0be8b71a66028ddcdb9897c67dd0804fd3
Author: Jan Svoboda <jan_svoboda at apple.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M clang/lib/Serialization/ModuleCache.cpp
Log Message:
-----------
[clang][modules] Close module file descriptors (#191227)
This was missed in the original PR and was causing "too many files open"
errors on real workloads.
Commit: cacd8625ea70c452c4bfcafc75eb55c29d3f31fe
https://github.com/llvm/llvm-project/commit/cacd8625ea70c452c4bfcafc75eb55c29d3f31fe
Author: Alexey Samsonov <vonosmas at gmail.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M libc/config/linux/aarch64/headers.txt
M libc/config/linux/riscv/headers.txt
M libc/config/linux/x86_64/headers.txt
M libc/include/CMakeLists.txt
A libc/include/syscall.h
Log Message:
-----------
[libc] Add a redirecting <syscall.h> header. (#191069)
The amount of legacy code including `<syscall.h>` header instead of
`<sys/syscall.h>` (which is the regular header location on Linux
systems) out there is large.
Add a simple one-liner redirecting header to fix this compatibility
issues. In this PR I omit the regular licensing blurb at the top, given
the transient nature of this file, but I'm happy to add this if needed.
Also, given that it's effectively a compatibility shim, YAML generation
is not used.
Commit: fa7f5cf6f665f2380a7103bccce58a01ea673b8c
https://github.com/llvm/llvm-project/commit/fa7f5cf6f665f2380a7103bccce58a01ea673b8c
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M libc/shared/rpc.h
Log Message:
-----------
[libc] Fix 'finish()' being called by the client instead of the server (#191226)
Summary:
This function is supposed to manage the doorbell interrupts. The flow
that was intended was that the client notified work to wake the server
and the server finished the work so it didn't go back to sleep until
everything was done. This was reversed and we had the client finishing
work and then stalling on it.
Commit: 47c919a8b56db94a0897e55c242343e889d02eb8
https://github.com/llvm/llvm-project/commit/47c919a8b56db94a0897e55c242343e889d02eb8
Author: rthomas-activision <romain.thomas at activision.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M clang/lib/Driver/Driver.cpp
M clang/test/Driver/cl-outputs.c
Log Message:
-----------
[clang][Driver] Ensure intermediate bitcode files are written according to `/Fo` (#189977)
With the following compilation process:
```
$ mkdir -p src/ tmp/
$ cat << 'EOF' > src/main.c
int main() { return 0; }
EOF
$ clang-cl /c /Fo:tmp/ /clang:-fembed-bitcode src/main.c
```
the object file `main.obj` is generated in the `tmp/` directory but the
intermediate `main.bc` is placed in the current working directory.
This PR ensures that intermediate `.bc` files are written to the same
directory specified by `/Fo`.
Commit: 1af724e4a940869bd30aadf42eec01773de71c35
https://github.com/llvm/llvm-project/commit/1af724e4a940869bd30aadf42eec01773de71c35
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M llvm/test/CodeGen/SPIRV/spirv_param_decorations.ll
Log Message:
-----------
[NFC][SPIR-V] Fix spirv_param_decorations test to use valid parameter types and decorations (#191125)
Commit: 74af5fa55f8f6f96e9d01edfd2beaf9b245dfda1
https://github.com/llvm/llvm-project/commit/74af5fa55f8f6f96e9d01edfd2beaf9b245dfda1
Author: jeanPerier <jperier at nvidia.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M flang/include/flang/Optimizer/Dialect/FIRDialect.td
M flang/include/flang/Optimizer/Dialect/FIROps.td
M flang/include/flang/Optimizer/Dialect/FIRTypes.td
M flang/lib/Lower/ConvertExprToHLFIR.cpp
M flang/lib/Lower/Support/ReductionProcessor.cpp
M flang/lib/Optimizer/CodeGen/CodeGen.cpp
M flang/lib/Optimizer/Dialect/FIRDialect.cpp
M flang/lib/Optimizer/Dialect/FIROps.cpp
M flang/lib/Optimizer/OpenACC/Support/FIROpenACCTypeInterfaces.cpp
M flang/lib/Optimizer/Transforms/FIRToMemRef.cpp
M flang/test/Fir/fir-ops.fir
M flang/test/Fir/invalid.fir
M flang/test/Fir/logical-convert.fir
A flang/test/Fir/logical-ops-fold.fir
M flang/test/Lower/HLFIR/array-ctor-as-inlined-temp.f90
M flang/test/Lower/HLFIR/binary-ops.f90
M flang/test/Lower/HLFIR/expr-box.f90
M flang/test/Lower/HLFIR/user-defined-assignment.f90
M flang/test/Lower/OpenACC/acc-reduction.f90
M flang/test/Lower/OpenMP/atomic-update-reassoc-logical.f90
M flang/test/Lower/OpenMP/wsloop-reduction-logical-and-byref.f90
M flang/test/Lower/OpenMP/wsloop-reduction-logical-and.f90
M flang/test/Lower/OpenMP/wsloop-reduction-logical-eqv-byref.f90
M flang/test/Lower/OpenMP/wsloop-reduction-logical-eqv.f90
M flang/test/Lower/OpenMP/wsloop-reduction-logical-neqv-byref.f90
M flang/test/Lower/OpenMP/wsloop-reduction-logical-neqv.f90
M flang/test/Lower/OpenMP/wsloop-reduction-logical-or-byref.f90
M flang/test/Lower/OpenMP/wsloop-reduction-logical-or.f90
M flang/test/Lower/array-elemental-calls-2.f90
M flang/test/Transforms/FIRToMemRef/logical.mlir
Log Message:
-----------
[flang] preserve logical operations in single FIR operation (#190771)
This patch adds new operations to represent AND/OR/EQV/NEQV logical
operation with the main goal of preserving them at a higher level in the
IR to make it easier to match them and to dispatch them to atomic
implementations when working on reductions.
They are only generated when one of the argument is actually a logical,
otherwise, the when dealing with AND/OR... where both operands are
comparisons, the i1 arith operations are still generated since using the
new operation would make the IR more complex and preserving logical
operation is only valuable when one of the operand is a logical
variable.
Commit: 1a4734789d2dcc42bb2d183ffb94b0cb9b41292f
https://github.com/llvm/llvm-project/commit/1a4734789d2dcc42bb2d183ffb94b0cb9b41292f
Author: Takashi Idobe <idobetakashi at gmail.com>
Date: 2026-04-10 (Fri, 10 Apr 2026)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp
M llvm/test/Transforms/InstCombine/scmp.ll
M llvm/test/Transforms/InstCombine/ucmp.ll
Log Message:
-----------
[InstCombine] fold (sext(ucmp/scmp(X, Y)) -> ucmp/scmp(X, Y) (#191182)
relates: https://github.com/llvm/llvm-project/issues/190538
related PR: https://github.com/llvm/llvm-project/pull/190787
This PR folds (sext(ucmp/scmp(X, Y)) -> ucmp/scmp(X, Y). Since ucmp/scmp
return -1, 0, 1, if you see the sequence:
```llvm
%_3 = tail call i8 @llvm.ucmp.i8.i64(i64 %a, i64 %b)
%_0 = sext i8 %_3 to i64
```
It's fine to turn this into:
```llvm
%_0 = tail call i64 @llvm.ucmp.i64.i64(i64 %a, i64 %b)
```
[Alive Proof](https://alive2.llvm.org/ce/z/VmeKM2)
Likewise for scmp:
```llvm
%_3 = tail call i8 @llvm.scmp.i8.i64(i64 %a, i64 %b)
%_0 = sext i8 %_3 to i64
```
```llvm
%_0 = tail call i64 @llvm.scmp.i64.i64(i64 %a, i64 %b)
```
[Alive Proof](https://alive2.llvm.org/ce/z/WSm7YS)
For ucmp, a simple way to get this is to cmp two rust unsigned integers:
```rust
pub fn compare(a: u64, b: u64) -> i64 {
a.cmp(&b) as i64
}
```
Which gets this:
```llvm
define noundef range(i64 -1, 2) i64 @compare(i64 noundef %a, i64 noundef %b) unnamed_addr {
start:
%_3 = tail call i8 @llvm.ucmp.i8.i64(i64 %a, i64 %b)
%_0 = sext i8 %_3 to i64
ret i64 %_0
}
declare range(i8 -1, 2) i8 @llvm.ucmp.i8.i64(i64, i64)
```
For scmp, swapping to i64s will suffice:
```rust
pub fn compare(a: i64, b: i64) -> i64 {
a.cmp(&b) as i64
}
```
```llvm
define noundef range(i64 -1, 2) i64 @compare(i64 noundef %a, i64 noundef %b) unnamed_addr {
start:
%_3 = tail call i8 @llvm.scmp.i8.i64(i64 %a, i64 %b)
%_0 = sext i8 %_3 to i64
ret i64 %_0
}
declare range(i8 -1, 2) i8 @llvm.scmp.i8.i64(i64, i64)
```
Commit: 63c64fa6cd451557c7554593c1908e34e668aa89
https://github.com/llvm/llvm-project/commit/63c64fa6cd451557c7554593c1908e34e668aa89
Author: Jeff Bailey <jbailey at raspberryginger.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M libc/hdr/stdint_proxy.h
Log Message:
-----------
[libc] Add LIBC_FULL_BUILD guard to stdint_proxy.h (#191234)
In full-build mode with -nostdinc, the system <stdint.h> is unavailable.
Use the internal stdint-macros.h header instead, falling back to the
system header in overlay mode.
Commit: 544e6c692aa79cc8d53a8a9db4d41fe4d9cb359b
https://github.com/llvm/llvm-project/commit/544e6c692aa79cc8d53a8a9db4d41fe4d9cb359b
Author: Jeff Bailey <jbailey at raspberryginger.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M libc/src/pthread/pthread_attr_getschedparam.cpp
M libc/src/pthread/pthread_attr_setschedparam.cpp
Log Message:
-----------
[libc] Add missing errno_macros.h include to pthread schedparam (#191235)
Both pthread_attr_getschedparam and pthread_attr_setschedparam use
ENOTSUP but relied on getting it transitively through <pthread.h>. Added
the explicit include so these files compile in standalone builds with
-nostdinc.
Commit: 0ec2f03c86f1275a4c733079f5cb20b10f51805e
https://github.com/llvm/llvm-project/commit/0ec2f03c86f1275a4c733079f5cb20b10f51805e
Author: Keith Smiley <keithbsmiley at gmail.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[bazel] Fix parse_headers in mlir package (#191094)
Commit: 202e607b6c8389583c748f1c99894d611b0bf369
https://github.com/llvm/llvm-project/commit/202e607b6c8389583c748f1c99894d611b0bf369
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M llvm/docs/DeveloperPolicy.rst
Log Message:
-----------
[DeveloperPolicy] Update information on commit authorship (#191220)
The sections on commit authorship have not been updated since the
transition to Github for PRs. This patch attempts to update them.
This is aimed at addressing questions recently raised in
https://discourse.llvm.org/t/attributing-a-commit-to-a-different-author/90490.
I guess this is technically a policy change, but does not change
anything *de facto* as far as I can tell.
---------
Co-authored-by: Petr Hosek <phosek at google.com>
Commit: 973a05ed91db4e74aa486749b3eacd459acb2e1e
https://github.com/llvm/llvm-project/commit/973a05ed91db4e74aa486749b3eacd459acb2e1e
Author: Philip Reames <preames at rivosinc.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVCodeGenPrepare.cpp
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-reduction-int-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-reduction-int.ll
Log Message:
-----------
[RISCV] Improve lowering of llvm.vector.reduce.mul (#190628)
RVV doesn't have a vredprod instruction, so we're forced to emulate
these.
The current ExpandReductions lowering which gets used trips an
unfortunate
behavior with exact VLEN - we end up with a bunch of vsetvli toggles
caused
by an interaction with lowerShuffleViaVRegSplitting. We end up doing all
the sub-m1 shuffles at m1, but don't recognize that we could do the
multiplies in m1 as well. As a result, we end up toggling back and forth
between LMULs.
This change is somewhat of a blunt hammer; it adjusts the lowering to
do the greater than m1 lowering via the current strategy, then do
a vector.extract, then do the same shuffler reduction lowering on
the smaller type. This has the effect of fixing the exact VLEN case,
and improves register pressure for all cases. The cost is that we end
up with an exact vsetvli to toggle to the m1 type before the sub-m1
portion of the reduction.
This helps all configurations, but particularly helps machines
with large VLENs as there are more reduction steps which can be
performed at m1.
An alternative design would be to try and reduce the LMUL of the
multiply steps, but we've generally shied away from that to date, so
this is side stepping that issue.
---------
Co-authored-by: Luke Lau <luke_lau at icloud.com>
Commit: 7d1ebd6baa1c2a9588ad5b07cebf1f6e8238e330
https://github.com/llvm/llvm-project/commit/7d1ebd6baa1c2a9588ad5b07cebf1f6e8238e330
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
M clang/lib/CIR/Dialect/Transforms/CIRCanonicalize.cpp
A clang/test/CIR/Transforms/canonicalize-cleanup-scope.cir
Log Message:
-----------
[CIR] Add canonicalizer for CleanupScopeOp (#191084)
This change adds a canonicalizer for CleanupScopeOp that erases any
cleanup scope with a trivial cleanup region, inlining the contents of
the body region into the block in place of the cleanup scope op. It also
erases any EH-only cleanup scope whose body region contains only a yield
operation, dropping the cleanup region contents even if they were not
trivial because the EH cleanup is not reachable in this case.
Assisted-by: Cursor / claude-4.6-opus-high
Commit: 6e2fdc37e4334344b6e22eb272279d95255d27c1
https://github.com/llvm/llvm-project/commit/6e2fdc37e4334344b6e22eb272279d95255d27c1
Author: Jack <jack.slingsby at imgtec.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M mlir/lib/Target/SPIRV/Deserialization/Deserializer.cpp
Log Message:
-----------
[mlir][spirv] Allow redefinition in OpName instructions (#191223)
The SPIR-V specification allows multiple conflicting OpName instructions
to redefine the name associated with a given `<id>`. Update the
deserializer to handle this case by using the last declared name.
Commit: 3af682ec02cc292606b74e9ccea188b11a84dfba
https://github.com/llvm/llvm-project/commit/3af682ec02cc292606b74e9ccea188b11a84dfba
Author: Kavin Gnanapandithan <kavin.balag at gmail.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M llvm/include/llvm/Transforms/InstCombine/InstCombiner.h
M llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp
M llvm/test/Transforms/InstCombine/fptrunc.ll
Log Message:
-----------
[InstCombine] Restore narrowing of double to float for integer casts (#190550)
Resolves #190503
This patch modifies `visitFPTrunc` to simplify the following expression:
```llvm
fptrunc(OpI (sitofp/uitofp x), (sitofp/uitofp y))
```
to
```llvm
OpI (sitofp/uitofp x), (sitofp/uitofp y)
```
`getMinimumFPType` now calls `canBeCastedExactlyIntToFP` on `x` and `y`.
This allows a double to be narrowed to a float if the source operands originate from sitofp/uitofp and can be represented exactly in the target float type.
This fixes a regression pointed out in the issue, where `visitFPExt` began folding `fpext(sitofp)` into `uitofp nneg i64 %x to double`, causing `visitFPTrunc` to lose the `fpext` it relied on to recognize the narrowing opportunity. On certain target, this would cause more expensive operations (i.e, division with f64 instead of f32).
Commit: afc0679414c32f457c271893603765d46beb63ef
https://github.com/llvm/llvm-project/commit/afc0679414c32f457c271893603765d46beb63ef
Author: Zhijie Wang <yesterda9 at gmail.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M clang/include/clang/Analysis/Analyses/LifetimeSafety/Facts.h
M clang/include/clang/Analysis/Analyses/LifetimeSafety/Origins.h
M clang/lib/Analysis/LifetimeSafety/FactsGenerator.cpp
M clang/lib/Analysis/LifetimeSafety/Origins.cpp
M clang/test/Sema/warn-lifetime-safety-invalidations.cpp
M clang/test/Sema/warn-lifetime-safety.cpp
Log Message:
-----------
[LifetimeSafety] Detect use of a reference type as a use of underlying origin (#184295)
Writing through a reference (e.g., `ref = 10`) does not rebind the
reference, so it should not kill the liveness of its underlying origin.
Fixes #180187
Commit: 29f6c3b888970aeb336737011813fcafdd24fde8
https://github.com/llvm/llvm-project/commit/29f6c3b888970aeb336737011813fcafdd24fde8
Author: Dmitry Vasilyev <dvassiliev at accesssoftek.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M lldb/test/API/functionalities/scripted_frame_provider/thread_filter/TestFrameProviderThreadFilter.py
Log Message:
-----------
[lldb] Disable flaky TestFrameProviderThreadFilter on Windows (#191224)
See #191222 for details.
Commit: d39f23a062af923dc3066a0a067b346c4acf6117
https://github.com/llvm/llvm-project/commit/d39f23a062af923dc3066a0a067b346c4acf6117
Author: Alexander Yermolovich <ayermolovich at nvidia.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M llvm/include/llvm/CodeGen/AsmPrinter.h
M llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp
M llvm/lib/Target/NVPTX/NVPTXAsmPrinter.h
M llvm/lib/Target/NVPTX/NVPTXDwarfDebug.cpp
M llvm/lib/Target/NVPTX/NVPTXDwarfDebug.h
A llvm/test/CodeGen/NVPTX/inline-asm-line-info-inlined-at.ll
A llvm/test/CodeGen/NVPTX/inline-asm-line-info-per-instruction.ll
A llvm/test/CodeGen/NVPTX/inline-asm-line-number-before.ll
Log Message:
-----------
[PTX][Debug] Add .loc directives to inlined PTX. (#177718)
This PR adds .loc directives to the inlined PTX as it gets emitted into
PTX file.
This allows PTXAS to create .debug_line with with entries for those
instructions, and helps profiler attribute perf counters to source code.
Commit: ff37b607175f8d827088a847c8b564bf606b4c28
https://github.com/llvm/llvm-project/commit/ff37b607175f8d827088a847c8b564bf606b4c28
Author: Bastian Hagedorn <bhagedorn at nvidia.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
M mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp
M mlir/test/python/dialects/nvvm.py
Log Message:
-----------
[mlir][NVVM] Add InferTypeOpInterface to sync and ldmatrix ops (#188238)
Add InferTypeOpAdaptor to 5 NVVM ops with deterministic result types:
- VoteSyncOp: ballot -> i32, any/all/uni -> i1
- MatchSyncOp: any -> i32, all -> struct<(i32, i1)>
- ShflOp: result matches val type, or struct<(val_type, i1)> with
return_value_and_is_valid
- LdMatrixOp: i32 or struct of i32s based on num and shape
- ClusterLaunchControlQueryCancelOp: is_canceled -> i1, others -> i32
Note: this is a source-breaking change for Python callers that pass
result types positionally.
Co-authored-by: Claude <noreply at anthropic.com>
Commit: ea8f2aeac3e7cf0c29749c4747760a3c73d3c2f8
https://github.com/llvm/llvm-project/commit/ea8f2aeac3e7cf0c29749c4747760a3c73d3c2f8
Author: Valeriy Savchenko <vsavchenko at apple.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp
M llvm/lib/Transforms/InstCombine/InstCombineInternal.h
M llvm/test/Transforms/InstCombine/fpcast.ll
Log Message:
-----------
[InstCombine] Fold saturating fptoi roundtrip (#190952)
Generalize existing fold to saturating intrinsics.
Commit: 8e804dca50049a4ed192a733e8f95e05d5ddcfdf
https://github.com/llvm/llvm-project/commit/8e804dca50049a4ed192a733e8f95e05d5ddcfdf
Author: Erick Velez <erickvelez7 at gmail.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M clang-tools-extra/clang-doc/JSONGenerator.cpp
Log Message:
-----------
[clang-doc][NFC] Delete redundant lines in JSONGenerator (#191011)
During the merging for the Mustache MD backend, I forgot to delete the
earlier, obsolete serialization for namespaces. It's being overwritten
by the correct call later. Also deletes a duplicate typedef.
Commit: 1542114a1aea30b6fd7167ddd51f54c99882b309
https://github.com/llvm/llvm-project/commit/1542114a1aea30b6fd7167ddd51f54c99882b309
Author: Alexis Engelke <engelke at in.tum.de>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M llvm/include/llvm/ADT/SmallVector.h
M llvm/include/llvm/IR/Metadata.h
M llvm/include/llvm/SandboxIR/User.h
M llvm/unittests/ADT/SmallVectorTest.cpp
Log Message:
-----------
[ADT] Fix SmallVector append with input iterators (#191030)
append()/assign()/insert() iterate over the iterator twice -- once to
get the length and once to actually append the content. This is only
permitted with forward iterators, not input iterators.
For append()/assign(), implement a version that uses emplace_back() in
a loop. insert() at the end is append(); for insert() in the middle,
append() elements first and then rotate them into their correct
position.
Originally introduced in https://reviews.llvm.org/D33919.
Commit: 1353f7cd548d3534c1e1fd4265bc030209bb4dd2
https://github.com/llvm/llvm-project/commit/1353f7cd548d3534c1e1fd4265bc030209bb4dd2
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M llvm/lib/Transforms/Utils/InlineFunction.cpp
A llvm/test/Transforms/Inline/inline-history-invoke.ll
Log Message:
-----------
[Inliner] Fix dangling pointer in OriginallyIndirectCalls. (#191242)
changeToInvokeAndSplitBasicBlock replaces an exising call instruction
with an invoke instruction. This leaves a dangling pointer in
OriginallyIndirectCalls. This means we miss !inline_history metadata on
the invokes replacing the direct calls.
It also cause non-determinism, where the inliner adds !inline_history
entries to unrelated call instructions, if we happen to re-allocate a
new call at the same address as a dangling pointer in the set.
PR: https://github.com/llvm/llvm-project/pull/191242
Commit: 4fb9443d63494f8388c801d5decaadd7f0779ad8
https://github.com/llvm/llvm-project/commit/4fb9443d63494f8388c801d5decaadd7f0779ad8
Author: Delaram Talaashrafi <dtalaashrafi at nvidia.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M flang/lib/Semantics/check-acc-structure.cpp
M flang/lib/Semantics/check-acc-structure.h
A flang/test/Semantics/OpenACC/acc-loop-routine-call.f90
Log Message:
-----------
[flang][OpenACC] Diagnose illegal routine calls in parallel loops (#190068)
Add routine call checking to `AccStructureChecker` to reject OpenACC
routine calls whose parallel level is incompatible with the enclosing
loop directive (e.g., calling a worker‑level routine from a
vector‑parallel loop), as required by the OpenACC specification.
Commit: 1465fdc0a9a1ff30e8f5b3dbbd22bd3aed7b236f
https://github.com/llvm/llvm-project/commit/1465fdc0a9a1ff30e8f5b3dbbd22bd3aed7b236f
Author: Aviral Goel <aviralg at users.noreply.github.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M clang/include/clang/ScalableStaticAnalysisFramework/Tool/Utils.h
M clang/lib/ScalableStaticAnalysisFramework/Tool/Utils.cpp
M clang/test/Analysis/Scalable/ssaf-linker/help.test
M clang/test/Analysis/Scalable/ssaf-linker/io.test
M clang/test/Analysis/Scalable/ssaf-linker/validation-errors-permissions.test
M clang/test/Analysis/Scalable/ssaf-linker/validation-errors.test
M clang/tools/clang-ssaf-format/SSAFFormat.cpp
M clang/tools/clang-ssaf-linker/SSAFLinker.cpp
Log Message:
-----------
[clang][ssaf] Refactor path validation into shared `FormatFile` utilities (#188847)
This patch introduces the following changes:
- Renames `SummaryFile` to `FormatFile` to better reflect that the
struct pairs a file path with its resolved `SerializationFormat`.
- Consolidates duplicated input/output path validation logic from
`SSAFLinker.cpp` and `SSAFFormat.cpp` into shared
`FormatFile::fromInputPath()` and `FormatFile::fromOutputPath()` methods
in `Tool/Utils.{h,cpp}`
- Moves error message constants from the public header into the `.cpp`
file and rewords them.
- Removes per-tool local error messages and filesystem logic that are
now handled centrally.
- Updates all affected lit tests to match the new error message wording
and adds a test for directory-as-input.
Commit: 05696d6cb7eb8bc6778685e25bd8d74b020ffcc7
https://github.com/llvm/llvm-project/commit/05696d6cb7eb8bc6778685e25bd8d74b020ffcc7
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M flang-rt/lib/cuda/allocator.cpp
Log Message:
-----------
[flang][cuda] Add error check for allocator using CUDA API (#191262)
Commit: 806433f128aa83cb9112741b52ec37cbf796e7ba
https://github.com/llvm/llvm-project/commit/806433f128aa83cb9112741b52ec37cbf796e7ba
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M flang-rt/include/flang-rt/runtime/environment.h
M flang-rt/lib/cuda/kernel.cpp
M flang-rt/lib/runtime/environment.cpp
Log Message:
-----------
[flang][cuda] Add conditional error check after kernel launch (#191270)
Commit: 0340cd765df44b5d899efb0b28c2ea8fdff321bd
https://github.com/llvm/llvm-project/commit/0340cd765df44b5d899efb0b28c2ea8fdff321bd
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
A llvm/test/Transforms/LoopVectorize/nested-outer-loop-vect.ll
Log Message:
-----------
[LV] Add test with outer loop test nested inside another loop (NFC). (#191267)
Add missing test coverage for the VPlan-native path, where we have a
loop nest nested inside another loop. This guards against regressions in
the future.
Commit: 012f8200734a6d7651682c0aa41bbdf3bad9e951
https://github.com/llvm/llvm-project/commit/012f8200734a6d7651682c0aa41bbdf3bad9e951
Author: Jeff Bailey <jbailey at raspberryginger.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M libc/hdr/stdint_proxy.h
Log Message:
-----------
Revert "[libc] Add LIBC_FULL_BUILD guard to stdint_proxy.h (#191234)" (#191273)
This reverts commit 63c64fa6cd451557c7554593c1908e34e668aa89.
Commit: b742ec91c0876fc5f9fb85aceecb67c22021b69d
https://github.com/llvm/llvm-project/commit/b742ec91c0876fc5f9fb85aceecb67c22021b69d
Author: Christopher Ferris <cferris1000 at users.noreply.github.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M compiler-rt/lib/scudo/standalone/wrappers_c.cpp
M compiler-rt/lib/scudo/standalone/wrappers_c.h
R compiler-rt/lib/scudo/standalone/wrappers_c.inc
R compiler-rt/lib/scudo/standalone/wrappers_c_bionic.cpp
M compiler-rt/lib/scudo/standalone/wrappers_cpp.cpp
Log Message:
-----------
[scudo] Refactor the wrapper code into a single file. (#190857)
Allow using a define to create a prefix rather than trying to use
android/bionic checks.
Commit: 8cd0fb68a17e52bc2f31a835502863810c2ff7c0
https://github.com/llvm/llvm-project/commit/8cd0fb68a17e52bc2f31a835502863810c2ff7c0
Author: Keith Smiley <keithbsmiley at gmail.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M utils/bazel/MODULE.bazel
M utils/bazel/MODULE.bazel.lock
M utils/bazel/extensions.bzl
R utils/bazel/third_party_build/pybind.BUILD
Log Message:
-----------
[bazel] Remove pybind dep (#191269)
This is entirely gone from llvm code
Commit: df45fbb04445bfb19939df7c037412efc9dc8efe
https://github.com/llvm/llvm-project/commit/df45fbb04445bfb19939df7c037412efc9dc8efe
Author: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
M llvm/test/CodeGen/AMDGPU/bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.cos.bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.sin.bf16.ll
M llvm/test/CodeGen/AMDGPU/mad-mix-hi-bf16.ll
M llvm/test/CodeGen/AMDGPU/mad-mix-lo-bf16.ll
Log Message:
-----------
[AMDGPU] Fix V_FMA_MIX_BF16 selection in true16 (#191272)
Commit: a0f0d6342e0cd75b7f41e0e6aae0944393b68a62
https://github.com/llvm/llvm-project/commit/a0f0d6342e0cd75b7f41e0e6aae0944393b68a62
Author: Slava Zakharin <szakharin at nvidia.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
A flang/test/Transforms/licm-nested-hoist-aggressive.fir
A flang/test/Transforms/licm-nested-hoist-disabled.fir
Log Message:
-----------
[flang] Added more tests for Flang LICM. (#191083)
Commit: f3d93f56e0492ea9dbd1e0f1591796b48a99b9e1
https://github.com/llvm/llvm-project/commit/f3d93f56e0492ea9dbd1e0f1591796b48a99b9e1
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
Log Message:
-----------
[LV] Don't access loop after executePlan in native path (NFC). (#191277)
Bring native path in line with inner loop path: the loop may become
invalid once we are able to remove the scalar loop in the native path as
well. Match inner loop behavior by reporting vectorization before
executePlan, and using F instead of L->getHeader()->getParent().
Commit: cfda886fffafa73e6e9130eb6d42d599b1606110
https://github.com/llvm/llvm-project/commit/cfda886fffafa73e6e9130eb6d42d599b1606110
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M llvm/lib/Target/X86/X86MCInstLower.cpp
M llvm/test/CodeGen/X86/srem-seteq-vec-nonsplat.ll
M llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/x86-non-temporal.ll.filter-out.expected
M llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/x86-non-temporal.ll.multifilter.expected
M llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/x86-non-temporal.ll.nofilter.expected
Log Message:
-----------
[X86] Add constant pool comments for PADDB/W/D/Q. (#191279)
Split from #190274
Commit: 2379e91c2d6af1fd892c0aece9bb8b1279ada8ff
https://github.com/llvm/llvm-project/commit/2379e91c2d6af1fd892c0aece9bb8b1279ada8ff
Author: Kartik Ohlan <kartik7ohlan at gmail.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M clang/docs/LanguageExtensions.rst
M clang/docs/ReleaseNotes.rst
M clang/lib/CodeGen/CGExpr.cpp
A clang/test/CodeGen/ext-vector-bool-read.cpp
Log Message:
-----------
[Clang] Fix assertion failure when storing to ext_vector_type bool elements (#189305)
#189260
Fix assertion failure in boolean vector indexing by truncating to i1.
Commit: 63b4f032e2af53bb7723b291bc922d72b99c7747
https://github.com/llvm/llvm-project/commit/63b4f032e2af53bb7723b291bc922d72b99c7747
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
A libcxx/test/libcxx/containers/associative/lookup_with_transparently_comparable.pass.cpp
Log Message:
-----------
[libc++] Add positive test coverage for the string optimization on associative containers (#187345)
Unfortunately, this test needs to be somewhat tied to the fact that we
implement the optimization for std::string, but in practice it would
have caught the issue that the optimization was previously disabled, so
it does provide value.
Towards #187105
Commit: 2717cc2234c898556cb38809cc599ea2108b163a
https://github.com/llvm/llvm-project/commit/2717cc2234c898556cb38809cc599ea2108b163a
Author: Karthik Senthil <ksenthilkuma at nvidia.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp
M llvm/lib/Target/NVPTX/NVPTXAsmPrinter.h
A llvm/test/CodeGen/NVPTX/sub-byte-constant-vector-convert.ll
A llvm/test/CodeGen/NVPTX/sub-byte-constant-vectors-i4-i2.ll
Log Message:
-----------
[NVPTX] Merge consecutive elements while buffering constant vectors with sub-byte datatype. (#183628)
NVPTXAsmPrinter currently buffers one element at a time while generating
PTX for constant global vectors. This causes an assertion when dealing
with sub-byte datatype (like i4) since we allocate lesser buffer size.
This PR fixes the printer to merge consecutive elements to form a full
byte before buffering.
Commit: 31060029a626a8fa5b1363b72f61c04f31a1c7a9
https://github.com/llvm/llvm-project/commit/31060029a626a8fa5b1363b72f61c04f31a1c7a9
Author: Derek Schuff <dschuff at chromium.org>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M llvm/include/llvm/DebugInfo/Symbolize/SymbolizableObjectFile.h
M llvm/lib/DebugInfo/Symbolize/SymbolizableObjectFile.cpp
A llvm/test/tools/llvm-objdump/lit.local.cfg
A llvm/test/tools/llvm-objdump/wasm/line-numbers.s
A llvm/test/tools/llvm-symbolizer/lit.local.cfg
M llvm/test/tools/llvm-symbolizer/wasm-basic.s
Log Message:
-----------
SymbolizableOjbectFile: Convert Wasm file offset to section offset for DWARF (#191068)
Wasm's object and linking format lacks virtual addresses like ELF et al.
As a result, linked files generally use file offsets as "addresses",
whereas
objects and DWARF sections use code section offsets.
This has led to incorrect interpretation of addresses in llvm-objdump
and llvm-symbolizer for linked files.
This change to SerializableObjectFile checks the input ModuleOffset, and
if it falls within a wasm code section, adjusts it to a section offset
before querying the DwarfContext. (For object files, Sec.getAddress() is
0 so it works for object files too). It extends the existing DWARF test
for llvm-symbolizer to include a linked file, and also adds an
equivalent for objdump.
Fixes #129523
Commit: 7a186da65b3754509bff2d7bafcc28a095279320
https://github.com/llvm/llvm-project/commit/7a186da65b3754509bff2d7bafcc28a095279320
Author: zGoldthorpe <Zach.Goldthorpe at amd.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M llvm/include/llvm/CodeGen/SelectionDAG.h
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/fminimum-fmaximum.ll
M llvm/test/CodeGen/X86/nofpclass.ll
Log Message:
-----------
[SelectionDAG] Replace `isKnownNeverZeroFloat` with `isKnownNeverLogicalZero` using `KnownFPClass` (#190621)
In so doing, this also corrects miscompiles caused by
`isKnownNeverZeroFloat` mishandling denormals in DAZ floats.
Commit: 691a130e0f14459d9358a71ffd52a01295e6200a
https://github.com/llvm/llvm-project/commit/691a130e0f14459d9358a71ffd52a01295e6200a
Author: Alexis Engelke <engelke at in.tum.de>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M clang/include/clang/Analysis/Analyses/PostOrderCFGView.h
M clang/lib/Analysis/PostOrderCFGView.cpp
M llvm/include/llvm/ADT/PostOrderIterator.h
M llvm/include/llvm/Analysis/LoopIterator.h
M llvm/lib/Analysis/LoopInfo.cpp
M llvm/lib/CodeGen/MachineTraceMetrics.cpp
M llvm/lib/Target/SPIRV/SPIRVUtils.h
M llvm/lib/Transforms/Vectorize/VPlanCFG.h
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanUtils.h
M llvm/unittests/ADT/PostOrderIteratorTest.cpp
M llvm/unittests/Transforms/Vectorize/VPlanTest.cpp
M mlir/include/mlir/IR/Iterators.h
Log Message:
-----------
[ADT] Refactor post order traversal (#191047)
Currently, po_iterator holds the traversal state. This makes copying
and moving po_iterator fairly expensive and the code cannot be optimized
away in several cases (most of it isn't even inlined in a default
build).
Therefore, refactor post-order traversal to hold the state in a wrapper
class with cheap iterators. Additionally, replace po_storage base class
with a CRTP implementation where users can provide their own storage.
Benefits:
- Performance in stage2-O3 improves by 0.19% instructions:u and even
more substantially in cycles/wall-time.
- Users that use a custom storage/iteration limitation can do so in a
more clean way by subclassing PostIteratorTraversalBase. See e.g.
LoopBlocksTraversal.
- For graphs with block numbers, reserving can now be implemented
reasonably easy (not done yet).
Implications:
- PostOrderTraversal::iterator is no longer a forward iterator. This
property was never really used, though.
- PostOrderTraversal must be live while iterators are live. For typical
uses (for (X x : post_order(...))), this is no problem, but could end
up being problematic if the iterator is wrapped (e.g.
for (X x : make_filter_range(post_order(...), ...)) -- problematic,
because make_filter_range doesn't preserve the range but only the two
iterators, which become invalid as the for loop is entered). This is a
limitation of the way LLVM implements ranges.
Commit: e8e8552692eaf16c445f02388412b7f088d72f11
https://github.com/llvm/llvm-project/commit/e8e8552692eaf16c445f02388412b7f088d72f11
Author: Alexis Engelke <engelke at in.tum.de>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M llvm/include/llvm/Analysis/BlockFrequencyInfoImpl.h
M llvm/include/llvm/Analysis/BranchProbabilityInfo.h
M llvm/include/llvm/CodeGen/MachineBranchProbabilityInfo.h
M llvm/lib/Analysis/BranchProbabilityInfo.cpp
M llvm/lib/CodeGen/MIRSampleProfile.cpp
M llvm/lib/CodeGen/MachineBranchProbabilityInfo.cpp
Log Message:
-----------
[Analysis][NFC] Remove BPI::getEdgeProbability(iterator) (#191286)
Now that successor iterators are Use iterators, it is no longer cheap to
get the successor index. Replace uses with the variant that takes the
successor index, which in all cases is easily available.
This is primarily cleanup after the somewhat recent successor changes.
There's also a minor (barely measurable) performance improvement here.
Commit: 4a5e9fa731bf664b26fe975df073e9b456d30d49
https://github.com/llvm/llvm-project/commit/4a5e9fa731bf664b26fe975df073e9b456d30d49
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/test/CodeGen/RISCV/rv32p.ll
M llvm/test/CodeGen/RISCV/rv64p.ll
Log Message:
-----------
[RISCV][P-ext] Recognize (select (X >u ((1 << C) - 1), sext(X >s -1), trunc(X)) as usati (#190810)
Where the result is a type with C bits. The unsigned compare on the
select treats negative values as large positive values so any value
that isn't in the range [0, (1 << C) - 1] will use the True operand
of the select. The sext(X >s -1) creates all ones for positive values
of X and 0 for negative values of X.
This pattern appears in the picojpeg workload of embench-iot with
an i8 result type.
Assisted-by: Claude Sonnet 4.5
Commit: e38801b1318a1adeb6cc5a185c519af9bc215f86
https://github.com/llvm/llvm-project/commit/e38801b1318a1adeb6cc5a185c519af9bc215f86
Author: Naveen Seth Hanig <naveen.hanig at outlook.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M clang/lib/Driver/ModulesDriver.cpp
A clang/test/Driver/modules-driver-clang-modules-only.cpp
M clang/test/Driver/modules-driver-manifest-input-args.cpp
Log Message:
-----------
Reapply "[clang][ModulesDriver] Add support for Clang modules to -fmodules-driver" (#191258)
This relands #187606 (reverted with #191122).
In the initial PR, the Clang module precompile jobs were created as
`CC1Command` objects instead of regular `Command` objects, which
introduced a memory leak.
(See discussion in https://reviews.llvm.org/D74447)
This has been fixed in this reland.
Commit: 92d3a1d3e4aaaf3df6d5f3d6613a8146aab7d7d6
https://github.com/llvm/llvm-project/commit/92d3a1d3e4aaaf3df6d5f3d6613a8146aab7d7d6
Author: Ryan Buchner <rbuchner at qti.qualcomm.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
A llvm/test/Transforms/SLPVectorizer/RISCV/revec-strided-load.ll
Log Message:
-----------
[NFC][SLP] Add tests for revectorization of strided loads (#191293)
Demonstrates bug in SLP when handling re-vectorization, see #191292
Commit: 67ff7695616f8411abc538c634e14a0aa7141dc3
https://github.com/llvm/llvm-project/commit/67ff7695616f8411abc538c634e14a0aa7141dc3
Author: Michael Spencer <bigcheesegs at gmail.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M clang/include/clang/Basic/DiagnosticLexKinds.td
M clang/include/clang/Lex/HeaderSearch.h
M clang/lib/Lex/HeaderSearch.cpp
M clang/lib/Lex/ModuleMap.cpp
A clang/test/Modules/symlink-to-modular-header.c
Log Message:
-----------
[clang][modules] Add warning for symlinks to modular headers (#188059)
Symlinks that are not covered by a module that point to a header owned
by a module create situations where if a header is owned by a module
depends on which headers were included prior.
This adds a diagnostic for such cases when they can be detected, and
informs the user to use a textual forwarding header instead.
This bypasses Clang's FileManager and VFS as they don't know about
symlinks. The diagnostic is worded as "may" because of this.
Commit: 5f27de8c4d895f2128f7ca5ce788d997fd3ea99c
https://github.com/llvm/llvm-project/commit/5f27de8c4d895f2128f7ca5ce788d997fd3ea99c
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenDecl.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.cpp
M clang/lib/CIR/Dialect/Transforms/LoweringPrepare.cpp
M clang/test/CIR/CodeGen/partial-array-cleanup.cpp
Log Message:
-----------
[CIR] Implement variable size array cleanup (#191247)
This implements partial array destruction for variable sized arrays. The
cir.array.dtor operation already had support for variable length, so
this change only needs to add the variable handling in
`emitArrayDestroy` and `emitArrayLength`.
Assisted-by: Cursor / claude-4.6-opus-high
Commit: fda567137ec611fdcce24729118b4f56bec6bb13
https://github.com/llvm/llvm-project/commit/fda567137ec611fdcce24729118b4f56bec6bb13
Author: Artem Belevich <tra at google.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M llvm/docs/CompileCudaWithLLVM.rst
Log Message:
-----------
[Docs, CUDA] Update cuda compilation docs (#191271)
Commit: e30031890127985c6b2d25705b9467d1812f7f87
https://github.com/llvm/llvm-project/commit/e30031890127985c6b2d25705b9467d1812f7f87
Author: Lang Hames <lhames at gmail.com>
Date: 2026-04-10 (Fri, 10 Apr 2026)
Changed paths:
M orc-rt/include/orc-rt/Session.h
M orc-rt/unittests/SessionTest.cpp
Log Message:
-----------
[orc-rt] Add Session::attach convenience overload. (#191199)
This overload enables one-line attach in the common case where the
ControllerAccess implementation does not require any configuration after
construction.
Commit: 10353899af5d07aeca022e6b02ed700e85461f5e
https://github.com/llvm/llvm-project/commit/10353899af5d07aeca022e6b02ed700e85461f5e
Author: Amir Ayupov <aaupov at fb.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M bolt/lib/Profile/CMakeLists.txt
M bolt/lib/Profile/DataAggregator.cpp
A bolt/test/X86/pre-aggregated-perf-shlib.test
Log Message:
-----------
[BOLT] Use identify_magic for shared library detection (#190902)
Replace the fragile filename-based check (ends_with(".so")) with
identify_magic()/file_magic::elf_shared_object to reliably detect
shared libraries when filtering pre-aggregated profile data by
build ID.
Test Plan: pre-aggregated-perf-shlib.test
Commit: 80ae4e503d60e9f15383603214de5c7cb8b9b0ea
https://github.com/llvm/llvm-project/commit/80ae4e503d60e9f15383603214de5c7cb8b9b0ea
Author: Amir Ayupov <aaupov at fb.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M llvm/tools/llvm-profgen/ProfiledBinary.cpp
M llvm/tools/llvm-profgen/ProfiledBinary.h
Log Message:
-----------
[llvm-profgen] Read build ID from binary for perfscript address filtering (#190862)
For shared libraries (.so), read the binary's build ID during load()
using object::getBuildID() and store it as FilterBuildID. Main
executables keep FilterBuildID empty, matching the convention that
their perfscript addresses have no buildid prefix.
This enables automatic build ID-based filtering of perfscript
addresses in [buildid:]0xaddr format without requiring a CLI option.
Commit: eb6075e3be0a40301f008b0b3640ed125b66929f
https://github.com/llvm/llvm-project/commit/eb6075e3be0a40301f008b0b3640ed125b66929f
Author: Pengxiang Huang <71998072+Pengxiang-Huang at users.noreply.github.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M libc/src/CMakeLists.txt
A libc/src/semaphore/CMakeLists.txt
A libc/src/semaphore/posix_semaphore.h
M libc/test/src/CMakeLists.txt
A libc/test/src/semaphore/CMakeLists.txt
A libc/test/src/semaphore/semaphore_test.cpp
Log Message:
-----------
[libc][semaphore] Add internal unnamed semaphore implementation (#190851)
Implements the first part for #190847
Add internal unnamed semaphore lifetime support, particularly:
`sem_init`:
https://pubs.opengroup.org/onlinepubs/9799919799/functions/sem_init.html#
`sem_destroy`:
https://pubs.opengroup.org/onlinepubs/9799919799/functions/sem_destroy.html#
`sem_getvalue`:
https://pubs.opengroup.org/onlinepubs/9799919799/functions/sem_getvalue.html#
Commit: 23cb39afd5cd5006b9b7d036ffc668fdf9aa0410
https://github.com/llvm/llvm-project/commit/23cb39afd5cd5006b9b7d036ffc668fdf9aa0410
Author: Keith Smiley <keithbsmiley at gmail.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/llvm/unittests/BUILD.bazel
Log Message:
-----------
[bazel] Remove unused deps from llvm/unittests (#191237)
I'm testing out dwyu, this is a first pass on removing some of the
things it has found
Commit: f7fb8f46f7291c81695feae030c7f6e398bd11d1
https://github.com/llvm/llvm-project/commit/f7fb8f46f7291c81695feae030c7f6e398bd11d1
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoP.td
M llvm/test/CodeGen/RISCV/rv32p.ll
M llvm/test/CodeGen/RISCV/rv64p.ll
Log Message:
-----------
[RISCV][P-ext] Add mul*.h00 and mul*.w00 patterns. (#191313)
The instructions take the low halfword/word from each input, extends
them and multiplies to produce a word/dword result.
We can use these instead of plain MUL if it would allow us to avoid
a sext/zext for at least one of the operands.
Tests were written by Claude Sonnet 4.5.
Commit: 5531990872d464f5644c58e0a90a47eb7d1ae575
https://github.com/llvm/llvm-project/commit/5531990872d464f5644c58e0a90a47eb7d1ae575
Author: Amir Ayupov <aaupov at fb.com>
Date: 2026-04-10 (Fri, 10 Apr 2026)
Changed paths:
M llvm/tools/llvm-profgen/CMakeLists.txt
Log Message:
-----------
[llvm-profgen] Link with BinaryFormat for #190862 (#191324)
Commit: e03817ff4e16ab06fe0b38eec9b7ff31fc09f446
https://github.com/llvm/llvm-project/commit/e03817ff4e16ab06fe0b38eec9b7ff31fc09f446
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2026-04-10 (Fri, 10 Apr 2026)
Changed paths:
M llvm/unittests/Support/ErrorTest.cpp
Log Message:
-----------
[LLVM][Support] Fix leak in ErrorTest.cpp (#191326)
The leak is from #188718
Commit: 47678c6e02b31e69473f35749e6e7bd3460ce620
https://github.com/llvm/llvm-project/commit/47678c6e02b31e69473f35749e6e7bd3460ce620
Author: Dan Liew <dan at su-root.co.uk>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
R clang/test/CodeGen/X86/pr190962.ll
M llvm/lib/Target/X86/X86FastISel.cpp
M llvm/lib/Target/X86/X86InstrInfo.cpp
M llvm/lib/Target/X86/X86InstrInfo.h
Log Message:
-----------
Revert "[X86][APX] Add copy instruction to LiveInterval of SrcReg (#191102) (#191330)
This reverts commit 16f02c0940d6ee783c38ca27b44fc158d77e7567.
This caused a bot failure when building with expensive checks.
https://ci.swift.org/job/llvm.org/job/clang-stage1-RA-expensive/job/main/409/testReport/junit/Clang/CodeGen_X86/pr190962_ll/
The test case included in the original commit fails with:
```
| *** Bad machine code: Two-address instruction operands must be identical ***
| - function: foo
| - basic block: %bb.0 (0x7fc688853c40) [0B;192B)
| - instruction: 128B %10:gr64 = IMUL64rm %33:gr64(tied-def 0), %fixed-stack.1, 1, $noreg, 0, $noreg, implicit-def dead $eflags :: (load (s64) from %fixed-stack.1, align 16)
| - operand 1: %33:gr64(tied-def 0)
| fatal error: error in backend: Found 1 machine code errors.
```
Conflicts:
clang/test/CodeGen/X86/pr190962.ll
Commit: 25e64fd825cc58e8e55db9b5ac1f39f2d757ca16
https://github.com/llvm/llvm-project/commit/25e64fd825cc58e8e55db9b5ac1f39f2d757ca16
Author: Demetrius Kanios <demetrius at kanios.net>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M llvm/lib/Target/WebAssembly/GISel/WebAssemblyInstructionSelector.cpp
M llvm/lib/Target/WebAssembly/GISel/WebAssemblyLegalizerInfo.cpp
M llvm/lib/Target/WebAssembly/GISel/WebAssemblyLegalizerInfo.h
M llvm/lib/Target/WebAssembly/GISel/WebAssemblyRegisterBankInfo.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyRegisterInfo.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyRegisterInfo.h
R llvm/test/CodeGen/WebAssembly/GlobalISel/instruction-select/bitwise.mir
R llvm/test/CodeGen/WebAssembly/GlobalISel/instruction-select/int-arithmetic.mir
A llvm/test/CodeGen/WebAssembly/GlobalISel/instructions/add.ll
A llvm/test/CodeGen/WebAssembly/GlobalISel/instructions/and.ll
A llvm/test/CodeGen/WebAssembly/GlobalISel/instructions/anyext.mir
A llvm/test/CodeGen/WebAssembly/GlobalISel/instructions/ashr.ll
A llvm/test/CodeGen/WebAssembly/GlobalISel/instructions/ashr.mir
A llvm/test/CodeGen/WebAssembly/GlobalISel/instructions/constant.ll
A llvm/test/CodeGen/WebAssembly/GlobalISel/instructions/ctlz.ll
A llvm/test/CodeGen/WebAssembly/GlobalISel/instructions/ctlz.mir
A llvm/test/CodeGen/WebAssembly/GlobalISel/instructions/ctpop.ll
A llvm/test/CodeGen/WebAssembly/GlobalISel/instructions/ctpop.mir
A llvm/test/CodeGen/WebAssembly/GlobalISel/instructions/cttz.ll
A llvm/test/CodeGen/WebAssembly/GlobalISel/instructions/cttz.mir
A llvm/test/CodeGen/WebAssembly/GlobalISel/instructions/fshl.ll
A llvm/test/CodeGen/WebAssembly/GlobalISel/instructions/fshl.mir
A llvm/test/CodeGen/WebAssembly/GlobalISel/instructions/fshr.ll
A llvm/test/CodeGen/WebAssembly/GlobalISel/instructions/fshr.mir
A llvm/test/CodeGen/WebAssembly/GlobalISel/instructions/implicit_def.mir
A llvm/test/CodeGen/WebAssembly/GlobalISel/instructions/lshr.ll
A llvm/test/CodeGen/WebAssembly/GlobalISel/instructions/lshr.mir
A llvm/test/CodeGen/WebAssembly/GlobalISel/instructions/mul.ll
A llvm/test/CodeGen/WebAssembly/GlobalISel/instructions/or.ll
A llvm/test/CodeGen/WebAssembly/GlobalISel/instructions/rotl.mir
A llvm/test/CodeGen/WebAssembly/GlobalISel/instructions/rotr.mir
A llvm/test/CodeGen/WebAssembly/GlobalISel/instructions/sdiv.ll
A llvm/test/CodeGen/WebAssembly/GlobalISel/instructions/sext.ll
A llvm/test/CodeGen/WebAssembly/GlobalISel/instructions/shl.ll
A llvm/test/CodeGen/WebAssembly/GlobalISel/instructions/shl.mir
A llvm/test/CodeGen/WebAssembly/GlobalISel/instructions/srem.ll
A llvm/test/CodeGen/WebAssembly/GlobalISel/instructions/sub.ll
A llvm/test/CodeGen/WebAssembly/GlobalISel/instructions/trunc.ll
A llvm/test/CodeGen/WebAssembly/GlobalISel/instructions/udiv.ll
A llvm/test/CodeGen/WebAssembly/GlobalISel/instructions/urem.ll
A llvm/test/CodeGen/WebAssembly/GlobalISel/instructions/xor.ll
A llvm/test/CodeGen/WebAssembly/GlobalISel/instructions/zext.ll
R llvm/test/CodeGen/WebAssembly/GlobalISel/legalizer/add.mir
R llvm/test/CodeGen/WebAssembly/GlobalISel/regbankselect/bitwise.mir
R llvm/test/CodeGen/WebAssembly/GlobalISel/regbankselect/int-arithmetic.mir
Log Message:
-----------
[WebAssembly][GlobalISel] Add legalization & selection of most integer ops (#190234)
Allows many ops/instructions working solely on integers to be fully
selected (legalize, regbankselect, isel).
Split from #157161
Commit: 8ed9a0418f8e5b0d7ef5bb153ed12bae59269ed7
https://github.com/llvm/llvm-project/commit/8ed9a0418f8e5b0d7ef5bb153ed12bae59269ed7
Author: Sang Ik Lee <sang.ik.lee at intel.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M mlir/test/Integration/Dialect/XeVM/GPU/gpu_printf.mlir
Log Message:
-----------
[MLIR][XeVM] Re-enable gpu.printf test. (#191056)
https://github.com/llvm/llvm-project/pull/188517 fixed regression.
Commit: 81fee9eeef6db8ebbfda2072fd93a057f174af90
https://github.com/llvm/llvm-project/commit/81fee9eeef6db8ebbfda2072fd93a057f174af90
Author: Sang Ik Lee <sang.ik.lee at intel.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M mlir/include/mlir/Dialect/XeGPU/uArch/IntelGpuXe2.h
Log Message:
-----------
[MLIR][XeGPU] Add uArch defintion for CRI - Crescent Island (#191024)
XeGPU lowering relies on uArch definition and lowering fails if a chip
does not have uArch definition entry.
Add preliminary uArch definition for CRI.
This is a place holder for now and current defintion is identical to
BMG.
Commit: 2c0102c150c05fe0ad4338ad08244c875c3314be
https://github.com/llvm/llvm-project/commit/2c0102c150c05fe0ad4338ad08244c875c3314be
Author: Med Ismail Bennani <ismail at bennani.ma>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M lldb/examples/python/templates/scripted_process.py
M lldb/test/API/functionalities/scripted_frame_provider/TestScriptedFrameProvider.py
M lldb/test/API/functionalities/scripted_frame_provider/test_frame_providers.py
M lldb/test/API/functionalities/scripted_process/TestScriptedProcess.py
Log Message:
-----------
[lldb] Fix ScriptedFrame thread member init assignment (#191297)
This patch fixes a typo in the `ScriptedFrame` base class initializer
where we used a thread id with `GetThreadByIndexID` instead of the
thread index.
This could lead to issues where derived classes wouldn't be initialized
properly, which could cause crashes down the line.
The patch addresses the issue by calling `GetThreadByID` with the thread
id.
rdar://174432881
Signed-off-by: Med Ismail Bennani <ismail at bennani.ma>
Commit: d458f34b6dbab9e5ad6ba8a34791e80eeaf5c3b1
https://github.com/llvm/llvm-project/commit/d458f34b6dbab9e5ad6ba8a34791e80eeaf5c3b1
Author: Victor Chernyakin <chernyakin.victor.j at outlook.com>
Date: 2026-04-10 (Fri, 10 Apr 2026)
Changed paths:
M clang-tools-extra/clang-tidy/bugprone/IncorrectEnableIfCheck.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/test/clang-tidy/checkers/bugprone/incorrect-enable-if.cpp
Log Message:
-----------
[clang-tidy] Fix `bugprone-incorrect-enable-if` inserting duplicate `typename` (#190899)
This PR resolves one of our FIXME's. Pre-C++20, this check turns
```cpp
typename std::enable_if<...>
```
into
```cpp
typename typename std::enable_if<...>::type
```
instead of
```cpp
typename std::enable_if<...>::type
```
Commit: 5706ee3d4d7d2cc50595ad080728c2c37ee95f26
https://github.com/llvm/llvm-project/commit/5706ee3d4d7d2cc50595ad080728c2c37ee95f26
Author: Haohai Wen <haohai.wen at intel.com>
Date: 2026-04-10 (Fri, 10 Apr 2026)
Changed paths:
M llvm/include/llvm/Object/BBAddrMap.h
A llvm/lib/Object/BBAddrMap.cpp
M llvm/lib/Object/CMakeLists.txt
M llvm/lib/Object/ELF.cpp
M llvm/lib/Object/ELFObjectFile.cpp
M llvm/test/tools/llvm-readobj/ELF/bb-addr-map-feature-warning.test
M llvm/test/tools/llvm-readobj/ELF/bb-addr-map-pgo-analysis-map.test
M llvm/test/tools/llvm-readobj/ELF/bb-addr-map-relocatable.test
M llvm/test/tools/llvm-readobj/ELF/bb-addr-map.test
M llvm/tools/llvm-readobj/ELFDumper.cpp
M llvm/unittests/Object/ELFObjectFileTest.cpp
Log Message:
-----------
[Object] Extract format-agnostic BBAddrMap decoder (#188435)
[Object] Extract format-agnostic BBAddrMap decoder
This is part of patches to port BBAddrMap to COFF.
Move format-agnostic BBAddrMap decode logic out of ELF.cpp into
BBAddrMap.cpp, and expose a shared decodeBBAddrMapPayload helper in
BBAddrMap.h.
Keep ELF-specific steps (section decompression and relocation
translation) in ELF.cpp, and delegate payload decoding to the
shared helper.
Error messages in the decoder are updated to use the generic
"BB address map" instead of the ELF-specific "SHT_LLVM_BB_ADDR_MAP"
since the decoder is now shared across object formats.
This refactor prepares follow-up work to let COFF and ELF share
the same BBAddrMap decoding logic.
Commit: f11fe5b1dccda3850cae5993d38eb0dfc3103621
https://github.com/llvm/llvm-project/commit/f11fe5b1dccda3850cae5993d38eb0dfc3103621
Author: Brandon <brandon.xin at outlook.com>
Date: 2026-04-10 (Fri, 10 Apr 2026)
Changed paths:
M clang-tools-extra/clangd/unittests/DiagnosticsTests.cpp
M clang/lib/Serialization/ASTReader.cpp
M clang/lib/Serialization/ASTWriter.cpp
A clang/test/PCH/Inputs/pragma-diag-push.h
A clang/test/PCH/pragma-diag-push-pop-across-pch.c
Log Message:
-----------
[clang][Serialization] Serialize DiagStateOnPushStack to fix pragma d… (#190420)
**Serialize DiagStateOnPushStack to fix pragma diagnostic push/pop
across PCH boundary**
`DiagStateOnPushStack` was not serialized in PCH files, causing `#pragma
clang diagnostic pop` to emit a spurious "no matching push" warning when
the corresponding push was in the preamble. This is because clangd
splits files into a preamble (compiled to PCH) and the main file body,
and the push/pop stack was lost during the PCH round-trip.
Serialize and deserialize DiagStateOnPushStack in
`WritePragmaDiagnosticMappings`/`ReadPragmaDiagnosticMappings` so that
unmatched pushes from a preamble are correctly restored.
Fixes https://github.com/clangd/clangd/issues/1167
Commit: af03f5e2196e9b0b29c09ba0242ad439c05b1110
https://github.com/llvm/llvm-project/commit/af03f5e2196e9b0b29c09ba0242ad439c05b1110
Author: Piyou Chen <piyou.chen at sifive.com>
Date: 2026-04-10 (Fri, 10 Apr 2026)
Changed paths:
M clang/lib/Basic/Targets/RISCV.h
M clang/test/CodeGen/RISCV/bitint.c
M clang/test/CodeGen/ext-int-cc.c
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
A llvm/test/CodeGen/RISCV/bitint-fp-conv-200.ll
M llvm/test/CodeGen/RISCV/fp128.ll
M llvm/test/CodeGen/RISCV/fpclamptosat.ll
Log Message:
-----------
Reland "[RISCV] Support RISCV BitInt larger than 128 (#175515)" (#190188)
Reverted due to https://github.com/llvm/llvm-project/issues/176637 and
be fixed after https://github.com/llvm/llvm-project/pull/178690.
---
https://github.com/llvm/llvm-project/commit/fa57074d146925a303263905af415cc78f58f353
constraint the RISCV BitInt with 128 bits.
It is due to fp <-> int convension will crash in backend.
(https://godbolt.org/z/9o1qr4rje)
This patch enable larger than 128 bits BitInt type by
setMaxLargeFPConvertBitWidthSupported(128).
Commit: b4388d8b21bfc16d90b32f9ea018607a8e5c924d
https://github.com/llvm/llvm-project/commit/b4388d8b21bfc16d90b32f9ea018607a8e5c924d
Author: Pavel Labath <pavel at labath.sk>
Date: 2026-04-10 (Fri, 10 Apr 2026)
Changed paths:
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/src/__support/OSUtil/linux/syscall_wrappers/CMakeLists.txt
A libc/src/__support/OSUtil/linux/syscall_wrappers/accept.h
M libc/src/sys/socket/CMakeLists.txt
A libc/src/sys/socket/accept.h
M libc/src/sys/socket/linux/CMakeLists.txt
A libc/src/sys/socket/linux/accept.cpp
M libc/test/src/sys/socket/linux/CMakeLists.txt
A libc/test/src/sys/socket/linux/connect_accept_test.cpp
R libc/test/src/sys/socket/linux/connect_test.cpp
Log Message:
-----------
[libc] Implement accept(2) on linux (#191203)
The implementation follows the same patterns as the other socket
functions (this was mostly done using AI).
I've extended the connect test to test accepting connections as well
(and renamed it accordingly).
Commit: 4d1c8c06bbaf0542b94763741b1340afbe4d8e44
https://github.com/llvm/llvm-project/commit/4d1c8c06bbaf0542b94763741b1340afbe4d8e44
Author: Pavel Labath <pavel at labath.sk>
Date: 2026-04-10 (Fri, 10 Apr 2026)
Changed paths:
M llvm/include/llvm/ObjectYAML/DWARFYAML.h
M llvm/lib/ObjectYAML/DWARFEmitter.cpp
M llvm/lib/ObjectYAML/DWARFYAML.cpp
A llvm/test/tools/yaml2obj/ELF/DWARF/debug-line-v5.yaml
Log Message:
-----------
[DWARFYAML] Begin DWARFv5 debug_line support (#191167)
This patch adds enough support to generate a correct basic v5 header
(llvm-dwarfdump complains it can't find DW_LNCT_path, but I wouldn't say
it's strictly required). Directory and file name counts use relatively
complex encodings, so I'm leaving those for separate patch(es). For now,
I'm hardcoding the relevant fields to zero.
Commit: 8401beb49c1ce84ad7314e31d1dde91fe86875ea
https://github.com/llvm/llvm-project/commit/8401beb49c1ce84ad7314e31d1dde91fe86875ea
Author: Chaitanya <Krishna.Sankisa at amd.com>
Date: 2026-04-10 (Fri, 10 Apr 2026)
Changed paths:
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
A clang/test/CIR/Lowering/address-space.cir
Log Message:
-----------
[CIR][Lowering] Handle address space cast in GlobalViewAttr lowering (#190197)
Upstreaming clangIR PR: https://github.com/llvm/clangir/pull/2099
This PR fixes the GlobalViewAttr LLVM lowering to use AddrSpaceCastOp
when the source and destination address spaces differ.
This fixes crashes when lowering globals referenced across address
spaces, such as AMDGPU globals in addrspace(1) referenced from
llvm.compiler.used arrays.
Commit: fe5d5b762ab3b92b18b56f413965abb81a459ac6
https://github.com/llvm/llvm-project/commit/fe5d5b762ab3b92b18b56f413965abb81a459ac6
Author: Shubham Sandeep Rastogi <Shubham.Rastogi at sony.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
A llvm/test/DebugInfo/X86/sdag-load-sext-trunc.ll
A llvm/test/DebugInfo/X86/sdag-load-sext.ll
A llvm/test/DebugInfo/X86/sdag-load-zext-multiple-args.ll
Log Message:
-----------
[SelectionDAG] Salvage debuginfo when combining load and z|s ext instrs. (#188544)
Reland 2b958b9ee24b8ea36dcc777b2d1bcfb66c4972b6
Salvage debuginfo when combining load and z|s ext instrs.
SelectionDAG uses the DAGCombiner to fold a load followed by a sext to a
load and sext instruction. For example, in x86 we will see that
```
%1 = load i32, ptr @GlobArr
#dbg_value(i32 %1, !43, !DIExpression(), !52)
%2 = sext i32 %1 to i64, !dbg !53
```
is converted to:
```
%0:gr64_nosp = MOVSX64rm32 $rip, 1, $noreg, @GlobArr, $noreg, debug-instr-number 1, debug-location !51
DBG_VALUE $noreg, $noreg, !"Idx", !DIExpression(), debug-location !52
```
The `DBG_VALUE` needs to be transferred correctly to the new combined
instruction, and it needs to be appended with a `DIExpression` which
contains a `DW_OP_LLVM_convert` expression, which correctly casts the
value in the virtual register to the correct size.
This patch fixes the above described problem.
The patch also accounts for multiple DW_OP_LLVM_arg's in a DIExpression
which had caused it to break tests on the sanitizer-x86_64-linux bot but
has now been fixed, with an added testcase called
selectionDAG-load-zext-multiple-args.ll which was reduced from the
broken test itself.
Commit: adb986a71c6e3a0c4c20e4fb9206e9167287508d
https://github.com/llvm/llvm-project/commit/adb986a71c6e3a0c4c20e4fb9206e9167287508d
Author: wangjue <wangjue.wangjue at alibaba-inc.com>
Date: 2026-04-10 (Fri, 10 Apr 2026)
Changed paths:
M bolt/lib/Passes/FixRISCVCallsPass.cpp
M bolt/lib/Target/RISCV/RISCVMCPlusBuilder.cpp
M bolt/test/RISCV/call-annotations.s
M bolt/test/RISCV/relax.s
Log Message:
-----------
[BOLT][RISCV] Fix the inaccurate profile data check (#189338)
Commit: b34901ccc88d5d387c8dadcc4ddf30b221bc43a8
https://github.com/llvm/llvm-project/commit/b34901ccc88d5d387c8dadcc4ddf30b221bc43a8
Author: Bastian Hagedorn <bhagedorn at nvidia.com>
Date: 2026-04-10 (Fri, 10 Apr 2026)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
M mlir/lib/Conversion/NVGPUToNVVM/NVGPUToNVVM.cpp
M mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp
M mlir/test/Dialect/LLVMIR/nvvm.mlir
M mlir/test/Target/LLVMIR/nvvm/mbar_arrive.mlir
M mlir/test/python/dialects/nvvm.py
Log Message:
-----------
[mlir][NVVM] Add InferTypeOpInterface to NVVM MBarrier ops with deterministic result types (#188173)
Add result type inference to 5 NVVM ops whose result types can be fully
determined from their operands and attributes. This enables the Python
binding generator to emit `results=None` as a default parameter,
removing the need for callers to pass explicit result types.
Ops with optional results (using `InferTypeOpAdaptorWithIsCompatible`):
- `MBarrierArriveOp`: i64 for non-cluster pointers, no result for
shared_cluster
- `MBarrierArriveDropOp`: same as above
- `MBarrierArriveExpectTxOp`: same, plus no result when predicate is set
- `MBarrierArriveDropExpectTxOp`: same as MBarrierArriveOp
- `BarrierOp`: i32 when reductionOp is present, no result otherwise
The optional-result ops use a permissive `isCompatibleReturnTypes` that
allows omitting the result, preserving backward compatibility with the
existing zero-result assembly form.
Also updates the NVGPUToNVVM conversion to work with the new inferred
result types for `MBarrierArriveOp` and `MBarrierArriveExpectTxOp`.
This is a source-breaking change for Python callers that pass result
types positionally (e.g. `mbarrier_arrive(res, addr, ...)` becomes
`mbarrier_arrive(addr, *, ..., results=None, ...)`). Existing MLIR
assembly is fully backward compatible.
Co-authored-by: Claude <noreply at anthropic.com>
Commit: 0a0a33363c1c3ea5393997df5537f524d0e72a6d
https://github.com/llvm/llvm-project/commit/0a0a33363c1c3ea5393997df5537f524d0e72a6d
Author: hidekisaito <hidekido at amd.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUIGroupLP.cpp
M llvm/lib/Target/AMDGPU/AMDGPUIGroupLP.h
Log Message:
-----------
[NFC][AMDGPU]: expose IGLPStrategyID in AMDGPUIGroupLP.h (#191340)
Move IGLPStrategyID and its enumerators into llvm::AMDGPU in the public
header so other translation units can share the immediate encoding.
Commit: 7459e10f34aa86952b1620d0cb48b40be112ebe9
https://github.com/llvm/llvm-project/commit/7459e10f34aa86952b1620d0cb48b40be112ebe9
Author: Amit Tiwari <amtiwari at amd.com>
Date: 2026-04-10 (Fri, 10 Apr 2026)
Changed paths:
A clang/test/OpenMP/strided_update_messages_from.c
A clang/test/OpenMP/strided_update_messages_to.c
A clang/test/OpenMP/strided_update_multiple_messages_from.c
A clang/test/OpenMP/strided_update_multiple_messages_to.c
A clang/test/OpenMP/strided_update_partial_messages_from.c
A clang/test/OpenMP/strided_update_partial_messages_to.c
A clang/test/OpenMP/strided_update_ptr_messages_from.c
A clang/test/OpenMP/strided_update_ptr_messages_to.c
A clang/test/OpenMP/strided_update_ptr_multiple_messages_from.c
A clang/test/OpenMP/strided_update_ptr_multiple_messages_to.c
A clang/test/OpenMP/strided_update_ptr_partial_messages_from.c
A clang/test/OpenMP/strided_update_ptr_partial_messages_to.c
A clang/test/OpenMP/strided_update_ptr_variable_count_and_stride_messages.c
A clang/test/OpenMP/strided_update_ptr_variable_count_messages.c
A clang/test/OpenMP/strided_update_ptr_variable_stride_messages.c
A clang/test/OpenMP/strided_update_struct_messages_from.c
A clang/test/OpenMP/strided_update_struct_messages_to.c
A clang/test/OpenMP/strided_update_struct_multiple_messages_from.c
A clang/test/OpenMP/strided_update_struct_multiple_messages_to.c
A clang/test/OpenMP/strided_update_struct_partial_messages_from.c
A clang/test/OpenMP/strided_update_struct_partial_messages_to.c
A clang/test/OpenMP/strided_update_struct_ptr_messages_from.c
A clang/test/OpenMP/strided_update_struct_ptr_messages_to.c
A clang/test/OpenMP/strided_update_struct_ptr_multiple_messages_from.c
A clang/test/OpenMP/strided_update_struct_ptr_multiple_messages_to.c
A clang/test/OpenMP/strided_update_struct_ptr_partial_messages_from.c
A clang/test/OpenMP/strided_update_struct_ptr_partial_messages_to.c
A clang/test/OpenMP/strided_update_struct_variable_count_and_stride_messages.c
A clang/test/OpenMP/strided_update_variable_count_and_stride_messages.c
A clang/test/OpenMP/strided_update_variable_stride_codegen.c
R clang/test/OpenMP/target_update_strided_messages_from.c
R clang/test/OpenMP/target_update_strided_messages_to.c
R clang/test/OpenMP/target_update_strided_multiple_messages_from.c
R clang/test/OpenMP/target_update_strided_multiple_messages_to.c
R clang/test/OpenMP/target_update_strided_partial_messages_from.c
R clang/test/OpenMP/target_update_strided_partial_messages_to.c
R clang/test/OpenMP/target_update_strided_ptr_messages_from.c
R clang/test/OpenMP/target_update_strided_ptr_messages_to.c
R clang/test/OpenMP/target_update_strided_ptr_multiple_messages_from.c
R clang/test/OpenMP/target_update_strided_ptr_multiple_messages_to.c
R clang/test/OpenMP/target_update_strided_ptr_partial_messages_from.c
R clang/test/OpenMP/target_update_strided_ptr_partial_messages_to.c
R clang/test/OpenMP/target_update_strided_ptr_variable_count_and_stride_messages.c
R clang/test/OpenMP/target_update_strided_ptr_variable_count_messages.c
R clang/test/OpenMP/target_update_strided_ptr_variable_stride_messages.c
R clang/test/OpenMP/target_update_strided_struct_messages_from.c
R clang/test/OpenMP/target_update_strided_struct_messages_to.c
R clang/test/OpenMP/target_update_strided_struct_multiple_messages_from.c
R clang/test/OpenMP/target_update_strided_struct_multiple_messages_to.c
R clang/test/OpenMP/target_update_strided_struct_partial_messages_from.c
R clang/test/OpenMP/target_update_strided_struct_partial_messages_to.c
R clang/test/OpenMP/target_update_strided_struct_ptr_messages_from.c
R clang/test/OpenMP/target_update_strided_struct_ptr_messages_to.c
R clang/test/OpenMP/target_update_strided_struct_ptr_multiple_messages_from.c
R clang/test/OpenMP/target_update_strided_struct_ptr_multiple_messages_to.c
R clang/test/OpenMP/target_update_strided_struct_ptr_partial_messages_from.c
R clang/test/OpenMP/target_update_strided_struct_ptr_partial_messages_to.c
R clang/test/OpenMP/target_update_strided_struct_variable_count_and_stride_messages.c
R clang/test/OpenMP/target_update_variable_count_and_stride_messages.c
R clang/test/OpenMP/target_update_variable_stride_codegen.c
R offload/test/offloading/strided_multiple_update_from.c
R offload/test/offloading/strided_multiple_update_to.c
R offload/test/offloading/strided_offset_multidim_update.c
R offload/test/offloading/strided_partial_update_from.c
R offload/test/offloading/strided_partial_update_to.c
R offload/test/offloading/strided_ptr_multiple_update_from.c
R offload/test/offloading/strided_ptr_multiple_update_to.c
R offload/test/offloading/strided_ptr_partial_update_from.c
R offload/test/offloading/strided_ptr_partial_update_to.c
A offload/test/offloading/strided_update/strided_update_count_expression.c
A offload/test/offloading/strided_update/strided_update_count_expression_complex.c
A offload/test/offloading/strided_update/strided_update_from.c
A offload/test/offloading/strided_update/strided_update_from_pointer.c
A offload/test/offloading/strided_update/strided_update_multidim_offset.c
A offload/test/offloading/strided_update/strided_update_multiple_arrays_count_expression.c
A offload/test/offloading/strided_update/strided_update_multiple_arrays_variable_stride.c
A offload/test/offloading/strided_update/strided_update_multiple_from.c
A offload/test/offloading/strided_update/strided_update_multiple_to.c
A offload/test/offloading/strided_update/strided_update_partial_from.c
A offload/test/offloading/strided_update/strided_update_partial_to.c
A offload/test/offloading/strided_update/strided_update_ptr_count_expression.c
A offload/test/offloading/strided_update/strided_update_ptr_multiple_from.c
A offload/test/offloading/strided_update/strided_update_ptr_multiple_to.c
A offload/test/offloading/strided_update/strided_update_ptr_partial_from.c
A offload/test/offloading/strided_update/strided_update_ptr_partial_to.c
A offload/test/offloading/strided_update/strided_update_ptr_variable_count_and_stride.c
A offload/test/offloading/strided_update/strided_update_ptr_variable_stride.c
A offload/test/offloading/strided_update/strided_update_struct_count_expression.c
A offload/test/offloading/strided_update/strided_update_struct_from.c
A offload/test/offloading/strided_update/strided_update_struct_multiple_from.c
A offload/test/offloading/strided_update/strided_update_struct_multiple_to.c
A offload/test/offloading/strided_update/strided_update_struct_partial_from.c
A offload/test/offloading/strided_update/strided_update_struct_partial_to.c
A offload/test/offloading/strided_update/strided_update_struct_to.c
A offload/test/offloading/strided_update/strided_update_struct_variable_count_and_stride.c
A offload/test/offloading/strided_update/strided_update_struct_variable_stride.c
A offload/test/offloading/strided_update/strided_update_to.c
A offload/test/offloading/strided_update/strided_update_to_pointer.c
A offload/test/offloading/strided_update/strided_update_variable_count_and_stride.c
A offload/test/offloading/strided_update/strided_update_variable_stride.c
A offload/test/offloading/strided_update/strided_update_variable_stride_misc.c
R offload/test/offloading/strided_update_count_expression.c
R offload/test/offloading/strided_update_count_expression_complex.c
R offload/test/offloading/strided_update_from.c
R offload/test/offloading/strided_update_multiple_arrays_count_expression.c
R offload/test/offloading/strided_update_multiple_arrays_variable_stride.c
R offload/test/offloading/strided_update_to.c
R offload/test/offloading/strided_update_variable_count_and_stride.c
R offload/test/offloading/strided_update_variable_stride.c
R offload/test/offloading/strided_update_variable_stride_misc.c
R offload/test/offloading/target_update_from.c
R offload/test/offloading/target_update_ptr_count_expression.c
R offload/test/offloading/target_update_ptr_variable_count_and_stride.c
R offload/test/offloading/target_update_ptr_variable_stride.c
R offload/test/offloading/target_update_strided_struct_count_expression.c
R offload/test/offloading/target_update_strided_struct_from.c
R offload/test/offloading/target_update_strided_struct_multiple_from.c
R offload/test/offloading/target_update_strided_struct_multiple_to.c
R offload/test/offloading/target_update_strided_struct_partial_from.c
R offload/test/offloading/target_update_strided_struct_partial_to.c
R offload/test/offloading/target_update_strided_struct_to.c
R offload/test/offloading/target_update_strided_struct_variable_count_and_stride.c
R offload/test/offloading/target_update_strided_struct_variable_stride.c
R offload/test/offloading/target_update_to.c
Log Message:
-----------
[OpenMP][NFC] Refactor Non-contiguous Update Tests (#190923)
The PR refactors the non-contiguous update tests as raised as a TODO in
one of the comments in the related PR. Prefixed all with
`strided_update`. For offload tests, added a dedicated sub-directory.
Commit: 2f2bd5eafec0059babb4e735d2c0b36f8e927118
https://github.com/llvm/llvm-project/commit/2f2bd5eafec0059babb4e735d2c0b36f8e927118
Author: Felipe de Azevedo Piovezan <fpiovezan at apple.com>
Date: 2026-04-10 (Fri, 10 Apr 2026)
Changed paths:
M lldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.cpp
Log Message:
-----------
[NFC][lldb] Extract Do{Dis}EnableBreakpoint into helper functions (#191136)
Re-using this code will be important in an upcoming patch.
This commit also greatly simplifies the comments in the function.
Commit: 55feddb142f20f81052870ee7fa70fe50cf656c1
https://github.com/llvm/llvm-project/commit/55feddb142f20f81052870ee7fa70fe50cf656c1
Author: Daniil Kovalev <dkovalev at accesssoftek.com>
Date: 2026-04-10 (Fri, 10 Apr 2026)
Changed paths:
M clang/lib/CodeGen/CodeGenModule.cpp
M clang/test/CodeGen/ptrauth-module-flags.c
Log Message:
-----------
[PAC][clang] Use `Error` behavior for ptrauth module flags (#189923)
Previous use of `Min` for `ptrauth-elf-got` and
`ptrauth-sign-personality` module flags was introducing a risk of silent
decrease of security during module merge. The previous choice for `Min`
was mimicking the behavior for the `sign-return-address*` family of
module flags, but it does not make sense to apply this behavior here.
Commit: d6d99d9f600fc54bc9d0ee47e3130953372c56d5
https://github.com/llvm/llvm-project/commit/d6d99d9f600fc54bc9d0ee47e3130953372c56d5
Author: Dark Steve <Prasoon.Mishra at amd.com>
Date: 2026-04-10 (Fri, 10 Apr 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/test/CodeGen/AMDGPU/combine_andor_with_cmps.ll
M llvm/test/CodeGen/AMDGPU/combine_andor_with_cmps_nnan.ll
M llvm/test/CodeGen/AMDGPU/min3.ll
A llvm/test/CodeGen/AMDGPU/minmax3-tree-reduction.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-smax.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-smin.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-umax.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-umin.ll
Log Message:
-----------
[AMDGPU] Improve max3/min3 formation for tree-structured reductions (#190734)
The existing `performMinMaxCombine` forms `max3` by matching
`max(max(a,b), c) -> max3(a,b,c)`. For tree reductions like
`max(max(a,b), max(c,d))`, this produces `max3(a, b, max(c,d));` placing
`max3` on top. At the next tree level, `max(max3, max3)` cannot combine
because the 3-op opcode (`FMAXIMUM3`) differs from the 2-op opcode
(`FMAXIMUM`).
This patch:
1. Adds a tree combine: `max(max(a,b), max(c,d)) -> max(max3(a,b,c),
d)`, keeping a 2-op node on top that enables further combining.
2. Defers the existing combine when the operand is a tree node whose
children can still be combined, ensuring inner tree levels are optimized
before outer levels consume them.
Deferral is skipped when neither child has a single use, since the inner
combine cannot fire in that case.
Fix: LCOMPILER-1652
Commit: 6b1484f699fb6696d25d6baa506b456a012b3e37
https://github.com/llvm/llvm-project/commit/6b1484f699fb6696d25d6baa506b456a012b3e37
Author: Luke Lau <luke at igalia.com>
Date: 2026-04-10 (Fri, 10 Apr 2026)
Changed paths:
M llvm/include/llvm/CodeGen/BasicTTIImpl.h
A llvm/test/Analysis/CostModel/AArch64/masked-divrem.ll
A llvm/test/Analysis/CostModel/RISCV/masked-divrem.ll
Log Message:
-----------
[TTI] Add BasicTTIImpl cost model for llvm.masked.{u,s}{div,rem} (#191240)
This implements a generic cost model for the intrinsics added in
#189705. It costs it equivalently to the current expansion, i.e. an
unmasked divide + select.
Commit: a42e49fb1cbdced1049f6c1cd0162548eff7426f
https://github.com/llvm/llvm-project/commit/a42e49fb1cbdced1049f6c1cd0162548eff7426f
Author: Ramkumar Ramachandra <artagnon at tenstorrent.com>
Date: 2026-04-10 (Fri, 10 Apr 2026)
Changed paths:
M llvm/include/llvm/Analysis/ScalarEvolutionPatternMatch.h
M llvm/include/llvm/IR/PatternMatch.h
A llvm/include/llvm/Support/PatternMatchHelpers.h
M llvm/include/llvm/Transforms/InstCombine/InstCombiner.h
M llvm/lib/Transforms/Vectorize/VPlanPatternMatch.h
Log Message:
-----------
[Support] Factor PatternMatch m_Combine(And|Or), m_Isa (NFC) (#190753)
Introduce a new PatternMatchHelpers with a variant of m_Combine(And|Or)
and m_Isa to share across the IR PatternMatch,
ScalarEvolutionPatternMatch, and VPlanPatternMatch. m_Combine(And|Or)
has been generalized to be variadic. Planned follow-ups include
factoring the specific-value matcher.
Commit: 3155e5d867cbc316e1f0fe86b265b45b4cb05a13
https://github.com/llvm/llvm-project/commit/3155e5d867cbc316e1f0fe86b265b45b4cb05a13
Author: Luke Lau <luke at igalia.com>
Date: 2026-04-10 (Fri, 10 Apr 2026)
Changed paths:
M llvm/test/Transforms/LoopVectorize/first-order-recurrence-tail-folding.ll
M llvm/test/Transforms/LoopVectorize/iv-select-cmp-fold-tail.ll
M llvm/test/Transforms/LoopVectorize/reduction-inloop-pred.ll
M llvm/test/Transforms/LoopVectorize/reduction-predselect.ll
M llvm/test/Transforms/LoopVectorize/tail-folding-div.ll
A llvm/test/Transforms/LoopVectorize/tail-folding-replicate-region.ll
Log Message:
-----------
[LV] Use -force-target-supports-masked-memory-ops on target agnostic tail folding tests. NFC (#191181)
It's a good bit easier to read tail folding tests if masked memory ops
are allowed. This adds -force-target-supports-masked-memory-ops to tests
where we aren't explicitly trying to test predicated replicate regions
Commit: b8fdc59d2f94aa6424ad12f3c76aa8028d5b7154
https://github.com/llvm/llvm-project/commit/b8fdc59d2f94aa6424ad12f3c76aa8028d5b7154
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-04-10 (Fri, 10 Apr 2026)
Changed paths:
M llvm/include/llvm/Analysis/InlineCost.h
M llvm/lib/Analysis/InlineCost.cpp
M llvm/lib/Passes/PassBuilderPipelines.cpp
M llvm/test/Transforms/Inline/ML/Inputs/test-module.ll
M llvm/test/Transforms/Inline/ML/interactive-mode.ll
M llvm/test/Transforms/Inline/always-inline-phase-ordering.ll
M llvm/unittests/Analysis/PluginInlineAdvisorAnalysisTest.cpp
M llvm/unittests/Analysis/PluginInlineOrderAnalysisTest.cpp
Log Message:
-----------
[Passes][Inliner] Handle optsize/minsize via attributes only (#190168)
InlineParams already has separate threshold for OptSize/MinSize
functions that get applied based on the corresponding function
attributes. As such, we should not also be changing the DefaultThreshold
based on the pipeline Os/Oz levels as well.
Commit: a0ab88afe1cf3f6b943e19461debb6bfe310499d
https://github.com/llvm/llvm-project/commit/a0ab88afe1cf3f6b943e19461debb6bfe310499d
Author: David Green <david.green at arm.com>
Date: 2026-04-10 (Fri, 10 Apr 2026)
Changed paths:
M llvm/test/CodeGen/AArch64/bf16-instructions.ll
M llvm/test/CodeGen/AArch64/bf16-v4-instructions.ll
M llvm/test/CodeGen/AArch64/bf16-v8-instructions.ll
M llvm/test/CodeGen/AArch64/itofp-bf16.ll
Log Message:
-----------
[AArch64][GISel] Update and regenerate bf16 test coverage. NFC (#191348)
Commit: 6e0a76b1966bf54d873cebed5c6e241faf461171
https://github.com/llvm/llvm-project/commit/6e0a76b1966bf54d873cebed5c6e241faf461171
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-04-10 (Fri, 10 Apr 2026)
Changed paths:
M llvm/include/llvm/Analysis/InlineCost.h
M llvm/lib/Analysis/InlineCost.cpp
M llvm/lib/Passes/PassBuilderPipelines.cpp
Log Message:
-----------
[Passes][Inliner] Add separate optsize inlinehint threshold (#191213)
PGO pre-inlining wants to set a different inlinehint threshold when
optimizing for size. Currently this is done by adjusting the InlineHint
threshold based on the pipeline optimization level.
Replace this with a separate OptSizeInlineHint threshold that is applied
based on attributes instead.
Commit: f95ed258260b0349c9bbe8210b0d0726f95a9305
https://github.com/llvm/llvm-project/commit/f95ed258260b0349c9bbe8210b0d0726f95a9305
Author: Jim Lin <jim at andestech.com>
Date: 2026-04-10 (Fri, 10 Apr 2026)
Changed paths:
M llvm/lib/Target/WebAssembly/GISel/WebAssemblyLegalizerInfo.cpp
Log Message:
-----------
[WebAssembly][GlobalISel] Fix legalizeCustom return value for Helper.lower() (#191345)
Helper.lower() returns a LegalizerHelper::LegalizeResult enum where
UnableToLegalize=2, which implicitly converts to true (success). Compare
against LegalizerHelper::Legalized instead so that legalization failures
are correctly reported.
---------
Co-authored-by: Claude Opus 4.6 (1M context) <noreply at anthropic.com>
Commit: f149ab665a4b4cdd74f89e0689dfd7f376b678e1
https://github.com/llvm/llvm-project/commit/f149ab665a4b4cdd74f89e0689dfd7f376b678e1
Author: Zhige Chen <zhigec_cpp at outlook.com>
Date: 2026-04-10 (Fri, 10 Apr 2026)
Changed paths:
A llvm/test/tools/llubi/lib_abort.ll
A llvm/test/tools/llubi/lib_calloc_large_size.ll
A llvm/test/tools/llubi/lib_calloc_size_overflow.ll
A llvm/test/tools/llubi/lib_cxx_memory.ll
A llvm/test/tools/llubi/lib_cxx_memory_large_size.ll
A llvm/test/tools/llubi/lib_double_free.ll
A llvm/test/tools/llubi/lib_exit.ll
A llvm/test/tools/llubi/lib_free_nullary_pointer.ll
A llvm/test/tools/llubi/lib_free_out_of_bound.ll
A llvm/test/tools/llubi/lib_free_stack.ll
A llvm/test/tools/llubi/lib_io.ll
A llvm/test/tools/llubi/lib_malloc_large_size.ll
A llvm/test/tools/llubi/lib_memory.ll
A llvm/test/tools/llubi/lib_nobuiltin.ll
A llvm/test/tools/llubi/lib_poison_argument.ll
A llvm/test/tools/llubi/lib_printf_format.ll
A llvm/test/tools/llubi/lib_printf_not_enough_argument.ll
A llvm/test/tools/llubi/lib_printf_unknown_specifier.ll
A llvm/test/tools/llubi/lib_read_nullary_string.ll
A llvm/test/tools/llubi/lib_terminate.ll
A llvm/test/tools/llubi/lib_uninit_string.ll
M llvm/tools/llubi/lib/CMakeLists.txt
M llvm/tools/llubi/lib/Context.cpp
M llvm/tools/llubi/lib/Context.h
M llvm/tools/llubi/lib/ExecutorBase.cpp
M llvm/tools/llubi/lib/ExecutorBase.h
M llvm/tools/llubi/lib/Interpreter.cpp
A llvm/tools/llubi/lib/Library.cpp
A llvm/tools/llubi/lib/Library.h
M llvm/tools/llubi/llubi.cpp
Log Message:
-----------
[llubi] Implements common library functions (#190147)
This PR implements common library functions, including malloc, calloc,
free, puts, printf, exit, abort, and terminate.
See also #186976.
Commit: 44e8871d6fa415e72348cc92bd82f66dfe085aaf
https://github.com/llvm/llvm-project/commit/44e8871d6fa415e72348cc92bd82f66dfe085aaf
Author: Garvit Gupta <garvgupt at qti.qualcomm.com>
Date: 2026-04-10 (Fri, 10 Apr 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
Log Message:
-----------
[RISCV] Fix stack frame layout diagrams in RISCVFrameLowering (NFC) (#190163)
Fix stack layout diagram by pointing FP to start of the callee allocated
varargs instead of at the end.
Commit: bccb951e84fb71241a964e04e98f7ff1a234f8e6
https://github.com/llvm/llvm-project/commit/bccb951e84fb71241a964e04e98f7ff1a234f8e6
Author: Fangrui Song <i at maskray.me>
Date: 2026-04-10 (Fri, 10 Apr 2026)
Changed paths:
M llvm/include/llvm/MC/MCAsmInfo.h
M llvm/lib/CodeGen/CodeGenTargetMachineImpl.cpp
M llvm/lib/Target/X86/X86AsmPrinter.cpp
M llvm/tools/llvm-mc/llvm-mc.cpp
Log Message:
-----------
[MC] Simplify code with MCAsmInfo::getOutputAssemblerDialect. NFC (#191356)
Add a helper to simplify code.
Commit: 9f9f0dcbe2ee85f8319d88956d027579984a6e0d
https://github.com/llvm/llvm-project/commit/9f9f0dcbe2ee85f8319d88956d027579984a6e0d
Author: Alexis Engelke <engelke at in.tum.de>
Date: 2026-04-10 (Fri, 10 Apr 2026)
Changed paths:
M mlir/include/mlir/IR/Visitors.h
Log Message:
-----------
[MLIR] Fix walk() after PostOrderTraversal change (#191357)
make_early_inc_range doesn't keep the range alive, only the iterators.
This breaks with the recent PostOrderTraversal change, which no longer
stores the state in the iterators. Store the range in a variable to keep
it alive for the entire loop.
Fixup of #191047 / 691a130e0f14459d9358a71ffd52a01295e6200a.
Commit: ddb306ab57f384ef4c3623cc2f885fe5d4332890
https://github.com/llvm/llvm-project/commit/ddb306ab57f384ef4c3623cc2f885fe5d4332890
Author: Tomer Shafir <tomer.shafir8 at gmail.com>
Date: 2026-04-10 (Fri, 10 Apr 2026)
Changed paths:
M llvm/docs/CommandGuide/opt.rst
M llvm/docs/ReleaseNotes.md
A llvm/test/tools/opt/mtune.ll
M llvm/tools/opt/optdriver.cpp
Log Message:
-----------
[opt] Add -mtune option (#187932)
This patch adds a Clang-compatible -mtune option to opt, following up
the addition to llc: https://github.com/llvm/llvm-project/pull/186998,
to enable decoupled ISA and microarchitecture targeting. Example use
case is `MaxInterleaveFactor` for the loop vectorizer.
The implementation registers the new codegen flag for opt, which
consumes it and sets tune-cpu attributes for functions to be consumed by
the backend.
Commit: 3de583e09f00d821fbde28463a5a14ff121bfd6b
https://github.com/llvm/llvm-project/commit/3de583e09f00d821fbde28463a5a14ff121bfd6b
Author: Pierre van Houtryve <pierre.vanhoutryve at amd.com>
Date: 2026-04-10 (Fri, 10 Apr 2026)
Changed paths:
M llvm/docs/AMDGPUUsage.rst
Log Message:
-----------
[AMDGPU][Doc] GFX12.5 Barrier Execution Model (#185632)
- Document GFX12.5-specific intrinsics.
- Rename signal -> arrive, leave -> drop to match C++ terminology.
- Update execution model to support GFX12.5 semantics (e.g. threads can
arrive w/o waiting)
- Various clean-ups & wording updates on the model.
- Added "mutually exclusive" barrier objects.
- Added barrier-phase-with + related constraints.
- Document that barriers can exist at cluster scope too.
- Update GFX12 target semantics/code sequences to include GFX12.5.
The model is no longer marked as incomplete, it is now just
experimental.
There are more updates planned in the future to support more features,
and
improve some known shortcomings of the model. e.g., currently many
relations
encode too much semantic information, which means the model doesn't
build
when barriers aren't used correctly. I'd like the model to eventually
represent
broken executions as well, just like a memory model can.
Commit: 04202abde35aaac906be29b250047c556a640f8c
https://github.com/llvm/llvm-project/commit/04202abde35aaac906be29b250047c556a640f8c
Author: Minsoo Choo <minsoochoo0122 at proton.me>
Date: 2026-04-10 (Fri, 10 Apr 2026)
Changed paths:
M lldb/source/Plugins/Process/FreeBSD-Kernel-Core/ProcessFreeBSDKernelCore.cpp
M lldb/source/Plugins/Process/FreeBSD-Kernel-Core/ProcessFreeBSDKernelCore.h
Log Message:
-----------
[lldb][Process/FreeBSDKernelCore] Defer actual core loading to DoLoadCore() (#186626)
`ProcessFreeBSDKernelCore` initializes `m_kvm` in class initialization,
thus invoking `kvm_open2()` only once. Although this approach is
effective, it violates the expected bahaviour of `DoLoadCore()`, loading
core file before the function is invoked. Later when I implement another
flavour of `ProcessFreeBSDKernelCore` inherited from `ProcessElfCore`,
ELF plugin will load core in `DoLoadCore()` while kvm plugin will do so
in the class initializer, causing discrepancy between the two classes.
Like the kvm/fvc precedent, the plugin variant (ELF and kvm) will be
chosen using vtable override, so if the behaviour differs like above, it
gets harder to add new features and debug the code. Thus, detecting and
loading core file in `ProcessFreeBSDKernelCore` should be handled
separately.
Signed-off-by: Minsoo Choo <minsoochoo0122 at proton.me>
Commit: 9116344c02bf0b9ec037451d12935d7539c48679
https://github.com/llvm/llvm-project/commit/9116344c02bf0b9ec037451d12935d7539c48679
Author: Minsoo Choo <minsoochoo0122 at proton.me>
Date: 2026-04-10 (Fri, 10 Apr 2026)
Changed paths:
M lldb/source/Plugins/Process/FreeBSD-Kernel-Core/ProcessFreeBSDKernelCore.cpp
M lldb/source/Plugins/Process/FreeBSD-Kernel-Core/ProcessFreeBSDKernelCore.h
Log Message:
-----------
[lldb][Process/FreeBSDKernelCore] Add command for refreshing thread list (#188692)
Since `/dev/mem` is live memory, its thread list is updated while
running LLDB. In the current model, users need to restart LLDB to get
new thread list, and this is prone to error when writing to memory
because LLDB's thread information and `/dev/mem` might be out of sync.
The new command `process plugin refresh-threads` reconstructs thread
list so users can synchronize thread list without restarting lldb.
Memory cache needs to be cleared prior to reconstruction otherwise lldb
will read the same process information from cache memory. To invoke
`UpdateThreadList()` from `UpdateThreadListIfNeeded()`, clear thread
list as well before triggering an update.
This is enabled for all kvm invocation regardless of type of the target
(crash dump or live kernel) because kvm hides the target type
information. Elf-core based implementation in future will need to update
thread list only at the first time as it is guaranteed that elf-core
handles static files.
---------
Signed-off-by: Minsoo Choo <minsoochoo0122 at proton.me>
Commit: 3efac3fec20c9d0739941705ae245af3fc07ffb9
https://github.com/llvm/llvm-project/commit/3efac3fec20c9d0739941705ae245af3fc07ffb9
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2026-04-10 (Fri, 10 Apr 2026)
Changed paths:
M lldb/source/Commands/CommandObjectBreakpoint.cpp
M lldb/source/Commands/CommandObjectCommands.cpp
M lldb/source/Commands/CommandObjectDisassemble.cpp
M lldb/source/Commands/CommandObjectFrame.cpp
M lldb/source/Commands/CommandObjectMemory.cpp
M lldb/source/Commands/CommandObjectProcess.cpp
M lldb/source/Commands/CommandObjectSource.cpp
M lldb/source/Commands/CommandObjectTarget.cpp
M lldb/source/Commands/CommandObjectThread.cpp
M lldb/source/Commands/CommandObjectType.cpp
M lldb/source/Core/Module.cpp
M lldb/source/Plugins/LanguageRuntime/ObjC/AppleObjCRuntime/AppleObjCRuntimeV2.cpp
M lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp
M lldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.cpp
M lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARF.cpp
M lldb/test/API/commands/breakpoint/set/func-regex/TestBreakpointRegexError.py
M lldb/test/API/commands/memory/read/TestMemoryRead.py
M lldb/test/Shell/Commands/command-type-synthetic-add.test
M lldb/test/Shell/ObjectFile/ELF/minidebuginfo-no-lzma.yaml
M lldb/test/Shell/Process/UnsupportedLanguage.test
M lldb/test/Shell/SymbolFile/DWARF/dwo-debug-file-search-path-symlink-relative-compdir.c
M lldb/test/Shell/SymbolFile/DWARF/dwo-debug-file-search-paths-dwoname-absolute-compdir.c
M lldb/test/Shell/SymbolFile/DWARF/dwo-debug-file-search-paths-filename-only-absolute-compdir.c
M lldb/test/Shell/SymbolFile/DWARF/dwo-debug-file-search-paths-filename-only-relative-compdir.c
M lldb/test/Shell/SymbolFile/DWARF/dwo-debug-file-search-paths-relative-compdir.c
M lldb/test/Shell/SymbolFile/DWARF/dwo-relative-filename-only-binary-dir.c
M lldb/test/Shell/SymbolFile/DWARF/x86/dwo-not-found-warning.cpp
M lldb/test/Shell/SymbolFile/DWARF/x86/dwp-separate-debug-file.cpp
Log Message:
-----------
[lldb] Bring more warnings in compliance with our coding standards (#191214)
Similar to #190410 but for warnings this time.
Assisted-by: Claude Code
Commit: 7027c5f5dcd21b044fea104b338136c7acb964eb
https://github.com/llvm/llvm-project/commit/7027c5f5dcd21b044fea104b338136c7acb964eb
Author: Arun Thangamani <arun.thangamani at intel.com>
Date: 2026-04-10 (Fri, 10 Apr 2026)
Changed paths:
M mlir/lib/Dialect/X86/Transforms/VectorContractToPackedTypeDotProduct.cpp
M mlir/lib/Dialect/X86/Utils/X86Utils.cpp
M mlir/test/Dialect/X86/vector-contract-to-packed-type-dotproduct.mlir
Log Message:
-----------
[mlir][x86] Lower Int8 vector.contract to AVX2/AVX10 dp (online packing) (#189386)
A transform pass to lower flat layout `int8` packed type
`vector.contract` operation to:
1. `x86.avx10.int8.dp` - for vector length of `16`, and
2. `x86.avx.int8.dp` - for vector length of `8` via online packing.
Commit: 6175a4d455e170fa947859e2a5952c89585150aa
https://github.com/llvm/llvm-project/commit/6175a4d455e170fa947859e2a5952c89585150aa
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2026-04-10 (Fri, 10 Apr 2026)
Changed paths:
M lldb/docs/resources/test.rst
M lldb/test/API/CMakeLists.txt
M lldb/test/API/lit.cfg.py
M lldb/test/API/lit.site.cfg.py.in
M lldb/utils/lldb-dotest/lldb-dotest.in
Log Message:
-----------
[lldb] LLDB_TEST_ARCH -> LLDB_TEST_TRIPLE (#191204)
Change the CMake variable from LLDB_TEST_ARCH to LLDB_TEST_TRIPLE. I'm
working on adding support for cross compiling our test suite to
WebAssembly, where the triple (i.e. `wasm32-wasip1`) is of importance
while building the inferiors. Given that the triple is a superset of the
arch, it is strictly more expressive.
Commit: 7d25a0519a4647410ea759b36728bd5cd994d327
https://github.com/llvm/llvm-project/commit/7d25a0519a4647410ea759b36728bd5cd994d327
Author: Janek van Oirschot <janek.vanoirschot at amd.com>
Date: 2026-04-10 (Fri, 10 Apr 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
M llvm/lib/Target/AMDGPU/AMDGPUMCResourceInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPUMCResourceInfo.h
M llvm/test/CodeGen/AMDGPU/agpr-register-count.ll
M llvm/test/CodeGen/AMDGPU/amdpal-metadata-agpr-register-count.ll
M llvm/test/CodeGen/AMDGPU/attr-amdgpu-flat-work-group-size-vgpr-limit.ll
M llvm/test/CodeGen/AMDGPU/call-alias-register-usage-agpr.ll
M llvm/test/CodeGen/AMDGPU/call-alias-register-usage0.ll
M llvm/test/CodeGen/AMDGPU/call-alias-register-usage1.ll
M llvm/test/CodeGen/AMDGPU/call-alias-register-usage2.ll
M llvm/test/CodeGen/AMDGPU/call-alias-register-usage3.ll
M llvm/test/CodeGen/AMDGPU/call-graph-register-usage.ll
M llvm/test/CodeGen/AMDGPU/dvgpr_sym.ll
M llvm/test/CodeGen/AMDGPU/dvgpr_sym_fail_too_many_block_size_16.ll
M llvm/test/CodeGen/AMDGPU/dvgpr_sym_fail_too_many_block_size_16_anon.ll
M llvm/test/CodeGen/AMDGPU/function-resource-usage.ll
M llvm/test/CodeGen/AMDGPU/mcexpr-knownbits-assign-crash-gh-issue-110930.ll
M llvm/test/CodeGen/AMDGPU/multi-call-resource-usage-mcexpr.ll
M llvm/test/CodeGen/AMDGPU/recursion.ll
M llvm/test/CodeGen/AMDGPU/recursive-resource-usage-mcexpr.ll
M llvm/test/CodeGen/AMDGPU/resource-optimization-remarks.ll
M llvm/test/CodeGen/AMDGPU/resource-usage-dead-function.ll
M llvm/test/CodeGen/AMDGPU/s-barrier-lowering.ll
M llvm/test/CodeGen/AMDGPU/unnamed-function-resource-info.ll
Log Message:
-----------
[AMDGPU] Localize resource info symbols (#185732)
Reduce symbol table size for libraries. Object linking will more than
likely divert from using symbols directly.
Fixes ROCM-14907
Commit: be56d652bde2431a7c934da3b24cc30c13b55e6c
https://github.com/llvm/llvm-project/commit/be56d652bde2431a7c934da3b24cc30c13b55e6c
Author: Lukacma <Marian.Lukac at arm.com>
Date: 2026-04-10 (Fri, 10 Apr 2026)
Changed paths:
M llvm/test/MC/Disassembler/AArch64/armv8.2a-uao.txt
M llvm/test/MC/Disassembler/AArch64/armv8.4a-dit.txt
M llvm/test/MC/Disassembler/AArch64/armv8.5a-dataproc.txt
M llvm/test/MC/Disassembler/AArch64/armv8.5a-mte.txt
M llvm/test/MC/Disassembler/AArch64/armv8.5a-sb.txt
M llvm/test/MC/Disassembler/AArch64/armv8.5a-ssbs.txt
M llvm/test/MC/Disassembler/AArch64/armv8.7a-wfxt.txt
M llvm/test/MC/Disassembler/AArch64/armv8.7a-xs.txt
M llvm/test/MC/Disassembler/AArch64/armv8.8a-nmi.txt
Log Message:
-----------
[NFC] autogenerate disassembler tests with invalid MSR/MRS use (#185970)
This patch makes certain dissambler tests, which produce invalid MRS/MSR
intsructions autogenerated to make them easier to modify in the future
and to reduce diff size of #185709
Commit: b66fbb1f11db06a25dd2b1d5863a31e29240e879
https://github.com/llvm/llvm-project/commit/b66fbb1f11db06a25dd2b1d5863a31e29240e879
Author: Donát Nagy <donat.nagy at ericsson.com>
Date: 2026-04-10 (Fri, 10 Apr 2026)
Changed paths:
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/MemRegion.h
M clang/lib/StaticAnalyzer/Core/MemRegion.cpp
Log Message:
-----------
[analyzer][NFC] Document getVarRegion shortcomings (#191168)
... more precisely, that the analyzer currently uses `NonParamVarRegion`
instances to represent parameters of the entrypoint stack frame and
parameters that are captured by inner lambdas or blocks.
In my recent commit f40c234191802154d5b3fc3209908c3f2d6e1649 I added a
FIXME note to the method `MemRegionManager::getVarRegion`, but now, as I
tried to implement that I realized that the situation is more complex.
As I don't have time to fix this right now, I'm pushing this commit to
remove the inaccurate FIXME and replace it with more accurate TODO notes
that explain the current (problematic) behavior of the codebase.
Commit: 5ce2bbc036c47d2fc0f8e6ebb3074bf0d172e7a5
https://github.com/llvm/llvm-project/commit/5ce2bbc036c47d2fc0f8e6ebb3074bf0d172e7a5
Author: Pengcheng Wang <wangpengcheng.pp at bytedance.com>
Date: 2026-04-10 (Fri, 10 Apr 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/test/CodeGen/RISCV/features-info.ll
Log Message:
-----------
[RISCV][NFC] Remove extra dot in feature's description (#191379)
Commit: e2c25a761e83a185d81ddbc18cd129b1cb26f633
https://github.com/llvm/llvm-project/commit/e2c25a761e83a185d81ddbc18cd129b1cb26f633
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2026-04-10 (Fri, 10 Apr 2026)
Changed paths:
M lldb/test/Shell/ObjectFile/ELF/minidebuginfo-corrupt-xz.yaml
Log Message:
-----------
[lldb] Update warning in minidebuginfo-corrupt-xz test (#191387)
Commit: b1f8dff221f645e91b891eeaa0674b2bb9b37c77
https://github.com/llvm/llvm-project/commit/b1f8dff221f645e91b891eeaa0674b2bb9b37c77
Author: nvptm <pmathew at nvidia.com>
Date: 2026-04-10 (Fri, 10 Apr 2026)
Changed paths:
M flang/lib/Optimizer/OpenACC/Support/FIROpenACCTypeInterfaces.cpp
M flang/test/Fir/OpenACC/recipe-populate-firstprivate.mlir
M flang/test/Transforms/OpenACC/acc-implicit-firstprivate.fir
A flang/test/Transforms/OpenACC/optional-firstprivate-recipe.fir
A flang/test/Transforms/OpenACC/optional-firstprivate.fir
M mlir/lib/Dialect/OpenACC/IR/OpenACC.cpp
Log Message:
-----------
[acc] Support for Optional arguments in firstprivate recipes (#190079)
Add support for explicit of implicit firstprivates that are Fortran
Optional arguments.
Commit: 524525e13668d024abadf70995993dbbc605bed5
https://github.com/llvm/llvm-project/commit/524525e13668d024abadf70995993dbbc605bed5
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-04-10 (Fri, 10 Apr 2026)
Changed paths:
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/test/Driver/openmp-offload-gpu.c
Log Message:
-----------
[Clang] Pass toolchain paths unconditionally in linker wrapper (#191311)
Summary:
Previously we used the auto-forwarding mechanism to handle options like
forwarding --cuda-path. The problem is that this went over the toolchain
options and that meant if someone used just bare `--offload-link` there
would be no CUDA or ROCm toolchain to figure out if we should forward
it. Just do this unconditionally for all toolchains, there's no harm in
setting it if it's unused.
Fixes: https://github.com/llvm/llvm-project/issues/190979
Commit: 8f341cc57dec88ef49cdff44b0490728d251536f
https://github.com/llvm/llvm-project/commit/8f341cc57dec88ef49cdff44b0490728d251536f
Author: Zeyi Xu <mitchell.xu2 at gmail.com>
Date: 2026-04-10 (Fri, 10 Apr 2026)
Changed paths:
M clang-tools-extra/clang-tidy/readability/IdentifierNamingCheck.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
A clang-tools-extra/test/clang-tidy/checkers/readability/identifier-naming-template-method-default.cpp
Log Message:
-----------
[clang-tidy] Fix readability-identifier-naming FP with DefaultCase on function templates (#189788)
Closes #189755
---------
Co-authored-by: EugeneZelenko <eugene.zelenko at gmail.com>
Co-authored-by: Daniil Dudkin <unterumarmung at yandex.ru>
Commit: 7b05d9d66dc61bd1067ea5cb37191b3d33e7c1aa
https://github.com/llvm/llvm-project/commit/7b05d9d66dc61bd1067ea5cb37191b3d33e7c1aa
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-04-10 (Fri, 10 Apr 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUCodeGenPrepare.cpp
M llvm/test/CodeGen/AMDGPU/fract-match.ll
Log Message:
-----------
AMDGPU: Match fract from compare and select and minimum (#189082)
Implementing this with any of the minnum variants is overconstraining
for the actual use. Existing patterns use fmin, then have to manually
clamp nan inputs to get nan propagating behavior. It's cleaner to
express this with a nan propagating operation to start with.
Commit: 3263854347e10d9ded4dbb7687fc540212137737
https://github.com/llvm/llvm-project/commit/3263854347e10d9ded4dbb7687fc540212137737
Author: Iliyan Georgiev <Iliyan.Georgiev at arm.com>
Date: 2026-04-10 (Fri, 10 Apr 2026)
Changed paths:
M mlir/include/mlir/Dialect/Tosa/IR/TosaComplianceData.h.inc
M mlir/include/mlir/Dialect/Tosa/IR/TosaOps.td
M mlir/lib/Dialect/Tosa/IR/TosaOps.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaProfileCompliance.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaValidation.cpp
M mlir/test/Dialect/Tosa/level_check.mlir
M mlir/test/Dialect/Tosa/ops.mlir
M mlir/test/Dialect/Tosa/tosa-validation-version-1p0-invalid.mlir
M mlir/test/Dialect/Tosa/tosa-validation-version-1p1-valid.mlir
M mlir/test/Dialect/Tosa/verifier.mlir
Log Message:
-----------
[mlir][tosa] Add TOSA Max Pool 2D Adaptive (#191225)
Implements:
- Operator definition
- Operator verifier
- Validation
- Tests
- Adds NoMemoryEffect to AvgPool2dAdaptive
Signed-off-by: Iliyan Georgiev <Iliyan.Georgiev at arm.com>
Commit: 8b372603f3fc55aea60605c6844fba2cd31cc725
https://github.com/llvm/llvm-project/commit/8b372603f3fc55aea60605c6844fba2cd31cc725
Author: Alexis Engelke <engelke at in.tum.de>
Date: 2026-04-10 (Fri, 10 Apr 2026)
Changed paths:
M llvm/unittests/ADT/SmallVectorTest.cpp
Log Message:
-----------
[UnitTest][ADT] Add iterator operator== (#191396)
Apparently required by some older libstdc++ versions.
Commit: fb0b737e1a4abf73d5c78f708206af66295b5f27
https://github.com/llvm/llvm-project/commit/fb0b737e1a4abf73d5c78f708206af66295b5f27
Author: anoopkg6 <anoop.kumar6 at ibm.com>
Date: 2026-04-10 (Fri, 10 Apr 2026)
Changed paths:
M llvm/lib/Target/SystemZ/SystemZTargetTransformInfo.cpp
A llvm/test/Analysis/CostModel/SystemZ/fold-rmw-cost.ll
Log Message:
-----------
[SystemZTTI][CostModel] Improve SystemZ cost model for scalar Read-Modify-Write Sequence, Fix #189183 (#190350)
This patch improves the SystemZ cost model to identify Read-Modify-Write
sequences
that can be folded into a single instruction (e.g., ASI, NI, OI).
If a load, a scalar arithmetic operation (ADD, SUB, AND, OR, XOR) with
an
immediate, and a store all target the same memory location and have no
external uses, the cost of the arithmetic and store insn should bw 0.
This implementation does not include TTI::TCK_RecipThroughput CostKind,
as
it causes regression in non-power-2-subvector-extract.ll.
Fixes #189183. (Refer it for example)
---------
Co-authored-by: anoopkg6 <anoopkg6 at github.com>
Commit: 9791929f838388b833f0a801d8bfd50ee209cb83
https://github.com/llvm/llvm-project/commit/9791929f838388b833f0a801d8bfd50ee209cb83
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-04-10 (Fri, 10 Apr 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
M llvm/test/CodeGen/AMDGPU/naked-fn-with-frame-pointer.ll
Log Message:
-----------
[AMDGPU] Do not emit function prologue on naked functions (#191398)
Summary:
Naked functions are intended to allow the user to write the entirety of
the function block, so we shouldn't include the `waitcnt` instructions
for them.
Commit: e267605bdd35ba6dfd88abad4d6ed8396d2bdde5
https://github.com/llvm/llvm-project/commit/e267605bdd35ba6dfd88abad4d6ed8396d2bdde5
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2026-04-10 (Fri, 10 Apr 2026)
Changed paths:
M flang/lib/Semantics/resolve-directives.cpp
Log Message:
-----------
[flang][OpenMP] Move check for threadprivate iteration variable (#191208)
This moves the test of whether the iteration variable of an affected DO
loop is marked as threadprivate. This makes the `ordCollapseLevel`
member unnecessary.
Issue: https://github.com/llvm/llvm-project/issues/191249
Commit: a72f7fcc92fee0fb6f1cfaa45d4d75dda43d2280
https://github.com/llvm/llvm-project/commit/a72f7fcc92fee0fb6f1cfaa45d4d75dda43d2280
Author: Jeff Bailey <jbailey at raspberryginger.com>
Date: 2026-04-10 (Fri, 10 Apr 2026)
Changed paths:
M libc/docs/full_host_build.rst
M libc/include/CMakeLists.txt
Log Message:
-----------
[libc] Add generate-libc-headers custom target (#191160)
Added the generate-libc-headers custom target depending on libc-headers.
This allows troubleshooting headers without needing to install them
first.
Commit: 4cd2db44f77090fb236c737ef12ec524379315de
https://github.com/llvm/llvm-project/commit/4cd2db44f77090fb236c737ef12ec524379315de
Author: David Sherwood <david.sherwood at arm.com>
Date: 2026-04-10 (Fri, 10 Apr 2026)
Changed paths:
M llvm/test/Transforms/LoopVectorize/AArch64/scalable-call.ll
M llvm/test/Transforms/LoopVectorize/Hexagon/minimum-vf.ll
M llvm/test/Transforms/LoopVectorize/RISCV/riscv-interleaved.ll
M llvm/test/Transforms/LoopVectorize/X86/cost-model-assert.ll
M llvm/test/Transforms/LoopVectorize/X86/no_fpmath.ll
M llvm/test/Transforms/LoopVectorize/X86/no_fpmath_with_hotness.ll
M llvm/test/Transforms/LoopVectorize/X86/strided_load_cost.ll
M llvm/test/Transforms/LoopVectorize/X86/tail_folding_and_assume_safety.ll
M llvm/test/Transforms/LoopVectorize/X86/vectorization-remarks-loopid-dbg.ll
M llvm/test/Transforms/LoopVectorize/X86/vectorization-remarks-missed.ll
M llvm/test/Transforms/LoopVectorize/X86/vectorization-remarks-profitable.ll
M llvm/test/Transforms/LoopVectorize/X86/vectorization-remarks.ll
M llvm/test/Transforms/LoopVectorize/conditional-assignment.ll
M llvm/test/Transforms/LoopVectorize/control-flow.ll
M llvm/test/Transforms/LoopVectorize/diag-missing-instr-debug-loc.ll
M llvm/test/Transforms/LoopVectorize/diag-with-hotness-info-2.ll
M llvm/test/Transforms/LoopVectorize/diag-with-hotness-info.ll
M llvm/test/Transforms/LoopVectorize/explicit_outer_detection.ll
M llvm/test/Transforms/LoopVectorize/explicit_outer_nonuniform_inner.ll
M llvm/test/Transforms/LoopVectorize/explicit_outer_uniform_diverg_branch.ll
M llvm/test/Transforms/LoopVectorize/fix-reduction-dbg.ll
M llvm/test/Transforms/LoopVectorize/incorrect-dom-info.ll
M llvm/test/Transforms/LoopVectorize/middle-block-dbg.ll
M llvm/test/Transforms/LoopVectorize/mixed-precision-remarks.ll
M llvm/test/Transforms/LoopVectorize/no_array_bounds.ll
M llvm/test/Transforms/LoopVectorize/no_switch.ll
M llvm/test/Transforms/LoopVectorize/no_switch_disable_vectorization.ll
M llvm/test/Transforms/LoopVectorize/unsafe-dep-remark.ll
Log Message:
-----------
[LV][NFC] Remove llvm.ident, tbaa and other attributes from tests (#191375)
While in this area I also removed unnecessary annotations for wchar_size
and also cleaned up some more function attributes.
Commit: e0ac76a87278353c1acc3d2fdaa3f712f4337cca
https://github.com/llvm/llvm-project/commit/e0ac76a87278353c1acc3d2fdaa3f712f4337cca
Author: Minsoo Choo <minsoochoo0122 at proton.me>
Date: 2026-04-10 (Fri, 10 Apr 2026)
Changed paths:
M lldb/source/Plugins/Process/FreeBSD-Kernel-Core/ProcessFreeBSDKernelCore.cpp
Log Message:
-----------
[lldb][Process/FreeBSDKernelCore] Switch to LLDBLog::Process (#191408)
Failure to read all required fields for msgbuf isn't ObjectFile's fault
but FreeBSD-Kernel-Core plugin specific. Thus this should be logged
through `LLDBLog::Process` rather than `LLDBLog::Object`.
Signed-off-by: Minsoo Choo <minsoochoo0122 at proton.me>
Commit: 4367701f6ea981ff8c69a73edf8d6650354d6612
https://github.com/llvm/llvm-project/commit/4367701f6ea981ff8c69a73edf8d6650354d6612
Author: Michael Klemm <michael.klemm at amd.com>
Date: 2026-04-10 (Fri, 10 Apr 2026)
Changed paths:
A flang/docs/OpenMP-extensions.md
M flang/docs/OpenMPSupport.md
M flang/docs/index.md
Log Message:
-----------
[Flang][Docs][NFC] Move OpenMP API extensions to separate document (#186981)
This PR follows suit of the Extensions.md document and provides the same
file for OpenMP API extensions. These have previously been stored in
OpenMPSupport.md. Having a more centralized view and place for these
extensions seems useful.
---------
Co-authored-by: Copilot Autofix powered by AI <175728472+Copilot at users.noreply.github.com>
Commit: dfbae3e219afb7ae6cb98beae3eb104ec1abec78
https://github.com/llvm/llvm-project/commit/dfbae3e219afb7ae6cb98beae3eb104ec1abec78
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2026-04-10 (Fri, 10 Apr 2026)
Changed paths:
M libcxx/docs/Status/Cxx20Issues.csv
M libcxx/docs/Status/Cxx2cIssues.csv
M libcxx/utils/conformance
Log Message:
-----------
[libc++] Fix incorrect links and broken formatting in CSV status files (#191289)
Also, update the conformance script to look for closed issues when
searching for unlinked issues.
Commit: 70742589079f16232908ed6e616f5f91a07df4e9
https://github.com/llvm/llvm-project/commit/70742589079f16232908ed6e616f5f91a07df4e9
Author: unexpectedlydefined <91391114+unexpectedlydefined at users.noreply.github.com>
Date: 2026-04-10 (Fri, 10 Apr 2026)
Changed paths:
M llvm/docs/CommandGuide/llvm-dwarfdump.rst
M llvm/test/tools/llvm-dwarfdump/X86/coverage.test
M llvm/tools/llvm-dwarfdump/Coverage.cpp
M llvm/tools/llvm-dwarfdump/llvm-dwarfdump.cpp
M llvm/tools/llvm-dwarfdump/llvm-dwarfdump.h
Log Message:
-----------
[llvm-dwarfdump][LineCov 2/3] Add coverage baseline comparison and line table coverage in isolation (#183790)
Patch 2 of 3 to add to llvm-dwarfdump the ability to measure DWARF
coverage of local variables in terms of source lines, as discussed in
[this
RFC](https://discourse.llvm.org/t/rfc-debug-info-coverage-tool-v2/83266).
This patch adds the ability to compare a variable’s coverage against a
baseline, e.g. an unoptimised compilation of the same code. This is
provided using the optional `--coverage-baseline` argument.
When a baseline is provided, the output also includes a per-variable
measure of the line table’s coverage (`LT`, `LTRatio`), distinct from
the variable’s coverage proper. See section 2.2 of the RFC for details
on this metric.
Commit: 6d2d804a22bf934e3432108e418b5a798c8557a7
https://github.com/llvm/llvm-project/commit/6d2d804a22bf934e3432108e418b5a798c8557a7
Author: Jeff Bailey <jbailey at raspberryginger.com>
Date: 2026-04-10 (Fri, 10 Apr 2026)
Changed paths:
M libc/docs/gpu/building.rst
Log Message:
-----------
[libc][docs][NFC] Rework GPU building documentation (#191381)
Reworked libc/docs/gpu/building.rst to match the style of
getting_started.rst:
* Removed mkdir and cd commands.
* Used -S and -B flags for CMake.
* Used -C flag for Ninja.
* Split commands into smaller blocks with brief explanations.
Use the same terminology as elsewhere in the LLVM libc docs and move
away from the deprecated runtime terms.
* Standard runtimes build -> Bootstrap Build
* Runtimes cross build -> Two-stage Cross-compiler Build
Commit: cc9118831a760dddaaa23c56622b5fbd40dd7604
https://github.com/llvm/llvm-project/commit/cc9118831a760dddaaa23c56622b5fbd40dd7604
Author: Minsoo Choo <minsoochoo0122 at proton.me>
Date: 2026-04-10 (Fri, 10 Apr 2026)
Changed paths:
M lldb/source/Plugins/Process/FreeBSD-Kernel-Core/ProcessFreeBSDKernelCore.cpp
Log Message:
-----------
[lldb][Process/FreeBSDKernelCore] Fix thread ordering (#187976)
In #178306, I made an incorrect assumption that traversing `allproc` in
reverse direction would give incremental pid order based on the fact
that new processes are added at the head of allproc. However, this
assumption is false under certain circumstance such as reusing pid
number, thus failing to sort threads correctly. Without using any
assumption, explicitly sort threads based on pid retrieved from memory.
Fixes: 5349c664fabd49f88c87e31bb3774f40bf938691 (#178306)
---------
Signed-off-by: Minsoo Choo <minsoochoo0122 at proton.me>
Commit: b8ac638c21a582e09bc5b3abb0f53edf0b677fb5
https://github.com/llvm/llvm-project/commit/b8ac638c21a582e09bc5b3abb0f53edf0b677fb5
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2026-04-10 (Fri, 10 Apr 2026)
Changed paths:
M flang/include/flang/Semantics/openmp-utils.h
M flang/lib/Semantics/openmp-utils.cpp
Log Message:
-----------
[flang][OpenMP] Add optional SemanticsContext parameter to loop utili… (#191231)
…ties
Some of the utilities may be used in symbol resolution which is before
the expression analysis is done. In such situations, the typedExpr's
normally stored in parser::Expr may not be available. To be able to
obtain the numeric values of expressions, using the analyzer directly
may be necessary, which requires SemanticsContext to be provided.
Commit: 43d6e3874e67ac1f94482b43a98f595163e8cb6e
https://github.com/llvm/llvm-project/commit/43d6e3874e67ac1f94482b43a98f595163e8cb6e
Author: Yaxun (Sam) Liu <yaxun.liu at amd.com>
Date: 2026-04-10 (Fri, 10 Apr 2026)
Changed paths:
M compiler-rt/lib/interception/interception.h
M compiler-rt/lib/interception/interception_linux.cpp
M compiler-rt/lib/interception/interception_win.cpp
M compiler-rt/lib/interception/tests/interception_linux_test.cpp
Log Message:
-----------
[compiler-rt] Expose shared DSO helpers for compiler-rt runtimes (#191098)
The motivation of this PR is to refactor and expose DSO helper functions
so
they can be used by all compiler-rt libraries, including the profile
library,
without duplicating dlopen/dlsym (non-Windows) or
LoadLibrary/GetProcAddress
(Windows) logic in each runtime.
Implement the helpers in namespace __interception in
interception_linux.cpp for
non-Windows targets and interception_win.cpp for Windows, and use them
from the
existing Linux interception path for RTLD_NEXT/RTLD_DEFAULT/dlvsym
lookups.
This is NFC for existing libraries that already use interception's
public APIs;
sanitizer and interception lit behavior is unchanged.
Commit: b35941eef89a93fef9d080c86d5eafd96216e2c6
https://github.com/llvm/llvm-project/commit/b35941eef89a93fef9d080c86d5eafd96216e2c6
Author: Jay Foad <jay.foad at amd.com>
Date: 2026-04-10 (Fri, 10 Apr 2026)
Changed paths:
M llvm/test/CodeGen/AMDGPU/fptrunc.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.dead.ll
Log Message:
-----------
[AMDGPU] Change *-DAG to *-SDAG in check prefixes (#191411)
In some cases the use of *-DAG seemed to confuse the update scripts
because of the clash with FileCheck's built-in -DAG suffix.
Commit: 8926b3ccbc205662a8543ec5bf6a54c7c42acffb
https://github.com/llvm/llvm-project/commit/8926b3ccbc205662a8543ec5bf6a54c7c42acffb
Author: aokblast <aokblast at FreeBSD.org>
Date: 2026-04-10 (Fri, 10 Apr 2026)
Changed paths:
M lldb/source/Plugins/Process/FreeBSD-Kernel-Core/ProcessFreeBSDKernelCore.cpp
Log Message:
-----------
[LLDB][ProcessFreeBSDKernelCore] Log error when creating kernel image (#191397)
Commit: a7883e5b944c6ee1299eeaa4747ec71353de2b95
https://github.com/llvm/llvm-project/commit/a7883e5b944c6ee1299eeaa4747ec71353de2b95
Author: google-yfyang <yfyang at google.com>
Date: 2026-04-10 (Fri, 10 Apr 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
Log Message:
-----------
[bazel] Fix Bazel build issue with #190862 (#191420)
Fixed 5531990872d464f5644c58e0a90a47eb7d1ae575.
Commit: ca80bda446b50c5124ab653c480decf9ae8b1288
https://github.com/llvm/llvm-project/commit/ca80bda446b50c5124ab653c480decf9ae8b1288
Author: Stephen Long <63318318+steplong at users.noreply.github.com>
Date: 2026-04-10 (Fri, 10 Apr 2026)
Changed paths:
M mlir/lib/Dialect/Linalg/Transforms/Specialize.cpp
M mlir/test/Dialect/Linalg/specialize-generic-ops.mlir
Log Message:
-----------
[MLIR][Linalg] Specialize linalg.generic to linalg.mmt4d (#189719)
Specialize linalg.generic to linalg.mmt4d based on index map
Commit: 457a644051b8d14c903d8171f781df849f269e00
https://github.com/llvm/llvm-project/commit/457a644051b8d14c903d8171f781df849f269e00
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2026-04-10 (Fri, 10 Apr 2026)
Changed paths:
M libcxx/test/std/algorithms/alg.sorting/alg.sort/stable.sort/stable_sort.pass.cpp
Log Message:
-----------
[libc++] Speed up stable_sort.pass.cpp by reducing redundant test coverage (#187368)
We don't need to run the full exhaustive test for all floating points,
as long as we're testing the radix sort code path (which we are, since
radix sort triggers at 1024 elements).
This reduces the test execution time on my machine from 20s to 12s.
Fixes #187329
Commit: 8215fb02a6f749cc756716e1db0bc3ca2a061744
https://github.com/llvm/llvm-project/commit/8215fb02a6f749cc756716e1db0bc3ca2a061744
Author: Brian Cain <brian.cain at oss.qualcomm.com>
Date: 2026-04-10 (Fri, 10 Apr 2026)
Changed paths:
M bolt/include/bolt/Passes/DataflowAnalysis.h
M bolt/lib/Passes/AllocCombiner.cpp
M bolt/lib/Passes/IndirectCallPromotion.cpp
M bolt/lib/Passes/ShrinkWrapping.cpp
M bolt/lib/Passes/TailDuplication.cpp
Log Message:
-----------
[BOLT] Fix iterator bugs (#190978)
Fix iterator misuse in four BOLT passes, caught by _GLIBCXX_DEBUG
(enabled via LLVM_ENABLE_EXPENSIVE_CHECKS=ON).
* AllocCombiner: combineAdjustments() erases instructions while
iterating in reverse via llvm::reverse(BB), invalidating the reverse
iterator. Defer erasures to after the loop using a SmallVector.
* ShrinkWrapping: processDeletions() uses
std::prev(BB.eraseInstruction(II)) which is undefined when II ==
begin(). Restructure to standard forward iteration with erase.
* DataflowAnalysis: run() unconditionally dereferences BB->rbegin(),
which crashes on empty basic blocks (possible after the ShrinkWrapping
fix). Guard with an emptiness check.
* IndirectCallPromotion: rewriteCall() dereferences the end iterator via
&(*IndCallBlock.end()). Replace with &IndCallBlock.back().
* TailDuplication: constantAndCopyPropagate() uses
std::prev(OriginalBB.eraseInstruction(Itr)) which is undefined when Itr
== begin(). Restructure to standard forward iteration with erase.
Commit: c0d4959ac99d89a9896ddc28248ce1c10f06cd22
https://github.com/llvm/llvm-project/commit/c0d4959ac99d89a9896ddc28248ce1c10f06cd22
Author: Piotr Fusik <p.fusik at samsung.com>
Date: 2026-04-10 (Fri, 10 Apr 2026)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp
M llvm/test/Transforms/InstCombine/fold-inc-of-add-of-not-x-and-y-to-sub-x-from-y.ll
Log Message:
-----------
[InstCombine] Generalize `(A + 1) + ~B` fold to any constant (#188271)
Example:
int foo(int a, int b) { return a - 1 + ~b; }
Before, on AArch64:
mvn w8, w1
add w8, w0, w8
sub w0, w8, #1
After (matches gcc):
sub w0, w0, w1
sub w0, w0, #2
Proof: https://alive2.llvm.org/ce/z/g_bV01
Commit: 7cf82070a15d3532dedca1d039361f9204ff7f71
https://github.com/llvm/llvm-project/commit/7cf82070a15d3532dedca1d039361f9204ff7f71
Author: Ramkumar Ramachandra <artagnon at tenstorrent.com>
Date: 2026-04-10 (Fri, 10 Apr 2026)
Changed paths:
M llvm/include/llvm/Support/PatternMatchHelpers.h
Log Message:
-----------
[PatternMatchHelpers] Improve compile time of m_Combine(And|Or) (#191413)
Squelch the stage-2 compile time regression introduced by the variadic
m_Combine(And|Or) matchers, by replacing the std::apply on a std::tuple
with a recursive inheritance.
Commit: 6ef4e889a220faaac95406cec206763178049a53
https://github.com/llvm/llvm-project/commit/6ef4e889a220faaac95406cec206763178049a53
Author: bahareh-farhadi <53280095+bahareh-farhadi at users.noreply.github.com>
Date: 2026-04-10 (Fri, 10 Apr 2026)
Changed paths:
M llvm/test/Examples/lit.local.cfg
M llvm/test/ExecutionEngine/lit.local.cfg
Log Message:
-----------
Mark llvm/test/ExecutionEngine and llvm/test/Examples tests as UNSUPPORTED for zOS (#190835)
Tests in `llvm/test/Examples` and `llvm/test/ExecutionEngine` use JIT
which is unsupported for zOS causing the tests to fail.
---------
Co-authored-by: Bahareh Farhadi <bahareh.farhadi at ibm.com>
Commit: 078c43c582f0cd0a7c925abcd9eefdf9f63b2040
https://github.com/llvm/llvm-project/commit/078c43c582f0cd0a7c925abcd9eefdf9f63b2040
Author: Mircea Trofin <mtrofin at google.com>
Date: 2026-04-10 (Fri, 10 Apr 2026)
Changed paths:
M llvm/test/Transforms/Inline/ML/Inputs/test-module.ll
M llvm/test/Transforms/Inline/ML/ml-test-development-mode.ll
Log Message:
-----------
Fix ml inliner tests after PR #190168 (#191431)
The default inliner policy changed slighlty, which was expected after PR
#190168.
Commit: 15e46e25f26c8bb6606800bdb2c1d1fecf981291
https://github.com/llvm/llvm-project/commit/15e46e25f26c8bb6606800bdb2c1d1fecf981291
Author: Mircea Trofin <mtrofin at google.com>
Date: 2026-04-10 (Fri, 10 Apr 2026)
Changed paths:
M llvm/utils/profcheck-xfail.txt
Log Message:
-----------
Add new coro test to profcheck-xfail (#191436)
Coro haven't yet been fixed up for profcheck, so new tests are likely to
fail.
mtune.ll exercises loop vectorizer (not fixed)
Commit: c6bcd194259e276aacadae8ac0d25680afc9489d
https://github.com/llvm/llvm-project/commit/c6bcd194259e276aacadae8ac0d25680afc9489d
Author: Jan André Reuter <j.reuter at fz-juelich.de>
Date: 2026-04-10 (Fri, 10 Apr 2026)
Changed paths:
M openmp/runtime/src/kmp_ftn_entry.h
M openmp/runtime/test/ompt/callback.h
M openmp/runtime/test/ompt/misc/control_tool.c
A openmp/runtime/test/ompt/misc/control_tool_before_directive.c
A openmp/runtime/test/ompt/misc/control_tool_no_callback.c
M openmp/runtime/test/ompt/misc/control_tool_no_ompt_support.c
Log Message:
-----------
[OpenMP][OMPT] Fix `omp_control_tool` before any directive (#191429)
When a user calls `omp_control_tool`, a tool is attached and it
registered the `ompt_control_tool` callback, the tool should receive a
callback with the users arguments.
However, in #112924, it was discovered that this only happens after at
least one host side directive or runtime call calling into
`__kmp_do_middle_initialize` has been executed.
The check for `__kmp_init_middle` in `FTN_CONTROL_TOOL` did not try to
do the middle initialization and instead always returned `-2` (no tool).
A tool therefore received no callback. The user program did not get the
info that there is a tool attached. To fix this, change the explicit
return to a call of `__kmp_middle_initialize()`, as done in several
other places of `libomp`.
Further handling is then done in `__kmp_control_tool`, where the values
`-2` (no tool), `-1` (no callback), or the tools return value are
returned.
Also expand the tests to introduce checks where no callaback is
registered, or `omp_control_tool` is called before any OpenMP directive.
Fixes #112924
CC @jprotze, @hansangbae
Signed-off-by: Jan André Reuter <j.reuter at fz-juelich.de>
Commit: aeda856d2fafcbc969979abfb88010ce0fe90452
https://github.com/llvm/llvm-project/commit/aeda856d2fafcbc969979abfb88010ce0fe90452
Author: Naveen Seth Hanig <naveen.hanig at outlook.com>
Date: 2026-04-10 (Fri, 10 Apr 2026)
Changed paths:
M clang/lib/Driver/ModulesDriver.cpp
Log Message:
-----------
[clang][modules-driver] Apply rule-of-five to CompilationGraph types (NFC) (#191430)
CompilationGraph owns all nodes and edges via `unique_ptr`, but exposes
pointers to the underlying objects. Make them non-movable to maintain
stable addresses.
Make them non-copyable since we don't want to copy `Command` objects
they hold or create duplicate root nodes.
Apply full rule-of-five to `CompilationGraph`.
Commit: 75ceda1fcc7d10eecba91c2c6bd965f3a3868ba1
https://github.com/llvm/llvm-project/commit/75ceda1fcc7d10eecba91c2c6bd965f3a3868ba1
Author: Naveen Seth Hanig <naveen.hanig at outlook.com>
Date: 2026-04-10 (Fri, 10 Apr 2026)
Changed paths:
M clang/lib/Driver/ModulesDriver.cpp
Log Message:
-----------
[clang][modules-driver] Extract logic to feed jobs back into Compilation (NFC) (#191441)
Commit: 606b2a449a55266dae2de18f84aa3bef0c06a562
https://github.com/llvm/llvm-project/commit/606b2a449a55266dae2de18f84aa3bef0c06a562
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-04-10 (Fri, 10 Apr 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
Log Message:
-----------
[LegalizeIntegerTypes] Remove some unnecessary isTypeLegal checks from IntegerExpandSetCCOperands. NFC (#191353)
LHSLo and RHSLo must have the same type, we don't need to check both.
Same for LHSHi and RHSHi.
Commit: 0adf9b6f33d12e99284db70a1aef485fa6cabe3c
https://github.com/llvm/llvm-project/commit/0adf9b6f33d12e99284db70a1aef485fa6cabe3c
Author: John Harrison <harjohn at google.com>
Date: 2026-04-10 (Fri, 10 Apr 2026)
Changed paths:
M lldb/tools/lldb-dap/DAP.cpp
M lldb/tools/lldb-dap/Handler/EvaluateRequestHandler.cpp
M lldb/tools/lldb-dap/LLDBUtils.cpp
M lldb/tools/lldb-dap/LLDBUtils.h
Log Message:
-----------
[lldb-dap] Address a race condition in server mode. (#191062)
While running in server mode, multiple clients can be connected at the
same time. In LLDBUtils we had a static mutex that can cause other
clients to hang due to the single static lock.
Instead, I adjusted the logic to take the existing SBMutex as a paremter
and guard that mutex during command handling.
Commit: 33a4dff19fa013734057af130c8561d61e6a0764
https://github.com/llvm/llvm-project/commit/33a4dff19fa013734057af130c8561d61e6a0764
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-04-10 (Fri, 10 Apr 2026)
Changed paths:
M llvm/include/llvm/CodeGen/AsmPrinter.h
M llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
Log Message:
-----------
[AsmPrinter] Explicitly use EHStreamer type for EHHandlers (#191288)
There is a note here that this causes warnings on some compilers, but it
is unclear what compilers. Clang does not warn on this, and this is the
only compiler that we guarantee to be warning free.
Also update uses of update handle additions to add to the right arrays.
Commit: aca430027b0a308f6206dfbd7e66f57faf8a7700
https://github.com/llvm/llvm-project/commit/aca430027b0a308f6206dfbd7e66f57faf8a7700
Author: google-yfyang <yfyang at google.com>
Date: 2026-04-10 (Fri, 10 Apr 2026)
Changed paths:
M compiler-rt/lib/interception/interception_linux.cpp
Log Message:
-----------
[compiler-rt] Address dlvsym not found compilation error when targeting certain platforms (#191444)
#191098 Add some unguarded dlvsym calls. This causes build issues when
targeting certain platforms such as iOS.
This change should restore the original behavior.
Commit: d5048392b9a73b22ba9758789812ef22c75271fb
https://github.com/llvm/llvm-project/commit/d5048392b9a73b22ba9758789812ef22c75271fb
Author: Justin Bogner <mail at justinbogner.com>
Date: 2026-04-10 (Fri, 10 Apr 2026)
Changed paths:
M llvm/lib/DebugInfo/GSYM/FileWriter.cpp
M llvm/lib/DebugInfo/GSYM/GsymCreator.cpp
Log Message:
-----------
[gsymutil] Fix a warning on systems with 32-bit `off_t` (#189524)
The size of `off_t` isn't specified, so it can be either 32 or 64 bits
depending on the system. In particular, on LLP64 systems like windows
it's generally only 32 bits. This means the `if (StrtabSize >
UINT32_MAX)` check added in #181458 may warn on such systems (Giving
-Wsign-compare).
Given that `FileWriter::tell` (and the underlying `raw_ostream::tell`)
explicitly return `uint64_t`, the simplest fix is to just use the return
type of the function instead of potentially truncating. Since the same
logic applies even where we don't happen to have a warning here, I've
applied this for all of these uses of `off_t`.
Commit: 98845fccd93865417dc732251fdc09e3eb15edb8
https://github.com/llvm/llvm-project/commit/98845fccd93865417dc732251fdc09e3eb15edb8
Author: Luke Hutton <luke.hutton at arm.com>
Date: 2026-04-10 (Fri, 10 Apr 2026)
Changed paths:
M mlir/lib/Dialect/Tosa/Transforms/TosaValidation.cpp
M mlir/test/Dialect/Tosa/dynamic_extension.mlir
M mlir/test/Dialect/Tosa/invalid.mlir
M mlir/test/Dialect/Tosa/invalid_extension.mlir
M mlir/test/Dialect/Tosa/level_check.mlir
M mlir/test/Dialect/Tosa/tosa-validation-version-1p1-valid.mlir
Log Message:
-----------
[mlir][tosa] Disallow shape type in function argument/return types (#175754)
This commit adds an additional check to the TOSA validation pass to
disallow use of shape types in function arguments and return types. The
specification requires these types be tensor types.
Commit: f5eb99ac14a1ca5f2a9771ada2c8c672b430f253
https://github.com/llvm/llvm-project/commit/f5eb99ac14a1ca5f2a9771ada2c8c672b430f253
Author: Kai Nacke <kai.peter.nacke at ibm.com>
Date: 2026-04-10 (Fri, 10 Apr 2026)
Changed paths:
M llvm/lib/MC/GOFFObjectWriter.cpp
M llvm/lib/Target/SystemZ/MCTargetDesc/SystemZHLASMAsmStreamer.cpp
M llvm/lib/Target/SystemZ/SystemZAsmPrinter.cpp
M llvm/test/CodeGen/SystemZ/zos-symbol-2.ll
Log Message:
-----------
[SystemZ][GOFF] Reference to external variable needs PR symbol (#185742)
Variables are modelled as parts in the GOFF format. Referencing a
variable defined in a different compilation unit
requires to use a PR symbol instead of an EX symbol (created by the
EXTRN/WXTERN instruction). Those PR symbols need to refer to a
ED symbol, for which the ED symbol of the ADA is used.
Commit: 16e015b5a68f807d24681cba8190ffa08df2dc16
https://github.com/llvm/llvm-project/commit/16e015b5a68f807d24681cba8190ffa08df2dc16
Author: Ilia Kuklin <ikuklin at accesssoftek.com>
Date: 2026-04-10 (Fri, 10 Apr 2026)
Changed paths:
M lldb/include/lldb/Symbol/CompilerType.h
M lldb/include/lldb/Symbol/TypeSystem.h
M lldb/source/Plugins/TypeSystem/Clang/TypeSystemClang.cpp
M lldb/source/Plugins/TypeSystem/Clang/TypeSystemClang.h
M lldb/source/Symbol/CompilerType.cpp
M lldb/source/Symbol/TypeSystem.cpp
M lldb/source/ValueObject/DILEval.cpp
Log Message:
-----------
[NFC][lldb] Use `ASTContext::getPromotedIntegerType` for integral promotion in DIL (#191448)
Commit: 027821479ee95d6ade3c5c488ae0b6c1b017fbfa
https://github.com/llvm/llvm-project/commit/027821479ee95d6ade3c5c488ae0b6c1b017fbfa
Author: NeKon69 <nobodqwe at gmail.com>
Date: 2026-04-10 (Fri, 10 Apr 2026)
Changed paths:
M clang/include/clang/Analysis/Analyses/LifetimeSafety/FactsGenerator.h
M clang/lib/Analysis/LifetimeSafety/FactsGenerator.cpp
M clang/lib/Sema/AnalysisBasedWarnings.cpp
M clang/test/Sema/warn-lifetime-safety.cpp
Log Message:
-----------
[LifetimeSafety] Fix crash on ternary operator when one of the expressions is `throw` (#190345)
Ternary operator now doesn't flow origins from `[[noreturn]]` arms,
including `throw` statements.
Closes #183895
Commit: 05bfe73bf6b5311f01503d81996d1e714c6cce81
https://github.com/llvm/llvm-project/commit/05bfe73bf6b5311f01503d81996d1e714c6cce81
Author: google-yfyang <yfyang at google.com>
Date: 2026-04-10 (Fri, 10 Apr 2026)
Changed paths:
M compiler-rt/lib/interception/interception_linux.cpp
Log Message:
-----------
[compiler-rt] Address dlvsym not found compilation error when targeting certain platforms (try 2) (#191458)
The previous attempt #191444 was incomplete.
Commit: be1bc283c610c2b5610e7f7fcdcb78e6ccdb6911
https://github.com/llvm/llvm-project/commit/be1bc283c610c2b5610e7f7fcdcb78e6ccdb6911
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-04-10 (Fri, 10 Apr 2026)
Changed paths:
M clang/lib/Driver/Driver.cpp
M clang/test/Driver/amdgpu-features.c
M clang/test/Driver/amdgpu-toolchain.c
Log Message:
-----------
[Clang] Permit '--target=amdgcn--' for binaries (#191451)
Summary:
We always accepted `--target=amdgcn--` to create IR object files but it
doesn't allow creating actual binaries without user intervention. This
is because it would fall-through to the GCC toolchain which does not
know how to handle AMGCN / AMDGPU targets. This PR just adds a single
line to handle it, which effectively allows this as a 'bare' target.
Perhaps the argument could be made that AMDGPU should not support
anything but strictly HSA because it has many assumptions in the
compiler itself, such as implicit arguments, but I feel like it is
relatively harmless to support this case if users decide they really do
not need it.
Commit: c94f79886035a61bb5f3dc992f75fe0c08bdcd4b
https://github.com/llvm/llvm-project/commit/c94f79886035a61bb5f3dc992f75fe0c08bdcd4b
Author: HighW4y2H3ll <zhenghaohuu at gmail.com>
Date: 2026-04-10 (Fri, 10 Apr 2026)
Changed paths:
M llvm/include/llvm/ProfileData/SampleProf.h
Log Message:
-----------
Strip .llvm. suffix after removing the coroutine suffixes to avoid breaking pseudo probe (#191354)
Pseudo probe is currently broken when a coroutine function is promoted
with a global name during ThinLTO import. The top-level function GUID in
.pseudo_probe section are computed from the promoted name (with
".llvm.xxxx" suffix) instead of the original function name. Then it will
cause a dangling top-level GUID that doesn't have any reference in the
pseudo probe desc, and potentially hurt profile quality.
The root cause of the issue were:
1) ThinLTO post-link imports and promotes a local coroutine function,
creating a global function with ".llvm.xxxx" suffix.
2) https://github.com/llvm/llvm-project/pull/141889 introduces a change
in CoroSplit pass that updates the coroutine functions linkage name with
the ".cleanup", ".destroy", ".resume" suffixes, and this creates
top-level functions with ".llvm.xxxx.cleanup", ".llvm.xxxx.destroy",
".llvm.xxxx.resume" suffixes.
3) PseudoProbePrinter and PseudoProbeInserter only strips coroutine
suffix, and didn't consider the ".llvm." suffix.
This patch fixes the issue in step 3)
Commit: 95778b2689add85ea6c3abf342358857278669fe
https://github.com/llvm/llvm-project/commit/95778b2689add85ea6c3abf342358857278669fe
Author: Alexis Engelke <engelke at in.tum.de>
Date: 2026-04-10 (Fri, 10 Apr 2026)
Changed paths:
M llvm/include/llvm/ADT/PostOrderIterator.h
Log Message:
-----------
[ADT][NFC] Make po iterator stack entry trivially copyable (#191290)
std::tuple is not trivially copyable, leading to the use of less
efficient SmallVector implementations. Additionally, named members are
more readable than std::get<N>.
Also make sure that successors() is called only once per traversed basic
block -- this is difficult here: when the begin iterator is stored in
the vector between the calls, the second call can't be eliminated due to
the potentially visible store. When copying the entry into the vector,
SmallVector exposes the address of the alloca via ptrtoint to ensure
that the object indeed doesn't reside in the vector. We're missing
some optimization here... so very carefully work around this problem.
Commit: 5cf1a5d5ea187ad040ea13feb32e462858bf40cd
https://github.com/llvm/llvm-project/commit/5cf1a5d5ea187ad040ea13feb32e462858bf40cd
Author: Eli Friedman <efriedma at qti.qualcomm.com>
Date: 2026-04-10 (Fri, 10 Apr 2026)
Changed paths:
M clang/lib/CodeGen/CGCall.cpp
M clang/lib/CodeGen/TargetInfo.cpp
M clang/test/CodeGenOpenCL/addr-space-struct-arg.cl
M clang/test/CodeGenOpenCL/bool_cast.cl
M clang/test/CodeGenOpenCL/cl-uniform-wg-size.cl
M clang/test/CodeGenOpenCL/cl20-device-side-enqueue.cl
M clang/test/CodeGenOpenCL/kernel-attributes.cl
M clang/test/CodeGenOpenCL/kernel-metadata.cl
M clang/test/CodeGenOpenCL/kernel-param-alignment.cl
M clang/test/CodeGenOpenCL/kernels-have-spir-cc-by-default.cl
M clang/test/CodeGenOpenCL/opencl-kernel-call.cl
M clang/test/CodeGenOpenCL/pipe_types.cl
M clang/test/CodeGenOpenCL/pipe_types_mangling.cl
M clang/test/CodeGenOpenCL/sampler.cl
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
R llvm/test/CodeGen/RISCV/spir-kernel-cc.ll
Log Message:
-----------
Stop using spir_kernel calling convention on non-SPIR targets. (#191090)
This behavior traces back to fc2629a65a05fa05bc5c5bc37cf910c8e41cdac3 ,
but neither the commit message or the reviews actually justify using
this calling convention. The actual behavior which is important for that
change is the way clang calling convention lowering works.
There isn't really any other reason to use spir_kernel: every non-SPIR
target either rejects it, or treats it as the C calling convention. So
let's stop doing it.
Fixes #157028.
Commit: 2cf353b5e8560723409f3f9164bddec76f499963
https://github.com/llvm/llvm-project/commit/2cf353b5e8560723409f3f9164bddec76f499963
Author: NeKon69 <nobodqwe at gmail.com>
Date: 2026-04-10 (Fri, 10 Apr 2026)
Changed paths:
M clang/lib/Analysis/LifetimeSafety/FactsGenerator.cpp
M clang/test/Sema/warn-lifetime-analysis-nocfg.cpp
M clang/test/Sema/warn-lifetime-safety.cpp
Log Message:
-----------
[LifetimeSafety] Flow origins from lifetimebound args in `gsl::Pointer` construction (#189907)
This PR adds origin flow from `[[clang::lifetimebound]]` constructor
arguments during `gsl::Pointer` construction.
Fixes #175898
Commit: c801f0c797350269d2e7869a08d28ab16c762053
https://github.com/llvm/llvm-project/commit/c801f0c797350269d2e7869a08d28ab16c762053
Author: Congzhe <congzhe.cao at huawei.com>
Date: 2026-04-10 (Fri, 10 Apr 2026)
Changed paths:
M llvm/include/llvm/Transforms/Utils/UnrollLoop.h
M llvm/lib/Transforms/Scalar/LoopUnrollPass.cpp
M llvm/lib/Transforms/Utils/LoopUnroll.cpp
M llvm/lib/Transforms/Utils/LoopUnrollAndJam.cpp
Log Message:
-----------
[LoopUnrollAndJam] Fix out-of-date LoopInfo being used during unroll and jam (#191250)
Fixed issue #190671, where loop unroll and jam did not update LoopInfo
entirely correctly.
Invalid LoopInfo gets passed into `simplifyLoopAfterUnroll()` and is
further called by SCEV at the beginning of
`ScalarEvolution::createSCEVIter()`, which triggered hidden bugs. To
fix, updated LoopInfo correctly before its use.
The loop blocks that `simplifyLoopAfterUnroll()` iterates
through, will become unavailable after the LoopInfo update. Therefore we
store the loop blocks beforehand for its use in
`simplifyLoopAfterUnroll()` later.
Commit: 8295c74dc06bc673d3a6ac45f07b587b43631715
https://github.com/llvm/llvm-project/commit/8295c74dc06bc673d3a6ac45f07b587b43631715
Author: Jun Wang <jwang_2024 at outlook.com>
Date: 2026-04-10 (Fri, 10 Apr 2026)
Changed paths:
A llvm/docs/AMDGPU/AMDGPUAsmGFX950.rst
A llvm/docs/AMDGPU/gfx950_operands.rst
M llvm/docs/AMDGPUModifierSyntax.rst
M llvm/docs/AMDGPUUsage.rst
Log Message:
-----------
[AMDGPU] Documentation files for GFX950 instructions (#184710)
Checking in documentation files for GFX950 instructions.
Commit: 03bb8745a0e886934f93e5639637f42db2f2575f
https://github.com/llvm/llvm-project/commit/03bb8745a0e886934f93e5639637f42db2f2575f
Author: David Justo <david.justo.1996 at gmail.com>
Date: 2026-04-10 (Fri, 10 Apr 2026)
Changed paths:
M compiler-rt/test/asan/TestCases/disable_container_overflow_checks.c
Log Message:
-----------
Disable MSVC-incompatible portions of `disable_container_overflow_checks` for MSVC (#191456)
**Context:**
The test `disable_container_overflow_checks` recently started running on
Windows, as per:
https://github.com/llvm/llvm-project/pull/181721/changes
As a result, the MSVC ASan fork of LLVM ASan started executing this
test, which has been failing for 2 reasons.
1) MSVC does not support the `__has_feature` syntax.
2) The `__SANITIZER_DISABLE_CONTAINER_OVERFLOW__` macro is not supported
in MSVC ASan (we have an equivalent in `_DISABLE_STL_ANNOTATION`)
because `__SANITIZER_DISABLE_CONTAINER_OVERFLOW__` also invokes
MSVC-incompatible syntax.
**This PR** addresses these two failures.
For (1), we replace:
```C++
#if __has_feature(address_sanitizer)
```
with
```C++
// compilers such as MSVC do not support `__has_feature`
#ifndef __has_feature
#define __has_feature(x) 0
#endif
// MSVC defines `__SANITIZE_ADDRESS__`
#if __has_feature(address_sanitizer) || defined(__SANITIZE_ADDRESS__)
```
and for (2), we disable the tests for
`__SANITIZER_DISABLE_CONTAINER_OVERFLOW__` for MSVC.
Commit: d5a8af542ee8afb16e7ac42277953e74e59f9bd7
https://github.com/llvm/llvm-project/commit/d5a8af542ee8afb16e7ac42277953e74e59f9bd7
Author: Frederik Harwath <frederik.harwath at amd.com>
Date: 2026-04-10 (Fri, 10 Apr 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUIGroupLP.cpp
Log Message:
-----------
[AMDGPU] IGroupLP: Fix BestCost assignment in greedy solver (NFC) (#186995)
The greedy solver's greedyFind method incorrectly reports the cost of
the last processed group instead of the best one. In practice, this does
not have any effect since (1) the cost is only used to decide whether
or not to run the exact solver and for this it only matters if it is
zero or not, and (2) the edges of the best group are used correctly.
But it clearly is conceptually wrong.
Use the best group cost, refactor how the information about the best
group is represented, and add debug output which outputs the greedy
solver's overall cost.
Commit: e3589e89671c4dd7f5ebed031ec1beb0f43772c9
https://github.com/llvm/llvm-project/commit/e3589e89671c4dd7f5ebed031ec1beb0f43772c9
Author: Paul Kirth <paulkirth at google.com>
Date: 2026-04-10 (Fri, 10 Apr 2026)
Changed paths:
M clang-tools-extra/test/Unit/CMakeLists.txt
Log Message:
-----------
[clang-doc] Make test alias depend on the unit test binary (#190014)
Without DEPENDS, this doesn't seem to rebuild the ClangDocTests target.
Commit: b99c146598839b5b5613bd6921d1846e7aeaf1ae
https://github.com/llvm/llvm-project/commit/b99c146598839b5b5613bd6921d1846e7aeaf1ae
Author: Paul Kirth <paulkirth at google.com>
Date: 2026-04-10 (Fri, 10 Apr 2026)
Changed paths:
M clang-tools-extra/clang-doc/BitcodeReader.cpp
M clang-tools-extra/clang-doc/BitcodeWriter.cpp
M clang-tools-extra/clang-doc/JSONGenerator.cpp
M clang-tools-extra/clang-doc/MDGenerator.cpp
M clang-tools-extra/clang-doc/Representation.cpp
M clang-tools-extra/clang-doc/Representation.h
M clang-tools-extra/clang-doc/Serialize.cpp
M clang-tools-extra/clang-doc/YAMLGenerator.cpp
M clang-tools-extra/unittests/clang-doc/BitcodeTest.cpp
M clang-tools-extra/unittests/clang-doc/MDGeneratorTest.cpp
M clang-tools-extra/unittests/clang-doc/MergeTest.cpp
M clang-tools-extra/unittests/clang-doc/YAMLGeneratorTest.cpp
Log Message:
-----------
[clang-doc] Make CommentInfo arena allocated (#190050)
This patch move the CommentInfo type into the arena. It updates block
handling to collect child info types and serialize the array in one
shot.
We also clean up the test code to avoid using the arenas in the tests.
This has the upside of making the test more hermetic, and avoids churn
in the related code as the allocation API interfaces evolve.
Performance and memory usage regress slightly. This is somewhat expected
as we do not yet aggressively release short term memory during merge
operations. Future patches will reclaim this overhead.
| Metric | Baseline | Prev | This | Culm% | Seq% |
| :--- | :--- | :--- | :--- | :--- | :--- |
| Time | 920.5s | 998.5s | 1010.5s | +9.8% | +1.2% |
| Memory | 86.0G | 43.8G | 47.8G | -44.4% | +9.2% |
| Benchmark | Baseline | Prev | This | Culm% | Seq% |
| :--- | :--- | :--- | :--- | :--- | :--- |
| BM_BitcodeReader_Scale/10 | 67.9us | 68.8us | 68.7us | +1.1% | -0.2% |
| BM_BitcodeReader_Scale/10000 | 70.5ms | 24.5ms | 23.8ms | -66.2% |
-2.8% |
| BM_BitcodeReader_Scale/4096 | 23.2ms | 4.4ms | 4.4ms | -80.9% | -0.0%
|
| BM_BitcodeReader_Scale/512 | 509.4us | 538.6us | 538.3us | +5.7% |
-0.1% |
| BM_BitcodeReader_Scale/64 | 114.8us | 116.9us | 116.8us | +1.8% |
-0.1% |
| BM_Index_Insertion/10 | 2.3us | 4.2us | 3.8us | +65.6% | -8.2% |
| BM_Index_Insertion/10000 | 3.1ms | 5.3ms | 5.1ms | +61.7% | -5.4% |
| BM_Index_Insertion/4096 | 1.3ms | 2.1ms | 2.0ms | +56.8% | -6.1% |
| BM_Index_Insertion/512 | 153.6us | 257.2us | 243.3us | +58.5% | -5.4%
|
| BM_Index_Insertion/64 | 18.1us | 30.5us | 29.1us | +61.1% | -4.8% |
| BM_JSONGenerator_Scale/10 | 36.8us | 36.6us | 37.6us | +2.2% | +2.9% |
| BM_JSONGenerator_Scale/10000 | 89.6ms | 90.2ms | 91.1ms | +1.6% |
+1.0% |
| BM_JSONGenerator_Scale/4096 | 33.7ms | 34.5ms | 35.0ms | +3.7% | +1.3%
|
| BM_JSONGenerator_Scale/512 | 1.9ms | 1.9ms | 2.0ms | +1.8% | +1.7% |
| BM_JSONGenerator_Scale/64 | 222.4us | 218.7us | 226.7us | +1.9% |
+3.7% |
| BM_Mapper_Scale/10 | 2.5ms | 2.5ms | 2.5ms | +0.7% | +1.9% |
| BM_Mapper_Scale/10000 | 104.3ms | 106.1ms | 105.5ms | +1.1% | -0.6% |
| BM_Mapper_Scale/4096 | 44.3ms | 45.0ms | 44.5ms | +0.3% | -1.1% |
| BM_MergeInfos_Scale/10000 | 12.2ms | 2.0ms | 1.9ms | -84.8% | -7.1% |
| BM_MergeInfos_Scale/2 | 1.9us | 1.8us | 1.7us | -7.9% | -2.1% |
| BM_MergeInfos_Scale/4096 | 2.8ms | 574.7us | 531.2us | -80.9% | -7.6%
|
| BM_MergeInfos_Scale/512 | 68.9us | 39.6us | 36.5us | -47.0% | -7.9% |
| BM_MergeInfos_Scale/64 | 10.3us | 6.5us | 6.0us | -41.3% | -7.0% |
| BM_MergeInfos_Scale/8 | 2.8us | 2.2us | 2.2us | -22.4% | -2.8% |
Note that I used an LLM to help update test code.
Commit: 6ce84819d2de76b4c747b433e9bc7ec43cefb186
https://github.com/llvm/llvm-project/commit/6ce84819d2de76b4c747b433e9bc7ec43cefb186
Author: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
Date: 2026-04-10 (Fri, 10 Apr 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPULowerVGPREncoding.cpp
M llvm/test/CodeGen/AMDGPU/hazard-setreg-vgpr-msb-gfx1250.mir
M llvm/test/CodeGen/AMDGPU/vgpr-setreg-mode-swar.mir
Log Message:
-----------
[AMDGPU] Always update SETREG MSBs if offset is 0 (#191362)
We can always update immediate if Offset is zero. The bits
HW will write are always at the same position if offset is 0.
In particular it removes redundant mode changes created as seen
in the hazard-setreg-vgpr-msb-gfx1250.mir.
This still relies on the wrong behavior that SETREG updates
MSBs, so it will have to be changed later. Test immediates may be
off from desired for that reason in this patch.
Commit: f0004d8143b346e0f5a13b4021f348165e27fb9a
https://github.com/llvm/llvm-project/commit/f0004d8143b346e0f5a13b4021f348165e27fb9a
Author: Christopher Ferris <cferris1000 at users.noreply.github.com>
Date: 2026-04-10 (Fri, 10 Apr 2026)
Changed paths:
M compiler-rt/lib/scudo/standalone/combined.h
M compiler-rt/lib/scudo/standalone/tests/combined_test.cpp
Log Message:
-----------
[scudo] Remove fill when realloc to smaller size. (#191321)
In the reallocate function, when there is a realloc smaller than the
current size, the code would attempt to fill in the bytes after the new
size. This doesn't really add any extra security and is mostly a waste
of time, so skip it.
Remove the test that verifies this functionality.
Commit: 1a3cf72213adba014c0a8ee7a6377212c635c135
https://github.com/llvm/llvm-project/commit/1a3cf72213adba014c0a8ee7a6377212c635c135
Author: Ziqing Luo <ziqing_luo at apple.com>
Date: 2026-04-10 (Fri, 10 Apr 2026)
Changed paths:
A clang/include/clang/ScalableStaticAnalysisFramework/Analyses/EntityPointerLevel/EntityPointerLevel.h
M clang/include/clang/ScalableStaticAnalysisFramework/Analyses/UnsafeBufferUsage/UnsafeBufferUsage.h
M clang/include/clang/ScalableStaticAnalysisFramework/Analyses/UnsafeBufferUsage/UnsafeBufferUsageExtractor.h
M clang/lib/ScalableStaticAnalysisFramework/Analyses/CMakeLists.txt
A clang/lib/ScalableStaticAnalysisFramework/Analyses/EntityPointerLevel/EntityPointerLevel.cpp
M clang/lib/ScalableStaticAnalysisFramework/Analyses/UnsafeBufferUsage/UnsafeBufferUsage.cpp
M clang/lib/ScalableStaticAnalysisFramework/Analyses/UnsafeBufferUsage/UnsafeBufferUsageExtractor.cpp
M clang/unittests/ScalableStaticAnalysisFramework/Analyses/UnsafeBufferUsage/UnsafeBufferUsageTest.cpp
Log Message:
-----------
[NFC][SSAF] Move EntityPointerLevel to a separate folder (#191331)
EntityPointerLevel will later be shared with other summaries besides
UnsafeBufferUsage. This commit moves it to a separate file.
Commit: 86c307d96698b8e49eb912e06e796567c3df7daf
https://github.com/llvm/llvm-project/commit/86c307d96698b8e49eb912e06e796567c3df7daf
Author: Paul Kirth <paulkirth at google.com>
Date: 2026-04-10 (Fri, 10 Apr 2026)
Changed paths:
M clang-tools-extra/clang-doc/Representation.cpp
Log Message:
-----------
[clang-doc] Consolidate merging logic (#190051)
As we migrate things in the arena, this logic may get more complex.
Factoring it out now, will give clear extension points to make this
easier to manage.
Commit: 2cd49f77f734990cc78fd1b37bcc6cac5a71d5c1
https://github.com/llvm/llvm-project/commit/2cd49f77f734990cc78fd1b37bcc6cac5a71d5c1
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2026-04-10 (Fri, 10 Apr 2026)
Changed paths:
M flang/include/flang/Semantics/openmp-utils.h
M flang/lib/Semantics/check-omp-loop.cpp
M flang/lib/Semantics/openmp-utils.cpp
M flang/test/Semantics/OpenMP/fuse1.f90
M flang/test/Semantics/OpenMP/loop-transformation-clauses01.f90
Log Message:
-----------
[flang][OpenMP] Rename GetRequiredCount to GetMinimumSequenceCount (#191465)
The new name better describes the calculated value.
Also adjust a diagnostic message to say that *at least* N loops are
expected in the sequence.
Commit: e4b93b70c92ffc581a16578acc2ef58e02824076
https://github.com/llvm/llvm-project/commit/e4b93b70c92ffc581a16578acc2ef58e02824076
Author: Michael Jones <michaelrj at google.com>
Date: 2026-04-10 (Fri, 10 Apr 2026)
Changed paths:
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/include/stdio.yaml
M libc/src/stdio/CMakeLists.txt
M libc/src/stdio/generic/CMakeLists.txt
A libc/src/stdio/generic/rewind.cpp
A libc/src/stdio/rewind.h
M libc/test/src/stdio/CMakeLists.txt
A libc/test/src/stdio/rewind_test.cpp
Log Message:
-----------
[libc] implement rewind (#191302)
Add the "rewind" function defined in the C standard, and adds tests.
Commit: 05ffd0dc29bccc839b453b94918ba8e088f4397c
https://github.com/llvm/llvm-project/commit/05ffd0dc29bccc839b453b94918ba8e088f4397c
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2026-04-10 (Fri, 10 Apr 2026)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIRTypes.td
M clang/lib/CIR/CodeGen/CIRGenExprConstant.cpp
M clang/lib/CIR/CodeGen/CIRGenModule.cpp
M clang/lib/CIR/CodeGen/CIRGenModule.h
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
A clang/test/CIR/CodeGen/global-ptr-init.cpp
Log Message:
-----------
[CIR] Handle globals with vptr init (#191291)
When a class contains virtual functions but no data members and has a
trivial constructor, global variables of that type are initialized with
a vptr. CIR was incorrectly creating the global variable with the type
of the vtable (an anonymous record) rather than the class type.
When replacing structors with aliases, we were calling a function to
update argument types at the call sites, but this was only necessary
because we initially generated the call using the same incorrect type
that we used for the global. The type correction wasn't implemented
because we hadn't encountered a case where it was needed. Having found
such a case led me to diagnose the problem as above, and I verified that
the same test case compiled without -mconstructor-aliases just failed in
the verifier because we never hit the replacement code. I'm now
convinced that this argument type fixup isn't necessary, so I replaced
the fixup function with an assert.
Assisted-by: Cursor / claude-4.6-opus-high
Commit: 2ae4ddd720a9702e8aac6094c3930bfeac8fc325
https://github.com/llvm/llvm-project/commit/2ae4ddd720a9702e8aac6094c3930bfeac8fc325
Author: Ziqing Luo <ziqing_luo at apple.com>
Date: 2026-04-10 (Fri, 10 Apr 2026)
Changed paths:
R clang/include/clang/ScalableStaticAnalysisFramework/Analyses/EntityPointerLevel/EntityPointerLevel.h
M clang/include/clang/ScalableStaticAnalysisFramework/Analyses/UnsafeBufferUsage/UnsafeBufferUsage.h
M clang/include/clang/ScalableStaticAnalysisFramework/Analyses/UnsafeBufferUsage/UnsafeBufferUsageExtractor.h
M clang/lib/ScalableStaticAnalysisFramework/Analyses/CMakeLists.txt
R clang/lib/ScalableStaticAnalysisFramework/Analyses/EntityPointerLevel/EntityPointerLevel.cpp
M clang/lib/ScalableStaticAnalysisFramework/Analyses/UnsafeBufferUsage/UnsafeBufferUsage.cpp
M clang/lib/ScalableStaticAnalysisFramework/Analyses/UnsafeBufferUsage/UnsafeBufferUsageExtractor.cpp
M clang/unittests/ScalableStaticAnalysisFramework/Analyses/UnsafeBufferUsage/UnsafeBufferUsageTest.cpp
Log Message:
-----------
Revert "[NFC][SSAF] Move EntityPointerLevel to a separate folder" (#191481)
Reverts llvm/llvm-project#191331
A set of bots are broken. For more examples check the reverted PR.
https://lab.llvm.org/buildbot/#/builders/225/builds/5596
Example:
```
30 | ssaf::getUnsafeBuffers(const UnsafeBufferUsageEntitySummary &S) {
| ^~~~
clang/include/clang/ScalableStaticAnalysisFramework/Analyses/UnsafeBufferUsage/UnsafeBufferUsage.h:30:3: note: only here as a ‘friend’
30 | getUnsafeBuffers(const UnsafeBufferUsageEntitySummary &);
| ^~~~~~~~~~~~~~~~
FAILED: clang/lib/ScalableStaticAnalysisFramework/Analyses/EntityPointerLevel/EntityPointerLevel.cpp:61:5: error: qualified name does not name a class before ‘:’ token
61 | : ConstStmtVisitor<EntityPointerLevelTranslator,
| ^
```
Commit: 20dc214629ae0755adaa74954cd12c378b6ed463
https://github.com/llvm/llvm-project/commit/20dc214629ae0755adaa74954cd12c378b6ed463
Author: Serosh <janmejayapanda400 at gmail.com>
Date: 2026-04-10 (Fri, 10 Apr 2026)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/SemaDeclCXX.cpp
A clang/test/SemaCXX/gh185341.cpp
Log Message:
-----------
[clang] fix crash on qualified friend function definitions (#186398)
This patch fixes a crash caused by qualified friend function definitions
and We now recover early by diagnosing the invalid qualifier and
clearing the scope
fixes #185341
Commit: 7a4a1e9ca8b0533691d7adac6d8687f2aa3cd5d3
https://github.com/llvm/llvm-project/commit/7a4a1e9ca8b0533691d7adac6d8687f2aa3cd5d3
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-04-10 (Fri, 10 Apr 2026)
Changed paths:
M llvm/test/Analysis/LoopAccessAnalysis/nssw-predicate-implied.ll
M llvm/test/Analysis/LoopAccessAnalysis/nusw-predicates.ll
M llvm/test/Transforms/LoopVectorize/runtime-check-small-clamped-bounds.ll
Log Message:
-----------
[LV,LAA] Add tests showing incorrect SCEV predicate reasoning. (NFC) (#191443)
Add test cases for https://github.com/llvm/llvm-project/issues/191382.
Commit: 41ade987427ee56d1015ab700ef9cfd7f1826d20
https://github.com/llvm/llvm-project/commit/41ade987427ee56d1015ab700ef9cfd7f1826d20
Author: Heejin Ahn <aheejin at gmail.com>
Date: 2026-04-11 (Sat, 11 Apr 2026)
Changed paths:
M llvm/lib/Target/WebAssembly/WebAssemblyCFGStackify.cpp
M llvm/test/CodeGen/WebAssembly/cfg-stackify-eh-legacy.ll
M llvm/test/CodeGen/WebAssembly/cfg-stackify-eh.ll
Log Message:
-----------
[WebAssembly] Fix attributes of exception_grouping_2 test (#191466)
Function calls in `exception_grouping_2` test had incorrect attribute
numbers, making many of them incorrectly `noreturn`, rendering many BBs
after them unreachable. As a result of them, the function became a
trivial single-BB and the test passsed because it didn't have any
exceptions in it. I think this happened because I created that test in
another file and later pasted the function into these files, which had
different attribute numbers.
This also has a few drive-by comment typo fixes.
Commit: dd2ba5b3b406d70ef668425ed7aef76b04feaf47
https://github.com/llvm/llvm-project/commit/dd2ba5b3b406d70ef668425ed7aef76b04feaf47
Author: Dhruva Chakrabarti <Dhruva.Chakrabarti at amd.com>
Date: 2026-04-10 (Fri, 10 Apr 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPURewriteAGPRCopyMFMA.cpp
Log Message:
-----------
[AMDGPU] Added a debug counter to Rewrite AGPR-Copy-MFMA pass (#189437)
The debug counter can be used to control the MFMA chains rewritten to
AGPR form.
Commit: 9e5d363351980b13e0aa13179685444c1dd05a14
https://github.com/llvm/llvm-project/commit/9e5d363351980b13e0aa13179685444c1dd05a14
Author: vporpo <vasileios.porpodas at amd.com>
Date: 2026-04-10 (Fri, 10 Apr 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
Log Message:
-----------
[AMDGPU][SIInsertWaitcnts][NFC] Drop `using llvm::AMDGPU` (#180782)
This is a followup patch for PR
https://github.com/llvm/llvm-project/pull/178345 which introduced `using
llvm::AMDGPU` to keep the patch size small.
Commit: ab645323cef83173ad3c7564876b5f810fa61b1c
https://github.com/llvm/llvm-project/commit/ab645323cef83173ad3c7564876b5f810fa61b1c
Author: Nico Weber <thakis at chromium.org>
Date: 2026-04-10 (Fri, 10 Apr 2026)
Changed paths:
M llvm/utils/gn/secondary/lldb/test/BUILD.gn
Log Message:
-----------
[gn] port 6175a4d455e1 (#191503)
Commit: 2490ee3f0ee60b77de4201f0e5008a959ef9d1ca
https://github.com/llvm/llvm-project/commit/2490ee3f0ee60b77de4201f0e5008a959ef9d1ca
Author: adams381 <adams at nvidia.com>
Date: 2026-04-10 (Fri, 10 Apr 2026)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIRAttrs.td
M clang/include/clang/CIR/Dialect/IR/CIRDialect.h
M clang/include/clang/CIR/Dialect/IR/CIRDialect.td
M clang/lib/CIR/CodeGen/CIRGenModule.cpp
M clang/lib/CIR/CodeGen/CIRGenModule.h
M clang/lib/CIR/CodeGen/CIRGenRecordLayoutBuilder.cpp
M clang/lib/CIR/Dialect/IR/CIRAttrs.cpp
M clang/lib/CIR/Dialect/IR/CIRTypes.cpp
A clang/test/CIR/CodeGen/record-type-metadata.cpp
M clang/unittests/CIR/CMakeLists.txt
A clang/unittests/CIR/RecordTypeMetadataTest.cpp
M llvm/utils/gn/secondary/clang/unittests/CIR/BUILD.gn
Log Message:
-----------
[CIR][ABI] Add ABI metadata fields to RecordType (#188300)
Store AST-derived layout information on `cir::RecordType` so that ABI
lowering passes (which have no AST access) can make correct calling
convention decisions.
The five new fields on `RecordTypeStorage` are: `triviallyCopyable`
(from `canPassInRegisters`), `triviallyDestructible` (from
`hasTrivialDestructor`), `isEmpty` (from
`CXXRecordDecl::isEmpty`/`field_empty`), `dataSizeInBits` (from
`ASTRecordLayout::getDataSize`), and `recordAlignInBytes` (from
`ASTRecordLayout::getAlignment`). They're set during
`computeRecordLayout` and are not part of the printed/parsed CIR text.
The `complete()` signature uses defaults so existing callers don't need
changes.
Anonymous records (created by passes, not CIRGen) default to trivially
copyable/destructible since they represent synthetic aggregates like
member pointer lowering tuples.
Unit test with 9 cases exercises all fields, anonymous defaults, and
backward compatibility.
Commit: f39386b79eb002e7dd1376e11198ac60f802cf48
https://github.com/llvm/llvm-project/commit/f39386b79eb002e7dd1376e11198ac60f802cf48
Author: Sang Ik Lee <sang.ik.lee at intel.com>
Date: 2026-04-10 (Fri, 10 Apr 2026)
Changed paths:
M mlir/include/mlir/Conversion/Passes.td
M mlir/lib/Conversion/XeGPUToXeVM/XeGPUToXeVM.cpp
M mlir/lib/Dialect/GPU/Pipelines/GPUToXeVMPipeline.cpp
Log Message:
-----------
[MLIR][XeVM] Update XeVM type converter (#189306)
Ideally, DLTI should be used for getting Index type which as it is tied
to bitwidth of pointer type that can be expressed with DLTI.
But currently, a separate pass option for bitwidth of Index type is used
in many passes.
GPU to XeVM lowering pipeline also use passes with such options.
But XeVM type converter does not provide a way to reflect choice of
Index type bitwidth and uses a hardcoded value.
This PR updates XeVM type converter to use Index type bitwidth from pass
option. This is done by using LLVM type converter for converting element
type instead of the previous custom logic.
In addition to handling Index type properly, by using LLVM type
converter, low precision float types are correctly converted to LLVM
supported types.
Commit: 3aff10d4ef35287c3473be9a735029f04a43a551
https://github.com/llvm/llvm-project/commit/3aff10d4ef35287c3473be9a735029f04a43a551
Author: Sang Ik Lee <sang.ik.lee at intel.com>
Date: 2026-04-10 (Fri, 10 Apr 2026)
Changed paths:
M mlir/lib/Conversion/XeVMToLLVM/XeVMToLLVM.cpp
M mlir/test/Conversion/XeVMToLLVM/legalize_large_vector.mlir
Log Message:
-----------
[MLIR][XeVM] Update HandleVectorExtract pattern. (#191052)
Split loads only if pointer address space is private.
Splitting loads from non-private memory could hurt performance.
Commit: 5c0d5ff9791e414d54e1ff110ca7e81d8ec077fc
https://github.com/llvm/llvm-project/commit/5c0d5ff9791e414d54e1ff110ca7e81d8ec077fc
Author: Eugene Epshteyn <eepshteyn at nvidia.com>
Date: 2026-04-10 (Fri, 10 Apr 2026)
Changed paths:
M flang/test/Lower/Intrinsics/shifta.f90
M flang/test/Lower/Intrinsics/shiftl.f90
M flang/test/Lower/Intrinsics/shiftr.f90
M flang/test/Lower/Intrinsics/size.f90
M flang/test/Lower/Intrinsics/spread.f90
Log Message:
-----------
[flang][NFC] Converted five tests from old lowering to new lowering (part 41) (#190575)
Tests converted from test/Lower/Intrinsics: shifta.f90, shiftl.f90,
shiftr.f90, size.f90, spread.f90
Commit: ae7f902429f95e02d6277fc903a03fb6750f987f
https://github.com/llvm/llvm-project/commit/ae7f902429f95e02d6277fc903a03fb6750f987f
Author: Sam Elliott <aelliott at qti.qualcomm.com>
Date: 2026-04-10 (Fri, 10 Apr 2026)
Changed paths:
M llvm/lib/Target/RISCV/GISel/RISCVCallLowering.cpp
M llvm/lib/Target/RISCV/RISCVCallingConv.cpp
M llvm/lib/Target/RISCV/RISCVCallingConv.h
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.h
A llvm/test/CodeGen/RISCV/GlobalISel/fastcc-float.ll
A llvm/test/CodeGen/RISCV/GlobalISel/ghccc-rv32.ll
A llvm/test/CodeGen/RISCV/GlobalISel/ghccc-rv64.ll
Log Message:
-----------
[RISCV] Remove RISCVCCAssignFn and Simplify (#191071)
I think the signature of `CCAssignFn` has been updated since
`RISCVCCAssignFn` was introduced. There is now enough information passed
that we don't need a separate signature and custom reimplementations to
thread the value through.
We now expose just two `CC_RISCV` functions: one for arguments
(`CC_RISCV`) and one for return values (`RetCC_RISCV`). The argument
version now dispatches to different functions internally depending on
the `CallingConv`.
This allows the backend to remove:
- GISel's custom `RISCVOutgoingValueAssigner` and
`RISCVIncomingValueAssigner`
- GISel's custom implementation of `RISCVCallLowering::canLowerReturn`
- `llvm::RISCVCCAssignFn` which is no longer used.
- SDag's custom `RISCVTargetLowering::analyzeInputArgs` and
`RISCVTargetLowering::analyzeOutputArgs`.
- Code in RISCVISelLowering to choose the right `CC_RISCV` function.
The end result of this is that:
- `ghccc` is now supported with GlobalISel
- `fastcc` should return values correctly with GlobalISel (previously
these were returned using `CC_RISCV_FastCC`, but SelectionDAG only ever
used `CC_RISCV` for return values)
- GlobalISel correctly marks functions as `.variant_cc` (before this
callers that recieved scalable return values were incorrectly marked,
and callees that returned scalable return values were not marked).
Commit: 47eb8b43c99034119ca93f16179dc6003c68a20b
https://github.com/llvm/llvm-project/commit/47eb8b43c99034119ca93f16179dc6003c68a20b
Author: Alexis Engelke <engelke at in.tum.de>
Date: 2026-04-10 (Fri, 10 Apr 2026)
Changed paths:
M clang/unittests/Basic/CharInfoTest.cpp
M clang/unittests/Frontend/CompilerInstanceTest.cpp
M llvm/cmake/modules/AddLLVM.cmake
M llvm/unittests/Support/raw_sha1_ostream_test.cpp
Log Message:
-----------
[UnitTests] Enable PCH (#191402)
I originally didn't enable PCH for unit tests, because I intended to
build a gtest PCH. But while gtest.h is slow, having many large standard
library headers already pre-compiled via the LLVMSupport PCH already
helps a lot, leaving ~250ms for parsing gtest.h (+ a fair amount of time
for template instantiation). Additionally, for unit tests that include
IR or AST headers, re-using the PCHs that include these is more
beneficial than gtest.h. Therefore, no longer disable PCH on unit tests.
Commit: 5b5a2ad6d29e86cf0fd8a6cf9657505c2a1ad5a4
https://github.com/llvm/llvm-project/commit/5b5a2ad6d29e86cf0fd8a6cf9657505c2a1ad5a4
Author: Sam Elliott <aelliott at qti.qualcomm.com>
Date: 2026-04-10 (Fri, 10 Apr 2026)
Changed paths:
M clang/docs/CommandGuide/clang.rst
M clang/docs/UsersManual.rst
M clang/include/clang/Basic/DiagnosticDriverKinds.td
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/test/Driver/Ofast.c
Log Message:
-----------
[clang] Improve Ofast Warning (#183002)
`-Ofast` has an effect on the defaults for `-ffast-math` (documented
before this patch), and `-fstrict-aliasing` (not documented before this
patch).
On some platforms, `-Ofast` cannot be replaced with `-O3 -ffast-math`,
because the strict aliasing default would change. `-Ofast` can only be
replaced (in the exact same position) with `-O3 -ffast-math
-fstrict-aliasing` if `-Ofast` is the effective optimization level
(i.e., it is not followed by another `-O<value>` flag). Otherwise, the
`-Ofast` flag should just be deleted as it is having no effect.
This is all too difficult to summarise in a warning message, so this PR
mostly updates the docs. We keep the message about "use `-O3` to get
conforming optimizations" in the hope this encourages people to adopt
`-O3` alone.
The warning message is now emitted any time there is `-Ofast` in the
command-line string, rather than only when `-Ofast` is the effective
optimization level.
Commit: fc43928ce110c195ae1e8e99247f749f691b2e58
https://github.com/llvm/llvm-project/commit/fc43928ce110c195ae1e8e99247f749f691b2e58
Author: Nico Weber <thakis at chromium.org>
Date: 2026-04-10 (Fri, 10 Apr 2026)
Changed paths:
M llvm/utils/gn/secondary/clang/lib/Headers/BUILD.gn
Log Message:
-----------
[gn] put hlsl generated headers in hlsl/ subdirectory (#191513)
Needed after 88af28072637, which populated the previously-empty
hlsl_inline_intrinsics_gen.inc. (See also 627f6aa1cd930e6a8.)
Commit: d2786ecc1699a411d474f0631de0efaf17cd5935
https://github.com/llvm/llvm-project/commit/d2786ecc1699a411d474f0631de0efaf17cd5935
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2026-04-10 (Fri, 10 Apr 2026)
Changed paths:
M compiler-rt/test/lit.common.cfg.py
Log Message:
-----------
[NFC][compiler-rt][test] Fix indentation in lit.common.cfg.py (#191509)
Commit: b2b7dfa82a0948e583fd2f2732a9d200c7a65cab
https://github.com/llvm/llvm-project/commit/b2b7dfa82a0948e583fd2f2732a9d200c7a65cab
Author: David Green <david.green at arm.com>
Date: 2026-04-10 (Fri, 10 Apr 2026)
Changed paths:
A llvm/test/CodeGen/AArch64/GlobalISel/arm64-this-return.ll
M llvm/test/CodeGen/AArch64/arm64-this-return.ll
Log Message:
-----------
[AArch64][GISel] Update and regenerate arm64-this-return.ll (#191515)
This updates the arm64-this-return.ll test, splitting the GISel
update_mir_test_checks into a separate GlobalISel test file.
Commit: 1121af7895cfa7fb2f43720d69bd5f889df6b5cb
https://github.com/llvm/llvm-project/commit/1121af7895cfa7fb2f43720d69bd5f889df6b5cb
Author: Kai Nacke <kai.peter.nacke at ibm.com>
Date: 2026-04-10 (Fri, 10 Apr 2026)
Changed paths:
M llvm/include/llvm/BinaryFormat/GOFF.h
M llvm/lib/Target/SystemZ/SystemZAsmPrinter.cpp
M llvm/lib/Target/SystemZ/SystemZAsmPrinter.h
M llvm/test/CodeGen/SystemZ/zos-hlasm-out.ll
M llvm/test/CodeGen/SystemZ/zos-jumptable.ll
M llvm/test/CodeGen/SystemZ/zos-landingpad.ll
M llvm/test/CodeGen/SystemZ/zos-ppa1-argarea.ll
M llvm/test/CodeGen/SystemZ/zos-ppa1.ll
M llvm/test/CodeGen/SystemZ/zos-prologue-epilog.ll
M llvm/test/CodeGen/SystemZ/zos-section-1.ll
M llvm/test/CodeGen/SystemZ/zos-simple-test.ll
M llvm/test/CodeGen/SystemZ/zos-symbol-2.ll
Log Message:
-----------
[SystemZ][z/OS] Remove use of subsections. (#184167)
HLASM has no notion of subsections. There are several possible solutions
how to deal with this. However,
- using a different section introduces a lot of relocations, which slows
down the binder later
- emitting the PPA1 after the code changes the location which may break
existing tools
The choosen solution is to record the PPA1 data, and emit them at the
end of the assembly into the code section. This solves both issues, at
the expense of having to do some bookkeeping.
This change moves the position of the PPA2, too, but this is less
critical.
Commit: 501417baa60f2eb0a66ca3bb04caf70150ebc2f7
https://github.com/llvm/llvm-project/commit/501417baa60f2eb0a66ca3bb04caf70150ebc2f7
Author: Sam Elliott <aelliott at qti.qualcomm.com>
Date: 2026-04-10 (Fri, 10 Apr 2026)
Changed paths:
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/lib/Target/LoongArch/LoongArchMachineFunctionInfo.h
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVMachineFunctionInfo.h
R llvm/test/CodeGen/LoongArch/issue187832.ll
R llvm/test/CodeGen/LoongArch/musttail.ll
M llvm/test/CodeGen/LoongArch/tail-calls.ll
M llvm/test/CodeGen/RISCV/musttail-call.ll
R llvm/test/CodeGen/RISCV/musttail.ll
R llvm/test/CodeGen/RISCV/pr187832.ll
M llvm/test/CodeGen/RISCV/tail-calls.ll
Log Message:
-----------
[RISC-V][LoongArch] Revert Musttail Fixes (#191508)
This reverts:
- 2b839f66ae0191039fb82049ec515bcbd726f612 (#168506)
- 6a81656f7d729615c296e5da774e78ad5b21a558 (#170547)
- ab17b5408ac83a03807b6f0ea22f51dfb84b0b8a (#188006)
- e65dd1f8a0c8cfd2255f336e5096232f587ed397 (#191093)
The changes in #168506 and #170547 both have a lifetime issue where an
SDValue is kept for the duration of a function, despite being valid only
when processing the same basic block.
Reverting both on LoongArch and RISC-V as the implementations are
identical and one of the fix commits touches both targets, rather than
doing only a RISC-V revert. I also think this more cleanly shows what is
being undone when starting again with the changes.
Commit: 744d8eff65d356bf6bfd9bc4b0a18c9a275fdfe0
https://github.com/llvm/llvm-project/commit/744d8eff65d356bf6bfd9bc4b0a18c9a275fdfe0
Author: Paul Kirth <paulkirth at google.com>
Date: 2026-04-10 (Fri, 10 Apr 2026)
Changed paths:
M clang-tools-extra/clang-doc/ClangDoc.cpp
M clang-tools-extra/clang-doc/ClangDoc.h
M clang-tools-extra/clang-doc/Generators.cpp
M clang-tools-extra/clang-doc/Generators.h
M clang-tools-extra/clang-doc/HTMLGenerator.cpp
M clang-tools-extra/clang-doc/MDMustacheGenerator.cpp
M clang-tools-extra/clang-doc/benchmarks/ClangDocBenchmark.cpp
Log Message:
-----------
[clang-doc] Move non-arena allocated types off the OwnedPtr alias (#190052)
Some types should not be using this alias, which was over applied to
APIs that wont participate in arena style allocation. This patch
restores them to their correct spelling.
Commit: 1d1572c79d82c882c967c92f6a0909f49ee5070f
https://github.com/llvm/llvm-project/commit/1d1572c79d82c882c967c92f6a0909f49ee5070f
Author: Congzhe Cao <congzhe.cao at huawei.com>
Date: 2026-04-10 (Fri, 10 Apr 2026)
Changed paths:
M llvm/lib/Transforms/Utils/LoopUnroll.cpp
Log Message:
-----------
[LoopUnroll] Fix out-of-date LoopInfo being used during unroll (#191505)
Loop unroll did not update LoopInfo entirely correctly.
Invalid LoopInfo gets passed into `simplifyLoopAfterUnroll()`, which
could trigger hidden bugs since it is further used by other functions
and components like SCEV. To fix, updated LoopInfo correctly before its
use.
Fixed issue #191036.
Commit: 16f20b60882e4a4e85d6f7dd757dc8eccdc5347d
https://github.com/llvm/llvm-project/commit/16f20b60882e4a4e85d6f7dd757dc8eccdc5347d
Author: Elvis Wang <elvis.wang at sifive.com>
Date: 2026-04-10 (Fri, 10 Apr 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/test/Transforms/LoopVectorize/find-last-iv-sinkable-expr.ll
M llvm/test/Transforms/LoopVectorize/iv-select-cmp-fold-tail.ll
Log Message:
-----------
[LV] Header masked condition of FindLastSelect when optimizeFindIVReductions when folding tail. (#191166)
This patch header masked the condition of FindLastSelect for FindIV
reductions when folding tail in `optimizeFindIVReductions`.
Note that the TC in
llvm/test/Transforms/LoopVectorize/iv-select-cmp-decreasing.ll is small
(12) which is lower than 16 (4 * 4), so the condition of predicated
select are constants.
Commit: f0279c15f29285c10734da5486ee072c68f788cb
https://github.com/llvm/llvm-project/commit/f0279c15f29285c10734da5486ee072c68f788cb
Author: Martin Storsjö <martin at martin.st>
Date: 2026-04-10 (Fri, 10 Apr 2026)
Changed paths:
M clang/lib/ScalableStaticAnalysisFramework/Plugins/CMakeLists.txt
M clang/test/CMakeLists.txt
Log Message:
-----------
[clang][ssaf] Don't try to link SSAFExamplePlugin on Windows (#191401)
This plugin currently seems to expect to be linked with undefined
references (rather than linking against the libclang-cpp dylib).
Linking a shared library with undefined references is not supported on
Windows. (Plugins in general can be built on Windows in mingw mode, if
linking against libLLVM and libclang-cpp as dylibs.)
Commit: fa2fc2ab9e11e751e9bd965b368b96276db1d549
https://github.com/llvm/llvm-project/commit/fa2fc2ab9e11e751e9bd965b368b96276db1d549
Author: Paul Kirth <paulkirth at google.com>
Date: 2026-04-10 (Fri, 10 Apr 2026)
Changed paths:
M clang-tools-extra/clang-doc/BitcodeReader.cpp
M clang-tools-extra/clang-doc/BitcodeReader.h
Log Message:
-----------
[clang-doc] Simplify parsing and reading bitcode blocks (#190053)
Much of the logic in the readBlock implementation is boilerplate, and is
repeated for each implementation/specialization. This will become much
worse as we introduce new custom block reading logic as we migrate
towards arena allocation. In preparation for that, we're introducing the
change in logic now, which should make later refactoring much more
straightforward.
Commit: 882f37c431de8e1e38b32ea20eb8b99caeaeb04a
https://github.com/llvm/llvm-project/commit/882f37c431de8e1e38b32ea20eb8b99caeaeb04a
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-04-10 (Fri, 10 Apr 2026)
Changed paths:
M offload/plugins-nextgen/common/src/Utils/ELF.cpp
Log Message:
-----------
[Offload] Fix inefficient GNU Hash ELF symbol lookup (#191477)
Summary:
This PR fixes the handling of the GNU Hash table. The chain format uses
the lowest bit to indicate the end of the list. Previously we just
continued the loop instead of breaking, meaning we would exhaustively
search the whole list if the symbol was not found instead of just early
existing. This was still correct and worked in practice, but it was
slightly inefficient. Likely not noticed because the symbol tables on
these GPU binaries tend to be relatively small.
Commit: ef44a9904a3d00efda547443bda0a5fef58d4da1
https://github.com/llvm/llvm-project/commit/ef44a9904a3d00efda547443bda0a5fef58d4da1
Author: Cyndy Ishida <cyndy_ishida at apple.com>
Date: 2026-04-10 (Fri, 10 Apr 2026)
Changed paths:
M clang/include/clang/Basic/DiagnosticSerializationKinds.td
M clang/include/clang/Serialization/ModuleFile.h
M clang/include/clang/Serialization/ModuleManager.h
M clang/lib/Serialization/ASTReader.cpp
M clang/lib/Serialization/ModuleManager.cpp
A clang/test/ClangScanDeps/modules-pch-signature-mismatch.c
M clang/test/Modules/explicit-build.cpp
M clang/test/Modules/invalid-module-dep.c
Log Message:
-----------
[Modules] Enrich diags for out of date module dependencies (#190203)
Replace the opaque `ErrorStr` parameter in `ModuleManager::addModule`
with a structured object that carries specific information for
reporting. This allows the diagnostics to emit targeted notes instead of
a single error string appended to the main diagnostic. Information that
is relevant but is tied to implementation details of the compilation is
reported as notes (e.g. signature mismatches)
This patch additionally
* Adds minor comments to places I found unintuitive
* Adds a contrived test case for signature mismatches
* Sets `InputFilesValidation` based on module kind at construction
Commit: 392336b190b5c3034c7b3fa47f27e77ece545d7c
https://github.com/llvm/llvm-project/commit/392336b190b5c3034c7b3fa47f27e77ece545d7c
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-04-10 (Fri, 10 Apr 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/test/CodeGen/X86/srem-seteq-vec-nonsplat.ll
Log Message:
-----------
[TargetLowering] Use 0 for add constant for power of 2 divisors in prepareSREMEqFold. (#190274)
We don't need to toggle the sign bit here.
Commit: 11a802685043cb1e9b23e54437da011bdfbf1d61
https://github.com/llvm/llvm-project/commit/11a802685043cb1e9b23e54437da011bdfbf1d61
Author: Keith Smiley <keithbsmiley at gmail.com>
Date: 2026-04-10 (Fri, 10 Apr 2026)
Changed paths:
M clang/cmake/caches/Release.cmake
M llvm/CMakeLists.txt
M llvm/cmake/config-ix.cmake
A llvm/cmake/modules/FindLibXml2.cmake
M llvm/lib/WindowsManifest/CMakeLists.txt
Log Message:
-----------
[cmake] Add support for statically linking libxml2 (#166867)
Dynamically depending on libxml2 results in various annoyances across
different linux distros for release artifacts. Specifically on fedora
and nixos the library has a different name than on debian, and on
arch-linux they tried to remove the old name entirely.
With this, enabled by default for releases, we don't sacrifice any
behavior changes, but no longer have these issues. For lld the binary
size impact is <1mb
This continues to use the shared libxml for lldb since otherwise
it requires linking ICU, which is off by default
macOS ignores this setting since libxml2 is part of the OS and stable
enough.
This mirrors what we do for zstd
Fixes https://github.com/llvm/llvm-project/issues/113696
Fixes https://github.com/llvm/llvm-project/issues/138225
Fixes
https://discourse.llvm.org/t/official-builds-without-libxml2-and-libtinfo/58169
Commit: b6671f8a83bcddf2ccdad217d81a6f93356f951a
https://github.com/llvm/llvm-project/commit/b6671f8a83bcddf2ccdad217d81a6f93356f951a
Author: Martin Storsjö <martin at martin.st>
Date: 2026-04-11 (Sat, 11 Apr 2026)
Changed paths:
M lldb/source/Host/windows/ProcessLauncherWindows.cpp
Log Message:
-----------
[lldb] [windows] Add a [[fallthrough]] to silence warnings. NFC. (#191400)
Commit: 274991202f6ed6ac552ab233ed2d93d32b804d1f
https://github.com/llvm/llvm-project/commit/274991202f6ed6ac552ab233ed2d93d32b804d1f
Author: Derek Schuff <dschuff at chromium.org>
Date: 2026-04-10 (Fri, 10 Apr 2026)
Changed paths:
M llvm/lib/DebugInfo/Symbolize/SymbolizableObjectFile.cpp
M llvm/test/tools/llvm-symbolizer/wasm-basic.s
Log Message:
-----------
SymbolizableObjectFile: Invalidate Wasm addresses that map outside the code section (#191329)
A fix after #191068: For linked files, invalidate any address that
is outside the text section to prevent it from being matched in DWARF as
a section-relative address.
Add test cases that cover the distinction (e.g. address 3 should match
in an object file but not in a linked file).
Also, fix the comments in the test to match the updated line numbers.
Commit: d3318f8cbbc57a57a34cc7dc19f3f97d5f144b91
https://github.com/llvm/llvm-project/commit/d3318f8cbbc57a57a34cc7dc19f3f97d5f144b91
Author: Paul Kirth <paulkirth at google.com>
Date: 2026-04-10 (Fri, 10 Apr 2026)
Changed paths:
M clang-tools-extra/clang-doc/BitcodeReader.cpp
M clang-tools-extra/clang-doc/BitcodeReader.h
M clang-tools-extra/clang-doc/JSONGenerator.cpp
M clang-tools-extra/clang-doc/MDGenerator.cpp
M clang-tools-extra/clang-doc/Mapper.cpp
M clang-tools-extra/clang-doc/Representation.cpp
M clang-tools-extra/clang-doc/Representation.h
M clang-tools-extra/clang-doc/Serialize.cpp
M clang-tools-extra/clang-doc/Serialize.h
M clang-tools-extra/clang-doc/YAMLGenerator.cpp
M clang-tools-extra/clang-doc/benchmarks/ClangDocBenchmark.cpp
M clang-tools-extra/unittests/clang-doc/BitcodeTest.cpp
M clang-tools-extra/unittests/clang-doc/ClangDocTest.cpp
M clang-tools-extra/unittests/clang-doc/ClangDocTest.h
M clang-tools-extra/unittests/clang-doc/GeneratorTest.cpp
M clang-tools-extra/unittests/clang-doc/JSONGeneratorTest.cpp
M clang-tools-extra/unittests/clang-doc/MDGeneratorTest.cpp
M clang-tools-extra/unittests/clang-doc/MergeTest.cpp
M clang-tools-extra/unittests/clang-doc/SerializeTest.cpp
M clang-tools-extra/unittests/clang-doc/YAMLGeneratorTest.cpp
Log Message:
-----------
[clang-doc] Move Info types into arenas (#190054)
Info types used to own significant chunks of data. As we move these into
local arenas, these types must be trivially destructible, to avoid
leaking resources when the arena is reset. Unfortunatly, there isn't a
good way to transition all the data types one at a time, since most of
them are tied together in some way. Further, as they're now allocated in
the arenas, they often cannot be treated the same way, and even the
aliases and interfaces put in place to simplify the transition cannot
cover the full range of changes required.
We also use some SFINAE tricks to avoid adding boilerplate for helper
APIs, we'd otherwise have to support
Though it introduces some additional churn, we also try to keep tests
from using arena allocation as much as possible, since this is not
required to test the implementation of the library. As much of the test
code needed to be rewritten anyway, we take the opportunity to
transition now.
We see a large improvement in overall memory use, dropping by 15% over
the previous patches, and taking the total savings down to almost 54%.
Performance numbers stay mostly flat, but merging is vastly improved,
seeing a reduction of 40+% over the previous patch, and a 90% reduction
overall.
| Metric | Baseline | Prev | This | Culm% | Seq% |
| :--- | :--- | :--- | :--- | :--- | :--- |
| Time | 920.5s | 1013.6s | 1014.5s | +10.2% | +0.1% |
| Memory | 86.0G | 47.3G | 39.9G | -53.6% | -15.6% |
| Benchmark | Baseline | Prev | This | Culm% | Seq% |
| :--- | :--- | :--- | :--- | :--- | :--- |
| BM_BitcodeReader_Scale/10 | 67.9us | 69.1us | 73.0us | +7.5% | +5.8% |
| BM_BitcodeReader_Scale/10000 | 70.5ms | 24.5ms | 17.1ms | -75.8% |
-30.4% |
| BM_BitcodeReader_Scale/4096 | 23.2ms | 4.5ms | 6.5ms | -71.9% | +45.1%
|
| BM_BitcodeReader_Scale/512 | 509.4us | 540.3us | 850.1us | +66.9% |
+57.4% |
| BM_BitcodeReader_Scale/64 | 114.8us | 117.3us | 140.6us | +22.5% |
+19.9% |
| BM_EmitInfoFunction | 1.6us | 1.6us | 1.8us | +12.9% | +15.0% |
| BM_Index_Insertion/10 | 2.3us | 4.2us | 4.1us | +79.5% | -1.1% |
| BM_Index_Insertion/10000 | 3.1ms | 5.2ms | 5.4ms | +71.1% | +3.7% |
| BM_Index_Insertion/4096 | 1.3ms | 2.1ms | 2.1ms | +64.9% | +2.0% |
| BM_Index_Insertion/512 | 153.6us | 244.7us | 252.9us | +64.7% | +3.3%
|
| BM_Index_Insertion/64 | 18.1us | 29.1us | 30.4us | +68.3% | +4.4% |
| BM_JSONGenerator_Scale/10 | 36.8us | 38.3us | 38.1us | +3.5% | -0.4% |
| BM_JSONGenerator_Scale/10000 | 89.6ms | 90.8ms | 84.2ms | -6.0% |
-7.2% |
| BM_JSONGenerator_Scale/4096 | 33.7ms | 35.9ms | 32.1ms | -4.7% |
-10.5% |
| BM_JSONGenerator_Scale/512 | 1.9ms | 2.0ms | 2.0ms | +3.1% | +0.4% |
| BM_JSONGenerator_Scale/64 | 222.4us | 231.9us | 232.5us | +4.5% |
+0.2% |
| BM_Mapper_Scale/10000 | 104.3ms | 104.9ms | 102.1ms | -2.1% | -2.7% |
| BM_Mapper_Scale/4096 | 44.3ms | 44.4ms | 46.5ms | +4.9% | +4.9% |
| BM_Mapper_Scale/512 | 7.6ms | 7.6ms | 7.4ms | -2.1% | -1.8% |
| BM_Mapper_Scale/64 | 3.1ms | 3.0ms | 3.0ms | -1.3% | -0.0% |
| BM_MergeInfos_Scale/10000 | 12.2ms | 1.9ms | 931.2us | -92.4% | -49.8%
|
| BM_MergeInfos_Scale/2 | 1.9us | 1.7us | 1.8us | -4.5% | +4.7% |
| BM_MergeInfos_Scale/4096 | 2.8ms | 521.8us | 201.3us | -92.8% | -61.4%
|
| BM_MergeInfos_Scale/512 | 68.9us | 34.9us | 19.9us | -71.2% | -43.1% |
| BM_MergeInfos_Scale/64 | 10.3us | 5.8us | 4.1us | -59.8% | -28.4% |
| BM_MergeInfos_Scale/8 | 2.8us | 2.1us | 1.9us | -33.3% | -12.6% |
| BM_SerializeFunctionInfo | 25.5us | 26.0us | 26.2us | +2.4% | +0.8% |
Commit: 5ec1fb2217c07ee3b610abcf0e40f6b701e6d7f1
https://github.com/llvm/llvm-project/commit/5ec1fb2217c07ee3b610abcf0e40f6b701e6d7f1
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-04-10 (Fri, 10 Apr 2026)
Changed paths:
M llvm/lib/IR/RuntimeLibcalls.cpp
M llvm/test/Transforms/Util/DeclareRuntimeLibcalls/armpl.ll
M llvm/test/Transforms/Util/DeclareRuntimeLibcalls/basic.ll
M llvm/test/Transforms/Util/DeclareRuntimeLibcalls/merge_attributes.ll
M llvm/test/Transforms/Util/DeclareRuntimeLibcalls/sincos_stret.ll
M llvm/test/Transforms/Util/DeclareRuntimeLibcalls/sleef.ll
Log Message:
-----------
Revert "RuntimeLibcalls: Add mustprogress to common function attributes (#167080)" (#191524)
This reverts commit eb5297e0ade96fe8a6297763f28219be97dfac76.
This is redundant with willreturn.
Commit: 80cc28b6689876f740fcbb956ed6926218b33719
https://github.com/llvm/llvm-project/commit/80cc28b6689876f740fcbb956ed6926218b33719
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-04-10 (Fri, 10 Apr 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/test/Transforms/LoopVectorize/find-last-iv-sinkable-expr.ll
M llvm/test/Transforms/LoopVectorize/iv-select-cmp-decreasing.ll
Log Message:
-----------
[VPlan] Normalize selects in optimizeFindIVReductions. (#191517)
Follow-up to https://github.com/llvm/llvm-project/pull/191166.
Unify code to create new selects in optmizeFindIVReductions to simplify
the code paths and make it easier to include the header mask correctly
if needed.
If no new select needs to be created, just use the original backedge
value.
Commit: 286805008f67fabf6abdcc0125a824ae1f8693f1
https://github.com/llvm/llvm-project/commit/286805008f67fabf6abdcc0125a824ae1f8693f1
Author: Sam Elliott <aelliott at qti.qualcomm.com>
Date: 2026-04-10 (Fri, 10 Apr 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
Log Message:
-----------
[RISCV][NFC] Improve Vararg Comment/Assert (#191527)
Commit: 93c10f0820cd94a460f2ed5ee21b48372f322152
https://github.com/llvm/llvm-project/commit/93c10f0820cd94a460f2ed5ee21b48372f322152
Author: Jeffrey Byrnes <jeffrey.byrnes at amd.com>
Date: 2026-04-10 (Fri, 10 Apr 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SISchedule.td
M llvm/lib/Target/AMDGPU/VOP3Instructions.td
M llvm/test/CodeGen/AMDGPU/GlobalISel/mul.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/sdiv.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/sdivrem.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/srem.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/udivrem.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_global_pointer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_local_pointer.ll
M llvm/test/CodeGen/AMDGPU/bypass-div.ll
M llvm/test/CodeGen/AMDGPU/carryout-selection.ll
M llvm/test/CodeGen/AMDGPU/div-rem-by-constant-64.ll
M llvm/test/CodeGen/AMDGPU/fptoi.i128.ll
M llvm/test/CodeGen/AMDGPU/integer-mad-patterns.ll
M llvm/test/CodeGen/AMDGPU/llvm.mulo.ll
M llvm/test/CodeGen/AMDGPU/machine-sink-temporal-divergence-swdev407790.ll
M llvm/test/CodeGen/AMDGPU/mad_64_32.ll
M llvm/test/CodeGen/AMDGPU/mul.ll
M llvm/test/CodeGen/AMDGPU/reassoc-mul-add-1-to-mad.ll
M llvm/test/CodeGen/AMDGPU/rem_i128.ll
M llvm/test/CodeGen/AMDGPU/srem.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-mul.ll
Log Message:
-----------
[AMDGPU] Use WriteSALUDummy for v_mad_u64_u32 (#191500)
Updates the the new Write*Dummy HWWriteRes to maintain latency -- this
is to ensure SchedModel->computeOperandLatency calls are unchanged.
This also uses the new HWWriteRes for v_mad_u64_u32 and v_mad_i64_i32.
For an explanation of why we want to do this , see
https://github.com/llvm/llvm-project/pull/190095 . In short, the
scheduler will not try to cover the full latency of the instructions
without this new modelling.
This causes a good amount of lit churn since these instructions are well
covered.
Commit: c70dae8b0cee46af1411bc4e4ba6fc28e2babf3e
https://github.com/llvm/llvm-project/commit/c70dae8b0cee46af1411bc4e4ba6fc28e2babf3e
Author: Paul Kirth <paulkirth at google.com>
Date: 2026-04-10 (Fri, 10 Apr 2026)
Changed paths:
M clang-tools-extra/clang-doc/Representation.cpp
M clang-tools-extra/clang-doc/Representation.h
Log Message:
-----------
[clang-doc] Support deep copy between arenas for merging (#190055)
Upcoming changes to the merge step will necessitate that we clear the
transient arenas and merge new items into the persistent arena. However
there are some challenges with that, as the existing types typically
don't want to be copied. We introduce some new APIs to simplify that
task and ensure we don't accidentally leak memory.
On the performance front, we reclaim about 2% of the overhead, bringing
the cumulative overhead from the series of patches down to about 7% over
the baseline.
| Metric | Baseline | Prev | This | Culm% | Seq% |
| :--- | :--- | :--- | :--- | :--- | :--- |
| Time | 920.5s | 1014.5s | 991.5s | +7.7% | -2.3% |
| Memory | 86.0G | 39.9G | 40.0G | -53.4% | +0.3% |
| Benchmark | Baseline | Prev | This | Culm% | Seq% |
| :--- | :--- | :--- | :--- | :--- | :--- |
| BM_BitcodeReader_Scale/10 | 67.9us | 73.0us | 72.2us | +6.3% | -1.1% |
| BM_BitcodeReader_Scale/10000 | 70.5ms | 17.1ms | 22.5ms | -68.1% |
+31.6% |
| BM_BitcodeReader_Scale/4096 | 23.2ms | 6.5ms | 6.6ms | -71.6% | +1.1%
|
| BM_BitcodeReader_Scale/512 | 509.4us | 850.1us | 898.7us | +76.4% |
+5.7% |
| BM_BitcodeReader_Scale/64 | 114.8us | 140.6us | 133.7us | +16.4% |
-5.0% |
| BM_EmitInfoFunction | 1.6us | 1.8us | 1.9us | +16.8% | +3.4% |
| BM_Index_Insertion/10 | 2.3us | 4.1us | 4.1us | +78.7% | -0.5% |
| BM_Index_Insertion/10000 | 3.1ms | 5.4ms | 5.3ms | +70.5% | -0.4% |
| BM_Index_Insertion/4096 | 1.3ms | 2.1ms | 2.1ms | +66.0% | +0.7% |
| BM_Index_Insertion/512 | 153.6us | 252.9us | 251.8us | +64.0% | -0.4%
|
| BM_Index_Insertion/64 | 18.1us | 30.4us | 30.2us | +67.4% | -0.5% |
| BM_JSONGenerator_Scale/10 | 36.8us | 38.1us | 37.1us | +0.6% | -2.8% |
| BM_JSONGenerator_Scale/10000 | 89.6ms | 84.2ms | 81.4ms | -9.1% |
-3.3% |
| BM_JSONGenerator_Scale/4096 | 33.7ms | 32.1ms | 31.0ms | -8.1% | -3.6%
|
| BM_JSONGenerator_Scale/512 | 1.9ms | 2.0ms | 1.9ms | -0.1% | -3.1% |
| BM_JSONGenerator_Scale/64 | 222.4us | 232.5us | 222.9us | +0.2% |
-4.1% |
| BM_Mapper_Scale/10 | 2.5ms | 2.5ms | 2.5ms | -1.0% | -0.4% |
| BM_Mapper_Scale/10000 | 104.3ms | 102.1ms | 112.3ms | +7.7% | +10.0% |
| BM_Mapper_Scale/4096 | 44.3ms | 46.5ms | 45.0ms | +1.4% | -3.4% |
| BM_Mapper_Scale/512 | 7.6ms | 7.4ms | 7.7ms | +1.1% | +3.3% |
| BM_Mapper_Scale/64 | 3.1ms | 3.0ms | 3.0ms | -1.5% | -0.2% |
| BM_MergeInfos_Scale/10000 | 12.2ms | 931.2us | 575.6us | -95.3% |
-38.2% |
| BM_MergeInfos_Scale/2 | 1.9us | 1.8us | 1.8us | -2.7% | +1.9% |
| BM_MergeInfos_Scale/4096 | 2.8ms | 201.3us | 205.3us | -92.6% | +1.9%
|
| BM_MergeInfos_Scale/512 | 68.9us | 19.9us | 20.5us | -70.2% | +3.4% |
| BM_MergeInfos_Scale/64 | 10.3us | 4.1us | 3.8us | -62.6% | -7.1% |
| BM_MergeInfos_Scale/8 | 2.8us | 1.9us | 1.9us | -30.5% | +4.2% |
| BM_SerializeFunctionInfo | 25.5us | 26.2us | 25.8us | +0.9% | -1.5% |
Commit: 40fcf42f139e98464490282396a68868b50b8311
https://github.com/llvm/llvm-project/commit/40fcf42f139e98464490282396a68868b50b8311
Author: Sang Ik Lee <sang.ik.lee at intel.com>
Date: 2026-04-10 (Fri, 10 Apr 2026)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/XeVMOps.td
M mlir/lib/Conversion/XeVMToLLVM/XeVMToLLVM.cpp
A mlir/test/Conversion/XeVMToLLVM/xevm_mx-to-llvm.mlir
A mlir/test/Integration/Dialect/XeVM/GPU/xevm_block_scaled_dpas_bf8.mlir
Log Message:
-----------
[MLIR][XeVM] Add inital support for mma_mx or scaled mma. (#190989)
Add xevm truncf and mma_mx lowering to OCL.
Note: truncf support is limited for now.
Add op conversion test.
Add integration test with bf8 type.
Commit: 9faf7b8f574ccc9b8570aab4248a8a84ff41a156
https://github.com/llvm/llvm-project/commit/9faf7b8f574ccc9b8570aab4248a8a84ff41a156
Author: Nico Weber <thakis at chromium.org>
Date: 2026-04-10 (Fri, 10 Apr 2026)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/ExecutionEngine/JITLink/BUILD.gn
Log Message:
-----------
[gn build] Port 0d640409ad96 (#191538)
Commit: 85b30f4777ee251160ae7fb4cef4a3c5e991f3df
https://github.com/llvm/llvm-project/commit/85b30f4777ee251160ae7fb4cef4a3c5e991f3df
Author: Nico Weber <thakis at chromium.org>
Date: 2026-04-10 (Fri, 10 Apr 2026)
Changed paths:
M llvm/utils/gn/secondary/lldb/source/Utility/BUILD.gn
Log Message:
-----------
[gn build] Port 11e7a49a58e1 (#191539)
Commit: 1be577bac203dc96cdcebbc744e7a554799ceed3
https://github.com/llvm/llvm-project/commit/1be577bac203dc96cdcebbc744e7a554799ceed3
Author: Nico Weber <thakis at chromium.org>
Date: 2026-04-10 (Fri, 10 Apr 2026)
Changed paths:
M llvm/utils/gn/secondary/clang-tools-extra/clang-tidy/llvm/BUILD.gn
Log Message:
-----------
[gn build] Port 430e1be254f9 (#191540)
Commit: db8d5f089bb197f13d0fe52fcbc4d41ccfc77446
https://github.com/llvm/llvm-project/commit/db8d5f089bb197f13d0fe52fcbc4d41ccfc77446
Author: Nico Weber <thakis at chromium.org>
Date: 2026-04-10 (Fri, 10 Apr 2026)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/Object/BUILD.gn
Log Message:
-----------
[gn build] Port 5706ee3d4d7d (#191541)
Commit: 4320a39b95405183eb7a54885df7a8973a64905d
https://github.com/llvm/llvm-project/commit/4320a39b95405183eb7a54885df7a8973a64905d
Author: Nico Weber <thakis at chromium.org>
Date: 2026-04-10 (Fri, 10 Apr 2026)
Changed paths:
M llvm/utils/gn/secondary/llvm/unittests/CodeGen/GlobalISel/BUILD.gn
Log Message:
-----------
[gn build] Port 5e0efc0f1d79 (#191542)
Commit: 084792a708319245410abebfb22f171f6c383872
https://github.com/llvm/llvm-project/commit/084792a708319245410abebfb22f171f6c383872
Author: Nico Weber <thakis at chromium.org>
Date: 2026-04-10 (Fri, 10 Apr 2026)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/Support/HTTP/BUILD.gn
Log Message:
-----------
[gn build] Port ab6394d21a59 (#191543)
Commit: cc3050a891354b95f3b47fb1977b18cc4b45be76
https://github.com/llvm/llvm-project/commit/cc3050a891354b95f3b47fb1977b18cc4b45be76
Author: Nico Weber <thakis at chromium.org>
Date: 2026-04-10 (Fri, 10 Apr 2026)
Changed paths:
M llvm/utils/gn/secondary/clang-tools-extra/clang-tidy/bugprone/BUILD.gn
Log Message:
-----------
[gn build] Port cfdd8bcca85a (#191544)
Commit: 3b6471b2bd4c70b5f5f187854edb01f7e8c1f135
https://github.com/llvm/llvm-project/commit/3b6471b2bd4c70b5f5f187854edb01f7e8c1f135
Author: Nico Weber <thakis at chromium.org>
Date: 2026-04-10 (Fri, 10 Apr 2026)
Changed paths:
M llvm/utils/gn/secondary/clang/lib/ScalableStaticAnalysisFramework/Core/BUILD.gn
Log Message:
-----------
[gn build] Port d0a54493b3e9 (#191545)
Commit: 8de7ee4d265c198fbcdf672482053e4ff2ac6bdf
https://github.com/llvm/llvm-project/commit/8de7ee4d265c198fbcdf672482053e4ff2ac6bdf
Author: Nico Weber <thakis at chromium.org>
Date: 2026-04-10 (Fri, 10 Apr 2026)
Changed paths:
M llvm/utils/gn/secondary/llvm/tools/llubi/lib/BUILD.gn
Log Message:
-----------
[gn build] Port f149ab665a4b (#191546)
Commit: 767979a1768b785cdf7f7969154544620680c4d5
https://github.com/llvm/llvm-project/commit/767979a1768b785cdf7f7969154544620680c4d5
Author: Nico Weber <thakis at chromium.org>
Date: 2026-04-10 (Fri, 10 Apr 2026)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/Target/AMDGPU/BUILD.gn
Log Message:
-----------
[gn build] Port f2b33d794d36 (#191547)
Commit: 6dc059ac3c7ce9f81f4a7cd694b4b68a836dce0f
https://github.com/llvm/llvm-project/commit/6dc059ac3c7ce9f81f4a7cd694b4b68a836dce0f
Author: Naveen Seth Hanig <naveen.hanig at outlook.com>
Date: 2026-04-11 (Sat, 11 Apr 2026)
Changed paths:
M clang/tools/diagtool/CMakeLists.txt
M clang/tools/diagtool/ShowEnabledWarnings.cpp
Log Message:
-----------
[clang][diagtool] Remove dependency on clangDriver from diagtool (#190076)
Commit: 96b1ae746167a9d8b848ff9d3dee31fa2e62c9d2
https://github.com/llvm/llvm-project/commit/96b1ae746167a9d8b848ff9d3dee31fa2e62c9d2
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2026-04-10 (Fri, 10 Apr 2026)
Changed paths:
M flang/lib/Semantics/resolve-directives.cpp
Log Message:
-----------
[flang][OpenMP] Use common utility functions to get affected nest depth (#191418)
Remove the existing code that calculates the number of affected loops in
an OpenMP construct. There is a single function that does that and that
handles all directives and clauses.
Issue: https://github.com/llvm/llvm-project/issues/191249
Commit: 21e0034c69489eff3b09929e5e13ea34b3dd0e5a
https://github.com/llvm/llvm-project/commit/21e0034c69489eff3b09929e5e13ea34b3dd0e5a
Author: Paul Kirth <paulkirth at google.com>
Date: 2026-04-10 (Fri, 10 Apr 2026)
Changed paths:
M clang-tools-extra/clang-doc/Representation.cpp
M clang-tools-extra/clang-doc/Representation.h
M clang-tools-extra/clang-doc/tool/ClangDocMain.cpp
Log Message:
-----------
[clang-doc] Merge data into persistent memory (#190056)
We have a need for persistent memory for the final info. Since each
group processes a single USR at a time, every USR is only ever processed
by a single thread from the thread pool. This means that we can keep per
thread persistent storage for all the info. There is significant
duplicated data between all the serialized records, so we can just merge
the final/unique items into the persistent arena, and clear out the
scratch/transient arena as we process each record in the bitcode.
The patch adds some APIs to help with managing the data, merging, and
allocation of data in the correct arena. It also safely merges and deep
copies data from the transient arenas into persistent storage that is
never reset until the program completes.
This patch reduces memory by another % over the previous patches,
bringing the total savings over the baseline to 57%. Runtime performance
and benchmarks stay mostly flat with modest improvements.
| Metric | Baseline | Prev | This | Culm% | Seq% |
| :--- | :--- | :--- | :--- | :--- | :--- |
| Time | 920.5s | 991.5s | 987.2s | +7.2% | -0.4% |
| Memory | 86.0G | 40.0G | 36.9G | -57.1% | -8.0% |
| Benchmark | Baseline | Prev | This | Culm% | Seq% |
| :--- | :--- | :--- | :--- | :--- | :--- |
| BM_BitcodeReader_Scale/10 | 67.9us | 72.2us | 72.2us | +6.3% | -0.0% |
| BM_BitcodeReader_Scale/10000 | 70.5ms | 22.5ms | 17.3ms | -75.5% |-23.2% |
| BM_BitcodeReader_Scale/4096 | 23.2ms | 6.6ms | 7.1ms | -69.5% | +7.4%|
| BM_BitcodeReader_Scale/512 | 509.4us | 898.7us | 550.5us | +8.1% |-38.7% |
| BM_BitcodeReader_Scale/64 | 114.8us | 133.7us | 120.8us | +5.2% |-9.6% |
| BM_EmitInfoFunction | 1.6us | 1.9us | 1.8us | +12.9% | -3.3% |
| BM_Index_Insertion/10 | 2.3us | 4.1us | 3.5us | +52.4% | -14.7% |
| BM_Index_Insertion/10000 | 3.1ms | 5.3ms | 4.8ms | +53.5% | -10.0% |
| BM_Index_Insertion/4096 | 1.3ms | 2.1ms | 1.9ms | +50.8% | -9.2% |
| BM_Index_Insertion/512 | 153.6us | 251.8us | 227.0us | +47.8% | -9.9%|
| BM_Index_Insertion/64 | 18.1us | 30.2us | 26.7us | +47.9% | -11.7% |
| BM_JSONGenerator_Scale/10000 | 89.6ms | 81.4ms | 83.4ms | -6.9% |+2.5% |
| BM_JSONGenerator_Scale/4096 | 33.7ms | 31.0ms | 32.4ms | -3.9% | +4.5%|
| BM_Mapper_Scale/10000 | 104.3ms | 112.3ms | 103.5ms | -0.8% | -7.9% |
| BM_Mapper_Scale/4096 | 44.3ms | 45.0ms | 43.8ms | -1.2% | -2.5% |
| BM_Mapper_Scale/512 | 7.6ms | 7.7ms | 7.5ms | -1.3% | -2.4% |
| BM_Mapper_Scale/64 | 3.1ms | 3.0ms | 3.0ms | -1.9% | -0.3% |
| BM_MergeInfos_Scale/10000 | 12.2ms | 575.6us | 500.1us | -95.9% |-13.1% |
| BM_MergeInfos_Scale/2 | 1.9us | 1.8us | 1.8us | -4.4% | -1.7% |
| BM_MergeInfos_Scale/4096 | 2.8ms | 205.3us | 200.4us | -92.8% | -2.4%|
| BM_MergeInfos_Scale/512 | 68.9us | 20.5us | 19.5us | -71.7% | -5.1% |
| BM_MergeInfos_Scale/64 | 10.3us | 3.8us | 4.0us | -60.9% | +4.8% |
| BM_MergeInfos_Scale/8 | 2.8us | 1.9us | 1.9us | -31.7% | -1.8% |
| BM_SerializeFunctionInfo | 25.5us | 25.8us | 26.1us | +2.2% | +1.3% |
Commit: 2f422a52fde267757ce48041af6e731421fed2a3
https://github.com/llvm/llvm-project/commit/2f422a52fde267757ce48041af6e731421fed2a3
Author: Rahman Lavaee <rahmanl at google.com>
Date: 2026-04-10 (Fri, 10 Apr 2026)
Changed paths:
M llvm/include/llvm/CodeGen/AsmPrinter.h
M llvm/include/llvm/CodeGen/BasicBlockSectionsProfileReader.h
A llvm/include/llvm/CodeGen/InsertCodePrefetch.h
M llvm/include/llvm/CodeGen/MachineBasicBlock.h
M llvm/include/llvm/CodeGen/Passes.h
M llvm/include/llvm/CodeGen/TargetInstrInfo.h
M llvm/include/llvm/Support/UniqueBBID.h
M llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
M llvm/lib/CodeGen/BasicBlockSections.cpp
M llvm/lib/CodeGen/BasicBlockSectionsProfileReader.cpp
M llvm/lib/CodeGen/InsertCodePrefetch.cpp
M llvm/lib/Target/X86/X86InstrInfo.cpp
M llvm/lib/Target/X86/X86InstrInfo.h
M llvm/test/CodeGen/X86/basic-block-sections-code-prefetch-call-terminates-block.ll
M llvm/test/CodeGen/X86/basic-block-sections-code-prefetch.ll
Log Message:
-----------
[Codegen, X86] Add prefetch insertion based on Propeller profile (#166324)
This PR implements the prefetch insertion in the InsertCodePrefetch pass
based on the
[RFC](https://discourse.llvm.org/t/rfc-code-prefetch-insertion/88668).
If the prefetch target is not defined in the same module (i.e, prefetch
target function is not defined in the same module), we emit a fallback
weak symbol after the prefetch instruction so that if the symbol is not
ever defined, we don't get undefined symbol error and the prefetch
instruction prefetches the next address:
```
prefetchit1 __llvm_prefetch_target_foo(%rip)
.weak __llvm_prefetch_target_foo
__llvm_prefetch_target_foo:
```
The weak symbol semantic is tied to ELF, so this makes this PR
target-dependent.
Commit: bd3088ec7c680d419b108713945d94b1365c1201
https://github.com/llvm/llvm-project/commit/bd3088ec7c680d419b108713945d94b1365c1201
Author: Vito Secona <77039267+secona at users.noreply.github.com>
Date: 2026-04-10 (Fri, 10 Apr 2026)
Changed paths:
M mlir/lib/Dialect/SparseTensor/Transforms/SparseGPUCodegen.cpp
A mlir/test/Dialect/SparseTensor/GPU/gpu_codegen_out_buffer.mlir
M mlir/test/Dialect/SparseTensor/GPU/gpu_combi.mlir
M mlir/test/Dialect/SparseTensor/GPU/gpu_matmul.mlir
Log Message:
-----------
[mlir][sparse][gpu] fix sparse GPU codegen out buffer (#189221)
When lowering sparse tensor operations to GPU code using
`-sparse-gpu-codegen`, the generated `gpu.memcpy` op for device-to-host
copy was targeting the wrong buffer. In my case, it did not copy back
the output buffer and instead only copied back the input positions
buffer which results in the output buffer in host memory being empty.
The `SparseGPUCodegen` pass carries an assumption that the first buffer
is the out buffer. It looks like this assumption is not always true, as
in my case its the input positions buffer which made it the only buffer
getting copied back to host.
This change introduces a fix by removing the assumption and replacing it
with an analysis that checks for `memref::StoreOp` and write
MemoryEffects. This change also adds a regression test which highlights
the problematic edge case.
Assisted by Gemini 3.1 Pro for finding the issue of using incorrect
buffers in `gpu.memcpy` op in the lowered code.
Commit: 5d64a44a84af31f9e99d42cccffa4f01c0be2e0b
https://github.com/llvm/llvm-project/commit/5d64a44a84af31f9e99d42cccffa4f01c0be2e0b
Author: Paul Kirth <paulkirth at google.com>
Date: 2026-04-10 (Fri, 10 Apr 2026)
Changed paths:
M clang-tools-extra/clang-doc/Representation.h
Log Message:
-----------
[clang-doc] Initialize member variable (#191570)
We don't always initialize the IsType field in the current
implementation. We can ensure this field is always initialized to
`false`, and avoid any UB due to garbage data.
Commit: 0074bfd20f642a9457f0abe5fdf8687d31512048
https://github.com/llvm/llvm-project/commit/0074bfd20f642a9457f0abe5fdf8687d31512048
Author: Alexandre Ganea <aganea at havenstudios.com>
Date: 2026-04-10 (Fri, 10 Apr 2026)
Changed paths:
M llvm/lib/Support/Windows/Path.inc
M llvm/lib/Support/Windows/Threading.inc
Log Message:
-----------
[Support] On Windows, silence FARPROC casts (#191563)
When building with clang-cl 19, this was generating:
```
warning: cast from 'FARPROC' ... converts to incompatible function type
[-Wcast-function-type-mismatch]
```
Commit: 889d5bdbdb50936c0e529be18a64f6b3239a3057
https://github.com/llvm/llvm-project/commit/889d5bdbdb50936c0e529be18a64f6b3239a3057
Author: Slava Zakharin <szakharin at nvidia.com>
Date: 2026-04-10 (Fri, 10 Apr 2026)
Changed paths:
M flang/lib/Optimizer/Dialect/CUF/CUFOps.cpp
M flang/test/Transforms/CUF/cuf-kernel-licm.fir
Log Message:
-----------
[flang][CUF] Limit Flang LICM for operations with symbol operands. (#191494)
There is probably an ordering issue between `CUFDeviceGlobal`
and `OffloadLiveInValueCanonicalization` passes: Flang LICM hoists
`fir.address_of` out of `cuf.kernel`, it is pulled back by
`OffloadLiveInValueCanonicalization`, but the symbol is never added
into the device module because `CUFDeviceGlobal` does not run after.
Changing the passes order may take some time, so this is a temporary
workaround to unblock #191309.
The change is currently NFC.
Commit: 4f49847a0b97ff12a39be222a285cb1c02ce8dd7
https://github.com/llvm/llvm-project/commit/4f49847a0b97ff12a39be222a285cb1c02ce8dd7
Author: Slava Zakharin <szakharin at nvidia.com>
Date: 2026-04-10 (Fri, 10 Apr 2026)
Changed paths:
M flang/lib/Optimizer/Dialect/CMakeLists.txt
M flang/lib/Optimizer/Dialect/FIROps.cpp
A flang/test/Transforms/licm-acc-compute-region.fir
Log Message:
-----------
[flang] Detect non-optional boxes inside acc.compute_region. (#191328)
This should be a temporary change until we figure out
a better way for representing definitely present boxes.
It allows me to experiment with flang-licm further,
so I would like to ask for approval.
Commit: e2669364745a3238dcca7cac23116703d86405f9
https://github.com/llvm/llvm-project/commit/e2669364745a3238dcca7cac23116703d86405f9
Author: forking-google-bazel-bot[bot] <265904573+forking-google-bazel-bot[bot]@users.noreply.github.com>
Date: 2026-04-10 (Fri, 10 Apr 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[Bazel] Fixes bd3088e (#191571)
This fixes bd3088ec7c680d419b108713945d94b1365c1201.
Co-authored-by: Google Bazel Bot <google-bazel-bot at google.com>
Commit: afce975a244b5244949c1b58542602bddf17b1a6
https://github.com/llvm/llvm-project/commit/afce975a244b5244949c1b58542602bddf17b1a6
Author: German Gambon <ggambon at tesla.com>
Date: 2026-04-11 (Sat, 11 Apr 2026)
Changed paths:
M mlir/test/Dialect/Quant/Bytecode/types.mlir
Log Message:
-----------
Fix duplicate quant bytecode test to actually test storage-type-only case (#190194)
Fixes a copy paste error
Commit: ea8554e35bcbce927233cf93b709df4c3ba8752b
https://github.com/llvm/llvm-project/commit/ea8554e35bcbce927233cf93b709df4c3ba8752b
Author: Iñaki V Arrechea <inakiarrechea at google.com>
Date: 2026-04-11 (Sat, 11 Apr 2026)
Changed paths:
M llvm/include/llvm/Analysis/FunctionPropertiesAnalysis.h
M llvm/include/llvm/Analysis/InstCount.h
M llvm/lib/Analysis/FunctionPropertiesAnalysis.cpp
M llvm/lib/Analysis/InstCount.cpp
M llvm/lib/Passes/PassBuilder.cpp
M llvm/lib/Passes/PassBuilderPipelines.cpp
M llvm/lib/Passes/PassRegistry.def
A llvm/test/Analysis/FunctionPropertiesAnalysis/function-properties-analysis.ll
A llvm/test/Analysis/FunctionPropertiesAnalysis/pipeline.ll
R llvm/test/Analysis/FunctionPropertiesAnalysis/properties-stats.ll
M llvm/test/Analysis/InstCount/instcount.ll
A llvm/test/Analysis/InstCount/pipeline.ll
Log Message:
-----------
Changed stat passes to count instructions before and after optimizations (#188837)
Created this for instcount and func-properties-analysis to be able to
see the change the optimization pipelines have on stats
Commit: 3a47349c084217d83f9968db8b551a8526de9702
https://github.com/llvm/llvm-project/commit/3a47349c084217d83f9968db8b551a8526de9702
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-04-10 (Fri, 10 Apr 2026)
Changed paths:
M lld/ELF/Arch/AMDGPU.cpp
A lld/test/ELF/amdgpu-abs32-reloc.s
Log Message:
-----------
[lld][AMDGPU] Support R_AMDGPU_ABS32_(LO|HI) relocations (#191550)
Summary:
These relocations are extremely rare, but they are listed as an expected
relocation in https://llvm.org/docs/AMDGPUUsage.html#relocation-records
and you can theoretically make them happen so we should probably support
it in the linker.
Commit: 8378b6d51ee611a805c432b925ed2101400eaba2
https://github.com/llvm/llvm-project/commit/8378b6d51ee611a805c432b925ed2101400eaba2
Author: Nishant Patel <nishant.b.patel at intel.com>
Date: 2026-04-10 (Fri, 10 Apr 2026)
Changed paths:
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUSgToWiDistributeExperimental.cpp
M mlir/lib/Dialect/XeGPU/Utils/XeGPUUtils.cpp
M mlir/test/Dialect/XeGPU/sg-to-wi-experimental-unit.mlir
M mlir/test/Dialect/XeGPU/sg-to-wi-experimental.mlir
Log Message:
-----------
[MLIR][XeGPU] Lower vector.multi_reduction to vector.reduction for lane local (#191037)
Commit: a3ae5b508086facac81dea35ad71f955e592c9c1
https://github.com/llvm/llvm-project/commit/a3ae5b508086facac81dea35ad71f955e592c9c1
Author: Fangrui Song <i at maskray.me>
Date: 2026-04-10 (Fri, 10 Apr 2026)
Changed paths:
M lld/ELF/Arch/AMDGPU.cpp
R lld/test/ELF/amdgpu-abs32-reloc.s
Log Message:
-----------
Revert "[lld][AMDGPU] Support R_AMDGPU_ABS32_(LO|HI) relocations" (#191591)
Reverts llvm/llvm-project#191550
Merged without understanding getImplicitAddend and test convention, and
less than 4 hours after a colleague rubber stamping with "I am not ELF
or linker expert but to me looks good."
Commit: f6167ec430d9323652e8914602085ae1d4ee780c
https://github.com/llvm/llvm-project/commit/f6167ec430d9323652e8914602085ae1d4ee780c
Author: Zeyi Xu <mitchell.xu2 at gmail.com>
Date: 2026-04-11 (Sat, 11 Apr 2026)
Changed paths:
M clang-tools-extra/clang-tidy/utils/ExceptionAnalyzer.cpp
M clang-tools-extra/test/clang-tidy/checkers/bugprone/exception-escape-treat-functions-without-specification-as-throwing.cpp
Log Message:
-----------
[clang-tidy] Fix FP in bugprone-exception-escape with unevaluated exception specs (#190593)
Functions whose exception spec has not yet been evaluated have no body
in the AST. Because the compiler does not generate call sites for these
functions before evaluating their spec, they cannot propagate
exceptions.
Closes https://github.com/llvm/llvm-project/issues/188730
Commit: 94a7b6760757826b3dd5583c4fc380a80649d2da
https://github.com/llvm/llvm-project/commit/94a7b6760757826b3dd5583c4fc380a80649d2da
Author: Fangrui Song <i at maskray.me>
Date: 2026-04-11 (Sat, 11 Apr 2026)
Changed paths:
M clang/tools/driver/cc1as_main.cpp
M llvm/include/llvm/MC/MCContext.h
M llvm/lib/CodeGen/MachineModuleInfo.cpp
M llvm/lib/DWARFLinker/Classic/DWARFStreamer.cpp
M llvm/lib/DWARFLinker/Parallel/DWARFEmitterImpl.cpp
M llvm/lib/DWARFLinker/Parallel/DebugLineSectionEmitter.h
M llvm/lib/MC/MCContext.cpp
M llvm/tools/llvm-dwp/llvm-dwp.cpp
M llvm/tools/llvm-mc/llvm-mc.cpp
M llvm/unittests/CodeGen/MachineInstrTest.cpp
M llvm/unittests/MC/SystemZ/SystemZAsmLexerTest.cpp
M mlir/lib/Target/LLVM/ROCDL/Target.cpp
Log Message:
-----------
[MC] Remove MCTargetOptions parameter from MCContext constructor (#191596)
Now that MCAsmInfo stores the MCTargetOptions pointer (set by
TargetRegistry::createMCAsmInfo #180464), MCContext can retrieve it via
MCAsmInfo. Remove the redundant MCTargetOptions parameter from the
MCContext constructor and update all callers.
Commit: 193d7a6ace9f7016e03c90c63626fdb7fdf99bc0
https://github.com/llvm/llvm-project/commit/193d7a6ace9f7016e03c90c63626fdb7fdf99bc0
Author: Fangrui Song <i at maskray.me>
Date: 2026-04-11 (Sat, 11 Apr 2026)
Changed paths:
M clang/test/Misc/noexecstack.c
M flang/test/Driver/save-mlir-temps.f90
M llvm/docs/Extensions.rst
M llvm/include/llvm/MC/MCAssembler.h
M llvm/include/llvm/MC/MCObjectStreamer.h
M llvm/include/llvm/MC/MCSection.h
M llvm/include/llvm/MC/MCStreamer.h
M llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
M llvm/lib/MC/ELFObjectWriter.cpp
M llvm/lib/MC/MCAsmStreamer.cpp
M llvm/lib/MC/MCAssembler.cpp
M llvm/lib/MC/MCFragment.cpp
M llvm/lib/MC/MCObjectStreamer.cpp
M llvm/lib/MC/MCParser/AsmParser.cpp
M llvm/lib/MC/MCSection.cpp
M llvm/lib/MC/MCStreamer.cpp
M llvm/test/CodeGen/AArch64/preferred-function-alignment.ll
M llvm/test/CodeGen/ARM/preferred-function-alignment.ll
M llvm/test/CodeGen/LoongArch/linker-relaxation.ll
M llvm/test/CodeGen/PowerPC/code-align.ll
M llvm/test/CodeGen/PowerPC/ppc64-calls.ll
M llvm/test/CodeGen/SystemZ/vec-perm-14.ll
M llvm/test/CodeGen/X86/eh-label.ll
M llvm/test/CodeGen/X86/empty-function.ll
M llvm/test/CodeGen/X86/kcfi-arity.ll
M llvm/test/CodeGen/X86/kcfi-patchable-function-prefix.ll
M llvm/test/CodeGen/X86/kcfi.ll
M llvm/test/CodeGen/X86/prefalign.ll
M llvm/test/CodeGen/X86/statepoint-invoke.ll
M llvm/test/DebugInfo/KeyInstructions/X86/dwarf-basic.ll
M llvm/test/DebugInfo/LoongArch/relax_dwo_ranges.ll
M llvm/test/DebugInfo/X86/header.ll
M llvm/test/DebugInfo/X86/ranges_always.ll
A llvm/test/MC/ELF/prefalign-convergence.s
M llvm/test/MC/ELF/prefalign-errors.s
M llvm/test/MC/ELF/prefalign.s
A llvm/test/MC/RISCV/prefalign.s
M llvm/test/tools/llvm-nm/X86/demangle.ll
M llvm/test/tools/llvm-objdump/X86/source-interleave-function-from-debug.test
Log Message:
-----------
[MC,CodeGen] Update .prefalign for symbol-based preferred alignment (#184032)
https://discourse.llvm.org/t/rfc-enhancing-function-alignment-attributes/88019/17
The recently-introduced .prefalign only worked when each function was in
its own section (-ffunction-sections), because the section size gave the
function body size needed for the alignment rule.
This led to -ffunction-sections and -fno-function-sections AsmPrinter
differences (#155529), which is rather unusual.
This patch fixes this AsmPrinter difference by extending .prefalign to
accept an end symbol and a required fill operand:
.prefalign <log2_align>, <end_sym>, nop
.prefalign <log2_align>, <end_sym>, <fill_byte>
The first operand is a log2 alignment value (e.g. 4 means 16-byte
alignment). The body size (end_sym_offset - start_offset) determines the
alignment:
body_size < pref_align => ComputedAlign = std::bit_ceil(body_size)
body_size >= pref_align => ComputedAlign = pref_align
To also enforce a minimum alignment, emit a .p2align before .prefalign.
The fill operand is required: `nop` generates target-appropriate NOP
instructions via writeNopData, while an integer in [0,255] fills the
padding with that byte value.
Initialize MCSection::CurFragList to nullptr and add a null check
to skip ELFObjectWriter-created sections like .strtab/.symtab
that never receive changeSection calls.
relaxPrefAlign is called in both layoutSection and relaxFragment.
The layoutSection call ensures correct initial padding before
relaxOnce, and is also needed for the post-finishLayout re-layout
where relaxOnce is not used. relaxPrefAlign walks forward to the
end symbol to compute BodySize (summing fragment sizes), avoiding
dependence on stale downstream symbol offsets.
Commit: 79dfa887f1b5d3f3418dc8b5aad3c75e9aa1f1ad
https://github.com/llvm/llvm-project/commit/79dfa887f1b5d3f3418dc8b5aad3c75e9aa1f1ad
Author: Naveen Seth Hanig <naveen.hanig at outlook.com>
Date: 2026-04-11 (Sat, 11 Apr 2026)
Changed paths:
M clang/lib/Driver/ModulesDriver.cpp
Log Message:
-----------
[clang][modules-driver] Add missing PrependArg for Clang module precompile jobs (#191610)
In `createClangModulePrecompileJob`, the `PrependArg` parameter was not
being passed for the newly created Clang module precompile job.
This causes failures for setups where the clang executable is a wrapper
(e.g., the llvm-driver wrapper).
See
https://github.com/llvm/llvm-project/pull/191258#issuecomment-4227294864
Commit: 6c4bd0b3ac6939e5d88f5e8de7679463c0604a9c
https://github.com/llvm/llvm-project/commit/6c4bd0b3ac6939e5d88f5e8de7679463c0604a9c
Author: Hans Wennborg <hans at hanshq.net>
Date: 2026-04-11 (Sat, 11 Apr 2026)
Changed paths:
M compiler-rt/test/sanitizer_common/TestCases/Linux/soft_rss_limit_mb_test.cpp
Log Message:
-----------
[compiler-rt] Disable soft_rss_limit_mb_test.cpp (#191370)
The test has been failing flakily for a while; see PRs #170911, #171469,
#188441.
Co-authored-by: Vitaly Buka <vitalybuka at gmail.com>
Commit: cfcf59cd29906d6e10fc56279784438ae76c043a
https://github.com/llvm/llvm-project/commit/cfcf59cd29906d6e10fc56279784438ae76c043a
Author: Heejin Ahn <aheejin at gmail.com>
Date: 2026-04-11 (Sat, 11 Apr 2026)
Changed paths:
M llvm/lib/Target/WebAssembly/WebAssemblyExceptionInfo.cpp
M llvm/test/CodeGen/WebAssembly/function-info.mir
Log Message:
-----------
[WebAssembly] Remove ExceptionInfo grouping tweaks (NFC) (#191495)
This removes fixes implemented in
https://github.com/llvm/llvm-project/commit/ea8c6375e3330f181105106b3adb84ff9fa76a7c,
https://github.com/llvm/llvm-project/commit/4a58116b7e5e1439c5fefdf59a89fc4f1d42875c,
and
https://github.com/llvm/llvm-project/commit/2b957ed4ff3344d8f761a053566e307277a1cdeb.
We don't need them anymore after #130374.
---
A little (unfortunate) winding history, mostly for my mental bookeeping.
Read the below only if you are curious:
There is a function called `findUnwindDestinations` in
`SelectionDAGBuilder.cpp`.
https://github.com/llvm/llvm-project/blob/c94f79886035a61bb5f3dc992f75fe0c08bdcd4b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp#L2107-L2164
This function adds unwind successors to BBs with `invoke`s. In case of
Itanium EH, you only add one `landingpad` BB. In WinEH, `catchswitch`
may not catch an exception, so you add all possible unwind
destionations. For example,
```ll
entry:
invoke void @foo()
to label %try.cont unwind label %catch.dispatch
catch.dispatch:
%0 = catchswitch within none [label %catch.start] unwind label %catch.dispatch1
catch.start:
...
catch.dispatch1:
%7 = catchswitch within none [label %catch.start1] unwind to caller
catch.start1:
...
```
`catchswitch` BBs are removed in iSel. So in this case, both
`catch.start` and `catch.start1` BBs are added as unwind successors to
`entry`, because an exception may not be caught by `catch.dispatch` and
unwind further to `catch.dispatch1`.
In the beginning of 2019, I added our own `findWasmUnwindDestinations`
in
https://github.com/llvm/llvm-project/commit/d6f487863dc951d467b545b86b9ea62980569b5a.
This was when I was implementing [the V2 (pre-legacy)
proposal,](https://github.com/WebAssembly/exception-handling/blob/main/proposals/exception-handling/pre-legacy/Exceptions-v2.md)
which had `exnref` and `try`-`catch_all` (It was named `catch`, but
semantically it was `catch_all`) The rationale was, even though we were
using WinEH, we only had one catchpad and `catch` caught everything. So
I figured adding only the first catchpad successor, `catch.start` in the
example above, would simpify things.
By the end of 2020, we changed the proposal to [the V3 (legacy)
proposal](https://github.com/WebAssembly/exception-handling/blob/main/proposals/exception-handling/legacy/Exceptions.md),
which removed `exnref` and introduced separate `catch` and `catch_all`
instructions. The previous invariant "`catch` always catches everything"
didn't hold anymore, but I left `findWasmUnwindDestinations` as was with
some updated comments in
https://github.com/llvm/llvm-project/commit/9e4eadeb135d140b3a9e499354472170017cbe58.
The comments could be summed up as "there will always be an `invoke`
instruction in the first catchpad that unwinds to the next unwind
destination. (which later turned out to be false)
And in 2021, I tweaked the ExceptionInfo algorithm to fix exception
grouping
(https://github.com/llvm/llvm-project/commit/ea8c6375e3330f181105106b3adb84ff9fa76a7c,
https://github.com/llvm/llvm-project/commit/4a58116b7e5e1439c5fefdf59a89fc4f1d42875c,
and
https://github.com/llvm/llvm-project/commit/2b957ed4ff3344d8f761a053566e307277a1cdeb)
The bug was, in tl;dr: "Your next unwind destination can be
(accidentally) dominated by your current catchpad, making your unwind
destination a subexception of the current exception). For example:
```cpp
try {
try {
foo();
} catch (int) { // EH pad
...
}
} catch (...) { // unwind destination
}
```
Here the outer `catch` is (accidentally) dominated by the inner `catch`,
because we only added the first catchpad (inner `catch`) as an unwind
successor of `foo()` BB, and hoped that some `invoke`s within the inner
`catch` to unwind it to the outer `catch`. But this caused us to
`delegate` to a middle of an inner scope. So I tweaked the algorithm to
take the outer `catch` out to form a separate exception. I didn't
realize `findWasmUnwindDestinations` was actually the source of problem
then.
Fast forward to 2025. The 2020 assumption of "There will always be an
`invoke` instruction in the first catchpad" turned out to be false. So I
just removed `findWasmUnwindDestinations` and switched to use the common
`findUnwindDestinations` in #130374, which recently accidentally
discovered another bug (#187302).
While investigating #187302, I realized we don't need those tweaks in
WebAssemblyExceptionInfo anymore, because `findUnwindDestinations` adds
all unwind destinations as successors. (#187302 is actually not related
to this; it was just a trigger to investigate things) So in case of the
little C++ example above, the outer `catch` BB will also be added as an
unwind successor of the `foo()` BB. I actually think we may not even
need WebAssemblyExceptionInfo analysis at all if we only use [the latest
standard (exnref)
proposal](https://github.com/WebAssembly/exception-handling/blob/main/proposals/exception-handling/Exceptions.md).
But we still need to keep the legacy support, so we need it for now.
Commit: fc12e59d1d8b000b53ff7845e1a88d5e2d23d903
https://github.com/llvm/llvm-project/commit/fc12e59d1d8b000b53ff7845e1a88d5e2d23d903
Author: Ziqing Luo <ziqing_luo at apple.com>
Date: 2026-04-11 (Sat, 11 Apr 2026)
Changed paths:
A clang/include/clang/ScalableStaticAnalysisFramework/Analyses/EntityPointerLevel/EntityPointerLevel.h
M clang/include/clang/ScalableStaticAnalysisFramework/Analyses/UnsafeBufferUsage/UnsafeBufferUsage.h
M clang/include/clang/ScalableStaticAnalysisFramework/Analyses/UnsafeBufferUsage/UnsafeBufferUsageExtractor.h
M clang/lib/ScalableStaticAnalysisFramework/Analyses/CMakeLists.txt
A clang/lib/ScalableStaticAnalysisFramework/Analyses/EntityPointerLevel/EntityPointerLevel.cpp
M clang/lib/ScalableStaticAnalysisFramework/Analyses/UnsafeBufferUsage/UnsafeBufferUsage.cpp
M clang/lib/ScalableStaticAnalysisFramework/Analyses/UnsafeBufferUsage/UnsafeBufferUsageExtractor.cpp
M clang/unittests/ScalableStaticAnalysisFramework/Analyses/UnsafeBufferUsage/UnsafeBufferUsageTest.cpp
Log Message:
-----------
Reland "[NFC][SSAF] Move EntityPointerLevel to a separate folder" (#191481)" (#191518)
Relands #191481
Commit: 870f8d9edee7bf550fe12d3d6e25d209bb9b8608
https://github.com/llvm/llvm-project/commit/870f8d9edee7bf550fe12d3d6e25d209bb9b8608
Author: Alex Voicu <alexandru.voicu at amd.com>
Date: 2026-04-11 (Sat, 11 Apr 2026)
Changed paths:
M clang/include/clang/Basic/BuiltinsAMDGPU.td
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx12-err.cl
A clang/test/CodeGenOpenCL/builtins-amdgcn-mfma-gfx908-err.cl
Log Message:
-----------
[NFC][AMDGPU] Fix `gfx90a`+ MFMA builtins (#191537)
`gfx90a` added a set of MFMA instructions that are not available on
prior GFXIPs. The Clang builtins for these were requiring the
`mai-insts` feature, which is incorrect (`gfx908` supports this and does
not support the added MFMAs). This led to opaque bugs where we'd check
with `__has_builtin` for the availability of the builtin, target 908,
and get an ISEL failure.
Commit: 1ed2769c681e28e43ecf7f125f1ea018ec4f993b
https://github.com/llvm/llvm-project/commit/1ed2769c681e28e43ecf7f125f1ea018ec4f993b
Author: Connector Switch <c8ef at outlook.com>
Date: 2026-04-11 (Sat, 11 Apr 2026)
Changed paths:
M libcxx/test/std/algorithms/alg.nonmodifying/alg.fold/left_folds.pass.cpp
Log Message:
-----------
[libc++][test] Improve `fold_left` `check_lvalue_range` coverage. (#183990)
This makes the test `fold_left` and `fold_left_with_iter` with and
without telemetrics similar to what we do in `check_iterator`.
Commit: 856095994ba4ac64f7fd415b82aeef86ec738060
https://github.com/llvm/llvm-project/commit/856095994ba4ac64f7fd415b82aeef86ec738060
Author: eiytoq <eiytoq at outlook.com>
Date: 2026-04-11 (Sat, 11 Apr 2026)
Changed paths:
M libcxx/test/std/containers/views/mdspan/layout_right/ctor.layout_stride.pass.cpp
Log Message:
-----------
[libc++][mdspan] Fix layout_stride->layout_right test (#191611)
Commit: f5379e666697c91586fa787caadce4fe98b8d213
https://github.com/llvm/llvm-project/commit/f5379e666697c91586fa787caadce4fe98b8d213
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-04-11 (Sat, 11 Apr 2026)
Changed paths:
M llvm/test/CodeGen/X86/gfni-lzcnt.ll
M llvm/test/CodeGen/X86/gfni-tzcnt.ll
Log Message:
-----------
[X86] gfni-tzcnt/lzcnt - add bitalg test coverage showing failure to use vpopcntb cttz expansion (#191618)
Test coverage for #191520
Commit: a26c1d16bc4328c745c012ae44d43d64ed53b20b
https://github.com/llvm/llvm-project/commit/a26c1d16bc4328c745c012ae44d43d64ed53b20b
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-04-11 (Sat, 11 Apr 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/AArch64/extracts-from-scalarizable-vector.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/vectorizable-selects-min-max.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/remarks-insert-into-small-vector.ll
M llvm/test/Transforms/SLPVectorizer/X86/bool-mask.ll
M llvm/test/Transforms/SLPVectorizer/X86/cmp-as-alternate-ops.ll
M llvm/test/Transforms/SLPVectorizer/X86/identity-match-splat-less-defined.ll
M llvm/test/Transforms/SLPVectorizer/X86/inversed-icmp-to-gather.ll
M llvm/test/Transforms/SLPVectorizer/X86/non-load-reduced-as-part-of-bv.ll
M llvm/test/Transforms/SLPVectorizer/X86/reduced-value-stored.ll
Log Message:
-----------
[SLP] Fix CmpInst type handling in cost model
Previously, getValueType() always returned the compared operand type
(e.g. i32) for CmpInst, which was incorrect for gather cost estimation
and codegen where the result type (i1) is needed. This caused ad-hoc
fixups scattered across getEntryCost, calculateTreeCostAndTrimNonProfitable,
and vectorizeTree that overrode ScalarTy back to i1 for CmpInsts.
Add a LookThroughCmp parameter to getValueType() (default: false) so
callers that need the operand type for vector width calculations can
explicitly opt in. This removes the need for the scattered CmpInst
special cases:
- getEntryCost gather path: remove `if (isa<CmpInst>) ScalarTy = i1`
- calculateTreeCostAndTrimNonProfitable: remove same override
- vectorizeTree: simplify `if (!isa<CmpInst>) ScalarTy = getValueType(V)`
to just `getValueType(V)`
For the ICmp/FCmp cost case in getEntryCost, add a fallthrough from
ICmp/FCmp to Select that overrides ScalarTy with the compared operand
type via getValueType(VL0, true), since getCmpSelInstrCost expects the
compared type as its first argument. Fix the condition type argument
passed to getCmpSelInstrCost for both scalar and vector paths: use the
actual condition/result type instead of always Builder.getInt1Ty().
Reviewers: hiraditya, RKSimon
Pull Request: https://github.com/llvm/llvm-project/pull/190618
Commit: 8ac9461e48e024448a2b6493b7c5b50629bc03d7
https://github.com/llvm/llvm-project/commit/8ac9461e48e024448a2b6493b7c5b50629bc03d7
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-04-11 (Sat, 11 Apr 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/PhaseOrdering/X86/vector-reductions.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/matmul.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/slp-fma-loss.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/unprofitable-alternate-subtree.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/vec3-base.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/vec3-reorder-reshuffle.ll
M llvm/test/Transforms/SLPVectorizer/AMDGPU/slp-v2f16.ll
M llvm/test/Transforms/SLPVectorizer/X86/c-ray.ll
M llvm/test/Transforms/SLPVectorizer/X86/crash_cmpop.ll
M llvm/test/Transforms/SLPVectorizer/X86/delayed-gather-emission.ll
M llvm/test/Transforms/SLPVectorizer/X86/entry-no-bundle-but-extra-use-on-vec.ll
M llvm/test/Transforms/SLPVectorizer/X86/external-bin-op-user.ll
M llvm/test/Transforms/SLPVectorizer/X86/extractelement-multi-register-use.ll
M llvm/test/Transforms/SLPVectorizer/X86/extractelements-vector-ops-shuffle.ll
M llvm/test/Transforms/SLPVectorizer/X86/gathered-loads-non-full-reg.ll
M llvm/test/Transforms/SLPVectorizer/X86/lookahead.ll
M llvm/test/Transforms/SLPVectorizer/X86/multi-parent-instr-copyable-regular.ll
M llvm/test/Transforms/SLPVectorizer/X86/phi-removed-on-operand-vectorization.ll
M llvm/test/Transforms/SLPVectorizer/X86/pr35497.ll
M llvm/test/Transforms/SLPVectorizer/X86/reduction2.ll
M llvm/test/Transforms/SLPVectorizer/X86/reorder_with_external_users.ll
M llvm/test/Transforms/SLPVectorizer/X86/rgb_phi.ll
M llvm/test/Transforms/SLPVectorizer/X86/shl-to-add-transformation4.ll
M llvm/test/Transforms/SLPVectorizer/X86/simplebb.ll
M llvm/test/Transforms/SLPVectorizer/X86/supernode.ll
M llvm/test/Transforms/SLPVectorizer/X86/vec3-base.ll
M llvm/test/Transforms/SLPVectorizer/X86/vec3-reorder-reshuffle.ll
Log Message:
-----------
[SLP] Reject 2-element vectorization when vector inst count exceeds scalar
The LLVM cost model uses integer-valued throughput costs which cannot
represent fractional costs. For 2-element vectors, this rounding can
make vectorization appear profitable when it actually produces more
instructions than the scalar code — the overhead from shuffles, inserts,
extracts, and buildvectors is underestimated.
Add an instruction-count safety check in getTreeCost that estimates
the number of vector instructions (including gathers, shuffles, and
extracts) and compares against the number of scalar instructions.
If the vector code would produce more instructions, reject the tree
regardless of what the cost model says. This catches cases where
fractional cost rounding hides real overhead.
The check is gated behind -slp-inst-count-check (default: on) and
only applies to 2-element root trees where rounding errors matter most.
Reviewers: hiraditya, bababuck, RKSimon
Pull Request: https://github.com/llvm/llvm-project/pull/190414
Commit: 00ccd11aba2bd69a698cba9a0b78ee744c3051ee
https://github.com/llvm/llvm-project/commit/00ccd11aba2bd69a698cba9a0b78ee744c3051ee
Author: Baranov Victor <bar.victor.2002 at gmail.com>
Date: 2026-04-11 (Sat, 11 Apr 2026)
Changed paths:
M clang-tools-extra/clang-tidy/readability/RedundantMemberInitCheck.cpp
M clang-tools-extra/clang-tidy/readability/RedundantMemberInitCheck.h
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/redundant-member-init.rst
A clang-tools-extra/test/clang-tidy/checkers/readability/redundant-member-init-ignore-macros.cpp
M clang-tools-extra/test/clang-tidy/checkers/readability/redundant-member-init.cpp
Log Message:
-----------
[clang-tidy] Add IgnoreMacros option to readability-redundant-member-init (#190530)
Fixes https://github.com/llvm/llvm-project/issues/152024.
Commit: 54d4bf2acbf4352e3c1751cd31211c925a041065
https://github.com/llvm/llvm-project/commit/54d4bf2acbf4352e3c1751cd31211c925a041065
Author: Robert Imschweiler <robert.imschweiler at amd.com>
Date: 2026-04-11 (Sat, 11 Apr 2026)
Changed paths:
M clang/lib/Sema/SemaOpenMP.cpp
A clang/test/OpenMP/scan_inscan_template_nondependent.cpp
A openmp/runtime/test/worksharing/for/omp_scan_inscan_template.cpp
Log Message:
-----------
[OpenMP] Fix nondependent inscan variables in templated functions (#191627)
Fixes https://github.com/llvm/llvm-project/issues/191549.
Assisted-by: claude-4.6-opus
Commit: 67a0ff69fbe9950a6a1ccf96c9a20126cee23fde
https://github.com/llvm/llvm-project/commit/67a0ff69fbe9950a6a1ccf96c9a20126cee23fde
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-04-11 (Sat, 11 Apr 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
A llvm/test/Transforms/SLPVectorizer/X86/revec-scalar-insertelement.ll
Log Message:
-----------
[SLP][REVEC] Fix InsertElement scalar type in getEntryCost
When SLPReVec is enabled, getValueType returns the vector result type
for InsertElement instructions rather than the scalar element type. This
caused getEntryCost to propagate an incorrect ScalarTy (e.g. <4 x float>
instead of float) into getScalarizationOverhead and getWidenedType,
triggering an assertion failure and producing wrong cost estimates.
Narrow ScalarTy to its element type when costing vectorized
InsertElement entries whose inserted operands are scalars.
Fixes #191175.
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/191628
Commit: e2bb91c094792cb384a52b5560639a2219d927e0
https://github.com/llvm/llvm-project/commit/e2bb91c094792cb384a52b5560639a2219d927e0
Author: Alexandre Ganea <aganea at havenstudios.com>
Date: 2026-04-11 (Sat, 11 Apr 2026)
Changed paths:
M mlir/test/CAPI/ir.c
Log Message:
-----------
[mlir] Fix warning when building on Windows (#191558)
Fixes:
```
warning: format specifies type 'long' but the argument has type 'intptr_t' ...
```
Commit: c5547cafed7eb89791abe2f6ebe9216d34872153
https://github.com/llvm/llvm-project/commit/c5547cafed7eb89791abe2f6ebe9216d34872153
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-04-11 (Sat, 11 Apr 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlan.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/epilog-vectorization-factors.ll
M llvm/test/Transforms/LoopVectorize/AArch64/outer_loop_test1_no_explicit_vect_width.ll
M llvm/test/Transforms/LoopVectorize/VPlan/dissolve-replicate-regions.ll
M llvm/test/Transforms/LoopVectorize/VPlan/vplan-print-after-all.ll
M llvm/test/Transforms/LoopVectorize/X86/epilog-vectorization-ordered-reduction.ll
M llvm/test/Transforms/LoopVectorize/X86/limit-vf-by-tripcount.ll
M llvm/test/Transforms/LoopVectorize/X86/outer_loop_test1_no_explicit_vect_width.ll
M llvm/test/Transforms/LoopVectorize/X86/vect.omp.force.small-tc.ll
M llvm/test/Transforms/LoopVectorize/dbg-outer-loop-vect.ll
M llvm/test/Transforms/LoopVectorize/epilog-vectorization-reductions.ll
M llvm/test/Transforms/LoopVectorize/nested-outer-loop-vect.ll
M llvm/test/Transforms/LoopVectorize/outer-loop-wide-phis.ll
M llvm/test/Transforms/LoopVectorize/outer_loop_test1.ll
M llvm/test/Transforms/LoopVectorize/vplan-widen-call-instruction.ll
M llvm/test/Transforms/LoopVectorize/vplan-widen-select-instruction.ll
Log Message:
-----------
[LV] Unconditionally run materializeConstVTC in ::executePlan (#191299)
After https://github.com/llvm/llvm-project/pull/189372 both minimum
iteration checks for epilogue vectorization are created in VPlan, which
removes the last blocker for unconditionally running
materializeConstantVectorTripCount. This enables additional folds for
plans in the native path, as well as removes some trip count
computations with epilogue vectorization.
PR: https://github.com/llvm/llvm-project/pull/191299
Commit: 9dd1eb49f74bdf0f0448ccff5f72b32b3f8fc9cc
https://github.com/llvm/llvm-project/commit/9dd1eb49f74bdf0f0448ccff5f72b32b3f8fc9cc
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-04-11 (Sat, 11 Apr 2026)
Changed paths:
M llvm/lib/Analysis/ScalarEvolution.cpp
M llvm/test/Analysis/LoopAccessAnalysis/nssw-predicate-implied.ll
M llvm/test/Analysis/LoopAccessAnalysis/nusw-predicates.ll
M llvm/test/Transforms/LoopVectorize/runtime-check-small-clamped-bounds.ll
Log Message:
-----------
[SCEV] Bail out on wider AddRecs in SCEVWrapPrediacte::implies. (#191498)
NSSW/NUSW on a wider AddRec does not imply NSSW/NUSW on a narrower
AddRec.
Fixes https://github.com/llvm/llvm-project/issues/191382.
Commit: eda97ddba23a17f2d1c9e420895515ec491d15c0
https://github.com/llvm/llvm-project/commit/eda97ddba23a17f2d1c9e420895515ec491d15c0
Author: eiytoq <eiytoq at outlook.com>
Date: 2026-04-11 (Sat, 11 Apr 2026)
Changed paths:
M libcxx/include/__mdspan/layout_left.h
M libcxx/include/__mdspan/layout_right.h
M libcxx/include/__mdspan/layout_stride.h
M libcxx/include/__mdspan/mdspan.h
M libcxx/include/mdspan
Log Message:
-----------
[libc++][NFC] Sync `<mdspan>` synopsis and remove redundant `typename`s (#191621)
Commit: 76584a89a75f9fde609e5fc341b6458d7d4f44f4
https://github.com/llvm/llvm-project/commit/76584a89a75f9fde609e5fc341b6458d7d4f44f4
Author: Sergei Barannikov <barannikov88 at gmail.com>
Date: 2026-04-11 (Sat, 11 Apr 2026)
Changed paths:
M lldb/source/Interpreter/CommandInterpreter.cpp
M lldb/test/API/commands/help/TestHelp.py
Log Message:
-----------
[lldb] Fix output of `help format` (#190409)
The output currently contains
```
"unicode32"
'u' or "unsigned decimal"
'p' or
"pointer"
"char[]"
"int8_t[]"
```
The 'p' and "pointer" are supposed to appear on the same line. When
we're about to print "pointer," we check whether it would exceed the
column limit (in which case, we insert a line feed). This check only
checks for spaces as separators, but in this case, "words" may be
separated by newlines as well. Look for them too.
Commit: 42127fa2775ca9102d4be00cafbe0fcd6f25299d
https://github.com/llvm/llvm-project/commit/42127fa2775ca9102d4be00cafbe0fcd6f25299d
Author: Lucas Ramirez <11032120+lucas-rami at users.noreply.github.com>
Date: 2026-04-11 (Sat, 11 Apr 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/GCNRegPressure.cpp
M llvm/lib/Target/AMDGPU/GCNRegPressure.h
M llvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp
M llvm/lib/Target/AMDGPU/GCNSchedStrategy.h
Log Message:
-----------
[AMDGPU][Scheduler] Prepare remat stage for rematerializer integration (NFC) (#189489)
This NFC prepares the scheduler's rematerialization stage for
integration with the target-independent rematerializer. It brings
various small design changes and optimizations to the stage's internal
state to make the not-exactly-NFC rematerializer integration as small as
possible.
The main changes are, in no particular order:
- Sort and pick useful rematerialization candidates by their index in
the vector of candidates instead of directly sorting objects within the
candidate vector. This reduces the amount of data movement and
simplifies the candidate selection logic.
- Move some data members from `PreRARematStage::RematReg` to
`PreRARematStage::ScoredRemat`. This makes the former a simplified
version of the rematerializer's own internal register representation
(`Rematerializer::Reg`), which can be cleanly deleted during
integration.
- Remove an inferable argument to `modifyRegionSchedule`. This allows
the stage to stop tracking the parent block of each region.
- Use a boolean (`RevertAllRegions`) to track scheduling revert decision
post rematerialization instead of clearing `RescheduleRegions`. This
allows to avoid re-computing the latter during rollback.
- Estimate usefulness of rematerialization from `GCNRegPressure` instead
of from `Register` (requires adding a new method variant in
`GCNRPTarget`).
Commit: 9ab2c5732642a85de8e218e81663d5e458744de0
https://github.com/llvm/llvm-project/commit/9ab2c5732642a85de8e218e81663d5e458744de0
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-04-11 (Sat, 11 Apr 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp-buildvec-bf16.ll
Log Message:
-----------
[RISCV] Add missing Zvfbfa isel patterns for VFSLIDE1UP/DOWN. (#191578)
Commit: 489dab3827b255d21ea38b1e3f45ddb08bd10a87
https://github.com/llvm/llvm-project/commit/489dab3827b255d21ea38b1e3f45ddb08bd10a87
Author: Paul Kirth <paulkirth at google.com>
Date: 2026-04-11 (Sat, 11 Apr 2026)
Changed paths:
M clang-tools-extra/clang-doc/Representation.h
Log Message:
-----------
[clang-doc] Initialize StringRef members in Info types (#191637)
We had a report of some assertion failures in
https://github.com/llvm/llvm-project/pull/190054#issuecomment-4228893309,
and some msan failures in
https://github.com/llvm/llvm-project/pull/190056.
These appear to be due to default constructed StringRef's being used in
some cases. To address, we can provide default initializers that should
prevent such cases from causing further problems.
Commit: d35cd21a3757ab6028024f0b47bc9d802d06eae6
https://github.com/llvm/llvm-project/commit/d35cd21a3757ab6028024f0b47bc9d802d06eae6
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-04-11 (Sat, 11 Apr 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoZvfbf.td
Log Message:
-----------
[RISCV] Consistently use hasVInstructionsF16/BF16(). NFC (#191592)
Commit: 031115785bc80d23f07cda506038f906615dd4c3
https://github.com/llvm/llvm-project/commit/031115785bc80d23f07cda506038f906615dd4c3
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2026-04-11 (Sat, 11 Apr 2026)
Changed paths:
M lldb/source/Plugins/Platform/MacOSX/PlatformDarwin.cpp
M lldb/source/Target/Platform.cpp
M lldb/unittests/Platform/PlatformDarwinTest.cpp
M lldb/unittests/Platform/PlatformTest.cpp
Log Message:
-----------
[lldb][Platform] Use the module's FileSpec instead of the script's FileSpec when checking LoadScriptFromSymFile setting (#191473)
We were incorrectly passing the script's `FileSpec` into
`GetScriptLoadStyleForModule`. Meaning if a script name wasn't actually
the same as the module name, the `target.auto-load-scripts-for-modules`
didn't take effect.
This patch passes the module's `FileSpec` instead. For `dSYM`s we save
the original `FileSpec` because the loop tries to strip extensions until
it finds a script. But we still want to use the module's name.
**AI Usage**:
- Used Claude to write the unit-test skeletons. Then reviewed/adjusted
them manually
Commit: 155b9b354c1d91661be9f6d0432a96e47cfc2700
https://github.com/llvm/llvm-project/commit/155b9b354c1d91661be9f6d0432a96e47cfc2700
Author: Paul Kirth <paulkirth at google.com>
Date: 2026-04-11 (Sat, 11 Apr 2026)
Changed paths:
M clang-tools-extra/clang-doc/Representation.h
Log Message:
-----------
[clang-doc][nfc] Default initialize all StringRef members (#191641)
Ensure all StringRef members are default initialized to avoid potential
bugs.
Commit: 0fd821d5e90b0664742e1af9db56d0fd0e6c0285
https://github.com/llvm/llvm-project/commit/0fd821d5e90b0664742e1af9db56d0fd0e6c0285
Author: Younan Zhang <zyn7109 at gmail.com>
Date: 2026-04-12 (Sun, 12 Apr 2026)
Changed paths:
M clang/lib/Sema/SemaConcept.cpp
M clang/lib/Sema/SemaTemplateInstantiate.cpp
M clang/lib/Sema/TreeTransform.h
M clang/test/SemaCXX/cxx2c-fold-exprs.cpp
Log Message:
-----------
[Clang] Track constraint's SubstIndex only if it contains outer parameter packs (#191484)
I believe that is the intent of SubstIndex in AssociatedConstraint.
So this enforces the checking explicitly, in case nested SubstIndexes
confuses our poor constraint evaluator.
I reverted the previous fix 257cc5ad89840cdfba4affcc8fe62cf9d02d9017
because that was wrong.
As a drive-by fix, this also removes an strange assertion and an
unnecessary
SubstIndex setup in nested requirement transform.
No release note because this is a regression fix.
Fixes https://github.com/llvm/llvm-project/issues/188505
Fixes https://github.com/llvm/llvm-project/issues/190169
Commit: 2a54bf53e07ceb29e2b68b5748d5fcbf3b167b0d
https://github.com/llvm/llvm-project/commit/2a54bf53e07ceb29e2b68b5748d5fcbf3b167b0d
Author: Shilei Tian <i at tianshilei.me>
Date: 2026-04-11 (Sat, 11 Apr 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPULowerModuleLDSPass.cpp
Log Message:
-----------
[NFC][AMDGPU] clang-format llvm/lib/Target/AMDGPU/AMDGPULowerModuleLDSPass.cpp (#191647)
Commit: c382b58026126906f048cc8bbfaadfd80c53b674
https://github.com/llvm/llvm-project/commit/c382b58026126906f048cc8bbfaadfd80c53b674
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-04-11 (Sat, 11 Apr 2026)
Changed paths:
A llvm/include/llvm/CodeGen/AsmPrinterAnalysis.h
M llvm/include/llvm/Passes/CodeGenPassBuilder.h
M llvm/include/llvm/Target/TargetMachine.h
M llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.h
M llvm/lib/Target/AMDGPU/R600TargetMachine.cpp
M llvm/lib/Target/AMDGPU/R600TargetMachine.h
M llvm/lib/Target/X86/X86AsmPrinter.cpp
M llvm/lib/Target/X86/X86AsmPrinter.h
M llvm/lib/Target/X86/X86CodeGenPassBuilder.cpp
M llvm/lib/Target/X86/X86TargetMachine.h
M llvm/tools/llc/NewPMDriver.cpp
Log Message:
-----------
[AsmPrinter] Use AsmPrinterAnalysis to hold AsmPrinter
AsmPrinter needs to hold state between doInitialization,
runOnMachineFunction, and doFinalization, which are all separate passes
in the NewPM. Storing this state externally somewhere like
MachineModuleInfo or a new analysis is possible, but a bit messy given
some state, particularly EHHandler objects, has backreferences into the
AsmPrinter and assumes there is a single AsmPrinter throughout the
entire compilation. So instead, store AsmPrinter in an analysis that
stays constant throughout compilation which solves all these problems.
This also means we can also just let AsmPrinter continue to own the
MCStreamer, which means object file emission should work after this as
well.
This does require passing the ModuleAnalysisManager into
buildCodeGenPipeline to register the AsmPrinterAnalysis, but that seems
pretty reasonable to do.
Reviewers: paperchalice, RKSimon, arsenm
Pull Request: https://github.com/llvm/llvm-project/pull/191535
Commit: ed395c894f6b3f0d19a6cde3989aa005d5d6f01e
https://github.com/llvm/llvm-project/commit/ed395c894f6b3f0d19a6cde3989aa005d5d6f01e
Author: jian.wu <jwu10003 at amd.com>
Date: 2026-04-11 (Sat, 11 Apr 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
M llvm/test/CodeGen/AMDGPU/bf16.ll
M llvm/test/CodeGen/AMDGPU/freeze.ll
M llvm/test/CodeGen/AMDGPU/kernel-args.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.iglp.AFLCustomIRMutator.opt.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i1.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i16.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i64.ll
M llvm/test/CodeGen/AMDGPU/load-global-i16.ll
M llvm/test/CodeGen/AMDGPU/load-global-i8.ll
M llvm/test/CodeGen/AMDGPU/load-local-i16.ll
M llvm/test/CodeGen/AMDGPU/preload-kernargs.ll
A llvm/test/DebugInfo/AMDGPU/bitcast-store-combine-debugloc.ll
Log Message:
-----------
[AMDGPU] Use value's DebugLoc for bitcast in performStoreCombine (#186766)
## Description
When `AMDGPUTargetLowering::performStoreCombine` inserts a synthetic
bitcast to convert vector types (e.g. `<1 x float>` → `i32`) for stores,
the bitcast inherits the **store's** SDLoc. When
`DAGCombiner::visitBITCAST` later folds `bitcast(load)` → `load`, the
resulting load loses its original debug location.
## Analysis
The bitcast is **not** present in the initial SelectionDAG — it is
inserted during DAGCombine by
`AMDGPUTargetLowering::performStoreCombine`. This can be observed with
`-debug-only=isel,dagcombine`:
```
Initial selection DAG: no bitcast, load is v1f32 directly used by store
Combining: t17: ch = store ... /tmp/beans.c:6:14
... into: t20: ch = store ... /tmp/beans.c:6:14
Combining: t19: i32 = bitcast [ORD=3] # D:1 t13, /tmp/beans.c:6:14
... into: t21: i32,ch = load ... /tmp/beans.c:6:14
```
In `performStoreCombine` (`AMDGPUISelLowering.cpp`):
```cpp
SDLoc SL(N); // N = store node → SL has store's DebugLoc
...
SDValue CastVal = DAG.getNode(ISD::BITCAST, SL, NewVT, Val);
// bitcast gets store's DebugLoc, not load's
```
When `visitBITCAST` folds `bitcast(load)` → `load`, it uses `SDLoc(N)`
(the bitcast's loc = store's loc), so the resulting load loses its
original debug location.
```
Before (initial DAG):
t13: v1f32 = load ... line 2 ; original load
t14: ch = store t13, ... line 3 ; store
After performStoreCombine:
t13: v1f32 = load ... line 2 ; original load
t19: i32 = bitcast t13 line 3 ; synthetic bitcast (store's loc!)
t20: ch = store t19, ... line 3
After visitBITCAST folds (incorrect):
t21: i32 = load ... line 0 ; lost debug location
After visitBITCAST folds (expected):
t21: i32 = load ... line 2 ; preserves load's location
```
## Fix
Target-specific fix in `AMDGPUISelLowering.cpp` `performStoreCombine`:
use `DAG.getBitcast()` instead of `DAG.getNode(ISD::BITCAST, SL, ...)`.
`getBitcast()` internally uses `SDLoc(V)` (the value operand's SDLoc),
so the synthetic bitcast naturally inherits the load's DebugLoc instead
of the store's:
```cpp
// Before:
SDValue CastVal = DAG.getNode(ISD::BITCAST, SL, NewVT, Val);
if (OtherUses) {
SDValue CastBack = DAG.getNode(ISD::BITCAST, SL, VT, CastVal);
// After:
SDValue CastVal = DAG.getBitcast(NewVT, Val);
if (OtherUses) {
SDValue CastBack = DAG.getBitcast(VT, CastVal);
```
This is consistent with `performLoadCombine` where the bitcast also uses
the load's `SDLoc`.
Commit: 0c0ae3786ef4ec04ba0dc9cdd565b68ec486498a
https://github.com/llvm/llvm-project/commit/0c0ae3786ef4ec04ba0dc9cdd565b68ec486498a
Author: Eugene Shalygin <eugene.shalygin at gmail.com>
Date: 2026-04-11 (Sat, 11 Apr 2026)
Changed paths:
M clang/lib/Format/FormatToken.cpp
Log Message:
-----------
[clang-format] Update QtPropertyKeywords to Qt 6.11 documentation (#190543)
Qt 6.11 added `OVERRIDE` and `VIRTUAL` keywords to the [property
system](https://doc.qt.io/qt-6.11/properties.html).
Commit: ecc283ab620faeb4e146f50e10eb276e3a959a3e
https://github.com/llvm/llvm-project/commit/ecc283ab620faeb4e146f50e10eb276e3a959a3e
Author: Alexandre Ganea <aganea at havenstudios.com>
Date: 2026-04-11 (Sat, 11 Apr 2026)
Changed paths:
M flang-rt/lib/runtime/environment.cpp
Log Message:
-----------
[flang-rt] Fix warnings on Windows (#191562)
When building the LLVM installer on Windows, fix CRT / dllimport
mismatch and unused locals / tautological comparisons in env handling.
Commit: 4fb5b7834bcf534388fcaf0c5afd39601197d47b
https://github.com/llvm/llvm-project/commit/4fb5b7834bcf534388fcaf0c5afd39601197d47b
Author: Petr Hosek <phosek at google.com>
Date: 2026-04-11 (Sat, 11 Apr 2026)
Changed paths:
M clang/cmake/caches/Fuchsia-stage2.cmake
Log Message:
-----------
[CMake] Enable static libxml2 for Fuchsia toolchain (#191657)
We prefer statically linking all library dependencies.
Commit: 5347264191e74840adc740db1aa41b7a9d33670a
https://github.com/llvm/llvm-project/commit/5347264191e74840adc740db1aa41b7a9d33670a
Author: Alexandre Ganea <aganea at havenstudios.com>
Date: 2026-04-11 (Sat, 11 Apr 2026)
Changed paths:
M lldb/source/Host/windows/PythonPathSetup/PythonPathSetup.cpp
M lldb/tools/lldb-dap/RunInTerminal.cpp
M lldb/unittests/Platform/TestUtils.cpp
Log Message:
-----------
[LLDB] Silence warnings when building on Windows (#191566)
Fixes a few warnings found while building the LLVM installer with
`llvm/utils/release/build_llvm_release.bat --x64 --version 23.0.0
--skip-checkout --local-python`.
Commit: 4b2c155a757a9abd1ae1501f0b26b6d4835a5d32
https://github.com/llvm/llvm-project/commit/4b2c155a757a9abd1ae1501f0b26b6d4835a5d32
Author: Hristo Hristov <hghristov.rmm at gmail.com>
Date: 2026-04-12 (Sun, 12 Apr 2026)
Changed paths:
M libcxx/docs/Status/Cxx2cIssues.csv
Log Message:
-----------
[libc++][ranges][NFC] Mark LWG3947 as implemented (#191642)
Implemented in
https://github.com/llvm/llvm-project/commit/fc4661aa11a0e974f842e83346ff44609284a4ae
Commit: af209b6f73ec319ba38fe7c60db1bcaf73ac8cf0
https://github.com/llvm/llvm-project/commit/af209b6f73ec319ba38fe7c60db1bcaf73ac8cf0
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-04-11 (Sat, 11 Apr 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp2i.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-i2fp.ll
Log Message:
-----------
[RISCV] Split LMUL=8 f16 fixed vector (s/u)ittofp/fpto(s/u)i before promoting. (#191568)
The conversion needs to be done by promoting to f32. If we're already at
LMUL=8, we need to split before we can promote.
Commit: b6c8cba516daabced0105114a7bcc745bc52faae
https://github.com/llvm/llvm-project/commit/b6c8cba516daabced0105114a7bcc745bc52faae
Author: Fangrui Song <i at maskray.me>
Date: 2026-04-11 (Sat, 11 Apr 2026)
Changed paths:
M lld/ELF/Driver.cpp
M lld/ELF/InputFiles.cpp
Log Message:
-----------
[ELF] Move ++nextGroupId from InputFile ctor to callers. NFC (#191685)
Move this side effect to the call sites in addFile() where the groupId
assignment is more visible.
This makes InputFile construction safe to call from parallel contexts.
Commit: 2798a107e63b4df00009df1a09f6e80c74cd3792
https://github.com/llvm/llvm-project/commit/2798a107e63b4df00009df1a09f6e80c74cd3792
Author: Alexis Engelke <engelke at in.tum.de>
Date: 2026-04-12 (Sun, 12 Apr 2026)
Changed paths:
M clang-tools-extra/test/clang-tidy/infrastructure/custom-query-check.cpp
Log Message:
-----------
[Clang-tidy] Add dummy compile_commands.json for broken test (#191635)
Consequence of https://github.com/llvm/llvm-project/issues/182526.
With PCH used for unit tests (#191402), this breaks now due to matching:
llvm-build/tools/clang/tools/extra/test/clang-tidy/infrastructure/Output/custom-query-check.cpp.tmp/cqc-main.cpp
with:
llvm-build/tools/clang/tools/extra/clangd/unittests/DecisionForestRuntimeTest.cpp
Commit: 5bac06718f502014fade905512f1d26d578a18f3
https://github.com/llvm/llvm-project/commit/5bac06718f502014fade905512f1d26d578a18f3
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-04-12 (Sun, 12 Apr 2026)
Changed paths:
M flang/test/Driver/save-mlir-temps.f90
Log Message:
-----------
[Flang] Mark save-mlir-temps.f90 unsupported (#191686)
This was marked as xfail earlier for some .prefalign fixes, but is
unexpectedly passing on AArch64 Premerge CI.
Just mark it unsupported for now to get things back to green.
Commit: afc41b904180af0cc56eeec8bdb201ce880627f9
https://github.com/llvm/llvm-project/commit/afc41b904180af0cc56eeec8bdb201ce880627f9
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-04-12 (Sun, 12 Apr 2026)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/test/Sema/implicit-cast-complex-to-vector.c
Log Message:
-----------
[clang][bytecode] Fix implicit-cast-complex-to-vector test (#191662)
Commit: f5509542c0660c269c202e2e7e4caeb8ed639bae
https://github.com/llvm/llvm-project/commit/f5509542c0660c269c202e2e7e4caeb8ed639bae
Author: Hristo Hristov <hghristov.rmm at gmail.com>
Date: 2026-04-12 (Sun, 12 Apr 2026)
Changed paths:
M libcxx/docs/FeatureTestMacroTable.rst
M libcxx/docs/ReleaseNotes/23.rst
M libcxx/docs/Status/Cxx2cPapers.csv
M libcxx/include/__atomic/atomic_ref.h
M libcxx/include/version
M libcxx/test/std/atomics/atomics.ref/address.pass.cpp
M libcxx/test/std/language.support/support.limits/support.limits.general/atomic.version.compile.pass.cpp
M libcxx/test/std/language.support/support.limits/support.limits.general/version.version.compile.pass.cpp
M libcxx/utils/generate_feature_test_macro_components.py
Log Message:
-----------
[libc++][atomics] P3936R1: Safer ``atomic_ref::address`` (#189761)
Implements P3936R1
Closes #189594
# References:
- https://llvm.org/PR162236
- https://wg21.link/p3936r1
---------
Co-authored-by: A. Jiang <de34 at live.cn>
Co-authored-by: Hristo Hristov <zingam at outlook.com>
Commit: 1dc46a29cf8be1d6109bc1a3583b83b9b6662d92
https://github.com/llvm/llvm-project/commit/1dc46a29cf8be1d6109bc1a3583b83b9b6662d92
Author: hstk30-hw <hanwei62 at huawei.com>
Date: 2026-04-12 (Sun, 12 Apr 2026)
Changed paths:
M clang/lib/Driver/Driver.cpp
Log Message:
-----------
Clean Code. NFC (#191403)
Commit: 67c893eebc793cea8b0d12b9037d3117191b76eb
https://github.com/llvm/llvm-project/commit/67c893eebc793cea8b0d12b9037d3117191b76eb
Author: Hristo Hristov <hghristov.rmm at gmail.com>
Date: 2026-04-12 (Sun, 12 Apr 2026)
Changed paths:
M libcxx/docs/ReleaseNotes/23.rst
M libcxx/docs/Status/Cxx2cPapers.csv
M libcxx/include/__format/format_functions.h
M libcxx/include/format
M libcxx/modules/std/format.inc
A libcxx/test/std/utilities/format/format.fmt.string/ctor.dynamic-format-string.pass.cpp
R libcxx/test/std/utilities/format/format.fmt.string/ctor.runtime-format-string.pass.cpp
A libcxx/test/std/utilities/format/format.functions/format.dynamic_format.pass.cpp
A libcxx/test/std/utilities/format/format.functions/format.locale.dynamic_format.pass.cpp
R libcxx/test/std/utilities/format/format.functions/format.locale.runtime_format.pass.cpp
R libcxx/test/std/utilities/format/format.functions/format.runtime_format.pass.cpp
A libcxx/test/std/utilities/format/format.syn/dynamic_format_string.pass.cpp
R libcxx/test/std/utilities/format/format.syn/runtime_format_string.pass.cpp
M libcxx/utils/generate_feature_test_macro_components.py
Log Message:
-----------
[libc++][format] P3953R3: Rename `std::runtime_format` (#189657)
Implements P3953R3
- renamed test files (no changes to the contents but the function
names).
Closes #189624
# References:
- https://llvm.org/PR105394
- https://wg21.link/p2918r2
Commit: 52c62175ac7b9d6a6e0544e6370c9d410f531261
https://github.com/llvm/llvm-project/commit/52c62175ac7b9d6a6e0544e6370c9d410f531261
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-04-12 (Sun, 12 Apr 2026)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/gfni-lzcnt.ll
M llvm/test/CodeGen/X86/gfni-tzcnt.ll
Log Message:
-----------
[X86] LowerCTTZ - prefer legal CTPOP expansion vs GFNI to avoid constant pool load (#191623)
Fixes #191520
Commit: eff545b0b39b1eb2db2382e47912230dea66f48f
https://github.com/llvm/llvm-project/commit/eff545b0b39b1eb2db2382e47912230dea66f48f
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-04-12 (Sun, 12 Apr 2026)
Changed paths:
M llvm/lib/Target/X86/X86InstrAVX512.td
Log Message:
-----------
[X86] Add common avx512_binary_lowering matcher for NonVLX binary op widening (#191650)
Replace VPMULLQ/VPMAXQ/VPMINQ + var shift custom patterns
Commit: b7febd772c57fc21a126a8e125d749df9e4a6a53
https://github.com/llvm/llvm-project/commit/b7febd772c57fc21a126a8e125d749df9e4a6a53
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-04-12 (Sun, 12 Apr 2026)
Changed paths:
M llvm/lib/Target/X86/X86InstrAVX512.td
Log Message:
-----------
[X86] Convert VPABSQ NonVLX patterns to use avx512_unary_lowering helper (#191648)
Move avx512_unary_lowering so we can avoid manually writing the XMM/YMM->ZMM widening for NonVLX targets
Adds some missing comments for instruction classes as well
Commit: de56830e67700cac9b8b028a86d077b24847d251
https://github.com/llvm/llvm-project/commit/de56830e67700cac9b8b028a86d077b24847d251
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-04-12 (Sun, 12 Apr 2026)
Changed paths:
M clang/lib/AST/ByteCode/Interp.cpp
M clang/test/AST/ByteCode/cxx17.cpp
Log Message:
-----------
[clang][bytecode] Handle zero pointers in `isConstexprUnknown()` (#191691)
Commit: abc1ec1c0288c794d75c7238a1fb258229c17b8f
https://github.com/llvm/llvm-project/commit/abc1ec1c0288c794d75c7238a1fb258229c17b8f
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2026-04-12 (Sun, 12 Apr 2026)
Changed paths:
M flang/lib/Semantics/resolve-directives.cpp
Log Message:
-----------
[flang] clang-format flang/lib/Semantics/resolve-directives.cpp (#191660)
The changes are only on 5 lines, but now the entire file is invariant
under clang-format.
Commit: 2137d5ffbd454c85c31f8533721cd68dcf24015b
https://github.com/llvm/llvm-project/commit/2137d5ffbd454c85c31f8533721cd68dcf24015b
Author: Phoebe Wang <phoebe.wang at intel.com>
Date: 2026-04-12 (Sun, 12 Apr 2026)
Changed paths:
M llvm/include/llvm/CodeGen/TargetInstrInfo.h
M llvm/lib/CodeGen/InlineSpiller.cpp
M llvm/lib/CodeGen/LiveRangeEdit.cpp
M llvm/lib/CodeGen/PeepholeOptimizer.cpp
M llvm/lib/CodeGen/TargetInstrInfo.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.h
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.h
M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfo.h
M llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
M llvm/lib/Target/SystemZ/SystemZInstrInfo.h
M llvm/lib/Target/X86/X86FastISel.cpp
M llvm/lib/Target/X86/X86InstrInfo.cpp
M llvm/lib/Target/X86/X86InstrInfo.h
M llvm/test/CodeGen/X86/apx/or.ll
A llvm/test/CodeGen/X86/apx/pr191368.ll
Log Message:
-----------
[X86][APX] Return CopyMI when added in foldMemoryOperandImpl (#191368)
Fixes: #190962 #191165 #191239
Commit: 6911faf39c19ce31647b041fcaf0a69f78b32368
https://github.com/llvm/llvm-project/commit/6911faf39c19ce31647b041fcaf0a69f78b32368
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2026-04-12 (Sun, 12 Apr 2026)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp
M llvm/test/Transforms/InstCombine/fneg.ll
Log Message:
-----------
[InstCombine] Fix FMF propagation in `foldFNegIntoConstant` (#191653)
Counterexamples for ninf and nsz: https://alive2.llvm.org/ce/z/7-Je_K
Closes https://github.com/llvm/llvm-project/issues/189729.
Commit: 4af396057caf2df49df8d3f60f0ae040ae9312b4
https://github.com/llvm/llvm-project/commit/4af396057caf2df49df8d3f60f0ae040ae9312b4
Author: Max Graey <maxgraey at gmail.com>
Date: 2026-04-12 (Sun, 12 Apr 2026)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
M llvm/test/Transforms/InstCombine/fp-floor-ceil.ll
Log Message:
-----------
[InstCombine] Improve suboptimal simplification for more than one use in #190620 (#191702)
Address to
https://github.com/llvm/llvm-project/pull/190620#issuecomment-4229926121
Commit: 34c83399fe001cd3c1a19f38f30c83cdc2e8399f
https://github.com/llvm/llvm-project/commit/34c83399fe001cd3c1a19f38f30c83cdc2e8399f
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2026-04-12 (Sun, 12 Apr 2026)
Changed paths:
M flang/include/flang/Semantics/openmp-utils.h
M flang/lib/Semantics/openmp-utils.cpp
Log Message:
-----------
[flang][OpenMP] Update comments, NFC (#191709)
Some comments in openmp-utils.cpp became outdated after the code had
changed.
Commit: b31d8bc21bc324b73bf0a47e92216b9aac7408c0
https://github.com/llvm/llvm-project/commit/b31d8bc21bc324b73bf0a47e92216b9aac7408c0
Author: Lang Hames <lhames at gmail.com>
Date: 2026-04-12 (Sun, 12 Apr 2026)
Changed paths:
M llvm/include/llvm/ExecutionEngine/JITLink/JITLink.h
Log Message:
-----------
[JITLink] Use NonOwningSymbolStringPtrs in ExternalSymbolsMap. (#191634)
SymbolStringPtr comparisons should be more efficient that string
comparisons. Fixes a FIXME.
Commit: be62f270fd01e8c526f1e37df74ff1061e360dab
https://github.com/llvm/llvm-project/commit/be62f270fd01e8c526f1e37df74ff1061e360dab
Author: Lucas Ramirez <11032120+lucas-rami at users.noreply.github.com>
Date: 2026-04-12 (Sun, 12 Apr 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp
M llvm/lib/Target/AMDGPU/GCNSchedStrategy.h
M llvm/test/CodeGen/AMDGPU/machine-scheduler-sink-trivial-remats-attr.mir
M llvm/test/CodeGen/AMDGPU/machine-scheduler-sink-trivial-remats-debug.mir
R llvm/test/CodeGen/AMDGPU/misched-remat-revert.ll
M llvm/test/CodeGen/AMDGPU/sched_mfma_rewrite_copies.mir
M llvm/test/CodeGen/AMDGPU/sched_mfma_rewrite_cost.mir
M llvm/test/CodeGen/AMDGPU/sched_mfma_rewrite_diff_types.mir
Log Message:
-----------
[AMDGPU][Scheduler] Use MIR-level rematerializer in rematerialization stage (#189491)
This makes the scheduler's rematerialization stage use the
target-independent rematerializer. Previously duplicate logic is
deleted, and restrictions are put in place in the stage so that the same
constraints as before apply on rematerializable registers (as the
rematerializer is able to expose many more rematerialization
opportunities than what the stage can track at the moment). Consequently
it is not expected that this change improves performance overall, but it
is a first step toward being able to use the rematerializer's more
advanced capabilities during scheduling.
This is *not* a NFC for 2 reasons.
- Score equalities between two rematerialization candidates with
otherwise equivalent score are decided by their corresponding register's
index handle in the rematerializer (previously the pointer to their
state object's value). This is determined by the rematerializer's
register collection order, which is different from the stage's old
register collection order. This is the cause of all test changes but
one, and should not be detrimental to performance in real cases.
- To support rollback, the stage now uses the rematerializer's rollback
listener instead of its previous ad-hoc method (setting the opcode of
rematerialized MIs to a DBG_VALUE, and their registers to the sentinel).
This is the source of test changes in
`machine-scheduler-sink-trivial-remats-debug.mir`. The new rollback
mechanism completely removes the behavior tested by
`misched-remat-revert.ll` so the test is deleted.
---------
Co-authored-by: Shilei Tian <i at tianshilei.me>
Commit: 48ad929c0f3595bed417172de638ed9a0cbdb4c1
https://github.com/llvm/llvm-project/commit/48ad929c0f3595bed417172de638ed9a0cbdb4c1
Author: Hristo Hristov <hghristov.rmm at gmail.com>
Date: 2026-04-12 (Sun, 12 Apr 2026)
Changed paths:
M libcxx/docs/FeatureTestMacroTable.rst
M libcxx/docs/ReleaseNotes/23.rst
M libcxx/docs/Status/Cxx2cPapers.csv
M libcxx/include/__numeric/saturation_arithmetic.h
M libcxx/include/numeric
M libcxx/include/version
M libcxx/modules/std/numeric.inc
M libcxx/test/libcxx/numerics/nodiscard.verify.cpp
M libcxx/test/std/language.support/support.limits/support.limits.general/numeric.version.compile.pass.cpp
M libcxx/test/std/language.support/support.limits/support.limits.general/version.version.compile.pass.cpp
R libcxx/test/std/numerics/numeric.ops/numeric.ops.sat/add_sat.compile.pass.cpp
R libcxx/test/std/numerics/numeric.ops/numeric.ops.sat/add_sat.pass.cpp
R libcxx/test/std/numerics/numeric.ops/numeric.ops.sat/div_sat.assert.pass.cpp
R libcxx/test/std/numerics/numeric.ops/numeric.ops.sat/div_sat.compile.pass.cpp
R libcxx/test/std/numerics/numeric.ops/numeric.ops.sat/div_sat.pass.cpp
R libcxx/test/std/numerics/numeric.ops/numeric.ops.sat/mul_sat.compile.pass.cpp
R libcxx/test/std/numerics/numeric.ops/numeric.ops.sat/mul_sat.pass.cpp
R libcxx/test/std/numerics/numeric.ops/numeric.ops.sat/saturate_cast.compile.pass.cpp
R libcxx/test/std/numerics/numeric.ops/numeric.ops.sat/saturate_cast.pass.cpp
A libcxx/test/std/numerics/numeric.ops/numeric.ops.sat/saturating_add.compile.pass.cpp
A libcxx/test/std/numerics/numeric.ops/numeric.ops.sat/saturating_add.pass.cpp
A libcxx/test/std/numerics/numeric.ops/numeric.ops.sat/saturating_cast.compile.pass.cpp
A libcxx/test/std/numerics/numeric.ops/numeric.ops.sat/saturating_cast.pass.cpp
A libcxx/test/std/numerics/numeric.ops/numeric.ops.sat/saturating_div.assert.pass.cpp
A libcxx/test/std/numerics/numeric.ops/numeric.ops.sat/saturating_div.compile.pass.cpp
A libcxx/test/std/numerics/numeric.ops/numeric.ops.sat/saturating_div.pass.cpp
A libcxx/test/std/numerics/numeric.ops/numeric.ops.sat/saturating_mul.compile.pass.cpp
A libcxx/test/std/numerics/numeric.ops/numeric.ops.sat/saturating_mul.pass.cpp
A libcxx/test/std/numerics/numeric.ops/numeric.ops.sat/saturating_sub.compile.pass.cpp
A libcxx/test/std/numerics/numeric.ops/numeric.ops.sat/saturating_sub.pass.cpp
R libcxx/test/std/numerics/numeric.ops/numeric.ops.sat/sub_sat.compile.pass.cpp
R libcxx/test/std/numerics/numeric.ops/numeric.ops.sat/sub_sat.pass.cpp
M libcxx/utils/generate_feature_test_macro_components.py
Log Message:
-----------
[libc++][numeric] P4052R0: Renaming saturation arithmetic functions (#189574)
Implements P4052R0.
Also renames:
- the internal names for consistency.
- test files (no changes to the contents but the function names).
Fixes: #189589
---------
Co-authored-by: A. Jiang <de34 at live.cn>
Commit: b844cc8f8de9bfbd003cbe01e1295563c4ca62e6
https://github.com/llvm/llvm-project/commit/b844cc8f8de9bfbd003cbe01e1295563c4ca62e6
Author: Hristo Hristov <hghristov.rmm at gmail.com>
Date: 2026-04-12 (Sun, 12 Apr 2026)
Changed paths:
M libcxx/docs/Status/Cxx23Issues.csv
M libcxx/include/__ranges/iota_view.h
M libcxx/test/std/ranges/range.factories/range.iota.view/size.pass.cpp
Log Message:
-----------
[libc++][ranges] LWG3610: `iota_view::size` sometimes rejects integer-class types (#155169)
Fixes #104948
# References
- https://wg21.link/range.iota.view
- https://wg21.link/range.iota.view#17
- https://wg21.link/LWG3610
---------
Co-authored-by: A. Jiang <de34 at live.cn>
Commit: 778c0fb1dbf1803f8f250fd7feb935095e91e57b
https://github.com/llvm/llvm-project/commit/778c0fb1dbf1803f8f250fd7feb935095e91e57b
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-04-12 (Sun, 12 Apr 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/X86/phi-operand-gathered-loads.ll
Log Message:
-----------
[SLP] Fix GEP cost computation for load vectorization cost estimates
Pass Instruction::Load instead of Instruction::GetElementPtr to
getGEPCosts in isMaskedLoadCompress and CheckForShuffledLoads.
These call sites estimate costs for wide contiguous loads and sub-vector
load patterns, not for masked gather pointer vector formation. Using
Instruction::GetElementPtr incorrectly triggered the gather-style cost
path, which computes vector GEP formation costs. Since the call sites
already add scalarization overhead for pointer vector building
separately, this led to double-counting of pointer costs and inaccurate
vectorization decisions.
Reviewers: hiraditya, RKSimon
Pull Request: https://github.com/llvm/llvm-project/pull/191620
Commit: b444d1deb50896b334a9708dd7143b015dd59158
https://github.com/llvm/llvm-project/commit/b444d1deb50896b334a9708dd7143b015dd59158
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-04-12 (Sun, 12 Apr 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp
M llvm/lib/Target/AMDGPU/GCNSchedStrategy.h
M llvm/test/CodeGen/AMDGPU/machine-scheduler-sink-trivial-remats-attr.mir
M llvm/test/CodeGen/AMDGPU/machine-scheduler-sink-trivial-remats-debug.mir
A llvm/test/CodeGen/AMDGPU/misched-remat-revert.ll
M llvm/test/CodeGen/AMDGPU/sched_mfma_rewrite_copies.mir
M llvm/test/CodeGen/AMDGPU/sched_mfma_rewrite_cost.mir
M llvm/test/CodeGen/AMDGPU/sched_mfma_rewrite_diff_types.mir
Log Message:
-----------
Revert "[AMDGPU][Scheduler] Use MIR-level rematerializer in rematerialization stage (#189491)"
This reverts commit be62f270fd01e8c526f1e37df74ff1061e360dab, it breaks
the compilation!!!
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/191717
Commit: 636dbc8875733438370575f44d3f2777f6271b88
https://github.com/llvm/llvm-project/commit/636dbc8875733438370575f44d3f2777f6271b88
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-04-12 (Sun, 12 Apr 2026)
Changed paths:
M clang/lib/AST/ByteCode/Boolean.h
A clang/lib/AST/ByteCode/Char.h
M clang/lib/AST/ByteCode/Context.cpp
M clang/lib/AST/ByteCode/Descriptor.cpp
M clang/lib/AST/ByteCode/Descriptor.h
M clang/lib/AST/ByteCode/Disasm.cpp
M clang/lib/AST/ByteCode/Integral.h
M clang/lib/AST/ByteCode/IntegralAP.h
M clang/lib/AST/ByteCode/Interp.cpp
M clang/lib/AST/ByteCode/Interp.h
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
M clang/lib/AST/ByteCode/InterpBuiltinBitCast.cpp
M clang/lib/AST/ByteCode/InterpFrame.cpp
M clang/lib/AST/ByteCode/InterpStack.cpp
M clang/lib/AST/ByteCode/InterpStack.h
M clang/lib/AST/ByteCode/Pointer.cpp
M clang/lib/AST/ByteCode/Pointer.h
M clang/lib/AST/ByteCode/PrimType.cpp
M clang/lib/AST/ByteCode/PrimType.h
M clang/lib/AST/ByteCode/Primitives.h
M clang/lib/AST/ByteCode/Program.cpp
A clang/test/AST/ByteCode/addr-label-diff.c
A clang/test/AST/ByteCode/addr-label-diff.cpp
M clang/test/AST/ByteCode/builtin-bit-cast.cpp
M clang/test/AST/ByteCode/const-eval.c
M clang/test/AST/ByteCode/cxx11.cpp
A clang/test/AST/ByteCode/int-as-ptr-arith.c
M clang/test/CodeGen/const-init.c
M clang/test/CodeGen/const-label-addr.c
M clang/test/CodeGen/statements.c
M clang/test/CodeGen/staticinit.c
M clang/test/CodeGenCXX/2008-05-07-CrazyOffsetOf.cpp
M clang/test/CodeGenCXX/const-init-cxx11.cpp
M clang/test/CodeGenCXX/const-init.cpp
M clang/test/Sema/array-init.c
M clang/test/Sema/compound-literal.c
M clang/test/Sema/const-ptr-int-ptr-cast.c
M clang/test/Sema/init.c
M clang/test/SemaCXX/constexpr-string.cpp
M clang/unittests/AST/ByteCode/Descriptor.cpp
Log Message:
-----------
[clang][bytecode] Support different integral types (e.g. addresses) (#185028)
This is an alternative approach to
https://github.com/llvm/llvm-project/pull/169769.
We increase the size of the old `Integral<Bits, Signed>` to 24 bytes (on
a 64 bit system) and introduce a new `Char<Signed>` that's used for the
old `PT_Sint8` and `PT_Uint8` primitive types.
The old approach did not work out in the end because we need to be able
to do arithmetic (but essentially just `+` and `-`) on the offsets of
such integers-that-are-actually-pointers.
c-t-t-:
https://llvm-compile-time-tracker.com/compare.php?from=723d5cb11b2a64e4f11032f24967702e52f822bc&to=16dc90efebbf52e381c7655131b2fb74c307cc42&stat=instructions:u
Commit: e9cd683f1b216e0749005619ba0d7fd2caa3e7ca
https://github.com/llvm/llvm-project/commit/e9cd683f1b216e0749005619ba0d7fd2caa3e7ca
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-04-12 (Sun, 12 Apr 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
A llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-vslide1down-bf16.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-vslide1down.ll
A llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-vslide1up-bf16.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-vslide1up.ll
Log Message:
-----------
[RISCV] Enable vfslide1up/down for bf16 shuffles with Zvfbfa. (#191608)
Commit: 1d1208b626c48c678d827ed88c4e68c2f237688b
https://github.com/llvm/llvm-project/commit/1d1208b626c48c678d827ed88c4e68c2f237688b
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-04-12 (Sun, 12 Apr 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
A llvm/test/Transforms/SLPVectorizer/X86/copyable-phi-used-non-copyable.ll
Log Message:
-----------
[SLP]Fix dominance failure when value is copyable in one PHI entry but non-copyable in another
When a value is treated as a copyable element in one tree entry and as a
non-copyable element in another, both feeding into PHI nodes, the
scheduler could produce vectorized IR where an instruction does not
dominate all its uses. Bail out of scheduling in tryScheduleBundle when
this conflict is detected to prevent generating broken modules.
Fixes #191714
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/191724
Commit: 90d35155ff5295c4c4d27b42e3ecb33d03cdd292
https://github.com/llvm/llvm-project/commit/90d35155ff5295c4c4d27b42e3ecb33d03cdd292
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-04-12 (Sun, 12 Apr 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/X86/phi-operand-gathered-loads.ll
Log Message:
-----------
Revert "[SLP] Fix GEP cost computation for load vectorization cost estimates"
This reverts commit 778c0fb1dbf1803f8f250fd7feb935095e91e57b to fix
buildbots https://lab.llvm.org/buildbot/#/builders/213/builds/2725, https://lab.llvm.org/buildbot/#/builders/212/builds/2876
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/191725
Commit: 8113b989337c61f5063939ec8e3ce4ba5ee4f213
https://github.com/llvm/llvm-project/commit/8113b989337c61f5063939ec8e3ce4ba5ee4f213
Author: Madhur Kumar <152476790+MadhurKumar004 at users.noreply.github.com>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
A llvm/test/Transforms/InstCombine/icmp-umax-notx.ll
Log Message:
-----------
[InstCombine] Missed fold: umax(x, C) > ~x -> x < 0 (#189396)
fix : https://github.com/llvm/llvm-project/issues/187648
Fix the missed optimization for
`icmp ugt (umax(x, C)), ~x` and `icmp ult (umax(x, C)), ~x`
Alive2 proof:
https://alive2.llvm.org/ce/z/dDNJ2m
https://alive2.llvm.org/ce/z/X633UX
Commit: 6c779819669204c7f23240b1050929672296ee59
https://github.com/llvm/llvm-project/commit/6c779819669204c7f23240b1050929672296ee59
Author: Lang Hames <lhames at gmail.com>
Date: 2026-04-12 (Sun, 12 Apr 2026)
Changed paths:
M llvm/examples/Kaleidoscope/BuildingAJIT/Chapter3/KaleidoscopeJIT.h
M llvm/examples/Kaleidoscope/BuildingAJIT/Chapter4/KaleidoscopeJIT.h
M llvm/examples/OrcV2Examples/LLJITWithExecutorProcessControl/LLJITWithExecutorProcessControl.cpp
M llvm/include/llvm/ExecutionEngine/Orc/EPCIndirectionUtils.h
M llvm/include/llvm/ExecutionEngine/Orc/ExecutorProcessControl.h
M llvm/include/llvm/ExecutionEngine/Orc/JITLinkRedirectableSymbolManager.h
M llvm/include/llvm/ExecutionEngine/Orc/SelfExecutorProcessControl.h
M llvm/include/llvm/ExecutionEngine/Orc/SimpleRemoteEPC.h
M llvm/lib/ExecutionEngine/Orc/EPCIndirectionUtils.cpp
M llvm/lib/ExecutionEngine/Orc/JITLinkRedirectableSymbolManager.cpp
M llvm/lib/ExecutionEngine/Orc/SelfExecutorProcessControl.cpp
M llvm/lib/ExecutionEngine/Orc/SimpleRemoteEPC.cpp
M llvm/tools/llvm-jitlink/llvm-jitlink.cpp
M llvm/tools/llvm-jitlink/llvm-jitlink.h
M llvm/unittests/ExecutionEngine/Orc/JITLinkRedirectionManagerTest.cpp
M llvm/unittests/ExecutionEngine/Orc/LazyCallThroughAndReexportsTest.cpp
M llvm/unittests/ExecutionEngine/Orc/OrcTestCommon.h
M llvm/unittests/ExecutionEngine/Orc/ReOptimizeLayerTest.cpp
Log Message:
-----------
[ORC] Move MemoryAccess ownership out of ExecutorProcessControl. (#191715)
Similar to the DylibManager change in e55fb5de0f9, this removes an
unnecessary coupling between ExecutorProcessControl and MemoryAccess,
allowing clients to select MemoryAccess implementations independently.
To simplify the transition, the
ExecutorProcessControl::createDefaultMemoryAccess method will return an
instance of whatever MemoryAccess the ExecutorProcessControl
implementation had been using previously.
Commit: 183660de3a29cbd69f51730ee2044437edcaf32a
https://github.com/llvm/llvm-project/commit/183660de3a29cbd69f51730ee2044437edcaf32a
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-04-12 (Sun, 12 Apr 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/X86/phi-operand-gathered-loads.ll
Log Message:
-----------
[SLP] Fix GEP cost computation for load vectorization cost estimates
Pass Instruction::Load instead of Instruction::GetElementPtr to
getGEPCosts in isMaskedLoadCompress and CheckForShuffledLoads.
These call sites estimate costs for wide contiguous loads and sub-vector
load patterns, not for masked gather pointer vector formation. Using
Instruction::GetElementPtr incorrectly triggered the gather-style cost
path, which computes vector GEP formation costs. Since the call sites
already add scalarization overhead for pointer vector building
separately, this led to double-counting of pointer costs and inaccurate
vectorization decisions.
Reviewers: hiraditya, RKSimon
Pull Request: https://github.com/llvm/llvm-project/pull/191728
Commit: 0ab10d1c446db03beaf6e6302910132f5ea3492d
https://github.com/llvm/llvm-project/commit/0ab10d1c446db03beaf6e6302910132f5ea3492d
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-04-12 (Sun, 12 Apr 2026)
Changed paths:
M llvm/lib/Analysis/ValueTracking.cpp
A llvm/test/Transforms/InstCombine/known-range-frexp-exp.ll
Log Message:
-----------
ValueTracking: Handle frexp exp in computeKnownConstantRange (#191282)
Commit: 7c872e96aa71e406e479e6f95901c72eef79da97
https://github.com/llvm/llvm-project/commit/7c872e96aa71e406e479e6f95901c72eef79da97
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-04-12 (Sun, 12 Apr 2026)
Changed paths:
A llvm/test/Transforms/SLPVectorizer/X86/operand-reorder-with-copyables.ll
Log Message:
-----------
[SLP][NFC]Add a test with the reordering of the RHS/LHS operands for copyables, NFC
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/191730
Commit: b799b380ba3ae3b099c244cf53928af9d4d47d80
https://github.com/llvm/llvm-project/commit/b799b380ba3ae3b099c244cf53928af9d4d47d80
Author: Fangrui Song <i at maskray.me>
Date: 2026-04-12 (Sun, 12 Apr 2026)
Changed paths:
M llvm/include/llvm/CodeGen/AsmPrinter.h
M llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
M llvm/test/CodeGen/X86/prefalign.ll
Log Message:
-----------
[AsmPrinter] Fix redundant/weaker .prefalign when IR align attr >= prefalign (#191675)
PR #155529 (only fired with -ffunction-sections, then modified by PR
184032) compared `MF->getAlignment()` (the backend's minimum function
alignment) against `MF->getPreferredAlignment()` to decide whether to
emit `.prefalign`. This ignored the IR function's own align attribute,
which `emitAlignment` picks up later via `getGVAlignment`, so the
comparison was against the wrong minimum.
Consequences on x86 (backend min = 1, target pref = 16):
* `[[gnu::aligned(32)]] void g(){}` lowers to `align 32 prefalign(32)`.
.p2align 5
.prefalign 5, .Lfunc_end, nop
The .prefalign is fully redundant: .p2align 5 already forces the
desired 32-byte alignment.
* `define void @f4() align 32 prefalign(16)`.
.p2align 5
.prefalign 4, .Lfunc_end, nop
Here .prefalign with a weak alignment is harmless but the assembly
output is nonsensical.
This patch updates `emitAlignment` to return the effective alignment it
emits and use that as the true minimum in `emitFunctionHeader`.
Commit: 56775ba553bf47bf14cbf4d3ec1ea3619d4f6356
https://github.com/llvm/llvm-project/commit/56775ba553bf47bf14cbf4d3ec1ea3619d4f6356
Author: Jinsong Ji <jinsong.ji at intel.com>
Date: 2026-04-12 (Sun, 12 Apr 2026)
Changed paths:
M llvm/tools/llubi/lib/Library.cpp
Log Message:
-----------
[llubi] Fix invalid printf format specifier for %c (#191713)
Fix ASAN warning about unexpected format specifier %llc introduced
in commit f149ab665a4b. The 'c' format specifier should not have the
'll' length modifier. Separated the 'c' case to use the correct format
without the length modifier, casting to int as required by the standard.
Commit: 5b1b0efbaa97c43a6cd32df37eaa0ea7f282aeec
https://github.com/llvm/llvm-project/commit/5b1b0efbaa97c43a6cd32df37eaa0ea7f282aeec
Author: Jinsong Ji <jinsong.ji at intel.com>
Date: 2026-04-12 (Sun, 12 Apr 2026)
Changed paths:
M clang/tools/diagtool/ShowEnabledWarnings.cpp
Log Message:
-----------
[Clang][diagtool] Fix memory leak in ShowEnabledWarnings (#191711)
Fix 136-byte memory leak introduced in commit 6dc059ac3c7c. Before
that commit, the TextDiagnosticBuffer was passed to DiagnosticsEngine
constructor which took ownership and managed its lifetime. After the
refactoring, the buffer is no longer passed to DiagnosticsEngine, so
it becomes an orphaned allocation that is never freed. Changed to use
std::unique_ptr for automatic cleanup.
Commit: 029e5b017bfd5a564a664a6f6a8d40bda40125bf
https://github.com/llvm/llvm-project/commit/029e5b017bfd5a564a664a6f6a8d40bda40125bf
Author: Eugene Shalygin <eugene.shalygin at gmail.com>
Date: 2026-04-12 (Sun, 12 Apr 2026)
Changed paths:
M clang/lib/Format/BreakableToken.cpp
M clang/lib/Format/ContinuationIndenter.cpp
M clang/lib/Format/ContinuationIndenter.h
M clang/lib/Format/FormatToken.h
M clang/lib/Format/UnwrappedLineFormatter.cpp
M clang/lib/Format/WhitespaceManager.cpp
M clang/lib/Format/WhitespaceManager.h
M clang/unittests/Format/AlignmentTest.cpp
Log Message:
-----------
[clang-format] treat continuation as indent for aligned lines (#191217)
This allows to inherit tabbed indent from the lines we break by the
lines we want to align. Thus in the AlignWithSpaces mode aligned lines
do not generate smaller indent than those they are aligned to.
Commit: 717ba7c3107dc7ebc41feaaedf1d8eaf89306e04
https://github.com/llvm/llvm-project/commit/717ba7c3107dc7ebc41feaaedf1d8eaf89306e04
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-04-12 (Sun, 12 Apr 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanConstruction.cpp
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
Log Message:
-----------
[VPlan] Handle calls in VPInstruction:opcodeMayReadOrWriteFromMemory. (#190681)
Retrieve the called function and check its memory attributes, to
determine if a VPInstruction calling a function reads or writes memory.
Use it to strengthen assert in areAllLoadsDereferenceable.
PR: https://github.com/llvm/llvm-project/pull/190681
Commit: c0fbdb21bb23554a662cff743fddf5721a14102f
https://github.com/llvm/llvm-project/commit/c0fbdb21bb23554a662cff743fddf5721a14102f
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-04-12 (Sun, 12 Apr 2026)
Changed paths:
M clang/lib/AST/ByteCode/EvaluationResult.cpp
Log Message:
-----------
[clang][bytecode] Stop using QualTypes when checking evaluation results (#191732)
They might not match the descriptor contents exactly, so just look at
the descriptors.
Commit: d946ac356897e863392d1454607889166ae74cc0
https://github.com/llvm/llvm-project/commit/d946ac356897e863392d1454607889166ae74cc0
Author: Robert Imschweiler <robert.imschweiler at amd.com>
Date: 2026-04-12 (Sun, 12 Apr 2026)
Changed paths:
M llvm/lib/Transforms/Utils/CallGraphUpdater.cpp
A llvm/test/Transforms/Inline/inline-history-dead-function.ll
Log Message:
-----------
[CallGraphUpdater] Replace dead function in metadata with null instead of poison (#191729)
Assisted-by: claude-4.6-opus
Commit: e62acf49a636a1014e991d75dfa49f0a7cf7951f
https://github.com/llvm/llvm-project/commit/e62acf49a636a1014e991d75dfa49f0a7cf7951f
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2026-04-12 (Sun, 12 Apr 2026)
Changed paths:
M llvm/include/llvm-c/Core.h
M llvm/include/llvm/IR/IRBuilder.h
M llvm/lib/IR/Core.cpp
M llvm/lib/IR/IRBuilder.cpp
Log Message:
-----------
[NFC][LLVM] Rename IRBuilder/LLVM C API params for overload types (#191674)
Rename IRBuilder and LLVM C API function params for overload types to
use names to better reflect their meaning.
Commit: 2c28158cb74a78226e95b8bc90c88154eb56a742
https://github.com/llvm/llvm-project/commit/2c28158cb74a78226e95b8bc90c88154eb56a742
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2026-04-12 (Sun, 12 Apr 2026)
Changed paths:
M llvm/lib/IR/Intrinsics.cpp
M llvm/utils/TableGen/Basic/IntrinsicEmitter.cpp
Log Message:
-----------
[LLVM][Intrinsics] Eliminate range check for IIT table in `DecodeIITType` (#190260)
`DecodeIITType` does a range check each time the next entry from the IIT
encoding table is read. This is required to handle IIT encodings that
are in-lined into the `IIT_Table` entries, since the `IITEntries` array
in `getIntrinsicInfoTableEntries` is terminated after the last non-zero
nibble is seen in the inlined encoding (but that may not be the actual
end). Change this code to instead have the `IITEntries` array for the
inlined case point to the full `IITValues` array payload + a IIT_Done
terminator, so that such entries look exactly like they would if they
were encoded in the long encoding table and then remove the range check
in `DecodeIITType` to streamline that code a bit.
Additionally, change some use if 0s (in loop conditions and default
constructed terminator in the IIT long encoding table) to explicitly use
IIT_Done to clarify the code better.
Also use `consume_front()` in a few places instead of `front()` followed
by `slice(1)`.
Commit: 00328f10ac90d4d254efed0af5bd193ff731841b
https://github.com/llvm/llvm-project/commit/00328f10ac90d4d254efed0af5bd193ff731841b
Author: 🍌Shawn <m18824909883 at 163.com>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M flang/lib/Optimizer/Transforms/MIFOpConversion.cpp
Log Message:
-----------
[flang][NFC] Fix typo in comment for multi-image environment (#191722)
Commit: 7b94b9ae13c69075a85d3af8b987a38610fbce5a
https://github.com/llvm/llvm-project/commit/7b94b9ae13c69075a85d3af8b987a38610fbce5a
Author: Wenju He <wenju.he at intel.com>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M libclc/clc/lib/generic/workitem/clc_get_sub_group_size.cl
Log Message:
-----------
[libclc] Refine generic __clc_get_sub_group_size with fast full sub-group path (#188895)
Add a fast path for the common case that total work-group size is
multiple of max sub-group size.
The fallback path is ported from amdgpu/workitem/clc_get_sub_group_size.cl.
Compiler can generate predicated instructions for the fallback path to
avoid branches.
Commit: 507d82339230990d65ccfe753d0fd3e620c82b71
https://github.com/llvm/llvm-project/commit/507d82339230990d65ccfe753d0fd3e620c82b71
Author: Wenju He <wenju.he at intel.com>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp
M llvm/test/CodeGen/X86/AMX/amx-across-func.ll
M llvm/test/Transforms/LoopStrengthReduce/RISCV/lsr-drop-solution-dbg-msg.ll
M llvm/test/Transforms/LoopStrengthReduce/X86/2011-11-29-postincphi.ll
M llvm/test/Transforms/LoopStrengthReduce/X86/postinc-iv-used-by-urem-and-udiv.ll
M llvm/test/Transforms/LoopStrengthReduce/X86/pr62660-normalization-failure.ll
M llvm/test/Transforms/LoopStrengthReduce/duplicated-phis.ll
Log Message:
-----------
[LSR] Use TTI to check if zero-start IV is free in getSetupCost (#190587)
This avoids a downstream regression where LSR prefers {-1,+1}.
When constant zero typically doesn't require preheader initialization
(queried via TTI::getIntImmCost), consider it as free in getSetupCost.
Three test changes are improvements: amx-across-func.ll,
2011-11-29-postincphi.ll and pr62660-normalization-failure.ll.
Other test changes are neutral.
Commit: 121f5a96ff38ec0c5d5f7274b1b0ca0df26a1cee
https://github.com/llvm/llvm-project/commit/121f5a96ff38ec0c5d5f7274b1b0ca0df26a1cee
Author: Wenju He <wenju.he at intel.com>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M .ci/compute_projects.py
M .ci/compute_projects_test.py
M .ci/monolithic-linux.sh
M .ci/monolithic-windows.sh
M libclc/CMakeLists.txt
M libclc/README.md
M libclc/test/CMakeLists.txt
M llvm/runtimes/CMakeLists.txt
Log Message:
-----------
[libclc] Enable LLVM_RUNTIME_TARGETS in build system (#189892)
libclc target is now passed in from LLVM_RUNTIME_TARGETS.
The old configure flow based on `-DLLVM_ENABLE_RUNTIMES=libclc` is
deprecated because libclc no longer has a default target.
`-DLLVM_ENABLE_RUNTIMES=libclc -DLLVM_RUNTIME_TARGETS="<target-triple>"`
still works but it is considered legacy.
The new standard build requires:
Each target must now be selected explicitly on the CMake command line
through the runtimes target-specific cache entry and
LLVM_RUNTIME_TARGETS.
For example:
-DRUNTIMES_amdgcn-amd-amdhsa-llvm_LLVM_ENABLE_RUNTIMES=libclc
-DLLVM_RUNTIME_TARGETS="amdgcn-amd-amdhsa-llvm"
-DRUNTIMES_nvptx64-nvidia-cuda_LLVM_ENABLE_RUNTIMES=libclc
-DLLVM_RUNTIME_TARGETS="nvptx64-nvidia-cuda"
-DRUNTIMES_clspv--_LLVM_ENABLE_RUNTIMES=libclc
-DLLVM_RUNTIME_TARGETS="clspv--"
-DRUNTIMES_clspv64--_LLVM_ENABLE_RUNTIMES=libclc
-DLLVM_RUNTIME_TARGETS="clspv64--"
-DRUNTIMES_spirv-mesa3d-_LLVM_ENABLE_RUNTIMES=libclc
-DLLVM_RUNTIME_TARGETS="spirv-mesa3d-"
-DRUNTIMES_spirv64-mesa3d-_LLVM_ENABLE_RUNTIMES=libclc
-DLLVM_RUNTIME_TARGETS="spirv64-mesa3d-"
To build multiple targets, pass them as a semicolon-separated list in
`LLVM_RUNTIME_TARGETS` and provide a matching
`RUNTIMES_<target-triple>_LLVM_ENABLE_RUNTIMES=libclc` entry for each
target.
Updated README.md to document the new build flow.
---------
Co-authored-by: Copilot <175728472+Copilot at users.noreply.github.com>
Commit: 215f35eb8f1c313ac135ad47db1cc0b99b3ae694
https://github.com/llvm/llvm-project/commit/215f35eb8f1c313ac135ad47db1cc0b99b3ae694
Author: Cullen Rhodes <cullen.rhodes at arm.com>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ExpandPseudoInsts.cpp
Log Message:
-----------
[AArch64] Skip non-pseudo instructions in AArch64ExpandPseudoInsts (#191395)
AArch64::getSVEPseudoMap calls are visible in compile-time profiles even on
non-SVE targets. I think CodeGenMapTable could be improved, it's currently
emitting a constexpr array sorted by opcode and a hand-rolled binary search
over that array, however the AArch64ExpandPseudoInsts pass is missing a simple
check for pseudo instructions before expanding. This avoids the compile-time
cost.
https://llvm-compile-time-tracker.com/compare.php?from=0d42811ea4658b3e86a3801b3bc848324f8540f8&to=9e2434de84577ca1c5e6de8fe8d75c6b8e282b3f&stat=instructions%3Au
Commit: c755c084b07e86724586a8eeffdfff8c600ce1d5
https://github.com/llvm/llvm-project/commit/c755c084b07e86724586a8eeffdfff8c600ce1d5
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-04-12 (Sun, 12 Apr 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/test/CodeGen/RISCV/split-udiv-by-constant.ll
M llvm/test/CodeGen/RISCV/split-urem-by-constant.ll
M llvm/test/CodeGen/X86/i128-udiv.ll
Log Message:
-----------
[TargetLowering] Support larger divisors in expandDIVREMByConstant. (#191119)
Instead of bailing out if the original divisor exceeds HBitWidth,
allow divisors that fit in HBitWidth after removing trailing zeros.
PartialRem now needs a low and high part. Shifting RemL left
now needs to handle shifting into RemH.
Assisted-by: Claude Sonnet 4.5
Commit: f647f0ce8e905b1a64035e5c6d3c75de26c9481c
https://github.com/llvm/llvm-project/commit/f647f0ce8e905b1a64035e5c6d3c75de26c9481c
Author: Ryan Buchner <rbuchner at qti.qualcomm.com>
Date: 2026-04-12 (Sun, 12 Apr 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/RISCV/revec-strided-load.ll
Log Message:
-----------
[SLP] Fix handling of strided loads during re-vectorization (#191294)
Fixes #191292
Commit: 682ae8b626393ad77afebebda912f14f3c55a003
https://github.com/llvm/llvm-project/commit/682ae8b626393ad77afebebda912f14f3c55a003
Author: Arun Thangamani <arun.thangamani at intel.com>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M mlir/lib/Dialect/X86/Transforms/VectorContractToAMXDotProduct.cpp
M mlir/test/Dialect/X86/AMX/vector-contract-to-tiled-dp.mlir
Log Message:
-----------
[mlir][x86] Lower packed type vector.contract to AMX dot-product (online-packing) (#188192)
A transform pass to lower flat layout `vector.contract` operation to (a)
amx.tile_mulf for BF16, or (b) amx.tile_muli for Int8 packed types via
`online` packing.
TODOs: On an another `patch` planned to re-factor this pass + retiring
`convert-vector-to-amx` pass.
Commit: 52553173b9f67529f509e11116298c97425e6e05
https://github.com/llvm/llvm-project/commit/52553173b9f67529f509e11116298c97425e6e05
Author: Luke Lau <luke at igalia.com>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vsadd-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vsaddu-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vssub-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vssubu-vp.ll
M llvm/test/CodeGen/RISCV/rvv/sink-splat-operands.ll
M llvm/test/CodeGen/RISCV/rvv/vsadd-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vsaddu-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vssub-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vssubu-vp.ll
Log Message:
-----------
[RISCV] Remove codegen for vp_{u,s}{add,sub}sat (#191639)
Part of the work to remove trivial VP intrinsics from the RISC-V
backend, see
https://discourse.llvm.org/t/rfc-remove-codegen-support-for-trivial-vp-intrinsics-in-the-risc-v-backend/87999
This splits off 4 intrinsics from #179622.
Commit: 1d18740d307bb30cca9e9c8b2dc15e161d8e10f0
https://github.com/llvm/llvm-project/commit/1d18740d307bb30cca9e9c8b2dc15e161d8e10f0
Author: Amit Tiwari <amtiwari at amd.com>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M clang/bindings/python/clang/cindex.py
M clang/include/clang-c/Index.h
M clang/include/clang/AST/OpenMPClause.h
M clang/include/clang/AST/RecursiveASTVisitor.h
M clang/include/clang/AST/StmtOpenMP.h
M clang/include/clang/ASTMatchers/ASTMatchers.h
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Basic/StmtNodes.td
M clang/include/clang/Parse/Parser.h
M clang/include/clang/Sema/SemaOpenMP.h
M clang/include/clang/Serialization/ASTBitCodes.h
M clang/lib/AST/OpenMPClause.cpp
M clang/lib/AST/StmtOpenMP.cpp
M clang/lib/AST/StmtPrinter.cpp
M clang/lib/AST/StmtProfile.cpp
M clang/lib/ASTMatchers/ASTMatchersInternal.cpp
M clang/lib/ASTMatchers/Dynamic/Registry.cpp
M clang/lib/Basic/OpenMPKinds.cpp
M clang/lib/CodeGen/CGStmt.cpp
M clang/lib/CodeGen/CGStmtOpenMP.cpp
M clang/lib/CodeGen/CodeGenFunction.h
M clang/lib/Parse/ParseOpenMP.cpp
M clang/lib/Sema/SemaExceptionSpec.cpp
M clang/lib/Sema/SemaOpenMP.cpp
M clang/lib/Sema/TreeTransform.h
M clang/lib/Serialization/ASTReader.cpp
M clang/lib/Serialization/ASTReaderStmt.cpp
M clang/lib/Serialization/ASTWriter.cpp
M clang/lib/Serialization/ASTWriterStmt.cpp
M clang/lib/StaticAnalyzer/Core/ExprEngine.cpp
A clang/test/AST/ast-dump-openmp-split.c
A clang/test/Analysis/split_analyze.c
A clang/test/Index/openmp-split.c
A clang/test/OpenMP/split_ast_print.cpp
A clang/test/OpenMP/split_codegen.cpp
A clang/test/OpenMP/split_composition.cpp
A clang/test/OpenMP/split_compound_associated.cpp
A clang/test/OpenMP/split_counts_constexpr.cpp
A clang/test/OpenMP/split_counts_ice.c
A clang/test/OpenMP/split_counts_verify.c
A clang/test/OpenMP/split_diag_errors.c
A clang/test/OpenMP/split_distribute_inner_split.cpp
A clang/test/OpenMP/split_driver_smoke.c
A clang/test/OpenMP/split_iv_types.c
A clang/test/OpenMP/split_loop_styles.cpp
A clang/test/OpenMP/split_member_ctor.cpp
A clang/test/OpenMP/split_messages.cpp
A clang/test/OpenMP/split_nested_outer_only.c
A clang/test/OpenMP/split_offload_codegen.cpp
A clang/test/OpenMP/split_omp_fill.c
A clang/test/OpenMP/split_openmp_version.cpp
A clang/test/OpenMP/split_opts_simd_debug.cpp
A clang/test/OpenMP/split_parallel_split.cpp
A clang/test/OpenMP/split_pch_codegen.cpp
A clang/test/OpenMP/split_range_for_diag.cpp
A clang/test/OpenMP/split_serialize_module.cpp
A clang/test/OpenMP/split_teams_nesting.cpp
A clang/test/OpenMP/split_template_nttp.cpp
A clang/test/OpenMP/split_templates.cpp
A clang/test/OpenMP/split_trip_volatile.c
M clang/tools/libclang/CIndex.cpp
M clang/tools/libclang/CXCursor.cpp
M clang/unittests/ASTMatchers/ASTMatchersNodeTest.cpp
M clang/unittests/ASTMatchers/ASTMatchersTest.h
M llvm/include/llvm/Frontend/OpenMP/OMP.td
A openmp/runtime/test/transform/split/fill_first.c
A openmp/runtime/test/transform/split/foreach.cpp
A openmp/runtime/test/transform/split/intfor.c
A openmp/runtime/test/transform/split/intfor_negstart.c
A openmp/runtime/test/transform/split/iterfor.cpp
A openmp/runtime/test/transform/split/leq_bound.c
A openmp/runtime/test/transform/split/lit.local.cfg
A openmp/runtime/test/transform/split/negative_incr.c
A openmp/runtime/test/transform/split/nonconstant_incr.c
A openmp/runtime/test/transform/split/parallel-split-intfor.c
A openmp/runtime/test/transform/split/single_fill.c
A openmp/runtime/test/transform/split/three_segments.c
A openmp/runtime/test/transform/split/trip_one.c
A openmp/runtime/test/transform/split/unsigned_iv.c
A openmp/runtime/test/transform/split/zero_first_segment.c
Log Message:
-----------
[Clang][OpenMP] Implement Loop splitting `#pragma omp split` directive (#190397)
Implement Loop-splitting #pragma omp split construct with counts clause.
Posting this PR after the revert of PR
([#183261](https://github.com/llvm/llvm-project/pull/183261))
Changes:
1. Added `openmp/runtime/test/transform/split/lit.local.cfg`
2. Enforced ICE for `counts` clause items in `SemaOpenMP.cpp` (minor
change)
3. Updated tests `split_messages.cpp`, `split_omp_fill.cpp`,
`split_diag_errors.c`.
4. Removed `nonconstant_count.cpp`
Commit: 82442a58c054611219385528f06a05bf1eb19215
https://github.com/llvm/llvm-project/commit/82442a58c054611219385528f06a05bf1eb19215
Author: David Green <david.green at arm.com>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/test/Analysis/CostModel/AArch64/ldexp.ll
M llvm/test/CodeGen/AArch64/ldexp.ll
Log Message:
-----------
[AArch64] Fix legalization of bf16 ldexp. (#190805)
Similar to fp16 ldexp, we cannot create illegal types for bf16 during
lowering so should promote.
Commit: c76cb2ba3c43d09d4a273bf0fe14be55789d9370
https://github.com/llvm/llvm-project/commit/c76cb2ba3c43d09d4a273bf0fe14be55789d9370
Author: Chandana Mudda <quic_csinderi at quicinc.com>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M clang/lib/StaticAnalyzer/Core/RegionStore.cpp
A clang/test/Analysis/regionstore-zero-init.cpp
Log Message:
-----------
[analyzer] Refine default binding preservation in RegionStore (#189319)
Narrow the new setImplicitDefaultValue() guard so existing default
bindings are preserved only for aggregate-like cases.
The previous change was too broad and regressed normal
zero-initialization, causing new int[10]{} to be modeled as undefined
and emit a garbage-value warning instead of the expected analyzer
reports.
Commit: fe74f12a9e71abb89f2732bb50df4a8271f9d1a1
https://github.com/llvm/llvm-project/commit/fe74f12a9e71abb89f2732bb50df4a8271f9d1a1
Author: Tomer Shafir <tomer.shafir8 at gmail.com>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M llvm/include/llvm/CodeGen/ScheduleDAG.h
M llvm/lib/CodeGen/ScheduleDAG.cpp
Log Message:
-----------
[MISched] Extract `isClustered()` method on SUnit (NFC) (#191700)
This patch encapsulates the check for wether a `SUnit` is clustered,
rather than letting it scatter across call sites. Currently there is
only a single user, but more users can show up, and I think it provides
a cleaner API even for that single user.
Commit: a95979686f532a194d9fb8a8671800f5e75e3405
https://github.com/llvm/llvm-project/commit/a95979686f532a194d9fb8a8671800f5e75e3405
Author: Luke Lau <luke at igalia.com>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
Log Message:
-----------
[VPlan] Assert ComputeReductionResult isn't predicated in middle block. NFC (#191767)
Commit: 53e01f1f6471d0d7c6db3b793e1005386d09e8c2
https://github.com/llvm/llvm-project/commit/53e01f1f6471d0d7c6db3b793e1005386d09e8c2
Author: Luke Hutton <luke.hutton at arm.com>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M mlir/lib/Dialect/Tosa/IR/TosaOps.cpp
M mlir/test/Dialect/Tosa/invalid.mlir
M mlir/test/Dialect/Tosa/verifier.mlir
Log Message:
-----------
[mlir][tosa] Improve matmul verifier to check shape information (#191300)
Updates the matmul verifier to check input and output shapes are valid.
Also adds some tests for verifier failures which were previously not
covered.
Commit: 6073fde018a71ed364b1fe3c052c920b8b032deb
https://github.com/llvm/llvm-project/commit/6073fde018a71ed364b1fe3c052c920b8b032deb
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.h
A llvm/test/Transforms/LoopVectorize/tail-folding-constant-trip-counts.ll
Log Message:
-----------
[VPlan] Directly check if middle block is pred of scalar preheader. (#191768)
hasScalarTail currently returns incorrect results when queried after
runtime checks have been added. Generalize and harden by checking if the
middle block is a predecessor of the scalar preheader.
Commit: abece588672ebf849e393077ded2daa88be06802
https://github.com/llvm/llvm-project/commit/abece588672ebf849e393077ded2daa88be06802
Author: Mao Chuanjun <10255501521 at stu.ecnu.edu.cn>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M clang-tools-extra/clang-tidy/bugprone/NarrowingConversionsCheck.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/test/clang-tidy/checkers/bugprone/narrowing-conversions.cpp
Log Message:
-----------
[clang-tidy] Fix a false positive when converting a bool to a signed integer type (#191696)
Fix #191337
Commit: 923340b3786470c140598fa7203050786957c484
https://github.com/llvm/llvm-project/commit/923340b3786470c140598fa7203050786957c484
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M clang/lib/AST/ByteCode/Interp.cpp
M clang/test/AST/ByteCode/placement-new.cpp
Log Message:
-----------
[clang][bytecode] Fix placement new on multidimensional array elements (#191766)
The direct base of those pointers is not a union, i.e. `getRecord()`
returns `nullptr`.
Commit: 9a5bc720257024b44cf9f4c63741be53c4fba4c2
https://github.com/llvm/llvm-project/commit/9a5bc720257024b44cf9f4c63741be53c4fba4c2
Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M clang/test/CodeGen/AArch64/sme-remarks.c
M llvm/docs/AArch64SME.rst
M llvm/lib/IR/Verifier.cpp
M llvm/lib/Target/AArch64/AArch64.h
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.h
M llvm/lib/Target/AArch64/AArch64MachineFunctionInfo.h
M llvm/lib/Target/AArch64/AArch64SMEAttributes.cpp
M llvm/lib/Target/AArch64/AArch64SMEAttributes.h
M llvm/lib/Target/AArch64/AArch64SMEInstrInfo.td
M llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
M llvm/lib/Target/AArch64/AArch64TargetMachine.h
M llvm/lib/Target/AArch64/CMakeLists.txt
M llvm/lib/Target/AArch64/MachineSMEABIPass.cpp
R llvm/lib/Target/AArch64/SMEABIPass.cpp
M llvm/test/CodeGen/AArch64/aarch64-sme-za-call-lowering.ll
M llvm/test/CodeGen/AArch64/sme-abi-save-call-remarks.ll
M llvm/test/CodeGen/AArch64/sme-agnostic-za.ll
M llvm/test/CodeGen/AArch64/sme-dynamic-tls.ll
M llvm/test/CodeGen/AArch64/sme-lazy-save-call.ll
M llvm/test/CodeGen/AArch64/sme-lazy-save-windows.ll
M llvm/test/CodeGen/AArch64/sme-lazy-sve-nzcv-live.mir
M llvm/test/CodeGen/AArch64/sme-new-za-function.ll
R llvm/test/CodeGen/AArch64/sme-new-zt0-function.ll
M llvm/test/CodeGen/AArch64/sme-peephole-opts.ll
M llvm/test/CodeGen/AArch64/sme-shared-za-interface.ll
M llvm/test/CodeGen/AArch64/sme-za-control-flow.ll
M llvm/test/CodeGen/AArch64/sme-za-exceptions.ll
M llvm/test/CodeGen/AArch64/sme-za-function-with-many-blocks.ll
M llvm/test/CodeGen/AArch64/sme-za-lazy-save-buffer.ll
M llvm/test/CodeGen/AArch64/sme-zt0-state.ll
M llvm/test/CodeGen/AArch64/sve-stack-frame-layout.ll
M llvm/test/Verifier/sme-attributes.ll
M llvm/unittests/Target/AArch64/SMEAttributesTest.cpp
M llvm/utils/gn/secondary/llvm/lib/Target/AArch64/BUILD.gn
Log Message:
-----------
[AArch64][SME] Remove SelectionDAG SME ABI lowering (#190950)
This patch removes the `-aarch64-new-sme-abi=<true/false>` option (which
has been defaulted to "true" since LLVM 22), and removes the Selection
DAG lowering for the SME ABI.
There should be no functional changes for the default path
(`-aarch64-new-sme-abi=true`).
Commit: ec944346ddcb560f6d5dbb0faa5850f9baed0476
https://github.com/llvm/llvm-project/commit/ec944346ddcb560f6d5dbb0faa5850f9baed0476
Author: Zorojuro <sawantsukumar at gmail.com>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M libc/shared/math.h
A libc/shared/math/log2p1f16.h
M libc/test/shared/CMakeLists.txt
M libc/test/shared/shared_math_test.cpp
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[libc][math] Fix: add log2p1f16 to shared math (#189179)
This PR intends to add the log2p1f16 function to shared math, along with
adding tests for it and bazel which was missed in
[f0ce26d](https://github.com/llvm/llvm-project/commit/f0ce26d06d822fd6985d227dc1be9d218977e334).
Commit: bdc11929aa0b4dbcd0f06ade1bc54b45b5b8bf8b
https://github.com/llvm/llvm-project/commit/bdc11929aa0b4dbcd0f06ade1bc54b45b5b8bf8b
Author: Zorojuro <sawantsukumar at gmail.com>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M libc/shared/math.h
A libc/shared/math/log10p1f16.h
M libc/test/shared/CMakeLists.txt
M libc/test/shared/shared_math_test.cpp
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[libc][math] Fix: add log10p1f16 to shared math (#189185)
This PR intends to add the log10p1f16 function to shared math, along
with adding tests for it and Bazel which was missed in
[a7d1a87](https://github.com/llvm/llvm-project/commit/a7d1a87b30ce626678d33fe1c12e647f7ce4fb20).
Commit: f65301d637076db2232ca6c6d569cc0674e5858a
https://github.com/llvm/llvm-project/commit/f65301d637076db2232ca6c6d569cc0674e5858a
Author: Younan Zhang <zyn7109 at gmail.com>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M clang-tools-extra/clangd/XRefs.cpp
M clang-tools-extra/clangd/unittests/XRefsTests.cpp
Log Message:
-----------
[Clangd] Don't traverse ConceptDecl in typeForNode (#191654)
ConceptDecl doesn't have an associated template declaration, and it
doesn't introduce a type either.
Fixes https://github.com/llvm/llvm-project/issues/188914
Commit: 70b9feceaf7e7cef8bdc3820f0b0561b332eb684
https://github.com/llvm/llvm-project/commit/70b9feceaf7e7cef8bdc3820f0b0561b332eb684
Author: Lang Hames <lhames at gmail.com>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M llvm/include/llvm/ExecutionEngine/Orc/EPCGenericDylibManager.h
M llvm/include/llvm/ExecutionEngine/Orc/ExecutorProcessControl.h
M llvm/include/llvm/ExecutionEngine/Orc/SelfExecutorProcessControl.h
M llvm/lib/ExecutionEngine/Orc/SelfExecutorProcessControl.cpp
Log Message:
-----------
[ORC] Forward declare DylibManager in ExecutorProcessControl.h. (#191771)
Commit: df6c82053c5e1f9814d130d423f34871bc6423c5
https://github.com/llvm/llvm-project/commit/df6c82053c5e1f9814d130d423f34871bc6423c5
Author: eiytoq <eiytoq at outlook.com>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M libcxx/include/__mdspan/mdspan.h
M libcxx/test/std/containers/views/mdspan/mdspan/element_type.verify.cpp
Log Message:
-----------
[libc++] Fix the mdspan ElementType complete object type mandate (#191703)
Fixes: #191688
Commit: 75ca0f71d209058d1f565d7529e6d1b117129911
https://github.com/llvm/llvm-project/commit/75ca0f71d209058d1f565d7529e6d1b117129911
Author: Alexis Engelke <engelke at in.tum.de>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64StackTagging.cpp
M llvm/test/CodeGen/AArch64/O0-pipeline.ll
M llvm/test/CodeGen/AArch64/O3-pipeline.ll
Log Message:
-----------
[AArch64] Don't forcefully add ORE to O0 pipeline (#191476)
Construct the OptimizationRemarkEmitter in AArch64StackTagging on demand
if not available and requires, this avoids computing several analysis in
all pipelines.
Commit: 358f3d7402cd3e4849f771abb4448411b76d21ec
https://github.com/llvm/llvm-project/commit/358f3d7402cd3e4849f771abb4448411b76d21ec
Author: Muhammad Bassiouni <60100307+bassiounix at users.noreply.github.com>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[libc][bazel][math][NFC] Fix deps (#191785)
Commit: d043b9e38dd9494c3c56018b2cbaf44fe205b110
https://github.com/llvm/llvm-project/commit/d043b9e38dd9494c3c56018b2cbaf44fe205b110
Author: Matthew Nagy <matthew.nagy at sony.com>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M compiler-rt/lib/tysan/tysan.cpp
M compiler-rt/lib/tysan/tysan_interceptors.cpp
Log Message:
-----------
[TySan][Sanitizer Common] Make TySan compatible with sanitizer common… (#183310)
… features and test suite
This involved:
- Implementing the `__sanitizer_print_stack_trace` interface
- Adding the common signal handlers
- Correctly set the tool name
- Cache the binary name before running
Commit: 200e8c589e41f561b8dd7ed7c9b5e5ba26ab8300
https://github.com/llvm/llvm-project/commit/200e8c589e41f561b8dd7ed7c9b5e5ba26ab8300
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M mlir/lib/Dialect/MemRef/Transforms/ResolveShapedTypeResultDims.cpp
M mlir/test/Interfaces/InferShapedTypeOpInterface/resolve-shaped-type-result-dims.mlir
Log Message:
-----------
[MLIR][MemRef] Fix DimOfReifyRankedShapedTypeOpInterface IR-change on failure (#188973)
DimOfReifyRankedShapedTypeOpInterface::matchAndRewrite called
reifyDimOfResult via the PatternRewriter. Some implementations delegate
to the coarse-grained reifyResultShapes, which creates ops for ALL
dimensions (e.g. a tensor.dim) before discovering that a specific
dimension is not reifiable (signalled by an empty OpFoldResult).
The pattern then returned failure() once it saw the empty OpFoldResult,
but the newly created ops were already in the IR. Under
MLIR_ENABLE_EXPENSIVE_PATTERN_API_CHECKS this triggered "pattern
returned failure but IR did change".
Fix: record the op immediately before the matched dim op, so we can
identify ops inserted during the reification attempt. If reification
returns an empty (unreifiable) OpFoldResult, erase those newly created
ops before returning failure, restoring the IR to its original state.
Assisted-by: Claude Code
Commit: 91c0ba6de8e742fc92bf166f508157c6fe8b9df4
https://github.com/llvm/llvm-project/commit/91c0ba6de8e742fc92bf166f508157c6fe8b9df4
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M mlir/lib/Dialect/OpenACC/Transforms/ACCLoopTiling.cpp
M mlir/lib/Dialect/OpenACC/Utils/OpenACCUtilsTiling.cpp
M mlir/test/Dialect/OpenACC/acc-loop-tiling.mlir
Log Message:
-----------
[OpenACC] Fix pattern API check failures in acc-loop-tiling pass (#188968)
Two bugs were introduced/revealed by
MLIR_ENABLE_EXPENSIVE_PATTERN_API_CHECKS:
1. `ACCLoopTilingImpl::matchAndRewrite` returned `success()` for loops
with no tile values, triggering "pattern returned success but IR did not
change". Fixed by returning `failure()` instead.
2. `moveOpsAndReplaceIVs` moved ops between blocks via `splice()` and
updated operands via `replaceAllUsesInRegionWith()` without notifying
the rewriter. This caused "operation fingerprint changed" errors since
the moved ops' parent op and operands changed without
`startOpModification`/ `finalizeOpModification`. Fixed by wrapping all
moved ops (and their nested ops) with rewriter modification
notifications.
Assisted-by: Claude Code
Commit: 72d35333fbd9829f9f89f7f1978ffdbaca396b09
https://github.com/llvm/llvm-project/commit/72d35333fbd9829f9f89f7f1978ffdbaca396b09
Author: David Green <david.green at arm.com>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
M llvm/test/CodeGen/AArch64/bitcast.ll
Log Message:
-----------
[AArch64][GISel] Clamp bitcast to v2i64 (#191360)
This helps to not lower, improving the number of nodes that we expand
into and improving the quality of the generated code.
Originally a part of #177158 by Ryan Cowan
Commit: 6dbf9d1ac5e68ec6811e6b05c67f12fda07f62e3
https://github.com/llvm/llvm-project/commit/6dbf9d1ac5e68ec6811e6b05c67f12fda07f62e3
Author: Lang Hames <lhames at gmail.com>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M llvm/include/llvm/ExecutionEngine/Orc/ExecutorProcessControl.h
M llvm/lib/ExecutionEngine/Orc/EPCIndirectionUtils.cpp
Log Message:
-----------
[ORC] Forward declare MemoryAccess in ExecutorProcessControl.h. (#191778)
Commit: 4c3ef83e5b235359d557c68c4a3c81cd42e7525d
https://github.com/llvm/llvm-project/commit/4c3ef83e5b235359d557c68c4a3c81cd42e7525d
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M llvm/include/llvm/IR/PatternMatch.h
M llvm/lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp
M llvm/unittests/IR/PatternMatch.cpp
Log Message:
-----------
[NFC][SPIR-V] Use PatternMatch combinators in SPIRVEmitIntrinsics (#189554)
Replace `dyn_cast<IntrinsicInst> + getIntrinsicID()` chains with
PatternMatch combinators where applicable
Commit: 5667b93617fe0a1a0c927ab4c2d3bd889da5963f
https://github.com/llvm/llvm-project/commit/5667b93617fe0a1a0c927ab4c2d3bd889da5963f
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVModuleAnalysis.cpp
M llvm/lib/Target/SPIRV/SPIRVSymbolicOperands.td
M llvm/lib/Target/SPIRV/SPIRVTypeInst.cpp
M llvm/lib/Target/SPIRV/SPIRVTypeInst.h
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_bindless_images/bindless_images_generic.ll
Log Message:
-----------
[SPIR-V] Add Int64ImageEXT capability for OpTypeImage with 64-bit integer sampled type (#190742)
Fix spirv-val failure:
```
error: line 20: Capability Int64ImageEXT is required when using Sampled Type of 64-bit int
%spirv_Image = OpTypeImage %ulong 3D 0 0 0 0 Unknown ReadOnly
```
Detect when OpTypeImage uses a 64-bit integer as its sampled type and
automatically add the Int64ImageEXT capability and
SPV_EXT_shader_image_int64 extension
related to https://github.com/llvm/llvm-project/issues/190736
Commit: 8dcd4713550e0e8ceffad49674499672a92069f1
https://github.com/llvm/llvm-project/commit/8dcd4713550e0e8ceffad49674499672a92069f1
Author: Hassnaa Hamdi <hassnaa.hamdi at arm.com>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M llvm/docs/LangRef.rst
Log Message:
-----------
[LangRef] Correct description of predicate.enable MD (#191496)
The documentation incorrectly stated that this metadata enables/disables
vectorization, but it actually controls predication.
Also clarify that enabling predication implicitly enables vectorization.
Commit: 137c53cbc844c2e643825e430bd9aa84b117f8bd
https://github.com/llvm/llvm-project/commit/137c53cbc844c2e643825e430bd9aa84b117f8bd
Author: Fady Farag <com.webkit.iidmsa at gmail.com>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M clang/test/CodeGen/2004-02-13-Memset.c
Log Message:
-----------
[clang][test] Fix 32-bit bot failures after cc419f185e13 (#191551)
Use `{{.*}}` instead of `i64` for `memset` size type, as 32-bit
platforms use `i32`.
Commit: 55d7a0575a70322b535ec81c1840508042e52297
https://github.com/llvm/llvm-project/commit/55d7a0575a70322b535ec81c1840508042e52297
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M mlir/lib/Dialect/SPIRV/Transforms/UpdateVCEPass.cpp
M mlir/test/Dialect/SPIRV/Transforms/vce-deduction.mlir
Log Message:
-----------
[MLIR][SPIRV] Deduce Shader capability for DescriptorSet/Binding decorations (#188743)
UpdateVCEPass only queried capabilities via QueryCapabilityInterface and
SPIRV type capabilities, but did not check capabilities implied by
decoration attributes on ops. Specifically, the DescriptorSet and
Binding decorations—represented by the `binding` and `descriptor_set`
attributes on `spirv.GlobalVariable`—require the `Shader` capability per
the SPIR-V spec Decoration table, but this was not deduced.
Add an explicit check in UpdateVCEPass: when a `spirv.GlobalVariable`
has a `binding` or `descriptor_set` attribute, require the `Shader`
capability.
Part of #168357
Assisted-by: Claude Code
Commit: 988e00ebcd54db5c4a15d15b87c16313d4190b59
https://github.com/llvm/llvm-project/commit/988e00ebcd54db5c4a15d15b87c16313d4190b59
Author: Alexandre Ganea <aganea at havenstudios.com>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M openmp/runtime/src/kmp_alloc.cpp
Log Message:
-----------
[openmp] Silence warnings when building on Windows (#191556)
Fixes unused-but-set globals on non-Unix paths in kmp_alloc.cpp
Commit: 571beb55057e66184fbcc9d9b9f81b443f6a9d52
https://github.com/llvm/llvm-project/commit/571beb55057e66184fbcc9d9b9f81b443f6a9d52
Author: Alexandre Ganea <aganea at havenstudios.com>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M compiler-rt/cmake/Modules/CompilerRTCompile.cmake
M compiler-rt/cmake/config-ix.cmake
M compiler-rt/lib/asan/CMakeLists.txt
M compiler-rt/lib/interception/CMakeLists.txt
M compiler-rt/lib/ubsan/CMakeLists.txt
Log Message:
-----------
[compiler-rt] clang-cl: skip MSVC external-header probe; -std=c++ for unit-test compiles (#191564)
1. `check_cxx_compiler_flag` marked `COMPILER_RT_HAS_EXTERNAL_FLAG` true
for clang-cl, so `/experimental:external` and `/external:anglebrackets`
were passed and clang-cl warned they were unused. Now only probe with
real MSVC (not Clang); set the flag false otherwise; rely on that in
asan/interception/ubsan.
2. Custom compile lines for unit tests didn’t get C++17, so headers hit
`-Wc++17-extensions` (e.g. `constexpr if` / message-less `static_assert`
in FuzzedDataProvider / asan_fake_stack). Now append
`-std=c++${CMAKE_CXX_STANDARD}` or `-std=c++17` for C++ sources in
`clang_compile()` for both standalone and non-standalone builds.
Commit: d9a9962aa52b7a7cc251babba5d19f8adcd70ff3
https://github.com/llvm/llvm-project/commit/d9a9962aa52b7a7cc251babba5d19f8adcd70ff3
Author: Alexandre Ganea <aganea at havenstudios.com>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M llvm/lib/DebugInfo/GSYM/GsymCreator.cpp
Log Message:
-----------
[GSYM] Silence cast warning (#191561)
Previously clang-cl was generating "warning: comparison of integers of
different signs".
Commit: 73dd62d41ff6caee880582e4ce11188e4460e9b8
https://github.com/llvm/llvm-project/commit/73dd62d41ff6caee880582e4ce11188e4460e9b8
Author: Minsoo Choo <minsoochoo0122 at proton.me>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M lldb/source/Plugins/Process/FreeBSD-Kernel-Core/ProcessFreeBSDKernelCore.cpp
Log Message:
-----------
[lldb][Process/FreeBSDKernelCore] Improve error handling (#191423)
Improve error handling with the following changes:
- If `kvm_open2()` fails in `DoLoadCore()`, log error with a message
obtained from the function.
- Return false or continue for loop if memory read fails.
- Rename `!error.Success()` to `error.Fail()` for readability (NFC).
Signed-off-by: Minsoo Choo <minsoochoo0122 at proton.me>
Commit: a98ecc9027426941851ac32ff75cb599acf49221
https://github.com/llvm/llvm-project/commit/a98ecc9027426941851ac32ff75cb599acf49221
Author: Pavel Labath <pavel at labath.sk>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.h
M lldb/source/Plugins/TypeSystem/Clang/TypeSystemClang.cpp
R lldb/test/API/lang/cpp/non-type-template-param-member-ptr/Makefile
R lldb/test/API/lang/cpp/non-type-template-param-member-ptr/TestCppNonTypeTemplateParamPtrToMember.py
R lldb/test/API/lang/cpp/non-type-template-param-member-ptr/main.cpp
Log Message:
-----------
Revert "[lldb][DWARFASTParserClang] Handle pointer-to-member-data non-type te…" (#191798)
Reverts llvm/llvm-project#189510
Crashes lldb on certain type of debug info. See
https://github.com/llvm/llvm-project/pull/189510#issuecomment-4235929442
for more details.
Commit: f3fce677f2a06e857433b42c5b5a38d554d79699
https://github.com/llvm/llvm-project/commit/f3fce677f2a06e857433b42c5b5a38d554d79699
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M mlir/test/mlir-tblgen/op-format-invalid.td
M mlir/test/mlir-tblgen/op-format-spec.td
M mlir/tools/mlir-tblgen/OpFormatGen.cpp
Log Message:
-----------
[MLIR][ODS] Error on optional attribute used outside optional group in assemblyFormat (#188726)
Using an optional attribute directly in assemblyFormat (e.g., `$attr
attr-dict`) without wrapping it in an optional group causes the
generated printer to call `printAttribute` with a null `Attribute` when
the attribute is absent. This leads to a crash in the alias initializer
when it calls `getAlias` on a null attribute.
Add a validation check in `OpFormatParser::verifyAttributes` that
detects this pattern and emits a diagnostic error with a helpful note
pointing users to the correct `($attr^)?` syntax.
Fixes #58064
Assisted-by: Claude Code
Commit: 65f4e709e1e0edb650a5ff5263afcd5012d04228
https://github.com/llvm/llvm-project/commit/65f4e709e1e0edb650a5ff5263afcd5012d04228
Author: Ilia Kuklin <ikuklin at accesssoftek.com>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M lldb/docs/dil-expr-lang.ebnf
M lldb/include/lldb/ValueObject/DILAST.h
M lldb/include/lldb/ValueObject/DILEval.h
M lldb/include/lldb/ValueObject/DILLexer.h
M lldb/include/lldb/ValueObject/DILParser.h
M lldb/source/Target/StackFrame.cpp
M lldb/source/ValueObject/DILAST.cpp
M lldb/source/ValueObject/DILEval.cpp
M lldb/source/ValueObject/DILLexer.cpp
M lldb/source/ValueObject/DILParser.cpp
M lldb/test/API/commands/frame/var-dil/expr/Arithmetic/TestFrameVarDILArithmetic.py
Log Message:
-----------
[lldb] Add binary multiplication, division, remainder to DIL (#187281)
Add binary arithmetic multiplication, division, remainder to DIL.
This patch also passes DILMode to the parser to check if binary
multiplication is allowed by the mode. This cannot be done in the lexer
alone, because it allows token `*` as a dereference operator for legacy
mode, but that token could also be a binary multiplication allowed only
in full mode.
Commit: 1c1d0cd30edf8134585ab914efdb7bf2f781958c
https://github.com/llvm/llvm-project/commit/1c1d0cd30edf8134585ab914efdb7bf2f781958c
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M mlir/lib/Dialect/LLVMIR/IR/LLVMAttrs.cpp
M mlir/lib/Target/LLVMIR/Dialect/LLVMIR/LLVMToLLVMIRTranslation.cpp
M mlir/lib/Target/LLVMIR/ModuleImport.cpp
M mlir/test/Dialect/LLVMIR/invalid.mlir
M mlir/test/Target/LLVMIR/Import/module-flags.ll
M mlir/test/Target/LLVMIR/llvmir.mlir
Log Message:
-----------
[MLIR][LLVMIR] Handle MDTuple-of-MDStrings module flags (e.g. riscv-isa) (#188741)
The "riscv-isa" LLVM module flag stores its value as an MDTuple
containing MDStrings (e.g. `\!{\!"rv64i2p1", \!"m2p0"}`). Previously,
this fell through the unrecognized-key path in
`convertModuleFlagValueFromMDTuple`, which emitted a warning and dropped
the flag during import.
This patch adds generic handling for MDTuples whose operands are all
MDStrings:
- Import: convert to `ArrayAttr<StringAttr>` in
`convertModuleFlagValueFromMDTuple`
- Export: convert `ArrayAttr<StringAttr>` back to an MDTuple of
MDStrings in `convertModuleFlagValue`, enabling a lossless round-trip
- Verifier: allow `ArrayAttr<StringAttr>` as a valid `ModuleFlagAttr`
value for keys not otherwise handled by specific verifier branches
Fixes #188122
Assisted-by: Claude Code
Commit: 848bf3e3fe2514becdacfd644092055228f4e890
https://github.com/llvm/llvm-project/commit/848bf3e3fe2514becdacfd644092055228f4e890
Author: Eugene Epshteyn <eepshteyn at nvidia.com>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M flang/test/Lower/Intrinsics/transpose.f90
M flang/test/Lower/Intrinsics/transpose_opt.f90
M flang/test/Lower/Intrinsics/trim.f90
M flang/test/Lower/Intrinsics/ubound.f90
M flang/test/Lower/Intrinsics/ubound01.f90
Log Message:
-----------
[flang][NFC] Converted five tests from old lowering to new lowering (part 43) (#191753)
Tests converted from test/Lower/Intrinsics: transpose.f90,
transpose_opt.f90, trim.f90, ubound.f90, ubound01.f90
Commit: dd0c5ebe69e580066de100c8c2ba5430a1aeee44
https://github.com/llvm/llvm-project/commit/dd0c5ebe69e580066de100c8c2ba5430a1aeee44
Author: Matthew Nagy <matthew.nagy at sony.com>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M compiler-rt/test/sanitizer_common/CMakeLists.txt
M compiler-rt/test/sanitizer_common/TestCases/Linux/aligned_alloc-alignment.cpp
M compiler-rt/test/sanitizer_common/TestCases/Linux/allocator_returns_null_std.cpp
M compiler-rt/test/sanitizer_common/TestCases/Linux/decorate_proc_maps.cpp
M compiler-rt/test/sanitizer_common/TestCases/Linux/deepbind.cpp
M compiler-rt/test/sanitizer_common/TestCases/Linux/free_aligned_sized.c
M compiler-rt/test/sanitizer_common/TestCases/Linux/free_sized.c
M compiler-rt/test/sanitizer_common/TestCases/Linux/malloc_usable_size.c
M compiler-rt/test/sanitizer_common/TestCases/Linux/mlock_test.cpp
M compiler-rt/test/sanitizer_common/TestCases/Linux/mprobe.cpp
M compiler-rt/test/sanitizer_common/TestCases/Linux/pvalloc-overflow.cpp
M compiler-rt/test/sanitizer_common/TestCases/Linux/release_to_os_test.cpp
M compiler-rt/test/sanitizer_common/TestCases/Linux/replace_dlopen_main_program_test.cpp
M compiler-rt/test/sanitizer_common/TestCases/Linux/resize_tls_dynamic.cpp
M compiler-rt/test/sanitizer_common/TestCases/Linux/soft_rss_limit_mb_test.cpp
M compiler-rt/test/sanitizer_common/TestCases/Linux/tls_get_addr.c
M compiler-rt/test/sanitizer_common/TestCases/Linux/tls_malloc_hook.c
M compiler-rt/test/sanitizer_common/TestCases/Linux/unexpected_format_specifier_test.cpp
M compiler-rt/test/sanitizer_common/TestCases/Posix/huge_malloc.c
M compiler-rt/test/sanitizer_common/TestCases/Posix/mmap_write_exec.cpp
M compiler-rt/test/sanitizer_common/TestCases/Posix/posix_memalign-alignment.cpp
M compiler-rt/test/sanitizer_common/TestCases/Posix/print-module-map.cpp
M compiler-rt/test/sanitizer_common/TestCases/Posix/sanitizer_set_death_callback_test.cpp
M compiler-rt/test/sanitizer_common/TestCases/Posix/weak_hook_test.cpp
M compiler-rt/test/sanitizer_common/TestCases/allocator_interface.cpp
M compiler-rt/test/sanitizer_common/TestCases/allocator_returns_null.cpp
M compiler-rt/test/sanitizer_common/TestCases/compress_stack_depot.cpp
M compiler-rt/test/sanitizer_common/TestCases/corelimit.cpp
M compiler-rt/test/sanitizer_common/TestCases/get_allocated_begin.cpp
M compiler-rt/test/sanitizer_common/TestCases/hard_rss_limit_mb_test.cpp
M compiler-rt/test/sanitizer_common/TestCases/malloc_hook.cpp
M compiler-rt/test/sanitizer_common/TestCases/malloc_hook_get_allocated_size_fast.cpp
M compiler-rt/test/sanitizer_common/TestCases/max_allocation_size.cpp
M compiler-rt/test/sanitizer_common/TestCases/reallocarray-overflow.cpp
M compiler-rt/test/sanitizer_common/TestCases/sanitizer_coverage_symbolize.cpp
M compiler-rt/test/sanitizer_common/TestCases/sanitizer_coverage_trace_pc_guard-dso.cpp
M compiler-rt/test/sanitizer_common/TestCases/sanitizer_coverage_trace_pc_guard.cpp
M compiler-rt/test/sanitizer_common/lit.common.cfg.py
Log Message:
-----------
[TySan][Sanitizer Common] Enable TySan testing in the sanitizer commo… (#191385)
…n test suite
Secondary pr to enable tests after
https://github.com/llvm/llvm-project/pull/183310 enables the features
Commit: e455e6c9ecae01da8c2959d7dfefa7631373efcb
https://github.com/llvm/llvm-project/commit/e455e6c9ecae01da8c2959d7dfefa7631373efcb
Author: Victor Campos <victor.campos at arm.com>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M libc/config/baremetal/aarch64/entrypoints.txt
M libc/config/baremetal/arm/entrypoints.txt
M libc/config/baremetal/riscv/entrypoints.txt
M libc/config/darwin/aarch64/entrypoints.txt
M libc/config/darwin/x86_64/entrypoints.txt
M libc/config/gpu/amdgpu/entrypoints.txt
M libc/config/gpu/nvptx/entrypoints.txt
M libc/config/gpu/spirv/entrypoints.txt
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/arm/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/config/windows/entrypoints.txt
M libc/fuzzing/string/CMakeLists.txt
A libc/fuzzing/string/strnlen_s_differential_fuzz.cpp
M libc/include/CMakeLists.txt
M libc/include/string.yaml
M libc/src/string/CMakeLists.txt
M libc/src/string/string_utils.h
M libc/src/string/strnlen.cpp
A libc/src/string/strnlen_s.cpp
A libc/src/string/strnlen_s.h
M libc/test/src/string/CMakeLists.txt
A libc/test/src/string/strnlen_s_test.cpp
M libc/utils/docgen/string.yaml
Log Message:
-----------
[libc] Add Annex K strnlen_s function (#186112)
This patch adds the `strnlen_s` function from Annex K.
In order to reduce duplication between `strnlen` and `strnlen_s`, the
common logic has been extracted to a new internal function which both
now call.
In addition to the function definition, the patch adds a unit test and a
fuzzing test.
Commit: e027a17b2d45bf3656ff4ab7cea7db273971ab83
https://github.com/llvm/llvm-project/commit/e027a17b2d45bf3656ff4ab7cea7db273971ab83
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M llvm/test/CodeGen/SPIRV/logical-struct-access.ll
Log Message:
-----------
[NFC][SPIR-V] Fix logical-struct-access.ll to pass spirv-val validation (#191792)
OpReturnValue with a pointer type is invalid in SPIR-V Logical
addressing model (Vulkan). The functions in the test return
OpAccessChain results, which are pointers
related to https://github.com/llvm/llvm-project/issues/190736
Commit: f9c9f94f13c88be0626d5a4e453f5494de0e106a
https://github.com/llvm/llvm-project/commit/f9c9f94f13c88be0626d5a4e453f5494de0e106a
Author: Victor Campos <victor.campos at arm.com>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.h
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/lib/Target/AArch64/AArch64PrologueEpilogue.cpp
A llvm/test/CodeGen/AArch64/sign-return-address-pauthlr-slh.ll
Log Message:
-----------
[AArch64] Mark X16 as clobbered in PAUTH_EPILOGUE for hint-based PAuthLR (#175991)
When users request branch protection with PAuthLR on targets that do not
support the PAuthLR instructions, the PAUTH_EPILOGUE falls back to using
hint-space instructions. This fallback sequence uses X16 as a temporary
register, but X16 was not listed in the clobber set.
Because Speculative Load Hardening uses X16, this omission made SLH
incompatible with this PAUTH_EPILOGUE path.
Mark X16 as clobbered so the compiler does not assume X16 is preserved
across the epilogue, restoring compatibility with Speculative Load
Hardening and avoiding incorrect register liveness assumptions. The
clobber is added in C++ rather than TableGen, as X16 is only clobbered
when PAuthLR is requested as a branch protection variation and should
not be treated as clobbered unconditionally.
Commit: e572b0c1e3d494d4fd44a76dc903a15bd559b40d
https://github.com/llvm/llvm-project/commit/e572b0c1e3d494d4fd44a76dc903a15bd559b40d
Author: ShashwathiNavada <shashwathinavada at gmail.com>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M flang/lib/Lower/Bridge.cpp
M flang/test/Fir/dispatch.f90
M flang/test/Lower/CUDA/cuda-allocatable-device.cuf
M flang/test/Lower/CUDA/cuda-allocatable.cuf
M flang/test/Lower/CUDA/cuda-data-attribute.cuf
M flang/test/Lower/CUDA/cuda-gpu-managed.cuf
M flang/test/Lower/CUDA/cuda-mod.cuf
M flang/test/Lower/CUDA/cuda-pointer-sync.cuf
M flang/test/Lower/HLFIR/procedure-pointer-in-generics.f90
M flang/test/Lower/OpenACC/acc-declare.f90
M flang/test/Lower/OpenMP/block-use-predetermined-privatization.f90
M flang/test/Lower/OpenMP/cray-pointers01.f90
M flang/test/Lower/OpenMP/threadprivate-hlfir.f90
M flang/test/Lower/OpenMP/threadprivate-real-logical-complex-derivedtype.f90
M flang/test/Lower/OpenMP/threadprivate-use-association-2-hlfir.f90
M flang/test/Lower/OpenMP/threadprivate-use-association.f90
M flang/test/Lower/allocatable-globals.f90
M flang/test/Lower/array-elemental-calls-char-dynamic.f90
M flang/test/Lower/c-interoperability.f90
M flang/test/Lower/dense-attributed-array.f90
M flang/test/Lower/dispatch.f90
A flang/test/Lower/extrn_subp.f90
M flang/test/Lower/pointer-default-init.f90
M flang/test/Lower/polymorphic.f90
Log Message:
-----------
[Flang] External subprograms should be allowed as proc_target in procedure pointers. (#183268)
Fixes https://github.com/llvm/llvm-project/issues/177505.
This patch updates an existing external procedure symbol with the
correct function signature and argument attributes, so it can be safely
used as a proc_target without signature conflicts.
---------
Co-authored-by: jeanPerier <jean.perier.polytechnique at gmail.com>
Commit: b9d6efebf9c6527c389868caa4dfcbdc0b8078a5
https://github.com/llvm/llvm-project/commit/b9d6efebf9c6527c389868caa4dfcbdc0b8078a5
Author: Zeyi Xu <mitchell.xu2 at gmail.com>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M clang-tools-extra/clang-tidy/fuchsia/TemporaryObjectsCheck.cpp
M clang-tools-extra/clang-tidy/fuchsia/TemporaryObjectsCheck.h
A clang-tools-extra/clang-tidy/utils/CheckUtils.h
A clang-tools-extra/test/clang-tidy/checkers/fuchsia/temporary-objects-deprecated-alias.cpp
M clang-tools-extra/unittests/clang-tidy/ClangTidyOptionsTest.cpp
Log Message:
-----------
[clang-tidy] Emit warning when user is using deprecated `zircon` checks (#189522)
Add `utils::diagDeprecatedCheckAlias` so checks can detect whether they
are running under a deprecated name without enabling the new names.
This commit also comes with an example with `zircon` module. It is
deprecated in 22 release but we didn't provide a note for it before.
Commit: f4da0ca171f8cfee3bed6182174d5dfa078df416
https://github.com/llvm/llvm-project/commit/f4da0ca171f8cfee3bed6182174d5dfa078df416
Author: Lang Hames <lhames at gmail.com>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M llvm/include/llvm/ExecutionEngine/Orc/SimpleRemoteEPC.h
M llvm/lib/ExecutionEngine/Orc/SimpleRemoteEPC.cpp
Log Message:
-----------
[ORC] Sink a #include in SimpleRemoteEPC.h, and remove another. (#191797)
These #includes are only needed in the SimpleRemoteEPC.cpp
implementation.
Commit: 80d72ae2cec9b7625e537a917d11af04c50699a6
https://github.com/llvm/llvm-project/commit/80d72ae2cec9b7625e537a917d11af04c50699a6
Author: Sergei Barannikov <barannikov88 at gmail.com>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M lldb/include/lldb/Target/ExecutionContext.h
Log Message:
-----------
[lldb] Remove declarations of two non-existent constructors (NFC) (#191622)
They have never existed since the initial public checkin.
Commit: d5b8d8846d1a5864bb12ac9eb4f1031ca888e71a
https://github.com/llvm/llvm-project/commit/d5b8d8846d1a5864bb12ac9eb4f1031ca888e71a
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M clang/lib/AST/ByteCode/Interp.cpp
M clang/lib/AST/ByteCode/Pointer.cpp
M clang/test/AST/ByteCode/placement-new.cpp
Log Message:
-----------
[clang][bytecode] Fix activating primitive array elements (#191772)
For primitive array elements, we would accidentally activate the element
and then immediate de-activate the array root, which is wrong. Ignore
the element from the beginning to the later check never even compares
with the element.
Commit: 14f2556639be002af1e614ddcb6bff496ca32fc3
https://github.com/llvm/llvm-project/commit/14f2556639be002af1e614ddcb6bff496ca32fc3
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M clang/lib/AST/ByteCode/Interp.h
M clang/test/AST/ByteCode/cxx11.cpp
Log Message:
-----------
[clang][bytecode] Don't check anonymous union in memcpy op (#191783)
It's fine if they are uninitialized.
Commit: 7083e9d8da07d97ab4541405b72e8b7ce8dad181
https://github.com/llvm/llvm-project/commit/7083e9d8da07d97ab4541405b72e8b7ce8dad181
Author: Matthew Nagy <matthew.nagy at sony.com>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M compiler-rt/test/sanitizer_common/TestCases/Linux/internal_symbolizer.cpp
M compiler-rt/test/sanitizer_common/TestCases/print-stack-trace.cpp
Log Message:
-----------
XFAIL symbolizer test for TySan (#191810)
Commit: b33c301e818207ef59fcf19ebc295fb623eb0d0d
https://github.com/llvm/llvm-project/commit/b33c301e818207ef59fcf19ebc295fb623eb0d0d
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M llvm/test/Transforms/LoopVectorize/AArch64/loop-vectorization-factors.ll
M llvm/test/Transforms/LoopVectorize/X86/induction-costs.ll
A llvm/test/Transforms/LoopVectorize/epilog-vectorization-fixed-order-recurrences.ll
A llvm/test/Transforms/LoopVectorize/epilog-vectorization-fmaxnum-reductions.ll
Log Message:
-----------
[LV] Extend epilogue vectorization test coverage with dead FORs/FMinMax. (#191799)
Extend test coverage with dedicated epilogue vectorization tests for
dead first-order recurrences and FMinMaxNum reductions.
Add users to FORs in existing tests where the dead FORs appeared
unintentional.
Commit: a0427859fb701039445e3da7eaab0b5aa97cbbf2
https://github.com/llvm/llvm-project/commit/a0427859fb701039445e3da7eaab0b5aa97cbbf2
Author: Amit Tiwari <amtiwari at amd.com>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenFunction.h
M clang/lib/CIR/CodeGen/CIRGenStmt.cpp
M clang/lib/CIR/CodeGen/CIRGenStmtOpenMP.cpp
Log Message:
-----------
[CIR][NFC] Add NYI for OMPSplitDirective stmt (#191791)
As requested by @erichkeane here:
https://github.com/llvm/llvm-project/pull/190329#issuecomment-4183615635
Commit: 3c2a9c90cb3c816609a6baabf919c392f0bcb40c
https://github.com/llvm/llvm-project/commit/3c2a9c90cb3c816609a6baabf919c392f0bcb40c
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVBuiltins.cpp
M llvm/test/CodeGen/SPIRV/transcoding/ldexp.ll
A llvm/test/CodeGen/SPIRV/transcoding/pown.ll
A llvm/test/CodeGen/SPIRV/transcoding/rootn.ll
Log Message:
-----------
[SPIR-V] Fix type mismatch in scalar-to-vector promotion for mixed-type builtins (#190969)
When promoting scalar arguments to vectors for builtins like `ldexp`,
`pown`, and `rootn`, use the correct vector type matching the argument
element type instead of always using the return type: these builtins
take an integer argument but at the same time have floating point return
type
Fix `ldexp` test that does not pass spirv-val and add similar tests for
`pown` and `rootn`
related to https://github.com/llvm/llvm-project/issues/190736
Commit: 28e237ae831225d46794b5ad90441e8b19828329
https://github.com/llvm/llvm-project/commit/28e237ae831225d46794b5ad90441e8b19828329
Author: Mel Chen <mel.chen at sifive.com>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
A llvm/test/Transforms/LoopVectorize/AArch64/reverse-load-scatter.ll
A llvm/test/Transforms/LoopVectorize/RISCV/reverse-load-scatter.ll
Log Message:
-----------
[LV] Add test for reverse load with scatter store. nfc (#189928)
Commit: d012e0380a8f1e16b2720d98b96197084f2e1207
https://github.com/llvm/llvm-project/commit/d012e0380a8f1e16b2720d98b96197084f2e1207
Author: Tim Gymnich <tim at gymni.ch>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M llvm/include/llvm/CodeGen/GlobalISel/GISelValueTracking.h
M llvm/include/llvm/CodeGen/GlobalISel/MIPatternMatch.h
M llvm/include/llvm/CodeGen/GlobalISel/Utils.h
M llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
M llvm/lib/CodeGen/GlobalISel/GISelValueTracking.cpp
M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
M llvm/lib/CodeGen/GlobalISel/Utils.cpp
M llvm/lib/Target/AMDGPU/AMDGPUInstructions.td
M llvm/lib/Target/AMDGPU/AMDGPURegBankCombiner.cpp
M llvm/test/CodeGen/AArch64/known-never-nan.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/clamp-minmax-const-combine.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fmed3-min-max-const-combine.ll
A llvm/test/CodeGen/AMDGPU/GlobalISel/known-fpclass-phi.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fmaxnum.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fminnum.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankcombiner-clamp-minmax-const.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankcombiner-fmed3-minmax-const.mir
M llvm/test/CodeGen/AMDGPU/fmed3.ll
M llvm/unittests/CodeGen/GlobalISel/KnownFPClassTest.cpp
Log Message:
-----------
[GISel] Use GISelValueTracking in isKnownNeverNaN (#190542)
Pass GISelValueTracking* through isKnownNeverNaN and isKnownNeverSNaN so
that the implementation can call computeKnownFPClass to derive NaN
information from value tracking, rather than only looking at flags and
direct constant definitions. Update all callers.
Co-Authored-By: Claude Sonnet 4.6 <noreply at anthropic.com>
Commit: b6ff43f1ecd34717b8d22dac329ca913fc910d4f
https://github.com/llvm/llvm-project/commit/b6ff43f1ecd34717b8d22dac329ca913fc910d4f
Author: Sergei Barannikov <barannikov88 at gmail.com>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M bolt/lib/Core/AddressMap.cpp
M bolt/lib/Rewrite/GNUPropertyRewriter.cpp
M bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp
M lldb/source/DataFormatters/FormatterSection.cpp
M llvm/include/llvm/DebugInfo/DWARF/LowLevel/DWARFDataExtractorSimple.h
M llvm/include/llvm/Object/BBAddrMap.h
M llvm/include/llvm/Support/DataExtractor.h
M llvm/lib/DebugInfo/GSYM/FunctionInfo.cpp
M llvm/lib/DebugInfo/GSYM/MergedFunctionsInfo.cpp
M llvm/lib/DebugInfo/Symbolize/SymbolizableObjectFile.cpp
M llvm/lib/Object/ELF.cpp
M llvm/tools/llvm-readobj/ELFDumper.cpp
M llvm/tools/obj2yaml/dwarf2yaml.cpp
M llvm/tools/obj2yaml/elf2yaml.cpp
M llvm/unittests/Support/DataExtractorTest.cpp
Log Message:
-----------
[Support] Remove address-extraction methods from DataExtractor (NFC) (#190519)
Most clients don't have a notion of "address" and pass arbitrary values
(including `0` and `sizeof(void *)`) to `DataExtractor` constructors.
This makes address-extraction methods dangerous to use.
Those clients that do have a notion of address can use other methods
like `getUnsigned()` to extract an address, or they can derive from
`DataExtractor` and add convenience methods if extracting an address is
routine. `DWARFDataExtractor` is an example, where the removed methods
were actually moved.
This does not remove `AddressSize` argument of `DataExtractor`
constructors yet, but makes it unused and overloads constructors in
preparation for their deletion. I'll be removing uses of the
to-be-deleted constructors in follow-up patches.
Commit: a2bf43d6b18d6a0614b685c8c72432fc90f6dc1c
https://github.com/llvm/llvm-project/commit/a2bf43d6b18d6a0614b685c8c72432fc90f6dc1c
Author: Lang Hames <lhames at gmail.com>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M llvm/include/llvm/ExecutionEngine/Orc/MachOBuilder.h
M llvm/unittests/ExecutionEngine/Orc/CMakeLists.txt
A llvm/unittests/ExecutionEngine/Orc/MachOBuilderTest.cpp
Log Message:
-----------
[ORC] Add MachOBuilder support for LC_UUID load commands. (#191807)
Enables LC_UUID load commands to be added with the addLoadCommand
method.
This will be used in future MachOPlatform changes to add support for
adding UUIDs to MachO JITDylibs.
Commit: 5afba800906a5e69518abfb1995567c6186cfd6d
https://github.com/llvm/llvm-project/commit/5afba800906a5e69518abfb1995567c6186cfd6d
Author: Princeton Ferro <pferro at nvidia.com>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M llvm/include/llvm/IR/ValueHandle.h
M llvm/include/llvm/Transforms/Scalar/GVN.h
M llvm/lib/Transforms/Scalar/GVN.cpp
M llvm/unittests/IR/ValueHandleTest.cpp
Log Message:
-----------
[GVN] use `AssertingVH` for leaders to improve compilation time (#175870)
Replace the manual check in `verifyRemoved()` with `AssertingVH`
instrumentation. For cases where the leader table becomes very large,
this is a cheaper way to verify we don't have dangling entries in the
leader table.
For this change, we must implement a move constructor for `AssertingVH`
so that we can keep the first entry as an inline-allocated node that
will be handled correctly as the table grows.
Commit: 2ae04112967e16e8cddfd4c1d35de7c74504b8c0
https://github.com/llvm/llvm-project/commit/2ae04112967e16e8cddfd4c1d35de7c74504b8c0
Author: Luke Lau <luke at igalia.com>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fpext-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfma-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfmacc-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfmsac-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfmuladd-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfneg-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfnmacc-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfnmsac-vp.ll
M llvm/test/CodeGen/RISCV/rvv/pr171231.ll
M llvm/test/CodeGen/RISCV/rvv/sink-splat-operands.ll
M llvm/test/CodeGen/RISCV/rvv/vfma-vp-combine.ll
M llvm/test/CodeGen/RISCV/rvv/vfma-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfmuladd-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfneg-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfpext-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfwadd-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfwmacc-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfwmsac-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfwnmacc-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfwnmsac-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vreductions-fp-vp.ll
Log Message:
-----------
[RISCV] Expand vp.fma, fp.fmuladd, vp.fneg, vp.fpext (#190589)
Part of the work to remove trivial VP intrinsics from the RISC-V
backend, see
https://discourse.llvm.org/t/rfc-remove-codegen-support-for-trivial-vp-intrinsics-in-the-risc-v-backend/87999
This PR expands four intrinsics before codegen, but doesn't remove the
codegen handling yet as both DAGCombiner and type legalization can
create these nodes.
vp.fneg and vp.fpext are expanded in lockstep with the fma/fmuladd
intrinsics since some test cases for vfmacc etc. also use these
intrinsics, and mixing dynamic and constant vls causes some of the more
complex patterns to be missed.
The fixed-length VP vfmacc, vfmsac, vfnmacc and vfnmsac tests also need
to replace the EVL of the vp.merge/vp.select with an immediate otherwise
the resulting vmerge.vvm can't be folded into them. This only happens
for fixed vector intrinsics with no passthru, since we end up with a
constant vl from the fixed vector and dynamic vl from the vp.merge that
prevents folding.
As far as I'm aware we don't emit fixed length vp.merges in practice,
since we only emit vp.merge in the loop vectorizer, and we only use it
with EVL tail folding which requires a scalable VF.
Commit: 86e790076ab022573705aafae552ec3a3e2032a7
https://github.com/llvm/llvm-project/commit/86e790076ab022573705aafae552ec3a3e2032a7
Author: Georgiy Samoylov <Ignitor21838 at gmail.com>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M lldb/source/Host/common/Socket.cpp
M lldb/unittests/Host/SocketTest.cpp
M lldb/unittests/Process/gdb-remote/GDBRemoteCommunicationServerLLGSTest.cpp
Log Message:
-----------
[lldb] Fix lldb-server host and port address parsing (#191414)
This patch fixes 2 problems in lldb-server argument parser:
1. Let's try to start lldb-server with incorrect arguments
```
./lldb-server platform --listen *:1111--server
```
Current behavior
* lldb-server run in gdbserver mode with port 1111
Expected behavior
* fail, as `1111–server` is not a number
2. And try to start lldb-server with host:port specification without
colon
```
./lldb-server gdbserver 1111 ./test
Launched './test' as process 186...
lldb-server-local_build
lldb-server: llvm-project/lldb/source/Host/common/TCPSocket.cpp:245: virtual Status lldb_private::TCPSocket::Listen(llvm::StringRef, int): Assertion `error.Fail()' failed.
PLEASE submit a bug report to https://github.com/llvm/llvm-project/issues/ and include the crash backtrace.
Stack dump:
0. Program arguments: ./lldb-server gdbserver 1111 ./test
Stack dump without symbol names (ensure you have llvm-symbolizer in your PATH or set the environment var `LLVM_SYMBOLIZER_PATH` to point to it):
0 lldb-server 0x0000002ab86d0ca2
1 lldb-server 0x0000002ab86ced06
2 lldb-server 0x0000002ab86d1428
3 linux-vdso.so.1 0x0000003f8e7fd800 __vdso_rt_sigreturn + 0
4 libc.so.6 0x0000003f8e2b264a
5 libc.so.6 0x0000003f8e27b1ac gsignal + 18
6 libc.so.6 0x0000003f8e26c14c abort + 180
7 libc.so.6 0x0000003f8e2760cc
8 libc.so.6 0x0000003f8e27610e __assert_perror_fail + 0
9 lldb-server 0x0000002ab86eb628
10 lldb-server 0x0000002ab86f1010
11 lldb-server 0x0000002ab86eeee0
12 lldb-server 0x0000002ab86eee5c
13 lldb-server 0x0000002ab863ef3a
14 lldb-server 0x0000002ab864067c
15 lldb-server 0x0000002ab86438da
16 libc.so.6 0x0000003f8e26c476
17 libc.so.6 0x0000003f8e26c51e __libc_start_main + 116
18 lldb-server 0x0000002ab863ce64
Aborted
```
We expect to see an error instead of lldb-server crash in this case
Commit: 52a250ea1b8d6b34da4e437d89dda246d5e87e6f
https://github.com/llvm/llvm-project/commit/52a250ea1b8d6b34da4e437d89dda246d5e87e6f
Author: Juan Manuel Martinez Caamaño <jmartinezcaamao at gmail.com>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M lldb/source/Plugins/TypeSystem/Clang/TypeSystemClang.cpp
M lldb/source/Symbol/Variable.cpp
M lldb/source/ValueObject/ValueObject.cpp
M llvm/include/llvm/Support/Error.h
M llvm/tools/llvm-readobj/ELFDumper.cpp
Log Message:
-----------
[NFC] Replace `expectedToStdOptional` with `expectedToOptional` (#191359)
Both implementations are currently equivalent. This is likely a leftover
from the past, when `llvm::Optional` existed.
Commit: 91c0fdfe13928838864d9618ea28dcbe9a112b8c
https://github.com/llvm/llvm-project/commit/91c0fdfe13928838864d9618ea28dcbe9a112b8c
Author: Schrodinger ZHU Yifan <yifanzhu at rochester.edu>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/include/pthread.yaml
M libc/src/__support/threads/mutex.h
M libc/src/pthread/CMakeLists.txt
A libc/src/pthread/pthread_mutex_trylock.cpp
A libc/src/pthread/pthread_mutex_trylock.h
M libc/test/integration/src/pthread/CMakeLists.txt
M libc/test/integration/src/pthread/pthread_mutex_test.cpp
Log Message:
-----------
[libc] add posix_mutex_trylock support (#191531)
Expose existing trylock internal operation to posix interface.
POSIX.1-2024 only specifies the `EBUSY` error case.
Assisted-by: Codex with gpt-5.4 default fast
Commit: bc8c18165fc394eaf4455f0ca86b3511b85f0427
https://github.com/llvm/llvm-project/commit/bc8c18165fc394eaf4455f0ca86b3511b85f0427
Author: Luke Lau <luke at igalia.com>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vmax-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vmaxu-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vmin-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vminu-vp.ll
M llvm/test/CodeGen/RISCV/rvv/sink-splat-operands.ll
M llvm/test/CodeGen/RISCV/rvv/vmax-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vmaxu-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vmin-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vminu-vp.ll
Log Message:
-----------
[RISCV] Remove codegen for vp_{u,s}{max,min} (#191640)
Part of the work to remove trivial VP intrinsics from the RISC-V
backend, see
https://discourse.llvm.org/t/rfc-remove-codegen-support-for-trivial-vp-intrinsics-in-the-risc-v-backend/87999
This splits off 4 intrinsics from #179622.
Commit: fefa5a89711e29feb8a9c2b15af9a2b75d862462
https://github.com/llvm/llvm-project/commit/fefa5a89711e29feb8a9c2b15af9a2b75d862462
Author: Lang Hames <lhames at gmail.com>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M llvm/include/llvm/ExecutionEngine/Orc/MachOPlatform.h
M llvm/lib/ExecutionEngine/Orc/MachOPlatform.cpp
Log Message:
-----------
[ORC] Add MachOPlatform::HeaderOptions customization callback. (#191819)
This change aims to make it easier for MachOPlatform clients to
customize JITDylib MachO headers.
At MachOPlatform construction time clients can now supply a
MachOPlatform::HeaderOptionsBuilder. The supplied callback will be
called by setupJITDylib to create the HeaderOptions for the JITDylib
being set up.
No testcase: Constructing a MachOPlatform instance requires the ORC
runtime, which we can't require for LLVM unit or regression suite tests.
We should look at testing this functionality in the new ORC runtime once
it's ready.
Commit: 9192300315e1efc2f6054d4786b96ada8b7ac520
https://github.com/llvm/llvm-project/commit/9192300315e1efc2f6054d4786b96ada8b7ac520
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M flang/include/flang/Semantics/openmp-utils.h
M flang/lib/Semantics/openmp-utils.cpp
Log Message:
-----------
[flang][OpenMP] Implement GetGeneratedNestDepthWithReason (#191718)
For a loop-nest-generating construct this function returns the number of
loops in the generated loop nest.
A loop-nest-transformation construct can be thought of as replacing N
nested loops with K nested loops, where
N = GetAffectedNestDepthWithReason
K = GetGeneratedNestDepthWithReason
Commit: 386e67da649161349cea2fba7401c0829f248bc1
https://github.com/llvm/llvm-project/commit/386e67da649161349cea2fba7401c0829f248bc1
Author: Utkarsh Saxena <usx at google.com>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M clang/include/clang/Analysis/Analyses/LifetimeSafety/LifetimeSafety.h
M clang/lib/Analysis/LifetimeSafety/Checker.cpp
M clang/lib/Sema/AnalysisBasedWarnings.cpp
M clang/lib/Sema/SemaLifetimeSafety.h
M clang/test/Sema/warn-lifetime-analysis-nocfg.cpp
M clang/test/Sema/warn-lifetime-safety-suggestions.cpp
M clang/test/Sema/warn-lifetime-safety.cpp
Log Message:
-----------
[LifetimeSafety] Suggest/infer annotation in constructors (#191699)
This change improves the lifetime safety checker to detect when
constructor parameters escape to class fields and suggest appropriate
`[[clang::lifetimebound]]` annotations.
```cpp
struct A {
View v;
A(const MyObj& obj) : v(obj) {} // Now suggests [[clang::lifetimebound]]
};
```
Commit: 96ae4136d0b18b0257a05f33cc296e6a1f32b314
https://github.com/llvm/llvm-project/commit/96ae4136d0b18b0257a05f33cc296e6a1f32b314
Author: Lang Hames <lhames at gmail.com>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M llvm/examples/Kaleidoscope/BuildingAJIT/Chapter3/KaleidoscopeJIT.h
M llvm/examples/Kaleidoscope/BuildingAJIT/Chapter4/KaleidoscopeJIT.h
M llvm/examples/OrcV2Examples/LLJITWithExecutorProcessControl/LLJITWithExecutorProcessControl.cpp
Log Message:
-----------
[ORC] Fix examples after 6dbf9d1ac5e (forward declaration of MemoryAc… (#191834)
…cess).
6dbf9d1ac5e forward declared the MemoryAccess class in
ExecutorProcessControl.h, breaking some examples that were depending on
the transitive include. (See e.g.
https://lab.llvm.org/buildbot/#/builders/80/builds/21875).
This commit adds the missing #includes to the broken examples.
Commit: 3f45921068c31935f7d34e9131c68284ddfccdb6
https://github.com/llvm/llvm-project/commit/3f45921068c31935f7d34e9131c68284ddfccdb6
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoP.td
M llvm/test/CodeGen/RISCV/rv32p.ll
M llvm/test/CodeGen/RISCV/rvp-ext-rv32.ll
M llvm/test/CodeGen/RISCV/rvp-ext-rv64.ll
A llvm/test/MC/RISCV/rv32p-aliases-valid.s
M llvm/test/MC/RISCV/rv32p-valid.s
A llvm/test/MC/RISCV/rv64p-aliases-valid.s
Log Message:
-----------
[RISCV] Add an initial set of InstAliases for P extension. (#180315)
These are now listed in the asciidoc spec here
https://github.com/riscv/riscv-p-spec
I got some help on this from AI, but I reviewed it. Test cases were
fully generated with AI.
Commit: 977c516ca85dfe49163c96a4d84da5ee5690bac7
https://github.com/llvm/llvm-project/commit/977c516ca85dfe49163c96a4d84da5ee5690bac7
Author: Jonathan Thackray <jonathan.thackray at arm.com>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64SystemOperands.td
M llvm/test/MC/AArch64/armv9.7a-gcie.s
Log Message:
-----------
[AArch64][llvm] Add GICv5 ICH_PPI_HVIR{0,1}_EL2 system registers (#191818)
Add GICv5 `ICH_PPI_HVIR{0,1}_EL2` system registers (Interrupt
Controller PPI Hide Virtual Interrupt Registers). These registers
are added because a hypervisor may want to only expose a subset of the
PPIs to the virtual machine and hide the remaining PPIs.
The only way the hypervisor can do this is by trapping all the PPI ICV
registers which leads to additional code complexity and adds performance
overhead especially for nested virtualization.
These are documented here:
https://developer.arm.com/documentation/111107/latest/AArch64-Registers/ICH-PPI-HVIR-n--EL2--Interrupt-Controller-PPI-Hide-Virtual-Interrupt-Registers
Commit: f058eaa7c56e1a23c69815ca89ad8148c6e84ebe
https://github.com/llvm/llvm-project/commit/f058eaa7c56e1a23c69815ca89ad8148c6e84ebe
Author: Pankaj Dwivedi <pankajkumar.divedi at amd.com>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M llvm/include/llvm/ADT/GenericUniformityImpl.h
M llvm/include/llvm/Analysis/UniformityAnalysis.h
M llvm/include/llvm/CodeGen/MachineUniformityAnalysis.h
M llvm/lib/Analysis/UniformityAnalysis.cpp
M llvm/lib/CodeGen/MachineUniformityAnalysis.cpp
Log Message:
-----------
[NFC][UniformityAnalysis] Rename variables in uniformity analysis to follow LLVM conventions (#191134)
Follow-up to
#[189948](https://github.com/llvm/llvm-project/pull/189948#discussion_r3027394937).
Addresses review feedback
Co-authored-by: padivedi <padivedi at amd.com>
Commit: e0adc50e6413a1fb5656d45abcc65966027adaa0
https://github.com/llvm/llvm-project/commit/e0adc50e6413a1fb5656d45abcc65966027adaa0
Author: Alex Duran <alejandro.duran at intel.com>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M offload/plugins-nextgen/level_zero/src/L0Kernel.cpp
M offload/test/offloading/ompx_bare_multi_dim.cpp
Log Message:
-----------
[OFFLOAD][L0] Handle group sizes correctly for multidimensional bare kernels (#191770)
Don't use the L0 heuristics if all the dimensions are specified by the
user code.
Commit: 212d612bae9542cc404491336ef79d7ea27f470f
https://github.com/llvm/llvm-project/commit/212d612bae9542cc404491336ef79d7ea27f470f
Author: Chi-Chun, Chen <chichun.chen at hpe.com>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M llvm/include/llvm/Frontend/OpenMP/OMPIRBuilder.h
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
M llvm/unittests/Frontend/OpenMPIRBuilderTest.cpp
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
M mlir/test/Target/LLVMIR/openmp-iterator.mlir
M mlir/test/Target/LLVMIR/openmp-todo.mlir
Log Message:
-----------
[mlir][llvm][OpenMP] Support iterator modifier in depend clause (#190026)
Add translation from the MLIR OpenMP depend clause with iterator
modifier to LLVM IR. `buildDependData` (in OpenMPToLLVMIRTranslation)
allocates a single `kmp_depend_info` array sized to hold both locator
(non-iterated) and iterated entries. Locator dependencies use the
existing static path (a vector of `DependData`), while iterated
dependencies use a dynamically-sized path (`DepArray`, `NumDeps`).
The reason both paths are not unified under the dynamic allocation is
that the existing locator path emits actual `kmp_depend_info` entries
inside OMPIRBuilder methods (`createTask`, `createTarget`), whereas the
iterator path must emit the iterator loop in OpenMPToLLVMIRTranslation
(since the convention is to not pass MLIR ops into the OMPIRBuilder).
Unifying them would require modifying existing depend clause tests.
The `OMPIRBuilder::DependenciesInfo` struct is extended to hold either a
`SmallVector<DependData>` (locator path) or a pre-built `{DepArray,
NumDeps}` pair (iterator path). The single-entry `emitTaskDependency`
helper is made public so the translation layer can fill individual
`kmp_depend_info` entries inside the iterator loop body.
This patch is part of the feature work for #188061.
Assisted with copilot.
Commit: 22e6a261fae1eb57105cc131592026701f283e0e
https://github.com/llvm/llvm-project/commit/22e6a261fae1eb57105cc131592026701f283e0e
Author: Paul Kirth <paulkirth at google.com>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M clang-tools-extra/clang-doc/BitcodeReader.cpp
M clang-tools-extra/clang-doc/BitcodeReader.h
M clang-tools-extra/clang-doc/JSONGenerator.cpp
M clang-tools-extra/clang-doc/MDGenerator.cpp
M clang-tools-extra/clang-doc/Mapper.cpp
M clang-tools-extra/clang-doc/Representation.cpp
M clang-tools-extra/clang-doc/Representation.h
M clang-tools-extra/clang-doc/Serialize.cpp
M clang-tools-extra/clang-doc/Serialize.h
M clang-tools-extra/clang-doc/YAMLGenerator.cpp
M clang-tools-extra/clang-doc/benchmarks/ClangDocBenchmark.cpp
M clang-tools-extra/clang-doc/tool/ClangDocMain.cpp
M clang-tools-extra/unittests/clang-doc/BitcodeTest.cpp
M clang-tools-extra/unittests/clang-doc/ClangDocTest.cpp
M clang-tools-extra/unittests/clang-doc/ClangDocTest.h
M clang-tools-extra/unittests/clang-doc/GeneratorTest.cpp
M clang-tools-extra/unittests/clang-doc/JSONGeneratorTest.cpp
M clang-tools-extra/unittests/clang-doc/MDGeneratorTest.cpp
M clang-tools-extra/unittests/clang-doc/MergeTest.cpp
M clang-tools-extra/unittests/clang-doc/SerializeTest.cpp
M clang-tools-extra/unittests/clang-doc/YAMLGeneratorTest.cpp
Log Message:
-----------
Revert clang-doc arena merging patches (#191668)
This is a set of squashed reverts of recent clang doc patches, since its
breaking something on Darwin builders:
https://lab.llvm.org/buildbot/#/builders/23/builds/19172
Revert "[clang-doc][nfc] Default initialize all StringRef members
(#191641)"
This reverts commit 155b9b354c1d91661be9f6d0432a96e47cfc2700.
Revert "[clang-doc] Initialize StringRef members in Info types
(#191637)"
This reverts commit 489dab3827b255d21ea38b1e3f45ddb08bd10a87.
Revert "[clang-doc] Initialize member variable (#191570)"
This reverts commit 5d64a44a84af31f9e99d42cccffa4f01c0be2e0b.
Revert "[clang-doc] Merge data into persistent memory (#190056)"
This reverts commit 21e0034c69489eff3b09929e5e13ea34b3dd0e5a.
Revert "[clang-doc] Support deep copy between arenas for merging
(#190055)"
This reverts commit c70dae8b0cee46af1411bc4e4ba6fc28e2babf3e.
Commit: 7b4c9bb2069536e0df18597795b858e18a1cbaaf
https://github.com/llvm/llvm-project/commit/7b4c9bb2069536e0df18597795b858e18a1cbaaf
Author: Md Abdullah Shahneous Bari <md.abdullah.shahneous.bari at intel.com>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
A mlir/cmake/modules/Findocloc.cmake
M mlir/include/mlir/Target/LLVM/XeVM/Utils.h
M mlir/lib/Target/LLVM/CMakeLists.txt
M mlir/lib/Target/LLVM/XeVM/Target.cpp
Log Message:
-----------
[mlir][XeVM] Use libocloc API for binary generation. (#188353)
This PR improves native binary generation by avoiding
`llvm::sys::ExecuteAndWait` call for ocloc and instead
leveraging `oclocInvoke()` that consumes an in-memory SPIR-V string.
Co-authored-by: Artem Kroviakov <artem.kroviakov at intel.com>
Commit: 058d80d814f45f98c7a16d93b85136426d5cdd1b
https://github.com/llvm/llvm-project/commit/058d80d814f45f98c7a16d93b85136426d5cdd1b
Author: Alexis Perry-Holby <aperry at lanl.gov>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
A flang/docs/MeetingNotes/2026/2026-04-08.md
Log Message:
-----------
[flang] Adding meeting notes for the April 8, 2026 Flang call (#191003)
Commit: 23361e18ac41c3460e0cf79d0cd58beafd5c0a84
https://github.com/llvm/llvm-project/commit/23361e18ac41c3460e0cf79d0cd58beafd5c0a84
Author: hulxv <hulxxv at gmail.com>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M libc/shared/math.h
A libc/shared/math/copysign.h
A libc/shared/math/copysignbf16.h
A libc/shared/math/copysignf.h
A libc/shared/math/copysignf128.h
A libc/shared/math/copysignf16.h
A libc/shared/math/copysignl.h
M libc/src/__support/FPUtil/ManipulationFunctions.h
M libc/src/__support/math/CMakeLists.txt
A libc/src/__support/math/copysign.h
A libc/src/__support/math/copysignbf16.h
A libc/src/__support/math/copysignf.h
A libc/src/__support/math/copysignf128.h
A libc/src/__support/math/copysignf16.h
A libc/src/__support/math/copysignl.h
M libc/src/math/generic/CMakeLists.txt
M libc/src/math/generic/copysign.cpp
M libc/src/math/generic/copysignbf16.cpp
M libc/src/math/generic/copysignf.cpp
M libc/src/math/generic/copysignf128.cpp
M libc/src/math/generic/copysignf16.cpp
M libc/src/math/generic/copysignl.cpp
M libc/test/shared/CMakeLists.txt
M libc/test/shared/shared_math_constexpr_test.cpp
M libc/test/shared/shared_math_test.cpp
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[libc][math] Refactor copysign family to header-only (#182137)
Refactors the copysign math family to be header-only.
Closes https://github.com/llvm/llvm-project/issues/182136
Target Functions:
- copysign
- copysignbf16
- copysignf
- copysignf128
- copysignf16
- copysignl
---------
Co-authored-by: bassiounix <muhammad.m.bassiouni at gmail.com>
Commit: 05411b993108a5125c04cf4e3792c1061fb5b050
https://github.com/llvm/llvm-project/commit/05411b993108a5125c04cf4e3792c1061fb5b050
Author: Snehasish Kumar <mail at snehasish.net>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M llvm/lib/Transforms/IPO/SampleProfileMatcher.cpp
Log Message:
-----------
[SamplePGO] Optimize the basename matching logic for matching unused profiles (#191523)
This change optimizes the basename matching logic in
`SampleProfileMatcher::matchFunctionsWithoutProfileByBasename` by
replacing the existing O(N*M) nested loop with an O(N+M) hash-based
lookup, while strictly preserving the original matching semantics. The
previous implementation relied on a substring heuristic
(`ProfName.contains(BaseName)`) to bypass expensive demangling
operations during the nested iteration; however, in codebases with
common or overlapping function names, this heuristic frequently
evaluated to true, resulting in redundant demangling and quadratic time
complexity. The updated approach demangles each profile name exactly
once and utilizes a `StringMap` to perform O(1) lookups against the
orphan functions. This eliminates the need for the substring pre-check
while maintaining the exact same constraints: establishing a strict 1:1
mapping between orphaned IR functions and profile entries, and correctly
identifying and rejecting ambiguous matches where multiple entities
share the same demangled basename.
Results in a 9x speedup on a large module with common basenames.
Commit: 6d39df0104136fc7e459a3d3a1787644d0621942
https://github.com/llvm/llvm-project/commit/6d39df0104136fc7e459a3d3a1787644d0621942
Author: David Green <david.green at arm.com>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/test/CodeGen/AArch64/arm64-stur.ll
M llvm/test/CodeGen/AArch64/merge-store.ll
M llvm/test/CodeGen/AArch64/st1-lane.ll
M llvm/test/CodeGen/AArch64/sve-fixed-length-extract-subvector.ll
Log Message:
-----------
[AArch64] Add tablegen patterns for store of high-half. (#190320)
This helps remove the extract but mean less efficient addressing modes.
Commit: b07a0250e154a245cac39344d30f9beb9883f9d0
https://github.com/llvm/llvm-project/commit/b07a0250e154a245cac39344d30f9beb9883f9d0
Author: Slava Zakharin <szakharin at nvidia.com>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M flang/include/flang/Optimizer/Dialect/FIROps.td
M flang/include/flang/Optimizer/HLFIR/HLFIROps.td
M flang/test/Transforms/licm.fir
Log Message:
-----------
[flang] Make more [HL]FIR operations Pure. (#191309)
This patch addresses cases where an operation seems obviously Pure to me.
Made-with: Cursor
Commit: f1a99ff328f2d44685022be91201dcc6e9a70a9e
https://github.com/llvm/llvm-project/commit/f1a99ff328f2d44685022be91201dcc6e9a70a9e
Author: Slava Zakharin <szakharin at nvidia.com>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M flang/lib/Optimizer/Analysis/AliasAnalysis.cpp
A flang/test/Transforms/licm-non-addressable-resource.mlir
Log Message:
-----------
[flang] Recognize non-addressable resources in FIR AA. (#191577)
Same as in #187423 change for CSE, we can assume that an effect
on a non-addressable resource cannot affect memory pointed to
by 'location'.
Commit: 68c10f601b596385d2c8dd73c7b542be3b87a244
https://github.com/llvm/llvm-project/commit/68c10f601b596385d2c8dd73c7b542be3b87a244
Author: Joel E. Denny <jdenny.ornl at gmail.com>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M llvm/include/llvm/Support/BranchProbability.h
M llvm/lib/Transforms/Utils/LoopUnroll.cpp
M llvm/lib/Transforms/Utils/LoopUnrollRuntime.cpp
Log Message:
-----------
[LoopUnroll] Record conditional latch info (#182403)
This patch makes no functional change and so introduces no new tests or
documentation, but it is not merely refactoring.
This patch gathers conditional latch info needed for PR #179520, which
fixes block frequencies when LoopUnroll converts a conditional latch in
an unrolled loop iteration to unconditional. Without PR #179520, this
patch is useless and should not land.
Commit: e34412476cf11eefd141db578770e738843e04a9
https://github.com/llvm/llvm-project/commit/e34412476cf11eefd141db578770e738843e04a9
Author: Luke Lau <luke at igalia.com>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
M llvm/test/CodeGen/RISCV/rvv/bitreverse-vp.ll
M llvm/test/CodeGen/RISCV/rvv/bswap-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-bitreverse-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-bswap-vp.ll
Log Message:
-----------
[RISCV] Remove codegen for vp_bitreverse, vp_bswap (#191643)
Part of the work to remove trivial VP intrinsics from the RISC-V
backend, see
https://discourse.llvm.org/t/rfc-remove-codegen-support-for-trivial-vp-intrinsics-in-the-risc-v-backend/87999
This splits off 2 intrinsics from #179622.
Commit: a20fea899e2adb34f604ef7e81e408701cba109b
https://github.com/llvm/llvm-project/commit/a20fea899e2adb34f604ef7e81e408701cba109b
Author: Jeffrey Byrnes <jeffrey.byrnes at amd.com>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/VOP3Instructions.td
M llvm/test/CodeGen/AMDGPU/GlobalISel/fdiv.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fdiv.f32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fdiv.f64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.div.scale.ll
M llvm/test/CodeGen/AMDGPU/bf16.ll
M llvm/test/CodeGen/AMDGPU/dagcombine-select.ll
M llvm/test/CodeGen/AMDGPU/fdiv.f16.ll
M llvm/test/CodeGen/AMDGPU/fdiv.ll
M llvm/test/CodeGen/AMDGPU/fdiv_flags.f32.ll
M llvm/test/CodeGen/AMDGPU/freeze-binary.ll
M llvm/test/CodeGen/AMDGPU/repeated-divisor.ll
M llvm/test/CodeGen/AMDGPU/rsq.f32-safe.ll
M llvm/test/CodeGen/AMDGPU/rsq.f64.ll
A llvm/test/CodeGen/AMDGPU/schedmodel-dummywrite.mir
M llvm/test/tools/llvm-mca/AMDGPU/gfx10-double.s
M llvm/test/tools/llvm-mca/AMDGPU/gfx11-double.s
Log Message:
-----------
[AMDGPU] Use WriteSALUDummy for v_div_scale* (#191670)
This uses the new HWWriteRes for v_div_scale*
For an explanation of why we want to do this , see
https://github.com/llvm/llvm-project/pull/190095 . In short, the
scheduler will not try to cover the full latency of the instructions
without this new modelling.
For a clear example of this, see the changes to
llvm/test/CodeGen/AMDGPU/schedmodel-dummywrite.mir in the git log of
this PR.
Commit: 1b2ccc16ce90b52ebd1f1629e5a95bc4203c1dc1
https://github.com/llvm/llvm-project/commit/1b2ccc16ce90b52ebd1f1629e5a95bc4203c1dc1
Author: Joel E. Denny <jdenny.ornl at gmail.com>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
A llvm/test/Transforms/LoopUnroll/branch-weights-freq/unroll-complete.ll
M llvm/test/Transforms/LoopUnroll/branch-weights-freq/unroll-epilog.ll
A llvm/test/Transforms/LoopUnroll/branch-weights-freq/unroll-partial-unconditional-latch.ll
M llvm/test/Transforms/LoopUnroll/branch-weights-freq/unroll-partial.ll
M llvm/test/Transforms/LoopUnroll/loop-probability-one.ll
Log Message:
-----------
[LoopUnroll] Fix freqs for unconditional latches: introduce tests (#191008)
This patch introduces all tests for PR #179520 but with current results
so that it is easier to see which results PR #179520 improves. This
patch should not land without PR #179520.
Commit: b25ecac3c3cc759f100d2c9b2b8379f9eb76241b
https://github.com/llvm/llvm-project/commit/b25ecac3c3cc759f100d2c9b2b8379f9eb76241b
Author: Caroline Newcombe <caroline.newcombe at hpe.com>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M flang/lib/Lower/ConvertExprToHLFIR.cpp
A flang/test/Lower/HLFIR/conditional-expr.f90
Log Message:
-----------
[flang] Implement conditional expressions lowering (F2023) (#186490)
## Implement Lowering for Fortran 2023 Conditional Expressions (R1002)
***This PR contains the lowering steps only for ease of review. DO NOT
MERGE until #186489 is merged.***
Implements Fortran 2023 conditional expressions with syntax: `result =
(condition ? value1 : condition2 ? value2 : ... : elseValue)`
Issue: #176999
Discourse:
https://discourse.llvm.org/t/rfc-adding-conditional-expressions-in-flang-f2023/89869/1
-- note that some of the details provided in the RFC post are no longer
accurate
### Implementation Details
**Lowering to HLFIR:**
- Lazy evaluation via nested if-then-else control flow
- Only the selected branch is evaluated
- Temporary allocation with proper cleanup
- Special handling for:
- CHARACTER types with deferred length
- Arrays (shape determined by selected branch per F2023 10.1.4(7))
- Derived types
**LIT Testing:**
- Lowering tests: HLFIR code generation verification
- Note: Executable tests will be added to the llvm-test-suite repo
(https://github.com/llvm/llvm-test-suite/pull/369)
**Limitations**
- Conditional arguments are not yet supported. This work is planned
- #180592
- Polymorphic types (CLASS) not yet supported in lowering
- Both limitations will emit clear error message if encountered
### Examples
```
! Simple conditional
x = (flag ? 10 : 20)
! Chained
result = (x > 0 ? 1 : x < 0 ? -1 : 0)
! Examples from F2023
( ABS (RESIDUAL)<=TOLERANCE ? ’ok’ : ’did not converge’ )
( I>0 .AND. I<=SIZE (A) ? A (I) : PRESENT (VAL) ? VAL : 0.0 )
```
AI Usage Disclosure: AI tools (Claude Sonnet 4.5) were used to assist
with implementation of this feature and test code generation. I have
reviewed, modified, and tested all AI-generated code.
Commit: cd773a64de9a90756f652e1092ea490ba4275dc3
https://github.com/llvm/llvm-project/commit/cd773a64de9a90756f652e1092ea490ba4275dc3
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M mlir/include/mlir/Dialect/OpenACC/Transforms/ACCSpecializePatterns.h
Log Message:
-----------
[OpenACC] Fix IR verification failures in acc-specialize passes (#188961)
When MLIR_ENABLE_EXPENSIVE_PATTERN_API_CHECKS is enabled, the greedy
driver verifies the IR after each pattern application. The specialize
passes failed because ACCOpReplaceWithVarConversion would run on a data
entry op (e.g. acc.create) before container ops that use it in their
dataOperands were processed. After replacement, the container op held a
non-data-entry operand (e.g. a func arg), failing the acc dialect's
dataOperands verifier.
Fix: in ACCOpReplaceWithVarConversion, defer by returning failure() when
any user of the data entry op's result is a container op that validates
its operands as data entry ops (acc.data, acc.parallel, acc.serial,
acc.kernels, acc.host_data, acc.kernel_environment, acc.declare_enter,
acc.enter_data). The greedy driver will process the container op first
(via ACCRegionUnwrapConversion or ACCDeclareEnterOpConversion), removing
the use, after which the data entry op can be safely replaced.
Assisted-by: Claude Code
Fix a failure present with MLIR_ENABLE_EXPENSIVE_PATTERN_API_CHECKS=ON.
Commit: 8c60833132e75b9ef50f9497ab0de0cfd1c5f5f5
https://github.com/llvm/llvm-project/commit/8c60833132e75b9ef50f9497ab0de0cfd1c5f5f5
Author: Tom Eccles <tom.eccles at arm.com>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M mlir/include/mlir/Dialect/OpenMP/OpenMPOps.td
M mlir/include/mlir/Target/LLVMIR/ModuleTranslation.h
M mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
M mlir/lib/Target/LLVMIR/ModuleTranslation.cpp
M mlir/test/Dialect/OpenMP/invalid.mlir
M mlir/test/Dialect/OpenMP/ops.mlir
A mlir/test/Target/LLVMIR/openmp-taskloop-local-bounds.mlir
Log Message:
-----------
[mlir][OpenMP] Support pure taskloop-local loop bounds (#190992)
Follow up to https://github.com/llvm/llvm-project/pull/190827
Assisted-by: codex
Commit: a60d6982cd0a495d2d5e2c0a219f63de289cc1c9
https://github.com/llvm/llvm-project/commit/a60d6982cd0a495d2d5e2c0a219f63de289cc1c9
Author: David Tenty <daltenty at ibm.com>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Driver/ToolChains/AIX.cpp
M clang/test/Driver/aix-ld.c
M compiler-rt/lib/profile/InstrProfilingPlatformAIX.c
M compiler-rt/test/profile/instrprof-merge-entry-cover.c
M compiler-rt/test/profile/instrprof-merge.c
M compiler-rt/test/profile/instrprof-write-file-atexit-explicitly.c
M compiler-rt/test/profile/profile_test.h
Log Message:
-----------
[clang][driver][AIX] Change linker bcdtor mode to default to mbr (#191265)
The bcdtor mode affects how the AIX linker choose to pull in static
constructors and destructors
(https://www.ibm.com/docs/en/aix/7.2.0?topic=l-ld-command) to the link.
The current setting of `all` makes static init in archive members live
regardless of if the archive member would be otherwise referenced,
causing that whole archive member to become part of the link.
This default was initially retained for compatibility purposes with
historical compilers on the platform which defaulted to this setting.
Unfortunately this greedy pulling in of static init can have unintended
consequences for applications, for example for programs linked against
parts of compiler-rt which contain optional instrumentation (containing
static initializers) which may be unused as these now become live in all
programs regardless of use.
For that reason and similar reasons, this PR switches the default to
`mbr`, which only extracts static init from archive members which would
otherwise be referenced. This gives a behaviour very consistent with
linkers on other platforms (e.g. Linux).
Users requiring the old default behaviour can manually pass
`-bcdtors:all` on the link step which will override any default we pass
here.
Commit: 465673edc3abdb7f0fc595dc790ad421cc022513
https://github.com/llvm/llvm-project/commit/465673edc3abdb7f0fc595dc790ad421cc022513
Author: Utkarsh Saxena <usx at google.com>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M clang/include/clang/Analysis/Analyses/LifetimeSafety/FactsGenerator.h
M clang/lib/Analysis/CFG.cpp
M clang/lib/Analysis/LifetimeSafety/FactsGenerator.cpp
M clang/test/Sema/warn-lifetime-safety.cpp
Log Message:
-----------
[CFG] Fix cleanup ordering for CXXDefaultInitExpr
(#191786)
Fixes CFG construction for default member initializers when
`AddCXXDefaultInitExprInCtors` is enabled by correcting the execution
order of cleanups.
E.g., in
```cpp
struct H {
std::string_view v = std::string("x");
H() {}
};
```
Previously, destructors for temporaries in default initializers
for`std::string("x")` was sequenced _before_ the member initialization,
causing false negatives in lifetime safety analysis because the
temporary appeared to be destroyed prematurely before making to a
origin.
Resolved this by modifying `CFGBuilder::addInitializer` to defer these
cleanups to the end of the initialization full-expression.
_(AI-assisted with HITL)_
Commit: 46fd15a21ad90b463747452e7e68c669a30dbd52
https://github.com/llvm/llvm-project/commit/46fd15a21ad90b463747452e7e68c669a30dbd52
Author: Kai <47328809+kcloudy0717 at users.noreply.github.com>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M clang/test/CodeGenHLSL/builtins/QuadReadAcrossX.hlsl
M clang/test/SemaHLSL/BuiltIns/QuadReadAcrossX-errors.hlsl
Log Message:
-----------
[CodeGen][HLSL] Improved QuadReadAcrossX CodeGen test (#188488)
This PR improves CodeGenHLSL tests for QuadReadAcrossX. It should cover
all supported types along with 16-bit types. Using regex captures to
simplify writing checks for subsequent test cases.
Commit: f285a55b9cd70818b1f4e8bb4fddbe32fe8caa52
https://github.com/llvm/llvm-project/commit/f285a55b9cd70818b1f4e8bb4fddbe32fe8caa52
Author: Keith Smiley <keithbsmiley at gmail.com>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M lld/ELF/AArch64ErrataFix.h
Log Message:
-----------
[lld] Add missing include in AArch64ErrataFix (NFC) (#190664)
This header assumed SmallVector would be included before it
Commit: 1b275a177fe7c2f74c3575bce2932ba37086a507
https://github.com/llvm/llvm-project/commit/1b275a177fe7c2f74c3575bce2932ba37086a507
Author: Fangrui Song <i at maskray.me>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M clang/include/clang/Options/Options.td
M clang/lib/Driver/ToolChains/Flang.cpp
M flang/include/flang/Frontend/CodeGenOptions.def
M flang/lib/Frontend/CompilerInstance.cpp
M flang/lib/Frontend/CompilerInvocation.cpp
M flang/test/Driver/fintegrated-as.f90
Log Message:
-----------
[flang] -fno-integrated-as: set DisableIntegratedAS (#191346)
https://reviews.llvm.org/D124669 added -fno-integrated-as driver option
but not the fc1 option.
As a result, the backend kept MCAsmInfo::useIntegratedAssembler() set
and emitted LLVM-only directives such as `.prefalign`
(https://github.com/llvm/llvm-project/pull/155529), which GNU as
rejects:
```
a.s: Assembler messages:
a.s: Error: unknown pseudo-op: `.prefalign'
```
Follow clang and introduce fc1 -no-integrated-as to set
`CodeGenOpts.DisableIntegratedAS` and
llvm::TargetOptions::DisableIntegratedAS.
Commit: 4ffd51e21c6a45ed04d58615bf289592b8b696b4
https://github.com/llvm/llvm-project/commit/4ffd51e21c6a45ed04d58615bf289592b8b696b4
Author: joaosaffran <joaosaffranllvm at gmail.com>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M llvm/lib/Target/DirectX/DXILOpLowering.cpp
A llvm/test/CodeGen/DirectX/is_nonuniform_within_loop.ll
A llvm/test/CodeGen/DirectX/is_nonuniform_within_loop_nuri.ll
Log Message:
-----------
[HLSL][DirectX] Avoid visited values when searching in `hasNonUniformIndex` (#189498)
This patch fixes `hasNonUniformIndex` search so that it accounts for any
path that connects nuri to index access to return true
fix: https://github.com/llvm/llvm-project/issues/189438
---------
Co-authored-by: Joao Saffran <jderezende at microsoft.com>
Commit: 13d91555bce09cd666853443bebe81b3183eeec6
https://github.com/llvm/llvm-project/commit/13d91555bce09cd666853443bebe81b3183eeec6
Author: Joel E. Denny <jdenny.ornl at gmail.com>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M llvm/lib/Transforms/Utils/LoopUnroll.cpp
M llvm/test/Transforms/LoopUnroll/branch-weights-freq/unroll-complete.ll
M llvm/test/Transforms/LoopUnroll/branch-weights-freq/unroll-epilog.ll
M llvm/test/Transforms/LoopUnroll/branch-weights-freq/unroll-partial-unconditional-latch.ll
Log Message:
-----------
[LoopUnroll] Fix freqs for unconditional latches: N<=2 (#179520)
As another step in issue #135812, this patch fixes block frequencies
when LoopUnroll converts a conditional latch in an unrolled loop
iteration to unconditional. It thus includes complete loop unrolling
(the conditional backedge becomes an unconditional loop exit), which
might be applied to the original loop or to its remainder loop.
As explained in detail in the header comments on the
fixProbContradiction function that this patch introduces, these
conversions mean LoopUnroll has proven that the original uniform latch
probability is incorrect for the original loop iterations associated
with the converted latches. However, LoopUnroll often is able to perform
these corrections for only some iterations, leaving other iterations
with the original latch probability, and thus corrupting the aggregate
effect on the total frequency of the original loop body.
This patch ensures that the total frequency of the original loop body,
summed across all its occurrences in the unrolled loop after the
aforementioned conversions, is the same as in the original loop. Unlike
other patches in this series, this patch cannot derive the required
latch probabilities directly from the original uniform latch probability
because it has been proven incorrect for some original loop iterations.
Instead, this patch computes entirely new probabilities for the
remaining N conditional latches in the unrolled loop.
This patch only handles N <= 2, for which it uses simple formulas to
compute a single uniform probability across the latches. Future patches
will handle N > 2.
This patch series does not consider the presence of non-latch loop
exits, and I do not have a solid plan for that case. See fixme comments
this patch introduces.
This patch depends on PR #182403 and PR #191008.
Commit: aea7db5a70c3ada06974059fa4ea4d9b590e2166
https://github.com/llvm/llvm-project/commit/aea7db5a70c3ada06974059fa4ea4d9b590e2166
Author: Utkarsh Saxena <usx at google.com>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M clang/lib/Analysis/LifetimeSafety/Origins.cpp
M clang/test/Sema/warn-lifetime-safety-dangling-field.cpp
M clang/test/Sema/warn-lifetime-safety-suggestions.cpp
M clang/test/Sema/warn-lifetime-safety.cpp
Log Message:
-----------
[LifetimeSafety] Detect dangling field of base class (#191831)
Fixes: https://github.com/llvm/llvm-project/issues/191823
Commit: 0e5e24c30b6f304b7ab12787741634e3acdc8c3d
https://github.com/llvm/llvm-project/commit/0e5e24c30b6f304b7ab12787741634e3acdc8c3d
Author: Joel E. Denny <jdenny.ornl at gmail.com>
Date: 2026-04-13 (Mon, 13 Apr 2026)
Changed paths:
M .ci/compute_projects.py
M .ci/compute_projects_test.py
M .ci/monolithic-linux.sh
M .ci/monolithic-windows.sh
M .github/new-prs-labeler.yml
M .github/workflows/libc-shared-tests.yml
M .github/workflows/libcxx-build-and-test.yaml
A .github/workflows/release-llvm-testing-tools.yml
M bolt/include/bolt/Passes/DataflowAnalysis.h
M bolt/lib/Core/AddressMap.cpp
M bolt/lib/Core/BinaryContext.cpp
M bolt/lib/Passes/AllocCombiner.cpp
M bolt/lib/Passes/FixRISCVCallsPass.cpp
M bolt/lib/Passes/IndirectCallPromotion.cpp
M bolt/lib/Passes/ShrinkWrapping.cpp
M bolt/lib/Passes/TailDuplication.cpp
M bolt/lib/Profile/CMakeLists.txt
M bolt/lib/Profile/DataAggregator.cpp
M bolt/lib/Profile/DataReader.cpp
M bolt/lib/Rewrite/GNUPropertyRewriter.cpp
M bolt/lib/Rewrite/RewriteInstance.cpp
M bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp
M bolt/lib/Target/AArch64/CMakeLists.txt
M bolt/lib/Target/RISCV/RISCVMCPlusBuilder.cpp
M bolt/test/RISCV/call-annotations.s
M bolt/test/RISCV/relax.s
A bolt/test/X86/Inputs/pre-aggregated-buildid-empty.txt
M bolt/test/X86/pre-aggregated-perf-buildid.test
A bolt/test/X86/pre-aggregated-perf-shlib.test
M bolt/unittests/Core/MCPlusBuilder.cpp
M clang-tools-extra/clang-doc/BitcodeReader.cpp
M clang-tools-extra/clang-doc/BitcodeReader.h
M clang-tools-extra/clang-doc/BitcodeWriter.cpp
M clang-tools-extra/clang-doc/ClangDoc.cpp
M clang-tools-extra/clang-doc/ClangDoc.h
M clang-tools-extra/clang-doc/Generators.cpp
M clang-tools-extra/clang-doc/Generators.h
M clang-tools-extra/clang-doc/HTMLGenerator.cpp
M clang-tools-extra/clang-doc/JSONGenerator.cpp
M clang-tools-extra/clang-doc/MDGenerator.cpp
M clang-tools-extra/clang-doc/MDMustacheGenerator.cpp
M clang-tools-extra/clang-doc/Representation.cpp
M clang-tools-extra/clang-doc/Representation.h
M clang-tools-extra/clang-doc/Serialize.cpp
M clang-tools-extra/clang-doc/YAMLGenerator.cpp
M clang-tools-extra/clang-doc/benchmarks/ClangDocBenchmark.cpp
M clang-tools-extra/clang-tidy/ClangTidy.cpp
M clang-tools-extra/clang-tidy/ClangTidyCheck.h
A clang-tools-extra/clang-tidy/bugprone/AssignmentInSelectionStatementCheck.cpp
A clang-tools-extra/clang-tidy/bugprone/AssignmentInSelectionStatementCheck.h
M clang-tools-extra/clang-tidy/bugprone/BugproneTidyModule.cpp
M clang-tools-extra/clang-tidy/bugprone/CMakeLists.txt
M clang-tools-extra/clang-tidy/bugprone/DynamicStaticInitializersCheck.cpp
M clang-tools-extra/clang-tidy/bugprone/DynamicStaticInitializersCheck.h
M clang-tools-extra/clang-tidy/bugprone/IncorrectEnableIfCheck.cpp
M clang-tools-extra/clang-tidy/bugprone/NarrowingConversionsCheck.cpp
M clang-tools-extra/clang-tidy/bugprone/SuspiciousIncludeCheck.cpp
M clang-tools-extra/clang-tidy/bugprone/SuspiciousIncludeCheck.h
M clang-tools-extra/clang-tidy/cert/CERTTidyModule.cpp
M clang-tools-extra/clang-tidy/cppcoreguidelines/MissingStdForwardCheck.cpp
M clang-tools-extra/clang-tidy/fuchsia/TemporaryObjectsCheck.cpp
M clang-tools-extra/clang-tidy/fuchsia/TemporaryObjectsCheck.h
M clang-tools-extra/clang-tidy/google/GlobalNamesInHeadersCheck.cpp
M clang-tools-extra/clang-tidy/google/GlobalNamesInHeadersCheck.h
M clang-tools-extra/clang-tidy/llvm/CMakeLists.txt
M clang-tools-extra/clang-tidy/llvm/LLVMTidyModule.cpp
A clang-tools-extra/clang-tidy/llvm/RedundantCastingCheck.cpp
A clang-tools-extra/clang-tidy/llvm/RedundantCastingCheck.h
M clang-tools-extra/clang-tidy/llvmlibc/InlineFunctionDeclCheck.cpp
M clang-tools-extra/clang-tidy/llvmlibc/InlineFunctionDeclCheck.h
M clang-tools-extra/clang-tidy/misc/AnonymousNamespaceInHeaderCheck.cpp
M clang-tools-extra/clang-tidy/misc/AnonymousNamespaceInHeaderCheck.h
M clang-tools-extra/clang-tidy/misc/DefinitionsInHeadersCheck.cpp
M clang-tools-extra/clang-tidy/misc/DefinitionsInHeadersCheck.h
M clang-tools-extra/clang-tidy/misc/UnusedUsingDeclsCheck.cpp
M clang-tools-extra/clang-tidy/misc/UnusedUsingDeclsCheck.h
M clang-tools-extra/clang-tidy/misc/UseAnonymousNamespaceCheck.cpp
M clang-tools-extra/clang-tidy/misc/UseAnonymousNamespaceCheck.h
M clang-tools-extra/clang-tidy/misc/UseInternalLinkageCheck.cpp
M clang-tools-extra/clang-tidy/misc/UseInternalLinkageCheck.h
M clang-tools-extra/clang-tidy/modernize/UseStringViewCheck.cpp
M clang-tools-extra/clang-tidy/performance/TriviallyDestructibleCheck.cpp
M clang-tools-extra/clang-tidy/readability/IdentifierNamingCheck.cpp
M clang-tools-extra/clang-tidy/readability/NonConstParameterCheck.cpp
M clang-tools-extra/clang-tidy/readability/RedundantMemberInitCheck.cpp
M clang-tools-extra/clang-tidy/readability/RedundantMemberInitCheck.h
A clang-tools-extra/clang-tidy/utils/CheckUtils.h
M clang-tools-extra/clang-tidy/utils/ExceptionAnalyzer.cpp
M clang-tools-extra/clang-tidy/utils/HeaderGuard.cpp
M clang-tools-extra/clang-tidy/utils/HeaderGuard.h
M clang-tools-extra/clangd/XRefs.cpp
M clang-tools-extra/clangd/unittests/DiagnosticsTests.cpp
M clang-tools-extra/clangd/unittests/XRefsTests.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
A clang-tools-extra/docs/clang-tidy/checks/bugprone/assignment-in-selection-statement.rst
A clang-tools-extra/docs/clang-tidy/checks/cert/exp45-c.rst
M clang-tools-extra/docs/clang-tidy/checks/list.rst
A clang-tools-extra/docs/clang-tidy/checks/llvm/redundant-casting.rst
M clang-tools-extra/docs/clang-tidy/checks/modernize/use-string-view.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/redundant-member-init.rst
M clang-tools-extra/test/CMakeLists.txt
M clang-tools-extra/test/Unit/CMakeLists.txt
A clang-tools-extra/test/clang-tidy/checkers/bugprone/assignment-in-selection-statement.c
A clang-tools-extra/test/clang-tidy/checkers/bugprone/assignment-in-selection-statement.cpp
M clang-tools-extra/test/clang-tidy/checkers/bugprone/exception-escape-treat-functions-without-specification-as-throwing.cpp
M clang-tools-extra/test/clang-tidy/checkers/bugprone/incorrect-enable-if.cpp
M clang-tools-extra/test/clang-tidy/checkers/bugprone/narrowing-conversions.cpp
M clang-tools-extra/test/clang-tidy/checkers/cppcoreguidelines/missing-std-forward.cpp
A clang-tools-extra/test/clang-tidy/checkers/fuchsia/temporary-objects-deprecated-alias.cpp
A clang-tools-extra/test/clang-tidy/checkers/llvm/redundant-casting.cpp
A clang-tools-extra/test/clang-tidy/checkers/misc/use-internal-linkage-module-implementation.cpp
A clang-tools-extra/test/clang-tidy/checkers/misc/use-internal-linkage-module-partition.cpp
M clang-tools-extra/test/clang-tidy/checkers/misc/use-internal-linkage-module.cpp
M clang-tools-extra/test/clang-tidy/checkers/modernize/use-string-view.cpp
A clang-tools-extra/test/clang-tidy/checkers/performance/trivially-destructible-module.cpp
A clang-tools-extra/test/clang-tidy/checkers/readability/identifier-naming-template-method-default.cpp
M clang-tools-extra/test/clang-tidy/checkers/readability/non-const-parameter.cpp
A clang-tools-extra/test/clang-tidy/checkers/readability/redundant-member-init-ignore-macros.cpp
M clang-tools-extra/test/clang-tidy/checkers/readability/redundant-member-init.cpp
M clang-tools-extra/test/clang-tidy/infrastructure/custom-query-check.cpp
A clang-tools-extra/test/clang-tidy/infrastructure/cxx20-modules.cppm
M clang-tools-extra/test/lit.cfg.py
M clang-tools-extra/unittests/clang-doc/BitcodeTest.cpp
M clang-tools-extra/unittests/clang-doc/MDGeneratorTest.cpp
M clang-tools-extra/unittests/clang-doc/MergeTest.cpp
M clang-tools-extra/unittests/clang-doc/YAMLGeneratorTest.cpp
M clang-tools-extra/unittests/clang-tidy/ClangTidyOptionsTest.cpp
M clang/bindings/python/clang/cindex.py
M clang/cmake/caches/Fuchsia-stage2.cmake
M clang/cmake/caches/Release.cmake
M clang/docs/ClangIRABILowering.md
M clang/docs/CommandGuide/clang.rst
M clang/docs/InternalsManual.rst
M clang/docs/LanguageExtensions.rst
M clang/docs/LifetimeSafety.rst
M clang/docs/ReleaseNotes.rst
M clang/docs/UsersManual.rst
M clang/docs/analyzer/user-docs/Annotations.rst
M clang/include/clang-c/Index.h
M clang/include/clang/AST/ExprCXX.h
M clang/include/clang/AST/OpenMPClause.h
M clang/include/clang/AST/RecursiveASTVisitor.h
M clang/include/clang/AST/StmtOpenMP.h
M clang/include/clang/ASTMatchers/ASTMatchFinder.h
M clang/include/clang/ASTMatchers/ASTMatchers.h
M clang/include/clang/ASTMatchers/ASTMatchersInternal.h
M clang/include/clang/Analysis/Analyses/LifetimeSafety/Facts.h
M clang/include/clang/Analysis/Analyses/LifetimeSafety/FactsGenerator.h
M clang/include/clang/Analysis/Analyses/LifetimeSafety/LifetimeSafety.h
M clang/include/clang/Analysis/Analyses/LifetimeSafety/Origins.h
M clang/include/clang/Analysis/Analyses/PostOrderCFGView.h
M clang/include/clang/Analysis/AnalysisDeclContext.h
M clang/include/clang/Basic/AttrDocs.td
M clang/include/clang/Basic/BuiltinsAMDGPU.td
R clang/include/clang/Basic/BuiltinsSystemZ.def
A clang/include/clang/Basic/BuiltinsSystemZ.td
M clang/include/clang/Basic/CMakeLists.txt
M clang/include/clang/Basic/DiagnosticCommonKinds.td
M clang/include/clang/Basic/DiagnosticDriverKinds.td
M clang/include/clang/Basic/DiagnosticGroups.td
M clang/include/clang/Basic/DiagnosticLexKinds.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Basic/DiagnosticSerializationKinds.td
M clang/include/clang/Basic/HLSLIntrinsics.td
M clang/include/clang/Basic/SourceManager.h
M clang/include/clang/Basic/StmtNodes.td
M clang/include/clang/Basic/TargetBuiltins.h
M clang/include/clang/Basic/arm_sve.td
M clang/include/clang/CIR/Dialect/Builder/CIRBaseBuilder.h
M clang/include/clang/CIR/Dialect/IR/CIRAttrs.td
M clang/include/clang/CIR/Dialect/IR/CIRDialect.h
M clang/include/clang/CIR/Dialect/IR/CIRDialect.td
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/include/clang/CIR/Dialect/IR/CIRTypes.td
M clang/include/clang/Driver/SyclInstallationDetector.h
M clang/include/clang/Frontend/DependencyOutputOptions.h
M clang/include/clang/Frontend/Utils.h
M clang/include/clang/Lex/HeaderSearch.h
M clang/include/clang/Options/Options.td
M clang/include/clang/Parse/Parser.h
A clang/include/clang/ScalableStaticAnalysisFramework/Analyses/EntityPointerLevel/EntityPointerLevel.h
M clang/include/clang/ScalableStaticAnalysisFramework/Analyses/UnsafeBufferUsage/UnsafeBufferUsage.h
M clang/include/clang/ScalableStaticAnalysisFramework/Analyses/UnsafeBufferUsage/UnsafeBufferUsageExtractor.h
A clang/include/clang/ScalableStaticAnalysisFramework/Analyses/UnsafeBufferUsage/UnsafeBufferUsageTest.h
M clang/include/clang/ScalableStaticAnalysisFramework/Core/Model/PrivateFieldNames.def
M clang/include/clang/ScalableStaticAnalysisFramework/Core/Serialization/JSONFormat.h
M clang/include/clang/ScalableStaticAnalysisFramework/Core/Serialization/SerializationFormat.h
M clang/include/clang/ScalableStaticAnalysisFramework/Core/TUSummary/ExtractorRegistry.h
M clang/include/clang/ScalableStaticAnalysisFramework/Core/WholeProgramAnalysis/DerivedAnalysis.h
M clang/include/clang/ScalableStaticAnalysisFramework/Core/WholeProgramAnalysis/WPASuite.h
M clang/include/clang/ScalableStaticAnalysisFramework/SSAFBuiltinForceLinker.h
M clang/include/clang/ScalableStaticAnalysisFramework/Tool/Utils.h
M clang/include/clang/Sema/Sema.h
M clang/include/clang/Sema/SemaHLSL.h
M clang/include/clang/Sema/SemaOpenMP.h
M clang/include/clang/Serialization/ASTBitCodes.h
M clang/include/clang/Serialization/ASTReader.h
M clang/include/clang/Serialization/ModuleCache.h
M clang/include/clang/Serialization/ModuleFile.h
M clang/include/clang/Serialization/ModuleManager.h
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/CallEvent.h
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/Environment.h
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/MemRegion.h
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/ProgramState.h
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/SValBuilder.h
M clang/include/module.modulemap
M clang/lib/AST/ByteCode/Boolean.h
A clang/lib/AST/ByteCode/Char.h
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ByteCode/Context.cpp
M clang/lib/AST/ByteCode/Descriptor.cpp
M clang/lib/AST/ByteCode/Descriptor.h
M clang/lib/AST/ByteCode/Disasm.cpp
M clang/lib/AST/ByteCode/EvaluationResult.cpp
M clang/lib/AST/ByteCode/Integral.h
M clang/lib/AST/ByteCode/IntegralAP.h
M clang/lib/AST/ByteCode/Interp.cpp
M clang/lib/AST/ByteCode/Interp.h
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
M clang/lib/AST/ByteCode/InterpBuiltinBitCast.cpp
M clang/lib/AST/ByteCode/InterpFrame.cpp
M clang/lib/AST/ByteCode/InterpStack.cpp
M clang/lib/AST/ByteCode/InterpStack.h
M clang/lib/AST/ByteCode/Pointer.cpp
M clang/lib/AST/ByteCode/Pointer.h
M clang/lib/AST/ByteCode/PrimType.cpp
M clang/lib/AST/ByteCode/PrimType.h
M clang/lib/AST/ByteCode/Primitives.h
M clang/lib/AST/ByteCode/Program.cpp
M clang/lib/AST/ItaniumMangle.cpp
M clang/lib/AST/OpenMPClause.cpp
M clang/lib/AST/StmtOpenMP.cpp
M clang/lib/AST/StmtPrinter.cpp
M clang/lib/AST/StmtProfile.cpp
M clang/lib/ASTMatchers/ASTMatchFinder.cpp
M clang/lib/ASTMatchers/ASTMatchersInternal.cpp
M clang/lib/ASTMatchers/Dynamic/Registry.cpp
M clang/lib/Analysis/AnalysisDeclContext.cpp
M clang/lib/Analysis/CFG.cpp
M clang/lib/Analysis/LifetimeSafety/Checker.cpp
M clang/lib/Analysis/LifetimeSafety/FactsGenerator.cpp
M clang/lib/Analysis/LifetimeSafety/Origins.cpp
M clang/lib/Analysis/PostOrderCFGView.cpp
M clang/lib/Basic/OpenMPKinds.cpp
M clang/lib/Basic/Targets/RISCV.h
M clang/lib/Basic/Targets/SPIR.h
M clang/lib/Basic/Targets/SystemZ.cpp
M clang/lib/CIR/CodeGen/CIRGenAtomic.cpp
M clang/lib/CIR/CodeGen/CIRGenBuilder.h
M clang/lib/CIR/CodeGen/CIRGenBuiltin.cpp
M clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp
M clang/lib/CIR/CodeGen/CIRGenCUDANV.cpp
M clang/lib/CIR/CodeGen/CIRGenClass.cpp
M clang/lib/CIR/CodeGen/CIRGenCleanup.cpp
M clang/lib/CIR/CodeGen/CIRGenDecl.cpp
M clang/lib/CIR/CodeGen/CIRGenException.cpp
M clang/lib/CIR/CodeGen/CIRGenExpr.cpp
M clang/lib/CIR/CodeGen/CIRGenExprAggregate.cpp
M clang/lib/CIR/CodeGen/CIRGenExprConstant.cpp
M clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
M clang/lib/CIR/CodeGen/CIRGenModule.cpp
M clang/lib/CIR/CodeGen/CIRGenModule.h
M clang/lib/CIR/CodeGen/CIRGenRecordLayoutBuilder.cpp
M clang/lib/CIR/CodeGen/CIRGenStmt.cpp
M clang/lib/CIR/CodeGen/CIRGenStmtOpenMP.cpp
M clang/lib/CIR/CodeGen/CIRGenTypes.cpp
M clang/lib/CIR/CodeGen/CIRGenValue.h
M clang/lib/CIR/Dialect/IR/CIRAttrs.cpp
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
M clang/lib/CIR/Dialect/IR/CIRMemorySlot.cpp
M clang/lib/CIR/Dialect/IR/CIRTypes.cpp
M clang/lib/CIR/Dialect/Transforms/CIRCanonicalize.cpp
M clang/lib/CIR/Dialect/Transforms/LoweringPrepare.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/CMakeLists.txt
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
M clang/lib/CodeGen/BackendUtil.cpp
M clang/lib/CodeGen/CGCall.cpp
M clang/lib/CodeGen/CGExpr.cpp
M clang/lib/CodeGen/CGStmt.cpp
M clang/lib/CodeGen/CGStmtOpenMP.cpp
M clang/lib/CodeGen/CodeGenFunction.cpp
M clang/lib/CodeGen/CodeGenFunction.h
M clang/lib/CodeGen/CodeGenModule.cpp
M clang/lib/CodeGen/TargetBuiltins/ARM.cpp
M clang/lib/CodeGen/TargetInfo.cpp
M clang/lib/CodeGen/Targets/SPIR.cpp
M clang/lib/CrossTU/CrossTranslationUnit.cpp
M clang/lib/DependencyScanning/DependencyScannerImpl.cpp
M clang/lib/DependencyScanning/InProcessModuleCache.cpp
M clang/lib/DependencyScanning/ModuleDepCollector.cpp
M clang/lib/Driver/Driver.cpp
M clang/lib/Driver/ModulesDriver.cpp
M clang/lib/Driver/ToolChains/AIX.cpp
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/Driver/ToolChains/Flang.cpp
M clang/lib/Driver/ToolChains/HIPSPV.cpp
M clang/lib/Driver/ToolChains/Hexagon.cpp
M clang/lib/Driver/ToolChains/Linux.cpp
M clang/lib/Driver/ToolChains/MinGW.cpp
M clang/lib/Driver/ToolChains/SYCL.cpp
M clang/lib/ExtractAPI/DeclarationFragments.cpp
M clang/lib/Format/BreakableToken.cpp
M clang/lib/Format/ContinuationIndenter.cpp
M clang/lib/Format/ContinuationIndenter.h
M clang/lib/Format/FormatToken.cpp
M clang/lib/Format/FormatToken.h
M clang/lib/Format/UnwrappedLineFormatter.cpp
M clang/lib/Format/WhitespaceManager.cpp
M clang/lib/Format/WhitespaceManager.h
M clang/lib/Frontend/CompilerInstance.cpp
M clang/lib/Frontend/DependencyFile.cpp
M clang/lib/Frontend/Rewrite/FrontendActions.cpp
M clang/lib/Headers/__clang_cuda_intrinsics.h
M clang/lib/Headers/hlsl/hlsl_alias_intrinsics.h
M clang/lib/Headers/hlsl/hlsl_detail.h
M clang/lib/Headers/hlsl/hlsl_intrinsic_helpers.h
M clang/lib/Headers/hlsl/hlsl_intrinsics.h
M clang/lib/Headers/wasm_simd128.h
M clang/lib/Lex/HeaderSearch.cpp
M clang/lib/Lex/ModuleMap.cpp
M clang/lib/Lex/PPDirectives.cpp
M clang/lib/Parse/ParseDecl.cpp
M clang/lib/Parse/ParseObjc.cpp
M clang/lib/Parse/ParseOpenMP.cpp
M clang/lib/Rewrite/Rewriter.cpp
M clang/lib/ScalableStaticAnalysisFramework/Analyses/CMakeLists.txt
A clang/lib/ScalableStaticAnalysisFramework/Analyses/EntityPointerLevel/EntityPointerLevel.cpp
A clang/lib/ScalableStaticAnalysisFramework/Analyses/UnsafeBufferUsage/UnsafeBufferUsage.cpp
M clang/lib/ScalableStaticAnalysisFramework/Analyses/UnsafeBufferUsage/UnsafeBufferUsageExtractor.cpp
M clang/lib/ScalableStaticAnalysisFramework/CMakeLists.txt
M clang/lib/ScalableStaticAnalysisFramework/Core/CMakeLists.txt
M clang/lib/ScalableStaticAnalysisFramework/Core/Serialization/JSONFormat/JSONFormatImpl.cpp
M clang/lib/ScalableStaticAnalysisFramework/Core/Serialization/JSONFormat/JSONFormatImpl.h
A clang/lib/ScalableStaticAnalysisFramework/Core/Serialization/JSONFormat/WPASuite.cpp
M clang/lib/ScalableStaticAnalysisFramework/Core/TUSummary/ExtractorRegistry.cpp
M clang/lib/ScalableStaticAnalysisFramework/Frontend/CMakeLists.txt
M clang/lib/ScalableStaticAnalysisFramework/Frontend/TUSummaryExtractorFrontendAction.cpp
A clang/lib/ScalableStaticAnalysisFramework/Plugins/CMakeLists.txt
A clang/lib/ScalableStaticAnalysisFramework/Plugins/ExamplePlugin/AnalysisResults.h
A clang/lib/ScalableStaticAnalysisFramework/Plugins/ExamplePlugin/CMakeLists.txt
A clang/lib/ScalableStaticAnalysisFramework/Plugins/ExamplePlugin/PairsAnalysis.cpp
A clang/lib/ScalableStaticAnalysisFramework/Plugins/ExamplePlugin/TagsAnalysis.cpp
A clang/lib/ScalableStaticAnalysisFramework/Plugins/ExamplePlugin/TagsPairsAnalysis.cpp
M clang/lib/ScalableStaticAnalysisFramework/Tool/Utils.cpp
M clang/lib/Sema/AnalysisBasedWarnings.cpp
M clang/lib/Sema/DeclSpec.cpp
M clang/lib/Sema/SemaChecking.cpp
M clang/lib/Sema/SemaConcept.cpp
M clang/lib/Sema/SemaDecl.cpp
M clang/lib/Sema/SemaDeclCXX.cpp
M clang/lib/Sema/SemaExceptionSpec.cpp
M clang/lib/Sema/SemaExprMember.cpp
M clang/lib/Sema/SemaHLSL.cpp
M clang/lib/Sema/SemaLifetimeSafety.h
M clang/lib/Sema/SemaOpenMP.cpp
M clang/lib/Sema/SemaTemplate.cpp
M clang/lib/Sema/SemaTemplateInstantiate.cpp
M clang/lib/Sema/SemaTemplateInstantiateDecl.cpp
M clang/lib/Sema/TreeTransform.h
M clang/lib/Serialization/ASTReader.cpp
M clang/lib/Serialization/ASTReaderStmt.cpp
M clang/lib/Serialization/ASTWriter.cpp
M clang/lib/Serialization/ASTWriterStmt.cpp
M clang/lib/Serialization/ModuleCache.cpp
M clang/lib/Serialization/ModuleManager.cpp
M clang/lib/StaticAnalyzer/Checkers/CStringChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/UninitializedObject/UninitializedObjectChecker.cpp
M clang/lib/StaticAnalyzer/Core/BugReporter.cpp
M clang/lib/StaticAnalyzer/Core/CallEvent.cpp
M clang/lib/StaticAnalyzer/Core/Environment.cpp
M clang/lib/StaticAnalyzer/Core/ExprEngine.cpp
M clang/lib/StaticAnalyzer/Core/ExprEngineCXX.cpp
M clang/lib/StaticAnalyzer/Core/ExprEngineCallAndReturn.cpp
M clang/lib/StaticAnalyzer/Core/MemRegion.cpp
M clang/lib/StaticAnalyzer/Core/ProgramState.cpp
M clang/lib/StaticAnalyzer/Core/RegionStore.cpp
M clang/lib/Tooling/DependencyScanningTool.cpp
M clang/lib/Tooling/JSONCompilationDatabase.cpp
A clang/test/AST/ByteCode/addr-label-diff.c
A clang/test/AST/ByteCode/addr-label-diff.cpp
M clang/test/AST/ByteCode/builtin-bit-cast.cpp
M clang/test/AST/ByteCode/const-eval.c
M clang/test/AST/ByteCode/cxx11.cpp
M clang/test/AST/ByteCode/cxx17.cpp
A clang/test/AST/ByteCode/int-as-ptr-arith.c
M clang/test/AST/ByteCode/placement-new.cpp
A clang/test/AST/ast-dump-openmp-split.c
A clang/test/Analysis/Scalable/UnsafeBufferUsage/Inputs/tu-summary-bad-element.json
A clang/test/Analysis/Scalable/UnsafeBufferUsage/Inputs/tu-summary-bad-ptr-level.json
A clang/test/Analysis/Scalable/UnsafeBufferUsage/Inputs/tu-summary-no-key.json
A clang/test/Analysis/Scalable/UnsafeBufferUsage/Inputs/tu-summary.json
A clang/test/Analysis/Scalable/UnsafeBufferUsage/tu-summary-serialization.test
A clang/test/Analysis/Scalable/extraction-works-alongside-compilation.cpp
A clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/duplicate-analysis-name.json
A clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/missing-results.json
A clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/pairs-result-bad-count.json
A clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/pairs-result-bad-pair-counts.json
A clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/pairs-result-entry-not-object.json
A clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/pairs-result-missing-entity-id.json
A clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/result-entry-analysis-name-not-string.json
A clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/result-entry-deserializer-error.json
A clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/result-entry-missing-analysis-name.json
A clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/result-entry-missing-result-field.json
A clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/result-entry-no-format-info.json
A clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/result-entry-not-object.json
A clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/result-entry-result-not-object.json
A clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/results-not-array.json
A clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/rt-all-results.json
A clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/rt-empty.json
A clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/rt-multiple-results.json
A clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/tags-result-bad-element.json
A clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/tags-result-missing-tags.json
A clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/tagspairs-result-bad-field-type.json
A clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/tagspairs-result-missing-field.json
A clang/test/Analysis/Scalable/ssaf-format/WPASuite/with-plugin.test
A clang/test/Analysis/Scalable/ssaf-format/WPASuite/without-plugin.test
M clang/test/Analysis/Scalable/ssaf-format/list.test
A clang/test/Analysis/Scalable/ssaf-format/lit.local.cfg
M clang/test/Analysis/Scalable/ssaf-linker/help.test
M clang/test/Analysis/Scalable/ssaf-linker/io.test
M clang/test/Analysis/Scalable/ssaf-linker/validation-errors-permissions.test
M clang/test/Analysis/Scalable/ssaf-linker/validation-errors.test
M clang/test/Analysis/atomics.c
M clang/test/Analysis/bstring.c
M clang/test/Analysis/bstring.cpp
A clang/test/Analysis/regionstore-zero-init.cpp
A clang/test/Analysis/split_analyze.c
A clang/test/CIR/CodeGen/agg-init-constexpr.cpp
A clang/test/CIR/CodeGen/aggregate-copy-overlap.cpp
M clang/test/CIR/CodeGen/array-ctor.cpp
M clang/test/CIR/CodeGen/array-dtor.cpp
M clang/test/CIR/CodeGen/atomic-scoped.c
A clang/test/CIR/CodeGen/bitint.c
A clang/test/CIR/CodeGen/ctor-try-body.cpp
M clang/test/CIR/CodeGen/global-array-dtor.cpp
M clang/test/CIR/CodeGen/global-init.cpp
A clang/test/CIR/CodeGen/global-ptr-init.cpp
A clang/test/CIR/CodeGen/long-double-inc-dec.cpp
A clang/test/CIR/CodeGen/mem-expr-fn.cpp
M clang/test/CIR/CodeGen/new.cpp
M clang/test/CIR/CodeGen/no-unique-address.cpp
A clang/test/CIR/CodeGen/non-scalar-lval-return.cpp
A clang/test/CIR/CodeGen/partial-array-cleanup.cpp
M clang/test/CIR/CodeGen/pointer-to-member-func.cpp
A clang/test/CIR/CodeGen/record-type-metadata.cpp
M clang/test/CIR/CodeGen/static-local.cpp
A clang/test/CIR/CodeGenBuiltins/builtin-fpclassify.c
A clang/test/CIR/CodeGenBuiltins/builtin-signbit.c
M clang/test/CIR/CodeGenBuiltins/builtins-floating-point.c
M clang/test/CIR/CodeGenBuiltins/builtins-overflow.cpp
M clang/test/CIR/CodeGenCUDA/kernel-call.cu
M clang/test/CIR/IR/array-ctor.cir
M clang/test/CIR/IR/array-dtor.cir
A clang/test/CIR/IR/bitint.cir
M clang/test/CIR/IR/copy.cir
A clang/test/CIR/IR/invalid-array-structor.cir
M clang/test/CIR/IR/invalid-copy.cir
A clang/test/CIR/Lowering/address-space.cir
M clang/test/CIR/Lowering/poison.cir
A clang/test/CIR/Transforms/canonicalize-cleanup-scope.cir
M clang/test/CIR/global-var-simple.cpp
M clang/test/CMakeLists.txt
M clang/test/CXX/dcl.dcl/dcl.spec/dcl.type/dcl.spec.auto/p3-generic-lambda-1y.cpp
M clang/test/ClangScanDeps/generate-modules-path-args.c
A clang/test/ClangScanDeps/modules-byname-dup-module-decl-diag.c
A clang/test/ClangScanDeps/modules-mmap-redef.c
A clang/test/ClangScanDeps/modules-pch-signature-mismatch.c
M clang/test/CodeGen/2004-02-13-Memset.c
M clang/test/CodeGen/AArch64/bf16-getset-intrinsics.c
M clang/test/CodeGen/AArch64/fp8-intrinsics/acle_neon_fp8_untyped.c
M clang/test/CodeGen/AArch64/neon-intrinsics.c
M clang/test/CodeGen/AArch64/neon/bf16-getset.c
A clang/test/CodeGen/AArch64/neon/f16-getset.c
M clang/test/CodeGen/AArch64/neon/fullfp16.c
M clang/test/CodeGen/AArch64/neon/intrinsics.c
M clang/test/CodeGen/AArch64/poly64.c
M clang/test/CodeGen/AArch64/sme-intrinsics/acle_sme_ld1.c
M clang/test/CodeGen/AArch64/sme-intrinsics/acle_sme_ld1_vnum.c
M clang/test/CodeGen/AArch64/sme-intrinsics/acle_sme_ldr.c
M clang/test/CodeGen/AArch64/sme-intrinsics/acle_sme_st1.c
M clang/test/CodeGen/AArch64/sme-intrinsics/acle_sme_st1_vnum.c
M clang/test/CodeGen/AArch64/sme-intrinsics/acle_sme_str.c
M clang/test/CodeGen/AArch64/sme-remarks.c
M clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_ldr_str_zt.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ld1.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ld1ro.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ld1rq.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ld1sb.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ld1sh.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ld1sw.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ld1ub.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ld1uh.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ld1uw.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ld2.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ld3.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ld4.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ldff1.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ldff1sb.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ldff1sh.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ldff1sw.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ldff1ub.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ldff1uh.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ldff1uw.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ldnf1.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ldnf1sb.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ldnf1sh.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ldnf1sw.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ldnf1ub.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ldnf1uh.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ldnf1uw.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ldnt1.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_prfb.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_prfd.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_prfh.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_prfw.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_st1.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_st1b.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_st1h.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_st1w.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_st2.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_st3.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_st4.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_stnt1.c
M clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_ldnt1.c
M clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_ldnt1sb.c
M clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_ldnt1sh.c
M clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_ldnt1sw.c
M clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_ldnt1ub.c
M clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_ldnt1uh.c
M clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_ldnt1uw.c
M clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_stnt1.c
M clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_stnt1b.c
M clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_stnt1h.c
M clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_stnt1w.c
M clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_ld1.c
M clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_ld1_single.c
M clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_ldnt1.c
M clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_load_struct.c
M clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_loads.c
M clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_st1.c
M clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_st1_single.c
M clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_stnt1.c
M clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_store.c
M clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_store_struct.c
M clang/test/CodeGen/AArch64/v8.2a-fp16-intrinsics.c
M clang/test/CodeGen/AArch64/v8.2a-neon-intrinsics-generic.c
A clang/test/CodeGen/AMDGPU/sanitizer.c
M clang/test/CodeGen/RISCV/bitint.c
M clang/test/CodeGen/const-init.c
M clang/test/CodeGen/const-label-addr.c
M clang/test/CodeGen/ext-int-cc.c
A clang/test/CodeGen/ext-vector-bool-read.cpp
M clang/test/CodeGen/ptrauth-module-flags.c
M clang/test/CodeGen/statements.c
M clang/test/CodeGen/staticinit.c
M clang/test/CodeGenCXX/2008-05-07-CrazyOffsetOf.cpp
M clang/test/CodeGenCXX/const-init-cxx11.cpp
M clang/test/CodeGenCXX/const-init.cpp
A clang/test/CodeGenCXX/dtor-local-lambda-mangle.cpp
A clang/test/CodeGenCXX/musttail-noexcept-error.cpp
A clang/test/CodeGenCXX/musttail-noexcept.cpp
A clang/test/CodeGenHIP/atomic-deprecated-fixit.hip
M clang/test/CodeGenHLSL/builtins/QuadReadAcrossX.hlsl
M clang/test/CodeGenHLSL/builtins/dst.hlsl
M clang/test/CodeGenHLSL/builtins/ldexp.hlsl
M clang/test/CodeGenHLSL/builtins/splitdouble.hlsl
M clang/test/CodeGenHLSL/resources/NonUniformResourceIndex.hlsl
M clang/test/CodeGenHLSL/semantics/SV_Position.ps.hlsl
M clang/test/CodeGenHLSL/semantics/SV_Position.vs.hlsl
M clang/test/CodeGenHLSL/semantics/SV_Target.ps.hlsl
M clang/test/CodeGenHLSL/semantics/semantic.arbitrary.hlsl
M clang/test/CodeGenHLSL/semantics/semantic.array.hlsl
M clang/test/CodeGenHLSL/semantics/semantic.array.output.hlsl
M clang/test/CodeGenHLSL/semantics/semantic.explicit-location-output-struct.hlsl
M clang/test/CodeGenHLSL/semantics/semantic.explicit-location.hlsl
M clang/test/CodeGenHLSL/semantics/semantic.explicit-mix-builtin.hlsl
M clang/test/CodeGenHLSL/semantics/semantic.explicit-mix.lib.hlsl
M clang/test/CodeGenHLSL/vk-features/vk.pushconstant.anon-struct.hlsl
M clang/test/CodeGenHLSL/vk-input-builtin.hlsl
M clang/test/CodeGenHLSL/vk-output-builtin.hlsl
M clang/test/CodeGenOpenCL/addr-space-struct-arg.cl
M clang/test/CodeGenOpenCL/bool_cast.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx12-err.cl
A clang/test/CodeGenOpenCL/builtins-amdgcn-mfma-gfx908-err.cl
M clang/test/CodeGenOpenCL/cl-uniform-wg-size.cl
M clang/test/CodeGenOpenCL/cl20-device-side-enqueue.cl
M clang/test/CodeGenOpenCL/kernel-attributes.cl
M clang/test/CodeGenOpenCL/kernel-metadata.cl
M clang/test/CodeGenOpenCL/kernel-param-alignment.cl
M clang/test/CodeGenOpenCL/kernels-have-spir-cc-by-default.cl
M clang/test/CodeGenOpenCL/opencl-kernel-call.cl
M clang/test/CodeGenOpenCL/pipe_types.cl
M clang/test/CodeGenOpenCL/pipe_types_mangling.cl
M clang/test/CodeGenOpenCL/sampler.cl
R clang/test/Driver/Inputs/SYCL/libLLVMSYCL.ll
A clang/test/Driver/Inputs/SYCL/libsycl.ll
M clang/test/Driver/Ofast.c
M clang/test/Driver/aix-ld.c
M clang/test/Driver/amdgpu-features.c
M clang/test/Driver/amdgpu-toolchain.c
M clang/test/Driver/cl-outputs.c
M clang/test/Driver/hexagon-toolchain-linux.c
M clang/test/Driver/hipspv-toolchain.hip
M clang/test/Driver/link-device-code.test
M clang/test/Driver/mingw.cpp
A clang/test/Driver/module-file-direct-deps.c
A clang/test/Driver/modules-driver-clang-modules-only.cpp
M clang/test/Driver/modules-driver-dep-graph.cpp
M clang/test/Driver/modules-driver-manifest-input-args.cpp
M clang/test/Driver/openmp-offload-gpu.c
M clang/test/Driver/pch-deps.c
M clang/test/Driver/print-supported-extensions-riscv.c
M clang/test/Driver/sycl-offload-jit.cpp
M clang/test/ExtractAPI/availability.c
M clang/test/ExtractAPI/objc_property.m
A clang/test/ExtractAPI/type-alias.cpp
A clang/test/Headers/cuda_intrinsics.cu
M clang/test/Index/extract-api-cursor-cpp.cpp
A clang/test/Index/openmp-split.c
A clang/test/Lexer/backslash-include-win.c
M clang/test/Misc/noexecstack.c
A clang/test/Modules/callable-require-clause-merge.cppm
A clang/test/Modules/dependency-gen-direct-module-deps.m
M clang/test/Modules/dependency-gen-pch.m
M clang/test/Modules/explicit-build.cpp
A clang/test/Modules/implicit-module-redefinition-same-file.c
A clang/test/Modules/implicit-module-redefinition.c
M clang/test/Modules/invalid-module-dep.c
M clang/test/Modules/merge-target-features.cpp
M clang/test/Modules/polluted-operator.cppm
A clang/test/Modules/symlink-to-modular-header.c
A clang/test/OpenMP/declare_target_local_map_messages.cpp
A clang/test/OpenMP/scan_inscan_template_nondependent.cpp
A clang/test/OpenMP/split_ast_print.cpp
A clang/test/OpenMP/split_codegen.cpp
A clang/test/OpenMP/split_composition.cpp
A clang/test/OpenMP/split_compound_associated.cpp
A clang/test/OpenMP/split_counts_constexpr.cpp
A clang/test/OpenMP/split_counts_ice.c
A clang/test/OpenMP/split_counts_verify.c
A clang/test/OpenMP/split_diag_errors.c
A clang/test/OpenMP/split_distribute_inner_split.cpp
A clang/test/OpenMP/split_driver_smoke.c
A clang/test/OpenMP/split_iv_types.c
A clang/test/OpenMP/split_loop_styles.cpp
A clang/test/OpenMP/split_member_ctor.cpp
A clang/test/OpenMP/split_messages.cpp
A clang/test/OpenMP/split_nested_outer_only.c
A clang/test/OpenMP/split_offload_codegen.cpp
A clang/test/OpenMP/split_omp_fill.c
A clang/test/OpenMP/split_openmp_version.cpp
A clang/test/OpenMP/split_opts_simd_debug.cpp
A clang/test/OpenMP/split_parallel_split.cpp
A clang/test/OpenMP/split_pch_codegen.cpp
A clang/test/OpenMP/split_range_for_diag.cpp
A clang/test/OpenMP/split_serialize_module.cpp
A clang/test/OpenMP/split_teams_nesting.cpp
A clang/test/OpenMP/split_template_nttp.cpp
A clang/test/OpenMP/split_templates.cpp
A clang/test/OpenMP/split_trip_volatile.c
A clang/test/OpenMP/strided_update_messages_from.c
A clang/test/OpenMP/strided_update_messages_to.c
A clang/test/OpenMP/strided_update_multiple_messages_from.c
A clang/test/OpenMP/strided_update_multiple_messages_to.c
A clang/test/OpenMP/strided_update_partial_messages_from.c
A clang/test/OpenMP/strided_update_partial_messages_to.c
A clang/test/OpenMP/strided_update_ptr_messages_from.c
A clang/test/OpenMP/strided_update_ptr_messages_to.c
A clang/test/OpenMP/strided_update_ptr_multiple_messages_from.c
A clang/test/OpenMP/strided_update_ptr_multiple_messages_to.c
A clang/test/OpenMP/strided_update_ptr_partial_messages_from.c
A clang/test/OpenMP/strided_update_ptr_partial_messages_to.c
A clang/test/OpenMP/strided_update_ptr_variable_count_and_stride_messages.c
A clang/test/OpenMP/strided_update_ptr_variable_count_messages.c
A clang/test/OpenMP/strided_update_ptr_variable_stride_messages.c
A clang/test/OpenMP/strided_update_struct_messages_from.c
A clang/test/OpenMP/strided_update_struct_messages_to.c
A clang/test/OpenMP/strided_update_struct_multiple_messages_from.c
A clang/test/OpenMP/strided_update_struct_multiple_messages_to.c
A clang/test/OpenMP/strided_update_struct_partial_messages_from.c
A clang/test/OpenMP/strided_update_struct_partial_messages_to.c
A clang/test/OpenMP/strided_update_struct_ptr_messages_from.c
A clang/test/OpenMP/strided_update_struct_ptr_messages_to.c
A clang/test/OpenMP/strided_update_struct_ptr_multiple_messages_from.c
A clang/test/OpenMP/strided_update_struct_ptr_multiple_messages_to.c
A clang/test/OpenMP/strided_update_struct_ptr_partial_messages_from.c
A clang/test/OpenMP/strided_update_struct_ptr_partial_messages_to.c
A clang/test/OpenMP/strided_update_struct_variable_count_and_stride_messages.c
A clang/test/OpenMP/strided_update_variable_count_and_stride_messages.c
A clang/test/OpenMP/strided_update_variable_stride_codegen.c
R clang/test/OpenMP/target_update_strided_messages_from.c
R clang/test/OpenMP/target_update_strided_messages_to.c
R clang/test/OpenMP/target_update_strided_multiple_messages_from.c
R clang/test/OpenMP/target_update_strided_multiple_messages_to.c
R clang/test/OpenMP/target_update_strided_partial_messages_from.c
R clang/test/OpenMP/target_update_strided_partial_messages_to.c
R clang/test/OpenMP/target_update_strided_ptr_messages_from.c
R clang/test/OpenMP/target_update_strided_ptr_messages_to.c
R clang/test/OpenMP/target_update_strided_ptr_multiple_messages_from.c
R clang/test/OpenMP/target_update_strided_ptr_multiple_messages_to.c
R clang/test/OpenMP/target_update_strided_ptr_partial_messages_from.c
R clang/test/OpenMP/target_update_strided_ptr_partial_messages_to.c
R clang/test/OpenMP/target_update_strided_ptr_variable_count_and_stride_messages.c
R clang/test/OpenMP/target_update_strided_ptr_variable_count_messages.c
R clang/test/OpenMP/target_update_strided_ptr_variable_stride_messages.c
R clang/test/OpenMP/target_update_strided_struct_messages_from.c
R clang/test/OpenMP/target_update_strided_struct_messages_to.c
R clang/test/OpenMP/target_update_strided_struct_multiple_messages_from.c
R clang/test/OpenMP/target_update_strided_struct_multiple_messages_to.c
R clang/test/OpenMP/target_update_strided_struct_partial_messages_from.c
R clang/test/OpenMP/target_update_strided_struct_partial_messages_to.c
R clang/test/OpenMP/target_update_strided_struct_ptr_messages_from.c
R clang/test/OpenMP/target_update_strided_struct_ptr_messages_to.c
R clang/test/OpenMP/target_update_strided_struct_ptr_multiple_messages_from.c
R clang/test/OpenMP/target_update_strided_struct_ptr_multiple_messages_to.c
R clang/test/OpenMP/target_update_strided_struct_ptr_partial_messages_from.c
R clang/test/OpenMP/target_update_strided_struct_ptr_partial_messages_to.c
R clang/test/OpenMP/target_update_strided_struct_variable_count_and_stride_messages.c
R clang/test/OpenMP/target_update_variable_count_and_stride_messages.c
R clang/test/OpenMP/target_update_variable_stride_codegen.c
A clang/test/PCH/Inputs/pragma-diag-push.h
A clang/test/PCH/pragma-diag-push-pop-across-pch.c
M clang/test/Parser/c2x-auto.c
M clang/test/Sema/array-init.c
M clang/test/Sema/c2x-auto.c
M clang/test/Sema/compound-literal.c
M clang/test/Sema/const-ptr-int-ptr-cast.c
M clang/test/Sema/constexpr.c
M clang/test/Sema/implicit-cast-complex-to-vector.c
M clang/test/Sema/init.c
M clang/test/Sema/warn-fortify-source.c
M clang/test/Sema/warn-lifetime-analysis-nocfg.cpp
M clang/test/Sema/warn-lifetime-safety-dangling-field.cpp
M clang/test/Sema/warn-lifetime-safety-invalidations.cpp
M clang/test/Sema/warn-lifetime-safety-suggestions.cpp
M clang/test/Sema/warn-lifetime-safety.cpp
M clang/test/SemaCXX/auto-cxx0x.cpp
M clang/test/SemaCXX/constant-expression-cxx14.cpp
M clang/test/SemaCXX/constexpr-string.cpp
M clang/test/SemaCXX/cxx1y-variable-templates_top_level.cpp
M clang/test/SemaCXX/cxx2c-fold-exprs.cpp
A clang/test/SemaCXX/gh185341.cpp
A clang/test/SemaHIP/atomic-deprecated.hip
A clang/test/SemaHIP/incorrect-atomic-scope.hip
M clang/test/SemaHLSL/BuiltIns/D3DCOLORtoUBYTE4-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/QuadReadAcrossX-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/cross-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/distance-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/dot2add-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/f16tof32-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/f32tof16-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/faceforward-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/fmod-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/ldexp-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/length-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/reflect-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/refract-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/smoothstep-errors.hlsl
A clang/test/SemaHLSL/Resources/resources-in-struct-array-error.hlsl
M clang/test/SemaHLSL/WaveBuiltinAvailability.hlsl
A clang/test/SemaOpenCL/incorrect-atomic-scope.cl
A clang/test/SemaTemplate/GH187909.cpp
M clang/test/SemaTemplate/concepts.cpp
M clang/test/TableGen/hlsl-intrinsics.td
A clang/test/VFS/Inputs/invalid-key.yaml
A clang/test/VFS/Inputs/invalid-top-level-key.yaml
M clang/test/VFS/parse-errors.c
M clang/tools/clang-ssaf-format/CMakeLists.txt
M clang/tools/clang-ssaf-format/SSAFFormat.cpp
M clang/tools/clang-ssaf-linker/SSAFLinker.cpp
M clang/tools/diagtool/CMakeLists.txt
M clang/tools/diagtool/ShowEnabledWarnings.cpp
M clang/tools/driver/cc1as_main.cpp
M clang/tools/libclang/CIndex.cpp
M clang/tools/libclang/CXCursor.cpp
M clang/unittests/AST/ByteCode/Descriptor.cpp
M clang/unittests/ASTMatchers/ASTMatchersNodeTest.cpp
M clang/unittests/ASTMatchers/ASTMatchersTest.h
M clang/unittests/Basic/CharInfoTest.cpp
M clang/unittests/CIR/CMakeLists.txt
A clang/unittests/CIR/RecordTypeMetadataTest.cpp
M clang/unittests/Format/AlignmentTest.cpp
M clang/unittests/Frontend/CompilerInstanceTest.cpp
M clang/unittests/Rewrite/RewriterTest.cpp
M clang/unittests/ScalableStaticAnalysisFramework/Analyses/UnsafeBufferUsage/UnsafeBufferUsageTest.cpp
M clang/unittests/ScalableStaticAnalysisFramework/Frontend/TUSummaryExtractorFrontendActionTest.cpp
M clang/unittests/ScalableStaticAnalysisFramework/Registries/MockSerializationFormat.cpp
M clang/unittests/ScalableStaticAnalysisFramework/Registries/MockSerializationFormat.h
M clang/unittests/ScalableStaticAnalysisFramework/TestFixture.h
M clang/utils/TableGen/CIRLoweringEmitter.cpp
M clang/utils/TableGen/ClangBuiltinsEmitter.cpp
M clang/utils/TableGen/HLSLEmitter.cpp
M compiler-rt/CMakeLists.txt
M compiler-rt/cmake/Modules/AddCompilerRT.cmake
M compiler-rt/cmake/Modules/AllSupportedArchDefs.cmake
M compiler-rt/cmake/Modules/CompilerRTCompile.cmake
M compiler-rt/cmake/caches/AMDGPU.cmake
M compiler-rt/cmake/caches/hexagon-linux-clangrt.cmake
M compiler-rt/cmake/config-ix.cmake
M compiler-rt/lib/asan/CMakeLists.txt
M compiler-rt/lib/interception/CMakeLists.txt
M compiler-rt/lib/interception/interception.h
M compiler-rt/lib/interception/interception_linux.cpp
M compiler-rt/lib/interception/interception_win.cpp
M compiler-rt/lib/interception/tests/interception_linux_test.cpp
M compiler-rt/lib/lsan/lsan_common.cpp
M compiler-rt/lib/profile/InstrProfilingPlatformAIX.c
M compiler-rt/lib/sanitizer_common/sanitizer_common.h
M compiler-rt/lib/sanitizer_common/sanitizer_linux_libcdep.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_mac.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_mac.h
M compiler-rt/lib/sanitizer_common/sanitizer_platform.h
M compiler-rt/lib/sanitizer_common/sanitizer_platform_limits_posix.cpp
M compiler-rt/lib/scudo/standalone/combined.h
M compiler-rt/lib/scudo/standalone/tests/combined_test.cpp
M compiler-rt/lib/scudo/standalone/wrappers_c.cpp
M compiler-rt/lib/scudo/standalone/wrappers_c.h
R compiler-rt/lib/scudo/standalone/wrappers_c.inc
R compiler-rt/lib/scudo/standalone/wrappers_c_bionic.cpp
M compiler-rt/lib/scudo/standalone/wrappers_cpp.cpp
M compiler-rt/lib/tysan/tysan.cpp
M compiler-rt/lib/tysan/tysan_interceptors.cpp
M compiler-rt/lib/ubsan/CMakeLists.txt
M compiler-rt/lib/ubsan_minimal/ubsan_minimal_handlers.cpp
M compiler-rt/test/asan/TestCases/disable_container_overflow_checks.c
M compiler-rt/test/lit.common.cfg.py
M compiler-rt/test/profile/instrprof-merge-entry-cover.c
M compiler-rt/test/profile/instrprof-merge.c
M compiler-rt/test/profile/instrprof-write-file-atexit-explicitly.c
M compiler-rt/test/profile/profile_test.h
M compiler-rt/test/sanitizer_common/CMakeLists.txt
M compiler-rt/test/sanitizer_common/TestCases/Linux/aligned_alloc-alignment.cpp
M compiler-rt/test/sanitizer_common/TestCases/Linux/allocator_returns_null_std.cpp
M compiler-rt/test/sanitizer_common/TestCases/Linux/decorate_proc_maps.cpp
M compiler-rt/test/sanitizer_common/TestCases/Linux/deepbind.cpp
M compiler-rt/test/sanitizer_common/TestCases/Linux/free_aligned_sized.c
M compiler-rt/test/sanitizer_common/TestCases/Linux/free_sized.c
M compiler-rt/test/sanitizer_common/TestCases/Linux/internal_symbolizer.cpp
M compiler-rt/test/sanitizer_common/TestCases/Linux/malloc_usable_size.c
M compiler-rt/test/sanitizer_common/TestCases/Linux/mlock_test.cpp
M compiler-rt/test/sanitizer_common/TestCases/Linux/mprobe.cpp
M compiler-rt/test/sanitizer_common/TestCases/Linux/pvalloc-overflow.cpp
M compiler-rt/test/sanitizer_common/TestCases/Linux/release_to_os_test.cpp
M compiler-rt/test/sanitizer_common/TestCases/Linux/replace_dlopen_main_program_test.cpp
M compiler-rt/test/sanitizer_common/TestCases/Linux/resize_tls_dynamic.cpp
M compiler-rt/test/sanitizer_common/TestCases/Linux/soft_rss_limit_mb_test.cpp
M compiler-rt/test/sanitizer_common/TestCases/Linux/tls_get_addr.c
M compiler-rt/test/sanitizer_common/TestCases/Linux/tls_malloc_hook.c
M compiler-rt/test/sanitizer_common/TestCases/Linux/unexpected_format_specifier_test.cpp
M compiler-rt/test/sanitizer_common/TestCases/Posix/huge_malloc.c
M compiler-rt/test/sanitizer_common/TestCases/Posix/mmap_write_exec.cpp
M compiler-rt/test/sanitizer_common/TestCases/Posix/posix_memalign-alignment.cpp
M compiler-rt/test/sanitizer_common/TestCases/Posix/print-module-map.cpp
M compiler-rt/test/sanitizer_common/TestCases/Posix/sanitizer_set_death_callback_test.cpp
M compiler-rt/test/sanitizer_common/TestCases/Posix/weak_hook_test.cpp
M compiler-rt/test/sanitizer_common/TestCases/allocator_interface.cpp
M compiler-rt/test/sanitizer_common/TestCases/allocator_returns_null.cpp
M compiler-rt/test/sanitizer_common/TestCases/compress_stack_depot.cpp
M compiler-rt/test/sanitizer_common/TestCases/corelimit.cpp
M compiler-rt/test/sanitizer_common/TestCases/get_allocated_begin.cpp
M compiler-rt/test/sanitizer_common/TestCases/hard_rss_limit_mb_test.cpp
M compiler-rt/test/sanitizer_common/TestCases/malloc_hook.cpp
M compiler-rt/test/sanitizer_common/TestCases/malloc_hook_get_allocated_size_fast.cpp
M compiler-rt/test/sanitizer_common/TestCases/max_allocation_size.cpp
M compiler-rt/test/sanitizer_common/TestCases/print-stack-trace.cpp
M compiler-rt/test/sanitizer_common/TestCases/reallocarray-overflow.cpp
M compiler-rt/test/sanitizer_common/TestCases/sanitizer_coverage_symbolize.cpp
M compiler-rt/test/sanitizer_common/TestCases/sanitizer_coverage_trace_pc_guard-dso.cpp
M compiler-rt/test/sanitizer_common/TestCases/sanitizer_coverage_trace_pc_guard.cpp
M compiler-rt/test/sanitizer_common/lit.common.cfg.py
M compiler-rt/test/ubsan_minimal/CMakeLists.txt
M compiler-rt/test/ubsan_minimal/TestCases/local_bounds.cpp
M cross-project-tests/intrinsic-header-tests/wasm_simd128.c
M flang-rt/include/flang-rt/runtime/environment.h
M flang-rt/lib/cuda/allocator.cpp
M flang-rt/lib/cuda/kernel.cpp
M flang-rt/lib/runtime/environment.cpp
M flang-rt/lib/runtime/time-intrinsic.cpp
M flang/docs/F202X.md
A flang/docs/MeetingNotes/2026/2026-04-08.md
A flang/docs/OpenMP-extensions.md
M flang/docs/OpenMPSupport.md
M flang/docs/index.md
M flang/examples/FeatureList/FeatureList.cpp
M flang/include/flang/Common/windows-include.h
M flang/include/flang/Evaluate/expression.h
M flang/include/flang/Evaluate/fold.h
M flang/include/flang/Evaluate/shape.h
M flang/include/flang/Evaluate/tools.h
M flang/include/flang/Evaluate/traverse.h
M flang/include/flang/Frontend/CodeGenOptions.def
M flang/include/flang/Frontend/CodeGenOptions.h
M flang/include/flang/Optimizer/Analysis/AliasAnalysis.h
M flang/include/flang/Optimizer/Dialect/FIRDialect.td
M flang/include/flang/Optimizer/Dialect/FIROps.td
M flang/include/flang/Optimizer/Dialect/FIRType.h
M flang/include/flang/Optimizer/Dialect/FIRTypes.td
M flang/include/flang/Optimizer/Dialect/Support/FIRContext.h
M flang/include/flang/Optimizer/HLFIR/HLFIROps.td
M flang/include/flang/Optimizer/Transforms/Passes.h
M flang/include/flang/Optimizer/Transforms/Passes.td
M flang/include/flang/Parser/characters.h
M flang/include/flang/Parser/dump-parse-tree.h
M flang/include/flang/Parser/parse-tree.h
M flang/include/flang/Semantics/dump-expr.h
M flang/include/flang/Semantics/expression.h
M flang/include/flang/Semantics/openmp-utils.h
M flang/include/flang/Tools/CrossToolHelpers.h
M flang/lib/Evaluate/check-expression.cpp
M flang/lib/Evaluate/expression.cpp
M flang/lib/Evaluate/fold-implementation.h
M flang/lib/Evaluate/formatting.cpp
M flang/lib/Evaluate/tools.cpp
M flang/lib/Frontend/CompilerInstance.cpp
M flang/lib/Frontend/CompilerInvocation.cpp
M flang/lib/Frontend/FrontendActions.cpp
M flang/lib/Lower/Bridge.cpp
M flang/lib/Lower/ConvertExpr.cpp
M flang/lib/Lower/ConvertExprToHLFIR.cpp
M flang/lib/Lower/IterationSpace.cpp
M flang/lib/Lower/OpenACC.cpp
M flang/lib/Lower/OpenMP/ClauseProcessor.cpp
M flang/lib/Lower/OpenMP/ClauseProcessor.h
M flang/lib/Lower/OpenMP/DataSharingProcessor.cpp
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Lower/Support/ReductionProcessor.cpp
M flang/lib/Lower/Support/Utils.cpp
M flang/lib/Optimizer/Analysis/AliasAnalysis.cpp
M flang/lib/Optimizer/Builder/Runtime/Allocatable.cpp
M flang/lib/Optimizer/CodeGen/CodeGen.cpp
M flang/lib/Optimizer/Dialect/CMakeLists.txt
M flang/lib/Optimizer/Dialect/CUF/CUFOps.cpp
M flang/lib/Optimizer/Dialect/FIRDialect.cpp
M flang/lib/Optimizer/Dialect/FIROps.cpp
M flang/lib/Optimizer/Dialect/FIRType.cpp
M flang/lib/Optimizer/Dialect/Support/FIRContext.cpp
M flang/lib/Optimizer/HLFIR/Transforms/SimplifyHLFIRIntrinsics.cpp
M flang/lib/Optimizer/OpenACC/Support/FIROpenACCTypeInterfaces.cpp
M flang/lib/Optimizer/OpenMP/DoConcurrentConversion.cpp
M flang/lib/Optimizer/Passes/Pipelines.cpp
M flang/lib/Optimizer/Transforms/CUDA/CUFComputeSharedMemoryOffsetsAndSize.cpp
M flang/lib/Optimizer/Transforms/CUDA/CUFOpConversion.cpp
M flang/lib/Optimizer/Transforms/FIRToMemRef.cpp
M flang/lib/Optimizer/Transforms/FunctionAttr.cpp
M flang/lib/Optimizer/Transforms/LoopInvariantCodeMotion.cpp
M flang/lib/Optimizer/Transforms/MIFOpConversion.cpp
M flang/lib/Optimizer/Transforms/StackArrays.cpp
M flang/lib/Parser/expr-parsers.cpp
M flang/lib/Parser/unparse.cpp
M flang/lib/Semantics/check-acc-structure.cpp
M flang/lib/Semantics/check-acc-structure.h
M flang/lib/Semantics/check-cuda.cpp
M flang/lib/Semantics/check-omp-atomic.cpp
M flang/lib/Semantics/check-omp-loop.cpp
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/check-omp-structure.h
M flang/lib/Semantics/definable.cpp
M flang/lib/Semantics/expression.cpp
M flang/lib/Semantics/openmp-utils.cpp
M flang/lib/Semantics/resolve-directives.cpp
M flang/lib/Semantics/tools.cpp
M flang/module/cudadevice.f90
A flang/test/Analysis/AliasAnalysis/alias-analysis-access-path.fir
A flang/test/Analysis/AliasAnalysis/alias-analysis-derived-type-box-load.fir
M flang/test/Analysis/AliasAnalysis/load-ptr-designate.fir
M flang/test/Analysis/AliasAnalysis/ptr-component.fir
A flang/test/Driver/Inputs/pgo-sample.prof
M flang/test/Driver/fintegrated-as.f90
A flang/test/Driver/fprofile-sample-use.f90
M flang/test/Driver/save-mlir-temps.f90
A flang/test/Evaluate/fold-conditional-expr.f90
M flang/test/Fir/CUDA/cuda-shared-offset.mlir
M flang/test/Fir/OpenACC/recipe-populate-firstprivate.mlir
M flang/test/Fir/dispatch.f90
A flang/test/Fir/dso-local-macho.fir
A flang/test/Fir/dso-local.fir
M flang/test/Fir/fir-ops.fir
M flang/test/Fir/invalid.fir
M flang/test/Fir/logical-convert.fir
A flang/test/Fir/logical-ops-fold.fir
M flang/test/HLFIR/simplify-hlfir-intrinsics-count.fir
A flang/test/Integration/OpenMP/taskloop-alloca-placement.f90
A flang/test/Integration/inputs/pgo-sample.prof
A flang/test/Integration/profile-sample-use.f90
M flang/test/Lower/CUDA/cuda-allocatable-device.cuf
M flang/test/Lower/CUDA/cuda-allocatable.cuf
M flang/test/Lower/CUDA/cuda-data-attribute.cuf
M flang/test/Lower/CUDA/cuda-device-proc.cuf
M flang/test/Lower/CUDA/cuda-gpu-managed.cuf
M flang/test/Lower/CUDA/cuda-intrinsic.cuf
M flang/test/Lower/CUDA/cuda-libdevice.cuf
M flang/test/Lower/CUDA/cuda-mod.cuf
M flang/test/Lower/CUDA/cuda-pointer-sync.cuf
M flang/test/Lower/CUDA/cuda-program-global.cuf
A flang/test/Lower/CUDA/cuda-unified.cuf
M flang/test/Lower/HLFIR/array-ctor-as-inlined-temp.f90
M flang/test/Lower/HLFIR/binary-ops.f90
A flang/test/Lower/HLFIR/conditional-expr.f90
M flang/test/Lower/HLFIR/expr-box.f90
M flang/test/Lower/HLFIR/procedure-pointer-in-generics.f90
M flang/test/Lower/HLFIR/user-defined-assignment.f90
M flang/test/Lower/Intrinsics/shifta.f90
M flang/test/Lower/Intrinsics/shiftl.f90
M flang/test/Lower/Intrinsics/shiftr.f90
M flang/test/Lower/Intrinsics/size.f90
M flang/test/Lower/Intrinsics/spread.f90
M flang/test/Lower/Intrinsics/transpose.f90
M flang/test/Lower/Intrinsics/transpose_opt.f90
M flang/test/Lower/Intrinsics/trim.f90
M flang/test/Lower/Intrinsics/ubound.f90
M flang/test/Lower/Intrinsics/ubound01.f90
M flang/test/Lower/OpenACC/acc-declare.f90
A flang/test/Lower/OpenACC/acc-do-concurrent-locality.f90
M flang/test/Lower/OpenACC/acc-reduction.f90
M flang/test/Lower/OpenMP/atomic-update-reassoc-logical.f90
M flang/test/Lower/OpenMP/block-use-predetermined-privatization.f90
A flang/test/Lower/OpenMP/common-block-target-update.f90
M flang/test/Lower/OpenMP/cray-pointers01.f90
M flang/test/Lower/OpenMP/declare-mapper.f90
M flang/test/Lower/OpenMP/if-clause.f90
M flang/test/Lower/OpenMP/implicit-dsa.f90
M flang/test/Lower/OpenMP/masked_taskloop.f90
M flang/test/Lower/OpenMP/parallel-masked-taskloop.f90
R flang/test/Lower/OpenMP/target-motion-skip-implicit-mapper.f90
M flang/test/Lower/OpenMP/taskloop-cancel.f90
M flang/test/Lower/OpenMP/taskloop-collapse.f90
M flang/test/Lower/OpenMP/taskloop-grainsize.f90
A flang/test/Lower/OpenMP/taskloop-inreduction.f90
M flang/test/Lower/OpenMP/taskloop-numtasks.f90
A flang/test/Lower/OpenMP/taskloop-reduction.f90
M flang/test/Lower/OpenMP/taskloop.f90
M flang/test/Lower/OpenMP/threadprivate-hlfir.f90
M flang/test/Lower/OpenMP/threadprivate-real-logical-complex-derivedtype.f90
M flang/test/Lower/OpenMP/threadprivate-use-association-2-hlfir.f90
M flang/test/Lower/OpenMP/threadprivate-use-association.f90
M flang/test/Lower/OpenMP/wsloop-reduction-logical-and-byref.f90
M flang/test/Lower/OpenMP/wsloop-reduction-logical-and.f90
M flang/test/Lower/OpenMP/wsloop-reduction-logical-eqv-byref.f90
M flang/test/Lower/OpenMP/wsloop-reduction-logical-eqv.f90
M flang/test/Lower/OpenMP/wsloop-reduction-logical-neqv-byref.f90
M flang/test/Lower/OpenMP/wsloop-reduction-logical-neqv.f90
M flang/test/Lower/OpenMP/wsloop-reduction-logical-or-byref.f90
M flang/test/Lower/OpenMP/wsloop-reduction-logical-or.f90
M flang/test/Lower/allocatable-globals.f90
M flang/test/Lower/array-elemental-calls-2.f90
M flang/test/Lower/array-elemental-calls-char-dynamic.f90
M flang/test/Lower/c-interoperability.f90
M flang/test/Lower/common-block.f90
M flang/test/Lower/dense-attributed-array.f90
M flang/test/Lower/dispatch.f90
A flang/test/Lower/extrn_subp.f90
M flang/test/Lower/pointer-default-init.f90
M flang/test/Lower/polymorphic.f90
R flang/test/Lower/taskloop-inreduction.f90
R flang/test/Lower/taskloop-reduction.f90
A flang/test/Parser/conditional-expr.f90
A flang/test/Semantics/OpenACC/acc-loop-routine-call.f90
A flang/test/Semantics/OpenMP/assumed-size-array-dsa.f90
M flang/test/Semantics/OpenMP/cray-pointer-usage.f90
A flang/test/Semantics/OpenMP/do-concurrent-collapse-60.f90
M flang/test/Semantics/OpenMP/do-concurrent-collapse.f90
M flang/test/Semantics/OpenMP/do22.f90
M flang/test/Semantics/OpenMP/fuse1.f90
M flang/test/Semantics/OpenMP/loop-transformation-clauses01.f90
M flang/test/Semantics/OpenMP/tile06.f90
A flang/test/Semantics/conditional-expr.f90
M flang/test/Semantics/cuf04.cuf
M flang/test/Semantics/cuf25.cuf
M flang/test/Transforms/CUF/cuf-kernel-licm.fir
M flang/test/Transforms/DoConcurrent/reduce_device.mlir
A flang/test/Transforms/DoConcurrent/reduce_device_min.f90
M flang/test/Transforms/FIRToMemRef/array-coor-block-arg.mlir
M flang/test/Transforms/FIRToMemRef/logical.mlir
M flang/test/Transforms/FIRToMemRef/slice.mlir
M flang/test/Transforms/OpenACC/acc-implicit-firstprivate.fir
A flang/test/Transforms/OpenACC/optional-firstprivate-recipe.fir
A flang/test/Transforms/OpenACC/optional-firstprivate.fir
M flang/test/Transforms/debug-line-table-inc-file.fir
M flang/test/Transforms/debug-line-table.fir
A flang/test/Transforms/licm-acc-compute-region.fir
A flang/test/Transforms/licm-nested-hoist-aggressive.fir
A flang/test/Transforms/licm-nested-hoist-disabled.fir
A flang/test/Transforms/licm-non-addressable-resource.mlir
M flang/test/Transforms/licm.fir
A flang/test/Transforms/stack-arrays-block-cfg-scope.fir
A flang/test/Transforms/stack-arrays-nested-scope.fir
A flang/test/Transforms/stack-arrays-scope.f90
A flang/test/Transforms/tbaa-derived-type-records.fir
M flang/unittests/CMakeLists.txt
A flang/unittests/Semantics/CMakeLists.txt
A flang/unittests/Semantics/OpenMPUtils.cpp
M libc/config/baremetal/aarch64/entrypoints.txt
M libc/config/baremetal/arm/entrypoints.txt
M libc/config/baremetal/riscv/entrypoints.txt
M libc/config/darwin/aarch64/entrypoints.txt
M libc/config/darwin/x86_64/entrypoints.txt
M libc/config/gpu/amdgpu/entrypoints.txt
M libc/config/gpu/nvptx/entrypoints.txt
M libc/config/gpu/spirv/entrypoints.txt
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/aarch64/headers.txt
M libc/config/linux/arm/entrypoints.txt
M libc/config/linux/arm/headers.txt
M libc/config/linux/i386/headers.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/riscv/headers.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/config/linux/x86_64/headers.txt
M libc/config/windows/entrypoints.txt
M libc/docs/CMakeLists.txt
M libc/docs/full_host_build.rst
M libc/docs/gpu/building.rst
M libc/docs/headers/index.rst
M libc/fuzzing/string/CMakeLists.txt
A libc/fuzzing/string/strnlen_s_differential_fuzz.cpp
M libc/hdr/types/char32_t.h
M libc/include/CMakeLists.txt
R libc/include/arpa/inet.h.def
M libc/include/arpa/inet.yaml
R libc/include/complex.h.def
M libc/include/complex.yaml
M libc/include/elf.yaml
R libc/include/fcntl.h.def
M libc/include/fcntl.yaml
R libc/include/inttypes.h.def
M libc/include/inttypes.yaml
M libc/include/llvm-libc-types/imaxdiv_t.h
R libc/include/netinet/in.h.def
M libc/include/netinet/in.yaml
R libc/include/poll.h.def
M libc/include/poll.yaml
M libc/include/pthread.yaml
R libc/include/sched.h.def
M libc/include/sched.yaml
R libc/include/signal.h.def
M libc/include/signal.yaml
R libc/include/stdio.h.def
M libc/include/stdio.yaml
R libc/include/stdlib.h.def
M libc/include/stdlib.yaml
M libc/include/string.yaml
A libc/include/syscall.h
R libc/include/sysexits.h.def
M libc/include/sysexits.yaml
R libc/include/termios.h.def
M libc/include/termios.yaml
R libc/include/unistd.h.def
M libc/include/unistd.yaml
M libc/shared/CMakeLists.txt
M libc/shared/math.h
A libc/shared/math/cbrtbf16.h
A libc/shared/math/copysign.h
A libc/shared/math/copysignbf16.h
A libc/shared/math/copysignf.h
A libc/shared/math/copysignf128.h
A libc/shared/math/copysignf16.h
A libc/shared/math/copysignl.h
A libc/shared/math/log10p1f16.h
A libc/shared/math/log2p1f16.h
M libc/shared/rpc.h
M libc/shared/rpc_server.h
M libc/src/CMakeLists.txt
M libc/src/__support/CMakeLists.txt
M libc/src/__support/FPUtil/ManipulationFunctions.h
M libc/src/__support/OSUtil/linux/syscall_wrappers/CMakeLists.txt
A libc/src/__support/OSUtil/linux/syscall_wrappers/accept.h
A libc/src/__support/OSUtil/linux/syscall_wrappers/connect.h
A libc/src/__support/OSUtil/linux/syscall_wrappers/listen.h
R libc/src/__support/RPC/rpc_server.h
M libc/src/__support/arg_list.h
M libc/src/__support/math/CMakeLists.txt
A libc/src/__support/math/cbrtbf16.h
A libc/src/__support/math/copysign.h
A libc/src/__support/math/copysignbf16.h
A libc/src/__support/math/copysignf.h
A libc/src/__support/math/copysignf128.h
A libc/src/__support/math/copysignf16.h
A libc/src/__support/math/copysignl.h
M libc/src/__support/threads/mutex.h
M libc/src/assert/generic/CMakeLists.txt
M libc/src/assert/generic/__assert_fail.cpp
M libc/src/assert/gpu/CMakeLists.txt
M libc/src/assert/gpu/__assert_fail.cpp
M libc/src/compiler/generic/CMakeLists.txt
M libc/src/compiler/generic/__stack_chk_fail.cpp
M libc/src/math/generic/CMakeLists.txt
M libc/src/math/generic/cbrtbf16.cpp
M libc/src/math/generic/copysign.cpp
M libc/src/math/generic/copysignbf16.cpp
M libc/src/math/generic/copysignf.cpp
M libc/src/math/generic/copysignf128.cpp
M libc/src/math/generic/copysignf16.cpp
M libc/src/math/generic/copysignl.cpp
M libc/src/pthread/CMakeLists.txt
M libc/src/pthread/pthread_attr_getschedparam.cpp
M libc/src/pthread/pthread_attr_setschedparam.cpp
A libc/src/pthread/pthread_mutex_trylock.cpp
A libc/src/pthread/pthread_mutex_trylock.h
A libc/src/semaphore/CMakeLists.txt
A libc/src/semaphore/posix_semaphore.h
M libc/src/stdio/CMakeLists.txt
M libc/src/stdio/generic/CMakeLists.txt
A libc/src/stdio/generic/rewind.cpp
A libc/src/stdio/rewind.h
M libc/src/stdlib/CMakeLists.txt
A libc/src/stdlib/abort.cpp
A libc/src/stdlib/abort_utils.h
M libc/src/stdlib/baremetal/CMakeLists.txt
R libc/src/stdlib/baremetal/abort.cpp
A libc/src/stdlib/baremetal/abort_utils.h
M libc/src/stdlib/gpu/CMakeLists.txt
R libc/src/stdlib/gpu/abort.cpp
A libc/src/stdlib/gpu/abort_utils.h
M libc/src/stdlib/linux/CMakeLists.txt
R libc/src/stdlib/linux/abort.cpp
M libc/src/stdlib/linux/abort_utils.h
M libc/src/string/CMakeLists.txt
M libc/src/string/string_utils.h
M libc/src/string/strnlen.cpp
A libc/src/string/strnlen_s.cpp
A libc/src/string/strnlen_s.h
M libc/src/sys/socket/CMakeLists.txt
A libc/src/sys/socket/accept.h
A libc/src/sys/socket/connect.h
M libc/src/sys/socket/linux/CMakeLists.txt
A libc/src/sys/socket/linux/accept.cpp
A libc/src/sys/socket/linux/connect.cpp
A libc/src/sys/socket/linux/listen.cpp
A libc/src/sys/socket/listen.h
M libc/test/integration/src/pthread/CMakeLists.txt
M libc/test/integration/src/pthread/pthread_mutex_test.cpp
M libc/test/integration/src/stdio/gpu/printf_test.cpp
M libc/test/integration/src/stdlib/abort_test.cpp
M libc/test/shared/CMakeLists.txt
M libc/test/shared/shared_math_constexpr_test.cpp
M libc/test/shared/shared_math_test.cpp
M libc/test/src/CMakeLists.txt
M libc/test/src/__support/CMakeLists.txt
M libc/test/src/assert/assert_test.cpp
A libc/test/src/semaphore/CMakeLists.txt
A libc/test/src/semaphore/semaphore_test.cpp
M libc/test/src/stdio/CMakeLists.txt
A libc/test/src/stdio/rewind_test.cpp
M libc/test/src/string/CMakeLists.txt
A libc/test/src/string/strnlen_s_test.cpp
M libc/test/src/sys/socket/linux/CMakeLists.txt
A libc/test/src/sys/socket/linux/connect_accept_test.cpp
A libc/test/src/sys/socket/linux/listen_test.cpp
A libc/utils/docgen/fcntl.yaml
M libc/utils/docgen/string.yaml
A libc/utils/docgen/sys/socket.yaml
M libclc/CMakeLists.txt
M libclc/README.md
M libclc/clc/lib/generic/workitem/clc_get_sub_group_size.cl
M libclc/test/CMakeLists.txt
M libcxx/docs/FeatureTestMacroTable.rst
M libcxx/docs/ReleaseNotes/23.rst
M libcxx/docs/Status/Cxx20Issues.csv
M libcxx/docs/Status/Cxx23Issues.csv
M libcxx/docs/Status/Cxx2cIssues.csv
M libcxx/docs/Status/Cxx2cPapers.csv
M libcxx/docs/TestingLibcxx.rst
M libcxx/include/__atomic/atomic_ref.h
M libcxx/include/__atomic/contention_t.h
M libcxx/include/__cxx03/__atomic/contention_t.h
M libcxx/include/__format/format_functions.h
M libcxx/include/__mdspan/layout_left.h
M libcxx/include/__mdspan/layout_right.h
M libcxx/include/__mdspan/layout_stride.h
M libcxx/include/__mdspan/mdspan.h
M libcxx/include/__memory/shared_ptr.h
M libcxx/include/__new/placement_new_delete.h
M libcxx/include/__numeric/saturation_arithmetic.h
M libcxx/include/__ranges/iota_view.h
M libcxx/include/format
M libcxx/include/mdspan
M libcxx/include/new
M libcxx/include/numeric
M libcxx/include/version
M libcxx/modules/std/format.inc
M libcxx/modules/std/numeric.inc
M libcxx/src/atomic.cpp
A libcxx/test/libcxx/containers/associative/lookup_with_transparently_comparable.pass.cpp
M libcxx/test/libcxx/numerics/nodiscard.verify.cpp
A libcxx/test/requirements.txt
A libcxx/test/selftest/filecheck.negative.sh.cpp
A libcxx/test/selftest/filecheck.sh.cpp
A libcxx/test/selftest/splitfile.sh.cpp
M libcxx/test/std/algorithms/alg.nonmodifying/alg.fold/left_folds.pass.cpp
M libcxx/test/std/algorithms/alg.sorting/alg.sort/stable.sort/stable_sort.pass.cpp
M libcxx/test/std/atomics/atomics.ref/address.pass.cpp
M libcxx/test/std/containers/views/mdspan/layout_right/ctor.layout_stride.pass.cpp
M libcxx/test/std/containers/views/mdspan/mdspan/element_type.verify.cpp
M libcxx/test/std/language.support/support.dynamic/new.delete/new.delete.placement/new.pass.cpp
M libcxx/test/std/language.support/support.dynamic/new.delete/new.delete.placement/new_array.pass.cpp
M libcxx/test/std/language.support/support.limits/support.limits.general/atomic.version.compile.pass.cpp
M libcxx/test/std/language.support/support.limits/support.limits.general/numeric.version.compile.pass.cpp
M libcxx/test/std/language.support/support.limits/support.limits.general/version.version.compile.pass.cpp
R libcxx/test/std/numerics/numeric.ops/numeric.ops.sat/add_sat.compile.pass.cpp
R libcxx/test/std/numerics/numeric.ops/numeric.ops.sat/add_sat.pass.cpp
R libcxx/test/std/numerics/numeric.ops/numeric.ops.sat/div_sat.assert.pass.cpp
R libcxx/test/std/numerics/numeric.ops/numeric.ops.sat/div_sat.compile.pass.cpp
R libcxx/test/std/numerics/numeric.ops/numeric.ops.sat/div_sat.pass.cpp
R libcxx/test/std/numerics/numeric.ops/numeric.ops.sat/mul_sat.compile.pass.cpp
R libcxx/test/std/numerics/numeric.ops/numeric.ops.sat/mul_sat.pass.cpp
R libcxx/test/std/numerics/numeric.ops/numeric.ops.sat/saturate_cast.compile.pass.cpp
R libcxx/test/std/numerics/numeric.ops/numeric.ops.sat/saturate_cast.pass.cpp
A libcxx/test/std/numerics/numeric.ops/numeric.ops.sat/saturating_add.compile.pass.cpp
A libcxx/test/std/numerics/numeric.ops/numeric.ops.sat/saturating_add.pass.cpp
A libcxx/test/std/numerics/numeric.ops/numeric.ops.sat/saturating_cast.compile.pass.cpp
A libcxx/test/std/numerics/numeric.ops/numeric.ops.sat/saturating_cast.pass.cpp
A libcxx/test/std/numerics/numeric.ops/numeric.ops.sat/saturating_div.assert.pass.cpp
A libcxx/test/std/numerics/numeric.ops/numeric.ops.sat/saturating_div.compile.pass.cpp
A libcxx/test/std/numerics/numeric.ops/numeric.ops.sat/saturating_div.pass.cpp
A libcxx/test/std/numerics/numeric.ops/numeric.ops.sat/saturating_mul.compile.pass.cpp
A libcxx/test/std/numerics/numeric.ops/numeric.ops.sat/saturating_mul.pass.cpp
A libcxx/test/std/numerics/numeric.ops/numeric.ops.sat/saturating_sub.compile.pass.cpp
A libcxx/test/std/numerics/numeric.ops/numeric.ops.sat/saturating_sub.pass.cpp
R libcxx/test/std/numerics/numeric.ops/numeric.ops.sat/sub_sat.compile.pass.cpp
R libcxx/test/std/numerics/numeric.ops/numeric.ops.sat/sub_sat.pass.cpp
M libcxx/test/std/ranges/range.factories/range.iota.view/size.pass.cpp
A libcxx/test/std/utilities/format/format.fmt.string/ctor.dynamic-format-string.pass.cpp
R libcxx/test/std/utilities/format/format.fmt.string/ctor.runtime-format-string.pass.cpp
A libcxx/test/std/utilities/format/format.functions/format.dynamic_format.pass.cpp
A libcxx/test/std/utilities/format/format.functions/format.locale.dynamic_format.pass.cpp
R libcxx/test/std/utilities/format/format.functions/format.locale.runtime_format.pass.cpp
R libcxx/test/std/utilities/format/format.functions/format.runtime_format.pass.cpp
A libcxx/test/std/utilities/format/format.syn/dynamic_format_string.pass.cpp
R libcxx/test/std/utilities/format/format.syn/runtime_format_string.pass.cpp
M libcxx/test/std/utilities/memory/util.smartptr/util.smartptr.shared/util.smartptr.shared.create/allocate_shared.array.unbounded.pass.cpp
M libcxx/test/std/utilities/memory/util.smartptr/util.smartptr.shared/util.smartptr.shared.create/make_shared.array.unbounded.pass.cpp
M libcxx/utils/ci/lnt/README.md
A libcxx/utils/ci/lnt/run-benchbot
M libcxx/utils/ci/lnt/run-benchmarks
R libcxx/utils/ci/lnt/runners/README.md
R libcxx/utils/ci/lnt/runners/apple-m5-clang21
R libcxx/utils/ci/lnt/runners/apple-m5-xcode26
A libcxx/utils/ci/lnt/submit-benchmarks
M libcxx/utils/conformance
M libcxx/utils/generate_feature_test_macro_components.py
M libcxx/utils/libcxx/test/features/misc.py
M libsycl/docs/index.rst
M libsycl/include/sycl/__impl/aspect.hpp
A libsycl/include/sycl/__impl/event.hpp
M libsycl/include/sycl/__impl/info/device_type.hpp
M libsycl/include/sycl/__impl/queue.hpp
M libsycl/include/sycl/__impl/usm_alloc_type.hpp
M libsycl/include/sycl/__impl/usm_functions.hpp
M libsycl/include/sycl/sycl.hpp
M libsycl/src/CMakeLists.txt
M libsycl/src/detail/context_impl.hpp
M libsycl/src/detail/device_binary_structures.hpp
M libsycl/src/detail/device_image_wrapper.hpp
M libsycl/src/detail/device_impl.hpp
A libsycl/src/detail/event_impl.cpp
A libsycl/src/detail/event_impl.hpp
M libsycl/src/detail/global_objects.hpp
M libsycl/src/detail/kernel_id.hpp
M libsycl/src/detail/offload/offload_topology.hpp
M libsycl/src/detail/offload/offload_utils.hpp
M libsycl/src/detail/platform_impl.cpp
M libsycl/src/detail/platform_impl.hpp
M libsycl/src/detail/program_manager.cpp
M libsycl/src/detail/program_manager.hpp
M libsycl/src/detail/queue_impl.cpp
M libsycl/src/detail/queue_impl.hpp
A libsycl/src/event.cpp
M libsycl/src/queue.cpp
M libsycl/src/usm_functions.cpp
M lld/COFF/Config.h
M lld/COFF/Driver.cpp
M lld/COFF/InputFiles.cpp
M lld/COFF/LTO.cpp
M lld/COFF/LTO.h
M lld/COFF/SymbolTable.cpp
M lld/ELF/AArch64ErrataFix.h
M lld/ELF/Driver.cpp
M lld/ELF/InputFiles.cpp
M lld/ELF/LTO.cpp
M lld/ELF/LTO.h
M lld/ELF/LinkerScript.cpp
A lld/test/COFF/export-all-conflict.test
M lld/test/COFF/gnu-weak.test
A lld/test/COFF/lto-libcall-archive-bitcode.test
A lld/test/COFF/pdb-publics-hashes.s
A lld/test/COFF/weak-preference.test
A lld/test/ELF/lto/libcall-archive-bitcode.test
M lld/test/ELF/x86-64-section-layout.s
A lld/test/wasm/lto/libcall-archive-bitcode.ll
M lld/wasm/LTO.cpp
M lld/wasm/LTO.h
M lld/wasm/SymbolTable.cpp
M lldb/bindings/interface/SBFileSpecExtensions.i
M lldb/bindings/interface/SBModuleSpecListExtensions.i
M lldb/docs/dil-expr-lang.ebnf
M lldb/docs/resources/test.rst
M lldb/docs/use/aarch64-linux.md
M lldb/examples/python/templates/scripted_process.py
M lldb/include/lldb/DataFormatters/FormattersContainer.h
M lldb/include/lldb/DataFormatters/TypeSynthetic.h
M lldb/include/lldb/Expression/DWARFExpression.h
M lldb/include/lldb/Interpreter/CommandOptionArgumentTable.h
M lldb/include/lldb/Interpreter/CommandReturnObject.h
M lldb/include/lldb/Symbol/CompilerType.h
M lldb/include/lldb/Symbol/Symbol.h
M lldb/include/lldb/Symbol/TypeSystem.h
M lldb/include/lldb/Target/ExecutionContext.h
M lldb/include/lldb/Target/Platform.h
M lldb/include/lldb/Target/Process.h
M lldb/include/lldb/Target/SyntheticFrameProvider.h
M lldb/include/lldb/Target/Target.h
M lldb/include/lldb/Target/Thread.h
M lldb/include/lldb/Utility/ConstString.h
M lldb/include/lldb/Utility/ScriptedMetadata.h
M lldb/include/lldb/Utility/UUID.h
M lldb/include/lldb/ValueObject/DILAST.h
M lldb/include/lldb/ValueObject/DILEval.h
M lldb/include/lldb/ValueObject/DILLexer.h
M lldb/include/lldb/ValueObject/DILParser.h
M lldb/include/lldb/lldb-defines.h
M lldb/include/lldb/lldb-enumerations.h
M lldb/packages/Python/lldbsuite/test/lldbutil.py
M lldb/packages/Python/lldbsuite/test/make/Makefile.rules
M lldb/packages/Python/lldbsuite/test/make/libcxx-simulators-common/compressed_pair.h
M lldb/source/API/SBAttachInfo.cpp
M lldb/source/API/SBCommandInterpreter.cpp
M lldb/source/API/SBCommunication.cpp
M lldb/source/API/SBDebugger.cpp
M lldb/source/API/SBEvent.cpp
M lldb/source/API/SBFileSpec.cpp
M lldb/source/API/SBFunction.cpp
M lldb/source/API/SBLanguageRuntime.cpp
M lldb/source/API/SBLaunchInfo.cpp
M lldb/source/API/SBListener.cpp
M lldb/source/API/SBMemoryRegionInfo.cpp
M lldb/source/API/SBModule.cpp
M lldb/source/API/SBPlatform.cpp
M lldb/source/API/SBProcess.cpp
M lldb/source/API/SBSymbol.cpp
M lldb/source/API/SBTarget.cpp
M lldb/source/API/SBThread.cpp
M lldb/source/API/SBValue.cpp
M lldb/source/API/SBWatchpoint.cpp
M lldb/source/Breakpoint/BreakpointResolverFileRegex.cpp
M lldb/source/Commands/CommandObjectBreakpoint.cpp
M lldb/source/Commands/CommandObjectCommands.cpp
M lldb/source/Commands/CommandObjectDisassemble.cpp
M lldb/source/Commands/CommandObjectFrame.cpp
M lldb/source/Commands/CommandObjectMemory.cpp
M lldb/source/Commands/CommandObjectPlatform.cpp
M lldb/source/Commands/CommandObjectProcess.cpp
M lldb/source/Commands/CommandObjectSource.cpp
M lldb/source/Commands/CommandObjectTarget.cpp
M lldb/source/Commands/CommandObjectThread.cpp
M lldb/source/Commands/CommandObjectType.cpp
M lldb/source/Commands/Options.td
M lldb/source/Core/AddressRange.cpp
M lldb/source/Core/Debugger.cpp
M lldb/source/Core/Disassembler.cpp
M lldb/source/Core/FormatEntity.cpp
M lldb/source/Core/IOHandlerCursesGUI.cpp
M lldb/source/Core/Mangled.cpp
M lldb/source/Core/Module.cpp
M lldb/source/Core/Section.cpp
M lldb/source/Core/SourceManager.cpp
M lldb/source/DataFormatters/FormatManager.cpp
M lldb/source/DataFormatters/FormatterSection.cpp
M lldb/source/DataFormatters/ValueObjectPrinter.cpp
M lldb/source/Expression/CMakeLists.txt
M lldb/source/Expression/DWARFExpression.cpp
M lldb/source/Expression/IRExecutionUnit.cpp
M lldb/source/Expression/Materializer.cpp
M lldb/source/Host/aix/Host.cpp
M lldb/source/Host/common/Socket.cpp
M lldb/source/Host/windows/ProcessLauncherWindows.cpp
M lldb/source/Host/windows/PythonPathSetup/PythonPathSetup.cpp
M lldb/source/Interpreter/CommandInterpreter.cpp
M lldb/source/Interpreter/CommandReturnObject.cpp
M lldb/source/Plugins/Disassembler/LLVMC/DisassemblerLLVMC.cpp
M lldb/source/Plugins/DynamicLoader/Darwin-Kernel/DynamicLoaderDarwinKernel.cpp
M lldb/source/Plugins/DynamicLoader/POSIX-DYLD/DynamicLoaderPOSIXDYLD.cpp
M lldb/source/Plugins/ExpressionParser/Clang/ClangASTSource.cpp
M lldb/source/Plugins/ExpressionParser/Clang/ClangExpressionParser.cpp
M lldb/source/Plugins/ExpressionParser/Clang/ClangExpressionSourceCode.cpp
M lldb/source/Plugins/ExpressionParser/Clang/ClangModulesDeclVendor.cpp
M lldb/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp
M lldb/source/Plugins/Language/CPlusPlus/BlockPointer.cpp
M lldb/source/Plugins/Language/CPlusPlus/CPlusPlusLanguage.cpp
M lldb/source/Plugins/Language/CPlusPlus/LibCxxVector.cpp
M lldb/source/Plugins/Language/CPlusPlus/MsvcStlVector.cpp
M lldb/source/Plugins/LanguageRuntime/CPlusPlus/ItaniumABIRuntime.cpp
M lldb/source/Plugins/LanguageRuntime/ObjC/AppleObjCRuntime/AppleObjCDeclVendor.cpp
M lldb/source/Plugins/LanguageRuntime/ObjC/AppleObjCRuntime/AppleObjCRuntimeV1.cpp
M lldb/source/Plugins/LanguageRuntime/ObjC/AppleObjCRuntime/AppleObjCRuntimeV2.cpp
M lldb/source/Plugins/LanguageRuntime/ObjC/AppleObjCRuntime/AppleObjCTrampolineHandler.cpp
M lldb/source/Plugins/LanguageRuntime/ObjC/ObjCLanguageRuntime.h
M lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp
M lldb/source/Plugins/ObjectFile/JSON/ObjectFileJSON.cpp
M lldb/source/Plugins/ObjectFile/Mach-O/ObjectFileMachO.cpp
M lldb/source/Plugins/ObjectFile/PECOFF/ObjectFilePECOFF.cpp
M lldb/source/Plugins/ObjectFile/XCOFF/ObjectFileXCOFF.cpp
M lldb/source/Plugins/ObjectFile/XCOFF/ObjectFileXCOFF.h
M lldb/source/Plugins/ObjectFile/wasm/ObjectFileWasm.cpp
M lldb/source/Plugins/Platform/MacOSX/PlatformDarwin.cpp
M lldb/source/Plugins/Platform/MacOSX/PlatformDarwinDevice.cpp
M lldb/source/Plugins/Platform/MacOSX/PlatformDarwinKernel.cpp
M lldb/source/Plugins/Process/AIX/NativeProcessAIX.cpp
M lldb/source/Plugins/Process/FreeBSD-Kernel-Core/ProcessFreeBSDKernelCore.cpp
M lldb/source/Plugins/Process/FreeBSD-Kernel-Core/ProcessFreeBSDKernelCore.h
M lldb/source/Plugins/Process/Linux/NativeProcessLinux.cpp
M lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp
M lldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.cpp
M lldb/source/Plugins/Process/mach-core/RegisterContextUnifiedCore.cpp
M lldb/source/Plugins/Process/scripted/ScriptedFrame.cpp
M lldb/source/Plugins/Process/scripted/ScriptedThread.cpp
M lldb/source/Plugins/SymbolFile/CTF/SymbolFileCTF.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFUnit.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFUnit.h
M lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARF.cpp
M lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARF.h
M lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARFDebugMap.cpp
M lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARFDwo.cpp
M lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARFDwo.h
M lldb/source/Plugins/SymbolFile/DWARF/SymbolFileWasm.cpp
M lldb/source/Plugins/SymbolFile/DWARF/SymbolFileWasm.h
M lldb/source/Plugins/SymbolFile/NativePDB/DWARFLocationExpression.cpp
M lldb/source/Plugins/SymbolFile/NativePDB/DWARFLocationExpression.h
M lldb/source/Plugins/SymbolFile/NativePDB/PdbUtil.cpp
M lldb/source/Plugins/SymbolFile/PDB/SymbolFilePDB.cpp
M lldb/source/Plugins/SymbolFile/Symtab/SymbolFileSymtab.cpp
M lldb/source/Plugins/SymbolLocator/DebugSymbols/SymbolLocatorDebugSymbols.cpp
M lldb/source/Plugins/SymbolLocator/SymStore/SymbolLocatorSymStore.cpp
M lldb/source/Plugins/SystemRuntime/MacOSX/SystemRuntimeMacOSX.cpp
M lldb/source/Plugins/TypeSystem/Clang/TypeSystemClang.cpp
M lldb/source/Plugins/TypeSystem/Clang/TypeSystemClang.h
M lldb/source/Plugins/UnwindAssembly/x86/x86AssemblyInspectionEngine.cpp
M lldb/source/Symbol/CompilerType.cpp
M lldb/source/Symbol/SymbolContext.cpp
M lldb/source/Symbol/Symtab.cpp
M lldb/source/Symbol/Type.cpp
M lldb/source/Symbol/TypeSystem.cpp
M lldb/source/Symbol/Variable.cpp
M lldb/source/Target/DynamicRegisterInfo.cpp
M lldb/source/Target/ModuleCache.cpp
M lldb/source/Target/Platform.cpp
M lldb/source/Target/Process.cpp
M lldb/source/Target/RegisterContextUnwind.cpp
M lldb/source/Target/SectionLoadList.cpp
M lldb/source/Target/StackFrame.cpp
M lldb/source/Target/SyntheticFrameProvider.cpp
M lldb/source/Target/Target.cpp
M lldb/source/Target/TargetProperties.td
M lldb/source/Target/Thread.cpp
M lldb/source/Target/ThreadPlanStepInRange.cpp
M lldb/source/Target/ThreadPlanStepOverRange.cpp
M lldb/source/Target/TraceDumper.cpp
M lldb/source/Utility/ArchSpec.cpp
M lldb/source/ValueObject/DILAST.cpp
M lldb/source/ValueObject/DILEval.cpp
M lldb/source/ValueObject/DILLexer.cpp
M lldb/source/ValueObject/DILParser.cpp
M lldb/source/ValueObject/ValueObject.cpp
M lldb/source/ValueObject/ValueObjectSynthetic.cpp
M lldb/test/API/CMakeLists.txt
M lldb/test/API/commands/breakpoint/set/func-regex/TestBreakpointRegexError.py
M lldb/test/API/commands/frame/var-dil/expr/Arithmetic/TestFrameVarDILArithmetic.py
M lldb/test/API/commands/help/TestHelp.py
M lldb/test/API/commands/memory/read/TestMemoryRead.py
M lldb/test/API/functionalities/scripted_frame_provider/TestScriptedFrameProvider.py
M lldb/test/API/functionalities/scripted_frame_provider/pass_through_prefix/TestFrameProviderPassThroughPrefix.py
M lldb/test/API/functionalities/scripted_frame_provider/pass_through_prefix/frame_provider.py
M lldb/test/API/functionalities/scripted_frame_provider/test_frame_providers.py
A lldb/test/API/functionalities/scripted_frame_provider/thread_filter/Makefile
A lldb/test/API/functionalities/scripted_frame_provider/thread_filter/TestFrameProviderThreadFilter.py
A lldb/test/API/functionalities/scripted_frame_provider/thread_filter/frame_provider.py
A lldb/test/API/functionalities/scripted_frame_provider/thread_filter/main.cpp
M lldb/test/API/functionalities/scripted_process/TestScriptedProcess.py
M lldb/test/API/functionalities/tsan/cpp_global_location/TestTsanCPPGlobalLocation.py
M lldb/test/API/functionalities/tsan/global_location/TestTsanGlobalLocation.py
M lldb/test/API/linux/aarch64/sme_only_registers/TestSMEOnlyRegisters.py
A lldb/test/API/linux/aarch64/sme_only_registers/core_simd_on_32
A lldb/test/API/linux/aarch64/sme_only_registers/core_streaming_off_64
M lldb/test/API/linux/aarch64/sme_only_registers/main.c
M lldb/test/API/lit.cfg.py
M lldb/test/API/lit.site.cfg.py.in
M lldb/test/API/macosx/simulator/TestSimulatorPlatform.py
A lldb/test/API/python_api/filespec/TestFileSpecAPI.py
M lldb/test/API/python_api/sbmodule/TestSBModule.py
M lldb/test/API/symstore/TestSymStore.py
M lldb/test/API/tools/lldb-server/TestAppleSimulatorOSType.py
M lldb/test/Shell/Commands/command-type-synthetic-add.test
M lldb/test/Shell/ObjectFile/ELF/minidebuginfo-corrupt-xz.yaml
M lldb/test/Shell/ObjectFile/ELF/minidebuginfo-no-lzma.yaml
M lldb/test/Shell/ObjectFile/XCOFF/basic-info32.yaml
A lldb/test/Shell/ObjectFile/wasm/wasm-local-decls.yaml
A lldb/test/Shell/Platform/AutoLoad/Darwin/dsym-auto-load-modules-false.test
A lldb/test/Shell/Platform/AutoLoad/Darwin/dsym-auto-load-modules-multiple.test
A lldb/test/Shell/Platform/AutoLoad/Darwin/dsym-auto-load-modules-not-in-dict.test
A lldb/test/Shell/Platform/AutoLoad/Darwin/dsym-auto-load-modules-true.test
A lldb/test/Shell/Platform/AutoLoad/Darwin/dsym-auto-load-modules-warn.test
A lldb/test/Shell/Platform/AutoLoad/UNIX/auto-load-modules-false.test
A lldb/test/Shell/Platform/AutoLoad/UNIX/auto-load-modules-multiple.test
A lldb/test/Shell/Platform/AutoLoad/UNIX/auto-load-modules-not-in-dict.test
A lldb/test/Shell/Platform/AutoLoad/UNIX/auto-load-modules-true.test
A lldb/test/Shell/Platform/AutoLoad/UNIX/auto-load-modules-warn.test
M lldb/test/Shell/Process/UnsupportedLanguage.test
M lldb/test/Shell/SymbolFile/DWARF/dwo-debug-file-search-path-symlink-relative-compdir.c
M lldb/test/Shell/SymbolFile/DWARF/dwo-debug-file-search-paths-dwoname-absolute-compdir.c
M lldb/test/Shell/SymbolFile/DWARF/dwo-debug-file-search-paths-filename-only-absolute-compdir.c
M lldb/test/Shell/SymbolFile/DWARF/dwo-debug-file-search-paths-filename-only-relative-compdir.c
M lldb/test/Shell/SymbolFile/DWARF/dwo-debug-file-search-paths-relative-compdir.c
M lldb/test/Shell/SymbolFile/DWARF/dwo-relative-filename-only-binary-dir.c
M lldb/test/Shell/SymbolFile/DWARF/x86/dwo-not-found-warning.cpp
M lldb/test/Shell/SymbolFile/DWARF/x86/dwp-separate-debug-file.cpp
A lldb/test/Shell/SymbolFile/NativePDB/structured-bindings-clang.test
M lldb/test/Shell/SymbolFile/NativePDB/structured-bindings-msvc.test
M lldb/tools/driver/lldb-mte-entitlements.plist
M lldb/tools/lldb-dap/DAP.cpp
M lldb/tools/lldb-dap/Handler/AttachRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/EvaluateRequestHandler.cpp
M lldb/tools/lldb-dap/LLDBUtils.cpp
M lldb/tools/lldb-dap/LLDBUtils.h
M lldb/tools/lldb-dap/RunInTerminal.cpp
M lldb/tools/lldb-server/lldb-gdbserver.cpp
M lldb/unittests/Expression/DWARFExpressionTest.cpp
M lldb/unittests/Host/SocketTest.cpp
A lldb/unittests/Instruction/ARM/TestARMEmulator.cpp
M lldb/unittests/Instruction/CMakeLists.txt
M lldb/unittests/Platform/PlatformDarwinTest.cpp
M lldb/unittests/Platform/PlatformTest.cpp
M lldb/unittests/Platform/TestUtils.cpp
M lldb/unittests/Process/gdb-remote/GDBRemoteCommunicationServerLLGSTest.cpp
M lldb/unittests/SymbolFile/PDB/SymbolFilePDBTests.cpp
M lldb/unittests/Target/MemoryTest.cpp
M lldb/unittests/Utility/ConstStringTest.cpp
M lldb/utils/lldb-dotest/lldb-dotest.in
M llvm/CMakeLists.txt
M llvm/cmake/config-ix.cmake
M llvm/cmake/modules/AddLLVM.cmake
A llvm/cmake/modules/FindLibXml2.cmake
M llvm/docs/AArch64SME.rst
A llvm/docs/AMDGPU/AMDGPUAsmGFX950.rst
A llvm/docs/AMDGPU/gfx950_operands.rst
M llvm/docs/AMDGPUModifierSyntax.rst
M llvm/docs/AMDGPUUsage.rst
M llvm/docs/CommandGuide/llvm-cov.rst
M llvm/docs/CommandGuide/llvm-dwarfdump.rst
M llvm/docs/CommandGuide/opt.rst
M llvm/docs/CompileCudaWithLLVM.rst
M llvm/docs/DeveloperPolicy.rst
M llvm/docs/Extensions.rst
M llvm/docs/LangRef.rst
M llvm/docs/ProgrammersManual.rst
M llvm/docs/QualGroup.rst
M llvm/docs/ReleaseNotes.md
M llvm/examples/Kaleidoscope/BuildingAJIT/Chapter3/KaleidoscopeJIT.h
M llvm/examples/Kaleidoscope/BuildingAJIT/Chapter4/KaleidoscopeJIT.h
M llvm/examples/OrcV2Examples/LLJITWithExecutorProcessControl/LLJITWithExecutorProcessControl.cpp
M llvm/include/llvm-c/Core.h
M llvm/include/llvm/ABI/FunctionInfo.h
M llvm/include/llvm/ADT/GenericUniformityImpl.h
M llvm/include/llvm/ADT/PostOrderIterator.h
M llvm/include/llvm/ADT/SmallVector.h
M llvm/include/llvm/Analysis/BlockFrequencyInfoImpl.h
M llvm/include/llvm/Analysis/BranchProbabilityInfo.h
M llvm/include/llvm/Analysis/DependenceAnalysis.h
M llvm/include/llvm/Analysis/FunctionPropertiesAnalysis.h
M llvm/include/llvm/Analysis/InlineCost.h
M llvm/include/llvm/Analysis/InlineOrder.h
M llvm/include/llvm/Analysis/InstCount.h
M llvm/include/llvm/Analysis/LoopIterator.h
M llvm/include/llvm/Analysis/ScalarEvolutionPatternMatch.h
M llvm/include/llvm/Analysis/UniformityAnalysis.h
M llvm/include/llvm/BinaryFormat/GOFF.h
M llvm/include/llvm/CAS/MappedFileRegionArena.h
M llvm/include/llvm/CodeGen/AsmPrinter.h
A llvm/include/llvm/CodeGen/AsmPrinterAnalysis.h
M llvm/include/llvm/CodeGen/BasicBlockSectionsProfileReader.h
M llvm/include/llvm/CodeGen/BasicTTIImpl.h
M llvm/include/llvm/CodeGen/FunctionLoweringInfo.h
M llvm/include/llvm/CodeGen/GlobalISel/GISelValueTracking.h
M llvm/include/llvm/CodeGen/GlobalISel/MIPatternMatch.h
M llvm/include/llvm/CodeGen/GlobalISel/Utils.h
M llvm/include/llvm/CodeGen/ISDOpcodes.h
A llvm/include/llvm/CodeGen/InsertCodePrefetch.h
M llvm/include/llvm/CodeGen/LiveIntervals.h
M llvm/include/llvm/CodeGen/MachineBasicBlock.h
M llvm/include/llvm/CodeGen/MachineBranchProbabilityInfo.h
M llvm/include/llvm/CodeGen/MachineUniformityAnalysis.h
M llvm/include/llvm/CodeGen/Passes.h
M llvm/include/llvm/CodeGen/Rematerializer.h
M llvm/include/llvm/CodeGen/ScheduleDAG.h
M llvm/include/llvm/CodeGen/SelectionDAG.h
M llvm/include/llvm/CodeGen/SelectionDAGNodes.h
M llvm/include/llvm/CodeGen/TargetInstrInfo.h
M llvm/include/llvm/DebugInfo/DWARF/LowLevel/DWARFDataExtractorSimple.h
M llvm/include/llvm/DebugInfo/DWARF/LowLevel/DWARFExpression.h
M llvm/include/llvm/DebugInfo/Symbolize/SymbolizableObjectFile.h
A llvm/include/llvm/ExecutionEngine/JITLink/ELF_hexagon.h
M llvm/include/llvm/ExecutionEngine/JITLink/JITLink.h
A llvm/include/llvm/ExecutionEngine/JITLink/hexagon.h
M llvm/include/llvm/ExecutionEngine/Orc/EPCGenericDylibManager.h
M llvm/include/llvm/ExecutionEngine/Orc/EPCIndirectionUtils.h
M llvm/include/llvm/ExecutionEngine/Orc/ExecutorProcessControl.h
M llvm/include/llvm/ExecutionEngine/Orc/JITLinkRedirectableSymbolManager.h
M llvm/include/llvm/ExecutionEngine/Orc/MachOBuilder.h
M llvm/include/llvm/ExecutionEngine/Orc/MachOPlatform.h
M llvm/include/llvm/ExecutionEngine/Orc/SelfExecutorProcessControl.h
M llvm/include/llvm/ExecutionEngine/Orc/SimpleRemoteEPC.h
M llvm/include/llvm/Frontend/OpenMP/OMP.td
M llvm/include/llvm/Frontend/OpenMP/OMPIRBuilder.h
M llvm/include/llvm/IR/CallingConv.h
M llvm/include/llvm/IR/FixedMetadataKinds.def
M llvm/include/llvm/IR/IRBuilder.h
M llvm/include/llvm/IR/Instruction.h
M llvm/include/llvm/IR/Instructions.h
M llvm/include/llvm/IR/Intrinsics.td
M llvm/include/llvm/IR/IntrinsicsAArch64.td
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/include/llvm/IR/IntrinsicsNVVM.td
M llvm/include/llvm/IR/Metadata.h
M llvm/include/llvm/IR/PatternMatch.h
M llvm/include/llvm/IR/ValueHandle.h
M llvm/include/llvm/LTO/LTO.h
M llvm/include/llvm/LTO/LTOBackend.h
M llvm/include/llvm/MC/MCAsmInfo.h
M llvm/include/llvm/MC/MCAssembler.h
M llvm/include/llvm/MC/MCContext.h
M llvm/include/llvm/MC/MCObjectStreamer.h
M llvm/include/llvm/MC/MCSection.h
M llvm/include/llvm/MC/MCStreamer.h
M llvm/include/llvm/MC/TargetRegistry.h
M llvm/include/llvm/MCA/Stages/InstructionTables.h
M llvm/include/llvm/MCA/Support.h
M llvm/include/llvm/Object/BBAddrMap.h
M llvm/include/llvm/ObjectYAML/DWARFYAML.h
M llvm/include/llvm/Passes/CodeGenPassBuilder.h
M llvm/include/llvm/ProfileData/Coverage/CoverageMapping.h
M llvm/include/llvm/ProfileData/SampleProf.h
M llvm/include/llvm/SandboxIR/User.h
M llvm/include/llvm/Support/DataExtractor.h
M llvm/include/llvm/Support/Error.h
M llvm/include/llvm/Support/FileSystem.h
A llvm/include/llvm/Support/HTTP/StreamedHTTPResponseHandler.h
M llvm/include/llvm/Support/KnownBits.h
M llvm/include/llvm/Support/KnownFPClass.h
M llvm/include/llvm/Support/LSP/Protocol.h
A llvm/include/llvm/Support/PatternMatchHelpers.h
M llvm/include/llvm/Support/Registry.h
M llvm/include/llvm/Support/TargetOpcodes.def
M llvm/include/llvm/Support/UniqueBBID.h
M llvm/include/llvm/Target/GenericOpcodes.td
M llvm/include/llvm/Target/GlobalISel/Combine.td
M llvm/include/llvm/Target/TargetMachine.h
M llvm/include/llvm/Target/TargetSelectionDAG.td
M llvm/include/llvm/Transforms/InstCombine/InstCombiner.h
M llvm/include/llvm/Transforms/Scalar/GVN.h
M llvm/include/llvm/Transforms/Utils/Cloning.h
M llvm/include/llvm/Transforms/Utils/CodeMoverUtils.h
M llvm/include/llvm/Transforms/Utils/UnrollLoop.h
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Passes/LoadStoreVec.h
M llvm/lib/Analysis/BasicAliasAnalysis.cpp
M llvm/lib/Analysis/BranchProbabilityInfo.cpp
M llvm/lib/Analysis/ConstantFolding.cpp
M llvm/lib/Analysis/DependenceAnalysis.cpp
M llvm/lib/Analysis/FunctionPropertiesAnalysis.cpp
M llvm/lib/Analysis/InlineCost.cpp
M llvm/lib/Analysis/InlineOrder.cpp
M llvm/lib/Analysis/InstCount.cpp
M llvm/lib/Analysis/InstructionSimplify.cpp
M llvm/lib/Analysis/LoopInfo.cpp
M llvm/lib/Analysis/ScalarEvolution.cpp
M llvm/lib/Analysis/UniformityAnalysis.cpp
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/lib/CAS/DatabaseFile.cpp
M llvm/lib/CAS/MappedFileRegionArena.cpp
M llvm/lib/CAS/OnDiskGraphDB.cpp
M llvm/lib/CAS/OnDiskTrieRawHashMap.cpp
M llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
M llvm/lib/CodeGen/BasicBlockSections.cpp
M llvm/lib/CodeGen/BasicBlockSectionsProfileReader.cpp
M llvm/lib/CodeGen/CodeGenPrepare.cpp
M llvm/lib/CodeGen/CodeGenTargetMachineImpl.cpp
M llvm/lib/CodeGen/ExpandVectorPredication.cpp
M llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
M llvm/lib/CodeGen/GlobalISel/GISelValueTracking.cpp
M llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
M llvm/lib/CodeGen/GlobalISel/Utils.cpp
M llvm/lib/CodeGen/InlineSpiller.cpp
M llvm/lib/CodeGen/InsertCodePrefetch.cpp
M llvm/lib/CodeGen/LiveRangeEdit.cpp
M llvm/lib/CodeGen/MIRSampleProfile.cpp
M llvm/lib/CodeGen/MachineBranchProbabilityInfo.cpp
M llvm/lib/CodeGen/MachineModuleInfo.cpp
M llvm/lib/CodeGen/MachineTraceMetrics.cpp
M llvm/lib/CodeGen/MachineUniformityAnalysis.cpp
M llvm/lib/CodeGen/PeepholeOptimizer.cpp
M llvm/lib/CodeGen/PreISelIntrinsicLowering.cpp
M llvm/lib/CodeGen/Rematerializer.cpp
M llvm/lib/CodeGen/ScheduleDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/lib/CodeGen/TargetInstrInfo.cpp
M llvm/lib/CodeGen/TargetLoweringBase.cpp
M llvm/lib/CodeGen/TwoAddressInstructionPass.cpp
M llvm/lib/DWARFLinker/Classic/DWARFStreamer.cpp
M llvm/lib/DWARFLinker/Parallel/DWARFEmitterImpl.cpp
M llvm/lib/DWARFLinker/Parallel/DebugLineSectionEmitter.h
M llvm/lib/DebugInfo/GSYM/FileWriter.cpp
M llvm/lib/DebugInfo/GSYM/FunctionInfo.cpp
M llvm/lib/DebugInfo/GSYM/GsymCreator.cpp
M llvm/lib/DebugInfo/GSYM/MergedFunctionsInfo.cpp
M llvm/lib/DebugInfo/PDB/Native/GSIStreamBuilder.cpp
M llvm/lib/DebugInfo/Symbolize/SymbolizableObjectFile.cpp
M llvm/lib/Debuginfod/Debuginfod.cpp
M llvm/lib/ExecutionEngine/JITLink/CMakeLists.txt
M llvm/lib/ExecutionEngine/JITLink/ELF.cpp
A llvm/lib/ExecutionEngine/JITLink/ELF_hexagon.cpp
A llvm/lib/ExecutionEngine/JITLink/hexagon.cpp
M llvm/lib/ExecutionEngine/Orc/EPCIndirectionUtils.cpp
M llvm/lib/ExecutionEngine/Orc/JITLinkRedirectableSymbolManager.cpp
M llvm/lib/ExecutionEngine/Orc/MachOPlatform.cpp
M llvm/lib/ExecutionEngine/Orc/SelfExecutorProcessControl.cpp
M llvm/lib/ExecutionEngine/Orc/SimpleRemoteEPC.cpp
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
M llvm/lib/IR/AutoUpgrade.cpp
M llvm/lib/IR/Core.cpp
M llvm/lib/IR/IRBuilder.cpp
M llvm/lib/IR/Intrinsics.cpp
M llvm/lib/IR/RuntimeLibcalls.cpp
M llvm/lib/IR/Value.cpp
M llvm/lib/IR/Verifier.cpp
M llvm/lib/LTO/LTO.cpp
M llvm/lib/LTO/LTOBackend.cpp
M llvm/lib/LTO/LTOCodeGenerator.cpp
M llvm/lib/LTO/ThinLTOCodeGenerator.cpp
M llvm/lib/MC/ELFObjectWriter.cpp
M llvm/lib/MC/GOFFObjectWriter.cpp
M llvm/lib/MC/MCAsmStreamer.cpp
M llvm/lib/MC/MCAssembler.cpp
M llvm/lib/MC/MCContext.cpp
M llvm/lib/MC/MCFragment.cpp
M llvm/lib/MC/MCObjectStreamer.cpp
M llvm/lib/MC/MCParser/AsmParser.cpp
M llvm/lib/MC/MCSection.cpp
M llvm/lib/MC/MCStreamer.cpp
M llvm/lib/MCA/HardwareUnits/ResourceManager.cpp
M llvm/lib/MCA/Support.cpp
A llvm/lib/Object/BBAddrMap.cpp
M llvm/lib/Object/CMakeLists.txt
M llvm/lib/Object/ELF.cpp
M llvm/lib/Object/ELFObjectFile.cpp
M llvm/lib/ObjectYAML/DWARFEmitter.cpp
M llvm/lib/ObjectYAML/DWARFYAML.cpp
M llvm/lib/Passes/PassBuilder.cpp
M llvm/lib/Passes/PassBuilderPipelines.cpp
M llvm/lib/Passes/PassRegistry.def
M llvm/lib/ProfileData/Coverage/CoverageMapping.cpp
M llvm/lib/Remarks/YAMLRemarkParser.cpp
M llvm/lib/Support/HTTP/CMakeLists.txt
A llvm/lib/Support/HTTP/StreamedHTTPResponseHandler.cpp
M llvm/lib/Support/KnownFPClass.cpp
M llvm/lib/Support/LSP/Protocol.cpp
M llvm/lib/Support/LockFileManager.cpp
M llvm/lib/Support/Unix/Path.inc
M llvm/lib/Support/VirtualFileSystem.cpp
M llvm/lib/Support/Windows/Path.inc
M llvm/lib/Support/Windows/Signals.inc
M llvm/lib/Support/Windows/Threading.inc
M llvm/lib/Support/YAMLTraits.cpp
M llvm/lib/Support/raw_socket_stream.cpp
M llvm/lib/Target/AArch64/AArch64.h
M llvm/lib/Target/AArch64/AArch64A57FPLoadBalancing.cpp
M llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
M llvm/lib/Target/AArch64/AArch64ExpandPseudoInsts.cpp
M llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.h
M llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.h
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/lib/Target/AArch64/AArch64MachineFunctionInfo.h
M llvm/lib/Target/AArch64/AArch64PassRegistry.def
M llvm/lib/Target/AArch64/AArch64PrologueEpilogue.cpp
M llvm/lib/Target/AArch64/AArch64RedundantCopyElimination.cpp
M llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp
M llvm/lib/Target/AArch64/AArch64SMEAttributes.cpp
M llvm/lib/Target/AArch64/AArch64SMEAttributes.h
M llvm/lib/Target/AArch64/AArch64SMEInstrInfo.td
M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
M llvm/lib/Target/AArch64/AArch64StackTagging.cpp
M llvm/lib/Target/AArch64/AArch64SystemOperands.td
M llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
M llvm/lib/Target/AArch64/AArch64TargetMachine.h
M llvm/lib/Target/AArch64/CMakeLists.txt
M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
M llvm/lib/Target/AArch64/GISel/AArch64PostLegalizerCombiner.cpp
M llvm/lib/Target/AArch64/GISel/AArch64PreLegalizerCombiner.cpp
M llvm/lib/Target/AArch64/GISel/AArch64RegisterBankInfo.cpp
M llvm/lib/Target/AArch64/MachineSMEABIPass.cpp
R llvm/lib/Target/AArch64/SMEABIPass.cpp
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
M llvm/lib/Target/AMDGPU/AMDGPUAttributes.def
M llvm/lib/Target/AMDGPU/AMDGPUAttributor.cpp
M llvm/lib/Target/AMDGPU/AMDGPUCodeGenPrepare.cpp
M llvm/lib/Target/AMDGPU/AMDGPUIGroupLP.cpp
M llvm/lib/Target/AMDGPU/AMDGPUIGroupLP.h
M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/AMDGPUInstructions.td
M llvm/lib/Target/AMDGPU/AMDGPULowerIntrinsics.cpp
M llvm/lib/Target/AMDGPU/AMDGPULowerModuleLDSPass.cpp
M llvm/lib/Target/AMDGPU/AMDGPULowerVGPREncoding.cpp
M llvm/lib/Target/AMDGPU/AMDGPUMCInstLower.cpp
M llvm/lib/Target/AMDGPU/AMDGPUMCResourceInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPUMCResourceInfo.h
M llvm/lib/Target/AMDGPU/AMDGPURegBankCombiner.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeHelper.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeHelper.h
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.h
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPURewriteAGPRCopyMFMA.cpp
M llvm/lib/Target/AMDGPU/AMDGPUSearchableTables.td
M llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp
M llvm/lib/Target/AMDGPU/AMDGPUSubtarget.h
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.h
M llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
A llvm/lib/Target/AMDGPU/AMDGPUWaitcntUtils.cpp
A llvm/lib/Target/AMDGPU/AMDGPUWaitcntUtils.h
M llvm/lib/Target/AMDGPU/CMakeLists.txt
M llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp
M llvm/lib/Target/AMDGPU/GCNRegPressure.cpp
M llvm/lib/Target/AMDGPU/GCNRegPressure.h
M llvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp
M llvm/lib/Target/AMDGPU/GCNSchedStrategy.h
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
M llvm/lib/Target/AMDGPU/GCNVOPDUtils.cpp
M llvm/lib/Target/AMDGPU/R600TargetMachine.cpp
M llvm/lib/Target/AMDGPU/R600TargetMachine.h
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.h
M llvm/lib/Target/AMDGPU/SILowerSGPRSpills.cpp
M llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp
M llvm/lib/Target/AMDGPU/SIMemoryLegalizer.cpp
M llvm/lib/Target/AMDGPU/SISchedule.td
M llvm/lib/Target/AMDGPU/SOPInstructions.td
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
M llvm/lib/Target/AMDGPU/VOP1Instructions.td
M llvm/lib/Target/AMDGPU/VOP3Instructions.td
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
M llvm/lib/Target/ARM/ARMFeatures.h
M llvm/lib/Target/ARM/ARMISelLowering.cpp
M llvm/lib/Target/ARM/ARMInstrInfo.td
M llvm/lib/Target/ARM/ARMInstrThumb.td
M llvm/lib/Target/ARM/ARMInstrThumb2.td
M llvm/lib/Target/ARM/ARMLatencyMutations.cpp
M llvm/lib/Target/ARM/ARMScheduleM55.td
M llvm/lib/Target/ARM/ARMScheduleM7.td
M llvm/lib/Target/ARM/ARMScheduleM85.td
M llvm/lib/Target/ARM/ARMScheduleR52.td
M llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
M llvm/lib/Target/ARM/Thumb2SizeReduction.cpp
M llvm/lib/Target/BPF/BPFCallingConv.td
M llvm/lib/Target/BPF/BPFISelLowering.cpp
M llvm/lib/Target/BPF/BPFISelLowering.h
M llvm/lib/Target/CSKY/MCTargetDesc/CSKYAsmBackend.cpp
M llvm/lib/Target/DirectX/DXILOpLowering.cpp
M llvm/lib/Target/Hexagon/CMakeLists.txt
M llvm/lib/Target/Hexagon/HexagonMachineFunctionInfo.cpp
M llvm/lib/Target/Hexagon/HexagonMachineFunctionInfo.h
M llvm/lib/Target/Hexagon/HexagonOptAddrMode.cpp
M llvm/lib/Target/Hexagon/HexagonRegisterInfo.cpp
M llvm/lib/Target/Hexagon/HexagonTargetMachine.cpp
M llvm/lib/Target/Hexagon/HexagonTargetMachine.h
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/lib/Target/LoongArch/LoongArchMachineFunctionInfo.h
M llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp
M llvm/lib/Target/NVPTX/NVPTXAsmPrinter.h
M llvm/lib/Target/NVPTX/NVPTXDwarfDebug.cpp
M llvm/lib/Target/NVPTX/NVPTXDwarfDebug.h
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
M llvm/lib/Target/NVPTX/NVPTXTargetTransformInfo.cpp
M llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
M llvm/lib/Target/PowerPC/PPCISelLowering.cpp
M llvm/lib/Target/PowerPC/PPCISelLowering.h
M llvm/lib/Target/RISCV/GISel/RISCVCallLowering.cpp
M llvm/lib/Target/RISCV/RISCVCallingConv.cpp
M llvm/lib/Target/RISCV/RISCVCallingConv.h
M llvm/lib/Target/RISCV/RISCVCodeGenPrepare.cpp
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
M llvm/lib/Target/RISCV/RISCVGISel.td
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.h
M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfo.h
M llvm/lib/Target/RISCV/RISCVInstrInfoC.td
M llvm/lib/Target/RISCV/RISCVInstrInfoP.td
M llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td
M llvm/lib/Target/RISCV/RISCVInstrInfoXSfmm.td
M llvm/lib/Target/RISCV/RISCVInstrInfoXqci.td
M llvm/lib/Target/RISCV/RISCVInstrInfoZa.td
M llvm/lib/Target/RISCV/RISCVInstrInfoZicbo.td
M llvm/lib/Target/RISCV/RISCVInstrInfoZvdot4a8i.td
M llvm/lib/Target/RISCV/RISCVInstrInfoZvfbf.td
M llvm/lib/Target/RISCV/RISCVInstrInfoZvk.td
M llvm/lib/Target/RISCV/RISCVMachineFunctionInfo.h
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
M llvm/lib/Target/SPIRV/MCTargetDesc/SPIRVInstPrinter.cpp
M llvm/lib/Target/SPIRV/SPIRVBuiltins.cpp
M llvm/lib/Target/SPIRV/SPIRVCallLowering.cpp
M llvm/lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp
M llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp
M llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.h
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
M llvm/lib/Target/SPIRV/SPIRVModuleAnalysis.cpp
M llvm/lib/Target/SPIRV/SPIRVSubtarget.cpp
M llvm/lib/Target/SPIRV/SPIRVSymbolicOperands.td
M llvm/lib/Target/SPIRV/SPIRVTypeInst.cpp
M llvm/lib/Target/SPIRV/SPIRVTypeInst.h
M llvm/lib/Target/SPIRV/SPIRVUtils.h
M llvm/lib/Target/Sparc/Sparc.td
M llvm/lib/Target/Sparc/SparcInstr64Bit.td
M llvm/lib/Target/SystemZ/MCTargetDesc/SystemZHLASMAsmStreamer.cpp
M llvm/lib/Target/SystemZ/SystemZAsmPrinter.cpp
M llvm/lib/Target/SystemZ/SystemZAsmPrinter.h
M llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
M llvm/lib/Target/SystemZ/SystemZInstrInfo.h
M llvm/lib/Target/SystemZ/SystemZTargetTransformInfo.cpp
M llvm/lib/Target/WebAssembly/GISel/WebAssemblyCallLowering.cpp
M llvm/lib/Target/WebAssembly/GISel/WebAssemblyInstructionSelector.cpp
M llvm/lib/Target/WebAssembly/GISel/WebAssemblyLegalizerInfo.cpp
M llvm/lib/Target/WebAssembly/GISel/WebAssemblyLegalizerInfo.h
M llvm/lib/Target/WebAssembly/GISel/WebAssemblyRegisterBankInfo.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyCFGStackify.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyExceptionInfo.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
M llvm/lib/Target/WebAssembly/WebAssemblyRegisterInfo.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyRegisterInfo.h
M llvm/lib/Target/X86/X86AsmPrinter.cpp
M llvm/lib/Target/X86/X86AsmPrinter.h
M llvm/lib/Target/X86/X86CodeGenPassBuilder.cpp
M llvm/lib/Target/X86/X86FastISel.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86ISelLoweringCall.cpp
M llvm/lib/Target/X86/X86InstrAVX512.td
M llvm/lib/Target/X86/X86InstrInfo.cpp
M llvm/lib/Target/X86/X86InstrInfo.h
M llvm/lib/Target/X86/X86MCInstLower.cpp
M llvm/lib/Target/X86/X86TargetMachine.h
M llvm/lib/TargetParser/TargetDataLayout.cpp
M llvm/lib/Transforms/IPO/AlwaysInliner.cpp
M llvm/lib/Transforms/IPO/Inliner.cpp
M llvm/lib/Transforms/IPO/ModuleInliner.cpp
M llvm/lib/Transforms/IPO/PartialInlining.cpp
M llvm/lib/Transforms/IPO/SampleProfileMatcher.cpp
M llvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
M llvm/lib/Transforms/InstCombine/InstCombineInternal.h
M llvm/lib/Transforms/InstCombine/InstCombineLoadStoreAlloca.cpp
M llvm/lib/Transforms/InstCombine/InstCombineShifts.cpp
M llvm/lib/Transforms/Instrumentation/NumericalStabilitySanitizer.cpp
M llvm/lib/Transforms/ObjCARC/ObjCARCOpts.cpp
M llvm/lib/Transforms/Scalar/GVN.cpp
M llvm/lib/Transforms/Scalar/LoopFuse.cpp
M llvm/lib/Transforms/Scalar/LoopIdiomRecognize.cpp
M llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp
M llvm/lib/Transforms/Scalar/LoopUnrollPass.cpp
M llvm/lib/Transforms/Scalar/SeparateConstOffsetFromGEP.cpp
M llvm/lib/Transforms/Utils/CallGraphUpdater.cpp
M llvm/lib/Transforms/Utils/CloneFunction.cpp
M llvm/lib/Transforms/Utils/CodeMoverUtils.cpp
M llvm/lib/Transforms/Utils/InlineFunction.cpp
M llvm/lib/Transforms/Utils/Local.cpp
M llvm/lib/Transforms/Utils/LoopUnroll.cpp
M llvm/lib/Transforms/Utils/LoopUnrollAndJam.cpp
M llvm/lib/Transforms/Utils/ScalarEvolutionExpander.cpp
M llvm/lib/Transforms/Utils/SymbolRewriter.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.h
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Passes/LoadStoreVec.cpp
M llvm/lib/Transforms/Vectorize/VPlan.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanAnalysis.cpp
M llvm/lib/Transforms/Vectorize/VPlanCFG.h
M llvm/lib/Transforms/Vectorize/VPlanConstruction.cpp
M llvm/lib/Transforms/Vectorize/VPlanPatternMatch.h
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanUnroll.cpp
M llvm/lib/Transforms/Vectorize/VPlanUtils.cpp
M llvm/lib/Transforms/Vectorize/VPlanUtils.h
M llvm/lib/WindowsManifest/CMakeLists.txt
M llvm/runtimes/CMakeLists.txt
A llvm/test/Analysis/BasicAA/gep-decompose-bitcast-vector-type-mismatch.ll
M llvm/test/Analysis/CostModel/AArch64/ldexp.ll
A llvm/test/Analysis/CostModel/AArch64/masked-divrem.ll
A llvm/test/Analysis/CostModel/RISCV/masked-divrem.ll
A llvm/test/Analysis/CostModel/SystemZ/fold-rmw-cost.ll
M llvm/test/Analysis/DependenceAnalysis/Banerjee.ll
M llvm/test/Analysis/DependenceAnalysis/Constraints.ll
M llvm/test/Analysis/DependenceAnalysis/MismatchingNestLevels.ll
M llvm/test/Analysis/DependenceAnalysis/NonCanonicalizedSubscript.ll
M llvm/test/Analysis/DependenceAnalysis/PreliminaryNoValidityCheckFixedSize.ll
M llvm/test/Analysis/DependenceAnalysis/Propagating.ll
M llvm/test/Analysis/DependenceAnalysis/SameSDLoops.ll
A llvm/test/Analysis/DependenceAnalysis/banerjee-overflow.ll
M llvm/test/Analysis/DependenceAnalysis/exact-rdiv-addrec-wrap.ll
M llvm/test/Analysis/DependenceAnalysis/rdiv-minor-algebra.ll
A llvm/test/Analysis/FunctionPropertiesAnalysis/function-properties-analysis.ll
A llvm/test/Analysis/FunctionPropertiesAnalysis/pipeline.ll
R llvm/test/Analysis/FunctionPropertiesAnalysis/properties-stats.ll
M llvm/test/Analysis/InstCount/instcount.ll
A llvm/test/Analysis/InstCount/pipeline.ll
M llvm/test/Analysis/LoopAccessAnalysis/nssw-predicate-implied.ll
M llvm/test/Analysis/LoopAccessAnalysis/nusw-predicates.ll
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/always_uniform.ll
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/intrinsics.ll
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/workitem-intrinsics.ll
M llvm/test/Bitcode/calling-conventions.3.2.ll
M llvm/test/Bitcode/calling-conventions.3.2.ll.bc
M llvm/test/Bitcode/upgrade-aarch64-sve-intrinsics.ll
A llvm/test/CodeGen/AArch64/GlobalISel/arm64-this-return.ll
M llvm/test/CodeGen/AArch64/GlobalISel/combine-2-icmps-of-0-and-or.mir
A llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-constrained-fcmp.ll
A llvm/test/CodeGen/AArch64/GlobalISel/knownbits-stepvector.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir
M llvm/test/CodeGen/AArch64/GlobalISel/postlegalizer-combiner-constant-fold.mir
M llvm/test/CodeGen/AArch64/O0-pipeline.ll
M llvm/test/CodeGen/AArch64/O3-pipeline.ll
M llvm/test/CodeGen/AArch64/aarch64-sme-za-call-lowering.ll
M llvm/test/CodeGen/AArch64/arm64-atomic.ll
M llvm/test/CodeGen/AArch64/arm64-int-neon.ll
M llvm/test/CodeGen/AArch64/arm64-stur.ll
M llvm/test/CodeGen/AArch64/arm64-this-return.ll
M llvm/test/CodeGen/AArch64/arm64-vcvt-fptoi.ll
M llvm/test/CodeGen/AArch64/arm64-vmul.ll
M llvm/test/CodeGen/AArch64/atomicrmw-O0.ll
M llvm/test/CodeGen/AArch64/bf16-instructions.ll
M llvm/test/CodeGen/AArch64/bf16-v4-instructions.ll
M llvm/test/CodeGen/AArch64/bf16-v8-instructions.ll
M llvm/test/CodeGen/AArch64/bitcast.ll
A llvm/test/CodeGen/AArch64/branch-on-bool.ll
M llvm/test/CodeGen/AArch64/ctpop.ll
M llvm/test/CodeGen/AArch64/faddp-half.ll
M llvm/test/CodeGen/AArch64/fcvt_combine.ll
M llvm/test/CodeGen/AArch64/fmla.ll
M llvm/test/CodeGen/AArch64/itofp-bf16.ll
M llvm/test/CodeGen/AArch64/known-never-nan.ll
M llvm/test/CodeGen/AArch64/ldexp.ll
M llvm/test/CodeGen/AArch64/logical-op-with-not.ll
M llvm/test/CodeGen/AArch64/machine-copy-remove.mir
M llvm/test/CodeGen/AArch64/machine-zero-copy-remove.mir
A llvm/test/CodeGen/AArch64/masked-sdiv-fixed-length.ll
A llvm/test/CodeGen/AArch64/masked-sdiv-scalable.ll
A llvm/test/CodeGen/AArch64/masked-srem-fixed-length.ll
A llvm/test/CodeGen/AArch64/masked-srem-scalable.ll
A llvm/test/CodeGen/AArch64/masked-udiv-fixed-length.ll
A llvm/test/CodeGen/AArch64/masked-udiv-scalable.ll
A llvm/test/CodeGen/AArch64/masked-urem-fixed-length.ll
A llvm/test/CodeGen/AArch64/masked-urem-scalable.ll
M llvm/test/CodeGen/AArch64/merge-store.ll
A llvm/test/CodeGen/AArch64/neon-mul-shl.ll
M llvm/test/CodeGen/AArch64/preferred-function-alignment.ll
M llvm/test/CodeGen/AArch64/ptrauth-reloc.ll
A llvm/test/CodeGen/AArch64/sign-return-address-pauthlr-slh.ll
M llvm/test/CodeGen/AArch64/sme-abi-save-call-remarks.ll
M llvm/test/CodeGen/AArch64/sme-agnostic-za.ll
M llvm/test/CodeGen/AArch64/sme-disable-gisel-fisel.ll
M llvm/test/CodeGen/AArch64/sme-dynamic-tls.ll
M llvm/test/CodeGen/AArch64/sme-lazy-save-call.ll
M llvm/test/CodeGen/AArch64/sme-lazy-save-windows.ll
M llvm/test/CodeGen/AArch64/sme-lazy-sve-nzcv-live.mir
M llvm/test/CodeGen/AArch64/sme-new-za-function.ll
R llvm/test/CodeGen/AArch64/sme-new-zt0-function.ll
M llvm/test/CodeGen/AArch64/sme-peephole-opts.ll
M llvm/test/CodeGen/AArch64/sme-shared-za-interface.ll
M llvm/test/CodeGen/AArch64/sme-za-control-flow.ll
M llvm/test/CodeGen/AArch64/sme-za-exceptions.ll
M llvm/test/CodeGen/AArch64/sme-za-function-with-many-blocks.ll
M llvm/test/CodeGen/AArch64/sme-za-lazy-save-buffer.ll
M llvm/test/CodeGen/AArch64/sme-zt0-state.ll
M llvm/test/CodeGen/AArch64/st1-lane.ll
M llvm/test/CodeGen/AArch64/sve-coalesce-ptrue-intrinsics.ll
M llvm/test/CodeGen/AArch64/sve-fixed-length-extract-subvector.ll
M llvm/test/CodeGen/AArch64/sve-fixed-length-fp-compares.ll
M llvm/test/CodeGen/AArch64/sve-fixed-length-fp-to-int.ll
M llvm/test/CodeGen/AArch64/sve-fixed-length-int-div.ll
M llvm/test/CodeGen/AArch64/sve-fixed-length-int-rem.ll
M llvm/test/CodeGen/AArch64/sve-hadd.ll
M llvm/test/CodeGen/AArch64/sve-int-log.ll
M llvm/test/CodeGen/AArch64/sve-stack-frame-layout.ll
M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-fp-compares.ll
M llvm/test/CodeGen/AArch64/sve2-bsl.ll
M llvm/test/CodeGen/AArch64/vecreduce-fadd.ll
M llvm/test/CodeGen/AArch64/vecreduce-fmul.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/andn2.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomicrmw_minmax.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomicrmw_udec_wrap.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomicrmw_uinc_wrap.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/call-outgoing-stack-args.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/clamp-minmax-const-combine.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-short-clamp.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/cvt_f32_ubyte.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-divergent-i1-phis-no-lane-mask-merging.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/extractelement.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fdiv.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fdiv.f32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fdiv.f64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/flat-scratch.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fmed3-min-max-const-combine.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/frem.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.i16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.i8.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.ll
A llvm/test/CodeGen/AMDGPU/GlobalISel/known-fpclass-phi.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fmaxnum.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fminnum.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.div.scale.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.fdot2.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.interp.p1.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.rsq.clamp.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.s.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.set.inactive.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.update.dpp.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.wmma_32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.wmma_64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/lshr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/mubuf-global.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/mul-known-bits.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/mul.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/orn2.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankcombiner-clamp-minmax-const.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankcombiner-fmed3-minmax-const.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.ds.gws.init.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.ds.gws.sema.v.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.interp.mov.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.interp.p1.f16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.interp.p1.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.interp.p2.f16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.interp.p2.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.s.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.update.dpp.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-extract-vector-elt.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/sdiv.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/sdivrem.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/srem.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/udivrem.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w32-swmmac-index_key.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w64-imm.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w64-swmmac-index_key.ll
M llvm/test/CodeGen/AMDGPU/abi-attribute-hints-undefined-behavior.ll
M llvm/test/CodeGen/AMDGPU/addrspacecast-constantexpr.ll
M llvm/test/CodeGen/AMDGPU/agpr-copy-no-free-registers.ll
M llvm/test/CodeGen/AMDGPU/agpr-register-count.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-attributor-flat-scratch-init-asan.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-attributor-min-agpr-alloc.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-attributor-nocallback-intrinsics.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-attributor-trap-leaf.ll
A llvm/test/CodeGen/AMDGPU/amdgpu-simplify-demanded-bits-for-target-node.ll
R llvm/test/CodeGen/AMDGPU/amdgpu-simplify-demanded-bits-readfirstlane.ll
A llvm/test/CodeGen/AMDGPU/amdgpu-uniform-intrinsic-wwm-single-lane.ll
M llvm/test/CodeGen/AMDGPU/amdpal-metadata-agpr-register-count.ll
M llvm/test/CodeGen/AMDGPU/and_or.ll
M llvm/test/CodeGen/AMDGPU/annotate-kernel-features-hsa-call.ll
M llvm/test/CodeGen/AMDGPU/annotate-kernel-features-hsa.ll
M llvm/test/CodeGen/AMDGPU/annotate-kernel-features.ll
R llvm/test/CodeGen/AMDGPU/asyncmark-err.ll
A llvm/test/CodeGen/AMDGPU/asyncmark-gfx12plus.ll
M llvm/test/CodeGen/AMDGPU/asyncmark-max-pregfx12.ll
M llvm/test/CodeGen/AMDGPU/asyncmark-pregfx12.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_global_pointer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_local_pointer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_single_lane.ll
M llvm/test/CodeGen/AMDGPU/attr-amdgpu-flat-work-group-size-vgpr-limit.ll
M llvm/test/CodeGen/AMDGPU/attributor-flatscratchinit-undefined-behavior.ll
M llvm/test/CodeGen/AMDGPU/attributor-flatscratchinit.ll
A llvm/test/CodeGen/AMDGPU/attributor-wwm.ll
M llvm/test/CodeGen/AMDGPU/av_movimm_pseudo_expansion.mir
M llvm/test/CodeGen/AMDGPU/bf16.ll
M llvm/test/CodeGen/AMDGPU/bypass-div.ll
M llvm/test/CodeGen/AMDGPU/call-alias-register-usage-agpr.ll
M llvm/test/CodeGen/AMDGPU/call-alias-register-usage0.ll
M llvm/test/CodeGen/AMDGPU/call-alias-register-usage1.ll
M llvm/test/CodeGen/AMDGPU/call-alias-register-usage2.ll
M llvm/test/CodeGen/AMDGPU/call-alias-register-usage3.ll
M llvm/test/CodeGen/AMDGPU/call-graph-register-usage.ll
M llvm/test/CodeGen/AMDGPU/calling-conventions.ll
M llvm/test/CodeGen/AMDGPU/carryout-selection.ll
M llvm/test/CodeGen/AMDGPU/chain-hi-to-lo.ll
M llvm/test/CodeGen/AMDGPU/combine_andor_with_cmps.ll
M llvm/test/CodeGen/AMDGPU/combine_andor_with_cmps_nnan.ll
M llvm/test/CodeGen/AMDGPU/dag-divergence-atomic.ll
M llvm/test/CodeGen/AMDGPU/dagcombine-select.ll
M llvm/test/CodeGen/AMDGPU/direct-indirect-call.ll
M llvm/test/CodeGen/AMDGPU/div-rem-by-constant-64.ll
M llvm/test/CodeGen/AMDGPU/div_i128.ll
M llvm/test/CodeGen/AMDGPU/diverge-interp-mov-lower.ll
M llvm/test/CodeGen/AMDGPU/ds-sub-offset.ll
M llvm/test/CodeGen/AMDGPU/duplicate-attribute-indirect.ll
M llvm/test/CodeGen/AMDGPU/dvgpr_sym.ll
M llvm/test/CodeGen/AMDGPU/dvgpr_sym_fail_too_many_block_size_16.ll
M llvm/test/CodeGen/AMDGPU/dvgpr_sym_fail_too_many_block_size_16_anon.ll
M llvm/test/CodeGen/AMDGPU/expand-scalar-carry-out-select-user.ll
M llvm/test/CodeGen/AMDGPU/extract_vector_elt-i8.ll
M llvm/test/CodeGen/AMDGPU/fcanonicalize.ll
M llvm/test/CodeGen/AMDGPU/fcopysign.f16.ll
M llvm/test/CodeGen/AMDGPU/fdiv.f16.ll
M llvm/test/CodeGen/AMDGPU/fdiv.ll
M llvm/test/CodeGen/AMDGPU/fdiv_flags.f32.ll
M llvm/test/CodeGen/AMDGPU/fix-sgpr-copies-wwm.ll
M llvm/test/CodeGen/AMDGPU/fix-wwm-vgpr-copy.ll
M llvm/test/CodeGen/AMDGPU/flat-saddr-atomics.ll
M llvm/test/CodeGen/AMDGPU/fmed3.bf16.ll
M llvm/test/CodeGen/AMDGPU/fmed3.ll
M llvm/test/CodeGen/AMDGPU/fold-int-pow2-with-fmul-or-fdiv.ll
M llvm/test/CodeGen/AMDGPU/fp-atomics-gfx1200.ll
M llvm/test/CodeGen/AMDGPU/fp64-atomics-gfx90a.ll
M llvm/test/CodeGen/AMDGPU/fptoi.i128.ll
M llvm/test/CodeGen/AMDGPU/fptosi-sat-scalar.ll
M llvm/test/CodeGen/AMDGPU/fptosi-sat-vector.ll
M llvm/test/CodeGen/AMDGPU/fptoui-sat-scalar.ll
M llvm/test/CodeGen/AMDGPU/fptoui-sat-vector.ll
M llvm/test/CodeGen/AMDGPU/fptrunc.ll
M llvm/test/CodeGen/AMDGPU/fract-match.ll
M llvm/test/CodeGen/AMDGPU/freeze-binary.ll
M llvm/test/CodeGen/AMDGPU/freeze.ll
M llvm/test/CodeGen/AMDGPU/frem.ll
M llvm/test/CodeGen/AMDGPU/fsqrt.f64.ll
M llvm/test/CodeGen/AMDGPU/fsub-as-fneg-src-modifier.ll
M llvm/test/CodeGen/AMDGPU/function-resource-usage.ll
M llvm/test/CodeGen/AMDGPU/gfx-callable-argument-types.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fmax.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fmin.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fsub.ll
M llvm/test/CodeGen/AMDGPU/global-saddr-atomics.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fadd.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fmax.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fmin.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fsub.ll
M llvm/test/CodeGen/AMDGPU/hazard-setreg-vgpr-msb-gfx1250.mir
M llvm/test/CodeGen/AMDGPU/implicitarg-offset-attributes.ll
M llvm/test/CodeGen/AMDGPU/indirect-call-set-from-other-function.ll
M llvm/test/CodeGen/AMDGPU/inflate-av-remat-imm.mir
A llvm/test/CodeGen/AMDGPU/inline-asm-vgpr-range-unsupported-width.ll
M llvm/test/CodeGen/AMDGPU/integer-mad-patterns.ll
M llvm/test/CodeGen/AMDGPU/issue120256-annotate-constexpr-addrspacecast.ll
M llvm/test/CodeGen/AMDGPU/kernel-args.ll
M llvm/test/CodeGen/AMDGPU/llc-pipeline.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.atomic.dec.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.atomic.inc.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.dead.ll
A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.gws.barrier-bundle.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.gws.barrier.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.gws.init.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.gws.sema.br.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.gws.sema.p.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.gws.sema.release.all.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.gws.sema.v.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fdot2.f16.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.iglp.AFLCustomIRMutator.opt.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.atomic.pk.add.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.init.exec.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.init.exec.wave32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.init.whole.wave-w64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.interp.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.interp.inreg.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.interp.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.inverse.ballot.i32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.inverse.ballot.i64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.quadmask.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.readlane.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.umax.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.monitor.sleep.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.setprio.inc.wg.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.set.inactive.chain.arg.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.set.inactive.ll
M llvm/test/CodeGen/AMDGPU/llvm.cos.bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.exp.f64.ll
M llvm/test/CodeGen/AMDGPU/llvm.exp10.f64.ll
M llvm/test/CodeGen/AMDGPU/llvm.exp2.f64.ll
M llvm/test/CodeGen/AMDGPU/llvm.frexp.ll
M llvm/test/CodeGen/AMDGPU/llvm.maximum.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.maximum.f32.ll
M llvm/test/CodeGen/AMDGPU/llvm.minimum.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.minimum.f32.ll
M llvm/test/CodeGen/AMDGPU/llvm.mulo.ll
M llvm/test/CodeGen/AMDGPU/llvm.set.rounding.ll
M llvm/test/CodeGen/AMDGPU/llvm.sin.bf16.ll
M llvm/test/CodeGen/AMDGPU/load-constant-always-uniform.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i1.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i16.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i64.ll
M llvm/test/CodeGen/AMDGPU/load-global-i16.ll
M llvm/test/CodeGen/AMDGPU/load-global-i8.ll
M llvm/test/CodeGen/AMDGPU/load-local-i16.ll
M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fmax.ll
M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fmin.ll
M llvm/test/CodeGen/AMDGPU/lrint.ll
M llvm/test/CodeGen/AMDGPU/lround.ll
M llvm/test/CodeGen/AMDGPU/lshl64-to-32.ll
M llvm/test/CodeGen/AMDGPU/machine-sink-temporal-divergence-swdev407790.ll
M llvm/test/CodeGen/AMDGPU/mad-mix-hi-bf16.ll
M llvm/test/CodeGen/AMDGPU/mad-mix-lo-bf16.ll
M llvm/test/CodeGen/AMDGPU/mad_64_32.ll
M llvm/test/CodeGen/AMDGPU/mcexpr-knownbits-assign-crash-gh-issue-110930.ll
A llvm/test/CodeGen/AMDGPU/memory-legalizer-single-wave-workgroup-memops.ll
M llvm/test/CodeGen/AMDGPU/memset-pattern.ll
M llvm/test/CodeGen/AMDGPU/min3.ll
A llvm/test/CodeGen/AMDGPU/minmax3-tree-reduction.ll
M llvm/test/CodeGen/AMDGPU/misaligned-vgpr-regsequence.mir
M llvm/test/CodeGen/AMDGPU/move-to-valu-lshl_add.ll
M llvm/test/CodeGen/AMDGPU/mul.ll
M llvm/test/CodeGen/AMDGPU/multi-call-resource-usage-mcexpr.ll
M llvm/test/CodeGen/AMDGPU/naked-fn-with-frame-pointer.ll
M llvm/test/CodeGen/AMDGPU/narrow_math_for_and.ll
M llvm/test/CodeGen/AMDGPU/offset-split-global.ll
M llvm/test/CodeGen/AMDGPU/or3.ll
M llvm/test/CodeGen/AMDGPU/packed-fp32.ll
M llvm/test/CodeGen/AMDGPU/preload-kernargs.ll
M llvm/test/CodeGen/AMDGPU/promote-constOffset-to-imm.ll
M llvm/test/CodeGen/AMDGPU/propagate-flat-work-group-size.ll
M llvm/test/CodeGen/AMDGPU/propagate-waves-per-eu.ll
M llvm/test/CodeGen/AMDGPU/reassoc-mul-add-1-to-mad.ll
M llvm/test/CodeGen/AMDGPU/recursion.ll
M llvm/test/CodeGen/AMDGPU/recursive-resource-usage-mcexpr.ll
M llvm/test/CodeGen/AMDGPU/recursive_global_initializer.ll
M llvm/test/CodeGen/AMDGPU/rem_i128.ll
M llvm/test/CodeGen/AMDGPU/remove-no-kernel-id-attribute.ll
M llvm/test/CodeGen/AMDGPU/repeated-divisor.ll
M llvm/test/CodeGen/AMDGPU/resource-optimization-remarks.ll
M llvm/test/CodeGen/AMDGPU/resource-usage-dead-function.ll
M llvm/test/CodeGen/AMDGPU/roundeven.ll
M llvm/test/CodeGen/AMDGPU/rsq.f32-safe.ll
M llvm/test/CodeGen/AMDGPU/rsq.f64.ll
M llvm/test/CodeGen/AMDGPU/s-barrier-lowering.ll
M llvm/test/CodeGen/AMDGPU/s-barrier.ll
A llvm/test/CodeGen/AMDGPU/s-buffer-load-mmo-offsets.ll
A llvm/test/CodeGen/AMDGPU/schedmodel-dummywrite.mir
M llvm/test/CodeGen/AMDGPU/sdiv64.ll
A llvm/test/CodeGen/AMDGPU/setcc-f64-hi32mask.ll
M llvm/test/CodeGen/AMDGPU/sgpr-regalloc-flags.ll
M llvm/test/CodeGen/AMDGPU/shift-i128.ll
A llvm/test/CodeGen/AMDGPU/si-lower-sgpr-spills-cycle-header.ll
A llvm/test/CodeGen/AMDGPU/si-lower-sgpr-spills-cycle-header.mir
A llvm/test/CodeGen/AMDGPU/si-lower-sgpr-spills-initial-insert-in-body.mir
A llvm/test/CodeGen/AMDGPU/si-lower-sgpr-spills-initial-insert-in-latch.mir
A llvm/test/CodeGen/AMDGPU/si-lower-sgpr-spills-multi-entry-cycle.mir
M llvm/test/CodeGen/AMDGPU/siloadstoreopt-misaligned-regsequence.ll
M llvm/test/CodeGen/AMDGPU/simple-indirect-call-2.ll
M llvm/test/CodeGen/AMDGPU/simple-indirect-call.ll
M llvm/test/CodeGen/AMDGPU/spill-sgpr-to-virtual-vgpr.mir
M llvm/test/CodeGen/AMDGPU/spill-vgpr-to-agpr-update-regscavenger.ll
M llvm/test/CodeGen/AMDGPU/srem.ll
M llvm/test/CodeGen/AMDGPU/srem64.ll
M llvm/test/CodeGen/AMDGPU/swdev380865.ll
M llvm/test/CodeGen/AMDGPU/tuple-allocation-failure.ll
M llvm/test/CodeGen/AMDGPU/udiv.ll
M llvm/test/CodeGen/AMDGPU/udiv64.ll
M llvm/test/CodeGen/AMDGPU/uniform-vgpr-to-sgpr-return.ll
M llvm/test/CodeGen/AMDGPU/uniform-work-group-attribute-missing.ll
M llvm/test/CodeGen/AMDGPU/uniform-work-group-multistep.ll
M llvm/test/CodeGen/AMDGPU/uniform-work-group-nested-function-calls.ll
M llvm/test/CodeGen/AMDGPU/uniform-work-group-prevent-attribute-propagation.ll
M llvm/test/CodeGen/AMDGPU/uniform-work-group-propagate-attribute.ll
M llvm/test/CodeGen/AMDGPU/uniform-work-group-recursion-test.ll
M llvm/test/CodeGen/AMDGPU/uniform-work-group-test.ll
M llvm/test/CodeGen/AMDGPU/unnamed-function-resource-info.ll
M llvm/test/CodeGen/AMDGPU/urem64.ll
M llvm/test/CodeGen/AMDGPU/v_mov_b64_expand_and_shrink.mir
M llvm/test/CodeGen/AMDGPU/v_mov_b64_expansion.mir
M llvm/test/CodeGen/AMDGPU/vector-reduce-fmaximum.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-fminimum.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-mul.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-smax.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-smin.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-umax.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-umin.ll
M llvm/test/CodeGen/AMDGPU/vgpr-mark-last-scratch-load.ll
M llvm/test/CodeGen/AMDGPU/vgpr-setreg-mode-swar.mir
M llvm/test/CodeGen/AMDGPU/wave32.ll
M llvm/test/CodeGen/AMDGPU/widen-smrd-loads.ll
M llvm/test/CodeGen/AMDGPU/wwm-reserved-spill.ll
M llvm/test/CodeGen/AMDGPU/wwm-reserved.ll
M llvm/test/CodeGen/ARM/cmp-to-cmn.ll
M llvm/test/CodeGen/ARM/funnel-shift.ll
M llvm/test/CodeGen/ARM/preferred-function-alignment.ll
M llvm/test/CodeGen/ARM/sadd_sat.ll
M llvm/test/CodeGen/ARM/sadd_sat_plus.ll
M llvm/test/CodeGen/ARM/ssub_sat.ll
M llvm/test/CodeGen/ARM/ssub_sat_plus.ll
M llvm/test/CodeGen/BPF/atomic-oversize.ll
A llvm/test/CodeGen/BPF/i128_return.ll
A llvm/test/CodeGen/BPF/sret.ll
M llvm/test/CodeGen/BPF/struct_ret1.ll
M llvm/test/CodeGen/BPF/struct_ret2.ll
A llvm/test/CodeGen/DirectX/is_nonuniform_within_loop.ll
A llvm/test/CodeGen/DirectX/is_nonuniform_within_loop_nuri.ll
M llvm/test/CodeGen/Generic/2010-11-04-BigByval.ll
M llvm/test/CodeGen/Hexagon/aligna-prologue-expansion.mir
A llvm/test/CodeGen/Hexagon/opt-addr-mode-large-unodelist.ll
R llvm/test/CodeGen/LoongArch/issue187832.ll
M llvm/test/CodeGen/LoongArch/linker-relaxation.ll
R llvm/test/CodeGen/LoongArch/musttail.ll
M llvm/test/CodeGen/LoongArch/tail-calls.ll
M llvm/test/CodeGen/Mips/funnel-shift.ll
A llvm/test/CodeGen/NVPTX/dead-shfl.ll
A llvm/test/CodeGen/NVPTX/inline-asm-line-info-inlined-at.ll
A llvm/test/CodeGen/NVPTX/inline-asm-line-info-per-instruction.ll
A llvm/test/CodeGen/NVPTX/inline-asm-line-number-before.ll
M llvm/test/CodeGen/NVPTX/math-intrins-sm80-ptx70-instcombine.ll
A llvm/test/CodeGen/NVPTX/sub-byte-constant-vector-convert.ll
A llvm/test/CodeGen/NVPTX/sub-byte-constant-vectors-i4-i2.ll
A llvm/test/CodeGen/PowerPC/bitcast-truncate-vec-i1.ll
M llvm/test/CodeGen/PowerPC/code-align.ll
M llvm/test/CodeGen/PowerPC/funnel-shift.ll
A llvm/test/CodeGen/PowerPC/masked-sdiv.ll
A llvm/test/CodeGen/PowerPC/masked-srem.ll
A llvm/test/CodeGen/PowerPC/masked-udiv.ll
A llvm/test/CodeGen/PowerPC/masked-urem.ll
M llvm/test/CodeGen/PowerPC/ppc64-calls.ll
A llvm/test/CodeGen/RISCV/GlobalISel/fastcc-float.ll
A llvm/test/CodeGen/RISCV/GlobalISel/ghccc-rv32.ll
A llvm/test/CodeGen/RISCV/GlobalISel/ghccc-rv64.ll
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer-info-validation.mir
A llvm/test/CodeGen/RISCV/bitint-fp-conv-200.ll
M llvm/test/CodeGen/RISCV/combine-is_fpclass.ll
M llvm/test/CodeGen/RISCV/features-info.ll
M llvm/test/CodeGen/RISCV/fp128.ll
M llvm/test/CodeGen/RISCV/fpclamptosat.ll
A llvm/test/CodeGen/RISCV/known-fpclass.ll
M llvm/test/CodeGen/RISCV/musttail-call.ll
R llvm/test/CodeGen/RISCV/musttail.ll
R llvm/test/CodeGen/RISCV/pr187832.ll
A llvm/test/CodeGen/RISCV/pr190868.ll
M llvm/test/CodeGen/RISCV/prefetch.ll
M llvm/test/CodeGen/RISCV/rv32p.ll
M llvm/test/CodeGen/RISCV/rv64p.ll
M llvm/test/CodeGen/RISCV/rvp-ext-rv32.ll
M llvm/test/CodeGen/RISCV/rvp-ext-rv64.ll
M llvm/test/CodeGen/RISCV/rvv/bitreverse-vp.ll
M llvm/test/CodeGen/RISCV/rvv/bswap-vp.ll
A llvm/test/CodeGen/RISCV/rvv/commutable-zvdot4a8i.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-bitreverse-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-bswap-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp-buildvec-bf16.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp2i.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fpext-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fptosi-vp-mask.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fptosi-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fptoui-vp-mask.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fptoui-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-i2fp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-reduction-int-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-reduction-int.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-int.ll
A llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-vslide1down-bf16.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-vslide1down.ll
A llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-vslide1up-bf16.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-vslide1up.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-sitofp-vp-mask.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-sitofp-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-uitofp-vp-mask.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-uitofp-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vcopysign-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfabs-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfdiv-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfma-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfmacc-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfmsac-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfmuladd-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfneg-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfnmacc-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfnmsac-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfrdiv-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vmax-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vmaxu-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vmin-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vminu-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vsadd-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vsaddu-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vssub-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vssubu-vp.ll
A llvm/test/CodeGen/RISCV/rvv/masked-sdiv.ll
A llvm/test/CodeGen/RISCV/rvv/masked-srem.ll
A llvm/test/CodeGen/RISCV/rvv/masked-udiv.ll
A llvm/test/CodeGen/RISCV/rvv/masked-urem.ll
M llvm/test/CodeGen/RISCV/rvv/pr171231.ll
A llvm/test/CodeGen/RISCV/rvv/pr189037.ll
M llvm/test/CodeGen/RISCV/rvv/sink-splat-operands.ll
M llvm/test/CodeGen/RISCV/rvv/undef-vp-ops.ll
M llvm/test/CodeGen/RISCV/rvv/vcopysign-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfabs-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfdiv-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfma-vp-combine.ll
M llvm/test/CodeGen/RISCV/rvv/vfma-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfmuladd-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfneg-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfpext-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfptosi-vp-mask.ll
M llvm/test/CodeGen/RISCV/rvv/vfptosi-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfptoui-vp-mask.ll
M llvm/test/CodeGen/RISCV/rvv/vfptoui-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfrdiv-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfwadd-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfwmacc-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfwmsac-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfwnmacc-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfwnmsac-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vmax-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vmaxu-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vmin-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vminu-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vreductions-fp-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vrol.ll
M llvm/test/CodeGen/RISCV/rvv/vsadd-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vsaddu-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vsitofp-vp-mask.ll
M llvm/test/CodeGen/RISCV/rvv/vsitofp-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vssub-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vssubu-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vuitofp-vp-mask.ll
M llvm/test/CodeGen/RISCV/rvv/vuitofp-vp.ll
A llvm/test/CodeGen/RISCV/samesign.ll
R llvm/test/CodeGen/RISCV/spir-kernel-cc.ll
M llvm/test/CodeGen/RISCV/split-udiv-by-constant.ll
M llvm/test/CodeGen/RISCV/split-urem-by-constant.ll
M llvm/test/CodeGen/RISCV/tail-calls.ll
M llvm/test/CodeGen/RISCV/xcvmem.ll
M llvm/test/CodeGen/RISCV/xqciac.ll
M llvm/test/CodeGen/SPIRV/GlobalISel/InstCombine/prelegalizercombiner-length-to-distance.mir
M llvm/test/CodeGen/SPIRV/GlobalISel/InstCombine/prelegalizercombiner-select-to-faceforward.mir
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_bindless_images/bindless_images_generic.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_memory_access_aliasing/alias-load-store-atomic.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_memory_access_aliasing/alias-masked-load-store.ll
M llvm/test/CodeGen/SPIRV/hlsl-resources/Packed.ll
M llvm/test/CodeGen/SPIRV/hlsl-resources/cbuffer-peeled-array.ll
M llvm/test/CodeGen/SPIRV/linkage/linkage-types.ll
M llvm/test/CodeGen/SPIRV/llc-pipeline.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/bitreverse_small_type.ll
M llvm/test/CodeGen/SPIRV/logical-struct-access.ll
M llvm/test/CodeGen/SPIRV/opencl/device_execution/execute_block.ll
M llvm/test/CodeGen/SPIRV/pointers/load-vector-from-array-of-vectors.ll
M llvm/test/CodeGen/SPIRV/spirv-explicit-layout.ll
M llvm/test/CodeGen/SPIRV/spirv_param_decorations.ll
R llvm/test/CodeGen/SPIRV/transcoding/OpBitReverse-subbyte.ll
R llvm/test/CodeGen/SPIRV/transcoding/OpBitReverse_i2.ll
M llvm/test/CodeGen/SPIRV/transcoding/ldexp.ll
A llvm/test/CodeGen/SPIRV/transcoding/pown.ll
A llvm/test/CodeGen/SPIRV/transcoding/rootn.ll
A llvm/test/CodeGen/SPIRV/transcoding/subbyte-arg-type-mismatch.ll
A llvm/test/CodeGen/SPIRV/vk-pushconstant-layout-natural.ll
M llvm/test/CodeGen/SPIRV/vk-pushconstant-layout.ll
M llvm/test/CodeGen/SystemZ/vec-perm-14.ll
A llvm/test/CodeGen/SystemZ/vec-trunc-to-i16.ll
M llvm/test/CodeGen/SystemZ/zos-hlasm-out.ll
M llvm/test/CodeGen/SystemZ/zos-jumptable.ll
M llvm/test/CodeGen/SystemZ/zos-landingpad.ll
M llvm/test/CodeGen/SystemZ/zos-ppa1-argarea.ll
M llvm/test/CodeGen/SystemZ/zos-ppa1.ll
M llvm/test/CodeGen/SystemZ/zos-prologue-epilog.ll
M llvm/test/CodeGen/SystemZ/zos-section-1.ll
M llvm/test/CodeGen/SystemZ/zos-simple-test.ll
M llvm/test/CodeGen/SystemZ/zos-symbol-2.ll
M llvm/test/CodeGen/Thumb2/mve-vmulh.ll
R llvm/test/CodeGen/WebAssembly/GlobalISel/instruction-select/bitwise.mir
R llvm/test/CodeGen/WebAssembly/GlobalISel/instruction-select/int-arithmetic.mir
A llvm/test/CodeGen/WebAssembly/GlobalISel/instructions/add.ll
A llvm/test/CodeGen/WebAssembly/GlobalISel/instructions/and.ll
A llvm/test/CodeGen/WebAssembly/GlobalISel/instructions/anyext.mir
A llvm/test/CodeGen/WebAssembly/GlobalISel/instructions/ashr.ll
A llvm/test/CodeGen/WebAssembly/GlobalISel/instructions/ashr.mir
A llvm/test/CodeGen/WebAssembly/GlobalISel/instructions/constant.ll
A llvm/test/CodeGen/WebAssembly/GlobalISel/instructions/ctlz.ll
A llvm/test/CodeGen/WebAssembly/GlobalISel/instructions/ctlz.mir
A llvm/test/CodeGen/WebAssembly/GlobalISel/instructions/ctpop.ll
A llvm/test/CodeGen/WebAssembly/GlobalISel/instructions/ctpop.mir
A llvm/test/CodeGen/WebAssembly/GlobalISel/instructions/cttz.ll
A llvm/test/CodeGen/WebAssembly/GlobalISel/instructions/cttz.mir
A llvm/test/CodeGen/WebAssembly/GlobalISel/instructions/fshl.ll
A llvm/test/CodeGen/WebAssembly/GlobalISel/instructions/fshl.mir
A llvm/test/CodeGen/WebAssembly/GlobalISel/instructions/fshr.ll
A llvm/test/CodeGen/WebAssembly/GlobalISel/instructions/fshr.mir
A llvm/test/CodeGen/WebAssembly/GlobalISel/instructions/implicit_def.mir
A llvm/test/CodeGen/WebAssembly/GlobalISel/instructions/lshr.ll
A llvm/test/CodeGen/WebAssembly/GlobalISel/instructions/lshr.mir
A llvm/test/CodeGen/WebAssembly/GlobalISel/instructions/mul.ll
A llvm/test/CodeGen/WebAssembly/GlobalISel/instructions/or.ll
A llvm/test/CodeGen/WebAssembly/GlobalISel/instructions/rotl.mir
A llvm/test/CodeGen/WebAssembly/GlobalISel/instructions/rotr.mir
A llvm/test/CodeGen/WebAssembly/GlobalISel/instructions/sdiv.ll
A llvm/test/CodeGen/WebAssembly/GlobalISel/instructions/sext.ll
A llvm/test/CodeGen/WebAssembly/GlobalISel/instructions/shl.ll
A llvm/test/CodeGen/WebAssembly/GlobalISel/instructions/shl.mir
A llvm/test/CodeGen/WebAssembly/GlobalISel/instructions/srem.ll
A llvm/test/CodeGen/WebAssembly/GlobalISel/instructions/sub.ll
A llvm/test/CodeGen/WebAssembly/GlobalISel/instructions/trunc.ll
A llvm/test/CodeGen/WebAssembly/GlobalISel/instructions/udiv.ll
A llvm/test/CodeGen/WebAssembly/GlobalISel/instructions/urem.ll
A llvm/test/CodeGen/WebAssembly/GlobalISel/instructions/xor.ll
A llvm/test/CodeGen/WebAssembly/GlobalISel/instructions/zext.ll
M llvm/test/CodeGen/WebAssembly/GlobalISel/irtranslator/args-simd.ll
M llvm/test/CodeGen/WebAssembly/GlobalISel/irtranslator/args-swiftcc.ll
M llvm/test/CodeGen/WebAssembly/GlobalISel/irtranslator/args.ll
A llvm/test/CodeGen/WebAssembly/GlobalISel/irtranslator/ret-aggregates.ll
A llvm/test/CodeGen/WebAssembly/GlobalISel/irtranslator/ret-basics.ll
A llvm/test/CodeGen/WebAssembly/GlobalISel/irtranslator/ret-simd.ll
R llvm/test/CodeGen/WebAssembly/GlobalISel/legalizer/add.mir
R llvm/test/CodeGen/WebAssembly/GlobalISel/regbankselect/bitwise.mir
R llvm/test/CodeGen/WebAssembly/GlobalISel/regbankselect/int-arithmetic.mir
M llvm/test/CodeGen/WebAssembly/cfg-stackify-eh-legacy.ll
M llvm/test/CodeGen/WebAssembly/cfg-stackify-eh.ll
M llvm/test/CodeGen/WebAssembly/exception-legacy.ll
M llvm/test/CodeGen/WebAssembly/exception.ll
M llvm/test/CodeGen/WebAssembly/f16-intrinsics.ll
M llvm/test/CodeGen/WebAssembly/function-info.mir
M llvm/test/CodeGen/WebAssembly/simd-bitmask.ll
M llvm/test/CodeGen/WebAssembly/simd-illegal-bitmask.ll
M llvm/test/CodeGen/X86/AMX/amx-across-func.ll
M llvm/test/CodeGen/X86/apx/or.ll
A llvm/test/CodeGen/X86/apx/pr190557.ll
A llvm/test/CodeGen/X86/apx/pr191368.ll
M llvm/test/CodeGen/X86/basic-block-sections-code-prefetch-call-terminates-block.ll
M llvm/test/CodeGen/X86/basic-block-sections-code-prefetch.ll
M llvm/test/CodeGen/X86/combine-pmuldq.ll
M llvm/test/CodeGen/X86/cond-loop.ll
M llvm/test/CodeGen/X86/eh-label.ll
M llvm/test/CodeGen/X86/empty-function.ll
M llvm/test/CodeGen/X86/fminimum-fmaximum.ll
M llvm/test/CodeGen/X86/funnel-shift.ll
M llvm/test/CodeGen/X86/gfni-lzcnt.ll
M llvm/test/CodeGen/X86/gfni-tzcnt.ll
A llvm/test/CodeGen/X86/half-fneg-fabs.ll
M llvm/test/CodeGen/X86/i128-udiv.ll
M llvm/test/CodeGen/X86/kcfi-arity.ll
M llvm/test/CodeGen/X86/kcfi-patchable-function-prefix.ll
M llvm/test/CodeGen/X86/kcfi.ll
A llvm/test/CodeGen/X86/masked-sdiv.ll
A llvm/test/CodeGen/X86/masked-srem.ll
A llvm/test/CodeGen/X86/masked-udiv.ll
A llvm/test/CodeGen/X86/masked-urem.ll
M llvm/test/CodeGen/X86/mul-lohi-no-implicit-copy.ll
M llvm/test/CodeGen/X86/musttail-struct.ll
M llvm/test/CodeGen/X86/nofpclass.ll
M llvm/test/CodeGen/X86/pr78897.ll
M llvm/test/CodeGen/X86/prefalign.ll
M llvm/test/CodeGen/X86/srem-seteq-vec-nonsplat.ll
M llvm/test/CodeGen/X86/statepoint-invoke.ll
M llvm/test/CodeGen/X86/tailcallstack64.ll
M llvm/test/CodeGen/X86/tailccstack64.ll
A llvm/test/CodeGen/X86/two-address-subreg-to-reg-kill.mir
A llvm/test/DebugInfo/AMDGPU/bitcast-store-combine-debugloc.ll
M llvm/test/DebugInfo/KeyInstructions/X86/dwarf-basic.ll
M llvm/test/DebugInfo/LoongArch/relax_dwo_ranges.ll
M llvm/test/DebugInfo/X86/header.ll
M llvm/test/DebugInfo/X86/ranges_always.ll
A llvm/test/DebugInfo/X86/sdag-load-sext-trunc.ll
A llvm/test/DebugInfo/X86/sdag-load-sext.ll
A llvm/test/DebugInfo/X86/sdag-load-zext-multiple-args.ll
M llvm/test/Examples/lit.local.cfg
A llvm/test/ExecutionEngine/JITLink/Hexagon/ELF_hexagon_b22_pcrel.s
A llvm/test/ExecutionEngine/JITLink/Hexagon/ELF_hexagon_combined.s
A llvm/test/ExecutionEngine/JITLink/Hexagon/ELF_hexagon_compound.s
A llvm/test/ExecutionEngine/JITLink/Hexagon/ELF_hexagon_cond_branch.s
A llvm/test/ExecutionEngine/JITLink/Hexagon/ELF_hexagon_const_extender.s
A llvm/test/ExecutionEngine/JITLink/Hexagon/ELF_hexagon_data_relocations.s
A llvm/test/ExecutionEngine/JITLink/Hexagon/ELF_hexagon_duplex.s
A llvm/test/ExecutionEngine/JITLink/Hexagon/ELF_hexagon_hilo16.s
A llvm/test/ExecutionEngine/JITLink/Hexagon/ELF_hexagon_loop.s
A llvm/test/ExecutionEngine/JITLink/Hexagon/ELF_hexagon_mem_relocs.s
A llvm/test/ExecutionEngine/JITLink/Hexagon/ELF_hexagon_minimal.s
A llvm/test/ExecutionEngine/JITLink/Hexagon/ELF_hexagon_noext_branch.s
A llvm/test/ExecutionEngine/JITLink/Hexagon/ELF_hexagon_packet.s
A llvm/test/ExecutionEngine/JITLink/Hexagon/ELF_hexagon_plt.s
A llvm/test/ExecutionEngine/JITLink/Hexagon/lit.local.cfg
M llvm/test/ExecutionEngine/lit.local.cfg
M llvm/test/Instrumentation/MemorySanitizer/AArch64/sme2-intrinsics-add-mini.ll
M llvm/test/Instrumentation/MemorySanitizer/AArch64/sme2-intrinsics-add.ll
M llvm/test/Instrumentation/NumericalStabilitySanitizer/non_float_store.ll
A llvm/test/LTO/Resolution/X86/libcall-external.ll
A llvm/test/LTO/Resolution/X86/libcall-in-thin-link.ll
A llvm/test/LTO/Resolution/X86/libcall-in-tu.ll
M llvm/test/MC/AArch64/armv9.7a-gcie.s
A llvm/test/MC/AMDGPU/vop3-literal-gfx1250.s
M llvm/test/MC/AMDGPU/vop3-literal.s
M llvm/test/MC/ARM/arm-shift-encoding.s
A llvm/test/MC/ARM/thumb-ldr-stretch.s
M llvm/test/MC/ARM/thumb-shift-encoding.s
A llvm/test/MC/CSKY/lrw-stretch.s
M llvm/test/MC/Disassembler/AArch64/armv8.2a-uao.txt
M llvm/test/MC/Disassembler/AArch64/armv8.4a-dit.txt
M llvm/test/MC/Disassembler/AArch64/armv8.5a-dataproc.txt
M llvm/test/MC/Disassembler/AArch64/armv8.5a-mte.txt
M llvm/test/MC/Disassembler/AArch64/armv8.5a-sb.txt
M llvm/test/MC/Disassembler/AArch64/armv8.5a-ssbs.txt
M llvm/test/MC/Disassembler/AArch64/armv8.7a-wfxt.txt
M llvm/test/MC/Disassembler/AArch64/armv8.7a-xs.txt
M llvm/test/MC/Disassembler/AArch64/armv8.8a-nmi.txt
A llvm/test/MC/ELF/prefalign-convergence.s
M llvm/test/MC/ELF/prefalign-errors.s
M llvm/test/MC/ELF/prefalign.s
M llvm/test/MC/ELF/relax-branch-align.s
A llvm/test/MC/RISCV/prefalign.s
A llvm/test/MC/RISCV/rv32p-aliases-valid.s
M llvm/test/MC/RISCV/rv32p-valid.s
A llvm/test/MC/RISCV/rv64p-aliases-valid.s
M llvm/test/MC/RISCV/rvzicbom-invalid.s
M llvm/test/MC/RISCV/rvzicbop-valid.s
M llvm/test/MC/RISCV/rvzicboz-invalid.s
M llvm/test/MC/Sparc/sparc64-alu-instructions.s
M llvm/test/MC/WebAssembly/simd-encodings.s
A llvm/test/MC/X86/align-branch-convergence.s
M llvm/test/Other/new-pm-defaults.ll
M llvm/test/Other/new-pm-lto-defaults.ll
M llvm/test/Other/new-pm-thinlto-postlink-defaults.ll
M llvm/test/Other/new-pm-thinlto-postlink-pgo-defaults.ll
M llvm/test/Other/new-pm-thinlto-postlink-samplepgo-defaults.ll
A llvm/test/TableGen/GlobalISelCombinerEmitter/match-table-hoisting.td
M llvm/test/TableGen/GlobalISelEmitter/MatchTableOptimizerSameOperand-invalid.td
A llvm/test/Transforms/Attributor/nofpclass-trig.ll
A llvm/test/Transforms/CodeGenPrepare/X86/verify-bfi-updates.ll
A llvm/test/Transforms/CorrelatedValuePropagation/pr187381.ll
R llvm/test/Transforms/GVN/PRE/protected-field-ptr.ll
M llvm/test/Transforms/IndVarSimplify/X86/loop-invariant-conditions.ll
M llvm/test/Transforms/Inline/ML/Inputs/test-module.ll
M llvm/test/Transforms/Inline/ML/interactive-mode.ll
M llvm/test/Transforms/Inline/ML/ml-test-development-mode.ll
M llvm/test/Transforms/Inline/always-inline-phase-ordering.ll
M llvm/test/Transforms/Inline/attributes.ll
M llvm/test/Transforms/Inline/debug-invoke.ll
A llvm/test/Transforms/Inline/inline-history-2.ll
A llvm/test/Transforms/Inline/inline-history-3.ll
A llvm/test/Transforms/Inline/inline-history-dead-function.ll
A llvm/test/Transforms/Inline/inline-history-invoke.ll
R llvm/test/Transforms/Inline/inline-history-noinline.ll
A llvm/test/Transforms/Inline/inline-history.ll
M llvm/test/Transforms/Inline/inline-recursive-fn2.ll
M llvm/test/Transforms/InstCombine/AArch64/sve-intrinsic-comb-no-active-lanes-stores.ll
M llvm/test/Transforms/InstCombine/AArch64/sve-intrinsic-gatherscatter.ll
M llvm/test/Transforms/InstCombine/NVPTX/nvvm-intrins.ll
M llvm/test/Transforms/InstCombine/X86/x86-sse4a-inseltpoison.ll
M llvm/test/Transforms/InstCombine/X86/x86-sse4a.ll
M llvm/test/Transforms/InstCombine/apint-shift.ll
M llvm/test/Transforms/InstCombine/cast.ll
M llvm/test/Transforms/InstCombine/clamp-to-minmax.ll
M llvm/test/Transforms/InstCombine/fneg.ll
M llvm/test/Transforms/InstCombine/fold-inc-of-add-of-not-x-and-y-to-sub-x-from-y.ll
M llvm/test/Transforms/InstCombine/fp-floor-ceil.ll
M llvm/test/Transforms/InstCombine/fpcast.ll
M llvm/test/Transforms/InstCombine/fptrunc.ll
M llvm/test/Transforms/InstCombine/icmp-select.ll
R llvm/test/Transforms/InstCombine/icmp-shl-add-to-add.ll
A llvm/test/Transforms/InstCombine/icmp-umax-notx.ll
A llvm/test/Transforms/InstCombine/known-range-frexp-exp.ll
A llvm/test/Transforms/InstCombine/protected-field-ptr.ll
M llvm/test/Transforms/InstCombine/ptrauth-intrinsics.ll
M llvm/test/Transforms/InstCombine/scalable-trunc.ll
M llvm/test/Transforms/InstCombine/scmp.ll
M llvm/test/Transforms/InstCombine/sub-xor-cmp.ll
M llvm/test/Transforms/InstCombine/truncating-saturate.ll
M llvm/test/Transforms/InstCombine/ucmp.ll
M llvm/test/Transforms/InstSimplify/bitcast-vector-fold.ll
M llvm/test/Transforms/InstSimplify/known-never-infinity.ll
M llvm/test/Transforms/InstSimplify/known-never-nan.ll
M llvm/test/Transforms/InterleavedAccess/AArch64/scalable-deinterleave-intrinsics.ll
M llvm/test/Transforms/InterleavedAccess/AArch64/sve-deinterleave4.ll
M llvm/test/Transforms/InterleavedAccess/AArch64/sve-interleave4.ll
M llvm/test/Transforms/InterleavedAccess/AArch64/sve-interleaved-accesses.ll
M llvm/test/Transforms/JumpThreading/divergent-target-test.ll
M llvm/test/Transforms/LoopIdiom/non-integral-pointers.ll
M llvm/test/Transforms/LoopInterchange/large-nested-6d.ll
M llvm/test/Transforms/LoopStrengthReduce/RISCV/lsr-drop-solution-dbg-msg.ll
M llvm/test/Transforms/LoopStrengthReduce/X86/2011-11-29-postincphi.ll
M llvm/test/Transforms/LoopStrengthReduce/X86/postinc-iv-used-by-urem-and-udiv.ll
M llvm/test/Transforms/LoopStrengthReduce/X86/pr62660-normalization-failure.ll
M llvm/test/Transforms/LoopStrengthReduce/duplicated-phis.ll
R llvm/test/Transforms/LoopUnroll/AMDGPU/expensive-tripcount.ll
A llvm/test/Transforms/LoopUnroll/AMDGPU/scev-mul-expansion-cost.ll
A llvm/test/Transforms/LoopUnroll/expensive-tripcount.ll
M llvm/test/Transforms/LoopVectorize/12-12-11-if-conv.ll
M llvm/test/Transforms/LoopVectorize/2012-10-20-infloop.ll
M llvm/test/Transforms/LoopVectorize/2012-10-22-isconsec.ll
M llvm/test/Transforms/LoopVectorize/2016-07-27-loop-vec.ll
M llvm/test/Transforms/LoopVectorize/AArch64/Oz-and-forced-vectorize.ll
M llvm/test/Transforms/LoopVectorize/AArch64/aarch64-unroll.ll
M llvm/test/Transforms/LoopVectorize/AArch64/arbitrary-induction-step.ll
M llvm/test/Transforms/LoopVectorize/AArch64/arm64-unroll.ll
M llvm/test/Transforms/LoopVectorize/AArch64/binop-costs.ll
M llvm/test/Transforms/LoopVectorize/AArch64/blend-costs.ll
M llvm/test/Transforms/LoopVectorize/AArch64/call-costs.ll
M llvm/test/Transforms/LoopVectorize/AArch64/check-prof-info.ll
M llvm/test/Transforms/LoopVectorize/AArch64/clamped-trip-count.ll
M llvm/test/Transforms/LoopVectorize/AArch64/clmul.ll
M llvm/test/Transforms/LoopVectorize/AArch64/conditional-branches-cost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/drop-poison-generating-flags.ll
M llvm/test/Transforms/LoopVectorize/AArch64/epilog-iv-select-cmp.ll
M llvm/test/Transforms/LoopVectorize/AArch64/epilog-vectorization-factors.ll
M llvm/test/Transforms/LoopVectorize/AArch64/epilog-vectorization-widen-inductions.ll
M llvm/test/Transforms/LoopVectorize/AArch64/find-last-iv-sinkable-expr-epilogue.ll
M llvm/test/Transforms/LoopVectorize/AArch64/fixed-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/AArch64/fminimumnum.ll
M llvm/test/Transforms/LoopVectorize/AArch64/fold-tail-low-trip-count.ll
M llvm/test/Transforms/LoopVectorize/AArch64/force-target-instruction-cost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/fully-unrolled-cost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/gather-do-not-vectorize-addressing.ll
M llvm/test/Transforms/LoopVectorize/AArch64/induction-costs-sve.ll
M llvm/test/Transforms/LoopVectorize/AArch64/interleave-with-gaps.ll
M llvm/test/Transforms/LoopVectorize/AArch64/interleaving-load-store.ll
M llvm/test/Transforms/LoopVectorize/AArch64/interleaving-reduction.ll
M llvm/test/Transforms/LoopVectorize/AArch64/intrinsiccost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/licm-calls.ll
M llvm/test/Transforms/LoopVectorize/AArch64/loop-vectorization-factors.ll
M llvm/test/Transforms/LoopVectorize/AArch64/loopvectorize_pr33804_double.ll
M llvm/test/Transforms/LoopVectorize/AArch64/low_trip_count_predicates.ll
M llvm/test/Transforms/LoopVectorize/AArch64/masked-call-scalarize.ll
M llvm/test/Transforms/LoopVectorize/AArch64/masked-call.ll
M llvm/test/Transforms/LoopVectorize/AArch64/masked-op-cost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/masked_ldst_sme.ll
M llvm/test/Transforms/LoopVectorize/AArch64/maxbandwidth-regpressure.ll
M llvm/test/Transforms/LoopVectorize/AArch64/maximize-bandwidth-invalidate.ll
M llvm/test/Transforms/LoopVectorize/AArch64/nontemporal-load-store.ll
M llvm/test/Transforms/LoopVectorize/AArch64/outer_loop_test1_no_explicit_vect_width.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-chained.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-dot-product-epilogue.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-dot-product-mixed.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-dot-product-neon.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-dot-product.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-fdot-product.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-no-dotprod.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-sub.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce.ll
M llvm/test/Transforms/LoopVectorize/AArch64/pr151664-cost-hoisted-vector-scalable.ll
M llvm/test/Transforms/LoopVectorize/AArch64/pr33053.ll
M llvm/test/Transforms/LoopVectorize/AArch64/pr36032.ll
M llvm/test/Transforms/LoopVectorize/AArch64/pr73894.ll
M llvm/test/Transforms/LoopVectorize/AArch64/reg-usage.ll
M llvm/test/Transforms/LoopVectorize/AArch64/replicating-load-store-costs-apple.ll
M llvm/test/Transforms/LoopVectorize/AArch64/replicating-load-store-costs.ll
A llvm/test/Transforms/LoopVectorize/AArch64/reverse-load-scatter.ll
M llvm/test/Transforms/LoopVectorize/AArch64/runtime-check-size-based-threshold.ll
M llvm/test/Transforms/LoopVectorize/AArch64/runtime-check-trip-count-decisions.ll
M llvm/test/Transforms/LoopVectorize/AArch64/scalable-avoid-scalarization.ll
M llvm/test/Transforms/LoopVectorize/AArch64/scalable-call.ll
M llvm/test/Transforms/LoopVectorize/AArch64/scalable-predicate-instruction.ll
M llvm/test/Transforms/LoopVectorize/AArch64/scalable-reductions-tf.ll
M llvm/test/Transforms/LoopVectorize/AArch64/scalable-reductions.ll
M llvm/test/Transforms/LoopVectorize/AArch64/scalable-strict-fadd.ll
M llvm/test/Transforms/LoopVectorize/AArch64/scalar_interleave.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sdiv-pow2.ll
M llvm/test/Transforms/LoopVectorize/AArch64/select-best-vf-tripcount.ll
M llvm/test/Transforms/LoopVectorize/AArch64/select-index.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sme-vectorize.ll
M llvm/test/Transforms/LoopVectorize/AArch64/strict-fadd-cost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/strict-fadd-vf1.ll
M llvm/test/Transforms/LoopVectorize/AArch64/strict-fadd.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-basic-vec.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-cond-inv-loads.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-epilog-vect-vscale-tune.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-extract-last-veclane.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-fixed-width-inorder-core.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-fneg.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-gather-scatter-cost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-gather-scatter.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-inductions-unusual-types.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-inductions.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-interleaved-accesses-cost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-interleaved-accesses.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-inv-loads.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-inv-store.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-large-strides.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-masked-loadstore.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-select-cmp.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-tail-folding-cost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-tail-folding-option.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-tail-folding-optsize.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-tail-folding-reductions.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-tail-folding-unroll.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-tail-folding.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-type-conv.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-vector-reverse-mask4.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-vector-reverse.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-vscale-based-trip-counts.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-widen-gep.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-widen-phi.ll
M llvm/test/Transforms/LoopVectorize/AArch64/tail-fold-uniform-memops.ll
M llvm/test/Transforms/LoopVectorize/AArch64/tail-folding-styles.ll
M llvm/test/Transforms/LoopVectorize/AArch64/transform-narrow-interleave-to-widen-memory-cost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/type-shrinkage-insertelt.ll
M llvm/test/Transforms/LoopVectorize/AArch64/type-shrinkage-zext-costs.ll
M llvm/test/Transforms/LoopVectorize/AArch64/veclib-calls-libsystem-darwin.ll
M llvm/test/Transforms/LoopVectorize/AArch64/veclib-intrinsic-calls.ll
M llvm/test/Transforms/LoopVectorize/AArch64/vector-reverse-mask4.ll
M llvm/test/Transforms/LoopVectorize/AArch64/vector-reverse.ll
M llvm/test/Transforms/LoopVectorize/AMDGPU/buffer-fat-pointer.ll
M llvm/test/Transforms/LoopVectorize/AMDGPU/divergent-runtime-check.ll
M llvm/test/Transforms/LoopVectorize/AMDGPU/unroll-in-loop-vectorizer.ll
M llvm/test/Transforms/LoopVectorize/ARM/active-lane-mask.ll
M llvm/test/Transforms/LoopVectorize/ARM/arm-ieee-vectorize.ll
M llvm/test/Transforms/LoopVectorize/ARM/arm-unroll.ll
M llvm/test/Transforms/LoopVectorize/ARM/gcc-examples.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-gather-scatter-tailpred.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-icmpcost.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-known-trip-count.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-maskedldst.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-predstorecost.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-qabs.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-recurrence.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-reduction-predselect.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-reduction-types.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-reductions.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-reg-pressure-vmla.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-saddsatcost.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-selectandorcost.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-shiftcost.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-vldn.ll
M llvm/test/Transforms/LoopVectorize/ARM/pointer_iv.ll
M llvm/test/Transforms/LoopVectorize/ARM/scalar-block-cost.ll
M llvm/test/Transforms/LoopVectorize/ARM/tail-fold-multiple-icmps.ll
M llvm/test/Transforms/LoopVectorize/ARM/tail-folding-allowed.ll
M llvm/test/Transforms/LoopVectorize/ARM/tail-folding-counting-down.ll
M llvm/test/Transforms/LoopVectorize/ARM/tail-folding-not-allowed.ll
M llvm/test/Transforms/LoopVectorize/ARM/tail-folding-prefer-flag.ll
M llvm/test/Transforms/LoopVectorize/ARM/width-detect.ll
M llvm/test/Transforms/LoopVectorize/Hexagon/invalidate-cm-after-invalidating-interleavegroups.ll
M llvm/test/Transforms/LoopVectorize/Hexagon/maximum-vf-crash.ll
Log Message:
-----------
Merge branch 'main' into fix-blockfreq-unroll-unconditional-latches--fast
Compare: https://github.com/llvm/llvm-project/compare/1a575c24da9b...0e5e24c30b6f
To unsubscribe from these emails, change your notification settings at https://github.com/llvm/llvm-project/settings/notifications
More information about the All-commits
mailing list