[all-commits] [llvm/llvm-project] 88a78f: [CIR] Add support for variable sized array new. (#...
Ziqing Luo via All-commits
all-commits at lists.llvm.org
Thu Apr 9 19:21:17 PDT 2026
Branch: refs/heads/users/ziqingluo/PR-172429193
Home: https://github.com/llvm/llvm-project
Commit: 88a78f651c5e6b89bf6377e06d5fe5e92cd1ae2a
https://github.com/llvm/llvm-project/commit/88a78f651c5e6b89bf6377e06d5fe5e92cd1ae2a
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/lib/CIR/CodeGen/CIRGenClass.cpp
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
M clang/lib/CIR/Dialect/Transforms/LoweringPrepare.cpp
M clang/test/CIR/CodeGen/new.cpp
M clang/test/CIR/IR/array-ctor.cir
A clang/test/CIR/IR/invalid-array-structor.cir
Log Message:
-----------
[CIR] Add support for variable sized array new. (#190656)
This change adds support for array new with variable size. This required
extending the cir.array.ctor operation to accept a value for the size
and a direct pointer to the element size instead of a pointer to an
array.
Assisted-by: Cursor / claude-4.6-opus-high
Assisted-by: Cursor / composer-2-fast
Commit: e382a955c9f8bf07d28daaedcd404ca530df9be4
https://github.com/llvm/llvm-project/commit/e382a955c9f8bf07d28daaedcd404ca530df9be4
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M llvm/test/Transforms/LoopVectorize/AArch64/binop-costs.ll
M llvm/test/Transforms/LoopVectorize/AArch64/type-shrinkage-zext-costs.ll
M llvm/test/Transforms/LoopVectorize/RISCV/reg-usage.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-reduction-cost.ll
M llvm/test/Transforms/LoopVectorize/WebAssembly/int-mac-reduction-costs.ll
M llvm/test/Transforms/LoopVectorize/WebAssembly/memory-interleave.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/handle-iptr-with-data-layout-to-not-assert.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-f32-stride-2.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-f32-stride-3.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-f32-stride-4.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-f32-stride-5.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-f32-stride-6.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-f32-stride-7.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-f32-stride-8.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-f64-stride-2.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-f64-stride-3.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-f64-stride-4.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-f64-stride-5.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-f64-stride-6.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-f64-stride-7.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-f64-stride-8.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-half.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i16-stride-2.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i16-stride-3.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i16-stride-4.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i16-stride-5.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i16-stride-6.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i16-stride-7.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i16-stride-8.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i32-stride-2-indices-0u.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i32-stride-2.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i32-stride-3-indices-01u.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i32-stride-3-indices-0uu.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i32-stride-3.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i32-stride-4-indices-012u.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i32-stride-4-indices-01uu.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i32-stride-4-indices-0uuu.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i32-stride-4.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i32-stride-5.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i32-stride-6.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i32-stride-7.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i32-stride-8.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i64-stride-2.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i64-stride-3.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i64-stride-4.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i64-stride-5.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i64-stride-6.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i64-stride-7.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i64-stride-8.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i8-stride-2.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i8-stride-3.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i8-stride-4.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i8-stride-5.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i8-stride-6.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i8-stride-7.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i8-stride-8.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-f32-stride-2.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-f32-stride-3.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-f32-stride-4.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-f32-stride-5.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-f32-stride-6.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-f32-stride-7.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-f32-stride-8.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-f64-stride-2.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-f64-stride-3.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-f64-stride-4.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-f64-stride-5.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-f64-stride-6.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-f64-stride-7.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-f64-stride-8.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i16-stride-2.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i16-stride-3.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i16-stride-4.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i16-stride-5.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i16-stride-6.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i16-stride-7.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i16-stride-8.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i32-stride-2.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i32-stride-3.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i32-stride-4.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i32-stride-5.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i32-stride-6.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i32-stride-7.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i32-stride-8.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i64-stride-2.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i64-stride-3.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i64-stride-4.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i64-stride-5.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i64-stride-6.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i64-stride-7.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i64-stride-8.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i8-stride-2.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i8-stride-3.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i8-stride-4.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i8-stride-5.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i8-stride-6.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i8-stride-7.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i8-stride-8.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/masked-interleaved-load-i16.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/masked-interleaved-store-i16.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/masked-scatter-i32-with-i8-index.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/masked-scatter-i64-with-i8-index.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/masked-store-i16.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/masked-store-i32.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/masked-store-i64.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/masked-store-i8.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/scatter-i16-with-i8-index.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/scatter-i32-with-i8-index.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/scatter-i64-with-i8-index.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/scatter-i8-with-i8-index.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/strided-load-i16.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/strided-load-i32.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/strided-load-i64.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/strided-load-i8.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/vpinstruction-cost.ll
Log Message:
-----------
[LV] Update remaining tests to use VPlan cost output (NFC). (#190038)
Move remaining tests checking legacy cost output to check the VPlan's
cost model output.
In some cases, checks become much more compact (checking a single
interleave group cost vs checking the individual members which all have
the group's cost). In some cases, auto-generation consistently checks
all relevant VFs.
PR: https://github.com/llvm/llvm-project/pull/190038
Commit: c7c902574cb1eb0da6463f1fd1c4d94c1aba9e33
https://github.com/llvm/llvm-project/commit/c7c902574cb1eb0da6463f1fd1c4d94c1aba9e33
Author: Shanzhi Chen <chenshanzhi at huawei.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp
M bolt/lib/Target/AArch64/CMakeLists.txt
M bolt/unittests/Core/MCPlusBuilder.cpp
Log Message:
-----------
[BOLT][AArch64] Optimize the mov-imm-to-reg operation (#189304)
On AArch64, logical immediate instructions are used to encode some
special immediate values. And even at `-O0` level, the AArch64 backend
would not choose to generate 4 instructions (movz, movk, movk, movk) for
moving such a special value to a 64-bit regiter.
For example, to move the 64-bit value `0x0001000100010001` to `x0`, the
AArch64 backend would not choose a 4-instruction-sequence like
```
movz x0, 0x0001
movk x0, 0x0001, lsl 16
movk x0, 0x0001, lsl 32
movk x0, 0x0001, lsl 48
```
Actually, the AArch64 backend would choose to generate one instruction
```
mov x0, 0x0001000100010001
```
which is essentially
```
orr x1, xzr, 0x0001000100010001
```
We could refer to `AArch64ExpandPseudoImpl::expandMOVImm` and
`AArch64_IMM::expandMOVImm` for related implementation.
Therefore, maybe we could consider to leverage `expandMOVImm` in llvm to
optimize the mov-imm-to-reg operation in BOLT, which would help to speed
up the BOLT-instrumented binary.
Commit: 05f9c66c38c646b4795268a9c6c3aa479c793a8c
https://github.com/llvm/llvm-project/commit/05f9c66c38c646b4795268a9c6c3aa479c793a8c
Author: Valeriy Savchenko <vsavchenko at apple.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
A llvm/test/CodeGen/AArch64/branch-on-bool.ll
Log Message:
-----------
[AArch64] Normalize (bool CC 1) to (bool NewCC 0) in LowerBR_CC (#189380)
Commit: b3c093d957a972e896107abd350605babc0e5c52
https://github.com/llvm/llvm-project/commit/b3c093d957a972e896107abd350605babc0e5c52
Author: Min-Yih Hsu <min.hsu at sifive.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M llvm/test/tools/llvm-mca/RISCV/Inputs/rvv/mask.s
M llvm/test/tools/llvm-mca/RISCV/SiFiveP400/rvv/mask.test
M llvm/test/tools/llvm-mca/RISCV/SiFiveP600/rvv/mask.test
M llvm/test/tools/llvm-mca/RISCV/SiFiveX100/rvv/mask.test
M llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv/mask.test
Log Message:
-----------
[RISCV][MCA] Do not use mask instructions that can potentially be optimized by uArch (#190820)
Context:
https://github.com/llvm/llvm-project/pull/189785#discussion_r3019282209
Some mask instructions have a form that can potentially be optimized by
HW implementation: `vmxor.mm vd, vs, vs` and `vmclr vd, vs`, for
instance. This patch avoids using such instructions in MCA tests.
Commit: 88af28072637213c32cd53c99c4b9d79ded6e746
https://github.com/llvm/llvm-project/commit/88af28072637213c32cd53c99c4b9d79ded6e746
Author: Deric C. <cheung.deric at gmail.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M clang/include/clang/Basic/HLSLIntrinsics.td
M clang/lib/Headers/hlsl/hlsl_alias_intrinsics.h
M clang/lib/Headers/hlsl/hlsl_detail.h
M clang/lib/Headers/hlsl/hlsl_intrinsic_helpers.h
M clang/lib/Headers/hlsl/hlsl_intrinsics.h
M clang/test/CodeGenHLSL/builtins/dst.hlsl
M clang/test/CodeGenHLSL/builtins/ldexp.hlsl
M clang/test/CodeGenHLSL/resources/NonUniformResourceIndex.hlsl
M clang/test/SemaHLSL/BuiltIns/D3DCOLORtoUBYTE4-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/distance-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/dot2add-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/faceforward-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/fmod-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/ldexp-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/length-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/reflect-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/refract-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/smoothstep-errors.hlsl
Log Message:
-----------
[HLSL] Rewrite inline HLSL intrinsics into TableGen (#188362)
Partially addresses https://github.com/llvm/llvm-project/issues/188345.
This PR rewrites all applicable inline HLSL intrinsics from
`hlsl_intrinsics.h` into TableGen.
The unsigned `abs` from `hlsl_alias_intrinsics.h` is also rewritten into
TableGen since it can also be defined inline.
The `NonUniformResourceIndex` is moved from `hlsl_intrinsics.h` over to
`hlsl_alias_intrinsics.h` since it can be defined as an alias.
`__detail::.*_impl` helper functions that were one liners have been
removed, and their corresponding HLSL intrinsics have been defined in
TableGen using the `Body` field instead.
Note that rewriting `refract` in TableGen instead of templates
introduces some significant changes to error messages and also
introduces a new offload test suite failure in the fp16 test because a
call to `refract(x, y, 0.5)` where x and y are half-typed vectors is
ambiguous due to 0.5 being a 32-bit float literal.
The generated `hlsl_inline_intrinsics_gen.inc` file looks like this:
https://gist.github.com/Icohedron/a1c4a47ad0bb184f857430835d7d2ca3
Assisted-by: GitHub Copilot
---------
Co-authored-by: Justin Bogner <mail at justinbogner.com>
Commit: f68868db062bdd7e94affbefd0b59e72650379a3
https://github.com/llvm/llvm-project/commit/f68868db062bdd7e94affbefd0b59e72650379a3
Author: Arthur Eubanks <aeubanks at google.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M llvm/lib/IR/Value.cpp
Log Message:
-----------
Revert "[IR] Use iteration limit in stripPointerCastsAndOffsets" (#190839)
Reverts llvm/llvm-project#190472
Causes crashes:
https://github.com/llvm/llvm-project/pull/190472#issuecomment-4201843466
Commit: f069b82693d43206e5d173cd563e0c80493a9ede
https://github.com/llvm/llvm-project/commit/f069b82693d43206e5d173cd563e0c80493a9ede
Author: Anshul Nigham <nigham at google.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M llvm/lib/Target/AArch64/GISel/AArch64PostLegalizerCombiner.cpp
Log Message:
-----------
[NFC] Drop AArch64PostLegalizerCombiner dep on TargetPassConfig (#190569)
This will enable NewPM porting.
Replaced with the definition in
[AArch64PassConfig::getCSEConfig](https://github.com/llvm/llvm-project/blob/1d549d9a777a6faef6d425cb6482ab1fa6b91bb7/llvm/lib/Target/AArch64/AArch64TargetMachine.cpp#L614)
Commit: bafb2cbe22f4d6c466e6ad82e6fe5a94c4dcd497
https://github.com/llvm/llvm-project/commit/bafb2cbe22f4d6c466e6ad82e6fe5a94c4dcd497
Author: David Pagan <dave.pagan at amd.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/lib/Sema/SemaOpenMP.cpp
A clang/test/OpenMP/declare_target_local_map_messages.cpp
Log Message:
-----------
[clang][OpenMP] declare_target/local clause variable can't be in map clause (#190470)
In OpenMP 6.0, the 'local' clause was added to the declare_target
directive. Variables listed in the 'local' clause are considered to be
device-local. In addition, a new map clause restriction was added:
A device-local variable must not appear as a list item in a map clause.
See OpenMP 6.0 specification section 7.9.6, map Clause, Restrictions, p.
386.
Testing:
- New error messages test for device-local variables defined in
declare_target local clauses (device-local) used in map clauses.
- ninja check-openmp
Commit: 4b31f1ee830820e5a3aa35779069f2e25c38d267
https://github.com/llvm/llvm-project/commit/4b31f1ee830820e5a3aa35779069f2e25c38d267
Author: Leonardo Román Carrillo <leonardoroman at google.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64.h
M llvm/lib/Target/AArch64/AArch64A57FPLoadBalancing.cpp
M llvm/lib/Target/AArch64/AArch64PassRegistry.def
M llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
Log Message:
-----------
[NewPM] Port for AArch64A57FPLoadBalancing (#190652)
Commit: ba01e8d24532153f697b410db250bb82d9864581
https://github.com/llvm/llvm-project/commit/ba01e8d24532153f697b410db250bb82d9864581
Author: agozillon <Andrew.Gozillon at amd.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M flang/lib/Lower/OpenMP/ClauseProcessor.cpp
M flang/lib/Lower/OpenMP/ClauseProcessor.h
M flang/test/Lower/OpenMP/declare-mapper.f90
R flang/test/Lower/OpenMP/target-motion-skip-implicit-mapper.f90
Log Message:
-----------
[Flang][OpenMP] Allow user-defined default mappers to bypass the implicit mapper fence (#189136)
Currently we wall out implicit declare mappers from being applied to
enter/exit/update (which we'll need to address in future PRs, as this
likely should work to some extent for allocatable member mapping). A
side effect of this is that it's causing user-defined default declare
mappers to not apply in scenarios when they should.
I believe these user-defined default declare mappers should apply in all
cases where that type is mapped and no other mapper has been explicitly
specified, as they replace the original default mapping behaviour from
my admittedly shoddy specification reading skills.
The user defined default mappers should "implicitly" apply because:
1. No explicit mapper modifier is specified
2. The fallback behavior should be "as if the modifier was specified
with the default mapper-identifier" (Section 5.9)
3. The user-defined default mapper "overrides the predefined default
mapper for the given type" (Section 5.8.2)
This was 5.2-ish sectioning so information might be outdated for 6+ and
the rules might be changed (if I interpreted them correctly in the first
place).
There's a couple of other tweaks I did in the refactoring, mainly making
sure the explicit mapper can be used in conjunction with possible
specified default mappers for other types. As technically, you're
allowed to specify one mapper and map other bits and pieces in the same
mapping clause and the mapper simply doesn't apply to the other things
not of the same type.
Commit: fc01c111b94f43894b3099553bc0b0e42ef5de2c
https://github.com/llvm/llvm-project/commit/fc01c111b94f43894b3099553bc0b0e42ef5de2c
Author: calebwat <107081575+calebwat at users.noreply.github.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanUtils.cpp
Log Message:
-----------
[NFCI] Check for non-null before dereferencing a VPBB ptr (#190403)
A VPBB variable is possibly null (defined via a ternary), but is
subsequently dereferenced without a check included. This patch adds a
check for it to avoid any possibly null dereference. This was found via
static analysis, there is not a known case right now where this issue is
hit.
Commit: 0ac8fed21e5bf71e65275a3dbb0be1272571519a
https://github.com/llvm/llvm-project/commit/0ac8fed21e5bf71e65275a3dbb0be1272571519a
Author: Moritz Scherer <moritz at mosaic-soc.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
M llvm/test/CodeGen/RISCV/xcvmem.ll
Log Message:
-----------
[RISCV] Use signed target constants for XCVmem post-inc loads (#189276)
First time opening a PR against LLVM, so please let me know if anything
is missing / wrong.
This fixes an assertion in RISC-V DAG isel for CORE-V xcvmem
post-increment loads with negative immediate offsets.
`RISCVDAGToDAGISel::Select` recognizes `xcvmem POST_INC` loads and
checks whether the offset fits the signed 12-bit immediate form used by
`cv.lb/cv.lbu/cv.lh/cv.lhu/cv.lw ... , (rs1), imm12`. That path was
extracting the offset with `getSExtValue()`, but then rebuilding it with
`getTargetConstant(...)`, which takes the unsigned constant path.
For negative offsets, that could trip the APInt assertion:
```
Assertion failed: (llvm::isUIntN(BitWidth, val) && "Value is not an N-bit unsigned value")
```
during `RISC-V DAG->DAG Pattern Instruction Selection`.
The fix is to use `getSignedTargetConstant(...)` for the xcvmem
immediate case.
A regression test is added to llvm/test/CodeGen/RISCV/xcvmem.ll that
covers a reduced negative post-increment load case and checks the
expected codegen:
```asm
lw a2, 0(a0)
cv.lw a1, (a2), -4
sw a2, 0(a0)
mv a0, a1
ret
```
Reproducer before the fix:
```c
int f(int **pp) {
int *p = *pp;
int x = *p;
*pp = p - 1;
return x;
}
```
Example failing invocation:
```bash
clang --target=riscv32-unknown-elf \
-march=rv32imf_zicsr_zifencei_xcvmem \
-mabi=ilp32f -O2 -ffreestanding -c repro.c
```
Validation:
```bash
llc -O3 -mtriple=riscv32 -mattr=+xcvmem -verify-machineinstrs llvm/test/CodeGen/RISCV/xcvmem.ll
```
Confirmed the reduced repro no longer crashes
Commit: 9b16edb9ec068cca09dc01672c987aa8d3c7bdd4
https://github.com/llvm/llvm-project/commit/9b16edb9ec068cca09dc01672c987aa8d3c7bdd4
Author: agozillon <Andrew.Gozillon at amd.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Semantics/resolve-directives.cpp
A flang/test/Lower/OpenMP/common-block-target-update.f90
Log Message:
-----------
[Flang][OpenMP] Fix Common Blocks use in update to/from and target maps causing compiler errors (#187221)
This patch attempts to fix a compiler ICE when common blocks are used in
target update to/from, it seems to stem from the fact that we do not
resolve the symbols in the relevant clauses, so when we later process
the maps we don't have the right symbol that references the common block
that was setup and bound by the fortran lowering. Resolving the names
seems to do the trick.
There is a second issue where when referencing a common block with an
array contained in it and utilising the array within the target region,
we'll currently not accurately map over the bounds and cause a FIR/MLIR
verification error. The fix for this is to simply move the common block
member re-binding/re-materialization for the target region to before the
bounds data re-materialization we do during target region generation.
Commit: 2e29531ff4fee12ef883ad9af54208f9eada8f18
https://github.com/llvm/llvm-project/commit/2e29531ff4fee12ef883ad9af54208f9eada8f18
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.cpp
Log Message:
-----------
[VPlan] Properly preserve IsMaterialized in VPlan::duplicate (NFC). (#190849)
Make sure IsMaterialized is preserved in VPlan::duplicate for
VPSymbolicValues. This is currently NFC.
Split off from approved
https://github.com/llvm/llvm-project/pull/156262.
Commit: 103f821cb0977612fbff270df0e81801e8b93ed4
https://github.com/llvm/llvm-project/commit/103f821cb0977612fbff270df0e81801e8b93ed4
Author: Zyn <103019185+zyn-li at users.noreply.github.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.h
M lldb/source/Plugins/TypeSystem/Clang/TypeSystemClang.cpp
A lldb/test/API/lang/cpp/non-type-template-param-member-ptr/Makefile
A lldb/test/API/lang/cpp/non-type-template-param-member-ptr/TestCppNonTypeTemplateParamPtrToMember.py
A lldb/test/API/lang/cpp/non-type-template-param-member-ptr/main.cpp
Log Message:
-----------
[lldb][DWARFASTParserClang] Handle pointer-to-member-data non-type (#189510)
## Reland Notes
Re applying [187598](https://github.com/llvm/llvm-project/pull/187598)
This is a reland of the original commit which was reverted due to a
failure on the Windows buildbot.
Root cause of the Windows failure:
* The fix introduces TemplateArgument::Declaration (pointing to a
FieldDecl)
* GetValueParamType() in TypeSystemClang.cpp did not handle this kind,
so CreateTemplateParameterList() created a
TemplateTypeParmDecl instead of a NonTypeTemplateParmDecl for the
corresponding template parameter.
* On Windows, the Microsoft name mangler calls
cast<NonTypeTemplateParmDecl>(Parm) when mangling member data pointer
NTTPs, which crashed because Parm was a TemplateTypeParmDecl.
* The Itanium mangler (Linux/Mac) does not inspect the parameter
declaration, so the bug was latent there.
Fix:
* Added TemplateArgument::Declaration to GetValueParamType() so it
returns argument.getParamTypeForDecl(), causing
CreateTemplateParameterList() to create the correct
NonTypeTemplateParmDecl.
* Removed the @skipIfWindows decorator from the test.
## Description
### Problem
MakeAPValue in DWARFASTParserClang.cpp did not handle
pointer-to-member-data non-type template parameters (e.g., template <int
S::*P>), causing LLDB to produce incorrect results or crash.
DWARF encodes pointer-to-member-data NTTPs as
`DW_TAG_template_value_parameter` with a `DW_AT_const_value`
representing the byte offset of the member within the containing struct.
MakeAPValue is responsible for converting this value into a clang
APValue, but it only handled integer/enum and floating-point types. For
pointer-to-member types, it returned `std::nullopt`.
This caused the caller (ParseTemplateDIE) to fall back to creating a
type-only TemplateArgument (kind=Type) instead of a value-carrying one.
When two specializations differ only by which member they point to
(e.g., MemberData<&S::x> / MemberData<&S::y>), both produce identical
TemplateArguments. Clang's
[findSpecialization](https://github.com/llvm/llvm-project/blob/3bc216c29cb42c7d94b617943b1d44afce605588/lldb/source/Plugins/TypeSystem/Clang/TypeSystemClang.cpp#L1674-L1677)
then treats the second as a duplicate, so only one specialization exists
in the AST. The second variable becomes unresolvable.
(See Debugger Evidence section below)
In more complex cases, this triggers an assertion failure in
[clang::CXXRecordDecl::setBases():
cast()](https://github.com/llvm/llvm-project/blob/3bc216c29cb42c7d94b617943b1d44afce605588/clang/lib/AST/DeclCXX.cpp#L219)
argument of incompatible type.
## Fix
MakeAPValue: Added `IsMemberDataPointerType()` to the integral type
check so that pointer-to-member byte offsets produce distinct APValues.
Also replaced the silent return `std::nullopt` for unsupported types
with `lldbassert` so unknown type classes are caught during development.
`ResolveMemberDataPointerToFieldDecl`: New method that follows the DWARF
chain to resolve the byte offset to the actual FieldDecl, creating
TemplateArgument(Declaration) matching clang's own AST:
DW_TAG_template_value_parameter (DW_AT_type)
→ DW_TAG_ptr_to_member_type (DW_AT_containing_type)
→ DW_TAG_structure_type → match DW_TAG_member by byte offset
If resolution fails at any step, falls through to the integer APValue
path as a safe fallback.
Verified by comparing clang's AST (clang -Xclang -ast-dump) with LLDB's
reconstructed AST (image dump ast) — both now produce TemplateArgument
decl '&S::x' referencing the correct FieldDecl.
Commit: a50839de8aab4a42a70d3c8105ecf80ef98f74a2
https://github.com/llvm/llvm-project/commit/a50839de8aab4a42a70d3c8105ecf80ef98f74a2
Author: Erich Keane <ekeane at nvidia.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp
A clang/test/CIR/CodeGen/long-double-inc-dec.cpp
Log Message:
-----------
[CIR] Add lowering for long-double increment/decrement (#190812)
This showed up a handful of times in some benchmarks. Supporting
long-double is pretty trivial, so this patch does so, with some work to
make sure all 3 formats of long-double work in the test (plus some
command-line replacement, hopefully that isn't too confusing).
The NYI is left in place, as we're not yet implementing any of the
'half' types (or other smaller FP types).
Commit: 8918319853fbdf9e6f6cb69e96848f913a22bc31
https://github.com/llvm/llvm-project/commit/8918319853fbdf9e6f6cb69e96848f913a22bc31
Author: Erich Keane <ekeane at nvidia.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenExpr.cpp
A clang/test/CIR/CodeGen/non-scalar-lval-return.cpp
Log Message:
-----------
[CIR] Implement non-scalar lvalue return values (#190795)
I could only get these to happen in C++03 (as we do a
materialize-temporary-expr in later standards), but this does appear in
a number of benchmarks. The implementation ends up being pretty trivial,
as we just have to lower the aggregate correctly.
Commit: e1ec0cfeaaeaba6745e8843a34209cd99aee64aa
https://github.com/llvm/llvm-project/commit/e1ec0cfeaaeaba6745e8843a34209cd99aee64aa
Author: Jeffrey Byrnes <jeffrey.byrnes at amd.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SISchedule.td
M llvm/lib/Target/AMDGPU/VOP1Instructions.td
A llvm/test/tools/llvm-mca/AMDGPU/gfx12-permlane16-cycles.s
Log Message:
-----------
[AMDGPU] Add DummySchedWrite to avoid multiple issue cycles (#190095)
TargetSchedule.td specifies that each explicit def of an instruction
must have an associated SchedWrite type. This is a bit unfortunate due
to the MachineScheduler handling of the ScedWrites.
Each of these different SchedWrite contribute to the number of MicroOps
for the MCSchedClassDesc for the instruction --
https://github.com/llvm/llvm-project/blob/096f9d0aa8edb8bad77e8061a6aa9cbf61bcb5ac/llvm/utils/TableGen/SubtargetEmitter.cpp#L1136
Then in the MachineScheduler.cpp's bumpNode, we grab the numMicroOps
from the MCSchedClassDesc
https://github.com/llvm/llvm-project/blob/3d7eedce5658c41a1b22775938359bfafac47fc9/llvm/lib/CodeGen/MachineScheduler.cpp#L2948
We then use this numMicroOps as how many micro ops we'll need to issue
for this instruction. For our target, the issueWidth per cycle is 1. So,
for these instructions the MachineScheduler thinks they will take
multiple cycles to issue, and we add stalls to the hazardRecognizer
https://github.com/llvm/llvm-project/blob/3d7eedce5658c41a1b22775938359bfafac47fc9/llvm/lib/CodeGen/MachineScheduler.cpp#L3100
Adding these unnecessary stalls throws off analyses in the
HazardRecognizer, which can lead to suboptimal scheduling decisions.
Due to the design, we are essentially pigeonholed into misrepresenting
these instructions. This PR adds new SchedWrite types ( WriteVALUDummy
and WriteSALUDummy ) to honor the rule of "each explicit def must have a
SchedWrite" without adding unnecessary MicroOps to get around the issue.
There are several other instructions that have exposure to this issue,
and addressing them all at once leads to lit test churn of about 170
tests. The intention of this PR is to agree upon the approach, then we
can incrementally roll it out to other instructions.
Commit: bbdf4670df3c17eea7568ea72f5ed62933e3cf59
https://github.com/llvm/llvm-project/commit/bbdf4670df3c17eea7568ea72f5ed62933e3cf59
Author: Med Ismail Bennani <ismail at bennani.ma>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M lldb/test/API/functionalities/scripted_frame_provider/pass_through_prefix/TestFrameProviderPassThroughPrefix.py
Log Message:
-----------
[lldb/test] Remove stale Windows expectedFailure decorators (NFC) (#190855)
This patch removes stale Windows expectedFailure decorators from
TestFrameProviderPassThroughPrefix.py
https://lab.llvm.org/buildbot/#/builders/141/builds/17091
Signed-off-by: Med Ismail Bennani <ismail at bennani.ma>
Commit: 85d99e38e71870327656034250e901e633196fba
https://github.com/llvm/llvm-project/commit/85d99e38e71870327656034250e901e633196fba
Author: Demetrius Kanios <demetrius at kanios.net>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M llvm/lib/Target/WebAssembly/GISel/WebAssemblyCallLowering.cpp
M llvm/test/CodeGen/WebAssembly/GlobalISel/irtranslator/args-simd.ll
M llvm/test/CodeGen/WebAssembly/GlobalISel/irtranslator/args-swiftcc.ll
M llvm/test/CodeGen/WebAssembly/GlobalISel/irtranslator/args.ll
A llvm/test/CodeGen/WebAssembly/GlobalISel/irtranslator/ret-aggregates.ll
A llvm/test/CodeGen/WebAssembly/GlobalISel/irtranslator/ret-basics.ll
A llvm/test/CodeGen/WebAssembly/GlobalISel/irtranslator/ret-simd.ll
Log Message:
-----------
[WebAssembly][GlobalISel] CallLowering `lowerReturn` (#190247)
Implements `WebAssemblyCallLowering::lowerReturn`
Split from #157161
Commit: 6adddb227e7a109eda53f6783e16871c6d714ad9
https://github.com/llvm/llvm-project/commit/6adddb227e7a109eda53f6783e16871c6d714ad9
Author: Keith Smiley <keithbsmiley at gmail.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/clang/BUILD.bazel
Log Message:
-----------
[bazel] Add missing linkopt for macOS tests (#190707)
Mirrors
https://github.com/llvm/llvm-project/blob/228b6ae5608baea7120fc4d5d611b3fbd30ce0cb/clang/lib/DirectoryWatcher/CMakeLists.txt#L12
Commit: a234dfedd13e6066a8dd2f8600f0765d7f62f4e7
https://github.com/llvm/llvm-project/commit/a234dfedd13e6066a8dd2f8600f0765d7f62f4e7
Author: Jan Svoboda <jan_svoboda at apple.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M llvm/lib/Support/Windows/Signals.inc
Log Message:
-----------
[clang] Avoid sandbox violation in Windows signal handler (#190615)
This bypasses the IO sandbox in some of Windows signal handling, which
previously prevented stack traces from being printed.
Commit: 3b6557f178691b97c86724c0744f13bd510de3e3
https://github.com/llvm/llvm-project/commit/3b6557f178691b97c86724c0744f13bd510de3e3
Author: Schrodinger ZHU Yifan <yifanzhu at rochester.edu>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M libc/src/assert/generic/CMakeLists.txt
M libc/src/assert/generic/__assert_fail.cpp
M libc/src/assert/gpu/CMakeLists.txt
M libc/src/assert/gpu/__assert_fail.cpp
M libc/src/compiler/generic/CMakeLists.txt
M libc/src/compiler/generic/__stack_chk_fail.cpp
M libc/src/stdlib/CMakeLists.txt
A libc/src/stdlib/abort.cpp
A libc/src/stdlib/abort_utils.h
M libc/src/stdlib/baremetal/CMakeLists.txt
R libc/src/stdlib/baremetal/abort.cpp
A libc/src/stdlib/baremetal/abort_utils.h
M libc/src/stdlib/gpu/CMakeLists.txt
R libc/src/stdlib/gpu/abort.cpp
A libc/src/stdlib/gpu/abort_utils.h
M libc/src/stdlib/linux/CMakeLists.txt
R libc/src/stdlib/linux/abort.cpp
M libc/src/stdlib/linux/abort_utils.h
M libc/test/integration/src/stdlib/abort_test.cpp
M libc/test/src/assert/assert_test.cpp
Log Message:
-----------
[libc][stdlib] move abort to a header library and cleanup its usage (#190845)
This PR moves abort implementation to a header library so that internal
dependency no longer relies on the entrypoint object.
Additionally, it clean up prior dependency to the entrypoint object and
update staled tests.
Assisted-by: Claude Opus 4.6 <noreply at anthropic.com>
Commit: 8c389f3eb2e713c2195a4d3dd4b6894fab783a10
https://github.com/llvm/llvm-project/commit/8c389f3eb2e713c2195a4d3dd4b6894fab783a10
Author: Michael Spencer <bigcheesegs at gmail.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M clang/include/clang/Frontend/DependencyOutputOptions.h
M clang/include/clang/Frontend/Utils.h
M clang/include/clang/Options/Options.td
M clang/include/clang/Serialization/ASTReader.h
M clang/lib/DependencyScanning/DependencyScannerImpl.cpp
M clang/lib/DependencyScanning/ModuleDepCollector.cpp
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/Frontend/DependencyFile.cpp
M clang/lib/Frontend/Rewrite/FrontendActions.cpp
M clang/lib/Serialization/ASTReader.cpp
M clang/test/ClangScanDeps/generate-modules-path-args.c
A clang/test/Driver/module-file-direct-deps.c
M clang/test/Driver/pch-deps.c
A clang/test/Modules/dependency-gen-direct-module-deps.m
M clang/test/Modules/dependency-gen-pch.m
Log Message:
-----------
[clang] Report direct module deps for explicitly built modules (#190757)
Implicitly built modules do not include PCM paths in .d files because
the compiler is the one managing them, but for explicitly built
modules the build system needs to know about them so that if one is
deleted the build system will rebuild it.
Explicitly built modules should only report direct dependencies, as
the build system knows about each PCM in the module graph. This adds
`-fmodule-file-deps=direct` to support that, and changes dependency
scanning to use this in the explicit build commands it outputs.
Assisted-by: claude-opus-4.6
Commit: 3244cadd4043c36441f7312c6ea06139e3dba18b
https://github.com/llvm/llvm-project/commit/3244cadd4043c36441f7312c6ea06139e3dba18b
Author: Susan Tan (ス-ザン タン) <zujunt at nvidia.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M flang/lib/Optimizer/Transforms/FIRToMemRef.cpp
M flang/test/Transforms/FIRToMemRef/array-coor-block-arg.mlir
M flang/test/Transforms/FIRToMemRef/slice.mlir
Log Message:
-----------
[flang][FIRToMemRef] Preserve descriptor strides for boxed static-shape array_coor (#190859)
Fix FIRToMemRef to avoid the static-shape for descriptor-backed array
operands lowered without reinterpret, so boxed sections with static
extents still preserve runtime stride semantics (e.g. a(1:10:2) in
ASSOCIATE).
Commit: e89a4dfabfac7016819d201dacb6c6c58e6a2365
https://github.com/llvm/llvm-project/commit/e89a4dfabfac7016819d201dacb6c6c58e6a2365
Author: Jim Lin <jim at andestech.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVGISel.td
Log Message:
-----------
[RISCV] Fix typo in ImmPlus1 SDNodeXForm (#190785)
getValuePtrVTpe -> getValueType. Currently dead code since GlobalISel
uses a custom renderer instead of the SDNodeXForm body, but should be
correct in case the SDAG path ever picks up these patterns.
Co-authored-by: Claude Opus 4.6 (1M context) <noreply at anthropic.com>
Commit: 0d640409ad96c71bff8196b54e42993543b1fe92
https://github.com/llvm/llvm-project/commit/0d640409ad96c71bff8196b54e42993543b1fe92
Author: Brian Cain <brian.cain at oss.qualcomm.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
A llvm/include/llvm/ExecutionEngine/JITLink/ELF_hexagon.h
A llvm/include/llvm/ExecutionEngine/JITLink/hexagon.h
M llvm/lib/ExecutionEngine/JITLink/CMakeLists.txt
M llvm/lib/ExecutionEngine/JITLink/ELF.cpp
A llvm/lib/ExecutionEngine/JITLink/ELF_hexagon.cpp
A llvm/lib/ExecutionEngine/JITLink/hexagon.cpp
A llvm/test/ExecutionEngine/JITLink/Hexagon/ELF_hexagon_b22_pcrel.s
A llvm/test/ExecutionEngine/JITLink/Hexagon/ELF_hexagon_combined.s
A llvm/test/ExecutionEngine/JITLink/Hexagon/ELF_hexagon_compound.s
A llvm/test/ExecutionEngine/JITLink/Hexagon/ELF_hexagon_cond_branch.s
A llvm/test/ExecutionEngine/JITLink/Hexagon/ELF_hexagon_const_extender.s
A llvm/test/ExecutionEngine/JITLink/Hexagon/ELF_hexagon_data_relocations.s
A llvm/test/ExecutionEngine/JITLink/Hexagon/ELF_hexagon_duplex.s
A llvm/test/ExecutionEngine/JITLink/Hexagon/ELF_hexagon_hilo16.s
A llvm/test/ExecutionEngine/JITLink/Hexagon/ELF_hexagon_loop.s
A llvm/test/ExecutionEngine/JITLink/Hexagon/ELF_hexagon_mem_relocs.s
A llvm/test/ExecutionEngine/JITLink/Hexagon/ELF_hexagon_minimal.s
A llvm/test/ExecutionEngine/JITLink/Hexagon/ELF_hexagon_noext_branch.s
A llvm/test/ExecutionEngine/JITLink/Hexagon/ELF_hexagon_packet.s
A llvm/test/ExecutionEngine/JITLink/Hexagon/ELF_hexagon_plt.s
A llvm/test/ExecutionEngine/JITLink/Hexagon/lit.local.cfg
Log Message:
-----------
[JITLink] Add Hexagon ELF backend (#189710)
Add JITLink support for Hexagon (ELF32-LE) object files
Commit: 1345ad1b7d37c692548bc2c3d1f1bada71274419
https://github.com/llvm/llvm-project/commit/1345ad1b7d37c692548bc2c3d1f1bada71274419
Author: Wei Wang <apollo.mobility at gmail.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M llvm/lib/Transforms/IPO/SampleProfileMatcher.cpp
Log Message:
-----------
[SampleProf] Check probe-based profile in isProfileUnused (#190852)
`ProbeManager` is only initialized for probe based profile. Add proper
check in `isProfileUnused`.
This fixes: https://github.com/llvm/llvm-project/issues/188897
Commit: dea9b6e1493e663fd7f07f486d96a14d7fbf1cad
https://github.com/llvm/llvm-project/commit/dea9b6e1493e663fd7f07f486d96a14d7fbf1cad
Author: David Truby <david.truby at arm.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M flang-rt/lib/runtime/time-intrinsic.cpp
M flang/include/flang/Common/windows-include.h
Log Message:
-----------
[flang-rt] Add implementation for date_and_time on Windows (#190174)
Commit: 24833808df27fe0b27b4491617dae746dec301ba
https://github.com/llvm/llvm-project/commit/24833808df27fe0b27b4491617dae746dec301ba
Author: Srivarshitha M <mvarshitha17874 at gmail.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenCUDANV.cpp
M clang/test/CIR/CodeGenCUDA/kernel-call.cu
Log Message:
-----------
[CIR][CUDA][HIP] Support stream per thread kernel launch (#188004)
Related: #175871, #179278
When `-fgpu-default-stream=per-thread` is specified, CUDA and HIP
kernels should be launched using the per-thread stream variants of the
launch API instead of the default `cudaLaunchKernel`/`hipLaunchKernel`.
This PR implements that by selecting the correct launch function name in
`emitDeviceStubBodyNew`:
For CUDA: `cudaLaunchKernel_ptsz`
For HIP: `hipLaunchKernel_spt`
This matches the behavior of the OG CodeGen implementation in
`CGCUDANV.cpp`.
Commit: ff400edc1f90533f844a5fd1c3b0e0b110095945
https://github.com/llvm/llvm-project/commit/ff400edc1f90533f844a5fd1c3b0e0b110095945
Author: Peter Collingbourne <pcc at google.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/Demangle/BUILD.gn
Log Message:
-----------
gn build: Port 7162f191b8ce
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/190882
Commit: fb392aeb3d6196ec39a91798b30f5fec6bed1390
https://github.com/llvm/llvm-project/commit/fb392aeb3d6196ec39a91798b30f5fec6bed1390
Author: Michael <michael at mshires.net>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M llvm/lib/Target/X86/X86InstrInfo.cpp
A llvm/test/CodeGen/X86/apx/pr190557.ll
Log Message:
-----------
[X86][APX] Fix segfault in foldMemoryOperandImpl for two-address NDD fold (#190562)
The NoNDDM code path in foldMemoryOperandImpl assumed
NewMI->getOperand(1) is always a register. When IsTwoAddr is true,
fuseTwoAddrInst replaces operands 0-4 with memory address components, so
getOperand(1) is the immediate, not a register. Calling setReg() causes
a segfault in removeOperandFromUseList.
Skip the NoNDDM COPY block when IsTwoAddr is true, since the two-address
fold already correctly handles the dest==src1 constraint.
I believe the issue was introduced with #189222 , the 'NoNDDM' block
calls 'NewMI->getOperand(1).setReg()', but after 'fuseTwoAddrInst',
operand 1 is an immediate, not a register.
Passes all APX regression tests. Unit test included in commit. Fixes
issue #190557.
First time submitting a PR to the LLVM project, please let me know if I
need to fix something! Tagging @phoebewang and @RKSimon as potential
review candidates.
Commit: 37c6cfe1c3888d9af8c9b4b17eccbc8a94447903
https://github.com/llvm/llvm-project/commit/37c6cfe1c3888d9af8c9b4b17eccbc8a94447903
Author: Abhinav Garg <abhinav.garg at amd.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.s.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.s.buffer.load.ll
A llvm/test/CodeGen/AMDGPU/s-buffer-load-mmo-offsets.ll
Log Message:
-----------
[AMDGPU] Fix incorrect MachineMemOperand offsets and sizes in wide s_buffer_load splits (#189890)
When G_AMDGPU_S_BUFFER_LOAD (or its SelectionDAG equivalent) falls back
to MUBUF due to a divergent offset, wide loads (256-bit, 512-bit) are
split into multiple 128-bit chunks. Both code paths that perform this
split had bugs in how they annotated MachineMemOperand (MMO) metadata on
each chunk instruction — reporting wrong offsets and wrong sizes. This
does not affect generated assembly correctness but degrades the analysis
if that MMO metadata is used.
---------
Co-authored-by: Abhinav Garg <abhigarg at amd.com>
Co-authored-by: Jay Foad <jay.foad at gmail.com>
Commit: 1ad91beba9fe14c152370a5d116aa020478a01c3
https://github.com/llvm/llvm-project/commit/1ad91beba9fe14c152370a5d116aa020478a01c3
Author: Takashi Idobe <idobetakashi at gmail.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M llvm/lib/CodeGen/TwoAddressInstructionPass.cpp
M llvm/test/CodeGen/X86/mul-lohi-no-implicit-copy.ll
M llvm/test/CodeGen/X86/pr78897.ll
M llvm/test/CodeGen/X86/tailcallstack64.ll
M llvm/test/CodeGen/X86/tailccstack64.ll
A llvm/test/CodeGen/X86/two-address-subreg-to-reg-kill.mir
Log Message:
-----------
[CodeGen] relax kill copy hoist restriction for vreg to phys reg copies with folded loads (#190304)
Resolves: https://github.com/llvm/llvm-project/issues/62452
Currently, `TwoAddressInstructionPass` has a blanket rule against moving
kill copies, since many copies are better handled later by coalescing.
However, that rule is too strict when the kill is a virtual register to
physical register copy and the current two-address instruction has a
folded load. In that case, keeping the copy in place can force the pass
to break the folded rm form into a mov rm + op rr, even though the
physical register copy itself cannot be coalesced away in the usual
sense.
This fixes a missed optimization where a folded IMUL64rm was rewritten
into MOV64rm + IMUL64rr because a later $rax = COPY %src was kept in
place for mul.
Commit: 4d18039c63bfd3750e87cc44c9f5af98f0affc10
https://github.com/llvm/llvm-project/commit/4d18039c63bfd3750e87cc44c9f5af98f0affc10
Author: Sudharsan Veeravalli <svs at qti.qualcomm.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoXqci.td
M llvm/test/CodeGen/RISCV/xqciac.ll
Log Message:
-----------
[RISCV] Lower (select c, y, 0) -> (qc.muliadd c, y-1) (#190323)
This can be compressed in some cases so prefer `QC_MULIADD` to
`QC_SHLADD`.
Commit: 0f16b90d99855251b1768a370ad9797801197a29
https://github.com/llvm/llvm-project/commit/0f16b90d99855251b1768a370ad9797801197a29
Author: Jim Lin <jim at andestech.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoZvdot4a8i.td
A llvm/test/CodeGen/RISCV/rvv/commutable-zvdot4a8i.ll
Log Message:
-----------
[RISCV] Add isCommutable for VDOTA4 and VDOTA4U (#190090)
Mark PseudoVDOTA4_VV and PseudoVDOTA4U_VV as commutable since both
source operands have the same signedness. VDOTA4SU is left
non-commutable because its operands differ in signedness (signed x
unsigned).
Add findCommutedOpIndices cases for the new commutable pseudos and
a test covering commutable and non-commutable dot product variants.
---------
Co-authored-by: Claude Opus 4.6 <noreply at anthropic.com>
Commit: 55a041baf3d14c24fb5a87254bc55305c7e8f7ce
https://github.com/llvm/llvm-project/commit/55a041baf3d14c24fb5a87254bc55305c7e8f7ce
Author: Ryotaro Kasuga <kasuga.ryotaro at fujitsu.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M llvm/lib/Analysis/DependenceAnalysis.cpp
M llvm/test/Analysis/DependenceAnalysis/Banerjee.ll
M llvm/test/Analysis/DependenceAnalysis/Constraints.ll
M llvm/test/Analysis/DependenceAnalysis/MismatchingNestLevels.ll
M llvm/test/Analysis/DependenceAnalysis/NonCanonicalizedSubscript.ll
M llvm/test/Analysis/DependenceAnalysis/PreliminaryNoValidityCheckFixedSize.ll
M llvm/test/Analysis/DependenceAnalysis/Propagating.ll
M llvm/test/Analysis/DependenceAnalysis/SameSDLoops.ll
M llvm/test/Analysis/DependenceAnalysis/rdiv-minor-algebra.ll
M llvm/test/Transforms/LoopInterchange/large-nested-6d.ll
Log Message:
-----------
[DA] Move no-wrap flag check into checkSubscript (#190770)
Recent patches added no-wrap flag checks to each dependence test (except
for the Banerjee MIV test) to make them sound. These fixes have been
applied one by one to ensure that each dependence test was correctly
updated and the defects were properly addressed. However, ideally, these
functions should not be called at all when the required no-wrap flags
are not set. Specifically, `classifyPair` should tag pairs as
`NonLinear` when either addrec doesn't have the no-wrap flag, which
means that the addrec is as literal non-linear.
This patch moves the existing no-wrap flag checks in the each dependence
test to `checkSubscript`, which is called by `classifyPair`. With this
change, if the addrec doesn't have the no-wrap flag, the pair will be
classified as `NonLinear` and the dependence test will not be invoked at
all. I believe this change makes the code cleaner and consistent with
the meaning of `NonLinear` classification.
Note that this patch doesn't take care of the behavioral change caused
by the Benerjee MIV test, as the test is still not sound and there are
no plans to fix it in the near future.
Commit: 59b1515c070ed10292d75bcc416d6ba1af13090f
https://github.com/llvm/llvm-project/commit/59b1515c070ed10292d75bcc416d6ba1af13090f
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
Log Message:
-----------
[SelectionDAG] Fix typo Chian->Chain. NFC (#190874)
Commit: 7071feb157c700bada63035395632c4192532919
https://github.com/llvm/llvm-project/commit/7071feb157c700bada63035395632c4192532919
Author: Deric C. <cheung.deric at gmail.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M clang/include/clang/Basic/HLSLIntrinsics.td
M clang/lib/Headers/hlsl/hlsl_alias_intrinsics.h
M clang/test/SemaHLSL/BuiltIns/cross-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/f16tof32-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/f32tof16-errors.hlsl
M clang/test/SemaHLSL/WaveBuiltinAvailability.hlsl
Log Message:
-----------
[HLSL] Rewrite HLSL alias intrinsics into TableGen (#188814)
This PR will close issue
https://github.com/llvm/llvm-project/issues/188345 after PR
https://github.com/llvm/llvm-project/pull/188362.
This PR rewrites all applicable alias intrinsics from
`hlsl_alias_intrinsics.h` into TableGen (`HLSLIntrinsics.td`).
There are no significant test changes with this PR.
The generated `hlsl_alias_intrinsics_gen.h` can be seen here:
https://gist.github.com/Icohedron/5b9ed2638da0966e3c7514dcb5095197
The generated `hlsl_inline_intrinsics_gen.h` is the same as in
https://github.com/llvm/llvm-project/pull/188362 since this PR does not
add or modify any inline intrinsics definitions.
Assisted-by: GitHub Copilot
Commit: 413e58089506bea5b8373a1f639987e769b99fc6
https://github.com/llvm/llvm-project/commit/413e58089506bea5b8373a1f639987e769b99fc6
Author: Victor Chernyakin <chernyakin.victor.j at outlook.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M clang-tools-extra/clang-tidy/ClangTidyCheck.h
M clang-tools-extra/clang-tidy/bugprone/DynamicStaticInitializersCheck.cpp
M clang-tools-extra/clang-tidy/bugprone/DynamicStaticInitializersCheck.h
M clang-tools-extra/clang-tidy/bugprone/SuspiciousIncludeCheck.cpp
M clang-tools-extra/clang-tidy/bugprone/SuspiciousIncludeCheck.h
M clang-tools-extra/clang-tidy/google/GlobalNamesInHeadersCheck.cpp
M clang-tools-extra/clang-tidy/google/GlobalNamesInHeadersCheck.h
M clang-tools-extra/clang-tidy/llvmlibc/InlineFunctionDeclCheck.cpp
M clang-tools-extra/clang-tidy/llvmlibc/InlineFunctionDeclCheck.h
M clang-tools-extra/clang-tidy/misc/AnonymousNamespaceInHeaderCheck.cpp
M clang-tools-extra/clang-tidy/misc/AnonymousNamespaceInHeaderCheck.h
M clang-tools-extra/clang-tidy/misc/DefinitionsInHeadersCheck.cpp
M clang-tools-extra/clang-tidy/misc/DefinitionsInHeadersCheck.h
M clang-tools-extra/clang-tidy/misc/UnusedUsingDeclsCheck.cpp
M clang-tools-extra/clang-tidy/misc/UnusedUsingDeclsCheck.h
M clang-tools-extra/clang-tidy/misc/UseAnonymousNamespaceCheck.cpp
M clang-tools-extra/clang-tidy/misc/UseAnonymousNamespaceCheck.h
M clang-tools-extra/clang-tidy/misc/UseInternalLinkageCheck.cpp
M clang-tools-extra/clang-tidy/misc/UseInternalLinkageCheck.h
M clang-tools-extra/clang-tidy/utils/HeaderGuard.cpp
M clang-tools-extra/clang-tidy/utils/HeaderGuard.h
Log Message:
-----------
[clang-tidy][NFC] Don't store a redundant copy of `HeaderFileExtensions` in every check (#190302)
#80333 removed local `HeaderFileExtensions` options; now there's just
the global option, and its value lives in the `ClangTidyContext`. But
every check still stores its own copy of it, a vestige of the old design
which this change fixes.
Commit: 2c0b3b9e421cfffcb6802c9bdfeca9485cd806f5
https://github.com/llvm/llvm-project/commit/2c0b3b9e421cfffcb6802c9bdfeca9485cd806f5
Author: Chuanqi Xu <yedeng.yd at linux.alibaba.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M clang/lib/AST/StmtProfile.cpp
Log Message:
-----------
[NFC] Correct comments grammar and refine it (#190895)
Following https://github.com/llvm/llvm-project/pull/190732
Commit: 9b831391779331d9d03eec642ecc3e2d36cd013c
https://github.com/llvm/llvm-project/commit/9b831391779331d9d03eec642ecc3e2d36cd013c
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M flang/lib/Semantics/expression.cpp
M flang/test/Semantics/cuf04.cuf
Log Message:
-----------
[flang][cuda] Relax check on chevron syntax for bind(c) callee (#190861)
Commit: d7ed5e523c67ba004fab06ecd88eed527746564d
https://github.com/llvm/llvm-project/commit/d7ed5e523c67ba004fab06ecd88eed527746564d
Author: Fangrui Song <i at maskray.me>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M llvm/unittests/MC/DwarfLineTableHeaders.cpp
Log Message:
-----------
[test] Make MCTargetOptions a class member in DwarfLineTableHeaders (#190904)
Similar to commit 6f0b0ecaba1ba311717f86d8e4d8c6b2b4c4cd4b
createMCAsmInfo will store a pointer to the MCTargetOptions argument in
MCAsmInfo. When MCTargetOptions was a local variable in the constructor,
the pointer dangled after the constructor returned.
Commit: 24c7baf528548f809c86a911e2dc66c1aa3e410f
https://github.com/llvm/llvm-project/commit/24c7baf528548f809c86a911e2dc66c1aa3e410f
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVCallLowering.cpp
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/bitreverse_small_type.ll
R llvm/test/CodeGen/SPIRV/transcoding/OpBitReverse-subbyte.ll
R llvm/test/CodeGen/SPIRV/transcoding/OpBitReverse_i2.ll
A llvm/test/CodeGen/SPIRV/transcoding/subbyte-arg-type-mismatch.ll
Log Message:
-----------
[SPIR-V] Fix sub-byte argument type mismatch in call lowering (#189893)
Remove the `MRI->setType()` call in lowerFormalArguments that was
overriding the vreg LLT with the SPIR-V type's LLT, causing a type
mismatch when sub-byte integer arguments (e.g. i2, i4) were preliminary
widened to i8
related to https://github.com/llvm/llvm-project/issues/188703
Commit: 0584d0a6007173bb8d089c4e3e4163606dc681c4
https://github.com/llvm/llvm-project/commit/0584d0a6007173bb8d089c4e3e4163606dc681c4
Author: Sameer Sahasrabuddhe <sameer.sahasrabuddhe at amd.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M clang/include/clang/Basic/DiagnosticGroups.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/lib/Sema/SemaChecking.cpp
A clang/test/CodeGenHIP/atomic-deprecated-fixit.hip
A clang/test/SemaHIP/atomic-deprecated.hip
Log Message:
-----------
[Clang][HIP] Deprecate __hip_atomic_* builtins (#189897)
Emit deprecation warnings for all __hip_atomic_* builtins,
pointing users to their __scoped_atomic_* equivalents.
The warning is ignored by default, and can be enabled with
-Whip-deprecated-builtins. It will be turned on by default eventually
after we have cleaned up all ROCm/HIP headers and put a deprecation
schedule in place.
Also provide a fixit when the scope is a compile-time constant and there
is a direct mapping from the HIP builtin to a Clang builtin. The
compare_exchange builtins differ in how they accept the desired value,
so only a warning (without a fixit) is emitted for those.
This makes #185408 almost redundant for HIP, since the HIP scopes
themselves will disappear once the `__hip_*` builtins are gone. OpenCL
is different because the language itself specifies an enum. A simpler
version of #185408 can be used to emit a warning when Sema recognizes
that a non-OpenCL builtin is being passed an OpenCL scope.
Assisted-By: Claude Opus 4.6
Commit: 0806ccebb3f00df938ec5e5e80f099cc3c898902
https://github.com/llvm/llvm-project/commit/0806ccebb3f00df938ec5e5e80f099cc3c898902
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
Log Message:
-----------
[LegalizeTypes] Remove stray slash from comment. NFC (#190900)
Commit: 5099f1641e49e5d5a084dcf2155dc8a72257c795
https://github.com/llvm/llvm-project/commit/5099f1641e49e5d5a084dcf2155dc8a72257c795
Author: Aviral Goel <aviralg at users.noreply.github.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M clang/include/clang/ScalableStaticAnalysisFramework/Core/Model/PrivateFieldNames.def
M clang/include/clang/ScalableStaticAnalysisFramework/Core/Serialization/JSONFormat.h
M clang/include/clang/ScalableStaticAnalysisFramework/Core/Serialization/SerializationFormat.h
M clang/include/clang/ScalableStaticAnalysisFramework/Core/WholeProgramAnalysis/DerivedAnalysis.h
M clang/include/clang/ScalableStaticAnalysisFramework/Core/WholeProgramAnalysis/WPASuite.h
M clang/lib/ScalableStaticAnalysisFramework/CMakeLists.txt
M clang/lib/ScalableStaticAnalysisFramework/Core/CMakeLists.txt
M clang/lib/ScalableStaticAnalysisFramework/Core/Serialization/JSONFormat/JSONFormatImpl.cpp
M clang/lib/ScalableStaticAnalysisFramework/Core/Serialization/JSONFormat/JSONFormatImpl.h
A clang/lib/ScalableStaticAnalysisFramework/Core/Serialization/JSONFormat/WPASuite.cpp
A clang/lib/ScalableStaticAnalysisFramework/Plugins/CMakeLists.txt
A clang/lib/ScalableStaticAnalysisFramework/Plugins/ExamplePlugin/AnalysisResults.h
A clang/lib/ScalableStaticAnalysisFramework/Plugins/ExamplePlugin/CMakeLists.txt
A clang/lib/ScalableStaticAnalysisFramework/Plugins/ExamplePlugin/PairsAnalysis.cpp
A clang/lib/ScalableStaticAnalysisFramework/Plugins/ExamplePlugin/TagsAnalysis.cpp
A clang/lib/ScalableStaticAnalysisFramework/Plugins/ExamplePlugin/TagsPairsAnalysis.cpp
A clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/duplicate-analysis-name.json
A clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/missing-results.json
A clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/pairs-result-bad-count.json
A clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/pairs-result-bad-pair-counts.json
A clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/pairs-result-entry-not-object.json
A clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/pairs-result-missing-entity-id.json
A clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/result-entry-analysis-name-not-string.json
A clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/result-entry-deserializer-error.json
A clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/result-entry-missing-analysis-name.json
A clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/result-entry-missing-result-field.json
A clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/result-entry-no-format-info.json
A clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/result-entry-not-object.json
A clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/result-entry-result-not-object.json
A clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/results-not-array.json
A clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/rt-all-results.json
A clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/rt-empty.json
A clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/rt-multiple-results.json
A clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/tags-result-bad-element.json
A clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/tags-result-missing-tags.json
A clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/tagspairs-result-bad-field-type.json
A clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/tagspairs-result-missing-field.json
A clang/test/Analysis/Scalable/ssaf-format/WPASuite/with-plugin.test
A clang/test/Analysis/Scalable/ssaf-format/WPASuite/without-plugin.test
A clang/test/Analysis/Scalable/ssaf-format/lit.local.cfg
M clang/test/CMakeLists.txt
M clang/tools/clang-ssaf-format/CMakeLists.txt
M clang/tools/clang-ssaf-format/SSAFFormat.cpp
M clang/unittests/ScalableStaticAnalysisFramework/Frontend/TUSummaryExtractorFrontendActionTest.cpp
M clang/unittests/ScalableStaticAnalysisFramework/Registries/MockSerializationFormat.cpp
M clang/unittests/ScalableStaticAnalysisFramework/Registries/MockSerializationFormat.h
M clang/unittests/ScalableStaticAnalysisFramework/TestFixture.h
Log Message:
-----------
[clang][ssaf] Add JSONFormat support for WPASuite (#187403)
This patch adds `JSONFormat` serialization support for `WPASuite`.
- Adds `readWPASuite` / `writeWPASuite` to the `SerializationFormat`
abstract interface and implements them in `JSONFormat`.
- Introduces `AnalysisResultRegistryGenerator`, a per-format plugin
registry template in `SerializationFormat`, allowing analysis authors to
register (de)serializers for their `AnalysisResult` subtypes with a
single static declaration.
- Extends `PrivateFieldNames.def` with `WPASuite::Data` and
`WPASuite::IdTable`, and adds a `makeWPASuite()` factory to
`SerializationFormat`, so deserialization code can construct a
`WPASuite` incrementally through the same access-controlled pattern
used for all other SSAF data structures.
Commit: 1578bc684e82f33791b14f59d0cd495ab6789d4d
https://github.com/llvm/llvm-project/commit/1578bc684e82f33791b14f59d0cd495ab6789d4d
Author: Fangrui Song <i at maskray.me>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M bolt/lib/Core/BinaryContext.cpp
M llvm/include/llvm/MC/MCAsmInfo.h
M llvm/include/llvm/MC/MCContext.h
M llvm/include/llvm/MC/TargetRegistry.h
M llvm/lib/MC/ELFObjectWriter.cpp
M llvm/lib/MC/MCAsmStreamer.cpp
M llvm/lib/MC/MCContext.cpp
M llvm/lib/MC/MCObjectStreamer.cpp
M llvm/unittests/CodeGen/MFCommon.inc
M llvm/unittests/CodeGen/MachineInstrTest.cpp
M llvm/unittests/CodeGen/MachineOperandTest.cpp
M llvm/unittests/Target/AArch64/AArch64InstPrinterTest.cpp
Log Message:
-----------
[MC] Move MCTargetOptions pointer from MCContext to MCAsmInfo (#180464)
Except MC-internal `MCAsmInfo()` uses, MCAsmInfo is always constructed
with `const MCTargetOptions &` via `TargetRegistry::createMCAsmInfo`
(https://reviews.llvm.org/D41349). Store the pointer in MCAsmInfo and
change `MCContext::getTargetOptions()` to retrieve it from there,
removing the `MCTargetOptions const *TargetOptions` member from
MCContext.
MCContext's constructor still accepts an MCTargetOptions parameter
for now but is often omitted by call sites.
A subsequent change will remove this parameter and update all callers.
Commit: 04f27644209310f0a06fda5e991bb1788eb1b52d
https://github.com/llvm/llvm-project/commit/04f27644209310f0a06fda5e991bb1788eb1b52d
Author: Aviral Goel <aviralg at users.noreply.github.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M clang/include/clang/ScalableStaticAnalysisFramework/Core/Model/PrivateFieldNames.def
M clang/include/clang/ScalableStaticAnalysisFramework/Core/Serialization/JSONFormat.h
M clang/include/clang/ScalableStaticAnalysisFramework/Core/Serialization/SerializationFormat.h
M clang/include/clang/ScalableStaticAnalysisFramework/Core/WholeProgramAnalysis/DerivedAnalysis.h
M clang/include/clang/ScalableStaticAnalysisFramework/Core/WholeProgramAnalysis/WPASuite.h
M clang/lib/ScalableStaticAnalysisFramework/CMakeLists.txt
M clang/lib/ScalableStaticAnalysisFramework/Core/CMakeLists.txt
M clang/lib/ScalableStaticAnalysisFramework/Core/Serialization/JSONFormat/JSONFormatImpl.cpp
M clang/lib/ScalableStaticAnalysisFramework/Core/Serialization/JSONFormat/JSONFormatImpl.h
R clang/lib/ScalableStaticAnalysisFramework/Core/Serialization/JSONFormat/WPASuite.cpp
R clang/lib/ScalableStaticAnalysisFramework/Plugins/CMakeLists.txt
R clang/lib/ScalableStaticAnalysisFramework/Plugins/ExamplePlugin/AnalysisResults.h
R clang/lib/ScalableStaticAnalysisFramework/Plugins/ExamplePlugin/CMakeLists.txt
R clang/lib/ScalableStaticAnalysisFramework/Plugins/ExamplePlugin/PairsAnalysis.cpp
R clang/lib/ScalableStaticAnalysisFramework/Plugins/ExamplePlugin/TagsAnalysis.cpp
R clang/lib/ScalableStaticAnalysisFramework/Plugins/ExamplePlugin/TagsPairsAnalysis.cpp
R clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/duplicate-analysis-name.json
R clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/missing-results.json
R clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/pairs-result-bad-count.json
R clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/pairs-result-bad-pair-counts.json
R clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/pairs-result-entry-not-object.json
R clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/pairs-result-missing-entity-id.json
R clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/result-entry-analysis-name-not-string.json
R clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/result-entry-deserializer-error.json
R clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/result-entry-missing-analysis-name.json
R clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/result-entry-missing-result-field.json
R clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/result-entry-no-format-info.json
R clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/result-entry-not-object.json
R clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/result-entry-result-not-object.json
R clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/results-not-array.json
R clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/rt-all-results.json
R clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/rt-empty.json
R clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/rt-multiple-results.json
R clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/tags-result-bad-element.json
R clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/tags-result-missing-tags.json
R clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/tagspairs-result-bad-field-type.json
R clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/tagspairs-result-missing-field.json
R clang/test/Analysis/Scalable/ssaf-format/WPASuite/with-plugin.test
R clang/test/Analysis/Scalable/ssaf-format/WPASuite/without-plugin.test
R clang/test/Analysis/Scalable/ssaf-format/lit.local.cfg
M clang/test/CMakeLists.txt
M clang/tools/clang-ssaf-format/CMakeLists.txt
M clang/tools/clang-ssaf-format/SSAFFormat.cpp
M clang/unittests/ScalableStaticAnalysisFramework/Frontend/TUSummaryExtractorFrontendActionTest.cpp
M clang/unittests/ScalableStaticAnalysisFramework/Registries/MockSerializationFormat.cpp
M clang/unittests/ScalableStaticAnalysisFramework/Registries/MockSerializationFormat.h
M clang/unittests/ScalableStaticAnalysisFramework/TestFixture.h
Log Message:
-----------
Revert "[clang][ssaf] Add JSONFormat support for WPASuite (#187403)" (#190909)
This reverts commit 5099f1641e49e5d5a084dcf2155dc8a72257c795 since it breaks buildbots.
Commit: 2186dca2f4eee13d9aed033dc1cd7ed33bd59ca3
https://github.com/llvm/llvm-project/commit/2186dca2f4eee13d9aed033dc1cd7ed33bd59ca3
Author: Baranov Victor <bar.victor.2002 at gmail.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M clang-tools-extra/clang-tidy/cppcoreguidelines/MissingStdForwardCheck.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/test/clang-tidy/checkers/cppcoreguidelines/missing-std-forward.cpp
Log Message:
-----------
[clang-tidy] Fix FP in cppcoreguidelines-missing-std-forward in lambda init-list (#190522)
In `TK_IgnoreUnlessSpelledInSource` mode
[`MatchChildASTVisitor::TraverseLambdaExpr`](https://github.com/llvm/llvm-project/blob/main/clang/lib/ASTMatchers/ASTMatchFinder.cpp#L280)
only calls `match()` on each capture-init expression without recursing
into its children. So for `[t{std::forward<T>(t)}]` the `CallExpr`
nested inside the `InitListExpr` is never visited, and
`ForwardCallMatcher` never binds "call".
Fixes https://github.com/llvm/llvm-project/issues/150446.
Commit: ff071d61654e1b4e8e2cba73e58e418d080812f4
https://github.com/llvm/llvm-project/commit/ff071d61654e1b4e8e2cba73e58e418d080812f4
Author: Kareem Ergawy <kareem.ergawy at amd.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M flang/lib/Optimizer/OpenMP/DoConcurrentConversion.cpp
M flang/test/Transforms/DoConcurrent/reduce_device.mlir
A flang/test/Transforms/DoConcurrent/reduce_device_min.f90
A offload/test/offloading/fortran/do-concurrent-to-omp-min-reduce.f90
Log Message:
-----------
[flang][DoConcurrent] Map reduction variables as tofrom ByRef for device offloading (#189378)
Scalar reduction variables in `do concurrent reduce(...)` were being
mapped with `implicit ByCopy` when offloaded to device, because
`genMapInfoOpForLiveIn` treated all trivial types uniformly. This caused
the reduction result to be silently dropped — the device-side reduction
would compute the correct value but never write it back to the host.
Fix by detecting reduction variables and forcing `implicit tofrom ByRef`
mapping, matching the behavior of explicit
`!$omp target teams distribute parallel do reduction(...)`.
Co-authored-by: ergawy <kareem.ergawy at amd.com>
Co-authored-by: Claude <noreply at anthropic.com>
Made-with: Cursor
Fixes: https://github.com/ROCm/llvm-project/issues/1844
Co-authored-by: Claude <noreply at anthropic.com>
Commit: 71260f8df1124852ca3093d2ec8d2615493471c1
https://github.com/llvm/llvm-project/commit/71260f8df1124852ca3093d2ec8d2615493471c1
Author: Nishant Sachdeva <32475507+nishant-sachdeva at users.noreply.github.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M llvm/test/tools/llvm-ir2vec/bindings/ir2vec-getBBEmbMap.py
M llvm/test/tools/llvm-ir2vec/bindings/ir2vec-getFuncEmb.py
M llvm/test/tools/llvm-ir2vec/bindings/ir2vec-getFuncEmbMap.py
M llvm/test/tools/llvm-ir2vec/bindings/ir2vec-getFuncNames.py
M llvm/test/tools/llvm-ir2vec/bindings/ir2vec-getInstEmbMap.py
M llvm/test/tools/llvm-ir2vec/bindings/ir2vec-initEmbedding.py
M llvm/tools/llvm-ir2vec/Bindings/PyIR2Vec.cpp
M llvm/tools/llvm-ir2vec/lib/Utils.cpp
M llvm/tools/llvm-ir2vec/lib/Utils.h
M llvm/tools/llvm-ir2vec/llvm-ir2vec.cpp
Log Message:
-----------
[llvm-ir2vec] Decoupling Vocab loading from initEmbedding (#190507)
This has been done in order to save time during entire dataset
processing. vocab loading should only happen once.
Commit: f26470aeb7668f437c4d669e4a72c614ba775bb4
https://github.com/llvm/llvm-project/commit/f26470aeb7668f437c4d669e4a72c614ba775bb4
Author: Farid Zakaria <fmzakari at fb.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M lld/ELF/LinkerScript.cpp
M lld/test/ELF/x86-64-section-layout.s
Log Message:
-----------
[lld][ELF] Merge .ltext.* input sections into .ltext output section (#190305)
## Motivation
The default output section name rules in `getOutputSectionName()`
already merge .ldata.*, .lrodata.*, and .lbss.* into their respective
output sections, but .ltext.* was missing from the prefix list. This
caused mcmodel=large builds with `-ffunction-sections` to produce a
separate output section for every function instead of combining them
into .ltext.
We actually then ran into a bunch of esoteric issues because we the had
to handle SHN_XINDEX binaries with >65535 sections, so in that sense it
helped us find those gaps :)
## Changes
Add .ltext to the prefix list alongside the other large-model section
prefixes.
Co-authored-by: Grigory Pastukhov <gpastukhov at meta.com>
Commit: 8c8e998757d9aacb4b1b624a27096a9ea340169a
https://github.com/llvm/llvm-project/commit/8c8e998757d9aacb4b1b624a27096a9ea340169a
Author: Jim Lin <jim at andestech.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoXSfmm.td
Log Message:
-----------
[NFC][RISCV] Fix mismatched closing comment in XSfmm instruction definition (#190898)
The closing comment had XSfmm64a32f but the opening predicate uses
XSfmm32a32f.
Co-authored-by: Claude Opus 4.6 (1M context) <noreply at anthropic.com>
Commit: 8054d3705dced397b24ace5ebc4180963a8e8736
https://github.com/llvm/llvm-project/commit/8054d3705dced397b24ace5ebc4180963a8e8736
Author: Lang Hames <lhames at gmail.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M orc-rt/include/orc-rt/Session.h
M orc-rt/lib/executor/Session.cpp
M orc-rt/unittests/SessionTest.cpp
Log Message:
-----------
[orc-rt] Rename ManagedCodeCallsGroup to ManagedCodeTaskGroup. NFC. (#190880)
The new name better reflects this group's purpose: Tokens are needed for
any task that wants to access managed code, whether to call it or access
data.
Commit: 06b82d1a18791bc966e9b18ac34f63c888d10723
https://github.com/llvm/llvm-project/commit/06b82d1a18791bc966e9b18ac34f63c888d10723
Author: Abinaya Saravanan <asaravan at qti.qualcomm.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M llvm/lib/Target/Hexagon/HexagonOptAddrMode.cpp
A llvm/test/CodeGen/Hexagon/opt-addr-mode-large-unodelist.ll
Log Message:
-----------
[Hexagon] Fix O(N^2) compile-time regression in HexagonOptAddrMode (#189531)
In HexagonOptAddrMode::processAddUses, isSafeToExtLR was called inside
the loop over UNodeList with loop-invariant arguments. isSafeToExtLR
iterates over UNodeList, so the total work was O(N^2) in the number of
uses.
The arguments (AddSN, AddMI, BaseReg, UNodeList) do not change across
iterations. Move the call to after the loop; the function returns the
same value regardless of which iteration calls it, and the complexity
drops to O(N).
Background
----------
Commit 8c0483bba2d2 ("RegisterCoalescer: Fix assert on remat to
copy-to-physreg with subregs") introduced register coalescer
rematerialization changes that produce additional uses of A2_addi
instructions on the Hexagon backend, inflating UNodeList. This exposed
the pre-existing O(N^2) behavior in processAddUses.
Measurements
------------
Input: rkvdec-vdpu383-h264.i (Hexagon kernel driver, -O2)
Tool: hexagon-linux-musl-clang (clang-20)
Scenario | HexagonOptAddrMode | Total
--------------------------------------|-------------------|---------
Before blamed commit (baseline) | 1.35 s | ~195 s
After blamed commit, without fix | 221,845 s | >61 h
After blamed commit, with fix | 52.16 s | ~225 s
Fixes: https://github.com/llvm/llvm-project/issues/178535
Commit: 45791a8e2c58ac9fb3e5a8f3b55e4a91e5d99c74
https://github.com/llvm/llvm-project/commit/45791a8e2c58ac9fb3e5a8f3b55e4a91e5d99c74
Author: Srinivasa Ravi <srinivasar at nvidia.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/NVVMRequiresSMTraits.h
M mlir/include/mlir/Dialect/LLVMIR/NVVMRequiresSMTraits.td
M mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp
M mlir/test/Dialect/LLVMIR/nvvm-check-targetSM.mlir
M mlir/test/lib/Dialect/Test/TestOps.td
Log Message:
-----------
[MLIR][NVVM] Add family-specific support to NVVMRequiresSM traits (#185909)
This change adds support for family-conditional SM version requirements
to the `NVVMRequiresSM` traits. The following new traits are added:
- `NVVMRequiresSMf` - Op requires an SM version belonging to one of the
given families.
- `NVVMRequiresSMaOrSMf` - Op requires one of the supported
arch-accelerated versions or an SM version belonging to one of the given
families.
This also changes the underlying checks to use the `FullSMVersion`
instead of booleans to indicate arch-acceleration and family-specific
support to simplify the checks.
Commit: 1c0b2d3abb04ca92dbbf637b30e25829ef90d859
https://github.com/llvm/llvm-project/commit/1c0b2d3abb04ca92dbbf637b30e25829ef90d859
Author: Matthias Springer <me at m-sp.org>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M mlir/lib/Dialect/Vector/IR/VectorOps.cpp
M mlir/test/Dialect/Vector/canonicalize.mlir
M mlir/test/Dialect/XeGPU/xegpu-vector-linearize.mlir
Log Message:
-----------
[mlir][vector] Replace unused shuffle operands / results with poison (#190763)
If a shuffle operand is not used (as indicated by the mask), replace it
with `ub.poison`. This may make the value dead and enable additional
DCE. Also replace the entire shuffle op with `ub.poison` if all selected
values are poisoned.
Assisted-by: claude-4.6-opus-high
Commit: 6ac4e6faf360356978e934b1c4faa1119c59039c
https://github.com/llvm/llvm-project/commit/6ac4e6faf360356978e934b1c4faa1119c59039c
Author: Tomer Shafir <tomer.shafir8 at gmail.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M llvm/tools/llvm-exegesis/lib/Assembler.cpp
Log Message:
-----------
[llvm-exegesis] Pass data layout explicitly to LLJIT (#190789)
This is a defesive change that aims to make sure the target data layout
of both the object compilation and LLJIT is the same, by passing it
explicitly rather than relying similar auto-detection implicitly.
The patch doesnt add a new test but relies on existing ones, as a test
case of different layouts would require to exhibit a misuse of the tool,
doing cross-compilation to change the layout of the compilation. The
tool is not designed to work this way.
Commit: 1d0b3f223b9384ea9bbe2c8c612fb3ecfc01a08c
https://github.com/llvm/llvm-project/commit/1d0b3f223b9384ea9bbe2c8c612fb3ecfc01a08c
Author: Pavel Labath <pavel at labath.sk>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M libc/docs/CMakeLists.txt
M libc/docs/headers/index.rst
A libc/utils/docgen/sys/socket.yaml
Log Message:
-----------
[libc][docs] Add sys/socket.h implementation status (#190751)
Commit: bcc83ef9af57cd9f3b8a252e2db53843394c79aa
https://github.com/llvm/llvm-project/commit/bcc83ef9af57cd9f3b8a252e2db53843394c79aa
Author: Kleis Auke Wolthuizen <github at kleisauke.nl>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M llvm/utils/git/github-automation.py
Log Message:
-----------
github-automation.py: Use raw strings for regex (#184326)
Avoids a `SyntaxWarning: invalid escape sequence`.
As noticed in:
https://github.com/llvm/llvm-project/actions/runs/22620420192/job/65543770329
https://github.com/llvm/llvm-project/actions/runs/22607027706/job/65501262987
Commit: 5a7aab6e9efc5736ed37f24f8546e52d6e192abe
https://github.com/llvm/llvm-project/commit/5a7aab6e9efc5736ed37f24f8546e52d6e192abe
Author: David Sherwood <david.sherwood at arm.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M llvm/test/Transforms/LoopVectorize/2012-10-20-infloop.ll
M llvm/test/Transforms/LoopVectorize/AArch64/aarch64-unroll.ll
M llvm/test/Transforms/LoopVectorize/AArch64/arm64-unroll.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-chained.ll
M llvm/test/Transforms/LoopVectorize/AArch64/pr33053.ll
M llvm/test/Transforms/LoopVectorize/AArch64/pr36032.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-interleaved-accesses-cost.ll
M llvm/test/Transforms/LoopVectorize/AMDGPU/divergent-runtime-check.ll
M llvm/test/Transforms/LoopVectorize/AMDGPU/unroll-in-loop-vectorizer.ll
M llvm/test/Transforms/LoopVectorize/ARM/active-lane-mask.ll
M llvm/test/Transforms/LoopVectorize/ARM/arm-ieee-vectorize.ll
M llvm/test/Transforms/LoopVectorize/Hexagon/maximum-vf-crash.ll
M llvm/test/Transforms/LoopVectorize/Hexagon/minimum-vf.ll
M llvm/test/Transforms/LoopVectorize/LoongArch/loongarch-interleaved.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/interleave_IC.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/massv-altivec.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/massv-calls.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/massv-unsupported.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/reg-usage.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/stride-vectorization.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/vectorize-bswap.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/vectorize-only-for-real.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/vsx-tsvc-s173.ll
M llvm/test/Transforms/LoopVectorize/RISCV/riscv-interleaved.ll
M llvm/test/Transforms/LoopVectorize/RISCV/riscv-unroll.ll
M llvm/test/Transforms/LoopVectorize/RISCV/short-trip-count.ll
M llvm/test/Transforms/LoopVectorize/RISCV/unroll-in-loop-vectorizer.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-half.ll
M llvm/test/Transforms/LoopVectorize/X86/already-vectorized.ll
M llvm/test/Transforms/LoopVectorize/X86/consecutive-ptr-cg-bug.ll
M llvm/test/Transforms/LoopVectorize/X86/fp_to_sint8-cost-model.ll
M llvm/test/Transforms/LoopVectorize/X86/int128_no_gather.ll
M llvm/test/Transforms/LoopVectorize/X86/interleaved-accesses-use-after-free.ll
M llvm/test/Transforms/LoopVectorize/X86/masked_load_store.ll
M llvm/test/Transforms/LoopVectorize/X86/no-vector.ll
M llvm/test/Transforms/LoopVectorize/X86/no_fpmath.ll
M llvm/test/Transforms/LoopVectorize/X86/no_fpmath_with_hotness.ll
M llvm/test/Transforms/LoopVectorize/X86/pr35432.ll
M llvm/test/Transforms/LoopVectorize/X86/pr48340.ll
M llvm/test/Transforms/LoopVectorize/X86/register-assumption.ll
M llvm/test/Transforms/LoopVectorize/X86/scatter_crash.ll
M llvm/test/Transforms/LoopVectorize/X86/strided_load_cost.ll
M llvm/test/Transforms/LoopVectorize/X86/tail_loop_folding.ll
M llvm/test/Transforms/LoopVectorize/X86/uint64_to_fp64-cost-model.ll
M llvm/test/Transforms/LoopVectorize/X86/vector_ptr_load_store.ll
M llvm/test/Transforms/LoopVectorize/X86/vectorization-remarks-missed.ll
M llvm/test/Transforms/LoopVectorize/assume.ll
M llvm/test/Transforms/LoopVectorize/conditional-assignment.ll
M llvm/test/Transforms/LoopVectorize/control-flow.ll
M llvm/test/Transforms/LoopVectorize/dbg.value.ll
M llvm/test/Transforms/LoopVectorize/dereferenceable-info-from-assumption-variable-size.ll
M llvm/test/Transforms/LoopVectorize/diag-missing-instr-debug-loc.ll
M llvm/test/Transforms/LoopVectorize/diag-with-hotness-info-2.ll
M llvm/test/Transforms/LoopVectorize/diag-with-hotness-info.ll
M llvm/test/Transforms/LoopVectorize/ee-crash.ll
M llvm/test/Transforms/LoopVectorize/global_alias.ll
M llvm/test/Transforms/LoopVectorize/if-reduction.ll
M llvm/test/Transforms/LoopVectorize/incorrect-dom-info.ll
M llvm/test/Transforms/LoopVectorize/induction.ll
M llvm/test/Transforms/LoopVectorize/int_sideeffect.ll
M llvm/test/Transforms/LoopVectorize/no_array_bounds.ll
M llvm/test/Transforms/LoopVectorize/no_switch.ll
M llvm/test/Transforms/LoopVectorize/no_switch_disable_vectorization.ll
M llvm/test/Transforms/LoopVectorize/pointer-induction.ll
M llvm/test/Transforms/LoopVectorize/reuse-lcssa-phi-scev-expansion.ll
M llvm/test/Transforms/LoopVectorize/scalable-assume.ll
Log Message:
-----------
[LV][NFC] Remove more unused function attributes from tests (#190786)
Following on from PR #188185 I've removed some more function attributes
from tests that weren't adding any value. As part of this patch I've
also removed some unnecessary `Function Attrs:` comments that live above
functions.
I suspect that there are other attributes that can be removed, for
example see ARM/arm-ieee-vectorize.ll. However, I haven't had chance to
look into these yet as they are more FP and/or target specific and
perhaps require more thought.
Commit: 8e9737804061a2c10db90a69362ee26e3ee4a7bf
https://github.com/llvm/llvm-project/commit/8e9737804061a2c10db90a69362ee26e3ee4a7bf
Author: Sameer Sahasrabuddhe <sameer.sahasrabuddhe at amd.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M llvm/test/CodeGen/AMDGPU/asyncmark-pregfx12.ll
Log Message:
-----------
[NFC][AMDGPU] don't test asyncmark for non-async variants on pre-gfx12 (#190774)
The test for asyncmark on pref-gfx12 targets, checks the effect of async
marks on both async and non-async instructions. This is achieved by a
sed invocation in the RUN line to remove the .async from intrinsic name.
Such a test serves no purpose other than a minor flex. The two sets of
CHECK lines using the WITH and WITHOUT prefix are not easy to compare by
a simple eyeballing. Eliminating this hack makes it easier to add GISEL
variants later. With and without GISEL, the combinations will increase
to four instead of the current two.
Assisted-By: Claude Opus 4.6
Commit: d46af3a78dea1dfb0a6f319e7abbcd6b6e2df64e
https://github.com/llvm/llvm-project/commit/d46af3a78dea1dfb0a6f319e7abbcd6b6e2df64e
Author: Sameer Sahasrabuddhe <sameer.sahasrabuddhe at amd.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
M llvm/test/CodeGen/AMDGPU/asyncmark-gfx12plus.ll
Log Message:
-----------
[AMDGPU] Fix duplicate s_wait_asynccnt on gfx12-plus (#190906)
S_WAIT_ASYNCCNT was missing from counterTypeForInstr(), so isWaitInstr() did not recognize it as a wait instruction. On the fixpoint algorithm's second pass over a loop body, the already-inserted S_WAIT_ASYNCCNT was treated as a normal instruction, causing WAIT_ASYNCMARK to be re-processed and a duplicate S_WAIT_ASYNCCNT to be emitted.
Assisted-By: Claude Opus 4.6
Commit: e54d7ffd55b2acd59b404f1e5af9c68538e4da08
https://github.com/llvm/llvm-project/commit/e54d7ffd55b2acd59b404f1e5af9c68538e4da08
Author: Nathan Gauër <brioche at google.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M clang/lib/Basic/Targets/SPIR.h
M clang/lib/CodeGen/Targets/SPIR.cpp
M clang/test/CodeGenHLSL/builtins/splitdouble.hlsl
M clang/test/CodeGenHLSL/semantics/SV_Position.ps.hlsl
M clang/test/CodeGenHLSL/semantics/SV_Position.vs.hlsl
M clang/test/CodeGenHLSL/semantics/SV_Target.ps.hlsl
M clang/test/CodeGenHLSL/semantics/semantic.arbitrary.hlsl
M clang/test/CodeGenHLSL/semantics/semantic.array.hlsl
M clang/test/CodeGenHLSL/semantics/semantic.array.output.hlsl
M clang/test/CodeGenHLSL/semantics/semantic.explicit-location-output-struct.hlsl
M clang/test/CodeGenHLSL/semantics/semantic.explicit-location.hlsl
M clang/test/CodeGenHLSL/semantics/semantic.explicit-mix-builtin.hlsl
M clang/test/CodeGenHLSL/semantics/semantic.explicit-mix.lib.hlsl
M clang/test/CodeGenHLSL/vk-features/vk.pushconstant.anon-struct.hlsl
M clang/test/CodeGenHLSL/vk-input-builtin.hlsl
M clang/test/CodeGenHLSL/vk-output-builtin.hlsl
M llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp
M llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.h
M llvm/lib/Target/SPIRV/SPIRVSubtarget.cpp
M llvm/lib/TargetParser/TargetDataLayout.cpp
M llvm/test/CodeGen/SPIRV/hlsl-resources/Packed.ll
M llvm/test/CodeGen/SPIRV/hlsl-resources/cbuffer-peeled-array.ll
M llvm/test/CodeGen/SPIRV/pointers/load-vector-from-array-of-vectors.ll
M llvm/test/CodeGen/SPIRV/spirv-explicit-layout.ll
A llvm/test/CodeGen/SPIRV/vk-pushconstant-layout-natural.ll
M llvm/test/CodeGen/SPIRV/vk-pushconstant-layout.ll
M llvm/unittests/Target/SPIRV/SPIRVGlobalRegistryTests.cpp
Log Message:
-----------
[SPIR-V] Change DL for logical SPIR-V (#190807)
This PR originates from bogner@ draft PR. It modifies the triple for
logical SPIR-V to use the new vector sizing feature.
This means updating the tests, and fix one codegen issue:
on the old datalayout, we knew a float3 allocation size was the
same as a float4 allocation. This is now invalid, thus
a store `<4 x float>` into a `<3 x float>` allocation is UB.
Commit: 30a99ce6b4da71654374266537eb88cd845869f6
https://github.com/llvm/llvm-project/commit/30a99ce6b4da71654374266537eb88cd845869f6
Author: Felipe de Azevedo Piovezan <fpiovezan at apple.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M lldb/source/Target/Process.cpp
Log Message:
-----------
[lldb][NFC] Add helper to compute breakpoint's constituent load address (#190762)
This allows the callsite to be simplified.
This also exposes a bug where the variable `ShouldShowError` is guarding
more than the error printing.
Commit: 24799f17429838bd17c16c43e7ed0e85cff78fd7
https://github.com/llvm/llvm-project/commit/24799f17429838bd17c16c43e7ed0e85cff78fd7
Author: Alex Langford <alangford at apple.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M lldb/packages/Python/lldbsuite/test/lldbutil.py
Log Message:
-----------
Reapply "[lldb] Increase timeout on lldbutil.wait_for_file_on_target" (#190833)
Reapplication notes:
After reviewing the test failures that caused the original reverts, I'm
not convinced that this change is related. None of the test failures
failed while timing out waiting for a file.
Original Summary:
I've been tracking sporadic timeouts waiting for a file to appear on
macOS buildbots (and occasionally local development environments). I
believe I've tracked it down to a regression in process launch
performance in macOS.
What I noticed is that running multiple test suites simultaneously
almost always triggered these failures and that the tests were always
waiting on files created by the inferior. Increasing this timeout no
longer triggers the failures on my loaded machine locally.
This timeout moves from about 16 seconds of total wait time to about 127
seconds of total wait time. This may feel a bit extreme, but this is a
performance issue. While I was here, I cleaned up logging code I was
using to investigate the test failures.
rdar://172122213
Commit: efc0bcdf542475301805ed8478a5d5845f44dc53
https://github.com/llvm/llvm-project/commit/efc0bcdf542475301805ed8478a5d5845f44dc53
Author: David Spickett <david.spickett at arm.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M lldb/include/lldb/Interpreter/CommandReturnObject.h
M lldb/source/Commands/CommandObjectMemory.cpp
M lldb/source/Commands/CommandObjectPlatform.cpp
M lldb/source/Commands/CommandObjectTarget.cpp
M lldb/source/Commands/CommandObjectThread.cpp
M lldb/source/Interpreter/CommandInterpreter.cpp
M lldb/source/Interpreter/CommandReturnObject.cpp
Log Message:
-----------
[lldb] Use GetOutputStream instead of repeated AppendMessageWithFormat (#189674)
AppendMessageWithFormat is odd because it's the only AppendMessage...
method that does not add a newline for you.
This PR changes places that use it to output raw text, or build
up a large message. They now use GetOutputStream() instead,
which makes it a bit clearer that we're building one big message,
and where newlines end up.
This removes the last callers of AppendMessageWithFormat, so I am
removing it too.
Commit: 470ba560b7726c385b2899460151565aca4d89d7
https://github.com/llvm/llvm-project/commit/470ba560b7726c385b2899460151565aca4d89d7
Author: A. Jiang <de34 at live.cn>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M libcxx/include/__memory/shared_ptr.h
M libcxx/test/std/utilities/memory/util.smartptr/util.smartptr.shared/util.smartptr.shared.create/allocate_shared.array.unbounded.pass.cpp
M libcxx/test/std/utilities/memory/util.smartptr/util.smartptr.shared/util.smartptr.shared.create/make_shared.array.unbounded.pass.cpp
Log Message:
-----------
[libc++] Properly calculate rounded-up size for `{allocate,make}_shared` (#190315)
Previously, the allocated size might be a bit too small for certain
cases. This patch makes the size calculated with potentially larger
alignment of the whole control block.
Commit: f89b9a0792d011d41dcae0465e9e14facd073e9d
https://github.com/llvm/llvm-project/commit/f89b9a0792d011d41dcae0465e9e14facd073e9d
Author: Hood Chatham <roberthoodchatham at gmail.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M llvm/lib/Target/WebAssembly/WebAssemblyCFGStackify.cpp
M llvm/test/CodeGen/WebAssembly/cfg-stackify-eh-legacy.ll
M llvm/test/CodeGen/WebAssembly/cfg-stackify-eh.ll
M llvm/test/CodeGen/WebAssembly/exception-legacy.ll
M llvm/test/CodeGen/WebAssembly/exception.ll
Log Message:
-----------
[WebAssembly] Fix: fixCallUnwindMismatches after fixCatchUnwindMismatches (#187484)
`fixCallUnwindMismatches()` adds an extra try block around call sites
with incorrect unwind targets. `fixCatchUnwindMismatches()` handles
catch blocks that have incorrect next unwind destinations. Previously we
ran `fixCallUnwindMismatches()` first and then ran
`fixCatchUnwindMismatches()`. The problem is that
`fixCatchUnwindMismatches()` wraps entire try blocks which can change
the unwind destination of the calls inside. If the calls had an
incorrect unwind target to begin with, they will be wrapped already and
so the outer wrapping won't alter their unwind target. However, if they
start out with a correct unwind target, they won't get wrapped and then
that can be messed up by `fixCatchUnwindMismatches()`.
The fix is to run `fixCatchUnwindMismatches()` first.
`fixCallUnwindMismatches()` never messes up the result of
`fixCatchUnwindMismatches()` so this is the correct order.
Resolves #187302
Commit: d4570181674dd6bfb4c7ac3fe663a2578e7ed3a9
https://github.com/llvm/llvm-project/commit/d4570181674dd6bfb4c7ac3fe663a2578e7ed3a9
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M lldb/packages/Python/lldbsuite/test/make/libcxx-simulators-common/compressed_pair.h
Log Message:
-----------
[lldb][test] Remove libc++ dependency in common libcxx-simulators header (#190922)
After we made the test-suite mostly compile against system libc++ (in
https://github.com/llvm/llvm-project/pull/190034), the `invalid-vector`
test started failing on the macOS bots with:
```
/Applications/Xcode.app/Contents/Developer/Platforms/MacOSX.platform/Developer/SDKs/MacOSX15.2.sdk/usr/include/c++/v1 -std=c++20 --driver-mode=g++ -MT main.o -MD -MP -MF main.d -c -o main.o /Users/ec2-user/jenkins/workspace/llvm.org/lldb-cmake/llvm-project/lldb/test/API/functionalities/data-formatter/data-formatter-stl/libcxx-simulators/invalid-vector/main.cpp
[2026-04-07T00:09:44.764Z] /Users/ec2-user/jenkins/workspace/llvm.org/lldb-cmake/llvm-project/lldb/test/API/functionalities/data-formatter/data-formatter-stl/libcxx-simulators/invalid-vector/main.cpp:6:1: error: too few template parameters in template redeclaration
[2026-04-07T00:09:44.764Z] 6 | template <typename T> struct vector {
[2026-04-07T00:09:44.764Z] | ^~~~~~~~~~~~~~~~~~~~~
[2026-04-07T00:09:44.764Z] /Applications/Xcode.app/Contents/Developer/Platforms/MacOSX.platform/Developer/SDKs/MacOSX15.2.sdk/usr/include/c++/v1/iosfwd:167:1: note: previous template declaration is here
[2026-04-07T00:09:44.764Z] 167 | template <class _Tp, class _Alloc = allocator<_Tp> >
[2026-04-07T00:09:44.764Z] | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
```
This patch fixes the error by removing the STL header includes from the
`compressed_pair.h` header. Presumably the `vector` forward declaration
somehow gets pulled in via one of those headers (via `iosfwd`).
The `libcxx-simulators` tests are supposed to be STL-independent, so
removing this dependency works towards that goal.
Commit: b74ac14362679f5dd74d40d1c04b714b988e8374
https://github.com/llvm/llvm-project/commit/b74ac14362679f5dd74d40d1c04b714b988e8374
Author: Sameer Sahasrabuddhe <sameer.sahasrabuddhe at amd.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/test/CodeGen/AMDGPU/asyncmark-gfx12plus.ll
M llvm/test/CodeGen/AMDGPU/asyncmark-max-pregfx12.ll
M llvm/test/CodeGen/AMDGPU/asyncmark-pregfx12.ll
Log Message:
-----------
[AMDGPU] Fix async operations in GlobalISel on gfx12-plus (#190776)
For GFX1250 async LDS intrinsics, map the LDS pointer operand to VGPR
instead of SGPR. These instructions use $vdst/$vdata (VGPROp_32) for the
LDS address, unlike the pre-GFX12 variants which use M0 (SGPR).
Assisted-By: Claude Opus 4.6
Commit: 3140942ee0cca43976e35e2b9efcb3b0784d1214
https://github.com/llvm/llvm-project/commit/3140942ee0cca43976e35e2b9efcb3b0784d1214
Author: David Spickett <david.spickett at arm.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M lldb/include/lldb/Interpreter/CommandReturnObject.h
M lldb/source/Interpreter/CommandReturnObject.cpp
Log Message:
-----------
[lldb] Remove "AppendNoteWithFormat(" (#190941)
This method is surprising because it does not automatically add a
newline like AppendNoteWithFormatv and other AppendNote... functions.
If you need to manage the newlines yourself, you should add an
equivalent of GetOutputStream for notes. See
efc0bcdf542475301805ed8478a5d5845f44dc53 for examples of that done for
messages.
AppendNoteWithFormat( is not used at all either (there are a few callers
of `AppendNoteWithFormatv(`).
Commit: 2033dc430689b4db6c1b22e87d8f9a61edc9e8f6
https://github.com/llvm/llvm-project/commit/2033dc430689b4db6c1b22e87d8f9a61edc9e8f6
Author: Paul Walker <paul.walker at arm.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/test/CodeGen/AArch64/arm64-vcvt-fptoi.ll
M llvm/test/CodeGen/AArch64/bf16-v8-instructions.ll
M llvm/test/CodeGen/AArch64/faddp-half.ll
M llvm/test/CodeGen/AArch64/fcvt_combine.ll
M llvm/test/CodeGen/AArch64/fmla.ll
M llvm/test/CodeGen/AArch64/vecreduce-fadd.ll
M llvm/test/CodeGen/AArch64/vecreduce-fmul.ll
Log Message:
-----------
[LLVM][CodeGen][AArch64] Replace tablegen based lowering of vector half/bfloat operations. (#190164)
We were essentially doing lowering via instruction selection. This patch
removes the tablegen patterns and modifies their operation actions so
they get lowered in the traditional manner.
Commit: ae825cb8cea7f3ac8e5e4096f22713845cf5e501
https://github.com/llvm/llvm-project/commit/ae825cb8cea7f3ac8e5e4096f22713845cf5e501
Author: Zinovy Nis <zinovy.nis at gmail.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M clang-tools-extra/clang-tidy/modernize/UseStringViewCheck.cpp
M clang-tools-extra/docs/clang-tidy/checks/modernize/use-string-view.rst
M clang-tools-extra/test/clang-tidy/checkers/modernize/use-string-view.cpp
Log Message:
-----------
[clang-tidy] Skip overloaded functions in modernize-use-string-view (#183921)
Commit: 3f3d27b428e44de6209674389f2c6c54374acf11
https://github.com/llvm/llvm-project/commit/3f3d27b428e44de6209674389f2c6c54374acf11
Author: Robert Konicar <rkonicar at mail.muni.cz>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M mlir/include/mlir/IR/EnumAttr.td
M mlir/test/lib/Dialect/Test/TestAttrDefs.td
M mlir/test/lib/Dialect/Test/TestEnumDefs.td
M mlir/test/lib/Dialect/Test/TestOps.td
M mlir/test/mlir-tblgen/enums-gen.td
Log Message:
-----------
[MLIR] Add I{8,16}Enum tablegen classes (#190825)
Add utility tablegen classes for creating 8 and 16 bit enums,
simplifying defining enums that fit into smaller types.
Commit: 73a2b9043ebc9e92fb0dcdeb45dc91fb2abeff4b
https://github.com/llvm/llvm-project/commit/73a2b9043ebc9e92fb0dcdeb45dc91fb2abeff4b
Author: David Spickett <david.spickett at arm.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M lldb/docs/use/aarch64-linux.md
M lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp
M lldb/test/API/linux/aarch64/sme_only_registers/TestSMEOnlyRegisters.py
M llvm/docs/ReleaseNotes.md
Log Message:
-----------
[lldb][AArch64][Linux] Handle SME only and kernels < 6.19 (#189982)
Part of #138717.
The feature we need to use to restore non-streaming mode after an
expression enters streaming mode was only added recently in kernel 6.19.
There is no other way to restore this state, so I have adjusted the code
to use the normal FP restore path for every state other than: on an SME
only system and in streaming mode and restoring non-streaming state
If that fails, we're on < 6.19 and all we can do is accept it and
restore the rest of the register state.
I've updated the tests to check kernel version and for < 6.19 remove any
expression tests that hit this specific state. I could have set up
expected state for them, but it's basically undefined behaviour, and I
think it would make the already complex tests even worse.
Documentation now mentions the required version, and release notes link
to that documentation.
Tested on an ARM FVP configured to SME only with kernel 6.18 and 6.19,
and a Graviton 3 with only SVE.
Commit: ddb9ede93313a787dfe8b40748c3c2a530024f76
https://github.com/llvm/llvm-project/commit/ddb9ede93313a787dfe8b40748c3c2a530024f76
Author: Paul Walker <paul.walker at arm.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M llvm/lib/Transforms/Instrumentation/NumericalStabilitySanitizer.cpp
M llvm/test/Instrumentation/NumericalStabilitySanitizer/non_float_store.ll
Log Message:
-----------
[LLVM][NumericalStabilitySanitizer] Extend shadow value tracking to support vector ConstantInts. (#190794)
Commit: ac9c8d11a8fe2c24c5fa20d0d705cd892c14ea12
https://github.com/llvm/llvm-project/commit/ac9c8d11a8fe2c24c5fa20d0d705cd892c14ea12
Author: Sergei Barannikov <barannikov88 at gmail.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M lldb/source/Expression/DWARFExpression.cpp
Log Message:
-----------
[lldb] Replace C-style casts with static_cast in DWARFExpression.cpp (NFC) (#190949)
Suggested in #190556.
Commit: 7ca5698b4c3698d06065e0941df7f23d72913d23
https://github.com/llvm/llvm-project/commit/7ca5698b4c3698d06065e0941df7f23d72913d23
Author: Martin Storsjö <martin at martin.st>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M lld/COFF/InputFiles.cpp
M lld/test/COFF/gnu-weak.test
A lld/test/COFF/weak-preference.test
Log Message:
-----------
[LLD] [COFF] Make weak aliases to implementations take priority over null pointers (#190491)
Normally, one uses weak aliases in one out of two ways.
Either one uses weak definitions to let a weak definition work as
fallback if a strong definition isn't available (which works with
link.exe as well), or as a sort of selectany COMDAT, to let multiple
weak definitions coexist, letting the linker pick any of them. (This
isn't supported by MS link.exe, but requires the LLD extension option
-lld-allow-duplicate-weak, normally implied by the mingw mode.)
Or, one uses weak references, to let a referencing translation unit
check at runtime, whether a symbol was found (at link time) or not,
optionally using the symbol.
In the latter case, the referencing object file provides a fallback
value for the weak symbol, as an absolute null symbol.
Previously, if we had multiple weak externals for the same symbol, we'd
pick any (the first one in practice); this is compatible with either of
the use cases above.
However if both use cases are combined, then we suddenly have multiple
conflicting weak externals for the same symbol; both one (or more)
symbols providing a fallback implementation for the symbol, and the
referencer that provides an absolute null pointer for the symbol.
In these cases, instead of just picking whichever choice the linker saw
first, prefer actual concrete implementations over the absolute null
symbol.
For mingw mode, this makes linking a translation unit referencing a
symbol declared with `__attribute__((weak))` work consistently if
linking it against another translation unit providing that symbol
defined with `__attribute__((weak))`, regardless of the order that those
two object files are linked.
Commit: bc057a38b1b66a27e0c976b544c73ff34fe9eb3a
https://github.com/llvm/llvm-project/commit/bc057a38b1b66a27e0c976b544c73ff34fe9eb3a
Author: Paul Walker <paul.walker at arm.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/test/CodeGen/AArch64/sve-fixed-length-fp-to-int.ll
M llvm/test/CodeGen/AArch64/sve-fixed-length-int-div.ll
M llvm/test/CodeGen/AArch64/sve-fixed-length-int-rem.ll
Log Message:
-----------
[LLVM][CodeGen][AArch64] Improve generated code for SVE VLS truncates. (#190778)
When SVE VLS is enabled we request custom lowering for all ISD::TRUNCATE
operations involving legal types. However, we only custom lower all of
them when NEON is not available and so there are variants that do not
require SVE and can be done via NEON but we are instead falling back to
default expansion, which is this case means scalarisation. This patch
updates custom lowering to mark the variants that have isel patterns
available.
Commit: b384622f61e8ced35b80d9cc02a0c47c0778b878
https://github.com/llvm/llvm-project/commit/b384622f61e8ced35b80d9cc02a0c47c0778b878
Author: Martin Storsjö <martin at martin.st>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M lld/COFF/SymbolTable.cpp
M lld/test/COFF/export-all-conflict.test
Log Message:
-----------
[LLD] [COFF] Explicitly prefer def files and export directives over /export-all-symbols (#190749)
If a def file is specified (or explicit export directives), they should
be preferred over exports from /export-all-symbols. There is no need to
warn about conflicts in these cases, just make a clear preference and
ignore the export with lower preference.
Commit: 66eae4245dfe7177f9a5681912a6dedc14755d05
https://github.com/llvm/llvm-project/commit/66eae4245dfe7177f9a5681912a6dedc14755d05
Author: Sergei Barannikov <barannikov88 at gmail.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M lldb/include/lldb/Expression/DWARFExpression.h
M lldb/source/Expression/CMakeLists.txt
M lldb/source/Expression/DWARFExpression.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFUnit.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFUnit.h
M lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARF.h
M lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARFDwo.cpp
M lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARFDwo.h
M lldb/source/Plugins/SymbolFile/DWARF/SymbolFileWasm.cpp
M lldb/source/Plugins/SymbolFile/DWARF/SymbolFileWasm.h
M lldb/unittests/Expression/DWARFExpressionTest.cpp
M llvm/include/llvm/DebugInfo/DWARF/LowLevel/DWARFExpression.h
Log Message:
-----------
[lldb] Use llvm::DWARFExpression::iterator in DWARFExpression::Evaluate (#190556)
Co-authored-by: Jonas Devlieghere <jonas at devlieghere.com>
Commit: db61d1c24512f106d2c7392e5a7dcb499418e39a
https://github.com/llvm/llvm-project/commit/db61d1c24512f106d2c7392e5a7dcb499418e39a
Author: Lang Hames <lhames at gmail.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M orc-rt/include/orc-rt/QueueingTaskDispatcher.h
M orc-rt/lib/executor/QueueingTaskDispatcher.cpp
M orc-rt/unittests/QueueingTaskDispatcherTest.cpp
Log Message:
-----------
[orc-rt] Refactor QueueingTaskDispatcher to use an external TaskQueue. (#190920)
QueueingTaskDispatcher now takes a TaskQueue by reference rather than
maintaining an internal queue. This lets API clients retain direct
access to the queue after transferring dispatcher ownership to the
Session.
TaskQueue operations (takeFirstIn, takeLastIn) are blocking: callers
wait until a task arrives or the queue is shut down. This enables a
simple client idiom:
```
QueueingTaskDispatcher::TaskQueue TQ;
Session S(std::make_unique<QueueingTaskDispatcher>(TQ), ...);
S.attach(<controller access>);
while (auto T = TQ.takeFirstIn())
T->run();
```
Commit: ada53836f39434770625149002e7d955c381aee0
https://github.com/llvm/llvm-project/commit/ada53836f39434770625149002e7d955c381aee0
Author: David Spickett <david.spickett at arm.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M lldb/test/API/linux/aarch64/sme_only_registers/TestSMEOnlyRegisters.py
A lldb/test/API/linux/aarch64/sme_only_registers/core_simd_on_32
A lldb/test/API/linux/aarch64/sme_only_registers/core_streaming_off_64
M lldb/test/API/linux/aarch64/sme_only_registers/main.c
Log Message:
-----------
[lldb][AArch64][Linux] Add tests for SME only core files (#189985)
Part of #138717.
This did not require any changes to core file handling. Since a static
snapshot of an SME only system looks pretty much the same as one from
the same state on a system with SVE and SME.
For this reason, we're only testing 2 combinations. In total these
include streaming and non-streaming, ZA on and off, and 2 different
vector lengths. I think this is enough to prove that the existing code
is working.
Commit: 5616ad71697e3ef2ab97a937250e9193eee5713d
https://github.com/llvm/llvm-project/commit/5616ad71697e3ef2ab97a937250e9193eee5713d
Author: Lewis Crawford <lcrawford at nvidia.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M llvm/lib/Analysis/ConstantFolding.cpp
M llvm/lib/Target/NVPTX/NVPTXTargetTransformInfo.cpp
M llvm/test/CodeGen/NVPTX/math-intrins-sm80-ptx70-instcombine.ll
M llvm/test/Transforms/InstCombine/NVPTX/nvvm-intrins.ll
Log Message:
-----------
[NVPTX] Lower nvvm.fmax to maximumnum not maxnum (#189976)
Converting nvvm.{fmin/fmax} into llvm.{min/max}num is slightly
incorrect, as {min/max}(a, sNaN) should produce "a" according to the PTX
spec, but LLVM's {min/max}num intrinsics may return either NaN or "a".
Use the {min/max}imumnum intrinsics instead for correct sNaN behaviour.
Also tidy up NVVM FMin/FMax constant-folding using these tighter
definitions of how the NVVM intrinsics map to {min/max}imum and
{min/max}imumnum.
Commit: daf7a8f835c6c385934d73e67bafbf81daaebf5e
https://github.com/llvm/llvm-project/commit/daf7a8f835c6c385934d73e67bafbf81daaebf5e
Author: Rafał Rudnicki <rafal.rudnicki at intel.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUMCInstLower.cpp
M llvm/lib/Target/AMDGPU/AMDGPURewriteAGPRCopyMFMA.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
A llvm/test/CodeGen/AMDGPU/inline-asm-vgpr-range-unsupported-width.ll
Log Message:
-----------
AMDGPU coverity fixes (#182013)
Coverity fixes
Commit: 903cfcf1fe19a01443dce38d68d9b5e5bd730c83
https://github.com/llvm/llvm-project/commit/903cfcf1fe19a01443dce38d68d9b5e5bd730c83
Author: Prerona Chaudhuri <43287592+pchaudhuri-nv at users.noreply.github.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M llvm/include/llvm/IR/IntrinsicsNVVM.td
A llvm/test/CodeGen/NVPTX/dead-shfl.ll
Log Message:
-----------
[NVVM] Update properties for non-sync variants of the SHFL intrinsics (#189615)
Non-sync SHFL variants (shfl without .sync) are pure functions of their SSA operands and the active thread mask. Assign IntrReadMem, IntrInaccessibleMemOnly and IntrWillReturn so that: - Reading the implicit mask state is modeled for correct ordering with other convergent operations - Truly dead non-sync shfl code can still be DCE'd
Sync SHFL variants keep IntrInaccessibleMemOnly (no IntrReadMem, no IntrWillReturn) to model synchronization side effects and prevent unsafe DCE/reordering.
Commit: c7c340b41e4fe424f0f5f68be2f2812ac6d17b41
https://github.com/llvm/llvm-project/commit/c7c340b41e4fe424f0f5f68be2f2812ac6d17b41
Author: Lakreite <lakreite at gmail.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
A llvm/test/CodeGen/AMDGPU/amdgpu-simplify-demanded-bits-for-target-node.ll
R llvm/test/CodeGen/AMDGPU/amdgpu-simplify-demanded-bits-readfirstlane.ll
M llvm/test/CodeGen/AMDGPU/fix-sgpr-copies-wwm.ll
M llvm/test/CodeGen/AMDGPU/fix-wwm-vgpr-copy.ll
Log Message:
-----------
[AMDGPU][CodeGen] Implement SimplifyDemandedBitsForTargetNode for readlane, wwm and set.inactive intrinsics. (#190830)
Propagate demanded bits through readlane, wwm, set.inactive intrinsics
in AMDGPUISelLowering in SimplifyDemandedBitsForTargetNode.
This allows upstream zero/sign extensions to be eliminated when only a
subset of bits is used after intrinsics.
Partially addresses https://github.com/llvm/llvm-project/issues/128390.
Commit: 9e428b7e41ee891cddc911fb70bc23b4997e1d9b
https://github.com/llvm/llvm-project/commit/9e428b7e41ee891cddc911fb70bc23b4997e1d9b
Author: Nathan Gauër <brioche at google.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M llvm/docs/ProgrammersManual.rst
M llvm/include/llvm/Support/Error.h
M llvm/unittests/Support/ErrorTest.cpp
Log Message:
-----------
[LLVM][Support] add nonNull function helper (#188718)
We often see a pattern like:
```
T *ptr = doSomething()
assert(ptr && "doSomething() shouldn't return nullptr");
```
We also have functions like `cantFail`, but those are working with
Expected types.
This commits adds a `nonNull` function, which can be used inline. In
practice, one could use:
```
T *ptr = cast<T>(functionReturningT());
```
But it conveys the meaning that `functionReturningT` might return a
subtype/supertype that we actually cast.
Function behaves like the other error kinds: calls llvm_unreachable,
which may or may not trap depending on the build options. Calling this
function with `nullptr` won't build, but it makes no sense to do so.
---------
Co-authored-by: Jakub Kuderski <kubakuderski at gmail.com>
Commit: ab6394d21a595cf95cb1429a2f0e5779959abce1
https://github.com/llvm/llvm-project/commit/ab6394d21a595cf95cb1429a2f0e5779959abce1
Author: Stefan Gränitz <stefan.graenitz at gmail.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M lldb/source/Plugins/SymbolLocator/SymStore/SymbolLocatorSymStore.cpp
M lldb/test/API/symstore/TestSymStore.py
A llvm/include/llvm/Support/HTTP/StreamedHTTPResponseHandler.h
M llvm/lib/Debuginfod/Debuginfod.cpp
M llvm/lib/Support/HTTP/CMakeLists.txt
A llvm/lib/Support/HTTP/StreamedHTTPResponseHandler.cpp
Log Message:
-----------
[lldb] Bring Debuginfod's StreamedHTTPResponseHandler to SymbolLocatorSymStore (#187687)
SymbolLocatorSymStore used a simple local implementation of
HTTPResponseHandler so far. That was fine for basic usage, but it would
cause issues down the line. This patch hoists the
StreamedHTTPResponseHandler class from libDebuginfod to SupportHTTP and
integrates it in SymbolLocatorSymStore. PDB file downloads will now be
buffered on disk, which is necessary since they can be huge.
We use the opportunity an stop logging 404 responses (file not found on
server) and print warnings for all other erroneous HTTP responses. It
was more complicated before, because the old response handler created
the underlying file in any case. The new one does that only once the
first content package comes in.
Commit: f65341ccfd3f5fbd25663a2d0509ab8d8b9a7a39
https://github.com/llvm/llvm-project/commit/f65341ccfd3f5fbd25663a2d0509ab8d8b9a7a39
Author: zGoldthorpe <Zach.Goldthorpe at amd.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/test/CodeGen/AMDGPU/frem.ll
M llvm/test/CodeGen/AMDGPU/fsqrt.f64.ll
M llvm/test/CodeGen/AMDGPU/llvm.frexp.ll
M llvm/test/CodeGen/AMDGPU/rsq.f64.ll
A llvm/test/CodeGen/AMDGPU/setcc-f64-hi32mask.ll
Log Message:
-----------
[AMDGPU][ISel] Reduce `f64` compare to integer compare of upper half (#188356)
Truncate `f64` `setcc`s to upper 32-bit operands where possible.
These transformations are analogous to those in #181238, but for ordered
and unordered fp comparisons.
Fixes #187996.
Alive2 verification of transformations:
- For `eq` / `ne`: [ZRciR6](https://alive2.llvm.org/ce/z/ZRciR6)
- For `lt` / `ge`: [RDGnqr](https://alive2.llvm.org/ce/z/RDGnqr)
- For `le` / `gt`: [v0jlD5](https://alive2.llvm.org/ce/z/v0jlD5)
Commit: 39c6ed3d080435426d606db70ecceda1cce311bb
https://github.com/llvm/llvm-project/commit/39c6ed3d080435426d606db70ecceda1cce311bb
Author: alowqie <areida at pm.me>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenBuilder.h
M clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp
M clang/test/CodeGen/AArch64/neon-intrinsics.c
M clang/test/CodeGen/AArch64/neon/intrinsics.c
Log Message:
-----------
[CIR][AArch64] add vshr_* builtins (#186693)
Part of https://github.com/llvm/llvm-project/issues/185382
- Moved lowering logic from clangir incubator to upstream
- Added tests, partially reusing tests from
[neon-intrinsics.c](https://github.com/llvm/llvm-project/blob/main/clang/test/CodeGen/AArch64/neon-intrinsics.c)
and
[neon.c](https://github.com/llvm/clangir/blob/main/clang/test/CIR/CodeGen/AArch64/neon.c)
- Made sure that all intrinsics from [Neon
ACLE](https://arm-software.github.io/acle/neon_intrinsics/advsimd.html#vector-shift-right)
are implemented and tested
Commit: 68f138b904588cb33b084ef09726f174db1809d1
https://github.com/llvm/llvm-project/commit/68f138b904588cb33b084ef09726f174db1809d1
Author: Graham Hunter <graham.hunter at arm.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp
M llvm/test/Transforms/InstCombine/truncating-saturate.ll
Log Message:
-----------
[InstCombine] Match a new form of truncating saturation (#189703)
This matches a pattern that clamps an integer value to the range for an
integer type with a smaller bitwidth, before truncating to that type.
alive2: https://alive2.llvm.org/ce/z/WPfmyS
Commit: 1f1ea1ae4151746a03d43cb7b55411d3bd7878bf
https://github.com/llvm/llvm-project/commit/1f1ea1ae4151746a03d43cb7b55411d3bd7878bf
Author: Kai Nacke <kai.peter.nacke at ibm.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
R clang/include/clang/Basic/BuiltinsSystemZ.def
A clang/include/clang/Basic/BuiltinsSystemZ.td
M clang/include/clang/Basic/CMakeLists.txt
M clang/include/clang/Basic/TargetBuiltins.h
M clang/include/module.modulemap
M clang/lib/Basic/Targets/SystemZ.cpp
M clang/utils/TableGen/ClangBuiltinsEmitter.cpp
Log Message:
-----------
[SystemZ] Migrate BuiltinsSystemZ.def to TableGen (#190232)
Migrates BuiltinsSystemZ.def to BuiltinsSystemZ.td, and makes the
necessary code updates. It also introduce type `__uint128_t` to the
TableGen emitter, to have a type for the encoding `ULLLi`.
Migration was done with the help of a script generated by IBM Bob.
Commit: de0cb1cd04891ee7024667ef97e5f30af8a9ff47
https://github.com/llvm/llvm-project/commit/de0cb1cd04891ee7024667ef97e5f30af8a9ff47
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M lldb/include/lldb/Target/Process.h
M lldb/source/Plugins/LanguageRuntime/ObjC/AppleObjCRuntime/AppleObjCRuntimeV2.cpp
M lldb/source/Target/Process.cpp
M lldb/unittests/Target/MemoryTest.cpp
Log Message:
-----------
[lldb] Upstream and adopt ReadUnsignedIntegersFromMemory in AppleObjCRuntimeV2 (#190564)
This PR upstreams ReadUnsignedIntegersFromMemory, which uses the
MultiMemRead packet to speed up reading unsigned numbers from memory.
Felipe landed this on Github because we didn't have a use-case for it
upstream, until now, which uses it to batch up reading ObjC runtime
symbols.
Commit: f73f8754cabd4caf3c9989d8f542d2b9a9f85d07
https://github.com/llvm/llvm-project/commit/f73f8754cabd4caf3c9989d8f542d2b9a9f85d07
Author: lonely eagle <2020382038 at qq.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M mlir/lib/Transforms/CSE.cpp
M mlir/test/Transforms/cse.mlir
Log Message:
-----------
[mlir][CSE] Delete dead code immediately in CSE pass (#190926)
This PR addresses an issue where dead code within a region prevents
essentially identical region ops from being CSE'd. Currently, CSE only
removes dead ops at the end of the pass. This PR fixes the issue by
deleting dead code immediately upon encounter.
Commit: 73e2b0e64186e2386d777e936c92bb25a995a0f4
https://github.com/llvm/llvm-project/commit/73e2b0e64186e2386d777e936c92bb25a995a0f4
Author: adams381 <adams at nvidia.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIRTypes.td
M clang/lib/CIR/CodeGen/CIRGenTypes.cpp
M clang/lib/CIR/Dialect/IR/CIRTypes.cpp
A clang/test/CIR/CodeGen/bitint.c
M clang/test/CIR/CodeGenBuiltins/builtins-overflow.cpp
A clang/test/CIR/IR/bitint.cir
M clang/test/CIR/global-var-simple.cpp
Log Message:
-----------
[CIR][ABI] Add _BitInt flag to IntType (#188113)
Add an optional `bitint` parameter to `cir::IntType` so CIR can
distinguish `_BitInt(N)` from builtin integer types like `__int128`.
Both lower to the same LLVM integer type, but they have different ABI
rules (alignment, passing convention) on x86_64.
The flag is set during CIRGen for `Type::BitInt`, printed/parsed as
`!cir.int<s, 128, bitint>`, and excluded from `isFundamental()`.
Existing 2-arg `IntType::get()` calls continue to work via a default
parameter.
Commit: 2dae0f61cf845d50368f4f5bc9d3e3f92fc41138
https://github.com/llvm/llvm-project/commit/2dae0f61cf845d50368f4f5bc9d3e3f92fc41138
Author: Wendi <uwendi at gmail.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M llvm/docs/QualGroup.rst
Log Message:
-----------
[QualGroup][docs] Clarify biannual membership review and active contributor status (#185884)
This patch updates the LLVM Qualification Group page to reflect the
outcome of the first biannual membership review (Feb 2026).
Changes include:
- clarifying that the members table reflects active contributors,
- removing non-active contributors from the active members list,
- distinguishing active contributors from observers / interested
participants,
- updating the membership review section to describe the biannual review
process.
This is a documentation/process update only.
Commit: 7cb66a448ace7ae2acd84e7e9bec73cfc560efe0
https://github.com/llvm/llvm-project/commit/7cb66a448ace7ae2acd84e7e9bec73cfc560efe0
Author: Fernando Pelliccioni <fpelliccioni at gmail.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M libcxx/docs/Status/Cxx2cIssues.csv
M libcxx/include/__new/placement_new_delete.h
M libcxx/include/new
M libcxx/test/std/language.support/support.dynamic/new.delete/new.delete.placement/new.pass.cpp
M libcxx/test/std/language.support/support.dynamic/new.delete/new.delete.placement/new_array.pass.cpp
Log Message:
-----------
[libc++] Implement LWG4477: placement operator delete should be constexpr (#189915)
Implement the proposed resolution of
[LWG4477](https://cplusplus.github.io/LWG/issue4477).
P2747R2 made placement `operator new` constexpr since C++26, but the
corresponding placement `operator delete` was not. When a constructor
throws during placement new in a constant expression, the placement
delete is invoked and fails because it's not constexpr.
Add `_LIBCPP_CONSTEXPR_SINCE_CXX26` to placement `operator delete(void*,
void*)` and `operator delete[](void*, void*)`.
Closes #189843
Commit: e8606ab23ea1dfbafbd8af0356f7ccede2c67503
https://github.com/llvm/llvm-project/commit/e8606ab23ea1dfbafbd8af0356f7ccede2c67503
Author: forking-google-bazel-bot[bot] <265904573+forking-google-bazel-bot[bot]@users.noreply.github.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/clang/BUILD.bazel
Log Message:
-----------
[Bazel] Fixes 1f1ea1a (#190971)
This fixes 1f1ea1ae4151746a03d43cb7b55411d3bd7878bf.
Co-authored-by: Google Bazel Bot <google-bazel-bot at google.com>
Commit: 5fe235b9862f7fb87012eb06bd71890fa5f41736
https://github.com/llvm/llvm-project/commit/5fe235b9862f7fb87012eb06bd71890fa5f41736
Author: Brian Cain <brian.cain at oss.qualcomm.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M bolt/lib/Rewrite/RewriteInstance.cpp
Log Message:
-----------
[BOLT] Fix strict weak ordering in getCodeSections comparator (#190905)
The compareSections lambda in getCodeSections() violates the strict weak
ordering requirement: when A == B, the comparator can return true (e.g.
via the HotText mover name check), which triggers a _GLIBCXX_DEBUG
assertion on self-comparison.
Add an early identity check to satisfy irreflexivity.
Commit: 49094aff8f03413adcd6463b9c5afadcddc83893
https://github.com/llvm/llvm-project/commit/49094aff8f03413adcd6463b9c5afadcddc83893
Author: Tom Eccles <tom.eccles at arm.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M mlir/include/mlir/Dialect/OpenMP/OpenMPOps.td
M mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
M mlir/test/Dialect/OpenMP/invalid.mlir
Log Message:
-----------
[mlir][OpenMP] Don't allow loop bounds/step from inside the task (#190827)
The omp.taskloop.context region represents what goes inside the outlined
task function. The loop bounds must be passed to the OpenMP runtime call
for taskloop and so this cannot be supported in general.
In a follow up patch I will re-allow pure operations because sinking
constants inside of the tasklooop context will be useful for something
else I am prototyping.
Assisted-by: codex
Commit: 4b00302c99e034777568e943cbdadaa7b47d8c9d
https://github.com/llvm/llvm-project/commit/4b00302c99e034777568e943cbdadaa7b47d8c9d
Author: Ramkumar Ramachandra <artagnon at tenstorrent.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanAnalysis.cpp
M llvm/unittests/Transforms/Vectorize/VPDomTreeTest.cpp
Log Message:
-----------
[VPlan] Strip VPDT-assert forbidding replicate regions (#189342)
VPDominatorTree::properlyDominates currently unnecessarily forbids
replicate regions, as there is no such limitation either in the parent
DominatorTree, or in VPlanCFG. Strip the assert entirely.
Commit: 857edabe190323bc98c14642c907e8e4762ce272
https://github.com/llvm/llvm-project/commit/857edabe190323bc98c14642c907e8e4762ce272
Author: David Spickett <david.spickett at arm.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M lldb/source/Commands/CommandObjectCommands.cpp
M lldb/source/Commands/CommandObjectDisassemble.cpp
M lldb/source/Commands/CommandObjectMemory.cpp
M lldb/source/Commands/CommandObjectProcess.cpp
M lldb/source/Commands/CommandObjectSource.cpp
M lldb/source/Commands/CommandObjectTarget.cpp
M lldb/source/Commands/CommandObjectType.cpp
Log Message:
-----------
[lldb] Convert AppendWarningWithFormat( calls to AppendWarningWithFormatv( (#190951)
The former does not automatically add a newline like the majority of the
other AppendSomethingWithSomething calls do.
So this PR changes all but 1 use of that function to the Formatv version
and removes the explicit newline from the format strings. I also took
advantage of Formatv's ability to handle StringRef and std::string
automatically.
There is one use of AppendWarningWithFormat left, which I will address
in a follow up since it's not so straightforward.
Commit: fba30d5b089e2cd89c45048c0ba64421f03115d4
https://github.com/llvm/llvm-project/commit/fba30d5b089e2cd89c45048c0ba64421f03115d4
Author: David Spickett <david.spickett at arm.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M lldb/include/lldb/Interpreter/CommandReturnObject.h
M lldb/source/Commands/CommandObjectProcess.cpp
M lldb/source/Interpreter/CommandReturnObject.cpp
Log Message:
-----------
[lldb] Remove last use of AppendWarningWithFormat( (#190958)
And remove the function entirely as there are now no
callers.
This last use of AppendWarningWithFormat does not
include a newline in the format string, but I suspect
that it should have done, so I am ok to convert it.
It was added by 56535a090d91ff10a60c884bacbd314dcf9659db,
and the other branches of the if/else will add newlines.
Also it seems like an important message that would benefit
from being on its own line.
There are no tests that expect this specific message,
which makes some sense as it seems to have been added
to cover a race condition that only sometimes happens.
Commit: 96b9266fdaa5b89d8a2f09c162de5404073bc693
https://github.com/llvm/llvm-project/commit/96b9266fdaa5b89d8a2f09c162de5404073bc693
Author: Tomohiro Kashiwada <kikairoya at gmail.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M clang/include/clang/ScalableStaticAnalysisFramework/Core/TUSummary/ExtractorRegistry.h
M clang/lib/ScalableStaticAnalysisFramework/Core/TUSummary/ExtractorRegistry.cpp
M llvm/include/llvm/Support/Registry.h
Log Message:
-----------
[LLVM][Support] Enforce proper instantiations of `Registry<T>` (#185141)
Commit: b17f85c680de3c66b089727837f61cc0504ad215
https://github.com/llvm/llvm-project/commit/b17f85c680de3c66b089727837f61cc0504ad215
Author: Med Ismail Bennani <ismail at bennani.ma>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M lldb/test/API/functionalities/scripted_frame_provider/thread_filter/TestFrameProviderThreadFilter.py
M lldb/test/API/functionalities/scripted_frame_provider/thread_filter/main.cpp
Log Message:
-----------
[lldb/test] Replace pause() with atomic barrier in thread_filter test (#190917)
The TestFrameProviderThreadFilter test was crashing on the ARM Ubuntu CI
with an assertion in StackFrameList::GetFrameAtIndex ("A valid thread
has no frames."):
https://lab.llvm.org/buildbot/#/builders/18/builds/25501
On ARM Linux, the debugger's stop/resume cycle can cause pause() to
return (EINTR from ptrace signals), letting threads exit before the test
accesses their frames.
Replace pause() with an atomic spin-loop barrier that keeps all threads
alive in userspace at a known, unwinding-friendly location.
Signed-off-by: Med Ismail Bennani <ismail at bennani.ma>
Commit: b6b7f3167bc9def81803d4d4fbf2f03f598d59e4
https://github.com/llvm/llvm-project/commit/b6b7f3167bc9def81803d4d4fbf2f03f598d59e4
Author: Brian Cain <brian.cain at oss.qualcomm.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M clang/lib/Driver/ToolChains/Hexagon.cpp
M clang/test/Driver/hexagon-toolchain-linux.c
Log Message:
-----------
[Hexagon] Add sanitizer-aware library paths for Linux/musl targets (#190267)
When compiling with -fsanitize=memory or -fsanitize=address on
hexagon-unknown-linux-musl, the driver now prepends sanitizer-specific
library paths (e.g. $SYSROOT/usr/lib/msan/) before the normal
$SYSROOT/usr/lib/ so that instrumented libraries (libc, libc++, etc.)
are found first by the linker.
Commit: 9a81d3995949135935602557702abc3cf28d3a40
https://github.com/llvm/llvm-project/commit/9a81d3995949135935602557702abc3cf28d3a40
Author: Zhihui Yang <youngwisdm at gmail.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp
M clang/test/CodeGen/AArch64/neon-intrinsics.c
M clang/test/CodeGen/AArch64/neon/intrinsics.c
Log Message:
-----------
[CIR][AArch64] Upstream NEON Minimum (#187935)
Part of https://github.com/llvm/llvm-project/issues/185382
Added intrinsics for
vmin_*
vminq_*
vminnm_*
vminnmq_*
Commit: abd502a44e5ef19a302d943eeb017c29124b96e9
https://github.com/llvm/llvm-project/commit/abd502a44e5ef19a302d943eeb017c29124b96e9
Author: Zile Xiong <xiongzile at bytedance.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M llvm/lib/Target/X86/X86ISelLoweringCall.cpp
M llvm/test/CodeGen/X86/musttail-struct.ll
Log Message:
-----------
[X86] Fix missing ByValTemporaries update in CopyViaTemp path for musttail calls (#190540)
This fixes a miscompilation in musttail calls with byval arguments on
X86.
In the CopyViaTemp path, a temporary stack object is created and the
argument is copied into it.
However, the temporary is not recorded in ByValTemporaries,
so the final lowering phase does not emit the copy to the real outgoing
argument slot.
As a result, the callee may read incorrect values from the stack.
Fix this by recording the temporary in ByValTemporaries so that the
final lowering step correctly copies the argument to the expected stack
location.
Reproducer: https://github.com/llvm/llvm-project/issues/190429
Commit: ecbba86f5984f45f65dff3da0c1e2dc5e31f457e
https://github.com/llvm/llvm-project/commit/ecbba86f5984f45f65dff3da0c1e2dc5e31f457e
Author: vangthao95 <vang.thao at amd.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.gws.init.ll
Log Message:
-----------
[AMDGPU][NFC] Auto-generate ds.gws.init test checks (#190811)
Update ds.gws.init to use auto-generated checks. Missed this test in the
previous pre-commit.
Commit: 5c8c4d8fde0b28135ef071827c6d60ddac5766dc
https://github.com/llvm/llvm-project/commit/5c8c4d8fde0b28135ef071827c6d60ddac5766dc
Author: Chinmay Deshpande <chdeshpa at amd.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeHelper.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.wmma_32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.wmma_64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w64-imm.ll
Log Message:
-----------
[AMDGPU][GISel] RegBankLegalize support for WMMA intrinsics (#190724)
Commit: f3155f00c95916ab9a8800f2c03fdf533f8ada72
https://github.com/llvm/llvm-project/commit/f3155f00c95916ab9a8800f2c03fdf533f8ada72
Author: Deric C. <cheung.deric at gmail.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M clang/include/clang/Basic/HLSLIntrinsics.td
M clang/lib/Headers/hlsl/hlsl_alias_intrinsics.h
M clang/test/SemaHLSL/WaveBuiltinAvailability.hlsl
M clang/test/TableGen/hlsl-intrinsics.td
M clang/utils/TableGen/HLSLEmitter.cpp
Log Message:
-----------
[HLSL] Add missing Shader Model 6.0 availability for wave intrinsics (#189445)
Depends on PR #188814 to be merged first.
This PR fixes Shader Model availability for HLSL wave intrinsics so that
they all require at least SM 6.0.
Furthermore, there wasn't an easy way to specify Shader Model 6.0
availability while maintaining the requirement for Shader Model 6.2 when
16-bit types is enabled and the overload uses half types.
To fix the issue, this PR extends `_HLSL_16BIT_AVAILABILITY` to accept a
3rd optional argument that specifies the Shader Model availability when
16-bit types is disabled.
Example:
```hlsl
// If 16-bit types is enabled, require SM 6.2. Else, require SM 6.0 otherwise.
_HLSL_16BIT_AVAILABILITY(shadermodel, 6.2, 6.0)
_HLSL_BUILTIN_ALIAS(__builtin_hlsl_wave_active_all_equal)
__attribute__((convergent)) bool WaveActiveAllEqual(half);
```
The new `hlsl_alias_intrinsics_gen.inc`:
https://gist.github.com/Icohedron/a6e88efd56de384659efd3314c43851f
Assisted-by: GitHub Copilot
Commit: cd66d79be19b6db00500ba4508b3946ef1caec88
https://github.com/llvm/llvm-project/commit/cd66d79be19b6db00500ba4508b3946ef1caec88
Author: pkarveti <pkarveti at qti.qualcomm.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M llvm/lib/Target/Hexagon/HexagonMachineFunctionInfo.cpp
M llvm/lib/Target/Hexagon/HexagonMachineFunctionInfo.h
M llvm/lib/Target/Hexagon/HexagonRegisterInfo.cpp
M llvm/lib/Target/Hexagon/HexagonTargetMachine.cpp
M llvm/lib/Target/Hexagon/HexagonTargetMachine.h
M llvm/test/CodeGen/Hexagon/aligna-prologue-expansion.mir
Log Message:
-----------
[Hexagon][MIR] Serialize HexagonMachineFunctionInfo::StackAlignBaseReg to MIR (#190003)
This patch adds serialization of HexagonMachineFunctionInfo::StackAlignBaseReg
into MIR. This field stores the physical register used as the aligned-stack base pointer
when a function has both variable-sized stack objects and requires stack
alignment greater than the default.
This replaces the workaround from commit 2e10b6299591 ("[Hexagon] Add AP
register to liveins when used for frame index access") which manually added
AP to liveins. That approach was incorrect because it only updated one
block without updating predecessors, breaking liveness invariants.
Commit: 7056d00090d037469ef304794bf685e79c749886
https://github.com/llvm/llvm-project/commit/7056d00090d037469ef304794bf685e79c749886
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/test/Transforms/InstCombine/clamp-to-minmax.ll
Log Message:
-----------
[InstCombine][ValueTracking] Add m_FMinNum and m_FMaxNum to matchFastFloatClamp. (#188149)
This allows us to recognize clamp patterns if the first part of the
clamp has been turned into minnum/maxnum.
Commit: 0030f5996a690eb539f76fc0075d7d7831b36458
https://github.com/llvm/llvm-project/commit/0030f5996a690eb539f76fc0075d7d7831b36458
Author: Kyungtak Woo <kevinwkt at google.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64.h
M llvm/lib/Target/AArch64/AArch64PassRegistry.def
M llvm/lib/Target/AArch64/AArch64RedundantCopyElimination.cpp
M llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
M llvm/test/CodeGen/AArch64/machine-copy-remove.mir
M llvm/test/CodeGen/AArch64/machine-zero-copy-remove.mir
Log Message:
-----------
[NewPM] Port AArch64RedundantCopyElimination (#190582)
Adds a newPM pass for AArch64RedundantCopyElimination
- Refactors base logic into an Impl class
- Renames old pass with the "Legacy" suffix
- Adds the new pass manager pass using refactored logic
- Updated existing .mir tests to also test with the New Pass Manager.
Context and motivation in
https://llvm.org/docs/NewPassManager.html#status-of-the-new-and-legacy-pass-managers
Commit: dd57f60e6ef60883709489c3d727e52d7322ec0b
https://github.com/llvm/llvm-project/commit/dd57f60e6ef60883709489c3d727e52d7322ec0b
Author: Slava Zakharin <szakharin at nvidia.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M flang/lib/Optimizer/HLFIR/Transforms/SimplifyHLFIRIntrinsics.cpp
M flang/test/HLFIR/simplify-hlfir-intrinsics-count.fir
Log Message:
-----------
[flang] Use reduction recognition friendly pattern for hlfir.count. (#190856)
The change is to select between `0` and `1` based on the condition
and then add the result to the current reduction value.
Commit: 350d672827deaff38e81a859522e5a3bfb584ed3
https://github.com/llvm/llvm-project/commit/350d672827deaff38e81a859522e5a3bfb584ed3
Author: Jason Van Beusekom <jason.van-beusekom at hpe.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M flang/include/flang/Optimizer/Dialect/Support/FIRContext.h
M flang/lib/Lower/Bridge.cpp
M flang/lib/Optimizer/CodeGen/CodeGen.cpp
M flang/lib/Optimizer/Dialect/Support/FIRContext.cpp
A flang/test/Fir/dso-local-macho.fir
A flang/test/Fir/dso-local.fir
M flang/test/Lower/common-block.f90
Log Message:
-----------
[Flang] mark safe external globals as dso_local (#189709)
Globals inside a Fortran module are not marked as dso_local,
which results in their alignment not being promoted.
This fix mimics some of the functionality found in
shouldAssumeDSOLocal in /clang/lib/CIR/CodeGen/CIRGenModule.cpp
Fixes #189069
Commit: 0f3e448c980f083b97ad4c2b93525dd44e7ba743
https://github.com/llvm/llvm-project/commit/0f3e448c980f083b97ad4c2b93525dd44e7ba743
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M llvm/include/llvm/IR/Instructions.h
A llvm/test/Transforms/SimplifyCFG/profile-update-unreachable.ll
Log Message:
-----------
[SimplifyCFG] Update profile metadata regardless of weight count (#190982)
Otherwise we miss updating in cases where we should be updating which
causes assertion failures later due to the fact that the number of cases
no longer matches the number of branch weights.
It looks like this was last touched in #160629, but it doesn't seem like
there is anything there specifically motivating this diff hunk.
Fixes #190901.
Commit: fd09e8f814c7f96a2b9c65b5737e529fd1c62708
https://github.com/llvm/llvm-project/commit/fd09e8f814c7f96a2b9c65b5737e529fd1c62708
Author: klensy <klensy at users.noreply.github.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M clang/test/ExtractAPI/availability.c
M clang/test/ExtractAPI/objc_property.m
Log Message:
-----------
[ExtractAPI] fix filecheck annotation (#92231)
moved fix for ExtractAPI from
https://github.com/llvm/llvm-project/pull/91854,
https://github.com/llvm/llvm-project/pull/91854#pullrequestreview-2052128349
Also noticed typo here, prefix `E` but check for `C`, fixed too:
https://github.com/llvm/llvm-project/blob/ca4a405232cf170f20a2f111bf72beab82095935/clang/test/ExtractAPI/availability.c#L43-L65
Co-authored-by: klensy <nightouser at gmail.com>
Co-authored-by: Prajwal Nadig <pnadig at apple.com>
Commit: 179a6bae77b8cfdf07deac0feb28aaa89aeb9462
https://github.com/llvm/llvm-project/commit/179a6bae77b8cfdf07deac0feb28aaa89aeb9462
Author: 4ast <alexei.starovoitov at gmail.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M llvm/lib/Target/BPF/BPFCallingConv.td
M llvm/lib/Target/BPF/BPFISelLowering.cpp
M llvm/lib/Target/BPF/BPFISelLowering.h
M llvm/test/CodeGen/BPF/atomic-oversize.ll
A llvm/test/CodeGen/BPF/i128_return.ll
A llvm/test/CodeGen/BPF/sret.ll
M llvm/test/CodeGen/BPF/struct_ret1.ll
M llvm/test/CodeGen/BPF/struct_ret2.ll
Log Message:
-----------
bpf: Support aggregate returns (#190894)
i128 and 16 byte structs are now returned in R0:R2 which matches x86
that returns { i64, i32 } in RAX:RDX.
Both skip one register in between (RCX / R1).
Signed-off-by: Alexei Starovoitov <ast at kernel.org>
Co-authored-by: Alexei Starovoitov <ast at kernel.org>
Commit: 5fdc35ff15c8dae0fd5c6e706026eb1c4c2e7305
https://github.com/llvm/llvm-project/commit/5fdc35ff15c8dae0fd5c6e706026eb1c4c2e7305
Author: Min-Yih Hsu <min.hsu at sifive.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
A llvm/test/tools/llvm-mca/RISCV/SiFiveX390/atomic.test
R llvm/test/tools/llvm-mca/RISCV/SiFiveX390/div-fdiv.s
A llvm/test/tools/llvm-mca/RISCV/SiFiveX390/floating-point.test
R llvm/test/tools/llvm-mca/RISCV/SiFiveX390/fractional-lmul-data.s
A llvm/test/tools/llvm-mca/RISCV/SiFiveX390/integer.test
A llvm/test/tools/llvm-mca/RISCV/SiFiveX390/mul-div.test
R llvm/test/tools/llvm-mca/RISCV/SiFiveX390/reductions.s
A llvm/test/tools/llvm-mca/RISCV/SiFiveX390/rvv/arithmetic.test
A llvm/test/tools/llvm-mca/RISCV/SiFiveX390/rvv/bitwise.test
A llvm/test/tools/llvm-mca/RISCV/SiFiveX390/rvv/comparison.test
A llvm/test/tools/llvm-mca/RISCV/SiFiveX390/rvv/conversion.test
A llvm/test/tools/llvm-mca/RISCV/SiFiveX390/rvv/fma.test
A llvm/test/tools/llvm-mca/RISCV/SiFiveX390/rvv/fp.test
A llvm/test/tools/llvm-mca/RISCV/SiFiveX390/rvv/mask.test
A llvm/test/tools/llvm-mca/RISCV/SiFiveX390/rvv/minmax.test
A llvm/test/tools/llvm-mca/RISCV/SiFiveX390/rvv/mul-div.test
A llvm/test/tools/llvm-mca/RISCV/SiFiveX390/rvv/permutation.test
A llvm/test/tools/llvm-mca/RISCV/SiFiveX390/rvv/reduction.test
A llvm/test/tools/llvm-mca/RISCV/SiFiveX390/rvv/strided-load-x0.s
A llvm/test/tools/llvm-mca/RISCV/SiFiveX390/rvv/vle-vse-vlm.test
A llvm/test/tools/llvm-mca/RISCV/SiFiveX390/rvv/vlse-vsse.test
A llvm/test/tools/llvm-mca/RISCV/SiFiveX390/rvv/vlseg-vsseg.test
A llvm/test/tools/llvm-mca/RISCV/SiFiveX390/rvv/vlxe-vsxe.test
R llvm/test/tools/llvm-mca/RISCV/SiFiveX390/strided-load-store.s
R llvm/test/tools/llvm-mca/RISCV/SiFiveX390/strided-load-x0.s
R llvm/test/tools/llvm-mca/RISCV/SiFiveX390/vector-fp.s
R llvm/test/tools/llvm-mca/RISCV/SiFiveX390/vector-integer-arithmetic.s
R llvm/test/tools/llvm-mca/RISCV/SiFiveX390/vle-vse.s
R llvm/test/tools/llvm-mca/RISCV/SiFiveX390/vrgather-vcompress.s
A llvm/test/tools/llvm-mca/RISCV/SiFiveX390/zba.test
A llvm/test/tools/llvm-mca/RISCV/SiFiveX390/zbb.test
A llvm/test/tools/llvm-mca/RISCV/SiFiveX390/zbs.test
A llvm/test/tools/llvm-mca/RISCV/SiFiveX390/zfh.test
A llvm/test/tools/llvm-mca/RISCV/SiFiveX390/zfhmin.test
A llvm/test/tools/llvm-mca/RISCV/SiFiveX390/zicond.test
Log Message:
-----------
[RISCV][MCA] Update `sifive-x390`'s tests to consume input files instead (#190883)
In the same spirit as #189785 , use the new input file system for
sifive-x390's llvm-mca tests.
Commit: 46dc97c0ea7d3bb4e1590388280a9833cc5d3b77
https://github.com/llvm/llvm-project/commit/46dc97c0ea7d3bb4e1590388280a9833cc5d3b77
Author: Sergey Kachkov <109674256+skachkov-sc at users.noreply.github.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M llvm/test/Transforms/SeparateConstOffsetFromGEP/RISCV/split-gep.ll
Log Message:
-----------
[NFC][SeparateConstOffsetFromGEP] Add pre-commit test (#191006)
Commit: 802c5cbe5b4be7eb7b442ddbd76acb781921e5f7
https://github.com/llvm/llvm-project/commit/802c5cbe5b4be7eb7b442ddbd76acb781921e5f7
Author: Caroline Newcombe <caroline.newcombe at hpe.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M flang/examples/FeatureList/FeatureList.cpp
M flang/include/flang/Evaluate/expression.h
M flang/include/flang/Evaluate/fold.h
M flang/include/flang/Evaluate/shape.h
M flang/include/flang/Evaluate/tools.h
M flang/include/flang/Evaluate/traverse.h
M flang/include/flang/Parser/characters.h
M flang/include/flang/Parser/dump-parse-tree.h
M flang/include/flang/Parser/parse-tree.h
M flang/include/flang/Semantics/dump-expr.h
M flang/include/flang/Semantics/expression.h
M flang/lib/Evaluate/check-expression.cpp
M flang/lib/Evaluate/expression.cpp
M flang/lib/Evaluate/fold-implementation.h
M flang/lib/Evaluate/formatting.cpp
M flang/lib/Evaluate/tools.cpp
M flang/lib/Lower/ConvertExpr.cpp
M flang/lib/Lower/ConvertExprToHLFIR.cpp
M flang/lib/Lower/IterationSpace.cpp
M flang/lib/Lower/Support/Utils.cpp
M flang/lib/Parser/expr-parsers.cpp
M flang/lib/Parser/unparse.cpp
M flang/lib/Semantics/definable.cpp
M flang/lib/Semantics/expression.cpp
M flang/lib/Semantics/openmp-utils.cpp
A flang/test/Evaluate/fold-conditional-expr.f90
A flang/test/Parser/conditional-expr.f90
A flang/test/Semantics/conditional-expr.f90
Log Message:
-----------
[flang] Implement conditional expressions parser/semantics (F2023) (#186489)
## Implement Fortran 2023 Conditional Expressions (R1002)
***This PR contains the implementation for parsing and semantic
analysis. Lowering is implemented in a separate PR (#186490)***
Implements Fortran 2023 conditional expressions with syntax: `result =
(condition ? value1 : condition2 ? value2 : ... : elseValue)`
Issue: #176999
Discourse:
https://discourse.llvm.org/t/rfc-adding-conditional-expressions-in-flang-f2023/89869/1
-- note that some of the details provided in the RFC post are no longer
accurate
### Implementation Details
**Parser:**
- Added ConditionalExpr as primary expression (F2023 R1002)
- Right-associative chaining for multi-way conditionals
**Semantics:**
- Expression tree node ConditionalExpr<T> with N conditions and N+1
values
- Strict type checking: all values must have identical type, kind, and
rank
- Conditions must be scalar LOGICAL
**LIT Testing:**
- Parser tests: Syntax validation, precedence, nesting
- Semantic tests: Type checking, error messages
- Note: Executable tests will be added to the llvm-test-suite repo
(https://github.com/llvm/llvm-test-suite/pull/369)
**Limitations**
- Conditional arguments are not yet supported. This work is planned
- #180592
- Polymorphic types (CLASS) not yet supported in lowering
- Both limitations will emit clear error message if encountered
### Examples
```
! Simple conditional
x = (flag ? 10 : 20)
! Chained
result = (x > 0 ? 1 : x < 0 ? -1 : 0)
! Examples from F2023
( ABS (RESIDUAL)<=TOLERANCE ? ’ok’ : ’did not converge’ )
( I>0 .AND. I<=SIZE (A) ? A (I) : PRESENT (VAL) ? VAL : 0.0 )
```
AI Usage Disclosure: AI tools (Claude Sonnet 4.5) were used to assist
with implementation of this feature and test code generation. I have
reviewed, modified, and tested all AI-generated code.
Commit: 3af427539bc6b85a9fe3334b9a0b43d347ea29ac
https://github.com/llvm/llvm-project/commit/3af427539bc6b85a9fe3334b9a0b43d347ea29ac
Author: Arthur Eubanks <aeubanks at google.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M llvm/docs/LangRef.rst
M llvm/include/llvm/Analysis/InlineOrder.h
M llvm/include/llvm/IR/FixedMetadataKinds.def
M llvm/include/llvm/Transforms/Utils/Cloning.h
M llvm/lib/Analysis/InlineOrder.cpp
M llvm/lib/IR/Verifier.cpp
M llvm/lib/Transforms/IPO/AlwaysInliner.cpp
M llvm/lib/Transforms/IPO/Inliner.cpp
M llvm/lib/Transforms/IPO/ModuleInliner.cpp
M llvm/lib/Transforms/IPO/PartialInlining.cpp
M llvm/lib/Transforms/Utils/CloneFunction.cpp
M llvm/lib/Transforms/Utils/InlineFunction.cpp
M llvm/test/Transforms/Inline/debug-invoke.ll
A llvm/test/Transforms/Inline/inline-history-2.ll
A llvm/test/Transforms/Inline/inline-history-3.ll
R llvm/test/Transforms/Inline/inline-history-noinline.ll
A llvm/test/Transforms/Inline/inline-history.ll
M llvm/test/Transforms/Inline/inline-recursive-fn2.ll
A llvm/test/Verifier/inline-history-metadata.ll
M llvm/unittests/Analysis/InlineOrderPlugin/InlineOrderPlugin.cpp
Log Message:
-----------
[Inliner] Put inline history into IR as !inline_history metadata (#190876)
(Reland of #190700 with checks for RefSCCs with one function with a
self-reference, plus determinism fix)
(Reland of #190092 with verifier change to look through GlobalAliases)
So that it's preserved across all inline invocations rather than just
one inliner pass run.
This prevents cases where devirtualization in the simplification
pipeline uncovers inlining opportunities that should be discarded due to
inline history, but we dropped the inline history between inliner pass
runs, causing code size to blow up, sometimes exponentially.
For compile time reasons, we want to limit this to only call sites that
have the potential to inline through SCCs, potentially with the help of
devirtualization. This means that the callee is in a non-trivial
(Ref)SCC, or the call site was previously an indirect call, which can
potentially be devirtualized to call any function.
The CGSCCUpdater::InlinedInternalEdges logic still seems to be relevant
even with this change, as monster_scc.ll blows up if I remove that code.
http://llvm-compile-time-tracker.com/compare.php?from=e830d88e8ae5f44a97cc76136a0a4e83aa9157c0&to=ed535e732fc41b79ab8efda2417886cbd0812f7f&stat=instructions:u
Fixes #186926.
Commit: 8c88fae6764a33affa7e99449694427df9171aa8
https://github.com/llvm/llvm-project/commit/8c88fae6764a33affa7e99449694427df9171aa8
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/scalable-strict-fadd.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-tail-folding-unroll.ll
Log Message:
-----------
[VPlan] Lower CanIVIncrementForPart in convertToConcreteRecipes. (#190844)
Move the lowering of CanonicalIVIncrementForPart from generate() to
convertToConcreteRecipes, converting it to an Add VPInstruction at the
VPlan level. This enables VPlan-level simplifications (e.g., folding add
0, x) and prepares for adding a 3-operand form.
PR: https://github.com/llvm/llvm-project/pull/190844
Commit: 815edc3ff646392bfee2b381d37dd35e4b04f9c5
https://github.com/llvm/llvm-project/commit/815edc3ff646392bfee2b381d37dd35e4b04f9c5
Author: Valeriy Savchenko <vsavchenko at apple.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
M llvm/test/CodeGen/AArch64/arm64-zip.ll
A llvm/test/CodeGen/AArch64/vselect-widen-mask-tree.ll
M llvm/test/CodeGen/X86/bitcast-int-to-vector-bool-sext.ll
Log Message:
-----------
[SelectionDAG] Recurse through mask expression trees in WidenVSELECTMask (#188085)
WidenVSELECTMask currently handles only two mask shapes: a bare SETCC
or a single AND/OR/XOR of exactly two SETCCs. Anything deeper bails out
to the generic condition widening path, which often introduces
unnecessary narrow/widen roundtrips (xtn+sshll on AArch64,
packssdw+vpmovsxwd on X86).
Replace the hand-coded cases with a recursive widenMaskTree that walks
through SETCC, AND/OR/XOR, FREEZE, VECTOR_SHUFFLE, SELECT/VSELECT, and
all-ones/all-zeros BUILD_VECTORs.
Commit: 430e1be254f90d177e997266bc1c2e700e16d1cc
https://github.com/llvm/llvm-project/commit/430e1be254f90d177e997266bc1c2e700e16d1cc
Author: Henrik G. Olsson <hnrklssn at gmail.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M clang-tools-extra/clang-tidy/llvm/CMakeLists.txt
M clang-tools-extra/clang-tidy/llvm/LLVMTidyModule.cpp
A clang-tools-extra/clang-tidy/llvm/RedundantCastingCheck.cpp
A clang-tools-extra/clang-tidy/llvm/RedundantCastingCheck.h
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/docs/clang-tidy/checks/list.rst
A clang-tools-extra/docs/clang-tidy/checks/llvm/redundant-casting.rst
A clang-tools-extra/test/clang-tidy/checkers/llvm/redundant-casting.cpp
M clang/include/clang/ASTMatchers/ASTMatchers.h
M clang/include/clang/ASTMatchers/ASTMatchersInternal.h
Log Message:
-----------
[clang-tidy] detect redundant uses of LLVM's cast, dyn_cast (#189274)
Warns when casting to the same pointee type, or when the target pointee
type is a super type of the argument's pointee type. Supported
functions:
- cast
- cast_if_present
- cast_or_null
- dyn_cast
- dyn_cast_if_present
- dyn_cast_or_null
---------
Co-authored-by: Victor Chernyakin <chernyakin.victor.j at outlook.com>
Commit: eb06b4796c2a53c177516dd45ca63f871fc311bb
https://github.com/llvm/llvm-project/commit/eb06b4796c2a53c177516dd45ca63f871fc311bb
Author: Helena Kotas <hekotas at microsoft.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Sema/SemaHLSL.h
M clang/lib/Sema/SemaExprMember.cpp
M clang/lib/Sema/SemaHLSL.cpp
A clang/test/SemaHLSL/Resources/resources-in-struct-array-error.hlsl
Log Message:
-----------
[HLSL] Diagnose dynamic indexing of struct arrays for resource access (#187132)
Dynamic indexing of structs arrays for resource access is not supported. This change implements the diagnostic for this.
Fixes #187131
Commit: 290ddb9238ec569f8518614ddbc48f8f0445777f
https://github.com/llvm/llvm-project/commit/290ddb9238ec569f8518614ddbc48f8f0445777f
Author: Henry Jiang <henry_jiang2 at apple.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/test/Transforms/LoopVectorize/pseudoprobe.ll
Log Message:
-----------
[VPlan][PseudoProbe] Fix `pseudoprobe` duplication when `VF=1` (#185238)
Fix assertion in `loop-vectorize` on loops that contains
`llvm.pseudoprobe` at VF=1, UF=2. Minimal Reproducer:
https://godbolt.org/z/nrcMWWqMx
Originally in https://reviews.llvm.org/D144066, Pseudoprobes were marked
non-uniform in `isUniformAfterVectorization` even for VF=1 that allows
the `REPLICATE call @llvm.pseudoprobe` to survive until the plan is
executed when VF=1, UF=2, causing the crash.
Instead, `isUniformAfterVectorization` as true even for pseudoprobe when
`VF.isScalar()`.
Commit: f5e568810fe183c748d12f31d3a428629b2ed8de
https://github.com/llvm/llvm-project/commit/f5e568810fe183c748d12f31d3a428629b2ed8de
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
A llvm/test/CodeGen/RISCV/samesign.ll
Log Message:
-----------
[SelectionDAGBuilder] Pass SDNodeFlags to getSetCC instead of using FlagInserter. (#190878)
getSetCC hasn't always had a SDNodeFlags argument. When it was added, it
stopped looking at FlagInserter.
Also remove unnecessary FlagInserter from visitFCmp.
Commit: a25d07caaf2c19f97b1be41030d57f850aefbdcf
https://github.com/llvm/llvm-project/commit/a25d07caaf2c19f97b1be41030d57f850aefbdcf
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M flang/lib/Optimizer/Transforms/CUDA/CUFComputeSharedMemoryOffsetsAndSize.cpp
M flang/test/Fir/CUDA/cuda-shared-offset.mlir
Log Message:
-----------
[flang][cuda] Allow static and dynamic shared memory in a single kernel (#190866)
Commit: ffea943c17effd8977df945a7cabfb120d816ca6
https://github.com/llvm/llvm-project/commit/ffea943c17effd8977df945a7cabfb120d816ca6
Author: Sam Elliott <aelliott at qti.qualcomm.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
A llvm/test/CodeGen/RISCV/pr190868.ll
Log Message:
-----------
[NFC][RISC-V] Add Test for PR190868 (#190908)
Updates #190868
Commit: e9113618cba636b194ee08e8d9eb8cb0bafda092
https://github.com/llvm/llvm-project/commit/e9113618cba636b194ee08e8d9eb8cb0bafda092
Author: SiliconA-Z <gfunni234 at gmail.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M llvm/lib/Target/ARM/ARMISelLowering.cpp
M llvm/test/CodeGen/ARM/sadd_sat.ll
M llvm/test/CodeGen/ARM/sadd_sat_plus.ll
M llvm/test/CodeGen/ARM/ssub_sat.ll
M llvm/test/CodeGen/ARM/ssub_sat_plus.ll
Log Message:
-----------
[ARM] Custom Lowering for SADDO_CARRY and SSUBO_CARRY (#154419)
To do this, I did refactoring to mirror what goes on with AArch64,
including having the carryFlagToValue do the inversion.
While the patterns are not the best, with pattern matching, I hope to at
make it as good as AArch64 on Thumb2 where we have CSEL.
Commit: 95af7de3e9de2fadfbe7b2cbbfaecfdfbc7fd7af
https://github.com/llvm/llvm-project/commit/95af7de3e9de2fadfbe7b2cbbfaecfdfbc7fd7af
Author: Brian Cain <brian.cain at oss.qualcomm.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M llvm/lib/Target/Hexagon/CMakeLists.txt
Log Message:
-----------
[Hexagon] Add missing MIRParser link dependency (#191010)
cd66d79be19b added parseMachineFunctionInfo to HexagonTargetMachine
which calls parseNamedRegisterReference from LLVMMIRParser, but did not
add the library dependency. This causes link failures for executables
like dsymutil and llvm-split when building with BUILD_SHARED_LIBS=OFF.
Add MIRParser to LINK_COMPONENTS.
Commit: cd14ba9c9c0d927d215a698b1e0d47f97812e2b7
https://github.com/llvm/llvm-project/commit/cd14ba9c9c0d927d215a698b1e0d47f97812e2b7
Author: Syadus Sefat <42645939+mssefat at users.noreply.github.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
A llvm/test/Transforms/SLPVectorizer/AMDGPU/notriviallyvectorizableintrinsicoperands.ll
Log Message:
-----------
[NFC][SLP][AMDGPU] Pre-commit test for vectorization of non-trivially-vectorizable intrinsic operands (#191009)
This patch adds pre-commit test for vectorization of
non-trivially-vectorizable intrinsic operands for PR
https://github.com/llvm/llvm-project/pull/189784
Commit: e090c86ab0c7d6775882e124a8bab922c46d5ab3
https://github.com/llvm/llvm-project/commit/e090c86ab0c7d6775882e124a8bab922c46d5ab3
Author: Florian Mayer <fmayer at google.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M clang/lib/Serialization/ASTReader.cpp
M clang/test/Modules/merge-target-features.cpp
Log Message:
-----------
[clang] deduplicate target-features for modules (#187614)
Previously, double passing a target feature would make the module
incompatible with a compilation unit that only passes it once.
The motivating problem is, when we pass -target-features +tagged-globals
as well as -fsanitize=hwaddress, which adds a second copy, the module
is incompatible with one built with only one `-target-features
+tagged-globals`.
Commit: 7cd327dca78b9c45de4caf11f8d525f6f0dedecb
https://github.com/llvm/llvm-project/commit/7cd327dca78b9c45de4caf11f8d525f6f0dedecb
Author: Peter Collingbourne <pcc at google.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/test/CodeGen/X86/cond-loop.ll
Log Message:
-----------
DAGCombine: Prefer to keep cond_loop argument as a setcc.
As with brcond, combines for cond_loop want to see setcc as the direct
argument, so prefer to keep it in that form.
Reviewers: arsenm, fmayer, RKSimon
Pull Request: https://github.com/llvm/llvm-project/pull/190889
Commit: f2b33d794d3674a0c7be44de53aa1d201b1bf3fe
https://github.com/llvm/llvm-project/commit/f2b33d794d3674a0c7be44de53aa1d201b1bf3fe
Author: vporpo <vasileios.porpodas at amd.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
A llvm/lib/Target/AMDGPU/AMDGPUWaitcntUtils.cpp
A llvm/lib/Target/AMDGPU/AMDGPUWaitcntUtils.h
M llvm/lib/Target/AMDGPU/CMakeLists.txt
M llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp
M llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
Log Message:
-----------
[AMDGPU][NFC] Move InstCounterType and Waitcnt to AMDGPUWaitcntUtils.h (#187823)
This patch moves InstCounterType and Waitcnt from Utils/AMDGPUBaseInfo.h
to a more appropriate location, one directory up, in
AMDGPUWaitcntUtils.h. We also need to move a few encoding and decoding
functions that work on Waitcnt. Some of these called static functions
defined in AMDGPUBaseInfo.cpp, like `unpackBits()`, so this patch
introduced new functions in AMDGPUBaseInfo: `decodeLoadcnt()`,
`decodeStorecnt()` and `decodeDscnt()` that do the necessary bit
operations but don't operate on the Waitcnt class directly.
Commit: d8a9c560ed04369f12eb44f12bcbcfc7ddb5f78a
https://github.com/llvm/llvm-project/commit/d8a9c560ed04369f12eb44f12bcbcfc7ddb5f78a
Author: Artem Belevich <tra at google.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M clang/lib/Headers/__clang_cuda_intrinsics.h
A clang/test/Headers/cuda_intrinsics.cu
Log Message:
-----------
[CUDA] refactor in-header implementation of __ld*/__st* with different cache modes. (#190021)
* Generalized creation of the variant sets.
* Added implementations for the missing operation modes. Now we match
what's available in CUDA headers.
* Cleaned up discrepancies in `__asm__ __volatile__` use (needed for
some ops that warm up the cache, but should not be discarded if the load
result is unused)
Manually verified that clang's versions of these functions generate
exactly the same instructions nvcc generates from CUDA headers.
Commit: 14da7e5194293454c54c097431c61c1fe55c5710
https://github.com/llvm/llvm-project/commit/14da7e5194293454c54c097431c61c1fe55c5710
Author: Jon Roelofs <jonathan_roelofs at apple.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M llvm/lib/Support/raw_socket_stream.cpp
M llvm/unittests/Support/raw_socket_stream_test.cpp
Log Message:
-----------
[llvm][Support] Avoid silent truncation of socket paths (#190869)
When the name is too long to fit in sockaddr_un::sun_path's 104
character buffer, we now surface the error condition, rather than
silently truncating and failing the test with an "address in use Bind
error". We also shorten the name a bit to give more headroom on CI
systems that define an explicit TMP_DIR that acts as a prefix to the
path created by these tests.
Commit: 3c3fb6ab30192ac9a5c1923927fa10ec78c5ea29
https://github.com/llvm/llvm-project/commit/3c3fb6ab30192ac9a5c1923927fa10ec78c5ea29
Author: khaki3 <47756807+khaki3 at users.noreply.github.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M flang/lib/Lower/OpenACC.cpp
A flang/test/Lower/OpenACC/acc-do-concurrent-locality.f90
Log Message:
-----------
[flang][OpenACC] Support DO CONCURRENT locality specs inside ACC constructs (#190406)
- Lower DO CONCURRENT locality specs (REDUCE, LOCAL, LOCAL\_INIT) that
appear inside OpenACC compute constructs and combined directives.
- Previously, any locality spec on DO CONCURRENT inside ACC hit a `TODO`
and aborted. This resolves that limitation.
- Per OpenACC 2.17.2, DO CONCURRENT without a loop construct in a
kernels construct is treated as `loop auto`; in a parallel construct it
is treated as `loop independent`. Both cases are covered.
## Mapping
| Locality Spec | ACC Operation |
|---|---|
| `REDUCE(op:vars)` | `acc.reduction` with reduction recipe |
| `LOCAL(vars)` | `acc.private` with privatization recipe |
| `LOCAL_INIT(vars)` | `acc.firstprivate` with firstprivatization recipe
|
| `SHARED` / `DEFAULT(NONE)` | No-op (variables already accessible) |
## Details
- Adds `processDoConcurrentLocalitySpecs` to convert locality specs into
the corresponding ACC data-entry operations and recipes.
- Handles the `HostAssoc` symbol indirection that DO CONCURRENT creates
for LOCAL/LOCAL\_INIT variables: after `remapDataOperandSymbols` binds
the ultimate symbol inside the compute region, the binding is copied to
the `HostAssoc` symbol so that body references resolve correctly.
- Separates `firstprivateOperands` into its own operand segment on
`acc.loop` (previously hardcoded empty).
- Fixes pre-existing build errors where `createOrGetReductionRecipe`,
`createOrGetPrivateRecipe`, and `createOrGetFirstprivateRecipe` were
called with `mlir::Type` instead of `mlir::Value` after an upstream API
change. The original variable is passed (not the acc op result) to
preserve correct recipe names.
- New FileCheck test
`flang/test/Lower/OpenACC/acc-do-concurrent-locality.f90` with 12 cases
covering REDUCE, LOCAL, LOCAL\_INIT, mixed locality, and interop with
explicit ACC clauses — across kernels regions, parallel regions, and
combined directives.
Commit: 5d2b3df220c99c4598c24ae1a7cc4d244d07a525
https://github.com/llvm/llvm-project/commit/5d2b3df220c99c4598c24ae1a7cc4d244d07a525
Author: Ramkumar Ramachandra <artagnon at tenstorrent.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-chained.ll
Log Message:
-----------
[VPlan] Fix incorrect wrap-flags in partial-red transform (#190214)
The flags are incorrect for the transform, and fixes an underlying
miscompile.
Proof: https://alive2.llvm.org/ce/z/tPJnJk
Commit: 6f95604cbd10109892f9fdc7ab8f78f243ebf8a0
https://github.com/llvm/llvm-project/commit/6f95604cbd10109892f9fdc7ab8f78f243ebf8a0
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M lldb/test/API/functionalities/tsan/cpp_global_location/TestTsanCPPGlobalLocation.py
M lldb/test/API/functionalities/tsan/global_location/TestTsanGlobalLocation.py
Log Message:
-----------
[lldb] Disable TestTsan{CPP}GlobalLocation.py on Linux (#191018)
Skip `TestTsanGlobalLocation.py` and `TestTsanCPPGlobalLocation.py` on
Linux. The tests are failing on GreenDragon and at desk.
Tracked by https://github.com/llvm/llvm-project/issues/191012
Commit: 004206ac5533a1b5296a124e23b0c4638b6ef41e
https://github.com/llvm/llvm-project/commit/004206ac5533a1b5296a124e23b0c4638b6ef41e
Author: John Harrison <harjohn at google.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M lldb/tools/lldb-dap/Handler/AttachRequestHandler.cpp
Log Message:
-----------
[lldb-dap] Using an empty target instead of a dummy target. (#189734)
Removing the use of the dummy target and instead letting the debugger
instance create the target it needs.
Commit: bc07dbe657a92ef1aadbfb86d1bf19177c48ad17
https://github.com/llvm/llvm-project/commit/bc07dbe657a92ef1aadbfb86d1bf19177c48ad17
Author: Oskar Wirga <oskar.wirga at gmail.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
M llvm/test/CodeGen/AArch64/ptrauth-reloc.ll
Log Message:
-----------
[AArch64] Add error handling for unsupported bases in lowerConstantPtrAuth (#189474)
This is part of work being done in #188378 and #188638, split out from
#188650.
`lowerConstantPtrAuth` silently miscompiled `ConstantPtrAuth` constants
with non-`GlobalValue` pointer bases — emitting `0 at AUTH(da,0)` instead
of erroring.
Changes:
- Handle `ConstantPointerNull` bases explicitly
- Error via `reportFatalUsageError` on any remaining unresolved base
(e.g. nested ptrauth) instead of silently miscompiling
This PR was mostly developed with LLM assistance
Commit: 046e823c7b9259d9c1aaee8f03b2d5f53f899dd9
https://github.com/llvm/llvm-project/commit/046e823c7b9259d9c1aaee8f03b2d5f53f899dd9
Author: Med Ismail Bennani <ismail at bennani.ma>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M lldb/test/API/functionalities/scripted_frame_provider/thread_filter/main.cpp
Log Message:
-----------
[lldb/test] Add yield to spin loop in thread_filter test (#191025)
This should fix:
https://lab.llvm.org/buildbot/#/builders/211/builds/7439
The timeout might be caused by three threads busy-spinning at 100% CPU,
starving the CI machine.
Add std::this_thread::yield() to the spin loop to reduce CPU pressure
while keeping threads alive at a debugger-friendly location.
Signed-off-by: Med Ismail Bennani <ismail at bennani.ma>
Commit: 54f7104a3484fb33a10c2d66d30d9b05c7a2d80b
https://github.com/llvm/llvm-project/commit/54f7104a3484fb33a10c2d66d30d9b05c7a2d80b
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
Log Message:
-----------
[LV] Replace dead invalidateCostModelingDecisions with assert (NFC) (#190837)
Replace dead invalidateCostModelingDecisions with assertion that no
decisions have been taken yet.
Commit: 3ce68907fff129b1728f692be16c61c8fbd3892a
https://github.com/llvm/llvm-project/commit/3ce68907fff129b1728f692be16c61c8fbd3892a
Author: Julian Lettner <yln at users.noreply.github.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M lldb/tools/driver/lldb-mte-entitlements.plist
Log Message:
-----------
[lldb] Fixup MTE entitlement spelling for MTE driver (#190842)
Fixup for: https://github.com/llvm/llvm-project/pull/186322
Commit: 649c44fc1b39b7e636e74690e15729a178775af5
https://github.com/llvm/llvm-project/commit/649c44fc1b39b7e636e74690e15729a178775af5
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M flang/include/flang/Semantics/openmp-utils.h
M flang/lib/Semantics/check-omp-loop.cpp
M flang/lib/Semantics/openmp-utils.cpp
M flang/lib/Semantics/resolve-directives.cpp
A flang/test/Semantics/OpenMP/do-concurrent-collapse-60.f90
M flang/test/Semantics/OpenMP/do-concurrent-collapse.f90
Log Message:
-----------
[flang][OpenMP] Improve checks for DO CONCURRENT in loop constructs (#190990)
In OpenMP 6.0+ DO CONCURRENT is allowed as an alternative to a Canonical
Loop Nest. In other words, DO CONCURRENT is allowed inside loop
constructs as long as it's the only loop.
Add checks to detect DO CONCURRENT as the root of the associated loop
nest. Remove related checks from resolve-directives.cpp.
Commit: 121f38c69f44108c543152d990f1d3729d72fa1d
https://github.com/llvm/llvm-project/commit/121f38c69f44108c543152d990f1d3729d72fa1d
Author: estewart08 <ethan.stewart at amd.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M libc/shared/CMakeLists.txt
Log Message:
-----------
[libc] - Add rpc_opcodes.h to list of installed headers (#191035)
There is a case when building standalone offload via runtimes where
LLVM_BINARY_DIR is set to the installed llvm location. Currently, this
header is not being installed and results in a build failure.
Fixes issue introduced with #190423.
Commit: 9b64d05e594a8b04393e1cd24c245a435826d47c
https://github.com/llvm/llvm-project/commit/9b64d05e594a8b04393e1cd24c245a435826d47c
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/lib/CIR/CodeGen/CIRGenClass.cpp
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
M clang/lib/CIR/Dialect/Transforms/LoweringPrepare.cpp
M clang/test/CIR/CodeGen/array-ctor.cpp
M clang/test/CIR/CodeGen/array-dtor.cpp
M clang/test/CIR/CodeGen/global-array-dtor.cpp
M clang/test/CIR/CodeGen/global-init.cpp
M clang/test/CIR/CodeGen/new.cpp
A clang/test/CIR/CodeGen/partial-array-cleanup.cpp
M clang/test/CIR/IR/array-ctor.cir
M clang/test/CIR/IR/array-dtor.cir
M clang/test/CIR/IR/invalid-array-structor.cir
Log Message:
-----------
[CIR] Implement partial array destroy handling (#190834)
This implements EH cleanup handling that performs regular partial array
destruction for array constructor loops with a destructed type. Because
CIR represents array construction using an abstract operation, we do not
go through the normal EH stack mechanism. Instead, we add a partial_dtor
region to the cir.array.ctor operation indicating how a single element
should be destructed. When the cir.array.ctor operation is expanded
during LoweringPrepare, we create a cleanup scope with a partial array
dtor loop in an EH cleanup region. This gets further expanded during CFG
flattening to produce a control flow equivalent to that generated by
classic codegen.
Assisted-by: Cursor / claude-4.6-opus-high
Commit: dfc1f2b2070edb32fedd2524662536ccbbaab948
https://github.com/llvm/llvm-project/commit/dfc1f2b2070edb32fedd2524662536ccbbaab948
Author: adams381 <adams at nvidia.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M clang/docs/ClangIRABILowering.md
Log Message:
-----------
[CIR][ABI][NFC] Update ABI lowering design doc with implementation experience (#188617)
Three documentation improvements based on implementation experience:
- Improve Section 4.4 flow diagram: replace flat step-by-step diagram
with
layered version showing which architectural layer (MLIR adapter, LLVM
ABI
library, dialect-specific) owns each step.
- Note dialect-aware type mapping: dialects with custom types (e.g.
cir::IntType is not mlir::IntegerType) may need dialect-aware mapping
alongside the generic mapper to preserve signedness, pointer identity,
and
record field structure.
- Update ABIRewriteContext interface: describe the actual two-method
interface
(rewriteFunctionDefinition, rewriteCallSite) instead of the 15-20
fine-grained methods originally proposed.
Made with [Cursor](https://cursor.com)
Commit: 66722819ffa4bc00d719d206f235dffbde5ec5d8
https://github.com/llvm/llvm-project/commit/66722819ffa4bc00d719d206f235dffbde5ec5d8
Author: vangthao95 <vang.thao at amd.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.ds.gws.init.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.ds.gws.sema.v.mir
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.gws.barrier-bundle.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.gws.barrier.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.gws.init.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.gws.sema.br.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.gws.sema.p.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.gws.sema.release.all.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.gws.sema.v.ll
Log Message:
-----------
AMDGPU/GlobalISel: RegBankLegalize rules for ds_gws ops (#190283)
Commit: 87717bf9f81f7b29466c5d9a30a3453bdfc93941
https://github.com/llvm/llvm-project/commit/87717bf9f81f7b29466c5d9a30a3453bdfc93941
Author: Syadus Sefat <42645939+mssefat at users.noreply.github.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M llvm/include/llvm/Transforms/Vectorize/SLPVectorizer.h
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/AMDGPU/notriviallyvectorizableintrinsicoperands.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/revec.ll
Log Message:
-----------
[SLP][AMDGPU] Vectorize operands of non-trivially-vectorizable intrinsic calls (#189784)
A non-trivially vectorizable target intrinsic (e.g., llvm.amdgcn.exp2,
llvm.amdgcn.log) blocks the SLP vectorizer from building a deeper tree.
This patch finds the operands of such intrinsics and tries them as
independent SLP tree roots so that the operands continues to get
vectorized.
Previously, the SLP vectorizer would terminate tree building at these
intrinsic calls (as NeedToGather nodes). That left their operand chains
(loads, fmul, fsub, etc.) entirely scalar. This patch adds a new seed
discovery pass in vectorizeChainsInBlock.
Commit: 7765fd8653b7670f37c73fef51a8c0b2df36591c
https://github.com/llvm/llvm-project/commit/7765fd8653b7670f37c73fef51a8c0b2df36591c
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M mlir/lib/Dialect/ArmSME/Transforms/EnableArmStreaming.cpp
M mlir/test/Dialect/ArmSME/enable-arm-streaming.mlir
M mlir/test/Dialect/ArmSME/enable-arm-za.mlir
Log Message:
-----------
[mlir][ArmSME] Prefix SME streaming attributes with "llvm." for propagation (#190864)
Function-level attributes enabling SME in the backend (e.g.
arm_streaming, arm_locally_streaming) were dropped when converting
func.func to llvm.func after ed37bdc, because attribute propagation
during FuncToLLVM conversion only preserves attributes prefixed with
"llvm.". Prefix these discardable attributes accordingly.
Commit: c42a957dece2c19454ac3d8d7028e7f16704899b
https://github.com/llvm/llvm-project/commit/c42a957dece2c19454ac3d8d7028e7f16704899b
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenCleanup.cpp
Log Message:
-----------
[CIR][NFC] Remove dead code in popCleanupBlock (#191029)
The CIR popCleanupBlock implementation contained a lot of logic that was
copied from the classic codegen implementation but had become
effectively dead code after the redesign of cleanup and exception
handling in CIR because our cleanups are no longer based on blocks and
branches. This change removes that code.
Commit: 061420021a2b0dc391071a45fe7cc0360236d539
https://github.com/llvm/llvm-project/commit/061420021a2b0dc391071a45fe7cc0360236d539
Author: Dmitry Vasilyev <dvassiliev at accesssoftek.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M lldb/test/API/functionalities/scripted_frame_provider/thread_filter/TestFrameProviderThreadFilter.py
M lldb/test/API/functionalities/scripted_frame_provider/thread_filter/main.cpp
Log Message:
-----------
[lldb] Fix the TestFrameProviderThreadFilter test on Windows (#191046)
This is the update for #191025.
Commit: 9a5904b20d76b24ac64e26b83e6407cc9ddbcc83
https://github.com/llvm/llvm-project/commit/9a5904b20d76b24ac64e26b83e6407cc9ddbcc83
Author: vangthao95 <vang.thao at amd.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.init.exec.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.init.exec.wave32.ll
Log Message:
-----------
AMDGPU/GlobalISel: RegBankLegalize rules for init_exec intrinsics (#191040)
Commit: 270e7b497ec893a43e60a0db35f10c0153200e38
https://github.com/llvm/llvm-project/commit/270e7b497ec893a43e60a0db35f10c0153200e38
Author: bernborgess <62393097+bernborgess at users.noreply.github.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M mlir/include/mlir/IR/Value.h
Log Message:
-----------
[mlir][docs] Fix typos / tweak `mlir::Value` class documentation (#191042)
Commit: 006d352744175de88ee0c071be367c3482c76cfa
https://github.com/llvm/llvm-project/commit/006d352744175de88ee0c071be367c3482c76cfa
Author: Chinmay Deshpande <chdeshpa at amd.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w32-swmmac-index_key.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w64-swmmac-index_key.ll
Log Message:
-----------
[AMDGPU][GISel] RegBankLegalize rules for SWMMAC instructions (#190997)
Commit: b744548871866544f5a6e92290d422f2edd39a51
https://github.com/llvm/llvm-project/commit/b744548871866544f5a6e92290d422f2edd39a51
Author: Paweł Bylica <pawel at hepcolgum.band>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M clang/include/clang/Basic/DiagnosticCommonKinds.td
M clang/lib/CodeGen/CGCall.cpp
A clang/test/CodeGenCXX/musttail-noexcept-error.cpp
A clang/test/CodeGenCXX/musttail-noexcept.cpp
Log Message:
-----------
[Clang] Allow musttail in noexcept functions when callee is nounwind (#190945)
noexcept functions push an EHTerminateScope onto the cleanup stack. The
musttail codegen did not know how to skip this scope, causing a "cannot
compile this tail call skipping over cleanups yet" error even when both
caller and callee are noexcept.
Skip the EHTerminateScope when the callee is nounwind (noexcept). The
callee's own noexcept handler prevents any exception from propagating,
so the caller's terminate handler is unnecessary.
Fixes #53087.
Commit: f49a262fa70cfe4fb83741cbd6a6e30886c560e9
https://github.com/llvm/llvm-project/commit/f49a262fa70cfe4fb83741cbd6a6e30886c560e9
Author: Jianhui Li <jian.hui.li at intel.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M mlir/include/mlir/Dialect/XeGPU/IR/XeGPUTypes.td
M mlir/include/mlir/Dialect/XeGPU/Utils/XeGPUUtils.h
M mlir/lib/Dialect/XeGPU/IR/XeGPUDialect.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUBlocking.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUPeepHoleOptimizer.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUSubgroupDistribute.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUWgToSgDistribute.cpp
M mlir/lib/Dialect/XeGPU/Utils/XeGPUUtils.cpp
M mlir/test/Dialect/XeGPU/xegpu-blocking.mlir
M mlir/test/lib/Dialect/XeGPU/TestXeGPUTransforms.cpp
Log Message:
-----------
[MLIR][XeGPU] TensorDesc Type support generic DistributeLayout instead of Layout (#190401)
This PR allows TensorDesc to support slice layout, not just plain
layout.
Commit: 8d106eb976533e522d30b0b6da78445a8f5ec697
https://github.com/llvm/llvm-project/commit/8d106eb976533e522d30b0b6da78445a8f5ec697
Author: Med Ismail Bennani <ismail at bennani.ma>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M lldb/include/lldb/Target/SyntheticFrameProvider.h
M lldb/include/lldb/Target/Target.h
M lldb/include/lldb/Target/Thread.h
M lldb/include/lldb/Utility/ScriptedMetadata.h
M lldb/include/lldb/lldb-defines.h
M lldb/source/Target/SyntheticFrameProvider.cpp
M lldb/source/Target/Target.cpp
M lldb/source/Target/Thread.cpp
M lldb/test/API/functionalities/scripted_frame_provider/pass_through_prefix/TestFrameProviderPassThroughPrefix.py
Log Message:
-----------
[lldb/Target] Unify frame provider descriptor and chain IDs (#190712)
Replace the two separate ID systems for frame providers — hash-based
descriptor IDs in Target and sequential chain IDs in Thread — with a
single monotonically increasing counter in Target.
Provider IDs are now assigned by
Target::AddScriptedFrameProviderDescriptor
and used directly as the chain ID in Thread, so
RegisterScriptedFrameProvider
returns the same ID used by 'bt --provider'. Also add duplicate
detection to
emit a warning when registering a provider with the same class name and
arguments twice.
Signed-off-by: Med Ismail Bennani <ismail at bennani.ma>
Commit: 69e0367e8221b8002b5d438fb70ff3daf36257fc
https://github.com/llvm/llvm-project/commit/69e0367e8221b8002b5d438fb70ff3daf36257fc
Author: Qiongsi Wu <qiongsiwu at gmail.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M clang/lib/Lex/ModuleMap.cpp
M clang/lib/Tooling/DependencyScanningTool.cpp
A clang/test/ClangScanDeps/modules-byname-dup-module-decl-diag.c
A clang/test/ClangScanDeps/modules-mmap-redef.c
A clang/test/Modules/implicit-module-redefinition-same-file.c
A clang/test/Modules/implicit-module-redefinition.c
Log Message:
-----------
[clang][Modules] Diagnosing Module Redefinition Across ModuleMaps (#190085)
This PR enhances the module redefinition diagnostic to cover a very
specific case.
1. A module, say `B`, is discovered first during header search. In other
words, it is declared in a modulemap that shows up first on the search
paths.
2. `B` is declared again in a different modulemap, which shows up in a
later search path, and the compiler discovers `B` again when it is
searching for a different named module.
See the two tests added for examples of this specific scenario. Under
such a scenario, the compiler now reports the module redefined error.
Note that we are not diagnosing duplicating module definitions globally,
because that requires looking through all search paths and loading all
module maps, which is too expensive.
Assisted-by: claude-opus-4.6
Commit: be072baa33d25dbad9d2cf53c2604b19aa293315
https://github.com/llvm/llvm-project/commit/be072baa33d25dbad9d2cf53c2604b19aa293315
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenFunction.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
Log Message:
-----------
[CIR][NFC] Simplify LexicalScope::cleanup() (#191034)
The LexicalScope::cleanup() function contained a lot of logic that had
been copied from the classic codegen version of this function to
properly handle branching through cleanup blocks. Since CIR cleanups are
no longer based on blocks and branches, this had become dead code. This
change simplifies the function accordiningly. This also removes the
LexicalScope::getCleanupBlock() function which is no longer called, and
the LexicalScope::createCleanupBlock() and
LexicalScope::getOrCreateCleanupBlock() functions which weren't called
even before this change.
Assisted-by: Cursor / claude-4.6-opus-high
Commit: fbdfff47c7e4cdb29512bc78cad5978fa2a86ce9
https://github.com/llvm/llvm-project/commit/fbdfff47c7e4cdb29512bc78cad5978fa2a86ce9
Author: Roland McGrath <mcgrathr at google.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M libcxx/include/__atomic/contention_t.h
M libcxx/include/__cxx03/__atomic/contention_t.h
M libcxx/src/atomic.cpp
Log Message:
-----------
[libc++] Use Fuchsia futex operations (#133571)
The basic futex operations have always been available on Fuchsia.
Wire them up to properly support C++20 atomic notify_*/wait.
Commit: a1418ac932a95113b72020e73e8f9d7808f25973
https://github.com/llvm/llvm-project/commit/a1418ac932a95113b72020e73e8f9d7808f25973
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M flang/lib/Semantics/check-cuda.cpp
A flang/test/Lower/CUDA/cuda-unified.cuf
Log Message:
-----------
[flang][cuda] Disable host array check when unified is enabled (#191054)
Commit: 503357350ce915a53a8147ac584d8b9ae4814be7
https://github.com/llvm/llvm-project/commit/503357350ce915a53a8147ac584d8b9ae4814be7
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
M llvm/test/CodeGen/SPIRV/linkage/linkage-types.ll
Log Message:
-----------
[SPIR-V] Drop initializer for Import linkage type globals (#190942)
Per SPIR-V spec, variable with Import linkage must not have initializer
Fix corresponding spirv-val error:
```
error: A module-scope OpVariable with initialization value cannot be marked with the Import Linkage Type.
```
related to https://github.com/llvm/llvm-project/issues/190736
Commit: 996599ddd95c81cbdf2c12336f3db6baec4499c5
https://github.com/llvm/llvm-project/commit/996599ddd95c81cbdf2c12336f3db6baec4499c5
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
A llvm/test/Transforms/LoopVectorize/VPlan/expand-scev.ll
Log Message:
-----------
[LV] Add VPlan printing tests checking SCEV expansion (NFC). (#191053)
Add additional test cases checking VPlan output of SCEV expansions.
Commit: 996efeaaa20247ac6bcdf5de9bf533c94c8a360f
https://github.com/llvm/llvm-project/commit/996efeaaa20247ac6bcdf5de9bf533c94c8a360f
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M flang/lib/Semantics/expression.cpp
M flang/test/Lower/CUDA/cuda-device-proc.cuf
Log Message:
-----------
[flang][cuda] Implicitly set bind(c) called kernel as global (#191050)
Commit: 075094f9bf460448ffb8f42d7e33925646694268
https://github.com/llvm/llvm-project/commit/075094f9bf460448ffb8f42d7e33925646694268
Author: Michael Jones <michaelrj at google.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M libc/hdr/types/char32_t.h
M libc/shared/rpc_server.h
M libc/src/__support/CMakeLists.txt
M libc/test/src/__support/CMakeLists.txt
Log Message:
-----------
[libc][MacOS] Enable wchar conversion and rpc_server (#191065)
Originally the wchar conversion was disabled due to MacOS not providing
uchar.h. We only needed it for char32_t so this PR just provides it
directly from our headers on MacOS. This also fixes fwrite_unlocked not
being available on MacOS which is needed for rpc_server.h.
Commit: f1c2e3cc68d95a0a4f975fdcbdf099398786a956
https://github.com/llvm/llvm-project/commit/f1c2e3cc68d95a0a4f975fdcbdf099398786a956
Author: Zorojuro <sawantsukumar at gmail.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M libc/shared/math.h
A libc/shared/math/cbrtbf16.h
M libc/src/__support/math/CMakeLists.txt
A libc/src/__support/math/cbrtbf16.h
M libc/src/math/generic/CMakeLists.txt
M libc/src/math/generic/cbrtbf16.cpp
M libc/test/shared/CMakeLists.txt
M libc/test/shared/shared_math_test.cpp
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[libc][math] Refactor cbrtbf16 function header-only (#188204)
Co-authored-by: bassiounix <muhammad.m.bassiouni at gmail.com>
Commit: 59bafb5fdd5c6e29b1d03af2499e05c0d5499e80
https://github.com/llvm/llvm-project/commit/59bafb5fdd5c6e29b1d03af2499e05c0d5499e80
Author: Chinmay Deshpande <chdeshpa at amd.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.monitor.sleep.ll
Log Message:
-----------
[AMDGPU][GISel] RegBankLegalize rules for amdgcn_s_monitor_sleep (#191063)
Commit: d03e8f4fac8edc303dfebeb9929c32b6d31c77c8
https://github.com/llvm/llvm-project/commit/d03e8f4fac8edc303dfebeb9929c32b6d31c77c8
Author: Alexey Samsonov <vonosmas at gmail.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
R libc/include/arpa/inet.h.def
M libc/include/arpa/inet.yaml
R libc/include/complex.h.def
M libc/include/complex.yaml
R libc/include/elf.h.def
M libc/include/elf.yaml
R libc/include/fcntl.h.def
M libc/include/fcntl.yaml
R libc/include/inttypes.h.def
M libc/include/inttypes.yaml
M libc/include/llvm-libc-types/imaxdiv_t.h
R libc/include/netinet/in.h.def
M libc/include/netinet/in.yaml
R libc/include/poll.h.def
M libc/include/poll.yaml
R libc/include/sched.h.def
M libc/include/sched.yaml
R libc/include/signal.h.def
M libc/include/signal.yaml
R libc/include/stdio.h.def
M libc/include/stdio.yaml
R libc/include/stdlib.h.def
M libc/include/stdlib.yaml
R libc/include/sysexits.h.def
M libc/include/sysexits.yaml
R libc/include/termios.h.def
M libc/include/termios.yaml
R libc/include/unistd.h.def
M libc/include/unistd.yaml
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[libc] Remove yet another batch of header template files (#191067)
This follows up on ae63230c23151c16ba68d5213da8bd5459c03a40 and remove
header templates from more C/POSIX standard headers, where templates
only used to `#include` files with macro definitions. We add this logic
to YAML instead - add entries to the `macros` list that point to the
correct `macro_header` to ensure it would be included.
Commit: 6cb4f3955424c37261e90c9970e2a0fcaae4b23f
https://github.com/llvm/llvm-project/commit/6cb4f3955424c37261e90c9970e2a0fcaae4b23f
Author: Naveen Seth Hanig <naveen.hanig at outlook.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M clang/lib/Driver/ModulesDriver.cpp
A clang/test/Driver/modules-driver-clang-modules-only.cpp
M clang/test/Driver/modules-driver-manifest-input-args.cpp
Log Message:
-----------
[clang][ModulesDriver] Add support for Clang modules to -fmodules-driver (#187606)
This PR adds basic support for explicit module builds using Clang
modules only, managed natively by the Clang driver.
(Caching of built modules is not included in this PR.)
RFC for driver-managed module builds:
https://discourse.llvm.org/t/rfc-modules-support-simple-c-20-modules-use-from-the-clang-driver-without-a-build-system
Commit: 17ff42ff9bf301e465f68acd79c4c74f25962fd0
https://github.com/llvm/llvm-project/commit/17ff42ff9bf301e465f68acd79c4c74f25962fd0
Author: Md Abdullah Shahneous Bari <md.abdullah.shahneous.bari at intel.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/XeVMOps.td
M mlir/lib/Conversion/XeGPUToXeVM/XeGPUToXeVM.cpp
M mlir/lib/Conversion/XeVMToLLVM/XeVMToLLVM.cpp
M mlir/test/Conversion/XeGPUToXeVM/loadstore_1d.mlir
M mlir/test/Conversion/XeGPUToXeVM/loadstore_nd.mlir
M mlir/test/Conversion/XeGPUToXeVM/loadstore_nd_sub_byte.mlir
M mlir/test/Conversion/XeGPUToXeVM/loadstoreprefetch.mlir
M mlir/test/Conversion/XeGPUToXeVM/prefetch_nd.mlir
M mlir/test/Conversion/XeGPUToXeVM/prefetch_nd_sub_byte.mlir
M mlir/test/Conversion/XeVMToLLVM/xevm-to-llvm.mlir
Log Message:
-----------
[mlir][XeGPUToXeVM][XeVMToLLVM] Update the default cache-control values. (#190954)
In XeGPU, user can provide cache control value for only certain levels,
they do not have to provide cache-control value for all levels. However,
XeVM requires that each cache level must have a cache-control value. To
solve this issue, XeGPUToXeVM conversion pass adds default value to
cache-levels that does not have a user-provided cache-control value.
This PR updates this process in the following way:
- If no cache-control hint is provided for any levels, use system
default (USE_DEFAULT).
- If any of the levels has at least one cache-control value, use certain
default value for other levels.
If system default (USE_DEFAULT) is used, no cache-control metadata
annotation is necessary.
Commit: 9a14f0f5e75359e07bdef3e9a50cf8c191f92515
https://github.com/llvm/llvm-project/commit/9a14f0f5e75359e07bdef3e9a50cf8c191f92515
Author: Krzysztof Drewniak <Krzysztof.Drewniak at amd.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/test/CodeGen/AMDGPU/s-barrier.ll
M mlir/include/mlir/Dialect/LLVMIR/ROCDLOps.td
Log Message:
-----------
[AMDGPU] Emit s_barrier_signal for s.barrier.signal.var when able (#191028)
When the member count is 0 (which causes the barrier's member count to
be re-used from a previous barrier initialization or
s.barrier.signal.var) and the barrier is constant, we can represent
named barrier signaling with the m0-less form. Enable this behavior.
Assisted by Opus 4.6 which drafted the initial implementation.
Commit: 03d0986b24d5e7a4eacc73729ac4876c7bcb85d0
https://github.com/llvm/llvm-project/commit/03d0986b24d5e7a4eacc73729ac4876c7bcb85d0
Author: Peter Collingbourne <pcc at google.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M llvm/utils/gn/secondary/clang/include/clang/Basic/BUILD.gn
M llvm/utils/gn/secondary/clang/lib/Basic/BUILD.gn
Log Message:
-----------
gn build: Port 1f1ea1ae4151
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/191079
Commit: cdd2a760ff99f213f114c3badf32ed47846bdc56
https://github.com/llvm/llvm-project/commit/cdd2a760ff99f213f114c3badf32ed47846bdc56
Author: Peter Collingbourne <pcc at google.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M llvm/utils/gn/secondary/clang/lib/ScalableStaticAnalysisFramework/Analyses/BUILD.gn
Log Message:
-----------
gn build: Port 4913bd5588ad
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/191080
Commit: 1be9eed7b360e5d1c5027c86fb6e655a8d172012
https://github.com/llvm/llvm-project/commit/1be9eed7b360e5d1c5027c86fb6e655a8d172012
Author: SiliconA-Z <gfunni234 at gmail.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M llvm/lib/Transforms/ObjCARC/ObjCARCOpts.cpp
M llvm/test/Transforms/ObjCARC/test_autorelease_pool.ll
Log Message:
-----------
[ObjCARC] Optimize MayAutorelease by skipping over pools (#188583)
This enables the ARC optimizer to remove autoreleasePoolPush/Pop pairs
that were previously retained. By skipping over nested autorelease
pools, MayAutorelease now correctly recognizes that autoreleases
contained within an inner pool do not escape, allowing the removal of
outer pool boundaries.
Commit: d9e52ccd1aeb572f56806bc8f64005afd47dc617
https://github.com/llvm/llvm-project/commit/d9e52ccd1aeb572f56806bc8f64005afd47dc617
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M .github/workflows/libcxx-build-and-test.yaml
M libcxx/docs/TestingLibcxx.rst
A libcxx/test/requirements.txt
A libcxx/test/selftest/filecheck.negative.sh.cpp
A libcxx/test/selftest/filecheck.sh.cpp
A libcxx/test/selftest/splitfile.sh.cpp
M libcxx/utils/libcxx/test/features/misc.py
Log Message:
-----------
[libc++] Optionally support filecheck and split-file (#165769)
This patch adds optional support for FileCheck and split-file in
libc++'s test suite. Whether FileCheck / split-file is available
can be queried using Lit features.
This should make it possible to test several things that were
previously impossible to test, especially for specific code
generation.
Supersedes #65917 and #188283
Commit: 3b3ac5a1169722bff1ae0f5f8f27a48cc08c3d02
https://github.com/llvm/llvm-project/commit/3b3ac5a1169722bff1ae0f5f8f27a48cc08c3d02
Author: Keith Smiley <keithbsmiley at gmail.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[bazel] Remove unnecessary textual_hdrs usage (#191072)
textual_hdrs is supposed to be used for header files that aren't
standalone, which isn't the case for these mlir headers. Being in
textual_hdrs excludes them from header parsing, which means
layering_check results aren't entirely valid. I'm going to try and
enable header parsing on these targets in a follow up change.
Commit: c98132835667eba2978101e05f6887d9ccc8cfbb
https://github.com/llvm/llvm-project/commit/c98132835667eba2978101e05f6887d9ccc8cfbb
Author: Ryan Buchner <rbuchner at qti.qualcomm.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/RISCV/basic-strided-stores.ll
Log Message:
-----------
[SLP] Create SLP trees starting from constant stride stores (#185964)
Must use `-slp-enable-strided-stores` to enable.
Commit: f7365375d9ecda7b715066e25fcb8730957a3c6a
https://github.com/llvm/llvm-project/commit/f7365375d9ecda7b715066e25fcb8730957a3c6a
Author: Sameer Sahasrabuddhe <sameer.sahasrabuddhe at amd.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
A clang/test/SemaHIP/incorrect-atomic-scope.hip
A clang/test/SemaOpenCL/incorrect-atomic-scope.cl
Log Message:
-----------
[Clang][NFC] tests showcasing incorrect use of HIP and OpenCL memory scope macros (#188890)
The tests demonstrate how incorrect LLVM IR is generated without
diagnostics, when an OpenCL or HIP scope number is passed to an AMDGPU
intrinsic. #185408 lays the groundwork for properly diagnosing this
situation by internally using a separate enum type to represent each set
of scope numbers.
Commit: 53e0c2bfc95e00e2212af2d9954e5d1f91850b7d
https://github.com/llvm/llvm-project/commit/53e0c2bfc95e00e2212af2d9954e5d1f91850b7d
Author: Keith Smiley <keithbsmiley at gmail.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[bazel] Rename PYBIND11 variables (#191095)
These are still used with nanobind so this name was misleading
Commit: 0c36771309f4f87a76a006a3a1430b30bede624a
https://github.com/llvm/llvm-project/commit/0c36771309f4f87a76a006a3a1430b30bede624a
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoZicbo.td
Log Message:
-----------
[RISCV] Remove NoVendorXMIPSCBOP from the Zicbop instructions. (#191015)
The XMIPSCBOP encodings use OP-CUSTOM-0 so there's no encoding overlap
here. Presence of a vendor extension should not disable parsing or
disassembly of a standard extension that doesn't overlap.
Commit: 8ce74e79d9dfe65b408ade6b38558553878c60d4
https://github.com/llvm/llvm-project/commit/8ce74e79d9dfe65b408ade6b38558553878c60d4
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/test/CodeGen/ARM/funnel-shift.ll
M llvm/test/CodeGen/Mips/funnel-shift.ll
M llvm/test/CodeGen/PowerPC/funnel-shift.ll
M llvm/test/CodeGen/X86/funnel-shift.ll
M llvm/test/CodeGen/X86/i128-udiv.ll
Log Message:
-----------
[TargetLowering] Add support for more constants to expandDIVREMByConstant. (#189286)
If we can find a chunk size k where 2^k mod divisor == -1, we can add
the even chunks and subtract the odd chunks. The resulting sum may be
negative, so we need to add 2^k + 1 (a multiple of divisor) for each odd
chunk to ensure the result is positive. We have enough extra bits
between the chunk size and HBitWidth to avoid overflow.
The idea here is similar to checking if a decimal number is divisible by
11. You can add the even digits and subtract the odd digits. If the
resulting sum is divisible by 11 the original number is divisible by 11.
Commit: d0a54493b3e95c3126fccfbbf08db9abbe2b1d01
https://github.com/llvm/llvm-project/commit/d0a54493b3e95c3126fccfbbf08db9abbe2b1d01
Author: Aviral Goel <aviralg at users.noreply.github.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M clang/include/clang/ScalableStaticAnalysisFramework/Core/Model/PrivateFieldNames.def
M clang/include/clang/ScalableStaticAnalysisFramework/Core/Serialization/JSONFormat.h
M clang/include/clang/ScalableStaticAnalysisFramework/Core/Serialization/SerializationFormat.h
M clang/include/clang/ScalableStaticAnalysisFramework/Core/WholeProgramAnalysis/DerivedAnalysis.h
M clang/include/clang/ScalableStaticAnalysisFramework/Core/WholeProgramAnalysis/WPASuite.h
M clang/lib/ScalableStaticAnalysisFramework/CMakeLists.txt
M clang/lib/ScalableStaticAnalysisFramework/Core/CMakeLists.txt
M clang/lib/ScalableStaticAnalysisFramework/Core/Serialization/JSONFormat/JSONFormatImpl.cpp
M clang/lib/ScalableStaticAnalysisFramework/Core/Serialization/JSONFormat/JSONFormatImpl.h
A clang/lib/ScalableStaticAnalysisFramework/Core/Serialization/JSONFormat/WPASuite.cpp
A clang/lib/ScalableStaticAnalysisFramework/Plugins/CMakeLists.txt
A clang/lib/ScalableStaticAnalysisFramework/Plugins/ExamplePlugin/AnalysisResults.h
A clang/lib/ScalableStaticAnalysisFramework/Plugins/ExamplePlugin/CMakeLists.txt
A clang/lib/ScalableStaticAnalysisFramework/Plugins/ExamplePlugin/PairsAnalysis.cpp
A clang/lib/ScalableStaticAnalysisFramework/Plugins/ExamplePlugin/TagsAnalysis.cpp
A clang/lib/ScalableStaticAnalysisFramework/Plugins/ExamplePlugin/TagsPairsAnalysis.cpp
A clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/duplicate-analysis-name.json
A clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/missing-results.json
A clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/pairs-result-bad-count.json
A clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/pairs-result-bad-pair-counts.json
A clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/pairs-result-entry-not-object.json
A clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/pairs-result-missing-entity-id.json
A clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/result-entry-analysis-name-not-string.json
A clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/result-entry-deserializer-error.json
A clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/result-entry-missing-analysis-name.json
A clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/result-entry-missing-result-field.json
A clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/result-entry-no-format-info.json
A clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/result-entry-not-object.json
A clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/result-entry-result-not-object.json
A clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/results-not-array.json
A clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/rt-all-results.json
A clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/rt-empty.json
A clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/rt-multiple-results.json
A clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/tags-result-bad-element.json
A clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/tags-result-missing-tags.json
A clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/tagspairs-result-bad-field-type.json
A clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/tagspairs-result-missing-field.json
A clang/test/Analysis/Scalable/ssaf-format/WPASuite/with-plugin.test
A clang/test/Analysis/Scalable/ssaf-format/WPASuite/without-plugin.test
A clang/test/Analysis/Scalable/ssaf-format/lit.local.cfg
M clang/test/CMakeLists.txt
M clang/tools/clang-ssaf-format/CMakeLists.txt
M clang/tools/clang-ssaf-format/SSAFFormat.cpp
M clang/unittests/ScalableStaticAnalysisFramework/Frontend/TUSummaryExtractorFrontendActionTest.cpp
M clang/unittests/ScalableStaticAnalysisFramework/Registries/MockSerializationFormat.cpp
M clang/unittests/ScalableStaticAnalysisFramework/Registries/MockSerializationFormat.h
M clang/unittests/ScalableStaticAnalysisFramework/TestFixture.h
Log Message:
-----------
[clang][ssaf] Add `JSONFormat` support for `WPASuite` (#191082)
This patch adds `JSONFormat` serialization support for `WPASuite`.
- Adds `readWPASuite` / `writeWPASuite` to the `SerializationFormat`
abstract interface and implements them in `JSONFormat`.
- Introduces `AnalysisResultRegistryGenerator`, a per-format plugin
registry template in `SerializationFormat`, allowing analysis authors to
register (de)serializers for their `AnalysisResult` subtypes with a
single static declaration.
- Extends `PrivateFieldNames.def` with `WPASuite::Data` and
`WPASuite::IdTable`, and adds a `makeWPASuite()` factory to
`SerializationFormat`, so deserialization code can construct a
`WPASuite` incrementally through the same access-controlled pattern used
for all other SSAF data structures.
Commit: e65dd1f8a0c8cfd2255f336e5096232f587ed397
https://github.com/llvm/llvm-project/commit/e65dd1f8a0c8cfd2255f336e5096232f587ed397
Author: Sam Elliott <aelliott at qti.qualcomm.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/test/CodeGen/RISCV/musttail.ll
Log Message:
-----------
[RISCV][NFC] Improve Musttail Comments/Tests (#191093)
In the Target code, this is mostly fixing typos or other comment issues.
In the musttail.ll test, this ensures the tests are more aligned with
their comments, and that the comments are accurate. I inserted some
inline asm clobbers so it's also easier to see what's going on.
Commit: fc48fac95b8b1bad161c705dd4bf71300bd2b609
https://github.com/llvm/llvm-project/commit/fc48fac95b8b1bad161c705dd4bf71300bd2b609
Author: Stefan Schulze Frielinghaus <stefansf at linux.ibm.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M compiler-rt/lib/sanitizer_common/sanitizer_linux_libcdep.cpp
Log Message:
-----------
[TSan] Fix determining static TLS blocks (#183106)
Running gcc test c-c++-common/tsan/tls_race.c on s390 we get:
ThreadSanitizer: CHECK failed: tsan_platform_linux.cpp:618 "((thr_beg))
>= ((tls_addr))" (0x3ffaa35e140, 0x3ffaa35e250) (tid=2419930)
#0 __tsan::CheckUnwind() /devel/src/libsanitizer/tsan/tsan_rtl.cpp:696
(libtsan.so.2+0x91b57)
#1 __sanitizer::CheckFailed(char const*, int, char const*, unsigned long
long, unsigned long long)
/devel/src/libsanitizer/sanitizer_common/sanitizer_termination.cpp:86
(libtsan.so.2+0xd211b)
#2 __tsan::ImitateTlsWrite(__tsan::ThreadState*, unsigned long, unsigned
long) /devel/src/libsanitizer/tsan/tsan_platform_linux.cpp:618
(libtsan.so.2+0x8faa3)
#3 __tsan::ThreadStart(__tsan::ThreadState*, unsigned int, unsigned long
long, __sanitizer::ThreadType)
/devel/src/libsanitizer/tsan/tsan_rtl_thread.cpp:225
(libtsan.so.2+0xaadb5)
#4 __tsan_thread_start_func
/devel/src/libsanitizer/tsan/tsan_interceptors_posix.cpp:1065
(libtsan.so.2+0x3d34d)
#5 start_thread <null> (libc.so.6+0xae70d) (BuildId:
d3b08de1b543c2d15d419bf861b3c2e4c01ac75b)
#6 thread_start <null> (libc.so.6+0x12d2ff) (BuildId:
d3b08de1b543c2d15d419bf861b3c2e4c01ac75b)
In order to determine the static TLS blocks in GetStaticTlsBoundary we
iterate over the modules and try to find the largest range without a
gap. Here we might have that modules are spaced exactly by the
alignment. For example, for the failing test we have:
(gdb) p/x ranges.data_[0]
$1 = {begin = 0x3fff7f9e6b8, end = 0x3fff7f9e740, align = 0x8, tls_modid
= 0x3} (gdb) p/x ranges.data_[1]
$2 = {begin = 0x3fff7f9e740, end = 0x3fff7f9eed0, align = 0x40,
tls_modid = 0x2} (gdb) p/x ranges.data_[2]
$3 = {begin = 0x3fff7f9eed8, end = 0x3fff7f9eef8, align = 0x8, tls_modid
= 0x4} (gdb) p/x ranges.data_[3]
$4 = {begin = 0x3fff7f9eefc, end = 0x3fff7f9ef00, align = 0x4, tls_modid
= 0x1}
where ranges[3].begin == ranges[2].end + ranges[3].align holds. Since in
the loop a strict inequality test is used we compute the wrong address
(gdb) p/x *addr
$5 = 0x3fff7f9eefc
whereas 0x3fff7f9e6b8 is expected which is why we bail out in the
subsequent.
Commit: dabd8cc2334917272fe73b70626fd3a5f9e63cf5
https://github.com/llvm/llvm-project/commit/dabd8cc2334917272fe73b70626fd3a5f9e63cf5
Author: Marian Buschsieweke <maribu at users.noreply.github.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M compiler-rt/lib/sanitizer_common/sanitizer_platform_limits_posix.cpp
Log Message:
-----------
[compiler-rt] fix __sanitizer::struct_sock_fprog_sz availability (#183411)
`struct sock_fprog` is not provided by glibc, but rather by the linux
headers (`#include <linux/filter.h`). It seems that glibc due to an
implementation detail internally includes `<linux/filter.h>` somewhere
other C libs (e.g. musl) do not, which previously caused build failures
and let to disabling `struct sock_fprog` on non-glibc Linux systems.
This adds the missing include and provides it again for all Linux
systems regardless of C lib.
Commit: 42629d7a174a62b98835e2e4c738ccdce027590b
https://github.com/llvm/llvm-project/commit/42629d7a174a62b98835e2e4c738ccdce027590b
Author: Shreeyash Pandey <shreeyash335 at gmail.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/test/CodeGen/AArch64/arm64-atomic.ll
M llvm/test/CodeGen/AArch64/atomicrmw-O0.ll
M llvm/test/CodeGen/AArch64/logical-op-with-not.ll
Log Message:
-----------
[AArch64][CodeGen] match (or x (not y)) to generate mov+orn (#190769)
Fixes: https://github.com/llvm/llvm-project/issues/100045
Adds AddedComplexity to increase the priority the pattern that matches
(or x (not y)) and generates a mov+orn instead of the original mvn+orr.
The number of instructions still stay the same but mov+orn can be
considered better than mvn+orr for two reasons:
1. Symmetry: For the same input with an 'and' instead of 'or', mov+bic
is generated.
2. Optimzation through register rename: If mov is immediate (for
example, 'mov x1, #0x4'), it can be retired early by the register
renamer and never issued for execution.
Commit: 3b9f7913148d0f5d952ce85e8d8dd6ae4fec678b
https://github.com/llvm/llvm-project/commit/3b9f7913148d0f5d952ce85e8d8dd6ae4fec678b
Author: Mads Marquart <mads at marquart.dk>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M compiler-rt/lib/lsan/lsan_common.cpp
Log Message:
-----------
[LSAN] Add extra suppressions on Apple Aarch64 (#117478)
- _fetchInitializingClassList for startup code in dyld.
- dyld4::RuntimeState::_instantiateTLVs for thread locals.
Fixes https://github.com/llvm/llvm-project/issues/115992, now it shows
the following instead (in a project using thread locals):
```
-----------------------------------------------------
Suppressions used:
count bytes template
3 120 *_fetchInitializingClassList*
1 104 *dyld4::RuntimeState::_instantiateTLVs*
-----------------------------------------------------
```
Commit: edff73e19e4448541086431b325df75de62817ba
https://github.com/llvm/llvm-project/commit/edff73e19e4448541086431b325df75de62817ba
Author: Mészáros Gergely <gergely.meszaros at intel.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M llvm/include/llvm/ABI/FunctionInfo.h
Log Message:
-----------
[LLVMABI] Fix build for GCC < 8 (#190974)
`llvm::abi::ArgInfo::get*` functions return `llvm::abi::ArgInfo` by
value, so we need the type to be copyable. It is not though, because of
the non trivially copyable member `MaybeAlign` (`std::optional<Align>`)
in a union, which deletes the implicit copy/move constructors and
assignment operators.
For modern GCC versions and for clang this does not present as a problem
due to named return value optimization (NRVO). It is however not a bug
in old GCC versions, because NRVO is not guaranteed. Similary
`std::optional`
could be trivially copyable, but that is also not guaranteed by the
standard.
Instead of depending on these details of the C++ implementation, move
the `MaybeAlign` member out of the union, and make it a separate member
of `abi::ArgInfo`. We lose the expressiveness from the type system that
`IndirectAttrInfo` always has a defined alignment, but we can get that
back in practice by placing asserts in the code that uses it. Therefore
`llvm::abi::ArgInfo` can still maintain this invariant.
Fixes: #190972
Commit: 82aee4c03a0a6e3ab616b5253edf79b48e013b71
https://github.com/llvm/llvm-project/commit/82aee4c03a0a6e3ab616b5253edf79b48e013b71
Author: Nikita Terentev <svet58585 at mail.ru>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M llvm/lib/DebugInfo/LogicalView/Readers/LVCodeViewReader.cpp
M llvm/lib/DebugInfo/LogicalView/Readers/LVDWARFReader.cpp
M llvm/unittests/DebugInfo/LogicalView/DWARFReaderTest.cpp
Log Message:
-----------
[llvm-debuginfo-analyzer] Fix missed 'else' in LVCodeViewReader and LVDWARFReader.cpp. (#188578)
Issues found PVS studio static analyzer. LVCodeViewReader.cpp. PR for #170117.
4. Potent UB: manipulation of invalid object.
The PVS-Studio warning: V519 The 'FeaturesValue' variable is assigned values twice successively.
Committed on behalf of @Seraphimt
Commit: 3cc34fb973408b0cf1be082ccc78d5f153c25387
https://github.com/llvm/llvm-project/commit/3cc34fb973408b0cf1be082ccc78d5f153c25387
Author: Brian Cain <brian.cain at oss.qualcomm.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M compiler-rt/cmake/caches/hexagon-linux-clangrt.cmake
Log Message:
-----------
[compiler-rt] Enable sanitizers, XRay, etc for hexagon (#190300)
Enable additional compiler-rt components in the hexagon-linux-clangrt
standalone cache file.
Also set CAN_TARGET_hexagon=1 to bypass the try_compile() probe that
fails during cross-compilation, and configure SANITIZER_CXX_ABI to use
the in-tree libc++ to avoid link failures.
Commit: b48f5af727f2c99d0f8c2a0c0ef85737ec682d3f
https://github.com/llvm/llvm-project/commit/b48f5af727f2c99d0f8c2a0c0ef85737ec682d3f
Author: Carlos Alberto Enciso <Carlos.Enciso at sony.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M llvm/lib/DebugInfo/LogicalView/Readers/LVCodeViewReader.cpp
M llvm/lib/DebugInfo/LogicalView/Readers/LVDWARFReader.cpp
M llvm/unittests/DebugInfo/LogicalView/DWARFReaderTest.cpp
Log Message:
-----------
Revert "Fix missed 'else' in LVCodeViewReader and LVDWARFReader.cpp. " (#191109)
Reverts llvm/llvm-project#188578
It cause a test failure on multiple buildbots.
Commit: ec78b2184fe69e27913ba729f3db300f4d26d260
https://github.com/llvm/llvm-project/commit/ec78b2184fe69e27913ba729f3db300f4d26d260
Author: Lang Hames <lhames at gmail.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M orc-rt/unittests/SessionTest.cpp
Log Message:
-----------
[orc-rt] Add ScheduleShutdownFromOnDetachHandler unit test. (#191110)
This test checks that it's safe to call Session::shutdown from an
on-detach handler, and that:
1. The Session does proceed to shut down.
2. All on-detach handlers run before any on-shutdown handlers.
Commit: b55965c6dba9c417b654fc27cff19b6403496fa3
https://github.com/llvm/llvm-project/commit/b55965c6dba9c417b654fc27cff19b6403496fa3
Author: NAKAMURA Takumi <geek4civic at gmail.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M clang/test/Driver/modules-driver-dep-graph.cpp
Log Message:
-----------
clang/test: Prepend a cleanup triggered by #190062 (#191103)
Commit: 501364026acf351a4a21dc52014d1a7ab4993329
https://github.com/llvm/llvm-project/commit/501364026acf351a4a21dc52014d1a7ab4993329
Author: Lang Hames <lhames at gmail.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M orc-rt/include/orc-rt/Session.h
Log Message:
-----------
[orc-rt] Add comment about Session::waitForShutdown usage. NFC. (#191111)
Add a warning not to call Session::waitFromShutdown from on-detach or
on-shutdown handlers.
Commit: 16f02c0940d6ee783c38ca27b44fc158d77e7567
https://github.com/llvm/llvm-project/commit/16f02c0940d6ee783c38ca27b44fc158d77e7567
Author: Phoebe Wang <phoebe.wang at intel.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
A clang/test/CodeGen/X86/pr190962.ll
M llvm/lib/Target/X86/X86FastISel.cpp
M llvm/lib/Target/X86/X86InstrInfo.cpp
M llvm/lib/Target/X86/X86InstrInfo.h
Log Message:
-----------
[X86][APX] Add copy instruction to LiveInterval of SrcReg (#191102)
Fixes: #190962
Commit: 6d49460de1e5ee87de94d48fd72cf3cf3d5bfc5a
https://github.com/llvm/llvm-project/commit/6d49460de1e5ee87de94d48fd72cf3cf3d5bfc5a
Author: Mateusz Mikuła <oss at mateuszmikula.dev>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M clang/lib/Driver/ToolChains/MinGW.cpp
M clang/test/Driver/mingw.cpp
Log Message:
-----------
[Clang] [MinGW] Handle `-nolibc` argument (#182062)
This implementation differs from GCC, but arguably more in line with
Unix systems, because it stops linking of default Win32 system
libraries.
On GCC it works like this:
```
❯ /ucrt64/bin/gcc -### /dev/null -nolibc 2>&1 | tr ' ' '\n' | rg '^\-l' | sort -u
-lgcc
-lgcc_eh
-lkernel32
-lmingw32
-lmingwex
-lmsvcrt
❯ /ucrt64/bin/gcc -### /dev/null 2>&1 | tr ' ' '\n' | rg '^\-l' | sort -u
-ladvapi32
-lgcc
-lgcc_eh
-lkernel32
-lmingw32
-lmingwex
-lmsvcrt
-lpthread
-lshell32
-luser32
```
Clang with this PR:
```
❯ ./bin/clang -### /dev/null -nolibc 2>&1 | tr ' ' '\n' | rg '^"\-l' | sort -u
"-lgcc"
"-lgcc_eh"
```
The motivation for supporting this argument comes from Rust, which wants
to control what is linked, but still utilize compiler builtins. With GCC
that is done by supplying `-nodefaultlibs` and `-lgcc`, but LLVM's
compiler-rt cannot be added back as easily.
`-nolibc --unwindlib=none` that skips Win32 libs would give the parity
with GCC's `-nodefaultlibs -lgcc`.
Commit: 5359e80b812971298e895556e097666b6d426081
https://github.com/llvm/llvm-project/commit/5359e80b812971298e895556e097666b6d426081
Author: Lang Hames <lhames at gmail.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M orc-rt/include/orc-rt/Session.h
M orc-rt/lib/executor/Session.cpp
Log Message:
-----------
[orc-rt] Simplify notification service construction in Session. NFC. (#191113)
We can replace the addNotificationService method with a call to the
generic createService method that was introduced in 98ccac607a9ff.
Commit: ada1a0080748ba43cda2081184f46416aec1f4e9
https://github.com/llvm/llvm-project/commit/ada1a0080748ba43cda2081184f46416aec1f4e9
Author: Fangrui Song <i at maskray.me>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
A llvm/test/MC/ARM/thumb-ldr-stretch.s
A llvm/test/MC/CSKY/lrw-stretch.s
Log Message:
-----------
[test] Add MC relaxation stretch tests (#191118)
Verify:
- ARM tLDRpci instructions don't spuriously widen to t2LDRpci when
upstream branches relax, which would push cbz targets out of range.
This would catch the #184544 regression.
- CSKY lrw16 instructions don't spuriously widen to lrw32 when
upstream branches relax. Similar to ARM.
Commit: 0d42811ea4658b3e86a3801b3bc848324f8540f8
https://github.com/llvm/llvm-project/commit/0d42811ea4658b3e86a3801b3bc848324f8540f8
Author: Cullen Rhodes <cullen.rhodes at arm.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp
Log Message:
-----------
[AArch64] Avoid expensive getStrictlyReservedRegs calls in isAnyArgRegReserved (#190957)
`AArch64RegisterInfo::isAnyArgRegReserved` is used during call lowering
across all instruction selectors (SDAG, GISel, FastISel) to emit an
error if any of the arg registers (x0-x7) are reserved. This puts
`AArch64RegisterInfo::getStrictlyReservedRegs` which computes this in
the hot-path and it shows up in compile-time profiles since it's
computed for every call.
As the intent was to guard against using +reserve-x{0-7} with function
calls we can instead call `isXRegisterReserved` which is faster since
it's a simple BitVector lookup.
Compile-time improves across all instruction selectors on CTMark:
geomean
SDAG ~ -0.14%
GISel ~ -0.6%
FastISel ~ -0.7% (measured locally)
https://llvm-compile-time-tracker.com/compare.php?from=4d84263b341c3ee1847081c50e1541b62fbcb08c&to=23c4576c01d7d5e0e603366b86239e069410c3a7&stat=instructions%3Au
The numbers above are from the initial implementation that cached
`isAnyArgRegReserved`, but local experiments show instead calling
`isXRegisterReserved` is even faster. I also experimented with caching
`getStrictlyReservedRegs`, but the compile-time impact is negligible which
suggests this code isn't particularly hot and worth optimising outside of
call-lowering:
https://llvm-compile-time-tracker.com/compare.php?from=4d84263b341c3ee1847081c50e1541b62fbcb08c&to=38166d5afa9dd53320da0d47d4f056d08f0d75ca&stat=instructions%3Au
so I've also removed the FIXME from `getStrictlyReservedRegs`.
Commit: 4575266a6615f352b53e12cf4510dbad1669b363
https://github.com/llvm/llvm-project/commit/4575266a6615f352b53e12cf4510dbad1669b363
Author: Fangrui Song <i at maskray.me>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M llvm/lib/MC/MCAssembler.cpp
A llvm/test/MC/X86/align-branch-convergence.s
Log Message:
-----------
[MC] Track per-section inner relaxation iterations and add convergence test (#191121)
Count inner iterations (max across sections) instead of outer relaxOnce
calls. This more accurately reflects the work done during relaxation.
Add a test that verifies boundary alignment convergence may require
O(N) iterations where N is the number of BoundaryAlign fragments.
This will be fixed by #190318
Commit: a5ae63917e863dc408a1f355620427e51c154fd9
https://github.com/llvm/llvm-project/commit/a5ae63917e863dc408a1f355620427e51c154fd9
Author: Phoebe Wang <phoebe.wang at intel.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M clang/test/CodeGen/X86/pr190962.ll
Log Message:
-----------
[X86] Fix No available targets failure (#191116)
Commit: 7c1805d66484552700e04da1269ce2e7d53bec4c
https://github.com/llvm/llvm-project/commit/7c1805d66484552700e04da1269ce2e7d53bec4c
Author: Luke Lau <luke at igalia.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M llvm/lib/CodeGen/ExpandVectorPredication.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vcopysign-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfabs-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vcopysign-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfabs-vp.ll
Log Message:
-----------
[RISCV] Remove codegen for vp_fabs, vp_fcopysign (#190592)
Part of the work to remove trivial VP intrinsics from the RISC-V
backend, see
https://discourse.llvm.org/t/rfc-remove-codegen-support-for-trivial-vp-intrinsics-in-the-risc-v-backend/87999
This splits off 2 intrinsics from #179622.
The remaining sign bit intrinsic vp_fneg is expanded in #190589 since
other tests rely on it
Commit: e2b44f1fbe2dbff14b4067836b715f2201e35178
https://github.com/llvm/llvm-project/commit/e2b44f1fbe2dbff14b4067836b715f2201e35178
Author: Kit Dallege <xaum.io at gmail.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M libc/docs/CMakeLists.txt
M libc/docs/headers/index.rst
A libc/utils/docgen/fcntl.yaml
Log Message:
-----------
[libc][docs] Add fcntl.h POSIX header documentation (#188822)
Add YAML documentation for `fcntl.h` listing all functions and macros as
defined in POSIX.1-2024 (IEEE Std 1003.1-2024).
**Functions (6):** creat, fcntl, open, openat, posix_fadvise,
posix_fallocate
**Macros (51):** O_RDONLY, O_WRONLY, O_RDWR, O_APPEND, O_CREAT, O_EXCL,
O_TRUNC, F_DUPFD, F_GETFD, F_SETFD, F_GETFL, F_SETFL, AT_FDCWD,
POSIX_FADV_*, and more.
Part of #122006
Commit: 87491a4c8028636bc794193004771a49cbe32a2b
https://github.com/llvm/llvm-project/commit/87491a4c8028636bc794193004771a49cbe32a2b
Author: Naveen Seth Hanig <naveen.hanig at outlook.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M clang/lib/Driver/ModulesDriver.cpp
R clang/test/Driver/modules-driver-clang-modules-only.cpp
M clang/test/Driver/modules-driver-manifest-input-args.cpp
Log Message:
-----------
Revert "[clang][ModulesDriver] Add support for Clang modules to -fmodules-driver" due to memory leak (#191122)
Reverts llvm/llvm-project#187606 due to a memory leak.
See
https://github.com/llvm/llvm-project/pull/187606#issuecomment-4212198373
Commit: f1aa984e7183aa60f3a989c187cbcd845147b059
https://github.com/llvm/llvm-project/commit/f1aa984e7183aa60f3a989c187cbcd845147b059
Author: Luke Lau <luke at igalia.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.h
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fptosi-vp-mask.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fptosi-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fptoui-vp-mask.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fptoui-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-sitofp-vp-mask.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-sitofp-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-uitofp-vp-mask.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-uitofp-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfptosi-vp-mask.ll
M llvm/test/CodeGen/RISCV/rvv/vfptosi-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfptoui-vp-mask.ll
M llvm/test/CodeGen/RISCV/rvv/vfptoui-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vsitofp-vp-mask.ll
M llvm/test/CodeGen/RISCV/rvv/vsitofp-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vuitofp-vp-mask.ll
M llvm/test/CodeGen/RISCV/rvv/vuitofp-vp.ll
Log Message:
-----------
[RISCV] Remove codegen for vp_fp_to_{u,s}int, vp_{u,s}int_to_fp (#190576)
Part of the work to remove trivial VP intrinsics from the RISC-V
backend, see
https://discourse.llvm.org/t/rfc-remove-codegen-support-for-trivial-vp-intrinsics-in-the-risc-v-backend/87999
This splits off 4 intrinsics from #179622.
Commit: 9162f069a3abf2cf3a2718a5607969bc83680f05
https://github.com/llvm/llvm-project/commit/9162f069a3abf2cf3a2718a5607969bc83680f05
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M llvm/lib/Passes/PassBuilder.cpp
M llvm/test/Other/new-pm-defaults.ll
M llvm/test/Other/new-pm-lto-defaults.ll
M llvm/test/Other/new-pm-thinlto-postlink-defaults.ll
M llvm/test/Other/new-pm-thinlto-postlink-pgo-defaults.ll
M llvm/test/Other/new-pm-thinlto-postlink-samplepgo-defaults.ll
R llvm/test/Transforms/LoopVectorize/X86/metadata-enable.ll
A llvm/test/Transforms/PhaseOrdering/X86/loop-vectorize-metadata.ll
Log Message:
-----------
[Passes] Enable vectorizers at Oz (#190182)
The way this is handled right now is very inconsistent. When using
`-passes="default<Oz>"` (the code modified here), both vectorizers were
disabled. The clang frontend enables SLP at Oz but not LoopVectorize.
All the LTO backends enable both vectorizers at Oz.
I'm proposing here that `default<Oz>` should enable both vectorizers by
default. There seems to be a consensus that this is the right thing to
do for SLP (as both Clang and LTO backends do this). It's a bit less
clear for LoopVectorize, but given that the implementation already has
special handling for minsize functions (like switching to code size for
cost modelling and disabling various size-increasing transforms) I'm
inclined that we should also be enabling it at minsize.
This is part of trying to make optsize/minsize purely attribute based
and independent of the pipeline optimization level.
Commit: 9ba774566e27b76b9c7c2b2ddd108c140e2579fb
https://github.com/llvm/llvm-project/commit/9ba774566e27b76b9c7c2b2ddd108c140e2579fb
Author: Luke Lau <luke at igalia.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M llvm/docs/LangRef.rst
M llvm/include/llvm/CodeGen/ISDOpcodes.h
M llvm/include/llvm/IR/Intrinsics.td
M llvm/include/llvm/Target/TargetSelectionDAG.td
M llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp
M llvm/lib/CodeGen/TargetLoweringBase.cpp
M llvm/lib/IR/Verifier.cpp
A llvm/test/CodeGen/AArch64/masked-sdiv-fixed-length.ll
A llvm/test/CodeGen/AArch64/masked-sdiv-scalable.ll
A llvm/test/CodeGen/AArch64/masked-srem-fixed-length.ll
A llvm/test/CodeGen/AArch64/masked-srem-scalable.ll
A llvm/test/CodeGen/AArch64/masked-udiv-fixed-length.ll
A llvm/test/CodeGen/AArch64/masked-udiv-scalable.ll
A llvm/test/CodeGen/AArch64/masked-urem-fixed-length.ll
A llvm/test/CodeGen/AArch64/masked-urem-scalable.ll
A llvm/test/CodeGen/PowerPC/masked-sdiv.ll
A llvm/test/CodeGen/PowerPC/masked-srem.ll
A llvm/test/CodeGen/PowerPC/masked-udiv.ll
A llvm/test/CodeGen/PowerPC/masked-urem.ll
A llvm/test/CodeGen/RISCV/rvv/masked-sdiv.ll
A llvm/test/CodeGen/RISCV/rvv/masked-srem.ll
A llvm/test/CodeGen/RISCV/rvv/masked-udiv.ll
A llvm/test/CodeGen/RISCV/rvv/masked-urem.ll
A llvm/test/CodeGen/X86/masked-sdiv.ll
A llvm/test/CodeGen/X86/masked-srem.ll
A llvm/test/CodeGen/X86/masked-udiv.ll
A llvm/test/CodeGen/X86/masked-urem.ll
A llvm/test/Verifier/masked-divrem.ll
Log Message:
-----------
[IR] Add llvm.masked.{udiv,sdiv,urem,srem} intrinsics (#189705)
Because division by zero is undefined behaviour, when the loop
vectorizer encounters a div that's not unconditionally executed it needs
to replace its divisor with a non-zero value on any lane that wouldn't
have been executed in the scalar loop:
%safedivisor = select <vscale x 2 x i1> %mask, <vscale x 2 x i64> %divisor, <vscale x 2 x i64> splat (i64 1)
%res = udiv <vscale x 2 x i64> %dividend, %safedivisor
https://godbolt.org/z/jczc3ovbr
We need this for architectures like x86 where division by zero (or
overflow for sdiv/srem) can trap. But on AArch64 and RISC-V division
doesn't trap so we don't actually need to mask off any divisors. Not
only that, but there are also dedicated vector division instructions
that can be predicated.
Originally we tried to optimize this on RISC-V by transforming `udiv x,
(select mask, y, 1) -> vp.udiv x, y, mask`. However this isn't actually
a correct transform because the masked off lanes aren't poison, but x.
So with the safe-divisor pattern we end up losing the information that
the masked off lanes aren't actually used and can be poison.
This patch adds masked intrinsics for udiv and friends to
represent the semantics where the masked off lanes don't trap and
produce poison. This will allow AArch64 and RISC-V to emit their native
predicated division instructions and avoid the redundant select
instruction.
%res = call <vscale x 4 x i32> @llvm.masked.udiv(<vscale x 4 x i32> %x, <vscale x 4 x i32> %y, <vscale x 4 x i1> %m)
Commit: 485265734464e04ab9b2a64e6967157e52fac5d0
https://github.com/llvm/llvm-project/commit/485265734464e04ab9b2a64e6967157e52fac5d0
Author: Lang Hames <lhames at gmail.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M orc-rt/include/orc-rt/Session.h
M orc-rt/lib/executor/Session.cpp
M orc-rt/unittests/SessionTest.cpp
Log Message:
-----------
[orc-rt] Remove Session::waitForShutdown. (#191124)
The existing implementation triggered Session shutdown and then blocked
on a std::future that would be unblocked by an on-shutdown callback that
waitForShutdown had installed. Since there is no guarantee that this
callback would be the last one run, the result was that waitForShutdown
only guaranteed that it would not return until the shutdown sequence had
started (rather than completed).
This could have been fixed, but the Session destructor is already
supposed to block until the Session can be safely destroyed, so a
"working" waitForShutdown would be effectively redundant. Since it was
also a potential footgun (calling it from an on-detach or on-shutdown
callback could deadlock) it was safer to just remove it entirely.
Some Session unit tests do rely on testing properties of the Session
after the shutdown sequence has started, so a new utility has been added
to SessionTests.cpp to support this.
Commit: d512d4ab010a60fc06e65db91e25497840f9679f
https://github.com/llvm/llvm-project/commit/d512d4ab010a60fc06e65db91e25497840f9679f
Author: Pankaj Dwivedi <pankajkumar.divedi at amd.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M llvm/include/llvm/ADT/GenericUniformityImpl.h
M llvm/lib/Analysis/UniformityAnalysis.cpp
Log Message:
-----------
[UniformityAnalysis] Skip CycleAnalysis on targets without branch divergence (#189948)
UniformityAnalysis unconditionally computes CycleAnalysis even on
targets that don't care about divergence, causing measurable
compile-time overhead (see [#99878
(comment)](https://github.com/llvm/llvm-project/pull/175167#issuecomment-4156230947)).
---------
Co-authored-by: padivedi <padivedi at amd.com>
Commit: fcb8fba5b7e7d717dd871528400abd37641aabbb
https://github.com/llvm/llvm-project/commit/fcb8fba5b7e7d717dd871528400abd37641aabbb
Author: Lang Hames <lhames at gmail.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M orc-rt/unittests/SessionTest.cpp
Log Message:
-----------
[orc-rt] Move RedundantAsyncShutdown to SessionTest suite. NFCI. (#191130)
RedundantAsyncShutdown is a Session test, not a ControllerAccess test.
Commit: 5a7c1e0e9086bf048b6261240d331613bdbadcfe
https://github.com/llvm/llvm-project/commit/5a7c1e0e9086bf048b6261240d331613bdbadcfe
Author: Mao Chuanjun <10255501521 at stu.ecnu.edu.cn>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M clang-tools-extra/clang-tidy/readability/NonConstParameterCheck.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/test/clang-tidy/checkers/readability/non-const-parameter.cpp
Log Message:
-----------
[clang-tidy] Fix false positive in readability-non-const-parameter with dependent array subscripts (#190936)
Fixes #60163
---------
Co-authored-by: Zeyi Xu <zeyi2 at nekoarch.cc>
Commit: 623d3bbdc5f7d78085c97261b0baff41901d4739
https://github.com/llvm/llvm-project/commit/623d3bbdc5f7d78085c97261b0baff41901d4739
Author: Phoebe Linck <phoebe.linck at hpe.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M flang/lib/Semantics/check-omp-loop.cpp
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/check-omp-structure.h
A flang/test/Semantics/OpenMP/assumed-size-array-dsa.f90
M flang/test/Semantics/OpenMP/cray-pointer-usage.f90
Log Message:
-----------
[Flang][OpenMP] Data-sharing restrictions on assumed-size arrays (#189324)
Per `OpenMP 5.0 2.19.1 Data-Sharing Attribute Rules`, assumed-size
arrays are predetermined shared and may not appear in a data-sharing
clause besides `shared`.
Patch adds a semantics check for assumed-size arrays appearing in
clauses where they aren't allowed.
Commit: ff3486071d34e21daf0df7ef6a154959772940de
https://github.com/llvm/llvm-project/commit/ff3486071d34e21daf0df7ef6a154959772940de
Author: Yeongu Choe <yeongu.choe at icloud.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M llvm/include/llvm/Support/TargetOpcodes.def
M llvm/include/llvm/Target/GenericOpcodes.td
M llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
A llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-constrained-fcmp.ll
M llvm/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer-info-validation.mir
Log Message:
-----------
[LLVM][GlobalISel] Implement G_STRICT_FCMP in IRTranslator (#190754)
- `G_STRICT_FCMP` and `G_STRICT_FCMPS` are constrained operations in
gMIR.
Commit: 3ad6afe0609b2138b81f773cf4fbe2d464bc26d6
https://github.com/llvm/llvm-project/commit/3ad6afe0609b2138b81f773cf4fbe2d464bc26d6
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M polly/lib/Transform/Canonicalization.cpp
Log Message:
-----------
[Polly] Remove pipeline-level Oz handling for LoopRotate (#191137)
This handling was moved fully into the pass in
1662c200a5b151ad15b7efc82837076d8967dc11. However, that changed
missed the usage of LoopRotate in polly.
Commit: 7fa216bb032aa0a90d5fe9c9b019162d4bb52ae5
https://github.com/llvm/llvm-project/commit/7fa216bb032aa0a90d5fe9c9b019162d4bb52ae5
Author: Max Graey <maxgraey at gmail.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
M llvm/test/Transforms/InstCombine/fp-floor-ceil.ll
Log Message:
-----------
[InstCombine] Simplify `floor`/`ceil` to `trunc` for integral tests (#190620)
Partially fix https://github.com/llvm/llvm-project/issues/188035
Some proof checks:
`fcmp oeq ceil(x), x` -> `fcmp oeq trunc(x), x`
[Proof](https://alive2.llvm.org/ce/z/kLQeFQ)
`fcmp one floor(x), x` -> `fcmp one trunc(x), x`
[Proof](https://alive2.llvm.org/ce/z/vyVAUX)
`fcmp ueq ceil(x), x` -> `fcmp ueq trunc(x), x`
[Proof](https://alive2.llvm.org/ce/z/DbFMZb)
`fcmp une floor(x), x` -> `fcmp une trunc(x), x`
[Proof](https://alive2.llvm.org/ce/z/QVLQLw)
This may be useful for CSE (due to `trunc(x) == x` is quite common
integral test) or further simplifications specific to `trunc`. Also,
`trunc` is cheaper if it lowered to
[libm](https://git.musl-libc.org/cgit/musl/tree/src/math/trunc.c) /
[libc](https://github.com/llvm/llvm-project/blob/b4f50cfd4a3a086db3f88271c9595056a877ef90/libc/src/__support/FPUtil/NearestIntegerOperations.h#L25)
call
Commit: a0908ae29705eea517c9667e07215b0c7dc49ba3
https://github.com/llvm/llvm-project/commit/a0908ae29705eea517c9667e07215b0c7dc49ba3
Author: Balázs Benics <benicsbalazs at gmail.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M clang/docs/analyzer/user-docs/Annotations.rst
M clang/include/clang/Basic/AttrDocs.td
Log Message:
-----------
[clang][docs] Improve documentation of [[ownership_returns]] attribute (#191005)
The 2 parameter use of this attribute wasn't documented.
This clarification is based of the following two commits:
- https://github.com/llvm/llvm-project/commit/d21139a34f51
- https://github.com/llvm/llvm-project/commit/893a303962608
Commit: d404a2e5233cf63018f6f01040b3a2b2bec50cb3
https://github.com/llvm/llvm-project/commit/d404a2e5233cf63018f6f01040b3a2b2bec50cb3
Author: Shreeyash Pandey <shreeyash335 at gmail.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/test/CodeGen/AArch64/arm64-atomic.ll
M llvm/test/CodeGen/AArch64/atomicrmw-O0.ll
M llvm/test/CodeGen/AArch64/logical-op-with-not.ll
Log Message:
-----------
Revert "[AArch64][CodeGen] match (or x (not y)) to generate mov+orn" (#191138)
Reverts llvm/llvm-project#190769
[Need to change email for the commit]
Commit: a9b863ee5260f2eb6259cd828c09d1082f9d9e67
https://github.com/llvm/llvm-project/commit/a9b863ee5260f2eb6259cd828c09d1082f9d9e67
Author: Dhruva <dhruvakodiadka at gmail.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/GISelValueTracking.cpp
A llvm/test/CodeGen/AArch64/GlobalISel/knownbits-stepvector.mir
Log Message:
-----------
[GlobalISel] Add G_STEP_VECTOR to computeKnownBits. (#190598)
This code is adapted from SelectionDAG::computeKnownBits.
part of https://github.com/llvm/llvm-project/issues/150515.
ticks off STEP_VECTOR.
Commit: 3f3a83cd7b95c1d5aa7dfb7698082823c6ae7d5b
https://github.com/llvm/llvm-project/commit/3f3a83cd7b95c1d5aa7dfb7698082823c6ae7d5b
Author: Carson Radtke <nosrac925 at gmail.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/SValBuilder.h
M clang/test/Analysis/atomics.c
Log Message:
-----------
[analyzer] Canonicalize _Atomic pointers in makeNullWithType (#190131)
Fixes #187925
Commit: 85212908f2078271b3cd63807bbcd239ad676104
https://github.com/llvm/llvm-project/commit/85212908f2078271b3cd63807bbcd239ad676104
Author: Sergey Kachkov <109674256+skachkov-sc at users.noreply.github.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/SeparateConstOffsetFromGEP.cpp
M llvm/test/Transforms/SeparateConstOffsetFromGEP/RISCV/split-gep.ll
Log Message:
-----------
[SeparateConstOffsetFromGEP] Fix incorrect inbounds flag in case of non-negative index but negative offset (#190192)
Fixes #190187
Currently, SeparateConstOffsetFromGEP preserves inbounds attribute if
new sequence of GEPs from the same base pointer has non-negative offsets
in each GEP (this was mentioned in
https://github.com/llvm/llvm-project/pull/159515). This statement seems
correct for me (if the sequence consists from 2 GEPs), but current
implementation has a flaw: it checks that constant byte offset and GEP
indices are non-negative. However, in some corner cases we can have a
situation when the index is non-negative, but its offset (in bytes) is
negative, so we can't preserve inbounds attribute. In the example, GEP
index after transformation can have values
`0x7ffffffffffffffd`/`0x7ffffffffffffffe`/`0x7fffffffffffffff`; they are
all non-negative (sign bit is zero), however, after multiplication on
sizeof(i64) they become negative and inbounds can't be preserved
anymore.
The proposed fix is to check that Idx * ElementStride is non-negative
(instead of checking Idx only).
Commit: 0646ebc6dc4fd328ee357d5463487729a50e0530
https://github.com/llvm/llvm-project/commit/0646ebc6dc4fd328ee357d5463487729a50e0530
Author: Pierre van Houtryve <pierre.vanhoutryve at amd.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
A llvm/test/TableGen/GlobalISelCombinerEmitter/match-table-hoisting.td
M llvm/test/TableGen/GlobalISelEmitter/MatchTableOptimizerSameOperand-invalid.td
M llvm/utils/TableGen/Common/GlobalISel/GlobalISelMatchTable.cpp
M llvm/utils/TableGen/Common/GlobalISel/GlobalISelMatchTable.h
Log Message:
-----------
[GlobalISel] Prevent hoisting of CheckIsSameOperand from creating invalid match tables (#190963)
Fixes #188513
This patch adds logic to ask PredicateMatchers whether they'd like to be
hoisted out of a specific Matcher or not.
SameOperandMatcher can use it to check if it's being hoisted out of the
RuleMatcher that defines the operand it relies on.
Assisted-By: Claude Opus 4.6
Context of Use: Claude was only used to add LLVM-style RTTI to the
matcher class (repetitive work). I then reviewed and cleaned up the code
it generated.
Commit: e1ed14fa265e319fd0917f2e5374365aa0b18940
https://github.com/llvm/llvm-project/commit/e1ed14fa265e319fd0917f2e5374365aa0b18940
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
Log Message:
-----------
[VPlan] Add ::getSingleVF() helper and use it (NFC). (#191055)
Suggested as follow-up during recent reviews, including
https://github.com/llvm/llvm-project/pull/190393.
Commit: 918e446ef28ac97df20d6ef2bd50c78e2fe903ac
https://github.com/llvm/llvm-project/commit/918e446ef28ac97df20d6ef2bd50c78e2fe903ac
Author: Raphael Isemann <rise at apple.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M lldb/packages/Python/lldbsuite/test/lldbutil.py
M lldb/test/API/macosx/simulator/TestSimulatorPlatform.py
Log Message:
-----------
[lldb] Handle simulator printout in TestSimulatorPlatform (#189571)
This test invokes a binary in a simulator and then reads the first line
of stderr to parse the PID of the invoked binary.
This approach fails when the simulator itself prints a warning/error on
startup. In this case, we try to parse the error as the PID and fail.
This patch just removes the line limit. It doesn't seem to add any value
as we anyway need to search until we find the PID line, and if there is
no PID line we cannot do anything but time out eventually.
See also rdar://169799464
Commit: 7cccf56ce6bb98cd685ad67b8e4db9293768741c
https://github.com/llvm/llvm-project/commit/7cccf56ce6bb98cd685ad67b8e4db9293768741c
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M mlir/lib/Transforms/CSE.cpp
M mlir/test/Transforms/cse.mlir
Log Message:
-----------
Revert "[mlir][CSE] Delete dead code immediately in CSE pass" (#191146)
Reverts llvm/llvm-project#190926 ; this is crashing on simple examples
like:
```
func.func @test(%arg0: i1) {
%c0_i32 = arith.constant 0 : i32
%0 = arith.select %arg0, %c0_i32, %c0_i32 : i32
%1 = scf.if %arg0 -> (i32) {
%c0_i32_0 = arith.constant 0 : i32
scf.yield %c0_i32_0 : i32
} else {
%c0_i32_0 = arith.constant 0 : i32
scf.yield %c0_i32_0 : i32
}
return
}
```
Commit: b9c8733e29b72be328c5c1218bfd95eb9d32cde8
https://github.com/llvm/llvm-project/commit/b9c8733e29b72be328c5c1218bfd95eb9d32cde8
Author: Rafe Murray <rafemurr at gmail.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp
M clang/test/CodeGen/AArch64/neon/fullfp16.c
M clang/test/CodeGen/AArch64/v8.2a-fp16-intrinsics.c
Log Message:
-----------
[CIR][Aarch64] upstream scalar & vector intrinsics (FP16) (#190310)
This PR upstreams the following fp16 intrinsics as part of #185382:
- vaddh_f16,
- vsubh_f16,
- vmulh_f16,
- vdivh_f16
This is my first PR to LLVM, so any feedback is greatly appreciated!
Commit: 591861911e8a5f2838d7ee025d3f989cbe335710
https://github.com/llvm/llvm-project/commit/591861911e8a5f2838d7ee025d3f989cbe335710
Author: Shreeyash Pandey <shreeyash335 at gmail.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/test/CodeGen/AArch64/arm64-atomic.ll
M llvm/test/CodeGen/AArch64/atomicrmw-O0.ll
M llvm/test/CodeGen/AArch64/logical-op-with-not.ll
Log Message:
-----------
[AArch64][CodeGen] match (or x (not y)) to generate mov+orn (#191145)
Fixes: #100045
Adds a tablegen pattern that matches (or x (not y)) and generates a
mov+orn instead of the original mvn+orr.
The number of instructions still stay the same but mov+orn can be
considered better than mvn+orr for two reasons:
1. Symmetry: For the same input with an 'and' instead of 'or', mov+bic
is generated.
2. Optimzation through register rename: If mov is immediate (for
example, 'mov x1, #0x4'), it can be retired early by the register
renamer and never issued for execution.
This patch was reverted as I wanted to change my email associated with
the patch.
Original patch: #190769
Revert patch: #191138
Change-Id: I244db76a3a102308e17d3c014aebd5d8edd605ca
Commit: bc0b57ee9c500ba0248ee3cce473e3160a1e610f
https://github.com/llvm/llvm-project/commit/bc0b57ee9c500ba0248ee3cce473e3160a1e610f
Author: Pavel Labath <pavel at labath.sk>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/src/__support/OSUtil/linux/syscall_wrappers/CMakeLists.txt
A libc/src/__support/OSUtil/linux/syscall_wrappers/listen.h
M libc/src/sys/socket/CMakeLists.txt
M libc/src/sys/socket/linux/CMakeLists.txt
A libc/src/sys/socket/linux/listen.cpp
A libc/src/sys/socket/listen.h
M libc/test/src/sys/socket/linux/CMakeLists.txt
M libc/test/src/sys/socket/linux/connect_test.cpp
A libc/test/src/sys/socket/linux/listen_test.cpp
Log Message:
-----------
[libc] Implement listen(2) on linux (#190755)
I'm using the new syscall wrapper framework, and enabling the entry
point for x86_64, aarch64 and riscv. I also extend the connect test to
check for successful connection, now that we have that ability.
Commit: a6f967c73ac464bba668df076ec88064a2c5720f
https://github.com/llvm/llvm-project/commit/a6f967c73ac464bba668df076ec88064a2c5720f
Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp
M clang/test/CodeGen/AArch64/neon-intrinsics.c
M clang/test/CodeGen/AArch64/neon/intrinsics.c
Log Message:
-----------
[clang][CIR] Add lowering for vcvt_n_ and vcvtq_n_ conversion intrinsics (#190961)
This PR adds lowering for the conversion intrinsics with an immediate
argument (identified by `_n_` in the intrinsic name), excluding FP16
variants.
It also moves the corresponding tests from:
* clang/test/CodeGen/AArch64/neon_intrinsics.c
to:
* clang/test/CodeGen/AArch64/neon/intrinsics.c
The lowering follows the existing implementation in
CodeGen/TargetBuiltins/ARM.cpp and adds the `getFloatNeonType` helper
to support it. The remaining changes are code motion and refactoring.
Reference:
[1] https://arm-software.github.io/acle/neon_intrinsics/advsimd.html#conversions
Commit: 2d6c41309eef4230191ba861d5f5d36c784f9b60
https://github.com/llvm/llvm-project/commit/2d6c41309eef4230191ba861d5f5d36c784f9b60
Author: Ruoyu Qiu <cabbaken at outlook.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M llvm/test/Analysis/DependenceAnalysis/exact-rdiv-addrec-wrap.ll
Log Message:
-----------
[DA] Remove "FIXME" for a test that has been fixed (#191143)
Commit: 222a643f56777351daa6a926bccc247489380518
https://github.com/llvm/llvm-project/commit/222a643f56777351daa6a926bccc247489380518
Author: Balázs Benics <benicsbalazs at gmail.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M clang/lib/ScalableStaticAnalysisFramework/Frontend/TUSummaryExtractorFrontendAction.cpp
A clang/test/Analysis/Scalable/extraction-works-alongside-compilation.cpp
Log Message:
-----------
[clang][ssaf] Preserve AST after codegen for SSAF extractors (#191058)
This is a use-after-free.
Codegen would drop the AST before starting the optimizations on the LLVM
IR level. This means that the ASTConsumers of the SSAF extractors only
had dangling TU Decls etc.
For now, let's override this option to force-keep the AST alive. Note
that PluginActions already did the same if their consumers were added
after the main frontend-action.
See:
https://github.com/llvm/llvm-project/blob/69e0367e8221b8002b5d438fb70ff3daf36257fc/clang/lib/Frontend/FrontendAction.cpp#L470
```c++
CI.getCodeGenOpts().ClearASTBeforeBackend = false;
```
Long term, we could think about the stability implications of running
the extractors before codegen to be able to drop the AST, thus save
memory for codegen.
However, that would mean that if any of the virtual callbacks of the
ASTConsumers (extractors) would crash/fail, it would drag down the whole
process.
If extractors would only use the HandleTranslationUnitDecl callback,
then we could wrap our `TUSummaryRunner` multiplexer in a crash-safe
`CrashRecoveryContext` - which would ensure that only the runner would
fail, but would continue for codegen.
Personally, I don't really like this continue-after-extractors-crash,
because I'd not put my life on the binary generated such an event. And
if that's the case, then what's the point...
Nevertheless, let's force keep the AST for now.
Commit: 9f47bcdb7c8a0d1be6481df3a5ac09d2eaf02690
https://github.com/llvm/llvm-project/commit/9f47bcdb7c8a0d1be6481df3a5ac09d2eaf02690
Author: Valeriy Savchenko <vsavchenko at apple.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
M llvm/test/CodeGen/AArch64/arm64-zip.ll
R llvm/test/CodeGen/AArch64/vselect-widen-mask-tree.ll
M llvm/test/CodeGen/X86/bitcast-int-to-vector-bool-sext.ll
Log Message:
-----------
Revert "[SelectionDAG] Recurse through mask expression trees in WidenVSELECTMask (#188085)" (#191151)
This reverts commit 815edc3ff646392bfee2b381d37dd35e4b04f9c5.
Commit: ba91dd14b9679c01d559f9314205c09da9146af4
https://github.com/llvm/llvm-project/commit/ba91dd14b9679c01d559f9314205c09da9146af4
Author: David Sherwood <david.sherwood at arm.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M llvm/test/Transforms/LoopVectorize/AArch64/call-costs.ll
M llvm/test/Transforms/LoopVectorize/AArch64/clmul.ll
M llvm/test/Transforms/LoopVectorize/AArch64/conditional-branches-cost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/drop-poison-generating-flags.ll
M llvm/test/Transforms/LoopVectorize/AArch64/epilog-iv-select-cmp.ll
M llvm/test/Transforms/LoopVectorize/AArch64/epilog-vectorization-widen-inductions.ll
M llvm/test/Transforms/LoopVectorize/AArch64/fminimumnum.ll
M llvm/test/Transforms/LoopVectorize/AArch64/force-target-instruction-cost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/interleave-with-gaps.ll
M llvm/test/Transforms/LoopVectorize/AArch64/interleaving-load-store.ll
M llvm/test/Transforms/LoopVectorize/AArch64/interleaving-reduction.ll
M llvm/test/Transforms/LoopVectorize/AArch64/intrinsiccost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/licm-calls.ll
M llvm/test/Transforms/LoopVectorize/AArch64/masked-call-scalarize.ll
M llvm/test/Transforms/LoopVectorize/AArch64/masked-call.ll
M llvm/test/Transforms/LoopVectorize/AArch64/pr151664-cost-hoisted-vector-scalable.ll
M llvm/test/Transforms/LoopVectorize/AArch64/pr73894.ll
M llvm/test/Transforms/LoopVectorize/AArch64/scalable-call.ll
M llvm/test/Transforms/LoopVectorize/AArch64/scalable-strict-fadd.ll
M llvm/test/Transforms/LoopVectorize/AArch64/select-index.ll
M llvm/test/Transforms/LoopVectorize/AArch64/strict-fadd-cost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/strict-fadd.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-vscale-based-trip-counts.ll
M llvm/test/Transforms/LoopVectorize/AArch64/veclib-calls-libsystem-darwin.ll
M llvm/test/Transforms/LoopVectorize/AArch64/veclib-intrinsic-calls.ll
M llvm/test/Transforms/LoopVectorize/AMDGPU/buffer-fat-pointer.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-gather-scatter-tailpred.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-known-trip-count.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-saddsatcost.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-selectandorcost.ll
M llvm/test/Transforms/LoopVectorize/Hexagon/minimum-vf.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/massv-calls.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/massv-unsupported.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/vectorize-bswap.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/vectorize-only-for-real.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/widened-massv-call.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/widened-massv-vfabi-attr.ll
M llvm/test/Transforms/LoopVectorize/RISCV/clmul.ll
M llvm/test/Transforms/LoopVectorize/RISCV/dead-ops-cost.ll
M llvm/test/Transforms/LoopVectorize/RISCV/fminimumnum.ll
M llvm/test/Transforms/LoopVectorize/RISCV/reductions.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-call-intrinsics.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-inloop-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-reduction.ll
M llvm/test/Transforms/LoopVectorize/SystemZ/mem-interleaving-costs-03.ll
M llvm/test/Transforms/LoopVectorize/VPlan/AArch64/widen-call-with-intrinsic-or-libfunc.ll
M llvm/test/Transforms/LoopVectorize/VPlan/interleave-and-scalarize-only.ll
M llvm/test/Transforms/LoopVectorize/VPlan/vplan-dot-printing.ll
M llvm/test/Transforms/LoopVectorize/VPlan/vplan-printing-metadata.ll
M llvm/test/Transforms/LoopVectorize/VPlan/vplan-printing.ll
M llvm/test/Transforms/LoopVectorize/X86/amdlibm-calls.ll
M llvm/test/Transforms/LoopVectorize/X86/clmul.ll
M llvm/test/Transforms/LoopVectorize/X86/cost-model.ll
M llvm/test/Transforms/LoopVectorize/X86/ephemeral-recipes.ll
M llvm/test/Transforms/LoopVectorize/X86/fminimumnum.ll
M llvm/test/Transforms/LoopVectorize/X86/gather_scatter.ll
M llvm/test/Transforms/LoopVectorize/X86/intrinsiccost.ll
M llvm/test/Transforms/LoopVectorize/X86/libm-vector-calls-VF2-VF8.ll
M llvm/test/Transforms/LoopVectorize/X86/libm-vector-calls.ll
M llvm/test/Transforms/LoopVectorize/X86/pointer-runtime-checks-unprofitable.ll
M llvm/test/Transforms/LoopVectorize/X86/pr35432.ll
M llvm/test/Transforms/LoopVectorize/X86/reg-usage-debug.ll
M llvm/test/Transforms/LoopVectorize/X86/register-assumption.ll
M llvm/test/Transforms/LoopVectorize/X86/replicate-recipe-with-only-first-lane-used.ll
M llvm/test/Transforms/LoopVectorize/X86/replicate-uniform-call.ll
M llvm/test/Transforms/LoopVectorize/X86/svml-calls.ll
M llvm/test/Transforms/LoopVectorize/X86/veclib-calls.ll
M llvm/test/Transforms/LoopVectorize/X86/vect.omp.force.ll
M llvm/test/Transforms/LoopVectorize/assume.ll
M llvm/test/Transforms/LoopVectorize/dbg-outer-loop-vect.ll
M llvm/test/Transforms/LoopVectorize/dbg.value.ll
M llvm/test/Transforms/LoopVectorize/debugloc.ll
M llvm/test/Transforms/LoopVectorize/dereferenceable-info-from-assumption-constant-size-needs-loop-guards.ll
M llvm/test/Transforms/LoopVectorize/dereferenceable-info-from-assumption-constant-size.ll
M llvm/test/Transforms/LoopVectorize/dereferenceable-info-from-assumption-variable-size.ll
M llvm/test/Transforms/LoopVectorize/discriminator.ll
M llvm/test/Transforms/LoopVectorize/dont-fold-tail-for-divisible-TC.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence-multiply-recurrences.ll
M llvm/test/Transforms/LoopVectorize/fpsat.ll
M llvm/test/Transforms/LoopVectorize/funcall.ll
M llvm/test/Transforms/LoopVectorize/int_sideeffect.ll
M llvm/test/Transforms/LoopVectorize/intrinsic.ll
M llvm/test/Transforms/LoopVectorize/is_fpclass.ll
M llvm/test/Transforms/LoopVectorize/lifetime.ll
M llvm/test/Transforms/LoopVectorize/minimumnum-maximumnum-reductions.ll
M llvm/test/Transforms/LoopVectorize/minmax_reduction.ll
M llvm/test/Transforms/LoopVectorize/noalias-scope-decl-outer-loop.ll
M llvm/test/Transforms/LoopVectorize/noalias-scope-decl.ll
M llvm/test/Transforms/LoopVectorize/non-widenable-intrinsics-outer-loop.ll
M llvm/test/Transforms/LoopVectorize/predicated-multiple-exits.ll
M llvm/test/Transforms/LoopVectorize/pseudoprobe.ll
M llvm/test/Transforms/LoopVectorize/reduction-inloop-min-max.ll
M llvm/test/Transforms/LoopVectorize/reduction-inloop.ll
M llvm/test/Transforms/LoopVectorize/reuse-lcssa-phi-scev-expansion.ll
M llvm/test/Transforms/LoopVectorize/scalable-assume.ll
M llvm/test/Transforms/LoopVectorize/scalable-lifetime.ll
M llvm/test/Transforms/LoopVectorize/scalable-noalias-scope-decl.ll
M llvm/test/Transforms/LoopVectorize/select-cmp-multiuse.ll
M llvm/test/Transforms/LoopVectorize/select-first-index-fp.ll
M llvm/test/Transforms/LoopVectorize/select-smax-last-index.ll
M llvm/test/Transforms/LoopVectorize/select-smin-last-index.ll
M llvm/test/Transforms/LoopVectorize/select-umax-last-index.ll
M llvm/test/Transforms/LoopVectorize/select-umin-first-index.ll
M llvm/test/Transforms/LoopVectorize/select-umin-last-index.ll
M llvm/test/Transforms/LoopVectorize/single_early_exit.ll
M llvm/test/Transforms/LoopVectorize/smax-idx.ll
M llvm/test/Transforms/LoopVectorize/trip-count-expansion-may-introduce-ub.ll
M llvm/test/Transforms/LoopVectorize/vector-intrinsic-call-cost.ll
M llvm/test/Transforms/LoopVectorize/vector-loop-backedge-elimination.ll
M llvm/test/Transforms/LoopVectorize/vplan-widen-call-instruction.ll
Log Message:
-----------
[LV][NFC] Remove unneeded LLVM intrinsic declarations (#190993)
We no longer need to declare LLVM intrinsics in .ll files as the
intrinsics are populated automatically in the module. Remove the
declarations from tests to reduce test noise and size.
This came from a suggestion on PR #190786.
Commit: cc419f185e13c84ae7d7610016d71a6a65ab1241
https://github.com/llvm/llvm-project/commit/cc419f185e13c84ae7d7610016d71a6a65ab1241
Author: Fady Farag <com.webkit.iidmsa at gmail.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M clang/test/CodeGen/2004-02-13-Memset.c
Log Message:
-----------
[clang][test] Modernize 2004-02-13-Memset.c to use FileCheck (#191092)
Replace `grep | count` verification with `FileCheck` and update `CHECK`
directives with current codegen output.
Commit: c73872a69388895c55a6a6065a471e9e8f1a3e95
https://github.com/llvm/llvm-project/commit/c73872a69388895c55a6a6065a471e9e8f1a3e95
Author: Younan Zhang <zyn7109 at gmail.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M clang/docs/InternalsManual.rst
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Sema/Sema.h
M clang/lib/Sema/SemaConcept.cpp
M clang/lib/Sema/SemaTemplateInstantiate.cpp
Log Message:
-----------
[Clang] Improve concept performance 1/N (#188421)
The concept parameter mapping patch significantly impacted performance
in scenarios where concepts are heavily used, even with
atomic-expression-level caching.
After normalization, we often end up with large atomic expressions
containing numerous duplicate and complex template parameter mappings.
Previously, we were substituting and checking these repeatedly, which
was highly inefficient.
We now cache these substitution results within TemplateInstantiator.
This saves us a lot of duplicate semantic checking and provides us some
performance improvement, as in these regression cases:
usb_ids_gen.cpp:
clang-21: 1.41s
clang-22: 3.90s
This patch: 2.45s
inspector_style_resolver.cpp:
clang-21: 18.21s
clang-22: 22.43s
This patch: 19.01s
(These regressions can be found from the original issue)
While performance is still not so good as clang-21, I think there is
still room for future improvements. E.g. We can cache invalid results
for SFINAE diagnostics, avoid redundant pack unpacking, etc.
Towards https://github.com/llvm/llvm-project/issues/172266
Commit: e765ea92055c6d0d820234d60fcd38fd7b1bceb8
https://github.com/llvm/llvm-project/commit/e765ea92055c6d0d820234d60fcd38fd7b1bceb8
Author: Abid Qadeer <haqadeer at amd.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M flang/test/Transforms/debug-line-table-inc-file.fir
M flang/test/Transforms/debug-line-table.fir
M mlir/include/mlir-c/Dialect/LLVM.h
M mlir/include/mlir/Dialect/LLVMIR/LLVMAttrDefs.td
M mlir/include/mlir/Dialect/LLVMIR/LLVMDialectBytecode.td
M mlir/lib/CAPI/Dialect/LLVM.cpp
M mlir/lib/Dialect/LLVMIR/IR/LLVMAttrs.cpp
M mlir/lib/Target/LLVMIR/DebugImporter.cpp
M mlir/lib/Target/LLVMIR/DebugTranslation.cpp
M mlir/lib/Target/LLVMIR/DebugTranslation.h
M mlir/test/CAPI/llvm.c
M mlir/test/Target/LLVMIR/Import/debug-info.ll
M mlir/test/Target/LLVMIR/Import/global-variables.ll
M mlir/test/Target/LLVMIR/llvmir-debug.mlir
Log Message:
-----------
[mlir][debug] Make DICompileUnitAttr recursive. (#190808)
This PR add `DIRecursiveTypeAttrInterface` to `DICompileUnitAttr`. It
should fix the circular dependency problem we have since
`importedEntities` field was added.
Commit: 01c590876130283d86571089b3b3df1191ac0474
https://github.com/llvm/llvm-project/commit/01c590876130283d86571089b3b3df1191ac0474
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanUnroll.cpp
M llvm/test/Transforms/LoopVectorize/epilog-vectorization-reductions.ll
Log Message:
-----------
[VPlan] Handle AnyOf Or reduction via ComputeReductionResult. (#191049)
Instead of having ComputeAnyOfResult handle the Or reduction of unrolled
parts inline, route it through ComputeReductionResult with
RecurKind::Or. ComputeAnyOfResult now takes a pre-reduced scalar and
only performs the freeze + select.
This is a preparatory step towards removing ComputeAnyOfResult entirely
in https://github.com/llvm/llvm-project/pull/190039.
PR: https://github.com/llvm/llvm-project/pull/191049
Commit: 3529ce05e9a96760ae3b9435ca264cc707bb4dac
https://github.com/llvm/llvm-project/commit/3529ce05e9a96760ae3b9435ca264cc707bb4dac
Author: Lukas Sommer <lukas.sommer at amd.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M mlir/include/mlir/Dialect/Vector/Utils/VectorUtils.h
M mlir/lib/Dialect/Linalg/Transforms/Vectorization.cpp
M mlir/lib/Dialect/Vector/Utils/VectorUtils.cpp
Log Message:
-----------
[mlir][Vector] Make createWriteOrMaskedWrite utility (#190967)
Analog to https://github.com/llvm/llvm-project/pull/89119, make
`createWriteOrMaskedWrite` a vector utility, exposing it for re-use by
downstream users.
This PR is mostly just moving code and updating documentation but also
addresses a `TODO` for `isMaskTriviallyFoldable` to use that utility in
`createReadOrMaskedRead` as well.
No new tests were added, because the functionality is covered by existing tests.
---------
Signed-off-by: Lukas Sommer <lukas.sommer at amd.com>
Commit: 18d5b9ec0cfd09b374636daea047ab5e7dc9bc3e
https://github.com/llvm/llvm-project/commit/18d5b9ec0cfd09b374636daea047ab5e7dc9bc3e
Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
Log Message:
-----------
[LV] Simplify costing partial reduction chain links (NFCI) (#190980)
Previously, `getPartialReductionLinkCost()` needed to figure out what
case `matchExtendedReductionOperand()` matched to compute a cost. This
made adding new cases to `matchExtendedReductionOperand()` more complex
and added some redundancy.
This patch updates `ExtendedReductionOperand` so that it contains all
the information needed to compute the cost ready to pass to
`getPartialReductionCost()`. This means matching new operand forms only
needs to be done in `matchExtendedReductionOperand()`.
This is split off from #188043 (this change simplifies matching absolute
difference operands).
Commit: b78da18357747c435a216324452937bebef6b6d5
https://github.com/llvm/llvm-project/commit/b78da18357747c435a216324452937bebef6b6d5
Author: Balázs Benics <benicsbalazs at gmail.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M clang/test/Analysis/Scalable/extraction-works-alongside-compilation.cpp
Log Message:
-----------
[clang][ssaf][test] Fix the extraction-works-alongside-compilation.cpp test (#191162)
I forgot that we need this `REQUIRES: asserts` for the test.
Fixes build bots not setting `LLVM_ENABLE_ASSERTIONS=ON`.
For example:
https://lab.llvm.org/buildbot/#/builders/11/builds/37623
This fixes up #191058
Commit: 8506466bbf5daa0c79831a116cd4df618d9955ba
https://github.com/llvm/llvm-project/commit/8506466bbf5daa0c79831a116cd4df618d9955ba
Author: Endre Fülöp <endre.fulop at sigmatechnology.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M clang/lib/StaticAnalyzer/Checkers/CStringChecker.cpp
M clang/test/Analysis/bstring.c
M clang/test/Analysis/bstring.cpp
Log Message:
-----------
[analyzer] Fix crash in CStringChecker on zero-size element types (#191061)
Move the null check of Offset before its dereference in checkInit. When
the element type has zero size (e.g., an empty struct in C), the
division returns an empty optional, which was dereferenced
unconditionally.
Fixes #190457
Commit: 629bd872ee61d208c002766f9d2642852afbc0f6
https://github.com/llvm/llvm-project/commit/629bd872ee61d208c002766f9d2642852afbc0f6
Author: Abid Qadeer <haqadeer at amd.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
M llvm/unittests/Frontend/OpenMPIRBuilderTest.cpp
A mlir/test/Target/LLVMIR/omptarget-debug-record-pos.mlir
M mlir/test/Target/LLVMIR/omptarget-debug-var-1.mlir
Log Message:
-----------
[OMPIRBuilder] Move debug records to correct blocks. (#157125)
Consider the following small OpenMP target region:
```
!$omp target map(tofrom: x)
x = x + 1
!$omp end target
```
Currently, when compiled with `flang`, it will generate an outlined
function like below (with irrelevant bits removed).
```
void @__omp_offloading_10303_14e8afc__QQmain_l13(ptr %0, ptr %1) { entry:
%2 = alloca ptr, align 8, addrspace(5)
%3 = addrspacecast ptr addrspace(5) %2 to ptr
...
br i1 %exec_user_code, label %user_code.entry, label %worker.exit
user_code.entry:
%5 = load ptr, ptr %3, align 8, !align !19
br label %omp.region.after_alloca
omp.region.after_alloca:
br label %outlined.body
outlined.body:
br label %omp.target
omp.target:
#dbg_declare(ptr addrspace(5) %2, !20, !DIExpression(), !21)
...
br label %omp.region.cont, !dbg !23
omp.region.cont:
call void @__kmpc_target_deinit()
ret void
worker.exit:
ret void
}
```
Due to how various basic blocks are generated to implement target region
for device, the debug record for variable `x` end up in a different
block to the location of the variable (`%5` in this case). The backend
can drop such debug records.
This PR moves such records in the correct block. If the location field
of the debug record is an `Instruction`, it will ensure that debug
record is in same block as the instruction. If the location is an
`Argument`, the debug record will be moved to the entry block.
Some minor cleanup in the `UpdateDebugRecord` as that brings it to use
the similar logic as in `MoveDebugRecordToCorrectBlock`.
Commit: 9cf815243b91147f0150db0c4ff2436b6920d372
https://github.com/llvm/llvm-project/commit/9cf815243b91147f0150db0c4ff2436b6920d372
Author: theRonShark <ron.lieberman at amd.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M llvm/include/llvm/Transforms/Vectorize/SLPVectorizer.h
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/AMDGPU/notriviallyvectorizableintrinsicoperands.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/revec.ll
Log Message:
-----------
Revert "[SLP][AMDGPU] Vectorize operands of non-trivially-vectorizable intrinsic calls" (#191153)
Reverts llvm/llvm-project#189784
Commit: ebc56070eb8d25c8dc73a2e97caaeb4db0f7c9fa
https://github.com/llvm/llvm-project/commit/ebc56070eb8d25c8dc73a2e97caaeb4db0f7c9fa
Author: Barbara Mitic <bmitic at amd.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M llvm/docs/AMDGPUUsage.rst
M llvm/lib/Target/AMDGPU/AMDGPULowerIntrinsics.cpp
M llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp
M llvm/lib/Target/AMDGPU/AMDGPUSubtarget.h
M llvm/lib/Target/AMDGPU/SIMemoryLegalizer.cpp
M llvm/test/CodeGen/AMDGPU/flat-saddr-atomics.ll
M llvm/test/CodeGen/AMDGPU/global-saddr-atomics.ll
A llvm/test/CodeGen/AMDGPU/memory-legalizer-single-wave-workgroup-memops.ll
Log Message:
-----------
[AMDGPU] Use wavefront scope for single-wave workgroup synchronization (#187673)
Workgroup-scoped fences and non-relaxed workgroup atomics were
previously legalized with synchronization strong enough for multi-wave
workgroups.
When the kernel's maximum flat work-group size does not exceed the
wavefront size, the workgroup contains only a single wavefront, so
workgroup-scoped synchronization is equivalent to wavefront scope and
the stronger legalization is unnecessary.
SIMemoryLegalizer now demotes workgroup scope to wavefront scope
in this case for workgroup-scoped fences and for non-relaxed atomic
load, store, atomicrmw, and cmpxchg operations.
This allows subsequent legalization to operate at wavefront scope.
The decision is based on AMDGPUSubtarget::isSingleWavefrontWorkgroup.
---------
Co-authored-by: Barbara Mitic <Barbara.Mitic at amd.com>
Commit: 87dda6ad8172f7cb89a8a422d825ebc2a5e73e2b
https://github.com/llvm/llvm-project/commit/87dda6ad8172f7cb89a8a422d825ebc2a5e73e2b
Author: Corentin Jabot <corentinjabot at gmail.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/SemaTemplateInstantiateDecl.cpp
M clang/test/SemaCXX/cxx1y-variable-templates_top_level.cpp
Log Message:
-----------
[Clang] Do not create a NoSFINAETrap for variable specialization. (#191000)
There is no thing in the standard that says this should happen outside
of the immediate context.
Fixes #54439
Commit: 93c349b3717f4550d409bf1d0e8600c852df2dca
https://github.com/llvm/llvm-project/commit/93c349b3717f4550d409bf1d0e8600c852df2dca
Author: Joao Victor Amorim Vieira <amorimvictorjoao3 at gmail.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
A llvm/test/CodeGen/RISCV/known-fpclass.ll
Log Message:
-----------
[DAG] computeKnownFPClass - Add handling for AssertNoFPClass (#190185)
Resolves #189478
Adds code to handle AssertNoFPClass in computeKnownFPClass and adds IR
test coverage for RISC-V.
Commit: 42166b6dcf9dcfb165d3a0f03ca64e6e549fbfe4
https://github.com/llvm/llvm-project/commit/42166b6dcf9dcfb165d3a0f03ca64e6e549fbfe4
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/check-prof-info.ll
M llvm/test/Transforms/LoopVectorize/AArch64/epilog-vectorization-widen-inductions.ll
M llvm/test/Transforms/LoopVectorize/branch-weights.ll
M llvm/test/Transforms/LoopVectorize/epilog-iv-select-cmp.ll
M llvm/test/Transforms/LoopVectorize/epilog-vectorization-any-of-reductions.ll
A llvm/test/Transforms/LoopVectorize/epilog-vectorization-dead-epilogue.ll
M llvm/test/Transforms/LoopVectorize/epilog-vectorization-reductions.ll
M llvm/test/Transforms/LoopVectorize/epilog-vectorization-scev-expansion.ll
M llvm/test/Transforms/LoopVectorize/epilog-vectorization-trunc-induction-steps.ll
M llvm/test/Transforms/LoopVectorize/epilog-vectorization-vector-trip-count-zero.ll
M llvm/test/Transforms/LoopVectorize/optimal-epilog-vectorization-limitations.ll
M llvm/test/Transforms/LoopVectorize/optimal-epilog-vectorization-liveout.ll
M llvm/test/Transforms/LoopVectorize/optimal-epilog-vectorization.ll
M llvm/test/Transforms/LoopVectorize/select-min-max-last-index-epilogue.ll
M llvm/test/Transforms/LoopVectorize/unsafe-vf-hint-remark.ll
Log Message:
-----------
[LV] Update forced epilogue VF options to allow different VFs than main. (#190393)
Previously, forced epilogue vector factors via the command line options
required to match the forced main VF (or the VF to be built in general).
This leads to a number of akward tests, where we end up with dead
epilogue vector loops.
Update the logic to build an additional VPlan with the epilogue vector
factor, and require the provided epilogue VF to be < IC * MainLoopVF.
Otherwise, epilogue vectorization is skipped.
This only impacts the forced epilogue VF option used for testing and
ensures epilogue tests to cover more realistic scenarios and make them
more robust w.r.t. to additional VPlan-based folding.
PR: https://github.com/llvm/llvm-project/pull/190393
Commit: 5185fb32e40d2711b8fd368d2a8dc2736d93c57b
https://github.com/llvm/llvm-project/commit/5185fb32e40d2711b8fd368d2a8dc2736d93c57b
Author: smv <32562706+s-mv at users.noreply.github.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/test/CodeGen/RISCV/combine-is_fpclass.ll
Log Message:
-----------
[DAG] computeKnownFPClass - add ISD::FNEG handling + test coverage (#190325)
Fixes #189483
- Implement computeKnownFPClass for ISD::FNEG in SelectionDAG.cpp
- Add tests for RISC-V in llvm/test/CodeGen/RISCV/known-fpclass-fneg.ll
Commit: 3b5b8ec0ab89886e6ac92c237bd0be8be1eff1e6
https://github.com/llvm/llvm-project/commit/3b5b8ec0ab89886e6ac92c237bd0be8be1eff1e6
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M llvm/test/CodeGen/SPIRV/GlobalISel/InstCombine/prelegalizercombiner-length-to-distance.mir
M llvm/test/CodeGen/SPIRV/GlobalISel/InstCombine/prelegalizercombiner-select-to-faceforward.mir
M llvm/test/CodeGen/SPIRV/llc-pipeline.ll
M llvm/test/CodeGen/SPIRV/opencl/device_execution/execute_block.ll
Log Message:
-----------
[NFC][SPIR-V] Remove unnecessary 'REQUIRES: asserts' from tests (#190986)
Remove `REQUIRES: asserts` from tests that don't use any assertions-only
functionality and should run for all build configurations
Commit: 3c7c6fbc87f0a686f74c327b381ce593a1a883d3
https://github.com/llvm/llvm-project/commit/3c7c6fbc87f0a686f74c327b381ce593a1a883d3
Author: Kseniya Tikhomirova <kseniya.tikhomirova at intel.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M libsycl/include/sycl/__impl/aspect.hpp
M libsycl/include/sycl/__impl/info/device_type.hpp
M libsycl/include/sycl/__impl/usm_alloc_type.hpp
M libsycl/include/sycl/__impl/usm_functions.hpp
M libsycl/src/detail/context_impl.hpp
M libsycl/src/detail/device_binary_structures.hpp
M libsycl/src/detail/device_image_wrapper.hpp
M libsycl/src/detail/device_impl.hpp
M libsycl/src/detail/global_objects.hpp
M libsycl/src/detail/kernel_id.hpp
M libsycl/src/detail/offload/offload_topology.hpp
M libsycl/src/detail/offload/offload_utils.hpp
M libsycl/src/detail/platform_impl.cpp
M libsycl/src/detail/platform_impl.hpp
M libsycl/src/detail/program_manager.cpp
M libsycl/src/detail/program_manager.hpp
M libsycl/src/detail/queue_impl.hpp
M libsycl/src/usm_functions.cpp
Log Message:
-----------
[libsycl] Fix comments and align names & types (#190781)
follow-up for https://github.com/llvm/llvm-project/pull/187528
---------
Signed-off-by: Tikhomirova, Kseniya <kseniya.tikhomirova at intel.com>
Commit: 537f29e6e1c2f174f7c0e8d0e614ce92715420f0
https://github.com/llvm/llvm-project/commit/537f29e6e1c2f174f7c0e8d0e614ce92715420f0
Author: Sander de Smalen <sander.desmalen at arm.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/test/CodeGen/AArch64/sme-disable-gisel-fisel.ll
Log Message:
-----------
[AArch64] Fix broken SME code with GlobalISel (#191140)
The checks introduced in #190135 are too restrictive because no SVE or
SME is required to compile streaming-compatible or agnostic-ZA
functions. Now it generates incorrect code for
streaming-compatible/agnostic-ZA functions when the function has no
`+sve` or `+sme`.
Commit: bbf31ad4e413d460ffe8246012df3bfd798c2170
https://github.com/llvm/llvm-project/commit/bbf31ad4e413d460ffe8246012df3bfd798c2170
Author: Corentin Jabot <corentinjabot at gmail.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/SemaTemplate.cpp
M clang/test/SemaCXX/cxx1y-variable-templates_top_level.cpp
Log Message:
-----------
[Clang] Do not try to create invalid variable specializations. (#190960)
When a variable specialization is ambiguous,
we would still create a node for it.
If the first such specialization takes places in a sfinae context, ie
when appearing in a concept, the initial diagnostic was silence, but no
further errors were emitted on that specialization as the variable was
created anyway.
Instead we do not create a specialization in this case.
Fixes #132592
Commit: 0ab4d8556ddb935d3eda044cf6ea118f0686de0e
https://github.com/llvm/llvm-project/commit/0ab4d8556ddb935d3eda044cf6ea118f0686de0e
Author: Rose Hudson <rose.hudson at sony.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M clang/lib/Lex/PPDirectives.cpp
Log Message:
-----------
[clang][Lex] don't run -Wnonportable-include-path-separator if disabled (#191148)
The diagnostic's addition caused a perf regression:
https://llvm-compile-time-tracker.com/compare.php?from=b9149823d85891044bf34e8654d1a45870e55174&to=e2294efaabcc745bf6beacbefbd371595cf3e87f&stat=instructions:u
So, only run its logic if it's actually enabled:
https://llvm-compile-time-tracker.com/compare.php?from=e2294efaabcc745bf6beacbefbd371595cf3e87f&to=52bd4e1441b75b617cf81dfffcb149966616a34a&stat=instructions:u
Commit: d8dc6197ccce334ecbdb6c71eebbf745bbf46857
https://github.com/llvm/llvm-project/commit/d8dc6197ccce334ecbdb6c71eebbf745bbf46857
Author: Luke Lau <luke at igalia.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M llvm/test/Transforms/LoopVectorize/find-last-iv-sinkable-expr.ll
Log Message:
-----------
[VPlan] Test tail folding with find-last-iv-sinkable-expr.ll tests. NFC (#191176)
I believe these are being miscompiled after #183911 since we're no
longer using the original select on the header mask added in
addReductionResultComputation
This is additional test coverage for #191166
Commit: 8341e62c6697ab0bbcaf546eba28d5845577f6ee
https://github.com/llvm/llvm-project/commit/8341e62c6697ab0bbcaf546eba28d5845577f6ee
Author: Shilei Tian <i at tianshilei.me>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp
Log Message:
-----------
[NFC][AMDGPU] Fix a compiler warning caused by a small typo (#191107)
Commit: 9e8ea5677f1c85bea98ddeca9240e1fccf2f1537
https://github.com/llvm/llvm-project/commit/9e8ea5677f1c85bea98ddeca9240e1fccf2f1537
Author: Dmitry Vasilyev <dvassiliev at accesssoftek.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M lldb/test/API/functionalities/scripted_frame_provider/thread_filter/main.cpp
Log Message:
-----------
[lldb] Fix flaky test TestFrameProviderThreadFilter on Windows (#191133)
This is the update for #191046.
Commit: 3ac5c07e202fbb6525a1c689547b2de3c69a9b77
https://github.com/llvm/llvm-project/commit/3ac5c07e202fbb6525a1c689547b2de3c69a9b77
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M llvm/include/llvm/IR/CallingConv.h
M llvm/test/Bitcode/calling-conventions.3.2.ll
M llvm/test/Bitcode/calling-conventions.3.2.ll.bc
M llvm/test/Verifier/call-to-non-callable-functions.ll
Log Message:
-----------
[NVPTX] Do not permit calls to ptx_kernel CC (#190434)
Summary:
Removes support for calling the ptx_kernel CC. Regenerate bitcode that
used it, no auto upgrade because this never worked, it just wasn't
diagnosed.
Commit: 728de5c5f28c49ef085b59ce82e30fae7c658d56
https://github.com/llvm/llvm-project/commit/728de5c5f28c49ef085b59ce82e30fae7c658d56
Author: Ricardo Jesus <rjj at nvidia.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
M llvm/test/CodeGen/AArch64/sve-fixed-length-fp-compares.ll
M llvm/test/CodeGen/AArch64/sve-hadd.ll
M llvm/test/CodeGen/AArch64/sve-int-log.ll
M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-fp-compares.ll
M llvm/test/CodeGen/AArch64/sve2-bsl.ll
Log Message:
-----------
[AArch64][SVE] Use SUBR for unpredicated bitwise NOT. (#191155)
This relies on the identity NOT (x) = -1 - x, which can be lowered as
byte SUBR (x, 255). The recently added pseudos for SUBR (immediate)
should avoid cases where we would risk emitting a MOV.
Commit: a8a83ec1729dad170471c6bc48ef874ff76a3342
https://github.com/llvm/llvm-project/commit/a8a83ec1729dad170471c6bc48ef874ff76a3342
Author: eiytoq <eiytoq at outlook.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/AST/ItaniumMangle.cpp
A clang/test/CodeGenCXX/dtor-local-lambda-mangle.cpp
Log Message:
-----------
[Clang] Fix Itanium mangling crash for local lambda in ctor/dtor (#181068)
Fixes #176395
Note: I need someone to help me merge this PR, since I don't have commit
access.
Commit: c908037066750cf192898012047f4c22830dd47b
https://github.com/llvm/llvm-project/commit/c908037066750cf192898012047f4c22830dd47b
Author: David Sherwood <david.sherwood at arm.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M llvm/test/Transforms/LoopVectorize/12-12-11-if-conv.ll
M llvm/test/Transforms/LoopVectorize/2012-10-20-infloop.ll
M llvm/test/Transforms/LoopVectorize/2012-10-22-isconsec.ll
M llvm/test/Transforms/LoopVectorize/2016-07-27-loop-vec.ll
M llvm/test/Transforms/LoopVectorize/AArch64/Oz-and-forced-vectorize.ll
M llvm/test/Transforms/LoopVectorize/AArch64/aarch64-unroll.ll
M llvm/test/Transforms/LoopVectorize/AArch64/arbitrary-induction-step.ll
M llvm/test/Transforms/LoopVectorize/AArch64/arm64-unroll.ll
M llvm/test/Transforms/LoopVectorize/AArch64/blend-costs.ll
M llvm/test/Transforms/LoopVectorize/AArch64/check-prof-info.ll
M llvm/test/Transforms/LoopVectorize/AArch64/clamped-trip-count.ll
M llvm/test/Transforms/LoopVectorize/AArch64/conditional-branches-cost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/fixed-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/AArch64/fold-tail-low-trip-count.ll
M llvm/test/Transforms/LoopVectorize/AArch64/force-target-instruction-cost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/fully-unrolled-cost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/gather-do-not-vectorize-addressing.ll
M llvm/test/Transforms/LoopVectorize/AArch64/induction-costs-sve.ll
M llvm/test/Transforms/LoopVectorize/AArch64/intrinsiccost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/loop-vectorization-factors.ll
M llvm/test/Transforms/LoopVectorize/AArch64/loopvectorize_pr33804_double.ll
M llvm/test/Transforms/LoopVectorize/AArch64/low_trip_count_predicates.ll
M llvm/test/Transforms/LoopVectorize/AArch64/masked-op-cost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/masked_ldst_sme.ll
M llvm/test/Transforms/LoopVectorize/AArch64/maxbandwidth-regpressure.ll
M llvm/test/Transforms/LoopVectorize/AArch64/maximize-bandwidth-invalidate.ll
M llvm/test/Transforms/LoopVectorize/AArch64/nontemporal-load-store.ll
M llvm/test/Transforms/LoopVectorize/AArch64/outer_loop_test1_no_explicit_vect_width.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-chained.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-dot-product-epilogue.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-dot-product-mixed.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-dot-product-neon.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-dot-product.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-fdot-product.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-no-dotprod.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-sub.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce.ll
M llvm/test/Transforms/LoopVectorize/AArch64/pr151664-cost-hoisted-vector-scalable.ll
M llvm/test/Transforms/LoopVectorize/AArch64/pr36032.ll
M llvm/test/Transforms/LoopVectorize/AArch64/reg-usage.ll
M llvm/test/Transforms/LoopVectorize/AArch64/replicating-load-store-costs-apple.ll
M llvm/test/Transforms/LoopVectorize/AArch64/replicating-load-store-costs.ll
M llvm/test/Transforms/LoopVectorize/AArch64/runtime-check-size-based-threshold.ll
M llvm/test/Transforms/LoopVectorize/AArch64/runtime-check-trip-count-decisions.ll
M llvm/test/Transforms/LoopVectorize/AArch64/scalable-avoid-scalarization.ll
M llvm/test/Transforms/LoopVectorize/AArch64/scalable-call.ll
M llvm/test/Transforms/LoopVectorize/AArch64/scalable-predicate-instruction.ll
M llvm/test/Transforms/LoopVectorize/AArch64/scalable-reductions-tf.ll
M llvm/test/Transforms/LoopVectorize/AArch64/scalable-reductions.ll
M llvm/test/Transforms/LoopVectorize/AArch64/scalable-strict-fadd.ll
M llvm/test/Transforms/LoopVectorize/AArch64/scalar_interleave.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sdiv-pow2.ll
M llvm/test/Transforms/LoopVectorize/AArch64/select-best-vf-tripcount.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sme-vectorize.ll
M llvm/test/Transforms/LoopVectorize/AArch64/strict-fadd-vf1.ll
M llvm/test/Transforms/LoopVectorize/AArch64/strict-fadd.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-basic-vec.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-cond-inv-loads.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-epilog-vect-vscale-tune.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-extract-last-veclane.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-fixed-width-inorder-core.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-fneg.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-gather-scatter-cost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-gather-scatter.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-inductions-unusual-types.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-inductions.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-interleaved-accesses.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-inv-loads.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-inv-store.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-large-strides.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-masked-loadstore.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-select-cmp.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-tail-folding-cost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-tail-folding-option.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-tail-folding-optsize.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-tail-folding-reductions.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-tail-folding-unroll.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-tail-folding.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-type-conv.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-vector-reverse-mask4.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-vector-reverse.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-widen-gep.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-widen-phi.ll
M llvm/test/Transforms/LoopVectorize/AArch64/tail-fold-uniform-memops.ll
M llvm/test/Transforms/LoopVectorize/AArch64/tail-folding-styles.ll
M llvm/test/Transforms/LoopVectorize/AArch64/transform-narrow-interleave-to-widen-memory-cost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/type-shrinkage-insertelt.ll
M llvm/test/Transforms/LoopVectorize/AArch64/type-shrinkage-zext-costs.ll
M llvm/test/Transforms/LoopVectorize/AArch64/vector-reverse-mask4.ll
M llvm/test/Transforms/LoopVectorize/AArch64/vector-reverse.ll
M llvm/test/Transforms/LoopVectorize/AMDGPU/buffer-fat-pointer.ll
M llvm/test/Transforms/LoopVectorize/AMDGPU/divergent-runtime-check.ll
M llvm/test/Transforms/LoopVectorize/AMDGPU/unroll-in-loop-vectorizer.ll
M llvm/test/Transforms/LoopVectorize/ARM/arm-ieee-vectorize.ll
M llvm/test/Transforms/LoopVectorize/ARM/arm-unroll.ll
M llvm/test/Transforms/LoopVectorize/ARM/gcc-examples.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-gather-scatter-tailpred.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-icmpcost.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-known-trip-count.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-maskedldst.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-predstorecost.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-qabs.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-recurrence.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-reduction-predselect.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-reduction-types.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-reductions.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-reg-pressure-vmla.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-saddsatcost.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-selectandorcost.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-shiftcost.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-vldn.ll
M llvm/test/Transforms/LoopVectorize/ARM/pointer_iv.ll
M llvm/test/Transforms/LoopVectorize/ARM/scalar-block-cost.ll
M llvm/test/Transforms/LoopVectorize/ARM/tail-fold-multiple-icmps.ll
M llvm/test/Transforms/LoopVectorize/ARM/tail-folding-allowed.ll
M llvm/test/Transforms/LoopVectorize/ARM/tail-folding-counting-down.ll
M llvm/test/Transforms/LoopVectorize/ARM/tail-folding-not-allowed.ll
M llvm/test/Transforms/LoopVectorize/ARM/tail-folding-prefer-flag.ll
M llvm/test/Transforms/LoopVectorize/ARM/width-detect.ll
M llvm/test/Transforms/LoopVectorize/Hexagon/invalidate-cm-after-invalidating-interleavegroups.ll
M llvm/test/Transforms/LoopVectorize/Hexagon/minimum-vf.ll
M llvm/test/Transforms/LoopVectorize/LoongArch/loongarch-interleaved.ll
M llvm/test/Transforms/LoopVectorize/LoongArch/reg-usage.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/interleave_IC.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/large-loop-rdx.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/optimal-epilog-vectorization-profitability.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/pr30990.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/pr41179.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/predcost.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/reg-usage.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/small-loop-rdx.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/stride-vectorization.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/vectorize-bswap.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/vectorize-only-for-real.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/vplan-scalarivsext-crash.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/vsx-tsvc-s173.ll
M llvm/test/Transforms/LoopVectorize/RISCV/blocks-with-dead-instructions.ll
M llvm/test/Transforms/LoopVectorize/RISCV/fold-tail-low-trip-count.ll
M llvm/test/Transforms/LoopVectorize/RISCV/force-vect-msg.ll
M llvm/test/Transforms/LoopVectorize/RISCV/inloop-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/low-trip-count.ll
M llvm/test/Transforms/LoopVectorize/RISCV/masked_gather_scatter.ll
M llvm/test/Transforms/LoopVectorize/RISCV/only-compute-cost-for-vplan-vfs.ll
M llvm/test/Transforms/LoopVectorize/RISCV/partial-reduce-dot-product.ll
M llvm/test/Transforms/LoopVectorize/RISCV/pr88802.ll
M llvm/test/Transforms/LoopVectorize/RISCV/reductions.ll
M llvm/test/Transforms/LoopVectorize/RISCV/reg-usage-maxbandwidth.ll
M llvm/test/Transforms/LoopVectorize/RISCV/reg-usage.ll
M llvm/test/Transforms/LoopVectorize/RISCV/riscv-interleaved.ll
M llvm/test/Transforms/LoopVectorize/RISCV/riscv-unroll.ll
M llvm/test/Transforms/LoopVectorize/RISCV/riscv-vector-reverse.ll
M llvm/test/Transforms/LoopVectorize/RISCV/select-cmp-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-cost.ll
M llvm/test/Transforms/LoopVectorize/RISCV/truncate-to-minimal-bitwidth-evl-crash.ll
M llvm/test/Transforms/LoopVectorize/RISCV/unroll-in-loop-vectorizer.ll
M llvm/test/Transforms/LoopVectorize/SystemZ/mem-interleaving-costs-03.ll
M llvm/test/Transforms/LoopVectorize/SystemZ/pr38110.ll
M llvm/test/Transforms/LoopVectorize/SystemZ/pr47665.ll
M llvm/test/Transforms/LoopVectorize/SystemZ/predicated-first-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/VE/disable_lv.ll
M llvm/test/Transforms/LoopVectorize/VPlan/AArch64/sve-tail-folding-forced.ll
M llvm/test/Transforms/LoopVectorize/VPlan/AArch64/vplan-printing.ll
M llvm/test/Transforms/LoopVectorize/VPlan/first-order-recurrence-sink-replicate-region.ll
M llvm/test/Transforms/LoopVectorize/VPlan/icmp-uniforms.ll
M llvm/test/Transforms/LoopVectorize/VPlan/vplan-dot-printing.ll
M llvm/test/Transforms/LoopVectorize/VPlan/vplan-printing-reductions.ll
M llvm/test/Transforms/LoopVectorize/VPlan/vplan-printing.ll
M llvm/test/Transforms/LoopVectorize/VPlan/vplan-stress-test-no-explict-vf.ll
M llvm/test/Transforms/LoopVectorize/WebAssembly/int-mac-reduction-costs.ll
M llvm/test/Transforms/LoopVectorize/WebAssembly/memory-interleave.ll
M llvm/test/Transforms/LoopVectorize/WebAssembly/partial-reduce-accumulate.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-half.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/strided-load-i16.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/strided-load-i32.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/strided-load-i64.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/strided-load-i8.ll
M llvm/test/Transforms/LoopVectorize/X86/already-vectorized.ll
M llvm/test/Transforms/LoopVectorize/X86/amdlibm-calls-finite.ll
M llvm/test/Transforms/LoopVectorize/X86/avx1.ll
M llvm/test/Transforms/LoopVectorize/X86/avx512.ll
M llvm/test/Transforms/LoopVectorize/X86/consecutive-ptr-cg-bug.ll
M llvm/test/Transforms/LoopVectorize/X86/consecutive-ptr-uniforms.ll
M llvm/test/Transforms/LoopVectorize/X86/conversion-cost.ll
M llvm/test/Transforms/LoopVectorize/X86/cost-divisor-overflow.ll
M llvm/test/Transforms/LoopVectorize/X86/cost-model-assert.ll
M llvm/test/Transforms/LoopVectorize/X86/cost-model.ll
M llvm/test/Transforms/LoopVectorize/X86/drop-inbounds-flags-for-reverse-vector-pointer.ll
M llvm/test/Transforms/LoopVectorize/X86/fixed-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/X86/float-induction-x86.ll
M llvm/test/Transforms/LoopVectorize/X86/fneg-cost.ll
M llvm/test/Transforms/LoopVectorize/X86/fp32_to_uint32-cost-model.ll
M llvm/test/Transforms/LoopVectorize/X86/fp64_to_uint32-cost-model.ll
M llvm/test/Transforms/LoopVectorize/X86/fp80-widest-type.ll
M llvm/test/Transforms/LoopVectorize/X86/funclet.ll
M llvm/test/Transforms/LoopVectorize/X86/gather-vs-interleave.ll
M llvm/test/Transforms/LoopVectorize/X86/gcc-examples.ll
M llvm/test/Transforms/LoopVectorize/X86/illegal-parallel-loop-uniform-write.ll
M llvm/test/Transforms/LoopVectorize/X86/int128_no_gather.ll
M llvm/test/Transforms/LoopVectorize/X86/interleave-ptradd-with-replicated-operand.ll
M llvm/test/Transforms/LoopVectorize/X86/interleave_short_tc.ll
M llvm/test/Transforms/LoopVectorize/X86/interleaved-accesses-large-gap.ll
M llvm/test/Transforms/LoopVectorize/X86/interleaved-accesses-use-after-free.ll
M llvm/test/Transforms/LoopVectorize/X86/interleaved-accesses-waw-dependency.ll
M llvm/test/Transforms/LoopVectorize/X86/interleaving.ll
M llvm/test/Transforms/LoopVectorize/X86/intrinsiccost.ll
M llvm/test/Transforms/LoopVectorize/X86/invariant-load-gather.ll
M llvm/test/Transforms/LoopVectorize/X86/invariant-store-vectorization.ll
M llvm/test/Transforms/LoopVectorize/X86/libm-vector-calls-VF2-VF8.ll
M llvm/test/Transforms/LoopVectorize/X86/libm-vector-calls-finite.ll
M llvm/test/Transforms/LoopVectorize/X86/libm-vector-calls.ll
M llvm/test/Transforms/LoopVectorize/X86/masked_load_store.ll
M llvm/test/Transforms/LoopVectorize/X86/max-mstore.ll
M llvm/test/Transforms/LoopVectorize/X86/min-trip-count-switch.ll
M llvm/test/Transforms/LoopVectorize/X86/mul_slm_16bit.ll
M llvm/test/Transforms/LoopVectorize/X86/no-vector.ll
M llvm/test/Transforms/LoopVectorize/X86/no_fpmath.ll
M llvm/test/Transforms/LoopVectorize/X86/no_fpmath_with_hotness.ll
M llvm/test/Transforms/LoopVectorize/X86/nontemporal.ll
M llvm/test/Transforms/LoopVectorize/X86/optsize.ll
M llvm/test/Transforms/LoopVectorize/X86/outer_loop_test1_no_explicit_vect_width.ll
M llvm/test/Transforms/LoopVectorize/X86/parallel-loops-after-reg2mem.ll
M llvm/test/Transforms/LoopVectorize/X86/parallel-loops.ll
M llvm/test/Transforms/LoopVectorize/X86/powof2div.ll
M llvm/test/Transforms/LoopVectorize/X86/pr141968-instsimplifyfolder.ll
M llvm/test/Transforms/LoopVectorize/X86/pr23997.ll
M llvm/test/Transforms/LoopVectorize/X86/pr35432.ll
M llvm/test/Transforms/LoopVectorize/X86/pr39160.ll
M llvm/test/Transforms/LoopVectorize/X86/pr42674.ll
M llvm/test/Transforms/LoopVectorize/X86/pr54634.ll
M llvm/test/Transforms/LoopVectorize/X86/pr81872.ll
M llvm/test/Transforms/LoopVectorize/X86/propagate-metadata.ll
M llvm/test/Transforms/LoopVectorize/X86/reg-usage-debug.ll
M llvm/test/Transforms/LoopVectorize/X86/reg-usage.ll
M llvm/test/Transforms/LoopVectorize/X86/register-assumption.ll
M llvm/test/Transforms/LoopVectorize/X86/replicate-recipe-with-only-first-lane-used.ll
M llvm/test/Transforms/LoopVectorize/X86/replicating-load-store-costs.ll
M llvm/test/Transforms/LoopVectorize/X86/runtime-limit.ll
M llvm/test/Transforms/LoopVectorize/X86/scatter_crash.ll
M llvm/test/Transforms/LoopVectorize/X86/slm-no-vectorize.ll
M llvm/test/Transforms/LoopVectorize/X86/small-size.ll
M llvm/test/Transforms/LoopVectorize/X86/strided_load_cost.ll
M llvm/test/Transforms/LoopVectorize/X86/svml-calls-finite.ll
M llvm/test/Transforms/LoopVectorize/X86/uniform-phi.ll
M llvm/test/Transforms/LoopVectorize/X86/uniform_mem_op.ll
M llvm/test/Transforms/LoopVectorize/X86/unroll-pm.ll
M llvm/test/Transforms/LoopVectorize/X86/unroll-small-loops.ll
M llvm/test/Transforms/LoopVectorize/X86/unroll_selection.ll
M llvm/test/Transforms/LoopVectorize/X86/veclib-calls.ll
M llvm/test/Transforms/LoopVectorize/X86/vector_ptr_load_store.ll
M llvm/test/Transforms/LoopVectorize/X86/vectorization-remarks-loopid-dbg.ll
M llvm/test/Transforms/LoopVectorize/X86/vectorization-remarks-missed.ll
M llvm/test/Transforms/LoopVectorize/X86/vectorization-remarks-profitable.ll
M llvm/test/Transforms/LoopVectorize/X86/vectorization-remarks.ll
M llvm/test/Transforms/LoopVectorize/X86/x86_fp80-vector-store.ll
M llvm/test/Transforms/LoopVectorize/align.ll
M llvm/test/Transforms/LoopVectorize/assume.ll
M llvm/test/Transforms/LoopVectorize/bzip_reverse_loops.ll
M llvm/test/Transforms/LoopVectorize/calloc.ll
M llvm/test/Transforms/LoopVectorize/check-no-vectorize.ll
M llvm/test/Transforms/LoopVectorize/check-prof-info.ll
M llvm/test/Transforms/LoopVectorize/conditional-assignment.ll
M llvm/test/Transforms/LoopVectorize/consec_no_gep.ll
M llvm/test/Transforms/LoopVectorize/constantfolder-infer-correct-gepty.ll
M llvm/test/Transforms/LoopVectorize/constantfolder.ll
M llvm/test/Transforms/LoopVectorize/control-flow.ll
M llvm/test/Transforms/LoopVectorize/cpp-new-array.ll
M llvm/test/Transforms/LoopVectorize/create-induction-resume.ll
M llvm/test/Transforms/LoopVectorize/dbg-outer-loop-vect.ll
M llvm/test/Transforms/LoopVectorize/dbg.value.ll
M llvm/test/Transforms/LoopVectorize/debugloc-optimize-vfuf-term.ll
M llvm/test/Transforms/LoopVectorize/debugloc.ll
M llvm/test/Transforms/LoopVectorize/dereferenceable-info-from-assumption-variable-size.ll
M llvm/test/Transforms/LoopVectorize/diag-missing-instr-debug-loc.ll
M llvm/test/Transforms/LoopVectorize/diag-with-hotness-info.ll
M llvm/test/Transforms/LoopVectorize/discriminator.ll
M llvm/test/Transforms/LoopVectorize/early_exit_legality.ll
M llvm/test/Transforms/LoopVectorize/ee-crash.ll
M llvm/test/Transforms/LoopVectorize/epilog-vectorization-any-of-reductions.ll
M llvm/test/Transforms/LoopVectorize/explicit_outer_detection.ll
M llvm/test/Transforms/LoopVectorize/explicit_outer_nonuniform_inner.ll
M llvm/test/Transforms/LoopVectorize/explicit_outer_uniform_diverg_branch.ll
M llvm/test/Transforms/LoopVectorize/extract-last-veclane.ll
M llvm/test/Transforms/LoopVectorize/fcmp-vectorize.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence-complex.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence-multiply-recurrences.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/fix-reduction-dbg.ll
M llvm/test/Transforms/LoopVectorize/float-induction.ll
M llvm/test/Transforms/LoopVectorize/float-minmax-instruction-flag.ll
M llvm/test/Transforms/LoopVectorize/float-reduction.ll
M llvm/test/Transforms/LoopVectorize/forked-pointers.ll
M llvm/test/Transforms/LoopVectorize/fpsat.ll
M llvm/test/Transforms/LoopVectorize/gcc-examples.ll
M llvm/test/Transforms/LoopVectorize/global_alias.ll
M llvm/test/Transforms/LoopVectorize/i8-induction.ll
M llvm/test/Transforms/LoopVectorize/if-conv-crash.ll
M llvm/test/Transforms/LoopVectorize/if-conversion-reduction.ll
M llvm/test/Transforms/LoopVectorize/if-conversion.ll
M llvm/test/Transforms/LoopVectorize/if-pred-non-void.ll
M llvm/test/Transforms/LoopVectorize/if-pred-not-when-safe.ll
M llvm/test/Transforms/LoopVectorize/if-reduction.ll
M llvm/test/Transforms/LoopVectorize/incorrect-dom-info.ll
M llvm/test/Transforms/LoopVectorize/increment.ll
M llvm/test/Transforms/LoopVectorize/induction-step.ll
M llvm/test/Transforms/LoopVectorize/induction.ll
M llvm/test/Transforms/LoopVectorize/infiniteloop.ll
M llvm/test/Transforms/LoopVectorize/instruction-only-used-outside-of-loop.ll
M llvm/test/Transforms/LoopVectorize/interleaved-accesses-different-insert-position.ll
M llvm/test/Transforms/LoopVectorize/interleaved-accesses-gep-nowrap-flags.ll
M llvm/test/Transforms/LoopVectorize/interleaved-accesses-metadata.ll
M llvm/test/Transforms/LoopVectorize/interleaved-accesses.ll
M llvm/test/Transforms/LoopVectorize/intrinsic.ll
M llvm/test/Transforms/LoopVectorize/invariant-store-vectorization-2.ll
M llvm/test/Transforms/LoopVectorize/invariant-store-vectorization.ll
M llvm/test/Transforms/LoopVectorize/iv-select-cmp-decreasing.ll
M llvm/test/Transforms/LoopVectorize/iv-select-cmp-no-wrap.ll
M llvm/test/Transforms/LoopVectorize/iv-select-cmp-trunc.ll
M llvm/test/Transforms/LoopVectorize/iv-select-cmp.ll
M llvm/test/Transforms/LoopVectorize/loop-vect-memdep.ll
M llvm/test/Transforms/LoopVectorize/memory-dep-remarks.ll
M llvm/test/Transforms/LoopVectorize/metadata-unroll.ll
M llvm/test/Transforms/LoopVectorize/metadata-width.ll
M llvm/test/Transforms/LoopVectorize/min-trip-count-known-via-scev.ll
M llvm/test/Transforms/LoopVectorize/minmax_reduction.ll
M llvm/test/Transforms/LoopVectorize/multiple-address-spaces.ll
M llvm/test/Transforms/LoopVectorize/nested-loops-scev-expansion.ll
M llvm/test/Transforms/LoopVectorize/no-interleave-up-front.ll
M llvm/test/Transforms/LoopVectorize/no_array_bounds.ll
M llvm/test/Transforms/LoopVectorize/no_array_bounds_scalable.ll
M llvm/test/Transforms/LoopVectorize/no_int_induction.ll
M llvm/test/Transforms/LoopVectorize/no_outside_user.ll
M llvm/test/Transforms/LoopVectorize/no_switch.ll
M llvm/test/Transforms/LoopVectorize/no_switch_disable_vectorization.ll
M llvm/test/Transforms/LoopVectorize/noalias-md.ll
M llvm/test/Transforms/LoopVectorize/noalias-scope-decl.ll
M llvm/test/Transforms/LoopVectorize/nofloat-report.ll
M llvm/test/Transforms/LoopVectorize/nofloat.ll
M llvm/test/Transforms/LoopVectorize/nontemporal.ll
M llvm/test/Transforms/LoopVectorize/nounroll.ll
M llvm/test/Transforms/LoopVectorize/optimal-epilog-vectorization-limitations.ll
M llvm/test/Transforms/LoopVectorize/optimal-epilog-vectorization-liveout.ll
M llvm/test/Transforms/LoopVectorize/optimal-epilog-vectorization.ll
M llvm/test/Transforms/LoopVectorize/optsize.ll
M llvm/test/Transforms/LoopVectorize/outer-loop-vec-phi-predecessor-order.ll
M llvm/test/Transforms/LoopVectorize/outer-loop-wide-phis.ll
M llvm/test/Transforms/LoopVectorize/outer_loop_hcfg_construction.ll
M llvm/test/Transforms/LoopVectorize/outer_loop_test1.ll
M llvm/test/Transforms/LoopVectorize/outer_loop_test2.ll
M llvm/test/Transforms/LoopVectorize/partial-lcssa.ll
M llvm/test/Transforms/LoopVectorize/phi-hang.ll
M llvm/test/Transforms/LoopVectorize/pointer-induction-unroll.ll
M llvm/test/Transforms/LoopVectorize/pointer-induction.ll
M llvm/test/Transforms/LoopVectorize/pr28541.ll
M llvm/test/Transforms/LoopVectorize/pr31190.ll
M llvm/test/Transforms/LoopVectorize/pr32859.ll
M llvm/test/Transforms/LoopVectorize/pr33706.ll
M llvm/test/Transforms/LoopVectorize/pr35743.ll
M llvm/test/Transforms/LoopVectorize/pr36311.ll
M llvm/test/Transforms/LoopVectorize/pr38697.ll
M llvm/test/Transforms/LoopVectorize/pr38800.ll
M llvm/test/Transforms/LoopVectorize/pr44488-predication.ll
M llvm/test/Transforms/LoopVectorize/pr45525.ll
M llvm/test/Transforms/LoopVectorize/pr47343-expander-lcssa-after-cfg-update.ll
M llvm/test/Transforms/LoopVectorize/pr48832.ll
M llvm/test/Transforms/LoopVectorize/pr50686.ll
M llvm/test/Transforms/LoopVectorize/pr55167-fold-tail-live-out.ll
M llvm/test/Transforms/LoopVectorize/pr59319-loop-access-info-invalidation.ll
M llvm/test/Transforms/LoopVectorize/predicatedinst-loop-invariant.ll
M llvm/test/Transforms/LoopVectorize/preserve-dbg-loc-and-loop-metadata.ll
M llvm/test/Transforms/LoopVectorize/pseudoprobe.ll
M llvm/test/Transforms/LoopVectorize/ptr-induction.ll
M llvm/test/Transforms/LoopVectorize/ptr_loops.ll
M llvm/test/Transforms/LoopVectorize/read-only.ll
M llvm/test/Transforms/LoopVectorize/reduction-inloop-min-max.ll
M llvm/test/Transforms/LoopVectorize/reduction-inloop-pred.ll
M llvm/test/Transforms/LoopVectorize/reduction-inloop-uf4.ll
M llvm/test/Transforms/LoopVectorize/reduction-inloop.ll
M llvm/test/Transforms/LoopVectorize/reduction-minmax-users-and-predicated.ll
M llvm/test/Transforms/LoopVectorize/reduction-predselect.ll
M llvm/test/Transforms/LoopVectorize/reduction-with-invariant-store.ll
M llvm/test/Transforms/LoopVectorize/reduction.ll
M llvm/test/Transforms/LoopVectorize/remarks-multi-exit-loops.ll
M llvm/test/Transforms/LoopVectorize/remarks-reduction-inloop.ll
M llvm/test/Transforms/LoopVectorize/reverse_iter.ll
M llvm/test/Transforms/LoopVectorize/runtime-check-address-space.ll
M llvm/test/Transforms/LoopVectorize/runtime-check-pointer-element-type.ll
M llvm/test/Transforms/LoopVectorize/runtime-check-readonly-address-space.ll
M llvm/test/Transforms/LoopVectorize/runtime-check.ll
M llvm/test/Transforms/LoopVectorize/same-base-access.ll
M llvm/test/Transforms/LoopVectorize/scalable-assume.ll
M llvm/test/Transforms/LoopVectorize/scalable-inductions.ll
M llvm/test/Transforms/LoopVectorize/scalable-noalias-scope-decl.ll
M llvm/test/Transforms/LoopVectorize/scalable-reduction-inloop.ll
M llvm/test/Transforms/LoopVectorize/scalable-trunc-min-bitwidth.ll
M llvm/test/Transforms/LoopVectorize/scalar-select.ll
M llvm/test/Transforms/LoopVectorize/scalarized-bitcast.ll
M llvm/test/Transforms/LoopVectorize/scev-exitlim-crash.ll
M llvm/test/Transforms/LoopVectorize/scev-predicate-reasoning.ll
M llvm/test/Transforms/LoopVectorize/select-cmp-multiuse.ll
M llvm/test/Transforms/LoopVectorize/select-cmp-predicated.ll
M llvm/test/Transforms/LoopVectorize/select-cmp.ll
M llvm/test/Transforms/LoopVectorize/simple-unroll.ll
M llvm/test/Transforms/LoopVectorize/skip-iterations.ll
M llvm/test/Transforms/LoopVectorize/small-loop.ll
M llvm/test/Transforms/LoopVectorize/start-non-zero.ll
M llvm/test/Transforms/LoopVectorize/struct_access.ll
M llvm/test/Transforms/LoopVectorize/tbaa-nodep.ll
M llvm/test/Transforms/LoopVectorize/tripcount.ll
M llvm/test/Transforms/LoopVectorize/uncountable-single-exit-loops.ll
M llvm/test/Transforms/LoopVectorize/uniform-blend.ll
M llvm/test/Transforms/LoopVectorize/unroll-novec-memcheck-metadata.ll
M llvm/test/Transforms/LoopVectorize/unroll.ll
M llvm/test/Transforms/LoopVectorize/unroll_novec.ll
M llvm/test/Transforms/LoopVectorize/unsafe-dep-remark.ll
M llvm/test/Transforms/LoopVectorize/vect.stats.ll
M llvm/test/Transforms/LoopVectorize/vector-intrinsic-call-cost.ll
M llvm/test/Transforms/LoopVectorize/vector-no-scevcheck.ll
M llvm/test/Transforms/LoopVectorize/vectorize-once.ll
M llvm/test/Transforms/LoopVectorize/vectorize-pointer-phis.ll
M llvm/test/Transforms/LoopVectorize/vplan-incomplete-cases.ll
M llvm/test/Transforms/LoopVectorize/vplan-native-path-inner-loop-with-runtime-checks.ll
M llvm/test/Transforms/LoopVectorize/vplan-outer-loop-uncomputable-trip-count.ll
M llvm/test/Transforms/LoopVectorize/vplan-vectorize-inner-loop-reduction.ll
M llvm/test/Transforms/LoopVectorize/write-only.ll
Log Message:
-----------
[LV][NFC] Remove "; preds = " comments from tests (#191163)
The "; preds = " comments in tests add no value so I've removed them.
Commit: b8ea306c8fd45f8ff1e3590791675a60b10c64a1
https://github.com/llvm/llvm-project/commit/b8ea306c8fd45f8ff1e3590791675a60b10c64a1
Author: Jeff Bailey <jbailey at raspberryginger.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M libc/config/linux/aarch64/headers.txt
M libc/config/linux/arm/headers.txt
M libc/config/linux/i386/headers.txt
M libc/config/linux/riscv/headers.txt
M libc/config/linux/x86_64/headers.txt
Log Message:
-----------
[libc] Add cpio.h to Linux target public headers (#191177)
Added libc.include.cpio to TARGET_PUBLIC_HEADERS for all Linux
architectures: aarch64, arm, i386, riscv, and x86_64.
This enables generation of cpio.h when building with
LLVM_LIBC_FULL_BUILD.
Commit: 7685855678825ffad36d4c8521447a810ebe4197
https://github.com/llvm/llvm-project/commit/7685855678825ffad36d4c8521447a810ebe4197
Author: forking-google-bazel-bot[bot] <265904573+forking-google-bazel-bot[bot]@users.noreply.github.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[Bazel] Fixes 3529ce0 (#191161)
This fixes 3529ce05e9a96760ae3b9435ca264cc707bb4dac.
Co-authored-by: Google Bazel Bot <google-bazel-bot at google.com>
Commit: 8f06d7ab6b7185be08b5cf7f9b0293c998176efe
https://github.com/llvm/llvm-project/commit/8f06d7ab6b7185be08b5cf7f9b0293c998176efe
Author: Corentin Jabot <corentinjabot at gmail.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M clang/include/clang/AST/ExprCXX.h
M clang/test/SemaTemplate/concepts.cpp
Log Message:
-----------
[Clang] Fix handling of references to variable templates with an empty argument list (#191154)
In some cases they were treated as having no argument list at all.
Fixes #191016.
Commit: 93845b8ef4790a853068706200d417ef3184a098
https://github.com/llvm/llvm-project/commit/93845b8ef4790a853068706200d417ef3184a098
Author: Raphael Isemann <rise at apple.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M lldb/test/API/tools/lldb-server/TestAppleSimulatorOSType.py
Log Message:
-----------
[lldb][test] Fix call signature in TestAppleSimulatorOSType (#191185)
Commit 918e446ef28ac97df20d6ef2bd50c78e2fe903ac removed the
stderr_lines_to_read argument but didn't adjust the call site in
TestAppleSimulatorOSType. This patch just removes the extra arg here
too.
Commit: 291e4e97777d707079f5fe14326649cfc1eb8337
https://github.com/llvm/llvm-project/commit/291e4e97777d707079f5fe14326649cfc1eb8337
Author: Oleksandr Tarasiuk <oleksandr.tarasiuk at outlook.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/SemaDecl.cpp
M clang/test/SemaCXX/constant-expression-cxx14.cpp
Log Message:
-----------
[Clang] prevent constexpr crash on invalid overrides (#184048)
Fixes #183290
---
This PR fixes a crash during `constexpr` evaluation that occurred after
detecting an invalid override. It now marks the overriding method as
invalid when override checks fail.
Commit: 02b051ae0ad248289576f4b4af238af3675be62a
https://github.com/llvm/llvm-project/commit/02b051ae0ad248289576f4b4af238af3675be62a
Author: Ramkumar Ramachandra <artagnon at tenstorrent.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
Log Message:
-----------
[VPlan] Strip replicate-region-bail in udiv -> lshr simpl (NFC) (#190251)
Since 99aa33d ([VPlan] Explicitly unroll replicate-regions without
live-outs by VF, #188947), VPInstructions in replicate regions can be
handled. The change is non-functional because simplifyRecipes is run
after unrollByUF, which dissolves replicate regions.
Commit: c9223cdbebe39798cf4f56568e8dce371bb0674e
https://github.com/llvm/llvm-project/commit/c9223cdbebe39798cf4f56568e8dce371bb0674e
Author: jeanPerier <jperier at nvidia.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M flang/include/flang/Optimizer/Dialect/FIRType.h
M flang/lib/Optimizer/Builder/Runtime/Allocatable.cpp
M flang/lib/Optimizer/CodeGen/CodeGen.cpp
M flang/lib/Optimizer/Dialect/FIRType.cpp
M flang/lib/Optimizer/Transforms/CUDA/CUFOpConversion.cpp
Log Message:
-----------
[flang][NFC] remove ambiguous fir::unwrapInnerType helper (#191189)
`fir::unwrapInnerType` has the odd behavior of returning an empty type
for things like i32, causing BaseBoxType::unwrapInnerType to return a
null type for fir.box<i32> which was not intended.
Remove the helper, no user really needed the null type behavior, replace
its few usage by fir::getFortranElementType and update
BaseBoxType::unwrapInnerType to do the intended behavior.
Commit: 89dbacb42dd88ce084e1a25a651412dfdfe54a73
https://github.com/llvm/llvm-project/commit/89dbacb42dd88ce084e1a25a651412dfdfe54a73
Author: Ramkumar Ramachandra <artagnon at tenstorrent.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-sub.ll
Log Message:
-----------
[LV] InstCombine-simplify partial-reduce-sub dotp test (#189739)
The input IR shown in the partial-reduce-sub dotp test will never reach
the vectorizer, due to prior simplification by InstCombine. Change it
with this simplification. This is necessary for the simplification in
#187228, whose goal is to make #187589 possible.
Commit: 283a59154531923a0d8dacaac6c1a5a930429ac0
https://github.com/llvm/llvm-project/commit/283a59154531923a0d8dacaac6c1a5a930429ac0
Author: Lang Hames <lhames at gmail.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M orc-rt/include/orc-rt/SPSWrapperFunction.h
M orc-rt/unittests/SPSWrapperFunctionTest.cpp
Log Message:
-----------
[orc-rt] Qualify SPSWrapperFunction in ORC_RT_SPS_WRAPPER macro. (#191196)
This enables use of ORC_RT_SPS_WRAPPER in other namespaces.
Commit: ef31b272d252f8c806f24fc95c41bd2507720c7d
https://github.com/llvm/llvm-project/commit/ef31b272d252f8c806f24fc95c41bd2507720c7d
Author: Kseniya Tikhomirova <kseniya.tikhomirova at intel.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M libsycl/docs/index.rst
A libsycl/include/sycl/__impl/event.hpp
M libsycl/include/sycl/__impl/queue.hpp
M libsycl/include/sycl/sycl.hpp
M libsycl/src/CMakeLists.txt
A libsycl/src/detail/event_impl.cpp
A libsycl/src/detail/event_impl.hpp
M libsycl/src/detail/queue_impl.cpp
M libsycl/src/detail/queue_impl.hpp
A libsycl/src/event.cpp
M libsycl/src/queue.cpp
Log Message:
-----------
[libsycl] add sycl::event and wait functionality to event & queue (#188793)
Depends on https://github.com/llvm/llvm-project/pull/187528.
This is part of the SYCL support upstreaming effort. The relevant RFCs
can be found here:
https://discourse.llvm.org/t/rfc-add-full-support-for-the-sycl-programming-model/74080
https://discourse.llvm.org/t/rfc-sycl-runtime-upstreaming/74479
---------
Signed-off-by: Tikhomirova, Kseniya <kseniya.tikhomirova at intel.com>
Commit: eabe979d5cf58998fda4c1cba41b6802a37164a7
https://github.com/llvm/llvm-project/commit/eabe979d5cf58998fda4c1cba41b6802a37164a7
Author: Balázs Benics <benicsbalazs at gmail.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M clang/docs/analyzer/user-docs/Annotations.rst
M clang/include/clang/Basic/AttrDocs.td
Log Message:
-----------
[clang][docs] Further improve the docs of the ownership_returns attribute (#191197)
This addresses:
https://github.com/llvm/llvm-project/pull/191005#discussion_r3058171126
https://github.com/llvm/llvm-project/pull/191005#discussion_r3058173173
I've reviewed the uses of "argument" and "parameter" and tried to
consolidate them to the best of my abilities.
This patch fixes up #191005
Commit: 4b5a4b054bf72ea74d64720717f8e9ee72f92fe5
https://github.com/llvm/llvm-project/commit/4b5a4b054bf72ea74d64720717f8e9ee72f92fe5
Author: Adel Ejjeh <adel.ejjeh at amd.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
M llvm/lib/Transforms/Scalar/LoopUnrollPass.cpp
R llvm/test/Transforms/LoopUnroll/AMDGPU/expensive-tripcount.ll
A llvm/test/Transforms/LoopUnroll/expensive-tripcount.ll
Log Message:
-----------
[LoopUnroll] Enable allowexpensivetripcounts when user provides pragma (#181267)
Loops with an explicit unroll pragma (`#pragma unroll` / `#pragma clang
loop unroll(enable)`) that have an expensive runtime trip count
currently don't get unrolled because `UP.AllowExpensiveTripCount`
defaults to false. The pragma is silently ignored. This is not the case
when an unroll factor is specified (`PragmaCount > 0`), where the pass
sets `UP.AllowExpensiveTripCount = true`.
**Solution:**
Set `UP.AllowExpensiveTripCount` and `UP.Runtime` to true for for loops
that have an unroll pramga at the beginning of `computeUnrollCount()`.
I've also added a new lit test `expensive-tripcount.ll` that verifies
pragma-driven unrolling with expensive trip counts will work as
expected.
---------
Co-authored-by: Justin Fargnoli <jfargnoli at nvidia.com>
Commit: dd4360d29230d23188ddf581e4897705b2c4f771
https://github.com/llvm/llvm-project/commit/dd4360d29230d23188ddf581e4897705b2c4f771
Author: Adel Ejjeh <adel.ejjeh at amd.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M llvm/lib/Transforms/Utils/ScalarEvolutionExpander.cpp
M llvm/test/Transforms/IndVarSimplify/X86/loop-invariant-conditions.ll
A llvm/test/Transforms/LoopUnroll/AMDGPU/scev-mul-expansion-cost.ll
Log Message:
-----------
[SCEV] Fix scMulExpr cost for multiply by -1 and power-of-2 (#191033)
Currently, SCEV's cost model will always return the cost of a Multiply
for `scMulExpr`, without taking into account the cases where
`SCEVExpander::visitMulExpr` does not actually emit a multiply. This PR
addresses two of these cases:
- `-1 * X`: generates `sub 0, X`
- `2^k * X`: generates `shl X, k`
This mismatch matters on targets where integer multiply is expensive
because it can block runtime unrolling by overestimating the cost of
expanding the trip count calculation.
This patch checks the constant operand in two-operand `scMulExpr` and
counts it as a subtract if it is -1 or a shift-left if it is a power of
2.
The patch also introduces a new lit test, and udpates
`IndVarSimplify/X86/loop-invariant-conditions.ll` because it now
correctly estimates the cost of `-1 * start` which allows IndVarSimplify
to simplify the induction variable.
Assisted-by: Cursor (Claude)
Commit: a13f661f70ab069980b8f0983a5b1223afd9384b
https://github.com/llvm/llvm-project/commit/a13f661f70ab069980b8f0983a5b1223afd9384b
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoZicbo.td
M llvm/test/CodeGen/RISCV/prefetch.ll
M llvm/test/MC/RISCV/rvzicbom-invalid.s
M llvm/test/MC/RISCV/rvzicbop-valid.s
M llvm/test/MC/RISCV/rvzicboz-invalid.s
Log Message:
-----------
[RISCV] Allow prefetch hints without Zicbop. (#191027)
The prefetch encodings are ORI with x0 destination. To be consistent
with other hints like Zihintntl, we should always allow these.
Commit: 772354979ffa7e61b0e85b68fbe2aa1a5e597aef
https://github.com/llvm/llvm-project/commit/772354979ffa7e61b0e85b68fbe2aa1a5e597aef
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M libcxx/utils/ci/lnt/README.md
M libcxx/utils/ci/lnt/run-benchmarks
M libcxx/utils/ci/lnt/runners/apple-m5-clang21
M libcxx/utils/ci/lnt/runners/apple-m5-xcode26
A libcxx/utils/ci/lnt/submit-benchmarks
Log Message:
-----------
[libc++] Split benchmark generation and submission into two scripts (#191211)
This makes it easier to locally replicate perf CI setups locally without
actually making submissions to the LNT instance.
Commit: b4a49883ce7a896eeb1fae88ca5abe0746d01168
https://github.com/llvm/llvm-project/commit/b4a49883ce7a896eeb1fae88ca5abe0746d01168
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M clang/lib/CodeGen/CodeGenFunction.cpp
A clang/test/CodeGen/AMDGPU/sanitizer.c
Log Message:
-----------
[HIP] Fix ubsan function checks applied to kernel functions (#188872)
Summary:
The 'function' check requires inserting eight bytes of magic before each
function. The HIP runtime expects and enforces 256 byte alignment. When
the instrumentation inserts the eight bytes this is done after the
alignment, which means that the HIP runtime then points the PC to an
invalid instruction by truncating the address to 256 byte alignment. The
OpenMP runtime doesn't do this.
The purpose of this function is to handle indirect calls, and it's
impossible to indirectly call a kernel anyway, so we should just
suppress this in this case. The only other solution would be to add the
alignment back before we emit the label, but that would be meaningless
because it'd just replace the magic bytes with zeroes.
Commit: 6a7c14115c7ae0a8460e6717ff6f4e9091fc32e1
https://github.com/llvm/llvm-project/commit/6a7c14115c7ae0a8460e6717ff6f4e9091fc32e1
Author: Zhijie Wang <yesterda9 at gmail.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M clang/docs/LifetimeSafety.rst
Log Message:
-----------
[LifetimeSafety] Document record type origin tracking for lifetimebound calls (#189508)
Update the doc for #187917
Commit: ef281e905927147d64b74ce9ec7fd14332f929b1
https://github.com/llvm/llvm-project/commit/ef281e905927147d64b74ce9ec7fd14332f929b1
Author: Sang Ik Lee <sang.ik.lee at intel.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M mlir/test/Integration/GPU/LevelZero/gpu-addf32-to-spirv.mlir
M mlir/test/Integration/GPU/LevelZero/gpu-addi64-to-spirv.mlir
M mlir/test/Integration/GPU/LevelZero/gpu-memcpy-addf32-to-spirv.mlir
M mlir/test/Integration/GPU/LevelZero/gpu-reluf32-to-spirv.mlir
Log Message:
-----------
[MLIR][GPU] Fix LevelZero wrapper integration tests. (#191060)
LevelZero wrapper has been updated to accept SPIR-V binary for JIT
wrapper.
Update gpu-module-to-binary pass format option to isa to use JIT.
Commit: e76d803359f1993cb66c6c100e3648ff0cb4afc4
https://github.com/llvm/llvm-project/commit/e76d803359f1993cb66c6c100e3648ff0cb4afc4
Author: Tim Gymnich <tim at gymni.ch>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M llvm/include/llvm/Support/KnownFPClass.h
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/lib/Support/KnownFPClass.cpp
A llvm/test/Transforms/Attributor/nofpclass-trig.ll
M llvm/test/Transforms/InstSimplify/known-never-infinity.ll
M llvm/test/Transforms/InstSimplify/known-never-nan.ll
Log Message:
-----------
[Support] KnownFPClass: add static helpers for more trig intrinsics (#190609)
Add KnownFPClass::tan, sinh, cosh, tanh, asin, acos, atan, and atan2
static helper methods, following the same pattern as the existing
sin/cos helpers.
Co-authored-by: Claude Sonnet 4.6 <noreply at anthropic.com>
Commit: fa89983d45e25cb2d64773148b43c7b4ab8c5d1b
https://github.com/llvm/llvm-project/commit/fa89983d45e25cb2d64773148b43c7b4ab8c5d1b
Author: Utkarsh Saxena <usx at google.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M .github/new-prs-labeler.yml
Log Message:
-----------
Add LifetimeSafety documentation to PR labeler (#191215)
Commit: 6ca63c1018a0a89912bbf1b30ef28f42ed14e76a
https://github.com/llvm/llvm-project/commit/6ca63c1018a0a89912bbf1b30ef28f42ed14e76a
Author: Keith Smiley <keithbsmiley at gmail.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVTosaOps.h
Log Message:
-----------
[mlir][spirv] Add missing include statements and header guard (NFC) (#191078)
Previously this header assumed these other includes had already been
included
Commit: 1ecd855a4d95b1295c17a36c13d911dc4ca0f0b9
https://github.com/llvm/llvm-project/commit/1ecd855a4d95b1295c17a36c13d911dc4ca0f0b9
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M libcxx/utils/ci/lnt/README.md
A libcxx/utils/ci/lnt/run-benchbot
R libcxx/utils/ci/lnt/runners/README.md
R libcxx/utils/ci/lnt/runners/apple-m5-clang21
R libcxx/utils/ci/lnt/runners/apple-m5-xcode26
Log Message:
-----------
[libc++] Replace individual LNT runner scripts by run-benchbot (#191221)
The run-benchbot script is similar to the run-buildbot script. Its goal
is to provide a unified entry point for all the libc++ LNT runners.
Commit: 2763b22413c4f8406087a1ffb5aa3d67f8f49edd
https://github.com/llvm/llvm-project/commit/2763b22413c4f8406087a1ffb5aa3d67f8f49edd
Author: vangthao95 <vang.thao at amd.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.interp.p1.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.interp.mov.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.interp.p1.f16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.interp.p1.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.interp.p2.f16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.interp.p2.mir
M llvm/test/CodeGen/AMDGPU/diverge-interp-mov-lower.ll
M llvm/test/CodeGen/AMDGPU/fsub-as-fneg-src-modifier.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.interp.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.interp.inreg.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.interp.ll
Log Message:
-----------
AMDGPU/GlobalISel: RegBankLegalize rules for interp intrinsics (#191086)
Commit: f3db4b72a5c2a5001a4ff6af9e2e01dcd57fd584
https://github.com/llvm/llvm-project/commit/f3db4b72a5c2a5001a4ff6af9e2e01dcd57fd584
Author: Chinmay Deshpande <chdeshpa at amd.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.setprio.inc.wg.ll
Log Message:
-----------
[AMDGPU][GISel] RegBankLegalize rules for amdgcn_s_setprio_inc_wg (#191064)
Commit: 2c7bc4226dacdb87604ac690195a4f10141b54e3
https://github.com/llvm/llvm-project/commit/2c7bc4226dacdb87604ac690195a4f10141b54e3
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
A .github/workflows/release-llvm-testing-tools.yml
Log Message:
-----------
[Github][TestingTools] Add workflow to build llvm-testing-tools
Add a github workflow to build the package. This just adds manylinux239
support for x86. Eventually we want to set up Windows/MacOS/AArch64
Linux and trusted publishing to automatically push this out to PyPI, but
for now this should be sufficient for testing.
Reviewers: ldionne, Michael137
Pull Request: https://github.com/llvm/llvm-project/pull/188891
Commit: 212a216e425469be5b9c6e74f6ebb92993f54653
https://github.com/llvm/llvm-project/commit/212a216e425469be5b9c6e74f6ebb92993f54653
Author: vangthao95 <vang.thao at amd.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.fdot2.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fdot2.f16.f16.ll
Log Message:
-----------
AMDGPU/GlobalISel: RegBankLegalize rules for fdot2 (#191066)
Commit: 6a12adb5a8de1a5eed17bbcfa886397ba6931f13
https://github.com/llvm/llvm-project/commit/6a12adb5a8de1a5eed17bbcfa886397ba6931f13
Author: 4ast <alexei.starovoitov at gmail.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M llvm/test/CodeGen/BPF/struct_ret1.ll
M llvm/test/CodeGen/BPF/struct_ret2.ll
Log Message:
-----------
[bpf] make tests endian agnostic (#191206)
fix s390 failures:
https://lab.llvm.org/buildbot/#/builders/42/builds/8534
Signed-off-by: Alexei Starovoitov <ast at kernel.org>
Co-authored-by: Alexei Starovoitov <ast at kernel.org>
Commit: e21759ff4931db082dfdcc87ac3bf70ddd356abe
https://github.com/llvm/llvm-project/commit/e21759ff4931db082dfdcc87ac3bf70ddd356abe
Author: Kacper Doga <kacper.doga at intel.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M llvm/lib/Analysis/BasicAliasAnalysis.cpp
A llvm/test/Analysis/BasicAA/gep-decompose-bitcast-vector-type-mismatch.ll
Log Message:
-----------
[BasicAA] Fix assertion failure in alias() caused by non-pointer base in DecomposeGEPExpression (#191180)
When stripping a bitcast in DecomposeGEPExpression, the resulting
operand may have a non-scalar-pointer type (e.g. <1 x ptr>). Proceeding
with such a type as the decomposition base violates the AA assumption
that all pointers are scalar pointer types, triggering an assertion
failure on alias() call.
Add a type check in the bitcast/addrspacecast handling path to return
not stripped V as base when the stripped operand is not a scalar pointer
type.
Add a lit test verifying no crash on valid IR containing such a bitcast,
and checking that the alias query conservatively returns MayAlias.
Fixes #191157
Commit: 9d38eba6e73b70030518d3ed09a01bb06b36d44b
https://github.com/llvm/llvm-project/commit/9d38eba6e73b70030518d3ed09a01bb06b36d44b
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp
M llvm/test/Transforms/InstCombine/sub-xor-cmp.ll
Log Message:
-----------
[InstCombine][ProfCheck] Mark unknown select profiles in sub xor fold (#191192)
Mark the weights as explicitly unknown given we cannot statically infer
the weights without value profiling due to the select being synthesized
from a binary operation.
Commit: 857a98e50e279c0c1cf3658337dadb347f7ff5c4
https://github.com/llvm/llvm-project/commit/857a98e50e279c0c1cf3658337dadb347f7ff5c4
Author: Andrew Haberlandt <ahaberlandt at apple.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M compiler-rt/lib/sanitizer_common/sanitizer_mac.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_mac.h
Log Message:
-----------
[compiler-rt] [Darwin] Move macOS ASAN reservation above 512G (#191039)
On macOS, the first 512G may contain platform-specific reservations. To
ensure compatibility with these reservations, this changes ASAN to
always map shadow memory above 512G on macOS.
rdar://174252720
Commit: 070d708d86629d8c8deae2a95c6e071f30ba9c5c
https://github.com/llvm/llvm-project/commit/070d708d86629d8c8deae2a95c6e071f30ba9c5c
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M libcxx/utils/ci/lnt/run-benchbot
Log Message:
-----------
[libc++] Minor tweaks to run-benchbot (#191233)
- Support multiple runs of run-benchbot on the same commit
- Add support for passing a path to SPEC
Commit: e77ac8049afab1ed6dcd048a65c0e5c030293c84
https://github.com/llvm/llvm-project/commit/e77ac8049afab1ed6dcd048a65c0e5c030293c84
Author: Paul Walker <paul.walker at arm.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M clang/include/clang/Basic/arm_sve.td
M clang/lib/CodeGen/TargetBuiltins/ARM.cpp
M clang/test/CodeGen/AArch64/sme-intrinsics/acle_sme_ld1.c
M clang/test/CodeGen/AArch64/sme-intrinsics/acle_sme_ld1_vnum.c
M clang/test/CodeGen/AArch64/sme-intrinsics/acle_sme_ldr.c
M clang/test/CodeGen/AArch64/sme-intrinsics/acle_sme_st1.c
M clang/test/CodeGen/AArch64/sme-intrinsics/acle_sme_st1_vnum.c
M clang/test/CodeGen/AArch64/sme-intrinsics/acle_sme_str.c
M clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_ldr_str_zt.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ld1.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ld1ro.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ld1rq.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ld1sb.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ld1sh.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ld1sw.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ld1ub.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ld1uh.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ld1uw.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ld2.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ld3.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ld4.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ldff1.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ldff1sb.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ldff1sh.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ldff1sw.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ldff1ub.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ldff1uh.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ldff1uw.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ldnf1.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ldnf1sb.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ldnf1sh.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ldnf1sw.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ldnf1ub.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ldnf1uh.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ldnf1uw.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ldnt1.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_prfb.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_prfd.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_prfh.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_prfw.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_st1.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_st1b.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_st1h.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_st1w.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_st2.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_st3.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_st4.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_stnt1.c
M clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_ldnt1.c
M clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_ldnt1sb.c
M clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_ldnt1sh.c
M clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_ldnt1sw.c
M clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_ldnt1ub.c
M clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_ldnt1uh.c
M clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_ldnt1uw.c
M clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_stnt1.c
M clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_stnt1b.c
M clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_stnt1h.c
M clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_stnt1w.c
M clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_ld1.c
M clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_ld1_single.c
M clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_ldnt1.c
M clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_load_struct.c
M clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_loads.c
M clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_st1.c
M clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_st1_single.c
M clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_stnt1.c
M clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_store.c
M clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_store_struct.c
M llvm/include/llvm/IR/IntrinsicsAArch64.td
M llvm/lib/IR/AutoUpgrade.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/test/Bitcode/upgrade-aarch64-sve-intrinsics.ll
M llvm/test/CodeGen/AArch64/sve-coalesce-ptrue-intrinsics.ll
M llvm/test/Instrumentation/MemorySanitizer/AArch64/sme2-intrinsics-add-mini.ll
M llvm/test/Instrumentation/MemorySanitizer/AArch64/sme2-intrinsics-add.ll
M llvm/test/Transforms/InstCombine/AArch64/sve-intrinsic-comb-no-active-lanes-stores.ll
M llvm/test/Transforms/InstCombine/AArch64/sve-intrinsic-gatherscatter.ll
M llvm/test/Transforms/InstCombine/scalable-trunc.ll
M llvm/test/Transforms/InterleavedAccess/AArch64/scalable-deinterleave-intrinsics.ll
M llvm/test/Transforms/InterleavedAccess/AArch64/sve-deinterleave4.ll
M llvm/test/Transforms/InterleavedAccess/AArch64/sve-interleave4.ll
M llvm/test/Transforms/InterleavedAccess/AArch64/sve-interleaved-accesses.ll
M llvm/test/Transforms/PhaseOrdering/AArch64/sve-interleave-vectorization.ll
M mlir/include/mlir/Dialect/ArmSME/IR/ArmSMEIntrinsicOps.td
Log Message:
-----------
[LLVM][AArch64] Remove addrspace(0) restriction from all SVE/SME memory intrinsics. (#189992)
This requirement was not intentional, just the result of convenience.
Fixes: https://github.com/llvm/llvm-project/issues/183265
---------
Co-authored-by: nikhil-m-k <nikhil_mk at yahoo.com>
Commit: e9c78be316180a86529d7ac2ba41e4ec976fca33
https://github.com/llvm/llvm-project/commit/e9c78be316180a86529d7ac2ba41e4ec976fca33
Author: Fangrui Song <i at maskray.me>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M llvm/include/llvm/MC/MCAssembler.h
M llvm/lib/MC/MCAssembler.cpp
M llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
M llvm/lib/Target/CSKY/MCTargetDesc/CSKYAsmBackend.cpp
M llvm/test/MC/ARM/thumb-ldr-stretch.s
M llvm/test/MC/CSKY/lrw-stretch.s
M llvm/test/MC/ELF/relax-branch-align.s
M llvm/test/MC/X86/align-branch-convergence.s
Log Message:
-----------
Reland [MC] Fuse relaxation and layout into a single forward pass (#190318)
This relands debb2514ea7f, which was reverted by #189548 due to ARM
spurious `cbz` out of range error (Chromium, Android).
---
Replace the two-pass inner loop in relaxOnce (relaxFragment +
layoutSection) with a single forward pass that sets each fragment's
offset before processing it.
- Extract relaxAlign from layoutSection's FT_Align handling and call
it from relaxFragment. FT_Align padding is computed inline with the
tracked Offset, so alignment fragments always see fresh upstream
offsets. This structurally eliminates the O(N) convergence pitfall
where stale offsets caused each iteration to fix only one more
alignment fragment.
- The new MCAssembler::Stretch field tracks the cumulative upstream size
delta. In evaluateFixup, for PCRel fixups during relaxation, Stretch
is added to forward-reference target values (LayoutOrder comparison).
This makes displacement = target_old - source_old, identical to the
old two-pass approach, preventing premature relaxation for
span-dependent instructions.
- FT_Fill/FT_Org removed from relaxFragment; `if (F.Offset != Offset) in
the fused loop detects their size changes.
- layoutSection is retained for initial layout and post-finishLayout.
This fixes the FT_BoundaryAlign linear time convergence issue reported
by #176535. In addition, backward branches near the short/near boundary
may benefit from tighter encoding when a .p2align between the target and
the branch absorbs upstream growth (see relax-branch-align.s).
Key commits that updated relaxFragment/layoutSection:
- 742ecfc13e8a [MC] Relax MCFillFragment and compute fragment offsets
eagerly
- 9f66ebe42715 MC: Eliminate redundant fragment relaxation
- df71243fa885 MC: Evaluate .org during fragment relaxation
- b1d58f025e83 MCAssembler: Simplify fragment relaxation
- 58d16db8b5d2 MCAssembler: Simplify relaxation of FT_Fill and FT_Org
---
Fix for the ARM regression (see thumb-ldr-stretch.s):
ARM `evaluateFixup` pre-seeds Value with
`(F.Offset + fixup_offset) % 4` for Thumb's AlignDown(PC, 4) semantics.
The full displacement formulas:
```
Old two-pass:
(source_old % 4) + target_old - source_old
= target_old - alignDown(source_old, 4)
Reverted buggy fused:
(source_new % 4) + target_old - source_new + Stretch
= target_old + Stretch - alignDown(source_new, 4)
Fixed fused:
((source_new - Stretch) % 4) + target_old - source_new + Stretch
= (source_old % 4) + target_old - source_old
= target_old - alignDown(source_old, 4)
```
With the fused pass, F.Offset is already updated by Stretch, so the
pre-seed used the new offset while the generic Stretch compensation
assumed the old offset, producing a misaligned displacement. This caused
spurious tLDRpci -> t2LDRpci relaxation (+2 bytes each), which cascaded
to push the initial CBZ target out of range.
The fix uses pre-Stretch source offsets for the AlignDown(PC, 4)
pre-seed in evaluateFixup, leading to the same displacement
as the old two-pass algorithm.
Commit: 20b6ec66967ac2a8f932863c1abf251e5b17a843
https://github.com/llvm/llvm-project/commit/20b6ec66967ac2a8f932863c1abf251e5b17a843
Author: Hans Wennborg <hans at hanshq.net>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M clang/test/CMakeLists.txt
Log Message:
-----------
[clang][ssaf] Fix CLANG_PLUGIN_SUPPORT=OFF SSAFExamplePlugin cmake errors (#191229)
Such builds would fail with:
```
...
CMake Error at cmake/modules/AddLLVM.cmake:2245 (add_dependencies):
The dependency target "SSAFExamplePlugin" of target
"check-clang-utils-update_cc_test_checks" does not exist.
...
```
This fixes it by using the same condition for the test dependency as is
used for deciding to build the plugin in
clang/lib/ScalableStaticAnalysisFramework/Plugins/CMakeLists.txt
Commit: e3adaf0be8b71a66028ddcdb9897c67dd0804fd3
https://github.com/llvm/llvm-project/commit/e3adaf0be8b71a66028ddcdb9897c67dd0804fd3
Author: Jan Svoboda <jan_svoboda at apple.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M clang/lib/Serialization/ModuleCache.cpp
Log Message:
-----------
[clang][modules] Close module file descriptors (#191227)
This was missed in the original PR and was causing "too many files open"
errors on real workloads.
Commit: cacd8625ea70c452c4bfcafc75eb55c29d3f31fe
https://github.com/llvm/llvm-project/commit/cacd8625ea70c452c4bfcafc75eb55c29d3f31fe
Author: Alexey Samsonov <vonosmas at gmail.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M libc/config/linux/aarch64/headers.txt
M libc/config/linux/riscv/headers.txt
M libc/config/linux/x86_64/headers.txt
M libc/include/CMakeLists.txt
A libc/include/syscall.h
Log Message:
-----------
[libc] Add a redirecting <syscall.h> header. (#191069)
The amount of legacy code including `<syscall.h>` header instead of
`<sys/syscall.h>` (which is the regular header location on Linux
systems) out there is large.
Add a simple one-liner redirecting header to fix this compatibility
issues. In this PR I omit the regular licensing blurb at the top, given
the transient nature of this file, but I'm happy to add this if needed.
Also, given that it's effectively a compatibility shim, YAML generation
is not used.
Commit: fa7f5cf6f665f2380a7103bccce58a01ea673b8c
https://github.com/llvm/llvm-project/commit/fa7f5cf6f665f2380a7103bccce58a01ea673b8c
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M libc/shared/rpc.h
Log Message:
-----------
[libc] Fix 'finish()' being called by the client instead of the server (#191226)
Summary:
This function is supposed to manage the doorbell interrupts. The flow
that was intended was that the client notified work to wake the server
and the server finished the work so it didn't go back to sleep until
everything was done. This was reversed and we had the client finishing
work and then stalling on it.
Commit: 47c919a8b56db94a0897e55c242343e889d02eb8
https://github.com/llvm/llvm-project/commit/47c919a8b56db94a0897e55c242343e889d02eb8
Author: rthomas-activision <romain.thomas at activision.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M clang/lib/Driver/Driver.cpp
M clang/test/Driver/cl-outputs.c
Log Message:
-----------
[clang][Driver] Ensure intermediate bitcode files are written according to `/Fo` (#189977)
With the following compilation process:
```
$ mkdir -p src/ tmp/
$ cat << 'EOF' > src/main.c
int main() { return 0; }
EOF
$ clang-cl /c /Fo:tmp/ /clang:-fembed-bitcode src/main.c
```
the object file `main.obj` is generated in the `tmp/` directory but the
intermediate `main.bc` is placed in the current working directory.
This PR ensures that intermediate `.bc` files are written to the same
directory specified by `/Fo`.
Commit: 1af724e4a940869bd30aadf42eec01773de71c35
https://github.com/llvm/llvm-project/commit/1af724e4a940869bd30aadf42eec01773de71c35
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M llvm/test/CodeGen/SPIRV/spirv_param_decorations.ll
Log Message:
-----------
[NFC][SPIR-V] Fix spirv_param_decorations test to use valid parameter types and decorations (#191125)
Commit: 74af5fa55f8f6f96e9d01edfd2beaf9b245dfda1
https://github.com/llvm/llvm-project/commit/74af5fa55f8f6f96e9d01edfd2beaf9b245dfda1
Author: jeanPerier <jperier at nvidia.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M flang/include/flang/Optimizer/Dialect/FIRDialect.td
M flang/include/flang/Optimizer/Dialect/FIROps.td
M flang/include/flang/Optimizer/Dialect/FIRTypes.td
M flang/lib/Lower/ConvertExprToHLFIR.cpp
M flang/lib/Lower/Support/ReductionProcessor.cpp
M flang/lib/Optimizer/CodeGen/CodeGen.cpp
M flang/lib/Optimizer/Dialect/FIRDialect.cpp
M flang/lib/Optimizer/Dialect/FIROps.cpp
M flang/lib/Optimizer/OpenACC/Support/FIROpenACCTypeInterfaces.cpp
M flang/lib/Optimizer/Transforms/FIRToMemRef.cpp
M flang/test/Fir/fir-ops.fir
M flang/test/Fir/invalid.fir
M flang/test/Fir/logical-convert.fir
A flang/test/Fir/logical-ops-fold.fir
M flang/test/Lower/HLFIR/array-ctor-as-inlined-temp.f90
M flang/test/Lower/HLFIR/binary-ops.f90
M flang/test/Lower/HLFIR/expr-box.f90
M flang/test/Lower/HLFIR/user-defined-assignment.f90
M flang/test/Lower/OpenACC/acc-reduction.f90
M flang/test/Lower/OpenMP/atomic-update-reassoc-logical.f90
M flang/test/Lower/OpenMP/wsloop-reduction-logical-and-byref.f90
M flang/test/Lower/OpenMP/wsloop-reduction-logical-and.f90
M flang/test/Lower/OpenMP/wsloop-reduction-logical-eqv-byref.f90
M flang/test/Lower/OpenMP/wsloop-reduction-logical-eqv.f90
M flang/test/Lower/OpenMP/wsloop-reduction-logical-neqv-byref.f90
M flang/test/Lower/OpenMP/wsloop-reduction-logical-neqv.f90
M flang/test/Lower/OpenMP/wsloop-reduction-logical-or-byref.f90
M flang/test/Lower/OpenMP/wsloop-reduction-logical-or.f90
M flang/test/Lower/array-elemental-calls-2.f90
M flang/test/Transforms/FIRToMemRef/logical.mlir
Log Message:
-----------
[flang] preserve logical operations in single FIR operation (#190771)
This patch adds new operations to represent AND/OR/EQV/NEQV logical
operation with the main goal of preserving them at a higher level in the
IR to make it easier to match them and to dispatch them to atomic
implementations when working on reductions.
They are only generated when one of the argument is actually a logical,
otherwise, the when dealing with AND/OR... where both operands are
comparisons, the i1 arith operations are still generated since using the
new operation would make the IR more complex and preserving logical
operation is only valuable when one of the operand is a logical
variable.
Commit: 1a4734789d2dcc42bb2d183ffb94b0cb9b41292f
https://github.com/llvm/llvm-project/commit/1a4734789d2dcc42bb2d183ffb94b0cb9b41292f
Author: Takashi Idobe <idobetakashi at gmail.com>
Date: 2026-04-10 (Fri, 10 Apr 2026)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp
M llvm/test/Transforms/InstCombine/scmp.ll
M llvm/test/Transforms/InstCombine/ucmp.ll
Log Message:
-----------
[InstCombine] fold (sext(ucmp/scmp(X, Y)) -> ucmp/scmp(X, Y) (#191182)
relates: https://github.com/llvm/llvm-project/issues/190538
related PR: https://github.com/llvm/llvm-project/pull/190787
This PR folds (sext(ucmp/scmp(X, Y)) -> ucmp/scmp(X, Y). Since ucmp/scmp
return -1, 0, 1, if you see the sequence:
```llvm
%_3 = tail call i8 @llvm.ucmp.i8.i64(i64 %a, i64 %b)
%_0 = sext i8 %_3 to i64
```
It's fine to turn this into:
```llvm
%_0 = tail call i64 @llvm.ucmp.i64.i64(i64 %a, i64 %b)
```
[Alive Proof](https://alive2.llvm.org/ce/z/VmeKM2)
Likewise for scmp:
```llvm
%_3 = tail call i8 @llvm.scmp.i8.i64(i64 %a, i64 %b)
%_0 = sext i8 %_3 to i64
```
```llvm
%_0 = tail call i64 @llvm.scmp.i64.i64(i64 %a, i64 %b)
```
[Alive Proof](https://alive2.llvm.org/ce/z/WSm7YS)
For ucmp, a simple way to get this is to cmp two rust unsigned integers:
```rust
pub fn compare(a: u64, b: u64) -> i64 {
a.cmp(&b) as i64
}
```
Which gets this:
```llvm
define noundef range(i64 -1, 2) i64 @compare(i64 noundef %a, i64 noundef %b) unnamed_addr {
start:
%_3 = tail call i8 @llvm.ucmp.i8.i64(i64 %a, i64 %b)
%_0 = sext i8 %_3 to i64
ret i64 %_0
}
declare range(i8 -1, 2) i8 @llvm.ucmp.i8.i64(i64, i64)
```
For scmp, swapping to i64s will suffice:
```rust
pub fn compare(a: i64, b: i64) -> i64 {
a.cmp(&b) as i64
}
```
```llvm
define noundef range(i64 -1, 2) i64 @compare(i64 noundef %a, i64 noundef %b) unnamed_addr {
start:
%_3 = tail call i8 @llvm.scmp.i8.i64(i64 %a, i64 %b)
%_0 = sext i8 %_3 to i64
ret i64 %_0
}
declare range(i8 -1, 2) i8 @llvm.scmp.i8.i64(i64, i64)
```
Commit: 63c64fa6cd451557c7554593c1908e34e668aa89
https://github.com/llvm/llvm-project/commit/63c64fa6cd451557c7554593c1908e34e668aa89
Author: Jeff Bailey <jbailey at raspberryginger.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M libc/hdr/stdint_proxy.h
Log Message:
-----------
[libc] Add LIBC_FULL_BUILD guard to stdint_proxy.h (#191234)
In full-build mode with -nostdinc, the system <stdint.h> is unavailable.
Use the internal stdint-macros.h header instead, falling back to the
system header in overlay mode.
Commit: 544e6c692aa79cc8d53a8a9db4d41fe4d9cb359b
https://github.com/llvm/llvm-project/commit/544e6c692aa79cc8d53a8a9db4d41fe4d9cb359b
Author: Jeff Bailey <jbailey at raspberryginger.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M libc/src/pthread/pthread_attr_getschedparam.cpp
M libc/src/pthread/pthread_attr_setschedparam.cpp
Log Message:
-----------
[libc] Add missing errno_macros.h include to pthread schedparam (#191235)
Both pthread_attr_getschedparam and pthread_attr_setschedparam use
ENOTSUP but relied on getting it transitively through <pthread.h>. Added
the explicit include so these files compile in standalone builds with
-nostdinc.
Commit: 0ec2f03c86f1275a4c733079f5cb20b10f51805e
https://github.com/llvm/llvm-project/commit/0ec2f03c86f1275a4c733079f5cb20b10f51805e
Author: Keith Smiley <keithbsmiley at gmail.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[bazel] Fix parse_headers in mlir package (#191094)
Commit: 202e607b6c8389583c748f1c99894d611b0bf369
https://github.com/llvm/llvm-project/commit/202e607b6c8389583c748f1c99894d611b0bf369
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M llvm/docs/DeveloperPolicy.rst
Log Message:
-----------
[DeveloperPolicy] Update information on commit authorship (#191220)
The sections on commit authorship have not been updated since the
transition to Github for PRs. This patch attempts to update them.
This is aimed at addressing questions recently raised in
https://discourse.llvm.org/t/attributing-a-commit-to-a-different-author/90490.
I guess this is technically a policy change, but does not change
anything *de facto* as far as I can tell.
---------
Co-authored-by: Petr Hosek <phosek at google.com>
Commit: 973a05ed91db4e74aa486749b3eacd459acb2e1e
https://github.com/llvm/llvm-project/commit/973a05ed91db4e74aa486749b3eacd459acb2e1e
Author: Philip Reames <preames at rivosinc.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVCodeGenPrepare.cpp
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-reduction-int-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-reduction-int.ll
Log Message:
-----------
[RISCV] Improve lowering of llvm.vector.reduce.mul (#190628)
RVV doesn't have a vredprod instruction, so we're forced to emulate
these.
The current ExpandReductions lowering which gets used trips an
unfortunate
behavior with exact VLEN - we end up with a bunch of vsetvli toggles
caused
by an interaction with lowerShuffleViaVRegSplitting. We end up doing all
the sub-m1 shuffles at m1, but don't recognize that we could do the
multiplies in m1 as well. As a result, we end up toggling back and forth
between LMULs.
This change is somewhat of a blunt hammer; it adjusts the lowering to
do the greater than m1 lowering via the current strategy, then do
a vector.extract, then do the same shuffler reduction lowering on
the smaller type. This has the effect of fixing the exact VLEN case,
and improves register pressure for all cases. The cost is that we end
up with an exact vsetvli to toggle to the m1 type before the sub-m1
portion of the reduction.
This helps all configurations, but particularly helps machines
with large VLENs as there are more reduction steps which can be
performed at m1.
An alternative design would be to try and reduce the LMUL of the
multiply steps, but we've generally shied away from that to date, so
this is side stepping that issue.
---------
Co-authored-by: Luke Lau <luke_lau at icloud.com>
Commit: 7d1ebd6baa1c2a9588ad5b07cebf1f6e8238e330
https://github.com/llvm/llvm-project/commit/7d1ebd6baa1c2a9588ad5b07cebf1f6e8238e330
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
M clang/lib/CIR/Dialect/Transforms/CIRCanonicalize.cpp
A clang/test/CIR/Transforms/canonicalize-cleanup-scope.cir
Log Message:
-----------
[CIR] Add canonicalizer for CleanupScopeOp (#191084)
This change adds a canonicalizer for CleanupScopeOp that erases any
cleanup scope with a trivial cleanup region, inlining the contents of
the body region into the block in place of the cleanup scope op. It also
erases any EH-only cleanup scope whose body region contains only a yield
operation, dropping the cleanup region contents even if they were not
trivial because the EH cleanup is not reachable in this case.
Assisted-by: Cursor / claude-4.6-opus-high
Commit: 6e2fdc37e4334344b6e22eb272279d95255d27c1
https://github.com/llvm/llvm-project/commit/6e2fdc37e4334344b6e22eb272279d95255d27c1
Author: Jack <jack.slingsby at imgtec.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M mlir/lib/Target/SPIRV/Deserialization/Deserializer.cpp
Log Message:
-----------
[mlir][spirv] Allow redefinition in OpName instructions (#191223)
The SPIR-V specification allows multiple conflicting OpName instructions
to redefine the name associated with a given `<id>`. Update the
deserializer to handle this case by using the last declared name.
Commit: 3af682ec02cc292606b74e9ccea188b11a84dfba
https://github.com/llvm/llvm-project/commit/3af682ec02cc292606b74e9ccea188b11a84dfba
Author: Kavin Gnanapandithan <kavin.balag at gmail.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M llvm/include/llvm/Transforms/InstCombine/InstCombiner.h
M llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp
M llvm/test/Transforms/InstCombine/fptrunc.ll
Log Message:
-----------
[InstCombine] Restore narrowing of double to float for integer casts (#190550)
Resolves #190503
This patch modifies `visitFPTrunc` to simplify the following expression:
```llvm
fptrunc(OpI (sitofp/uitofp x), (sitofp/uitofp y))
```
to
```llvm
OpI (sitofp/uitofp x), (sitofp/uitofp y)
```
`getMinimumFPType` now calls `canBeCastedExactlyIntToFP` on `x` and `y`.
This allows a double to be narrowed to a float if the source operands originate from sitofp/uitofp and can be represented exactly in the target float type.
This fixes a regression pointed out in the issue, where `visitFPExt` began folding `fpext(sitofp)` into `uitofp nneg i64 %x to double`, causing `visitFPTrunc` to lose the `fpext` it relied on to recognize the narrowing opportunity. On certain target, this would cause more expensive operations (i.e, division with f64 instead of f32).
Commit: afc0679414c32f457c271893603765d46beb63ef
https://github.com/llvm/llvm-project/commit/afc0679414c32f457c271893603765d46beb63ef
Author: Zhijie Wang <yesterda9 at gmail.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M clang/include/clang/Analysis/Analyses/LifetimeSafety/Facts.h
M clang/include/clang/Analysis/Analyses/LifetimeSafety/Origins.h
M clang/lib/Analysis/LifetimeSafety/FactsGenerator.cpp
M clang/lib/Analysis/LifetimeSafety/Origins.cpp
M clang/test/Sema/warn-lifetime-safety-invalidations.cpp
M clang/test/Sema/warn-lifetime-safety.cpp
Log Message:
-----------
[LifetimeSafety] Detect use of a reference type as a use of underlying origin (#184295)
Writing through a reference (e.g., `ref = 10`) does not rebind the
reference, so it should not kill the liveness of its underlying origin.
Fixes #180187
Commit: 29f6c3b888970aeb336737011813fcafdd24fde8
https://github.com/llvm/llvm-project/commit/29f6c3b888970aeb336737011813fcafdd24fde8
Author: Dmitry Vasilyev <dvassiliev at accesssoftek.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M lldb/test/API/functionalities/scripted_frame_provider/thread_filter/TestFrameProviderThreadFilter.py
Log Message:
-----------
[lldb] Disable flaky TestFrameProviderThreadFilter on Windows (#191224)
See #191222 for details.
Commit: d39f23a062af923dc3066a0a067b346c4acf6117
https://github.com/llvm/llvm-project/commit/d39f23a062af923dc3066a0a067b346c4acf6117
Author: Alexander Yermolovich <ayermolovich at nvidia.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M llvm/include/llvm/CodeGen/AsmPrinter.h
M llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp
M llvm/lib/Target/NVPTX/NVPTXAsmPrinter.h
M llvm/lib/Target/NVPTX/NVPTXDwarfDebug.cpp
M llvm/lib/Target/NVPTX/NVPTXDwarfDebug.h
A llvm/test/CodeGen/NVPTX/inline-asm-line-info-inlined-at.ll
A llvm/test/CodeGen/NVPTX/inline-asm-line-info-per-instruction.ll
A llvm/test/CodeGen/NVPTX/inline-asm-line-number-before.ll
Log Message:
-----------
[PTX][Debug] Add .loc directives to inlined PTX. (#177718)
This PR adds .loc directives to the inlined PTX as it gets emitted into
PTX file.
This allows PTXAS to create .debug_line with with entries for those
instructions, and helps profiler attribute perf counters to source code.
Commit: ff37b607175f8d827088a847c8b564bf606b4c28
https://github.com/llvm/llvm-project/commit/ff37b607175f8d827088a847c8b564bf606b4c28
Author: Bastian Hagedorn <bhagedorn at nvidia.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
M mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp
M mlir/test/python/dialects/nvvm.py
Log Message:
-----------
[mlir][NVVM] Add InferTypeOpInterface to sync and ldmatrix ops (#188238)
Add InferTypeOpAdaptor to 5 NVVM ops with deterministic result types:
- VoteSyncOp: ballot -> i32, any/all/uni -> i1
- MatchSyncOp: any -> i32, all -> struct<(i32, i1)>
- ShflOp: result matches val type, or struct<(val_type, i1)> with
return_value_and_is_valid
- LdMatrixOp: i32 or struct of i32s based on num and shape
- ClusterLaunchControlQueryCancelOp: is_canceled -> i1, others -> i32
Note: this is a source-breaking change for Python callers that pass
result types positionally.
Co-authored-by: Claude <noreply at anthropic.com>
Commit: ea8f2aeac3e7cf0c29749c4747760a3c73d3c2f8
https://github.com/llvm/llvm-project/commit/ea8f2aeac3e7cf0c29749c4747760a3c73d3c2f8
Author: Valeriy Savchenko <vsavchenko at apple.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp
M llvm/lib/Transforms/InstCombine/InstCombineInternal.h
M llvm/test/Transforms/InstCombine/fpcast.ll
Log Message:
-----------
[InstCombine] Fold saturating fptoi roundtrip (#190952)
Generalize existing fold to saturating intrinsics.
Commit: 8e804dca50049a4ed192a733e8f95e05d5ddcfdf
https://github.com/llvm/llvm-project/commit/8e804dca50049a4ed192a733e8f95e05d5ddcfdf
Author: Erick Velez <erickvelez7 at gmail.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M clang-tools-extra/clang-doc/JSONGenerator.cpp
Log Message:
-----------
[clang-doc][NFC] Delete redundant lines in JSONGenerator (#191011)
During the merging for the Mustache MD backend, I forgot to delete the
earlier, obsolete serialization for namespaces. It's being overwritten
by the correct call later. Also deletes a duplicate typedef.
Commit: 1542114a1aea30b6fd7167ddd51f54c99882b309
https://github.com/llvm/llvm-project/commit/1542114a1aea30b6fd7167ddd51f54c99882b309
Author: Alexis Engelke <engelke at in.tum.de>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M llvm/include/llvm/ADT/SmallVector.h
M llvm/include/llvm/IR/Metadata.h
M llvm/include/llvm/SandboxIR/User.h
M llvm/unittests/ADT/SmallVectorTest.cpp
Log Message:
-----------
[ADT] Fix SmallVector append with input iterators (#191030)
append()/assign()/insert() iterate over the iterator twice -- once to
get the length and once to actually append the content. This is only
permitted with forward iterators, not input iterators.
For append()/assign(), implement a version that uses emplace_back() in
a loop. insert() at the end is append(); for insert() in the middle,
append() elements first and then rotate them into their correct
position.
Originally introduced in https://reviews.llvm.org/D33919.
Commit: 1353f7cd548d3534c1e1fd4265bc030209bb4dd2
https://github.com/llvm/llvm-project/commit/1353f7cd548d3534c1e1fd4265bc030209bb4dd2
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M llvm/lib/Transforms/Utils/InlineFunction.cpp
A llvm/test/Transforms/Inline/inline-history-invoke.ll
Log Message:
-----------
[Inliner] Fix dangling pointer in OriginallyIndirectCalls. (#191242)
changeToInvokeAndSplitBasicBlock replaces an exising call instruction
with an invoke instruction. This leaves a dangling pointer in
OriginallyIndirectCalls. This means we miss !inline_history metadata on
the invokes replacing the direct calls.
It also cause non-determinism, where the inliner adds !inline_history
entries to unrelated call instructions, if we happen to re-allocate a
new call at the same address as a dangling pointer in the set.
PR: https://github.com/llvm/llvm-project/pull/191242
Commit: 4fb9443d63494f8388c801d5decaadd7f0779ad8
https://github.com/llvm/llvm-project/commit/4fb9443d63494f8388c801d5decaadd7f0779ad8
Author: Delaram Talaashrafi <dtalaashrafi at nvidia.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M flang/lib/Semantics/check-acc-structure.cpp
M flang/lib/Semantics/check-acc-structure.h
A flang/test/Semantics/OpenACC/acc-loop-routine-call.f90
Log Message:
-----------
[flang][OpenACC] Diagnose illegal routine calls in parallel loops (#190068)
Add routine call checking to `AccStructureChecker` to reject OpenACC
routine calls whose parallel level is incompatible with the enclosing
loop directive (e.g., calling a worker‑level routine from a
vector‑parallel loop), as required by the OpenACC specification.
Commit: 1465fdc0a9a1ff30e8f5b3dbbd22bd3aed7b236f
https://github.com/llvm/llvm-project/commit/1465fdc0a9a1ff30e8f5b3dbbd22bd3aed7b236f
Author: Aviral Goel <aviralg at users.noreply.github.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M clang/include/clang/ScalableStaticAnalysisFramework/Tool/Utils.h
M clang/lib/ScalableStaticAnalysisFramework/Tool/Utils.cpp
M clang/test/Analysis/Scalable/ssaf-linker/help.test
M clang/test/Analysis/Scalable/ssaf-linker/io.test
M clang/test/Analysis/Scalable/ssaf-linker/validation-errors-permissions.test
M clang/test/Analysis/Scalable/ssaf-linker/validation-errors.test
M clang/tools/clang-ssaf-format/SSAFFormat.cpp
M clang/tools/clang-ssaf-linker/SSAFLinker.cpp
Log Message:
-----------
[clang][ssaf] Refactor path validation into shared `FormatFile` utilities (#188847)
This patch introduces the following changes:
- Renames `SummaryFile` to `FormatFile` to better reflect that the
struct pairs a file path with its resolved `SerializationFormat`.
- Consolidates duplicated input/output path validation logic from
`SSAFLinker.cpp` and `SSAFFormat.cpp` into shared
`FormatFile::fromInputPath()` and `FormatFile::fromOutputPath()` methods
in `Tool/Utils.{h,cpp}`
- Moves error message constants from the public header into the `.cpp`
file and rewords them.
- Removes per-tool local error messages and filesystem logic that are
now handled centrally.
- Updates all affected lit tests to match the new error message wording
and adds a test for directory-as-input.
Commit: 05696d6cb7eb8bc6778685e25bd8d74b020ffcc7
https://github.com/llvm/llvm-project/commit/05696d6cb7eb8bc6778685e25bd8d74b020ffcc7
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M flang-rt/lib/cuda/allocator.cpp
Log Message:
-----------
[flang][cuda] Add error check for allocator using CUDA API (#191262)
Commit: 806433f128aa83cb9112741b52ec37cbf796e7ba
https://github.com/llvm/llvm-project/commit/806433f128aa83cb9112741b52ec37cbf796e7ba
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M flang-rt/include/flang-rt/runtime/environment.h
M flang-rt/lib/cuda/kernel.cpp
M flang-rt/lib/runtime/environment.cpp
Log Message:
-----------
[flang][cuda] Add conditional error check after kernel launch (#191270)
Commit: 0340cd765df44b5d899efb0b28c2ea8fdff321bd
https://github.com/llvm/llvm-project/commit/0340cd765df44b5d899efb0b28c2ea8fdff321bd
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
A llvm/test/Transforms/LoopVectorize/nested-outer-loop-vect.ll
Log Message:
-----------
[LV] Add test with outer loop test nested inside another loop (NFC). (#191267)
Add missing test coverage for the VPlan-native path, where we have a
loop nest nested inside another loop. This guards against regressions in
the future.
Commit: 012f8200734a6d7651682c0aa41bbdf3bad9e951
https://github.com/llvm/llvm-project/commit/012f8200734a6d7651682c0aa41bbdf3bad9e951
Author: Jeff Bailey <jbailey at raspberryginger.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M libc/hdr/stdint_proxy.h
Log Message:
-----------
Revert "[libc] Add LIBC_FULL_BUILD guard to stdint_proxy.h (#191234)" (#191273)
This reverts commit 63c64fa6cd451557c7554593c1908e34e668aa89.
Commit: b742ec91c0876fc5f9fb85aceecb67c22021b69d
https://github.com/llvm/llvm-project/commit/b742ec91c0876fc5f9fb85aceecb67c22021b69d
Author: Christopher Ferris <cferris1000 at users.noreply.github.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M compiler-rt/lib/scudo/standalone/wrappers_c.cpp
M compiler-rt/lib/scudo/standalone/wrappers_c.h
R compiler-rt/lib/scudo/standalone/wrappers_c.inc
R compiler-rt/lib/scudo/standalone/wrappers_c_bionic.cpp
M compiler-rt/lib/scudo/standalone/wrappers_cpp.cpp
Log Message:
-----------
[scudo] Refactor the wrapper code into a single file. (#190857)
Allow using a define to create a prefix rather than trying to use
android/bionic checks.
Commit: 8cd0fb68a17e52bc2f31a835502863810c2ff7c0
https://github.com/llvm/llvm-project/commit/8cd0fb68a17e52bc2f31a835502863810c2ff7c0
Author: Keith Smiley <keithbsmiley at gmail.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M utils/bazel/MODULE.bazel
M utils/bazel/MODULE.bazel.lock
M utils/bazel/extensions.bzl
R utils/bazel/third_party_build/pybind.BUILD
Log Message:
-----------
[bazel] Remove pybind dep (#191269)
This is entirely gone from llvm code
Commit: df45fbb04445bfb19939df7c037412efc9dc8efe
https://github.com/llvm/llvm-project/commit/df45fbb04445bfb19939df7c037412efc9dc8efe
Author: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
M llvm/test/CodeGen/AMDGPU/bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.cos.bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.sin.bf16.ll
M llvm/test/CodeGen/AMDGPU/mad-mix-hi-bf16.ll
M llvm/test/CodeGen/AMDGPU/mad-mix-lo-bf16.ll
Log Message:
-----------
[AMDGPU] Fix V_FMA_MIX_BF16 selection in true16 (#191272)
Commit: a0f0d6342e0cd75b7f41e0e6aae0944393b68a62
https://github.com/llvm/llvm-project/commit/a0f0d6342e0cd75b7f41e0e6aae0944393b68a62
Author: Slava Zakharin <szakharin at nvidia.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
A flang/test/Transforms/licm-nested-hoist-aggressive.fir
A flang/test/Transforms/licm-nested-hoist-disabled.fir
Log Message:
-----------
[flang] Added more tests for Flang LICM. (#191083)
Commit: f3d93f56e0492ea9dbd1e0f1591796b48a99b9e1
https://github.com/llvm/llvm-project/commit/f3d93f56e0492ea9dbd1e0f1591796b48a99b9e1
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
Log Message:
-----------
[LV] Don't access loop after executePlan in native path (NFC). (#191277)
Bring native path in line with inner loop path: the loop may become
invalid once we are able to remove the scalar loop in the native path as
well. Match inner loop behavior by reporting vectorization before
executePlan, and using F instead of L->getHeader()->getParent().
Commit: cfda886fffafa73e6e9130eb6d42d599b1606110
https://github.com/llvm/llvm-project/commit/cfda886fffafa73e6e9130eb6d42d599b1606110
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M llvm/lib/Target/X86/X86MCInstLower.cpp
M llvm/test/CodeGen/X86/srem-seteq-vec-nonsplat.ll
M llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/x86-non-temporal.ll.filter-out.expected
M llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/x86-non-temporal.ll.multifilter.expected
M llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/x86-non-temporal.ll.nofilter.expected
Log Message:
-----------
[X86] Add constant pool comments for PADDB/W/D/Q. (#191279)
Split from #190274
Commit: 2379e91c2d6af1fd892c0aece9bb8b1279ada8ff
https://github.com/llvm/llvm-project/commit/2379e91c2d6af1fd892c0aece9bb8b1279ada8ff
Author: Kartik Ohlan <kartik7ohlan at gmail.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M clang/docs/LanguageExtensions.rst
M clang/docs/ReleaseNotes.rst
M clang/lib/CodeGen/CGExpr.cpp
A clang/test/CodeGen/ext-vector-bool-read.cpp
Log Message:
-----------
[Clang] Fix assertion failure when storing to ext_vector_type bool elements (#189305)
#189260
Fix assertion failure in boolean vector indexing by truncating to i1.
Commit: 63b4f032e2af53bb7723b291bc922d72b99c7747
https://github.com/llvm/llvm-project/commit/63b4f032e2af53bb7723b291bc922d72b99c7747
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
A libcxx/test/libcxx/containers/associative/lookup_with_transparently_comparable.pass.cpp
Log Message:
-----------
[libc++] Add positive test coverage for the string optimization on associative containers (#187345)
Unfortunately, this test needs to be somewhat tied to the fact that we
implement the optimization for std::string, but in practice it would
have caught the issue that the optimization was previously disabled, so
it does provide value.
Towards #187105
Commit: 2717cc2234c898556cb38809cc599ea2108b163a
https://github.com/llvm/llvm-project/commit/2717cc2234c898556cb38809cc599ea2108b163a
Author: Karthik Senthil <ksenthilkuma at nvidia.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp
M llvm/lib/Target/NVPTX/NVPTXAsmPrinter.h
A llvm/test/CodeGen/NVPTX/sub-byte-constant-vector-convert.ll
A llvm/test/CodeGen/NVPTX/sub-byte-constant-vectors-i4-i2.ll
Log Message:
-----------
[NVPTX] Merge consecutive elements while buffering constant vectors with sub-byte datatype. (#183628)
NVPTXAsmPrinter currently buffers one element at a time while generating
PTX for constant global vectors. This causes an assertion when dealing
with sub-byte datatype (like i4) since we allocate lesser buffer size.
This PR fixes the printer to merge consecutive elements to form a full
byte before buffering.
Commit: 31060029a626a8fa5b1363b72f61c04f31a1c7a9
https://github.com/llvm/llvm-project/commit/31060029a626a8fa5b1363b72f61c04f31a1c7a9
Author: Derek Schuff <dschuff at chromium.org>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M llvm/include/llvm/DebugInfo/Symbolize/SymbolizableObjectFile.h
M llvm/lib/DebugInfo/Symbolize/SymbolizableObjectFile.cpp
A llvm/test/tools/llvm-objdump/lit.local.cfg
A llvm/test/tools/llvm-objdump/wasm/line-numbers.s
A llvm/test/tools/llvm-symbolizer/lit.local.cfg
M llvm/test/tools/llvm-symbolizer/wasm-basic.s
Log Message:
-----------
SymbolizableOjbectFile: Convert Wasm file offset to section offset for DWARF (#191068)
Wasm's object and linking format lacks virtual addresses like ELF et al.
As a result, linked files generally use file offsets as "addresses",
whereas
objects and DWARF sections use code section offsets.
This has led to incorrect interpretation of addresses in llvm-objdump
and llvm-symbolizer for linked files.
This change to SerializableObjectFile checks the input ModuleOffset, and
if it falls within a wasm code section, adjusts it to a section offset
before querying the DwarfContext. (For object files, Sec.getAddress() is
0 so it works for object files too). It extends the existing DWARF test
for llvm-symbolizer to include a linked file, and also adds an
equivalent for objdump.
Fixes #129523
Commit: 7a186da65b3754509bff2d7bafcc28a095279320
https://github.com/llvm/llvm-project/commit/7a186da65b3754509bff2d7bafcc28a095279320
Author: zGoldthorpe <Zach.Goldthorpe at amd.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M llvm/include/llvm/CodeGen/SelectionDAG.h
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/fminimum-fmaximum.ll
M llvm/test/CodeGen/X86/nofpclass.ll
Log Message:
-----------
[SelectionDAG] Replace `isKnownNeverZeroFloat` with `isKnownNeverLogicalZero` using `KnownFPClass` (#190621)
In so doing, this also corrects miscompiles caused by
`isKnownNeverZeroFloat` mishandling denormals in DAZ floats.
Commit: 691a130e0f14459d9358a71ffd52a01295e6200a
https://github.com/llvm/llvm-project/commit/691a130e0f14459d9358a71ffd52a01295e6200a
Author: Alexis Engelke <engelke at in.tum.de>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M clang/include/clang/Analysis/Analyses/PostOrderCFGView.h
M clang/lib/Analysis/PostOrderCFGView.cpp
M llvm/include/llvm/ADT/PostOrderIterator.h
M llvm/include/llvm/Analysis/LoopIterator.h
M llvm/lib/Analysis/LoopInfo.cpp
M llvm/lib/CodeGen/MachineTraceMetrics.cpp
M llvm/lib/Target/SPIRV/SPIRVUtils.h
M llvm/lib/Transforms/Vectorize/VPlanCFG.h
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanUtils.h
M llvm/unittests/ADT/PostOrderIteratorTest.cpp
M llvm/unittests/Transforms/Vectorize/VPlanTest.cpp
M mlir/include/mlir/IR/Iterators.h
Log Message:
-----------
[ADT] Refactor post order traversal (#191047)
Currently, po_iterator holds the traversal state. This makes copying
and moving po_iterator fairly expensive and the code cannot be optimized
away in several cases (most of it isn't even inlined in a default
build).
Therefore, refactor post-order traversal to hold the state in a wrapper
class with cheap iterators. Additionally, replace po_storage base class
with a CRTP implementation where users can provide their own storage.
Benefits:
- Performance in stage2-O3 improves by 0.19% instructions:u and even
more substantially in cycles/wall-time.
- Users that use a custom storage/iteration limitation can do so in a
more clean way by subclassing PostIteratorTraversalBase. See e.g.
LoopBlocksTraversal.
- For graphs with block numbers, reserving can now be implemented
reasonably easy (not done yet).
Implications:
- PostOrderTraversal::iterator is no longer a forward iterator. This
property was never really used, though.
- PostOrderTraversal must be live while iterators are live. For typical
uses (for (X x : post_order(...))), this is no problem, but could end
up being problematic if the iterator is wrapped (e.g.
for (X x : make_filter_range(post_order(...), ...)) -- problematic,
because make_filter_range doesn't preserve the range but only the two
iterators, which become invalid as the for loop is entered). This is a
limitation of the way LLVM implements ranges.
Commit: e8e8552692eaf16c445f02388412b7f088d72f11
https://github.com/llvm/llvm-project/commit/e8e8552692eaf16c445f02388412b7f088d72f11
Author: Alexis Engelke <engelke at in.tum.de>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M llvm/include/llvm/Analysis/BlockFrequencyInfoImpl.h
M llvm/include/llvm/Analysis/BranchProbabilityInfo.h
M llvm/include/llvm/CodeGen/MachineBranchProbabilityInfo.h
M llvm/lib/Analysis/BranchProbabilityInfo.cpp
M llvm/lib/CodeGen/MIRSampleProfile.cpp
M llvm/lib/CodeGen/MachineBranchProbabilityInfo.cpp
Log Message:
-----------
[Analysis][NFC] Remove BPI::getEdgeProbability(iterator) (#191286)
Now that successor iterators are Use iterators, it is no longer cheap to
get the successor index. Replace uses with the variant that takes the
successor index, which in all cases is easily available.
This is primarily cleanup after the somewhat recent successor changes.
There's also a minor (barely measurable) performance improvement here.
Commit: 4a5e9fa731bf664b26fe975df073e9b456d30d49
https://github.com/llvm/llvm-project/commit/4a5e9fa731bf664b26fe975df073e9b456d30d49
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/test/CodeGen/RISCV/rv32p.ll
M llvm/test/CodeGen/RISCV/rv64p.ll
Log Message:
-----------
[RISCV][P-ext] Recognize (select (X >u ((1 << C) - 1), sext(X >s -1), trunc(X)) as usati (#190810)
Where the result is a type with C bits. The unsigned compare on the
select treats negative values as large positive values so any value
that isn't in the range [0, (1 << C) - 1] will use the True operand
of the select. The sext(X >s -1) creates all ones for positive values
of X and 0 for negative values of X.
This pattern appears in the picojpeg workload of embench-iot with
an i8 result type.
Assisted-by: Claude Sonnet 4.5
Commit: e38801b1318a1adeb6cc5a185c519af9bc215f86
https://github.com/llvm/llvm-project/commit/e38801b1318a1adeb6cc5a185c519af9bc215f86
Author: Naveen Seth Hanig <naveen.hanig at outlook.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M clang/lib/Driver/ModulesDriver.cpp
A clang/test/Driver/modules-driver-clang-modules-only.cpp
M clang/test/Driver/modules-driver-manifest-input-args.cpp
Log Message:
-----------
Reapply "[clang][ModulesDriver] Add support for Clang modules to -fmodules-driver" (#191258)
This relands #187606 (reverted with #191122).
In the initial PR, the Clang module precompile jobs were created as
`CC1Command` objects instead of regular `Command` objects, which
introduced a memory leak.
(See discussion in https://reviews.llvm.org/D74447)
This has been fixed in this reland.
Commit: 92d3a1d3e4aaaf3df6d5f3d6613a8146aab7d7d6
https://github.com/llvm/llvm-project/commit/92d3a1d3e4aaaf3df6d5f3d6613a8146aab7d7d6
Author: Ryan Buchner <rbuchner at qti.qualcomm.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
A llvm/test/Transforms/SLPVectorizer/RISCV/revec-strided-load.ll
Log Message:
-----------
[NFC][SLP] Add tests for revectorization of strided loads (#191293)
Demonstrates bug in SLP when handling re-vectorization, see #191292
Commit: 67ff7695616f8411abc538c634e14a0aa7141dc3
https://github.com/llvm/llvm-project/commit/67ff7695616f8411abc538c634e14a0aa7141dc3
Author: Michael Spencer <bigcheesegs at gmail.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M clang/include/clang/Basic/DiagnosticLexKinds.td
M clang/include/clang/Lex/HeaderSearch.h
M clang/lib/Lex/HeaderSearch.cpp
M clang/lib/Lex/ModuleMap.cpp
A clang/test/Modules/symlink-to-modular-header.c
Log Message:
-----------
[clang][modules] Add warning for symlinks to modular headers (#188059)
Symlinks that are not covered by a module that point to a header owned
by a module create situations where if a header is owned by a module
depends on which headers were included prior.
This adds a diagnostic for such cases when they can be detected, and
informs the user to use a textual forwarding header instead.
This bypasses Clang's FileManager and VFS as they don't know about
symlinks. The diagnostic is worded as "may" because of this.
Commit: 5f27de8c4d895f2128f7ca5ce788d997fd3ea99c
https://github.com/llvm/llvm-project/commit/5f27de8c4d895f2128f7ca5ce788d997fd3ea99c
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenDecl.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.cpp
M clang/lib/CIR/Dialect/Transforms/LoweringPrepare.cpp
M clang/test/CIR/CodeGen/partial-array-cleanup.cpp
Log Message:
-----------
[CIR] Implement variable size array cleanup (#191247)
This implements partial array destruction for variable sized arrays. The
cir.array.dtor operation already had support for variable length, so
this change only needs to add the variable handling in
`emitArrayDestroy` and `emitArrayLength`.
Assisted-by: Cursor / claude-4.6-opus-high
Commit: fda567137ec611fdcce24729118b4f56bec6bb13
https://github.com/llvm/llvm-project/commit/fda567137ec611fdcce24729118b4f56bec6bb13
Author: Artem Belevich <tra at google.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M llvm/docs/CompileCudaWithLLVM.rst
Log Message:
-----------
[Docs, CUDA] Update cuda compilation docs (#191271)
Commit: e30031890127985c6b2d25705b9467d1812f7f87
https://github.com/llvm/llvm-project/commit/e30031890127985c6b2d25705b9467d1812f7f87
Author: Lang Hames <lhames at gmail.com>
Date: 2026-04-10 (Fri, 10 Apr 2026)
Changed paths:
M orc-rt/include/orc-rt/Session.h
M orc-rt/unittests/SessionTest.cpp
Log Message:
-----------
[orc-rt] Add Session::attach convenience overload. (#191199)
This overload enables one-line attach in the common case where the
ControllerAccess implementation does not require any configuration after
construction.
Commit: 10353899af5d07aeca022e6b02ed700e85461f5e
https://github.com/llvm/llvm-project/commit/10353899af5d07aeca022e6b02ed700e85461f5e
Author: Amir Ayupov <aaupov at fb.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M bolt/lib/Profile/CMakeLists.txt
M bolt/lib/Profile/DataAggregator.cpp
A bolt/test/X86/pre-aggregated-perf-shlib.test
Log Message:
-----------
[BOLT] Use identify_magic for shared library detection (#190902)
Replace the fragile filename-based check (ends_with(".so")) with
identify_magic()/file_magic::elf_shared_object to reliably detect
shared libraries when filtering pre-aggregated profile data by
build ID.
Test Plan: pre-aggregated-perf-shlib.test
Commit: 80ae4e503d60e9f15383603214de5c7cb8b9b0ea
https://github.com/llvm/llvm-project/commit/80ae4e503d60e9f15383603214de5c7cb8b9b0ea
Author: Amir Ayupov <aaupov at fb.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M llvm/tools/llvm-profgen/ProfiledBinary.cpp
M llvm/tools/llvm-profgen/ProfiledBinary.h
Log Message:
-----------
[llvm-profgen] Read build ID from binary for perfscript address filtering (#190862)
For shared libraries (.so), read the binary's build ID during load()
using object::getBuildID() and store it as FilterBuildID. Main
executables keep FilterBuildID empty, matching the convention that
their perfscript addresses have no buildid prefix.
This enables automatic build ID-based filtering of perfscript
addresses in [buildid:]0xaddr format without requiring a CLI option.
Commit: eb6075e3be0a40301f008b0b3640ed125b66929f
https://github.com/llvm/llvm-project/commit/eb6075e3be0a40301f008b0b3640ed125b66929f
Author: Pengxiang Huang <71998072+Pengxiang-Huang at users.noreply.github.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M libc/src/CMakeLists.txt
A libc/src/semaphore/CMakeLists.txt
A libc/src/semaphore/posix_semaphore.h
M libc/test/src/CMakeLists.txt
A libc/test/src/semaphore/CMakeLists.txt
A libc/test/src/semaphore/semaphore_test.cpp
Log Message:
-----------
[libc][semaphore] Add internal unnamed semaphore implementation (#190851)
Implements the first part for #190847
Add internal unnamed semaphore lifetime support, particularly:
`sem_init`:
https://pubs.opengroup.org/onlinepubs/9799919799/functions/sem_init.html#
`sem_destroy`:
https://pubs.opengroup.org/onlinepubs/9799919799/functions/sem_destroy.html#
`sem_getvalue`:
https://pubs.opengroup.org/onlinepubs/9799919799/functions/sem_getvalue.html#
Commit: 23cb39afd5cd5006b9b7d036ffc668fdf9aa0410
https://github.com/llvm/llvm-project/commit/23cb39afd5cd5006b9b7d036ffc668fdf9aa0410
Author: Keith Smiley <keithbsmiley at gmail.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/llvm/unittests/BUILD.bazel
Log Message:
-----------
[bazel] Remove unused deps from llvm/unittests (#191237)
I'm testing out dwyu, this is a first pass on removing some of the
things it has found
Commit: a4ccace9e00f6d08f5a00f17a12e1071fff6bd53
https://github.com/llvm/llvm-project/commit/a4ccace9e00f6d08f5a00f17a12e1071fff6bd53
Author: Ziqing Luo <ziqing_luo at apple.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
A clang/include/clang/ScalableStaticAnalysisFramework/Analyses/EntityPointerLevel/EntityPointerLevel.h
M clang/include/clang/ScalableStaticAnalysisFramework/Analyses/UnsafeBufferUsage/UnsafeBufferUsage.h
M clang/include/clang/ScalableStaticAnalysisFramework/Analyses/UnsafeBufferUsage/UnsafeBufferUsageExtractor.h
M clang/lib/ScalableStaticAnalysisFramework/Analyses/CMakeLists.txt
A clang/lib/ScalableStaticAnalysisFramework/Analyses/EntityPointerLevel/EntityPointerLevel.cpp
M clang/lib/ScalableStaticAnalysisFramework/Analyses/UnsafeBufferUsage/UnsafeBufferUsage.cpp
M clang/lib/ScalableStaticAnalysisFramework/Analyses/UnsafeBufferUsage/UnsafeBufferUsageExtractor.cpp
M clang/unittests/ScalableStaticAnalysisFramework/Analyses/UnsafeBufferUsage/UnsafeBufferUsageTest.cpp
Log Message:
-----------
[NFC][SSAF] Move EntityPointerLevel to a separate folder
EntityPointerLevel will later be shared with other summaries besides
UnsafeBufferUsage. This commit moves it to a separate file.
Commit: 3994ca430a89be4b890a340fcf4c8652fd04ce7e
https://github.com/llvm/llvm-project/commit/3994ca430a89be4b890a340fcf4c8652fd04ce7e
Author: Ziqing Luo <ziqing_luo at apple.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M clang/include/clang/ScalableStaticAnalysisFramework/Analyses/EntityPointerLevel/EntityPointerLevel.h
A clang/include/clang/ScalableStaticAnalysisFramework/Analyses/EntityPointerLevel/EntityPointerLevelFormat.h
M clang/include/clang/ScalableStaticAnalysisFramework/Analyses/UnsafeBufferUsage/UnsafeBufferUsage.h
M clang/lib/ScalableStaticAnalysisFramework/Analyses/EntityPointerLevel/EntityPointerLevel.cpp
M clang/lib/ScalableStaticAnalysisFramework/Analyses/UnsafeBufferUsage/UnsafeBufferUsage.cpp
M clang/lib/ScalableStaticAnalysisFramework/Analyses/UnsafeBufferUsage/UnsafeBufferUsageExtractor.cpp
M clang/test/Analysis/Scalable/UnsafeBufferUsage/tu-summary-serialization.test
Log Message:
-----------
[SSAF][UnsafeBufferUsage] Add APIs to the EntityPointerLevel module for UnsafeBufferUsage
- UnsafeBufferUsage serialization uses EntityPointerLevel's API to
serialize EntityPointerLevels.
- Add APIs to EntityPointerLevel for creating EPLs from Decls and
incrementing EPL's pointer level.
- Improve UnsafeBufferUsage serialization error messages with a test.
Commit: a08d8fda6be87b433cba47c11f273049dc24faa7
https://github.com/llvm/llvm-project/commit/a08d8fda6be87b433cba47c11f273049dc24faa7
Author: Ziqing Luo <ziqing_luo at apple.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M .github/new-prs-labeler.yml
M .github/workflows/libcxx-build-and-test.yaml
A .github/workflows/release-llvm-testing-tools.yml
M bolt/lib/Core/BinaryContext.cpp
M bolt/lib/Profile/CMakeLists.txt
M bolt/lib/Profile/DataAggregator.cpp
M bolt/lib/Rewrite/RewriteInstance.cpp
M bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp
M bolt/lib/Target/AArch64/CMakeLists.txt
A bolt/test/X86/pre-aggregated-perf-shlib.test
M bolt/unittests/Core/MCPlusBuilder.cpp
M clang-tools-extra/clang-doc/JSONGenerator.cpp
M clang-tools-extra/clang-tidy/ClangTidyCheck.h
M clang-tools-extra/clang-tidy/bugprone/DynamicStaticInitializersCheck.cpp
M clang-tools-extra/clang-tidy/bugprone/DynamicStaticInitializersCheck.h
M clang-tools-extra/clang-tidy/bugprone/SuspiciousIncludeCheck.cpp
M clang-tools-extra/clang-tidy/bugprone/SuspiciousIncludeCheck.h
M clang-tools-extra/clang-tidy/cppcoreguidelines/MissingStdForwardCheck.cpp
M clang-tools-extra/clang-tidy/google/GlobalNamesInHeadersCheck.cpp
M clang-tools-extra/clang-tidy/google/GlobalNamesInHeadersCheck.h
M clang-tools-extra/clang-tidy/llvm/CMakeLists.txt
M clang-tools-extra/clang-tidy/llvm/LLVMTidyModule.cpp
A clang-tools-extra/clang-tidy/llvm/RedundantCastingCheck.cpp
A clang-tools-extra/clang-tidy/llvm/RedundantCastingCheck.h
M clang-tools-extra/clang-tidy/llvmlibc/InlineFunctionDeclCheck.cpp
M clang-tools-extra/clang-tidy/llvmlibc/InlineFunctionDeclCheck.h
M clang-tools-extra/clang-tidy/misc/AnonymousNamespaceInHeaderCheck.cpp
M clang-tools-extra/clang-tidy/misc/AnonymousNamespaceInHeaderCheck.h
M clang-tools-extra/clang-tidy/misc/DefinitionsInHeadersCheck.cpp
M clang-tools-extra/clang-tidy/misc/DefinitionsInHeadersCheck.h
M clang-tools-extra/clang-tidy/misc/UnusedUsingDeclsCheck.cpp
M clang-tools-extra/clang-tidy/misc/UnusedUsingDeclsCheck.h
M clang-tools-extra/clang-tidy/misc/UseAnonymousNamespaceCheck.cpp
M clang-tools-extra/clang-tidy/misc/UseAnonymousNamespaceCheck.h
M clang-tools-extra/clang-tidy/misc/UseInternalLinkageCheck.cpp
M clang-tools-extra/clang-tidy/misc/UseInternalLinkageCheck.h
M clang-tools-extra/clang-tidy/modernize/UseStringViewCheck.cpp
M clang-tools-extra/clang-tidy/readability/NonConstParameterCheck.cpp
M clang-tools-extra/clang-tidy/utils/HeaderGuard.cpp
M clang-tools-extra/clang-tidy/utils/HeaderGuard.h
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/docs/clang-tidy/checks/list.rst
A clang-tools-extra/docs/clang-tidy/checks/llvm/redundant-casting.rst
M clang-tools-extra/docs/clang-tidy/checks/modernize/use-string-view.rst
M clang-tools-extra/test/clang-tidy/checkers/cppcoreguidelines/missing-std-forward.cpp
A clang-tools-extra/test/clang-tidy/checkers/llvm/redundant-casting.cpp
M clang-tools-extra/test/clang-tidy/checkers/modernize/use-string-view.cpp
M clang-tools-extra/test/clang-tidy/checkers/readability/non-const-parameter.cpp
M clang/docs/ClangIRABILowering.md
M clang/docs/InternalsManual.rst
M clang/docs/LanguageExtensions.rst
M clang/docs/LifetimeSafety.rst
M clang/docs/ReleaseNotes.rst
M clang/docs/analyzer/user-docs/Annotations.rst
M clang/include/clang/AST/ExprCXX.h
M clang/include/clang/ASTMatchers/ASTMatchers.h
M clang/include/clang/ASTMatchers/ASTMatchersInternal.h
M clang/include/clang/Analysis/Analyses/LifetimeSafety/Facts.h
M clang/include/clang/Analysis/Analyses/LifetimeSafety/Origins.h
M clang/include/clang/Analysis/Analyses/PostOrderCFGView.h
M clang/include/clang/Basic/AttrDocs.td
R clang/include/clang/Basic/BuiltinsSystemZ.def
A clang/include/clang/Basic/BuiltinsSystemZ.td
M clang/include/clang/Basic/CMakeLists.txt
M clang/include/clang/Basic/DiagnosticCommonKinds.td
M clang/include/clang/Basic/DiagnosticGroups.td
M clang/include/clang/Basic/DiagnosticLexKinds.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Basic/HLSLIntrinsics.td
M clang/include/clang/Basic/TargetBuiltins.h
M clang/include/clang/Basic/arm_sve.td
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/include/clang/CIR/Dialect/IR/CIRTypes.td
M clang/include/clang/Frontend/DependencyOutputOptions.h
M clang/include/clang/Frontend/Utils.h
M clang/include/clang/Lex/HeaderSearch.h
M clang/include/clang/Options/Options.td
M clang/include/clang/ScalableStaticAnalysisFramework/Analyses/EntityPointerLevel/EntityPointerLevel.h
M clang/include/clang/ScalableStaticAnalysisFramework/Core/Model/PrivateFieldNames.def
M clang/include/clang/ScalableStaticAnalysisFramework/Core/Serialization/JSONFormat.h
M clang/include/clang/ScalableStaticAnalysisFramework/Core/Serialization/SerializationFormat.h
M clang/include/clang/ScalableStaticAnalysisFramework/Core/TUSummary/ExtractorRegistry.h
M clang/include/clang/ScalableStaticAnalysisFramework/Core/WholeProgramAnalysis/DerivedAnalysis.h
M clang/include/clang/ScalableStaticAnalysisFramework/Core/WholeProgramAnalysis/WPASuite.h
M clang/include/clang/ScalableStaticAnalysisFramework/Tool/Utils.h
M clang/include/clang/Sema/Sema.h
M clang/include/clang/Sema/SemaHLSL.h
M clang/include/clang/Serialization/ASTReader.h
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/SValBuilder.h
M clang/include/module.modulemap
M clang/lib/AST/ItaniumMangle.cpp
M clang/lib/AST/StmtProfile.cpp
M clang/lib/Analysis/LifetimeSafety/FactsGenerator.cpp
M clang/lib/Analysis/LifetimeSafety/Origins.cpp
M clang/lib/Analysis/PostOrderCFGView.cpp
M clang/lib/Basic/Targets/SPIR.h
M clang/lib/Basic/Targets/SystemZ.cpp
M clang/lib/CIR/CodeGen/CIRGenBuilder.h
M clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp
M clang/lib/CIR/CodeGen/CIRGenCUDANV.cpp
M clang/lib/CIR/CodeGen/CIRGenClass.cpp
M clang/lib/CIR/CodeGen/CIRGenCleanup.cpp
M clang/lib/CIR/CodeGen/CIRGenDecl.cpp
M clang/lib/CIR/CodeGen/CIRGenExpr.cpp
M clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
M clang/lib/CIR/CodeGen/CIRGenTypes.cpp
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
M clang/lib/CIR/Dialect/IR/CIRTypes.cpp
M clang/lib/CIR/Dialect/Transforms/CIRCanonicalize.cpp
M clang/lib/CIR/Dialect/Transforms/LoweringPrepare.cpp
M clang/lib/CodeGen/CGCall.cpp
M clang/lib/CodeGen/CGExpr.cpp
M clang/lib/CodeGen/CodeGenFunction.cpp
M clang/lib/CodeGen/TargetBuiltins/ARM.cpp
M clang/lib/CodeGen/Targets/SPIR.cpp
M clang/lib/DependencyScanning/DependencyScannerImpl.cpp
M clang/lib/DependencyScanning/ModuleDepCollector.cpp
M clang/lib/Driver/Driver.cpp
M clang/lib/Driver/ModulesDriver.cpp
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/Driver/ToolChains/Hexagon.cpp
M clang/lib/Driver/ToolChains/MinGW.cpp
M clang/lib/Frontend/DependencyFile.cpp
M clang/lib/Frontend/Rewrite/FrontendActions.cpp
M clang/lib/Headers/__clang_cuda_intrinsics.h
M clang/lib/Headers/hlsl/hlsl_alias_intrinsics.h
M clang/lib/Headers/hlsl/hlsl_detail.h
M clang/lib/Headers/hlsl/hlsl_intrinsic_helpers.h
M clang/lib/Headers/hlsl/hlsl_intrinsics.h
M clang/lib/Lex/HeaderSearch.cpp
M clang/lib/Lex/ModuleMap.cpp
M clang/lib/Lex/PPDirectives.cpp
M clang/lib/ScalableStaticAnalysisFramework/Analyses/CMakeLists.txt
M clang/lib/ScalableStaticAnalysisFramework/Analyses/EntityPointerLevel/EntityPointerLevel.cpp
M clang/lib/ScalableStaticAnalysisFramework/CMakeLists.txt
M clang/lib/ScalableStaticAnalysisFramework/Core/CMakeLists.txt
M clang/lib/ScalableStaticAnalysisFramework/Core/Serialization/JSONFormat/JSONFormatImpl.cpp
M clang/lib/ScalableStaticAnalysisFramework/Core/Serialization/JSONFormat/JSONFormatImpl.h
A clang/lib/ScalableStaticAnalysisFramework/Core/Serialization/JSONFormat/WPASuite.cpp
M clang/lib/ScalableStaticAnalysisFramework/Core/TUSummary/ExtractorRegistry.cpp
M clang/lib/ScalableStaticAnalysisFramework/Frontend/TUSummaryExtractorFrontendAction.cpp
A clang/lib/ScalableStaticAnalysisFramework/Plugins/CMakeLists.txt
A clang/lib/ScalableStaticAnalysisFramework/Plugins/ExamplePlugin/AnalysisResults.h
A clang/lib/ScalableStaticAnalysisFramework/Plugins/ExamplePlugin/CMakeLists.txt
A clang/lib/ScalableStaticAnalysisFramework/Plugins/ExamplePlugin/PairsAnalysis.cpp
A clang/lib/ScalableStaticAnalysisFramework/Plugins/ExamplePlugin/TagsAnalysis.cpp
A clang/lib/ScalableStaticAnalysisFramework/Plugins/ExamplePlugin/TagsPairsAnalysis.cpp
M clang/lib/ScalableStaticAnalysisFramework/Tool/Utils.cpp
M clang/lib/Sema/SemaChecking.cpp
M clang/lib/Sema/SemaConcept.cpp
M clang/lib/Sema/SemaDecl.cpp
M clang/lib/Sema/SemaExprMember.cpp
M clang/lib/Sema/SemaHLSL.cpp
M clang/lib/Sema/SemaOpenMP.cpp
M clang/lib/Sema/SemaTemplate.cpp
M clang/lib/Sema/SemaTemplateInstantiate.cpp
M clang/lib/Sema/SemaTemplateInstantiateDecl.cpp
M clang/lib/Serialization/ASTReader.cpp
M clang/lib/Serialization/ModuleCache.cpp
M clang/lib/StaticAnalyzer/Checkers/CStringChecker.cpp
M clang/lib/Tooling/DependencyScanningTool.cpp
A clang/test/Analysis/Scalable/extraction-works-alongside-compilation.cpp
A clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/duplicate-analysis-name.json
A clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/missing-results.json
A clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/pairs-result-bad-count.json
A clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/pairs-result-bad-pair-counts.json
A clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/pairs-result-entry-not-object.json
A clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/pairs-result-missing-entity-id.json
A clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/result-entry-analysis-name-not-string.json
A clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/result-entry-deserializer-error.json
A clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/result-entry-missing-analysis-name.json
A clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/result-entry-missing-result-field.json
A clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/result-entry-no-format-info.json
A clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/result-entry-not-object.json
A clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/result-entry-result-not-object.json
A clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/results-not-array.json
A clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/rt-all-results.json
A clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/rt-empty.json
A clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/rt-multiple-results.json
A clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/tags-result-bad-element.json
A clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/tags-result-missing-tags.json
A clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/tagspairs-result-bad-field-type.json
A clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/tagspairs-result-missing-field.json
A clang/test/Analysis/Scalable/ssaf-format/WPASuite/with-plugin.test
A clang/test/Analysis/Scalable/ssaf-format/WPASuite/without-plugin.test
A clang/test/Analysis/Scalable/ssaf-format/lit.local.cfg
M clang/test/Analysis/Scalable/ssaf-linker/help.test
M clang/test/Analysis/Scalable/ssaf-linker/io.test
M clang/test/Analysis/Scalable/ssaf-linker/validation-errors-permissions.test
M clang/test/Analysis/Scalable/ssaf-linker/validation-errors.test
M clang/test/Analysis/atomics.c
M clang/test/Analysis/bstring.c
M clang/test/Analysis/bstring.cpp
M clang/test/CIR/CodeGen/array-ctor.cpp
M clang/test/CIR/CodeGen/array-dtor.cpp
A clang/test/CIR/CodeGen/bitint.c
M clang/test/CIR/CodeGen/global-array-dtor.cpp
M clang/test/CIR/CodeGen/global-init.cpp
A clang/test/CIR/CodeGen/long-double-inc-dec.cpp
M clang/test/CIR/CodeGen/new.cpp
A clang/test/CIR/CodeGen/non-scalar-lval-return.cpp
A clang/test/CIR/CodeGen/partial-array-cleanup.cpp
M clang/test/CIR/CodeGenBuiltins/builtins-overflow.cpp
M clang/test/CIR/CodeGenCUDA/kernel-call.cu
M clang/test/CIR/IR/array-ctor.cir
M clang/test/CIR/IR/array-dtor.cir
A clang/test/CIR/IR/bitint.cir
A clang/test/CIR/IR/invalid-array-structor.cir
A clang/test/CIR/Transforms/canonicalize-cleanup-scope.cir
M clang/test/CIR/global-var-simple.cpp
M clang/test/CMakeLists.txt
M clang/test/ClangScanDeps/generate-modules-path-args.c
A clang/test/ClangScanDeps/modules-byname-dup-module-decl-diag.c
A clang/test/ClangScanDeps/modules-mmap-redef.c
M clang/test/CodeGen/2004-02-13-Memset.c
M clang/test/CodeGen/AArch64/neon-intrinsics.c
M clang/test/CodeGen/AArch64/neon/fullfp16.c
M clang/test/CodeGen/AArch64/neon/intrinsics.c
M clang/test/CodeGen/AArch64/sme-intrinsics/acle_sme_ld1.c
M clang/test/CodeGen/AArch64/sme-intrinsics/acle_sme_ld1_vnum.c
M clang/test/CodeGen/AArch64/sme-intrinsics/acle_sme_ldr.c
M clang/test/CodeGen/AArch64/sme-intrinsics/acle_sme_st1.c
M clang/test/CodeGen/AArch64/sme-intrinsics/acle_sme_st1_vnum.c
M clang/test/CodeGen/AArch64/sme-intrinsics/acle_sme_str.c
M clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_ldr_str_zt.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ld1.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ld1ro.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ld1rq.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ld1sb.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ld1sh.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ld1sw.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ld1ub.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ld1uh.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ld1uw.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ld2.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ld3.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ld4.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ldff1.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ldff1sb.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ldff1sh.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ldff1sw.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ldff1ub.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ldff1uh.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ldff1uw.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ldnf1.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ldnf1sb.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ldnf1sh.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ldnf1sw.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ldnf1ub.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ldnf1uh.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ldnf1uw.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ldnt1.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_prfb.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_prfd.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_prfh.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_prfw.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_st1.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_st1b.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_st1h.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_st1w.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_st2.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_st3.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_st4.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_stnt1.c
M clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_ldnt1.c
M clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_ldnt1sb.c
M clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_ldnt1sh.c
M clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_ldnt1sw.c
M clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_ldnt1ub.c
M clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_ldnt1uh.c
M clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_ldnt1uw.c
M clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_stnt1.c
M clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_stnt1b.c
M clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_stnt1h.c
M clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_stnt1w.c
M clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_ld1.c
M clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_ld1_single.c
M clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_ldnt1.c
M clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_load_struct.c
M clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_loads.c
M clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_st1.c
M clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_st1_single.c
M clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_stnt1.c
M clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_store.c
M clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_store_struct.c
M clang/test/CodeGen/AArch64/v8.2a-fp16-intrinsics.c
A clang/test/CodeGen/AMDGPU/sanitizer.c
A clang/test/CodeGen/X86/pr190962.ll
A clang/test/CodeGen/ext-vector-bool-read.cpp
A clang/test/CodeGenCXX/dtor-local-lambda-mangle.cpp
A clang/test/CodeGenCXX/musttail-noexcept-error.cpp
A clang/test/CodeGenCXX/musttail-noexcept.cpp
A clang/test/CodeGenHIP/atomic-deprecated-fixit.hip
M clang/test/CodeGenHLSL/builtins/dst.hlsl
M clang/test/CodeGenHLSL/builtins/ldexp.hlsl
M clang/test/CodeGenHLSL/builtins/splitdouble.hlsl
M clang/test/CodeGenHLSL/resources/NonUniformResourceIndex.hlsl
M clang/test/CodeGenHLSL/semantics/SV_Position.ps.hlsl
M clang/test/CodeGenHLSL/semantics/SV_Position.vs.hlsl
M clang/test/CodeGenHLSL/semantics/SV_Target.ps.hlsl
M clang/test/CodeGenHLSL/semantics/semantic.arbitrary.hlsl
M clang/test/CodeGenHLSL/semantics/semantic.array.hlsl
M clang/test/CodeGenHLSL/semantics/semantic.array.output.hlsl
M clang/test/CodeGenHLSL/semantics/semantic.explicit-location-output-struct.hlsl
M clang/test/CodeGenHLSL/semantics/semantic.explicit-location.hlsl
M clang/test/CodeGenHLSL/semantics/semantic.explicit-mix-builtin.hlsl
M clang/test/CodeGenHLSL/semantics/semantic.explicit-mix.lib.hlsl
M clang/test/CodeGenHLSL/vk-features/vk.pushconstant.anon-struct.hlsl
M clang/test/CodeGenHLSL/vk-input-builtin.hlsl
M clang/test/CodeGenHLSL/vk-output-builtin.hlsl
M clang/test/Driver/cl-outputs.c
M clang/test/Driver/hexagon-toolchain-linux.c
M clang/test/Driver/mingw.cpp
A clang/test/Driver/module-file-direct-deps.c
A clang/test/Driver/modules-driver-clang-modules-only.cpp
M clang/test/Driver/modules-driver-dep-graph.cpp
M clang/test/Driver/modules-driver-manifest-input-args.cpp
M clang/test/Driver/pch-deps.c
M clang/test/ExtractAPI/availability.c
M clang/test/ExtractAPI/objc_property.m
A clang/test/Headers/cuda_intrinsics.cu
A clang/test/Modules/dependency-gen-direct-module-deps.m
M clang/test/Modules/dependency-gen-pch.m
A clang/test/Modules/implicit-module-redefinition-same-file.c
A clang/test/Modules/implicit-module-redefinition.c
M clang/test/Modules/merge-target-features.cpp
A clang/test/Modules/symlink-to-modular-header.c
A clang/test/OpenMP/declare_target_local_map_messages.cpp
M clang/test/Sema/warn-lifetime-safety-invalidations.cpp
M clang/test/Sema/warn-lifetime-safety.cpp
M clang/test/SemaCXX/constant-expression-cxx14.cpp
M clang/test/SemaCXX/cxx1y-variable-templates_top_level.cpp
A clang/test/SemaHIP/atomic-deprecated.hip
A clang/test/SemaHIP/incorrect-atomic-scope.hip
M clang/test/SemaHLSL/BuiltIns/D3DCOLORtoUBYTE4-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/cross-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/distance-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/dot2add-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/f16tof32-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/f32tof16-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/faceforward-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/fmod-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/ldexp-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/length-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/reflect-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/refract-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/smoothstep-errors.hlsl
A clang/test/SemaHLSL/Resources/resources-in-struct-array-error.hlsl
M clang/test/SemaHLSL/WaveBuiltinAvailability.hlsl
A clang/test/SemaOpenCL/incorrect-atomic-scope.cl
M clang/test/SemaTemplate/concepts.cpp
M clang/test/TableGen/hlsl-intrinsics.td
M clang/tools/clang-ssaf-format/CMakeLists.txt
M clang/tools/clang-ssaf-format/SSAFFormat.cpp
M clang/tools/clang-ssaf-linker/SSAFLinker.cpp
M clang/unittests/ScalableStaticAnalysisFramework/Frontend/TUSummaryExtractorFrontendActionTest.cpp
M clang/unittests/ScalableStaticAnalysisFramework/Registries/MockSerializationFormat.cpp
M clang/unittests/ScalableStaticAnalysisFramework/Registries/MockSerializationFormat.h
M clang/unittests/ScalableStaticAnalysisFramework/TestFixture.h
M clang/utils/TableGen/ClangBuiltinsEmitter.cpp
M clang/utils/TableGen/HLSLEmitter.cpp
M compiler-rt/cmake/caches/hexagon-linux-clangrt.cmake
M compiler-rt/lib/lsan/lsan_common.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_linux_libcdep.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_mac.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_mac.h
M compiler-rt/lib/sanitizer_common/sanitizer_platform_limits_posix.cpp
M compiler-rt/lib/scudo/standalone/wrappers_c.cpp
M compiler-rt/lib/scudo/standalone/wrappers_c.h
R compiler-rt/lib/scudo/standalone/wrappers_c.inc
R compiler-rt/lib/scudo/standalone/wrappers_c_bionic.cpp
M compiler-rt/lib/scudo/standalone/wrappers_cpp.cpp
M flang-rt/include/flang-rt/runtime/environment.h
M flang-rt/lib/cuda/allocator.cpp
M flang-rt/lib/cuda/kernel.cpp
M flang-rt/lib/runtime/environment.cpp
M flang-rt/lib/runtime/time-intrinsic.cpp
M flang/examples/FeatureList/FeatureList.cpp
M flang/include/flang/Common/windows-include.h
M flang/include/flang/Evaluate/expression.h
M flang/include/flang/Evaluate/fold.h
M flang/include/flang/Evaluate/shape.h
M flang/include/flang/Evaluate/tools.h
M flang/include/flang/Evaluate/traverse.h
M flang/include/flang/Optimizer/Dialect/FIRDialect.td
M flang/include/flang/Optimizer/Dialect/FIROps.td
M flang/include/flang/Optimizer/Dialect/FIRType.h
M flang/include/flang/Optimizer/Dialect/FIRTypes.td
M flang/include/flang/Optimizer/Dialect/Support/FIRContext.h
M flang/include/flang/Parser/characters.h
M flang/include/flang/Parser/dump-parse-tree.h
M flang/include/flang/Parser/parse-tree.h
M flang/include/flang/Semantics/dump-expr.h
M flang/include/flang/Semantics/expression.h
M flang/include/flang/Semantics/openmp-utils.h
M flang/lib/Evaluate/check-expression.cpp
M flang/lib/Evaluate/expression.cpp
M flang/lib/Evaluate/fold-implementation.h
M flang/lib/Evaluate/formatting.cpp
M flang/lib/Evaluate/tools.cpp
M flang/lib/Lower/Bridge.cpp
M flang/lib/Lower/ConvertExpr.cpp
M flang/lib/Lower/ConvertExprToHLFIR.cpp
M flang/lib/Lower/IterationSpace.cpp
M flang/lib/Lower/OpenACC.cpp
M flang/lib/Lower/OpenMP/ClauseProcessor.cpp
M flang/lib/Lower/OpenMP/ClauseProcessor.h
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Lower/Support/ReductionProcessor.cpp
M flang/lib/Lower/Support/Utils.cpp
M flang/lib/Optimizer/Builder/Runtime/Allocatable.cpp
M flang/lib/Optimizer/CodeGen/CodeGen.cpp
M flang/lib/Optimizer/Dialect/FIRDialect.cpp
M flang/lib/Optimizer/Dialect/FIROps.cpp
M flang/lib/Optimizer/Dialect/FIRType.cpp
M flang/lib/Optimizer/Dialect/Support/FIRContext.cpp
M flang/lib/Optimizer/HLFIR/Transforms/SimplifyHLFIRIntrinsics.cpp
M flang/lib/Optimizer/OpenACC/Support/FIROpenACCTypeInterfaces.cpp
M flang/lib/Optimizer/OpenMP/DoConcurrentConversion.cpp
M flang/lib/Optimizer/Transforms/CUDA/CUFComputeSharedMemoryOffsetsAndSize.cpp
M flang/lib/Optimizer/Transforms/CUDA/CUFOpConversion.cpp
M flang/lib/Optimizer/Transforms/FIRToMemRef.cpp
M flang/lib/Parser/expr-parsers.cpp
M flang/lib/Parser/unparse.cpp
M flang/lib/Semantics/check-acc-structure.cpp
M flang/lib/Semantics/check-acc-structure.h
M flang/lib/Semantics/check-cuda.cpp
M flang/lib/Semantics/check-omp-loop.cpp
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/check-omp-structure.h
M flang/lib/Semantics/definable.cpp
M flang/lib/Semantics/expression.cpp
M flang/lib/Semantics/openmp-utils.cpp
M flang/lib/Semantics/resolve-directives.cpp
A flang/test/Evaluate/fold-conditional-expr.f90
M flang/test/Fir/CUDA/cuda-shared-offset.mlir
A flang/test/Fir/dso-local-macho.fir
A flang/test/Fir/dso-local.fir
M flang/test/Fir/fir-ops.fir
M flang/test/Fir/invalid.fir
M flang/test/Fir/logical-convert.fir
A flang/test/Fir/logical-ops-fold.fir
M flang/test/HLFIR/simplify-hlfir-intrinsics-count.fir
M flang/test/Lower/CUDA/cuda-device-proc.cuf
A flang/test/Lower/CUDA/cuda-unified.cuf
M flang/test/Lower/HLFIR/array-ctor-as-inlined-temp.f90
M flang/test/Lower/HLFIR/binary-ops.f90
M flang/test/Lower/HLFIR/expr-box.f90
M flang/test/Lower/HLFIR/user-defined-assignment.f90
A flang/test/Lower/OpenACC/acc-do-concurrent-locality.f90
M flang/test/Lower/OpenACC/acc-reduction.f90
M flang/test/Lower/OpenMP/atomic-update-reassoc-logical.f90
A flang/test/Lower/OpenMP/common-block-target-update.f90
M flang/test/Lower/OpenMP/declare-mapper.f90
R flang/test/Lower/OpenMP/target-motion-skip-implicit-mapper.f90
M flang/test/Lower/OpenMP/wsloop-reduction-logical-and-byref.f90
M flang/test/Lower/OpenMP/wsloop-reduction-logical-and.f90
M flang/test/Lower/OpenMP/wsloop-reduction-logical-eqv-byref.f90
M flang/test/Lower/OpenMP/wsloop-reduction-logical-eqv.f90
M flang/test/Lower/OpenMP/wsloop-reduction-logical-neqv-byref.f90
M flang/test/Lower/OpenMP/wsloop-reduction-logical-neqv.f90
M flang/test/Lower/OpenMP/wsloop-reduction-logical-or-byref.f90
M flang/test/Lower/OpenMP/wsloop-reduction-logical-or.f90
M flang/test/Lower/array-elemental-calls-2.f90
M flang/test/Lower/common-block.f90
A flang/test/Parser/conditional-expr.f90
A flang/test/Semantics/OpenACC/acc-loop-routine-call.f90
A flang/test/Semantics/OpenMP/assumed-size-array-dsa.f90
M flang/test/Semantics/OpenMP/cray-pointer-usage.f90
A flang/test/Semantics/OpenMP/do-concurrent-collapse-60.f90
M flang/test/Semantics/OpenMP/do-concurrent-collapse.f90
A flang/test/Semantics/conditional-expr.f90
M flang/test/Semantics/cuf04.cuf
M flang/test/Transforms/DoConcurrent/reduce_device.mlir
A flang/test/Transforms/DoConcurrent/reduce_device_min.f90
M flang/test/Transforms/FIRToMemRef/array-coor-block-arg.mlir
M flang/test/Transforms/FIRToMemRef/logical.mlir
M flang/test/Transforms/FIRToMemRef/slice.mlir
M flang/test/Transforms/debug-line-table-inc-file.fir
M flang/test/Transforms/debug-line-table.fir
A flang/test/Transforms/licm-nested-hoist-aggressive.fir
A flang/test/Transforms/licm-nested-hoist-disabled.fir
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/aarch64/headers.txt
M libc/config/linux/arm/headers.txt
M libc/config/linux/i386/headers.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/riscv/headers.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/config/linux/x86_64/headers.txt
M libc/docs/CMakeLists.txt
M libc/docs/headers/index.rst
M libc/hdr/types/char32_t.h
M libc/include/CMakeLists.txt
R libc/include/arpa/inet.h.def
M libc/include/arpa/inet.yaml
R libc/include/complex.h.def
M libc/include/complex.yaml
R libc/include/elf.h.def
M libc/include/elf.yaml
R libc/include/fcntl.h.def
M libc/include/fcntl.yaml
R libc/include/inttypes.h.def
M libc/include/inttypes.yaml
M libc/include/llvm-libc-types/imaxdiv_t.h
R libc/include/netinet/in.h.def
M libc/include/netinet/in.yaml
R libc/include/poll.h.def
M libc/include/poll.yaml
R libc/include/sched.h.def
M libc/include/sched.yaml
R libc/include/signal.h.def
M libc/include/signal.yaml
R libc/include/stdio.h.def
M libc/include/stdio.yaml
R libc/include/stdlib.h.def
M libc/include/stdlib.yaml
A libc/include/syscall.h
R libc/include/sysexits.h.def
M libc/include/sysexits.yaml
R libc/include/termios.h.def
M libc/include/termios.yaml
R libc/include/unistd.h.def
M libc/include/unistd.yaml
M libc/shared/CMakeLists.txt
M libc/shared/math.h
A libc/shared/math/cbrtbf16.h
M libc/shared/rpc.h
M libc/shared/rpc_server.h
M libc/src/CMakeLists.txt
M libc/src/__support/CMakeLists.txt
M libc/src/__support/OSUtil/linux/syscall_wrappers/CMakeLists.txt
A libc/src/__support/OSUtil/linux/syscall_wrappers/listen.h
M libc/src/__support/math/CMakeLists.txt
A libc/src/__support/math/cbrtbf16.h
M libc/src/assert/generic/CMakeLists.txt
M libc/src/assert/generic/__assert_fail.cpp
M libc/src/assert/gpu/CMakeLists.txt
M libc/src/assert/gpu/__assert_fail.cpp
M libc/src/compiler/generic/CMakeLists.txt
M libc/src/compiler/generic/__stack_chk_fail.cpp
M libc/src/math/generic/CMakeLists.txt
M libc/src/math/generic/cbrtbf16.cpp
M libc/src/pthread/pthread_attr_getschedparam.cpp
M libc/src/pthread/pthread_attr_setschedparam.cpp
A libc/src/semaphore/CMakeLists.txt
A libc/src/semaphore/posix_semaphore.h
M libc/src/stdlib/CMakeLists.txt
A libc/src/stdlib/abort.cpp
A libc/src/stdlib/abort_utils.h
M libc/src/stdlib/baremetal/CMakeLists.txt
R libc/src/stdlib/baremetal/abort.cpp
A libc/src/stdlib/baremetal/abort_utils.h
M libc/src/stdlib/gpu/CMakeLists.txt
R libc/src/stdlib/gpu/abort.cpp
A libc/src/stdlib/gpu/abort_utils.h
M libc/src/stdlib/linux/CMakeLists.txt
R libc/src/stdlib/linux/abort.cpp
M libc/src/stdlib/linux/abort_utils.h
M libc/src/sys/socket/CMakeLists.txt
M libc/src/sys/socket/linux/CMakeLists.txt
A libc/src/sys/socket/linux/listen.cpp
A libc/src/sys/socket/listen.h
M libc/test/integration/src/stdlib/abort_test.cpp
M libc/test/shared/CMakeLists.txt
M libc/test/shared/shared_math_test.cpp
M libc/test/src/CMakeLists.txt
M libc/test/src/__support/CMakeLists.txt
M libc/test/src/assert/assert_test.cpp
A libc/test/src/semaphore/CMakeLists.txt
A libc/test/src/semaphore/semaphore_test.cpp
M libc/test/src/sys/socket/linux/CMakeLists.txt
M libc/test/src/sys/socket/linux/connect_test.cpp
A libc/test/src/sys/socket/linux/listen_test.cpp
A libc/utils/docgen/fcntl.yaml
A libc/utils/docgen/sys/socket.yaml
M libcxx/docs/Status/Cxx2cIssues.csv
M libcxx/docs/TestingLibcxx.rst
M libcxx/include/__atomic/contention_t.h
M libcxx/include/__cxx03/__atomic/contention_t.h
M libcxx/include/__memory/shared_ptr.h
M libcxx/include/__new/placement_new_delete.h
M libcxx/include/new
M libcxx/src/atomic.cpp
A libcxx/test/libcxx/containers/associative/lookup_with_transparently_comparable.pass.cpp
A libcxx/test/requirements.txt
A libcxx/test/selftest/filecheck.negative.sh.cpp
A libcxx/test/selftest/filecheck.sh.cpp
A libcxx/test/selftest/splitfile.sh.cpp
M libcxx/test/std/language.support/support.dynamic/new.delete/new.delete.placement/new.pass.cpp
M libcxx/test/std/language.support/support.dynamic/new.delete/new.delete.placement/new_array.pass.cpp
M libcxx/test/std/utilities/memory/util.smartptr/util.smartptr.shared/util.smartptr.shared.create/allocate_shared.array.unbounded.pass.cpp
M libcxx/test/std/utilities/memory/util.smartptr/util.smartptr.shared/util.smartptr.shared.create/make_shared.array.unbounded.pass.cpp
M libcxx/utils/ci/lnt/README.md
A libcxx/utils/ci/lnt/run-benchbot
M libcxx/utils/ci/lnt/run-benchmarks
R libcxx/utils/ci/lnt/runners/README.md
R libcxx/utils/ci/lnt/runners/apple-m5-clang21
R libcxx/utils/ci/lnt/runners/apple-m5-xcode26
A libcxx/utils/ci/lnt/submit-benchmarks
M libcxx/utils/libcxx/test/features/misc.py
M libsycl/docs/index.rst
M libsycl/include/sycl/__impl/aspect.hpp
A libsycl/include/sycl/__impl/event.hpp
M libsycl/include/sycl/__impl/info/device_type.hpp
M libsycl/include/sycl/__impl/queue.hpp
M libsycl/include/sycl/__impl/usm_alloc_type.hpp
M libsycl/include/sycl/__impl/usm_functions.hpp
M libsycl/include/sycl/sycl.hpp
M libsycl/src/CMakeLists.txt
M libsycl/src/detail/context_impl.hpp
M libsycl/src/detail/device_binary_structures.hpp
M libsycl/src/detail/device_image_wrapper.hpp
M libsycl/src/detail/device_impl.hpp
A libsycl/src/detail/event_impl.cpp
A libsycl/src/detail/event_impl.hpp
M libsycl/src/detail/global_objects.hpp
M libsycl/src/detail/kernel_id.hpp
M libsycl/src/detail/offload/offload_topology.hpp
M libsycl/src/detail/offload/offload_utils.hpp
M libsycl/src/detail/platform_impl.cpp
M libsycl/src/detail/platform_impl.hpp
M libsycl/src/detail/program_manager.cpp
M libsycl/src/detail/program_manager.hpp
M libsycl/src/detail/queue_impl.cpp
M libsycl/src/detail/queue_impl.hpp
A libsycl/src/event.cpp
M libsycl/src/queue.cpp
M libsycl/src/usm_functions.cpp
M lld/COFF/InputFiles.cpp
M lld/COFF/SymbolTable.cpp
M lld/ELF/LinkerScript.cpp
M lld/test/COFF/export-all-conflict.test
M lld/test/COFF/gnu-weak.test
A lld/test/COFF/weak-preference.test
M lld/test/ELF/x86-64-section-layout.s
M lldb/docs/use/aarch64-linux.md
M lldb/include/lldb/Expression/DWARFExpression.h
M lldb/include/lldb/Interpreter/CommandReturnObject.h
M lldb/include/lldb/Target/Process.h
M lldb/include/lldb/Target/SyntheticFrameProvider.h
M lldb/include/lldb/Target/Target.h
M lldb/include/lldb/Target/Thread.h
M lldb/include/lldb/Utility/ScriptedMetadata.h
M lldb/include/lldb/lldb-defines.h
M lldb/packages/Python/lldbsuite/test/lldbutil.py
M lldb/packages/Python/lldbsuite/test/make/libcxx-simulators-common/compressed_pair.h
M lldb/source/Commands/CommandObjectCommands.cpp
M lldb/source/Commands/CommandObjectDisassemble.cpp
M lldb/source/Commands/CommandObjectMemory.cpp
M lldb/source/Commands/CommandObjectPlatform.cpp
M lldb/source/Commands/CommandObjectProcess.cpp
M lldb/source/Commands/CommandObjectSource.cpp
M lldb/source/Commands/CommandObjectTarget.cpp
M lldb/source/Commands/CommandObjectThread.cpp
M lldb/source/Commands/CommandObjectType.cpp
M lldb/source/Expression/CMakeLists.txt
M lldb/source/Expression/DWARFExpression.cpp
M lldb/source/Interpreter/CommandInterpreter.cpp
M lldb/source/Interpreter/CommandReturnObject.cpp
M lldb/source/Plugins/LanguageRuntime/ObjC/AppleObjCRuntime/AppleObjCRuntimeV2.cpp
M lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.h
M lldb/source/Plugins/SymbolFile/DWARF/DWARFUnit.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFUnit.h
M lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARF.h
M lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARFDwo.cpp
M lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARFDwo.h
M lldb/source/Plugins/SymbolFile/DWARF/SymbolFileWasm.cpp
M lldb/source/Plugins/SymbolFile/DWARF/SymbolFileWasm.h
M lldb/source/Plugins/SymbolLocator/SymStore/SymbolLocatorSymStore.cpp
M lldb/source/Plugins/TypeSystem/Clang/TypeSystemClang.cpp
M lldb/source/Target/Process.cpp
M lldb/source/Target/SyntheticFrameProvider.cpp
M lldb/source/Target/Target.cpp
M lldb/source/Target/Thread.cpp
M lldb/test/API/functionalities/scripted_frame_provider/pass_through_prefix/TestFrameProviderPassThroughPrefix.py
M lldb/test/API/functionalities/scripted_frame_provider/thread_filter/TestFrameProviderThreadFilter.py
M lldb/test/API/functionalities/scripted_frame_provider/thread_filter/main.cpp
M lldb/test/API/functionalities/tsan/cpp_global_location/TestTsanCPPGlobalLocation.py
M lldb/test/API/functionalities/tsan/global_location/TestTsanGlobalLocation.py
A lldb/test/API/lang/cpp/non-type-template-param-member-ptr/Makefile
A lldb/test/API/lang/cpp/non-type-template-param-member-ptr/TestCppNonTypeTemplateParamPtrToMember.py
A lldb/test/API/lang/cpp/non-type-template-param-member-ptr/main.cpp
M lldb/test/API/linux/aarch64/sme_only_registers/TestSMEOnlyRegisters.py
A lldb/test/API/linux/aarch64/sme_only_registers/core_simd_on_32
A lldb/test/API/linux/aarch64/sme_only_registers/core_streaming_off_64
M lldb/test/API/linux/aarch64/sme_only_registers/main.c
M lldb/test/API/macosx/simulator/TestSimulatorPlatform.py
M lldb/test/API/symstore/TestSymStore.py
M lldb/test/API/tools/lldb-server/TestAppleSimulatorOSType.py
M lldb/tools/driver/lldb-mte-entitlements.plist
M lldb/tools/lldb-dap/Handler/AttachRequestHandler.cpp
M lldb/unittests/Expression/DWARFExpressionTest.cpp
M lldb/unittests/Target/MemoryTest.cpp
M llvm/docs/AMDGPUUsage.rst
M llvm/docs/CompileCudaWithLLVM.rst
M llvm/docs/DeveloperPolicy.rst
M llvm/docs/LangRef.rst
M llvm/docs/ProgrammersManual.rst
M llvm/docs/QualGroup.rst
M llvm/docs/ReleaseNotes.md
M llvm/include/llvm/ABI/FunctionInfo.h
M llvm/include/llvm/ADT/GenericUniformityImpl.h
M llvm/include/llvm/ADT/PostOrderIterator.h
M llvm/include/llvm/ADT/SmallVector.h
M llvm/include/llvm/Analysis/BlockFrequencyInfoImpl.h
M llvm/include/llvm/Analysis/BranchProbabilityInfo.h
M llvm/include/llvm/Analysis/InlineOrder.h
M llvm/include/llvm/Analysis/LoopIterator.h
M llvm/include/llvm/CodeGen/AsmPrinter.h
M llvm/include/llvm/CodeGen/ISDOpcodes.h
M llvm/include/llvm/CodeGen/MachineBranchProbabilityInfo.h
M llvm/include/llvm/CodeGen/SelectionDAG.h
M llvm/include/llvm/DebugInfo/DWARF/LowLevel/DWARFExpression.h
M llvm/include/llvm/DebugInfo/Symbolize/SymbolizableObjectFile.h
A llvm/include/llvm/ExecutionEngine/JITLink/ELF_hexagon.h
A llvm/include/llvm/ExecutionEngine/JITLink/hexagon.h
M llvm/include/llvm/IR/CallingConv.h
M llvm/include/llvm/IR/FixedMetadataKinds.def
M llvm/include/llvm/IR/Instructions.h
M llvm/include/llvm/IR/Intrinsics.td
M llvm/include/llvm/IR/IntrinsicsAArch64.td
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/include/llvm/IR/IntrinsicsNVVM.td
M llvm/include/llvm/IR/Metadata.h
M llvm/include/llvm/MC/MCAsmInfo.h
M llvm/include/llvm/MC/MCAssembler.h
M llvm/include/llvm/MC/MCContext.h
M llvm/include/llvm/MC/TargetRegistry.h
M llvm/include/llvm/SandboxIR/User.h
M llvm/include/llvm/Support/Error.h
A llvm/include/llvm/Support/HTTP/StreamedHTTPResponseHandler.h
M llvm/include/llvm/Support/KnownFPClass.h
M llvm/include/llvm/Support/Registry.h
M llvm/include/llvm/Support/TargetOpcodes.def
M llvm/include/llvm/Target/GenericOpcodes.td
M llvm/include/llvm/Target/TargetSelectionDAG.td
M llvm/include/llvm/Transforms/InstCombine/InstCombiner.h
M llvm/include/llvm/Transforms/Utils/Cloning.h
M llvm/lib/Analysis/BasicAliasAnalysis.cpp
M llvm/lib/Analysis/BranchProbabilityInfo.cpp
M llvm/lib/Analysis/ConstantFolding.cpp
M llvm/lib/Analysis/DependenceAnalysis.cpp
M llvm/lib/Analysis/InlineOrder.cpp
M llvm/lib/Analysis/LoopInfo.cpp
M llvm/lib/Analysis/UniformityAnalysis.cpp
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/lib/CodeGen/ExpandVectorPredication.cpp
M llvm/lib/CodeGen/GlobalISel/GISelValueTracking.cpp
M llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
M llvm/lib/CodeGen/MIRSampleProfile.cpp
M llvm/lib/CodeGen/MachineBranchProbabilityInfo.cpp
M llvm/lib/CodeGen/MachineTraceMetrics.cpp
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/lib/CodeGen/TargetLoweringBase.cpp
M llvm/lib/CodeGen/TwoAddressInstructionPass.cpp
M llvm/lib/DebugInfo/Symbolize/SymbolizableObjectFile.cpp
M llvm/lib/Debuginfod/Debuginfod.cpp
M llvm/lib/ExecutionEngine/JITLink/CMakeLists.txt
M llvm/lib/ExecutionEngine/JITLink/ELF.cpp
A llvm/lib/ExecutionEngine/JITLink/ELF_hexagon.cpp
A llvm/lib/ExecutionEngine/JITLink/hexagon.cpp
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
M llvm/lib/IR/AutoUpgrade.cpp
M llvm/lib/IR/Value.cpp
M llvm/lib/IR/Verifier.cpp
M llvm/lib/MC/ELFObjectWriter.cpp
M llvm/lib/MC/MCAsmStreamer.cpp
M llvm/lib/MC/MCAssembler.cpp
M llvm/lib/MC/MCContext.cpp
M llvm/lib/MC/MCObjectStreamer.cpp
M llvm/lib/Passes/PassBuilder.cpp
M llvm/lib/Support/HTTP/CMakeLists.txt
A llvm/lib/Support/HTTP/StreamedHTTPResponseHandler.cpp
M llvm/lib/Support/KnownFPClass.cpp
M llvm/lib/Support/Windows/Signals.inc
M llvm/lib/Support/raw_socket_stream.cpp
M llvm/lib/Target/AArch64/AArch64.h
M llvm/lib/Target/AArch64/AArch64A57FPLoadBalancing.cpp
M llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/lib/Target/AArch64/AArch64PassRegistry.def
M llvm/lib/Target/AArch64/AArch64RedundantCopyElimination.cpp
M llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp
M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
M llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
M llvm/lib/Target/AArch64/GISel/AArch64PostLegalizerCombiner.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/AMDGPULowerIntrinsics.cpp
M llvm/lib/Target/AMDGPU/AMDGPUMCInstLower.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeHelper.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPURewriteAGPRCopyMFMA.cpp
M llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp
M llvm/lib/Target/AMDGPU/AMDGPUSubtarget.h
M llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
A llvm/lib/Target/AMDGPU/AMDGPUWaitcntUtils.cpp
A llvm/lib/Target/AMDGPU/AMDGPUWaitcntUtils.h
M llvm/lib/Target/AMDGPU/CMakeLists.txt
M llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
M llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp
M llvm/lib/Target/AMDGPU/SIMemoryLegalizer.cpp
M llvm/lib/Target/AMDGPU/SISchedule.td
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
M llvm/lib/Target/AMDGPU/VOP1Instructions.td
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
M llvm/lib/Target/ARM/ARMISelLowering.cpp
M llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
M llvm/lib/Target/BPF/BPFCallingConv.td
M llvm/lib/Target/BPF/BPFISelLowering.cpp
M llvm/lib/Target/BPF/BPFISelLowering.h
M llvm/lib/Target/CSKY/MCTargetDesc/CSKYAsmBackend.cpp
M llvm/lib/Target/Hexagon/CMakeLists.txt
M llvm/lib/Target/Hexagon/HexagonMachineFunctionInfo.cpp
M llvm/lib/Target/Hexagon/HexagonMachineFunctionInfo.h
M llvm/lib/Target/Hexagon/HexagonOptAddrMode.cpp
M llvm/lib/Target/Hexagon/HexagonRegisterInfo.cpp
M llvm/lib/Target/Hexagon/HexagonTargetMachine.cpp
M llvm/lib/Target/Hexagon/HexagonTargetMachine.h
M llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp
M llvm/lib/Target/NVPTX/NVPTXAsmPrinter.h
M llvm/lib/Target/NVPTX/NVPTXDwarfDebug.cpp
M llvm/lib/Target/NVPTX/NVPTXDwarfDebug.h
M llvm/lib/Target/NVPTX/NVPTXTargetTransformInfo.cpp
M llvm/lib/Target/RISCV/RISCVCodeGenPrepare.cpp
M llvm/lib/Target/RISCV/RISCVGISel.td
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.h
M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoXSfmm.td
M llvm/lib/Target/RISCV/RISCVInstrInfoXqci.td
M llvm/lib/Target/RISCV/RISCVInstrInfoZicbo.td
M llvm/lib/Target/RISCV/RISCVInstrInfoZvdot4a8i.td
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
M llvm/lib/Target/SPIRV/SPIRVCallLowering.cpp
M llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp
M llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.h
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
M llvm/lib/Target/SPIRV/SPIRVSubtarget.cpp
M llvm/lib/Target/SPIRV/SPIRVUtils.h
M llvm/lib/Target/WebAssembly/GISel/WebAssemblyCallLowering.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyCFGStackify.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
M llvm/lib/Target/X86/X86FastISel.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86ISelLoweringCall.cpp
M llvm/lib/Target/X86/X86InstrInfo.cpp
M llvm/lib/Target/X86/X86InstrInfo.h
M llvm/lib/Target/X86/X86MCInstLower.cpp
M llvm/lib/TargetParser/TargetDataLayout.cpp
M llvm/lib/Transforms/IPO/AlwaysInliner.cpp
M llvm/lib/Transforms/IPO/Inliner.cpp
M llvm/lib/Transforms/IPO/ModuleInliner.cpp
M llvm/lib/Transforms/IPO/PartialInlining.cpp
M llvm/lib/Transforms/IPO/SampleProfileMatcher.cpp
M llvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
M llvm/lib/Transforms/InstCombine/InstCombineInternal.h
M llvm/lib/Transforms/Instrumentation/NumericalStabilitySanitizer.cpp
M llvm/lib/Transforms/ObjCARC/ObjCARCOpts.cpp
M llvm/lib/Transforms/Scalar/LoopUnrollPass.cpp
M llvm/lib/Transforms/Scalar/SeparateConstOffsetFromGEP.cpp
M llvm/lib/Transforms/Utils/CloneFunction.cpp
M llvm/lib/Transforms/Utils/InlineFunction.cpp
M llvm/lib/Transforms/Utils/ScalarEvolutionExpander.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/lib/Transforms/Vectorize/VPlan.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanAnalysis.cpp
M llvm/lib/Transforms/Vectorize/VPlanCFG.h
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanUnroll.cpp
M llvm/lib/Transforms/Vectorize/VPlanUtils.cpp
M llvm/lib/Transforms/Vectorize/VPlanUtils.h
A llvm/test/Analysis/BasicAA/gep-decompose-bitcast-vector-type-mismatch.ll
M llvm/test/Analysis/DependenceAnalysis/Banerjee.ll
M llvm/test/Analysis/DependenceAnalysis/Constraints.ll
M llvm/test/Analysis/DependenceAnalysis/MismatchingNestLevels.ll
M llvm/test/Analysis/DependenceAnalysis/NonCanonicalizedSubscript.ll
M llvm/test/Analysis/DependenceAnalysis/PreliminaryNoValidityCheckFixedSize.ll
M llvm/test/Analysis/DependenceAnalysis/Propagating.ll
M llvm/test/Analysis/DependenceAnalysis/SameSDLoops.ll
M llvm/test/Analysis/DependenceAnalysis/exact-rdiv-addrec-wrap.ll
M llvm/test/Analysis/DependenceAnalysis/rdiv-minor-algebra.ll
M llvm/test/Bitcode/calling-conventions.3.2.ll
M llvm/test/Bitcode/calling-conventions.3.2.ll.bc
M llvm/test/Bitcode/upgrade-aarch64-sve-intrinsics.ll
A llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-constrained-fcmp.ll
A llvm/test/CodeGen/AArch64/GlobalISel/knownbits-stepvector.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir
M llvm/test/CodeGen/AArch64/arm64-atomic.ll
M llvm/test/CodeGen/AArch64/arm64-vcvt-fptoi.ll
M llvm/test/CodeGen/AArch64/atomicrmw-O0.ll
M llvm/test/CodeGen/AArch64/bf16-v8-instructions.ll
A llvm/test/CodeGen/AArch64/branch-on-bool.ll
M llvm/test/CodeGen/AArch64/faddp-half.ll
M llvm/test/CodeGen/AArch64/fcvt_combine.ll
M llvm/test/CodeGen/AArch64/fmla.ll
M llvm/test/CodeGen/AArch64/logical-op-with-not.ll
M llvm/test/CodeGen/AArch64/machine-copy-remove.mir
M llvm/test/CodeGen/AArch64/machine-zero-copy-remove.mir
A llvm/test/CodeGen/AArch64/masked-sdiv-fixed-length.ll
A llvm/test/CodeGen/AArch64/masked-sdiv-scalable.ll
A llvm/test/CodeGen/AArch64/masked-srem-fixed-length.ll
A llvm/test/CodeGen/AArch64/masked-srem-scalable.ll
A llvm/test/CodeGen/AArch64/masked-udiv-fixed-length.ll
A llvm/test/CodeGen/AArch64/masked-udiv-scalable.ll
A llvm/test/CodeGen/AArch64/masked-urem-fixed-length.ll
A llvm/test/CodeGen/AArch64/masked-urem-scalable.ll
M llvm/test/CodeGen/AArch64/ptrauth-reloc.ll
M llvm/test/CodeGen/AArch64/sme-disable-gisel-fisel.ll
M llvm/test/CodeGen/AArch64/sve-coalesce-ptrue-intrinsics.ll
M llvm/test/CodeGen/AArch64/sve-fixed-length-fp-compares.ll
M llvm/test/CodeGen/AArch64/sve-fixed-length-fp-to-int.ll
M llvm/test/CodeGen/AArch64/sve-fixed-length-int-div.ll
M llvm/test/CodeGen/AArch64/sve-fixed-length-int-rem.ll
M llvm/test/CodeGen/AArch64/sve-hadd.ll
M llvm/test/CodeGen/AArch64/sve-int-log.ll
M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-fp-compares.ll
M llvm/test/CodeGen/AArch64/sve2-bsl.ll
M llvm/test/CodeGen/AArch64/vecreduce-fadd.ll
M llvm/test/CodeGen/AArch64/vecreduce-fmul.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.fdot2.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.interp.p1.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.s.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.wmma_32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.wmma_64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.ds.gws.init.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.ds.gws.sema.v.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.interp.mov.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.interp.p1.f16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.interp.p1.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.interp.p2.f16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.interp.p2.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.s.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w32-swmmac-index_key.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w64-imm.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w64-swmmac-index_key.ll
A llvm/test/CodeGen/AMDGPU/amdgpu-simplify-demanded-bits-for-target-node.ll
R llvm/test/CodeGen/AMDGPU/amdgpu-simplify-demanded-bits-readfirstlane.ll
M llvm/test/CodeGen/AMDGPU/asyncmark-gfx12plus.ll
M llvm/test/CodeGen/AMDGPU/asyncmark-max-pregfx12.ll
M llvm/test/CodeGen/AMDGPU/asyncmark-pregfx12.ll
M llvm/test/CodeGen/AMDGPU/bf16.ll
M llvm/test/CodeGen/AMDGPU/diverge-interp-mov-lower.ll
M llvm/test/CodeGen/AMDGPU/fix-sgpr-copies-wwm.ll
M llvm/test/CodeGen/AMDGPU/fix-wwm-vgpr-copy.ll
M llvm/test/CodeGen/AMDGPU/flat-saddr-atomics.ll
M llvm/test/CodeGen/AMDGPU/frem.ll
M llvm/test/CodeGen/AMDGPU/fsqrt.f64.ll
M llvm/test/CodeGen/AMDGPU/fsub-as-fneg-src-modifier.ll
M llvm/test/CodeGen/AMDGPU/global-saddr-atomics.ll
A llvm/test/CodeGen/AMDGPU/inline-asm-vgpr-range-unsupported-width.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.gws.barrier-bundle.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.gws.barrier.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.gws.init.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.gws.sema.br.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.gws.sema.p.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.gws.sema.release.all.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.gws.sema.v.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fdot2.f16.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.init.exec.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.init.exec.wave32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.interp.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.interp.inreg.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.interp.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.monitor.sleep.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.setprio.inc.wg.ll
M llvm/test/CodeGen/AMDGPU/llvm.cos.bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.frexp.ll
M llvm/test/CodeGen/AMDGPU/llvm.sin.bf16.ll
M llvm/test/CodeGen/AMDGPU/mad-mix-hi-bf16.ll
M llvm/test/CodeGen/AMDGPU/mad-mix-lo-bf16.ll
A llvm/test/CodeGen/AMDGPU/memory-legalizer-single-wave-workgroup-memops.ll
M llvm/test/CodeGen/AMDGPU/rsq.f64.ll
M llvm/test/CodeGen/AMDGPU/s-barrier.ll
A llvm/test/CodeGen/AMDGPU/s-buffer-load-mmo-offsets.ll
A llvm/test/CodeGen/AMDGPU/setcc-f64-hi32mask.ll
M llvm/test/CodeGen/ARM/funnel-shift.ll
M llvm/test/CodeGen/ARM/sadd_sat.ll
M llvm/test/CodeGen/ARM/sadd_sat_plus.ll
M llvm/test/CodeGen/ARM/ssub_sat.ll
M llvm/test/CodeGen/ARM/ssub_sat_plus.ll
M llvm/test/CodeGen/BPF/atomic-oversize.ll
A llvm/test/CodeGen/BPF/i128_return.ll
A llvm/test/CodeGen/BPF/sret.ll
M llvm/test/CodeGen/BPF/struct_ret1.ll
M llvm/test/CodeGen/BPF/struct_ret2.ll
M llvm/test/CodeGen/Hexagon/aligna-prologue-expansion.mir
A llvm/test/CodeGen/Hexagon/opt-addr-mode-large-unodelist.ll
M llvm/test/CodeGen/Mips/funnel-shift.ll
A llvm/test/CodeGen/NVPTX/dead-shfl.ll
A llvm/test/CodeGen/NVPTX/inline-asm-line-info-inlined-at.ll
A llvm/test/CodeGen/NVPTX/inline-asm-line-info-per-instruction.ll
A llvm/test/CodeGen/NVPTX/inline-asm-line-number-before.ll
M llvm/test/CodeGen/NVPTX/math-intrins-sm80-ptx70-instcombine.ll
A llvm/test/CodeGen/NVPTX/sub-byte-constant-vector-convert.ll
A llvm/test/CodeGen/NVPTX/sub-byte-constant-vectors-i4-i2.ll
M llvm/test/CodeGen/PowerPC/funnel-shift.ll
A llvm/test/CodeGen/PowerPC/masked-sdiv.ll
A llvm/test/CodeGen/PowerPC/masked-srem.ll
A llvm/test/CodeGen/PowerPC/masked-udiv.ll
A llvm/test/CodeGen/PowerPC/masked-urem.ll
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer-info-validation.mir
M llvm/test/CodeGen/RISCV/combine-is_fpclass.ll
A llvm/test/CodeGen/RISCV/known-fpclass.ll
M llvm/test/CodeGen/RISCV/musttail.ll
A llvm/test/CodeGen/RISCV/pr190868.ll
M llvm/test/CodeGen/RISCV/prefetch.ll
M llvm/test/CodeGen/RISCV/rv32p.ll
M llvm/test/CodeGen/RISCV/rv64p.ll
A llvm/test/CodeGen/RISCV/rvv/commutable-zvdot4a8i.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fptosi-vp-mask.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fptosi-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fptoui-vp-mask.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fptoui-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-reduction-int-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-reduction-int.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-sitofp-vp-mask.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-sitofp-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-uitofp-vp-mask.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-uitofp-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vcopysign-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfabs-vp.ll
A llvm/test/CodeGen/RISCV/rvv/masked-sdiv.ll
A llvm/test/CodeGen/RISCV/rvv/masked-srem.ll
A llvm/test/CodeGen/RISCV/rvv/masked-udiv.ll
A llvm/test/CodeGen/RISCV/rvv/masked-urem.ll
M llvm/test/CodeGen/RISCV/rvv/vcopysign-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfabs-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfptosi-vp-mask.ll
M llvm/test/CodeGen/RISCV/rvv/vfptosi-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfptoui-vp-mask.ll
M llvm/test/CodeGen/RISCV/rvv/vfptoui-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vsitofp-vp-mask.ll
M llvm/test/CodeGen/RISCV/rvv/vsitofp-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vuitofp-vp-mask.ll
M llvm/test/CodeGen/RISCV/rvv/vuitofp-vp.ll
A llvm/test/CodeGen/RISCV/samesign.ll
M llvm/test/CodeGen/RISCV/xcvmem.ll
M llvm/test/CodeGen/RISCV/xqciac.ll
M llvm/test/CodeGen/SPIRV/GlobalISel/InstCombine/prelegalizercombiner-length-to-distance.mir
M llvm/test/CodeGen/SPIRV/GlobalISel/InstCombine/prelegalizercombiner-select-to-faceforward.mir
M llvm/test/CodeGen/SPIRV/hlsl-resources/Packed.ll
M llvm/test/CodeGen/SPIRV/hlsl-resources/cbuffer-peeled-array.ll
M llvm/test/CodeGen/SPIRV/linkage/linkage-types.ll
M llvm/test/CodeGen/SPIRV/llc-pipeline.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/bitreverse_small_type.ll
M llvm/test/CodeGen/SPIRV/opencl/device_execution/execute_block.ll
M llvm/test/CodeGen/SPIRV/pointers/load-vector-from-array-of-vectors.ll
M llvm/test/CodeGen/SPIRV/spirv-explicit-layout.ll
M llvm/test/CodeGen/SPIRV/spirv_param_decorations.ll
R llvm/test/CodeGen/SPIRV/transcoding/OpBitReverse-subbyte.ll
R llvm/test/CodeGen/SPIRV/transcoding/OpBitReverse_i2.ll
A llvm/test/CodeGen/SPIRV/transcoding/subbyte-arg-type-mismatch.ll
A llvm/test/CodeGen/SPIRV/vk-pushconstant-layout-natural.ll
M llvm/test/CodeGen/SPIRV/vk-pushconstant-layout.ll
M llvm/test/CodeGen/WebAssembly/GlobalISel/irtranslator/args-simd.ll
M llvm/test/CodeGen/WebAssembly/GlobalISel/irtranslator/args-swiftcc.ll
M llvm/test/CodeGen/WebAssembly/GlobalISel/irtranslator/args.ll
A llvm/test/CodeGen/WebAssembly/GlobalISel/irtranslator/ret-aggregates.ll
A llvm/test/CodeGen/WebAssembly/GlobalISel/irtranslator/ret-basics.ll
A llvm/test/CodeGen/WebAssembly/GlobalISel/irtranslator/ret-simd.ll
M llvm/test/CodeGen/WebAssembly/cfg-stackify-eh-legacy.ll
M llvm/test/CodeGen/WebAssembly/cfg-stackify-eh.ll
M llvm/test/CodeGen/WebAssembly/exception-legacy.ll
M llvm/test/CodeGen/WebAssembly/exception.ll
A llvm/test/CodeGen/X86/apx/pr190557.ll
M llvm/test/CodeGen/X86/cond-loop.ll
M llvm/test/CodeGen/X86/fminimum-fmaximum.ll
M llvm/test/CodeGen/X86/funnel-shift.ll
M llvm/test/CodeGen/X86/i128-udiv.ll
A llvm/test/CodeGen/X86/masked-sdiv.ll
A llvm/test/CodeGen/X86/masked-srem.ll
A llvm/test/CodeGen/X86/masked-udiv.ll
A llvm/test/CodeGen/X86/masked-urem.ll
M llvm/test/CodeGen/X86/mul-lohi-no-implicit-copy.ll
M llvm/test/CodeGen/X86/musttail-struct.ll
M llvm/test/CodeGen/X86/nofpclass.ll
M llvm/test/CodeGen/X86/pr78897.ll
M llvm/test/CodeGen/X86/srem-seteq-vec-nonsplat.ll
M llvm/test/CodeGen/X86/tailcallstack64.ll
M llvm/test/CodeGen/X86/tailccstack64.ll
A llvm/test/CodeGen/X86/two-address-subreg-to-reg-kill.mir
A llvm/test/ExecutionEngine/JITLink/Hexagon/ELF_hexagon_b22_pcrel.s
A llvm/test/ExecutionEngine/JITLink/Hexagon/ELF_hexagon_combined.s
A llvm/test/ExecutionEngine/JITLink/Hexagon/ELF_hexagon_compound.s
A llvm/test/ExecutionEngine/JITLink/Hexagon/ELF_hexagon_cond_branch.s
A llvm/test/ExecutionEngine/JITLink/Hexagon/ELF_hexagon_const_extender.s
A llvm/test/ExecutionEngine/JITLink/Hexagon/ELF_hexagon_data_relocations.s
A llvm/test/ExecutionEngine/JITLink/Hexagon/ELF_hexagon_duplex.s
A llvm/test/ExecutionEngine/JITLink/Hexagon/ELF_hexagon_hilo16.s
A llvm/test/ExecutionEngine/JITLink/Hexagon/ELF_hexagon_loop.s
A llvm/test/ExecutionEngine/JITLink/Hexagon/ELF_hexagon_mem_relocs.s
A llvm/test/ExecutionEngine/JITLink/Hexagon/ELF_hexagon_minimal.s
A llvm/test/ExecutionEngine/JITLink/Hexagon/ELF_hexagon_noext_branch.s
A llvm/test/ExecutionEngine/JITLink/Hexagon/ELF_hexagon_packet.s
A llvm/test/ExecutionEngine/JITLink/Hexagon/ELF_hexagon_plt.s
A llvm/test/ExecutionEngine/JITLink/Hexagon/lit.local.cfg
M llvm/test/Instrumentation/MemorySanitizer/AArch64/sme2-intrinsics-add-mini.ll
M llvm/test/Instrumentation/MemorySanitizer/AArch64/sme2-intrinsics-add.ll
M llvm/test/Instrumentation/NumericalStabilitySanitizer/non_float_store.ll
A llvm/test/MC/ARM/thumb-ldr-stretch.s
A llvm/test/MC/CSKY/lrw-stretch.s
M llvm/test/MC/ELF/relax-branch-align.s
M llvm/test/MC/RISCV/rvzicbom-invalid.s
M llvm/test/MC/RISCV/rvzicbop-valid.s
M llvm/test/MC/RISCV/rvzicboz-invalid.s
A llvm/test/MC/X86/align-branch-convergence.s
M llvm/test/Other/new-pm-defaults.ll
M llvm/test/Other/new-pm-lto-defaults.ll
M llvm/test/Other/new-pm-thinlto-postlink-defaults.ll
M llvm/test/Other/new-pm-thinlto-postlink-pgo-defaults.ll
M llvm/test/Other/new-pm-thinlto-postlink-samplepgo-defaults.ll
A llvm/test/TableGen/GlobalISelCombinerEmitter/match-table-hoisting.td
M llvm/test/TableGen/GlobalISelEmitter/MatchTableOptimizerSameOperand-invalid.td
A llvm/test/Transforms/Attributor/nofpclass-trig.ll
M llvm/test/Transforms/IndVarSimplify/X86/loop-invariant-conditions.ll
M llvm/test/Transforms/Inline/debug-invoke.ll
A llvm/test/Transforms/Inline/inline-history-2.ll
A llvm/test/Transforms/Inline/inline-history-3.ll
A llvm/test/Transforms/Inline/inline-history-invoke.ll
R llvm/test/Transforms/Inline/inline-history-noinline.ll
A llvm/test/Transforms/Inline/inline-history.ll
M llvm/test/Transforms/Inline/inline-recursive-fn2.ll
M llvm/test/Transforms/InstCombine/AArch64/sve-intrinsic-comb-no-active-lanes-stores.ll
M llvm/test/Transforms/InstCombine/AArch64/sve-intrinsic-gatherscatter.ll
M llvm/test/Transforms/InstCombine/NVPTX/nvvm-intrins.ll
M llvm/test/Transforms/InstCombine/clamp-to-minmax.ll
M llvm/test/Transforms/InstCombine/fp-floor-ceil.ll
M llvm/test/Transforms/InstCombine/fpcast.ll
M llvm/test/Transforms/InstCombine/fptrunc.ll
M llvm/test/Transforms/InstCombine/scalable-trunc.ll
M llvm/test/Transforms/InstCombine/scmp.ll
M llvm/test/Transforms/InstCombine/sub-xor-cmp.ll
M llvm/test/Transforms/InstCombine/truncating-saturate.ll
M llvm/test/Transforms/InstCombine/ucmp.ll
M llvm/test/Transforms/InstSimplify/known-never-infinity.ll
M llvm/test/Transforms/InstSimplify/known-never-nan.ll
M llvm/test/Transforms/InterleavedAccess/AArch64/scalable-deinterleave-intrinsics.ll
M llvm/test/Transforms/InterleavedAccess/AArch64/sve-deinterleave4.ll
M llvm/test/Transforms/InterleavedAccess/AArch64/sve-interleave4.ll
M llvm/test/Transforms/InterleavedAccess/AArch64/sve-interleaved-accesses.ll
M llvm/test/Transforms/LoopInterchange/large-nested-6d.ll
R llvm/test/Transforms/LoopUnroll/AMDGPU/expensive-tripcount.ll
A llvm/test/Transforms/LoopUnroll/AMDGPU/scev-mul-expansion-cost.ll
A llvm/test/Transforms/LoopUnroll/expensive-tripcount.ll
M llvm/test/Transforms/LoopVectorize/12-12-11-if-conv.ll
M llvm/test/Transforms/LoopVectorize/2012-10-20-infloop.ll
M llvm/test/Transforms/LoopVectorize/2012-10-22-isconsec.ll
M llvm/test/Transforms/LoopVectorize/2016-07-27-loop-vec.ll
M llvm/test/Transforms/LoopVectorize/AArch64/Oz-and-forced-vectorize.ll
M llvm/test/Transforms/LoopVectorize/AArch64/aarch64-unroll.ll
M llvm/test/Transforms/LoopVectorize/AArch64/arbitrary-induction-step.ll
M llvm/test/Transforms/LoopVectorize/AArch64/arm64-unroll.ll
M llvm/test/Transforms/LoopVectorize/AArch64/binop-costs.ll
M llvm/test/Transforms/LoopVectorize/AArch64/blend-costs.ll
M llvm/test/Transforms/LoopVectorize/AArch64/call-costs.ll
M llvm/test/Transforms/LoopVectorize/AArch64/check-prof-info.ll
M llvm/test/Transforms/LoopVectorize/AArch64/clamped-trip-count.ll
M llvm/test/Transforms/LoopVectorize/AArch64/clmul.ll
M llvm/test/Transforms/LoopVectorize/AArch64/conditional-branches-cost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/drop-poison-generating-flags.ll
M llvm/test/Transforms/LoopVectorize/AArch64/epilog-iv-select-cmp.ll
M llvm/test/Transforms/LoopVectorize/AArch64/epilog-vectorization-widen-inductions.ll
M llvm/test/Transforms/LoopVectorize/AArch64/fixed-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/AArch64/fminimumnum.ll
M llvm/test/Transforms/LoopVectorize/AArch64/fold-tail-low-trip-count.ll
M llvm/test/Transforms/LoopVectorize/AArch64/force-target-instruction-cost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/fully-unrolled-cost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/gather-do-not-vectorize-addressing.ll
M llvm/test/Transforms/LoopVectorize/AArch64/induction-costs-sve.ll
M llvm/test/Transforms/LoopVectorize/AArch64/interleave-with-gaps.ll
M llvm/test/Transforms/LoopVectorize/AArch64/interleaving-load-store.ll
M llvm/test/Transforms/LoopVectorize/AArch64/interleaving-reduction.ll
M llvm/test/Transforms/LoopVectorize/AArch64/intrinsiccost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/licm-calls.ll
M llvm/test/Transforms/LoopVectorize/AArch64/loop-vectorization-factors.ll
M llvm/test/Transforms/LoopVectorize/AArch64/loopvectorize_pr33804_double.ll
M llvm/test/Transforms/LoopVectorize/AArch64/low_trip_count_predicates.ll
M llvm/test/Transforms/LoopVectorize/AArch64/masked-call-scalarize.ll
M llvm/test/Transforms/LoopVectorize/AArch64/masked-call.ll
M llvm/test/Transforms/LoopVectorize/AArch64/masked-op-cost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/masked_ldst_sme.ll
M llvm/test/Transforms/LoopVectorize/AArch64/maxbandwidth-regpressure.ll
M llvm/test/Transforms/LoopVectorize/AArch64/maximize-bandwidth-invalidate.ll
M llvm/test/Transforms/LoopVectorize/AArch64/nontemporal-load-store.ll
M llvm/test/Transforms/LoopVectorize/AArch64/outer_loop_test1_no_explicit_vect_width.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-chained.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-dot-product-epilogue.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-dot-product-mixed.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-dot-product-neon.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-dot-product.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-fdot-product.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-no-dotprod.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-sub.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce.ll
M llvm/test/Transforms/LoopVectorize/AArch64/pr151664-cost-hoisted-vector-scalable.ll
M llvm/test/Transforms/LoopVectorize/AArch64/pr33053.ll
M llvm/test/Transforms/LoopVectorize/AArch64/pr36032.ll
M llvm/test/Transforms/LoopVectorize/AArch64/pr73894.ll
M llvm/test/Transforms/LoopVectorize/AArch64/reg-usage.ll
M llvm/test/Transforms/LoopVectorize/AArch64/replicating-load-store-costs-apple.ll
M llvm/test/Transforms/LoopVectorize/AArch64/replicating-load-store-costs.ll
M llvm/test/Transforms/LoopVectorize/AArch64/runtime-check-size-based-threshold.ll
M llvm/test/Transforms/LoopVectorize/AArch64/runtime-check-trip-count-decisions.ll
M llvm/test/Transforms/LoopVectorize/AArch64/scalable-avoid-scalarization.ll
M llvm/test/Transforms/LoopVectorize/AArch64/scalable-call.ll
M llvm/test/Transforms/LoopVectorize/AArch64/scalable-predicate-instruction.ll
M llvm/test/Transforms/LoopVectorize/AArch64/scalable-reductions-tf.ll
M llvm/test/Transforms/LoopVectorize/AArch64/scalable-reductions.ll
M llvm/test/Transforms/LoopVectorize/AArch64/scalable-strict-fadd.ll
M llvm/test/Transforms/LoopVectorize/AArch64/scalar_interleave.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sdiv-pow2.ll
M llvm/test/Transforms/LoopVectorize/AArch64/select-best-vf-tripcount.ll
M llvm/test/Transforms/LoopVectorize/AArch64/select-index.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sme-vectorize.ll
M llvm/test/Transforms/LoopVectorize/AArch64/strict-fadd-cost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/strict-fadd-vf1.ll
M llvm/test/Transforms/LoopVectorize/AArch64/strict-fadd.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-basic-vec.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-cond-inv-loads.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-epilog-vect-vscale-tune.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-extract-last-veclane.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-fixed-width-inorder-core.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-fneg.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-gather-scatter-cost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-gather-scatter.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-inductions-unusual-types.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-inductions.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-interleaved-accesses-cost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-interleaved-accesses.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-inv-loads.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-inv-store.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-large-strides.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-masked-loadstore.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-select-cmp.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-tail-folding-cost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-tail-folding-option.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-tail-folding-optsize.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-tail-folding-reductions.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-tail-folding-unroll.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-tail-folding.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-type-conv.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-vector-reverse-mask4.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-vector-reverse.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-vscale-based-trip-counts.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-widen-gep.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-widen-phi.ll
M llvm/test/Transforms/LoopVectorize/AArch64/tail-fold-uniform-memops.ll
M llvm/test/Transforms/LoopVectorize/AArch64/tail-folding-styles.ll
M llvm/test/Transforms/LoopVectorize/AArch64/transform-narrow-interleave-to-widen-memory-cost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/type-shrinkage-insertelt.ll
M llvm/test/Transforms/LoopVectorize/AArch64/type-shrinkage-zext-costs.ll
M llvm/test/Transforms/LoopVectorize/AArch64/veclib-calls-libsystem-darwin.ll
M llvm/test/Transforms/LoopVectorize/AArch64/veclib-intrinsic-calls.ll
M llvm/test/Transforms/LoopVectorize/AArch64/vector-reverse-mask4.ll
M llvm/test/Transforms/LoopVectorize/AArch64/vector-reverse.ll
M llvm/test/Transforms/LoopVectorize/AMDGPU/buffer-fat-pointer.ll
M llvm/test/Transforms/LoopVectorize/AMDGPU/divergent-runtime-check.ll
M llvm/test/Transforms/LoopVectorize/AMDGPU/unroll-in-loop-vectorizer.ll
M llvm/test/Transforms/LoopVectorize/ARM/active-lane-mask.ll
M llvm/test/Transforms/LoopVectorize/ARM/arm-ieee-vectorize.ll
M llvm/test/Transforms/LoopVectorize/ARM/arm-unroll.ll
M llvm/test/Transforms/LoopVectorize/ARM/gcc-examples.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-gather-scatter-tailpred.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-icmpcost.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-known-trip-count.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-maskedldst.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-predstorecost.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-qabs.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-recurrence.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-reduction-predselect.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-reduction-types.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-reductions.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-reg-pressure-vmla.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-saddsatcost.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-selectandorcost.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-shiftcost.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-vldn.ll
M llvm/test/Transforms/LoopVectorize/ARM/pointer_iv.ll
M llvm/test/Transforms/LoopVectorize/ARM/scalar-block-cost.ll
M llvm/test/Transforms/LoopVectorize/ARM/tail-fold-multiple-icmps.ll
M llvm/test/Transforms/LoopVectorize/ARM/tail-folding-allowed.ll
M llvm/test/Transforms/LoopVectorize/ARM/tail-folding-counting-down.ll
M llvm/test/Transforms/LoopVectorize/ARM/tail-folding-not-allowed.ll
M llvm/test/Transforms/LoopVectorize/ARM/tail-folding-prefer-flag.ll
M llvm/test/Transforms/LoopVectorize/ARM/width-detect.ll
M llvm/test/Transforms/LoopVectorize/Hexagon/invalidate-cm-after-invalidating-interleavegroups.ll
M llvm/test/Transforms/LoopVectorize/Hexagon/maximum-vf-crash.ll
M llvm/test/Transforms/LoopVectorize/Hexagon/minimum-vf.ll
M llvm/test/Transforms/LoopVectorize/LoongArch/loongarch-interleaved.ll
M llvm/test/Transforms/LoopVectorize/LoongArch/reg-usage.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/interleave_IC.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/large-loop-rdx.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/massv-altivec.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/massv-calls.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/massv-unsupported.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/optimal-epilog-vectorization-profitability.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/pr30990.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/pr41179.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/predcost.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/reg-usage.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/small-loop-rdx.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/stride-vectorization.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/vectorize-bswap.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/vectorize-only-for-real.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/vplan-scalarivsext-crash.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/vsx-tsvc-s173.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/widened-massv-call.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/widened-massv-vfabi-attr.ll
M llvm/test/Transforms/LoopVectorize/RISCV/blocks-with-dead-instructions.ll
M llvm/test/Transforms/LoopVectorize/RISCV/clmul.ll
M llvm/test/Transforms/LoopVectorize/RISCV/dead-ops-cost.ll
M llvm/test/Transforms/LoopVectorize/RISCV/fminimumnum.ll
M llvm/test/Transforms/LoopVectorize/RISCV/fold-tail-low-trip-count.ll
M llvm/test/Transforms/LoopVectorize/RISCV/force-vect-msg.ll
M llvm/test/Transforms/LoopVectorize/RISCV/inloop-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/low-trip-count.ll
M llvm/test/Transforms/LoopVectorize/RISCV/masked_gather_scatter.ll
M llvm/test/Transforms/LoopVectorize/RISCV/only-compute-cost-for-vplan-vfs.ll
M llvm/test/Transforms/LoopVectorize/RISCV/partial-reduce-dot-product.ll
M llvm/test/Transforms/LoopVectorize/RISCV/pr88802.ll
M llvm/test/Transforms/LoopVectorize/RISCV/reductions.ll
M llvm/test/Transforms/LoopVectorize/RISCV/reg-usage-maxbandwidth.ll
M llvm/test/Transforms/LoopVectorize/RISCV/reg-usage.ll
M llvm/test/Transforms/LoopVectorize/RISCV/riscv-interleaved.ll
M llvm/test/Transforms/LoopVectorize/RISCV/riscv-unroll.ll
M llvm/test/Transforms/LoopVectorize/RISCV/riscv-vector-reverse.ll
M llvm/test/Transforms/LoopVectorize/RISCV/select-cmp-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/short-trip-count.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-call-intrinsics.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-cost.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-inloop-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-reduction-cost.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/truncate-to-minimal-bitwidth-evl-crash.ll
M llvm/test/Transforms/LoopVectorize/RISCV/unroll-in-loop-vectorizer.ll
M llvm/test/Transforms/LoopVectorize/SystemZ/mem-interleaving-costs-03.ll
M llvm/test/Transforms/LoopVectorize/SystemZ/pr38110.ll
M llvm/test/Transforms/LoopVectorize/SystemZ/pr47665.ll
M llvm/test/Transforms/LoopVectorize/SystemZ/predicated-first-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/VE/disable_lv.ll
M llvm/test/Transforms/LoopVectorize/VPlan/AArch64/sve-tail-folding-forced.ll
M llvm/test/Transforms/LoopVectorize/VPlan/AArch64/vplan-printing.ll
M llvm/test/Transforms/LoopVectorize/VPlan/AArch64/widen-call-with-intrinsic-or-libfunc.ll
A llvm/test/Transforms/LoopVectorize/VPlan/expand-scev.ll
M llvm/test/Transforms/LoopVectorize/VPlan/first-order-recurrence-sink-replicate-region.ll
M llvm/test/Transforms/LoopVectorize/VPlan/icmp-uniforms.ll
M llvm/test/Transforms/LoopVectorize/VPlan/interleave-and-scalarize-only.ll
M llvm/test/Transforms/LoopVectorize/VPlan/vplan-dot-printing.ll
M llvm/test/Transforms/LoopVectorize/VPlan/vplan-printing-metadata.ll
M llvm/test/Transforms/LoopVectorize/VPlan/vplan-printing-reductions.ll
M llvm/test/Transforms/LoopVectorize/VPlan/vplan-printing.ll
M llvm/test/Transforms/LoopVectorize/VPlan/vplan-stress-test-no-explict-vf.ll
M llvm/test/Transforms/LoopVectorize/WebAssembly/int-mac-reduction-costs.ll
M llvm/test/Transforms/LoopVectorize/WebAssembly/memory-interleave.ll
M llvm/test/Transforms/LoopVectorize/WebAssembly/partial-reduce-accumulate.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/handle-iptr-with-data-layout-to-not-assert.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-f32-stride-2.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-f32-stride-3.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-f32-stride-4.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-f32-stride-5.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-f32-stride-6.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-f32-stride-7.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-f32-stride-8.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-f64-stride-2.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-f64-stride-3.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-f64-stride-4.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-f64-stride-5.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-f64-stride-6.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-f64-stride-7.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-f64-stride-8.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-half.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i16-stride-2.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i16-stride-3.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i16-stride-4.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i16-stride-5.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i16-stride-6.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i16-stride-7.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i16-stride-8.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i32-stride-2-indices-0u.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i32-stride-2.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i32-stride-3-indices-01u.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i32-stride-3-indices-0uu.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i32-stride-3.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i32-stride-4-indices-012u.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i32-stride-4-indices-01uu.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i32-stride-4-indices-0uuu.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i32-stride-4.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i32-stride-5.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i32-stride-6.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i32-stride-7.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i32-stride-8.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i64-stride-2.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i64-stride-3.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i64-stride-4.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i64-stride-5.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i64-stride-6.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i64-stride-7.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i64-stride-8.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i8-stride-2.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i8-stride-3.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i8-stride-4.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i8-stride-5.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i8-stride-6.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i8-stride-7.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i8-stride-8.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-f32-stride-2.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-f32-stride-3.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-f32-stride-4.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-f32-stride-5.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-f32-stride-6.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-f32-stride-7.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-f32-stride-8.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-f64-stride-2.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-f64-stride-3.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-f64-stride-4.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-f64-stride-5.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-f64-stride-6.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-f64-stride-7.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-f64-stride-8.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i16-stride-2.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i16-stride-3.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i16-stride-4.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i16-stride-5.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i16-stride-6.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i16-stride-7.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i16-stride-8.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i32-stride-2.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i32-stride-3.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i32-stride-4.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i32-stride-5.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i32-stride-6.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i32-stride-7.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i32-stride-8.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i64-stride-2.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i64-stride-3.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i64-stride-4.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i64-stride-5.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i64-stride-6.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i64-stride-7.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i64-stride-8.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i8-stride-2.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i8-stride-3.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i8-stride-4.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i8-stride-5.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i8-stride-6.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i8-stride-7.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i8-stride-8.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/masked-interleaved-load-i16.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/masked-interleaved-store-i16.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/masked-scatter-i32-with-i8-index.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/masked-scatter-i64-with-i8-index.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/masked-store-i16.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/masked-store-i32.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/masked-store-i64.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/masked-store-i8.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/scatter-i16-with-i8-index.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/scatter-i32-with-i8-index.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/scatter-i64-with-i8-index.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/scatter-i8-with-i8-index.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/strided-load-i16.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/strided-load-i32.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/strided-load-i64.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/strided-load-i8.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/vpinstruction-cost.ll
M llvm/test/Transforms/LoopVectorize/X86/already-vectorized.ll
M llvm/test/Transforms/LoopVectorize/X86/amdlibm-calls-finite.ll
M llvm/test/Transforms/LoopVectorize/X86/amdlibm-calls.ll
M llvm/test/Transforms/LoopVectorize/X86/avx1.ll
M llvm/test/Transforms/LoopVectorize/X86/avx512.ll
M llvm/test/Transforms/LoopVectorize/X86/clmul.ll
M llvm/test/Transforms/LoopVectorize/X86/consecutive-ptr-cg-bug.ll
M llvm/test/Transforms/LoopVectorize/X86/consecutive-ptr-uniforms.ll
M llvm/test/Transforms/LoopVectorize/X86/conversion-cost.ll
M llvm/test/Transforms/LoopVectorize/X86/cost-divisor-overflow.ll
M llvm/test/Transforms/LoopVectorize/X86/cost-model-assert.ll
M llvm/test/Transforms/LoopVectorize/X86/cost-model.ll
M llvm/test/Transforms/LoopVectorize/X86/drop-inbounds-flags-for-reverse-vector-pointer.ll
M llvm/test/Transforms/LoopVectorize/X86/ephemeral-recipes.ll
M llvm/test/Transforms/LoopVectorize/X86/fixed-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/X86/float-induction-x86.ll
M llvm/test/Transforms/LoopVectorize/X86/fminimumnum.ll
M llvm/test/Transforms/LoopVectorize/X86/fneg-cost.ll
M llvm/test/Transforms/LoopVectorize/X86/fp32_to_uint32-cost-model.ll
M llvm/test/Transforms/LoopVectorize/X86/fp64_to_uint32-cost-model.ll
M llvm/test/Transforms/LoopVectorize/X86/fp80-widest-type.ll
M llvm/test/Transforms/LoopVectorize/X86/fp_to_sint8-cost-model.ll
M llvm/test/Transforms/LoopVectorize/X86/funclet.ll
M llvm/test/Transforms/LoopVectorize/X86/gather-vs-interleave.ll
M llvm/test/Transforms/LoopVectorize/X86/gather_scatter.ll
M llvm/test/Transforms/LoopVectorize/X86/gcc-examples.ll
M llvm/test/Transforms/LoopVectorize/X86/illegal-parallel-loop-uniform-write.ll
M llvm/test/Transforms/LoopVectorize/X86/int128_no_gather.ll
M llvm/test/Transforms/LoopVectorize/X86/interleave-ptradd-with-replicated-operand.ll
M llvm/test/Transforms/LoopVectorize/X86/interleave_short_tc.ll
M llvm/test/Transforms/LoopVectorize/X86/interleaved-accesses-large-gap.ll
M llvm/test/Transforms/LoopVectorize/X86/interleaved-accesses-use-after-free.ll
M llvm/test/Transforms/LoopVectorize/X86/interleaved-accesses-waw-dependency.ll
M llvm/test/Transforms/LoopVectorize/X86/interleaving.ll
M llvm/test/Transforms/LoopVectorize/X86/intrinsiccost.ll
M llvm/test/Transforms/LoopVectorize/X86/invariant-load-gather.ll
M llvm/test/Transforms/LoopVectorize/X86/invariant-store-vectorization.ll
M llvm/test/Transforms/LoopVectorize/X86/libm-vector-calls-VF2-VF8.ll
M llvm/test/Transforms/LoopVectorize/X86/libm-vector-calls-finite.ll
M llvm/test/Transforms/LoopVectorize/X86/libm-vector-calls.ll
M llvm/test/Transforms/LoopVectorize/X86/masked_load_store.ll
M llvm/test/Transforms/LoopVectorize/X86/max-mstore.ll
R llvm/test/Transforms/LoopVectorize/X86/metadata-enable.ll
M llvm/test/Transforms/LoopVectorize/X86/min-trip-count-switch.ll
M llvm/test/Transforms/LoopVectorize/X86/mul_slm_16bit.ll
M llvm/test/Transforms/LoopVectorize/X86/no-vector.ll
M llvm/test/Transforms/LoopVectorize/X86/no_fpmath.ll
M llvm/test/Transforms/LoopVectorize/X86/no_fpmath_with_hotness.ll
M llvm/test/Transforms/LoopVectorize/X86/nontemporal.ll
M llvm/test/Transforms/LoopVectorize/X86/optsize.ll
M llvm/test/Transforms/LoopVectorize/X86/outer_loop_test1_no_explicit_vect_width.ll
M llvm/test/Transforms/LoopVectorize/X86/parallel-loops-after-reg2mem.ll
M llvm/test/Transforms/LoopVectorize/X86/parallel-loops.ll
M llvm/test/Transforms/LoopVectorize/X86/pointer-runtime-checks-unprofitable.ll
M llvm/test/Transforms/LoopVectorize/X86/powof2div.ll
M llvm/test/Transforms/LoopVectorize/X86/pr141968-instsimplifyfolder.ll
M llvm/test/Transforms/LoopVectorize/X86/pr23997.ll
M llvm/test/Transforms/LoopVectorize/X86/pr35432.ll
M llvm/test/Transforms/LoopVectorize/X86/pr39160.ll
M llvm/test/Transforms/LoopVectorize/X86/pr42674.ll
M llvm/test/Transforms/LoopVectorize/X86/pr48340.ll
M llvm/test/Transforms/LoopVectorize/X86/pr54634.ll
M llvm/test/Transforms/LoopVectorize/X86/pr81872.ll
M llvm/test/Transforms/LoopVectorize/X86/propagate-metadata.ll
M llvm/test/Transforms/LoopVectorize/X86/reg-usage-debug.ll
M llvm/test/Transforms/LoopVectorize/X86/reg-usage.ll
M llvm/test/Transforms/LoopVectorize/X86/register-assumption.ll
M llvm/test/Transforms/LoopVectorize/X86/replicate-recipe-with-only-first-lane-used.ll
M llvm/test/Transforms/LoopVectorize/X86/replicate-uniform-call.ll
M llvm/test/Transforms/LoopVectorize/X86/replicating-load-store-costs.ll
M llvm/test/Transforms/LoopVectorize/X86/runtime-limit.ll
M llvm/test/Transforms/LoopVectorize/X86/scatter_crash.ll
M llvm/test/Transforms/LoopVectorize/X86/slm-no-vectorize.ll
M llvm/test/Transforms/LoopVectorize/X86/small-size.ll
M llvm/test/Transforms/LoopVectorize/X86/strided_load_cost.ll
M llvm/test/Transforms/LoopVectorize/X86/svml-calls-finite.ll
M llvm/test/Transforms/LoopVectorize/X86/svml-calls.ll
M llvm/test/Transforms/LoopVectorize/X86/tail_loop_folding.ll
M llvm/test/Transforms/LoopVectorize/X86/uint64_to_fp64-cost-model.ll
M llvm/test/Transforms/LoopVectorize/X86/uniform-phi.ll
M llvm/test/Transforms/LoopVectorize/X86/uniform_mem_op.ll
M llvm/test/Transforms/LoopVectorize/X86/unroll-pm.ll
M llvm/test/Transforms/LoopVectorize/X86/unroll-small-loops.ll
M llvm/test/Transforms/LoopVectorize/X86/unroll_selection.ll
M llvm/test/Transforms/LoopVectorize/X86/veclib-calls.ll
M llvm/test/Transforms/LoopVectorize/X86/vect.omp.force.ll
M llvm/test/Transforms/LoopVectorize/X86/vector_ptr_load_store.ll
M llvm/test/Transforms/LoopVectorize/X86/vectorization-remarks-loopid-dbg.ll
M llvm/test/Transforms/LoopVectorize/X86/vectorization-remarks-missed.ll
M llvm/test/Transforms/LoopVectorize/X86/vectorization-remarks-profitable.ll
M llvm/test/Transforms/LoopVectorize/X86/vectorization-remarks.ll
M llvm/test/Transforms/LoopVectorize/X86/x86_fp80-vector-store.ll
M llvm/test/Transforms/LoopVectorize/align.ll
M llvm/test/Transforms/LoopVectorize/assume.ll
M llvm/test/Transforms/LoopVectorize/branch-weights.ll
M llvm/test/Transforms/LoopVectorize/bzip_reverse_loops.ll
M llvm/test/Transforms/LoopVectorize/calloc.ll
M llvm/test/Transforms/LoopVectorize/check-no-vectorize.ll
M llvm/test/Transforms/LoopVectorize/check-prof-info.ll
M llvm/test/Transforms/LoopVectorize/conditional-assignment.ll
M llvm/test/Transforms/LoopVectorize/consec_no_gep.ll
M llvm/test/Transforms/LoopVectorize/constantfolder-infer-correct-gepty.ll
M llvm/test/Transforms/LoopVectorize/constantfolder.ll
M llvm/test/Transforms/LoopVectorize/control-flow.ll
M llvm/test/Transforms/LoopVectorize/cpp-new-array.ll
M llvm/test/Transforms/LoopVectorize/create-induction-resume.ll
M llvm/test/Transforms/LoopVectorize/dbg-outer-loop-vect.ll
M llvm/test/Transforms/LoopVectorize/dbg.value.ll
M llvm/test/Transforms/LoopVectorize/debugloc-optimize-vfuf-term.ll
M llvm/test/Transforms/LoopVectorize/debugloc.ll
M llvm/test/Transforms/LoopVectorize/dereferenceable-info-from-assumption-constant-size-needs-loop-guards.ll
M llvm/test/Transforms/LoopVectorize/dereferenceable-info-from-assumption-constant-size.ll
M llvm/test/Transforms/LoopVectorize/dereferenceable-info-from-assumption-variable-size.ll
M llvm/test/Transforms/LoopVectorize/diag-missing-instr-debug-loc.ll
M llvm/test/Transforms/LoopVectorize/diag-with-hotness-info-2.ll
M llvm/test/Transforms/LoopVectorize/diag-with-hotness-info.ll
M llvm/test/Transforms/LoopVectorize/discriminator.ll
M llvm/test/Transforms/LoopVectorize/dont-fold-tail-for-divisible-TC.ll
M llvm/test/Transforms/LoopVectorize/early_exit_legality.ll
M llvm/test/Transforms/LoopVectorize/ee-crash.ll
M llvm/test/Transforms/LoopVectorize/epilog-iv-select-cmp.ll
M llvm/test/Transforms/LoopVectorize/epilog-vectorization-any-of-reductions.ll
A llvm/test/Transforms/LoopVectorize/epilog-vectorization-dead-epilogue.ll
M llvm/test/Transforms/LoopVectorize/epilog-vectorization-reductions.ll
M llvm/test/Transforms/LoopVectorize/epilog-vectorization-scev-expansion.ll
M llvm/test/Transforms/LoopVectorize/epilog-vectorization-trunc-induction-steps.ll
M llvm/test/Transforms/LoopVectorize/epilog-vectorization-vector-trip-count-zero.ll
M llvm/test/Transforms/LoopVectorize/explicit_outer_detection.ll
M llvm/test/Transforms/LoopVectorize/explicit_outer_nonuniform_inner.ll
M llvm/test/Transforms/LoopVectorize/explicit_outer_uniform_diverg_branch.ll
M llvm/test/Transforms/LoopVectorize/extract-last-veclane.ll
M llvm/test/Transforms/LoopVectorize/fcmp-vectorize.ll
M llvm/test/Transforms/LoopVectorize/find-last-iv-sinkable-expr.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence-complex.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence-multiply-recurrences.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/fix-reduction-dbg.ll
M llvm/test/Transforms/LoopVectorize/float-induction.ll
M llvm/test/Transforms/LoopVectorize/float-minmax-instruction-flag.ll
M llvm/test/Transforms/LoopVectorize/float-reduction.ll
M llvm/test/Transforms/LoopVectorize/forked-pointers.ll
M llvm/test/Transforms/LoopVectorize/fpsat.ll
M llvm/test/Transforms/LoopVectorize/funcall.ll
M llvm/test/Transforms/LoopVectorize/gcc-examples.ll
M llvm/test/Transforms/LoopVectorize/global_alias.ll
M llvm/test/Transforms/LoopVectorize/i8-induction.ll
M llvm/test/Transforms/LoopVectorize/if-conv-crash.ll
M llvm/test/Transforms/LoopVectorize/if-conversion-reduction.ll
M llvm/test/Transforms/LoopVectorize/if-conversion.ll
M llvm/test/Transforms/LoopVectorize/if-pred-non-void.ll
M llvm/test/Transforms/LoopVectorize/if-pred-not-when-safe.ll
M llvm/test/Transforms/LoopVectorize/if-reduction.ll
M llvm/test/Transforms/LoopVectorize/incorrect-dom-info.ll
M llvm/test/Transforms/LoopVectorize/increment.ll
M llvm/test/Transforms/LoopVectorize/induction-step.ll
M llvm/test/Transforms/LoopVectorize/induction.ll
M llvm/test/Transforms/LoopVectorize/infiniteloop.ll
M llvm/test/Transforms/LoopVectorize/instruction-only-used-outside-of-loop.ll
M llvm/test/Transforms/LoopVectorize/int_sideeffect.ll
M llvm/test/Transforms/LoopVectorize/interleaved-accesses-different-insert-position.ll
M llvm/test/Transforms/LoopVectorize/interleaved-accesses-gep-nowrap-flags.ll
M llvm/test/Transforms/LoopVectorize/interleaved-accesses-metadata.ll
M llvm/test/Transforms/LoopVectorize/interleaved-accesses.ll
M llvm/test/Transforms/LoopVectorize/intrinsic.ll
M llvm/test/Transforms/LoopVectorize/invariant-store-vectorization-2.ll
M llvm/test/Transforms/LoopVectorize/invariant-store-vectorization.ll
M llvm/test/Transforms/LoopVectorize/is_fpclass.ll
M llvm/test/Transforms/LoopVectorize/iv-select-cmp-decreasing.ll
M llvm/test/Transforms/LoopVectorize/iv-select-cmp-no-wrap.ll
M llvm/test/Transforms/LoopVectorize/iv-select-cmp-trunc.ll
M llvm/test/Transforms/LoopVectorize/iv-select-cmp.ll
M llvm/test/Transforms/LoopVectorize/lifetime.ll
M llvm/test/Transforms/LoopVectorize/loop-vect-memdep.ll
M llvm/test/Transforms/LoopVectorize/memory-dep-remarks.ll
M llvm/test/Transforms/LoopVectorize/metadata-unroll.ll
M llvm/test/Transforms/LoopVectorize/metadata-width.ll
M llvm/test/Transforms/LoopVectorize/min-trip-count-known-via-scev.ll
M llvm/test/Transforms/LoopVectorize/minimumnum-maximumnum-reductions.ll
M llvm/test/Transforms/LoopVectorize/minmax_reduction.ll
M llvm/test/Transforms/LoopVectorize/multiple-address-spaces.ll
M llvm/test/Transforms/LoopVectorize/nested-loops-scev-expansion.ll
A llvm/test/Transforms/LoopVectorize/nested-outer-loop-vect.ll
M llvm/test/Transforms/LoopVectorize/no-interleave-up-front.ll
M llvm/test/Transforms/LoopVectorize/no_array_bounds.ll
M llvm/test/Transforms/LoopVectorize/no_array_bounds_scalable.ll
M llvm/test/Transforms/LoopVectorize/no_int_induction.ll
M llvm/test/Transforms/LoopVectorize/no_outside_user.ll
M llvm/test/Transforms/LoopVectorize/no_switch.ll
M llvm/test/Transforms/LoopVectorize/no_switch_disable_vectorization.ll
M llvm/test/Transforms/LoopVectorize/noalias-md.ll
M llvm/test/Transforms/LoopVectorize/noalias-scope-decl-outer-loop.ll
M llvm/test/Transforms/LoopVectorize/noalias-scope-decl.ll
M llvm/test/Transforms/LoopVectorize/nofloat-report.ll
M llvm/test/Transforms/LoopVectorize/nofloat.ll
M llvm/test/Transforms/LoopVectorize/non-widenable-intrinsics-outer-loop.ll
M llvm/test/Transforms/LoopVectorize/nontemporal.ll
M llvm/test/Transforms/LoopVectorize/nounroll.ll
M llvm/test/Transforms/LoopVectorize/optimal-epilog-vectorization-limitations.ll
M llvm/test/Transforms/LoopVectorize/optimal-epilog-vectorization-liveout.ll
M llvm/test/Transforms/LoopVectorize/optimal-epilog-vectorization.ll
M llvm/test/Transforms/LoopVectorize/optsize.ll
M llvm/test/Transforms/LoopVectorize/outer-loop-vec-phi-predecessor-order.ll
M llvm/test/Transforms/LoopVectorize/outer-loop-wide-phis.ll
M llvm/test/Transforms/LoopVectorize/outer_loop_hcfg_construction.ll
M llvm/test/Transforms/LoopVectorize/outer_loop_test1.ll
M llvm/test/Transforms/LoopVectorize/outer_loop_test2.ll
M llvm/test/Transforms/LoopVectorize/partial-lcssa.ll
M llvm/test/Transforms/LoopVectorize/phi-hang.ll
M llvm/test/Transforms/LoopVectorize/pointer-induction-unroll.ll
M llvm/test/Transforms/LoopVectorize/pointer-induction.ll
M llvm/test/Transforms/LoopVectorize/pr28541.ll
M llvm/test/Transforms/LoopVectorize/pr31190.ll
M llvm/test/Transforms/LoopVectorize/pr32859.ll
M llvm/test/Transforms/LoopVectorize/pr33706.ll
M llvm/test/Transforms/LoopVectorize/pr35743.ll
M llvm/test/Transforms/LoopVectorize/pr36311.ll
M llvm/test/Transforms/LoopVectorize/pr38697.ll
M llvm/test/Transforms/LoopVectorize/pr38800.ll
M llvm/test/Transforms/LoopVectorize/pr44488-predication.ll
M llvm/test/Transforms/LoopVectorize/pr45525.ll
M llvm/test/Transforms/LoopVectorize/pr47343-expander-lcssa-after-cfg-update.ll
M llvm/test/Transforms/LoopVectorize/pr48832.ll
M llvm/test/Transforms/LoopVectorize/pr50686.ll
M llvm/test/Transforms/LoopVectorize/pr55167-fold-tail-live-out.ll
M llvm/test/Transforms/LoopVectorize/pr59319-loop-access-info-invalidation.ll
M llvm/test/Transforms/LoopVectorize/predicated-multiple-exits.ll
M llvm/test/Transforms/LoopVectorize/predicatedinst-loop-invariant.ll
M llvm/test/Transforms/LoopVectorize/preserve-dbg-loc-and-loop-metadata.ll
M llvm/test/Transforms/LoopVectorize/pseudoprobe.ll
M llvm/test/Transforms/LoopVectorize/ptr-induction.ll
M llvm/test/Transforms/LoopVectorize/ptr_loops.ll
M llvm/test/Transforms/LoopVectorize/read-only.ll
M llvm/test/Transforms/LoopVectorize/reduction-inloop-min-max.ll
M llvm/test/Transforms/LoopVectorize/reduction-inloop-pred.ll
M llvm/test/Transforms/LoopVectorize/reduction-inloop-uf4.ll
M llvm/test/Transforms/LoopVectorize/reduction-inloop.ll
M llvm/test/Transforms/LoopVectorize/reduction-minmax-users-and-predicated.ll
M llvm/test/Transforms/LoopVectorize/reduction-predselect.ll
M llvm/test/Transforms/LoopVectorize/reduction-with-invariant-store.ll
M llvm/test/Transforms/LoopVectorize/reduction.ll
M llvm/test/Transforms/LoopVectorize/remarks-multi-exit-loops.ll
M llvm/test/Transforms/LoopVectorize/remarks-reduction-inloop.ll
M llvm/test/Transforms/LoopVectorize/reuse-lcssa-phi-scev-expansion.ll
M llvm/test/Transforms/LoopVectorize/reverse_iter.ll
M llvm/test/Transforms/LoopVectorize/runtime-check-address-space.ll
M llvm/test/Transforms/LoopVectorize/runtime-check-pointer-element-type.ll
M llvm/test/Transforms/LoopVectorize/runtime-check-readonly-address-space.ll
M llvm/test/Transforms/LoopVectorize/runtime-check.ll
M llvm/test/Transforms/LoopVectorize/same-base-access.ll
M llvm/test/Transforms/LoopVectorize/scalable-assume.ll
M llvm/test/Transforms/LoopVectorize/scalable-inductions.ll
M llvm/test/Transforms/LoopVectorize/scalable-lifetime.ll
M llvm/test/Transforms/LoopVectorize/scalable-noalias-scope-decl.ll
M llvm/test/Transforms/LoopVectorize/scalable-reduction-inloop.ll
M llvm/test/Transforms/LoopVectorize/scalable-trunc-min-bitwidth.ll
M llvm/test/Transforms/LoopVectorize/scalar-select.ll
M llvm/test/Transforms/LoopVectorize/scalarized-bitcast.ll
M llvm/test/Transforms/LoopVectorize/scev-exitlim-crash.ll
M llvm/test/Transforms/LoopVectorize/scev-predicate-reasoning.ll
M llvm/test/Transforms/LoopVectorize/select-cmp-multiuse.ll
M llvm/test/Transforms/LoopVectorize/select-cmp-predicated.ll
M llvm/test/Transforms/LoopVectorize/select-cmp.ll
M llvm/test/Transforms/LoopVectorize/select-first-index-fp.ll
M llvm/test/Transforms/LoopVectorize/select-min-max-last-index-epilogue.ll
M llvm/test/Transforms/LoopVectorize/select-smax-last-index.ll
M llvm/test/Transforms/LoopVectorize/select-smin-last-index.ll
M llvm/test/Transforms/LoopVectorize/select-umax-last-index.ll
M llvm/test/Transforms/LoopVectorize/select-umin-first-index.ll
M llvm/test/Transforms/LoopVectorize/select-umin-last-index.ll
M llvm/test/Transforms/LoopVectorize/simple-unroll.ll
M llvm/test/Transforms/LoopVectorize/single_early_exit.ll
M llvm/test/Transforms/LoopVectorize/skip-iterations.ll
M llvm/test/Transforms/LoopVectorize/small-loop.ll
M llvm/test/Transforms/LoopVectorize/smax-idx.ll
M llvm/test/Transforms/LoopVectorize/start-non-zero.ll
M llvm/test/Transforms/LoopVectorize/struct_access.ll
M llvm/test/Transforms/LoopVectorize/tbaa-nodep.ll
M llvm/test/Transforms/LoopVectorize/trip-count-expansion-may-introduce-ub.ll
M llvm/test/Transforms/LoopVectorize/tripcount.ll
M llvm/test/Transforms/LoopVectorize/uncountable-single-exit-loops.ll
M llvm/test/Transforms/LoopVectorize/uniform-blend.ll
M llvm/test/Transforms/LoopVectorize/unroll-novec-memcheck-metadata.ll
M llvm/test/Transforms/LoopVectorize/unroll.ll
M llvm/test/Transforms/LoopVectorize/unroll_novec.ll
M llvm/test/Transforms/LoopVectorize/unsafe-dep-remark.ll
M llvm/test/Transforms/LoopVectorize/unsafe-vf-hint-remark.ll
M llvm/test/Transforms/LoopVectorize/vect.stats.ll
M llvm/test/Transforms/LoopVectorize/vector-intrinsic-call-cost.ll
M llvm/test/Transforms/LoopVectorize/vector-loop-backedge-elimination.ll
M llvm/test/Transforms/LoopVectorize/vector-no-scevcheck.ll
M llvm/test/Transforms/LoopVectorize/vectorize-once.ll
M llvm/test/Transforms/LoopVectorize/vectorize-pointer-phis.ll
M llvm/test/Transforms/LoopVectorize/vplan-incomplete-cases.ll
M llvm/test/Transforms/LoopVectorize/vplan-native-path-inner-loop-with-runtime-checks.ll
M llvm/test/Transforms/LoopVectorize/vplan-outer-loop-uncomputable-trip-count.ll
M llvm/test/Transforms/LoopVectorize/vplan-vectorize-inner-loop-reduction.ll
M llvm/test/Transforms/LoopVectorize/vplan-widen-call-instruction.ll
M llvm/test/Transforms/LoopVectorize/write-only.ll
M llvm/test/Transforms/ObjCARC/test_autorelease_pool.ll
M llvm/test/Transforms/PhaseOrdering/AArch64/sve-interleave-vectorization.ll
A llvm/test/Transforms/PhaseOrdering/X86/loop-vectorize-metadata.ll
A llvm/test/Transforms/SLPVectorizer/AMDGPU/notriviallyvectorizableintrinsicoperands.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/basic-strided-stores.ll
A llvm/test/Transforms/SLPVectorizer/RISCV/revec-strided-load.ll
M llvm/test/Transforms/SeparateConstOffsetFromGEP/RISCV/split-gep.ll
A llvm/test/Transforms/SimplifyCFG/profile-update-unreachable.ll
M llvm/test/Verifier/call-to-non-callable-functions.ll
A llvm/test/Verifier/inline-history-metadata.ll
A llvm/test/Verifier/masked-divrem.ll
M llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/x86-non-temporal.ll.filter-out.expected
M llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/x86-non-temporal.ll.multifilter.expected
M llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/x86-non-temporal.ll.nofilter.expected
M llvm/test/tools/llvm-ir2vec/bindings/ir2vec-getBBEmbMap.py
M llvm/test/tools/llvm-ir2vec/bindings/ir2vec-getFuncEmb.py
M llvm/test/tools/llvm-ir2vec/bindings/ir2vec-getFuncEmbMap.py
M llvm/test/tools/llvm-ir2vec/bindings/ir2vec-getFuncNames.py
M llvm/test/tools/llvm-ir2vec/bindings/ir2vec-getInstEmbMap.py
M llvm/test/tools/llvm-ir2vec/bindings/ir2vec-initEmbedding.py
A llvm/test/tools/llvm-mca/AMDGPU/gfx12-permlane16-cycles.s
M llvm/test/tools/llvm-mca/RISCV/Inputs/rvv/mask.s
M llvm/test/tools/llvm-mca/RISCV/SiFiveP400/rvv/mask.test
M llvm/test/tools/llvm-mca/RISCV/SiFiveP600/rvv/mask.test
M llvm/test/tools/llvm-mca/RISCV/SiFiveX100/rvv/mask.test
A llvm/test/tools/llvm-mca/RISCV/SiFiveX390/atomic.test
R llvm/test/tools/llvm-mca/RISCV/SiFiveX390/div-fdiv.s
A llvm/test/tools/llvm-mca/RISCV/SiFiveX390/floating-point.test
R llvm/test/tools/llvm-mca/RISCV/SiFiveX390/fractional-lmul-data.s
A llvm/test/tools/llvm-mca/RISCV/SiFiveX390/integer.test
A llvm/test/tools/llvm-mca/RISCV/SiFiveX390/mul-div.test
R llvm/test/tools/llvm-mca/RISCV/SiFiveX390/reductions.s
A llvm/test/tools/llvm-mca/RISCV/SiFiveX390/rvv/arithmetic.test
A llvm/test/tools/llvm-mca/RISCV/SiFiveX390/rvv/bitwise.test
A llvm/test/tools/llvm-mca/RISCV/SiFiveX390/rvv/comparison.test
A llvm/test/tools/llvm-mca/RISCV/SiFiveX390/rvv/conversion.test
A llvm/test/tools/llvm-mca/RISCV/SiFiveX390/rvv/fma.test
A llvm/test/tools/llvm-mca/RISCV/SiFiveX390/rvv/fp.test
A llvm/test/tools/llvm-mca/RISCV/SiFiveX390/rvv/mask.test
A llvm/test/tools/llvm-mca/RISCV/SiFiveX390/rvv/minmax.test
A llvm/test/tools/llvm-mca/RISCV/SiFiveX390/rvv/mul-div.test
A llvm/test/tools/llvm-mca/RISCV/SiFiveX390/rvv/permutation.test
A llvm/test/tools/llvm-mca/RISCV/SiFiveX390/rvv/reduction.test
A llvm/test/tools/llvm-mca/RISCV/SiFiveX390/rvv/strided-load-x0.s
A llvm/test/tools/llvm-mca/RISCV/SiFiveX390/rvv/vle-vse-vlm.test
A llvm/test/tools/llvm-mca/RISCV/SiFiveX390/rvv/vlse-vsse.test
A llvm/test/tools/llvm-mca/RISCV/SiFiveX390/rvv/vlseg-vsseg.test
A llvm/test/tools/llvm-mca/RISCV/SiFiveX390/rvv/vlxe-vsxe.test
R llvm/test/tools/llvm-mca/RISCV/SiFiveX390/strided-load-store.s
R llvm/test/tools/llvm-mca/RISCV/SiFiveX390/strided-load-x0.s
R llvm/test/tools/llvm-mca/RISCV/SiFiveX390/vector-fp.s
R llvm/test/tools/llvm-mca/RISCV/SiFiveX390/vector-integer-arithmetic.s
R llvm/test/tools/llvm-mca/RISCV/SiFiveX390/vle-vse.s
R llvm/test/tools/llvm-mca/RISCV/SiFiveX390/vrgather-vcompress.s
A llvm/test/tools/llvm-mca/RISCV/SiFiveX390/zba.test
A llvm/test/tools/llvm-mca/RISCV/SiFiveX390/zbb.test
A llvm/test/tools/llvm-mca/RISCV/SiFiveX390/zbs.test
A llvm/test/tools/llvm-mca/RISCV/SiFiveX390/zfh.test
A llvm/test/tools/llvm-mca/RISCV/SiFiveX390/zfhmin.test
A llvm/test/tools/llvm-mca/RISCV/SiFiveX390/zicond.test
M llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv/mask.test
A llvm/test/tools/llvm-objdump/lit.local.cfg
A llvm/test/tools/llvm-objdump/wasm/line-numbers.s
A llvm/test/tools/llvm-symbolizer/lit.local.cfg
M llvm/test/tools/llvm-symbolizer/wasm-basic.s
M llvm/tools/llvm-exegesis/lib/Assembler.cpp
M llvm/tools/llvm-ir2vec/Bindings/PyIR2Vec.cpp
M llvm/tools/llvm-ir2vec/lib/Utils.cpp
M llvm/tools/llvm-ir2vec/lib/Utils.h
M llvm/tools/llvm-ir2vec/llvm-ir2vec.cpp
M llvm/tools/llvm-profgen/ProfiledBinary.cpp
M llvm/tools/llvm-profgen/ProfiledBinary.h
M llvm/unittests/ADT/PostOrderIteratorTest.cpp
M llvm/unittests/ADT/SmallVectorTest.cpp
M llvm/unittests/Analysis/InlineOrderPlugin/InlineOrderPlugin.cpp
M llvm/unittests/CodeGen/MFCommon.inc
M llvm/unittests/CodeGen/MachineInstrTest.cpp
M llvm/unittests/CodeGen/MachineOperandTest.cpp
M llvm/unittests/Frontend/OpenMPIRBuilderTest.cpp
M llvm/unittests/MC/DwarfLineTableHeaders.cpp
M llvm/unittests/Support/ErrorTest.cpp
M llvm/unittests/Support/raw_socket_stream_test.cpp
M llvm/unittests/Target/AArch64/AArch64InstPrinterTest.cpp
M llvm/unittests/Target/SPIRV/SPIRVGlobalRegistryTests.cpp
M llvm/unittests/Transforms/Vectorize/VPDomTreeTest.cpp
M llvm/unittests/Transforms/Vectorize/VPlanTest.cpp
M llvm/utils/TableGen/Common/GlobalISel/GlobalISelMatchTable.cpp
M llvm/utils/TableGen/Common/GlobalISel/GlobalISelMatchTable.h
M llvm/utils/git/github-automation.py
M llvm/utils/gn/secondary/clang/include/clang/Basic/BUILD.gn
M llvm/utils/gn/secondary/clang/lib/Basic/BUILD.gn
M llvm/utils/gn/secondary/clang/lib/ScalableStaticAnalysisFramework/Analyses/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/Demangle/BUILD.gn
M mlir/include/mlir-c/Dialect/LLVM.h
M mlir/include/mlir/Dialect/ArmSME/IR/ArmSMEIntrinsicOps.td
M mlir/include/mlir/Dialect/LLVMIR/LLVMAttrDefs.td
M mlir/include/mlir/Dialect/LLVMIR/LLVMDialectBytecode.td
M mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
M mlir/include/mlir/Dialect/LLVMIR/NVVMRequiresSMTraits.h
M mlir/include/mlir/Dialect/LLVMIR/NVVMRequiresSMTraits.td
M mlir/include/mlir/Dialect/LLVMIR/ROCDLOps.td
M mlir/include/mlir/Dialect/LLVMIR/XeVMOps.td
M mlir/include/mlir/Dialect/OpenMP/OpenMPOps.td
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVTosaOps.h
M mlir/include/mlir/Dialect/Vector/Utils/VectorUtils.h
M mlir/include/mlir/Dialect/XeGPU/IR/XeGPUTypes.td
M mlir/include/mlir/Dialect/XeGPU/Utils/XeGPUUtils.h
M mlir/include/mlir/IR/EnumAttr.td
M mlir/include/mlir/IR/Iterators.h
M mlir/include/mlir/IR/Value.h
M mlir/lib/CAPI/Dialect/LLVM.cpp
M mlir/lib/Conversion/XeGPUToXeVM/XeGPUToXeVM.cpp
M mlir/lib/Conversion/XeVMToLLVM/XeVMToLLVM.cpp
M mlir/lib/Dialect/ArmSME/Transforms/EnableArmStreaming.cpp
M mlir/lib/Dialect/LLVMIR/IR/LLVMAttrs.cpp
M mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp
M mlir/lib/Dialect/Linalg/Transforms/Vectorization.cpp
M mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
M mlir/lib/Dialect/Vector/IR/VectorOps.cpp
M mlir/lib/Dialect/Vector/Utils/VectorUtils.cpp
M mlir/lib/Dialect/XeGPU/IR/XeGPUDialect.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUBlocking.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUPeepHoleOptimizer.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUSubgroupDistribute.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUWgToSgDistribute.cpp
M mlir/lib/Dialect/XeGPU/Utils/XeGPUUtils.cpp
M mlir/lib/Target/LLVMIR/DebugImporter.cpp
M mlir/lib/Target/LLVMIR/DebugTranslation.cpp
M mlir/lib/Target/LLVMIR/DebugTranslation.h
M mlir/lib/Target/SPIRV/Deserialization/Deserializer.cpp
M mlir/test/CAPI/llvm.c
M mlir/test/Conversion/XeGPUToXeVM/loadstore_1d.mlir
M mlir/test/Conversion/XeGPUToXeVM/loadstore_nd.mlir
M mlir/test/Conversion/XeGPUToXeVM/loadstore_nd_sub_byte.mlir
M mlir/test/Conversion/XeGPUToXeVM/loadstoreprefetch.mlir
M mlir/test/Conversion/XeGPUToXeVM/prefetch_nd.mlir
M mlir/test/Conversion/XeGPUToXeVM/prefetch_nd_sub_byte.mlir
M mlir/test/Conversion/XeVMToLLVM/xevm-to-llvm.mlir
M mlir/test/Dialect/ArmSME/enable-arm-streaming.mlir
M mlir/test/Dialect/ArmSME/enable-arm-za.mlir
M mlir/test/Dialect/LLVMIR/nvvm-check-targetSM.mlir
M mlir/test/Dialect/OpenMP/invalid.mlir
M mlir/test/Dialect/Vector/canonicalize.mlir
M mlir/test/Dialect/XeGPU/xegpu-blocking.mlir
M mlir/test/Dialect/XeGPU/xegpu-vector-linearize.mlir
M mlir/test/Integration/GPU/LevelZero/gpu-addf32-to-spirv.mlir
M mlir/test/Integration/GPU/LevelZero/gpu-addi64-to-spirv.mlir
M mlir/test/Integration/GPU/LevelZero/gpu-memcpy-addf32-to-spirv.mlir
M mlir/test/Integration/GPU/LevelZero/gpu-reluf32-to-spirv.mlir
M mlir/test/Target/LLVMIR/Import/debug-info.ll
M mlir/test/Target/LLVMIR/Import/global-variables.ll
M mlir/test/Target/LLVMIR/llvmir-debug.mlir
A mlir/test/Target/LLVMIR/omptarget-debug-record-pos.mlir
M mlir/test/Target/LLVMIR/omptarget-debug-var-1.mlir
M mlir/test/lib/Dialect/Test/TestAttrDefs.td
M mlir/test/lib/Dialect/Test/TestEnumDefs.td
M mlir/test/lib/Dialect/Test/TestOps.td
M mlir/test/lib/Dialect/XeGPU/TestXeGPUTransforms.cpp
M mlir/test/mlir-tblgen/enums-gen.td
M mlir/test/python/dialects/nvvm.py
A offload/test/offloading/fortran/do-concurrent-to-omp-min-reduce.f90
M orc-rt/include/orc-rt/QueueingTaskDispatcher.h
M orc-rt/include/orc-rt/SPSWrapperFunction.h
M orc-rt/include/orc-rt/Session.h
M orc-rt/lib/executor/QueueingTaskDispatcher.cpp
M orc-rt/lib/executor/Session.cpp
M orc-rt/unittests/QueueingTaskDispatcherTest.cpp
M orc-rt/unittests/SPSWrapperFunctionTest.cpp
M orc-rt/unittests/SessionTest.cpp
M polly/lib/Transform/Canonicalization.cpp
M utils/bazel/MODULE.bazel
M utils/bazel/MODULE.bazel.lock
M utils/bazel/extensions.bzl
M utils/bazel/llvm-project-overlay/clang/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
M utils/bazel/llvm-project-overlay/llvm/unittests/BUILD.bazel
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
R utils/bazel/third_party_build/pybind.BUILD
Log Message:
-----------
Merge branch 'users/ziqingluo/PR-172429193-pre-2' into users/ziqingluo/PR-172429193
Compare: https://github.com/llvm/llvm-project/compare/9b6226f8a9d7...a08d8fda6be8
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