[all-commits] [llvm/llvm-project] 121f38: [libc] - Add rpc_opcodes.h to list of installed he...
Ziqing Luo via All-commits
all-commits at lists.llvm.org
Wed Apr 8 15:34:54 PDT 2026
Branch: refs/heads/users/ziqingluo/eng/PR-171859135
Home: https://github.com/llvm/llvm-project
Commit: 121f38c69f44108c543152d990f1d3729d72fa1d
https://github.com/llvm/llvm-project/commit/121f38c69f44108c543152d990f1d3729d72fa1d
Author: estewart08 <ethan.stewart at amd.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M libc/shared/CMakeLists.txt
Log Message:
-----------
[libc] - Add rpc_opcodes.h to list of installed headers (#191035)
There is a case when building standalone offload via runtimes where
LLVM_BINARY_DIR is set to the installed llvm location. Currently, this
header is not being installed and results in a build failure.
Fixes issue introduced with #190423.
Commit: 9b64d05e594a8b04393e1cd24c245a435826d47c
https://github.com/llvm/llvm-project/commit/9b64d05e594a8b04393e1cd24c245a435826d47c
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/lib/CIR/CodeGen/CIRGenClass.cpp
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
M clang/lib/CIR/Dialect/Transforms/LoweringPrepare.cpp
M clang/test/CIR/CodeGen/array-ctor.cpp
M clang/test/CIR/CodeGen/array-dtor.cpp
M clang/test/CIR/CodeGen/global-array-dtor.cpp
M clang/test/CIR/CodeGen/global-init.cpp
M clang/test/CIR/CodeGen/new.cpp
A clang/test/CIR/CodeGen/partial-array-cleanup.cpp
M clang/test/CIR/IR/array-ctor.cir
M clang/test/CIR/IR/array-dtor.cir
M clang/test/CIR/IR/invalid-array-structor.cir
Log Message:
-----------
[CIR] Implement partial array destroy handling (#190834)
This implements EH cleanup handling that performs regular partial array
destruction for array constructor loops with a destructed type. Because
CIR represents array construction using an abstract operation, we do not
go through the normal EH stack mechanism. Instead, we add a partial_dtor
region to the cir.array.ctor operation indicating how a single element
should be destructed. When the cir.array.ctor operation is expanded
during LoweringPrepare, we create a cleanup scope with a partial array
dtor loop in an EH cleanup region. This gets further expanded during CFG
flattening to produce a control flow equivalent to that generated by
classic codegen.
Assisted-by: Cursor / claude-4.6-opus-high
Commit: dfc1f2b2070edb32fedd2524662536ccbbaab948
https://github.com/llvm/llvm-project/commit/dfc1f2b2070edb32fedd2524662536ccbbaab948
Author: adams381 <adams at nvidia.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M clang/docs/ClangIRABILowering.md
Log Message:
-----------
[CIR][ABI][NFC] Update ABI lowering design doc with implementation experience (#188617)
Three documentation improvements based on implementation experience:
- Improve Section 4.4 flow diagram: replace flat step-by-step diagram
with
layered version showing which architectural layer (MLIR adapter, LLVM
ABI
library, dialect-specific) owns each step.
- Note dialect-aware type mapping: dialects with custom types (e.g.
cir::IntType is not mlir::IntegerType) may need dialect-aware mapping
alongside the generic mapper to preserve signedness, pointer identity,
and
record field structure.
- Update ABIRewriteContext interface: describe the actual two-method
interface
(rewriteFunctionDefinition, rewriteCallSite) instead of the 15-20
fine-grained methods originally proposed.
Made with [Cursor](https://cursor.com)
Commit: 66722819ffa4bc00d719d206f235dffbde5ec5d8
https://github.com/llvm/llvm-project/commit/66722819ffa4bc00d719d206f235dffbde5ec5d8
Author: vangthao95 <vang.thao at amd.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.ds.gws.init.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.ds.gws.sema.v.mir
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.gws.barrier-bundle.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.gws.barrier.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.gws.init.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.gws.sema.br.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.gws.sema.p.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.gws.sema.release.all.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.gws.sema.v.ll
Log Message:
-----------
AMDGPU/GlobalISel: RegBankLegalize rules for ds_gws ops (#190283)
Commit: 87717bf9f81f7b29466c5d9a30a3453bdfc93941
https://github.com/llvm/llvm-project/commit/87717bf9f81f7b29466c5d9a30a3453bdfc93941
Author: Syadus Sefat <42645939+mssefat at users.noreply.github.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M llvm/include/llvm/Transforms/Vectorize/SLPVectorizer.h
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/AMDGPU/notriviallyvectorizableintrinsicoperands.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/revec.ll
Log Message:
-----------
[SLP][AMDGPU] Vectorize operands of non-trivially-vectorizable intrinsic calls (#189784)
A non-trivially vectorizable target intrinsic (e.g., llvm.amdgcn.exp2,
llvm.amdgcn.log) blocks the SLP vectorizer from building a deeper tree.
This patch finds the operands of such intrinsics and tries them as
independent SLP tree roots so that the operands continues to get
vectorized.
Previously, the SLP vectorizer would terminate tree building at these
intrinsic calls (as NeedToGather nodes). That left their operand chains
(loads, fmul, fsub, etc.) entirely scalar. This patch adds a new seed
discovery pass in vectorizeChainsInBlock.
Commit: 7765fd8653b7670f37c73fef51a8c0b2df36591c
https://github.com/llvm/llvm-project/commit/7765fd8653b7670f37c73fef51a8c0b2df36591c
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M mlir/lib/Dialect/ArmSME/Transforms/EnableArmStreaming.cpp
M mlir/test/Dialect/ArmSME/enable-arm-streaming.mlir
M mlir/test/Dialect/ArmSME/enable-arm-za.mlir
Log Message:
-----------
[mlir][ArmSME] Prefix SME streaming attributes with "llvm." for propagation (#190864)
Function-level attributes enabling SME in the backend (e.g.
arm_streaming, arm_locally_streaming) were dropped when converting
func.func to llvm.func after ed37bdc, because attribute propagation
during FuncToLLVM conversion only preserves attributes prefixed with
"llvm.". Prefix these discardable attributes accordingly.
Commit: c42a957dece2c19454ac3d8d7028e7f16704899b
https://github.com/llvm/llvm-project/commit/c42a957dece2c19454ac3d8d7028e7f16704899b
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenCleanup.cpp
Log Message:
-----------
[CIR][NFC] Remove dead code in popCleanupBlock (#191029)
The CIR popCleanupBlock implementation contained a lot of logic that was
copied from the classic codegen implementation but had become
effectively dead code after the redesign of cleanup and exception
handling in CIR because our cleanups are no longer based on blocks and
branches. This change removes that code.
Commit: 061420021a2b0dc391071a45fe7cc0360236d539
https://github.com/llvm/llvm-project/commit/061420021a2b0dc391071a45fe7cc0360236d539
Author: Dmitry Vasilyev <dvassiliev at accesssoftek.com>
Date: 2026-04-09 (Thu, 09 Apr 2026)
Changed paths:
M lldb/test/API/functionalities/scripted_frame_provider/thread_filter/TestFrameProviderThreadFilter.py
M lldb/test/API/functionalities/scripted_frame_provider/thread_filter/main.cpp
Log Message:
-----------
[lldb] Fix the TestFrameProviderThreadFilter test on Windows (#191046)
This is the update for #191025.
Commit: 9a5904b20d76b24ac64e26b83e6407cc9ddbcc83
https://github.com/llvm/llvm-project/commit/9a5904b20d76b24ac64e26b83e6407cc9ddbcc83
Author: vangthao95 <vang.thao at amd.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.init.exec.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.init.exec.wave32.ll
Log Message:
-----------
AMDGPU/GlobalISel: RegBankLegalize rules for init_exec intrinsics (#191040)
Commit: 270e7b497ec893a43e60a0db35f10c0153200e38
https://github.com/llvm/llvm-project/commit/270e7b497ec893a43e60a0db35f10c0153200e38
Author: bernborgess <62393097+bernborgess at users.noreply.github.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M mlir/include/mlir/IR/Value.h
Log Message:
-----------
[mlir][docs] Fix typos / tweak `mlir::Value` class documentation (#191042)
Commit: 006d352744175de88ee0c071be367c3482c76cfa
https://github.com/llvm/llvm-project/commit/006d352744175de88ee0c071be367c3482c76cfa
Author: Chinmay Deshpande <chdeshpa at amd.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w32-swmmac-index_key.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w64-swmmac-index_key.ll
Log Message:
-----------
[AMDGPU][GISel] RegBankLegalize rules for SWMMAC instructions (#190997)
Commit: b744548871866544f5a6e92290d422f2edd39a51
https://github.com/llvm/llvm-project/commit/b744548871866544f5a6e92290d422f2edd39a51
Author: Paweł Bylica <pawel at hepcolgum.band>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M clang/include/clang/Basic/DiagnosticCommonKinds.td
M clang/lib/CodeGen/CGCall.cpp
A clang/test/CodeGenCXX/musttail-noexcept-error.cpp
A clang/test/CodeGenCXX/musttail-noexcept.cpp
Log Message:
-----------
[Clang] Allow musttail in noexcept functions when callee is nounwind (#190945)
noexcept functions push an EHTerminateScope onto the cleanup stack. The
musttail codegen did not know how to skip this scope, causing a "cannot
compile this tail call skipping over cleanups yet" error even when both
caller and callee are noexcept.
Skip the EHTerminateScope when the callee is nounwind (noexcept). The
callee's own noexcept handler prevents any exception from propagating,
so the caller's terminate handler is unnecessary.
Fixes #53087.
Commit: f49a262fa70cfe4fb83741cbd6a6e30886c560e9
https://github.com/llvm/llvm-project/commit/f49a262fa70cfe4fb83741cbd6a6e30886c560e9
Author: Jianhui Li <jian.hui.li at intel.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M mlir/include/mlir/Dialect/XeGPU/IR/XeGPUTypes.td
M mlir/include/mlir/Dialect/XeGPU/Utils/XeGPUUtils.h
M mlir/lib/Dialect/XeGPU/IR/XeGPUDialect.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUBlocking.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUPeepHoleOptimizer.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUSubgroupDistribute.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUWgToSgDistribute.cpp
M mlir/lib/Dialect/XeGPU/Utils/XeGPUUtils.cpp
M mlir/test/Dialect/XeGPU/xegpu-blocking.mlir
M mlir/test/lib/Dialect/XeGPU/TestXeGPUTransforms.cpp
Log Message:
-----------
[MLIR][XeGPU] TensorDesc Type support generic DistributeLayout instead of Layout (#190401)
This PR allows TensorDesc to support slice layout, not just plain
layout.
Commit: 8d106eb976533e522d30b0b6da78445a8f5ec697
https://github.com/llvm/llvm-project/commit/8d106eb976533e522d30b0b6da78445a8f5ec697
Author: Med Ismail Bennani <ismail at bennani.ma>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M lldb/include/lldb/Target/SyntheticFrameProvider.h
M lldb/include/lldb/Target/Target.h
M lldb/include/lldb/Target/Thread.h
M lldb/include/lldb/Utility/ScriptedMetadata.h
M lldb/include/lldb/lldb-defines.h
M lldb/source/Target/SyntheticFrameProvider.cpp
M lldb/source/Target/Target.cpp
M lldb/source/Target/Thread.cpp
M lldb/test/API/functionalities/scripted_frame_provider/pass_through_prefix/TestFrameProviderPassThroughPrefix.py
Log Message:
-----------
[lldb/Target] Unify frame provider descriptor and chain IDs (#190712)
Replace the two separate ID systems for frame providers — hash-based
descriptor IDs in Target and sequential chain IDs in Thread — with a
single monotonically increasing counter in Target.
Provider IDs are now assigned by
Target::AddScriptedFrameProviderDescriptor
and used directly as the chain ID in Thread, so
RegisterScriptedFrameProvider
returns the same ID used by 'bt --provider'. Also add duplicate
detection to
emit a warning when registering a provider with the same class name and
arguments twice.
Signed-off-by: Med Ismail Bennani <ismail at bennani.ma>
Commit: 69e0367e8221b8002b5d438fb70ff3daf36257fc
https://github.com/llvm/llvm-project/commit/69e0367e8221b8002b5d438fb70ff3daf36257fc
Author: Qiongsi Wu <qiongsiwu at gmail.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M clang/lib/Lex/ModuleMap.cpp
M clang/lib/Tooling/DependencyScanningTool.cpp
A clang/test/ClangScanDeps/modules-byname-dup-module-decl-diag.c
A clang/test/ClangScanDeps/modules-mmap-redef.c
A clang/test/Modules/implicit-module-redefinition-same-file.c
A clang/test/Modules/implicit-module-redefinition.c
Log Message:
-----------
[clang][Modules] Diagnosing Module Redefinition Across ModuleMaps (#190085)
This PR enhances the module redefinition diagnostic to cover a very
specific case.
1. A module, say `B`, is discovered first during header search. In other
words, it is declared in a modulemap that shows up first on the search
paths.
2. `B` is declared again in a different modulemap, which shows up in a
later search path, and the compiler discovers `B` again when it is
searching for a different named module.
See the two tests added for examples of this specific scenario. Under
such a scenario, the compiler now reports the module redefined error.
Note that we are not diagnosing duplicating module definitions globally,
because that requires looking through all search paths and loading all
module maps, which is too expensive.
Assisted-by: claude-opus-4.6
Commit: be072baa33d25dbad9d2cf53c2604b19aa293315
https://github.com/llvm/llvm-project/commit/be072baa33d25dbad9d2cf53c2604b19aa293315
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenFunction.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
Log Message:
-----------
[CIR][NFC] Simplify LexicalScope::cleanup() (#191034)
The LexicalScope::cleanup() function contained a lot of logic that had
been copied from the classic codegen version of this function to
properly handle branching through cleanup blocks. Since CIR cleanups are
no longer based on blocks and branches, this had become dead code. This
change simplifies the function accordiningly. This also removes the
LexicalScope::getCleanupBlock() function which is no longer called, and
the LexicalScope::createCleanupBlock() and
LexicalScope::getOrCreateCleanupBlock() functions which weren't called
even before this change.
Assisted-by: Cursor / claude-4.6-opus-high
Commit: fbdfff47c7e4cdb29512bc78cad5978fa2a86ce9
https://github.com/llvm/llvm-project/commit/fbdfff47c7e4cdb29512bc78cad5978fa2a86ce9
Author: Roland McGrath <mcgrathr at google.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M libcxx/include/__atomic/contention_t.h
M libcxx/include/__cxx03/__atomic/contention_t.h
M libcxx/src/atomic.cpp
Log Message:
-----------
[libc++] Use Fuchsia futex operations (#133571)
The basic futex operations have always been available on Fuchsia.
Wire them up to properly support C++20 atomic notify_*/wait.
Commit: a1418ac932a95113b72020e73e8f9d7808f25973
https://github.com/llvm/llvm-project/commit/a1418ac932a95113b72020e73e8f9d7808f25973
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M flang/lib/Semantics/check-cuda.cpp
A flang/test/Lower/CUDA/cuda-unified.cuf
Log Message:
-----------
[flang][cuda] Disable host array check when unified is enabled (#191054)
Commit: 503357350ce915a53a8147ac584d8b9ae4814be7
https://github.com/llvm/llvm-project/commit/503357350ce915a53a8147ac584d8b9ae4814be7
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
M llvm/test/CodeGen/SPIRV/linkage/linkage-types.ll
Log Message:
-----------
[SPIR-V] Drop initializer for Import linkage type globals (#190942)
Per SPIR-V spec, variable with Import linkage must not have initializer
Fix corresponding spirv-val error:
```
error: A module-scope OpVariable with initialization value cannot be marked with the Import Linkage Type.
```
related to https://github.com/llvm/llvm-project/issues/190736
Commit: 996599ddd95c81cbdf2c12336f3db6baec4499c5
https://github.com/llvm/llvm-project/commit/996599ddd95c81cbdf2c12336f3db6baec4499c5
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
A llvm/test/Transforms/LoopVectorize/VPlan/expand-scev.ll
Log Message:
-----------
[LV] Add VPlan printing tests checking SCEV expansion (NFC). (#191053)
Add additional test cases checking VPlan output of SCEV expansions.
Commit: 996efeaaa20247ac6bcdf5de9bf533c94c8a360f
https://github.com/llvm/llvm-project/commit/996efeaaa20247ac6bcdf5de9bf533c94c8a360f
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M flang/lib/Semantics/expression.cpp
M flang/test/Lower/CUDA/cuda-device-proc.cuf
Log Message:
-----------
[flang][cuda] Implicitly set bind(c) called kernel as global (#191050)
Commit: 075094f9bf460448ffb8f42d7e33925646694268
https://github.com/llvm/llvm-project/commit/075094f9bf460448ffb8f42d7e33925646694268
Author: Michael Jones <michaelrj at google.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M libc/hdr/types/char32_t.h
M libc/shared/rpc_server.h
M libc/src/__support/CMakeLists.txt
M libc/test/src/__support/CMakeLists.txt
Log Message:
-----------
[libc][MacOS] Enable wchar conversion and rpc_server (#191065)
Originally the wchar conversion was disabled due to MacOS not providing
uchar.h. We only needed it for char32_t so this PR just provides it
directly from our headers on MacOS. This also fixes fwrite_unlocked not
being available on MacOS which is needed for rpc_server.h.
Commit: 7d8332c71a944ca61b3ba871482eb80684a816e9
https://github.com/llvm/llvm-project/commit/7d8332c71a944ca61b3ba871482eb80684a816e9
Author: Ziqing Luo <ziqing_luo at apple.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M clang/docs/ClangIRABILowering.md
M clang/include/clang/Basic/DiagnosticCommonKinds.td
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/lib/CIR/CodeGen/CIRGenClass.cpp
M clang/lib/CIR/CodeGen/CIRGenCleanup.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
M clang/lib/CIR/Dialect/Transforms/LoweringPrepare.cpp
M clang/lib/CodeGen/CGCall.cpp
M clang/lib/Lex/ModuleMap.cpp
M clang/lib/Tooling/DependencyScanningTool.cpp
M clang/test/CIR/CodeGen/array-ctor.cpp
M clang/test/CIR/CodeGen/array-dtor.cpp
M clang/test/CIR/CodeGen/global-array-dtor.cpp
M clang/test/CIR/CodeGen/global-init.cpp
M clang/test/CIR/CodeGen/new.cpp
A clang/test/CIR/CodeGen/partial-array-cleanup.cpp
M clang/test/CIR/IR/array-ctor.cir
M clang/test/CIR/IR/array-dtor.cir
M clang/test/CIR/IR/invalid-array-structor.cir
A clang/test/ClangScanDeps/modules-byname-dup-module-decl-diag.c
A clang/test/ClangScanDeps/modules-mmap-redef.c
A clang/test/CodeGenCXX/musttail-noexcept-error.cpp
A clang/test/CodeGenCXX/musttail-noexcept.cpp
A clang/test/Modules/implicit-module-redefinition-same-file.c
A clang/test/Modules/implicit-module-redefinition.c
M flang/lib/Semantics/check-cuda.cpp
M flang/lib/Semantics/expression.cpp
M flang/test/Lower/CUDA/cuda-device-proc.cuf
A flang/test/Lower/CUDA/cuda-unified.cuf
M libc/hdr/types/char32_t.h
M libc/shared/CMakeLists.txt
M libc/shared/rpc_server.h
M libc/src/__support/CMakeLists.txt
M libc/test/src/__support/CMakeLists.txt
M libcxx/include/__atomic/contention_t.h
M libcxx/include/__cxx03/__atomic/contention_t.h
M libcxx/src/atomic.cpp
M lldb/include/lldb/Target/SyntheticFrameProvider.h
M lldb/include/lldb/Target/Target.h
M lldb/include/lldb/Target/Thread.h
M lldb/include/lldb/Utility/ScriptedMetadata.h
M lldb/include/lldb/lldb-defines.h
M lldb/source/Target/SyntheticFrameProvider.cpp
M lldb/source/Target/Target.cpp
M lldb/source/Target/Thread.cpp
M lldb/test/API/functionalities/scripted_frame_provider/pass_through_prefix/TestFrameProviderPassThroughPrefix.py
M lldb/test/API/functionalities/scripted_frame_provider/thread_filter/TestFrameProviderThreadFilter.py
M lldb/test/API/functionalities/scripted_frame_provider/thread_filter/main.cpp
M llvm/include/llvm/Transforms/Vectorize/SLPVectorizer.h
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.ds.gws.init.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.ds.gws.sema.v.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w32-swmmac-index_key.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w64-swmmac-index_key.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.gws.barrier-bundle.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.gws.barrier.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.gws.init.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.gws.sema.br.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.gws.sema.p.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.gws.sema.release.all.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.gws.sema.v.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.init.exec.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.init.exec.wave32.ll
M llvm/test/CodeGen/SPIRV/linkage/linkage-types.ll
A llvm/test/Transforms/LoopVectorize/VPlan/expand-scev.ll
M llvm/test/Transforms/SLPVectorizer/AMDGPU/notriviallyvectorizableintrinsicoperands.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/revec.ll
M mlir/include/mlir/Dialect/XeGPU/IR/XeGPUTypes.td
M mlir/include/mlir/Dialect/XeGPU/Utils/XeGPUUtils.h
M mlir/include/mlir/IR/Value.h
M mlir/lib/Dialect/ArmSME/Transforms/EnableArmStreaming.cpp
M mlir/lib/Dialect/XeGPU/IR/XeGPUDialect.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUBlocking.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUPeepHoleOptimizer.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUSubgroupDistribute.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUWgToSgDistribute.cpp
M mlir/lib/Dialect/XeGPU/Utils/XeGPUUtils.cpp
M mlir/test/Dialect/ArmSME/enable-arm-streaming.mlir
M mlir/test/Dialect/ArmSME/enable-arm-za.mlir
M mlir/test/Dialect/XeGPU/xegpu-blocking.mlir
M mlir/test/lib/Dialect/XeGPU/TestXeGPUTransforms.cpp
Log Message:
-----------
Merge branch 'main' into users/ziqingluo/eng/PR-171859135
Compare: https://github.com/llvm/llvm-project/compare/d751798cd22d...7d8332c71a94
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