[all-commits] [llvm/llvm-project] 613c5b: [flang][cuda] Lower unified variables as cuf.alloc...
Sameer Sahasrabuddhe via All-commits
all-commits at lists.llvm.org
Wed Apr 8 02:43:35 PDT 2026
Branch: refs/heads/users/ssahasra/async-gisel-fix
Home: https://github.com/llvm/llvm-project
Commit: 613c5b4523d55f3fab3385fc7ed9218777b507b8
https://github.com/llvm/llvm-project/commit/613c5b4523d55f3fab3385fc7ed9218777b507b8
Author: Zhen Wang <zhenw at nvidia.com>
Date: 2026-04-06 (Mon, 06 Apr 2026)
Changed paths:
M flang/lib/Semantics/tools.cpp
M flang/test/Lower/CUDA/cuda-program-global.cuf
Log Message:
-----------
[flang][cuda] Lower unified variables as cuf.alloc in main program scope (#190713)
Remove the unified exception from CanCUDASymbolBeGlobal so unified
variables follow the same cuf.alloc lowering path as other CUDA data
attributes.
Commit: 49093c4a57ba64d384520ddd95a07c8b35fadcc0
https://github.com/llvm/llvm-project/commit/49093c4a57ba64d384520ddd95a07c8b35fadcc0
Author: Gareth Andrew Lloyd <gareth at ignition-web.co.uk>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M clang-tools-extra/clang-tidy/performance/TriviallyDestructibleCheck.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/test/CMakeLists.txt
A clang-tools-extra/test/clang-tidy/checkers/performance/trivially-destructible-module.cpp
M clang-tools-extra/test/lit.cfg.py
Log Message:
-----------
[clang-tidy] Fix performance-trivially-destructible with C++20 modules (#178471)
When a class definition is seen through both a header include and a
C++20 module import, destructors may appear multiple times in the AST's
redeclaration chain. The original matcher used `isFirstDecl()` which
fails in this scenario because the same declaration can appear as both
first and non-first depending on the view.
Replace `unless(isFirstDecl())` with `isOutOfLine()` which correctly
identifies out-of-line definitions by checking whether the lexical
context differs from the semantic context.
Also update clang-tools-extra's lit.cfg.py to call `use_clang()` instead
of `clang_setup()` to make the `%clang` substitution available for
tests.
Fixes #178102
Co-authored-by: Chuanqi Xu <yedeng.yd at linux.alibaba.com>
Commit: e80f32fd20bf15b4515e868962ace7b34b477d09
https://github.com/llvm/llvm-project/commit/e80f32fd20bf15b4515e868962ace7b34b477d09
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2026-04-06 (Mon, 06 Apr 2026)
Changed paths:
M llvm/lib/CodeGen/CodeGenPrepare.cpp
Log Message:
-----------
[CodeGenPrepare] Use Instruction::comesBefore instead of manual ordering (#190485)
After #172329, we noticed that some sources compiled with MSan take
1000x longer to compile. This is caused by quadratic complexity in
tryToSinkFreeOperands, which can be called on a significant number
of instructions within huge basic blocks.
This inefficiency was introduced in 9cfa9b4, which manually iterates
and creates a DenseMap of entire basic blocks for each interesting
instruction.
This patch avoids the manual ordering by using
Instruction::comesBefore(), which provides the exact same
ordering much more efficiently.
Commit: 6870ebca3c65c2b80c929f97d97b58ab3c6a25c2
https://github.com/llvm/llvm-project/commit/6870ebca3c65c2b80c929f97d97b58ab3c6a25c2
Author: Hiroshi Yamauchi <56735936+hjyamauchi at users.noreply.github.com>
Date: 2026-04-06 (Mon, 06 Apr 2026)
Changed paths:
M llvm/include/llvm/Support/FileSystem.h
M llvm/lib/CAS/MappedFileRegionArena.cpp
M llvm/lib/Support/Unix/Path.inc
M llvm/lib/Support/Windows/Path.inc
M llvm/unittests/Support/Path.cpp
Log Message:
-----------
[CAS] Give Windows file mappings names to better ensure same mappings are used (#190692)
Commit: 97ed6485f2ca10fd7e66a8ebe8920136148d6c32
https://github.com/llvm/llvm-project/commit/97ed6485f2ca10fd7e66a8ebe8920136148d6c32
Author: A. Jiang <de34 at live.cn>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M libcxx/docs/Status/Cxx2cIssues.csv
M libcxx/docs/Status/Cxx2cPapers.csv
Log Message:
-----------
[libc++][docs] Update paper and LWG issue lists after 2026-03 meeting (#189901)
[P3726R2](https://wg21.link/P3726R2) is a Core paper but adds
`std::start_lifetime`, so it needs to be listed in libc++'s
documentation.
For LWG issues, see [P4145R0](https://wg21.link/P4145R0) and
[P4146R0](https://wg21.link/P4146R0).
Commit: 73499774152e23e9e58324809a20bd7e3abff275
https://github.com/llvm/llvm-project/commit/73499774152e23e9e58324809a20bd7e3abff275
Author: lonely eagle <2020382038 at qq.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M mlir/lib/Transforms/CSE.cpp
Log Message:
-----------
[mlir][CSE] Fix CSE markAnalysesPreserved<DominanceInfo, PostDominanceInfo> comment (#190471)
The original comment claimed that DominanceInfo and PostDominanceInfo
could be preserved because region operations are not removed. However,
the real reason was that the original CSE only deleted redundant
operations without moving any operation to a different block, leaving
the dominance tree structure unchanged. Part of
https://github.com/llvm/llvm-project/pull/180556.
Commit: 150783e254d82d290fd05ab5c50813a9d7c98fca
https://github.com/llvm/llvm-project/commit/150783e254d82d290fd05ab5c50813a9d7c98fca
Author: lonely eagle <2020382038 at qq.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M mlir/include/mlir/Dialect/ControlFlow/IR/ControlFlowOps.td
M mlir/include/mlir/Interfaces/ControlFlowInterfaces.td
M mlir/include/mlir/Reducer/ReductionNode.h
M mlir/lib/Dialect/ControlFlow/IR/ControlFlowOps.cpp
M mlir/lib/Reducer/CMakeLists.txt
M mlir/lib/Reducer/ReductionNode.cpp
M mlir/lib/Reducer/ReductionTreePass.cpp
M mlir/test/mlir-reduce/reduction-tree.mlir
Log Message:
-----------
Revert "Reland "[mlir][reducer] Add eraseRedundantBlocksInRegion and getSuccessorForwardOperands API to BranchOpInterface"" (#190727)
To decouple the BranchOpInterface implementation from the reduction-tree
changes. Reverts llvm/llvm-project#189253,
Commit: d6d7d0aca0e945b9e859c15f5e6a8b7c458bb2d7
https://github.com/llvm/llvm-project/commit/d6d7d0aca0e945b9e859c15f5e6a8b7c458bb2d7
Author: Kaviya Rajendiran <67495422+kaviya2510 at users.noreply.github.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M clang/include/clang/Options/Options.td
M clang/lib/Driver/ToolChains/Flang.cpp
M flang/include/flang/Frontend/CodeGenOptions.h
M flang/include/flang/Optimizer/Transforms/Passes.td
M flang/include/flang/Tools/CrossToolHelpers.h
M flang/lib/Frontend/CompilerInvocation.cpp
M flang/lib/Frontend/FrontendActions.cpp
M flang/lib/Optimizer/Passes/Pipelines.cpp
M flang/lib/Optimizer/Transforms/FunctionAttr.cpp
A flang/test/Driver/Inputs/pgo-sample.prof
A flang/test/Driver/fprofile-sample-use.f90
A flang/test/Integration/inputs/pgo-sample.prof
A flang/test/Integration/profile-sample-use.f90
M mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td
M mlir/lib/Target/LLVMIR/ModuleImport.cpp
M mlir/lib/Target/LLVMIR/ModuleTranslation.cpp
A mlir/test/Target/LLVMIR/Import/use-sample-profile.ll
A mlir/test/Target/LLVMIR/use-sample-profile.mlir
Log Message:
-----------
[Flang][Driver] Add support for '-fprofile-sample-use' option (#188697)
When the `-fprofile-sample-use=sample.prof` option is passed, the
compiler records the profile file path in `SampleProfileFile` . This
value is later used by the `SampleProfileLoaderPass`, which loads the
sample profile and injects the corresponding profiling metadata in the
LLVM IR.
Commit: cab7d1e485ca02074c7499020b289c726b06d5cf
https://github.com/llvm/llvm-project/commit/cab7d1e485ca02074c7499020b289c726b06d5cf
Author: lonely eagle <2020382038 at qq.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M mlir/lib/Reducer/ReductionTreePass.cpp
A mlir/test/mlir-reduce/false.sh
M mlir/test/mlir-reduce/invalid.mlir
M mlir/test/mlir-reduce/simple-test.mlir
R mlir/test/mlir-reduce/test.sh
A mlir/test/mlir-reduce/true.sh
Log Message:
-----------
[mlir][reducer] Repalce module.emitWarning with module.emitError in ReductionTree pass (#190584)
This PR fixes the diagnostic message for mlir-reduce's reduction-tree
pass when the input module is not "interesting". Previously, running
with the warning pass would fail silently, and enabling debug options
would only show a generic "pass manager run failed" message without any
useful diagnostic information.
Commit: 45494d9c165965a8f5aaccd00c7301c166bcd575
https://github.com/llvm/llvm-project/commit/45494d9c165965a8f5aaccd00c7301c166bcd575
Author: Jim Lin <jim at andestech.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoZa.td
Log Message:
-----------
[RISCV] Fix address type in Zacas seq_cst atomic pattern (#190729)
The seq_cst pattern in AMOCASPat used (vt GPR:$addr) for the address
operand, while all other patterns (monotonic, acquire, release, acq_rel)
consistently use (XLenVT GPR:$addr). This would produce a wrong type for
the address when vt differs from XLenVT (e.g., amocas.d on RV32 where
vt=i64).
Co-authored-by: Claude Opus 4.6 (1M context) <noreply at anthropic.com>
Commit: 9e72ab62987f412f8592dffa54fdef8c63571fbb
https://github.com/llvm/llvm-project/commit/9e72ab62987f412f8592dffa54fdef8c63571fbb
Author: bharsesh <40402884+bharsesh at users.noreply.github.com>
Date: 2026-04-06 (Mon, 06 Apr 2026)
Changed paths:
M clang/lib/Sema/SemaChecking.cpp
M clang/test/Analysis/bstring.c
M clang/test/Sema/warn-fortify-source.c
Log Message:
-----------
[Clang][Sema] Add fortify warnings for bcopy and bzero (#168965) (#186522)
Add fortify warnings for bcopy and bzero as part of
[llvm#142230](https://github.com/llvm/llvm-project/issues/142230)
Commit: b6759f17709a33e4c7fd3d500c4a94446e4100fe
https://github.com/llvm/llvm-project/commit/b6759f17709a33e4c7fd3d500c4a94446e4100fe
Author: Hemang Gadhavi <hemang.gadhavi at ibm.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M lldb/source/Host/aix/Host.cpp
M lldb/source/Plugins/ObjectFile/XCOFF/ObjectFileXCOFF.cpp
M lldb/source/Plugins/ObjectFile/XCOFF/ObjectFileXCOFF.h
M lldb/source/Utility/ArchSpec.cpp
M lldb/test/Shell/ObjectFile/XCOFF/basic-info32.yaml
Log Message:
-----------
[lldb][AIX] Extract CPU type and set up process architecture accordingly (#189910)
This PR is in reference to porting LLDB on AIX. Ref discusssions: [llvm
discourse](https://discourse.llvm.org/t/port-lldb-to-ibm-aix/80640) and
[#101657](https://github.com/llvm/llvm-project/issues/101657).
Complete changes together in this draft:
- [Extending LLDB to work on AIX
#102601](https://github.com/llvm/llvm-project/pull/102601)
Description:
The process architecture was previously initialized using a hardcoded
TCPU_PPC64 CPU type.
The logic has been updated to determine the CPU type dynamically by
inspecting the magic bytes and the XCOFF header. Based on this
information, the appropriate CPU type (TCPU_PPC or TCPU_PPC64) is
selected and used when constructing and setting the ArchSpec.
This change ensures that the process architecture correctly reflects the
underlying binary format.
Commit: a485f1c63475d416b179b78b64cb22397f4085cb
https://github.com/llvm/llvm-project/commit/a485f1c63475d416b179b78b64cb22397f4085cb
Author: Chris Jackson <chris.jackson at amd.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SILowerSGPRSpills.cpp
M llvm/test/CodeGen/AMDGPU/llc-pipeline.ll
M llvm/test/CodeGen/AMDGPU/sgpr-regalloc-flags.ll
A llvm/test/CodeGen/AMDGPU/si-lower-sgpr-spills-cycle-header.ll
A llvm/test/CodeGen/AMDGPU/si-lower-sgpr-spills-cycle-header.mir
A llvm/test/CodeGen/AMDGPU/si-lower-sgpr-spills-initial-insert-in-body.mir
A llvm/test/CodeGen/AMDGPU/si-lower-sgpr-spills-initial-insert-in-latch.mir
A llvm/test/CodeGen/AMDGPU/si-lower-sgpr-spills-multi-entry-cycle.mir
M llvm/test/CodeGen/AMDGPU/spill-sgpr-to-virtual-vgpr.mir
M llvm/test/CodeGen/AMDGPU/spill-vgpr-to-agpr-update-regscavenger.ll
Log Message:
-----------
[AMDGPU][SILowerSGPRSpills] Correct insertion of IMPLICIT_DEF in cycles (#186348)
si-lower-sgpr spills was observed inserting IMPLICIT_DEF for lane VGPR
restores in the cycle header. The virtual VGPR is therefore not live-in
to the header and wwm regallocfast does not insert a restore. This
results in the vgpr being clobbered after each backedge.
Correct this by inserting the IMPLICIT_DEF in a block that dominates
all entries.
Assisted by Claude.
Commit: d55122e4390dc67e393bdf860844f7eebf73809d
https://github.com/llvm/llvm-project/commit/d55122e4390dc67e393bdf860844f7eebf73809d
Author: Aleksandr Platonov <platonov.aleksandr at huawei.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M clang/lib/Rewrite/Rewriter.cpp
M clang/unittests/Rewrite/RewriterTest.cpp
Log Message:
-----------
[clang][Rewriter] Adjust end offset before RewriteBuffer::getMappedOffset() call (#187374)
Without this patch, only cases when a token length increased were
supported.
If a token length decreased, we returned a larger string than expected
(e.g. in the added tests, "xretur " would be returned instead of
"xretur")
Commit: a89f174e502165ac566f922edeaee53329172b22
https://github.com/llvm/llvm-project/commit/a89f174e502165ac566f922edeaee53329172b22
Author: Haojian Wu <hokein.wu at gmail.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M clang/lib/Sema/SemaDecl.cpp
A clang/test/SemaTemplate/GH187909.cpp
Log Message:
-----------
[clang] Fix crash on invalid out-of-line enum definition with template parameters (#188246)
clang crashes when an invalid out-of-line enum definition is provided
with template parameters. In these cases, clang produces a dependent
type within a non-dependent context, violating internal invariants.
The fix is to fallback the underlying type of the enum to `int` during
error recovery in `Sema::ActOnTag` when `Invalid` is true, making it
safe for downstream processing while still preserving the invalid
declaration in the AST.
Fixes #187909
Commit: 8460cb9bbb39372815ded429cd56f31a87bba9dc
https://github.com/llvm/llvm-project/commit/8460cb9bbb39372815ded429cd56f31a87bba9dc
Author: Chuanqi Xu <yedeng.yd at linux.alibaba.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M clang-tools-extra/clang-tidy/ClangTidy.cpp
A clang-tools-extra/test/clang-tidy/infrastructure/cxx20-modules.cppm
M clang-tools-extra/test/lit.cfg.py
M clang/include/clang/ASTMatchers/ASTMatchFinder.h
M clang/lib/ASTMatchers/ASTMatchFinder.cpp
Log Message:
-----------
[clang-tidy] [Modules] Skip checking decls in clang-tidy (#145630) (#190733)
Close https://github.com/llvm/llvm-project/issues/145628
Note that I am not sure if this is the proper fix. On the one hand, the
fix lives in ASTMachers instead of clang-tidy. On the other hand, I feel
this may be a more general fix.
Commit: 4c2e49dc5ce3125be9fb07dcefe9be970ce739ec
https://github.com/llvm/llvm-project/commit/4c2e49dc5ce3125be9fb07dcefe9be970ce739ec
Author: Chuanqi Xu <yedeng.yd at linux.alibaba.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M clang/lib/AST/StmtProfile.cpp
A clang/test/Modules/callable-require-clause-merge.cppm
M clang/test/Modules/polluted-operator.cppm
Log Message:
-----------
[C++20] [Modules] Don't profiling the callee of CXXFoldExpr (#190732)
Close https://github.com/llvm/llvm-project/issues/190333
For the test case, the root cause of the problem is, the compiler
thought the declaration of `operator &&` in consumer.cpp may change the
meaning of '&&' in the requrie clause of `F::operator()`. But it doesn't
make sense. Here we skip profiling the callee to solve the problem. Note
that we've already record the kind of the operator. So '&&' and '||'
won't be confused.
Commit: 39e503438976f45cbf2a8fa99a20bd7daa9e5b4c
https://github.com/llvm/llvm-project/commit/39e503438976f45cbf2a8fa99a20bd7daa9e5b4c
Author: Jiří Filek <52356396+fileho at users.noreply.github.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp
M clang/test/CodeGen/AArch64/bf16-getset-intrinsics.c
M clang/test/CodeGen/AArch64/neon/bf16-getset.c
Log Message:
-----------
[CIR][AArch64] Implement vget_lane_bf16 and vgetq_lane_bf16 builtins (#186866)
Implements vget_lane_bf16 and vgetq_lane_bf16 builtins. Updates test
with CIR test.
Part of #185382
Commit: 774ac3164adea2be906192769922033c938f18f2
https://github.com/llvm/llvm-project/commit/774ac3164adea2be906192769922033c938f18f2
Author: vangthao95 <vang.thao at amd.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.gws.barrier-bundle.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.gws.barrier.ll
Log Message:
-----------
[AMDGPU][NFC] Split and auto-generate ds.gws.barrier test checks (#190680)
Split MIR checks into a separate test file.
Commit: dcd58a8fedc8127479e8553dbeed1f172caae34f
https://github.com/llvm/llvm-project/commit/dcd58a8fedc8127479e8553dbeed1f172caae34f
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M llvm/lib/Analysis/InlineCost.cpp
M llvm/test/Transforms/Inline/attributes.ll
Log Message:
-----------
[Inline] Allow inlining with null_pointer_is_valid mismatch (#190510)
If the callee has null_pointer_is_valid but the caller does not, we
should still inline and add null_pointer_is_valid to the caller (which
is handled by an already existing inline adjustment rule).
This does mean that optimizations in the caller may be reduced by
unnecessarily preserving null checks, but that's still better than not
inlining at all. In particular, this check causes issues with LTO in the
Linux kernel, as the C portions are compiled with null_pointer_is_valid,
but the Rust portions are not.
The test is modified to show that the previous alwaysinline behavior now
always holds.
Commit: 89446086eaed6f07e2c122396570f2985cec62e5
https://github.com/llvm/llvm-project/commit/89446086eaed6f07e2c122396570f2985cec62e5
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M llvm/include/llvm/IR/Instruction.h
Log Message:
-----------
[IR] Remove HasMetadata bit from instructions (#190651)
We were reserving one bit for a HasMetadata flag. However, this flag has
long since been moved into Value itself, prior to being removed from
there as well recently.
Commit: cfdd8bcca85a03c613b06306af20c547764d4436
https://github.com/llvm/llvm-project/commit/cfdd8bcca85a03c613b06306af20c547764d4436
Author: Balázs Kéri <balazs.keri at ericsson.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
A clang-tools-extra/clang-tidy/bugprone/AssignmentInSelectionStatementCheck.cpp
A clang-tools-extra/clang-tidy/bugprone/AssignmentInSelectionStatementCheck.h
M clang-tools-extra/clang-tidy/bugprone/BugproneTidyModule.cpp
M clang-tools-extra/clang-tidy/bugprone/CMakeLists.txt
M clang-tools-extra/clang-tidy/cert/CERTTidyModule.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
A clang-tools-extra/docs/clang-tidy/checks/bugprone/assignment-in-selection-statement.rst
A clang-tools-extra/docs/clang-tidy/checks/cert/exp45-c.rst
M clang-tools-extra/docs/clang-tidy/checks/list.rst
A clang-tools-extra/test/clang-tidy/checkers/bugprone/assignment-in-selection-statement.c
A clang-tools-extra/test/clang-tidy/checkers/bugprone/assignment-in-selection-statement.cpp
Log Message:
-----------
[clang-tidy] Add check 'bugprone-assignment-in-selection-statement' (#180219)
Commit: cb1d61403b18f864d558b7b3d4ab54abac1e23c4
https://github.com/llvm/llvm-project/commit/cb1d61403b18f864d558b7b3d4ab54abac1e23c4
Author: Henrich Lauko <xlauko at mail.muni.cz>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
Log Message:
-----------
[CIR] Use UnitProp for comdat, constant, dso_local (#190518)
Commit: 7fb61f589993da3dc160d65092ca4d7ce685eaac
https://github.com/llvm/llvm-project/commit/7fb61f589993da3dc160d65092ca4d7ce685eaac
Author: Victor Chernyakin <chernyakin.victor.j at outlook.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M clang-tools-extra/clang-tidy/misc/UseInternalLinkageCheck.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
A clang-tools-extra/test/clang-tidy/checkers/misc/use-internal-linkage-module-implementation.cpp
A clang-tools-extra/test/clang-tidy/checkers/misc/use-internal-linkage-module-partition.cpp
M clang-tools-extra/test/clang-tidy/checkers/misc/use-internal-linkage-module.cpp
Log Message:
-----------
[clang-tidy] Make `misc-use-internal-linkage` not diagnose symbols in importable module units (#188679)
Fixes #187884.
Commit: 3078eaaec8e793b49b79e9278dabc67d4f0eb8e3
https://github.com/llvm/llvm-project/commit/3078eaaec8e793b49b79e9278dabc67d4f0eb8e3
Author: Łukasz Plewa <lukasz.plewa at intel.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M offload/plugins-nextgen/level_zero/src/L0Kernel.cpp
M offload/plugins-nextgen/level_zero/src/L0Program.cpp
Log Message:
-----------
[offload] fix invalid symbol handling in l0 plugin (#189442)
Commit: 1e10ab2ddba11f8e5a46cd89e4e579b0b75657d3
https://github.com/llvm/llvm-project/commit/1e10ab2ddba11f8e5a46cd89e4e579b0b75657d3
Author: Martin Storsjö <martin at martin.st>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M lld/test/COFF/gnu-weak.test
Log Message:
-----------
[LLD] [COFF] Remove a now incorrect comment in a test. NFC. (#190489)
This comment was added in 26572002749ee2e7d734e4e0aed4cca0e1c623c3 in
2018. Later in 8f540dad6120d00e3ad896b98cd32bcf00623ccd in 2020, the
LLVM MC layer was adjusted to do essentially the same as GNU binutils
do.
Therefore, I think that this test now technically could be done with
object files generated by llvm-mc as well, instead of bundled binary
object files.
Commit: df081924cf21d3b289f976172f6583cc63ec40fb
https://github.com/llvm/llvm-project/commit/df081924cf21d3b289f976172f6583cc63ec40fb
Author: Martin Storsjö <martin at martin.st>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M lld/COFF/Config.h
M lld/COFF/Driver.cpp
M lld/COFF/SymbolTable.cpp
A lld/test/COFF/export-all-conflict.test
Log Message:
-----------
[LLD] [COFF] Fix crashes for conflicting exports with -export-all-symbols (#190492)
Commit adcdc9cc3740adba3577b328fa3ba492cbccd3a5 (since LLD 17) added a
warning message if there are conflicting attempts to export a specific
symbol.
That commit missed one source of exports, from the LLD specific
-export-all-symbols flag (which only has an effect in mingw mode).
To trigger this case, one needs to have an export set by a def file,
combined with the -export-all-symbols flag (which attempts to export all
global symbols, despite explicit exports through embedded directives or
a def file).
To trigger the warning (and the previous crash), one would have to have
some difference between the export produced by -export-all-symbols and
the one from the def file. That difference could be e.g. that the def
file contained an explicit ordinal, or that the def file lacked a DATA
marking for a symbol that the automatic export of all symbols decides to
export as a data symbol.
This fixes https://github.com/llvm/llvm-project/issues/187318. (In the
repro case in that bug, the def file lacked DATA markings for a data
symbol.)
Commit: c6187d5bd9c7ea46b25dd0f26b9e9bde7ad340da
https://github.com/llvm/llvm-project/commit/c6187d5bd9c7ea46b25dd0f26b9e9bde7ad340da
Author: Alex Duran <alejandro.duran at intel.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M offload/CMakeLists.txt
M offload/cmake/Modules/LibomptargetGetDependencies.cmake
M offload/plugins-nextgen/level_zero/CMakeLists.txt
A offload/plugins-nextgen/level_zero/dynamic_l0/L0DynWrapper.cpp
A offload/plugins-nextgen/level_zero/dynamic_l0/level_zero/ze_api.h
A offload/plugins-nextgen/level_zero/dynamic_l0/level_zero/zes_api.h
R offload/plugins-nextgen/level_zero/src/L0DynWrapper.cpp
Log Message:
-----------
[OFFLOAD][L0] Remove dependence from level zero headers for dlopen build (#189120)
Adds the subset of the Level Zero headers necessary to compile the
plugin when built with dlopen support.
Disclaimer: The headers were mostly generated by Claude.
Commit: 0e150b6760372cf05c71e8d4e4375421270371f1
https://github.com/llvm/llvm-project/commit/0e150b6760372cf05c71e8d4e4375421270371f1
Author: Haojian Wu <hokein.wu at gmail.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M clang/docs/ReleaseNotes.rst
Log Message:
-----------
Add a missing release note for the fix #188246 (#190746)
Commit: 5c6ad65fd3dde88ce9bcd04dda8f07f38d79f2c7
https://github.com/llvm/llvm-project/commit/5c6ad65fd3dde88ce9bcd04dda8f07f38d79f2c7
Author: tedj <tedmjohnson at protonmail.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M flang/lib/Optimizer/Transforms/StackArrays.cpp
A flang/test/Transforms/stack-arrays-block-cfg-scope.fir
A flang/test/Transforms/stack-arrays-nested-scope.fir
A flang/test/Transforms/stack-arrays-scope.f90
Log Message:
-----------
[flang] Fix stack-arrays pass moving alloca across stackrestore scope (#184727)
When a operand is shared between two fir.allocmem ops in different
stacksave/stackrestore scopes, findAllocaInsertionPoint() placed both
allocas at the operand definition site inside the first scope. The first
stackrestore then reclaimed both, leaving the second call with a
dangling pointer.
Add a check for intervening stackrestore ops between the last operand
and the allocmem. If one is found, fall back to the allocmem's own
location, matching the existing bail-out for cross-block operands.
Fixes: https://github.com/llvm/llvm-project/issues/178812
Commit: d4a20e7f7e35da720eea34f3de97356d94b7a494
https://github.com/llvm/llvm-project/commit/d4a20e7f7e35da720eea34f3de97356d94b7a494
Author: Pavel Labath <pavel at labath.sk>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/src/__support/OSUtil/linux/syscall_wrappers/CMakeLists.txt
A libc/src/__support/OSUtil/linux/syscall_wrappers/connect.h
M libc/src/sys/socket/CMakeLists.txt
A libc/src/sys/socket/connect.h
M libc/src/sys/socket/linux/CMakeLists.txt
A libc/src/sys/socket/linux/connect.cpp
M libc/test/src/sys/socket/linux/CMakeLists.txt
A libc/test/src/sys/socket/linux/connect_test.cpp
Log Message:
-----------
[libc] Implement connect(2) on linux (#189668)
I'm using the new syscall wrapper framework, and enabling the entry
point for x86_64, aarch64 and riscv. The associated test currently only
checks for the error code. Once we have listen&accept (which I'm
probably going to tackle next), we can test that the two can talk to
each other.
Commit: b12d54d680f5af54e01c3489aa97ab2b0ce1ddc3
https://github.com/llvm/llvm-project/commit/b12d54d680f5af54e01c3489aa97ab2b0ce1ddc3
Author: Owen Anderson <resistor at mac.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/LoopIdiomRecognize.cpp
M llvm/test/Transforms/LoopIdiom/non-integral-pointers.ll
Log Message:
-----------
[CHERI] Refine LoopIdiomRecognize handling of stable representation non-integral pointers. (#189402)
This makes two changes:
- memset can be formed from stores of null pointers, even if they are
non-integral. Null pointers are already assumed to be equivalent to the
all-zeros bit pattern, and it's not the goal of non-integral pointer
support to change that assumption.
- memcpy can be formed from copies of non-integral pointers. We assume
if the environment provides a memcpy implementation for a non-integral
pointer address space, then that memcpy is non-integral pointer aware.
These changes are not applied to pointers with unstable representation.
Commit: 55a3382be485148a3ab29c8942a07f13e9ba036a
https://github.com/llvm/llvm-project/commit/55a3382be485148a3ab29c8942a07f13e9ba036a
Author: Tharun V K <40231849+tharunvk at users.noreply.github.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
A llvm/test/CodeGen/X86/half-fneg-fabs.ll
Log Message:
-----------
[X86] Add DAG combine to fold promoted f32 sequences for f16 fneg and fabs (#189395)
This patch optimizes f16 fneg and fabs on X86 targets by introducing
a DAG combine to identify and collapse fpext -> fneg/fabs -> fptrunc.
Generally f16 operations are promoted to f32. For bitwise-equivalent
operations like fneg and fabs, this results in unnecessary and
expensive f32 library calls (__extendhfsf2 / __truncsfhf2) or
hardware conversions (vcvtph2ps / vcvtps2ph) at -O0.
Fixes: https://github.com/llvm/llvm-project/issues/188201
---------
Co-authored-by: Phoebe Wang <phoebe.wang at intel.com>
Commit: b9149823d85891044bf34e8654d1a45870e55174
https://github.com/llvm/llvm-project/commit/b9149823d85891044bf34e8654d1a45870e55174
Author: Luke Lau <luke at igalia.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfdiv-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfrdiv-vp.ll
M llvm/test/CodeGen/RISCV/rvv/sink-splat-operands.ll
M llvm/test/CodeGen/RISCV/rvv/undef-vp-ops.ll
M llvm/test/CodeGen/RISCV/rvv/vfdiv-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfrdiv-vp.ll
Log Message:
-----------
[RISCV] Remove codegen for vp_fdiv (#190591)
Part of the work to remove trivial VP intrinsics from the RISC-V
backend, see
https://discourse.llvm.org/t/rfc-remove-codegen-support-for-trivial-vp-intrinsics-in-the-risc-v-backend/87999
This splits off the vp.fdiv intrinsic from #179622.
Commit: 36fa27fe3e11df54c5c20402a45aa90503db4cc6
https://github.com/llvm/llvm-project/commit/36fa27fe3e11df54c5c20402a45aa90503db4cc6
Author: Joshua Rodriguez <josh.rodriguez at arm.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/lib/Target/AArch64/GISel/AArch64RegisterBankInfo.cpp
M llvm/test/CodeGen/AArch64/arm64-int-neon.ll
M llvm/test/CodeGen/AArch64/arm64-vmul.ll
Log Message:
-----------
[AArch64][GlobalISel] Add patterns for scalar sqdmlal/sqdmlsl (#187246)
SQMLAL's instruction selection patterns don't work for GlobalISel when
the intrinsic has scalar operands. This is because the intrinsic has a
slightly different name (int_aarch64_neon_sqdmulls_scalar). As a result,
this leads to sub-optimal code generation.
This patch allows sqdmulls_scalar to lower, and adds GlobalISel versions
of the TableGen patterns to provide this optimisation.
The pattern added performs this mapping:
`SQADD(a, SQDMULL(b,c)) -> SQDMLAL(a, b, c) [And equivalent for
subtraction]`
Commit: c1d6eea9e794f661402341137d228dd735af1056
https://github.com/llvm/llvm-project/commit/c1d6eea9e794f661402341137d228dd735af1056
Author: David Spickett <david.spickett at arm.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M llvm/docs/ReleaseNotes.md
Log Message:
-----------
llvm][docs] Cleanup LLDB release notes (#190760)
* A few items were in the wrong place.
* FreeBSD batch mode check was removed in
d0f5df111865ea4bb9d7d6ff35b517ee1aa7402f.
* Mark some names as plaintext.
* Fix some spellings.
Commit: cb1a912c76364c74e9d9a91f5e70561733358dc8
https://github.com/llvm/llvm-project/commit/cb1a912c76364c74e9d9a91f5e70561733358dc8
Author: Owen Anderson <resistor at mac.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M llvm/test/CodeGen/Generic/2010-11-04-BigByval.ll
Log Message:
-----------
[llvm] Mark Darwin arm64 to UNSUPPORTED for 2010-11-04-BigByval.ll (#190594)
Update AArch64 UNSUPPORTED on CodeGen/Generic/2010-11-04-BigByval.ll to
include Darwin, where it is referred to as arm64 rather than aarch64.
Commit: db3302dc1e42431efa728ebf7a78e3a30593a653
https://github.com/llvm/llvm-project/commit/db3302dc1e42431efa728ebf7a78e3a30593a653
Author: Lucas Ramirez <11032120+lucas-rami at users.noreply.github.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M llvm/lib/CodeGen/Rematerializer.cpp
M llvm/unittests/CodeGen/RematerializerTest.cpp
Log Message:
-----------
[CodeGen] Fix incorrect rematerialization order in rematerializer (#189485)
When rematerializing DAGs of registers wherein multiple paths exist
between some regsters of the DAG, it is possible that the
rematerialization determines an incorrect rematerialization order that
does not ensure that a register's dependencies are rematerialized before
itself; an invariant that is otherwise required.
This fixes that using a simpler recursive logic to determine a correct
rematerialization order that honors this invariant. A minimal unit test
is added that fails on the current implementation.
Commit: 3f583d40455fb498373b17ecf058fae553770395
https://github.com/llvm/llvm-project/commit/3f583d40455fb498373b17ecf058fae553770395
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/find-last-iv-sinkable-expr-epilogue.ll
M llvm/test/Transforms/LoopVectorize/find-last-iv-sinkable-expr-epilogue.ll
M llvm/test/Transforms/LoopVectorize/find-last-iv-sinkable-expr.ll
M llvm/test/Transforms/LoopVectorize/iv-select-cmp-decreasing.ll
Log Message:
-----------
[VPlan] Optimize FindLast of (binop %IV, live-in) by sinking. (#183911)
When we are finding the last occurrence of a value of an expression that
depends on an induction, we can vectorize this by just selecting the IV
and sinking the expression in the middle block
This follows one of @ayalz's suggestions during earlier discussions for
adding support for CAS/FindLast patterns.
This patch starts with the simplest case, where the selected value is a
simple binary expression of a wide IV and a loop-invariant operand.
This should always be profitable, as the current restriction to binary
operators ensures that the width of the wide IV matches the original
reduction width, we won't introduce any new, wider reduction phi
recipes, and remove the boolean reduction + the horizontal reduction in
the loop.
PR: https://github.com/llvm/llvm-project/pull/183911
Commit: de6d86cf281b9ea0f10c593859f77e306db6fbe8
https://github.com/llvm/llvm-project/commit/de6d86cf281b9ea0f10c593859f77e306db6fbe8
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M flang/include/flang/Semantics/openmp-utils.h
M flang/lib/Semantics/openmp-utils.cpp
Log Message:
-----------
[flang][OpenMP] Use OmpDirectiveSpecifications in helper functions (#190644)
This will make them more reusable, for example when processing APPLY
clause in the future.
Issue: https://github.com/llvm/llvm-project/issues/185287
Commit: fe8a597aa62a7872b2e3225bab29dfa5b9747c2d
https://github.com/llvm/llvm-project/commit/fe8a597aa62a7872b2e3225bab29dfa5b9747c2d
Author: Erick Velez <erickvelez7 at gmail.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M clang/lib/ExtractAPI/DeclarationFragments.cpp
A clang/test/ExtractAPI/type-alias.cpp
M clang/test/Index/extract-api-cursor-cpp.cpp
Log Message:
-----------
[clang][ExtractAPI] emit correct spelling for type aliases (#134007)
Previously, C++11 type aliases were serialized using "typedef"
regardless of the source spelling.
This checks if the TypedefNameDecl is actually a TypeAliasDecl and
corrects the spelling.
Commit: aa4c76d8fb2211cf911a73533138baa24f23b34d
https://github.com/llvm/llvm-project/commit/aa4c76d8fb2211cf911a73533138baa24f23b34d
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M mlir/include/mlir/IR/BuiltinDialectBytecode.td
M mlir/unittests/Bytecode/BytecodeTest.cpp
Log Message:
-----------
[mlir][BytecodeReader] Fix crash reading FusedLoc with empty locations (#189228)
FusedLoc::get(context, locs) may return UnknownLoc when locs is empty
and no metadata is provided. The bytecode reader's cBuilder used
cast<FusedLoc>() on this result, which crashes with an assertion
failure.
Fix by giving the FusedLoc DialectAttribute its own cBuilder that passes
Attribute() explicitly, causing getChecked<FusedLoc> to call the
two-parameter storage constructor directly and always produce a
FusedLoc.
Fixes #99626
Assisted-by: Claude Code
Commit: 546787ec97e292391c27fe55ef4549e7ba022afe
https://github.com/llvm/llvm-project/commit/546787ec97e292391c27fe55ef4549e7ba022afe
Author: Davide Grohmann <davide.grohmann at arm.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVTosaTypes.td
M mlir/test/Dialect/SPIRV/IR/tosa-ops-verification.mlir
Log Message:
-----------
[mlir][spirv] Fix SPIRV TOSA per-channel rescale length verification (#190748)
`TensorLengthMatchesPerChannel` was checking `rank(input) - 1` instead
of `input_shape[rank(input) - 1]`. Fix the predicate and update the
rescale verifier tests accordingly.
Signed-off-by: Davide Grohmann <davide.grohmann at arm.com>
Commit: 543ec358dd1ad361edaccba3dfef61236f2788c4
https://github.com/llvm/llvm-project/commit/543ec358dd1ad361edaccba3dfef61236f2788c4
Author: Lang Hames <lhames at gmail.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M orc-rt/include/orc-rt/Session.h
M orc-rt/lib/executor/Session.cpp
M orc-rt/unittests/SessionTest.cpp
Log Message:
-----------
[orc-rt] Add managed-code-calls TaskGroup. (#190740)
Adds a ManagedCodeCallsGroup TaskGroup to Session, and updates the
shutdown sequence to wait until all calls into managed code have
completed before proceeding to shut down the Session's Services and the
Session itself.
To support safe calls into managed code two new helper template methods
are added:
callManagedCodeSync attempts to acquire a TaskGroup::Token for the
ManagedCodeCallsGroup before calling the given function and returning
its result.
callManagedCodeAsync attempts to acquire a TaskGroup::Token for the
ManagedCodeCallsGroup before calling the given async function. The
wrapped Return call for the async function will carry the acquired
Token, ensuring that shutdown waits for the async Return call to be
destroyed (whether or not it's actually called).
Commit: 6d3d88f74c405db660a20103905787fc67087287
https://github.com/llvm/llvm-project/commit/6d3d88f74c405db660a20103905787fc67087287
Author: Petar Avramovic <Petar.Avramovic at amd.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/GCNVOPDUtils.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-short-clamp.ll
M llvm/test/CodeGen/AMDGPU/fcopysign.f16.ll
M llvm/test/CodeGen/AMDGPU/fmed3.bf16.ll
M llvm/test/CodeGen/AMDGPU/fmed3.ll
M llvm/test/CodeGen/AMDGPU/fold-int-pow2-with-fmul-or-fdiv.ll
M llvm/test/CodeGen/AMDGPU/frem.ll
M llvm/test/CodeGen/AMDGPU/llvm.maximum.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.maximum.f32.ll
M llvm/test/CodeGen/AMDGPU/llvm.minimum.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.minimum.f32.ll
M llvm/test/CodeGen/AMDGPU/uniform-vgpr-to-sgpr-return.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-fmaximum.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-fminimum.ll
Log Message:
-----------
AMDGPU: Use SmallSet for VOPD scalar reg tracking (#190650)
Use SmallSet instead of SmallVector for UniqueScalarRegs.
VCC_LO was pushed without uniqueness check, so when both
components used VCC implicitly it was counted twice,
rejecting valid VOPD pairings.
Co-Authored-By: Claude Opus 4.6 <noreply at anthropic.com>
Commit: 211b88b64b0e409a2e294a1fe444b305aa94a2a6
https://github.com/llvm/llvm-project/commit/211b88b64b0e409a2e294a1fe444b305aa94a2a6
Author: Oleksandr Tarasiuk <oleksandr.tarasiuk at outlook.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Parse/Parser.h
M clang/lib/Parse/ParseDecl.cpp
M clang/lib/Parse/ParseObjc.cpp
M clang/lib/Sema/DeclSpec.cpp
M clang/test/CXX/dcl.dcl/dcl.spec/dcl.type/dcl.spec.auto/p3-generic-lambda-1y.cpp
M clang/test/Parser/c2x-auto.c
M clang/test/Sema/c2x-auto.c
M clang/test/Sema/constexpr.c
M clang/test/SemaCXX/auto-cxx0x.cpp
Log Message:
-----------
[Clang] prevent incorrect rejection of auto with reordered declaration specifiers in C23 (#177865)
Fixes #164121
---
This patch addresses the issue where `auto` was incorrectly rejected
with reordered declaration specifiers in C23.
Commit: f40c234191802154d5b3fc3209908c3f2d6e1649
https://github.com/llvm/llvm-project/commit/f40c234191802154d5b3fc3209908c3f2d6e1649
Author: Donát Nagy <donat.nagy at ericsson.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M clang/include/clang/Analysis/AnalysisDeclContext.h
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/CallEvent.h
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/Environment.h
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/ProgramState.h
M clang/lib/Analysis/AnalysisDeclContext.cpp
M clang/lib/StaticAnalyzer/Checkers/UninitializedObject/UninitializedObjectChecker.cpp
M clang/lib/StaticAnalyzer/Core/BugReporter.cpp
M clang/lib/StaticAnalyzer/Core/CallEvent.cpp
M clang/lib/StaticAnalyzer/Core/Environment.cpp
M clang/lib/StaticAnalyzer/Core/ExprEngine.cpp
M clang/lib/StaticAnalyzer/Core/ExprEngineCXX.cpp
M clang/lib/StaticAnalyzer/Core/ExprEngineCallAndReturn.cpp
M clang/lib/StaticAnalyzer/Core/MemRegion.cpp
M clang/lib/StaticAnalyzer/Core/ProgramState.cpp
Log Message:
-----------
[NFC][analyzer] Spread use of 'Expr*' instead of 'Stmt*' (#188319)
When I was browsing the codebase, I was surprised to see that the first
parameter of `ProgramStateRef::BindExpr` was `const Stmt*` instead of
`const Expr*`. As I surveyed calls to `BindExpr`, I realized that
fortunately no code passes non-expression statements to `BindExpr`
(anymore... it seems that earlier we had such hacks) so in this commit
I'm able to change the type of the first parameter to `const Expr*`.
There was a call to `BindExpr` where the first argument was the value of
the data member `StackFrameContext::CallSite`, so I also changed the
type of that member from `const Stmt*` to `const Expr*` because it was
another statement pointer that always pointed to expressions (or null).
This commit prepares the ground for using `Expr*` instead of `Stmt*` in
`EnvironmentEntry`, which is currently a `pair<const Stmt *, const
StackFrameContext *>` and will be updated in follow-up commits.
This commit also includes minor unrelated simplifications and
corrections.
Commit: a6fda587390b6d3bbf00df22a22881561727e9f9
https://github.com/llvm/llvm-project/commit/a6fda587390b6d3bbf00df22a22881561727e9f9
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M libc/shared/rpc.h
Log Message:
-----------
[libc] Fix ordering to make sure event_id is written before interrupt (#190705)
Summary:
Right now this meant we could avoid flushing the event_id write before
firing the interrupt, so it could be unset.
Commit: 64ac9da3b382bff37445cf7c1ffc557f5302fe6a
https://github.com/llvm/llvm-project/commit/64ac9da3b382bff37445cf7c1ffc557f5302fe6a
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M libc/shared/CMakeLists.txt
M libc/shared/rpc.h
M libc/shared/rpc_server.h
R libc/src/__support/RPC/rpc_server.h
M libc/src/__support/arg_list.h
M libc/test/integration/src/stdio/gpu/printf_test.cpp
M libc/test/shared/CMakeLists.txt
M offload/plugins-nextgen/common/src/RPC.cpp
Log Message:
-----------
[libc] Make rpc_server.h independent from libc internals (#190423)
Summary:
It was very convenient to have the RPC server use the internal libc
printing utilities, but it caused a lot of problems. The LLVM libc
internals were never meant to be included arbitrarily and we completely
bypassed this restriction. Furthermore it prevented us from installing
and using these libraries in other contexts. There was a whole host of
hacks around this, leading to endless PPC problems, compiler errors,
etc.
This PR re-uses the old minified format parser I used to use for the GPU
case. We simply parse the formats to get the size, then copy the
strings. The actual printing instead is done by locking the output file
and repeatedly building up the string using the host's `printf`. Slight
test modifications because we no longer can depend on the specific user
printf specification, it may not handle null or binary values for
example.
Commit: 46bef90e9c60ccc79d3fefa881270ac53a88226f
https://github.com/llvm/llvm-project/commit/46bef90e9c60ccc79d3fefa881270ac53a88226f
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M compiler-rt/CMakeLists.txt
M compiler-rt/cmake/Modules/AddCompilerRT.cmake
M compiler-rt/cmake/Modules/AllSupportedArchDefs.cmake
M compiler-rt/cmake/caches/AMDGPU.cmake
M compiler-rt/cmake/config-ix.cmake
M compiler-rt/lib/sanitizer_common/sanitizer_platform.h
M compiler-rt/lib/ubsan_minimal/ubsan_minimal_handlers.cpp
M compiler-rt/test/ubsan_minimal/CMakeLists.txt
M compiler-rt/test/ubsan_minimal/TestCases/local_bounds.cpp
Log Message:
-----------
[compiler-rt] Enable minimal ubsan for GPU targets (#188289)
Summary:
This PR enabled the ubsan-minimal target for the GPU. This should enable
the trivial checks on the GPU-side. I had to make some changes to the
common sanitizer requirements, but I think this is reasonable
considering the common_sanitizer requires a fully hosted environment and
all we needed were the headers.
Commit: 90b9ad74904b8480009d96525779e6c4bbae2ec0
https://github.com/llvm/llvm-project/commit/90b9ad74904b8480009d96525779e6c4bbae2ec0
Author: Jiahao Guo <eoonguo at gmail.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp
M clang/lib/CIR/CodeGen/CIRGenTypes.cpp
M clang/test/CodeGen/AArch64/fp8-intrinsics/acle_neon_fp8_untyped.c
M clang/test/CodeGen/AArch64/neon-intrinsics.c
M clang/test/CodeGen/AArch64/neon/intrinsics.c
M clang/test/CodeGen/AArch64/poly64.c
Log Message:
-----------
[CIR][AArch64] Lower NEON vbsl builtins (#188449)
Part of : https://github.com/llvm/llvm-project/issues/185382
Add CIR lowering for the AArch64 NEON bitwise-select builtins.
Lower the NEON bitwise-select builtins to CIR bitwise operations
implementing the ACLE bitwise-select semantics, including the
floating-point forms.Also add CIR support for `mfloat8` NEON vector
types so `vbsl_mf8` and `vbslq_mf8` lower successfully instead of
hitting the existing NYI in type conversion.
Move and extend the corresponding FileCheck coverage in
`clang/test/CodeGen/AArch64/neon/intrinsics.c`.
Commit: 4d84263b341c3ee1847081c50e1541b62fbcb08c
https://github.com/llvm/llvm-project/commit/4d84263b341c3ee1847081c50e1541b62fbcb08c
Author: Cullen Rhodes <cullen.rhodes at arm.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
Log Message:
-----------
[AArch64][GISel] Skip SME call-attr checks on non-SME targets (#190135)
`fallBackToDAGISel` was constructing `SMECallAttrs` for every call even
when the subtarget had no SME/SME2 support. This shows up in
compile-time profiles without ever triggering a fallback.
https://llvm-compile-time-tracker.com/compare.php?from=ed44820f722aae43f1f00bb3e201300966716973&to=ba75f8fe1f0e44f7456dd282e066b6d6e781ada3&stat=instructions%3Au
Commit: fe1aa0f04a043aa83725ea4fe2e63f639995b52a
https://github.com/llvm/llvm-project/commit/fe1aa0f04a043aa83725ea4fe2e63f639995b52a
Author: Aly ElAshram <71949028+AlyElashram at users.noreply.github.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
A llvm/test/CodeGen/AArch64/neon-mul-shl.ll
Log Message:
-----------
[AArch64] Optimize vector multiplications by certain constants for v2i64 (#183827)
## Summary
This patch optimizes v2i64 multiplications by constants that can be
decomposed into a single shift and an addition/subtraction (i.e.,
constants of the form $2^n \pm 1$).
Unlike 32-bit or 16-bit vectors, AArch64 Advanced SIMD (NEON) lacks a
native v2i64 multiply instruction.
Currently, the compiler scalarizes these operations, By lowering these
specific cases to shl + add/sub, we keep the entire operation within the
SIMD unit, significantly reducing instruction count and execution
latency.
## Technical Details
- Target: AArch64 (With Neon Enabled)
- Transformation: Replaces (mul x, splat(2^n + 1)) with (add (shl x, n),
x) and (mul x, splat(2^n - 1)) with (sub (shl x, n), x).
- Placement: Integrated into performMulCombine in
AArch64ISelLowering.cpp as a targeted gate for v2i64 vector types only
(for now).
Reference Issue : https://github.com/llvm/llvm-project/issues/54651
Fixes : https://github.com/llvm/llvm-project/issues/176985
Commit: 464647891a2fe16b944a8486510ca5b763a3b448
https://github.com/llvm/llvm-project/commit/464647891a2fe16b944a8486510ca5b763a3b448
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
M llvm/test/CodeGen/AMDGPU/lshl64-to-32.ll
M llvm/test/CodeGen/AMDGPU/narrow_math_for_and.ll
M llvm/test/CodeGen/AMDGPU/reassoc-mul-add-1-to-mad.ll
Log Message:
-----------
[AMDGPU] computeKnownBitsForTargetNode - convert AMDGPUISD::MUL_U24/MUL_I24 handling to use KnownBits::mul (#190600)
Remove custom implementation and rely on KnownBits::mul directly
Commit: e633189784212a568f712f474232f7672fb6d7c7
https://github.com/llvm/llvm-project/commit/e633189784212a568f712f474232f7672fb6d7c7
Author: David Green <david.green at arm.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
M llvm/test/CodeGen/AArch64/ctpop.ll
Log Message:
-----------
[AArch64][GISel] Add widenScalarOrEltToNextPow2OrMinSize for small element vector CTPOP (#189397)
This widens small ctpop to at least i8, preventing types like v8i4 from
falling back.
Commit: c1f295559ae442208df55ca28dcf94c47c8b5752
https://github.com/llvm/llvm-project/commit/c1f295559ae442208df55ca28dcf94c47c8b5752
Author: Owen Anderson <resistor at mac.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M clang/test/Driver/print-supported-extensions-riscv.c
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/test/CodeGen/RISCV/features-info.ll
M llvm/unittests/TargetParser/RISCVISAInfoTest.cpp
Log Message:
-----------
[CHERIoT] Define a RISCV target feature for XCheriot. (#189968)
The specification for this extension is publically available here:
https://github.com/CHERIoT-Platform/cheriot-sail/releases/download/v1.0/cheriot-architecture-v1.0.pdf
This change only adds the target feature, without adding any
functionality gated by it yet. This change is intended to enable
DataLayout-related changes in TargetParser, which depend on RISCVISAInfo
being able at least to recognize the name of this extension.
Commit: 4aeefffd2b4648c1edb05318b71b15c7b07d7620
https://github.com/llvm/llvm-project/commit/4aeefffd2b4648c1edb05318b71b15c7b07d7620
Author: Max Graey <maxgraey at gmail.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M llvm/include/llvm/CodeGen/FunctionLoweringInfo.h
M llvm/include/llvm/Support/KnownBits.h
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
Log Message:
-----------
[KnownBits] Mark constructor for KnownBits as explicit (#190253)
To avoid confusion between constant values and bit widths.
Commit: 80853955c43a86bf4d41e0cae0c829dfd38af44c
https://github.com/llvm/llvm-project/commit/80853955c43a86bf4d41e0cae0c829dfd38af44c
Author: Haojian Wu <hokein.wu at gmail.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M clang/docs/ReleaseNotes.rst
Log Message:
-----------
Add a missing release note for the fix #188239 (#190782)
Commit: bb7e19a23ea1db818702853a538a20ba49fad0f6
https://github.com/llvm/llvm-project/commit/bb7e19a23ea1db818702853a538a20ba49fad0f6
Author: Tim Gymnich <tim at gymni.ch>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
M llvm/test/CodeGen/AMDGPU/fmed3.ll
Log Message:
-----------
[GISel] Fix inverted NaN check in lowerFMinimumMaximum (#190704)
The condition for NaN propagation was using `isKnownNeverNaN(Src1)`
instead of `!isKnownNeverNaN(Src1)`, causing NaN propagation to be
skipped when Src1 might be NaN and incorrectly triggered when Src1 was
known non-NaN.
Update fmed3.ll test checks to reflect correct codegen.
Commit: 43360ebd5129fde6a89a99e11bf0edca2fbfcf72
https://github.com/llvm/llvm-project/commit/43360ebd5129fde6a89a99e11bf0edca2fbfcf72
Author: Alexis Engelke <engelke at in.tum.de>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M llvm/include/llvm/Analysis/BlockFrequencyInfoImpl.h
A llvm/test/Transforms/CodeGenPrepare/X86/verify-bfi-updates.ll
Log Message:
-----------
[Analysis] Fix BFI verify accessing deleted blocks (#190780)
The BFI verifier should ignore basic blocks that got deleted (=number is
still allocated but there is no corresponding block in the function)
since the analysis was first created.
Fixup of #190669.
Commit: 3dcdaf8b160441919b51811ec6c395b6595744fa
https://github.com/llvm/llvm-project/commit/3dcdaf8b160441919b51811ec6c395b6595744fa
Author: Tim Gymnich <tim at gymni.ch>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M llvm/include/llvm/Target/GlobalISel/Combine.td
M llvm/lib/CodeGen/GlobalISel/Utils.cpp
M llvm/test/CodeGen/AArch64/GlobalISel/postlegalizer-combiner-constant-fold.mir
Log Message:
-----------
[GISel] Extend ConstantFoldFPBinOp with fminimumnum, fmaximumnum (#190561)
- Add constant folding for G_FMINIMUMNUM and G_FMAXIMUMNUM using the
minimumnum/maximumnum APFloat helpers.
---------
Co-authored-by: Claude Sonnet 4.6 <noreply at anthropic.com>
Commit: 0e4f9ce0450cea43828a08bf4fcf8ca286a67c75
https://github.com/llvm/llvm-project/commit/0e4f9ce0450cea43828a08bf4fcf8ca286a67c75
Author: Sirui Mu <msrlancern at gmail.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/lib/CIR/CodeGen/CIRGenAtomic.cpp
M clang/test/CIR/CodeGen/atomic-scoped.c
Log Message:
-----------
[CIR] Add support for dynamic atomic sync scope (#189699)
This patch adds support for dynamic atomic sync scope values. It emits a
switch statement to handle different possible sync scope values at
runtime.
Assisted-by: GitHub Copilot / Claude Opus 4.6
Commit: 90f326ef7385f8805616d79183bae172880becb0
https://github.com/llvm/llvm-project/commit/90f326ef7385f8805616d79183bae172880becb0
Author: Lang Hames <lhames at gmail.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M orc-rt/docs/Design.md
M orc-rt/include/orc-rt/Service.h
M orc-rt/include/orc-rt/Session.h
Log Message:
-----------
[orc-rt] Update Session shutdown sequence docs / comments. (#190783)
Clarify Session lifecycle contract docs across Service.h, Session.h, and
Design.md, and update to reflect the introduction of the
ManagedCallsTaskGroup (543ec358dd1).
Commit: 038261fa44ced36d05df146451c4db75766bf0fd
https://github.com/llvm/llvm-project/commit/038261fa44ced36d05df146451c4db75766bf0fd
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M flang/lib/Semantics/openmp-utils.cpp
M flang/unittests/CMakeLists.txt
A flang/unittests/Semantics/CMakeLists.txt
A flang/unittests/Semantics/OpenMPUtils.cpp
Log Message:
-----------
[flang][OpenMP] Fix subtle bug in GetAffectedNestDepthWithReason (#190645)
For constructs that allow COLLAPSE or ORDERED clauses, the function
would return an empty value for the affected depth if none of these
clauses were actually present. What should happen is that the return
value should be 1 without a specific reason.
This bug was not detectable with any source program, since the empty
value caused depth checks to be skipped. Detecting the problem would
require a loop nest with a lower depth than needed that the bug would
cause not to be diagnosed. Since the correct value was 1, such a loop
would need to have a depth of 0 and such a nest cannot be constructed.
Issue: https://github.com/llvm/llvm-project/issues/185287
Commit: bd90922f42d8001f36f86a5c4ca5376fb1da0d6b
https://github.com/llvm/llvm-project/commit/bd90922f42d8001f36f86a5c4ca5376fb1da0d6b
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M flang/include/flang/Semantics/openmp-utils.h
M flang/lib/Semantics/check-omp-atomic.cpp
M flang/lib/Semantics/check-omp-structure.cpp
Log Message:
-----------
[flang][OpenMP] Introduce WithSource<T> to couple T with source location (#190646)
The need for that has already happened once with SourcedActionStmt, and
will happen again in upcoming PRs.
Issue: https://github.com/llvm/llvm-project/issues/185287
Commit: 5620a92147a62c40c31c2fb8e8af340737956d15
https://github.com/llvm/llvm-project/commit/5620a92147a62c40c31c2fb8e8af340737956d15
Author: Charles Zablit <c_zablit at apple.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M llvm/utils/lit/lit/ProgressBar.py
Log Message:
-----------
[lit] cross platform progress bar (#189970)
Commit: 47d457b040d52d6df1f86c238e6b3d4b97b46b9b
https://github.com/llvm/llvm-project/commit/47d457b040d52d6df1f86c238e6b3d4b97b46b9b
Author: Erich Keane <ekeane at nvidia.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenExpr.cpp
A clang/test/CIR/CodeGen/mem-expr-fn.cpp
Log Message:
-----------
[CIR] Implement lowering for member-expr of function decl type (#190655)
This patch ends up being pretty trivial to reproduce, and the
implementation is just to call an already implemented function, however
this shows up a few times in various test suites. So I've implemented
it.
Commit: b9e9e7bc5c6083acb32b131be0f61df7dc2274f0
https://github.com/llvm/llvm-project/commit/b9e9e7bc5c6083acb32b131be0f61df7dc2274f0
Author: Erich Keane <ekeane at nvidia.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenExprAggregate.cpp
A clang/test/CIR/CodeGen/agg-init-constexpr.cpp
Log Message:
-----------
[CIR] Implement aggregate-expr-init with a const-expr lowering (#190631)
An aggregate initialized by a ConstantExpr happens when you have a
consteval constructor. This patch implements this lowering.
There is a bit of a difference in decisions between classic-codegen and
cir lowering, where classic-codegen will do init-via-GEP, whereas CIR
does either a struct-store, or a memcpy, otherwise these seem identical.
There IS a branch (if emitting a constant-expr fails) that appears dead
to the best of my knowledge, but since classic-codegen does it, I left
the version there. It is at most a pessimisation of the constant-emit
(just emitting the expression), so it shouldn't cause problems.
Commit: 93b04091aa38b8d5e6429b58b68ccf9c39f091cc
https://github.com/llvm/llvm-project/commit/93b04091aa38b8d5e6429b58b68ccf9c39f091cc
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M llvm/lib/Target/SPIRV/MCTargetDesc/SPIRVInstPrinter.cpp
M llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_memory_access_aliasing/alias-load-store-atomic.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_memory_access_aliasing/alias-masked-load-store.ll
Log Message:
-----------
[SPIR-V] Use OpDecorateId instead of OpDecorate for memory aliasing decorations (#190731)
AliasScopeINTEL and NoAliasINTEL decorations take ID operands, so they
must use OpDecorateId rather than OpDecorate per the SPIR-V spec
related to #190736
Commit: e61fc8c602c76d2d35e26a51195784d02613e2f9
https://github.com/llvm/llvm-project/commit/e61fc8c602c76d2d35e26a51195784d02613e2f9
Author: Iliyan Georgiev <Iliyan.Georgiev at arm.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M mlir/include/mlir/Dialect/Tosa/IR/TosaComplianceData.h.inc
M mlir/include/mlir/Dialect/Tosa/IR/TosaOpBase.td
M mlir/include/mlir/Dialect/Tosa/IR/TosaOps.td
M mlir/lib/Dialect/Tosa/IR/TosaOps.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaProfileCompliance.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaValidation.cpp
M mlir/test/Dialect/Tosa/availability.mlir
M mlir/test/Dialect/Tosa/dynamic_extension.mlir
M mlir/test/Dialect/Tosa/invalid.mlir
M mlir/test/Dialect/Tosa/invalid_extension.mlir
M mlir/test/Dialect/Tosa/level_check.mlir
M mlir/test/Dialect/Tosa/ops.mlir
M mlir/test/Dialect/Tosa/profile_pro_fp_unsupported.mlir
M mlir/test/Dialect/Tosa/profile_pro_int_unsupported.mlir
M mlir/test/Dialect/Tosa/tosa-infer-shapes.mlir
M mlir/test/Dialect/Tosa/tosa-validation-version-1p0-invalid.mlir
A mlir/test/Dialect/Tosa/tosa-validation-version-1p1-invalid.mlir
Log Message:
-----------
[mlir][tosa] Add TOSA Avg Pool 2D Adaptive (#190200)
Implements:
- Operator definition
- Operator verifier
- InferType implementation
- Validation
- Tests
Signed-off-by: Deeptanshu Sekhri <deeptanshu.sekhri at arm.com>
Co-authored-by: Iliyan Georgiev <iliyan.georgiev at arm.com>
Co-authored-by: Deeptanshu Sekhri <deeptanshu.sekhri at arm.com>
Commit: 5a0ef1f63151b03a2ef0269464f331fa2db806f8
https://github.com/llvm/llvm-project/commit/5a0ef1f63151b03a2ef0269464f331fa2db806f8
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M flang/include/flang/Semantics/openmp-utils.h
M flang/lib/Semantics/openmp-utils.cpp
Log Message:
-----------
[flang][OpenMP] Introduce `semantics::omp::LoopControl` (#190647)
This structure will contain the symbol for the iteration variable, the
lower and upper bounds, and the increment if present in the form of
evaluate::Expr. A source construct (such as DO CONCURRENT) may have
several iteration variables, each with its own bounds and increment,
represented by a list of LoopControl structures.
For loop-transformation constructs that produce additional loops the
current code returns an empty list of LoopControls, but it may be
extended in the future to represent the yet-nonexistent loops for more
accurate semantic analysis.
The code introduced in this PR is not executed yet, but will be used in
an upcoming PR.
Issue: https://github.com/llvm/llvm-project/issues/185287
---------
Co-authored-by: Michael Kruse <llvm-project at meinersbur.de>
Commit: e223cbd2fc24f25830bee023044f32d144f3a5b2
https://github.com/llvm/llvm-project/commit/e223cbd2fc24f25830bee023044f32d144f3a5b2
Author: Erich Keane <ekeane at nvidia.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenException.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
A clang/test/CIR/CodeGen/ctor-try-body.cpp
Log Message:
-----------
[CIR] Implement constructor 'try-body' lowering (#190613)
C++ supports the ability to have the 'body' of a constructor be a 'try'
block. The effect of this is that base construction and initializers are
also within the same try/catch chain. This patch implements this
lowering.
Classic codegen does this by just emitting the 'begin' and 'end' try as
their own functions, then can emit the body separately between calls.
However, CIR doesn't really afford us that ability, so this patch
extracts a function that takes a callback object that is used to emit
the function body. This allows us to do a simple 'emitStmt' in the
normal cases, plus a `emitCtorPrologue` followed by `emitStmt` in the
try-body case.
Commit: ecffdc1dba6877c26eef00545f7a0ca04c392132
https://github.com/llvm/llvm-project/commit/ecffdc1dba6877c26eef00545f7a0ca04c392132
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M offload/plugins-nextgen/amdgpu/src/rtl.cpp
Log Message:
-----------
[Offload] Fix trailing '\0' in ISA name (#190791)
Summary:
Recent changes broke this handling by creating a string-ref that
included the null byte. This made the StringRef compare for the
environemtn ISA with the user ISA fail trivially due to mismatching
sizes.
Commit: 43f7050a814ee2ba952ee2e02ace74da03f2b251
https://github.com/llvm/llvm-project/commit/43f7050a814ee2ba952ee2e02ace74da03f2b251
Author: Eugene Epshteyn <eepshteyn at nvidia.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M flang/docs/F202X.md
Log Message:
-----------
[flang] Added a note about Fortran 202X (F202X) (#190627)
Fortran 202X should no longer be used to refer to Fortran 2023 standard.
Commit: 679828edbfeaabdef5b646bf2fa0cf2c120e9080
https://github.com/llvm/llvm-project/commit/679828edbfeaabdef5b646bf2fa0cf2c120e9080
Author: Srividya Sundaram <srividya.sundaram at intel.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M clang/include/clang/Driver/SyclInstallationDetector.h
M clang/lib/Driver/ToolChains/Linux.cpp
M clang/lib/Driver/ToolChains/SYCL.cpp
R clang/test/Driver/Inputs/SYCL/libLLVMSYCL.ll
A clang/test/Driver/Inputs/SYCL/libsycl.ll
M clang/test/Driver/link-device-code.test
M clang/test/Driver/sycl-offload-jit.cpp
Log Message:
-----------
Revert "[Driver] Update SYCL runtime library name and path for target-specific directories" (#190715)
Reverts llvm/llvm-project#189053
Needs to go together with
https://github.com/llvm/llvm-project/pull/188770/
Commit: 116b045b1e2bff462afff0dc0b06218e6074f427
https://github.com/llvm/llvm-project/commit/116b045b1e2bff462afff0dc0b06218e6074f427
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M lldb/include/lldb/DataFormatters/FormattersContainer.h
M lldb/include/lldb/DataFormatters/TypeSynthetic.h
M lldb/include/lldb/Utility/ConstString.h
M lldb/source/API/SBAttachInfo.cpp
M lldb/source/API/SBCommandInterpreter.cpp
M lldb/source/API/SBCommunication.cpp
M lldb/source/API/SBDebugger.cpp
M lldb/source/API/SBEvent.cpp
M lldb/source/API/SBFileSpec.cpp
M lldb/source/API/SBFunction.cpp
M lldb/source/API/SBLanguageRuntime.cpp
M lldb/source/API/SBLaunchInfo.cpp
M lldb/source/API/SBMemoryRegionInfo.cpp
M lldb/source/API/SBModule.cpp
M lldb/source/API/SBPlatform.cpp
M lldb/source/API/SBProcess.cpp
M lldb/source/API/SBSymbol.cpp
M lldb/source/API/SBTarget.cpp
M lldb/source/API/SBThread.cpp
M lldb/source/API/SBValue.cpp
M lldb/source/API/SBWatchpoint.cpp
M lldb/source/Breakpoint/BreakpointResolverFileRegex.cpp
M lldb/source/Commands/CommandObjectFrame.cpp
M lldb/source/Commands/CommandObjectSource.cpp
M lldb/source/Commands/CommandObjectTarget.cpp
M lldb/source/Commands/CommandObjectType.cpp
M lldb/source/Core/AddressRange.cpp
M lldb/source/Core/Debugger.cpp
M lldb/source/Core/Disassembler.cpp
M lldb/source/Core/FormatEntity.cpp
M lldb/source/Core/IOHandlerCursesGUI.cpp
M lldb/source/Core/Mangled.cpp
M lldb/source/Core/Module.cpp
M lldb/source/Core/Section.cpp
M lldb/source/Core/SourceManager.cpp
M lldb/source/DataFormatters/FormatManager.cpp
M lldb/source/DataFormatters/ValueObjectPrinter.cpp
M lldb/source/Expression/IRExecutionUnit.cpp
M lldb/source/Expression/Materializer.cpp
M lldb/source/Plugins/DynamicLoader/Darwin-Kernel/DynamicLoaderDarwinKernel.cpp
M lldb/source/Plugins/DynamicLoader/POSIX-DYLD/DynamicLoaderPOSIXDYLD.cpp
M lldb/source/Plugins/ExpressionParser/Clang/ClangASTSource.cpp
M lldb/source/Plugins/ExpressionParser/Clang/ClangExpressionParser.cpp
M lldb/source/Plugins/ExpressionParser/Clang/ClangExpressionSourceCode.cpp
M lldb/source/Plugins/ExpressionParser/Clang/ClangModulesDeclVendor.cpp
M lldb/source/Plugins/Language/CPlusPlus/BlockPointer.cpp
M lldb/source/Plugins/Language/CPlusPlus/CPlusPlusLanguage.cpp
M lldb/source/Plugins/Language/CPlusPlus/LibCxxVector.cpp
M lldb/source/Plugins/Language/CPlusPlus/MsvcStlVector.cpp
M lldb/source/Plugins/LanguageRuntime/CPlusPlus/ItaniumABIRuntime.cpp
M lldb/source/Plugins/LanguageRuntime/ObjC/AppleObjCRuntime/AppleObjCDeclVendor.cpp
M lldb/source/Plugins/LanguageRuntime/ObjC/AppleObjCRuntime/AppleObjCRuntimeV1.cpp
M lldb/source/Plugins/LanguageRuntime/ObjC/AppleObjCRuntime/AppleObjCRuntimeV2.cpp
M lldb/source/Plugins/LanguageRuntime/ObjC/AppleObjCRuntime/AppleObjCTrampolineHandler.cpp
M lldb/source/Plugins/LanguageRuntime/ObjC/ObjCLanguageRuntime.h
M lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp
M lldb/source/Plugins/ObjectFile/JSON/ObjectFileJSON.cpp
M lldb/source/Plugins/ObjectFile/Mach-O/ObjectFileMachO.cpp
M lldb/source/Plugins/ObjectFile/PECOFF/ObjectFilePECOFF.cpp
M lldb/source/Plugins/Platform/MacOSX/PlatformDarwinDevice.cpp
M lldb/source/Plugins/Process/Linux/NativeProcessLinux.cpp
M lldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.cpp
M lldb/source/Plugins/Process/mach-core/RegisterContextUnifiedCore.cpp
M lldb/source/Plugins/Process/scripted/ScriptedFrame.cpp
M lldb/source/Plugins/Process/scripted/ScriptedThread.cpp
M lldb/source/Plugins/SymbolFile/CTF/SymbolFileCTF.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.cpp
M lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARFDebugMap.cpp
M lldb/source/Plugins/SymbolFile/PDB/SymbolFilePDB.cpp
M lldb/source/Plugins/SymbolFile/Symtab/SymbolFileSymtab.cpp
M lldb/source/Plugins/SystemRuntime/MacOSX/SystemRuntimeMacOSX.cpp
M lldb/source/Plugins/UnwindAssembly/x86/x86AssemblyInspectionEngine.cpp
M lldb/source/Symbol/SymbolContext.cpp
M lldb/source/Symbol/Symtab.cpp
M lldb/source/Symbol/Type.cpp
M lldb/source/Symbol/Variable.cpp
M lldb/source/Target/DynamicRegisterInfo.cpp
M lldb/source/Target/ModuleCache.cpp
M lldb/source/Target/Process.cpp
M lldb/source/Target/RegisterContextUnwind.cpp
M lldb/source/Target/SectionLoadList.cpp
M lldb/source/Target/StackFrame.cpp
M lldb/source/Target/Target.cpp
M lldb/source/Target/Thread.cpp
M lldb/source/Target/ThreadPlanStepInRange.cpp
M lldb/source/Target/ThreadPlanStepOverRange.cpp
M lldb/source/Target/TraceDumper.cpp
M lldb/source/ValueObject/ValueObject.cpp
M lldb/source/ValueObject/ValueObjectSynthetic.cpp
M lldb/unittests/Utility/ConstStringTest.cpp
Log Message:
-----------
[lldb] Make argument to ConstString::AsCString explicit (#190183)
This patch makes the default parameter to ConstString::AsCString
explicit. Currently it defaults to `nullptr`. However, there a bunch of
callsites that do `printf("%s", foo.AsCString())`, which is UB (I have
at least 1 crash on me where this was the root cause).
Alternatively we could change the default to `""` instead of `nullptr`,
but code that did `if (foo.AsCString())` would then change meaning.
Command I ran to generate this patch:
```
rg "\.AsCString\(\)" lldb -l | xargs sed -i '' 's/\.AsCString()/.AsCString(nullptr)/g'
```
There's also a commonly used `Status::AsCString` with a default
parameter. So I added a temporary:
```
const char *AsCString(std::nullptr_t) const = delete;
```
overload to `Status`, and fixed all the compile errors.
In a follow-up PR I intend to change the callsites that do `printf("%s",
foo.AsCString(nullptr)` to pass `""` as the fallback parameter. Another
dangrous pattern is `std::string(error.AsCString(nullptr))`
rdar://171219173
Commit: e03b73138ec62cae8f6ecbe960b67bc6fa1ab9b7
https://github.com/llvm/llvm-project/commit/e03b73138ec62cae8f6ecbe960b67bc6fa1ab9b7
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M lldb/include/lldb/Target/Platform.h
M lldb/include/lldb/Target/Target.h
M lldb/source/Plugins/Platform/MacOSX/PlatformDarwin.cpp
M lldb/source/Target/Platform.cpp
M lldb/source/Target/Target.cpp
M lldb/source/Target/TargetProperties.td
A lldb/test/Shell/Platform/AutoLoad/Darwin/dsym-auto-load-modules-false.test
A lldb/test/Shell/Platform/AutoLoad/Darwin/dsym-auto-load-modules-multiple.test
A lldb/test/Shell/Platform/AutoLoad/Darwin/dsym-auto-load-modules-not-in-dict.test
A lldb/test/Shell/Platform/AutoLoad/Darwin/dsym-auto-load-modules-true.test
A lldb/test/Shell/Platform/AutoLoad/Darwin/dsym-auto-load-modules-warn.test
A lldb/test/Shell/Platform/AutoLoad/UNIX/auto-load-modules-false.test
A lldb/test/Shell/Platform/AutoLoad/UNIX/auto-load-modules-multiple.test
A lldb/test/Shell/Platform/AutoLoad/UNIX/auto-load-modules-not-in-dict.test
A lldb/test/Shell/Platform/AutoLoad/UNIX/auto-load-modules-true.test
A lldb/test/Shell/Platform/AutoLoad/UNIX/auto-load-modules-warn.test
M lldb/unittests/Platform/PlatformDarwinTest.cpp
M lldb/unittests/Platform/PlatformTest.cpp
Log Message:
-----------
[lldb] Add setting to specify (by name) which module's scripting resources can be auto-loaded (#188722)
* Depends on: https://github.com/llvm/llvm-project/pull/189696
This is part of [this
RFC](https://discourse.llvm.org/t/rfc-lldb-moving-libc-data-formatters-out-of-lldb/89591)
which is about turning the libc++ data-formatters into auto-loadable
Python scripts.
Eventually we want the Python data-formatters for `libc++` to be
automatically loaded without requiring user opt-in (since that's how the
builtin formatters have always worked and, in my opinion, we can't
transition to an opt-in model if users have always had the
data-formatters available). To do so we need a way to distinguish which
modules we can *always* auto-load from safe-paths, and which require
`target.load-script-from-symbol-file` to be set to `true`.
This patch adds a setting (`target.auto-load-modules`) that is a
dictionary from module-name to the `LoadScriptFromSymFile` enum,
indicating how the scripts for that module are to be loaded.
Making this a setting also means a user can disable any auto-loading by
clearing it. By default the setting is currently empty. Eventually we'll
want it to contain `libc++.1=true` (and possibly other names which the
`libc++` dylib can commonly have).
**Considerations**:
* I thought about adding an `IsAutoLoadable` API to `FileSpec` and set
it for those that can be auto-loaded. Then we wouldn't have to return
two lists from `LocateExecutableScriptingResources`. I just felt like
`FileSpec` was too high-level of a structure to hold such information so
I opted for the `llvm::SmallDenseMap<FileSpec, LoadScriptFromSymFile>`.
If people favour one approach over the other, I'm happy to reconsider
**AI Usage**:
* Used Claude to generate the unit-test cases and shell tests. Reviewed
and cleaned them up myself.
---------
Co-authored-by: Adrian Prantl <adrian.prantl at gmail.com>
Commit: 2ce48b2691a49e91dc8ecd6dfb7eeb533f77a5c1
https://github.com/llvm/llvm-project/commit/2ce48b2691a49e91dc8ecd6dfb7eeb533f77a5c1
Author: Kacper Doga <doga.kacper at gmail.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M llvm/lib/Analysis/ConstantFolding.cpp
M llvm/test/Transforms/InstCombine/X86/x86-sse4a-inseltpoison.ll
M llvm/test/Transforms/InstCombine/X86/x86-sse4a.ll
M llvm/test/Transforms/InstCombine/cast.ll
M llvm/test/Transforms/InstSimplify/bitcast-vector-fold.ll
M llvm/test/Transforms/SCCP/bitcast-vector-refinement.l.ll
Log Message:
-----------
[ConstantFolding] Fix bitcasting vectors with non-integer ratios (#179640)
For both downcast and upcast this patch introduces support for
bitcasting vectors with non-integer ratios [1, 2]. Also this patch
increases the coherence between casts [3].
1. Fixes a crash on downcast where the ratio is not an integer (e.g., <3
x i32> to <4 x i24>). Previously this led to leading to an incorrect
number of result elements and subsequent crashes in RAUW.
Fixes #179626
2. Fixes a miscompilation on upcast where ratio is not an integer (e.g.,
<4 x i24> to <3 x i32>). Previously this led to wrong result.
Fixes #181195
3. Fix incoherent value emitting between down/up cast
a. When upcasting, emit Poison and Undef not only if the source vector
consists of only one of these values. (e.g., `bitcast <4 x i32> <i32
undef, i32 undef, i32 1, i32 undef> to <2 x i64>` returns `<2 x i64>
<i64 undef, i64 1>`
b. When downcasting, when SrcElt is Poison, handle it as Poison and not
Undef. (e.g., `bitcast <1 x i32> <i32 poison> to <2 x i16>` returns `<2
x i16> poison`
Commit: 668938917493fe05c98d5b725f68dfd17ab8eb2f
https://github.com/llvm/llvm-project/commit/668938917493fe05c98d5b725f68dfd17ab8eb2f
Author: Maryam Moghadas <maryammo at ca.ibm.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M llvm/lib/Target/PowerPC/PPCISelLowering.cpp
M llvm/lib/Target/PowerPC/PPCISelLowering.h
A llvm/test/CodeGen/PowerPC/bitcast-truncate-vec-i1.ll
Log Message:
-----------
[PowerPC] Optimize bitcast(truncate) patterns using vbpermq (#181233)
Use vbpermq and vbpermd to efficiently pack i1 vector bits into scalar
integers, avoiding stack operations during type legalization.
Fixes https://github.com/llvm/llvm-project/issues/171879
Commit: 0b070ab623647c79dfe244f42998a630299cc67a
https://github.com/llvm/llvm-project/commit/0b070ab623647c79dfe244f42998a630299cc67a
Author: Jacques Pienaar <jacques+gh at japienaar.info>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M llvm/include/llvm/Support/LSP/Protocol.h
M llvm/lib/Support/LSP/Protocol.cpp
M mlir/lib/Tools/mlir-lsp-server/LSPServer.cpp
M mlir/lib/Tools/mlir-lsp-server/MLIRServer.cpp
M mlir/lib/Tools/mlir-lsp-server/MLIRServer.h
M mlir/test/mlir-lsp-server/diagnostics.test
A mlir/test/mlir-lsp-server/rooturi_rel_path.test
M mlir/utils/vscode/package.json
Log Message:
-----------
[mlir][lsp] Use rootUri and rootPath for source files (#185479)
When looking up source files, consider the rootUri and rootPath (if set) and filename is non local path.
Commit: 6732640f5f3b2729c245e3b8026637d322c7f31d
https://github.com/llvm/llvm-project/commit/6732640f5f3b2729c245e3b8026637d322c7f31d
Author: Hans Wennborg <hans at hanshq.net>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
A lld/test/COFF/pdb-publics-hashes.s
M llvm/lib/DebugInfo/PDB/Native/GSIStreamBuilder.cpp
Log Message:
-----------
[pdb] Fix public symbol hashing in GSIHashStreamBuilder::finalizeBuckets (#190133)
BulkPublic.Name is not necessarily null terminated, so make sure not to
hash past its actual length.
In practice it would often be null terminated, but in the cases where it
was not, we would compute the wrong hash here, put it in the wrong hash
bucket, preventing debuggers from looking up the symbol by name, causing
issues such as
https://discourse.llvm.org/t/pdb-generated-by-lld-link-doesnt-point-to-correct-entry-point-when-debugged-using-visual-studio/90349
Commit: 292a74fba42d5ca3cdccbe07311054b96c48ae81
https://github.com/llvm/llvm-project/commit/292a74fba42d5ca3cdccbe07311054b96c48ae81
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M flang/include/flang/Semantics/openmp-utils.h
M flang/lib/Semantics/check-omp-loop.cpp
M flang/lib/Semantics/check-omp-structure.h
M flang/lib/Semantics/openmp-utils.cpp
M flang/lib/Semantics/resolve-directives.cpp
M flang/test/Semantics/OpenMP/do22.f90
M flang/test/Semantics/OpenMP/tile06.f90
Log Message:
-----------
[flang][OpenMP] Implement checks for rectangular loops (#190648)
Detect non-rectangular loops, emit diagnostic messages when the
construct requires that the affected loops are rectangular. Delete
similar checks from resolve-directive.cpp.
Issue: https://github.com/llvm/llvm-project/issues/185287
Commit: c146e9fce8b46f2495a57c8ce7696da4da9d2a13
https://github.com/llvm/llvm-project/commit/c146e9fce8b46f2495a57c8ce7696da4da9d2a13
Author: Zile Xiong <xiongzile at bytedance.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
M llvm/test/CodeGen/WebAssembly/simd-bitmask.ll
M llvm/test/CodeGen/WebAssembly/simd-illegal-bitmask.ll
Log Message:
-----------
[WebAssembly] Fix operand order in performBitcastCombine (#190361)
Fix operand order in performBitcastCombine for wide <N x i1> -> iN
bitmask reconstruction.
In performBitcastCombine, when reconstructing i32/i64 bitmask from
multiple v16i1 SetCC results (for N=32 and N=64 cases), the code
incorrectly built SHL nodes with reversed operands:
SHL(16, ReturningInteger) // wrong
SelectionDAG::getNode(ISD::SHL, ...) expects operand 0 to be the value
to shift and operand 1 to be the shift amount.
This produced incorrect DAGs like shl Constant<16>, xxx, leading to
wrong codegen for vector bitmask patterns.
Fixed by swapping the operands:
SHL(ReturningInteger, 16)
Fixes https://github.com/llvm/llvm-project/issues/190358
---------
Co-authored-by: Zile Xiong <xiongzile99 at gmail.com>
Commit: 9a1860c45a915328b392fa1af0bbc75dbe96af7f
https://github.com/llvm/llvm-project/commit/9a1860c45a915328b392fa1af0bbc75dbe96af7f
Author: Rose Hudson <rose.hudson at sony.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/DiagnosticGroups.td
M clang/include/clang/Basic/DiagnosticLexKinds.td
M clang/include/clang/Basic/SourceManager.h
M clang/lib/Lex/PPDirectives.cpp
A clang/test/Lexer/backslash-include-win.c
Log Message:
-----------
[clang][Lex] add -Wnonportable-include-path-separator (#186770)
Emit an warning when #include paths contain backslashes, with a fixit to
convert them all to '/'. This can help users that build only on Windows
to automatically make their #includes more portable. The warning is off
by default due to being noisy and not always desirable.
Commit: 5dc39757e151fb661ceb323ff1b7af43716c5c03
https://github.com/llvm/llvm-project/commit/5dc39757e151fb661ceb323ff1b7af43716c5c03
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M lldb/unittests/Platform/PlatformDarwinTest.cpp
Log Message:
-----------
[lldb][test] PlatformDarwinTest: remove redundant usage of TestingProperties (#190799)
This was failing to compile on Windows bots that built without
assertions:
```
C:\Users\tcwg\llvm-worker\lldb-aarch64-windows\llvm-project\lldb\unittests\Platform\PlatformDarwinTest.cpp
C:\Users\tcwg\llvm-worker\lldb-aarch64-windows\llvm-project\lldb\unittests\Platform\PlatformDarwinTest.cpp(554,3): error: use of undeclared identifier 'TestingProperties'
554 | TestingProperties::GetGlobalTestingProperties().AppendSafeAutoLoadPaths(
| ^
1 error generated.
```
We don't need to set the safe-paths in this particular test, so just
remove it.
Commit: e6c0faf0f16b228a8bada715481ad5ed255dea4d
https://github.com/llvm/llvm-project/commit/e6c0faf0f16b228a8bada715481ad5ed255dea4d
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M lldb/source/Plugins/Platform/MacOSX/PlatformDarwinKernel.cpp
M lldb/source/Plugins/SymbolLocator/DebugSymbols/SymbolLocatorDebugSymbols.cpp
M lldb/unittests/SymbolFile/PDB/SymbolFilePDBTests.cpp
Log Message:
-----------
[lldb][NFC] Adapt missed call-sites to AsCString changes (#190798)
https://github.com/llvm/llvm-project/pull/190183 made the
`ConstString::AsCString` explicit. This patch adjusts some callsites
which now fail to compile but were missed in that PR.
Commit: fa8b3f5f720ba3aee68f8b6b14a424e6b80870b5
https://github.com/llvm/llvm-project/commit/fa8b3f5f720ba3aee68f8b6b14a424e6b80870b5
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.h
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
Log Message:
-----------
[LV] Return best plan directly from selectBestEpiloguePlan (NFC). (#190608)
Change selectEpilogueVectorizationFactor to directly select the best
VPlan and return a clone of it with the VF set to the selected VF.
This this replaces a getPlanFor outside of LVP and makes the interface
more direct and more in line with computeBestVF after
https://github.com/llvm/llvm-project/pull/190385.
PR: https://github.com/llvm/llvm-project/pull/190608
Commit: d630240d4882155371f28458dd3292a9481f8e77
https://github.com/llvm/llvm-project/commit/d630240d4882155371f28458dd3292a9481f8e77
Author: Henry Linjamäki <henry.linjamaki at tuni.fi>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M clang/lib/Driver/ToolChains/HIPSPV.cpp
M clang/test/Driver/hipspv-toolchain.hip
Log Message:
-----------
HIPSPV: a fix for Assertion `isFilename() && "Invalid accessor."' failed (#187655)
AFAICT, this assertion failure was introduced by #181870 and #182930.
These PRs introduced linker options that got passed down to
HIPSPV::Linker which wasn't prepared for any non-file inputs.
Fixed by ignoring non-file arguments.
Commit: b050410cb783026a97d90f75080a6ae6d4472fa1
https://github.com/llvm/llvm-project/commit/b050410cb783026a97d90f75080a6ae6d4472fa1
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M libc/shared/rpc_server.h
Log Message:
-----------
[libc] Fix return code after rewriting GPU printf support (#190797)
Summary:
This just blindly accumulated the return values without checking if they
were errors. printf returns `-1` on failure and fwrite returns the
number successfully written. Because we split these up we need to handle
that correctly.
Commit: 27f52f97d64f19540eb6bc596508c2f4fe7f5db5
https://github.com/llvm/llvm-project/commit/27f52f97d64f19540eb6bc596508c2f4fe7f5db5
Author: Giorgio Marletta <giorgio.marletta at st.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoC.td
A llvm/test/tools/llvm-mca/RISCV/SiFive7/sp-bypass.s
Log Message:
-----------
[llvm-mca][RISC-V] Remove duplicated use of SP from `c.addi4spn` (#189980)
`c.addi4spn` instruction implicitly uses the X2 (SP) register, but in
addition to being present in the Uses list, it is also modeled as an
explicit operand with the SP register class. This duplication causes
missed bypasses in llvm-mca when the instruction needs to read the SP
value written by a previous instruction.
For example, on a `sifive-u74` CPU, the following timeline excerpt
shows that the `c.addi4spn` is issues 2 cycles later than expected by
the GPR bypass:
```
Timeline view:
Index 012345678
[0,0] DeeE . . mv sp, a0
[0,1] . DeeE . addi a1, sp, 12
```
This patch removes SP from the Uses list, relying solely on the
explicit SP operand (as in `c.addi16sp`), which restores the expected
bypass behavior.
A test is added that checks the same scenario for `c.addi16sp` as well,
since a similar issue may also occur there.
Commit: 5358d456895c6ed42ee7ec61848c9925432f1bfe
https://github.com/llvm/llvm-project/commit/5358d456895c6ed42ee7ec61848c9925432f1bfe
Author: Slava Zakharin <szakharin at nvidia.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M flang/lib/Optimizer/Dialect/FIROps.cpp
M flang/test/Transforms/licm.fir
Log Message:
-----------
[flang] Enable speculation of fir.convert with memref<> type. (#190413)
Such `fir.convert`s may appear after FIRToMemref conversion and it would
be good to be able to speculate them.
Commit: dfa1c56358830e6a79a76235b56833dab2ac0b02
https://github.com/llvm/llvm-project/commit/dfa1c56358830e6a79a76235b56833dab2ac0b02
Author: Slava Zakharin <szakharin at nvidia.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M flang/include/flang/Optimizer/Analysis/AliasAnalysis.h
M flang/lib/Optimizer/Analysis/AliasAnalysis.cpp
A flang/test/Analysis/AliasAnalysis/alias-analysis-access-path.fir
A flang/test/Analysis/AliasAnalysis/alias-analysis-derived-type-box-load.fir
M flang/test/Analysis/AliasAnalysis/load-ptr-designate.fir
M flang/test/Analysis/AliasAnalysis/ptr-component.fir
A flang/test/Transforms/tbaa-derived-type-records.fir
Log Message:
-----------
[flang] Disambiguate derived component accesses in AliasAnalysis. (#189516)
This change introduces an AccessPath representation inside the
AliasAnalysis
Source object that tracks the sequence of named component accesses
and pointer/allocatable dereferences from the root variable to the
queried
memory location. The access path is built during the backward walk
in getSource and enables more precise alias analysis for Fortran derived
types.
Previously, accesses to different components of the same derived-type
variable (such as x%a and x%b) were reported as MayAlias
because the analysis could not distinguish them once they traced back
to the same origin. With the access path, the analysis can now identify
when two accesses diverge at a named component step
and return NoAlias for disjoint subobjects.
This patch does not get rid of `followingData` and `isData` completely.
Assisted by Claude.
Commit: 36ed3face93921ae9261ff48d7436f7c7dbe78d0
https://github.com/llvm/llvm-project/commit/36ed3face93921ae9261ff48d7436f7c7dbe78d0
Author: Hans Wennborg <hans at hanshq.net>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M llvm/unittests/DebugInfo/PDB/PublicsStreamTest.cpp
Log Message:
-----------
[pdb] Store symbol names without null terminators in PublicsStreamTest (#190790)
to catch any bugs where code assumes these names are null terminated.
This would have caught (at least in ASan builds) #163755 and the bug
fixed in #190133.
Commit: c5e0fd177551a7f268a6d8c42d98532638efcd0c
https://github.com/llvm/llvm-project/commit/c5e0fd177551a7f268a6d8c42d98532638efcd0c
Author: lntue <lntue at google.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M .github/workflows/libc-shared-tests.yml
Log Message:
-----------
[libc] Add gcc builds to libc-shared-tests precommit CIs. (#190801)
Commit: 4a6adf42d80a91f79c9c7c8d0c7801f9575d40dd
https://github.com/llvm/llvm-project/commit/4a6adf42d80a91f79c9c7c8d0c7801f9575d40dd
Author: Sharjeel Khan <sharjeelkhan at google.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M llvm/lib/Analysis/InstructionSimplify.cpp
A llvm/test/Transforms/CorrelatedValuePropagation/pr187381.ll
Log Message:
-----------
[InstSimplify] Fix Compilation Hang in simplifyExtractValueInst (#190279)
Jump Threading can create self-referential insertvalues which are
allowed by the verifier in unreachable code. These self-referential
insertvalues cause the compilation to hang in simplifyExtractValueInst.
This PR adds a check to break out of the loop if it detects it is a
self-referential insertvalue and adds the reproducer's bitcode as a
test.
Fixes: https://github.com/llvm/llvm-project/issues/187381
Commit: 07a40b33e513c85061a4204b579a8cd8a60e6507
https://github.com/llvm/llvm-project/commit/07a40b33e513c85061a4204b579a8cd8a60e6507
Author: Tom Eccles <tom.eccles at arm.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
M mlir/test/Target/LLVMIR/openmp-taskloop-cancel.mlir
M mlir/test/Target/LLVMIR/openmp-taskloop-cancellation-point.mlir
M mlir/test/Target/LLVMIR/openmp-taskloop-collapse.mlir
M mlir/test/Target/LLVMIR/openmp-taskloop-no-context-struct.mlir
A mlir/test/Target/LLVMIR/openmp-taskloop-outer-bounds.mlir
M mlir/test/Target/LLVMIR/openmp-taskloop.mlir
Log Message:
-----------
[mlir][OpenMP] Fix taskloop outlined step handling (#190198)
The outlined taskloop preheader still used the original function's
casted step value when computing the canonical loop trip count. When
lb/ub/step were defined outside the taskloop body, the outlined function
ended up referring to an instruction from another function, which
crashed LLVM IR verification and finalization.
Reload the task step from the outlined task shareds, alongside lb and
ub, and use that value for the trip-count division. Update the MLIR
taskloop checks and add a regression for outer-scope variable bounds.
Fortran reproducer:
```
subroutine test(lb, ub, step)
integer :: i, lb, ub, step
!$omp taskloop
do i=lb,ub,step
call do_something(i)
enddo
!$omp end taskloop
end subroutine
```
Assisted-by: codex
Commit: 20916c680ecedc21c582f12d2540d24ff551baec
https://github.com/llvm/llvm-project/commit/20916c680ecedc21c582f12d2540d24ff551baec
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUAttributor.cpp
Log Message:
-----------
AMDGPU: Stop creating attributor attributes for declarations (#190800)
Commit: 1604565e5ed772f02d2a2c0ef40bddf4f9e8f35d
https://github.com/llvm/llvm-project/commit/1604565e5ed772f02d2a2c0ef40bddf4f9e8f35d
Author: Hemang Gadhavi <hemang.gadhavi at ibm.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M lldb/source/Plugins/Process/AIX/NativeProcessAIX.cpp
M lldb/tools/lldb-server/lldb-gdbserver.cpp
Log Message:
-----------
[lldb][AIX] Enable NativeProcessAIX Manager for lldb-server (#190173)
This PR is in reference to porting LLDB on AIX. Ref discusssions: [llvm
discourse](https://discourse.llvm.org/t/port-lldb-to-ibm-aix/80640) and
https://github.com/llvm/llvm-project/issues/101657.
Complete changes together in this draft:
- https://github.com/llvm/llvm-project/pull/102601
Description:
This change enables proper AIX processes integration with lldb-server,
ensuring correct loading and handling of AIX target architectures.
It also retrieves the target process architecture from the host and
configures NativeProcessAIX accordingly.
Commit: 894fb64bc1a9b70dcb50b313219eff99f69bc527
https://github.com/llvm/llvm-project/commit/894fb64bc1a9b70dcb50b313219eff99f69bc527
Author: Koakuma <koachan at protonmail.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M llvm/lib/Target/Sparc/Sparc.td
M llvm/lib/Target/Sparc/SparcInstr64Bit.td
M llvm/test/MC/Sparc/sparc64-alu-instructions.s
Log Message:
-----------
[SPARC][IAS] Make 64-bit instructions available in 32-bit mode on V9 (#187534)
When the ISA level is V9, 64-bit instruction definitions should be available
even if currently it's not used by any patterns.
This should allow usage of 64-bit instructions, like `sllx`/`srlx`, in inline
assembly snippets in a source file otherwise intended to target V9 processors
running in 32-bit mode, as found in, for example, the Linux kernel.
Commit: cf784ac314b5eefab3ada8ae125a2de56568ef7d
https://github.com/llvm/llvm-project/commit/cf784ac314b5eefab3ada8ae125a2de56568ef7d
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M lldb/bindings/interface/SBFileSpecExtensions.i
A lldb/test/API/python_api/filespec/TestFileSpecAPI.py
Log Message:
-----------
[lldb] Support comparing FileSpec against Python strings (#190690)
We got a bug report where someone was iterating over the modules and
wanted to verify that the module name was empty and noticed it didn't
trigger.
```
for module in target.module_iter():
if module.file is None or module.file == "":
# Do something
```
My initial hypothesis was that we were somehow skipping modules, but
upon further investigation, it was the string comparison that was the
culprit. The reporter (reasonably) expected the `file` property to
return a string, but in reality it returns a SBFileSpec.
This could be avoided by explicitly comparing with an empty FileSpec,
but that seems needlessly tedious.
```
for module in target.module_iter():
if module.file is None or module.file == lldb.SBFileSpec(""):
# Do something
```
Instead, add support for comparing a SBFileSpec against a string.
rdar://174166420
Commit: 8a103806bd7a056447a92d30d26b59edffb8d61e
https://github.com/llvm/llvm-project/commit/8a103806bd7a056447a92d30d26b59edffb8d61e
Author: Keith Smiley <keithbsmiley at gmail.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M utils/bazel/third_party_build/nanobind.BUILD
Log Message:
-----------
[bazel] Make nanobind link on macOS (#190687)
Previously the mlir libraries that are marked as shared didn't link on
macOS since undefined symbols error by default. This uses nanobind's
list of acceptable undefined python symbols to make these link.
Commit: f2bc625b2ce0a7acfa333ed04931227d3ed38a02
https://github.com/llvm/llvm-project/commit/f2bc625b2ce0a7acfa333ed04931227d3ed38a02
Author: Md Abdullah Shahneous Bari <md.abdullah.shahneous.bari at intel.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M mlir/lib/Target/LLVM/XeVM/Target.cpp
R mlir/test/Conversion/MathToXeVM/native-spirv-builtins.mlir
Log Message:
-----------
[XeVM] Refactor the SPIR-V generation to use SPIR-V backend API. (#189494)
Currently, we use 2 different approach to generate SPIR-V based on
compilation target. If compilation target is `assembly/isa`, an MLIR
interface `translateToISA` is used to convert an LLVM module to SPIR-V
text. For other cases (`bin/fatbin` compilation target) SPIR-V backend
API is used to generate SPIR-V binary.
SPIR-V backend API is more powerful, as it lets one pass the necessary
extensions which is a must if one is using any advanced or
vendor-specific SPIR-V features.
This PR discontinues the usage of MLIR API and consolidates to use
SPIR-V API.
It also ensures that SPIR-V generated from MLIR side is always in binary
format (for both XeVM target and SPIR-V target).
Commit: 58a5ce4997f5f50308af1668915767adf6dbbda9
https://github.com/llvm/llvm-project/commit/58a5ce4997f5f50308af1668915767adf6dbbda9
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M lldb/include/lldb/Symbol/Symbol.h
M lldb/source/Core/Disassembler.cpp
M lldb/source/Plugins/ObjectFile/wasm/ObjectFileWasm.cpp
A lldb/test/Shell/ObjectFile/wasm/wasm-local-decls.yaml
Log Message:
-----------
[lldb] Skip local variable declarations at start of Wasm function (#190093)
In WebAssembly, a function starts with a number of local variable
declarations, sometimes called a function header. These declarations are
*not* instructions, but they are considered to be part of the function,
meaning we can't just pretend like the function starts on the first
instruction. Instead, we treat them like a prologue, albeit one that you
cannot disassemble or set a breakpoint on.
With this PR, we now correctly disassemble the function, matching the
output of `objdump` and breakpoints resolve to the first instruction.
Fixes #189960
Commit: f59009d612c1e23e517d77293fd76855047ace5c
https://github.com/llvm/llvm-project/commit/f59009d612c1e23e517d77293fd76855047ace5c
Author: Tom Eccles <tom.eccles at arm.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M flang/lib/Lower/OpenMP/OpenMP.cpp
A flang/test/Integration/OpenMP/taskloop-alloca-placement.f90
M flang/test/Lower/OpenMP/if-clause.f90
M flang/test/Lower/OpenMP/implicit-dsa.f90
M flang/test/Lower/OpenMP/masked_taskloop.f90
M flang/test/Lower/OpenMP/parallel-masked-taskloop.f90
M flang/test/Lower/OpenMP/taskloop-cancel.f90
M flang/test/Lower/OpenMP/taskloop-collapse.f90
M flang/test/Lower/OpenMP/taskloop-grainsize.f90
A flang/test/Lower/OpenMP/taskloop-inreduction.f90
M flang/test/Lower/OpenMP/taskloop-numtasks.f90
A flang/test/Lower/OpenMP/taskloop-reduction.f90
M flang/test/Lower/OpenMP/taskloop.f90
R flang/test/Lower/taskloop-inreduction.f90
R flang/test/Lower/taskloop-reduction.f90
M mlir/include/mlir/Dialect/OpenMP/OpenMPOps.td
M mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
M mlir/test/Conversion/OpenMPToLLVM/convert-to-llvmir.mlir
M mlir/test/Dialect/OpenMP/invalid.mlir
M mlir/test/Dialect/OpenMP/ops.mlir
M mlir/test/Target/LLVMIR/openmp-taskloop-bounds-cast.mlir
M mlir/test/Target/LLVMIR/openmp-taskloop-cancel.mlir
M mlir/test/Target/LLVMIR/openmp-taskloop-cancellation-point.mlir
M mlir/test/Target/LLVMIR/openmp-taskloop-collapse.mlir
A mlir/test/Target/LLVMIR/openmp-taskloop-context-alloca.mlir
M mlir/test/Target/LLVMIR/openmp-taskloop-final.mlir
M mlir/test/Target/LLVMIR/openmp-taskloop-grainsize.mlir
M mlir/test/Target/LLVMIR/openmp-taskloop-if.mlir
M mlir/test/Target/LLVMIR/openmp-taskloop-mergeable.mlir
M mlir/test/Target/LLVMIR/openmp-taskloop-no-context-struct.mlir
M mlir/test/Target/LLVMIR/openmp-taskloop-nogroup.mlir
M mlir/test/Target/LLVMIR/openmp-taskloop-num_tasks.mlir
M mlir/test/Target/LLVMIR/openmp-taskloop-outer-bounds.mlir
M mlir/test/Target/LLVMIR/openmp-taskloop-priority.mlir
M mlir/test/Target/LLVMIR/openmp-taskloop-untied.mlir
M mlir/test/Target/LLVMIR/openmp-taskloop.mlir
M mlir/test/Target/LLVMIR/openmp-todo.mlir
Log Message:
-----------
[mlir][OpenMP] Separate OutlinableInterface from taskloop LoopWrapper (#188068)
Separate taskloop context and loop lowering into different operations.
This allows us to have separate operations representing the outlinable
interface and the loop wrapper interface so that there is somewhere
better than the loop body to put task-local allocations:
```
omp.taskloop.context {
llvm.alloca ...
omp.taskloop {
omp.loop_nest ... {
...
}
}
omp.terminator
}
```
The tests for the real functional change are
- flang/test/Integration/OpenMP/taskloop-alloca-placement.f90
- mlir/test/Target/LLVMIR/openmp-taskloop-context-alloca.mlir
RFC:
https://discourse.llvm.org/t/rfc-openmp-alloca-placement-for-openmp-loop-wrappers/89512/7
This commit keeps all of the clauses on the omp.taskloop op to minimise
changes that have to go into this one commit. I will follow this by
moving clauses to the operation in which they generate code.
Patch 1/3
Commit: fce08a642fe588ebc15ce9dc6066b30fff741ef5
https://github.com/llvm/llvm-project/commit/fce08a642fe588ebc15ce9dc6066b30fff741ef5
Author: Ravil Dorozhinskii <ravil.aviva.com at gmail.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M mlir/include/mlir/Dialect/AMDGPU/IR/AMDGPUAttrs.td
M mlir/include/mlir/Dialect/AMDGPU/IR/AMDGPUDialect.h
A mlir/include/mlir/Dialect/AMDGPU/IR/AMDGPUEnums.h
M mlir/include/mlir/Dialect/AMDGPU/IR/AMDGPUEnums.td
M mlir/include/mlir/Dialect/AMDGPU/IR/AMDGPUOps.td
M mlir/lib/Conversion/AMDGPUToROCDL/AMDGPUToROCDL.cpp
M mlir/lib/Dialect/AMDGPU/IR/AMDGPUOps.cpp
M mlir/test/Conversion/AMDGPUToROCDL/global-prefetch.mlir
M mlir/test/Dialect/AMDGPU/invalid.mlir
Log Message:
-----------
[AMDGPU][MLIR][NFC] moved enc computation to a dedicated method (#189339)
Tried to adapt `GlobalPrefetchOp` for projects like Triton that do not
use `memref`s but they can still use enums exposed to the AMDGPU
dialects. Therefor, they could benefit from just calling a static method
which converts a bunch of enums to a correct `i32` value expected by the
AMDGCN backend.
Also renamed `TemporalHint` to `LoadTemporalHint` because it turned out
there are temporal hints for store operations (for example,
`buffer_store`) which have slightly different enum values (e.g., `WB`
(write-back) instead of `LU`)
Commit: 5df89ae3da8b24804c17479ce74a930783db045e
https://github.com/llvm/llvm-project/commit/5df89ae3da8b24804c17479ce74a930783db045e
Author: Josh Stone <jistone at redhat.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
A llvm/test/CodeGen/SystemZ/vec-trunc-to-i16.ll
Log Message:
-----------
[CodeGen] Preserve big-endian trunc in concat_vectors (#190701)
A transform from `concat_vectors(trunc(scalar), undef)` to
`scalar_to_vector(scalar)` is only equivalent for little-endian targets.
On big-endian, that would put the extra upper bytes ahead of the desired
truncated bytes. This problem was seen on Rust s390x in [RHEL-147748].
[RHEL-147748]: https://redhat.atlassian.net/browse/RHEL-147748
Assisted-by: Claude Code
Commit: ea5d9c75f3bec95f891f064f413e9d57b54a9aeb
https://github.com/llvm/llvm-project/commit/ea5d9c75f3bec95f891f064f413e9d57b54a9aeb
Author: HighW4y2H3ll <zhenghaohuu at gmail.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M llvm/tools/llvm-profgen/ProfiledBinary.h
Log Message:
-----------
[llvm-profgen] Fix break to continue in PrologEpilogTracker loops (#188565)
In inferPrologAddresses and inferEpilogAddresses, using `break`
incorrectly stops processing all remaining entries when a single
IP.advance() or IP.backward() fails. Change to `continue` so that only
the failing entry is skipped.
Commit: 4ecdf5eed42578b55c0feb7a8fb0d34f44cbbc1c
https://github.com/llvm/llvm-project/commit/4ecdf5eed42578b55c0feb7a8fb0d34f44cbbc1c
Author: Wael Yehia <wmyehia2001 at yahoo.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
Log Message:
-----------
[AIX][ifunc] fix error message creation logic (misbehaves in production builds) (#188060)
I don't know why the old code was causing the function name to come out
empty in the message, in certain builds of llvm.
It's either a misuse[1] of the Twine class, or a bug somewhere else.
So this PR rewrites the logic by building the message into a
SmallString<128>. This logic is part of error handling, so optimizing it
is not important.
[1] I checked the usage and couldn't find anything suspicious
Co-authored-by: Wael Yehia <wyehia at ca.ibm.com>
Commit: 4f040ce3f7d466d90a16aac99c67ddd62d571e7b
https://github.com/llvm/llvm-project/commit/4f040ce3f7d466d90a16aac99c67ddd62d571e7b
Author: forking-google-bazel-bot[bot] <265904573+forking-google-bazel-bot[bot]@users.noreply.github.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[Bazel] Fixes fce08a6 (#190821)
This fixes fce08a642fe588ebc15ce9dc6066b30fff741ef5.
Co-authored-by: Google Bazel Bot <google-bazel-bot at google.com>
Commit: 07e8db61f9e10a5825330d63c36022e849c96116
https://github.com/llvm/llvm-project/commit/07e8db61f9e10a5825330d63c36022e849c96116
Author: Andrew Haberlandt <ahaberlandt at apple.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M compiler-rt/lib/sanitizer_common/sanitizer_common.h
Log Message:
-----------
[sanitizer_common] Fix memory leak in ListOfModules (#190104)
I found a rather old leak in `ListOfModules`. `ListOfModules` has a
member
```
InternalMmapVectorNoCtor<LoadedModule> modules_;
```
Which has neither a constructor nor destructor. As a consequence, we
need to call `Destroy` on it when ListOfModules is destroyed, so that
the memory is released to the OS (via munmap).
rdar://173906291
Commit: 904d3245569d51ecbd9f50ff99e143c4041c8c56
https://github.com/llvm/llvm-project/commit/904d3245569d51ecbd9f50ff99e143c4041c8c56
Author: Zhen Wang <zhenw at nvidia.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M flang/module/cudadevice.f90
M flang/test/Lower/CUDA/cuda-device-proc.cuf
M flang/test/Lower/CUDA/cuda-intrinsic.cuf
M flang/test/Lower/CUDA/cuda-libdevice.cuf
Log Message:
-----------
[flang][cuda] Remove __nv_ binding names from rounding-mode intrinsics in cudadevice (#190722)
Remove name='__nv_...' from bind(c) declarations for 48 rounding-mode
functions in cudadevice.f90, allowing host,device functions to link
against the unprefixed host symbols. The __nv_ prefix for device code is
handled by a downstream pass.
Commit: 835b0acced2d993fc7cfd0ec59cd02547b4f1cd1
https://github.com/llvm/llvm-project/commit/835b0acced2d993fc7cfd0ec59cd02547b4f1cd1
Author: Bryson Miller <andrewmiller77 at protonmail.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVBase.td
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVImageOps.td
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVTypes.h
M mlir/lib/Dialect/SPIRV/IR/SPIRVDialect.cpp
M mlir/lib/Dialect/SPIRV/IR/SPIRVTypes.cpp
M mlir/lib/Target/SPIRV/Deserialization/DeserializeOps.cpp
M mlir/lib/Target/SPIRV/Deserialization/Deserializer.cpp
M mlir/lib/Target/SPIRV/Deserialization/Deserializer.h
M mlir/lib/Target/SPIRV/Serialization/Serializer.cpp
M mlir/test/Dialect/SPIRV/IR/composite-ops.mlir
M mlir/test/Dialect/SPIRV/IR/image-ops.mlir
M mlir/test/Dialect/SPIRV/IR/types.mlir
M mlir/test/Target/SPIRV/image-ops.mlir
M mlir/test/Target/SPIRV/sampled-image.mlir
Log Message:
-----------
[mlir][spirv] Add OpTypeSampler and OpSampledImage support (#189891)
Add missing `!spirv.sampler` type (`OpTypeSampler`, opcode 26) and
`spirv.SampledImage` op (`OpSampledImage`, opcode 86) to the SPIR-V
dialect.
The existing sampling ops (e.g. `spirv.ImageSampleImplicitLod`) consume
`!spirv.sampled_image<...>` values, but there was previously no way to
construct one from a separate image and sampler which is the standard
Vulkan pattern for combined image samplers.
Commit: d78e4ae16c8ff8cfc86cd4bfdc2e586198e94629
https://github.com/llvm/llvm-project/commit/d78e4ae16c8ff8cfc86cd4bfdc2e586198e94629
Author: Andrew <dota2drot at gmail.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M llvm/docs/CommandGuide/llvm-cov.rst
Log Message:
-----------
docs: add ability to show non executed test vectors for mc/dc coverage (#190747)
Add new option `-show-mcdc-non-executed-vectors` to llvm-cov docs
Commit: 87525c5340e8bee3709c9f4b83fae535b074dc8a
https://github.com/llvm/llvm-project/commit/87525c5340e8bee3709c9f4b83fae535b074dc8a
Author: Ruoyu Qiu <cabbaken at outlook.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M llvm/lib/Analysis/DependenceAnalysis.cpp
M llvm/test/Analysis/DependenceAnalysis/banerjee-overflow.ll
Log Message:
-----------
[DA] Add overflow check in BanerjeeMIVtest (#190469)
Add an overflow check in BanerjeeMIVtest.
Fix the related test case added in #190468.
Signed-off-by: Ruoyu Qiu <cabbaken at outlook.com>
Commit: da96fc3dea01b4eedaa83c715f1e7dc616126032
https://github.com/llvm/llvm-project/commit/da96fc3dea01b4eedaa83c715f1e7dc616126032
Author: Tom Eccles <tom.eccles at arm.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Optimizer/Analysis/AliasAnalysis.cpp
M flang/test/Integration/OpenMP/taskloop-alloca-placement.f90
M flang/test/Lower/OpenMP/if-clause.f90
M flang/test/Lower/OpenMP/implicit-dsa.f90
M flang/test/Lower/OpenMP/masked_taskloop.f90
M flang/test/Lower/OpenMP/parallel-masked-taskloop.f90
M flang/test/Lower/OpenMP/taskloop-cancel.f90
M flang/test/Lower/OpenMP/taskloop-collapse.f90
M flang/test/Lower/OpenMP/taskloop-grainsize.f90
M flang/test/Lower/OpenMP/taskloop-inreduction.f90
M flang/test/Lower/OpenMP/taskloop-numtasks.f90
M flang/test/Lower/OpenMP/taskloop-reduction.f90
M flang/test/Lower/OpenMP/taskloop.f90
M mlir/include/mlir/Dialect/OpenMP/OpenMPOps.td
M mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
M mlir/lib/Dialect/OpenMP/Transforms/MarkDeclareTarget.cpp
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
M mlir/test/Conversion/OpenMPToLLVM/convert-to-llvmir.mlir
M mlir/test/Dialect/OpenMP/invalid.mlir
M mlir/test/Dialect/OpenMP/ops.mlir
M mlir/test/Target/LLVMIR/openmp-taskloop-bounds-cast.mlir
M mlir/test/Target/LLVMIR/openmp-taskloop-cancel.mlir
M mlir/test/Target/LLVMIR/openmp-taskloop-cancellation-point.mlir
M mlir/test/Target/LLVMIR/openmp-taskloop-collapse.mlir
M mlir/test/Target/LLVMIR/openmp-taskloop-context-alloca.mlir
M mlir/test/Target/LLVMIR/openmp-taskloop-final.mlir
M mlir/test/Target/LLVMIR/openmp-taskloop-grainsize.mlir
M mlir/test/Target/LLVMIR/openmp-taskloop-if.mlir
M mlir/test/Target/LLVMIR/openmp-taskloop-mergeable.mlir
M mlir/test/Target/LLVMIR/openmp-taskloop-no-context-struct.mlir
M mlir/test/Target/LLVMIR/openmp-taskloop-nogroup.mlir
M mlir/test/Target/LLVMIR/openmp-taskloop-num_tasks.mlir
M mlir/test/Target/LLVMIR/openmp-taskloop-outer-bounds.mlir
M mlir/test/Target/LLVMIR/openmp-taskloop-priority.mlir
M mlir/test/Target/LLVMIR/openmp-taskloop-untied.mlir
M mlir/test/Target/LLVMIR/openmp-taskloop.mlir
M mlir/test/Target/LLVMIR/openmp-todo.mlir
Log Message:
-----------
[mlir][OpenMP] Move taskloop clauses to the context op (#188070)
The clauses are implemented when lowering the context op (which
generates the runtime calls, and handles the outlining of the task
function: including privatization etc). Therefore I thought it made more
sense to put the clauses on this operation rather than on the wrapped
loop.
RFC:
https://discourse.llvm.org/t/rfc-openmp-alloca-placement-for-openmp-loop-wrappers/89512/7
Patch 2/3
Commit: cfec3b8efb6b04edce719ac3f2150330cf82aaff
https://github.com/llvm/llvm-project/commit/cfec3b8efb6b04edce719ac3f2150330cf82aaff
Author: Jianhui Li <jian.hui.li at intel.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M mlir/lib/Dialect/XeGPU/Transforms/XeGPULayoutImpl.cpp
M mlir/test/Dialect/XeGPU/propagate-layout-subgroup.mlir
Log Message:
-----------
[MLIR][XeGPU] Fix Multi-Reduction Layout Rule to Preserve sg_data from consumer layout for non-reduced dims (#189795)
As title
Commit: eb991873d20d62623c271ee01cd7a0ca2e4db63a
https://github.com/llvm/llvm-project/commit/eb991873d20d62623c271ee01cd7a0ca2e4db63a
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M lldb/test/Shell/Platform/AutoLoad/Darwin/dsym-auto-load-modules-multiple.test
Log Message:
-----------
[lldb][test] Fix dsym-auto-load-modules-multiple.test (#190826)
We were compiling without debug-info causing the test to fail on macOS.
This was a silly oversight because I was mainly working on Linux when
working on the last iterations of the patch that added this test.
Commit: d243d55ce4db80a983c8b07647a95d9279cd1fc4
https://github.com/llvm/llvm-project/commit/d243d55ce4db80a983c8b07647a95d9279cd1fc4
Author: Tom Eccles <tom.eccles at arm.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M flang/lib/Lower/OpenMP/DataSharingProcessor.cpp
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/test/Integration/OpenMP/taskloop-alloca-placement.f90
M flang/test/Lower/OpenMP/if-clause.f90
M flang/test/Lower/OpenMP/implicit-dsa.f90
M flang/test/Lower/OpenMP/masked_taskloop.f90
M flang/test/Lower/OpenMP/parallel-masked-taskloop.f90
M flang/test/Lower/OpenMP/taskloop-cancel.f90
M flang/test/Lower/OpenMP/taskloop-collapse.f90
M flang/test/Lower/OpenMP/taskloop-grainsize.f90
M flang/test/Lower/OpenMP/taskloop-inreduction.f90
M flang/test/Lower/OpenMP/taskloop-numtasks.f90
M flang/test/Lower/OpenMP/taskloop-reduction.f90
M flang/test/Lower/OpenMP/taskloop.f90
M mlir/docs/Dialects/OpenMPDialect/_index.md
M mlir/include/mlir/Dialect/OpenMP/OpenMPDialect.h
M mlir/include/mlir/Dialect/OpenMP/OpenMPOps.td
M mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
M mlir/test/Conversion/OpenMPToLLVM/convert-to-llvmir.mlir
M mlir/test/Dialect/OpenMP/invalid.mlir
M mlir/test/Dialect/OpenMP/ops.mlir
M mlir/test/Target/LLVMIR/openmp-taskloop-bounds-cast.mlir
M mlir/test/Target/LLVMIR/openmp-taskloop-cancel.mlir
M mlir/test/Target/LLVMIR/openmp-taskloop-cancellation-point.mlir
M mlir/test/Target/LLVMIR/openmp-taskloop-collapse.mlir
M mlir/test/Target/LLVMIR/openmp-taskloop-context-alloca.mlir
M mlir/test/Target/LLVMIR/openmp-taskloop-final.mlir
M mlir/test/Target/LLVMIR/openmp-taskloop-grainsize.mlir
M mlir/test/Target/LLVMIR/openmp-taskloop-if.mlir
M mlir/test/Target/LLVMIR/openmp-taskloop-mergeable.mlir
M mlir/test/Target/LLVMIR/openmp-taskloop-no-context-struct.mlir
M mlir/test/Target/LLVMIR/openmp-taskloop-nogroup.mlir
M mlir/test/Target/LLVMIR/openmp-taskloop-num_tasks.mlir
M mlir/test/Target/LLVMIR/openmp-taskloop-outer-bounds.mlir
M mlir/test/Target/LLVMIR/openmp-taskloop-priority.mlir
M mlir/test/Target/LLVMIR/openmp-taskloop-untied.mlir
M mlir/test/Target/LLVMIR/openmp-taskloop.mlir
M mlir/test/Target/LLVMIR/openmp-todo.mlir
Log Message:
-----------
[mlir][OpenMP] Rename omp.taskloop to omp.taskloop.wrapper (#188071)
Rename the loop wrapper operation to better distinguish it from the
context op (omp.taskloop.context), which handles outlining and runtime
calls. The new name makes the role of each operation clearer at a
glance.
RFC:
https://discourse.llvm.org/t/rfc-openmp-alloca-placement-for-openmp-loop-wrappers/89512/7
Patch 3/3
Assisted-by: Copilot, Claude Sonnet 4.6
Commit: a974f0a227615aeaca69c041ea612a797bf9b2c1
https://github.com/llvm/llvm-project/commit/a974f0a227615aeaca69c041ea612a797bf9b2c1
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
A llvm/utils/llvm-testing-tools/README.md
A llvm/utils/llvm-testing-tools/pyproject.toml
A llvm/utils/llvm-testing-tools/src/llvm_testing_tools/__init__.py
A llvm/utils/llvm-testing-tools/src/llvm_testing_tools/wrapper.py
Log Message:
-----------
[TestingTools] Add new llvm-testing-tools package (#188888)
This allows for packaging split-file and FileCheck for distribution on
PyPI which will support libc++ wanting to use FileCheck/split-file for
more thorough testing.
Commit: 639818145812ca04837decdc978a74e2b67da829
https://github.com/llvm/llvm-project/commit/639818145812ca04837decdc978a74e2b67da829
Author: satyanarayana reddy janga <satyajanga at fb.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M lldb/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp
A lldb/unittests/Instruction/ARM/TestARMEmulator.cpp
M lldb/unittests/Instruction/CMakeLists.txt
Log Message:
-----------
[lldb] Fix ARM STR T1 encoding using subtract instead of add, add test (#188614)
The STR Thumb T1 encoding had add=false instead of add=true, causing the
emulator to compute the store address as Rn - imm rather than Rn + imm.
This contradicts the ARM spec comment directly above.
Add a unit test that verifies the STR T1 encoding stores to the correct
address (base + offset).
Commit: 1d6ad6e951411ee1153147accde2f6dd7fcb6128
https://github.com/llvm/llvm-project/commit/1d6ad6e951411ee1153147accde2f6dd7fcb6128
Author: Erich Keane <ekeane at nvidia.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M clang/include/clang/CIR/Dialect/Builder/CIRBaseBuilder.h
M clang/test/CIR/CodeGen/pointer-to-member-func.cpp
Log Message:
-----------
[CIR] Implement 'zero attr' creation of method (#190819)
This appears quite a bit in some benchmarks, and is seemingly something
we missed at one point. This patch just implements a 'zero-init' of a
pmf.
Commit: 3dfa02157883145490d5d4591ffe56ba06826c17
https://github.com/llvm/llvm-project/commit/3dfa02157883145490d5d4591ffe56ba06826c17
Author: Alex Langford <alangford at apple.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M lldb/source/API/SBListener.cpp
M lldb/source/Core/Debugger.cpp
Log Message:
-----------
[lldb][NFC] Stop using ConstStrings with BroadcastEventSpec (#190660)
BroadcastEventSpec owns the broadcaster class its configured to listen
for. Broadcasters usually advertise their broadcast class name with
StringRefs so there's no need to put them in the string pool.
The only exception here is SBListener. There are 2 methods that take
`const char *` values. However, that's handled when converting them to
StringRefs.
Commit: c6694e531986bbe2e436cac58213b76ff26085f4
https://github.com/llvm/llvm-project/commit/c6694e531986bbe2e436cac58213b76ff26085f4
Author: Arthur Eubanks <aeubanks at google.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M llvm/docs/LangRef.rst
M llvm/include/llvm/Analysis/InlineOrder.h
M llvm/include/llvm/IR/FixedMetadataKinds.def
M llvm/include/llvm/Transforms/Utils/Cloning.h
M llvm/lib/Analysis/InlineOrder.cpp
M llvm/lib/IR/Verifier.cpp
M llvm/lib/Transforms/IPO/AlwaysInliner.cpp
M llvm/lib/Transforms/IPO/Inliner.cpp
M llvm/lib/Transforms/IPO/ModuleInliner.cpp
M llvm/lib/Transforms/IPO/PartialInlining.cpp
M llvm/lib/Transforms/Utils/CloneFunction.cpp
M llvm/lib/Transforms/Utils/InlineFunction.cpp
M llvm/test/Transforms/Inline/debug-invoke.ll
R llvm/test/Transforms/Inline/inline-history-2.ll
A llvm/test/Transforms/Inline/inline-history-noinline.ll
R llvm/test/Transforms/Inline/inline-history.ll
M llvm/test/Transforms/Inline/inline-recursive-fn2.ll
R llvm/test/Verifier/inline-history-metadata.ll
M llvm/unittests/Analysis/InlineOrderPlugin/InlineOrderPlugin.cpp
Log Message:
-----------
Revert "[Inliner] Put inline history into IR as !inline_history metadata" (#190824)
Reverts llvm/llvm-project#190700
Causes timeouts:
https://github.com/llvm/llvm-project/pull/190700#issuecomment-4198496978
Commit: 16a831655f79a3c034cba7d25ad5cfbfa9f54f37
https://github.com/llvm/llvm-project/commit/16a831655f79a3c034cba7d25ad5cfbfa9f54f37
Author: David Green <david.green at arm.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/test/CodeGen/AMDGPU/sdiv64.ll
M llvm/test/CodeGen/AMDGPU/udiv64.ll
M llvm/test/CodeGen/AMDGPU/urem64.ll
M llvm/test/CodeGen/Thumb2/mve-vmulh.ll
M llvm/test/CodeGen/X86/combine-pmuldq.ll
Log Message:
-----------
[DAG] Use known-bits when creating umulh/smulh. (#160916)
This extends the creation of umulh/smulh instructions to handle cases
where one operand is a zext/sext and the other has enough known-zero or
sign bits to create a mulh. This can be useful when one of the operands
is hoisted out of a loop.
Commit: 4913bd5588ada1dfd0e5a822b016d99b8196ca43
https://github.com/llvm/llvm-project/commit/4913bd5588ada1dfd0e5a822b016d99b8196ca43
Author: Ziqing Luo <ziqing_luo at apple.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M clang/include/clang/ScalableStaticAnalysisFramework/Analyses/UnsafeBufferUsage/UnsafeBufferUsage.h
A clang/include/clang/ScalableStaticAnalysisFramework/Analyses/UnsafeBufferUsage/UnsafeBufferUsageTest.h
M clang/include/clang/ScalableStaticAnalysisFramework/SSAFBuiltinForceLinker.h
M clang/lib/ScalableStaticAnalysisFramework/Analyses/CMakeLists.txt
A clang/lib/ScalableStaticAnalysisFramework/Analyses/UnsafeBufferUsage/UnsafeBufferUsage.cpp
M clang/lib/ScalableStaticAnalysisFramework/Frontend/CMakeLists.txt
A clang/test/Analysis/Scalable/UnsafeBufferUsage/Inputs/tu-summary-bad-element.json
A clang/test/Analysis/Scalable/UnsafeBufferUsage/Inputs/tu-summary-bad-ptr-level.json
A clang/test/Analysis/Scalable/UnsafeBufferUsage/Inputs/tu-summary-no-key.json
A clang/test/Analysis/Scalable/UnsafeBufferUsage/Inputs/tu-summary.json
A clang/test/Analysis/Scalable/UnsafeBufferUsage/tu-summary-serialization.test
M clang/test/Analysis/Scalable/ssaf-format/list.test
M clang/unittests/ScalableStaticAnalysisFramework/Analyses/UnsafeBufferUsage/UnsafeBufferUsageTest.cpp
Log Message:
-----------
[ssaf][UnsafeBufferUsage] Add JSON serialization for UnsafeBufferUsage (#187156)
Implemented and registered a JSONFormat::FormatInfo for
UnsafeBufferUsage analysis
rdar://171920065
---------
Co-authored-by: Balázs Benics <benicsbalazs at gmail.com>
Commit: 824fc35bd9453e1776f098cc5d7123b1034ea510
https://github.com/llvm/llvm-project/commit/824fc35bd9453e1776f098cc5d7123b1034ea510
Author: Benoit Jacob <jacob.benoit.1 at gmail.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M mlir/lib/Dialect/Vector/IR/VectorOps.cpp
R mlir/test/Dialect/Linalg/transform-op-mmt4d-to-fma.mlir
M mlir/test/Dialect/Vector/canonicalize/vector-to-shape-cast.mlir
A mlir/test/Dialect/Vector/vector-multi-reduction-to-fma.mlir
Log Message:
-----------
[mlir][vector] Constrain broadcast->shape_cast folding (#190230)
Fixes https://github.com/llvm/llvm-project/issues/190614.
Do not fold broadcast->shape_cast when that would result in switching
between the two distinct semantic modes of `vector.broadcast`, as
explained in https://github.com/llvm/llvm-project/issues/190614.
This fixes incorrect-result bugs in IREE:
https://github.com/iree-org/iree/issues/23952
---------
Signed-off-by: Benoit Jacob <benoit.jacob at amd.com>
Commit: 3098b4da81c254b40f6bc931bbb1933df12dc0a9
https://github.com/llvm/llvm-project/commit/3098b4da81c254b40f6bc931bbb1933df12dc0a9
Author: Slava Zakharin <szakharin at nvidia.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M flang/include/flang/Optimizer/Transforms/Passes.h
M flang/include/flang/Optimizer/Transforms/Passes.td
M flang/lib/Optimizer/Transforms/LoopInvariantCodeMotion.cpp
M flang/test/Transforms/licm.fir
Log Message:
-----------
[flang] Added LICM hoisting for nested regions. (#190696)
This patch adds a couple of experimental LICM modes
that allow hoisting operations from regions nested
inside a loop, e.g. when there is `fir.if` inside
`fir.do_loop`. The aggressive mode hoists all operations
that are safe to hoist. The cheap mode hoists only
"cheap" operations (currently, only `fir.convert`),
though the definition of "cheap" needs to be worked out.
Commit: a030dfb53b21bd900aeed7830f408a79501418dc
https://github.com/llvm/llvm-project/commit/a030dfb53b21bd900aeed7830f408a79501418dc
Author: Med Ismail Bennani <ismail at bennani.ma>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M lldb/include/lldb/Interpreter/CommandOptionArgumentTable.h
M lldb/include/lldb/Target/Target.h
M lldb/include/lldb/Target/Thread.h
M lldb/include/lldb/lldb-enumerations.h
M lldb/source/Commands/CommandObjectTarget.cpp
M lldb/source/Commands/CommandObjectThread.cpp
M lldb/source/Commands/Options.td
M lldb/source/Interpreter/CommandInterpreter.cpp
M lldb/source/Target/Target.cpp
M lldb/source/Target/Thread.cpp
M lldb/test/API/functionalities/scripted_frame_provider/pass_through_prefix/TestFrameProviderPassThroughPrefix.py
M lldb/test/API/functionalities/scripted_frame_provider/pass_through_prefix/frame_provider.py
A lldb/test/API/functionalities/scripted_frame_provider/thread_filter/Makefile
A lldb/test/API/functionalities/scripted_frame_provider/thread_filter/TestFrameProviderThreadFilter.py
A lldb/test/API/functionalities/scripted_frame_provider/thread_filter/frame_provider.py
A lldb/test/API/functionalities/scripted_frame_provider/thread_filter/main.cpp
Log Message:
-----------
[lldb] Add --provider option to thread backtrace (#181071)
Commit: 9744f1bd64f3d0f09d81a33368378d4ccd1beb91
https://github.com/llvm/llvm-project/commit/9744f1bd64f3d0f09d81a33368378d4ccd1beb91
Author: Brendan Dahl <brendan.dahl at gmail.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M clang/lib/Headers/wasm_simd128.h
M cross-project-tests/intrinsic-header-tests/wasm_simd128.c
M llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
M llvm/test/CodeGen/WebAssembly/f16-intrinsics.ll
M llvm/test/MC/WebAssembly/simd-encodings.s
Log Message:
-----------
[WebAssembly] Support promoting lower lanes of f16x8 to f32x4. (#129786)
Commit: 88a78f651c5e6b89bf6377e06d5fe5e92cd1ae2a
https://github.com/llvm/llvm-project/commit/88a78f651c5e6b89bf6377e06d5fe5e92cd1ae2a
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/lib/CIR/CodeGen/CIRGenClass.cpp
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
M clang/lib/CIR/Dialect/Transforms/LoweringPrepare.cpp
M clang/test/CIR/CodeGen/new.cpp
M clang/test/CIR/IR/array-ctor.cir
A clang/test/CIR/IR/invalid-array-structor.cir
Log Message:
-----------
[CIR] Add support for variable sized array new. (#190656)
This change adds support for array new with variable size. This required
extending the cir.array.ctor operation to accept a value for the size
and a direct pointer to the element size instead of a pointer to an
array.
Assisted-by: Cursor / claude-4.6-opus-high
Assisted-by: Cursor / composer-2-fast
Commit: e382a955c9f8bf07d28daaedcd404ca530df9be4
https://github.com/llvm/llvm-project/commit/e382a955c9f8bf07d28daaedcd404ca530df9be4
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M llvm/test/Transforms/LoopVectorize/AArch64/binop-costs.ll
M llvm/test/Transforms/LoopVectorize/AArch64/type-shrinkage-zext-costs.ll
M llvm/test/Transforms/LoopVectorize/RISCV/reg-usage.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-reduction-cost.ll
M llvm/test/Transforms/LoopVectorize/WebAssembly/int-mac-reduction-costs.ll
M llvm/test/Transforms/LoopVectorize/WebAssembly/memory-interleave.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/handle-iptr-with-data-layout-to-not-assert.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-f32-stride-2.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-f32-stride-3.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-f32-stride-4.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-f32-stride-5.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-f32-stride-6.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-f32-stride-7.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-f32-stride-8.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-f64-stride-2.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-f64-stride-3.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-f64-stride-4.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-f64-stride-5.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-f64-stride-6.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-f64-stride-7.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-f64-stride-8.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-half.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i16-stride-2.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i16-stride-3.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i16-stride-4.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i16-stride-5.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i16-stride-6.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i16-stride-7.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i16-stride-8.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i32-stride-2-indices-0u.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i32-stride-2.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i32-stride-3-indices-01u.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i32-stride-3-indices-0uu.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i32-stride-3.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i32-stride-4-indices-012u.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i32-stride-4-indices-01uu.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i32-stride-4-indices-0uuu.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i32-stride-4.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i32-stride-5.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i32-stride-6.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i32-stride-7.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i32-stride-8.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i64-stride-2.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i64-stride-3.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i64-stride-4.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i64-stride-5.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i64-stride-6.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i64-stride-7.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i64-stride-8.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i8-stride-2.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i8-stride-3.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i8-stride-4.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i8-stride-5.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i8-stride-6.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i8-stride-7.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i8-stride-8.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-f32-stride-2.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-f32-stride-3.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-f32-stride-4.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-f32-stride-5.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-f32-stride-6.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-f32-stride-7.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-f32-stride-8.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-f64-stride-2.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-f64-stride-3.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-f64-stride-4.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-f64-stride-5.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-f64-stride-6.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-f64-stride-7.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-f64-stride-8.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i16-stride-2.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i16-stride-3.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i16-stride-4.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i16-stride-5.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i16-stride-6.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i16-stride-7.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i16-stride-8.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i32-stride-2.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i32-stride-3.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i32-stride-4.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i32-stride-5.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i32-stride-6.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i32-stride-7.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i32-stride-8.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i64-stride-2.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i64-stride-3.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i64-stride-4.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i64-stride-5.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i64-stride-6.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i64-stride-7.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i64-stride-8.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i8-stride-2.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i8-stride-3.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i8-stride-4.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i8-stride-5.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i8-stride-6.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i8-stride-7.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i8-stride-8.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/masked-interleaved-load-i16.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/masked-interleaved-store-i16.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/masked-scatter-i32-with-i8-index.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/masked-scatter-i64-with-i8-index.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/masked-store-i16.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/masked-store-i32.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/masked-store-i64.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/masked-store-i8.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/scatter-i16-with-i8-index.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/scatter-i32-with-i8-index.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/scatter-i64-with-i8-index.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/scatter-i8-with-i8-index.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/strided-load-i16.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/strided-load-i32.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/strided-load-i64.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/strided-load-i8.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/vpinstruction-cost.ll
Log Message:
-----------
[LV] Update remaining tests to use VPlan cost output (NFC). (#190038)
Move remaining tests checking legacy cost output to check the VPlan's
cost model output.
In some cases, checks become much more compact (checking a single
interleave group cost vs checking the individual members which all have
the group's cost). In some cases, auto-generation consistently checks
all relevant VFs.
PR: https://github.com/llvm/llvm-project/pull/190038
Commit: c7c902574cb1eb0da6463f1fd1c4d94c1aba9e33
https://github.com/llvm/llvm-project/commit/c7c902574cb1eb0da6463f1fd1c4d94c1aba9e33
Author: Shanzhi Chen <chenshanzhi at huawei.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp
M bolt/lib/Target/AArch64/CMakeLists.txt
M bolt/unittests/Core/MCPlusBuilder.cpp
Log Message:
-----------
[BOLT][AArch64] Optimize the mov-imm-to-reg operation (#189304)
On AArch64, logical immediate instructions are used to encode some
special immediate values. And even at `-O0` level, the AArch64 backend
would not choose to generate 4 instructions (movz, movk, movk, movk) for
moving such a special value to a 64-bit regiter.
For example, to move the 64-bit value `0x0001000100010001` to `x0`, the
AArch64 backend would not choose a 4-instruction-sequence like
```
movz x0, 0x0001
movk x0, 0x0001, lsl 16
movk x0, 0x0001, lsl 32
movk x0, 0x0001, lsl 48
```
Actually, the AArch64 backend would choose to generate one instruction
```
mov x0, 0x0001000100010001
```
which is essentially
```
orr x1, xzr, 0x0001000100010001
```
We could refer to `AArch64ExpandPseudoImpl::expandMOVImm` and
`AArch64_IMM::expandMOVImm` for related implementation.
Therefore, maybe we could consider to leverage `expandMOVImm` in llvm to
optimize the mov-imm-to-reg operation in BOLT, which would help to speed
up the BOLT-instrumented binary.
Commit: 05f9c66c38c646b4795268a9c6c3aa479c793a8c
https://github.com/llvm/llvm-project/commit/05f9c66c38c646b4795268a9c6c3aa479c793a8c
Author: Valeriy Savchenko <vsavchenko at apple.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
A llvm/test/CodeGen/AArch64/branch-on-bool.ll
Log Message:
-----------
[AArch64] Normalize (bool CC 1) to (bool NewCC 0) in LowerBR_CC (#189380)
Commit: b3c093d957a972e896107abd350605babc0e5c52
https://github.com/llvm/llvm-project/commit/b3c093d957a972e896107abd350605babc0e5c52
Author: Min-Yih Hsu <min.hsu at sifive.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M llvm/test/tools/llvm-mca/RISCV/Inputs/rvv/mask.s
M llvm/test/tools/llvm-mca/RISCV/SiFiveP400/rvv/mask.test
M llvm/test/tools/llvm-mca/RISCV/SiFiveP600/rvv/mask.test
M llvm/test/tools/llvm-mca/RISCV/SiFiveX100/rvv/mask.test
M llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv/mask.test
Log Message:
-----------
[RISCV][MCA] Do not use mask instructions that can potentially be optimized by uArch (#190820)
Context:
https://github.com/llvm/llvm-project/pull/189785#discussion_r3019282209
Some mask instructions have a form that can potentially be optimized by
HW implementation: `vmxor.mm vd, vs, vs` and `vmclr vd, vs`, for
instance. This patch avoids using such instructions in MCA tests.
Commit: 88af28072637213c32cd53c99c4b9d79ded6e746
https://github.com/llvm/llvm-project/commit/88af28072637213c32cd53c99c4b9d79ded6e746
Author: Deric C. <cheung.deric at gmail.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M clang/include/clang/Basic/HLSLIntrinsics.td
M clang/lib/Headers/hlsl/hlsl_alias_intrinsics.h
M clang/lib/Headers/hlsl/hlsl_detail.h
M clang/lib/Headers/hlsl/hlsl_intrinsic_helpers.h
M clang/lib/Headers/hlsl/hlsl_intrinsics.h
M clang/test/CodeGenHLSL/builtins/dst.hlsl
M clang/test/CodeGenHLSL/builtins/ldexp.hlsl
M clang/test/CodeGenHLSL/resources/NonUniformResourceIndex.hlsl
M clang/test/SemaHLSL/BuiltIns/D3DCOLORtoUBYTE4-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/distance-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/dot2add-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/faceforward-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/fmod-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/ldexp-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/length-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/reflect-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/refract-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/smoothstep-errors.hlsl
Log Message:
-----------
[HLSL] Rewrite inline HLSL intrinsics into TableGen (#188362)
Partially addresses https://github.com/llvm/llvm-project/issues/188345.
This PR rewrites all applicable inline HLSL intrinsics from
`hlsl_intrinsics.h` into TableGen.
The unsigned `abs` from `hlsl_alias_intrinsics.h` is also rewritten into
TableGen since it can also be defined inline.
The `NonUniformResourceIndex` is moved from `hlsl_intrinsics.h` over to
`hlsl_alias_intrinsics.h` since it can be defined as an alias.
`__detail::.*_impl` helper functions that were one liners have been
removed, and their corresponding HLSL intrinsics have been defined in
TableGen using the `Body` field instead.
Note that rewriting `refract` in TableGen instead of templates
introduces some significant changes to error messages and also
introduces a new offload test suite failure in the fp16 test because a
call to `refract(x, y, 0.5)` where x and y are half-typed vectors is
ambiguous due to 0.5 being a 32-bit float literal.
The generated `hlsl_inline_intrinsics_gen.inc` file looks like this:
https://gist.github.com/Icohedron/a1c4a47ad0bb184f857430835d7d2ca3
Assisted-by: GitHub Copilot
---------
Co-authored-by: Justin Bogner <mail at justinbogner.com>
Commit: f68868db062bdd7e94affbefd0b59e72650379a3
https://github.com/llvm/llvm-project/commit/f68868db062bdd7e94affbefd0b59e72650379a3
Author: Arthur Eubanks <aeubanks at google.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M llvm/lib/IR/Value.cpp
Log Message:
-----------
Revert "[IR] Use iteration limit in stripPointerCastsAndOffsets" (#190839)
Reverts llvm/llvm-project#190472
Causes crashes:
https://github.com/llvm/llvm-project/pull/190472#issuecomment-4201843466
Commit: f069b82693d43206e5d173cd563e0c80493a9ede
https://github.com/llvm/llvm-project/commit/f069b82693d43206e5d173cd563e0c80493a9ede
Author: Anshul Nigham <nigham at google.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M llvm/lib/Target/AArch64/GISel/AArch64PostLegalizerCombiner.cpp
Log Message:
-----------
[NFC] Drop AArch64PostLegalizerCombiner dep on TargetPassConfig (#190569)
This will enable NewPM porting.
Replaced with the definition in
[AArch64PassConfig::getCSEConfig](https://github.com/llvm/llvm-project/blob/1d549d9a777a6faef6d425cb6482ab1fa6b91bb7/llvm/lib/Target/AArch64/AArch64TargetMachine.cpp#L614)
Commit: bafb2cbe22f4d6c466e6ad82e6fe5a94c4dcd497
https://github.com/llvm/llvm-project/commit/bafb2cbe22f4d6c466e6ad82e6fe5a94c4dcd497
Author: David Pagan <dave.pagan at amd.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/lib/Sema/SemaOpenMP.cpp
A clang/test/OpenMP/declare_target_local_map_messages.cpp
Log Message:
-----------
[clang][OpenMP] declare_target/local clause variable can't be in map clause (#190470)
In OpenMP 6.0, the 'local' clause was added to the declare_target
directive. Variables listed in the 'local' clause are considered to be
device-local. In addition, a new map clause restriction was added:
A device-local variable must not appear as a list item in a map clause.
See OpenMP 6.0 specification section 7.9.6, map Clause, Restrictions, p.
386.
Testing:
- New error messages test for device-local variables defined in
declare_target local clauses (device-local) used in map clauses.
- ninja check-openmp
Commit: 4b31f1ee830820e5a3aa35779069f2e25c38d267
https://github.com/llvm/llvm-project/commit/4b31f1ee830820e5a3aa35779069f2e25c38d267
Author: Leonardo Román Carrillo <leonardoroman at google.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64.h
M llvm/lib/Target/AArch64/AArch64A57FPLoadBalancing.cpp
M llvm/lib/Target/AArch64/AArch64PassRegistry.def
M llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
Log Message:
-----------
[NewPM] Port for AArch64A57FPLoadBalancing (#190652)
Commit: ba01e8d24532153f697b410db250bb82d9864581
https://github.com/llvm/llvm-project/commit/ba01e8d24532153f697b410db250bb82d9864581
Author: agozillon <Andrew.Gozillon at amd.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M flang/lib/Lower/OpenMP/ClauseProcessor.cpp
M flang/lib/Lower/OpenMP/ClauseProcessor.h
M flang/test/Lower/OpenMP/declare-mapper.f90
R flang/test/Lower/OpenMP/target-motion-skip-implicit-mapper.f90
Log Message:
-----------
[Flang][OpenMP] Allow user-defined default mappers to bypass the implicit mapper fence (#189136)
Currently we wall out implicit declare mappers from being applied to
enter/exit/update (which we'll need to address in future PRs, as this
likely should work to some extent for allocatable member mapping). A
side effect of this is that it's causing user-defined default declare
mappers to not apply in scenarios when they should.
I believe these user-defined default declare mappers should apply in all
cases where that type is mapped and no other mapper has been explicitly
specified, as they replace the original default mapping behaviour from
my admittedly shoddy specification reading skills.
The user defined default mappers should "implicitly" apply because:
1. No explicit mapper modifier is specified
2. The fallback behavior should be "as if the modifier was specified
with the default mapper-identifier" (Section 5.9)
3. The user-defined default mapper "overrides the predefined default
mapper for the given type" (Section 5.8.2)
This was 5.2-ish sectioning so information might be outdated for 6+ and
the rules might be changed (if I interpreted them correctly in the first
place).
There's a couple of other tweaks I did in the refactoring, mainly making
sure the explicit mapper can be used in conjunction with possible
specified default mappers for other types. As technically, you're
allowed to specify one mapper and map other bits and pieces in the same
mapping clause and the mapper simply doesn't apply to the other things
not of the same type.
Commit: fc01c111b94f43894b3099553bc0b0e42ef5de2c
https://github.com/llvm/llvm-project/commit/fc01c111b94f43894b3099553bc0b0e42ef5de2c
Author: calebwat <107081575+calebwat at users.noreply.github.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanUtils.cpp
Log Message:
-----------
[NFCI] Check for non-null before dereferencing a VPBB ptr (#190403)
A VPBB variable is possibly null (defined via a ternary), but is
subsequently dereferenced without a check included. This patch adds a
check for it to avoid any possibly null dereference. This was found via
static analysis, there is not a known case right now where this issue is
hit.
Commit: 0ac8fed21e5bf71e65275a3dbb0be1272571519a
https://github.com/llvm/llvm-project/commit/0ac8fed21e5bf71e65275a3dbb0be1272571519a
Author: Moritz Scherer <moritz at mosaic-soc.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
M llvm/test/CodeGen/RISCV/xcvmem.ll
Log Message:
-----------
[RISCV] Use signed target constants for XCVmem post-inc loads (#189276)
First time opening a PR against LLVM, so please let me know if anything
is missing / wrong.
This fixes an assertion in RISC-V DAG isel for CORE-V xcvmem
post-increment loads with negative immediate offsets.
`RISCVDAGToDAGISel::Select` recognizes `xcvmem POST_INC` loads and
checks whether the offset fits the signed 12-bit immediate form used by
`cv.lb/cv.lbu/cv.lh/cv.lhu/cv.lw ... , (rs1), imm12`. That path was
extracting the offset with `getSExtValue()`, but then rebuilding it with
`getTargetConstant(...)`, which takes the unsigned constant path.
For negative offsets, that could trip the APInt assertion:
```
Assertion failed: (llvm::isUIntN(BitWidth, val) && "Value is not an N-bit unsigned value")
```
during `RISC-V DAG->DAG Pattern Instruction Selection`.
The fix is to use `getSignedTargetConstant(...)` for the xcvmem
immediate case.
A regression test is added to llvm/test/CodeGen/RISCV/xcvmem.ll that
covers a reduced negative post-increment load case and checks the
expected codegen:
```asm
lw a2, 0(a0)
cv.lw a1, (a2), -4
sw a2, 0(a0)
mv a0, a1
ret
```
Reproducer before the fix:
```c
int f(int **pp) {
int *p = *pp;
int x = *p;
*pp = p - 1;
return x;
}
```
Example failing invocation:
```bash
clang --target=riscv32-unknown-elf \
-march=rv32imf_zicsr_zifencei_xcvmem \
-mabi=ilp32f -O2 -ffreestanding -c repro.c
```
Validation:
```bash
llc -O3 -mtriple=riscv32 -mattr=+xcvmem -verify-machineinstrs llvm/test/CodeGen/RISCV/xcvmem.ll
```
Confirmed the reduced repro no longer crashes
Commit: 9b16edb9ec068cca09dc01672c987aa8d3c7bdd4
https://github.com/llvm/llvm-project/commit/9b16edb9ec068cca09dc01672c987aa8d3c7bdd4
Author: agozillon <Andrew.Gozillon at amd.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Semantics/resolve-directives.cpp
A flang/test/Lower/OpenMP/common-block-target-update.f90
Log Message:
-----------
[Flang][OpenMP] Fix Common Blocks use in update to/from and target maps causing compiler errors (#187221)
This patch attempts to fix a compiler ICE when common blocks are used in
target update to/from, it seems to stem from the fact that we do not
resolve the symbols in the relevant clauses, so when we later process
the maps we don't have the right symbol that references the common block
that was setup and bound by the fortran lowering. Resolving the names
seems to do the trick.
There is a second issue where when referencing a common block with an
array contained in it and utilising the array within the target region,
we'll currently not accurately map over the bounds and cause a FIR/MLIR
verification error. The fix for this is to simply move the common block
member re-binding/re-materialization for the target region to before the
bounds data re-materialization we do during target region generation.
Commit: 2e29531ff4fee12ef883ad9af54208f9eada8f18
https://github.com/llvm/llvm-project/commit/2e29531ff4fee12ef883ad9af54208f9eada8f18
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.cpp
Log Message:
-----------
[VPlan] Properly preserve IsMaterialized in VPlan::duplicate (NFC). (#190849)
Make sure IsMaterialized is preserved in VPlan::duplicate for
VPSymbolicValues. This is currently NFC.
Split off from approved
https://github.com/llvm/llvm-project/pull/156262.
Commit: 103f821cb0977612fbff270df0e81801e8b93ed4
https://github.com/llvm/llvm-project/commit/103f821cb0977612fbff270df0e81801e8b93ed4
Author: Zyn <103019185+zyn-li at users.noreply.github.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.h
M lldb/source/Plugins/TypeSystem/Clang/TypeSystemClang.cpp
A lldb/test/API/lang/cpp/non-type-template-param-member-ptr/Makefile
A lldb/test/API/lang/cpp/non-type-template-param-member-ptr/TestCppNonTypeTemplateParamPtrToMember.py
A lldb/test/API/lang/cpp/non-type-template-param-member-ptr/main.cpp
Log Message:
-----------
[lldb][DWARFASTParserClang] Handle pointer-to-member-data non-type (#189510)
## Reland Notes
Re applying [187598](https://github.com/llvm/llvm-project/pull/187598)
This is a reland of the original commit which was reverted due to a
failure on the Windows buildbot.
Root cause of the Windows failure:
* The fix introduces TemplateArgument::Declaration (pointing to a
FieldDecl)
* GetValueParamType() in TypeSystemClang.cpp did not handle this kind,
so CreateTemplateParameterList() created a
TemplateTypeParmDecl instead of a NonTypeTemplateParmDecl for the
corresponding template parameter.
* On Windows, the Microsoft name mangler calls
cast<NonTypeTemplateParmDecl>(Parm) when mangling member data pointer
NTTPs, which crashed because Parm was a TemplateTypeParmDecl.
* The Itanium mangler (Linux/Mac) does not inspect the parameter
declaration, so the bug was latent there.
Fix:
* Added TemplateArgument::Declaration to GetValueParamType() so it
returns argument.getParamTypeForDecl(), causing
CreateTemplateParameterList() to create the correct
NonTypeTemplateParmDecl.
* Removed the @skipIfWindows decorator from the test.
## Description
### Problem
MakeAPValue in DWARFASTParserClang.cpp did not handle
pointer-to-member-data non-type template parameters (e.g., template <int
S::*P>), causing LLDB to produce incorrect results or crash.
DWARF encodes pointer-to-member-data NTTPs as
`DW_TAG_template_value_parameter` with a `DW_AT_const_value`
representing the byte offset of the member within the containing struct.
MakeAPValue is responsible for converting this value into a clang
APValue, but it only handled integer/enum and floating-point types. For
pointer-to-member types, it returned `std::nullopt`.
This caused the caller (ParseTemplateDIE) to fall back to creating a
type-only TemplateArgument (kind=Type) instead of a value-carrying one.
When two specializations differ only by which member they point to
(e.g., MemberData<&S::x> / MemberData<&S::y>), both produce identical
TemplateArguments. Clang's
[findSpecialization](https://github.com/llvm/llvm-project/blob/3bc216c29cb42c7d94b617943b1d44afce605588/lldb/source/Plugins/TypeSystem/Clang/TypeSystemClang.cpp#L1674-L1677)
then treats the second as a duplicate, so only one specialization exists
in the AST. The second variable becomes unresolvable.
(See Debugger Evidence section below)
In more complex cases, this triggers an assertion failure in
[clang::CXXRecordDecl::setBases():
cast()](https://github.com/llvm/llvm-project/blob/3bc216c29cb42c7d94b617943b1d44afce605588/clang/lib/AST/DeclCXX.cpp#L219)
argument of incompatible type.
## Fix
MakeAPValue: Added `IsMemberDataPointerType()` to the integral type
check so that pointer-to-member byte offsets produce distinct APValues.
Also replaced the silent return `std::nullopt` for unsupported types
with `lldbassert` so unknown type classes are caught during development.
`ResolveMemberDataPointerToFieldDecl`: New method that follows the DWARF
chain to resolve the byte offset to the actual FieldDecl, creating
TemplateArgument(Declaration) matching clang's own AST:
DW_TAG_template_value_parameter (DW_AT_type)
→ DW_TAG_ptr_to_member_type (DW_AT_containing_type)
→ DW_TAG_structure_type → match DW_TAG_member by byte offset
If resolution fails at any step, falls through to the integer APValue
path as a safe fallback.
Verified by comparing clang's AST (clang -Xclang -ast-dump) with LLDB's
reconstructed AST (image dump ast) — both now produce TemplateArgument
decl '&S::x' referencing the correct FieldDecl.
Commit: a50839de8aab4a42a70d3c8105ecf80ef98f74a2
https://github.com/llvm/llvm-project/commit/a50839de8aab4a42a70d3c8105ecf80ef98f74a2
Author: Erich Keane <ekeane at nvidia.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp
A clang/test/CIR/CodeGen/long-double-inc-dec.cpp
Log Message:
-----------
[CIR] Add lowering for long-double increment/decrement (#190812)
This showed up a handful of times in some benchmarks. Supporting
long-double is pretty trivial, so this patch does so, with some work to
make sure all 3 formats of long-double work in the test (plus some
command-line replacement, hopefully that isn't too confusing).
The NYI is left in place, as we're not yet implementing any of the
'half' types (or other smaller FP types).
Commit: 8918319853fbdf9e6f6cb69e96848f913a22bc31
https://github.com/llvm/llvm-project/commit/8918319853fbdf9e6f6cb69e96848f913a22bc31
Author: Erich Keane <ekeane at nvidia.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenExpr.cpp
A clang/test/CIR/CodeGen/non-scalar-lval-return.cpp
Log Message:
-----------
[CIR] Implement non-scalar lvalue return values (#190795)
I could only get these to happen in C++03 (as we do a
materialize-temporary-expr in later standards), but this does appear in
a number of benchmarks. The implementation ends up being pretty trivial,
as we just have to lower the aggregate correctly.
Commit: e1ec0cfeaaeaba6745e8843a34209cd99aee64aa
https://github.com/llvm/llvm-project/commit/e1ec0cfeaaeaba6745e8843a34209cd99aee64aa
Author: Jeffrey Byrnes <jeffrey.byrnes at amd.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SISchedule.td
M llvm/lib/Target/AMDGPU/VOP1Instructions.td
A llvm/test/tools/llvm-mca/AMDGPU/gfx12-permlane16-cycles.s
Log Message:
-----------
[AMDGPU] Add DummySchedWrite to avoid multiple issue cycles (#190095)
TargetSchedule.td specifies that each explicit def of an instruction
must have an associated SchedWrite type. This is a bit unfortunate due
to the MachineScheduler handling of the ScedWrites.
Each of these different SchedWrite contribute to the number of MicroOps
for the MCSchedClassDesc for the instruction --
https://github.com/llvm/llvm-project/blob/096f9d0aa8edb8bad77e8061a6aa9cbf61bcb5ac/llvm/utils/TableGen/SubtargetEmitter.cpp#L1136
Then in the MachineScheduler.cpp's bumpNode, we grab the numMicroOps
from the MCSchedClassDesc
https://github.com/llvm/llvm-project/blob/3d7eedce5658c41a1b22775938359bfafac47fc9/llvm/lib/CodeGen/MachineScheduler.cpp#L2948
We then use this numMicroOps as how many micro ops we'll need to issue
for this instruction. For our target, the issueWidth per cycle is 1. So,
for these instructions the MachineScheduler thinks they will take
multiple cycles to issue, and we add stalls to the hazardRecognizer
https://github.com/llvm/llvm-project/blob/3d7eedce5658c41a1b22775938359bfafac47fc9/llvm/lib/CodeGen/MachineScheduler.cpp#L3100
Adding these unnecessary stalls throws off analyses in the
HazardRecognizer, which can lead to suboptimal scheduling decisions.
Due to the design, we are essentially pigeonholed into misrepresenting
these instructions. This PR adds new SchedWrite types ( WriteVALUDummy
and WriteSALUDummy ) to honor the rule of "each explicit def must have a
SchedWrite" without adding unnecessary MicroOps to get around the issue.
There are several other instructions that have exposure to this issue,
and addressing them all at once leads to lit test churn of about 170
tests. The intention of this PR is to agree upon the approach, then we
can incrementally roll it out to other instructions.
Commit: bbdf4670df3c17eea7568ea72f5ed62933e3cf59
https://github.com/llvm/llvm-project/commit/bbdf4670df3c17eea7568ea72f5ed62933e3cf59
Author: Med Ismail Bennani <ismail at bennani.ma>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M lldb/test/API/functionalities/scripted_frame_provider/pass_through_prefix/TestFrameProviderPassThroughPrefix.py
Log Message:
-----------
[lldb/test] Remove stale Windows expectedFailure decorators (NFC) (#190855)
This patch removes stale Windows expectedFailure decorators from
TestFrameProviderPassThroughPrefix.py
https://lab.llvm.org/buildbot/#/builders/141/builds/17091
Signed-off-by: Med Ismail Bennani <ismail at bennani.ma>
Commit: 85d99e38e71870327656034250e901e633196fba
https://github.com/llvm/llvm-project/commit/85d99e38e71870327656034250e901e633196fba
Author: Demetrius Kanios <demetrius at kanios.net>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M llvm/lib/Target/WebAssembly/GISel/WebAssemblyCallLowering.cpp
M llvm/test/CodeGen/WebAssembly/GlobalISel/irtranslator/args-simd.ll
M llvm/test/CodeGen/WebAssembly/GlobalISel/irtranslator/args-swiftcc.ll
M llvm/test/CodeGen/WebAssembly/GlobalISel/irtranslator/args.ll
A llvm/test/CodeGen/WebAssembly/GlobalISel/irtranslator/ret-aggregates.ll
A llvm/test/CodeGen/WebAssembly/GlobalISel/irtranslator/ret-basics.ll
A llvm/test/CodeGen/WebAssembly/GlobalISel/irtranslator/ret-simd.ll
Log Message:
-----------
[WebAssembly][GlobalISel] CallLowering `lowerReturn` (#190247)
Implements `WebAssemblyCallLowering::lowerReturn`
Split from #157161
Commit: 6adddb227e7a109eda53f6783e16871c6d714ad9
https://github.com/llvm/llvm-project/commit/6adddb227e7a109eda53f6783e16871c6d714ad9
Author: Keith Smiley <keithbsmiley at gmail.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/clang/BUILD.bazel
Log Message:
-----------
[bazel] Add missing linkopt for macOS tests (#190707)
Mirrors
https://github.com/llvm/llvm-project/blob/228b6ae5608baea7120fc4d5d611b3fbd30ce0cb/clang/lib/DirectoryWatcher/CMakeLists.txt#L12
Commit: a234dfedd13e6066a8dd2f8600f0765d7f62f4e7
https://github.com/llvm/llvm-project/commit/a234dfedd13e6066a8dd2f8600f0765d7f62f4e7
Author: Jan Svoboda <jan_svoboda at apple.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M llvm/lib/Support/Windows/Signals.inc
Log Message:
-----------
[clang] Avoid sandbox violation in Windows signal handler (#190615)
This bypasses the IO sandbox in some of Windows signal handling, which
previously prevented stack traces from being printed.
Commit: 3b6557f178691b97c86724c0744f13bd510de3e3
https://github.com/llvm/llvm-project/commit/3b6557f178691b97c86724c0744f13bd510de3e3
Author: Schrodinger ZHU Yifan <yifanzhu at rochester.edu>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M libc/src/assert/generic/CMakeLists.txt
M libc/src/assert/generic/__assert_fail.cpp
M libc/src/assert/gpu/CMakeLists.txt
M libc/src/assert/gpu/__assert_fail.cpp
M libc/src/compiler/generic/CMakeLists.txt
M libc/src/compiler/generic/__stack_chk_fail.cpp
M libc/src/stdlib/CMakeLists.txt
A libc/src/stdlib/abort.cpp
A libc/src/stdlib/abort_utils.h
M libc/src/stdlib/baremetal/CMakeLists.txt
R libc/src/stdlib/baremetal/abort.cpp
A libc/src/stdlib/baremetal/abort_utils.h
M libc/src/stdlib/gpu/CMakeLists.txt
R libc/src/stdlib/gpu/abort.cpp
A libc/src/stdlib/gpu/abort_utils.h
M libc/src/stdlib/linux/CMakeLists.txt
R libc/src/stdlib/linux/abort.cpp
M libc/src/stdlib/linux/abort_utils.h
M libc/test/integration/src/stdlib/abort_test.cpp
M libc/test/src/assert/assert_test.cpp
Log Message:
-----------
[libc][stdlib] move abort to a header library and cleanup its usage (#190845)
This PR moves abort implementation to a header library so that internal
dependency no longer relies on the entrypoint object.
Additionally, it clean up prior dependency to the entrypoint object and
update staled tests.
Assisted-by: Claude Opus 4.6 <noreply at anthropic.com>
Commit: 8c389f3eb2e713c2195a4d3dd4b6894fab783a10
https://github.com/llvm/llvm-project/commit/8c389f3eb2e713c2195a4d3dd4b6894fab783a10
Author: Michael Spencer <bigcheesegs at gmail.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M clang/include/clang/Frontend/DependencyOutputOptions.h
M clang/include/clang/Frontend/Utils.h
M clang/include/clang/Options/Options.td
M clang/include/clang/Serialization/ASTReader.h
M clang/lib/DependencyScanning/DependencyScannerImpl.cpp
M clang/lib/DependencyScanning/ModuleDepCollector.cpp
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/Frontend/DependencyFile.cpp
M clang/lib/Frontend/Rewrite/FrontendActions.cpp
M clang/lib/Serialization/ASTReader.cpp
M clang/test/ClangScanDeps/generate-modules-path-args.c
A clang/test/Driver/module-file-direct-deps.c
M clang/test/Driver/pch-deps.c
A clang/test/Modules/dependency-gen-direct-module-deps.m
M clang/test/Modules/dependency-gen-pch.m
Log Message:
-----------
[clang] Report direct module deps for explicitly built modules (#190757)
Implicitly built modules do not include PCM paths in .d files because
the compiler is the one managing them, but for explicitly built
modules the build system needs to know about them so that if one is
deleted the build system will rebuild it.
Explicitly built modules should only report direct dependencies, as
the build system knows about each PCM in the module graph. This adds
`-fmodule-file-deps=direct` to support that, and changes dependency
scanning to use this in the explicit build commands it outputs.
Assisted-by: claude-opus-4.6
Commit: 3244cadd4043c36441f7312c6ea06139e3dba18b
https://github.com/llvm/llvm-project/commit/3244cadd4043c36441f7312c6ea06139e3dba18b
Author: Susan Tan (ス-ザン タン) <zujunt at nvidia.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M flang/lib/Optimizer/Transforms/FIRToMemRef.cpp
M flang/test/Transforms/FIRToMemRef/array-coor-block-arg.mlir
M flang/test/Transforms/FIRToMemRef/slice.mlir
Log Message:
-----------
[flang][FIRToMemRef] Preserve descriptor strides for boxed static-shape array_coor (#190859)
Fix FIRToMemRef to avoid the static-shape for descriptor-backed array
operands lowered without reinterpret, so boxed sections with static
extents still preserve runtime stride semantics (e.g. a(1:10:2) in
ASSOCIATE).
Commit: e89a4dfabfac7016819d201dacb6c6c58e6a2365
https://github.com/llvm/llvm-project/commit/e89a4dfabfac7016819d201dacb6c6c58e6a2365
Author: Jim Lin <jim at andestech.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVGISel.td
Log Message:
-----------
[RISCV] Fix typo in ImmPlus1 SDNodeXForm (#190785)
getValuePtrVTpe -> getValueType. Currently dead code since GlobalISel
uses a custom renderer instead of the SDNodeXForm body, but should be
correct in case the SDAG path ever picks up these patterns.
Co-authored-by: Claude Opus 4.6 (1M context) <noreply at anthropic.com>
Commit: 0d640409ad96c71bff8196b54e42993543b1fe92
https://github.com/llvm/llvm-project/commit/0d640409ad96c71bff8196b54e42993543b1fe92
Author: Brian Cain <brian.cain at oss.qualcomm.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
A llvm/include/llvm/ExecutionEngine/JITLink/ELF_hexagon.h
A llvm/include/llvm/ExecutionEngine/JITLink/hexagon.h
M llvm/lib/ExecutionEngine/JITLink/CMakeLists.txt
M llvm/lib/ExecutionEngine/JITLink/ELF.cpp
A llvm/lib/ExecutionEngine/JITLink/ELF_hexagon.cpp
A llvm/lib/ExecutionEngine/JITLink/hexagon.cpp
A llvm/test/ExecutionEngine/JITLink/Hexagon/ELF_hexagon_b22_pcrel.s
A llvm/test/ExecutionEngine/JITLink/Hexagon/ELF_hexagon_combined.s
A llvm/test/ExecutionEngine/JITLink/Hexagon/ELF_hexagon_compound.s
A llvm/test/ExecutionEngine/JITLink/Hexagon/ELF_hexagon_cond_branch.s
A llvm/test/ExecutionEngine/JITLink/Hexagon/ELF_hexagon_const_extender.s
A llvm/test/ExecutionEngine/JITLink/Hexagon/ELF_hexagon_data_relocations.s
A llvm/test/ExecutionEngine/JITLink/Hexagon/ELF_hexagon_duplex.s
A llvm/test/ExecutionEngine/JITLink/Hexagon/ELF_hexagon_hilo16.s
A llvm/test/ExecutionEngine/JITLink/Hexagon/ELF_hexagon_loop.s
A llvm/test/ExecutionEngine/JITLink/Hexagon/ELF_hexagon_mem_relocs.s
A llvm/test/ExecutionEngine/JITLink/Hexagon/ELF_hexagon_minimal.s
A llvm/test/ExecutionEngine/JITLink/Hexagon/ELF_hexagon_noext_branch.s
A llvm/test/ExecutionEngine/JITLink/Hexagon/ELF_hexagon_packet.s
A llvm/test/ExecutionEngine/JITLink/Hexagon/ELF_hexagon_plt.s
A llvm/test/ExecutionEngine/JITLink/Hexagon/lit.local.cfg
Log Message:
-----------
[JITLink] Add Hexagon ELF backend (#189710)
Add JITLink support for Hexagon (ELF32-LE) object files
Commit: 1345ad1b7d37c692548bc2c3d1f1bada71274419
https://github.com/llvm/llvm-project/commit/1345ad1b7d37c692548bc2c3d1f1bada71274419
Author: Wei Wang <apollo.mobility at gmail.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M llvm/lib/Transforms/IPO/SampleProfileMatcher.cpp
Log Message:
-----------
[SampleProf] Check probe-based profile in isProfileUnused (#190852)
`ProbeManager` is only initialized for probe based profile. Add proper
check in `isProfileUnused`.
This fixes: https://github.com/llvm/llvm-project/issues/188897
Commit: dea9b6e1493e663fd7f07f486d96a14d7fbf1cad
https://github.com/llvm/llvm-project/commit/dea9b6e1493e663fd7f07f486d96a14d7fbf1cad
Author: David Truby <david.truby at arm.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M flang-rt/lib/runtime/time-intrinsic.cpp
M flang/include/flang/Common/windows-include.h
Log Message:
-----------
[flang-rt] Add implementation for date_and_time on Windows (#190174)
Commit: 24833808df27fe0b27b4491617dae746dec301ba
https://github.com/llvm/llvm-project/commit/24833808df27fe0b27b4491617dae746dec301ba
Author: Srivarshitha M <mvarshitha17874 at gmail.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenCUDANV.cpp
M clang/test/CIR/CodeGenCUDA/kernel-call.cu
Log Message:
-----------
[CIR][CUDA][HIP] Support stream per thread kernel launch (#188004)
Related: #175871, #179278
When `-fgpu-default-stream=per-thread` is specified, CUDA and HIP
kernels should be launched using the per-thread stream variants of the
launch API instead of the default `cudaLaunchKernel`/`hipLaunchKernel`.
This PR implements that by selecting the correct launch function name in
`emitDeviceStubBodyNew`:
For CUDA: `cudaLaunchKernel_ptsz`
For HIP: `hipLaunchKernel_spt`
This matches the behavior of the OG CodeGen implementation in
`CGCUDANV.cpp`.
Commit: ff400edc1f90533f844a5fd1c3b0e0b110095945
https://github.com/llvm/llvm-project/commit/ff400edc1f90533f844a5fd1c3b0e0b110095945
Author: Peter Collingbourne <pcc at google.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/Demangle/BUILD.gn
Log Message:
-----------
gn build: Port 7162f191b8ce
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/190882
Commit: fb392aeb3d6196ec39a91798b30f5fec6bed1390
https://github.com/llvm/llvm-project/commit/fb392aeb3d6196ec39a91798b30f5fec6bed1390
Author: Michael <michael at mshires.net>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M llvm/lib/Target/X86/X86InstrInfo.cpp
A llvm/test/CodeGen/X86/apx/pr190557.ll
Log Message:
-----------
[X86][APX] Fix segfault in foldMemoryOperandImpl for two-address NDD fold (#190562)
The NoNDDM code path in foldMemoryOperandImpl assumed
NewMI->getOperand(1) is always a register. When IsTwoAddr is true,
fuseTwoAddrInst replaces operands 0-4 with memory address components, so
getOperand(1) is the immediate, not a register. Calling setReg() causes
a segfault in removeOperandFromUseList.
Skip the NoNDDM COPY block when IsTwoAddr is true, since the two-address
fold already correctly handles the dest==src1 constraint.
I believe the issue was introduced with #189222 , the 'NoNDDM' block
calls 'NewMI->getOperand(1).setReg()', but after 'fuseTwoAddrInst',
operand 1 is an immediate, not a register.
Passes all APX regression tests. Unit test included in commit. Fixes
issue #190557.
First time submitting a PR to the LLVM project, please let me know if I
need to fix something! Tagging @phoebewang and @RKSimon as potential
review candidates.
Commit: 37c6cfe1c3888d9af8c9b4b17eccbc8a94447903
https://github.com/llvm/llvm-project/commit/37c6cfe1c3888d9af8c9b4b17eccbc8a94447903
Author: Abhinav Garg <abhinav.garg at amd.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.s.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.s.buffer.load.ll
A llvm/test/CodeGen/AMDGPU/s-buffer-load-mmo-offsets.ll
Log Message:
-----------
[AMDGPU] Fix incorrect MachineMemOperand offsets and sizes in wide s_buffer_load splits (#189890)
When G_AMDGPU_S_BUFFER_LOAD (or its SelectionDAG equivalent) falls back
to MUBUF due to a divergent offset, wide loads (256-bit, 512-bit) are
split into multiple 128-bit chunks. Both code paths that perform this
split had bugs in how they annotated MachineMemOperand (MMO) metadata on
each chunk instruction — reporting wrong offsets and wrong sizes. This
does not affect generated assembly correctness but degrades the analysis
if that MMO metadata is used.
---------
Co-authored-by: Abhinav Garg <abhigarg at amd.com>
Co-authored-by: Jay Foad <jay.foad at gmail.com>
Commit: 1ad91beba9fe14c152370a5d116aa020478a01c3
https://github.com/llvm/llvm-project/commit/1ad91beba9fe14c152370a5d116aa020478a01c3
Author: Takashi Idobe <idobetakashi at gmail.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M llvm/lib/CodeGen/TwoAddressInstructionPass.cpp
M llvm/test/CodeGen/X86/mul-lohi-no-implicit-copy.ll
M llvm/test/CodeGen/X86/pr78897.ll
M llvm/test/CodeGen/X86/tailcallstack64.ll
M llvm/test/CodeGen/X86/tailccstack64.ll
A llvm/test/CodeGen/X86/two-address-subreg-to-reg-kill.mir
Log Message:
-----------
[CodeGen] relax kill copy hoist restriction for vreg to phys reg copies with folded loads (#190304)
Resolves: https://github.com/llvm/llvm-project/issues/62452
Currently, `TwoAddressInstructionPass` has a blanket rule against moving
kill copies, since many copies are better handled later by coalescing.
However, that rule is too strict when the kill is a virtual register to
physical register copy and the current two-address instruction has a
folded load. In that case, keeping the copy in place can force the pass
to break the folded rm form into a mov rm + op rr, even though the
physical register copy itself cannot be coalesced away in the usual
sense.
This fixes a missed optimization where a folded IMUL64rm was rewritten
into MOV64rm + IMUL64rr because a later $rax = COPY %src was kept in
place for mul.
Commit: 4d18039c63bfd3750e87cc44c9f5af98f0affc10
https://github.com/llvm/llvm-project/commit/4d18039c63bfd3750e87cc44c9f5af98f0affc10
Author: Sudharsan Veeravalli <svs at qti.qualcomm.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoXqci.td
M llvm/test/CodeGen/RISCV/xqciac.ll
Log Message:
-----------
[RISCV] Lower (select c, y, 0) -> (qc.muliadd c, y-1) (#190323)
This can be compressed in some cases so prefer `QC_MULIADD` to
`QC_SHLADD`.
Commit: 0f16b90d99855251b1768a370ad9797801197a29
https://github.com/llvm/llvm-project/commit/0f16b90d99855251b1768a370ad9797801197a29
Author: Jim Lin <jim at andestech.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoZvdot4a8i.td
A llvm/test/CodeGen/RISCV/rvv/commutable-zvdot4a8i.ll
Log Message:
-----------
[RISCV] Add isCommutable for VDOTA4 and VDOTA4U (#190090)
Mark PseudoVDOTA4_VV and PseudoVDOTA4U_VV as commutable since both
source operands have the same signedness. VDOTA4SU is left
non-commutable because its operands differ in signedness (signed x
unsigned).
Add findCommutedOpIndices cases for the new commutable pseudos and
a test covering commutable and non-commutable dot product variants.
---------
Co-authored-by: Claude Opus 4.6 <noreply at anthropic.com>
Commit: 55a041baf3d14c24fb5a87254bc55305c7e8f7ce
https://github.com/llvm/llvm-project/commit/55a041baf3d14c24fb5a87254bc55305c7e8f7ce
Author: Ryotaro Kasuga <kasuga.ryotaro at fujitsu.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M llvm/lib/Analysis/DependenceAnalysis.cpp
M llvm/test/Analysis/DependenceAnalysis/Banerjee.ll
M llvm/test/Analysis/DependenceAnalysis/Constraints.ll
M llvm/test/Analysis/DependenceAnalysis/MismatchingNestLevels.ll
M llvm/test/Analysis/DependenceAnalysis/NonCanonicalizedSubscript.ll
M llvm/test/Analysis/DependenceAnalysis/PreliminaryNoValidityCheckFixedSize.ll
M llvm/test/Analysis/DependenceAnalysis/Propagating.ll
M llvm/test/Analysis/DependenceAnalysis/SameSDLoops.ll
M llvm/test/Analysis/DependenceAnalysis/rdiv-minor-algebra.ll
M llvm/test/Transforms/LoopInterchange/large-nested-6d.ll
Log Message:
-----------
[DA] Move no-wrap flag check into checkSubscript (#190770)
Recent patches added no-wrap flag checks to each dependence test (except
for the Banerjee MIV test) to make them sound. These fixes have been
applied one by one to ensure that each dependence test was correctly
updated and the defects were properly addressed. However, ideally, these
functions should not be called at all when the required no-wrap flags
are not set. Specifically, `classifyPair` should tag pairs as
`NonLinear` when either addrec doesn't have the no-wrap flag, which
means that the addrec is as literal non-linear.
This patch moves the existing no-wrap flag checks in the each dependence
test to `checkSubscript`, which is called by `classifyPair`. With this
change, if the addrec doesn't have the no-wrap flag, the pair will be
classified as `NonLinear` and the dependence test will not be invoked at
all. I believe this change makes the code cleaner and consistent with
the meaning of `NonLinear` classification.
Note that this patch doesn't take care of the behavioral change caused
by the Benerjee MIV test, as the test is still not sound and there are
no plans to fix it in the near future.
Commit: 59b1515c070ed10292d75bcc416d6ba1af13090f
https://github.com/llvm/llvm-project/commit/59b1515c070ed10292d75bcc416d6ba1af13090f
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
Log Message:
-----------
[SelectionDAG] Fix typo Chian->Chain. NFC (#190874)
Commit: 7071feb157c700bada63035395632c4192532919
https://github.com/llvm/llvm-project/commit/7071feb157c700bada63035395632c4192532919
Author: Deric C. <cheung.deric at gmail.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M clang/include/clang/Basic/HLSLIntrinsics.td
M clang/lib/Headers/hlsl/hlsl_alias_intrinsics.h
M clang/test/SemaHLSL/BuiltIns/cross-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/f16tof32-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/f32tof16-errors.hlsl
M clang/test/SemaHLSL/WaveBuiltinAvailability.hlsl
Log Message:
-----------
[HLSL] Rewrite HLSL alias intrinsics into TableGen (#188814)
This PR will close issue
https://github.com/llvm/llvm-project/issues/188345 after PR
https://github.com/llvm/llvm-project/pull/188362.
This PR rewrites all applicable alias intrinsics from
`hlsl_alias_intrinsics.h` into TableGen (`HLSLIntrinsics.td`).
There are no significant test changes with this PR.
The generated `hlsl_alias_intrinsics_gen.h` can be seen here:
https://gist.github.com/Icohedron/5b9ed2638da0966e3c7514dcb5095197
The generated `hlsl_inline_intrinsics_gen.h` is the same as in
https://github.com/llvm/llvm-project/pull/188362 since this PR does not
add or modify any inline intrinsics definitions.
Assisted-by: GitHub Copilot
Commit: 413e58089506bea5b8373a1f639987e769b99fc6
https://github.com/llvm/llvm-project/commit/413e58089506bea5b8373a1f639987e769b99fc6
Author: Victor Chernyakin <chernyakin.victor.j at outlook.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M clang-tools-extra/clang-tidy/ClangTidyCheck.h
M clang-tools-extra/clang-tidy/bugprone/DynamicStaticInitializersCheck.cpp
M clang-tools-extra/clang-tidy/bugprone/DynamicStaticInitializersCheck.h
M clang-tools-extra/clang-tidy/bugprone/SuspiciousIncludeCheck.cpp
M clang-tools-extra/clang-tidy/bugprone/SuspiciousIncludeCheck.h
M clang-tools-extra/clang-tidy/google/GlobalNamesInHeadersCheck.cpp
M clang-tools-extra/clang-tidy/google/GlobalNamesInHeadersCheck.h
M clang-tools-extra/clang-tidy/llvmlibc/InlineFunctionDeclCheck.cpp
M clang-tools-extra/clang-tidy/llvmlibc/InlineFunctionDeclCheck.h
M clang-tools-extra/clang-tidy/misc/AnonymousNamespaceInHeaderCheck.cpp
M clang-tools-extra/clang-tidy/misc/AnonymousNamespaceInHeaderCheck.h
M clang-tools-extra/clang-tidy/misc/DefinitionsInHeadersCheck.cpp
M clang-tools-extra/clang-tidy/misc/DefinitionsInHeadersCheck.h
M clang-tools-extra/clang-tidy/misc/UnusedUsingDeclsCheck.cpp
M clang-tools-extra/clang-tidy/misc/UnusedUsingDeclsCheck.h
M clang-tools-extra/clang-tidy/misc/UseAnonymousNamespaceCheck.cpp
M clang-tools-extra/clang-tidy/misc/UseAnonymousNamespaceCheck.h
M clang-tools-extra/clang-tidy/misc/UseInternalLinkageCheck.cpp
M clang-tools-extra/clang-tidy/misc/UseInternalLinkageCheck.h
M clang-tools-extra/clang-tidy/utils/HeaderGuard.cpp
M clang-tools-extra/clang-tidy/utils/HeaderGuard.h
Log Message:
-----------
[clang-tidy][NFC] Don't store a redundant copy of `HeaderFileExtensions` in every check (#190302)
#80333 removed local `HeaderFileExtensions` options; now there's just
the global option, and its value lives in the `ClangTidyContext`. But
every check still stores its own copy of it, a vestige of the old design
which this change fixes.
Commit: 2c0b3b9e421cfffcb6802c9bdfeca9485cd806f5
https://github.com/llvm/llvm-project/commit/2c0b3b9e421cfffcb6802c9bdfeca9485cd806f5
Author: Chuanqi Xu <yedeng.yd at linux.alibaba.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M clang/lib/AST/StmtProfile.cpp
Log Message:
-----------
[NFC] Correct comments grammar and refine it (#190895)
Following https://github.com/llvm/llvm-project/pull/190732
Commit: 9b831391779331d9d03eec642ecc3e2d36cd013c
https://github.com/llvm/llvm-project/commit/9b831391779331d9d03eec642ecc3e2d36cd013c
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M flang/lib/Semantics/expression.cpp
M flang/test/Semantics/cuf04.cuf
Log Message:
-----------
[flang][cuda] Relax check on chevron syntax for bind(c) callee (#190861)
Commit: d7ed5e523c67ba004fab06ecd88eed527746564d
https://github.com/llvm/llvm-project/commit/d7ed5e523c67ba004fab06ecd88eed527746564d
Author: Fangrui Song <i at maskray.me>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M llvm/unittests/MC/DwarfLineTableHeaders.cpp
Log Message:
-----------
[test] Make MCTargetOptions a class member in DwarfLineTableHeaders (#190904)
Similar to commit 6f0b0ecaba1ba311717f86d8e4d8c6b2b4c4cd4b
createMCAsmInfo will store a pointer to the MCTargetOptions argument in
MCAsmInfo. When MCTargetOptions was a local variable in the constructor,
the pointer dangled after the constructor returned.
Commit: 24c7baf528548f809c86a911e2dc66c1aa3e410f
https://github.com/llvm/llvm-project/commit/24c7baf528548f809c86a911e2dc66c1aa3e410f
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVCallLowering.cpp
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/bitreverse_small_type.ll
R llvm/test/CodeGen/SPIRV/transcoding/OpBitReverse-subbyte.ll
R llvm/test/CodeGen/SPIRV/transcoding/OpBitReverse_i2.ll
A llvm/test/CodeGen/SPIRV/transcoding/subbyte-arg-type-mismatch.ll
Log Message:
-----------
[SPIR-V] Fix sub-byte argument type mismatch in call lowering (#189893)
Remove the `MRI->setType()` call in lowerFormalArguments that was
overriding the vreg LLT with the SPIR-V type's LLT, causing a type
mismatch when sub-byte integer arguments (e.g. i2, i4) were preliminary
widened to i8
related to https://github.com/llvm/llvm-project/issues/188703
Commit: 0584d0a6007173bb8d089c4e3e4163606dc681c4
https://github.com/llvm/llvm-project/commit/0584d0a6007173bb8d089c4e3e4163606dc681c4
Author: Sameer Sahasrabuddhe <sameer.sahasrabuddhe at amd.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M clang/include/clang/Basic/DiagnosticGroups.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/lib/Sema/SemaChecking.cpp
A clang/test/CodeGenHIP/atomic-deprecated-fixit.hip
A clang/test/SemaHIP/atomic-deprecated.hip
Log Message:
-----------
[Clang][HIP] Deprecate __hip_atomic_* builtins (#189897)
Emit deprecation warnings for all __hip_atomic_* builtins,
pointing users to their __scoped_atomic_* equivalents.
The warning is ignored by default, and can be enabled with
-Whip-deprecated-builtins. It will be turned on by default eventually
after we have cleaned up all ROCm/HIP headers and put a deprecation
schedule in place.
Also provide a fixit when the scope is a compile-time constant and there
is a direct mapping from the HIP builtin to a Clang builtin. The
compare_exchange builtins differ in how they accept the desired value,
so only a warning (without a fixit) is emitted for those.
This makes #185408 almost redundant for HIP, since the HIP scopes
themselves will disappear once the `__hip_*` builtins are gone. OpenCL
is different because the language itself specifies an enum. A simpler
version of #185408 can be used to emit a warning when Sema recognizes
that a non-OpenCL builtin is being passed an OpenCL scope.
Assisted-By: Claude Opus 4.6
Commit: 0806ccebb3f00df938ec5e5e80f099cc3c898902
https://github.com/llvm/llvm-project/commit/0806ccebb3f00df938ec5e5e80f099cc3c898902
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
Log Message:
-----------
[LegalizeTypes] Remove stray slash from comment. NFC (#190900)
Commit: 5099f1641e49e5d5a084dcf2155dc8a72257c795
https://github.com/llvm/llvm-project/commit/5099f1641e49e5d5a084dcf2155dc8a72257c795
Author: Aviral Goel <aviralg at users.noreply.github.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M clang/include/clang/ScalableStaticAnalysisFramework/Core/Model/PrivateFieldNames.def
M clang/include/clang/ScalableStaticAnalysisFramework/Core/Serialization/JSONFormat.h
M clang/include/clang/ScalableStaticAnalysisFramework/Core/Serialization/SerializationFormat.h
M clang/include/clang/ScalableStaticAnalysisFramework/Core/WholeProgramAnalysis/DerivedAnalysis.h
M clang/include/clang/ScalableStaticAnalysisFramework/Core/WholeProgramAnalysis/WPASuite.h
M clang/lib/ScalableStaticAnalysisFramework/CMakeLists.txt
M clang/lib/ScalableStaticAnalysisFramework/Core/CMakeLists.txt
M clang/lib/ScalableStaticAnalysisFramework/Core/Serialization/JSONFormat/JSONFormatImpl.cpp
M clang/lib/ScalableStaticAnalysisFramework/Core/Serialization/JSONFormat/JSONFormatImpl.h
A clang/lib/ScalableStaticAnalysisFramework/Core/Serialization/JSONFormat/WPASuite.cpp
A clang/lib/ScalableStaticAnalysisFramework/Plugins/CMakeLists.txt
A clang/lib/ScalableStaticAnalysisFramework/Plugins/ExamplePlugin/AnalysisResults.h
A clang/lib/ScalableStaticAnalysisFramework/Plugins/ExamplePlugin/CMakeLists.txt
A clang/lib/ScalableStaticAnalysisFramework/Plugins/ExamplePlugin/PairsAnalysis.cpp
A clang/lib/ScalableStaticAnalysisFramework/Plugins/ExamplePlugin/TagsAnalysis.cpp
A clang/lib/ScalableStaticAnalysisFramework/Plugins/ExamplePlugin/TagsPairsAnalysis.cpp
A clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/duplicate-analysis-name.json
A clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/missing-results.json
A clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/pairs-result-bad-count.json
A clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/pairs-result-bad-pair-counts.json
A clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/pairs-result-entry-not-object.json
A clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/pairs-result-missing-entity-id.json
A clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/result-entry-analysis-name-not-string.json
A clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/result-entry-deserializer-error.json
A clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/result-entry-missing-analysis-name.json
A clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/result-entry-missing-result-field.json
A clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/result-entry-no-format-info.json
A clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/result-entry-not-object.json
A clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/result-entry-result-not-object.json
A clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/results-not-array.json
A clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/rt-all-results.json
A clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/rt-empty.json
A clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/rt-multiple-results.json
A clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/tags-result-bad-element.json
A clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/tags-result-missing-tags.json
A clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/tagspairs-result-bad-field-type.json
A clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/tagspairs-result-missing-field.json
A clang/test/Analysis/Scalable/ssaf-format/WPASuite/with-plugin.test
A clang/test/Analysis/Scalable/ssaf-format/WPASuite/without-plugin.test
A clang/test/Analysis/Scalable/ssaf-format/lit.local.cfg
M clang/test/CMakeLists.txt
M clang/tools/clang-ssaf-format/CMakeLists.txt
M clang/tools/clang-ssaf-format/SSAFFormat.cpp
M clang/unittests/ScalableStaticAnalysisFramework/Frontend/TUSummaryExtractorFrontendActionTest.cpp
M clang/unittests/ScalableStaticAnalysisFramework/Registries/MockSerializationFormat.cpp
M clang/unittests/ScalableStaticAnalysisFramework/Registries/MockSerializationFormat.h
M clang/unittests/ScalableStaticAnalysisFramework/TestFixture.h
Log Message:
-----------
[clang][ssaf] Add JSONFormat support for WPASuite (#187403)
This patch adds `JSONFormat` serialization support for `WPASuite`.
- Adds `readWPASuite` / `writeWPASuite` to the `SerializationFormat`
abstract interface and implements them in `JSONFormat`.
- Introduces `AnalysisResultRegistryGenerator`, a per-format plugin
registry template in `SerializationFormat`, allowing analysis authors to
register (de)serializers for their `AnalysisResult` subtypes with a
single static declaration.
- Extends `PrivateFieldNames.def` with `WPASuite::Data` and
`WPASuite::IdTable`, and adds a `makeWPASuite()` factory to
`SerializationFormat`, so deserialization code can construct a
`WPASuite` incrementally through the same access-controlled pattern
used for all other SSAF data structures.
Commit: 1578bc684e82f33791b14f59d0cd495ab6789d4d
https://github.com/llvm/llvm-project/commit/1578bc684e82f33791b14f59d0cd495ab6789d4d
Author: Fangrui Song <i at maskray.me>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M bolt/lib/Core/BinaryContext.cpp
M llvm/include/llvm/MC/MCAsmInfo.h
M llvm/include/llvm/MC/MCContext.h
M llvm/include/llvm/MC/TargetRegistry.h
M llvm/lib/MC/ELFObjectWriter.cpp
M llvm/lib/MC/MCAsmStreamer.cpp
M llvm/lib/MC/MCContext.cpp
M llvm/lib/MC/MCObjectStreamer.cpp
M llvm/unittests/CodeGen/MFCommon.inc
M llvm/unittests/CodeGen/MachineInstrTest.cpp
M llvm/unittests/CodeGen/MachineOperandTest.cpp
M llvm/unittests/Target/AArch64/AArch64InstPrinterTest.cpp
Log Message:
-----------
[MC] Move MCTargetOptions pointer from MCContext to MCAsmInfo (#180464)
Except MC-internal `MCAsmInfo()` uses, MCAsmInfo is always constructed
with `const MCTargetOptions &` via `TargetRegistry::createMCAsmInfo`
(https://reviews.llvm.org/D41349). Store the pointer in MCAsmInfo and
change `MCContext::getTargetOptions()` to retrieve it from there,
removing the `MCTargetOptions const *TargetOptions` member from
MCContext.
MCContext's constructor still accepts an MCTargetOptions parameter
for now but is often omitted by call sites.
A subsequent change will remove this parameter and update all callers.
Commit: 04f27644209310f0a06fda5e991bb1788eb1b52d
https://github.com/llvm/llvm-project/commit/04f27644209310f0a06fda5e991bb1788eb1b52d
Author: Aviral Goel <aviralg at users.noreply.github.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M clang/include/clang/ScalableStaticAnalysisFramework/Core/Model/PrivateFieldNames.def
M clang/include/clang/ScalableStaticAnalysisFramework/Core/Serialization/JSONFormat.h
M clang/include/clang/ScalableStaticAnalysisFramework/Core/Serialization/SerializationFormat.h
M clang/include/clang/ScalableStaticAnalysisFramework/Core/WholeProgramAnalysis/DerivedAnalysis.h
M clang/include/clang/ScalableStaticAnalysisFramework/Core/WholeProgramAnalysis/WPASuite.h
M clang/lib/ScalableStaticAnalysisFramework/CMakeLists.txt
M clang/lib/ScalableStaticAnalysisFramework/Core/CMakeLists.txt
M clang/lib/ScalableStaticAnalysisFramework/Core/Serialization/JSONFormat/JSONFormatImpl.cpp
M clang/lib/ScalableStaticAnalysisFramework/Core/Serialization/JSONFormat/JSONFormatImpl.h
R clang/lib/ScalableStaticAnalysisFramework/Core/Serialization/JSONFormat/WPASuite.cpp
R clang/lib/ScalableStaticAnalysisFramework/Plugins/CMakeLists.txt
R clang/lib/ScalableStaticAnalysisFramework/Plugins/ExamplePlugin/AnalysisResults.h
R clang/lib/ScalableStaticAnalysisFramework/Plugins/ExamplePlugin/CMakeLists.txt
R clang/lib/ScalableStaticAnalysisFramework/Plugins/ExamplePlugin/PairsAnalysis.cpp
R clang/lib/ScalableStaticAnalysisFramework/Plugins/ExamplePlugin/TagsAnalysis.cpp
R clang/lib/ScalableStaticAnalysisFramework/Plugins/ExamplePlugin/TagsPairsAnalysis.cpp
R clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/duplicate-analysis-name.json
R clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/missing-results.json
R clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/pairs-result-bad-count.json
R clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/pairs-result-bad-pair-counts.json
R clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/pairs-result-entry-not-object.json
R clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/pairs-result-missing-entity-id.json
R clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/result-entry-analysis-name-not-string.json
R clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/result-entry-deserializer-error.json
R clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/result-entry-missing-analysis-name.json
R clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/result-entry-missing-result-field.json
R clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/result-entry-no-format-info.json
R clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/result-entry-not-object.json
R clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/result-entry-result-not-object.json
R clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/results-not-array.json
R clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/rt-all-results.json
R clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/rt-empty.json
R clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/rt-multiple-results.json
R clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/tags-result-bad-element.json
R clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/tags-result-missing-tags.json
R clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/tagspairs-result-bad-field-type.json
R clang/test/Analysis/Scalable/ssaf-format/WPASuite/Inputs/tagspairs-result-missing-field.json
R clang/test/Analysis/Scalable/ssaf-format/WPASuite/with-plugin.test
R clang/test/Analysis/Scalable/ssaf-format/WPASuite/without-plugin.test
R clang/test/Analysis/Scalable/ssaf-format/lit.local.cfg
M clang/test/CMakeLists.txt
M clang/tools/clang-ssaf-format/CMakeLists.txt
M clang/tools/clang-ssaf-format/SSAFFormat.cpp
M clang/unittests/ScalableStaticAnalysisFramework/Frontend/TUSummaryExtractorFrontendActionTest.cpp
M clang/unittests/ScalableStaticAnalysisFramework/Registries/MockSerializationFormat.cpp
M clang/unittests/ScalableStaticAnalysisFramework/Registries/MockSerializationFormat.h
M clang/unittests/ScalableStaticAnalysisFramework/TestFixture.h
Log Message:
-----------
Revert "[clang][ssaf] Add JSONFormat support for WPASuite (#187403)" (#190909)
This reverts commit 5099f1641e49e5d5a084dcf2155dc8a72257c795 since it breaks buildbots.
Commit: 2186dca2f4eee13d9aed033dc1cd7ed33bd59ca3
https://github.com/llvm/llvm-project/commit/2186dca2f4eee13d9aed033dc1cd7ed33bd59ca3
Author: Baranov Victor <bar.victor.2002 at gmail.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M clang-tools-extra/clang-tidy/cppcoreguidelines/MissingStdForwardCheck.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/test/clang-tidy/checkers/cppcoreguidelines/missing-std-forward.cpp
Log Message:
-----------
[clang-tidy] Fix FP in cppcoreguidelines-missing-std-forward in lambda init-list (#190522)
In `TK_IgnoreUnlessSpelledInSource` mode
[`MatchChildASTVisitor::TraverseLambdaExpr`](https://github.com/llvm/llvm-project/blob/main/clang/lib/ASTMatchers/ASTMatchFinder.cpp#L280)
only calls `match()` on each capture-init expression without recursing
into its children. So for `[t{std::forward<T>(t)}]` the `CallExpr`
nested inside the `InitListExpr` is never visited, and
`ForwardCallMatcher` never binds "call".
Fixes https://github.com/llvm/llvm-project/issues/150446.
Commit: ff071d61654e1b4e8e2cba73e58e418d080812f4
https://github.com/llvm/llvm-project/commit/ff071d61654e1b4e8e2cba73e58e418d080812f4
Author: Kareem Ergawy <kareem.ergawy at amd.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M flang/lib/Optimizer/OpenMP/DoConcurrentConversion.cpp
M flang/test/Transforms/DoConcurrent/reduce_device.mlir
A flang/test/Transforms/DoConcurrent/reduce_device_min.f90
A offload/test/offloading/fortran/do-concurrent-to-omp-min-reduce.f90
Log Message:
-----------
[flang][DoConcurrent] Map reduction variables as tofrom ByRef for device offloading (#189378)
Scalar reduction variables in `do concurrent reduce(...)` were being
mapped with `implicit ByCopy` when offloaded to device, because
`genMapInfoOpForLiveIn` treated all trivial types uniformly. This caused
the reduction result to be silently dropped — the device-side reduction
would compute the correct value but never write it back to the host.
Fix by detecting reduction variables and forcing `implicit tofrom ByRef`
mapping, matching the behavior of explicit
`!$omp target teams distribute parallel do reduction(...)`.
Co-authored-by: ergawy <kareem.ergawy at amd.com>
Co-authored-by: Claude <noreply at anthropic.com>
Made-with: Cursor
Fixes: https://github.com/ROCm/llvm-project/issues/1844
Co-authored-by: Claude <noreply at anthropic.com>
Commit: 71260f8df1124852ca3093d2ec8d2615493471c1
https://github.com/llvm/llvm-project/commit/71260f8df1124852ca3093d2ec8d2615493471c1
Author: Nishant Sachdeva <32475507+nishant-sachdeva at users.noreply.github.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M llvm/test/tools/llvm-ir2vec/bindings/ir2vec-getBBEmbMap.py
M llvm/test/tools/llvm-ir2vec/bindings/ir2vec-getFuncEmb.py
M llvm/test/tools/llvm-ir2vec/bindings/ir2vec-getFuncEmbMap.py
M llvm/test/tools/llvm-ir2vec/bindings/ir2vec-getFuncNames.py
M llvm/test/tools/llvm-ir2vec/bindings/ir2vec-getInstEmbMap.py
M llvm/test/tools/llvm-ir2vec/bindings/ir2vec-initEmbedding.py
M llvm/tools/llvm-ir2vec/Bindings/PyIR2Vec.cpp
M llvm/tools/llvm-ir2vec/lib/Utils.cpp
M llvm/tools/llvm-ir2vec/lib/Utils.h
M llvm/tools/llvm-ir2vec/llvm-ir2vec.cpp
Log Message:
-----------
[llvm-ir2vec] Decoupling Vocab loading from initEmbedding (#190507)
This has been done in order to save time during entire dataset
processing. vocab loading should only happen once.
Commit: f26470aeb7668f437c4d669e4a72c614ba775bb4
https://github.com/llvm/llvm-project/commit/f26470aeb7668f437c4d669e4a72c614ba775bb4
Author: Farid Zakaria <fmzakari at fb.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M lld/ELF/LinkerScript.cpp
M lld/test/ELF/x86-64-section-layout.s
Log Message:
-----------
[lld][ELF] Merge .ltext.* input sections into .ltext output section (#190305)
## Motivation
The default output section name rules in `getOutputSectionName()`
already merge .ldata.*, .lrodata.*, and .lbss.* into their respective
output sections, but .ltext.* was missing from the prefix list. This
caused mcmodel=large builds with `-ffunction-sections` to produce a
separate output section for every function instead of combining them
into .ltext.
We actually then ran into a bunch of esoteric issues because we the had
to handle SHN_XINDEX binaries with >65535 sections, so in that sense it
helped us find those gaps :)
## Changes
Add .ltext to the prefix list alongside the other large-model section
prefixes.
Co-authored-by: Grigory Pastukhov <gpastukhov at meta.com>
Commit: 8c8e998757d9aacb4b1b624a27096a9ea340169a
https://github.com/llvm/llvm-project/commit/8c8e998757d9aacb4b1b624a27096a9ea340169a
Author: Jim Lin <jim at andestech.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoXSfmm.td
Log Message:
-----------
[NFC][RISCV] Fix mismatched closing comment in XSfmm instruction definition (#190898)
The closing comment had XSfmm64a32f but the opening predicate uses
XSfmm32a32f.
Co-authored-by: Claude Opus 4.6 (1M context) <noreply at anthropic.com>
Commit: 8054d3705dced397b24ace5ebc4180963a8e8736
https://github.com/llvm/llvm-project/commit/8054d3705dced397b24ace5ebc4180963a8e8736
Author: Lang Hames <lhames at gmail.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M orc-rt/include/orc-rt/Session.h
M orc-rt/lib/executor/Session.cpp
M orc-rt/unittests/SessionTest.cpp
Log Message:
-----------
[orc-rt] Rename ManagedCodeCallsGroup to ManagedCodeTaskGroup. NFC. (#190880)
The new name better reflects this group's purpose: Tokens are needed for
any task that wants to access managed code, whether to call it or access
data.
Commit: 06b82d1a18791bc966e9b18ac34f63c888d10723
https://github.com/llvm/llvm-project/commit/06b82d1a18791bc966e9b18ac34f63c888d10723
Author: Abinaya Saravanan <asaravan at qti.qualcomm.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M llvm/lib/Target/Hexagon/HexagonOptAddrMode.cpp
A llvm/test/CodeGen/Hexagon/opt-addr-mode-large-unodelist.ll
Log Message:
-----------
[Hexagon] Fix O(N^2) compile-time regression in HexagonOptAddrMode (#189531)
In HexagonOptAddrMode::processAddUses, isSafeToExtLR was called inside
the loop over UNodeList with loop-invariant arguments. isSafeToExtLR
iterates over UNodeList, so the total work was O(N^2) in the number of
uses.
The arguments (AddSN, AddMI, BaseReg, UNodeList) do not change across
iterations. Move the call to after the loop; the function returns the
same value regardless of which iteration calls it, and the complexity
drops to O(N).
Background
----------
Commit 8c0483bba2d2 ("RegisterCoalescer: Fix assert on remat to
copy-to-physreg with subregs") introduced register coalescer
rematerialization changes that produce additional uses of A2_addi
instructions on the Hexagon backend, inflating UNodeList. This exposed
the pre-existing O(N^2) behavior in processAddUses.
Measurements
------------
Input: rkvdec-vdpu383-h264.i (Hexagon kernel driver, -O2)
Tool: hexagon-linux-musl-clang (clang-20)
Scenario | HexagonOptAddrMode | Total
--------------------------------------|-------------------|---------
Before blamed commit (baseline) | 1.35 s | ~195 s
After blamed commit, without fix | 221,845 s | >61 h
After blamed commit, with fix | 52.16 s | ~225 s
Fixes: https://github.com/llvm/llvm-project/issues/178535
Commit: 45791a8e2c58ac9fb3e5a8f3b55e4a91e5d99c74
https://github.com/llvm/llvm-project/commit/45791a8e2c58ac9fb3e5a8f3b55e4a91e5d99c74
Author: Srinivasa Ravi <srinivasar at nvidia.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/NVVMRequiresSMTraits.h
M mlir/include/mlir/Dialect/LLVMIR/NVVMRequiresSMTraits.td
M mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp
M mlir/test/Dialect/LLVMIR/nvvm-check-targetSM.mlir
M mlir/test/lib/Dialect/Test/TestOps.td
Log Message:
-----------
[MLIR][NVVM] Add family-specific support to NVVMRequiresSM traits (#185909)
This change adds support for family-conditional SM version requirements
to the `NVVMRequiresSM` traits. The following new traits are added:
- `NVVMRequiresSMf` - Op requires an SM version belonging to one of the
given families.
- `NVVMRequiresSMaOrSMf` - Op requires one of the supported
arch-accelerated versions or an SM version belonging to one of the given
families.
This also changes the underlying checks to use the `FullSMVersion`
instead of booleans to indicate arch-acceleration and family-specific
support to simplify the checks.
Commit: 1c0b2d3abb04ca92dbbf637b30e25829ef90d859
https://github.com/llvm/llvm-project/commit/1c0b2d3abb04ca92dbbf637b30e25829ef90d859
Author: Matthias Springer <me at m-sp.org>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M mlir/lib/Dialect/Vector/IR/VectorOps.cpp
M mlir/test/Dialect/Vector/canonicalize.mlir
M mlir/test/Dialect/XeGPU/xegpu-vector-linearize.mlir
Log Message:
-----------
[mlir][vector] Replace unused shuffle operands / results with poison (#190763)
If a shuffle operand is not used (as indicated by the mask), replace it
with `ub.poison`. This may make the value dead and enable additional
DCE. Also replace the entire shuffle op with `ub.poison` if all selected
values are poisoned.
Assisted-by: claude-4.6-opus-high
Commit: 6ac4e6faf360356978e934b1c4faa1119c59039c
https://github.com/llvm/llvm-project/commit/6ac4e6faf360356978e934b1c4faa1119c59039c
Author: Tomer Shafir <tomer.shafir8 at gmail.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M llvm/tools/llvm-exegesis/lib/Assembler.cpp
Log Message:
-----------
[llvm-exegesis] Pass data layout explicitly to LLJIT (#190789)
This is a defesive change that aims to make sure the target data layout
of both the object compilation and LLJIT is the same, by passing it
explicitly rather than relying similar auto-detection implicitly.
The patch doesnt add a new test but relies on existing ones, as a test
case of different layouts would require to exhibit a misuse of the tool,
doing cross-compilation to change the layout of the compilation. The
tool is not designed to work this way.
Commit: 1d0b3f223b9384ea9bbe2c8c612fb3ecfc01a08c
https://github.com/llvm/llvm-project/commit/1d0b3f223b9384ea9bbe2c8c612fb3ecfc01a08c
Author: Pavel Labath <pavel at labath.sk>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M libc/docs/CMakeLists.txt
M libc/docs/headers/index.rst
A libc/utils/docgen/sys/socket.yaml
Log Message:
-----------
[libc][docs] Add sys/socket.h implementation status (#190751)
Commit: bcc83ef9af57cd9f3b8a252e2db53843394c79aa
https://github.com/llvm/llvm-project/commit/bcc83ef9af57cd9f3b8a252e2db53843394c79aa
Author: Kleis Auke Wolthuizen <github at kleisauke.nl>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M llvm/utils/git/github-automation.py
Log Message:
-----------
github-automation.py: Use raw strings for regex (#184326)
Avoids a `SyntaxWarning: invalid escape sequence`.
As noticed in:
https://github.com/llvm/llvm-project/actions/runs/22620420192/job/65543770329
https://github.com/llvm/llvm-project/actions/runs/22607027706/job/65501262987
Commit: 5a7aab6e9efc5736ed37f24f8546e52d6e192abe
https://github.com/llvm/llvm-project/commit/5a7aab6e9efc5736ed37f24f8546e52d6e192abe
Author: David Sherwood <david.sherwood at arm.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M llvm/test/Transforms/LoopVectorize/2012-10-20-infloop.ll
M llvm/test/Transforms/LoopVectorize/AArch64/aarch64-unroll.ll
M llvm/test/Transforms/LoopVectorize/AArch64/arm64-unroll.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-chained.ll
M llvm/test/Transforms/LoopVectorize/AArch64/pr33053.ll
M llvm/test/Transforms/LoopVectorize/AArch64/pr36032.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-interleaved-accesses-cost.ll
M llvm/test/Transforms/LoopVectorize/AMDGPU/divergent-runtime-check.ll
M llvm/test/Transforms/LoopVectorize/AMDGPU/unroll-in-loop-vectorizer.ll
M llvm/test/Transforms/LoopVectorize/ARM/active-lane-mask.ll
M llvm/test/Transforms/LoopVectorize/ARM/arm-ieee-vectorize.ll
M llvm/test/Transforms/LoopVectorize/Hexagon/maximum-vf-crash.ll
M llvm/test/Transforms/LoopVectorize/Hexagon/minimum-vf.ll
M llvm/test/Transforms/LoopVectorize/LoongArch/loongarch-interleaved.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/interleave_IC.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/massv-altivec.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/massv-calls.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/massv-unsupported.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/reg-usage.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/stride-vectorization.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/vectorize-bswap.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/vectorize-only-for-real.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/vsx-tsvc-s173.ll
M llvm/test/Transforms/LoopVectorize/RISCV/riscv-interleaved.ll
M llvm/test/Transforms/LoopVectorize/RISCV/riscv-unroll.ll
M llvm/test/Transforms/LoopVectorize/RISCV/short-trip-count.ll
M llvm/test/Transforms/LoopVectorize/RISCV/unroll-in-loop-vectorizer.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-half.ll
M llvm/test/Transforms/LoopVectorize/X86/already-vectorized.ll
M llvm/test/Transforms/LoopVectorize/X86/consecutive-ptr-cg-bug.ll
M llvm/test/Transforms/LoopVectorize/X86/fp_to_sint8-cost-model.ll
M llvm/test/Transforms/LoopVectorize/X86/int128_no_gather.ll
M llvm/test/Transforms/LoopVectorize/X86/interleaved-accesses-use-after-free.ll
M llvm/test/Transforms/LoopVectorize/X86/masked_load_store.ll
M llvm/test/Transforms/LoopVectorize/X86/no-vector.ll
M llvm/test/Transforms/LoopVectorize/X86/no_fpmath.ll
M llvm/test/Transforms/LoopVectorize/X86/no_fpmath_with_hotness.ll
M llvm/test/Transforms/LoopVectorize/X86/pr35432.ll
M llvm/test/Transforms/LoopVectorize/X86/pr48340.ll
M llvm/test/Transforms/LoopVectorize/X86/register-assumption.ll
M llvm/test/Transforms/LoopVectorize/X86/scatter_crash.ll
M llvm/test/Transforms/LoopVectorize/X86/strided_load_cost.ll
M llvm/test/Transforms/LoopVectorize/X86/tail_loop_folding.ll
M llvm/test/Transforms/LoopVectorize/X86/uint64_to_fp64-cost-model.ll
M llvm/test/Transforms/LoopVectorize/X86/vector_ptr_load_store.ll
M llvm/test/Transforms/LoopVectorize/X86/vectorization-remarks-missed.ll
M llvm/test/Transforms/LoopVectorize/assume.ll
M llvm/test/Transforms/LoopVectorize/conditional-assignment.ll
M llvm/test/Transforms/LoopVectorize/control-flow.ll
M llvm/test/Transforms/LoopVectorize/dbg.value.ll
M llvm/test/Transforms/LoopVectorize/dereferenceable-info-from-assumption-variable-size.ll
M llvm/test/Transforms/LoopVectorize/diag-missing-instr-debug-loc.ll
M llvm/test/Transforms/LoopVectorize/diag-with-hotness-info-2.ll
M llvm/test/Transforms/LoopVectorize/diag-with-hotness-info.ll
M llvm/test/Transforms/LoopVectorize/ee-crash.ll
M llvm/test/Transforms/LoopVectorize/global_alias.ll
M llvm/test/Transforms/LoopVectorize/if-reduction.ll
M llvm/test/Transforms/LoopVectorize/incorrect-dom-info.ll
M llvm/test/Transforms/LoopVectorize/induction.ll
M llvm/test/Transforms/LoopVectorize/int_sideeffect.ll
M llvm/test/Transforms/LoopVectorize/no_array_bounds.ll
M llvm/test/Transforms/LoopVectorize/no_switch.ll
M llvm/test/Transforms/LoopVectorize/no_switch_disable_vectorization.ll
M llvm/test/Transforms/LoopVectorize/pointer-induction.ll
M llvm/test/Transforms/LoopVectorize/reuse-lcssa-phi-scev-expansion.ll
M llvm/test/Transforms/LoopVectorize/scalable-assume.ll
Log Message:
-----------
[LV][NFC] Remove more unused function attributes from tests (#190786)
Following on from PR #188185 I've removed some more function attributes
from tests that weren't adding any value. As part of this patch I've
also removed some unnecessary `Function Attrs:` comments that live above
functions.
I suspect that there are other attributes that can be removed, for
example see ARM/arm-ieee-vectorize.ll. However, I haven't had chance to
look into these yet as they are more FP and/or target specific and
perhaps require more thought.
Commit: 8e9737804061a2c10db90a69362ee26e3ee4a7bf
https://github.com/llvm/llvm-project/commit/8e9737804061a2c10db90a69362ee26e3ee4a7bf
Author: Sameer Sahasrabuddhe <sameer.sahasrabuddhe at amd.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M llvm/test/CodeGen/AMDGPU/asyncmark-pregfx12.ll
Log Message:
-----------
[NFC][AMDGPU] don't test asyncmark for non-async variants on pre-gfx12 (#190774)
The test for asyncmark on pref-gfx12 targets, checks the effect of async
marks on both async and non-async instructions. This is achieved by a
sed invocation in the RUN line to remove the .async from intrinsic name.
Such a test serves no purpose other than a minor flex. The two sets of
CHECK lines using the WITH and WITHOUT prefix are not easy to compare by
a simple eyeballing. Eliminating this hack makes it easier to add GISEL
variants later. With and without GISEL, the combinations will increase
to four instead of the current two.
Assisted-By: Claude Opus 4.6
Commit: d46af3a78dea1dfb0a6f319e7abbcd6b6e2df64e
https://github.com/llvm/llvm-project/commit/d46af3a78dea1dfb0a6f319e7abbcd6b6e2df64e
Author: Sameer Sahasrabuddhe <sameer.sahasrabuddhe at amd.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
M llvm/test/CodeGen/AMDGPU/asyncmark-gfx12plus.ll
Log Message:
-----------
[AMDGPU] Fix duplicate s_wait_asynccnt on gfx12-plus (#190906)
S_WAIT_ASYNCCNT was missing from counterTypeForInstr(), so isWaitInstr() did not recognize it as a wait instruction. On the fixpoint algorithm's second pass over a loop body, the already-inserted S_WAIT_ASYNCCNT was treated as a normal instruction, causing WAIT_ASYNCMARK to be re-processed and a duplicate S_WAIT_ASYNCCNT to be emitted.
Assisted-By: Claude Opus 4.6
Commit: e54d7ffd55b2acd59b404f1e5af9c68538e4da08
https://github.com/llvm/llvm-project/commit/e54d7ffd55b2acd59b404f1e5af9c68538e4da08
Author: Nathan Gauër <brioche at google.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M clang/lib/Basic/Targets/SPIR.h
M clang/lib/CodeGen/Targets/SPIR.cpp
M clang/test/CodeGenHLSL/builtins/splitdouble.hlsl
M clang/test/CodeGenHLSL/semantics/SV_Position.ps.hlsl
M clang/test/CodeGenHLSL/semantics/SV_Position.vs.hlsl
M clang/test/CodeGenHLSL/semantics/SV_Target.ps.hlsl
M clang/test/CodeGenHLSL/semantics/semantic.arbitrary.hlsl
M clang/test/CodeGenHLSL/semantics/semantic.array.hlsl
M clang/test/CodeGenHLSL/semantics/semantic.array.output.hlsl
M clang/test/CodeGenHLSL/semantics/semantic.explicit-location-output-struct.hlsl
M clang/test/CodeGenHLSL/semantics/semantic.explicit-location.hlsl
M clang/test/CodeGenHLSL/semantics/semantic.explicit-mix-builtin.hlsl
M clang/test/CodeGenHLSL/semantics/semantic.explicit-mix.lib.hlsl
M clang/test/CodeGenHLSL/vk-features/vk.pushconstant.anon-struct.hlsl
M clang/test/CodeGenHLSL/vk-input-builtin.hlsl
M clang/test/CodeGenHLSL/vk-output-builtin.hlsl
M llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp
M llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.h
M llvm/lib/Target/SPIRV/SPIRVSubtarget.cpp
M llvm/lib/TargetParser/TargetDataLayout.cpp
M llvm/test/CodeGen/SPIRV/hlsl-resources/Packed.ll
M llvm/test/CodeGen/SPIRV/hlsl-resources/cbuffer-peeled-array.ll
M llvm/test/CodeGen/SPIRV/pointers/load-vector-from-array-of-vectors.ll
M llvm/test/CodeGen/SPIRV/spirv-explicit-layout.ll
A llvm/test/CodeGen/SPIRV/vk-pushconstant-layout-natural.ll
M llvm/test/CodeGen/SPIRV/vk-pushconstant-layout.ll
M llvm/unittests/Target/SPIRV/SPIRVGlobalRegistryTests.cpp
Log Message:
-----------
[SPIR-V] Change DL for logical SPIR-V (#190807)
This PR originates from bogner@ draft PR. It modifies the triple for
logical SPIR-V to use the new vector sizing feature.
This means updating the tests, and fix one codegen issue:
on the old datalayout, we knew a float3 allocation size was the
same as a float4 allocation. This is now invalid, thus
a store `<4 x float>` into a `<3 x float>` allocation is UB.
Commit: 30a99ce6b4da71654374266537eb88cd845869f6
https://github.com/llvm/llvm-project/commit/30a99ce6b4da71654374266537eb88cd845869f6
Author: Felipe de Azevedo Piovezan <fpiovezan at apple.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M lldb/source/Target/Process.cpp
Log Message:
-----------
[lldb][NFC] Add helper to compute breakpoint's constituent load address (#190762)
This allows the callsite to be simplified.
This also exposes a bug where the variable `ShouldShowError` is guarding
more than the error printing.
Commit: 24799f17429838bd17c16c43e7ed0e85cff78fd7
https://github.com/llvm/llvm-project/commit/24799f17429838bd17c16c43e7ed0e85cff78fd7
Author: Alex Langford <alangford at apple.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M lldb/packages/Python/lldbsuite/test/lldbutil.py
Log Message:
-----------
Reapply "[lldb] Increase timeout on lldbutil.wait_for_file_on_target" (#190833)
Reapplication notes:
After reviewing the test failures that caused the original reverts, I'm
not convinced that this change is related. None of the test failures
failed while timing out waiting for a file.
Original Summary:
I've been tracking sporadic timeouts waiting for a file to appear on
macOS buildbots (and occasionally local development environments). I
believe I've tracked it down to a regression in process launch
performance in macOS.
What I noticed is that running multiple test suites simultaneously
almost always triggered these failures and that the tests were always
waiting on files created by the inferior. Increasing this timeout no
longer triggers the failures on my loaded machine locally.
This timeout moves from about 16 seconds of total wait time to about 127
seconds of total wait time. This may feel a bit extreme, but this is a
performance issue. While I was here, I cleaned up logging code I was
using to investigate the test failures.
rdar://172122213
Commit: efc0bcdf542475301805ed8478a5d5845f44dc53
https://github.com/llvm/llvm-project/commit/efc0bcdf542475301805ed8478a5d5845f44dc53
Author: David Spickett <david.spickett at arm.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M lldb/include/lldb/Interpreter/CommandReturnObject.h
M lldb/source/Commands/CommandObjectMemory.cpp
M lldb/source/Commands/CommandObjectPlatform.cpp
M lldb/source/Commands/CommandObjectTarget.cpp
M lldb/source/Commands/CommandObjectThread.cpp
M lldb/source/Interpreter/CommandInterpreter.cpp
M lldb/source/Interpreter/CommandReturnObject.cpp
Log Message:
-----------
[lldb] Use GetOutputStream instead of repeated AppendMessageWithFormat (#189674)
AppendMessageWithFormat is odd because it's the only AppendMessage...
method that does not add a newline for you.
This PR changes places that use it to output raw text, or build
up a large message. They now use GetOutputStream() instead,
which makes it a bit clearer that we're building one big message,
and where newlines end up.
This removes the last callers of AppendMessageWithFormat, so I am
removing it too.
Commit: f9663f785b70ba9a1425a90538ce2936e02e10cf
https://github.com/llvm/llvm-project/commit/f9663f785b70ba9a1425a90538ce2936e02e10cf
Author: Sameer Sahasrabuddhe <sameer.sahasrabuddhe at amd.com>
Date: 2026-04-08 (Wed, 08 Apr 2026)
Changed paths:
M .github/workflows/libc-shared-tests.yml
M bolt/lib/Core/BinaryContext.cpp
M bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp
M bolt/lib/Target/AArch64/CMakeLists.txt
M bolt/unittests/Core/MCPlusBuilder.cpp
M clang-tools-extra/clang-tidy/ClangTidy.cpp
M clang-tools-extra/clang-tidy/ClangTidyCheck.h
A clang-tools-extra/clang-tidy/bugprone/AssignmentInSelectionStatementCheck.cpp
A clang-tools-extra/clang-tidy/bugprone/AssignmentInSelectionStatementCheck.h
M clang-tools-extra/clang-tidy/bugprone/BugproneTidyModule.cpp
M clang-tools-extra/clang-tidy/bugprone/CMakeLists.txt
M clang-tools-extra/clang-tidy/bugprone/DynamicStaticInitializersCheck.cpp
M clang-tools-extra/clang-tidy/bugprone/DynamicStaticInitializersCheck.h
M clang-tools-extra/clang-tidy/bugprone/SuspiciousIncludeCheck.cpp
M clang-tools-extra/clang-tidy/bugprone/SuspiciousIncludeCheck.h
M clang-tools-extra/clang-tidy/cert/CERTTidyModule.cpp
M clang-tools-extra/clang-tidy/cppcoreguidelines/MissingStdForwardCheck.cpp
M clang-tools-extra/clang-tidy/google/GlobalNamesInHeadersCheck.cpp
M clang-tools-extra/clang-tidy/google/GlobalNamesInHeadersCheck.h
M clang-tools-extra/clang-tidy/llvmlibc/InlineFunctionDeclCheck.cpp
M clang-tools-extra/clang-tidy/llvmlibc/InlineFunctionDeclCheck.h
M clang-tools-extra/clang-tidy/misc/AnonymousNamespaceInHeaderCheck.cpp
M clang-tools-extra/clang-tidy/misc/AnonymousNamespaceInHeaderCheck.h
M clang-tools-extra/clang-tidy/misc/DefinitionsInHeadersCheck.cpp
M clang-tools-extra/clang-tidy/misc/DefinitionsInHeadersCheck.h
M clang-tools-extra/clang-tidy/misc/UnusedUsingDeclsCheck.cpp
M clang-tools-extra/clang-tidy/misc/UnusedUsingDeclsCheck.h
M clang-tools-extra/clang-tidy/misc/UseAnonymousNamespaceCheck.cpp
M clang-tools-extra/clang-tidy/misc/UseAnonymousNamespaceCheck.h
M clang-tools-extra/clang-tidy/misc/UseInternalLinkageCheck.cpp
M clang-tools-extra/clang-tidy/misc/UseInternalLinkageCheck.h
M clang-tools-extra/clang-tidy/performance/TriviallyDestructibleCheck.cpp
M clang-tools-extra/clang-tidy/utils/HeaderGuard.cpp
M clang-tools-extra/clang-tidy/utils/HeaderGuard.h
M clang-tools-extra/docs/ReleaseNotes.rst
A clang-tools-extra/docs/clang-tidy/checks/bugprone/assignment-in-selection-statement.rst
A clang-tools-extra/docs/clang-tidy/checks/cert/exp45-c.rst
M clang-tools-extra/docs/clang-tidy/checks/list.rst
M clang-tools-extra/test/CMakeLists.txt
A clang-tools-extra/test/clang-tidy/checkers/bugprone/assignment-in-selection-statement.c
A clang-tools-extra/test/clang-tidy/checkers/bugprone/assignment-in-selection-statement.cpp
M clang-tools-extra/test/clang-tidy/checkers/cppcoreguidelines/missing-std-forward.cpp
A clang-tools-extra/test/clang-tidy/checkers/misc/use-internal-linkage-module-implementation.cpp
A clang-tools-extra/test/clang-tidy/checkers/misc/use-internal-linkage-module-partition.cpp
M clang-tools-extra/test/clang-tidy/checkers/misc/use-internal-linkage-module.cpp
A clang-tools-extra/test/clang-tidy/checkers/performance/trivially-destructible-module.cpp
A clang-tools-extra/test/clang-tidy/infrastructure/cxx20-modules.cppm
M clang-tools-extra/test/lit.cfg.py
M clang/docs/ReleaseNotes.rst
M clang/include/clang/ASTMatchers/ASTMatchFinder.h
M clang/include/clang/Analysis/AnalysisDeclContext.h
M clang/include/clang/Basic/DiagnosticGroups.td
M clang/include/clang/Basic/DiagnosticLexKinds.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Basic/HLSLIntrinsics.td
M clang/include/clang/Basic/SourceManager.h
M clang/include/clang/CIR/Dialect/Builder/CIRBaseBuilder.h
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/include/clang/Driver/SyclInstallationDetector.h
M clang/include/clang/Frontend/DependencyOutputOptions.h
M clang/include/clang/Frontend/Utils.h
M clang/include/clang/Options/Options.td
M clang/include/clang/Parse/Parser.h
M clang/include/clang/ScalableStaticAnalysisFramework/Analyses/UnsafeBufferUsage/UnsafeBufferUsage.h
A clang/include/clang/ScalableStaticAnalysisFramework/Analyses/UnsafeBufferUsage/UnsafeBufferUsageTest.h
M clang/include/clang/ScalableStaticAnalysisFramework/SSAFBuiltinForceLinker.h
M clang/include/clang/Serialization/ASTReader.h
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/CallEvent.h
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/Environment.h
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/ProgramState.h
M clang/lib/AST/StmtProfile.cpp
M clang/lib/ASTMatchers/ASTMatchFinder.cpp
M clang/lib/Analysis/AnalysisDeclContext.cpp
M clang/lib/Basic/Targets/SPIR.h
M clang/lib/CIR/CodeGen/CIRGenAtomic.cpp
M clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp
M clang/lib/CIR/CodeGen/CIRGenCUDANV.cpp
M clang/lib/CIR/CodeGen/CIRGenClass.cpp
M clang/lib/CIR/CodeGen/CIRGenException.cpp
M clang/lib/CIR/CodeGen/CIRGenExpr.cpp
M clang/lib/CIR/CodeGen/CIRGenExprAggregate.cpp
M clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
M clang/lib/CIR/CodeGen/CIRGenTypes.cpp
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
M clang/lib/CIR/Dialect/Transforms/LoweringPrepare.cpp
M clang/lib/CodeGen/Targets/SPIR.cpp
M clang/lib/DependencyScanning/DependencyScannerImpl.cpp
M clang/lib/DependencyScanning/ModuleDepCollector.cpp
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/Driver/ToolChains/Flang.cpp
M clang/lib/Driver/ToolChains/HIPSPV.cpp
M clang/lib/Driver/ToolChains/Linux.cpp
M clang/lib/Driver/ToolChains/SYCL.cpp
M clang/lib/ExtractAPI/DeclarationFragments.cpp
M clang/lib/Frontend/DependencyFile.cpp
M clang/lib/Frontend/Rewrite/FrontendActions.cpp
M clang/lib/Headers/hlsl/hlsl_alias_intrinsics.h
M clang/lib/Headers/hlsl/hlsl_detail.h
M clang/lib/Headers/hlsl/hlsl_intrinsic_helpers.h
M clang/lib/Headers/hlsl/hlsl_intrinsics.h
M clang/lib/Headers/wasm_simd128.h
M clang/lib/Lex/PPDirectives.cpp
M clang/lib/Parse/ParseDecl.cpp
M clang/lib/Parse/ParseObjc.cpp
M clang/lib/Rewrite/Rewriter.cpp
M clang/lib/ScalableStaticAnalysisFramework/Analyses/CMakeLists.txt
A clang/lib/ScalableStaticAnalysisFramework/Analyses/UnsafeBufferUsage/UnsafeBufferUsage.cpp
M clang/lib/ScalableStaticAnalysisFramework/Frontend/CMakeLists.txt
M clang/lib/Sema/DeclSpec.cpp
M clang/lib/Sema/SemaChecking.cpp
M clang/lib/Sema/SemaDecl.cpp
M clang/lib/Sema/SemaOpenMP.cpp
M clang/lib/Serialization/ASTReader.cpp
M clang/lib/StaticAnalyzer/Checkers/UninitializedObject/UninitializedObjectChecker.cpp
M clang/lib/StaticAnalyzer/Core/BugReporter.cpp
M clang/lib/StaticAnalyzer/Core/CallEvent.cpp
M clang/lib/StaticAnalyzer/Core/Environment.cpp
M clang/lib/StaticAnalyzer/Core/ExprEngine.cpp
M clang/lib/StaticAnalyzer/Core/ExprEngineCXX.cpp
M clang/lib/StaticAnalyzer/Core/ExprEngineCallAndReturn.cpp
M clang/lib/StaticAnalyzer/Core/MemRegion.cpp
M clang/lib/StaticAnalyzer/Core/ProgramState.cpp
A clang/test/Analysis/Scalable/UnsafeBufferUsage/Inputs/tu-summary-bad-element.json
A clang/test/Analysis/Scalable/UnsafeBufferUsage/Inputs/tu-summary-bad-ptr-level.json
A clang/test/Analysis/Scalable/UnsafeBufferUsage/Inputs/tu-summary-no-key.json
A clang/test/Analysis/Scalable/UnsafeBufferUsage/Inputs/tu-summary.json
A clang/test/Analysis/Scalable/UnsafeBufferUsage/tu-summary-serialization.test
M clang/test/Analysis/Scalable/ssaf-format/list.test
M clang/test/Analysis/bstring.c
A clang/test/CIR/CodeGen/agg-init-constexpr.cpp
M clang/test/CIR/CodeGen/atomic-scoped.c
A clang/test/CIR/CodeGen/ctor-try-body.cpp
A clang/test/CIR/CodeGen/long-double-inc-dec.cpp
A clang/test/CIR/CodeGen/mem-expr-fn.cpp
M clang/test/CIR/CodeGen/new.cpp
A clang/test/CIR/CodeGen/non-scalar-lval-return.cpp
M clang/test/CIR/CodeGen/pointer-to-member-func.cpp
M clang/test/CIR/CodeGenCUDA/kernel-call.cu
M clang/test/CIR/IR/array-ctor.cir
A clang/test/CIR/IR/invalid-array-structor.cir
M clang/test/CXX/dcl.dcl/dcl.spec/dcl.type/dcl.spec.auto/p3-generic-lambda-1y.cpp
M clang/test/ClangScanDeps/generate-modules-path-args.c
M clang/test/CodeGen/AArch64/bf16-getset-intrinsics.c
M clang/test/CodeGen/AArch64/fp8-intrinsics/acle_neon_fp8_untyped.c
M clang/test/CodeGen/AArch64/neon-intrinsics.c
M clang/test/CodeGen/AArch64/neon/bf16-getset.c
M clang/test/CodeGen/AArch64/neon/intrinsics.c
M clang/test/CodeGen/AArch64/poly64.c
A clang/test/CodeGenHIP/atomic-deprecated-fixit.hip
M clang/test/CodeGenHLSL/builtins/dst.hlsl
M clang/test/CodeGenHLSL/builtins/ldexp.hlsl
M clang/test/CodeGenHLSL/builtins/splitdouble.hlsl
M clang/test/CodeGenHLSL/resources/NonUniformResourceIndex.hlsl
M clang/test/CodeGenHLSL/semantics/SV_Position.ps.hlsl
M clang/test/CodeGenHLSL/semantics/SV_Position.vs.hlsl
M clang/test/CodeGenHLSL/semantics/SV_Target.ps.hlsl
M clang/test/CodeGenHLSL/semantics/semantic.arbitrary.hlsl
M clang/test/CodeGenHLSL/semantics/semantic.array.hlsl
M clang/test/CodeGenHLSL/semantics/semantic.array.output.hlsl
M clang/test/CodeGenHLSL/semantics/semantic.explicit-location-output-struct.hlsl
M clang/test/CodeGenHLSL/semantics/semantic.explicit-location.hlsl
M clang/test/CodeGenHLSL/semantics/semantic.explicit-mix-builtin.hlsl
M clang/test/CodeGenHLSL/semantics/semantic.explicit-mix.lib.hlsl
M clang/test/CodeGenHLSL/vk-features/vk.pushconstant.anon-struct.hlsl
M clang/test/CodeGenHLSL/vk-input-builtin.hlsl
M clang/test/CodeGenHLSL/vk-output-builtin.hlsl
R clang/test/Driver/Inputs/SYCL/libLLVMSYCL.ll
A clang/test/Driver/Inputs/SYCL/libsycl.ll
M clang/test/Driver/hipspv-toolchain.hip
M clang/test/Driver/link-device-code.test
A clang/test/Driver/module-file-direct-deps.c
M clang/test/Driver/pch-deps.c
M clang/test/Driver/print-supported-extensions-riscv.c
M clang/test/Driver/sycl-offload-jit.cpp
A clang/test/ExtractAPI/type-alias.cpp
M clang/test/Index/extract-api-cursor-cpp.cpp
A clang/test/Lexer/backslash-include-win.c
A clang/test/Modules/callable-require-clause-merge.cppm
A clang/test/Modules/dependency-gen-direct-module-deps.m
M clang/test/Modules/dependency-gen-pch.m
M clang/test/Modules/polluted-operator.cppm
A clang/test/OpenMP/declare_target_local_map_messages.cpp
M clang/test/Parser/c2x-auto.c
M clang/test/Sema/c2x-auto.c
M clang/test/Sema/constexpr.c
M clang/test/Sema/warn-fortify-source.c
M clang/test/SemaCXX/auto-cxx0x.cpp
A clang/test/SemaHIP/atomic-deprecated.hip
M clang/test/SemaHLSL/BuiltIns/D3DCOLORtoUBYTE4-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/cross-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/distance-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/dot2add-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/f16tof32-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/f32tof16-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/faceforward-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/fmod-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/ldexp-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/length-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/reflect-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/refract-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/smoothstep-errors.hlsl
M clang/test/SemaHLSL/WaveBuiltinAvailability.hlsl
A clang/test/SemaTemplate/GH187909.cpp
M clang/unittests/Rewrite/RewriterTest.cpp
M clang/unittests/ScalableStaticAnalysisFramework/Analyses/UnsafeBufferUsage/UnsafeBufferUsageTest.cpp
M compiler-rt/CMakeLists.txt
M compiler-rt/cmake/Modules/AddCompilerRT.cmake
M compiler-rt/cmake/Modules/AllSupportedArchDefs.cmake
M compiler-rt/cmake/caches/AMDGPU.cmake
M compiler-rt/cmake/config-ix.cmake
M compiler-rt/lib/sanitizer_common/sanitizer_common.h
M compiler-rt/lib/sanitizer_common/sanitizer_platform.h
M compiler-rt/lib/ubsan_minimal/ubsan_minimal_handlers.cpp
M compiler-rt/test/ubsan_minimal/CMakeLists.txt
M compiler-rt/test/ubsan_minimal/TestCases/local_bounds.cpp
M cross-project-tests/intrinsic-header-tests/wasm_simd128.c
M flang-rt/lib/runtime/time-intrinsic.cpp
M flang/docs/F202X.md
M flang/include/flang/Common/windows-include.h
M flang/include/flang/Frontend/CodeGenOptions.h
M flang/include/flang/Optimizer/Analysis/AliasAnalysis.h
M flang/include/flang/Optimizer/Transforms/Passes.h
M flang/include/flang/Optimizer/Transforms/Passes.td
M flang/include/flang/Semantics/openmp-utils.h
M flang/include/flang/Tools/CrossToolHelpers.h
M flang/lib/Frontend/CompilerInvocation.cpp
M flang/lib/Frontend/FrontendActions.cpp
M flang/lib/Lower/OpenMP/ClauseProcessor.cpp
M flang/lib/Lower/OpenMP/ClauseProcessor.h
M flang/lib/Lower/OpenMP/DataSharingProcessor.cpp
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Optimizer/Analysis/AliasAnalysis.cpp
M flang/lib/Optimizer/Dialect/FIROps.cpp
M flang/lib/Optimizer/OpenMP/DoConcurrentConversion.cpp
M flang/lib/Optimizer/Passes/Pipelines.cpp
M flang/lib/Optimizer/Transforms/FIRToMemRef.cpp
M flang/lib/Optimizer/Transforms/FunctionAttr.cpp
M flang/lib/Optimizer/Transforms/LoopInvariantCodeMotion.cpp
M flang/lib/Optimizer/Transforms/StackArrays.cpp
M flang/lib/Semantics/check-omp-atomic.cpp
M flang/lib/Semantics/check-omp-loop.cpp
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/check-omp-structure.h
M flang/lib/Semantics/expression.cpp
M flang/lib/Semantics/openmp-utils.cpp
M flang/lib/Semantics/resolve-directives.cpp
M flang/lib/Semantics/tools.cpp
M flang/module/cudadevice.f90
A flang/test/Analysis/AliasAnalysis/alias-analysis-access-path.fir
A flang/test/Analysis/AliasAnalysis/alias-analysis-derived-type-box-load.fir
M flang/test/Analysis/AliasAnalysis/load-ptr-designate.fir
M flang/test/Analysis/AliasAnalysis/ptr-component.fir
A flang/test/Driver/Inputs/pgo-sample.prof
A flang/test/Driver/fprofile-sample-use.f90
A flang/test/Integration/OpenMP/taskloop-alloca-placement.f90
A flang/test/Integration/inputs/pgo-sample.prof
A flang/test/Integration/profile-sample-use.f90
M flang/test/Lower/CUDA/cuda-device-proc.cuf
M flang/test/Lower/CUDA/cuda-intrinsic.cuf
M flang/test/Lower/CUDA/cuda-libdevice.cuf
M flang/test/Lower/CUDA/cuda-program-global.cuf
A flang/test/Lower/OpenMP/common-block-target-update.f90
M flang/test/Lower/OpenMP/declare-mapper.f90
M flang/test/Lower/OpenMP/if-clause.f90
M flang/test/Lower/OpenMP/implicit-dsa.f90
M flang/test/Lower/OpenMP/masked_taskloop.f90
M flang/test/Lower/OpenMP/parallel-masked-taskloop.f90
R flang/test/Lower/OpenMP/target-motion-skip-implicit-mapper.f90
M flang/test/Lower/OpenMP/taskloop-cancel.f90
M flang/test/Lower/OpenMP/taskloop-collapse.f90
M flang/test/Lower/OpenMP/taskloop-grainsize.f90
A flang/test/Lower/OpenMP/taskloop-inreduction.f90
M flang/test/Lower/OpenMP/taskloop-numtasks.f90
A flang/test/Lower/OpenMP/taskloop-reduction.f90
M flang/test/Lower/OpenMP/taskloop.f90
R flang/test/Lower/taskloop-inreduction.f90
R flang/test/Lower/taskloop-reduction.f90
M flang/test/Semantics/OpenMP/do22.f90
M flang/test/Semantics/OpenMP/tile06.f90
M flang/test/Semantics/cuf04.cuf
M flang/test/Transforms/DoConcurrent/reduce_device.mlir
A flang/test/Transforms/DoConcurrent/reduce_device_min.f90
M flang/test/Transforms/FIRToMemRef/array-coor-block-arg.mlir
M flang/test/Transforms/FIRToMemRef/slice.mlir
M flang/test/Transforms/licm.fir
A flang/test/Transforms/stack-arrays-block-cfg-scope.fir
A flang/test/Transforms/stack-arrays-nested-scope.fir
A flang/test/Transforms/stack-arrays-scope.f90
A flang/test/Transforms/tbaa-derived-type-records.fir
M flang/unittests/CMakeLists.txt
A flang/unittests/Semantics/CMakeLists.txt
A flang/unittests/Semantics/OpenMPUtils.cpp
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/docs/CMakeLists.txt
M libc/docs/headers/index.rst
M libc/shared/CMakeLists.txt
M libc/shared/rpc.h
M libc/shared/rpc_server.h
M libc/src/__support/OSUtil/linux/syscall_wrappers/CMakeLists.txt
A libc/src/__support/OSUtil/linux/syscall_wrappers/connect.h
R libc/src/__support/RPC/rpc_server.h
M libc/src/__support/arg_list.h
M libc/src/assert/generic/CMakeLists.txt
M libc/src/assert/generic/__assert_fail.cpp
M libc/src/assert/gpu/CMakeLists.txt
M libc/src/assert/gpu/__assert_fail.cpp
M libc/src/compiler/generic/CMakeLists.txt
M libc/src/compiler/generic/__stack_chk_fail.cpp
M libc/src/stdlib/CMakeLists.txt
A libc/src/stdlib/abort.cpp
A libc/src/stdlib/abort_utils.h
M libc/src/stdlib/baremetal/CMakeLists.txt
R libc/src/stdlib/baremetal/abort.cpp
A libc/src/stdlib/baremetal/abort_utils.h
M libc/src/stdlib/gpu/CMakeLists.txt
R libc/src/stdlib/gpu/abort.cpp
A libc/src/stdlib/gpu/abort_utils.h
M libc/src/stdlib/linux/CMakeLists.txt
R libc/src/stdlib/linux/abort.cpp
M libc/src/stdlib/linux/abort_utils.h
M libc/src/sys/socket/CMakeLists.txt
A libc/src/sys/socket/connect.h
M libc/src/sys/socket/linux/CMakeLists.txt
A libc/src/sys/socket/linux/connect.cpp
M libc/test/integration/src/stdio/gpu/printf_test.cpp
M libc/test/integration/src/stdlib/abort_test.cpp
M libc/test/shared/CMakeLists.txt
M libc/test/src/assert/assert_test.cpp
M libc/test/src/sys/socket/linux/CMakeLists.txt
A libc/test/src/sys/socket/linux/connect_test.cpp
A libc/utils/docgen/sys/socket.yaml
M libcxx/docs/Status/Cxx2cIssues.csv
M libcxx/docs/Status/Cxx2cPapers.csv
M lld/COFF/Config.h
M lld/COFF/Driver.cpp
M lld/COFF/SymbolTable.cpp
M lld/ELF/LinkerScript.cpp
A lld/test/COFF/export-all-conflict.test
M lld/test/COFF/gnu-weak.test
A lld/test/COFF/pdb-publics-hashes.s
M lld/test/ELF/x86-64-section-layout.s
M lldb/bindings/interface/SBFileSpecExtensions.i
M lldb/include/lldb/DataFormatters/FormattersContainer.h
M lldb/include/lldb/DataFormatters/TypeSynthetic.h
M lldb/include/lldb/Interpreter/CommandOptionArgumentTable.h
M lldb/include/lldb/Interpreter/CommandReturnObject.h
M lldb/include/lldb/Symbol/Symbol.h
M lldb/include/lldb/Target/Platform.h
M lldb/include/lldb/Target/Target.h
M lldb/include/lldb/Target/Thread.h
M lldb/include/lldb/Utility/ConstString.h
M lldb/include/lldb/lldb-enumerations.h
M lldb/packages/Python/lldbsuite/test/lldbutil.py
M lldb/source/API/SBAttachInfo.cpp
M lldb/source/API/SBCommandInterpreter.cpp
M lldb/source/API/SBCommunication.cpp
M lldb/source/API/SBDebugger.cpp
M lldb/source/API/SBEvent.cpp
M lldb/source/API/SBFileSpec.cpp
M lldb/source/API/SBFunction.cpp
M lldb/source/API/SBLanguageRuntime.cpp
M lldb/source/API/SBLaunchInfo.cpp
M lldb/source/API/SBListener.cpp
M lldb/source/API/SBMemoryRegionInfo.cpp
M lldb/source/API/SBModule.cpp
M lldb/source/API/SBPlatform.cpp
M lldb/source/API/SBProcess.cpp
M lldb/source/API/SBSymbol.cpp
M lldb/source/API/SBTarget.cpp
M lldb/source/API/SBThread.cpp
M lldb/source/API/SBValue.cpp
M lldb/source/API/SBWatchpoint.cpp
M lldb/source/Breakpoint/BreakpointResolverFileRegex.cpp
M lldb/source/Commands/CommandObjectFrame.cpp
M lldb/source/Commands/CommandObjectMemory.cpp
M lldb/source/Commands/CommandObjectPlatform.cpp
M lldb/source/Commands/CommandObjectSource.cpp
M lldb/source/Commands/CommandObjectTarget.cpp
M lldb/source/Commands/CommandObjectThread.cpp
M lldb/source/Commands/CommandObjectType.cpp
M lldb/source/Commands/Options.td
M lldb/source/Core/AddressRange.cpp
M lldb/source/Core/Debugger.cpp
M lldb/source/Core/Disassembler.cpp
M lldb/source/Core/FormatEntity.cpp
M lldb/source/Core/IOHandlerCursesGUI.cpp
M lldb/source/Core/Mangled.cpp
M lldb/source/Core/Module.cpp
M lldb/source/Core/Section.cpp
M lldb/source/Core/SourceManager.cpp
M lldb/source/DataFormatters/FormatManager.cpp
M lldb/source/DataFormatters/ValueObjectPrinter.cpp
M lldb/source/Expression/IRExecutionUnit.cpp
M lldb/source/Expression/Materializer.cpp
M lldb/source/Host/aix/Host.cpp
M lldb/source/Interpreter/CommandInterpreter.cpp
M lldb/source/Interpreter/CommandReturnObject.cpp
M lldb/source/Plugins/DynamicLoader/Darwin-Kernel/DynamicLoaderDarwinKernel.cpp
M lldb/source/Plugins/DynamicLoader/POSIX-DYLD/DynamicLoaderPOSIXDYLD.cpp
M lldb/source/Plugins/ExpressionParser/Clang/ClangASTSource.cpp
M lldb/source/Plugins/ExpressionParser/Clang/ClangExpressionParser.cpp
M lldb/source/Plugins/ExpressionParser/Clang/ClangExpressionSourceCode.cpp
M lldb/source/Plugins/ExpressionParser/Clang/ClangModulesDeclVendor.cpp
M lldb/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp
M lldb/source/Plugins/Language/CPlusPlus/BlockPointer.cpp
M lldb/source/Plugins/Language/CPlusPlus/CPlusPlusLanguage.cpp
M lldb/source/Plugins/Language/CPlusPlus/LibCxxVector.cpp
M lldb/source/Plugins/Language/CPlusPlus/MsvcStlVector.cpp
M lldb/source/Plugins/LanguageRuntime/CPlusPlus/ItaniumABIRuntime.cpp
M lldb/source/Plugins/LanguageRuntime/ObjC/AppleObjCRuntime/AppleObjCDeclVendor.cpp
M lldb/source/Plugins/LanguageRuntime/ObjC/AppleObjCRuntime/AppleObjCRuntimeV1.cpp
M lldb/source/Plugins/LanguageRuntime/ObjC/AppleObjCRuntime/AppleObjCRuntimeV2.cpp
M lldb/source/Plugins/LanguageRuntime/ObjC/AppleObjCRuntime/AppleObjCTrampolineHandler.cpp
M lldb/source/Plugins/LanguageRuntime/ObjC/ObjCLanguageRuntime.h
M lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp
M lldb/source/Plugins/ObjectFile/JSON/ObjectFileJSON.cpp
M lldb/source/Plugins/ObjectFile/Mach-O/ObjectFileMachO.cpp
M lldb/source/Plugins/ObjectFile/PECOFF/ObjectFilePECOFF.cpp
M lldb/source/Plugins/ObjectFile/XCOFF/ObjectFileXCOFF.cpp
M lldb/source/Plugins/ObjectFile/XCOFF/ObjectFileXCOFF.h
M lldb/source/Plugins/ObjectFile/wasm/ObjectFileWasm.cpp
M lldb/source/Plugins/Platform/MacOSX/PlatformDarwin.cpp
M lldb/source/Plugins/Platform/MacOSX/PlatformDarwinDevice.cpp
M lldb/source/Plugins/Platform/MacOSX/PlatformDarwinKernel.cpp
M lldb/source/Plugins/Process/AIX/NativeProcessAIX.cpp
M lldb/source/Plugins/Process/Linux/NativeProcessLinux.cpp
M lldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.cpp
M lldb/source/Plugins/Process/mach-core/RegisterContextUnifiedCore.cpp
M lldb/source/Plugins/Process/scripted/ScriptedFrame.cpp
M lldb/source/Plugins/Process/scripted/ScriptedThread.cpp
M lldb/source/Plugins/SymbolFile/CTF/SymbolFileCTF.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.h
M lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARFDebugMap.cpp
M lldb/source/Plugins/SymbolFile/PDB/SymbolFilePDB.cpp
M lldb/source/Plugins/SymbolFile/Symtab/SymbolFileSymtab.cpp
M lldb/source/Plugins/SymbolLocator/DebugSymbols/SymbolLocatorDebugSymbols.cpp
M lldb/source/Plugins/SystemRuntime/MacOSX/SystemRuntimeMacOSX.cpp
M lldb/source/Plugins/TypeSystem/Clang/TypeSystemClang.cpp
M lldb/source/Plugins/UnwindAssembly/x86/x86AssemblyInspectionEngine.cpp
M lldb/source/Symbol/SymbolContext.cpp
M lldb/source/Symbol/Symtab.cpp
M lldb/source/Symbol/Type.cpp
M lldb/source/Symbol/Variable.cpp
M lldb/source/Target/DynamicRegisterInfo.cpp
M lldb/source/Target/ModuleCache.cpp
M lldb/source/Target/Platform.cpp
M lldb/source/Target/Process.cpp
M lldb/source/Target/RegisterContextUnwind.cpp
M lldb/source/Target/SectionLoadList.cpp
M lldb/source/Target/StackFrame.cpp
M lldb/source/Target/Target.cpp
M lldb/source/Target/TargetProperties.td
M lldb/source/Target/Thread.cpp
M lldb/source/Target/ThreadPlanStepInRange.cpp
M lldb/source/Target/ThreadPlanStepOverRange.cpp
M lldb/source/Target/TraceDumper.cpp
M lldb/source/Utility/ArchSpec.cpp
M lldb/source/ValueObject/ValueObject.cpp
M lldb/source/ValueObject/ValueObjectSynthetic.cpp
M lldb/test/API/functionalities/scripted_frame_provider/pass_through_prefix/TestFrameProviderPassThroughPrefix.py
M lldb/test/API/functionalities/scripted_frame_provider/pass_through_prefix/frame_provider.py
A lldb/test/API/functionalities/scripted_frame_provider/thread_filter/Makefile
A lldb/test/API/functionalities/scripted_frame_provider/thread_filter/TestFrameProviderThreadFilter.py
A lldb/test/API/functionalities/scripted_frame_provider/thread_filter/frame_provider.py
A lldb/test/API/functionalities/scripted_frame_provider/thread_filter/main.cpp
A lldb/test/API/lang/cpp/non-type-template-param-member-ptr/Makefile
A lldb/test/API/lang/cpp/non-type-template-param-member-ptr/TestCppNonTypeTemplateParamPtrToMember.py
A lldb/test/API/lang/cpp/non-type-template-param-member-ptr/main.cpp
A lldb/test/API/python_api/filespec/TestFileSpecAPI.py
M lldb/test/Shell/ObjectFile/XCOFF/basic-info32.yaml
A lldb/test/Shell/ObjectFile/wasm/wasm-local-decls.yaml
A lldb/test/Shell/Platform/AutoLoad/Darwin/dsym-auto-load-modules-false.test
A lldb/test/Shell/Platform/AutoLoad/Darwin/dsym-auto-load-modules-multiple.test
A lldb/test/Shell/Platform/AutoLoad/Darwin/dsym-auto-load-modules-not-in-dict.test
A lldb/test/Shell/Platform/AutoLoad/Darwin/dsym-auto-load-modules-true.test
A lldb/test/Shell/Platform/AutoLoad/Darwin/dsym-auto-load-modules-warn.test
A lldb/test/Shell/Platform/AutoLoad/UNIX/auto-load-modules-false.test
A lldb/test/Shell/Platform/AutoLoad/UNIX/auto-load-modules-multiple.test
A lldb/test/Shell/Platform/AutoLoad/UNIX/auto-load-modules-not-in-dict.test
A lldb/test/Shell/Platform/AutoLoad/UNIX/auto-load-modules-true.test
A lldb/test/Shell/Platform/AutoLoad/UNIX/auto-load-modules-warn.test
M lldb/tools/lldb-server/lldb-gdbserver.cpp
A lldb/unittests/Instruction/ARM/TestARMEmulator.cpp
M lldb/unittests/Instruction/CMakeLists.txt
M lldb/unittests/Platform/PlatformDarwinTest.cpp
M lldb/unittests/Platform/PlatformTest.cpp
M lldb/unittests/SymbolFile/PDB/SymbolFilePDBTests.cpp
M lldb/unittests/Utility/ConstStringTest.cpp
M llvm/docs/CommandGuide/llvm-cov.rst
M llvm/docs/LangRef.rst
M llvm/docs/ReleaseNotes.md
M llvm/include/llvm/Analysis/BlockFrequencyInfoImpl.h
M llvm/include/llvm/Analysis/InlineOrder.h
M llvm/include/llvm/CodeGen/FunctionLoweringInfo.h
A llvm/include/llvm/ExecutionEngine/JITLink/ELF_hexagon.h
A llvm/include/llvm/ExecutionEngine/JITLink/hexagon.h
M llvm/include/llvm/IR/FixedMetadataKinds.def
M llvm/include/llvm/IR/Instruction.h
M llvm/include/llvm/MC/MCAsmInfo.h
M llvm/include/llvm/MC/MCContext.h
M llvm/include/llvm/MC/TargetRegistry.h
M llvm/include/llvm/Support/FileSystem.h
M llvm/include/llvm/Support/KnownBits.h
M llvm/include/llvm/Support/LSP/Protocol.h
M llvm/include/llvm/Target/GlobalISel/Combine.td
M llvm/include/llvm/Transforms/Utils/Cloning.h
M llvm/lib/Analysis/ConstantFolding.cpp
M llvm/lib/Analysis/DependenceAnalysis.cpp
M llvm/lib/Analysis/InlineCost.cpp
M llvm/lib/Analysis/InlineOrder.cpp
M llvm/lib/Analysis/InstructionSimplify.cpp
M llvm/lib/CAS/MappedFileRegionArena.cpp
M llvm/lib/CodeGen/CodeGenPrepare.cpp
M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
M llvm/lib/CodeGen/GlobalISel/Utils.cpp
M llvm/lib/CodeGen/Rematerializer.cpp
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/lib/CodeGen/TwoAddressInstructionPass.cpp
M llvm/lib/DebugInfo/PDB/Native/GSIStreamBuilder.cpp
M llvm/lib/ExecutionEngine/JITLink/CMakeLists.txt
M llvm/lib/ExecutionEngine/JITLink/ELF.cpp
A llvm/lib/ExecutionEngine/JITLink/ELF_hexagon.cpp
A llvm/lib/ExecutionEngine/JITLink/hexagon.cpp
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
M llvm/lib/IR/Value.cpp
M llvm/lib/IR/Verifier.cpp
M llvm/lib/MC/ELFObjectWriter.cpp
M llvm/lib/MC/MCAsmStreamer.cpp
M llvm/lib/MC/MCContext.cpp
M llvm/lib/MC/MCObjectStreamer.cpp
M llvm/lib/Support/LSP/Protocol.cpp
M llvm/lib/Support/Unix/Path.inc
M llvm/lib/Support/Windows/Path.inc
M llvm/lib/Support/Windows/Signals.inc
M llvm/lib/Target/AArch64/AArch64.h
M llvm/lib/Target/AArch64/AArch64A57FPLoadBalancing.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/lib/Target/AArch64/AArch64PassRegistry.def
M llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
M llvm/lib/Target/AArch64/GISel/AArch64PostLegalizerCombiner.cpp
M llvm/lib/Target/AArch64/GISel/AArch64RegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPUAttributor.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/GCNVOPDUtils.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
M llvm/lib/Target/AMDGPU/SILowerSGPRSpills.cpp
M llvm/lib/Target/AMDGPU/SISchedule.td
M llvm/lib/Target/AMDGPU/VOP1Instructions.td
M llvm/lib/Target/Hexagon/HexagonOptAddrMode.cpp
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
M llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
M llvm/lib/Target/PowerPC/PPCISelLowering.cpp
M llvm/lib/Target/PowerPC/PPCISelLowering.h
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/lib/Target/RISCV/RISCVGISel.td
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoC.td
M llvm/lib/Target/RISCV/RISCVInstrInfoXSfmm.td
M llvm/lib/Target/RISCV/RISCVInstrInfoXqci.td
M llvm/lib/Target/RISCV/RISCVInstrInfoZa.td
M llvm/lib/Target/RISCV/RISCVInstrInfoZvdot4a8i.td
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
M llvm/lib/Target/SPIRV/MCTargetDesc/SPIRVInstPrinter.cpp
M llvm/lib/Target/SPIRV/SPIRVCallLowering.cpp
M llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp
M llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.h
M llvm/lib/Target/SPIRV/SPIRVSubtarget.cpp
M llvm/lib/Target/Sparc/Sparc.td
M llvm/lib/Target/Sparc/SparcInstr64Bit.td
M llvm/lib/Target/WebAssembly/GISel/WebAssemblyCallLowering.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86InstrInfo.cpp
M llvm/lib/TargetParser/TargetDataLayout.cpp
M llvm/lib/Transforms/IPO/AlwaysInliner.cpp
M llvm/lib/Transforms/IPO/Inliner.cpp
M llvm/lib/Transforms/IPO/ModuleInliner.cpp
M llvm/lib/Transforms/IPO/PartialInlining.cpp
M llvm/lib/Transforms/IPO/SampleProfileMatcher.cpp
M llvm/lib/Transforms/Scalar/LoopIdiomRecognize.cpp
M llvm/lib/Transforms/Utils/CloneFunction.cpp
M llvm/lib/Transforms/Utils/InlineFunction.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.h
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlan.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanUtils.cpp
M llvm/test/Analysis/DependenceAnalysis/Banerjee.ll
M llvm/test/Analysis/DependenceAnalysis/Constraints.ll
M llvm/test/Analysis/DependenceAnalysis/MismatchingNestLevels.ll
M llvm/test/Analysis/DependenceAnalysis/NonCanonicalizedSubscript.ll
M llvm/test/Analysis/DependenceAnalysis/PreliminaryNoValidityCheckFixedSize.ll
M llvm/test/Analysis/DependenceAnalysis/Propagating.ll
M llvm/test/Analysis/DependenceAnalysis/SameSDLoops.ll
M llvm/test/Analysis/DependenceAnalysis/banerjee-overflow.ll
M llvm/test/Analysis/DependenceAnalysis/rdiv-minor-algebra.ll
M llvm/test/CodeGen/AArch64/GlobalISel/postlegalizer-combiner-constant-fold.mir
M llvm/test/CodeGen/AArch64/arm64-int-neon.ll
M llvm/test/CodeGen/AArch64/arm64-vmul.ll
A llvm/test/CodeGen/AArch64/branch-on-bool.ll
M llvm/test/CodeGen/AArch64/ctpop.ll
A llvm/test/CodeGen/AArch64/neon-mul-shl.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-short-clamp.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.s.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.s.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/asyncmark-gfx12plus.ll
M llvm/test/CodeGen/AMDGPU/fcopysign.f16.ll
M llvm/test/CodeGen/AMDGPU/fmed3.bf16.ll
M llvm/test/CodeGen/AMDGPU/fmed3.ll
M llvm/test/CodeGen/AMDGPU/fold-int-pow2-with-fmul-or-fdiv.ll
M llvm/test/CodeGen/AMDGPU/frem.ll
M llvm/test/CodeGen/AMDGPU/llc-pipeline.ll
A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.gws.barrier-bundle.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.gws.barrier.ll
M llvm/test/CodeGen/AMDGPU/llvm.maximum.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.maximum.f32.ll
M llvm/test/CodeGen/AMDGPU/llvm.minimum.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.minimum.f32.ll
M llvm/test/CodeGen/AMDGPU/lshl64-to-32.ll
M llvm/test/CodeGen/AMDGPU/narrow_math_for_and.ll
M llvm/test/CodeGen/AMDGPU/reassoc-mul-add-1-to-mad.ll
A llvm/test/CodeGen/AMDGPU/s-buffer-load-mmo-offsets.ll
M llvm/test/CodeGen/AMDGPU/sdiv64.ll
M llvm/test/CodeGen/AMDGPU/sgpr-regalloc-flags.ll
A llvm/test/CodeGen/AMDGPU/si-lower-sgpr-spills-cycle-header.ll
A llvm/test/CodeGen/AMDGPU/si-lower-sgpr-spills-cycle-header.mir
A llvm/test/CodeGen/AMDGPU/si-lower-sgpr-spills-initial-insert-in-body.mir
A llvm/test/CodeGen/AMDGPU/si-lower-sgpr-spills-initial-insert-in-latch.mir
A llvm/test/CodeGen/AMDGPU/si-lower-sgpr-spills-multi-entry-cycle.mir
M llvm/test/CodeGen/AMDGPU/spill-sgpr-to-virtual-vgpr.mir
M llvm/test/CodeGen/AMDGPU/spill-vgpr-to-agpr-update-regscavenger.ll
M llvm/test/CodeGen/AMDGPU/udiv64.ll
M llvm/test/CodeGen/AMDGPU/uniform-vgpr-to-sgpr-return.ll
M llvm/test/CodeGen/AMDGPU/urem64.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-fmaximum.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-fminimum.ll
M llvm/test/CodeGen/Generic/2010-11-04-BigByval.ll
A llvm/test/CodeGen/Hexagon/opt-addr-mode-large-unodelist.ll
A llvm/test/CodeGen/PowerPC/bitcast-truncate-vec-i1.ll
M llvm/test/CodeGen/RISCV/features-info.ll
A llvm/test/CodeGen/RISCV/rvv/commutable-zvdot4a8i.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfdiv-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfrdiv-vp.ll
M llvm/test/CodeGen/RISCV/rvv/sink-splat-operands.ll
M llvm/test/CodeGen/RISCV/rvv/undef-vp-ops.ll
M llvm/test/CodeGen/RISCV/rvv/vfdiv-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfrdiv-vp.ll
M llvm/test/CodeGen/RISCV/xcvmem.ll
M llvm/test/CodeGen/RISCV/xqciac.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_memory_access_aliasing/alias-load-store-atomic.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_memory_access_aliasing/alias-masked-load-store.ll
M llvm/test/CodeGen/SPIRV/hlsl-resources/Packed.ll
M llvm/test/CodeGen/SPIRV/hlsl-resources/cbuffer-peeled-array.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/bitreverse_small_type.ll
M llvm/test/CodeGen/SPIRV/pointers/load-vector-from-array-of-vectors.ll
M llvm/test/CodeGen/SPIRV/spirv-explicit-layout.ll
R llvm/test/CodeGen/SPIRV/transcoding/OpBitReverse-subbyte.ll
R llvm/test/CodeGen/SPIRV/transcoding/OpBitReverse_i2.ll
A llvm/test/CodeGen/SPIRV/transcoding/subbyte-arg-type-mismatch.ll
A llvm/test/CodeGen/SPIRV/vk-pushconstant-layout-natural.ll
M llvm/test/CodeGen/SPIRV/vk-pushconstant-layout.ll
A llvm/test/CodeGen/SystemZ/vec-trunc-to-i16.ll
M llvm/test/CodeGen/Thumb2/mve-vmulh.ll
M llvm/test/CodeGen/WebAssembly/GlobalISel/irtranslator/args-simd.ll
M llvm/test/CodeGen/WebAssembly/GlobalISel/irtranslator/args-swiftcc.ll
M llvm/test/CodeGen/WebAssembly/GlobalISel/irtranslator/args.ll
A llvm/test/CodeGen/WebAssembly/GlobalISel/irtranslator/ret-aggregates.ll
A llvm/test/CodeGen/WebAssembly/GlobalISel/irtranslator/ret-basics.ll
A llvm/test/CodeGen/WebAssembly/GlobalISel/irtranslator/ret-simd.ll
M llvm/test/CodeGen/WebAssembly/f16-intrinsics.ll
M llvm/test/CodeGen/WebAssembly/simd-bitmask.ll
M llvm/test/CodeGen/WebAssembly/simd-illegal-bitmask.ll
A llvm/test/CodeGen/X86/apx/pr190557.ll
M llvm/test/CodeGen/X86/combine-pmuldq.ll
A llvm/test/CodeGen/X86/half-fneg-fabs.ll
M llvm/test/CodeGen/X86/mul-lohi-no-implicit-copy.ll
M llvm/test/CodeGen/X86/pr78897.ll
M llvm/test/CodeGen/X86/tailcallstack64.ll
M llvm/test/CodeGen/X86/tailccstack64.ll
A llvm/test/CodeGen/X86/two-address-subreg-to-reg-kill.mir
A llvm/test/ExecutionEngine/JITLink/Hexagon/ELF_hexagon_b22_pcrel.s
A llvm/test/ExecutionEngine/JITLink/Hexagon/ELF_hexagon_combined.s
A llvm/test/ExecutionEngine/JITLink/Hexagon/ELF_hexagon_compound.s
A llvm/test/ExecutionEngine/JITLink/Hexagon/ELF_hexagon_cond_branch.s
A llvm/test/ExecutionEngine/JITLink/Hexagon/ELF_hexagon_const_extender.s
A llvm/test/ExecutionEngine/JITLink/Hexagon/ELF_hexagon_data_relocations.s
A llvm/test/ExecutionEngine/JITLink/Hexagon/ELF_hexagon_duplex.s
A llvm/test/ExecutionEngine/JITLink/Hexagon/ELF_hexagon_hilo16.s
A llvm/test/ExecutionEngine/JITLink/Hexagon/ELF_hexagon_loop.s
A llvm/test/ExecutionEngine/JITLink/Hexagon/ELF_hexagon_mem_relocs.s
A llvm/test/ExecutionEngine/JITLink/Hexagon/ELF_hexagon_minimal.s
A llvm/test/ExecutionEngine/JITLink/Hexagon/ELF_hexagon_noext_branch.s
A llvm/test/ExecutionEngine/JITLink/Hexagon/ELF_hexagon_packet.s
A llvm/test/ExecutionEngine/JITLink/Hexagon/ELF_hexagon_plt.s
A llvm/test/ExecutionEngine/JITLink/Hexagon/lit.local.cfg
M llvm/test/MC/Sparc/sparc64-alu-instructions.s
M llvm/test/MC/WebAssembly/simd-encodings.s
A llvm/test/Transforms/CodeGenPrepare/X86/verify-bfi-updates.ll
A llvm/test/Transforms/CorrelatedValuePropagation/pr187381.ll
M llvm/test/Transforms/Inline/attributes.ll
M llvm/test/Transforms/Inline/debug-invoke.ll
R llvm/test/Transforms/Inline/inline-history-2.ll
A llvm/test/Transforms/Inline/inline-history-noinline.ll
R llvm/test/Transforms/Inline/inline-history.ll
M llvm/test/Transforms/Inline/inline-recursive-fn2.ll
M llvm/test/Transforms/InstCombine/X86/x86-sse4a-inseltpoison.ll
M llvm/test/Transforms/InstCombine/X86/x86-sse4a.ll
M llvm/test/Transforms/InstCombine/cast.ll
M llvm/test/Transforms/InstSimplify/bitcast-vector-fold.ll
M llvm/test/Transforms/LoopIdiom/non-integral-pointers.ll
M llvm/test/Transforms/LoopInterchange/large-nested-6d.ll
M llvm/test/Transforms/LoopVectorize/2012-10-20-infloop.ll
M llvm/test/Transforms/LoopVectorize/AArch64/aarch64-unroll.ll
M llvm/test/Transforms/LoopVectorize/AArch64/arm64-unroll.ll
M llvm/test/Transforms/LoopVectorize/AArch64/binop-costs.ll
M llvm/test/Transforms/LoopVectorize/AArch64/find-last-iv-sinkable-expr-epilogue.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-chained.ll
M llvm/test/Transforms/LoopVectorize/AArch64/pr33053.ll
M llvm/test/Transforms/LoopVectorize/AArch64/pr36032.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-interleaved-accesses-cost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/type-shrinkage-zext-costs.ll
M llvm/test/Transforms/LoopVectorize/AMDGPU/divergent-runtime-check.ll
M llvm/test/Transforms/LoopVectorize/AMDGPU/unroll-in-loop-vectorizer.ll
M llvm/test/Transforms/LoopVectorize/ARM/active-lane-mask.ll
M llvm/test/Transforms/LoopVectorize/ARM/arm-ieee-vectorize.ll
M llvm/test/Transforms/LoopVectorize/Hexagon/maximum-vf-crash.ll
M llvm/test/Transforms/LoopVectorize/Hexagon/minimum-vf.ll
M llvm/test/Transforms/LoopVectorize/LoongArch/loongarch-interleaved.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/interleave_IC.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/massv-altivec.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/massv-calls.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/massv-unsupported.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/reg-usage.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/stride-vectorization.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/vectorize-bswap.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/vectorize-only-for-real.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/vsx-tsvc-s173.ll
M llvm/test/Transforms/LoopVectorize/RISCV/reg-usage.ll
M llvm/test/Transforms/LoopVectorize/RISCV/riscv-interleaved.ll
M llvm/test/Transforms/LoopVectorize/RISCV/riscv-unroll.ll
M llvm/test/Transforms/LoopVectorize/RISCV/short-trip-count.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-reduction-cost.ll
M llvm/test/Transforms/LoopVectorize/RISCV/unroll-in-loop-vectorizer.ll
M llvm/test/Transforms/LoopVectorize/WebAssembly/int-mac-reduction-costs.ll
M llvm/test/Transforms/LoopVectorize/WebAssembly/memory-interleave.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/handle-iptr-with-data-layout-to-not-assert.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-f32-stride-2.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-f32-stride-3.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-f32-stride-4.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-f32-stride-5.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-f32-stride-6.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-f32-stride-7.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-f32-stride-8.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-f64-stride-2.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-f64-stride-3.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-f64-stride-4.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-f64-stride-5.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-f64-stride-6.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-f64-stride-7.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-f64-stride-8.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-half.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i16-stride-2.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i16-stride-3.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i16-stride-4.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i16-stride-5.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i16-stride-6.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i16-stride-7.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i16-stride-8.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i32-stride-2-indices-0u.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i32-stride-2.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i32-stride-3-indices-01u.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i32-stride-3-indices-0uu.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i32-stride-3.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i32-stride-4-indices-012u.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i32-stride-4-indices-01uu.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i32-stride-4-indices-0uuu.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i32-stride-4.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i32-stride-5.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i32-stride-6.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i32-stride-7.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i32-stride-8.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i64-stride-2.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i64-stride-3.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i64-stride-4.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i64-stride-5.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i64-stride-6.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i64-stride-7.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i64-stride-8.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i8-stride-2.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i8-stride-3.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i8-stride-4.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i8-stride-5.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i8-stride-6.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i8-stride-7.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i8-stride-8.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-f32-stride-2.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-f32-stride-3.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-f32-stride-4.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-f32-stride-5.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-f32-stride-6.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-f32-stride-7.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-f32-stride-8.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-f64-stride-2.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-f64-stride-3.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-f64-stride-4.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-f64-stride-5.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-f64-stride-6.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-f64-stride-7.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-f64-stride-8.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i16-stride-2.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i16-stride-3.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i16-stride-4.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i16-stride-5.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i16-stride-6.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i16-stride-7.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i16-stride-8.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i32-stride-2.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i32-stride-3.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i32-stride-4.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i32-stride-5.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i32-stride-6.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i32-stride-7.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i32-stride-8.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i64-stride-2.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i64-stride-3.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i64-stride-4.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i64-stride-5.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i64-stride-6.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i64-stride-7.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i64-stride-8.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i8-stride-2.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i8-stride-3.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i8-stride-4.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i8-stride-5.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i8-stride-6.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i8-stride-7.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i8-stride-8.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/masked-interleaved-load-i16.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/masked-interleaved-store-i16.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/masked-scatter-i32-with-i8-index.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/masked-scatter-i64-with-i8-index.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/masked-store-i16.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/masked-store-i32.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/masked-store-i64.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/masked-store-i8.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/scatter-i16-with-i8-index.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/scatter-i32-with-i8-index.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/scatter-i64-with-i8-index.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/scatter-i8-with-i8-index.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/strided-load-i16.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/strided-load-i32.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/strided-load-i64.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/strided-load-i8.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/vpinstruction-cost.ll
M llvm/test/Transforms/LoopVectorize/X86/already-vectorized.ll
M llvm/test/Transforms/LoopVectorize/X86/consecutive-ptr-cg-bug.ll
M llvm/test/Transforms/LoopVectorize/X86/fp_to_sint8-cost-model.ll
M llvm/test/Transforms/LoopVectorize/X86/int128_no_gather.ll
M llvm/test/Transforms/LoopVectorize/X86/interleaved-accesses-use-after-free.ll
M llvm/test/Transforms/LoopVectorize/X86/masked_load_store.ll
M llvm/test/Transforms/LoopVectorize/X86/no-vector.ll
M llvm/test/Transforms/LoopVectorize/X86/no_fpmath.ll
M llvm/test/Transforms/LoopVectorize/X86/no_fpmath_with_hotness.ll
M llvm/test/Transforms/LoopVectorize/X86/pr35432.ll
M llvm/test/Transforms/LoopVectorize/X86/pr48340.ll
M llvm/test/Transforms/LoopVectorize/X86/register-assumption.ll
M llvm/test/Transforms/LoopVectorize/X86/scatter_crash.ll
M llvm/test/Transforms/LoopVectorize/X86/strided_load_cost.ll
M llvm/test/Transforms/LoopVectorize/X86/tail_loop_folding.ll
M llvm/test/Transforms/LoopVectorize/X86/uint64_to_fp64-cost-model.ll
M llvm/test/Transforms/LoopVectorize/X86/vector_ptr_load_store.ll
M llvm/test/Transforms/LoopVectorize/X86/vectorization-remarks-missed.ll
M llvm/test/Transforms/LoopVectorize/assume.ll
M llvm/test/Transforms/LoopVectorize/conditional-assignment.ll
M llvm/test/Transforms/LoopVectorize/control-flow.ll
M llvm/test/Transforms/LoopVectorize/dbg.value.ll
M llvm/test/Transforms/LoopVectorize/dereferenceable-info-from-assumption-variable-size.ll
M llvm/test/Transforms/LoopVectorize/diag-missing-instr-debug-loc.ll
M llvm/test/Transforms/LoopVectorize/diag-with-hotness-info-2.ll
M llvm/test/Transforms/LoopVectorize/diag-with-hotness-info.ll
M llvm/test/Transforms/LoopVectorize/ee-crash.ll
M llvm/test/Transforms/LoopVectorize/find-last-iv-sinkable-expr-epilogue.ll
M llvm/test/Transforms/LoopVectorize/find-last-iv-sinkable-expr.ll
M llvm/test/Transforms/LoopVectorize/global_alias.ll
M llvm/test/Transforms/LoopVectorize/if-reduction.ll
M llvm/test/Transforms/LoopVectorize/incorrect-dom-info.ll
M llvm/test/Transforms/LoopVectorize/induction.ll
M llvm/test/Transforms/LoopVectorize/int_sideeffect.ll
M llvm/test/Transforms/LoopVectorize/iv-select-cmp-decreasing.ll
M llvm/test/Transforms/LoopVectorize/no_array_bounds.ll
M llvm/test/Transforms/LoopVectorize/no_switch.ll
M llvm/test/Transforms/LoopVectorize/no_switch_disable_vectorization.ll
M llvm/test/Transforms/LoopVectorize/pointer-induction.ll
M llvm/test/Transforms/LoopVectorize/reuse-lcssa-phi-scev-expansion.ll
M llvm/test/Transforms/LoopVectorize/scalable-assume.ll
M llvm/test/Transforms/SCCP/bitcast-vector-refinement.l.ll
R llvm/test/Verifier/inline-history-metadata.ll
M llvm/test/tools/llvm-ir2vec/bindings/ir2vec-getBBEmbMap.py
M llvm/test/tools/llvm-ir2vec/bindings/ir2vec-getFuncEmb.py
M llvm/test/tools/llvm-ir2vec/bindings/ir2vec-getFuncEmbMap.py
M llvm/test/tools/llvm-ir2vec/bindings/ir2vec-getFuncNames.py
M llvm/test/tools/llvm-ir2vec/bindings/ir2vec-getInstEmbMap.py
M llvm/test/tools/llvm-ir2vec/bindings/ir2vec-initEmbedding.py
A llvm/test/tools/llvm-mca/AMDGPU/gfx12-permlane16-cycles.s
M llvm/test/tools/llvm-mca/RISCV/Inputs/rvv/mask.s
A llvm/test/tools/llvm-mca/RISCV/SiFive7/sp-bypass.s
M llvm/test/tools/llvm-mca/RISCV/SiFiveP400/rvv/mask.test
M llvm/test/tools/llvm-mca/RISCV/SiFiveP600/rvv/mask.test
M llvm/test/tools/llvm-mca/RISCV/SiFiveX100/rvv/mask.test
M llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv/mask.test
M llvm/tools/llvm-exegesis/lib/Assembler.cpp
M llvm/tools/llvm-ir2vec/Bindings/PyIR2Vec.cpp
M llvm/tools/llvm-ir2vec/lib/Utils.cpp
M llvm/tools/llvm-ir2vec/lib/Utils.h
M llvm/tools/llvm-ir2vec/llvm-ir2vec.cpp
M llvm/tools/llvm-profgen/ProfiledBinary.h
M llvm/unittests/Analysis/InlineOrderPlugin/InlineOrderPlugin.cpp
M llvm/unittests/CodeGen/MFCommon.inc
M llvm/unittests/CodeGen/MachineInstrTest.cpp
M llvm/unittests/CodeGen/MachineOperandTest.cpp
M llvm/unittests/CodeGen/RematerializerTest.cpp
M llvm/unittests/DebugInfo/PDB/PublicsStreamTest.cpp
M llvm/unittests/MC/DwarfLineTableHeaders.cpp
M llvm/unittests/Support/Path.cpp
M llvm/unittests/Target/AArch64/AArch64InstPrinterTest.cpp
M llvm/unittests/Target/SPIRV/SPIRVGlobalRegistryTests.cpp
M llvm/unittests/TargetParser/RISCVISAInfoTest.cpp
M llvm/utils/git/github-automation.py
M llvm/utils/gn/secondary/llvm/lib/Demangle/BUILD.gn
M llvm/utils/lit/lit/ProgressBar.py
A llvm/utils/llvm-testing-tools/README.md
A llvm/utils/llvm-testing-tools/pyproject.toml
A llvm/utils/llvm-testing-tools/src/llvm_testing_tools/__init__.py
A llvm/utils/llvm-testing-tools/src/llvm_testing_tools/wrapper.py
M mlir/docs/Dialects/OpenMPDialect/_index.md
M mlir/include/mlir/Dialect/AMDGPU/IR/AMDGPUAttrs.td
M mlir/include/mlir/Dialect/AMDGPU/IR/AMDGPUDialect.h
A mlir/include/mlir/Dialect/AMDGPU/IR/AMDGPUEnums.h
M mlir/include/mlir/Dialect/AMDGPU/IR/AMDGPUEnums.td
M mlir/include/mlir/Dialect/AMDGPU/IR/AMDGPUOps.td
M mlir/include/mlir/Dialect/ControlFlow/IR/ControlFlowOps.td
M mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td
M mlir/include/mlir/Dialect/LLVMIR/NVVMRequiresSMTraits.h
M mlir/include/mlir/Dialect/LLVMIR/NVVMRequiresSMTraits.td
M mlir/include/mlir/Dialect/OpenMP/OpenMPDialect.h
M mlir/include/mlir/Dialect/OpenMP/OpenMPOps.td
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVBase.td
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVImageOps.td
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVTosaTypes.td
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVTypes.h
M mlir/include/mlir/Dialect/Tosa/IR/TosaComplianceData.h.inc
M mlir/include/mlir/Dialect/Tosa/IR/TosaOpBase.td
M mlir/include/mlir/Dialect/Tosa/IR/TosaOps.td
M mlir/include/mlir/IR/BuiltinDialectBytecode.td
M mlir/include/mlir/Interfaces/ControlFlowInterfaces.td
M mlir/include/mlir/Reducer/ReductionNode.h
M mlir/lib/Conversion/AMDGPUToROCDL/AMDGPUToROCDL.cpp
M mlir/lib/Dialect/AMDGPU/IR/AMDGPUOps.cpp
M mlir/lib/Dialect/ControlFlow/IR/ControlFlowOps.cpp
M mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp
M mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
M mlir/lib/Dialect/OpenMP/Transforms/MarkDeclareTarget.cpp
M mlir/lib/Dialect/SPIRV/IR/SPIRVDialect.cpp
M mlir/lib/Dialect/SPIRV/IR/SPIRVTypes.cpp
M mlir/lib/Dialect/Tosa/IR/TosaOps.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaProfileCompliance.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaValidation.cpp
M mlir/lib/Dialect/Vector/IR/VectorOps.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPULayoutImpl.cpp
M mlir/lib/Reducer/CMakeLists.txt
M mlir/lib/Reducer/ReductionNode.cpp
M mlir/lib/Reducer/ReductionTreePass.cpp
M mlir/lib/Target/LLVM/XeVM/Target.cpp
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
M mlir/lib/Target/LLVMIR/ModuleImport.cpp
M mlir/lib/Target/LLVMIR/ModuleTranslation.cpp
M mlir/lib/Target/SPIRV/Deserialization/DeserializeOps.cpp
M mlir/lib/Target/SPIRV/Deserialization/Deserializer.cpp
M mlir/lib/Target/SPIRV/Deserialization/Deserializer.h
M mlir/lib/Target/SPIRV/Serialization/Serializer.cpp
M mlir/lib/Tools/mlir-lsp-server/LSPServer.cpp
M mlir/lib/Tools/mlir-lsp-server/MLIRServer.cpp
M mlir/lib/Tools/mlir-lsp-server/MLIRServer.h
M mlir/lib/Transforms/CSE.cpp
M mlir/test/Conversion/AMDGPUToROCDL/global-prefetch.mlir
R mlir/test/Conversion/MathToXeVM/native-spirv-builtins.mlir
M mlir/test/Conversion/OpenMPToLLVM/convert-to-llvmir.mlir
M mlir/test/Dialect/AMDGPU/invalid.mlir
M mlir/test/Dialect/LLVMIR/nvvm-check-targetSM.mlir
R mlir/test/Dialect/Linalg/transform-op-mmt4d-to-fma.mlir
M mlir/test/Dialect/OpenMP/invalid.mlir
M mlir/test/Dialect/OpenMP/ops.mlir
M mlir/test/Dialect/SPIRV/IR/composite-ops.mlir
M mlir/test/Dialect/SPIRV/IR/image-ops.mlir
M mlir/test/Dialect/SPIRV/IR/tosa-ops-verification.mlir
M mlir/test/Dialect/SPIRV/IR/types.mlir
M mlir/test/Dialect/Tosa/availability.mlir
M mlir/test/Dialect/Tosa/dynamic_extension.mlir
M mlir/test/Dialect/Tosa/invalid.mlir
M mlir/test/Dialect/Tosa/invalid_extension.mlir
M mlir/test/Dialect/Tosa/level_check.mlir
M mlir/test/Dialect/Tosa/ops.mlir
M mlir/test/Dialect/Tosa/profile_pro_fp_unsupported.mlir
M mlir/test/Dialect/Tosa/profile_pro_int_unsupported.mlir
M mlir/test/Dialect/Tosa/tosa-infer-shapes.mlir
M mlir/test/Dialect/Tosa/tosa-validation-version-1p0-invalid.mlir
A mlir/test/Dialect/Tosa/tosa-validation-version-1p1-invalid.mlir
M mlir/test/Dialect/Vector/canonicalize.mlir
M mlir/test/Dialect/Vector/canonicalize/vector-to-shape-cast.mlir
A mlir/test/Dialect/Vector/vector-multi-reduction-to-fma.mlir
M mlir/test/Dialect/XeGPU/propagate-layout-subgroup.mlir
M mlir/test/Dialect/XeGPU/xegpu-vector-linearize.mlir
A mlir/test/Target/LLVMIR/Import/use-sample-profile.ll
M mlir/test/Target/LLVMIR/openmp-taskloop-bounds-cast.mlir
M mlir/test/Target/LLVMIR/openmp-taskloop-cancel.mlir
M mlir/test/Target/LLVMIR/openmp-taskloop-cancellation-point.mlir
M mlir/test/Target/LLVMIR/openmp-taskloop-collapse.mlir
A mlir/test/Target/LLVMIR/openmp-taskloop-context-alloca.mlir
M mlir/test/Target/LLVMIR/openmp-taskloop-final.mlir
M mlir/test/Target/LLVMIR/openmp-taskloop-grainsize.mlir
M mlir/test/Target/LLVMIR/openmp-taskloop-if.mlir
M mlir/test/Target/LLVMIR/openmp-taskloop-mergeable.mlir
M mlir/test/Target/LLVMIR/openmp-taskloop-no-context-struct.mlir
M mlir/test/Target/LLVMIR/openmp-taskloop-nogroup.mlir
M mlir/test/Target/LLVMIR/openmp-taskloop-num_tasks.mlir
A mlir/test/Target/LLVMIR/openmp-taskloop-outer-bounds.mlir
M mlir/test/Target/LLVMIR/openmp-taskloop-priority.mlir
M mlir/test/Target/LLVMIR/openmp-taskloop-untied.mlir
M mlir/test/Target/LLVMIR/openmp-taskloop.mlir
M mlir/test/Target/LLVMIR/openmp-todo.mlir
A mlir/test/Target/LLVMIR/use-sample-profile.mlir
M mlir/test/Target/SPIRV/image-ops.mlir
M mlir/test/Target/SPIRV/sampled-image.mlir
M mlir/test/lib/Dialect/Test/TestOps.td
M mlir/test/mlir-lsp-server/diagnostics.test
A mlir/test/mlir-lsp-server/rooturi_rel_path.test
A mlir/test/mlir-reduce/false.sh
M mlir/test/mlir-reduce/invalid.mlir
M mlir/test/mlir-reduce/reduction-tree.mlir
M mlir/test/mlir-reduce/simple-test.mlir
R mlir/test/mlir-reduce/test.sh
A mlir/test/mlir-reduce/true.sh
M mlir/unittests/Bytecode/BytecodeTest.cpp
M mlir/utils/vscode/package.json
M offload/CMakeLists.txt
M offload/cmake/Modules/LibomptargetGetDependencies.cmake
M offload/plugins-nextgen/amdgpu/src/rtl.cpp
M offload/plugins-nextgen/common/src/RPC.cpp
M offload/plugins-nextgen/level_zero/CMakeLists.txt
A offload/plugins-nextgen/level_zero/dynamic_l0/L0DynWrapper.cpp
A offload/plugins-nextgen/level_zero/dynamic_l0/level_zero/ze_api.h
A offload/plugins-nextgen/level_zero/dynamic_l0/level_zero/zes_api.h
R offload/plugins-nextgen/level_zero/src/L0DynWrapper.cpp
M offload/plugins-nextgen/level_zero/src/L0Kernel.cpp
M offload/plugins-nextgen/level_zero/src/L0Program.cpp
A offload/test/offloading/fortran/do-concurrent-to-omp-min-reduce.f90
M orc-rt/docs/Design.md
M orc-rt/include/orc-rt/Service.h
M orc-rt/include/orc-rt/Session.h
M orc-rt/lib/executor/Session.cpp
M orc-rt/unittests/SessionTest.cpp
M utils/bazel/llvm-project-overlay/clang/BUILD.bazel
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
M utils/bazel/third_party_build/nanobind.BUILD
Log Message:
-----------
Merge branch 'main' into users/ssahasra/async-gisel-fix
Compare: https://github.com/llvm/llvm-project/compare/46633e61ddb4...f9663f785b70
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