[all-commits] [llvm/llvm-project] 38034d: [RISCV] Use EVT instead of MVT in compressShuffleO...
Krzysztof Parzyszek via All-commits
all-commits at lists.llvm.org
Tue Apr 7 05:50:35 PDT 2026
Branch: refs/heads/users/kparzysz/e18-fix-affected-depth
Home: https://github.com/llvm/llvm-project
Commit: 38034d42bdc68b0397531d6c05e21051c2e84ae9
https://github.com/llvm/llvm-project/commit/38034d42bdc68b0397531d6c05e21051c2e84ae9
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-04-06 (Mon, 06 Apr 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-int.ll
Log Message:
-----------
[RISCV] Use EVT instead of MVT in compressShuffleOfShuffles. (#190636)
For the test case I just grabbed a test that exercised this code path
and made the VT non-simple.
Fixes #190605.
Commit: 5c13d2f099353d66d98ed97b482d8d64f907fa7b
https://github.com/llvm/llvm-project/commit/5c13d2f099353d66d98ed97b482d8d64f907fa7b
Author: SiliconA-Z <gfunni234 at gmail.com>
Date: 2026-04-06 (Mon, 06 Apr 2026)
Changed paths:
M llvm/lib/Target/ARM/ARMFeatures.h
M llvm/lib/Target/ARM/ARMISelLowering.cpp
M llvm/lib/Target/ARM/ARMInstrInfo.td
M llvm/lib/Target/ARM/ARMInstrThumb.td
M llvm/lib/Target/ARM/ARMInstrThumb2.td
M llvm/lib/Target/ARM/ARMLatencyMutations.cpp
M llvm/lib/Target/ARM/ARMScheduleM55.td
M llvm/lib/Target/ARM/ARMScheduleM7.td
M llvm/lib/Target/ARM/ARMScheduleM85.td
M llvm/lib/Target/ARM/ARMScheduleR52.td
M llvm/lib/Target/ARM/Thumb2SizeReduction.cpp
M llvm/test/CodeGen/ARM/cmp-to-cmn.ll
M llvm/test/MC/ARM/arm-shift-encoding.s
M llvm/test/MC/ARM/thumb-shift-encoding.s
Log Message:
-----------
[ARM] Enable creation of ARMISD::CMN nodes (#163223)
Map ARMISD::CMN to tCMN instead of armcmpz.
Rename the cmn instructions to match this new reality.
Please note that I do not have merge permissions.
Commit: e11a31f4c7f61a3abb0f9101f3269e5622195788
https://github.com/llvm/llvm-project/commit/e11a31f4c7f61a3abb0f9101f3269e5622195788
Author: neonetizen <justin at neonetizen.net>
Date: 2026-04-06 (Mon, 06 Apr 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp
A clang/test/CodeGen/AArch64/neon/f16-getset.c
M clang/test/CodeGen/AArch64/v8.2a-neon-intrinsics-generic.c
Log Message:
-----------
[CIR][AArch64] Lower FP16 vduph lane intrinsics (#186955)
>From #185382
Lower `vduph_lane_f16` and `vduph_laneq_f16` to `cir::VecExtractOp`
Tests moved from `v8.2a-neon-instrinsics-generic.c` to a new CIR-enabled
test file.
I tried following from notes made in #185852 (BF16)
Commit: 8d442bc5b58c9c8e2a5c321a06c8d9017630ca44
https://github.com/llvm/llvm-project/commit/8d442bc5b58c9c8e2a5c321a06c8d9017630ca44
Author: vporpo <vasileios.porpodas at amd.com>
Date: 2026-04-06 (Mon, 06 Apr 2026)
Changed paths:
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Passes/LoadStoreVec.h
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Passes/LoadStoreVec.cpp
M llvm/test/Transforms/SandboxVectorizer/load_store_vec.ll
Log Message:
-----------
[SandboxVec][LoadStoreVec] Add support for constants (#189769)
Up until now the pass would only vectorize load-store pairs. This patch
implements vectorization of constant-store pairs.
Commit: cdbb1f50142151155096c6b8d2d591f940fe91d1
https://github.com/llvm/llvm-project/commit/cdbb1f50142151155096c6b8d2d591f940fe91d1
Author: Kirill Stoimenov <87100199+kstoimenov at users.noreply.github.com>
Date: 2026-04-06 (Mon, 06 Apr 2026)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
M llvm/lib/Transforms/InstCombine/InstCombineInternal.h
M llvm/lib/Transforms/InstCombine/InstCombineShifts.cpp
M llvm/test/Transforms/InstCombine/apint-shift.ll
M llvm/test/Transforms/InstCombine/icmp-select.ll
R llvm/test/Transforms/InstCombine/icmp-shl-add-to-add.ll
Log Message:
-----------
Revert "[InstCombine] Fix #163110: Support peeling off matching shifts from icmp operands via canEvaluateShifted" (#190638)
Reverts llvm/llvm-project#165975
Breaks Sanitizer bots:
https://lab.llvm.org/buildbot/#/builders/52/builds/16329
Commit: a105f27f611c2a51cb9a16c3af40488061acf947
https://github.com/llvm/llvm-project/commit/a105f27f611c2a51cb9a16c3af40488061acf947
Author: Alexis Engelke <engelke at in.tum.de>
Date: 2026-04-06 (Mon, 06 Apr 2026)
Changed paths:
M llvm/include/llvm/CodeGen/SelectionDAGNodes.h
M llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp
Log Message:
-----------
[Scheduler][NFC] Don't use set to track visited nodes (#190480)
The visited set can grow rather large and we can use an unused field in
SDNode to store the same information without the use of a hash set.
This improves compile times: stage2-O3 -0.14%.
Commit: de0a81091bb65d93c86bf5206fda1daaa4b891f8
https://github.com/llvm/llvm-project/commit/de0a81091bb65d93c86bf5206fda1daaa4b891f8
Author: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
Date: 2026-04-06 (Mon, 06 Apr 2026)
Changed paths:
A llvm/test/MC/AMDGPU/vop3-literal-gfx1250.s
M llvm/test/MC/AMDGPU/vop3-literal.s
Log Message:
-----------
[AMDGPU] Update vop3-literal.s to use fake16 on gfx1250. NFC (#190243)
16-bit instructions there are in fake16 mode and shall also be
compatible with older targets. The purpose of the test is to
check literals, so fake16 or real16 is not important.
Commit: ab43cb8520c065cddbb5ce59a29987602255a2f5
https://github.com/llvm/llvm-project/commit/ab43cb8520c065cddbb5ce59a29987602255a2f5
Author: Brian Cain <brian.cain at oss.qualcomm.com>
Date: 2026-04-06 (Mon, 06 Apr 2026)
Changed paths:
M clang/lib/Driver/ToolChains/Hexagon.cpp
M clang/test/Driver/hexagon-toolchain-linux.c
Log Message:
-----------
[Hexagon] Pass -pie to linker when PIE is the toolchain default (#189723)
The Hexagon driver only checked for an explicit -pie flag when
constructing the link command, ignoring the toolchain's PIE default. For
linux-musl targets, isPIEDefault() returns true (via the Linux toolchain
base class), so the compiler generates PIC/PIE code (-pic-level 2
-pic-is-pie) but the linker never received -pie.
This mismatch caused LTO failures: without -pie the linker sets
Reloc::Static for the LTO backend, which generates GP-relative
(small-data) references that lld cannot resolve.
Use hasFlag() to respect the toolchain default, and guard the -pie
emission against -shared and -r (relocatable) modes.
Commit: 04e2be73a69ff43bb0fe5e8a9bf05a99c5b957fb
https://github.com/llvm/llvm-project/commit/04e2be73a69ff43bb0fe5e8a9bf05a99c5b957fb
Author: Keith Smiley <keithbsmiley at gmail.com>
Date: 2026-04-06 (Mon, 06 Apr 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
M utils/bazel/llvm-project-overlay/third-party/unittest/BUILD.bazel
Log Message:
-----------
[bazel] Fix TestingSupport layering_check (#190630)
I'm not sure if this header is public API upstream but we are using it
that way anyways.
Commit: 412d6941e356f8fa01c8d5fca396881290e16436
https://github.com/llvm/llvm-project/commit/412d6941e356f8fa01c8d5fca396881290e16436
Author: Henry Jiang <henry_jiang2 at apple.com>
Date: 2026-04-06 (Mon, 06 Apr 2026)
Changed paths:
M clang/lib/CrossTU/CrossTranslationUnit.cpp
M clang/lib/Tooling/JSONCompilationDatabase.cpp
A clang/test/VFS/Inputs/invalid-key.yaml
A clang/test/VFS/Inputs/invalid-top-level-key.yaml
M clang/test/VFS/parse-errors.c
M llvm/lib/Remarks/YAMLRemarkParser.cpp
M llvm/lib/Support/VirtualFileSystem.cpp
M llvm/lib/Support/YAMLTraits.cpp
M llvm/lib/Transforms/Utils/SymbolRewriter.cpp
M llvm/tools/sancov/sancov.cpp
Log Message:
-----------
[VFS] Guard against null key/value nodes when parsing YAML overlay (#190506)
When a VFS overlay YAML file contains malformed content such as tabs,
the YAML parser can produce KeyValueNode entries where `getKey` returns
nullptr. The VFS overlay parser then passes the nullptr to
`parseScalarString`, which then calls dyn_cast.
Switch to `dyn_cast_if_present` for the above callsites and a few more.
Commit: fecf609998340a5a2c27346468beba67e58afcc2
https://github.com/llvm/llvm-project/commit/fecf609998340a5a2c27346468beba67e58afcc2
Author: Daniel Thornburgh <dthorn at google.com>
Date: 2026-04-06 (Mon, 06 Apr 2026)
Changed paths:
M clang/lib/CodeGen/BackendUtil.cpp
M lld/COFF/InputFiles.cpp
M lld/COFF/LTO.cpp
M lld/COFF/LTO.h
M lld/COFF/SymbolTable.cpp
M lld/ELF/Driver.cpp
M lld/ELF/LTO.cpp
M lld/ELF/LTO.h
A lld/test/COFF/lto-libcall-archive-bitcode.test
A lld/test/ELF/lto/libcall-archive-bitcode.test
A lld/test/wasm/lto/libcall-archive-bitcode.ll
M lld/wasm/LTO.cpp
M lld/wasm/LTO.h
M lld/wasm/SymbolTable.cpp
M llvm/docs/ReleaseNotes.md
M llvm/include/llvm/LTO/LTO.h
M llvm/include/llvm/LTO/LTOBackend.h
M llvm/lib/LTO/LTO.cpp
M llvm/lib/LTO/LTOBackend.cpp
M llvm/lib/LTO/LTOCodeGenerator.cpp
M llvm/lib/LTO/ThinLTOCodeGenerator.cpp
A llvm/test/LTO/Resolution/X86/libcall-external.ll
A llvm/test/LTO/Resolution/X86/libcall-in-thin-link.ll
A llvm/test/LTO/Resolution/X86/libcall-in-tu.ll
M llvm/tools/llvm-lto2/llvm-lto2.cpp
Log Message:
-----------
Reland "[LTO][LLD] Prevent invalid LTO libfunc transforms (#164916)" (#190642)
This reverts commit 1ec7e86b3a779df2a0af3f37e58c8f5b3a398d7f after issue
#190072 was fixed.
Commit: a2c9146da14919c187e2c11becbbf2933621d9b6
https://github.com/llvm/llvm-project/commit/a2c9146da14919c187e2c11becbbf2933621d9b6
Author: Nerixyz <nerixdev at outlook.de>
Date: 2026-04-06 (Mon, 06 Apr 2026)
Changed paths:
M lldb/source/Plugins/SymbolFile/NativePDB/DWARFLocationExpression.cpp
M lldb/source/Plugins/SymbolFile/NativePDB/DWARFLocationExpression.h
M lldb/source/Plugins/SymbolFile/NativePDB/PdbUtil.cpp
A lldb/test/Shell/SymbolFile/NativePDB/structured-bindings-clang.test
M lldb/test/Shell/SymbolFile/NativePDB/structured-bindings-msvc.test
Log Message:
-----------
[lldb][NativePDB] Handle `S_DEFRANGE_REGISTER_REL_INDIR` (#190336)
Since #189401, LLVM and Clang generate `S_DEFRANGE_REGISTER_REL_INDIR`
for indirect locations. This adds support in LLDB.
The offset added after dereferencing is signed here - unlike in
`S_REGREL32_INDIR` (at least that's the assumption). So I updated
`MakeRegisterBasedIndirectLocationExpressionInternal` to handle the
signedness. This is the reason the MSVC test was changed here.
I didn't find a test case where LLVM emits the record with the `VFRAME`
register. Other than that, the clang test is similar to the MSVC one
except that the locations are slightly different.
Commit: 5e1162eebc2b943a0e5730bd91f7cbfe4bde58eb
https://github.com/llvm/llvm-project/commit/5e1162eebc2b943a0e5730bd91f7cbfe4bde58eb
Author: Lucas Ramirez <11032120+lucas-rami at users.noreply.github.com>
Date: 2026-04-06 (Mon, 06 Apr 2026)
Changed paths:
M llvm/include/llvm/CodeGen/Rematerializer.h
M llvm/lib/CodeGen/Rematerializer.cpp
M llvm/unittests/CodeGen/RematerializerTest.cpp
Log Message:
-----------
[CodeGen] Move rollback capabilities outside of the rematerializer (#184341)
The rematerializer implements support for rolling back
rematerializations by modifying MIs that should normally be deleted in
an attempt to make them "transparent" to other analyses. This involves:
1. setting their opcode to DBG_VALUE and
2. setting their read register operands to the sentinel register.
This approach has several drawbacks.
1. It forces the rematerializer to support tracking these "dead MIs"
(even if support is optional, these data-structures have to exist).
2. It is not actually clear whether this mechanism will interact well
with all other analyses. This is an issue since the intent of the
rematerializer is to be usable in as many contexts as possible.
3. In practice, it has shown itself to be relatively error-prone.
This commit removes rollback support from the rematerializer and moves
those capabilities to a rematerializer listener than can be instantiated
on-demand and implements the same functionality on top of standard
rematerializer operations. The rematerializer now actually deletes MIs
that are no longer useful after rematerializations, and has support for
re-creating them on-demand without requiring additional tracking on its
part.
Commit: 326593b4b47cab59d64acbd456e88abfb77a0f4c
https://github.com/llvm/llvm-project/commit/326593b4b47cab59d64acbd456e88abfb77a0f4c
Author: Aadarsh Keshri <120744385+Aadarsh-Keshri at users.noreply.github.com>
Date: 2026-04-06 (Mon, 06 Apr 2026)
Changed paths:
M clang/include/clang/Serialization/ModuleCache.h
M clang/lib/DependencyScanning/DependencyScannerImpl.cpp
M clang/lib/DependencyScanning/InProcessModuleCache.cpp
M clang/lib/Frontend/CompilerInstance.cpp
M clang/lib/Serialization/ModuleCache.cpp
M llvm/lib/Support/LockFileManager.cpp
M llvm/unittests/Support/LockFileManagerTest.cpp
Log Message:
-----------
[Support][Modules] Removed prepareForGetLock and its usages. Ensured parent directory exists when creating lock file. (#189888)
Following #187372
Commit: 40d5a7d69e957750a2d45ae9dd68f486b5306f77
https://github.com/llvm/llvm-project/commit/40d5a7d69e957750a2d45ae9dd68f486b5306f77
Author: Chinmay Deshpande <chdeshpa at amd.com>
Date: 2026-04-06 (Mon, 06 Apr 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUSearchableTables.td
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/intrinsics.ll
M llvm/test/CodeGen/AMDGPU/fix-wwm-vgpr-copy.ll
Log Message:
-----------
[AMDGPU][UniformityAnalysis] Mark set_inactive and set_inactive_chain_arg as SourceOfDivergence (#190640)
`set_inactive` produces a result that varies per-lane based on the EXEC mask, even when both inputs are uniform.
Commit: 2aa4100fa710ed83c5acd7505c27b4498f727c8e
https://github.com/llvm/llvm-project/commit/2aa4100fa710ed83c5acd7505c27b4498f727c8e
Author: Brian Cain <brian.cain at oss.qualcomm.com>
Date: 2026-04-06 (Mon, 06 Apr 2026)
Changed paths:
M compiler-rt/cmake/Modules/AllSupportedArchDefs.cmake
Log Message:
-----------
[compiler-rt] Add hexagon to libFuzzer supported architectures (#190297)
LibFuzzer builds successfully for Hexagon Linux.
Commit: 950f1de70bbfff9d4581c3102d2107ca6a4512a7
https://github.com/llvm/llvm-project/commit/950f1de70bbfff9d4581c3102d2107ca6a4512a7
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2026-04-06 (Mon, 06 Apr 2026)
Changed paths:
M lldb/include/lldb/Utility/UUID.h
Log Message:
-----------
[lldb] Fix UUID thombstone Key (#190551)
This changes `DenseMapInfo<UUID>::getTombstoneKey()` to return a 1-byte
`{0xFF}` sentinel instead of the empty, default constructed UUID().
Returning the same key for the empty and tombstone value apparently
violates the `DenseMap` invariant.
Commit: 40d394916264903073bccdf0b208f9565cad3ef8
https://github.com/llvm/llvm-project/commit/40d394916264903073bccdf0b208f9565cad3ef8
Author: Steven Wu <stevenwu at apple.com>
Date: 2026-04-06 (Mon, 06 Apr 2026)
Changed paths:
A llvm/tools/llvm-cas-fuzzer/CMakeLists.txt
A llvm/tools/llvm-cas-fuzzer/DummyCASFuzzer.cpp
A llvm/tools/llvm-cas-fuzzer/cas-fuzzer.cpp
Log Message:
-----------
[CAS] Add llvm-cas-fuzzer for ObjectStore::validate() (#190635)
Add a fuzzer that creates an on-disk CAS database, stores objects, then
corrupts the on-disk data files using fuzzer-provided bytes and calls
validate(). The goal is that validate() should either succeed or return
an error, never crash.
The fuzzer supports 6 corruption modes: byte-level mutations, file
truncation, appending garbage, zeroing ranges, standalone file
corruption, and combined mutations with continued CAS operations.
Assisted-By: Claude
Commit: 70d3dcaa6441e6bee4a6982fe900ecaf2f643788
https://github.com/llvm/llvm-project/commit/70d3dcaa6441e6bee4a6982fe900ecaf2f643788
Author: Arthur Eubanks <aeubanks at google.com>
Date: 2026-04-06 (Mon, 06 Apr 2026)
Changed paths:
M llvm/docs/LangRef.rst
M llvm/include/llvm/Analysis/InlineOrder.h
M llvm/include/llvm/IR/FixedMetadataKinds.def
M llvm/include/llvm/Transforms/Utils/Cloning.h
M llvm/lib/Analysis/InlineOrder.cpp
M llvm/lib/IR/Verifier.cpp
M llvm/lib/Transforms/IPO/AlwaysInliner.cpp
M llvm/lib/Transforms/IPO/Inliner.cpp
M llvm/lib/Transforms/IPO/ModuleInliner.cpp
M llvm/lib/Transforms/IPO/PartialInlining.cpp
M llvm/lib/Transforms/Utils/CloneFunction.cpp
M llvm/lib/Transforms/Utils/InlineFunction.cpp
M llvm/test/Transforms/Inline/debug-invoke.ll
R llvm/test/Transforms/Inline/inline-history-2.ll
A llvm/test/Transforms/Inline/inline-history-noinline.ll
R llvm/test/Transforms/Inline/inline-history.ll
M llvm/test/Transforms/Inline/inline-recursive-fn2.ll
R llvm/test/Verifier/inline-history-metadata.ll
M llvm/unittests/Analysis/InlineOrderPlugin/InlineOrderPlugin.cpp
Log Message:
-----------
Revert "[Inliner] Put inline history into IR as !inline_history metadata" (#190666)
Reverts llvm/llvm-project#190092
Crashes reported in
https://github.com/llvm/llvm-project/pull/190092#issuecomment-4194546908
Commit: 1a0ca1019d214a24b55a45704dc71fa183672362
https://github.com/llvm/llvm-project/commit/1a0ca1019d214a24b55a45704dc71fa183672362
Author: Steven Wu <stevenwu at apple.com>
Date: 2026-04-06 (Mon, 06 Apr 2026)
Changed paths:
M llvm/include/llvm/CAS/MappedFileRegionArena.h
M llvm/lib/CAS/DatabaseFile.cpp
M llvm/lib/CAS/MappedFileRegionArena.cpp
M llvm/lib/CAS/OnDiskGraphDB.cpp
M llvm/lib/CAS/OnDiskTrieRawHashMap.cpp
Log Message:
-----------
[CAS] Harden validate() against on-disk corruption (#190634)
Fixes found by fuzzer:
OnDiskTrieRawHashMap:
- Bounds-check data slot offsets in TrieVerifier::visitSlot() before
calling getRecord(), preventing asData() assertion on out-of-bounds
trie entries.
- Validate subtrie headers (NumBits, bounds) before constructing
SubtrieHandle, preventing SEGV in getSlots() from corrupt NumBits.
- Validate arena bump pointer alignment, catching misaligned BumpPtr
that would crash store() with an alignment assertion.
- Fix comma operator bug in getOrCreateRoot() where the
compare_exchange_strong result was discarded, causing asSubtrie()
assertion when RootTrieOffset was corrupted to zero.
OnDiskGraphDB:
- Reject invalid (zero) ref offsets in validate callback, preventing
asData() assertion when corrupt data pool refs are resolved via
recoverFromFileOffset().
- Validate DataRecordHandle layout flags before calling getTotalSize(),
preventing llvm_unreachable on corrupt NumRefsFlags/DataSizeFlags.
- Validate data pool bump pointer alignment, catching misaligned
BumpPtr that would crash store() in DataRecordHandle::constructImpl().
- Check data record refs offset alignment before calling getRefs(),
preventing PointerUnion assertion from misaligned refs pointer.
MappedFileRegionArena:
- Convert assertions in initializeHeader() to errors so corrupted
arena headers return an error on CAS open instead of crashing.
Assisted-By: Claude
Commit: fbe6d794650a3c9d586c020fcf2b4fba3faa2dad
https://github.com/llvm/llvm-project/commit/fbe6d794650a3c9d586c020fcf2b4fba3faa2dad
Author: Congzhe <congzhe.cao at huawei.com>
Date: 2026-04-06 (Mon, 06 Apr 2026)
Changed paths:
M llvm/include/llvm/Transforms/Utils/CodeMoverUtils.h
M llvm/lib/Transforms/Scalar/LoopFuse.cpp
M llvm/lib/Transforms/Utils/CodeMoverUtils.cpp
Log Message:
-----------
[LoopFusion] Fix out-of-date LoopInfo being used during fusion (#189452)
This is fix for
[187902](https://github.com/llvm/llvm-project/issues/187902), where
`LoopInfo` is not in a valid state at the beginning of `ScalarEvolution::createSCEVIter`.
The reason for the bug is that, `mergeLatch()` is called at a place
where control flow and dominator trees have been updated but `LoopInfo`
has not completed the update yet. `mergeLatch()` calls into
`ScalarEvolution` that uses `LoopInfo`, where out-of-date `LoopInfo` would
result in crash or unpredictable results.
This patch moves `mergeLatch()` to the place where `LoopInfo` has
completed its update and hence is in a valid state.
Commit: 92b595b9b4ca71aad9e7cc7d32e4b90a9b051a5b
https://github.com/llvm/llvm-project/commit/92b595b9b4ca71aad9e7cc7d32e4b90a9b051a5b
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2026-04-06 (Mon, 06 Apr 2026)
Changed paths:
M flang/lib/Semantics/check-cuda.cpp
M flang/test/Semantics/cuf25.cuf
Log Message:
-----------
[flang][cuda] Take associate into account for host array diagnostic (#190673)
Commit: 89665812f54feeab985c0c8b72cf3063128e65b2
https://github.com/llvm/llvm-project/commit/89665812f54feeab985c0c8b72cf3063128e65b2
Author: Alexis Engelke <engelke at in.tum.de>
Date: 2026-04-06 (Mon, 06 Apr 2026)
Changed paths:
M llvm/include/llvm/Analysis/BlockFrequencyInfoImpl.h
Log Message:
-----------
[Analysis][NFC] Use block numbers in BlockFrequencyInfo (#190669)
Block pointers are only stored while constructing the analysis, so the
value handle to catch erased blocks is no longer needed when using
stable block numbers.
Commit: 9033e872fd779e682320fe1ad923ea25e7c636f9
https://github.com/llvm/llvm-project/commit/9033e872fd779e682320fe1ad923ea25e7c636f9
Author: Chinmay Deshpande <chdeshpa at amd.com>
Date: 2026-04-06 (Mon, 06 Apr 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.update.dpp.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.update.dpp.mir
Log Message:
-----------
[AMDGPU][GISel] RegBankLegalize rules for update_dpp (#190662)
Commit: d91702733445ea8bc6d6a8f2f50dd6b65e52d106
https://github.com/llvm/llvm-project/commit/d91702733445ea8bc6d6a8f2f50dd6b65e52d106
Author: Zile Xiong <xiongzile at bytedance.com>
Date: 2026-04-06 (Mon, 06 Apr 2026)
Changed paths:
M llvm/lib/ProfileData/Coverage/CoverageMapping.cpp
A llvm/test/tools/llvm-cov/Inputs/main-view-fileid-regression.covmapping
A llvm/test/tools/llvm-cov/Inputs/main-view-fileid-regression.proftext
A llvm/test/tools/llvm-cov/main-view-fileid-regression.test
Log Message:
-----------
[llvm-cov] Guard against empty CountedRegions in findMainViewFileID (#189270)
When processing coverage generated from branch coverage mode, some
functions can reach findMainViewFileID with an empty CountedRegions
list. In that case the current logic still proceeds to infer the main
view file, even though there is no regular counted region available to
do so.
Return std::nullopt early when CountedRegions is empty.
This was observed when reproducing issue #189169 with:
cargo llvm-cov --lib --branch
The issue appears related to branch-only coverage information being
recorded separately in CountedBranchRegions, while
findMainViewFileID currently only consults CountedRegions.
This patch is a defensive fix for the empty-region case; further
investigation may still be needed to determine whether branch regions
should participate in main view file selection.
Co-authored-by: Zile Xiong <xiongzile99 at gmail.com>
Commit: ee51de9836894f829a0811307901434ee592c9be
https://github.com/llvm/llvm-project/commit/ee51de9836894f829a0811307901434ee592c9be
Author: Andrew <dota2drot at gmail.com>
Date: 2026-04-06 (Mon, 06 Apr 2026)
Changed paths:
M llvm/include/llvm/ProfileData/Coverage/CoverageMapping.h
M llvm/lib/ProfileData/Coverage/CoverageMapping.cpp
M llvm/test/tools/llvm-cov/mcdc-const.test
M llvm/test/tools/llvm-cov/mcdc-export-json.test
M llvm/test/tools/llvm-cov/mcdc-general-none.test
M llvm/test/tools/llvm-cov/mcdc-general.test
M llvm/test/tools/llvm-cov/mcdc-macro.test
M llvm/tools/llvm-cov/CodeCoverage.cpp
M llvm/tools/llvm-cov/CoverageExporterJson.cpp
M llvm/tools/llvm-cov/CoverageViewOptions.h
M llvm/tools/llvm-cov/SourceCoverageViewHTML.cpp
M llvm/tools/llvm-cov/SourceCoverageViewText.cpp
Log Message:
-----------
[llvm-cov] add ability to show non executed test vectors for mc/dc coverage (#187517)
- Added `-show-mcdc-non-executed-vectors` option
- Non-executed test vectors now are tracked
- When the opt is present it's get written to UI
Commit: 97d50c149070d104e301159b825657af60613fa4
https://github.com/llvm/llvm-project/commit/97d50c149070d104e301159b825657af60613fa4
Author: Anshul Nigham <nigham at google.com>
Date: 2026-04-06 (Mon, 06 Apr 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64.h
M llvm/lib/Target/AArch64/AArch64PassRegistry.def
M llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
M llvm/lib/Target/AArch64/GISel/AArch64PreLegalizerCombiner.cpp
M llvm/test/CodeGen/AArch64/GlobalISel/combine-2-icmps-of-0-and-or.mir
Log Message:
-----------
[NewPM] Adds a port for AArch64PreLegalizerCombiner (#190567)
Standard porting (note that TargetPassConfig dependency was [removed
earlier](https://github.com/llvm/llvm-project/commit/e27e7e433974b24c90fed9f0b646bed84e47681e)).
---------
Co-authored-by: Matt Arsenault <arsenm2 at gmail.com>
Commit: 9bddf47198582459f954e10fd4920f2afac10e15
https://github.com/llvm/llvm-project/commit/9bddf47198582459f954e10fd4920f2afac10e15
Author: Jianhui Li <jian.hui.li at intel.com>
Date: 2026-04-06 (Mon, 06 Apr 2026)
Changed paths:
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUWgToSgDistribute.cpp
M mlir/test/Dialect/XeGPU/xegpu-wg-to-sg-unify-ops-rr.mlir
M mlir/test/Dialect/XeGPU/xegpu-wg-to-sg-unify-ops.mlir
Log Message:
-----------
[MLIR][XeGPU] Extend Wg-to-Sg Distribution of Multi-Reduction Op for round-robin layout (#189988)
This PR enhance the multi-reduction op pattern of wg-to-sg distribution
pass:
1. allows each sg have multiple distribution of sg_data tiles.
2. expand the slm buffer size.
3. construct the layout based on the partial reduced vector and use
layout.computeDistributedCoords() to compute coordinates. the layout is
constructed so that the store is cooperative, and load overlapps with
neighbour threads.
4. perform save and load.
Commit: af95b0a615260a2868e5581d5fa18b9379b1c8ff
https://github.com/llvm/llvm-project/commit/af95b0a615260a2868e5581d5fa18b9379b1c8ff
Author: Joe Nash <joseph.nash at amd.com>
Date: 2026-04-06 (Mon, 06 Apr 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/andn2.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomicrmw_minmax.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomicrmw_udec_wrap.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomicrmw_uinc_wrap.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/call-outgoing-stack-args.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-short-clamp.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/cvt_f32_ubyte.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/extractelement.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/flat-scratch.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/frem.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.i16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.i8.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.rsq.clamp.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.set.inactive.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/lshr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/mubuf-global.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/mul-known-bits.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/orn2.ll
M llvm/test/CodeGen/AMDGPU/abi-attribute-hints-undefined-behavior.ll
M llvm/test/CodeGen/AMDGPU/agpr-copy-no-free-registers.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_global_pointer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_local_pointer.ll
M llvm/test/CodeGen/AMDGPU/av_movimm_pseudo_expansion.mir
M llvm/test/CodeGen/AMDGPU/calling-conventions.ll
M llvm/test/CodeGen/AMDGPU/chain-hi-to-lo.ll
M llvm/test/CodeGen/AMDGPU/combine_andor_with_cmps.ll
M llvm/test/CodeGen/AMDGPU/dag-divergence-atomic.ll
M llvm/test/CodeGen/AMDGPU/div_i128.ll
M llvm/test/CodeGen/AMDGPU/ds-sub-offset.ll
M llvm/test/CodeGen/AMDGPU/expand-scalar-carry-out-select-user.ll
M llvm/test/CodeGen/AMDGPU/extract_vector_elt-i8.ll
M llvm/test/CodeGen/AMDGPU/fcanonicalize.ll
M llvm/test/CodeGen/AMDGPU/fp-atomics-gfx1200.ll
M llvm/test/CodeGen/AMDGPU/fp64-atomics-gfx90a.ll
M llvm/test/CodeGen/AMDGPU/fptoi.i128.ll
M llvm/test/CodeGen/AMDGPU/fptosi-sat-scalar.ll
M llvm/test/CodeGen/AMDGPU/fptosi-sat-vector.ll
M llvm/test/CodeGen/AMDGPU/fptoui-sat-scalar.ll
M llvm/test/CodeGen/AMDGPU/fptoui-sat-vector.ll
M llvm/test/CodeGen/AMDGPU/gfx-callable-argument-types.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fmax.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fmin.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fsub.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fadd.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fmax.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fmin.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fsub.ll
M llvm/test/CodeGen/AMDGPU/inflate-av-remat-imm.mir
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.atomic.dec.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.atomic.inc.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.atomic.pk.add.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.init.whole.wave-w64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.quadmask.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.readlane.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.umax.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.set.inactive.chain.arg.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.set.inactive.ll
M llvm/test/CodeGen/AMDGPU/llvm.exp.f64.ll
M llvm/test/CodeGen/AMDGPU/llvm.exp10.f64.ll
M llvm/test/CodeGen/AMDGPU/llvm.exp2.f64.ll
M llvm/test/CodeGen/AMDGPU/llvm.set.rounding.ll
M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fmax.ll
M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fmin.ll
M llvm/test/CodeGen/AMDGPU/lrint.ll
M llvm/test/CodeGen/AMDGPU/lround.ll
M llvm/test/CodeGen/AMDGPU/mad_64_32.ll
M llvm/test/CodeGen/AMDGPU/memset-pattern.ll
M llvm/test/CodeGen/AMDGPU/misaligned-vgpr-regsequence.mir
M llvm/test/CodeGen/AMDGPU/move-to-valu-lshl_add.ll
M llvm/test/CodeGen/AMDGPU/offset-split-global.ll
M llvm/test/CodeGen/AMDGPU/packed-fp32.ll
M llvm/test/CodeGen/AMDGPU/promote-constOffset-to-imm.ll
M llvm/test/CodeGen/AMDGPU/reassoc-mul-add-1-to-mad.ll
M llvm/test/CodeGen/AMDGPU/rem_i128.ll
M llvm/test/CodeGen/AMDGPU/roundeven.ll
M llvm/test/CodeGen/AMDGPU/rsq.f64.ll
M llvm/test/CodeGen/AMDGPU/sdiv64.ll
M llvm/test/CodeGen/AMDGPU/shift-i128.ll
M llvm/test/CodeGen/AMDGPU/siloadstoreopt-misaligned-regsequence.ll
M llvm/test/CodeGen/AMDGPU/srem64.ll
M llvm/test/CodeGen/AMDGPU/swdev380865.ll
M llvm/test/CodeGen/AMDGPU/tuple-allocation-failure.ll
M llvm/test/CodeGen/AMDGPU/udiv.ll
M llvm/test/CodeGen/AMDGPU/udiv64.ll
M llvm/test/CodeGen/AMDGPU/urem64.ll
M llvm/test/CodeGen/AMDGPU/v_mov_b64_expand_and_shrink.mir
M llvm/test/CodeGen/AMDGPU/v_mov_b64_expansion.mir
M llvm/test/CodeGen/AMDGPU/vgpr-mark-last-scratch-load.ll
M llvm/test/CodeGen/AMDGPU/wave32.ll
M llvm/test/CodeGen/AMDGPU/widen-smrd-loads.ll
M llvm/test/CodeGen/AMDGPU/wwm-reserved-spill.ll
M llvm/test/CodeGen/AMDGPU/wwm-reserved.ll
Log Message:
-----------
[AMDGPU] Remove implicit super-reg defs on mov64 pseudos (#190379)
The mov64 pseudo is split into two 32 bit movs, but those 32 bit movs
had the full 64-bit register still implicitly defined. VOPD formation is
affected, so we can emit more of them.
Commit: 7087ece044f1313206ce5d5e5115862fe29143c1
https://github.com/llvm/llvm-project/commit/7087ece044f1313206ce5d5e5115862fe29143c1
Author: Jared Hoberock <jaredhoberock at gmail.com>
Date: 2026-04-06 (Mon, 06 Apr 2026)
Changed paths:
M mlir/lib/ExecutionEngine/CudaRuntimeWrappers.cpp
M mlir/test/Integration/GPU/CUDA/async.mlir
Log Message:
-----------
[MLIR][ExecutionEngine] Tolerate CUDA_ERROR_DEINITIALIZED in mgpuModuleUnload (#190563)
`mgpuModuleUnload` may be called from a global destructor (registered by
`SelectObjectAttr`'s `appendToGlobalDtors`) after the CUDA primary
context has already been destroyed during program shutdown. In this
case, `cuModuleUnload` returns `CUDA_ERROR_DEINITIALIZED`, which is
benign since the module's resources are already freed with the context.
## Reproduction
Any program that uses `gpu.launch_func` and is AOT-compiled (via
`mlir-translate --mlir-to-llvmir | llc | cc -lmlir_cuda_runtime`) will
print `'cuModuleUnload(module)' failed with '<unknown>'` on exit. This
is because `SelectObjectAttr` registers the module unload as a global
destructor, which runs after the CUDA primary context is released.
This script reproduces the error message from `mgpuModuleUnload` on my
system:
```
#!/bin/bash
set -e
LLVM_BUILD=${LLVM_BUILD:-$HOME/dev/git/llvm-project-22/build}
cat > /tmp/repro.mlir << 'MLIR'
func.func @main() {
%c1 = arith.constant 1 : index
gpu.launch blocks(%bx, %by, %bz) in (%gx = %c1, %gy = %c1, %gz = %c1)
threads(%tx, %ty, %tz) in (%bsx = %c1, %bsy = %c1, %bsz = %c1) {
gpu.terminator
}
return
}
MLIR
$LLVM_BUILD/bin/mlir-opt /tmp/repro.mlir \
-gpu-lower-to-nvvm-pipeline="cubin-format=fatbin" \
| $LLVM_BUILD/bin/mlir-translate --mlir-to-llvmir -o /tmp/repro.ll
$LLVM_BUILD/bin/llc -relocation-model=pic -filetype=obj /tmp/repro.ll -o /tmp/repro.o
cc /tmp/repro.o \
-L$LLVM_BUILD/lib -Wl,-rpath,$LLVM_BUILD/lib \
-lmlir_cuda_runtime -lmlir_runner_utils -o /tmp/repro
echo "Running:"
/tmp/repro 2>&1
echo "Exit code: $?"
```
## Context
This matches how other projects handle the same shutdown ordering issue:
- Clang CUDA (D48613) switched module cleanup from
`__attribute__((destructor))` to `atexit()`
- GCC libgomp checks context validity before `cuModuleUnload`
- Apache TVM silently ignores `CUDA_ERROR_DEINITIALIZED` on module
unload
Fixes #170833
Commit: ef715849d7962eebfe591f54faeeaf4ffd703954
https://github.com/llvm/llvm-project/commit/ef715849d7962eebfe591f54faeeaf4ffd703954
Author: Shilei Tian <i at tianshilei.me>
Date: 2026-04-06 (Mon, 06 Apr 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIMemoryLegalizer.cpp
Log Message:
-----------
[NFC][AMDGPU] Add some debug prints to SIMemoryLegalizer (#190658)
Commit: 62ce560f68b0a1149d73e56d5d0927d5546b6e20
https://github.com/llvm/llvm-project/commit/62ce560f68b0a1149d73e56d5d0927d5546b6e20
Author: Sergei Barannikov <barannikov88 at gmail.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M lldb/source/Plugins/Disassembler/LLVMC/DisassemblerLLVMC.cpp
Log Message:
-----------
[lldb] Remove some unreachable code (NFC) (#190529)
`isRISCV()` check always returns false because we only get here if
`min_op_byte_size` and `max_op_byte_size` are equal, which is not true
for RISC-V.
Also, replase `if (!got_op)` check with an `else`. The check is
equivalent to
`if (min_op_byte_size != max_op_byte_size)`, and the `if` above checks
for the opposite condition.
Commit: 8a11fe97a299b8b384195d52f317e198bb3a27d4
https://github.com/llvm/llvm-project/commit/8a11fe97a299b8b384195d52f317e198bb3a27d4
Author: Ehsan Amiri <ehsan.amiri at huawei.com>
Date: 2026-04-06 (Mon, 06 Apr 2026)
Changed paths:
M llvm/lib/Analysis/DependenceAnalysis.cpp
M llvm/test/Analysis/DependenceAnalysis/Banerjee.ll
M llvm/test/Analysis/DependenceAnalysis/Propagating.ll
M llvm/test/Analysis/DependenceAnalysis/exact-rdiv-addrec-wrap.ll
Log Message:
-----------
[DA] Require `nsw` for AddRecs involved in GCD test (#186892)
Similar to other tests, we are adding code that the AddRecs used in GCD
test are `nsw`. In this case, all recursively identified `AddRec`s are
also checked. Note that there is already a similar check in
`getConstantCoefficient` for expressions processed in that function.
Commit: 79e669f000c1b8539b4ae1e7be35e74a41144698
https://github.com/llvm/llvm-project/commit/79e669f000c1b8539b4ae1e7be35e74a41144698
Author: Steven Wu <stevenwu at apple.com>
Date: 2026-04-06 (Mon, 06 Apr 2026)
Changed paths:
M llvm/lib/CAS/DatabaseFile.cpp
Log Message:
-----------
[CAS] Revert an unintentional change in #190634 (#190686)
Revert an unintentional change in #190634 that did an unintentional
implicit signed to unsigned cast.
Commit: a8cf1a0352a080b62c3eee1d3aac213bf9d6b416
https://github.com/llvm/llvm-project/commit/a8cf1a0352a080b62c3eee1d3aac213bf9d6b416
Author: Amir Ayupov <aaupov at fb.com>
Date: 2026-04-06 (Mon, 06 Apr 2026)
Changed paths:
M bolt/lib/Profile/DataReader.cpp
A bolt/test/X86/Inputs/pre-aggregated-buildid-empty.txt
M bolt/test/X86/pre-aggregated-perf-buildid.test
Log Message:
-----------
[BOLT] Allow empty buildid in pre-aggregated profile addresses (#190675)
Allow `parseString()` to return an empty `StringRef` when the delimiter
appears at position 0. This enables parsing pre-aggregated profile
addresses with an omitted buildid but preserved colon (`:addr` format),
where the empty buildid corresponds to the main binary.
Previously, `parseString()` rejected zero-length fields by treating
`StringEnd == 0` the same as `StringRef::npos` (delimiter not found).
These are distinct situations: `npos` means no delimiter exists, while
`0` means the field before the delimiter is empty. The fix removes the
`StringEnd == 0` sub-condition so only the missing-delimiter case
errors.
The existing test for buildid-prefixed addresses is extended to also
verify that `:addr` input produces identical output to the plain-address
and non-empty-buildid variants.
Test Plan:
Added empty-buildid input file and extended
`pre-aggregated-perf-buildid.test` to run perf2bolt with `:addr` format
and diff the fdata output against the existing buildid-prefixed result.
Commit: df461c164ccf48854aa3e3898399f355d3fe210a
https://github.com/llvm/llvm-project/commit/df461c164ccf48854aa3e3898399f355d3fe210a
Author: Yeongu Choe <yeongu.choe at icloud.com>
Date: 2026-04-06 (Mon, 06 Apr 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenBuiltin.cpp
A clang/test/CIR/CodeGenBuiltins/builtin-fpclassify.c
Log Message:
-----------
[CIR][CodeGen] Implement __builtin_fpclassify (#187977)
I implemented CIR version of __builtin_fpclassify function.
Commit: e8566f83d2541734ad9b66c474e7f500ce98a280
https://github.com/llvm/llvm-project/commit/e8566f83d2541734ad9b66c474e7f500ce98a280
Author: Piyush Jaiswal <piyushjais98 at gmail.com>
Date: 2026-04-06 (Mon, 06 Apr 2026)
Changed paths:
M lldb/bindings/interface/SBModuleSpecListExtensions.i
M lldb/test/API/python_api/sbmodule/TestSBModule.py
Log Message:
-----------
[lldb][python] Add polymorphic `__getitem__` to `SBModuleSpecList` for Pythonic indexing (#189125)
### Summary
`SBModuleSpecList` already supports `len()` and iteration via `__len__`
and `__iter__`, but is not subscriptable — `specs[0]` raises
`TypeError`.
This adds a `__getitem__` method that supports integer indexing (with
negative index support) and string lookup using `endswith()` matching,
which works for both Unix and Windows paths.
### Supported key types
| Key type | Example | Behavior |
|---|---|---|
| `int` | `specs[0]`, `specs[-1]` | Direct index with negative index
support |
| `str` | `specs['a.out']`, `specs['/usr/lib/liba.dylib']` | Lookup by
basename or partial/full path via `endswith()`. Returns first match or
`None` |
### Error handling
- **`IndexError`** for out-of-bounds integer indices
- **`TypeError`** for unsupported key types (e.g., `float`)
- **`None`** for string lookups with no match
### Before
```python
>>> specs = lldb.SBModuleSpecList.GetModuleSpecifications('/bin/ls')
>>> specs[0]
Traceback (most recent call last):
File "<console>", line 1, in <module>
TypeError: 'SBModuleSpecList' object is not subscriptable
```
### After
```python
>>> import lldb, re
>>> specs = lldb.SBModuleSpecList.GetModuleSpecifications('/bin/ls')
>>> specs[0]
file = '/bin/ls', arch = x86_64-*-linux, uuid = 3CCC0D8A-..., object size = 140928
>>> specs[-1]
file = '/bin/ls', arch = x86_64-*-linux, uuid = 3CCC0D8A-..., object size = 140928
>>> specs['ls']
file = '/bin/ls', arch = x86_64-*-linux, uuid = 3CCC0D8A-..., object size = 140928
>>> specs[999]
IndexError: list index out of range
>>> specs[1.5]
TypeError: unsupported index type: <class 'float'>
```
### Test plan
Added test_module_spec_list_indexing to TestSBModule.py covering:
- Positive and negative integer indexing
- Out-of-bounds raises IndexError
- Unsupported key type raises TypeError
- String lookup by basename and full path (endswith() matching)
- Missing key returns None
```
bin/llvm-lit -sv lldb/test/API/python_api/sbmodule/TestSBModule.py
```
```
PASS: LLDB :: test_GetObjectName_dwarf (TestSBModule.SBModuleAPICase)
PASS: LLDB :: test_GetObjectName_dwo (TestSBModule.SBModuleAPICase)
PASS: LLDB :: test_module_spec_list_indexing_dwarf (TestSBModule.SBModuleAPICase)
PASS: LLDB :: test_module_spec_list_indexing_dwo (TestSBModule.SBModuleAPICase)
----------------------------------------------------------------------
Ran 12 tests in 1.854s
OK (skipped=6)
```
Co-authored-by: Piyush Jaiswal <piyushjais at meta.com>
Commit: 1ae179b3257b1087a0b0e354d5dbc7afd8ddd0e6
https://github.com/llvm/llvm-project/commit/1ae179b3257b1087a0b0e354d5dbc7afd8ddd0e6
Author: Wei Wang <apollo.mobility at gmail.com>
Date: 2026-04-06 (Mon, 06 Apr 2026)
Changed paths:
M llvm/lib/Transforms/IPO/SampleProfileMatcher.cpp
A llvm/test/Transforms/SampleProfile/Inputs/pseudo-probe-stale-profile-backward-matching.prof
A llvm/test/Transforms/SampleProfile/pseudo-probe-stale-profile-backward-matching.ll
Log Message:
-----------
[SampleProfileMatcher] Fix backward matching of non-anchor locations (#190118)
The backward matching loop in `matchNonCallsiteLocs` was ineffective
because `InsertMatching` used `std::unordered_map::insert()` which does
not overwrite existing entries. Since forward matching already inserted
entries for all non-anchor locations, the backward matching for the
second half was silently ignored.
The backward matching can update forward mappings in
`IRToProfileLocationMap` in 2 ways:
- The IR location maps a new different profile location. Change
`insert()` to `insert_or_assign()` so that entry overwrite can happen.
- The IR location maps the same profile location. Add `erase()` to
remove such mapping.
Commit: ce61fe5c48b5b74458e7208f7871e788add2d89e
https://github.com/llvm/llvm-project/commit/ce61fe5c48b5b74458e7208f7871e788add2d89e
Author: Wei Wang <apollo.mobility at gmail.com>
Date: 2026-04-06 (Mon, 06 Apr 2026)
Changed paths:
M llvm/tools/llvm-profgen/MissingFrameInferrer.cpp
M llvm/tools/llvm-profgen/PerfReader.h
M llvm/tools/llvm-profgen/ProfileGenerator.cpp
M llvm/tools/llvm-profgen/ProfileGenerator.h
M llvm/tools/llvm-profgen/llvm-profgen.cpp
Log Message:
-----------
[NFC][llvm-profgen] Fix a few minor issues (#190019)
A few NFC (mostly) fixes:
- Drop unused parameters.
- Check return error.
- Fix return type.
Commit: 8e1ea8af3898361c3320662661a6939c3d1985ed
https://github.com/llvm/llvm-project/commit/8e1ea8af3898361c3320662661a6939c3d1985ed
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-04-06 (Mon, 06 Apr 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoP.td
M llvm/test/CodeGen/RISCV/rv32p.ll
Log Message:
-----------
[RISCV][P-ext] Add isel patterns for mhacc/mhaccu/mhaccsu. (#190670)
Commit: 014d5d51e11ba6e84e16bb97a897fa568a971341
https://github.com/llvm/llvm-project/commit/014d5d51e11ba6e84e16bb97a897fa568a971341
Author: Alex Langford <alangford at apple.com>
Date: 2026-04-06 (Mon, 06 Apr 2026)
Changed paths:
M lldb/packages/Python/lldbsuite/test/make/Makefile.rules
Log Message:
-----------
[lldb] Change most tests to build with system libc++ on Darwin (#190034)
Today, on Darwin platforms, almost every test binary in our test suite
loads two copies of libc++, libc++abi, and libunwind. This is because
each of the test binaries explicitly link against a just-built libc++
(which is explicitly required on Darwin right now) but we don't take the
correct steps to replace the system libc++. Doing so is unnecessary and
potentially error-prone, so most tests should link against the system
libc++ where possible.
Background:
The lldb test suite has a collection of tests that rely on libc++
explicitly. The two biggest categories are data formatter tests (which
make sure that we can correctly display values for std types) and
import-std-module tests (which test that we can import the libc++ std
module). To make sure these tests are run, we require a just-built
libc++ to be used.
All of the test binaries link against the just-built libc++, so it gets
loaded. However, when any system library tries to load libc++, it
attempts to load the system one. dyld checks loaded libraries against
the request to load a new one using the full path, meaning anyone
linking against `/usr/lib/libc++.1.dylib` will get it no matter what
other libc++ dylib is already loaded.
The proper way to handle this is using `DYLD_LIBRARY_PATH`, which
switches dyld to checking the leaf name of a dylib instead of the full
path. In theory this works, but we run into an issue where the system
libc++ has additional symbols and many system libraries fail to load.
Louis Dionne added stubs in libc++abi for these missing symbols, meaning
it would be possible to make this scenario work. This may be useful for
the existing libc++ tests.
Commit: fe07678c1f7a558074d2651b94e7d4369aeaec31
https://github.com/llvm/llvm-project/commit/fe07678c1f7a558074d2651b94e7d4369aeaec31
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2026-04-06 (Mon, 06 Apr 2026)
Changed paths:
M .github/workflows/libcxx-build-and-test.yaml
Log Message:
-----------
[libc++] Switch CI runners to use the latest Docker image (#190363)
Commit: 228b6ae5608baea7120fc4d5d611b3fbd30ce0cb
https://github.com/llvm/llvm-project/commit/228b6ae5608baea7120fc4d5d611b3fbd30ce0cb
Author: Yeongu Choe <yeongu.choe at icloud.com>
Date: 2026-04-06 (Mon, 06 Apr 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenBuiltin.cpp
A clang/test/CIR/CodeGenBuiltins/builtin-signbit.c
Log Message:
-----------
[CIR][CodeGen] Implement __builtin_signbit (#188433)
__builtin_signbit function checks if the sign bit of a floating-point
number is set to 0 or 1.
Commit: aedd4e0850efcdf32d6b0a3ff0c9b61f89c7cfd7
https://github.com/llvm/llvm-project/commit/aedd4e0850efcdf32d6b0a3ff0c9b61f89c7cfd7
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2026-04-06 (Mon, 06 Apr 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenExprConstant.cpp
M clang/test/CIR/CodeGen/static-local.cpp
Log Message:
-----------
[CIR] Handle static local var decl constants (#190699)
This adds the handling for the case where the address of a static local
variable is used to initialize another static local. In this case, the
address of the first variable is emitted as a constant in the
initializer of the second variable.
Commit: 90ec5f2f629580d0f71ff4dfe842e2488043cbaf
https://github.com/llvm/llvm-project/commit/90ec5f2f629580d0f71ff4dfe842e2488043cbaf
Author: Jared Hoberock <jaredhoberock at gmail.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M mlir/test/Integration/GPU/CUDA/async.mlir
Log Message:
-----------
[MLIR][test] Re-disable FileCheck on async.mlir integration test (#190702)
#190563 re-enabled FileCheck on `Integration/GPU/CUDA/async.mlir`, but
the buildbot has shown intermittent wrong-output failures
([example](https://lab.llvm.org/buildbot/#/builders/116/builds/27026)):
the test produces `[42, 42]` instead of the expected `[84, 84]`.
This wrong-output flakiness is distinct from the cleanup-time
`cuModuleUnload` errors that #190563 actually fixes — it's the
underlying issue tracked by #170833. The merged commit message for
#190563 incorrectly says `Fixes #170833`; that issue should be reopened,
since the cleanup-error fix doesn't address the wrong-output behavior.
This PR puts the test back in its previously-disabled state. The runtime
cleanup fix in #190563 is unaffected.
Commit: 94875aea7eec805d54055f55fad99b57e0ad2317
https://github.com/llvm/llvm-project/commit/94875aea7eec805d54055f55fad99b57e0ad2317
Author: Lucas Ramirez <11032120+lucas-rami at users.noreply.github.com>
Date: 2026-04-06 (Mon, 06 Apr 2026)
Changed paths:
M llvm/include/llvm/CodeGen/LiveIntervals.h
M llvm/lib/CodeGen/Rematerializer.cpp
M llvm/unittests/CodeGen/RematerializerTest.cpp
Log Message:
-----------
[CodeGen] Fix multiple connected component issue in rematerializer (#186674)
This fixes a rematerializer issue wherein re-creating the interval of a
non-rematerializable super-register defined over multiple MIs, some of
which defining entirely dead sub-registers, could cause a crash when
changing the order of sub-definitions (for example during scheduling)
because the re-created interval could end up with multiple connected
components, which is illegal. The solution is to split separate
components of the interval in such cases. The added unit test crashes
without that added behavior.
Commit: 511a7aacee6523799fbfd83c9c44b41d118362aa
https://github.com/llvm/llvm-project/commit/511a7aacee6523799fbfd83c9c44b41d118362aa
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2026-04-06 (Mon, 06 Apr 2026)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIRAttrs.td
M clang/lib/CIR/Lowering/DirectToLLVM/CMakeLists.txt
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
M clang/test/CIR/Lowering/poison.cir
M clang/utils/TableGen/CIRLoweringEmitter.cpp
Log Message:
-----------
[CIR][NFC] Use tablegen to create CIRAttrToValue visitor declarations (#187607)
This change introduces TableGen support for indicating CIR attributes
that require a CIRAttrToValue visitor, adds the new flag to all
attributes to which it applies, and replaces the explicit declarations
with the tablegen output.
Commit: fa70ee45be461d5d997fc7aac4e39f48be9d21ee
https://github.com/llvm/llvm-project/commit/fa70ee45be461d5d997fc7aac4e39f48be9d21ee
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2026-04-06 (Mon, 06 Apr 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenBuiltin.cpp
M clang/test/CIR/CodeGenBuiltins/builtins-floating-point.c
Log Message:
-----------
[CIR] Implement __builtin_flt_rounds and __builtin_set_flt_rounds (#190706)
This adds CIR handling for the __builtin_flt_rounds and
__builtin_set_flt_rounds builtin functions. Because the LLVM dialect
does not have dedicated operations for these, I have chosen not to
implement them as operations in CIR either. Instead, we just call the
LLVM intrinsic.
Commit: 82505fbfc870f4a657fbaa66a7514db9f30e030a
https://github.com/llvm/llvm-project/commit/82505fbfc870f4a657fbaa66a7514db9f30e030a
Author: Arthur Eubanks <aeubanks at google.com>
Date: 2026-04-06 (Mon, 06 Apr 2026)
Changed paths:
M llvm/docs/LangRef.rst
M llvm/include/llvm/Analysis/InlineOrder.h
M llvm/include/llvm/IR/FixedMetadataKinds.def
M llvm/include/llvm/Transforms/Utils/Cloning.h
M llvm/lib/Analysis/InlineOrder.cpp
M llvm/lib/IR/Verifier.cpp
M llvm/lib/Transforms/IPO/AlwaysInliner.cpp
M llvm/lib/Transforms/IPO/Inliner.cpp
M llvm/lib/Transforms/IPO/ModuleInliner.cpp
M llvm/lib/Transforms/IPO/PartialInlining.cpp
M llvm/lib/Transforms/Utils/CloneFunction.cpp
M llvm/lib/Transforms/Utils/InlineFunction.cpp
M llvm/test/Transforms/Inline/debug-invoke.ll
A llvm/test/Transforms/Inline/inline-history-2.ll
R llvm/test/Transforms/Inline/inline-history-noinline.ll
A llvm/test/Transforms/Inline/inline-history.ll
M llvm/test/Transforms/Inline/inline-recursive-fn2.ll
A llvm/test/Verifier/inline-history-metadata.ll
M llvm/unittests/Analysis/InlineOrderPlugin/InlineOrderPlugin.cpp
Log Message:
-----------
[Inliner] Put inline history into IR as !inline_history metadata (#190700)
(Reland of #190092 with verifier change to look through GlobalAliases)
So that it's preserved across all inline invocations rather than just
one inliner pass run.
This prevents cases where devirtualization in the simplification
pipeline uncovers inlining opportunities that should be discarded due to
inline history, but we dropped the inline history between inliner pass
runs, causing code size to blow up, sometimes exponentially.
For compile time reasons, we want to limit this to only call sites that
have the potential to inline through SCCs, potentially with the help of
devirtualization. This means that the callee is in a non-trivial
(Ref)SCC, or the call site was previously an indirect call, which can
potentially be devirtualized to call any function.
The CGSCCUpdater::InlinedInternalEdges logic still seems to be relevant
even with this change, as monster_scc.ll blows up if I remove that code.
http://llvm-compile-time-tracker.com/compare.php?from=e830d88e8ae5f44a97cc76136a0a4e83aa9157c0&to=ed535e732fc41b79ab8efda2417886cbd0812f7f&stat=instructions:u
Fixes #186926.
Commit: eb35aa90f66f9752c92bbb6f9fb9916ba9db967a
https://github.com/llvm/llvm-project/commit/eb35aa90f66f9752c92bbb6f9fb9916ba9db967a
Author: Jim Lin <jim at andestech.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoZvk.td
M llvm/test/CodeGen/RISCV/rvv/vrol.ll
Log Message:
-----------
[RISCV] Use per-SEW immediate inversion for vrol intrinsic patterns (#190113)
The VPatBinaryV_VI_VROL multiclass was using InvRot64Imm for all SEW
widths when converting vrol immediate intrinsics to vror.vi. This
produced unnecessarily large immediates for narrower element types
(e.g., 61 instead of 5 for SEW=8 rotate-left by 3).
Use the appropriate InvRot{SEW}Imm transform to match what the SDNode
patterns already do.
Co-authored-by: Claude Opus 4.6 (1M context) <noreply at anthropic.com>
Commit: 75bb30ddbf3bf3b9f01cf1c46fe6d9749f377d9d
https://github.com/llvm/llvm-project/commit/75bb30ddbf3bf3b9f01cf1c46fe6d9749f377d9d
Author: Peter Collingbourne <pcc at google.com>
Date: 2026-04-06 (Mon, 06 Apr 2026)
Changed paths:
M llvm/lib/CodeGen/PreISelIntrinsicLowering.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
M llvm/lib/Transforms/InstCombine/InstCombineLoadStoreAlloca.cpp
M llvm/lib/Transforms/Scalar/GVN.cpp
M llvm/lib/Transforms/Utils/Local.cpp
R llvm/test/Transforms/GVN/PRE/protected-field-ptr.ll
A llvm/test/Transforms/InstCombine/protected-field-ptr.ll
M llvm/test/Transforms/InstCombine/ptrauth-intrinsics.ll
M llvm/test/Transforms/PhaseOrdering/phi-protected-field-ptr.ll
A llvm/test/Transforms/PreISelIntrinsicLowering/emupac.ll
M llvm/test/Transforms/PreISelIntrinsicLowering/protected-field-pointer-addrspace1.ll
M llvm/test/Transforms/PreISelIntrinsicLowering/protected-field-pointer.ll
Log Message:
-----------
Move {load,store}(llvm.protected.field.ptr) lowering to InstCombine.
The previous position of llvm.protected.field.ptr lowering for loads
and stores was problematic as it not only inhibited optimizations such
as DSE (as stores to a llvm.protected.field.ptr were not considered to
must-alias stores to the non-protected.field pointer) but also required
changes to other optimization passes to avoid transformations that would
reduce PFP coverage.
Address this by moving the load/store part of the lowering to
InstCombine, where it will run earlier than the PFP-breaking and
AA-relying transformations. The deactivation symbol, null comparison
and EmuPAC parts of the lowering remain in PreISelLowering.
Now that the transformation inhibitions are no longer needed, remove them
(i.e. partially revert #151649, and revert #182976).
This change resulted in a 2.4% reduction in Fleetbench .text size and
the following improvements to PFP performance overhead for BM_PROTO_Arena
on various microarchitectures:
before after
Apple M2 Ultra 3.5% 3.3%
Google Axion C4A 3.3% 2.9%
Google Axion N4A 2.7% 2.2%
Reviewers: fmayer, nikic, vitalybuka
Reviewed By: fmayer
Pull Request: https://github.com/llvm/llvm-project/pull/186548
Commit: 164505d3480c222980b6351865270789aa083769
https://github.com/llvm/llvm-project/commit/164505d3480c222980b6351865270789aa083769
Author: Sam Elliott <aelliott at qti.qualcomm.com>
Date: 2026-04-06 (Mon, 06 Apr 2026)
Changed paths:
M llvm/utils/TableGen/AsmMatcherEmitter.cpp
Log Message:
-----------
[NFC][AsmMatcher] Add Commented Name for FeatureBitsets (#190688)
Commit: f9adee2f6b1f06ae1623a044128997482da5132c
https://github.com/llvm/llvm-project/commit/f9adee2f6b1f06ae1623a044128997482da5132c
Author: Sameer Sahasrabuddhe <sameer.sahasrabuddhe at amd.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
M llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
M llvm/lib/Target/AMDGPU/SOPInstructions.td
R llvm/test/CodeGen/AMDGPU/asyncmark-err.ll
A llvm/test/CodeGen/AMDGPU/asyncmark-gfx12plus.ll
Log Message:
-----------
[AMDGPU] asyncmark support for ASYNC_CNT (#185813)
The ASYNC_CNT is used to track the progress of asynchronous copies
between global and LDS memories. By including it in asyncmark, the
compiler can now assist the programmer in generating waits for
ASYNC_CNT.
Assisted-By: Claude Sonnet 4.5
This is part of a stack:
- #185813
- #185810
Fixes: LCOMPILER-332
Commit: 613c5b4523d55f3fab3385fc7ed9218777b507b8
https://github.com/llvm/llvm-project/commit/613c5b4523d55f3fab3385fc7ed9218777b507b8
Author: Zhen Wang <zhenw at nvidia.com>
Date: 2026-04-06 (Mon, 06 Apr 2026)
Changed paths:
M flang/lib/Semantics/tools.cpp
M flang/test/Lower/CUDA/cuda-program-global.cuf
Log Message:
-----------
[flang][cuda] Lower unified variables as cuf.alloc in main program scope (#190713)
Remove the unified exception from CanCUDASymbolBeGlobal so unified
variables follow the same cuf.alloc lowering path as other CUDA data
attributes.
Commit: 49093c4a57ba64d384520ddd95a07c8b35fadcc0
https://github.com/llvm/llvm-project/commit/49093c4a57ba64d384520ddd95a07c8b35fadcc0
Author: Gareth Andrew Lloyd <gareth at ignition-web.co.uk>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M clang-tools-extra/clang-tidy/performance/TriviallyDestructibleCheck.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/test/CMakeLists.txt
A clang-tools-extra/test/clang-tidy/checkers/performance/trivially-destructible-module.cpp
M clang-tools-extra/test/lit.cfg.py
Log Message:
-----------
[clang-tidy] Fix performance-trivially-destructible with C++20 modules (#178471)
When a class definition is seen through both a header include and a
C++20 module import, destructors may appear multiple times in the AST's
redeclaration chain. The original matcher used `isFirstDecl()` which
fails in this scenario because the same declaration can appear as both
first and non-first depending on the view.
Replace `unless(isFirstDecl())` with `isOutOfLine()` which correctly
identifies out-of-line definitions by checking whether the lexical
context differs from the semantic context.
Also update clang-tools-extra's lit.cfg.py to call `use_clang()` instead
of `clang_setup()` to make the `%clang` substitution available for
tests.
Fixes #178102
Co-authored-by: Chuanqi Xu <yedeng.yd at linux.alibaba.com>
Commit: e80f32fd20bf15b4515e868962ace7b34b477d09
https://github.com/llvm/llvm-project/commit/e80f32fd20bf15b4515e868962ace7b34b477d09
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2026-04-06 (Mon, 06 Apr 2026)
Changed paths:
M llvm/lib/CodeGen/CodeGenPrepare.cpp
Log Message:
-----------
[CodeGenPrepare] Use Instruction::comesBefore instead of manual ordering (#190485)
After #172329, we noticed that some sources compiled with MSan take
1000x longer to compile. This is caused by quadratic complexity in
tryToSinkFreeOperands, which can be called on a significant number
of instructions within huge basic blocks.
This inefficiency was introduced in 9cfa9b4, which manually iterates
and creates a DenseMap of entire basic blocks for each interesting
instruction.
This patch avoids the manual ordering by using
Instruction::comesBefore(), which provides the exact same
ordering much more efficiently.
Commit: 6870ebca3c65c2b80c929f97d97b58ab3c6a25c2
https://github.com/llvm/llvm-project/commit/6870ebca3c65c2b80c929f97d97b58ab3c6a25c2
Author: Hiroshi Yamauchi <56735936+hjyamauchi at users.noreply.github.com>
Date: 2026-04-06 (Mon, 06 Apr 2026)
Changed paths:
M llvm/include/llvm/Support/FileSystem.h
M llvm/lib/CAS/MappedFileRegionArena.cpp
M llvm/lib/Support/Unix/Path.inc
M llvm/lib/Support/Windows/Path.inc
M llvm/unittests/Support/Path.cpp
Log Message:
-----------
[CAS] Give Windows file mappings names to better ensure same mappings are used (#190692)
Commit: 97ed6485f2ca10fd7e66a8ebe8920136148d6c32
https://github.com/llvm/llvm-project/commit/97ed6485f2ca10fd7e66a8ebe8920136148d6c32
Author: A. Jiang <de34 at live.cn>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M libcxx/docs/Status/Cxx2cIssues.csv
M libcxx/docs/Status/Cxx2cPapers.csv
Log Message:
-----------
[libc++][docs] Update paper and LWG issue lists after 2026-03 meeting (#189901)
[P3726R2](https://wg21.link/P3726R2) is a Core paper but adds
`std::start_lifetime`, so it needs to be listed in libc++'s
documentation.
For LWG issues, see [P4145R0](https://wg21.link/P4145R0) and
[P4146R0](https://wg21.link/P4146R0).
Commit: 73499774152e23e9e58324809a20bd7e3abff275
https://github.com/llvm/llvm-project/commit/73499774152e23e9e58324809a20bd7e3abff275
Author: lonely eagle <2020382038 at qq.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M mlir/lib/Transforms/CSE.cpp
Log Message:
-----------
[mlir][CSE] Fix CSE markAnalysesPreserved<DominanceInfo, PostDominanceInfo> comment (#190471)
The original comment claimed that DominanceInfo and PostDominanceInfo
could be preserved because region operations are not removed. However,
the real reason was that the original CSE only deleted redundant
operations without moving any operation to a different block, leaving
the dominance tree structure unchanged. Part of
https://github.com/llvm/llvm-project/pull/180556.
Commit: 150783e254d82d290fd05ab5c50813a9d7c98fca
https://github.com/llvm/llvm-project/commit/150783e254d82d290fd05ab5c50813a9d7c98fca
Author: lonely eagle <2020382038 at qq.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M mlir/include/mlir/Dialect/ControlFlow/IR/ControlFlowOps.td
M mlir/include/mlir/Interfaces/ControlFlowInterfaces.td
M mlir/include/mlir/Reducer/ReductionNode.h
M mlir/lib/Dialect/ControlFlow/IR/ControlFlowOps.cpp
M mlir/lib/Reducer/CMakeLists.txt
M mlir/lib/Reducer/ReductionNode.cpp
M mlir/lib/Reducer/ReductionTreePass.cpp
M mlir/test/mlir-reduce/reduction-tree.mlir
Log Message:
-----------
Revert "Reland "[mlir][reducer] Add eraseRedundantBlocksInRegion and getSuccessorForwardOperands API to BranchOpInterface"" (#190727)
To decouple the BranchOpInterface implementation from the reduction-tree
changes. Reverts llvm/llvm-project#189253,
Commit: d6d7d0aca0e945b9e859c15f5e6a8b7c458bb2d7
https://github.com/llvm/llvm-project/commit/d6d7d0aca0e945b9e859c15f5e6a8b7c458bb2d7
Author: Kaviya Rajendiran <67495422+kaviya2510 at users.noreply.github.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M clang/include/clang/Options/Options.td
M clang/lib/Driver/ToolChains/Flang.cpp
M flang/include/flang/Frontend/CodeGenOptions.h
M flang/include/flang/Optimizer/Transforms/Passes.td
M flang/include/flang/Tools/CrossToolHelpers.h
M flang/lib/Frontend/CompilerInvocation.cpp
M flang/lib/Frontend/FrontendActions.cpp
M flang/lib/Optimizer/Passes/Pipelines.cpp
M flang/lib/Optimizer/Transforms/FunctionAttr.cpp
A flang/test/Driver/Inputs/pgo-sample.prof
A flang/test/Driver/fprofile-sample-use.f90
A flang/test/Integration/inputs/pgo-sample.prof
A flang/test/Integration/profile-sample-use.f90
M mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td
M mlir/lib/Target/LLVMIR/ModuleImport.cpp
M mlir/lib/Target/LLVMIR/ModuleTranslation.cpp
A mlir/test/Target/LLVMIR/Import/use-sample-profile.ll
A mlir/test/Target/LLVMIR/use-sample-profile.mlir
Log Message:
-----------
[Flang][Driver] Add support for '-fprofile-sample-use' option (#188697)
When the `-fprofile-sample-use=sample.prof` option is passed, the
compiler records the profile file path in `SampleProfileFile` . This
value is later used by the `SampleProfileLoaderPass`, which loads the
sample profile and injects the corresponding profiling metadata in the
LLVM IR.
Commit: cab7d1e485ca02074c7499020b289c726b06d5cf
https://github.com/llvm/llvm-project/commit/cab7d1e485ca02074c7499020b289c726b06d5cf
Author: lonely eagle <2020382038 at qq.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M mlir/lib/Reducer/ReductionTreePass.cpp
A mlir/test/mlir-reduce/false.sh
M mlir/test/mlir-reduce/invalid.mlir
M mlir/test/mlir-reduce/simple-test.mlir
R mlir/test/mlir-reduce/test.sh
A mlir/test/mlir-reduce/true.sh
Log Message:
-----------
[mlir][reducer] Repalce module.emitWarning with module.emitError in ReductionTree pass (#190584)
This PR fixes the diagnostic message for mlir-reduce's reduction-tree
pass when the input module is not "interesting". Previously, running
with the warning pass would fail silently, and enabling debug options
would only show a generic "pass manager run failed" message without any
useful diagnostic information.
Commit: 45494d9c165965a8f5aaccd00c7301c166bcd575
https://github.com/llvm/llvm-project/commit/45494d9c165965a8f5aaccd00c7301c166bcd575
Author: Jim Lin <jim at andestech.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoZa.td
Log Message:
-----------
[RISCV] Fix address type in Zacas seq_cst atomic pattern (#190729)
The seq_cst pattern in AMOCASPat used (vt GPR:$addr) for the address
operand, while all other patterns (monotonic, acquire, release, acq_rel)
consistently use (XLenVT GPR:$addr). This would produce a wrong type for
the address when vt differs from XLenVT (e.g., amocas.d on RV32 where
vt=i64).
Co-authored-by: Claude Opus 4.6 (1M context) <noreply at anthropic.com>
Commit: 9e72ab62987f412f8592dffa54fdef8c63571fbb
https://github.com/llvm/llvm-project/commit/9e72ab62987f412f8592dffa54fdef8c63571fbb
Author: bharsesh <40402884+bharsesh at users.noreply.github.com>
Date: 2026-04-06 (Mon, 06 Apr 2026)
Changed paths:
M clang/lib/Sema/SemaChecking.cpp
M clang/test/Analysis/bstring.c
M clang/test/Sema/warn-fortify-source.c
Log Message:
-----------
[Clang][Sema] Add fortify warnings for bcopy and bzero (#168965) (#186522)
Add fortify warnings for bcopy and bzero as part of
[llvm#142230](https://github.com/llvm/llvm-project/issues/142230)
Commit: b6759f17709a33e4c7fd3d500c4a94446e4100fe
https://github.com/llvm/llvm-project/commit/b6759f17709a33e4c7fd3d500c4a94446e4100fe
Author: Hemang Gadhavi <hemang.gadhavi at ibm.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M lldb/source/Host/aix/Host.cpp
M lldb/source/Plugins/ObjectFile/XCOFF/ObjectFileXCOFF.cpp
M lldb/source/Plugins/ObjectFile/XCOFF/ObjectFileXCOFF.h
M lldb/source/Utility/ArchSpec.cpp
M lldb/test/Shell/ObjectFile/XCOFF/basic-info32.yaml
Log Message:
-----------
[lldb][AIX] Extract CPU type and set up process architecture accordingly (#189910)
This PR is in reference to porting LLDB on AIX. Ref discusssions: [llvm
discourse](https://discourse.llvm.org/t/port-lldb-to-ibm-aix/80640) and
[#101657](https://github.com/llvm/llvm-project/issues/101657).
Complete changes together in this draft:
- [Extending LLDB to work on AIX
#102601](https://github.com/llvm/llvm-project/pull/102601)
Description:
The process architecture was previously initialized using a hardcoded
TCPU_PPC64 CPU type.
The logic has been updated to determine the CPU type dynamically by
inspecting the magic bytes and the XCOFF header. Based on this
information, the appropriate CPU type (TCPU_PPC or TCPU_PPC64) is
selected and used when constructing and setting the ArchSpec.
This change ensures that the process architecture correctly reflects the
underlying binary format.
Commit: a485f1c63475d416b179b78b64cb22397f4085cb
https://github.com/llvm/llvm-project/commit/a485f1c63475d416b179b78b64cb22397f4085cb
Author: Chris Jackson <chris.jackson at amd.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SILowerSGPRSpills.cpp
M llvm/test/CodeGen/AMDGPU/llc-pipeline.ll
M llvm/test/CodeGen/AMDGPU/sgpr-regalloc-flags.ll
A llvm/test/CodeGen/AMDGPU/si-lower-sgpr-spills-cycle-header.ll
A llvm/test/CodeGen/AMDGPU/si-lower-sgpr-spills-cycle-header.mir
A llvm/test/CodeGen/AMDGPU/si-lower-sgpr-spills-initial-insert-in-body.mir
A llvm/test/CodeGen/AMDGPU/si-lower-sgpr-spills-initial-insert-in-latch.mir
A llvm/test/CodeGen/AMDGPU/si-lower-sgpr-spills-multi-entry-cycle.mir
M llvm/test/CodeGen/AMDGPU/spill-sgpr-to-virtual-vgpr.mir
M llvm/test/CodeGen/AMDGPU/spill-vgpr-to-agpr-update-regscavenger.ll
Log Message:
-----------
[AMDGPU][SILowerSGPRSpills] Correct insertion of IMPLICIT_DEF in cycles (#186348)
si-lower-sgpr spills was observed inserting IMPLICIT_DEF for lane VGPR
restores in the cycle header. The virtual VGPR is therefore not live-in
to the header and wwm regallocfast does not insert a restore. This
results in the vgpr being clobbered after each backedge.
Correct this by inserting the IMPLICIT_DEF in a block that dominates
all entries.
Assisted by Claude.
Commit: d55122e4390dc67e393bdf860844f7eebf73809d
https://github.com/llvm/llvm-project/commit/d55122e4390dc67e393bdf860844f7eebf73809d
Author: Aleksandr Platonov <platonov.aleksandr at huawei.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M clang/lib/Rewrite/Rewriter.cpp
M clang/unittests/Rewrite/RewriterTest.cpp
Log Message:
-----------
[clang][Rewriter] Adjust end offset before RewriteBuffer::getMappedOffset() call (#187374)
Without this patch, only cases when a token length increased were
supported.
If a token length decreased, we returned a larger string than expected
(e.g. in the added tests, "xretur " would be returned instead of
"xretur")
Commit: a89f174e502165ac566f922edeaee53329172b22
https://github.com/llvm/llvm-project/commit/a89f174e502165ac566f922edeaee53329172b22
Author: Haojian Wu <hokein.wu at gmail.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M clang/lib/Sema/SemaDecl.cpp
A clang/test/SemaTemplate/GH187909.cpp
Log Message:
-----------
[clang] Fix crash on invalid out-of-line enum definition with template parameters (#188246)
clang crashes when an invalid out-of-line enum definition is provided
with template parameters. In these cases, clang produces a dependent
type within a non-dependent context, violating internal invariants.
The fix is to fallback the underlying type of the enum to `int` during
error recovery in `Sema::ActOnTag` when `Invalid` is true, making it
safe for downstream processing while still preserving the invalid
declaration in the AST.
Fixes #187909
Commit: 8460cb9bbb39372815ded429cd56f31a87bba9dc
https://github.com/llvm/llvm-project/commit/8460cb9bbb39372815ded429cd56f31a87bba9dc
Author: Chuanqi Xu <yedeng.yd at linux.alibaba.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M clang-tools-extra/clang-tidy/ClangTidy.cpp
A clang-tools-extra/test/clang-tidy/infrastructure/cxx20-modules.cppm
M clang-tools-extra/test/lit.cfg.py
M clang/include/clang/ASTMatchers/ASTMatchFinder.h
M clang/lib/ASTMatchers/ASTMatchFinder.cpp
Log Message:
-----------
[clang-tidy] [Modules] Skip checking decls in clang-tidy (#145630) (#190733)
Close https://github.com/llvm/llvm-project/issues/145628
Note that I am not sure if this is the proper fix. On the one hand, the
fix lives in ASTMachers instead of clang-tidy. On the other hand, I feel
this may be a more general fix.
Commit: 4c2e49dc5ce3125be9fb07dcefe9be970ce739ec
https://github.com/llvm/llvm-project/commit/4c2e49dc5ce3125be9fb07dcefe9be970ce739ec
Author: Chuanqi Xu <yedeng.yd at linux.alibaba.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M clang/lib/AST/StmtProfile.cpp
A clang/test/Modules/callable-require-clause-merge.cppm
M clang/test/Modules/polluted-operator.cppm
Log Message:
-----------
[C++20] [Modules] Don't profiling the callee of CXXFoldExpr (#190732)
Close https://github.com/llvm/llvm-project/issues/190333
For the test case, the root cause of the problem is, the compiler
thought the declaration of `operator &&` in consumer.cpp may change the
meaning of '&&' in the requrie clause of `F::operator()`. But it doesn't
make sense. Here we skip profiling the callee to solve the problem. Note
that we've already record the kind of the operator. So '&&' and '||'
won't be confused.
Commit: 39e503438976f45cbf2a8fa99a20bd7daa9e5b4c
https://github.com/llvm/llvm-project/commit/39e503438976f45cbf2a8fa99a20bd7daa9e5b4c
Author: Jiří Filek <52356396+fileho at users.noreply.github.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp
M clang/test/CodeGen/AArch64/bf16-getset-intrinsics.c
M clang/test/CodeGen/AArch64/neon/bf16-getset.c
Log Message:
-----------
[CIR][AArch64] Implement vget_lane_bf16 and vgetq_lane_bf16 builtins (#186866)
Implements vget_lane_bf16 and vgetq_lane_bf16 builtins. Updates test
with CIR test.
Part of #185382
Commit: 774ac3164adea2be906192769922033c938f18f2
https://github.com/llvm/llvm-project/commit/774ac3164adea2be906192769922033c938f18f2
Author: vangthao95 <vang.thao at amd.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.gws.barrier-bundle.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.gws.barrier.ll
Log Message:
-----------
[AMDGPU][NFC] Split and auto-generate ds.gws.barrier test checks (#190680)
Split MIR checks into a separate test file.
Commit: dcd58a8fedc8127479e8553dbeed1f172caae34f
https://github.com/llvm/llvm-project/commit/dcd58a8fedc8127479e8553dbeed1f172caae34f
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M llvm/lib/Analysis/InlineCost.cpp
M llvm/test/Transforms/Inline/attributes.ll
Log Message:
-----------
[Inline] Allow inlining with null_pointer_is_valid mismatch (#190510)
If the callee has null_pointer_is_valid but the caller does not, we
should still inline and add null_pointer_is_valid to the caller (which
is handled by an already existing inline adjustment rule).
This does mean that optimizations in the caller may be reduced by
unnecessarily preserving null checks, but that's still better than not
inlining at all. In particular, this check causes issues with LTO in the
Linux kernel, as the C portions are compiled with null_pointer_is_valid,
but the Rust portions are not.
The test is modified to show that the previous alwaysinline behavior now
always holds.
Commit: 89446086eaed6f07e2c122396570f2985cec62e5
https://github.com/llvm/llvm-project/commit/89446086eaed6f07e2c122396570f2985cec62e5
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M llvm/include/llvm/IR/Instruction.h
Log Message:
-----------
[IR] Remove HasMetadata bit from instructions (#190651)
We were reserving one bit for a HasMetadata flag. However, this flag has
long since been moved into Value itself, prior to being removed from
there as well recently.
Commit: cfdd8bcca85a03c613b06306af20c547764d4436
https://github.com/llvm/llvm-project/commit/cfdd8bcca85a03c613b06306af20c547764d4436
Author: Balázs Kéri <balazs.keri at ericsson.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
A clang-tools-extra/clang-tidy/bugprone/AssignmentInSelectionStatementCheck.cpp
A clang-tools-extra/clang-tidy/bugprone/AssignmentInSelectionStatementCheck.h
M clang-tools-extra/clang-tidy/bugprone/BugproneTidyModule.cpp
M clang-tools-extra/clang-tidy/bugprone/CMakeLists.txt
M clang-tools-extra/clang-tidy/cert/CERTTidyModule.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
A clang-tools-extra/docs/clang-tidy/checks/bugprone/assignment-in-selection-statement.rst
A clang-tools-extra/docs/clang-tidy/checks/cert/exp45-c.rst
M clang-tools-extra/docs/clang-tidy/checks/list.rst
A clang-tools-extra/test/clang-tidy/checkers/bugprone/assignment-in-selection-statement.c
A clang-tools-extra/test/clang-tidy/checkers/bugprone/assignment-in-selection-statement.cpp
Log Message:
-----------
[clang-tidy] Add check 'bugprone-assignment-in-selection-statement' (#180219)
Commit: cb1d61403b18f864d558b7b3d4ab54abac1e23c4
https://github.com/llvm/llvm-project/commit/cb1d61403b18f864d558b7b3d4ab54abac1e23c4
Author: Henrich Lauko <xlauko at mail.muni.cz>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
Log Message:
-----------
[CIR] Use UnitProp for comdat, constant, dso_local (#190518)
Commit: 7fb61f589993da3dc160d65092ca4d7ce685eaac
https://github.com/llvm/llvm-project/commit/7fb61f589993da3dc160d65092ca4d7ce685eaac
Author: Victor Chernyakin <chernyakin.victor.j at outlook.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M clang-tools-extra/clang-tidy/misc/UseInternalLinkageCheck.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
A clang-tools-extra/test/clang-tidy/checkers/misc/use-internal-linkage-module-implementation.cpp
A clang-tools-extra/test/clang-tidy/checkers/misc/use-internal-linkage-module-partition.cpp
M clang-tools-extra/test/clang-tidy/checkers/misc/use-internal-linkage-module.cpp
Log Message:
-----------
[clang-tidy] Make `misc-use-internal-linkage` not diagnose symbols in importable module units (#188679)
Fixes #187884.
Commit: 3078eaaec8e793b49b79e9278dabc67d4f0eb8e3
https://github.com/llvm/llvm-project/commit/3078eaaec8e793b49b79e9278dabc67d4f0eb8e3
Author: Łukasz Plewa <lukasz.plewa at intel.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M offload/plugins-nextgen/level_zero/src/L0Kernel.cpp
M offload/plugins-nextgen/level_zero/src/L0Program.cpp
Log Message:
-----------
[offload] fix invalid symbol handling in l0 plugin (#189442)
Commit: 1e10ab2ddba11f8e5a46cd89e4e579b0b75657d3
https://github.com/llvm/llvm-project/commit/1e10ab2ddba11f8e5a46cd89e4e579b0b75657d3
Author: Martin Storsjö <martin at martin.st>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M lld/test/COFF/gnu-weak.test
Log Message:
-----------
[LLD] [COFF] Remove a now incorrect comment in a test. NFC. (#190489)
This comment was added in 26572002749ee2e7d734e4e0aed4cca0e1c623c3 in
2018. Later in 8f540dad6120d00e3ad896b98cd32bcf00623ccd in 2020, the
LLVM MC layer was adjusted to do essentially the same as GNU binutils
do.
Therefore, I think that this test now technically could be done with
object files generated by llvm-mc as well, instead of bundled binary
object files.
Commit: df081924cf21d3b289f976172f6583cc63ec40fb
https://github.com/llvm/llvm-project/commit/df081924cf21d3b289f976172f6583cc63ec40fb
Author: Martin Storsjö <martin at martin.st>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M lld/COFF/Config.h
M lld/COFF/Driver.cpp
M lld/COFF/SymbolTable.cpp
A lld/test/COFF/export-all-conflict.test
Log Message:
-----------
[LLD] [COFF] Fix crashes for conflicting exports with -export-all-symbols (#190492)
Commit adcdc9cc3740adba3577b328fa3ba492cbccd3a5 (since LLD 17) added a
warning message if there are conflicting attempts to export a specific
symbol.
That commit missed one source of exports, from the LLD specific
-export-all-symbols flag (which only has an effect in mingw mode).
To trigger this case, one needs to have an export set by a def file,
combined with the -export-all-symbols flag (which attempts to export all
global symbols, despite explicit exports through embedded directives or
a def file).
To trigger the warning (and the previous crash), one would have to have
some difference between the export produced by -export-all-symbols and
the one from the def file. That difference could be e.g. that the def
file contained an explicit ordinal, or that the def file lacked a DATA
marking for a symbol that the automatic export of all symbols decides to
export as a data symbol.
This fixes https://github.com/llvm/llvm-project/issues/187318. (In the
repro case in that bug, the def file lacked DATA markings for a data
symbol.)
Commit: c6187d5bd9c7ea46b25dd0f26b9e9bde7ad340da
https://github.com/llvm/llvm-project/commit/c6187d5bd9c7ea46b25dd0f26b9e9bde7ad340da
Author: Alex Duran <alejandro.duran at intel.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M offload/CMakeLists.txt
M offload/cmake/Modules/LibomptargetGetDependencies.cmake
M offload/plugins-nextgen/level_zero/CMakeLists.txt
A offload/plugins-nextgen/level_zero/dynamic_l0/L0DynWrapper.cpp
A offload/plugins-nextgen/level_zero/dynamic_l0/level_zero/ze_api.h
A offload/plugins-nextgen/level_zero/dynamic_l0/level_zero/zes_api.h
R offload/plugins-nextgen/level_zero/src/L0DynWrapper.cpp
Log Message:
-----------
[OFFLOAD][L0] Remove dependence from level zero headers for dlopen build (#189120)
Adds the subset of the Level Zero headers necessary to compile the
plugin when built with dlopen support.
Disclaimer: The headers were mostly generated by Claude.
Commit: 0e150b6760372cf05c71e8d4e4375421270371f1
https://github.com/llvm/llvm-project/commit/0e150b6760372cf05c71e8d4e4375421270371f1
Author: Haojian Wu <hokein.wu at gmail.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M clang/docs/ReleaseNotes.rst
Log Message:
-----------
Add a missing release note for the fix #188246 (#190746)
Commit: 5c6ad65fd3dde88ce9bcd04dda8f07f38d79f2c7
https://github.com/llvm/llvm-project/commit/5c6ad65fd3dde88ce9bcd04dda8f07f38d79f2c7
Author: tedj <tedmjohnson at protonmail.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M flang/lib/Optimizer/Transforms/StackArrays.cpp
A flang/test/Transforms/stack-arrays-block-cfg-scope.fir
A flang/test/Transforms/stack-arrays-nested-scope.fir
A flang/test/Transforms/stack-arrays-scope.f90
Log Message:
-----------
[flang] Fix stack-arrays pass moving alloca across stackrestore scope (#184727)
When a operand is shared between two fir.allocmem ops in different
stacksave/stackrestore scopes, findAllocaInsertionPoint() placed both
allocas at the operand definition site inside the first scope. The first
stackrestore then reclaimed both, leaving the second call with a
dangling pointer.
Add a check for intervening stackrestore ops between the last operand
and the allocmem. If one is found, fall back to the allocmem's own
location, matching the existing bail-out for cross-block operands.
Fixes: https://github.com/llvm/llvm-project/issues/178812
Commit: d4a20e7f7e35da720eea34f3de97356d94b7a494
https://github.com/llvm/llvm-project/commit/d4a20e7f7e35da720eea34f3de97356d94b7a494
Author: Pavel Labath <pavel at labath.sk>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/src/__support/OSUtil/linux/syscall_wrappers/CMakeLists.txt
A libc/src/__support/OSUtil/linux/syscall_wrappers/connect.h
M libc/src/sys/socket/CMakeLists.txt
A libc/src/sys/socket/connect.h
M libc/src/sys/socket/linux/CMakeLists.txt
A libc/src/sys/socket/linux/connect.cpp
M libc/test/src/sys/socket/linux/CMakeLists.txt
A libc/test/src/sys/socket/linux/connect_test.cpp
Log Message:
-----------
[libc] Implement connect(2) on linux (#189668)
I'm using the new syscall wrapper framework, and enabling the entry
point for x86_64, aarch64 and riscv. The associated test currently only
checks for the error code. Once we have listen&accept (which I'm
probably going to tackle next), we can test that the two can talk to
each other.
Commit: b12d54d680f5af54e01c3489aa97ab2b0ce1ddc3
https://github.com/llvm/llvm-project/commit/b12d54d680f5af54e01c3489aa97ab2b0ce1ddc3
Author: Owen Anderson <resistor at mac.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/LoopIdiomRecognize.cpp
M llvm/test/Transforms/LoopIdiom/non-integral-pointers.ll
Log Message:
-----------
[CHERI] Refine LoopIdiomRecognize handling of stable representation non-integral pointers. (#189402)
This makes two changes:
- memset can be formed from stores of null pointers, even if they are
non-integral. Null pointers are already assumed to be equivalent to the
all-zeros bit pattern, and it's not the goal of non-integral pointer
support to change that assumption.
- memcpy can be formed from copies of non-integral pointers. We assume
if the environment provides a memcpy implementation for a non-integral
pointer address space, then that memcpy is non-integral pointer aware.
These changes are not applied to pointers with unstable representation.
Commit: 55a3382be485148a3ab29c8942a07f13e9ba036a
https://github.com/llvm/llvm-project/commit/55a3382be485148a3ab29c8942a07f13e9ba036a
Author: Tharun V K <40231849+tharunvk at users.noreply.github.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
A llvm/test/CodeGen/X86/half-fneg-fabs.ll
Log Message:
-----------
[X86] Add DAG combine to fold promoted f32 sequences for f16 fneg and fabs (#189395)
This patch optimizes f16 fneg and fabs on X86 targets by introducing
a DAG combine to identify and collapse fpext -> fneg/fabs -> fptrunc.
Generally f16 operations are promoted to f32. For bitwise-equivalent
operations like fneg and fabs, this results in unnecessary and
expensive f32 library calls (__extendhfsf2 / __truncsfhf2) or
hardware conversions (vcvtph2ps / vcvtps2ph) at -O0.
Fixes: https://github.com/llvm/llvm-project/issues/188201
---------
Co-authored-by: Phoebe Wang <phoebe.wang at intel.com>
Commit: b9149823d85891044bf34e8654d1a45870e55174
https://github.com/llvm/llvm-project/commit/b9149823d85891044bf34e8654d1a45870e55174
Author: Luke Lau <luke at igalia.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfdiv-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfrdiv-vp.ll
M llvm/test/CodeGen/RISCV/rvv/sink-splat-operands.ll
M llvm/test/CodeGen/RISCV/rvv/undef-vp-ops.ll
M llvm/test/CodeGen/RISCV/rvv/vfdiv-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfrdiv-vp.ll
Log Message:
-----------
[RISCV] Remove codegen for vp_fdiv (#190591)
Part of the work to remove trivial VP intrinsics from the RISC-V
backend, see
https://discourse.llvm.org/t/rfc-remove-codegen-support-for-trivial-vp-intrinsics-in-the-risc-v-backend/87999
This splits off the vp.fdiv intrinsic from #179622.
Commit: 36fa27fe3e11df54c5c20402a45aa90503db4cc6
https://github.com/llvm/llvm-project/commit/36fa27fe3e11df54c5c20402a45aa90503db4cc6
Author: Joshua Rodriguez <josh.rodriguez at arm.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/lib/Target/AArch64/GISel/AArch64RegisterBankInfo.cpp
M llvm/test/CodeGen/AArch64/arm64-int-neon.ll
M llvm/test/CodeGen/AArch64/arm64-vmul.ll
Log Message:
-----------
[AArch64][GlobalISel] Add patterns for scalar sqdmlal/sqdmlsl (#187246)
SQMLAL's instruction selection patterns don't work for GlobalISel when
the intrinsic has scalar operands. This is because the intrinsic has a
slightly different name (int_aarch64_neon_sqdmulls_scalar). As a result,
this leads to sub-optimal code generation.
This patch allows sqdmulls_scalar to lower, and adds GlobalISel versions
of the TableGen patterns to provide this optimisation.
The pattern added performs this mapping:
`SQADD(a, SQDMULL(b,c)) -> SQDMLAL(a, b, c) [And equivalent for
subtraction]`
Commit: c1d6eea9e794f661402341137d228dd735af1056
https://github.com/llvm/llvm-project/commit/c1d6eea9e794f661402341137d228dd735af1056
Author: David Spickett <david.spickett at arm.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M llvm/docs/ReleaseNotes.md
Log Message:
-----------
llvm][docs] Cleanup LLDB release notes (#190760)
* A few items were in the wrong place.
* FreeBSD batch mode check was removed in
d0f5df111865ea4bb9d7d6ff35b517ee1aa7402f.
* Mark some names as plaintext.
* Fix some spellings.
Commit: cb1a912c76364c74e9d9a91f5e70561733358dc8
https://github.com/llvm/llvm-project/commit/cb1a912c76364c74e9d9a91f5e70561733358dc8
Author: Owen Anderson <resistor at mac.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M llvm/test/CodeGen/Generic/2010-11-04-BigByval.ll
Log Message:
-----------
[llvm] Mark Darwin arm64 to UNSUPPORTED for 2010-11-04-BigByval.ll (#190594)
Update AArch64 UNSUPPORTED on CodeGen/Generic/2010-11-04-BigByval.ll to
include Darwin, where it is referred to as arm64 rather than aarch64.
Commit: db3302dc1e42431efa728ebf7a78e3a30593a653
https://github.com/llvm/llvm-project/commit/db3302dc1e42431efa728ebf7a78e3a30593a653
Author: Lucas Ramirez <11032120+lucas-rami at users.noreply.github.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M llvm/lib/CodeGen/Rematerializer.cpp
M llvm/unittests/CodeGen/RematerializerTest.cpp
Log Message:
-----------
[CodeGen] Fix incorrect rematerialization order in rematerializer (#189485)
When rematerializing DAGs of registers wherein multiple paths exist
between some regsters of the DAG, it is possible that the
rematerialization determines an incorrect rematerialization order that
does not ensure that a register's dependencies are rematerialized before
itself; an invariant that is otherwise required.
This fixes that using a simpler recursive logic to determine a correct
rematerialization order that honors this invariant. A minimal unit test
is added that fails on the current implementation.
Commit: 3f583d40455fb498373b17ecf058fae553770395
https://github.com/llvm/llvm-project/commit/3f583d40455fb498373b17ecf058fae553770395
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/find-last-iv-sinkable-expr-epilogue.ll
M llvm/test/Transforms/LoopVectorize/find-last-iv-sinkable-expr-epilogue.ll
M llvm/test/Transforms/LoopVectorize/find-last-iv-sinkable-expr.ll
M llvm/test/Transforms/LoopVectorize/iv-select-cmp-decreasing.ll
Log Message:
-----------
[VPlan] Optimize FindLast of (binop %IV, live-in) by sinking. (#183911)
When we are finding the last occurrence of a value of an expression that
depends on an induction, we can vectorize this by just selecting the IV
and sinking the expression in the middle block
This follows one of @ayalz's suggestions during earlier discussions for
adding support for CAS/FindLast patterns.
This patch starts with the simplest case, where the selected value is a
simple binary expression of a wide IV and a loop-invariant operand.
This should always be profitable, as the current restriction to binary
operators ensures that the width of the wide IV matches the original
reduction width, we won't introduce any new, wider reduction phi
recipes, and remove the boolean reduction + the horizontal reduction in
the loop.
PR: https://github.com/llvm/llvm-project/pull/183911
Commit: de6d86cf281b9ea0f10c593859f77e306db6fbe8
https://github.com/llvm/llvm-project/commit/de6d86cf281b9ea0f10c593859f77e306db6fbe8
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M flang/include/flang/Semantics/openmp-utils.h
M flang/lib/Semantics/openmp-utils.cpp
Log Message:
-----------
[flang][OpenMP] Use OmpDirectiveSpecifications in helper functions (#190644)
This will make them more reusable, for example when processing APPLY
clause in the future.
Issue: https://github.com/llvm/llvm-project/issues/185287
Commit: fe8a597aa62a7872b2e3225bab29dfa5b9747c2d
https://github.com/llvm/llvm-project/commit/fe8a597aa62a7872b2e3225bab29dfa5b9747c2d
Author: Erick Velez <erickvelez7 at gmail.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M clang/lib/ExtractAPI/DeclarationFragments.cpp
A clang/test/ExtractAPI/type-alias.cpp
M clang/test/Index/extract-api-cursor-cpp.cpp
Log Message:
-----------
[clang][ExtractAPI] emit correct spelling for type aliases (#134007)
Previously, C++11 type aliases were serialized using "typedef"
regardless of the source spelling.
This checks if the TypedefNameDecl is actually a TypeAliasDecl and
corrects the spelling.
Commit: aa4c76d8fb2211cf911a73533138baa24f23b34d
https://github.com/llvm/llvm-project/commit/aa4c76d8fb2211cf911a73533138baa24f23b34d
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M mlir/include/mlir/IR/BuiltinDialectBytecode.td
M mlir/unittests/Bytecode/BytecodeTest.cpp
Log Message:
-----------
[mlir][BytecodeReader] Fix crash reading FusedLoc with empty locations (#189228)
FusedLoc::get(context, locs) may return UnknownLoc when locs is empty
and no metadata is provided. The bytecode reader's cBuilder used
cast<FusedLoc>() on this result, which crashes with an assertion
failure.
Fix by giving the FusedLoc DialectAttribute its own cBuilder that passes
Attribute() explicitly, causing getChecked<FusedLoc> to call the
two-parameter storage constructor directly and always produce a
FusedLoc.
Fixes #99626
Assisted-by: Claude Code
Commit: 546787ec97e292391c27fe55ef4549e7ba022afe
https://github.com/llvm/llvm-project/commit/546787ec97e292391c27fe55ef4549e7ba022afe
Author: Davide Grohmann <davide.grohmann at arm.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVTosaTypes.td
M mlir/test/Dialect/SPIRV/IR/tosa-ops-verification.mlir
Log Message:
-----------
[mlir][spirv] Fix SPIRV TOSA per-channel rescale length verification (#190748)
`TensorLengthMatchesPerChannel` was checking `rank(input) - 1` instead
of `input_shape[rank(input) - 1]`. Fix the predicate and update the
rescale verifier tests accordingly.
Signed-off-by: Davide Grohmann <davide.grohmann at arm.com>
Commit: 543ec358dd1ad361edaccba3dfef61236f2788c4
https://github.com/llvm/llvm-project/commit/543ec358dd1ad361edaccba3dfef61236f2788c4
Author: Lang Hames <lhames at gmail.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M orc-rt/include/orc-rt/Session.h
M orc-rt/lib/executor/Session.cpp
M orc-rt/unittests/SessionTest.cpp
Log Message:
-----------
[orc-rt] Add managed-code-calls TaskGroup. (#190740)
Adds a ManagedCodeCallsGroup TaskGroup to Session, and updates the
shutdown sequence to wait until all calls into managed code have
completed before proceeding to shut down the Session's Services and the
Session itself.
To support safe calls into managed code two new helper template methods
are added:
callManagedCodeSync attempts to acquire a TaskGroup::Token for the
ManagedCodeCallsGroup before calling the given function and returning
its result.
callManagedCodeAsync attempts to acquire a TaskGroup::Token for the
ManagedCodeCallsGroup before calling the given async function. The
wrapped Return call for the async function will carry the acquired
Token, ensuring that shutdown waits for the async Return call to be
destroyed (whether or not it's actually called).
Commit: 6d3d88f74c405db660a20103905787fc67087287
https://github.com/llvm/llvm-project/commit/6d3d88f74c405db660a20103905787fc67087287
Author: Petar Avramovic <Petar.Avramovic at amd.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/GCNVOPDUtils.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-short-clamp.ll
M llvm/test/CodeGen/AMDGPU/fcopysign.f16.ll
M llvm/test/CodeGen/AMDGPU/fmed3.bf16.ll
M llvm/test/CodeGen/AMDGPU/fmed3.ll
M llvm/test/CodeGen/AMDGPU/fold-int-pow2-with-fmul-or-fdiv.ll
M llvm/test/CodeGen/AMDGPU/frem.ll
M llvm/test/CodeGen/AMDGPU/llvm.maximum.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.maximum.f32.ll
M llvm/test/CodeGen/AMDGPU/llvm.minimum.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.minimum.f32.ll
M llvm/test/CodeGen/AMDGPU/uniform-vgpr-to-sgpr-return.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-fmaximum.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-fminimum.ll
Log Message:
-----------
AMDGPU: Use SmallSet for VOPD scalar reg tracking (#190650)
Use SmallSet instead of SmallVector for UniqueScalarRegs.
VCC_LO was pushed without uniqueness check, so when both
components used VCC implicitly it was counted twice,
rejecting valid VOPD pairings.
Co-Authored-By: Claude Opus 4.6 <noreply at anthropic.com>
Commit: 211b88b64b0e409a2e294a1fe444b305aa94a2a6
https://github.com/llvm/llvm-project/commit/211b88b64b0e409a2e294a1fe444b305aa94a2a6
Author: Oleksandr Tarasiuk <oleksandr.tarasiuk at outlook.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Parse/Parser.h
M clang/lib/Parse/ParseDecl.cpp
M clang/lib/Parse/ParseObjc.cpp
M clang/lib/Sema/DeclSpec.cpp
M clang/test/CXX/dcl.dcl/dcl.spec/dcl.type/dcl.spec.auto/p3-generic-lambda-1y.cpp
M clang/test/Parser/c2x-auto.c
M clang/test/Sema/c2x-auto.c
M clang/test/Sema/constexpr.c
M clang/test/SemaCXX/auto-cxx0x.cpp
Log Message:
-----------
[Clang] prevent incorrect rejection of auto with reordered declaration specifiers in C23 (#177865)
Fixes #164121
---
This patch addresses the issue where `auto` was incorrectly rejected
with reordered declaration specifiers in C23.
Commit: f40c234191802154d5b3fc3209908c3f2d6e1649
https://github.com/llvm/llvm-project/commit/f40c234191802154d5b3fc3209908c3f2d6e1649
Author: Donát Nagy <donat.nagy at ericsson.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M clang/include/clang/Analysis/AnalysisDeclContext.h
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/CallEvent.h
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/Environment.h
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/ProgramState.h
M clang/lib/Analysis/AnalysisDeclContext.cpp
M clang/lib/StaticAnalyzer/Checkers/UninitializedObject/UninitializedObjectChecker.cpp
M clang/lib/StaticAnalyzer/Core/BugReporter.cpp
M clang/lib/StaticAnalyzer/Core/CallEvent.cpp
M clang/lib/StaticAnalyzer/Core/Environment.cpp
M clang/lib/StaticAnalyzer/Core/ExprEngine.cpp
M clang/lib/StaticAnalyzer/Core/ExprEngineCXX.cpp
M clang/lib/StaticAnalyzer/Core/ExprEngineCallAndReturn.cpp
M clang/lib/StaticAnalyzer/Core/MemRegion.cpp
M clang/lib/StaticAnalyzer/Core/ProgramState.cpp
Log Message:
-----------
[NFC][analyzer] Spread use of 'Expr*' instead of 'Stmt*' (#188319)
When I was browsing the codebase, I was surprised to see that the first
parameter of `ProgramStateRef::BindExpr` was `const Stmt*` instead of
`const Expr*`. As I surveyed calls to `BindExpr`, I realized that
fortunately no code passes non-expression statements to `BindExpr`
(anymore... it seems that earlier we had such hacks) so in this commit
I'm able to change the type of the first parameter to `const Expr*`.
There was a call to `BindExpr` where the first argument was the value of
the data member `StackFrameContext::CallSite`, so I also changed the
type of that member from `const Stmt*` to `const Expr*` because it was
another statement pointer that always pointed to expressions (or null).
This commit prepares the ground for using `Expr*` instead of `Stmt*` in
`EnvironmentEntry`, which is currently a `pair<const Stmt *, const
StackFrameContext *>` and will be updated in follow-up commits.
This commit also includes minor unrelated simplifications and
corrections.
Commit: a6fda587390b6d3bbf00df22a22881561727e9f9
https://github.com/llvm/llvm-project/commit/a6fda587390b6d3bbf00df22a22881561727e9f9
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M libc/shared/rpc.h
Log Message:
-----------
[libc] Fix ordering to make sure event_id is written before interrupt (#190705)
Summary:
Right now this meant we could avoid flushing the event_id write before
firing the interrupt, so it could be unset.
Commit: 64ac9da3b382bff37445cf7c1ffc557f5302fe6a
https://github.com/llvm/llvm-project/commit/64ac9da3b382bff37445cf7c1ffc557f5302fe6a
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M libc/shared/CMakeLists.txt
M libc/shared/rpc.h
M libc/shared/rpc_server.h
R libc/src/__support/RPC/rpc_server.h
M libc/src/__support/arg_list.h
M libc/test/integration/src/stdio/gpu/printf_test.cpp
M libc/test/shared/CMakeLists.txt
M offload/plugins-nextgen/common/src/RPC.cpp
Log Message:
-----------
[libc] Make rpc_server.h independent from libc internals (#190423)
Summary:
It was very convenient to have the RPC server use the internal libc
printing utilities, but it caused a lot of problems. The LLVM libc
internals were never meant to be included arbitrarily and we completely
bypassed this restriction. Furthermore it prevented us from installing
and using these libraries in other contexts. There was a whole host of
hacks around this, leading to endless PPC problems, compiler errors,
etc.
This PR re-uses the old minified format parser I used to use for the GPU
case. We simply parse the formats to get the size, then copy the
strings. The actual printing instead is done by locking the output file
and repeatedly building up the string using the host's `printf`. Slight
test modifications because we no longer can depend on the specific user
printf specification, it may not handle null or binary values for
example.
Commit: 46bef90e9c60ccc79d3fefa881270ac53a88226f
https://github.com/llvm/llvm-project/commit/46bef90e9c60ccc79d3fefa881270ac53a88226f
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M compiler-rt/CMakeLists.txt
M compiler-rt/cmake/Modules/AddCompilerRT.cmake
M compiler-rt/cmake/Modules/AllSupportedArchDefs.cmake
M compiler-rt/cmake/caches/AMDGPU.cmake
M compiler-rt/cmake/config-ix.cmake
M compiler-rt/lib/sanitizer_common/sanitizer_platform.h
M compiler-rt/lib/ubsan_minimal/ubsan_minimal_handlers.cpp
M compiler-rt/test/ubsan_minimal/CMakeLists.txt
M compiler-rt/test/ubsan_minimal/TestCases/local_bounds.cpp
Log Message:
-----------
[compiler-rt] Enable minimal ubsan for GPU targets (#188289)
Summary:
This PR enabled the ubsan-minimal target for the GPU. This should enable
the trivial checks on the GPU-side. I had to make some changes to the
common sanitizer requirements, but I think this is reasonable
considering the common_sanitizer requires a fully hosted environment and
all we needed were the headers.
Commit: 90b9ad74904b8480009d96525779e6c4bbae2ec0
https://github.com/llvm/llvm-project/commit/90b9ad74904b8480009d96525779e6c4bbae2ec0
Author: Jiahao Guo <eoonguo at gmail.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp
M clang/lib/CIR/CodeGen/CIRGenTypes.cpp
M clang/test/CodeGen/AArch64/fp8-intrinsics/acle_neon_fp8_untyped.c
M clang/test/CodeGen/AArch64/neon-intrinsics.c
M clang/test/CodeGen/AArch64/neon/intrinsics.c
M clang/test/CodeGen/AArch64/poly64.c
Log Message:
-----------
[CIR][AArch64] Lower NEON vbsl builtins (#188449)
Part of : https://github.com/llvm/llvm-project/issues/185382
Add CIR lowering for the AArch64 NEON bitwise-select builtins.
Lower the NEON bitwise-select builtins to CIR bitwise operations
implementing the ACLE bitwise-select semantics, including the
floating-point forms.Also add CIR support for `mfloat8` NEON vector
types so `vbsl_mf8` and `vbslq_mf8` lower successfully instead of
hitting the existing NYI in type conversion.
Move and extend the corresponding FileCheck coverage in
`clang/test/CodeGen/AArch64/neon/intrinsics.c`.
Commit: 4d84263b341c3ee1847081c50e1541b62fbcb08c
https://github.com/llvm/llvm-project/commit/4d84263b341c3ee1847081c50e1541b62fbcb08c
Author: Cullen Rhodes <cullen.rhodes at arm.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
Log Message:
-----------
[AArch64][GISel] Skip SME call-attr checks on non-SME targets (#190135)
`fallBackToDAGISel` was constructing `SMECallAttrs` for every call even
when the subtarget had no SME/SME2 support. This shows up in
compile-time profiles without ever triggering a fallback.
https://llvm-compile-time-tracker.com/compare.php?from=ed44820f722aae43f1f00bb3e201300966716973&to=ba75f8fe1f0e44f7456dd282e066b6d6e781ada3&stat=instructions%3Au
Commit: fe1aa0f04a043aa83725ea4fe2e63f639995b52a
https://github.com/llvm/llvm-project/commit/fe1aa0f04a043aa83725ea4fe2e63f639995b52a
Author: Aly ElAshram <71949028+AlyElashram at users.noreply.github.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
A llvm/test/CodeGen/AArch64/neon-mul-shl.ll
Log Message:
-----------
[AArch64] Optimize vector multiplications by certain constants for v2i64 (#183827)
## Summary
This patch optimizes v2i64 multiplications by constants that can be
decomposed into a single shift and an addition/subtraction (i.e.,
constants of the form $2^n \pm 1$).
Unlike 32-bit or 16-bit vectors, AArch64 Advanced SIMD (NEON) lacks a
native v2i64 multiply instruction.
Currently, the compiler scalarizes these operations, By lowering these
specific cases to shl + add/sub, we keep the entire operation within the
SIMD unit, significantly reducing instruction count and execution
latency.
## Technical Details
- Target: AArch64 (With Neon Enabled)
- Transformation: Replaces (mul x, splat(2^n + 1)) with (add (shl x, n),
x) and (mul x, splat(2^n - 1)) with (sub (shl x, n), x).
- Placement: Integrated into performMulCombine in
AArch64ISelLowering.cpp as a targeted gate for v2i64 vector types only
(for now).
Reference Issue : https://github.com/llvm/llvm-project/issues/54651
Fixes : https://github.com/llvm/llvm-project/issues/176985
Commit: 464647891a2fe16b944a8486510ca5b763a3b448
https://github.com/llvm/llvm-project/commit/464647891a2fe16b944a8486510ca5b763a3b448
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
M llvm/test/CodeGen/AMDGPU/lshl64-to-32.ll
M llvm/test/CodeGen/AMDGPU/narrow_math_for_and.ll
M llvm/test/CodeGen/AMDGPU/reassoc-mul-add-1-to-mad.ll
Log Message:
-----------
[AMDGPU] computeKnownBitsForTargetNode - convert AMDGPUISD::MUL_U24/MUL_I24 handling to use KnownBits::mul (#190600)
Remove custom implementation and rely on KnownBits::mul directly
Commit: e633189784212a568f712f474232f7672fb6d7c7
https://github.com/llvm/llvm-project/commit/e633189784212a568f712f474232f7672fb6d7c7
Author: David Green <david.green at arm.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
M llvm/test/CodeGen/AArch64/ctpop.ll
Log Message:
-----------
[AArch64][GISel] Add widenScalarOrEltToNextPow2OrMinSize for small element vector CTPOP (#189397)
This widens small ctpop to at least i8, preventing types like v8i4 from
falling back.
Commit: c1f295559ae442208df55ca28dcf94c47c8b5752
https://github.com/llvm/llvm-project/commit/c1f295559ae442208df55ca28dcf94c47c8b5752
Author: Owen Anderson <resistor at mac.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M clang/test/Driver/print-supported-extensions-riscv.c
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/test/CodeGen/RISCV/features-info.ll
M llvm/unittests/TargetParser/RISCVISAInfoTest.cpp
Log Message:
-----------
[CHERIoT] Define a RISCV target feature for XCheriot. (#189968)
The specification for this extension is publically available here:
https://github.com/CHERIoT-Platform/cheriot-sail/releases/download/v1.0/cheriot-architecture-v1.0.pdf
This change only adds the target feature, without adding any
functionality gated by it yet. This change is intended to enable
DataLayout-related changes in TargetParser, which depend on RISCVISAInfo
being able at least to recognize the name of this extension.
Commit: 4aeefffd2b4648c1edb05318b71b15c7b07d7620
https://github.com/llvm/llvm-project/commit/4aeefffd2b4648c1edb05318b71b15c7b07d7620
Author: Max Graey <maxgraey at gmail.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M llvm/include/llvm/CodeGen/FunctionLoweringInfo.h
M llvm/include/llvm/Support/KnownBits.h
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
Log Message:
-----------
[KnownBits] Mark constructor for KnownBits as explicit (#190253)
To avoid confusion between constant values and bit widths.
Commit: 80853955c43a86bf4d41e0cae0c829dfd38af44c
https://github.com/llvm/llvm-project/commit/80853955c43a86bf4d41e0cae0c829dfd38af44c
Author: Haojian Wu <hokein.wu at gmail.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M clang/docs/ReleaseNotes.rst
Log Message:
-----------
Add a missing release note for the fix #188239 (#190782)
Commit: bb7e19a23ea1db818702853a538a20ba49fad0f6
https://github.com/llvm/llvm-project/commit/bb7e19a23ea1db818702853a538a20ba49fad0f6
Author: Tim Gymnich <tim at gymni.ch>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
M llvm/test/CodeGen/AMDGPU/fmed3.ll
Log Message:
-----------
[GISel] Fix inverted NaN check in lowerFMinimumMaximum (#190704)
The condition for NaN propagation was using `isKnownNeverNaN(Src1)`
instead of `!isKnownNeverNaN(Src1)`, causing NaN propagation to be
skipped when Src1 might be NaN and incorrectly triggered when Src1 was
known non-NaN.
Update fmed3.ll test checks to reflect correct codegen.
Commit: 43360ebd5129fde6a89a99e11bf0edca2fbfcf72
https://github.com/llvm/llvm-project/commit/43360ebd5129fde6a89a99e11bf0edca2fbfcf72
Author: Alexis Engelke <engelke at in.tum.de>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M llvm/include/llvm/Analysis/BlockFrequencyInfoImpl.h
A llvm/test/Transforms/CodeGenPrepare/X86/verify-bfi-updates.ll
Log Message:
-----------
[Analysis] Fix BFI verify accessing deleted blocks (#190780)
The BFI verifier should ignore basic blocks that got deleted (=number is
still allocated but there is no corresponding block in the function)
since the analysis was first created.
Fixup of #190669.
Commit: 3dcdaf8b160441919b51811ec6c395b6595744fa
https://github.com/llvm/llvm-project/commit/3dcdaf8b160441919b51811ec6c395b6595744fa
Author: Tim Gymnich <tim at gymni.ch>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M llvm/include/llvm/Target/GlobalISel/Combine.td
M llvm/lib/CodeGen/GlobalISel/Utils.cpp
M llvm/test/CodeGen/AArch64/GlobalISel/postlegalizer-combiner-constant-fold.mir
Log Message:
-----------
[GISel] Extend ConstantFoldFPBinOp with fminimumnum, fmaximumnum (#190561)
- Add constant folding for G_FMINIMUMNUM and G_FMAXIMUMNUM using the
minimumnum/maximumnum APFloat helpers.
---------
Co-authored-by: Claude Sonnet 4.6 <noreply at anthropic.com>
Commit: 0e4f9ce0450cea43828a08bf4fcf8ca286a67c75
https://github.com/llvm/llvm-project/commit/0e4f9ce0450cea43828a08bf4fcf8ca286a67c75
Author: Sirui Mu <msrlancern at gmail.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/lib/CIR/CodeGen/CIRGenAtomic.cpp
M clang/test/CIR/CodeGen/atomic-scoped.c
Log Message:
-----------
[CIR] Add support for dynamic atomic sync scope (#189699)
This patch adds support for dynamic atomic sync scope values. It emits a
switch statement to handle different possible sync scope values at
runtime.
Assisted-by: GitHub Copilot / Claude Opus 4.6
Commit: d24e113eb2836492a66e6b65d5c6193a0fbc258e
https://github.com/llvm/llvm-project/commit/d24e113eb2836492a66e6b65d5c6193a0fbc258e
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2026-04-07 (Tue, 07 Apr 2026)
Changed paths:
M .github/workflows/libcxx-build-and-test.yaml
M bolt/lib/Profile/DataReader.cpp
A bolt/test/X86/Inputs/pre-aggregated-buildid-empty.txt
M bolt/test/X86/pre-aggregated-perf-buildid.test
M clang-tools-extra/clang-tidy/ClangTidy.cpp
A clang-tools-extra/clang-tidy/bugprone/AssignmentInSelectionStatementCheck.cpp
A clang-tools-extra/clang-tidy/bugprone/AssignmentInSelectionStatementCheck.h
M clang-tools-extra/clang-tidy/bugprone/BugproneTidyModule.cpp
M clang-tools-extra/clang-tidy/bugprone/CMakeLists.txt
M clang-tools-extra/clang-tidy/cert/CERTTidyModule.cpp
M clang-tools-extra/clang-tidy/misc/UseInternalLinkageCheck.cpp
M clang-tools-extra/clang-tidy/performance/TriviallyDestructibleCheck.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
A clang-tools-extra/docs/clang-tidy/checks/bugprone/assignment-in-selection-statement.rst
A clang-tools-extra/docs/clang-tidy/checks/cert/exp45-c.rst
M clang-tools-extra/docs/clang-tidy/checks/list.rst
M clang-tools-extra/test/CMakeLists.txt
A clang-tools-extra/test/clang-tidy/checkers/bugprone/assignment-in-selection-statement.c
A clang-tools-extra/test/clang-tidy/checkers/bugprone/assignment-in-selection-statement.cpp
A clang-tools-extra/test/clang-tidy/checkers/misc/use-internal-linkage-module-implementation.cpp
A clang-tools-extra/test/clang-tidy/checkers/misc/use-internal-linkage-module-partition.cpp
M clang-tools-extra/test/clang-tidy/checkers/misc/use-internal-linkage-module.cpp
A clang-tools-extra/test/clang-tidy/checkers/performance/trivially-destructible-module.cpp
A clang-tools-extra/test/clang-tidy/infrastructure/cxx20-modules.cppm
M clang-tools-extra/test/lit.cfg.py
M clang/docs/ReleaseNotes.rst
M clang/include/clang/ASTMatchers/ASTMatchFinder.h
M clang/include/clang/Analysis/AnalysisDeclContext.h
M clang/include/clang/CIR/Dialect/IR/CIRAttrs.td
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/include/clang/Options/Options.td
M clang/include/clang/Parse/Parser.h
M clang/include/clang/Serialization/ModuleCache.h
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/CallEvent.h
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/Environment.h
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/ProgramState.h
M clang/lib/AST/StmtProfile.cpp
M clang/lib/ASTMatchers/ASTMatchFinder.cpp
M clang/lib/Analysis/AnalysisDeclContext.cpp
M clang/lib/CIR/CodeGen/CIRGenAtomic.cpp
M clang/lib/CIR/CodeGen/CIRGenBuiltin.cpp
M clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp
M clang/lib/CIR/CodeGen/CIRGenExprConstant.cpp
M clang/lib/CIR/CodeGen/CIRGenTypes.cpp
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/CMakeLists.txt
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
M clang/lib/CodeGen/BackendUtil.cpp
M clang/lib/CrossTU/CrossTranslationUnit.cpp
M clang/lib/DependencyScanning/DependencyScannerImpl.cpp
M clang/lib/DependencyScanning/InProcessModuleCache.cpp
M clang/lib/Driver/ToolChains/Flang.cpp
M clang/lib/Driver/ToolChains/Hexagon.cpp
M clang/lib/ExtractAPI/DeclarationFragments.cpp
M clang/lib/Frontend/CompilerInstance.cpp
M clang/lib/Parse/ParseDecl.cpp
M clang/lib/Parse/ParseObjc.cpp
M clang/lib/Rewrite/Rewriter.cpp
M clang/lib/Sema/DeclSpec.cpp
M clang/lib/Sema/SemaChecking.cpp
M clang/lib/Sema/SemaDecl.cpp
M clang/lib/Serialization/ModuleCache.cpp
M clang/lib/StaticAnalyzer/Checkers/UninitializedObject/UninitializedObjectChecker.cpp
M clang/lib/StaticAnalyzer/Core/BugReporter.cpp
M clang/lib/StaticAnalyzer/Core/CallEvent.cpp
M clang/lib/StaticAnalyzer/Core/Environment.cpp
M clang/lib/StaticAnalyzer/Core/ExprEngine.cpp
M clang/lib/StaticAnalyzer/Core/ExprEngineCXX.cpp
M clang/lib/StaticAnalyzer/Core/ExprEngineCallAndReturn.cpp
M clang/lib/StaticAnalyzer/Core/MemRegion.cpp
M clang/lib/StaticAnalyzer/Core/ProgramState.cpp
M clang/lib/Tooling/JSONCompilationDatabase.cpp
M clang/test/Analysis/bstring.c
M clang/test/CIR/CodeGen/atomic-scoped.c
M clang/test/CIR/CodeGen/static-local.cpp
A clang/test/CIR/CodeGenBuiltins/builtin-fpclassify.c
A clang/test/CIR/CodeGenBuiltins/builtin-signbit.c
M clang/test/CIR/CodeGenBuiltins/builtins-floating-point.c
M clang/test/CIR/Lowering/poison.cir
M clang/test/CXX/dcl.dcl/dcl.spec/dcl.type/dcl.spec.auto/p3-generic-lambda-1y.cpp
M clang/test/CodeGen/AArch64/bf16-getset-intrinsics.c
M clang/test/CodeGen/AArch64/fp8-intrinsics/acle_neon_fp8_untyped.c
M clang/test/CodeGen/AArch64/neon-intrinsics.c
M clang/test/CodeGen/AArch64/neon/bf16-getset.c
A clang/test/CodeGen/AArch64/neon/f16-getset.c
M clang/test/CodeGen/AArch64/neon/intrinsics.c
M clang/test/CodeGen/AArch64/poly64.c
M clang/test/CodeGen/AArch64/v8.2a-neon-intrinsics-generic.c
M clang/test/Driver/hexagon-toolchain-linux.c
M clang/test/Driver/print-supported-extensions-riscv.c
A clang/test/ExtractAPI/type-alias.cpp
M clang/test/Index/extract-api-cursor-cpp.cpp
A clang/test/Modules/callable-require-clause-merge.cppm
M clang/test/Modules/polluted-operator.cppm
M clang/test/Parser/c2x-auto.c
M clang/test/Sema/c2x-auto.c
M clang/test/Sema/constexpr.c
M clang/test/Sema/warn-fortify-source.c
M clang/test/SemaCXX/auto-cxx0x.cpp
A clang/test/SemaTemplate/GH187909.cpp
A clang/test/VFS/Inputs/invalid-key.yaml
A clang/test/VFS/Inputs/invalid-top-level-key.yaml
M clang/test/VFS/parse-errors.c
M clang/unittests/Rewrite/RewriterTest.cpp
M clang/utils/TableGen/CIRLoweringEmitter.cpp
M compiler-rt/CMakeLists.txt
M compiler-rt/cmake/Modules/AddCompilerRT.cmake
M compiler-rt/cmake/Modules/AllSupportedArchDefs.cmake
M compiler-rt/cmake/caches/AMDGPU.cmake
M compiler-rt/cmake/config-ix.cmake
M compiler-rt/lib/sanitizer_common/sanitizer_platform.h
M compiler-rt/lib/ubsan_minimal/ubsan_minimal_handlers.cpp
M compiler-rt/test/ubsan_minimal/CMakeLists.txt
M compiler-rt/test/ubsan_minimal/TestCases/local_bounds.cpp
M flang/include/flang/Frontend/CodeGenOptions.h
M flang/include/flang/Optimizer/Transforms/Passes.td
M flang/include/flang/Tools/CrossToolHelpers.h
M flang/lib/Frontend/CompilerInvocation.cpp
M flang/lib/Frontend/FrontendActions.cpp
M flang/lib/Optimizer/Passes/Pipelines.cpp
M flang/lib/Optimizer/Transforms/FunctionAttr.cpp
M flang/lib/Optimizer/Transforms/StackArrays.cpp
M flang/lib/Semantics/check-cuda.cpp
M flang/lib/Semantics/tools.cpp
A flang/test/Driver/Inputs/pgo-sample.prof
A flang/test/Driver/fprofile-sample-use.f90
A flang/test/Integration/inputs/pgo-sample.prof
A flang/test/Integration/profile-sample-use.f90
M flang/test/Lower/CUDA/cuda-program-global.cuf
M flang/test/Semantics/cuf25.cuf
A flang/test/Transforms/stack-arrays-block-cfg-scope.fir
A flang/test/Transforms/stack-arrays-nested-scope.fir
A flang/test/Transforms/stack-arrays-scope.f90
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/shared/CMakeLists.txt
M libc/shared/rpc.h
M libc/shared/rpc_server.h
M libc/src/__support/OSUtil/linux/syscall_wrappers/CMakeLists.txt
A libc/src/__support/OSUtil/linux/syscall_wrappers/connect.h
R libc/src/__support/RPC/rpc_server.h
M libc/src/__support/arg_list.h
M libc/src/sys/socket/CMakeLists.txt
A libc/src/sys/socket/connect.h
M libc/src/sys/socket/linux/CMakeLists.txt
A libc/src/sys/socket/linux/connect.cpp
M libc/test/integration/src/stdio/gpu/printf_test.cpp
M libc/test/shared/CMakeLists.txt
M libc/test/src/sys/socket/linux/CMakeLists.txt
A libc/test/src/sys/socket/linux/connect_test.cpp
M libcxx/docs/Status/Cxx2cIssues.csv
M libcxx/docs/Status/Cxx2cPapers.csv
M lld/COFF/Config.h
M lld/COFF/Driver.cpp
M lld/COFF/InputFiles.cpp
M lld/COFF/LTO.cpp
M lld/COFF/LTO.h
M lld/COFF/SymbolTable.cpp
M lld/ELF/Driver.cpp
M lld/ELF/LTO.cpp
M lld/ELF/LTO.h
A lld/test/COFF/export-all-conflict.test
M lld/test/COFF/gnu-weak.test
A lld/test/COFF/lto-libcall-archive-bitcode.test
A lld/test/ELF/lto/libcall-archive-bitcode.test
A lld/test/wasm/lto/libcall-archive-bitcode.ll
M lld/wasm/LTO.cpp
M lld/wasm/LTO.h
M lld/wasm/SymbolTable.cpp
M lldb/bindings/interface/SBModuleSpecListExtensions.i
M lldb/include/lldb/Utility/UUID.h
M lldb/packages/Python/lldbsuite/test/make/Makefile.rules
M lldb/source/Host/aix/Host.cpp
M lldb/source/Plugins/Disassembler/LLVMC/DisassemblerLLVMC.cpp
M lldb/source/Plugins/ObjectFile/XCOFF/ObjectFileXCOFF.cpp
M lldb/source/Plugins/ObjectFile/XCOFF/ObjectFileXCOFF.h
M lldb/source/Plugins/SymbolFile/NativePDB/DWARFLocationExpression.cpp
M lldb/source/Plugins/SymbolFile/NativePDB/DWARFLocationExpression.h
M lldb/source/Plugins/SymbolFile/NativePDB/PdbUtil.cpp
M lldb/source/Utility/ArchSpec.cpp
M lldb/test/API/python_api/sbmodule/TestSBModule.py
M lldb/test/Shell/ObjectFile/XCOFF/basic-info32.yaml
A lldb/test/Shell/SymbolFile/NativePDB/structured-bindings-clang.test
M lldb/test/Shell/SymbolFile/NativePDB/structured-bindings-msvc.test
M llvm/docs/ReleaseNotes.md
M llvm/include/llvm/Analysis/BlockFrequencyInfoImpl.h
M llvm/include/llvm/CAS/MappedFileRegionArena.h
M llvm/include/llvm/CodeGen/FunctionLoweringInfo.h
M llvm/include/llvm/CodeGen/LiveIntervals.h
M llvm/include/llvm/CodeGen/Rematerializer.h
M llvm/include/llvm/CodeGen/SelectionDAGNodes.h
M llvm/include/llvm/IR/Instruction.h
M llvm/include/llvm/LTO/LTO.h
M llvm/include/llvm/LTO/LTOBackend.h
M llvm/include/llvm/ProfileData/Coverage/CoverageMapping.h
M llvm/include/llvm/Support/FileSystem.h
M llvm/include/llvm/Support/KnownBits.h
M llvm/include/llvm/Target/GlobalISel/Combine.td
M llvm/include/llvm/Transforms/Utils/CodeMoverUtils.h
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Passes/LoadStoreVec.h
M llvm/lib/Analysis/DependenceAnalysis.cpp
M llvm/lib/Analysis/InlineCost.cpp
M llvm/lib/CAS/DatabaseFile.cpp
M llvm/lib/CAS/MappedFileRegionArena.cpp
M llvm/lib/CAS/OnDiskGraphDB.cpp
M llvm/lib/CAS/OnDiskTrieRawHashMap.cpp
M llvm/lib/CodeGen/CodeGenPrepare.cpp
M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
M llvm/lib/CodeGen/GlobalISel/Utils.cpp
M llvm/lib/CodeGen/PreISelIntrinsicLowering.cpp
M llvm/lib/CodeGen/Rematerializer.cpp
M llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp
M llvm/lib/IR/Verifier.cpp
M llvm/lib/LTO/LTO.cpp
M llvm/lib/LTO/LTOBackend.cpp
M llvm/lib/LTO/LTOCodeGenerator.cpp
M llvm/lib/LTO/ThinLTOCodeGenerator.cpp
M llvm/lib/ProfileData/Coverage/CoverageMapping.cpp
M llvm/lib/Remarks/YAMLRemarkParser.cpp
M llvm/lib/Support/LockFileManager.cpp
M llvm/lib/Support/Unix/Path.inc
M llvm/lib/Support/VirtualFileSystem.cpp
M llvm/lib/Support/Windows/Path.inc
M llvm/lib/Support/YAMLTraits.cpp
M llvm/lib/Target/AArch64/AArch64.h
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/lib/Target/AArch64/AArch64PassRegistry.def
M llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
M llvm/lib/Target/AArch64/GISel/AArch64PreLegalizerCombiner.cpp
M llvm/lib/Target/AArch64/GISel/AArch64RegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
M llvm/lib/Target/AMDGPU/AMDGPUSearchableTables.td
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
M llvm/lib/Target/AMDGPU/GCNVOPDUtils.cpp
M llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SILowerSGPRSpills.cpp
M llvm/lib/Target/AMDGPU/SIMemoryLegalizer.cpp
M llvm/lib/Target/AMDGPU/SOPInstructions.td
M llvm/lib/Target/ARM/ARMFeatures.h
M llvm/lib/Target/ARM/ARMISelLowering.cpp
M llvm/lib/Target/ARM/ARMInstrInfo.td
M llvm/lib/Target/ARM/ARMInstrThumb.td
M llvm/lib/Target/ARM/ARMInstrThumb2.td
M llvm/lib/Target/ARM/ARMLatencyMutations.cpp
M llvm/lib/Target/ARM/ARMScheduleM55.td
M llvm/lib/Target/ARM/ARMScheduleM7.td
M llvm/lib/Target/ARM/ARMScheduleM85.td
M llvm/lib/Target/ARM/ARMScheduleR52.td
M llvm/lib/Target/ARM/Thumb2SizeReduction.cpp
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoP.td
M llvm/lib/Target/RISCV/RISCVInstrInfoZa.td
M llvm/lib/Target/RISCV/RISCVInstrInfoZvk.td
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Transforms/IPO/SampleProfileMatcher.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
M llvm/lib/Transforms/InstCombine/InstCombineInternal.h
M llvm/lib/Transforms/InstCombine/InstCombineLoadStoreAlloca.cpp
M llvm/lib/Transforms/InstCombine/InstCombineShifts.cpp
M llvm/lib/Transforms/Scalar/GVN.cpp
M llvm/lib/Transforms/Scalar/LoopFuse.cpp
M llvm/lib/Transforms/Scalar/LoopIdiomRecognize.cpp
M llvm/lib/Transforms/Utils/CodeMoverUtils.cpp
M llvm/lib/Transforms/Utils/Local.cpp
M llvm/lib/Transforms/Utils/SymbolRewriter.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Passes/LoadStoreVec.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/test/Analysis/DependenceAnalysis/Banerjee.ll
M llvm/test/Analysis/DependenceAnalysis/Propagating.ll
M llvm/test/Analysis/DependenceAnalysis/exact-rdiv-addrec-wrap.ll
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/intrinsics.ll
M llvm/test/CodeGen/AArch64/GlobalISel/combine-2-icmps-of-0-and-or.mir
M llvm/test/CodeGen/AArch64/GlobalISel/postlegalizer-combiner-constant-fold.mir
M llvm/test/CodeGen/AArch64/arm64-int-neon.ll
M llvm/test/CodeGen/AArch64/arm64-vmul.ll
M llvm/test/CodeGen/AArch64/ctpop.ll
A llvm/test/CodeGen/AArch64/neon-mul-shl.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/andn2.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomicrmw_minmax.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomicrmw_udec_wrap.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomicrmw_uinc_wrap.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/call-outgoing-stack-args.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-short-clamp.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/cvt_f32_ubyte.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/extractelement.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/flat-scratch.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/frem.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.i16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.i8.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.rsq.clamp.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.set.inactive.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.update.dpp.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/lshr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/mubuf-global.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/mul-known-bits.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/orn2.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.update.dpp.mir
M llvm/test/CodeGen/AMDGPU/abi-attribute-hints-undefined-behavior.ll
M llvm/test/CodeGen/AMDGPU/agpr-copy-no-free-registers.ll
R llvm/test/CodeGen/AMDGPU/asyncmark-err.ll
A llvm/test/CodeGen/AMDGPU/asyncmark-gfx12plus.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_global_pointer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_local_pointer.ll
M llvm/test/CodeGen/AMDGPU/av_movimm_pseudo_expansion.mir
M llvm/test/CodeGen/AMDGPU/calling-conventions.ll
M llvm/test/CodeGen/AMDGPU/chain-hi-to-lo.ll
M llvm/test/CodeGen/AMDGPU/combine_andor_with_cmps.ll
M llvm/test/CodeGen/AMDGPU/dag-divergence-atomic.ll
M llvm/test/CodeGen/AMDGPU/div_i128.ll
M llvm/test/CodeGen/AMDGPU/ds-sub-offset.ll
M llvm/test/CodeGen/AMDGPU/expand-scalar-carry-out-select-user.ll
M llvm/test/CodeGen/AMDGPU/extract_vector_elt-i8.ll
M llvm/test/CodeGen/AMDGPU/fcanonicalize.ll
M llvm/test/CodeGen/AMDGPU/fcopysign.f16.ll
M llvm/test/CodeGen/AMDGPU/fix-wwm-vgpr-copy.ll
M llvm/test/CodeGen/AMDGPU/fmed3.bf16.ll
M llvm/test/CodeGen/AMDGPU/fmed3.ll
M llvm/test/CodeGen/AMDGPU/fold-int-pow2-with-fmul-or-fdiv.ll
M llvm/test/CodeGen/AMDGPU/fp-atomics-gfx1200.ll
M llvm/test/CodeGen/AMDGPU/fp64-atomics-gfx90a.ll
M llvm/test/CodeGen/AMDGPU/fptoi.i128.ll
M llvm/test/CodeGen/AMDGPU/fptosi-sat-scalar.ll
M llvm/test/CodeGen/AMDGPU/fptosi-sat-vector.ll
M llvm/test/CodeGen/AMDGPU/fptoui-sat-scalar.ll
M llvm/test/CodeGen/AMDGPU/fptoui-sat-vector.ll
M llvm/test/CodeGen/AMDGPU/frem.ll
M llvm/test/CodeGen/AMDGPU/gfx-callable-argument-types.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fmax.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fmin.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fsub.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fadd.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fmax.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fmin.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fsub.ll
M llvm/test/CodeGen/AMDGPU/inflate-av-remat-imm.mir
M llvm/test/CodeGen/AMDGPU/llc-pipeline.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.atomic.dec.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.atomic.inc.ll
A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.gws.barrier-bundle.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.gws.barrier.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.atomic.pk.add.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.init.whole.wave-w64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.quadmask.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.readlane.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.umax.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.set.inactive.chain.arg.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.set.inactive.ll
M llvm/test/CodeGen/AMDGPU/llvm.exp.f64.ll
M llvm/test/CodeGen/AMDGPU/llvm.exp10.f64.ll
M llvm/test/CodeGen/AMDGPU/llvm.exp2.f64.ll
M llvm/test/CodeGen/AMDGPU/llvm.maximum.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.maximum.f32.ll
M llvm/test/CodeGen/AMDGPU/llvm.minimum.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.minimum.f32.ll
M llvm/test/CodeGen/AMDGPU/llvm.set.rounding.ll
M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fmax.ll
M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fmin.ll
M llvm/test/CodeGen/AMDGPU/lrint.ll
M llvm/test/CodeGen/AMDGPU/lround.ll
M llvm/test/CodeGen/AMDGPU/lshl64-to-32.ll
M llvm/test/CodeGen/AMDGPU/mad_64_32.ll
M llvm/test/CodeGen/AMDGPU/memset-pattern.ll
M llvm/test/CodeGen/AMDGPU/misaligned-vgpr-regsequence.mir
M llvm/test/CodeGen/AMDGPU/move-to-valu-lshl_add.ll
M llvm/test/CodeGen/AMDGPU/narrow_math_for_and.ll
M llvm/test/CodeGen/AMDGPU/offset-split-global.ll
M llvm/test/CodeGen/AMDGPU/packed-fp32.ll
M llvm/test/CodeGen/AMDGPU/promote-constOffset-to-imm.ll
M llvm/test/CodeGen/AMDGPU/reassoc-mul-add-1-to-mad.ll
M llvm/test/CodeGen/AMDGPU/rem_i128.ll
M llvm/test/CodeGen/AMDGPU/roundeven.ll
M llvm/test/CodeGen/AMDGPU/rsq.f64.ll
M llvm/test/CodeGen/AMDGPU/sdiv64.ll
M llvm/test/CodeGen/AMDGPU/sgpr-regalloc-flags.ll
M llvm/test/CodeGen/AMDGPU/shift-i128.ll
A llvm/test/CodeGen/AMDGPU/si-lower-sgpr-spills-cycle-header.ll
A llvm/test/CodeGen/AMDGPU/si-lower-sgpr-spills-cycle-header.mir
A llvm/test/CodeGen/AMDGPU/si-lower-sgpr-spills-initial-insert-in-body.mir
A llvm/test/CodeGen/AMDGPU/si-lower-sgpr-spills-initial-insert-in-latch.mir
A llvm/test/CodeGen/AMDGPU/si-lower-sgpr-spills-multi-entry-cycle.mir
M llvm/test/CodeGen/AMDGPU/siloadstoreopt-misaligned-regsequence.ll
M llvm/test/CodeGen/AMDGPU/spill-sgpr-to-virtual-vgpr.mir
M llvm/test/CodeGen/AMDGPU/spill-vgpr-to-agpr-update-regscavenger.ll
M llvm/test/CodeGen/AMDGPU/srem64.ll
M llvm/test/CodeGen/AMDGPU/swdev380865.ll
M llvm/test/CodeGen/AMDGPU/tuple-allocation-failure.ll
M llvm/test/CodeGen/AMDGPU/udiv.ll
M llvm/test/CodeGen/AMDGPU/udiv64.ll
M llvm/test/CodeGen/AMDGPU/uniform-vgpr-to-sgpr-return.ll
M llvm/test/CodeGen/AMDGPU/urem64.ll
M llvm/test/CodeGen/AMDGPU/v_mov_b64_expand_and_shrink.mir
M llvm/test/CodeGen/AMDGPU/v_mov_b64_expansion.mir
M llvm/test/CodeGen/AMDGPU/vector-reduce-fmaximum.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-fminimum.ll
M llvm/test/CodeGen/AMDGPU/vgpr-mark-last-scratch-load.ll
M llvm/test/CodeGen/AMDGPU/wave32.ll
M llvm/test/CodeGen/AMDGPU/widen-smrd-loads.ll
M llvm/test/CodeGen/AMDGPU/wwm-reserved-spill.ll
M llvm/test/CodeGen/AMDGPU/wwm-reserved.ll
M llvm/test/CodeGen/ARM/cmp-to-cmn.ll
M llvm/test/CodeGen/Generic/2010-11-04-BigByval.ll
M llvm/test/CodeGen/RISCV/features-info.ll
M llvm/test/CodeGen/RISCV/rv32p.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-int.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfdiv-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfrdiv-vp.ll
M llvm/test/CodeGen/RISCV/rvv/sink-splat-operands.ll
M llvm/test/CodeGen/RISCV/rvv/undef-vp-ops.ll
M llvm/test/CodeGen/RISCV/rvv/vfdiv-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfrdiv-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vrol.ll
A llvm/test/CodeGen/X86/half-fneg-fabs.ll
A llvm/test/LTO/Resolution/X86/libcall-external.ll
A llvm/test/LTO/Resolution/X86/libcall-in-thin-link.ll
A llvm/test/LTO/Resolution/X86/libcall-in-tu.ll
A llvm/test/MC/AMDGPU/vop3-literal-gfx1250.s
M llvm/test/MC/AMDGPU/vop3-literal.s
M llvm/test/MC/ARM/arm-shift-encoding.s
M llvm/test/MC/ARM/thumb-shift-encoding.s
A llvm/test/Transforms/CodeGenPrepare/X86/verify-bfi-updates.ll
R llvm/test/Transforms/GVN/PRE/protected-field-ptr.ll
M llvm/test/Transforms/Inline/attributes.ll
M llvm/test/Transforms/InstCombine/apint-shift.ll
M llvm/test/Transforms/InstCombine/icmp-select.ll
R llvm/test/Transforms/InstCombine/icmp-shl-add-to-add.ll
A llvm/test/Transforms/InstCombine/protected-field-ptr.ll
M llvm/test/Transforms/InstCombine/ptrauth-intrinsics.ll
M llvm/test/Transforms/LoopIdiom/non-integral-pointers.ll
M llvm/test/Transforms/LoopVectorize/AArch64/find-last-iv-sinkable-expr-epilogue.ll
M llvm/test/Transforms/LoopVectorize/find-last-iv-sinkable-expr-epilogue.ll
M llvm/test/Transforms/LoopVectorize/find-last-iv-sinkable-expr.ll
M llvm/test/Transforms/LoopVectorize/iv-select-cmp-decreasing.ll
M llvm/test/Transforms/PhaseOrdering/phi-protected-field-ptr.ll
A llvm/test/Transforms/PreISelIntrinsicLowering/emupac.ll
M llvm/test/Transforms/PreISelIntrinsicLowering/protected-field-pointer-addrspace1.ll
M llvm/test/Transforms/PreISelIntrinsicLowering/protected-field-pointer.ll
A llvm/test/Transforms/SampleProfile/Inputs/pseudo-probe-stale-profile-backward-matching.prof
A llvm/test/Transforms/SampleProfile/pseudo-probe-stale-profile-backward-matching.ll
M llvm/test/Transforms/SandboxVectorizer/load_store_vec.ll
M llvm/test/Verifier/inline-history-metadata.ll
A llvm/test/tools/llvm-cov/Inputs/main-view-fileid-regression.covmapping
A llvm/test/tools/llvm-cov/Inputs/main-view-fileid-regression.proftext
A llvm/test/tools/llvm-cov/main-view-fileid-regression.test
M llvm/test/tools/llvm-cov/mcdc-const.test
M llvm/test/tools/llvm-cov/mcdc-export-json.test
M llvm/test/tools/llvm-cov/mcdc-general-none.test
M llvm/test/tools/llvm-cov/mcdc-general.test
M llvm/test/tools/llvm-cov/mcdc-macro.test
A llvm/tools/llvm-cas-fuzzer/CMakeLists.txt
A llvm/tools/llvm-cas-fuzzer/DummyCASFuzzer.cpp
A llvm/tools/llvm-cas-fuzzer/cas-fuzzer.cpp
M llvm/tools/llvm-cov/CodeCoverage.cpp
M llvm/tools/llvm-cov/CoverageExporterJson.cpp
M llvm/tools/llvm-cov/CoverageViewOptions.h
M llvm/tools/llvm-cov/SourceCoverageViewHTML.cpp
M llvm/tools/llvm-cov/SourceCoverageViewText.cpp
M llvm/tools/llvm-lto2/llvm-lto2.cpp
M llvm/tools/llvm-profgen/MissingFrameInferrer.cpp
M llvm/tools/llvm-profgen/PerfReader.h
M llvm/tools/llvm-profgen/ProfileGenerator.cpp
M llvm/tools/llvm-profgen/ProfileGenerator.h
M llvm/tools/llvm-profgen/llvm-profgen.cpp
M llvm/tools/sancov/sancov.cpp
M llvm/unittests/CodeGen/RematerializerTest.cpp
M llvm/unittests/Support/LockFileManagerTest.cpp
M llvm/unittests/Support/Path.cpp
M llvm/unittests/TargetParser/RISCVISAInfoTest.cpp
M llvm/utils/TableGen/AsmMatcherEmitter.cpp
M mlir/include/mlir/Dialect/ControlFlow/IR/ControlFlowOps.td
M mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVTosaTypes.td
M mlir/include/mlir/IR/BuiltinDialectBytecode.td
M mlir/include/mlir/Interfaces/ControlFlowInterfaces.td
M mlir/include/mlir/Reducer/ReductionNode.h
M mlir/lib/Dialect/ControlFlow/IR/ControlFlowOps.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUWgToSgDistribute.cpp
M mlir/lib/ExecutionEngine/CudaRuntimeWrappers.cpp
M mlir/lib/Reducer/CMakeLists.txt
M mlir/lib/Reducer/ReductionNode.cpp
M mlir/lib/Reducer/ReductionTreePass.cpp
M mlir/lib/Target/LLVMIR/ModuleImport.cpp
M mlir/lib/Target/LLVMIR/ModuleTranslation.cpp
M mlir/lib/Transforms/CSE.cpp
M mlir/test/Dialect/SPIRV/IR/tosa-ops-verification.mlir
M mlir/test/Dialect/XeGPU/xegpu-wg-to-sg-unify-ops-rr.mlir
M mlir/test/Dialect/XeGPU/xegpu-wg-to-sg-unify-ops.mlir
A mlir/test/Target/LLVMIR/Import/use-sample-profile.ll
A mlir/test/Target/LLVMIR/use-sample-profile.mlir
A mlir/test/mlir-reduce/false.sh
M mlir/test/mlir-reduce/invalid.mlir
M mlir/test/mlir-reduce/reduction-tree.mlir
M mlir/test/mlir-reduce/simple-test.mlir
R mlir/test/mlir-reduce/test.sh
A mlir/test/mlir-reduce/true.sh
M mlir/unittests/Bytecode/BytecodeTest.cpp
M offload/CMakeLists.txt
M offload/cmake/Modules/LibomptargetGetDependencies.cmake
M offload/plugins-nextgen/common/src/RPC.cpp
M offload/plugins-nextgen/level_zero/CMakeLists.txt
A offload/plugins-nextgen/level_zero/dynamic_l0/L0DynWrapper.cpp
A offload/plugins-nextgen/level_zero/dynamic_l0/level_zero/ze_api.h
A offload/plugins-nextgen/level_zero/dynamic_l0/level_zero/zes_api.h
R offload/plugins-nextgen/level_zero/src/L0DynWrapper.cpp
M offload/plugins-nextgen/level_zero/src/L0Kernel.cpp
M offload/plugins-nextgen/level_zero/src/L0Program.cpp
M orc-rt/include/orc-rt/Session.h
M orc-rt/lib/executor/Session.cpp
M orc-rt/unittests/SessionTest.cpp
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
M utils/bazel/llvm-project-overlay/third-party/unittest/BUILD.bazel
Log Message:
-----------
Merge branch 'main' into users/kparzysz/e18-fix-affected-depth
Compare: https://github.com/llvm/llvm-project/compare/8bfcd37abeab...d24e113eb283
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