[all-commits] [llvm/llvm-project] 36fa27: [AArch64][GlobalISel] Add patterns for scalar sqdm...

[Joshua Rodriguez via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 36fa27fe3e11df54c5c20402a45aa90503db4cc6
      https://github.com/llvm/llvm-project/commit/36fa27fe3e11df54c5c20402a45aa90503db4cc6
  Author: Joshua Rodriguez <josh.rodriguez at arm.com>
  Date:   2026-04-07 (Tue, 07 Apr 2026)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64InstrInfo.td
    M llvm/lib/Target/AArch64/GISel/AArch64RegisterBankInfo.cpp
    M llvm/test/CodeGen/AArch64/arm64-int-neon.ll
    M llvm/test/CodeGen/AArch64/arm64-vmul.ll

  Log Message:
  -----------
  [AArch64][GlobalISel] Add patterns for scalar sqdmlal/sqdmlsl (#187246)

SQMLAL's instruction selection patterns don't work for GlobalISel when
the intrinsic has scalar operands. This is because the intrinsic has a
slightly different name (int_aarch64_neon_sqdmulls_scalar). As a result,
this leads to sub-optimal code generation.
This patch allows sqdmulls_scalar to lower, and adds GlobalISel versions
of the TableGen patterns to provide this optimisation.

The pattern added performs this mapping:
`SQADD(a, SQDMULL(b,c)) -> SQDMLAL(a, b, c) [And equivalent for
subtraction]`



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