[all-commits] [llvm/llvm-project] e98466: [RISCV] Use a vector MemVT when converting store+e...

[Craig Topper via All-commits]

  Branch: refs/heads/release/22.x
  Home:   https://github.com/llvm/llvm-project
  Commit: e9846648fd6183ee6d8cbdb4502213fcf902a211
      https://github.com/llvm/llvm-project/commit/e9846648fd6183ee6d8cbdb4502213fcf902a211
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2026-04-06 (Mon, 06 Apr 2026)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
    A llvm/test/CodeGen/RISCV/rvv/pr189037.ll

  Log Message:
  -----------
  [RISCV] Use a vector MemVT when converting store+extractelt into a vector store. (#190107)

This is needed so that `allowsMemoryAccessForAlignment` checks for
unaligned vector memory
support instead of unaligned scalar memory support when called from
`RISCVTargetLowering::expandUnalignedVPStore`

While there remove incorrect setting of the truncating store flag
on the vector instruction. And restrict the transform to simple stores
since we don't have tests for volatile or atomic.

Fixes #189037

(cherry picked from commit b44d2c977ce2e5dbf9f227bd6ade5d85ae69a463)



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