[all-commits] [llvm/llvm-project] bdbe81: [lldb/test] Remove stale Windows expectedFailure d...
Ziqing Luo via All-commits
all-commits at lists.llvm.org
Wed Apr 1 16:08:59 PDT 2026
Branch: refs/heads/users/ziqingluo/eng/PR-171920065
Home: https://github.com/llvm/llvm-project
Commit: bdbe816cee6311b5baa26601854ad0769d01481e
https://github.com/llvm/llvm-project/commit/bdbe816cee6311b5baa26601854ad0769d01481e
Author: Med Ismail Bennani <ismail at bennani.ma>
Date: 2026-03-25 (Wed, 25 Mar 2026)
Changed paths:
M lldb/test/API/functionalities/scripted_frame_provider/circular_dependency/TestFrameProviderCircularDependency.py
M lldb/test/API/functionalities/scripted_frame_provider/pass_through_prefix/TestFrameProviderPassThroughPrefix.py
Log Message:
-----------
[lldb/test] Remove stale Windows expectedFailure decorators (NFC)
The @expectedFailureAll decorators for Windows (llvm.org/pr24778) are no
longer needed on test_circular_dependency_handle_command_in_init and
test_provider_receives_parent_frames.
Signed-off-by: Med Ismail Bennani <ismail at bennani.ma>
Commit: b95b902bb7dd8875efe75a6955a8a4b4c7063d25
https://github.com/llvm/llvm-project/commit/b95b902bb7dd8875efe75a6955a8a4b4c7063d25
Author: Anshul Nigham <nigham at google.com>
Date: 2026-03-25 (Wed, 25 Mar 2026)
Changed paths:
M lldb/include/lldb/Target/Process.h
M lldb/source/Target/Process.cpp
M lldb/source/Target/ProcessTrace.cpp
Log Message:
-----------
[LLDB] Use shared_ptr for m_current_private_state_thread (#188542)
Avoids manual memory management.
Uses `shared_ptr` instead of `unique_ptr` because we store references to
the current thread in a backup variable.
Simplifies the private thread `is_secondary` semantics by providing a
backup storage for the current thread instead of a boolean value with a
contract to manage the backup separately.
Commit: 983b2023ddc366369ef1d5b8a705e87466ae7991
https://github.com/llvm/llvm-project/commit/983b2023ddc366369ef1d5b8a705e87466ae7991
Author: Zeyi Xu <mitchell.xu2 at gmail.com>
Date: 2026-03-26 (Thu, 26 Mar 2026)
Changed paths:
M clang-tools-extra/test/clang-tidy/checkers/android/cloexec-accept.cpp
M clang-tools-extra/test/clang-tidy/checkers/android/cloexec-accept4.cpp
M clang-tools-extra/test/clang-tidy/checkers/android/cloexec-memfd-create.cpp
M clang-tools-extra/test/clang-tidy/checkers/android/cloexec-pipe2.cpp
M clang-tools-extra/test/clang-tidy/checkers/bugprone/posix-return.cpp
M clang-tools-extra/test/clang-tidy/checkers/bugprone/spuriously-wake-up-functions.c
M clang-tools-extra/test/clang-tidy/checkers/bugprone/spuriously-wake-up-functions.cpp
M clang-tools-extra/test/clang-tidy/checkers/modernize/redundant-void-arg.c
M clang-tools-extra/test/clang-tidy/checkers/modernize/redundant-void-arg.cpp
M clang-tools-extra/test/clang-tidy/checkers/modernize/use-nullptr-basic.cpp
M clang-tools-extra/test/clang-tidy/checkers/modernize/use-nullptr-c23.c
M clang-tools-extra/test/clang-tidy/checkers/modernize/use-nullptr.c
M clang-tools-extra/test/clang-tidy/checkers/modernize/use-nullptr.cpp
M clang-tools-extra/test/clang-tidy/checkers/readability/delete-null-pointer.cpp
M clang-tools-extra/test/clang-tidy/checkers/readability/implicit-bool-conversion.c
M clang-tools-extra/test/clang-tidy/checkers/readability/isolate-declaration.cpp
M clang-tools-extra/test/clang-tidy/checkers/readability/redundant-smartptr-get-msvc.cpp
M clang-tools-extra/test/clang-tidy/checkers/readability/redundant-smartptr-get.cpp
Log Message:
-----------
[clang-tidy][NFC] Use mock header instead of #define NULL in tests (#188420)
Since stddef.h in the mock headers of clang-tidy tests now provides
`#define NULL 0L`, we can migrate manual `#define NULL` in these tests
to standard `#include`s.
Commit: 901073a9a8d81c24742e884ed7aa371758a5bfdb
https://github.com/llvm/llvm-project/commit/901073a9a8d81c24742e884ed7aa371758a5bfdb
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-03-25 (Wed, 25 Mar 2026)
Changed paths:
M clang/test/Driver/print-supported-extensions-riscv.c
M clang/test/Preprocessor/riscv-target-features.c
M llvm/docs/RISCVUsage.rst
M llvm/docs/ReleaseNotes.md
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/lib/Target/RISCV/RISCVInstrInfoP.td
M llvm/test/CodeGen/RISCV/attributes.ll
M llvm/test/MC/RISCV/attribute-arch.s
M llvm/test/MC/RISCV/rv32p-valid.s
M llvm/test/MC/RISCV/rv64p-valid.s
M llvm/unittests/TargetParser/RISCVISAInfoTest.cpp
Log Message:
-----------
[RISCV] Update P extension to 0.21 (#188121)
Add the new shift and pnclip instructions.
Spec PR https://github.com/riscv/riscv-p-spec/pull/237
Commit: 5a2fedf91d9dd9e834809677e0213865a3ad1740
https://github.com/llvm/llvm-project/commit/5a2fedf91d9dd9e834809677e0213865a3ad1740
Author: lntue <lntue at google.com>
Date: 2026-03-25 (Wed, 25 Mar 2026)
Changed paths:
M libc/src/__support/CPP/type_traits/is_constant_evaluated.h
M libc/src/__support/macros/attributes.h
M libc/src/__support/macros/config.h
Log Message:
-----------
[libc][msvc] Re-enable __builtin_is_constant_evaluated for MSVC. (#188663)
Commit: 655618305ec8584c3be84c1aec6f9f57c9a323d9
https://github.com/llvm/llvm-project/commit/655618305ec8584c3be84c1aec6f9f57c9a323d9
Author: Sudharsan Veeravalli <svs at qti.qualcomm.com>
Date: 2026-03-26 (Thu, 26 Mar 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoXqci.td
M llvm/test/CodeGen/RISCV/xqciac.ll
M llvm/test/MC/RISCV/xqciac-valid.s
Log Message:
-----------
[RISCV] Add compress pattern for QC_SHLADD Rd, Rs1, Rd, 4 to QC_C_MULIADD Rd, Rs1, 16 (#188516)
Commit: 4814a9f2707d214924556df7c0b94bdb5b804404
https://github.com/llvm/llvm-project/commit/4814a9f2707d214924556df7c0b94bdb5b804404
Author: Lang Hames <lhames at gmail.com>
Date: 2026-03-26 (Thu, 26 Mar 2026)
Changed paths:
M llvm/lib/ExecutionEngine/Orc/LinkGraphLinkingLayer.cpp
Log Message:
-----------
[ORC] Fix typo in comment. NFC. (#188664)
Commit: 3fcf10ca3b2cedecd3ba2cd01d860815a605b39d
https://github.com/llvm/llvm-project/commit/3fcf10ca3b2cedecd3ba2cd01d860815a605b39d
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-03-26 (Thu, 26 Mar 2026)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ByteCode/EvalEmitter.cpp
M clang/lib/AST/ByteCode/Interp.cpp
M clang/lib/AST/ByteCode/Interp.h
M clang/lib/AST/ByteCode/InterpState.h
M clang/lib/AST/ByteCode/Opcodes.td
M clang/test/SemaCXX/cxx2b-deducing-this.cpp
M clang/test/SemaTemplate/stack-exhaustion.cpp
M clang/utils/TableGen/ClangOpcodesEmitter.cpp
Log Message:
-----------
[clang][bytecode] Reapply "Use tailcalls via `[[clang::musttail]]`" (#188419)
1) Disable tailcalls on powerpc and MSVC
2) Disable the `preserve_none` calling convention on aarch64 and i386.
For aarch64, it works but causes problems under asan:
https://github.com/llvm/llvm-project/issues/177519
Commit: 6937866f5ca6c9fbe47e4b995341bf42bf76e640
https://github.com/llvm/llvm-project/commit/6937866f5ca6c9fbe47e4b995341bf42bf76e640
Author: Jordan Rupprecht <rupprecht at google.com>
Date: 2026-03-26 (Thu, 26 Mar 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
Log Message:
-----------
Revert "[SLP][NFC] Refactor to prepare for constant stride stores" (#188669)
Revert 26f344e1703229aea20df616b1dbc949fbc332e1.
Causes crashes. Reduced test case:
https://github.com/llvm/llvm-project/pull/185997#issuecomment-4131405777
Commit: 64e7c77e04406f017c71a313b304b3369f79e04a
https://github.com/llvm/llvm-project/commit/64e7c77e04406f017c71a313b304b3369f79e04a
Author: Alex Duran <alejandro.duran at intel.com>
Date: 2026-03-26 (Thu, 26 Mar 2026)
Changed paths:
M offload/plugins-nextgen/level_zero/include/L0Trace.h
M offload/plugins-nextgen/level_zero/src/L0Device.cpp
M offload/plugins-nextgen/level_zero/src/L0Kernel.cpp
M offload/plugins-nextgen/level_zero/src/L0Memory.cpp
M offload/plugins-nextgen/level_zero/src/L0Program.cpp
Log Message:
-----------
[OFFLOAD][L0] More error handling (#188496)
This PR improves cleanup/handling of errors in some memory operations,
allocating event pools, ...
Commit: 91439985b3a68d685b75230b099a05c1573ca8e9
https://github.com/llvm/llvm-project/commit/91439985b3a68d685b75230b099a05c1573ca8e9
Author: Justin Bogner <mail at justinbogner.com>
Date: 2026-03-25 (Wed, 25 Mar 2026)
Changed paths:
M llvm/test/CodeGen/DirectX/llc-pipeline.ll
Log Message:
-----------
[DirectX] Fix llc-pipeline test after #188573 (#188676)
Missed this update in the previous commit. We now expect CycleInfo
instead of LoopInfo.
Commit: 28497b7e43a36928b5968938766eccbe3de968d5
https://github.com/llvm/llvm-project/commit/28497b7e43a36928b5968938766eccbe3de968d5
Author: Ruiling, Song <ruiling.song at amd.com>
Date: 2026-03-26 (Thu, 26 Mar 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUPromoteAlloca.cpp
A llvm/test/CodeGen/AMDGPU/promote-alloca-proper-value-replacement.ll
Log Message:
-----------
AMDGPU: Make VarIndex a WeakVH in AMDGPUPromoteAlloca (#188662)
The VarIndex might come from (like load) another alloca which maybe
promoted before. The value will replaced in this case. WeakVH correctly
handles this.
Commit: dfab4fbb81acc7d1c84097b124c6d5e7eb6c1c64
https://github.com/llvm/llvm-project/commit/dfab4fbb81acc7d1c84097b124c6d5e7eb6c1c64
Author: Mark Zhuang <mark.zhuang at spacemit.com>
Date: 2026-03-26 (Thu, 26 Mar 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
M llvm/lib/Target/RISCV/RISCVProcessors.td
M llvm/test/CodeGen/RISCV/features-info.ll
M llvm/test/CodeGen/RISCV/rvv/vxrm-insert-out-of-loop.ll
A llvm/test/CodeGen/RISCV/spacemitx60-stack-reorder.ll
M llvm/unittests/TargetParser/RISCVTargetParserTest.cpp
Log Message:
-----------
[RISCV] Add TunePreferAscendingLoadStore for SpacemiT X60 LD/ST fusion (#186967)
Add a tune feature that reverses the callee-saved register spill/restore
order so that addresses are ascending, enabling LD/ST fusion on
processors like SpacemiT X60.
Co-authored-by: LiqinWeng <liqin.weng at spacemit.com>
Co-authored-by: Claude Opus 4.6 <noreply at anthropic.com>
Commit: 36aef4ba811a2ef24abb0050f4b23b7c6d4f6c87
https://github.com/llvm/llvm-project/commit/36aef4ba811a2ef24abb0050f4b23b7c6d4f6c87
Author: Fangrui Song <i at maskray.me>
Date: 2026-03-25 (Wed, 25 Mar 2026)
Changed paths:
A lld/test/ELF/merge-piece-oob.s
R lld/test/ELF/relocation-before-merge-start.s
R lld/test/ELF/relocation-past-merge-end.s
Log Message:
-----------
[ELF,test] Combine merge section out-of-bounds tests into merge-piece-oob.s (#188688)
Commit: 25904ac91554f0a94fbe2fc8715a16e17a84ce2b
https://github.com/llvm/llvm-project/commit/25904ac91554f0a94fbe2fc8715a16e17a84ce2b
Author: Jake Egan <Jake.egan at ibm.com>
Date: 2026-03-26 (Thu, 26 Mar 2026)
Changed paths:
M compiler-rt/lib/sanitizer_common/CMakeLists.txt
A compiler-rt/lib/sanitizer_common/sanitizer_unwind_aix.cpp
Log Message:
-----------
[sanitizer_common] Implement address sanitizer on AIX: stack unwinding (#138188)
Implement unwind.h-based stack unwinding routines on AIX.
Issue: https://github.com/llvm/llvm-project/issues/138916
Commit: f2f94597671f897dc939facd756f0be58fdf017e
https://github.com/llvm/llvm-project/commit/f2f94597671f897dc939facd756f0be58fdf017e
Author: Med Ismail Bennani <ismail at bennani.ma>
Date: 2026-03-25 (Wed, 25 Mar 2026)
Changed paths:
M lldb/source/Target/Thread.cpp
Log Message:
-----------
[lldb] Protect frame provider construction from re-entrant frame access
When a scripted frame provider calls HandleCommand or other
frame-accessing APIs during __init__, GetStackFrameList() re-enters
without the re-entrancy guard, causing infinite recursion. On Windows
(1MB default stack), this results in a stack overflow (0xC00000FD)
before Python's recursion limit can intervene.
The existing PushProviderFrameList/PopProviderFrameList guard only
protected GetFrameAtIndex calls in FetchFramesUpTo. This wraps the
CreateInstance call in LoadScriptedFrameProvider with the same guard
so that provider construction is also protected.
Signed-off-by: Med Ismail Bennani <ismail at bennani.ma>
Commit: 300921157385c5f6e0884537510c3ce1f336cd8c
https://github.com/llvm/llvm-project/commit/300921157385c5f6e0884537510c3ce1f336cd8c
Author: Kaviya Rajendiran <67495422+kaviya2510 at users.noreply.github.com>
Date: 2026-03-26 (Thu, 26 Mar 2026)
Changed paths:
M clang/include/clang/Driver/CommonArgs.h
M clang/include/clang/Options/Options.td
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/Driver/ToolChains/CommonArgs.cpp
M clang/lib/Driver/ToolChains/Flang.cpp
M flang/include/flang/Frontend/CodeGenOptions.def
M flang/include/flang/Optimizer/Passes/Pipelines.h
M flang/include/flang/Optimizer/Transforms/Passes.td
M flang/include/flang/Tools/CrossToolHelpers.h
M flang/lib/Frontend/CompilerInvocation.cpp
M flang/lib/Frontend/FrontendActions.cpp
M flang/lib/Optimizer/Passes/Pipelines.cpp
M flang/lib/Optimizer/Transforms/AddDebugInfo.cpp
A flang/test/Driver/fdebug-info-for-profiling.f90
A flang/test/Integration/debug-info-for-profiling.f90
M llvm/include/llvm/IR/DebugInfoMetadata.h
M mlir/include/mlir-c/Dialect/LLVM.h
M mlir/include/mlir/Dialect/LLVMIR/LLVMAttrDefs.td
M mlir/include/mlir/Dialect/LLVMIR/LLVMDialectBytecode.td
M mlir/lib/CAPI/Dialect/LLVM.cpp
M mlir/lib/Target/LLVMIR/DebugImporter.cpp
M mlir/lib/Target/LLVMIR/DebugTranslation.cpp
M mlir/test/CAPI/llvm.c
M mlir/test/Dialect/LLVMIR/debuginfo.mlir
M mlir/test/Target/LLVMIR/Import/debug-info.ll
M mlir/test/Target/LLVMIR/llvmir-debug.mlir
Log Message:
-----------
[LLVM-Flang] Add support for -fdebug-info-for-profiling option (#188022)
Added support for option "-fdebug-info-for-profiling" in flang.
- When the option `-fdebug-info-for-profiling` option is passed,
compiler sets the `DebugInfoForProfiling` flag and triggers the
`AddDiscriminatorsPass`. This pass inserts additional debug metadata,
specifically discriminator values into the IR to improve the profiling
precision.
- Additionally `-add-debug-info` pass has been updated to emit an extra
field, `debugInfoForProfiling: true` inside the generated DICompileUnit
metadata node.
Commit: 8e2a5e37eaf638c536dd71cb685843e8cb2aed2c
https://github.com/llvm/llvm-project/commit/8e2a5e37eaf638c536dd71cb685843e8cb2aed2c
Author: Ryotaro Kasuga <kasuga.ryotaro at fujitsu.com>
Date: 2026-03-26 (Thu, 26 Mar 2026)
Changed paths:
M llvm/include/llvm/Analysis/DependenceAnalysis.h
M llvm/lib/Analysis/DependenceAnalysis.cpp
Log Message:
-----------
[DA] Consolidate the core logic of the Weak Zero SIV tests (NFCI) (#185577)
There have existed two functions `weakZeroSrcSIVtest` and
`weakZeroDstSIVtest`, which are almost identical, except for some minor
differences (e.g., the Direction to be updated). This patch consolidates
the shared core logic into a single function `weakZeroSIVtestImpl` then
calls it from both `weakZeroSrcSIVtest` and `weakZeroDstSIVtest`,
passing the appropriate parameters to handle the differences. This
reduces code duplication and improves maintainability.
Commit: a0181d0507edb794d67555645aa9d66b5ffdd07f
https://github.com/llvm/llvm-project/commit/a0181d0507edb794d67555645aa9d66b5ffdd07f
Author: Piotr Fusik <p.fusik at samsung.com>
Date: 2026-03-26 (Thu, 26 Mar 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/test/CodeGen/AArch64/logical-op-with-not.ll
M llvm/test/CodeGen/AArch64/neon-bitwise-instructions.ll
M llvm/test/CodeGen/AArch64/sve-int-log.ll
Log Message:
-----------
[AArch64] Sink NOT to be fold into BIC/ORN/EON (#176194)
Undoes a negation being hoisted out of a loop, so that if can be fold
into an inverted bitwise operation in the loop.
Implements #108840 on AArch64
Commit: e69c7312f31be57af5ef17ada7466b46f8519f2a
https://github.com/llvm/llvm-project/commit/e69c7312f31be57af5ef17ada7466b46f8519f2a
Author: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
Date: 2026-03-26 (Thu, 26 Mar 2026)
Changed paths:
M clang/lib/CodeGen/TargetBuiltins/AMDGPU.cpp
M clang/lib/Sema/SemaAMDGPU.cpp
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx1250-wmma-w32.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx1250-wmma-w32-param.cl
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/lib/IR/AutoUpgrade.cpp
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/intrinsics.ll
A llvm/test/Bitcode/amdgpu-wmma-drop-ab-mods-upgrade-err.ll
A llvm/test/Bitcode/amdgpu-wmma-drop-ab-mods-upgrade.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wmma.gfx1250.w32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wmma.imm.gfx1250.w32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wmma.imod.gfx1250.w32.ll
M llvm/test/CodeGen/AMDGPU/vgpr-lowering-gfx1250.mir
M llvm/test/CodeGen/AMDGPU/wmma-coexecution-valu-hazards.mir
M llvm/test/CodeGen/AMDGPU/wmma-hazards-gfx1250-w32.mir
M llvm/test/CodeGen/AMDGPU/wmma-nop-hoisting.mir
M mlir/include/mlir/Dialect/LLVMIR/ROCDLOps.td
M mlir/test/Target/LLVMIR/rocdl.mlir
Log Message:
-----------
[AMDGPU] Disable neg_lo[0:1] and neg_hi[0:1] on wmma_f32_16x16x32_bf16 (#188649)
This is the pilot change, the rest will follow the same idea.
Commit: 2f11484baa53b0cd95d2368b03d9cac5e8dae8a1
https://github.com/llvm/llvm-project/commit/2f11484baa53b0cd95d2368b03d9cac5e8dae8a1
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-03-26 (Thu, 26 Mar 2026)
Changed paths:
M libclc/clc/lib/generic/math/clc_erf.cl
A libclc/clc/lib/generic/math/clc_erf.inc
Log Message:
-----------
libclc: Update erf (#188569)
This was originally ported from rocm device libs in
c374cb76f467f01a3f60740703f995a0e1f7a89a. Merge in more
recent changes. Also enables vectorization.
Commit: 3aeea1037144d5f825b879147908ee3cdc498579
https://github.com/llvm/llvm-project/commit/3aeea1037144d5f825b879147908ee3cdc498579
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-03-26 (Thu, 26 Mar 2026)
Changed paths:
M libclc/clc/lib/generic/math/clc_erfc.cl
A libclc/clc/lib/generic/math/clc_erfc.inc
Log Message:
-----------
libclc: Update erfc (#188570)
This was originally ported from rocm device libs in
2cf4d5f31204c873d76953bfe3c8b5602b29e789. Merge in more
recent changes.
Commit: 80831832e03f8184fb24ffd08ccba59d4e57ec0e
https://github.com/llvm/llvm-project/commit/80831832e03f8184fb24ffd08ccba59d4e57ec0e
Author: Simon Tatham <simon.tatham at arm.com>
Date: 2026-03-26 (Thu, 26 Mar 2026)
Changed paths:
M compiler-rt/lib/builtins/CMakeLists.txt
A compiler-rt/lib/builtins/arm/dnan2.c
A compiler-rt/lib/builtins/arm/dnorm2.c
A compiler-rt/lib/builtins/arm/dunder.c
A compiler-rt/lib/builtins/arm/endian.h
Log Message:
-----------
[compiler-rt][ARM] Double-precision FP support functions (#179920)
This commit adds C helper functions `dnan2`, `dnorm2` and `dunder` for
handling the less critical edge cases of double-precision arithmetic,
similar to `fnan2`, `fnorm2` and `funder` that were added in commit
f7e652127772e93.
It also adds a header file that defines some register aliases for
handling double-precision numbers in AArch32 software floating point in
an endianness-independent way, by providing aliases `xh` and `xl` for
the high and low words of the first double-precision function argument,
regardless of which of them is in r0 and which in r1, and similarly `yh`
and `yl` for the second argument in r2/r3.
Commit: 948a91429e770f546129f1f88034ed96b1940179
https://github.com/llvm/llvm-project/commit/948a91429e770f546129f1f88034ed96b1940179
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2026-03-26 (Thu, 26 Mar 2026)
Changed paths:
M lldb/source/Core/Module.cpp
Log Message:
-----------
[lldb][Module][NFC] Remove redundant FileSpec validity check (#188708)
We already do the validity check inside of
`FileSystem::Instance().Exists`.
Commit: 465f96927df37e8dd90bf05ebd84b45cf71285db
https://github.com/llvm/llvm-project/commit/465f96927df37e8dd90bf05ebd84b45cf71285db
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2026-03-26 (Thu, 26 Mar 2026)
Changed paths:
M lldb/source/Core/Module.cpp
Log Message:
-----------
[lldb][Module][NFC] Extract script loading logic into helper (#188712)
Planning on re-using this within the same function. Extracting into
helper makes that slightly more readable.
Commit: 42a77ce3d6ee47bf37351f3a7fb6bf5b341354e6
https://github.com/llvm/llvm-project/commit/42a77ce3d6ee47bf37351f3a7fb6bf5b341354e6
Author: Jared Wyles <jared.wyles at gmail.com>
Date: 2026-03-26 (Thu, 26 Mar 2026)
Changed paths:
M orc-rt/include/orc-rt/Error.h
M orc-rt/lib/executor/Error.cpp
M orc-rt/lib/executor/SimpleNativeMemoryMap.cpp
Log Message:
-----------
[orc-rt] Add missing includes for Linux/ARM builds (#188702)
Fixes compilation errors due to missing includes.
Commit: 48911ca1439156074ceef290754a7180c37e6930
https://github.com/llvm/llvm-project/commit/48911ca1439156074ceef290754a7180c37e6930
Author: Nerixyz <nerixdev at outlook.de>
Date: 2026-03-26 (Thu, 26 Mar 2026)
Changed paths:
M llvm/include/llvm/DebugInfo/LogicalView/Core/LVSupport.h
M llvm/include/llvm/DebugInfo/LogicalView/Readers/LVCodeViewVisitor.h
M llvm/lib/DebugInfo/LogicalView/Core/LVLocation.cpp
M llvm/lib/DebugInfo/LogicalView/Readers/LVCodeViewVisitor.cpp
A llvm/test/tools/llvm-debuginfo-analyzer/COFF/07-coff-regrel-indir.test
A llvm/test/tools/llvm-debuginfo-analyzer/COFF/Inputs/defrange-regrel-indir-clang.yaml
Log Message:
-----------
[llvm-debuginfo-analyzer] Support `S_DEFRANGE_REGISTER_REL_INDIR` (#187531)
#186410 added support for reading `S_DEFRANGE_REGISTER_REL_INDIR` in
LLVM's CodeView. This adds support for printing it in
llvm-debuginfo-analyzer. This record is not (yet) generated by LLVM. It
encodes an indirect location like `S_REGREL32_INDIR` but for a range (so
it's conceptually a child of `S_LOCAL` which only encodes _some_
variable in a function).
---------
Co-authored-by: Javier Lopez-Gomez <javier.lopez.gomez at proton.me>
Commit: 158282b17652acd3a5ab282dbcc54967fd9837d7
https://github.com/llvm/llvm-project/commit/158282b17652acd3a5ab282dbcc54967fd9837d7
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-03-26 (Thu, 26 Mar 2026)
Changed paths:
M libclc/clc/lib/generic/math/clc_atan2.cl
M libclc/clc/lib/generic/math/clc_atan2.inc
Log Message:
-----------
libclc: Update atan2 (#188706)
This was originally ported from rocm device libs in
f9caca8b9dd26a9e7a13e5ca8be57100578e3432. Update for more
recent changes.
Commit: 45d243df43ee57e68804862e3b37b2ac16be139e
https://github.com/llvm/llvm-project/commit/45d243df43ee57e68804862e3b37b2ac16be139e
Author: Med Ismail Bennani <ismail at bennani.ma>
Date: 2026-03-26 (Thu, 26 Mar 2026)
Changed paths:
M lldb/test/API/functionalities/scripted_frame_provider/circular_dependency/TestFrameProviderCircularDependency.py
M lldb/test/API/functionalities/scripted_frame_provider/pass_through_prefix/TestFrameProviderPassThroughPrefix.py
Log Message:
-----------
[lldb/test] Remove stale arm Linux expectedFailure decorators (NFC)
These tests no longer fail on arm Linux after the frame provider
re-entrancy fixes, so remove the decorators.
XPASS: https://lab.llvm.org/buildbot/#/builders/18/builds/25348
Signed-off-by: Med Ismail Bennani <ismail at bennani.ma>
Commit: 40304d8fefc8872dc8dd2c53f67c7303e40ea727
https://github.com/llvm/llvm-project/commit/40304d8fefc8872dc8dd2c53f67c7303e40ea727
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-03-26 (Thu, 26 Mar 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.h
M llvm/test/Transforms/LoopVectorize/AArch64/clamped-trip-count.ll
M llvm/test/Transforms/LoopVectorize/AArch64/force-target-instruction-cost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/low_trip_count_predicates.ll
M llvm/test/Transforms/LoopVectorize/AArch64/optsize_minsize.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-replicate-extends.ll
M llvm/test/Transforms/LoopVectorize/AArch64/replicating-load-store-costs-apple.ll
M llvm/test/Transforms/LoopVectorize/AArch64/replicating-load-store-costs.ll
M llvm/test/Transforms/LoopVectorize/RISCV/low-trip-count.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vector-loop-backedge-elimination-with-evl.ll
M llvm/test/Transforms/LoopVectorize/X86/cost-model.ll
M llvm/test/Transforms/LoopVectorize/X86/epilog-vectorization-ordered-reduction.ll
M llvm/test/Transforms/LoopVectorize/X86/load-deref-pred.ll
M llvm/test/Transforms/LoopVectorize/epilog-vectorization-reductions.ll
M llvm/test/Transforms/LoopVectorize/find-last.ll
M llvm/test/Transforms/LoopVectorize/iv-select-cmp-decreasing.ll
M llvm/test/Transforms/LoopVectorize/load-deref-pred-poison-ub-ops-feeding-pointer.ll
M llvm/test/Transforms/LoopVectorize/predicated-multiple-exits.ll
M llvm/test/Transforms/LoopVectorize/reduction-minmax-users-and-predicated.ll
M llvm/test/Transforms/LoopVectorize/single-early-exit-cond-poison.ll
M llvm/test/Transforms/LoopVectorize/vector-loop-backedge-elimination-early-exit.ll
M llvm/test/Transforms/LoopVectorize/vector-loop-backedge-elimination.ll
M llvm/test/Transforms/PhaseOrdering/ARM/arm_var_q31.ll
Log Message:
-----------
Reapply "[VPlan] Remove manual region removal when simplifying for VF and UF. (#181252)" (#188589)
This reverts commit e30f9c19464bcf1bf1e9f69b63884fb78ad2d05d.
Re-land, now that the reported crash causing the revert has been fixed
as part of 77fb84889 (#187504).
Original message:
Replace manual region dissolution code in
simplifyBranchConditionForVFAndUF with using general
removeBranchOnConst. simplifyBranchConditionForVFAndUF now just creates
a (BranchOnCond true) or updates BranchOnTwoConds.
The loop then gets automatically removed by running removeBranchOnConst.
This removes a bunch of special logic to handle header phi replacements
and CFG updates. With the new code, there's no restriction on what kind
of header phi recipes the loop contains.
Note that VPEVLBasedIVRecipe needs to be marked as readnone. This is
technically unrelated, but I could not find an independent test that
would be impacted.
The code to deal with epilogue resume values now needs updating, because
we may simplify a reduction directly to the start value.
PR: https://github.com/llvm/llvm-project/pull/181252
Commit: 9a51b1eebe6b0d20b9a62a411f036aa50268c1d1
https://github.com/llvm/llvm-project/commit/9a51b1eebe6b0d20b9a62a411f036aa50268c1d1
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-03-26 (Thu, 26 Mar 2026)
Changed paths:
M libclc/clc/lib/generic/workitem/clc_get_sub_group_id.cl
Log Message:
-----------
libclc: Implement get_sub_group_id with get_local_linear_id (#188713)
Commit: 65fe4970f5aa5b14fc194666e27dcad5cfc9013e
https://github.com/llvm/llvm-project/commit/65fe4970f5aa5b14fc194666e27dcad5cfc9013e
Author: Namhyung Kim <namhyung at gmail.com>
Date: 2026-03-26 (Thu, 26 Mar 2026)
Changed paths:
M clang/docs/analyzer/developer-docs/PerformanceInvestigation.rst
Log Message:
-----------
[analyzer][docs] Update uftrace option name (#188674)
It should be `--flame-graph` instead of `--framegraph`.
Commit: d913726dd63afed7230709dd5ccd6d921c275279
https://github.com/llvm/llvm-project/commit/d913726dd63afed7230709dd5ccd6d921c275279
Author: sstipano <sstipano7 at gmail.com>
Date: 2026-03-26 (Thu, 26 Mar 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInsertHardClauses.cpp
A llvm/test/CodeGen/AMDGPU/si-insert-hard-clauses-no-nesting.mir
Log Message:
-----------
[AMDGPU] Don't allow nesting hard clauses. (#188460)
Commit: 9e8012cd1cca9b05502bc7aba5cbeead9de83707
https://github.com/llvm/llvm-project/commit/9e8012cd1cca9b05502bc7aba5cbeead9de83707
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-03-26 (Thu, 26 Mar 2026)
Changed paths:
M mlir/lib/IR/AsmPrinter.cpp
A mlir/test/IR/print-unsafe-null-operand.mlir
Log Message:
-----------
[MLIR] Fix crash in alias printer when encountering null operands (#188581)
When the IR contains operations with null operand values, the
DummyAliasOperationPrinter used during alias collection crashed when
iterating over operand types via op->getOperandTypes(), because
ValueTypeIterator::mapElement calls value.getType() on each operand,
which dereferences null for a null Value.
Fix the crash by:
1. Iterating over operand values directly in printGenericOp, skipping
any null operands.
2. Adding a null-type guard in printType so that null types are silently
skipped.
3. Adding a null-type guard at the top of printAndVisitNestedAliasesImpl
to avoid crashing when visiting sub-elements of a null type.
The test requires using --mlir-very-unsafe-disable-verifier-on-parsing
to construct the invalid IR.
Fixes #182747
Assisted-by: Claude Code
Commit: 2f15e4ea33ec22ad159c5c4e3f60fd077195e401
https://github.com/llvm/llvm-project/commit/2f15e4ea33ec22ad159c5c4e3f60fd077195e401
Author: Jay Foad <jay.foad at amd.com>
Date: 2026-03-26 (Thu, 26 Mar 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPULowerVGPREncoding.cpp
M llvm/test/CodeGen/AMDGPU/vgpr-lowering-gfx1250.mir
M llvm/test/CodeGen/AMDGPU/vgpr-set-msb-coissue.mir
Log Message:
-----------
[AMDGPU] Remove redundant S_WAIT_XCNT after inserting S_SET_VGPR_MSB (#188527)
Commit: 1cb9a78b5aa4f0f58df61b4e7af21ff7421eec3b
https://github.com/llvm/llvm-project/commit/1cb9a78b5aa4f0f58df61b4e7af21ff7421eec3b
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-03-26 (Thu, 26 Mar 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/RISCV/shuffled-gather-casted.ll
Log Message:
-----------
[SLP] Fix incorrect operand info for select in getCmpSelInstrCost
The operand info passed to getCmpSelInstrCost for Select instructions
was using operands 0 and 1 (condition and true value), but the API
expects info about the data operands (true and false values). For
selects, the data operands are at indices 1 and 2, not 0 and 1.
This led to the cost model receiving the condition's operand info
instead of the false arm's, potentially producing inaccurate cost
estimates.
Reviewers: bababuck, hiraditya, RKSimon
Pull Request: https://github.com/llvm/llvm-project/pull/188506
Commit: ad7a6b37e53d10caa5b4830189c42efd57731a02
https://github.com/llvm/llvm-project/commit/ad7a6b37e53d10caa5b4830189c42efd57731a02
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-03-26 (Thu, 26 Mar 2026)
Changed paths:
Log Message:
-----------
[SLP] Fix incorrect operand info for select in getCmpSelInstrCost (#188506)
The operand info passed to getCmpSelInstrCost for Select instructions
was using operands 0 and 1 (condition and true value), but the API
expects info about the data operands (true and false values). For
selects, the data operands are at indices 1 and 2, not 0 and 1.
This led to the cost model receiving the condition's operand info
instead of the false arm's, potentially producing inaccurate cost
estimates.
Commit: ed37bdcc3eb2493feaa3d3bdcb5ec4036c25633e
https://github.com/llvm/llvm-project/commit/ed37bdcc3eb2493feaa3d3bdcb5ec4036c25633e
Author: Hocky Yudhiono <hocky.yudhiono at gmail.com>
Date: 2026-03-26 (Thu, 26 Mar 2026)
Changed paths:
M flang/lib/Optimizer/CodeGen/TargetRewrite.cpp
M flang/lib/Optimizer/Transforms/FunctionAttr.cpp
M flang/lib/Optimizer/Transforms/VScaleAttr.cpp
M flang/test/Transforms/vscale-attr.fir
M mlir/include/mlir/Conversion/Passes.td
M mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td
M mlir/lib/Conversion/FuncToLLVM/FuncToLLVM.cpp
M mlir/lib/Dialect/Async/Transforms/AsyncToAsyncRuntime.cpp
M mlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp
M mlir/test/Conversion/FuncToLLVM/convert-funcs.mlir
Log Message:
-----------
[mlir][func] Fix crashes in FuncToLLVM discardable attributes propagation logic (#188232)
Refactor how `func.func` discardable attributes are handled in the
Func-to-LLVM conversion. Instead of ad hoc checks for linkage and
readnone followed by a simple filter, the pass now generically processes
inherent attributes from LLVMFuncOp.
Attributes that correspond to inherent `llvm.func` ODS names can be
attached as `llvm.<name>` on `func.func` and are stripped to `<name>`
when building `LLVM::LLVMFuncOp`, so LLVM-specific knobs stay namespaced
on the source op but land on the right inherent slots on `llvm.func`.
Other discardable attributes continue to be propagated as-is.
Fixes #175959
Fixes #181464
Assisted-by: CLion code completion, GPT 5.3-Codex
---------
Co-authored-by: Mehdi Amini <joker.eph at gmail.com>
Commit: 107d8539d0451c8b079814d23498aa23b2cde1f5
https://github.com/llvm/llvm-project/commit/107d8539d0451c8b079814d23498aa23b2cde1f5
Author: Jakub Kuderski <jakub at nod-labs.com>
Date: 2026-03-26 (Thu, 26 Mar 2026)
Changed paths:
M llvm/include/llvm/ADT/Repeated.h
M mlir/include/mlir/IR/TypeRange.h
M mlir/include/mlir/IR/ValueRange.h
M mlir/include/mlir/Support/LLVM.h
M mlir/lib/Conversion/GPUCommon/GPUOpsLowering.cpp
M mlir/lib/Conversion/MathToSPIRV/MathToSPIRV.cpp
M mlir/lib/Conversion/TosaToSCF/TosaToSCF.cpp
M mlir/lib/Conversion/VectorToAMX/VectorToAMX.cpp
M mlir/lib/Dialect/Bufferization/Transforms/OwnershipBasedBufferDeallocation.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorTransferOpTransforms.cpp
M mlir/lib/Dialect/Vector/Utils/VectorUtils.cpp
M mlir/lib/IR/OperationSupport.cpp
M mlir/lib/IR/TypeRange.cpp
M mlir/unittests/IR/OperationSupportTest.cpp
Log Message:
-----------
[mlir] Add Repeated<T> constructors for TypeRange and ValueRange (#186923)
Many MLIR APIs end up using a range of the same Type / Value repeated N
times, due to the (function of the) dimensionality of the problem.
Allocating a vector of N identical element is wasteful.
Add `Repeated<T>` as PointerUnion variants in TypeRange and ValueRange,
enabling O(1) storage for repeated elements. Size remains 2 pointers (16
bytes on 64-bit) for both range types. This required variable-width
`PointerUnion` encoding added in
https://github.com/llvm/llvm-project/pull/188167 on 32-bit systems.
Also update several MLIR dialects and conversions to exercise the new
code.
---------
Co-authored-by: Claude Opus 4.6 (1M context) <noreply at anthropic.com>
Commit: 77710f14202a8684e12d68d08d2cd3738bbd0e1d
https://github.com/llvm/llvm-project/commit/77710f14202a8684e12d68d08d2cd3738bbd0e1d
Author: Ryotaro Kasuga <kasuga.ryotaro at fujitsu.com>
Date: 2026-03-26 (Thu, 26 Mar 2026)
Changed paths:
A llvm/test/Analysis/DependenceAnalysis/weak-zero-siv-addrec-wrap.ll
Log Message:
-----------
[DA] Add tests for addrecs wrap in the Weak Zero SIV tests (NFC) (#185578)
Add test cases where the Weak Zero SIV tests fail to detect dependencies
due to the addrec wraps. These tests should have been added in #179683,
but I missed them.
Commit: bb7db7c15e02c5ced8078439c045f0a3db157747
https://github.com/llvm/llvm-project/commit/bb7db7c15e02c5ced8078439c045f0a3db157747
Author: hanbeom <kese111 at gmail.com>
Date: 2026-03-26 (Thu, 26 Mar 2026)
Changed paths:
M llvm/lib/Target/WebAssembly/WebAssemblyAsmPrinter.cpp
A llvm/test/CodeGen/WebAssembly/global-addrspace.ll
Log Message:
-----------
[WebAssembly] Fix null Subtarget crash for addrspace(1) globals (#181536)
If Subtarget is null during global emission, it is now retrieved
from TargetMachine to prevent crashes caused by empty VTs in
wasmSymbolSetType.
Fixed: https://github.com/llvm/llvm-project/issues/181527
Commit: d5824db2d42db188aa16d72342f3bd08b897730c
https://github.com/llvm/llvm-project/commit/d5824db2d42db188aa16d72342f3bd08b897730c
Author: Jay Foad <jay.foad at amd.com>
Date: 2026-03-26 (Thu, 26 Mar 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPULowerVGPREncoding.cpp
Log Message:
-----------
[AMDGPU] Rework NeedNopBeforeSetVGPRMSB flag. NFC. (#187520)
This avoids tracking state with a flag when it is conceptually simpler
to look at the preceding instructions to detemine whether a NOP is
needed.
Commit: 298424bed558f5eb1ab21f7765caad5479fc949b
https://github.com/llvm/llvm-project/commit/298424bed558f5eb1ab21f7765caad5479fc949b
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-03-26 (Thu, 26 Mar 2026)
Changed paths:
M mlir/include/mlir/IR/OpImplementation.h
M mlir/test/IR/invalid-custom-print-parse.mlir
Log Message:
-----------
[MLIR] Improve verifier failure error message (#188507)
Commit: 49c6e4f8efeb9ab301edb2c78ec5d6535139030a
https://github.com/llvm/llvm-project/commit/49c6e4f8efeb9ab301edb2c78ec5d6535139030a
Author: yronglin <yronglin777 at gmail.com>
Date: 2026-03-26 (Thu, 26 Mar 2026)
Changed paths:
M clang/include/clang/Basic/DiagnosticLexKinds.td
M clang/include/clang/Frontend/CompilerInstance.h
M clang/include/clang/Lex/Preprocessor.h
M clang/lib/Frontend/CompilerInstance.cpp
M clang/lib/Lex/DependencyDirectivesScanner.cpp
M clang/lib/Lex/Lexer.cpp
M clang/lib/Lex/PPDirectives.cpp
M clang/lib/Lex/PPLexerChange.cpp
M clang/lib/Lex/Preprocessor.cpp
M clang/test/Modules/lookup.cpp
M clang/test/Modules/no-stale-modtime.m
A clang/test/Modules/objc-at-import.m
M clang/unittests/Lex/DependencyDirectivesScannerTest.cpp
M clang/utils/ClangVisualizers/clang.natvis
Log Message:
-----------
[ObjC][Preprocessor] Handle @import directive as a pp-directive (#157726)
Depends: https://github.com/llvm/llvm-project/pull/107168
This patch handle `@import` as a preprocessing directive, and since this
patch, the following import directive will be ill-formed:
```
@import Foo\n;
```
Signed-off-by: yronglin <yronglin777 at gmail.com>
Commit: 6097a67703cd9311c06eafbdca47845bf96a0686
https://github.com/llvm/llvm-project/commit/6097a67703cd9311c06eafbdca47845bf96a0686
Author: Hussam Alhassan <hsm.link at proton.me>
Date: 2026-03-26 (Thu, 26 Mar 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ConditionOptimizer.cpp
M llvm/test/CodeGen/AArch64/aarch64-condopt-unsigned.mir
Log Message:
-----------
[AArch64] ConditionOptimizer: modify intra-block path to use tryOptimizePair (#188643)
Update `optimizeIntraBlock` to use the `tryOptimizePair` method instead
of attempting to optimise directly. This unifies optimisation logic
between the intra- and cross-block paths and extends intra-block to
support the differs-by-two case
Commit: a2e0b6a2650e9f8f74b2219619721890c22b1363
https://github.com/llvm/llvm-project/commit/a2e0b6a2650e9f8f74b2219619721890c22b1363
Author: Hussam Alhassan <hsm.link at proton.me>
Date: 2026-03-26 (Thu, 26 Mar 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ConditionOptimizer.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.h
Log Message:
-----------
[NFC][AArch64] ConditionOptimizer: replace hardcoded CC switch with TII hook (#188389)
Elevate findCondCodeUseOperandIdxForBranchOrSelect to a class member on
AArch64InstrInfo and use it in updateCondInstr to replace the hardcoded
switch on condition code operand indices.
Commit: 82530154ef4bb0c454170c6d420bfbcaef4e1dc4
https://github.com/llvm/llvm-project/commit/82530154ef4bb0c454170c6d420bfbcaef4e1dc4
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-03-26 (Thu, 26 Mar 2026)
Changed paths:
M offload/CMakeLists.txt
M openmp/CMakeLists.txt
Log Message:
-----------
[Offload] Enable multilib building for OpenMP/Offload (#188485)
Summary:
Right now the CMake does not follow the pattern other runtime projects
use. All this does is use the standard subdir to place libraries in a
unique location. This allows, for example, users to configure a debug
version of openmp / offload within the same CMake invocation.
---------
Co-authored-by: Michael Kruse <github at meinersbur.de>
Commit: 91a7f030379da525610d589a797c35be9122914f
https://github.com/llvm/llvm-project/commit/91a7f030379da525610d589a797c35be9122914f
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-03-26 (Thu, 26 Mar 2026)
Changed paths:
M llvm/docs/GettingInvolved.rst
Log Message:
-----------
[docs] Update ics link for Vectorizer Improvements meeting. (#188732)
The linked ics file is expired. Replace with up-to-date version.
PR: https://github.com/llvm/llvm-project/pull/188732
Commit: c93901e051c95b1c7074e5eaedf904fcb8d8c146
https://github.com/llvm/llvm-project/commit/c93901e051c95b1c7074e5eaedf904fcb8d8c146
Author: Martin Storsjö <martin at martin.st>
Date: 2026-03-26 (Thu, 26 Mar 2026)
Changed paths:
M llvm/lib/Support/HTTP/HTTPClient.cpp
Log Message:
-----------
[SupportHTTP] Remove a redundant pragma (#188533)
We explicitly link against the winhttp library by declaring it in CMake,
in llvm/lib/Support/HTTP/CMakeLists.txt. We therefore don't need to
specify linking against it through a pragma (which embeds a directive in
the object file).
This fixes warnings when building in mingw mode, where this kind of
pragma isn't supported:
llvm-project/llvm/lib/Support/HTTP/HTTPClient.cpp:149:9: warning:
unknown pragma ignored [-Wunknown-pragmas]
149 | #pragma comment(lib, "winhttp.lib")
| ^
Commit: a1133f5e8a24137eea91278fd40365e6c28c4f06
https://github.com/llvm/llvm-project/commit/a1133f5e8a24137eea91278fd40365e6c28c4f06
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-03-26 (Thu, 26 Mar 2026)
Changed paths:
M mlir/include/mlir/Dialect/Transform/IR/TransformDialect.h
M mlir/lib/Dialect/Transform/IR/TransformDialect.cpp
Log Message:
-----------
[MLIR][Transform] Replace NDEBUG guard with LLVM_ENABLE_ABI_BREAKING_CHECKS for checkImplementsTransform (#188736)
NDEBUG shouldn't be used for guarding ABI changes in header.
Fixes #186552
Assisted-by: Claude Code
Commit: 238888099971f0498cbec0c643ef5e48060a240c
https://github.com/llvm/llvm-project/commit/238888099971f0498cbec0c643ef5e48060a240c
Author: Maksim Levental <maksim.levental at gmail.com>
Date: 2026-03-26 (Thu, 26 Mar 2026)
Changed paths:
M clang/lib/StaticAnalyzer/Checkers/CStringChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/CheckSecuritySyntaxOnly.cpp
M clang/lib/StaticAnalyzer/Checkers/IvarInvalidationChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/MallocChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/NSErrorChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/NullabilityChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/PthreadLockChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/StackAddrEscapeChecker.cpp
Log Message:
-----------
[analyzer] Add #undef REGISTER_CHECKER to files that define it (#188683)
Eight StaticAnalyzer checker files define a REGISTER_CHECKER macro that
is never undefined, which can leak into subsequent translation units in
unity builds. Add #undef REGISTER_CHECKER at the end of each file. See
https://discourse.llvm.org/t/rfc-enabling-unity-build/90306 for more
info.
"clauded" not coded
Commit: bbccfa5654fe9202219e0811b1f518a1a039ddb7
https://github.com/llvm/llvm-project/commit/bbccfa5654fe9202219e0811b1f518a1a039ddb7
Author: Dan Blackwell <dan_blackwell at apple.com>
Date: 2026-03-26 (Thu, 26 Mar 2026)
Changed paths:
M compiler-rt/include/sanitizer/common_interface_defs.h
Log Message:
-----------
[ASan] Make __SANITIZER_DISABLE_CONTAINER_OVERFLOW__ bypass definitions return values (#188237)
Currently all of these functions are empty bodies; this means that when
including this header and compiling with
__SANITIZER_DISABLE_CONTAINER_OVERFLOW__ defined, warnings are emitted
about the missing return values for those functions that do return
values.
This patch returns success values for all those check functions with
non-void return types. Note: these were originally added in
https://github.com/llvm/llvm-project/pull/163468.
Commit: ba6c69e65746142213a4f9820aa2dc18c717cad4
https://github.com/llvm/llvm-project/commit/ba6c69e65746142213a4f9820aa2dc18c717cad4
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2026-03-26 (Thu, 26 Mar 2026)
Changed paths:
M lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.h
R lldb/test/API/lang/cpp/non-type-template-param-member-ptr/Makefile
R lldb/test/API/lang/cpp/non-type-template-param-member-ptr/TestCppNonTypeTemplateParamPtrToMember.py
R lldb/test/API/lang/cpp/non-type-template-param-member-ptr/main.cpp
Log Message:
-----------
Revert "[lldb][DWARFASTParserClang] Handle pointer-to-member-data non-type template" (#188744)
Reverts llvm/llvm-project#187598
It was causing test failures on Windows bots:
https://github.com/llvm/llvm-project/pull/187598#issuecomment-4124925013
and causing another assertion
https://github.com/llvm/llvm-project/pull/187598#issuecomment-4128783696
(fix attempted at https://github.com/llvm/llvm-project/pull/188632)
Commit: 9e6bd128f256ee18a6a22a4ccca612ee85277d93
https://github.com/llvm/llvm-project/commit/9e6bd128f256ee18a6a22a4ccca612ee85277d93
Author: Jeff Bailey <jbailey at raspberryginger.com>
Date: 2026-03-26 (Thu, 26 Mar 2026)
Changed paths:
M libc/docs/dev/implementing_a_function.rst
Log Message:
-----------
[libc][doc] Remove ToC incompatible with Furo (#188720)
Thanks to @Sukumarsawant for spotting this!
Commit: e41e7b90f9fe0a38a8b4f5cc69c87ac807621ed7
https://github.com/llvm/llvm-project/commit/e41e7b90f9fe0a38a8b4f5cc69c87ac807621ed7
Author: Markus Mützel <markus.muetzel at gmx.de>
Date: 2026-03-26 (Thu, 26 Mar 2026)
Changed paths:
M flang-rt/cmake/modules/AddFlangRT.cmake
M flang-rt/lib/runtime/CMakeLists.txt
M flang-rt/lib/runtime/io-api-minimal.cpp
A flang-rt/lib/runtime/stl-overrides.cpp
A flang-rt/lib/runtime/stl-overrides.h
Log Message:
-----------
[flang-rt] Avoid duplicate definition of `std::__libcpp_verbose_abort` (#175551)
If a project depends on the Flang runtime and on libc++, linking fails
because `std::__libcpp_verbose_abort` is defined in both libraries.
Avoid that duplicate definition by defining `_LIBCPP_VERBOSE_ABORT`
before including any C++ headers and by renaming that symbol in the
Flang runtime to `flang_rt_verbose_abort`.
The function that is modified was originally introduced in D158957 to
solve an undefined symbol error when linking pure-Fortran projects with
the Flang runtime.
Providing a definition for that symbol in the Flang runtime might work
correctly for ELF or Mach-O if that symbol has weak linkage in libc++.
But at least for COFF, this now causes multiple-definition errors for
projects that are linking to the Flang runtime and to libc++.
The linker errors before this change for Windows/MinGW using
Clang+Flang+lld look like this:
```
ld.lld: error: duplicate symbol: std::__1::__libcpp_verbose_abort(char const*, ...)
>>> defined at libflang_rt.runtime.a(io-api-minimal.cpp.obj)
>>> defined at libc++.dll.a(libc++.dll)
```
Commit: cc4727ae3bdb5526ebac06f446ddf4702d859d49
https://github.com/llvm/llvm-project/commit/cc4727ae3bdb5526ebac06f446ddf4702d859d49
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-03-26 (Thu, 26 Mar 2026)
Changed paths:
M flang-rt/CMakeLists.txt
M flang-rt/README.md
M flang-rt/cmake/modules/AddFlangRT.cmake
M flang-rt/lib/runtime/CMakeLists.txt
M libc/cmake/modules/LLVMLibCArchitectures.cmake
M llvm/cmake/modules/HandleLLVMOptions.cmake
M runtimes/CMakeLists.txt
Log Message:
-----------
[LLVM] Replace use of LLVM_RUNTIMES_TARGET with LLVM_DEFAULT_TARGET_TRIPLE (#188303)
Summary:
This PR primarily changes using `LLVM_RUNTIMES_TARGET` to
`LLVM_DEFAULT_TARGET_TRIPLE`. The reason is that the default target
triple is the true cross-compiling architecture we are using, while the
runtimes_target can contain multilib strings like `+debug` or similar.
Additionally add the proper path handling to the OpenMP / Offload
libraries.
Commit: 82d0173f72735404098cfcecc8f511e2f8a95cb1
https://github.com/llvm/llvm-project/commit/82d0173f72735404098cfcecc8f511e2f8a95cb1
Author: Dmitry Sidorov <Dmitry.Sidorov at amd.com>
Date: 2026-03-26 (Thu, 26 Mar 2026)
Changed paths:
M clang/lib/CodeGen/CodeGenModule.cpp
A clang/test/CodeGenHIP/amdgcnspirv-visibility.cpp
Log Message:
-----------
[HIP][CUDA] Apply protected visibility to kernels and globals (#187784)
Add the visibility override in setGlobalVisibility(), following the
existing OpenMP precedent. Unlike the AMDGPU post-hoc override, this
check respects explicit [[gnu::visibility("hidden")]] attributes
via isVisibilityExplicit().
Commit: 030b520a065b34d787d149eae6d59292a2975bf9
https://github.com/llvm/llvm-project/commit/030b520a065b34d787d149eae6d59292a2975bf9
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-03-26 (Thu, 26 Mar 2026)
Changed paths:
M llvm/test/CodeGen/X86/known-pow2.ll
Log Message:
-----------
[X86] known-pow2.ll - add baseline pow2 trunc tests for #184365 (#188723)
Commit: 08a408500ed06297924823c5b8199b392e73d300
https://github.com/llvm/llvm-project/commit/08a408500ed06297924823c5b8199b392e73d300
Author: Nerixyz <nerixdev at outlook.de>
Date: 2026-03-26 (Thu, 26 Mar 2026)
Changed paths:
M llvm/include/llvm/IR/DebugInfoMetadata.h
M llvm/include/llvm/MC/MCStreamer.h
M llvm/lib/CodeGen/AsmPrinter/CodeViewDebug.cpp
M llvm/lib/CodeGen/AsmPrinter/CodeViewDebug.h
M llvm/lib/IR/DebugInfoMetadata.cpp
M llvm/lib/MC/MCAsmStreamer.cpp
M llvm/lib/MC/MCParser/AsmParser.cpp
M llvm/lib/MC/MCStreamer.cpp
M llvm/test/CodeGen/MIR/X86/diexpr-win32.mir
A llvm/test/DebugInfo/COFF/indirect-local.ll
M llvm/test/DebugInfo/COFF/nrvo.ll
M llvm/test/DebugInfo/COFF/pieces.ll
M llvm/test/DebugInfo/COFF/types-array-advanced.ll
Log Message:
-----------
[CodeView] Generate `S_DEFRANGE_REGISTER_REL_INDIR` (#187709)
In CodeView we had the limitation that we couldn't express locations
like `DW_OP_deref, DW_OP_plus_uconst 8` (i.e. indirect loads with an
offset). `S_DEFRANGE_REGISTER_REL_INDIR` allows us to represent this.
It's essentially `S_DEFRANGE_REGISTER_REL` (`Register + Offset`) with an
additional load afterward (`*(Register + Offset) + OffsetInUdt`).
These indirect locations are used in C++ 17 structured bindings and the
compiler generated C++ 20 coroutine stubs.
Before, locations that would only do a dereference without an added
offset afterward were represented by
`S_DEFRANGE_(REGISTER|FRAMEPOINTER)_REL` where the local had a reference
type:
```cpp
struct Foo {
int a;
int b;
};
int main() {
Foo f{1, 2};
auto &[a, b] = f;
// │ ╰─ Not present
// ╰─ S_LOCAL{ type: int&, FRAMEPOINTER_REL{ offset=0 } }
return a + b;
}
```
With this PR, both `a` and `b` will be present as non-reference types:
```cpp
// ...
int main() {
Foo f{1, 2};
auto &[a, b] = f;
// │ ╰─ S_LOCAL{ type: int, REGISTER_REL_INDIR{ register: RSP, offset: 0, offset in udt: 4 } }
// ╰─ S_LOCAL{ type: int, REGISTER_REL_INDIR{ register: RSP, offset: 0, offset in udt: 0 } }
return a + b;
}
```
One downside of this is that all variables like `a` now need a larger
record. If it used `FRAMEPOINTER_REL` before, it now takes 8 bytes more
(there's no `FRAMEPOINTER_REL_INDIR` where we could omit the register).
I removed the `UseReferenceType` workaround. If we need three
dereferences, that could be added back, but I don't know any construct
that uses this.
Closes #34392.
Commit: 1c48e728a2d3cccd4bd395a8862a98a306a68906
https://github.com/llvm/llvm-project/commit/1c48e728a2d3cccd4bd395a8862a98a306a68906
Author: Osman Yasar <osmanyas05 at gmail.com>
Date: 2026-03-26 (Thu, 26 Mar 2026)
Changed paths:
M llvm/include/llvm/Target/GlobalISel/Combine.td
M llvm/test/CodeGen/AArch64/GlobalISel/combine-integer-ll.ll
M llvm/test/CodeGen/AArch64/GlobalISel/combine-integer.mir
M llvm/test/CodeGen/AArch64/neon-bitwise-instructions.ll
Log Message:
-----------
[GlobalISel] Add integer combines from SelectionDAG (#181126)
This PR adds the patterns` // fold (A - (0 - B)) to (A + B)` and `//
fold A - (A - B) -> B` from SelectionDAG:
https://github.com/llvm/llvm-project/blob/838be78e44cd1f70006eb508bfc925e3e56aac03/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp#L4312
These rewrites should not need HasOneUse checks, since even with
multiple uses, they cannot increase the instruction count.
Commit: 4140ea18f537a67752c918499e2e71dde4721abf
https://github.com/llvm/llvm-project/commit/4140ea18f537a67752c918499e2e71dde4721abf
Author: Anshil Gandhi <95053726+gandhi56 at users.noreply.github.com>
Date: 2026-03-26 (Thu, 26 Mar 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane16.var.ll
Log Message:
-----------
[AMDGPU][GlobalISel] Add RegBankLegalize rules for permlane16_var/permlanex16_var (#187806)
Add register bank legalize rules for the amdgcn_permlane16_var and
amdgcn_permlanex16_var intrinsics. All register operands (result, old,
src0, src1) map to VGPR since these are VALU lane permutation
operations.
Enable -new-reg-bank-select in the permlane16.var test.
Commit: 8d1314f96d960215a4101f3f2cf269c061ca6ea6
https://github.com/llvm/llvm-project/commit/8d1314f96d960215a4101f3f2cf269c061ca6ea6
Author: sskzakaria <ssskzakaria at proton.me>
Date: 2026-03-26 (Thu, 26 Mar 2026)
Changed paths:
M clang/lib/Headers/avx512bwintrin.h
M clang/lib/Headers/avx512fintrin.h
M clang/lib/Headers/avx512vlbwintrin.h
M clang/lib/Headers/avx512vlintrin.h
M clang/test/CodeGen/X86/avx512bw-builtins.c
M clang/test/CodeGen/X86/avx512f-builtins.c
M clang/test/CodeGen/X86/avx512vl-builtins.c
M clang/test/CodeGen/X86/avx512vlbw-builtins.c
Log Message:
-----------
[X86][Clang] VectorExprEvaluator::VisitCallExpr / InterpretBuiltin - allow AVX512 VPTESTM intrinsics to be used in constexpr #162071 (#174021)
Adding Constexpr tests for
```
_mm_test_epi8_mask _mm_mask_test_epi8_mask
_mm_test_epi16_mask _mm_mask_test_epi16_mask
_mm_test_epi64_mask _mm_mask_test_epi32_mask
_mm_test_epi32_mask _mm_mask_test_epi64_mask
_mm_testn_epi8_mask _mm_mask_testn_epi8_mask
_mm_testn_epi16_mask _mm_mask_testn_epi16_mask
_mm_testn_epi64_mask _mm_mask_testn_epi32_mask
_mm_testn_epi32_mask _mm_mask_testn_epi64_mask
_mm256_test_epi8_mask _mm256_mask_test_epi8_mask
_mm256_test_epi16_mask _mm256_mask_test_epi16_mask
_mm256_test_epi64_mask _mm256_mask_test_epi32_mask
_mm256_test_epi32_mask _mm256_mask_test_epi64_mask
_mm256_testn_epi8_mask _mm256_mask_testn_epi8_mask
_mm256_testn_epi16_mask _mm256_mask_testn_epi16_mask
_mm256_testn_epi64_mask _mm256_mask_testn_epi32_mask
_mm256_testn_epi32_mask _mm256_mask_testn_epi64_mask
_mm512_test_epi8_mask _mm512_mask_test_epi8_mask
_mm512_test_epi16_mask _mm512_mask_test_epi16_mask
_mm512_test_epi64_mask _mm512_mask_test_epi32_mask
_mm512_test_epi32_mask _mm512_mask_test_epi64_mask
_mm512_testn_epi8_mask _mm512_mask_testn_epi8_mask
_mm512_testn_epi16_mask _mm512_mask_testn_epi16_mask
_mm512_testn_epi64_mask _mm512_mask_testn_epi32_mask
_mm512_testn_epi32_mask _mm512_mask_testn_epi64_mask
```
FIXES #162071
Commit: 5eab5fd69ae1701afa916b84634e79dcf8c1e56e
https://github.com/llvm/llvm-project/commit/5eab5fd69ae1701afa916b84634e79dcf8c1e56e
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-03-26 (Thu, 26 Mar 2026)
Changed paths:
M llvm/include/llvm/IR/IntrinsicsPowerPC.td
M llvm/lib/Target/PowerPC/PPCInstr64Bit.td
M llvm/lib/Target/PowerPC/PPCInstrInfo.td
M llvm/test/CodeGen/PowerPC/atomics.ll
M llvm/test/CodeGen/PowerPC/ldst-16-byte.mir
Log Message:
-----------
[PowerPC] Fix memory attributes on larx/stcx (#186395)
Modelling these as ll/sc style instructions as `memory(argmem: read)`
and `memory(argmem: write)` is not correct. The read/write additional
microarchitectural state, so they should at least read/write
`inaccessiblemem` as well.
Treating these are purely reading/writing can result in miscompilations
-- this came up in https://github.com/llvm/llvm-project/pull/169379
where the stcx ended up being hoisted outside the atomicrmw loop.
Commit: f3e0f2b7dc02773f9b154b126c683a94315cee42
https://github.com/llvm/llvm-project/commit/f3e0f2b7dc02773f9b154b126c683a94315cee42
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-03-26 (Thu, 26 Mar 2026)
Changed paths:
M llvm/lib/Target/LoongArch/LoongArchInstrInfo.cpp
Log Message:
-----------
[LoongArch] Report correct instruction size for PATCHABLE_* (#188228)
This is either the number of nops provided by patchable-function-entry
or the size of the xray sled.
Commit: e926dd7ce6343b26d265f2577f573d4228321b2c
https://github.com/llvm/llvm-project/commit/e926dd7ce6343b26d265f2577f573d4228321b2c
Author: Ruoyu Qiu <cabbaken at outlook.com>
Date: 2026-03-26 (Thu, 26 Mar 2026)
Changed paths:
M llvm/include/llvm/Analysis/DependenceAnalysis.h
M llvm/lib/Analysis/DependenceAnalysis.cpp
M llvm/test/Analysis/DependenceAnalysis/rdiv-large-btc.ll
M llvm/test/Analysis/DependenceAnalysis/rdiv-minor-algebra.ll
M llvm/test/Analysis/DependenceAnalysis/run-specific-dependence-test.ll
M llvm/test/Analysis/DependenceAnalysis/symbolic-rdiv-addrec-wrap.ll
M llvm/test/Analysis/DependenceAnalysis/symbolic-rdiv-overflow.ll
M llvm/test/Analysis/DependenceAnalysis/weak-crossing-siv-overflow.ll
Log Message:
-----------
[DA] Consolidate ConstantRange intersection checks into a single early pre-test (#187435)
Commit: 76a96922547050594bcd74be1b730e59d88159ec
https://github.com/llvm/llvm-project/commit/76a96922547050594bcd74be1b730e59d88159ec
Author: Ramkumar Ramachandra <artagnon at tenstorrent.com>
Date: 2026-03-26 (Thu, 26 Mar 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/test/Transforms/LoopVectorize/first-order-recurrence-with-uniform-ops.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/iv_outside_user.ll
M llvm/test/Transforms/LoopVectorize/lcssa-crashes.ll
M llvm/test/Transforms/LoopVectorize/pr66616.ll
Log Message:
-----------
[VPlan] Sink single-scalar replicates in licm (#187047)
Refine the replicate bail-out in licm to permit single-scalar
replicates.
Commit: f0d58d24428d8fb2b7213662ae1c390ceae78931
https://github.com/llvm/llvm-project/commit/f0d58d24428d8fb2b7213662ae1c390ceae78931
Author: Charles Zablit <c_zablit at apple.com>
Date: 2026-03-26 (Thu, 26 Mar 2026)
Changed paths:
M lldb/source/Plugins/ObjectFile/COFF/ObjectFileCOFF.cpp
Log Message:
-----------
[lldb][windows] fix invalid indexes in LLDB_LOG call (#188757)
This patch shifts the indexes of the `LLDB_LOG` call by -1 so that they
start at 0. Otherwise, the call expects 4 arguments.
Commit: 19420c0e7753db58651c7aa6b98c5d35a06830e0
https://github.com/llvm/llvm-project/commit/19420c0e7753db58651c7aa6b98c5d35a06830e0
Author: Ivan R. Ivanov <iivanov at nvidia.com>
Date: 2026-03-26 (Thu, 26 Mar 2026)
Changed paths:
M clang/lib/CodeGen/CGOpenMPRuntime.cpp
M clang/test/OpenMP/target_update_codegen.cpp
M clang/test/OpenMP/target_update_count_expression_codegen.c
M clang/test/OpenMP/target_update_variable_stride_codegen.c
M offload/libomptarget/omptarget.cpp
M offload/test/offloading/non_contiguous_update.cpp
A offload/test/offloading/strided_offset_multidim_update.c
M offload/test/offloading/strided_update_count_expression_complex.c
M offload/test/offloading/strided_update_variable_stride_misc.c
Log Message:
-----------
[OpenMP] Fix non-contiguous array omp target update (#156889)
The existing implementation has three issues which this patch addresses.
1. The last dimension which represents the bytes in the type, has the
wrong stride and count. For example, for a 4 byte int, count=1 and
stride=4. The correct representation here is count=4 and stride=1
because there are 4 bytes (count=4) that we need to copy and we do not
skip any bytes (stride=1).
2. The size of the data copy was computed using the last dimension.
However, this is incorrect in cases where some of the final dimensions
get merged into one. In this case we need to take the combined size of
the merged dimensions, which is (Count * Stride) of the first merged
dimension.
3. The Offset into a dimension was computed as a multiple of its Stride.
However, this Stride which is in bytes, already includes the stride
multiplier given by the user. This means that when the user specified
1:3:2, i.e. elements 1, 3, 5, the runtime incorrectly copied elements 2,
4, 6. Fix this by precomputing at compile time the Offset to be in bytes
by correctly multiplying the offset by the stride of the dimension
without the user-specified multiplier.
Commit: 15c75e170f3bebf5e6b3b58c463fef0896e58e17
https://github.com/llvm/llvm-project/commit/15c75e170f3bebf5e6b3b58c463fef0896e58e17
Author: Yaxun (Sam) Liu <yaxun.liu at amd.com>
Date: 2026-03-26 (Thu, 26 Mar 2026)
Changed paths:
M clang/include/clang/Driver/Driver.h
M clang/lib/Driver/Driver.cpp
M clang/test/Driver/hip-phases.hip
Log Message:
-----------
[Driver][HIP] Bundle AMDGPU -S output under the new offload driver (#188262)
[Driver][HIP] Bundle AMDGPU -S output under the new offload driver
The old offload driver emits bundled assembly code for -S in textual
clang-offload-bundler format. This allows a single .s file to contain
assembly
code for both host and devices, which can be consumed by clang. This
eases
manual optimization of assembly code for host and device. There are
existing
HIP tests and examples depending on this feature. The new offload driver
does
not support it, causing regressions. This patch adds support for this
feature
with minor changes to the job action creations.
Fixes: LCOMPILER-553
Commit: 1422665595d9aa596666cb15f5ef83623fa8d25e
https://github.com/llvm/llvm-project/commit/1422665595d9aa596666cb15f5ef83623fa8d25e
Author: Sirui Mu <msrlancern at gmail.com>
Date: 2026-03-26 (Thu, 26 Mar 2026)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/lib/CIR/CodeGen/CIRGenAtomic.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
M clang/test/CIR/CodeGen/atomic.c
M clang/test/CIR/IR/atomic.cir
Log Message:
-----------
[CIR] Add support for __atomic_fetch_uinc and __atomic_fetch_udec (#188050)
This patch adds CIRGen and LLVM lowering support for the
`__atomic_fetch_uinc` and the `__atomic_fetch_udec` built-in functions.
Assisted-by: Claude Opus 4.6
Commit: 797916b221d13f79e3012fa31147262dae97e1db
https://github.com/llvm/llvm-project/commit/797916b221d13f79e3012fa31147262dae97e1db
Author: Robert Imschweiler <robert.imschweiler at amd.com>
Date: 2026-03-26 (Thu, 26 Mar 2026)
Changed paths:
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
A mlir/test/Target/LLVMIR/omptarget-region-host-device-llvm.mlir
Log Message:
-----------
[OpenMP][flang] Fix crash in host offload (#187847)
Guard `getGridValue` in `OMPIRBuilder` to avoid reaching the
`unreachable` in `getGridValue` when offloading to host device without
an explicit num_threads clause.
Commit: bbd69eec1d68492a2ddca3a0dfc02681a84088fe
https://github.com/llvm/llvm-project/commit/bbd69eec1d68492a2ddca3a0dfc02681a84088fe
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-03-26 (Thu, 26 Mar 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/test/CodeGen/X86/srem-seteq-vec-nonsplat.ll
M llvm/test/CodeGen/X86/urem-seteq-vec-nonsplat.ll
Log Message:
-----------
[TargetLowering] In prepareUREMEqFold/prepareSREMEqFold, fix K=-1 for i64 elements. (#188600)
K is an unsigned, it will be zero extended to uint64_t for
the APInt constructor. If the ShSVT has more than 32 bits, we won't
create an all ones ConstantSDNode.
To fix this, explicitly push an all ones constant to KAmts. This
also fixes an APInt ImplicitTrunc.
This allows turnVectorIntoSplatVector to work for this case.
Commit: f08f7ecc7a9a440ae9317d4e8c066943717530b8
https://github.com/llvm/llvm-project/commit/f08f7ecc7a9a440ae9317d4e8c066943717530b8
Author: Nico Weber <thakis at chromium.org>
Date: 2026-03-26 (Thu, 26 Mar 2026)
Changed paths:
M llvm/utils/gn/secondary/compiler-rt/lib/builtins/BUILD.gn
Log Message:
-----------
[gn] "port" 80831832e03f
Commit: a5cd44f4f7fd0c8a96ddebe075ce6bdddf21a519
https://github.com/llvm/llvm-project/commit/a5cd44f4f7fd0c8a96ddebe075ce6bdddf21a519
Author: Nico Weber <thakis at chromium.org>
Date: 2026-03-26 (Thu, 26 Mar 2026)
Changed paths:
M llvm/utils/gn/secondary/compiler-rt/lib/sanitizer_common/BUILD.gn
Log Message:
-----------
[gn] port 25904ac91554
Commit: 249a3d19ddffa783ee1261a4134fc69ad23e7fa2
https://github.com/llvm/llvm-project/commit/249a3d19ddffa783ee1261a4134fc69ad23e7fa2
Author: Nico Weber <thakis at chromium.org>
Date: 2026-03-26 (Thu, 26 Mar 2026)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/Target/NVPTX/BUILD.gn
Log Message:
-----------
[gn build] Port 28318d5db86f
Commit: 76f88063b651589474d52b90b06ad10bf55bb480
https://github.com/llvm/llvm-project/commit/76f88063b651589474d52b90b06ad10bf55bb480
Author: Dmitry Sidorov <Dmitry.Sidorov at amd.com>
Date: 2026-03-26 (Thu, 26 Mar 2026)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.h
M llvm/lib/Target/AMDGPU/AMDGPUInstrInfo.td
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.h
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SOPInstructions.td
M llvm/lib/Target/AMDGPU/VOP1Instructions.td
A llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ctls.mir
A llvm/test/CodeGen/AMDGPU/ctls.ll
Log Message:
-----------
[AMDGPU] Remove AMDGPUISD::FFBH_I32 and add ISD::CTLS lowering (#187694)
It's the a continuation of previously reverted
https://github.com/llvm/llvm-project/pull/178420
The patch removes custom AMDGPUISD::FFBH_I32 SelectionDAG node. Call
sites that need raw hardware semantics (LowerINT_TO_FP32, legalizeITOFP)
now use amdgcn_sffbh intrinsic directly. ISD::CTLS is added as a Custom
operation for i32.
Previous attempt had an issue:
The hardware v_ffbh_i32 instruction (v_cls_i32 on newer targets) has
different semantics than ISD::CTLS:
-sffbh returns [1, BitWidth-1] for normal values, -1 for
all-same-bits
-CTLS returns [0, BitWidth-2] for normal values, BitWidth-1 for
all-same-bits
Now LowerCTLS handles this by: sffbh -> umin(sffbh, BitWidth) -> sub 1.
Current patch also adds DAG combine to recognize the common CTLS idiom:
sub(ctlz(xor(x, sra(x, BitWidth-1))), 1) -> ctls(x)
and an optimization in performMinMaxCombine to fold away umin
when the input is not all-same-bits.
Partially addresses #177635
Commit: ffd6a13b5ffed8bb2e314db29be784381f984ae1
https://github.com/llvm/llvm-project/commit/ffd6a13b5ffed8bb2e314db29be784381f984ae1
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-03-26 (Thu, 26 Mar 2026)
Changed paths:
M compiler-rt/include/profile/InstrProfData.inc
M compiler-rt/lib/profile/InstrProfiling.h
M compiler-rt/lib/profile/InstrProfilingPlatformGPU.c
M compiler-rt/lib/profile/InstrProfilingPlatformLinux.c
M compiler-rt/lib/profile/InstrProfilingPlatformOther.c
M llvm/include/llvm/ProfileData/InstrProfData.inc
M llvm/lib/ProfileData/InstrProf.cpp
M llvm/lib/Transforms/Instrumentation/InstrProfiling.cpp
M llvm/lib/Transforms/Instrumentation/PGOInstrumentation.cpp
M offload/plugins-nextgen/common/include/GlobalHandler.h
M offload/plugins-nextgen/common/src/GlobalHandler.cpp
Log Message:
-----------
[compiler-rt] Rework profile data handling for GPU targets (#187136)
Summary:
Currently, the GPU iterates through all of the present symbols and
copies them by prefix. This is inefficient as it requires a lot of small
high-latency data transfers rather than a few large ones. Additionally,
we force every single profiling symbol to have protected visibility.
This means potentially hundreds of unnecessary symbols in the symbol
table.
This PR changes the interface to move towards the start / stop section
handling. AMDGPU supports this natively as an ELF target, so we need
little changes. Instead of overriding visibility, we use a single table
to define the bounds that we can obtain with one contiguous load.
Using a table interface should also work for the in-progress HIP
implementation for this, as it wraps the start / stop sections into
standard void pointers which will be inside of an already mapped region
of memory, so they should be accessible from the HIP API.
NVPTX is more difficult as it is an ELF platform without this support. I
have hooked up the 'Other' handling to work around this, but even then
it's a bit of a stretch. I could remove this support here, but I wanted
to demonstrate that we can share the ABI. However, NVPTX will only work
if we force LTO and change the backend to emit variables in the same
TL;DR, we now do this:
```c
struct { start1, stop1, start2, stop2, start3, stop3, version; } device;
struct host = DtoH(lookup("device"));
counters = DtoH(host.stop - host.start)
version = DtoH(host.version);
```
Commit: 3a56470a0ee68b26ffe93f5079de58ed22f5dc18
https://github.com/llvm/llvm-project/commit/3a56470a0ee68b26ffe93f5079de58ed22f5dc18
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-03-26 (Thu, 26 Mar 2026)
Changed paths:
M libc/shared/rpc.h
Log Message:
-----------
[libc] Increase the maximum RPC port size for future hardware (#188756)
Summary:
We store the locks in local device memory for performance and
simplicity. The number here needs to correspond to the maximum occupancy
so that we never have a situation where a GPU thread is blocking another
GPU thread.
The number now is sufficient for most hardware, but modern compute chips
like the MI300x are already pushing ~12000 resident waves. This has ABI
impliciations so I'd like to bump it up sooner rather than later. The
ABI change is within what OpenMP expects, LLVM major versions, and it
will be caught statically so there's no risk of silent corruption (size
doesn't match).
Commit: 5524fa4c2346778d54e8289bb52a1ba38265f7cf
https://github.com/llvm/llvm-project/commit/5524fa4c2346778d54e8289bb52a1ba38265f7cf
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-03-26 (Thu, 26 Mar 2026)
Changed paths:
M clang/lib/Basic/Targets/AMDGPU.cpp
M clang/test/Driver/amdgpu-macros.cl
M clang/test/Preprocessor/predefined-arch-macros.c
Log Message:
-----------
clang: Define FP_FAST_FMA_HALF macro for AMDGPU (#188243)
Commit: 4e383ec78c80d56709d6f72a0bc1f7661a48960c
https://github.com/llvm/llvm-project/commit/4e383ec78c80d56709d6f72a0bc1f7661a48960c
Author: Arseniy Zaostrovnykh <necto.ne at gmail.com>
Date: 2026-03-26 (Thu, 26 Mar 2026)
Changed paths:
R clang/test/Analysis/Inputs/ctu-chain.cpp
R clang/test/Analysis/Inputs/ctu-cxxdefaultinitexpr-import.cpp
R clang/test/Analysis/Inputs/ctu-cxxdefaultinitexpr-import.cpp.externalDefMap.ast-dump.txt
R clang/test/Analysis/Inputs/ctu-import.c
R clang/test/Analysis/Inputs/ctu-import.c.externalDefMap.ast-dump.txt
R clang/test/Analysis/Inputs/ctu-inherited-default-ctor-other.cpp
R clang/test/Analysis/Inputs/ctu-lookup-name-with-space.cpp
R clang/test/Analysis/Inputs/ctu-onego-existingdef-other.cpp
R clang/test/Analysis/Inputs/ctu-onego-existingdef-other.cpp.externalDefMap.ast-dump.txt
R clang/test/Analysis/Inputs/ctu-onego-indirect-other.cpp
R clang/test/Analysis/Inputs/ctu-onego-indirect-other.cpp.externalDefMap.ast-dump.txt
R clang/test/Analysis/Inputs/ctu-onego-small-other.cpp
R clang/test/Analysis/Inputs/ctu-onego-small-other.cpp.externalDefMap.ast-dump.txt
R clang/test/Analysis/Inputs/ctu-onego-toplevel-other.cpp
R clang/test/Analysis/Inputs/ctu-onego-toplevel-other.cpp.externalDefMap.ast-dump.txt
R clang/test/Analysis/Inputs/ctu-other.c
R clang/test/Analysis/Inputs/ctu-other.c.externalDefMap.ast-dump.txt
R clang/test/Analysis/Inputs/ctu-other.cpp
R clang/test/Analysis/Inputs/ctu-other.cpp.externalDefMap.ast-dump.txt
R clang/test/Analysis/Inputs/ctu-test-import-failure-import.cpp
R clang/test/Analysis/Inputs/ctu-test-import-failure-import.cpp.externalDefMap.ast-dump.txt
R clang/test/Analysis/ctu-cxxdefaultinitexpr.cpp
R clang/test/Analysis/ctu-different-triples.cpp
R clang/test/Analysis/ctu-hdr.h
R clang/test/Analysis/ctu-implicit.c
R clang/test/Analysis/ctu-import-threshold.c
R clang/test/Analysis/ctu-import-type-decl-definition.c
R clang/test/Analysis/ctu-inherited-default-ctor.cpp
R clang/test/Analysis/ctu-lookup-name-with-space.cpp
R clang/test/Analysis/ctu-main.c
R clang/test/Analysis/ctu-main.cpp
R clang/test/Analysis/ctu-on-demand-parsing.c
R clang/test/Analysis/ctu-on-demand-parsing.cpp
R clang/test/Analysis/ctu-onego-existingdef.cpp
R clang/test/Analysis/ctu-onego-indirect.cpp
R clang/test/Analysis/ctu-onego-small.cpp
R clang/test/Analysis/ctu-onego-toplevel.cpp
R clang/test/Analysis/ctu-test-import-failure.cpp
R clang/test/Analysis/ctu-unknown-parts-in-triples.cpp
A clang/test/Analysis/ctu/Inputs/chain.cpp
A clang/test/Analysis/ctu/Inputs/cxxdefaultinitexpr-import.cpp
A clang/test/Analysis/ctu/Inputs/cxxdefaultinitexpr-import.cpp.externalDefMap.ast-dump.txt
A clang/test/Analysis/ctu/Inputs/import.c
A clang/test/Analysis/ctu/Inputs/import.c.externalDefMap.ast-dump.txt
A clang/test/Analysis/ctu/Inputs/inherited-default-ctor-other.cpp
A clang/test/Analysis/ctu/Inputs/invalid-ast-other.cpp.externalDefMap.ast-dump.txt
A clang/test/Analysis/ctu/Inputs/lookup-name-with-space.cpp
A clang/test/Analysis/ctu/Inputs/missing-ast.cpp.externalDefMap.ast-dump.txt
A clang/test/Analysis/ctu/Inputs/onego-existingdef-other.cpp
A clang/test/Analysis/ctu/Inputs/onego-existingdef-other.cpp.externalDefMap.ast-dump.txt
A clang/test/Analysis/ctu/Inputs/onego-indirect-other.cpp
A clang/test/Analysis/ctu/Inputs/onego-indirect-other.cpp.externalDefMap.ast-dump.txt
A clang/test/Analysis/ctu/Inputs/onego-small-other.cpp
A clang/test/Analysis/ctu/Inputs/onego-small-other.cpp.externalDefMap.ast-dump.txt
A clang/test/Analysis/ctu/Inputs/onego-toplevel-other.cpp
A clang/test/Analysis/ctu/Inputs/onego-toplevel-other.cpp.externalDefMap.ast-dump.txt
A clang/test/Analysis/ctu/Inputs/other.c
A clang/test/Analysis/ctu/Inputs/other.c.externalDefMap.ast-dump.txt
A clang/test/Analysis/ctu/Inputs/other.cpp
A clang/test/Analysis/ctu/Inputs/other.cpp.externalDefMap.ast-dump.txt
A clang/test/Analysis/ctu/Inputs/test-import-failure-import.cpp
A clang/test/Analysis/ctu/Inputs/test-import-failure-import.cpp.externalDefMap.ast-dump.txt
A clang/test/Analysis/ctu/cxxdefaultinitexpr.cpp
A clang/test/Analysis/ctu/different-triples.cpp
A clang/test/Analysis/ctu/hdr.h
A clang/test/Analysis/ctu/implicit.c
A clang/test/Analysis/ctu/import-threshold.c
A clang/test/Analysis/ctu/import-type-decl-definition.c
A clang/test/Analysis/ctu/inherited-default-ctor.cpp
A clang/test/Analysis/ctu/lookup-name-with-space.cpp
A clang/test/Analysis/ctu/main.c
A clang/test/Analysis/ctu/main.cpp
A clang/test/Analysis/ctu/on-demand-parsing.c
A clang/test/Analysis/ctu/on-demand-parsing.cpp
A clang/test/Analysis/ctu/onego-existingdef.cpp
A clang/test/Analysis/ctu/onego-indirect.cpp
A clang/test/Analysis/ctu/onego-small.cpp
A clang/test/Analysis/ctu/onego-toplevel.cpp
A clang/test/Analysis/ctu/test-import-failure.cpp
A clang/test/Analysis/ctu/unknown-parts-in-triples.cpp
Log Message:
-----------
[NFC][clang][analyzer] Move CTU tests and inputs into a dedicated subfolder
Move CTU related LIT tests to a dedicated directory.
--
CPP-7804
Commit: e80604a6418404934a47bb3bfc14b4a21c1de626
https://github.com/llvm/llvm-project/commit/e80604a6418404934a47bb3bfc14b4a21c1de626
Author: Matt <MattPD at users.noreply.github.com>
Date: 2026-03-26 (Thu, 26 Mar 2026)
Changed paths:
M flang/include/flang/Lower/OpenMP/Clauses.h
M flang/include/flang/Lower/Support/ReductionProcessor.h
M flang/lib/Lower/OpenMP/ClauseProcessor.cpp
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Lower/Support/PrivateReductionUtils.cpp
M flang/lib/Lower/Support/ReductionProcessor.cpp
A flang/test/Lower/OpenMP/declare-reduction-finalizer.f90
M flang/test/Lower/OpenMP/declare-reduction-intrinsic-op.f90
M flang/test/Lower/OpenMP/omp-declare-reduction-derivedtype.f90
Log Message:
-----------
[flang][OpenMP] Support user-defined declare reduction with derived types (#184897)
Fix lowering of `!$omp declare reduction` for intrinsic operators
applied
to user-defined derived types (e.g., `+` on `type(t)`). Previously, this
hit a TODO in `ReductionProcessor::getReductionInitValue` because the
code
tried to compute an init value for a non-predefined type, when it should
instead use the initializer region from the `DeclareReductionOp`.
This fixes the issue #176278: [Flang][OpenMP] Compilation error when
type-list in declare reduction directive is derived type name.
The root cause was a naming mismatch: `genOMP` for
`OpenMPDeclareReductionConstruct` used a raw operator string (e.g.,
"Add")
as the reduction name, while `processReductionArguments` at the use site
computed a canonical name via `getReductionName` (e.g.,
"add_reduction_byref_rec__QFTt"). The `lookupSymbol` in
`createDeclareReductionHelper` never found the already-created op, so it
fell through to `createDeclareReduction` which called
`getReductionInitValue`
with the derived type and hit the TODO.
The fix has three parts:
1. Consistent names: In `genOMP` for `OpenMPDeclareReductionConstruct`,
compute
the reduction name using the same `getReductionName` scheme that
`processReductionArguments` uses, so both sites produce identical symbol
names.
For intrinsic operators, this maps through `ReductionIdentifier` to get
the
canonical name. For user-defined named reductions, the raw symbol name
is used
directly, matching the existing custom-reduction lookup path.
2. Reuse reduction: In `processReductionArguments`, when an intrinsic
operator
reduction is requested, check whether a user-defined declare reduction
already
exists under that canonical name before attempting to create a new one.
If
found, reuse it. This avoids calling `createDeclareReduction` (and thus
`getReductionInitValue`) for types that have user-provided initializers.
3. Reference semantics: Change `doReductionByRef` to return true for
derived
types. Previously it returned false for both trivial and derived types,
treating
derived types as by-val. This is incorrect for user-defined combiners
that
operate on components via side-effects (e.g., `omp_out%x = omp_out%x +
omp_in%x`): the combiner mutates `omp_out` in place and doesn't produce
a
whole-struct value, so `convertExprToValue` returns the component type
(`i32`) rather than the struct type, causing a type mismatch in the
`omp.yield`. By-ref is the correct model: the combiner stores into the
lhs reference and yields it.
The combiner callback in `processReductionCombiner` is also updated to
handle the by-ref derived-type case: when the combiner result type
doesn't match the element type (as happens with component-level
assignments), the store is skipped since the assignment already wrote
into omp_out as a side-effect, and only the lhs reference is yielded.
Tests updates:
- Update declare-reduction-intrinsic-op.f90 from a negative test
(checking
for the TODO error) to a positive test checking the generated MLIR.
- Update omp-declare-reduction-derivedtype.f90 CHECK lines to match the
reference semantics fix: the `declare_reduction` now has type
`!fir.ref<...>`
with a `byref_element_type` attribute, an alloc region, a two-argument
init
region, and a combiner that stores into the lhs and yields the
reference. The function body checks for initme and mycombine are
unchanged in substance but use literal type names instead of a regex
capture to avoid greedy matching issues with nested angle brackets.
Remaining work: declare reduction without an initializer clause is not
yet
supported. I plan to address that subsequently.
Assisted-by: Claude Opus 4.6.
Note: Relied on LLM (Claude Opus 4.6) to help navigate the Flang APIs
and assist
with the corresponding boilerplate code & tests updates; in particular:
in order
to get the aforementioned consistent naming, in
`ReductionProcessor::getReductionName` I had to get rid of
`parser::DefinedOperator::EnumToString` and instead introduce
`getRedIdFromParserIntrOp` (which does the conversion manually; just to
make
sure I haven't missed anything: is there no existing conversion
function?
AFAICT, there is none, but I might've missed it). In any case, feedback
welcome!
---------
Co-authored-by: Matt P. Dziubinski <matt-p.dziubinski at hpe.com>
Commit: c9c1520dee481dbd21917cff54efdf7342f94812
https://github.com/llvm/llvm-project/commit/c9c1520dee481dbd21917cff54efdf7342f94812
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-03-26 (Thu, 26 Mar 2026)
Changed paths:
M llvm/lib/Analysis/DependenceAnalysis.cpp
Log Message:
-----------
[DA] Fix -Wunused-variable
A couple of these variables are only used within LLVM_DEBUG statements
which get removed by the preprocessor in non-assertions builds which
will cause the variable to become unused. Mark them maybe_unused given
the names make the code more readable.
Commit: dfefc03769f58d8982202276cd3381356da12dfe
https://github.com/llvm/llvm-project/commit/dfefc03769f58d8982202276cd3381356da12dfe
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-03-26 (Thu, 26 Mar 2026)
Changed paths:
M llvm/utils/lit/lit/TestRunner.py
Log Message:
-----------
[lit] Explicitly unset timer to free thread stack (#188717)
Currently the virtual address space usage of lit fluctuates wildly, with
peak usage exceeding 4GB, which results in subsequent thread spawning
errors on 32-bit systems.
The cause of this is a circular reference in TimeoutHelper._timer (via the
callback), which causes the 8MB thread stack to not be immediately
reclaimed when the timer is cancelled.
We can avoid this by explicitly unsetting the timer.
Commit: 1503293cbc7ee0fbeece3c48c2c4d9f4d87d19fd
https://github.com/llvm/llvm-project/commit/1503293cbc7ee0fbeece3c48c2c4d9f4d87d19fd
Author: Twice <twice at apache.org>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
M mlir/include/mlir-c/ExtensibleDialect.h
M mlir/include/mlir-c/IR.h
M mlir/include/mlir/Bindings/Python/IRCore.h
M mlir/include/mlir/IR/ExtensibleDialect.h
M mlir/lib/Bindings/Python/IRCore.cpp
M mlir/lib/CAPI/IR/ExtensibleDialect.cpp
M mlir/lib/CAPI/IR/IR.cpp
M mlir/test/python/dialects/builtin.py
M mlir/test/python/dialects/ext.py
M mlir/test/python/dialects/func.py
Log Message:
-----------
[MLIR][Python] Support `has_trait` for operations (#188492)
This PR adds a `has_trait(trait_cls)` API to `_OperationBase`, that can
be used for:
- C++-defined operations and C++-defined traits (e.g.
`func_return_op.has_trait(IsTerminatorTrait)`)
- Python-defined operations and C++-defined traits (e.g.
`my_python_op.has_trait(IsTerminatorTrait)`)
- Python-defined operations and Python-defined traits (e.g.
`my_python_op.has_trait(MyPythonTrait)`)
---------
Co-authored-by: Maksim Levental <maksim.levental at gmail.com>
Commit: 038ddb2e154efcbc3b16abaee9c61e6b94bbdd3a
https://github.com/llvm/llvm-project/commit/038ddb2e154efcbc3b16abaee9c61e6b94bbdd3a
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-03-26 (Thu, 26 Mar 2026)
Changed paths:
M llvm/test/CodeGen/SPIRV/linked-list.ll
M llvm/test/CodeGen/SPIRV/pstruct.ll
M llvm/test/CodeGen/SPIRV/transcoding/extract_insert_value.ll
Log Message:
-----------
[SPIR-V] Update tests for opaque pointer migration (#187674)
Enable tests `linked-list.ll`, `pstruct.ll`, and
`extract_insert_value.ll` where additional code changes are not required
related to #60133
Commit: 0b6ba34a1ce4706061827ef7793de7771c8172fa
https://github.com/llvm/llvm-project/commit/0b6ba34a1ce4706061827ef7793de7771c8172fa
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2026-03-26 (Thu, 26 Mar 2026)
Changed paths:
M cross-project-tests/debuginfo-tests/dexter-tests/memvars/const-branch.c
M cross-project-tests/debuginfo-tests/dexter/feature_tests/commands/perfect/expect_step_kind/direction.cpp
Log Message:
-----------
[cross-project-tests] un-XFAIL/XFAIL dexter tests on Linux (#188777)
See https://github.com/llvm/llvm-project/issues/188775 for the XFAILed
test.
The other was failing as XPASS on AArch64.
This is part of enabling the tests on PR CI
(https://github.com/llvm/llvm-project/pull/188522)
Commit: 8700d19a3dd386ff0593836461fea1cc7ae4aed7
https://github.com/llvm/llvm-project/commit/8700d19a3dd386ff0593836461fea1cc7ae4aed7
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2026-03-26 (Thu, 26 Mar 2026)
Changed paths:
M cross-project-tests/debuginfo-tests/dexter/feature_tests/commands/perfect/expect_step_kind/direction.cpp
Log Message:
-----------
[cross-project-tests] Mark expect_step_kind/direction.cpp as UNSUPPORTED
The test was failing on one Linux bot but XPASSing on another.
To unblock PR CI I'm going to skip it for now until we figure out what's going on.
Commit: 0ebef5e5e2f7b65dba673eb6e6dafea1d10bcd86
https://github.com/llvm/llvm-project/commit/0ebef5e5e2f7b65dba673eb6e6dafea1d10bcd86
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-03-26 (Thu, 26 Mar 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/test/CodeGen/AArch64/rem-by-const.ll
M llvm/test/CodeGen/LoongArch/lasx/issue170976.ll
M llvm/test/CodeGen/LoongArch/lsx/issue170976.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int.ll
M llvm/test/CodeGen/X86/srem-seteq-vec-nonsplat.ll
M llvm/test/CodeGen/X86/srem-vector-lkk.ll
M llvm/test/CodeGen/X86/urem-vector-lkk.ll
M llvm/test/CodeGen/X86/vector-idiv-v2i32.ll
Log Message:
-----------
[DAGCombine] Enable div by constant optimization for odd sized vectors before type legalization. (#188313)
If we we are going to legalize to a vector with the same element type
and mulh or mul_lohi are supported, allow the optimization before type
legalization.
RISC-V will widen vectors using vp.udiv/sdiv that doesn't support
division by constant optimization. In addition, type legalization will create
a build_vector with undef elements making it hard to match after type
legalization.
Other targets may need to widen by a combination of vector and scalar
divisions to avoid traps if we widen a vector with garbage.
I had to enable the MULHU->SRL DAG combine before type legalization to
prevent regressions. After type legalization, the multiply constant
build_vector will have undef elements and the combine won't trigger.
Commit: 9560abb68aece7200fbb5e4da1bb7b7499663378
https://github.com/llvm/llvm-project/commit/9560abb68aece7200fbb5e4da1bb7b7499663378
Author: Arseniy Zaostrovnykh <necto.ne at gmail.com>
Date: 2026-03-26 (Thu, 26 Mar 2026)
Changed paths:
A clang/test/Analysis/ctu/Inputs/invalid-ast-other.cpp
A clang/test/Analysis/ctu/diag/Inputs/bar.cpp
A clang/test/Analysis/ctu/diag/Inputs/simple-extern-c.cpp
A clang/test/Analysis/ctu/diag/Inputs/simple.cpp
A clang/test/Analysis/ctu/diag/invalid-index.cpp
A clang/test/Analysis/ctu/diag/invlist-ambiguous.cpp
A clang/test/Analysis/ctu/diag/invlist-empty.cpp
A clang/test/Analysis/ctu/diag/invlist-lookup-miss.cpp
A clang/test/Analysis/ctu/diag/invlist-missing.cpp
A clang/test/Analysis/ctu/diag/invlist-wrong-format.cpp
A clang/test/Analysis/ctu/diag/lang-dialect-mismatch.cpp
A clang/test/Analysis/ctu/diag/lang-mismatch.c
A clang/test/Analysis/ctu/diag/load-threshold.cpp
A clang/test/Analysis/ctu/diag/missing-index.cpp
A clang/test/Analysis/ctu/invalid-ast.cpp
A clang/test/Analysis/ctu/missing-ast.cpp
Log Message:
-----------
[clang][analyzer] Test cases for CTU import failures
Add tests for all kinds of CTU import failures expressed in the
`cross_tu::index_error_code` enumeration. Many of the test cases have no
diagnostics, because the respective errors are silently ignored in
`CrossTranslationUnitContext::emitCrossTUDiagnostics`.
I expect to improve this part, and these tests should demonstrate how
the improvements manifest to the user.
--
CPP-7804
Commit: e485a5d36e00e69e1b721b81a41be300662729c5
https://github.com/llvm/llvm-project/commit/e485a5d36e00e69e1b721b81a41be300662729c5
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-03-26 (Thu, 26 Mar 2026)
Changed paths:
M mlir/lib/Conversion/SCFToOpenMP/SCFToOpenMP.cpp
A mlir/test/Conversion/SCFToOpenMP/non-llvm-reduction-type.mlir
Log Message:
-----------
[MLIR][SCFToOpenMP] Fix crash when scf.parallel uses non-LLVM-compatible reduction type (#188559)
Replace the assert in ParallelOpLowering::matchAndRewrite that fires
when an scf.parallel reduction init value has a type incompatible with
LLVM (e.g. index) with an early notifyMatchFailure call, so the pass
fails gracefully instead of crashing.
Add a regression test that verifies the pass emits an error instead of
asserting.
Fixes #61342
Assisted-by: Claude Code
Commit: b322fa67bec2ea89b8842e74579ecc4b0208f42b
https://github.com/llvm/llvm-project/commit/b322fa67bec2ea89b8842e74579ecc4b0208f42b
Author: Kelvin Li <kli at ca.ibm.com>
Date: 2026-03-26 (Thu, 26 Mar 2026)
Changed paths:
M clang/lib/Driver/ToolChains/Flang.cpp
M flang/lib/Frontend/CompilerInstance.cpp
A flang/test/Lower/target-features-ppc.f90
Log Message:
-----------
[flang][PPC] Set PPC default target features (#188343)
This patch is to align with how clang sets up the target features for
PowerPC in order to benefit the inlining in LTO.
Commit: 1d48918ef21717c28d5ad669edc118341757908a
https://github.com/llvm/llvm-project/commit/1d48918ef21717c28d5ad669edc118341757908a
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2026-03-26 (Thu, 26 Mar 2026)
Changed paths:
M cross-project-tests/debuginfo-tests/llgdb-tests/forward-declare-class.cpp
M cross-project-tests/debuginfo-tests/llgdb-tests/nested-struct.cpp
M cross-project-tests/debuginfo-tests/llgdb-tests/nrvo-string.cpp
M cross-project-tests/debuginfo-tests/llgdb-tests/sret.cpp
M cross-project-tests/debuginfo-tests/llgdb-tests/static-member-2.cpp
M cross-project-tests/debuginfo-tests/llgdb-tests/static-member.cpp
M cross-project-tests/lit.cfg.py
Log Message:
-----------
[cross-project-tests] Add `has-gdb` LIT feature (#188780)
This patch adds a `has-gdb` LIT feature that I then use in the
`REQUIRES` clause for `llgdb` tests.
These tests were failing because `llgdb.py` couldn't find `gdb` on the
host when I tried enabling these tests on PR CI
(https://github.com/llvm/llvm-project/issues/188775).
We should get `gdb` installed on the buildbots. But we should also be
able to run the rest of the `cross-project-tests` in the meantime even
if gdb isn't installed.
Commit: 3c8e9499ac4caefce53ef43b752223fc70b67f55
https://github.com/llvm/llvm-project/commit/3c8e9499ac4caefce53ef43b752223fc70b67f55
Author: jimingham <jingham at apple.com>
Date: 2026-03-26 (Thu, 26 Mar 2026)
Changed paths:
M lldb/packages/Python/lldbsuite/test/decorators.py
M lldb/source/Plugins/LanguageRuntime/ObjC/AppleObjCRuntime/AppleObjCTrampolineHandler.cpp
M lldb/source/Plugins/LanguageRuntime/ObjC/AppleObjCRuntime/AppleThreadPlanStepThroughObjCTrampoline.cpp
M lldb/source/Plugins/LanguageRuntime/ObjC/AppleObjCRuntime/AppleThreadPlanStepThroughObjCTrampoline.h
M lldb/test/API/lang/objc/objc-class-method/TestObjCClassMethod.py
M lldb/test/API/lang/objc/objc-class-method/class.m
Log Message:
-----------
Handle accelerated ObjC Class method dispatchs. (#188392)
On Darwin, clang added a new objc class method dispatch, turned on by
the flag: `-fobjc-msgsend-class-selector-stubs`. These stubs are like
the accelerated stubs added previously for method selectors. This patch
adds support for stepping through them.
I had previously handled the method stubs by figuring out the object ->
class and then used the selector encoded in the stub name. But that
depended on all the stubs setting the object into arg1 before calling
the stub, which not all the stubs do anymore. Since all the stubs do
some work and then call objc_msgSend, instead of trying to predict what
the stub is going to do, I just let it run to the objc_msgSend and then
figure out how to go from there - at that point arg1 and arg2 are
correctly set, so I can use the regular objc_msgSend trampoline for
that.
That change meant I was no longer using the "find the implementation"
method that was passing in the selector string that we pulled from the
stub name, so this patch also removes that.
Commit: aacda8da6bc66287f45712c7b334ed552f315fcc
https://github.com/llvm/llvm-project/commit/aacda8da6bc66287f45712c7b334ed552f315fcc
Author: Prabhu Rajasekaran <prabhukr at google.com>
Date: 2026-03-26 (Thu, 26 Mar 2026)
Changed paths:
M clang/cmake/caches/Fuchsia-stage2.cmake
Log Message:
-----------
[Fuchsia] Stack analysis flags for runtimes (#175677)
Fuchsia toolchain includes runtime builds for several targets. This
patch adds `-fstack-sizes` and `-fexperimental-call-graph-section` flags
for all Fuchsia, baremetal runtimes built by Fuchsia stage2 cache file.
Commit: 5f5f330ee41d4a3da6e2462e99d0ca09b6b29ecc
https://github.com/llvm/llvm-project/commit/5f5f330ee41d4a3da6e2462e99d0ca09b6b29ecc
Author: Syadus Sefat <42645939+mssefat at users.noreply.github.com>
Date: 2026-03-26 (Thu, 26 Mar 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.interp.inreg.ll
Log Message:
-----------
[AMDGPU][GlobalIsel] Add register bank legalization rules for amdgcn_interp_inreg (#187248)
This patch adds register bank legalization rules for amdgcn_interp_inreg
operations in the AMDGPU GlobalISel pipeline.
Commit: f7feb2ad47fe0976a9148d8ca35f8a8f9dcb5fa9
https://github.com/llvm/llvm-project/commit/f7feb2ad47fe0976a9148d8ca35f8a8f9dcb5fa9
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2026-03-26 (Thu, 26 Mar 2026)
Changed paths:
M cross-project-tests/debuginfo-tests/llgdb-tests/sret.cpp
Log Message:
-----------
[cross-project-tests] XFAIL llgdb-tests/sret.cpp on Darwin
I un-XFAILed this because it was passing on AArch64 Linux. But turns out
on the Darwin bots this is failing. Hence XFAIL on Darwin (there's only
64-bit bots out there for Darwin).
```
******************** TEST 'cross-project-tests :: debuginfo-tests/llgdb-tests/sret.cpp' FAILED ********************
Exit Code: 1
Command Output (stdout):
--
Running debugger
Running FileCheck
Debugger output was:
imported lldb from: "/Library/Developer/CommandLineTools/Library/PrivateFrameworks/LLDB.framework/Resources/Python"
> break 63
SBBreakpoint: id = 1, file = '/Users/buildbot/buildbot-root/llvm-project/cross-project-tests/debuginfo-tests/llgdb-tests/sret.cpp', line = 63, exact_match = 0, locations = 1
> r
success
> p a
(A) $0 = (m_int = 1876949584)
> quit
--
Command Output (stderr):
--
/Users/buildbot/buildbot-root/aarch64-darwin/build/bin/clang --driver-mode=g++ --target=arm64-apple-darwin23.6.0 -O0 -g /Users/buildbot/buildbot-root/llvm-project/cross-project-tests/debuginfo-tests/llgdb-tests/sret.cpp -c -o /Volumes/RAMDisk/buildbot-root/aarch64-darwin/build/projects/cross-project-tests/debuginfo-tests/llgdb-tests/Output/sret.cpp.tmp.o # RUN: at line 3
+ /Users/buildbot/buildbot-root/aarch64-darwin/build/bin/clang --driver-mode=g++ --target=arm64-apple-darwin23.6.0 -O0 -g /Users/buildbot/buildbot-root/llvm-project/cross-project-tests/debuginfo-tests/llgdb-tests/sret.cpp -c -o /Volumes/RAMDisk/buildbot-root/aarch64-darwin/build/projects/cross-project-tests/debuginfo-tests/llgdb-tests/Output/sret.cpp.tmp.o
/Users/buildbot/buildbot-root/aarch64-darwin/build/bin/clang --driver-mode=g++ --target=arm64-apple-darwin23.6.0 /Volumes/RAMDisk/buildbot-root/aarch64-darwin/build/projects/cross-project-tests/debuginfo-tests/llgdb-tests/Output/sret.cpp.tmp.o -o /Volumes/RAMDisk/buildbot-root/aarch64-darwin/build/projects/cross-project-tests/debuginfo-tests/llgdb-tests/Output/sret.cpp.tmp.out # RUN: at line 4
+ /Users/buildbot/buildbot-root/aarch64-darwin/build/bin/clang --driver-mode=g++ --target=arm64-apple-darwin23.6.0 /Volumes/RAMDisk/buildbot-root/aarch64-darwin/build/projects/cross-project-tests/debuginfo-tests/llgdb-tests/Output/sret.cpp.tmp.o -o /Volumes/RAMDisk/buildbot-root/aarch64-darwin/build/projects/cross-project-tests/debuginfo-tests/llgdb-tests/Output/sret.cpp.tmp.out
PYTHON_EXEC_PATH=/Library/Developer/CommandLineTools/Library/Frameworks/Python3.framework/Versions/3.9/bin/python3.9 LLDB_PYTHON_PATH=/Users/buildbot/buildbot-root/aarch64-darwin/build/./lib/python3.9/site-packages /Users/buildbot/buildbot-root/aarch64-darwin/llvm-project/cross-project-tests/debuginfo-tests/llgdb-tests/test_debuginfo.pl /Users/buildbot/buildbot-root/llvm-project/cross-project-tests/debuginfo-tests/llgdb-tests/sret.cpp /Volumes/RAMDisk/buildbot-root/aarch64-darwin/build/projects/cross-project-tests/debuginfo-tests/llgdb-tests/Output/sret.cpp.tmp.out # RUN: at line 5
+ PYTHON_EXEC_PATH=/Library/Developer/CommandLineTools/Library/Frameworks/Python3.framework/Versions/3.9/bin/python3.9
+ LLDB_PYTHON_PATH=/Users/buildbot/buildbot-root/aarch64-darwin/build/./lib/python3.9/site-packages
+ /Users/buildbot/buildbot-root/aarch64-darwin/llvm-project/cross-project-tests/debuginfo-tests/llgdb-tests/test_debuginfo.pl /Users/buildbot/buildbot-root/llvm-project/cross-project-tests/debuginfo-tests/llgdb-tests/sret.cpp /Volumes/RAMDisk/buildbot-root/aarch64-darwin/build/projects/cross-project-tests/debuginfo-tests/llgdb-tests/Output/sret.cpp.tmp.out
[1m/Users/buildbot/buildbot-root/llvm-project/cross-project-tests/debuginfo-tests/llgdb-tests/sret.cpp:13:11: [0m [0;1;31merror: [0m [1mCHECK: expected string not found in input
[0m// CHECK: {{(_vptr\$A =)?.*}}m_int = 12
[0;1;32m ^
[0m [1m/Volumes/RAMDisk/buildbot-root/aarch64-darwin/build/projects/cross-project-tests/debuginfo-tests/llgdb-tests/Output/sret.cpp.gdb.output:7:9: [0m [0;1;30mnote: [0m [1mscanning from here
[0m(A) $0 = (m_int = 1876949584)
[0;1;32m ^
[0m [1m/Volumes/RAMDisk/buildbot-root/aarch64-darwin/build/projects/cross-project-tests/debuginfo-tests/llgdb-tests/Output/sret.cpp.gdb.output:7:10: [0m [0;1;30mnote: [0m [1mpossible intended match here
[0m(A) $0 = (m_int = 1876949584)
[0;1;32m ^
[0m
Input file: /Volumes/RAMDisk/buildbot-root/aarch64-darwin/build/projects/cross-project-tests/debuginfo-tests/llgdb-tests/Output/sret.cpp.gdb.output
Check file: /Users/buildbot/buildbot-root/llvm-project/cross-project-tests/debuginfo-tests/llgdb-tests/sret.cpp
-dump-input=help explains the following input dump.
Input was:
<<<<<<
[1m [0m [0;1;30m 1: [0m [1m [0;1;46mimported lldb from: "/Library/Developer/CommandLineTools/Library/PrivateFrameworks/LLDB.framework/Resources/Python" [0m
[0;1;30m 2: [0m [1m [0;1;46m> break 63 [0m
[0;1;30m 3: [0m [1m [0;1;46mSBBreakpoint: id = 1, file = '/Users/buildbot/buildbot-root/llvm-project/cross-project-tests/debuginfo-tests/llgdb-tests/sret.cpp', line = 63, exact_match = 0, locations = 1 [0m
[0;1;30m 4: [0m [1m [0;1;46m> r [0m
[0;1;30m 5: [0m [1m [0;1;46msuccess [0m
```
Commit: b912bad8fda6d40d8ac6f8ceb1177cd6dbdee4a9
https://github.com/llvm/llvm-project/commit/b912bad8fda6d40d8ac6f8ceb1177cd6dbdee4a9
Author: Abid Qadeer <haqadeer at amd.com>
Date: 2026-03-26 (Thu, 26 Mar 2026)
Changed paths:
M mlir/include/mlir-c/Dialect/LLVM.h
M mlir/include/mlir/Dialect/LLVMIR/LLVMAttrDefs.td
M mlir/include/mlir/Dialect/LLVMIR/LLVMDialectBytecode.td
M mlir/lib/CAPI/Dialect/LLVM.cpp
M mlir/lib/Target/LLVMIR/DebugImporter.cpp
M mlir/lib/Target/LLVMIR/DebugTranslation.cpp
M mlir/test/CAPI/llvm.c
M mlir/test/Dialect/LLVMIR/debuginfo.mlir
M mlir/test/Target/LLVMIR/Import/debug-info.ll
M mlir/test/Target/LLVMIR/llvmir-debug.mlir
Log Message:
-----------
[mlir] Add importedEntities field in DIComplileUnitAttr. (#188576)
Mostly mechanical changes to add the missing field. It can help when
importing something at non-local level like Fortran modules or C++
namespaces.
Commit: 8c2c816cf746d70b2623412c81c50e8d96d1c13a
https://github.com/llvm/llvm-project/commit/8c2c816cf746d70b2623412c81c50e8d96d1c13a
Author: Christopher Di Bella <cjdb at google.com>
Date: 2026-03-26 (Thu, 26 Mar 2026)
Changed paths:
M libcxx/include/__split_buffer
M libcxx/include/__vector/vector.h
Log Message:
-----------
Reapply "[libcxx] adds `__split_buffer::__swap_layouts`" (#185120) (#187763)
This reverts commit 01a97050f01b6b833d3d1f22997b5009293b43a3.
Commit: 331c1c0b8477d204720abf95dba5d0ad157428ae
https://github.com/llvm/llvm-project/commit/331c1c0b8477d204720abf95dba5d0ad157428ae
Author: 134ARG <xen134 at outlook.com>
Date: 2026-03-26 (Thu, 26 Mar 2026)
Changed paths:
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/test/CodeGen/AMDGPU/bug-sdag-emitcopyfromreg.ll
M llvm/test/CodeGen/PowerPC/p10-spill-creq.ll
M llvm/test/Transforms/InstCombine/binop-itofp.ll
M llvm/test/Transforms/InstCombine/sitofp.ll
Log Message:
-----------
[ValueTracking] Refine SIToFP/UIToFP FPClass inference with KnownBits (#187185)
This patch propagates the KnownBits of the source integer to improve
floating-point class inference for sitofp and uitofp instructions.
Specifically,
1. The result is never -0.0.
2. The result is not +0.0 if the source integer is known non-zero.
3. The result is not negative if the source integer is known
non-negative (or for uitofp).
4. The result is not Infinity if the largest possible integer magnitude
fits within the target FP type's exponent limits.
alive2 results for added testcases:
testcase 1: https://alive2.llvm.org/ce/z/eM34LB
testcase 2: https://alive2.llvm.org/ce/z/ext7XF
testcase 3: https://alive2.llvm.org/ce/z/g8yb6q
testcase 4: https://alive2.llvm.org/ce/z/cyFYRy
testcase 5: https://alive2.llvm.org/ce/z/LePFrm
alive2 for updated testcase in binop-itofp:
updated 1: https://alive2.llvm.org/ce/z/KPQ5bZ
udpated 2: https://alive2.llvm.org/ce/z/bGf43t
updated 3: https://alive2.llvm.org/ce/z/YKnCwU
updaetd 4: https://alive2.llvm.org/ce/z/mqKaq-
updated 5: https://alive2.llvm.org/ce/z/jYSAB5
Fix #186952
Commit: c5182c192a7dc31b8a6ddbb0ee40ce0cb27df6ae
https://github.com/llvm/llvm-project/commit/c5182c192a7dc31b8a6ddbb0ee40ce0cb27df6ae
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-03-26 (Thu, 26 Mar 2026)
Changed paths:
M mlir/lib/Interfaces/IndexingMapOpInterface.cpp
A mlir/test/Dialect/Linalg/fill-custom-scalar-type.mlir
Log Message:
-----------
[MLIR][Interfaces] Allow non-builtin scalar types in IndexingMapOpInterface (#188774)
The scalar type check in `IndexingMapOpInterface::verifyImpl` and its
helper `verifyIndexingMapOperandType` used `isIntOrIndexOrFloat() ||
isa<ComplexType>()`, which only accepted builtin scalar types. This
rejected valid custom-dialect scalar types such as pointer types
(`\!ptr.ptr<...>`) or other non-shaped dialect types.
The `isScalar` method in `DestinationStyleOpInterface` already treats
any non-MemRef/non-Tensor type as scalar. Align `IndexingMapOpInterface`
with this definition by treating any non-ShapedType as a rank-0 scalar,
regardless of whether it is a builtin type.
Fixes #183606
Assisted-by: Claude Code
Commit: 593f82ab9d21b918a85ef440a24921f9f4f4d15b
https://github.com/llvm/llvm-project/commit/593f82ab9d21b918a85ef440a24921f9f4f4d15b
Author: Sietze Riemersma <43845930+KungFuDonkey at users.noreply.github.com>
Date: 2026-03-26 (Thu, 26 Mar 2026)
Changed paths:
M clang/include/clang/Basic/Builtins.td
M clang/lib/CodeGen/CGHLSLBuiltins.cpp
M clang/lib/CodeGen/CGHLSLRuntime.h
M clang/lib/Headers/hlsl/hlsl_alias_intrinsics.h
A clang/test/CodeGenHLSL/builtins/GroupMemoryBarrier.hlsl
A clang/test/SemaHLSL/BuiltIns/GroupMemoryBarrier-errors.hlsl
M llvm/include/llvm/IR/IntrinsicsDirectX.td
M llvm/include/llvm/IR/IntrinsicsSPIRV.td
M llvm/lib/Target/DirectX/DXIL.td
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
A llvm/test/CodeGen/DirectX/group_memory_barrier.ll
M llvm/test/CodeGen/DirectX/group_memory_barrier_with_group_sync.ll
A llvm/test/CodeGen/SPIRV/hlsl-intrinsics/group_memory_barrier.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/group_memory_barrier_with_group_sync.ll
Log Message:
-----------
[HLSL][DXIL][SPRIV] Added `GroupMemoryBarrier()` (#185383)
Adds the `GroupMemoryBarrier()` HLSL function to SPIRV and DirectX with
additional tests for the different backends.
When this moves in, will create another PR with this as a template for
the other Barriers:
- `AllMemoryBarrier()` #99076
- `AllMemoryBarrierWithGroupSync()` #99090
- `DeviceMemoryBarrier()` #99105
- `DeviceMemoryBarrierWithGroupSync()` #99106
`Barrier()` does not have support for SPIRV, so I will exclude that from
the next PR.
- [x] Implement GroupMemoryBarrier clang builtin,
- [x] Link GroupMemoryBarrier clang builtin with hlsl_intrinsics.h
- [x] Add sema checks for GroupMemoryBarrier to
CheckHLSLBuiltinFunctionCall in SemaChecking.cpp
- [x] Add codegen for GroupMemoryBarrier to EmitHLSLBuiltinExpr in
CGBuiltin.cpp
- [x] Add codegen tests to
clang/test/CodeGenHLSL/builtins/GroupMemoryBarrier.hlsl
- [x] Add sema tests to
clang/test/SemaHLSL/BuiltIns/GroupMemoryBarrier-errors.hlsl
- [x] Create the int_dx_GroupMemoryBarrier intrinsic in
IntrinsicsDirectX.td
- [x] Create the DXILOpMapping of int_dx_GroupMemoryBarrier to 80 in
DXIL.td
- [x] Create the GroupMemoryBarrier.ll and GroupMemoryBarrier_errors.ll
tests in llvm/test/CodeGen/DirectX/
- [x] Create the int_spv_GroupMemoryBarrier intrinsic in
IntrinsicsSPIRV.td
- [x] In SPIRVInstructionSelector.cpp create the GroupMemoryBarrier
lowering and map it to int_spv_GroupMemoryBarrier in
SPIRVInstructionSelector::selectIntrinsic.
- [x] Create SPIR-V backend test case in
llvm/test/CodeGen/SPIRV/hlsl-intrinsics/GroupMemoryBarrier.ll
<!-- branch-stack-start -->
<!-- branch-stack-end -->
Commit: bb443359a8adf90fa6c8bbbe2f5db72bba75c031
https://github.com/llvm/llvm-project/commit/bb443359a8adf90fa6c8bbbe2f5db72bba75c031
Author: Fangrui Song <i at maskray.me>
Date: 2026-03-26 (Thu, 26 Mar 2026)
Changed paths:
M lld/ELF/InputSection.cpp
M lld/ELF/MarkLive.cpp
M lld/ELF/Symbols.cpp
M lld/test/ELF/merge-piece-oob.s
Log Message:
-----------
[ELF] Validate merge section offsets in getSymVA and match GNU ld (#188677)
Move the "offset is outside the section" error for merge sections from
getSectionPiece to getSymVA, where we know the offset comes from a
section symbol + addend. Include the offset value in the diagnostic.
Accept offset == section_size (one-past-end) to match GNU ld behavior,
while rejecting offset > section_size. Skip out-of-bounds offsets in
MarkLive to avoid assertion failures in getSectionPiece.
Commit: 6620062e8b3565e83c9f8f963a018413c4b08423
https://github.com/llvm/llvm-project/commit/6620062e8b3565e83c9f8f963a018413c4b08423
Author: Jan Svoboda <jan_svoboda at apple.com>
Date: 2026-03-26 (Thu, 26 Mar 2026)
Changed paths:
M clang/include/clang/Basic/Module.h
M clang/include/clang/Frontend/ASTUnit.h
M clang/include/clang/Serialization/ASTReader.h
M clang/include/clang/Serialization/ASTWriter.h
M clang/include/clang/Serialization/ModuleFile.h
M clang/include/clang/Serialization/ModuleManager.h
M clang/lib/DependencyScanning/DependencyScannerImpl.cpp
M clang/lib/Frontend/ASTUnit.cpp
M clang/lib/Frontend/DependencyFile.cpp
M clang/lib/Frontend/FrontendAction.cpp
M clang/lib/Frontend/Rewrite/FrontendActions.cpp
M clang/lib/Serialization/ASTReader.cpp
M clang/lib/Serialization/ASTWriter.cpp
M clang/lib/Serialization/GlobalModuleIndex.cpp
M clang/lib/Serialization/ModuleManager.cpp
M clang/test/ClangScanDeps/prebuilt-modules-in-stable-dirs.c
M clang/tools/libclang/CXIndexDataConsumer.cpp
M clang/tools/libclang/CXIndexDataConsumer.h
M clang/tools/libclang/Indexing.cpp
Log Message:
-----------
[clang][modules] Remove `ModuleFile::File` (#185995)
This PR removes the assumption that a deserialized module file is backed
by a `FileEntry`. The uniquing and lookup role of `ModuleFile`'s
`FileEntryRef` member is entirely replaced with the `ModuleFileKey`
member. For checking whether an existing `ModuleFile` conforms to the
expectations of importers, the file size and mod time are now stored
directly on `ModuleFile` (previously provided by its `FileEntry`).
Together, these changes enable removal of the
`ModuleManager::lookupByFileName(StringRef)` and
`ModuleManager::lookup(const FileEntry *)` APIs.
Commit: 160b29cb527ce048b811eb9839b7189b1bfced0a
https://github.com/llvm/llvm-project/commit/160b29cb527ce048b811eb9839b7189b1bfced0a
Author: Tom Eccles <tom.eccles at arm.com>
Date: 2026-03-26 (Thu, 26 Mar 2026)
Changed paths:
M flang/include/flang/Lower/OpenMP/Clauses.h
M flang/include/flang/Lower/Support/ReductionProcessor.h
M flang/lib/Lower/OpenMP/ClauseProcessor.cpp
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Lower/Support/PrivateReductionUtils.cpp
M flang/lib/Lower/Support/ReductionProcessor.cpp
R flang/test/Lower/OpenMP/declare-reduction-finalizer.f90
M flang/test/Lower/OpenMP/declare-reduction-intrinsic-op.f90
M flang/test/Lower/OpenMP/omp-declare-reduction-derivedtype.f90
Log Message:
-----------
Revert "[flang][OpenMP] Support user-defined declare reduction with derived types" (#188803)
Reverts llvm/llvm-project#184897
Broke offloading tests. See
https://lab.llvm.org/buildbot/#/builders/67/builds/882
Commit: 2257b5cb9d9418d90c3571992243843f53b3f043
https://github.com/llvm/llvm-project/commit/2257b5cb9d9418d90c3571992243843f53b3f043
Author: Arthur Eubanks <aeubanks at google.com>
Date: 2026-03-26 (Thu, 26 Mar 2026)
Changed paths:
M llvm/lib/Transforms/Instrumentation/AddressSanitizer.cpp
M llvm/test/Instrumentation/AddressSanitizer/remove-memory-effects.ll
M llvm/test/Instrumentation/HWAddressSanitizer/mem-attr.ll
Log Message:
-----------
[HWASan] [ASan] Fix memory effects attribute updating (#187794)
This was originally added in #106816, but missed some edge cases, e.g. a
function marked `memory(argmem: readwrite, inaccessiblemem: write)`.
This also only sets IRMemLocation::Other to be ModRef rather than
removing the entire memory attribute, since instrumentation shouldn't
affect other memory locations.
Fixes #56205 more.
Commit: b51dfdec479fc16360c65ff2796f0835a85ceb16
https://github.com/llvm/llvm-project/commit/b51dfdec479fc16360c65ff2796f0835a85ceb16
Author: Alexey Karyakin <akaryaki at qti.qualcomm.com>
Date: 2026-03-26 (Thu, 26 Mar 2026)
Changed paths:
M clang/lib/Driver/ToolChains/Hexagon.cpp
M clang/test/Driver/hexagon-toolchain-elf.c
Log Message:
-----------
[Hexagon] Driver: Always use resource include directory (#186494)
Before https://github.com/llvm/llvm-project/pull/185456, non-linux
triples used the resource include directory
implicitly, by logic in preprocessor.
https://github.com/llvm/llvm-project/pull/185456 disables that logic
for all Hexagon triples. To compensate, add the resource include
directory in the driver. This also makes the corresponding driver
logic less convoluted.
The order of inclusion is now uniform for all triples: resource
directory first and default or user-specified sysroot next.
Commit: e93c18ca2af227c350046aa9ebb31dc766662aeb
https://github.com/llvm/llvm-project/commit/e93c18ca2af227c350046aa9ebb31dc766662aeb
Author: Dave Lee <davelee.com at gmail.com>
Date: 2026-03-26 (Thu, 26 Mar 2026)
Changed paths:
M clang/include/clang/Basic/DiagnosticLexKinds.td
M clang/include/clang/Frontend/CompilerInstance.h
M clang/include/clang/Lex/Preprocessor.h
M clang/lib/Frontend/CompilerInstance.cpp
M clang/lib/Lex/DependencyDirectivesScanner.cpp
M clang/lib/Lex/Lexer.cpp
M clang/lib/Lex/PPDirectives.cpp
M clang/lib/Lex/PPLexerChange.cpp
M clang/lib/Lex/Preprocessor.cpp
M clang/test/Modules/lookup.cpp
M clang/test/Modules/no-stale-modtime.m
R clang/test/Modules/objc-at-import.m
M clang/unittests/Lex/DependencyDirectivesScannerTest.cpp
M clang/utils/ClangVisualizers/clang.natvis
Log Message:
-----------
Revert "[ObjC][Preprocessor] Handle @import directive as a pp-directive" (#188806)
Reverts llvm/llvm-project#157726
This is causing a number of lldb test failures, specifically tests that
do `@import ...` expression evaluation. See
https://green.lab.llvm.org/job/llvm.org/view/LLDB/job/as-lldb-cmake/
Commit: d9a44c818f776f280c73ea6941940d6c6db68bb6
https://github.com/llvm/llvm-project/commit/d9a44c818f776f280c73ea6941940d6c6db68bb6
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-03-26 (Thu, 26 Mar 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/AArch64/externally-used-copyables.ll
M llvm/test/Transforms/SLPVectorizer/NVPTX/v2f16.ll
M llvm/test/Transforms/SLPVectorizer/X86/parent-node-non-schedulable.ll
Log Message:
-----------
[SLP]Initial support for vector register spills/reloads estimation
Adds initial support for spill/reload estimation. Currently, it just
runs the operands and calculates number of registers, used by the
operands. If this number greater than the number of total available
registers, it consider the first (full) groups as the candidates for the spills/reloads.
Reviewers: hiraditya, RKSimon, bababuck
Pull Request: https://github.com/llvm/llvm-project/pull/187594
Commit: ea9f5162bf631127e0364d754d8ec4084cf59395
https://github.com/llvm/llvm-project/commit/ea9f5162bf631127e0364d754d8ec4084cf59395
Author: Nishant Patel <nishant.b.patel at intel.com>
Date: 2026-03-26 (Thu, 26 Mar 2026)
Changed paths:
M mlir/include/mlir/Dialect/XeGPU/Utils/XeGPUUtils.h
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUWgToSgDistribute.cpp
M mlir/lib/Dialect/XeGPU/Utils/XeGPUUtils.cpp
M mlir/test/Dialect/XeGPU/xegpu-wg-to-sg-unify-ops.mlir
Log Message:
-----------
[MLIR][XeGPU] Add support for lowering vector.multi_reduction to scalar in Wg to Sg (#188623)
This PR adds support of lowering multi_reduction (to scalar) from wg to
sg.
Commit: 46c79a0c1f1bb4a47758b82a6055746c7b09e3bb
https://github.com/llvm/llvm-project/commit/46c79a0c1f1bb4a47758b82a6055746c7b09e3bb
Author: Michael Levine <melevine45 at gmail.com>
Date: 2026-03-26 (Thu, 26 Mar 2026)
Changed paths:
M libcxx/include/__atomic/atomic_ref.h
M libcxx/include/__memory/is_sufficiently_aligned.h
Log Message:
-----------
[libc++] Use internal std::__is_sufficiently_aligned to check requirement in atomic ref constructors (#188530)
This PR introduces a `std::__is_sufficiently_aligned` helper function that
can be used for the `atomic_ref` C++20 constructors while the public
C++26 `std::is_sufficiently_aligned` delegates to the new helper
function.
Fixes #179803
Assisted-by: Claude Code
Signed-off-by: mlevine55 <mlevine55 at bloomberg.net>
Commit: 9daff72e9d8fbf40838a82a12284304cab85f2e7
https://github.com/llvm/llvm-project/commit/9daff72e9d8fbf40838a82a12284304cab85f2e7
Author: Nerixyz <nerixdev at outlook.de>
Date: 2026-03-26 (Thu, 26 Mar 2026)
Changed paths:
M cross-project-tests/debuginfo-tests/dexter/dex/debugger/dbgeng/dbgeng.py
Log Message:
-----------
[Dexter][Dbgeng] Don't replace '.' with '->' in expressions (#188769)
After #187709, the
[nrvo.cpp](https://github.com/llvm/llvm-project/blob/3a56470a0ee68b26ffe93f5079de58ed22f5dc18/cross-project-tests/debuginfo-tests/dexter-tests/nrvo.cpp)
test failed (e.g.
https://lab.llvm.org/buildbot/#/builders/46/builds/32858), because it
couldn't evaluate the expression `result.i` anymore. This was because it
actually evaluated `result->i`, which doesn't work anymore as `result`
is not a pointer or reference. Before #187709, `result` was declared as
a reference that lives at `frame-pointer+offset`.
Now it's no longer a reference, but the location is
`*(frame-pointer+offset) + 0`.
There weren't any other tests that were accessing struct fields and used
dbgeng as the debugger.
Commit: e80b46efc500d603e0f10f95714765fc406bc625
https://github.com/llvm/llvm-project/commit/e80b46efc500d603e0f10f95714765fc406bc625
Author: Michael Levine <melevine45 at gmail.com>
Date: 2026-03-26 (Thu, 26 Mar 2026)
Changed paths:
M libcxx/include/__cxx03/stdatomic.h
Log Message:
-----------
[libc++] Remove the dead code in stdatomic.h in frozen C++03 mode (#188346)
Fixes #187384
Assisted-by: Claude Code
Signed-off-by: mlevine55 <mlevine55 at bloomberg.net>
Commit: ad52fb36c64149b4219d101928930932c42687f8
https://github.com/llvm/llvm-project/commit/ad52fb36c64149b4219d101928930932c42687f8
Author: Zhen Wang <37195552+wangzpgi at users.noreply.github.com>
Date: 2026-03-26 (Thu, 26 Mar 2026)
Changed paths:
M flang/lib/Optimizer/Transforms/CUDA/CUFComputeSharedMemoryOffsetsAndSize.cpp
M flang/test/Fir/CUDA/cuda-shared-offset.mlir
Log Message:
-----------
[flang][cuda] Use walk instead of getOps to process nested cuf.shared_memory ops (#188812)
The CUFComputeSharedMemoryOffsetsAndSize pass used getOps to find
cuf.shared_memory operations, which only searches direct children of
gpu.func. When cuf.shared_memory ops are nested inside scf.parallel
(e.g. from reduction lowering), they are missed and never receive
offset/isStatic attributes, causing a "cuf.shared_memory must have an
offset for code gen" assertion later. Switch to walk to find
cuf.shared_memory ops at any nesting depth.
Commit: 15213edadfcc01ae22d36ad5fe7a8f5dd414f82c
https://github.com/llvm/llvm-project/commit/15213edadfcc01ae22d36ad5fe7a8f5dd414f82c
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2026-03-26 (Thu, 26 Mar 2026)
Changed paths:
M libcxx/include/__cxx03/__functional/operations.h
Log Message:
-----------
[libc++] Fix negate and bit_xor in C++03 frozen headers (#187573)
An unintended change in #134045 gave them a default template argument,
which is supposed to be from C++14 onwards.
I considered adding a test for this but it is really awkward to test
that we don't support passing no template argument in C++03 mode and
that provides little value, so I decided against it.
Commit: 1eebbb066a3711330b535965a7701c6f6f52f332
https://github.com/llvm/llvm-project/commit/1eebbb066a3711330b535965a7701c6f6f52f332
Author: Sarah Spall <sarahspall at microsoft.com>
Date: 2026-03-26 (Thu, 26 Mar 2026)
Changed paths:
M clang/lib/Sema/SemaHLSL.cpp
M clang/test/CodeGenHLSL/BasicFeatures/InitLists.hlsl
M clang/test/SemaHLSL/Language/InitListAST.hlsl
A clang/test/SemaHLSL/Types/InitListConstantExpr.hlsl
Log Message:
-----------
[HLSL] Create XValue in HLSL list initialization if record is a prvalue (#186233)
In the case where the record in an Init List expression is a prvalue
create an xvalue so member accesses will be xvalues. This is in line
with the C++ specification. The Clang code which generates the member
field access however does not create an xvalue if the record is a
prvalue, so we make the record an xvalue here.
https://en.cppreference.com/w/cpp/language/value_category.html
```
is an xvalue expression: a.m, the member of object expression, where a is an rvalue and m is a non-static data member of an object type;
```
Adds Constant expression evaluation tests for Init list expressions
which contain a cast. This test file is currently XFAILed on issue
#188577
Closes #185911
---------
Co-authored-by: Deric C. <cheung.deric at gmail.com>
Commit: aa2c7f136ade7e38f4cd940b5efe49b71220a739
https://github.com/llvm/llvm-project/commit/aa2c7f136ade7e38f4cd940b5efe49b71220a739
Author: yonghong-song <yhs at fb.com>
Date: 2026-03-26 (Thu, 26 Mar 2026)
Changed paths:
M clang/test/Preprocessor/bpf-predefined-macros.c
Log Message:
-----------
[Clang] Add selftest for macro __BPF_FEATURE_ATOMIC_MEM_ORDERING (#188675)
Add selftest for macro __BPF_FEATURE_ATOMIC_MEM_ORDERING as the pull
request [1] missed the test.
[1] https://github.com/llvm/llvm-project/pull/107343
Commit: 09951fd4757ef3b2f37500b52ecdf74ffd46ee50
https://github.com/llvm/llvm-project/commit/09951fd4757ef3b2f37500b52ecdf74ffd46ee50
Author: Nick Sarnie <nick.sarnie at intel.com>
Date: 2026-03-26 (Thu, 26 Mar 2026)
Changed paths:
M clang/lib/CodeGen/CGDebugInfo.cpp
R clang/test/CodeGenHLSL/debug/source-language.hlsl
M llvm/docs/SPIRVUsage.rst
M llvm/lib/Target/SPIRV/SPIRVTargetMachine.cpp
M llvm/test/CodeGen/SPIRV/debug-info/debug-compilation-unit.ll
M llvm/test/CodeGen/SPIRV/debug-info/debug-type-basic.ll
M llvm/test/CodeGen/SPIRV/debug-info/debug-type-pointer.ll
R llvm/test/CodeGen/SPIRV/debug-info/hlsl-debug-info-auto-activation.ll
M llvm/test/CodeGen/SPIRV/hlsl-resources/SampleErrorsDebug.ll
M llvm/test/CodeGen/SPIRV/llc-pipeline.ll
Log Message:
-----------
Revert "[HLSL][SPIRV] Add support for -g to generate NonSemantic Debug Info" (#188771)
Reverts llvm/llvm-project#187051
Breaks some OpenMP offload tests
Commit: 0f963cb632d47b09a224b3716f7bc12b1474fc9a
https://github.com/llvm/llvm-project/commit/0f963cb632d47b09a224b3716f7bc12b1474fc9a
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-03-26 (Thu, 26 Mar 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanUnroll.cpp
Log Message:
-----------
[VPlan] Extract addLaneToStartIndex helper from cloneForLane. (NFC) (#188819)
Factor out the logic for adding a lane offset to a
VPScalarIVStepsRecipe's start index into a standalone
addLaneToStartIndex helper function. This makes the logic reusable for
dissolving replicate regions.
PR: https://github.com/llvm/llvm-project/pull/188819
Commit: f8fe67c998dbc792e28993800edf8c5040c8711c
https://github.com/llvm/llvm-project/commit/f8fe67c998dbc792e28993800edf8c5040c8711c
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-03-26 (Thu, 26 Mar 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.h
M llvm/lib/Transforms/Vectorize/VPlanUtils.h
Log Message:
-----------
[VPlan] Expose cloneFrom and mergeBlocksIntoPredecessors. (NFC) (#188818)
Move cloneFrom from a file-static function in VPlan.cpp to a public
static method VPBlockUtils::cloneFrom, and move
mergeBlocksIntoPredecessors from a file-static function in
VPlanTransforms.cpp to a public static method
VPlanTransforms::mergeBlocksIntoPredecessors.
This is in preparation for dissolving replicate regions which needs both
utilities.
Split off from approved
https://github.com/llvm/llvm-project/pull/170212.
PR: https://github.com/llvm/llvm-project/pull/188818
Commit: 5b8c175804821e4f6e5141a7cf2ea8a0f9730834
https://github.com/llvm/llvm-project/commit/5b8c175804821e4f6e5141a7cf2ea8a0f9730834
Author: Peter Collingbourne <pcc at google.com>
Date: 2026-03-26 (Thu, 26 Mar 2026)
Changed paths:
M libcxx/include/__hash_table
M libcxx/test/extensions/gnu/hash_map/copy.pass.cpp
Log Message:
-----------
[libc++] Add another const_cast to support hash_map copy assignment
There was one more const_cast needed after #183223 without which
copy assignment of hash_map was broken. Add it, together with a copy
assignment test.
Reviewers: ldionne
Pull Request: https://github.com/llvm/llvm-project/pull/188660
Commit: 423f410e7e1bbcb4f1793d52522216711387eb92
https://github.com/llvm/llvm-project/commit/423f410e7e1bbcb4f1793d52522216711387eb92
Author: Thurston Dang <thurston at google.com>
Date: 2026-03-26 (Thu, 26 Mar 2026)
Changed paths:
M llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
M llvm/test/Instrumentation/MemorySanitizer/AArch64/aarch64-bf16-dotprod-intrinsics.ll
M llvm/test/Instrumentation/MemorySanitizer/AArch64/aarch64-matmul.ll
Log Message:
-----------
[msan] Micro-optimize NEON matrix-multiply instrumentation (#188815)
Replace Or(SExt(),SExt()) with the equivalent SExt(Or()).
Commit: 0383cd0f7755a46acf3f82cda7b21ee0e062bb59
https://github.com/llvm/llvm-project/commit/0383cd0f7755a46acf3f82cda7b21ee0e062bb59
Author: Kiva <imkiva at islovely.icu>
Date: 2026-03-26 (Thu, 26 Mar 2026)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
M llvm/test/Transforms/InstCombine/fcmp.ll
Log Message:
-----------
[InstCombine] Fold `fcmp (C - [su]itofp X), C` to integer compares (#185826)
Recognize `fcmp pred (C - [su]itofp X), C` in InstCombine and fold it to
`fcmp swap(pred) [su]itofp X, 0` for certain constant `C` (to make sure
`C - Y` nevers rounds back to `C`), then the new pattern further can be
folded by `foldFCmpIntToFPConst` to integer compares.
Fixes #185561
alive2: https://alive2.llvm.org/ce/z/9dWsCb
alive2 with constant constraints (needs local alive2 build):
https://alive2.llvm.org/ce/z/wDs9Tj
I tried generalizing the pattern to any `fcmp pred, (C - Y), C` but
alive2 says no: https://alive2.llvm.org/ce/z/qMLGah. So I will try to
find more constraints on C and Y to make this rewrite hold in future
PRs.
Commit: f2829b96d0919edf595770701b8fc5c43c9dfe01
https://github.com/llvm/llvm-project/commit/f2829b96d0919edf595770701b8fc5c43c9dfe01
Author: Björn Schäpers <bjoern at hazardy.de>
Date: 2026-03-26 (Thu, 26 Mar 2026)
Changed paths:
M clang/Maintainers.md
Log Message:
-----------
Stepping up as clang-format maintainer (#188602)
Commit: a9c6f38e8df4a2c9d60e0c98b1627860572177bc
https://github.com/llvm/llvm-project/commit/a9c6f38e8df4a2c9d60e0c98b1627860572177bc
Author: Zorojuro <sawantsukumar at gmail.com>
Date: 2026-03-26 (Thu, 26 Mar 2026)
Changed paths:
M libc/hdr/math_function_macros.h
M libc/hdr/sys_epoll_macros.h
M libc/hdr/types/dl_info.h
M libc/hdr/types/suseconds_t.h
M libc/include/llvm-libc-types/Elf32_Phdr.h
M libc/include/llvm-libc-types/Elf64_Off.h
M libc/src/__support/frac128.h
M libc/src/__support/math/exp10_float16_constants.h
M libc/src/__support/math/fmabf16.h
M libc/src/__support/threads/CndVar.h
M libc/src/__support/threads/unix_mutex.h
M libc/src/math/fminimum_mag_num.h
M libc/src/math/powi.h
M libc/src/math/powif.h
M libc/src/math/setpayloadsigl.h
M libc/src/math/totalordermagl.h
M libc/src/stdlib/memalignment.h
M libc/src/string/memory_utils/arm/inline_memset.h
M libc/src/unistd/fpathconf.h
M libc/src/unistd/linux/pathconf_utils.h
M libc/src/unistd/pathconf.h
M libc/test/src/math/performance_testing/Timer.h
Log Message:
-----------
[libc] Fixes all guard comments of libc (#188701)
This PR intends to fix ALL the wrong guard comments for libc
Script used:
[guard_checker](https://github.com/Sukumarsawant/guard_checker/blob/main/check_headers.py)
Commit: e9cb7782b4482c653c623585fc7a9fdcd5380755
https://github.com/llvm/llvm-project/commit/e9cb7782b4482c653c623585fc7a9fdcd5380755
Author: Lei Huang <lei at ca.ibm.com>
Date: 2026-03-26 (Thu, 26 Mar 2026)
Changed paths:
R clang/test/CodeGen/PowerPC/builtins-ppc-error.c
R clang/test/CodeGen/PowerPC/builtins-ppc-p10vector-error.c
R clang/test/CodeGen/PowerPC/builtins-ppc-xlcompat-cas-error.c
R clang/test/CodeGen/PowerPC/builtins-ppc-xlcompat-error.c
R clang/test/CodeGen/PowerPC/builtins-ppc-xlcompat-fetch-error.c
R clang/test/CodeGen/PowerPC/builtins-ppc-xlcompat-pwr9-error.c
R clang/test/CodeGen/PowerPC/builtins-ppc-xlcompat-pwr9-warning.c
R clang/test/CodeGen/PowerPC/builtins-ppc-xlcompat-vec-error.c
A clang/test/Sema/PowerPC/aix-attr-align.c
A clang/test/Sema/PowerPC/aix-attr-aligned-vector-warn.c
A clang/test/Sema/PowerPC/aix-attr-aligned-vector-warn.cpp
A clang/test/Sema/PowerPC/aix-attr-tls_model.c
A clang/test/Sema/PowerPC/aix-builtin-cpu-unsupports.c
A clang/test/Sema/PowerPC/aix-pragma-align-packed-warn.c
A clang/test/Sema/PowerPC/aix-pragma-pack-and-align.c
A clang/test/Sema/PowerPC/altivec-generic-overload.c
A clang/test/Sema/PowerPC/altivec-init.c
A clang/test/Sema/PowerPC/builtin-cpu-unsupports-AIX-Os.c
A clang/test/Sema/PowerPC/builtins-bcd-format-conversion.c
A clang/test/Sema/PowerPC/builtins-bcd-transform.c
A clang/test/Sema/PowerPC/builtins-ppc-error.c
A clang/test/Sema/PowerPC/builtins-ppc-p10vector-error.c
A clang/test/Sema/PowerPC/builtins-ppc-xlcompat-cas-error.c
A clang/test/Sema/PowerPC/builtins-ppc-xlcompat-error.c
A clang/test/Sema/PowerPC/builtins-ppc-xlcompat-fetch-error.c
A clang/test/Sema/PowerPC/builtins-ppc-xlcompat-pwr9-error.c
A clang/test/Sema/PowerPC/builtins-ppc-xlcompat-pwr9-warning.c
A clang/test/Sema/PowerPC/builtins-ppc-xlcompat-vec-error.c
A clang/test/Sema/PowerPC/builtins-ppc.c
A clang/test/Sema/PowerPC/float128-ld-incompatibility.cpp
A clang/test/Sema/PowerPC/libbuiltins-ctype-powerpc64.c
A clang/test/Sema/PowerPC/ppc-attr-target-inline.c
A clang/test/Sema/PowerPC/ppc-bool.c
A clang/test/Sema/PowerPC/ppc-dmf-types.c
A clang/test/Sema/PowerPC/ppc-pair-mma-types.c
A clang/test/Sema/PowerPC/varargs-aix.c
R clang/test/Sema/aix-attr-align.c
R clang/test/Sema/aix-attr-aligned-vector-warn.c
R clang/test/Sema/aix-attr-aligned-vector-warn.cpp
R clang/test/Sema/aix-attr-tls_model.c
R clang/test/Sema/aix-builtin-cpu-unsupports.c
R clang/test/Sema/aix-pragma-align-packed-warn.c
R clang/test/Sema/aix-pragma-pack-and-align.c
R clang/test/Sema/altivec-generic-overload.c
R clang/test/Sema/altivec-init.c
R clang/test/Sema/builtin-cpu-unsupports-AIX-Os.c
R clang/test/Sema/builtins-bcd-format-conversion.c
R clang/test/Sema/builtins-bcd-transform.c
R clang/test/Sema/builtins-ppc.c
R clang/test/Sema/float128-ld-incompatibility.cpp
R clang/test/Sema/libbuiltins-ctype-powerpc64.c
R clang/test/Sema/ppc-attr-target-inline.c
R clang/test/Sema/ppc-bool.c
R clang/test/Sema/ppc-dmf-types.c
R clang/test/Sema/ppc-pair-mma-types.c
R clang/test/Sema/varargs-aix.c
Log Message:
-----------
[NFC] Move PowerPC sema tests to test/Sema/PowerPC subdir (#188639)
Commit: 6b3556a6ea2fda31be3a615119d1c8d89452ce36
https://github.com/llvm/llvm-project/commit/6b3556a6ea2fda31be3a615119d1c8d89452ce36
Author: Christopher Ferris <cferris1000 at users.noreply.github.com>
Date: 2026-03-26 (Thu, 26 Mar 2026)
Changed paths:
M compiler-rt/lib/scudo/standalone/common.h
Log Message:
-----------
[scudo] Add Last entry to ReleaseToOS enum. (#188645)
This allows static asserts to be set in tracing code that might use the
ReleaseToOS values as indexes.
This would have caused a compile failure instead of a runtime crash when
I added the use of a new ReleaseToOS value.
Commit: 049700fcef8a40ff066cee597521891c7e065dc6
https://github.com/llvm/llvm-project/commit/049700fcef8a40ff066cee597521891c7e065dc6
Author: Björn Schäpers <bjoern at hazardy.de>
Date: 2026-03-26 (Thu, 26 Mar 2026)
Changed paths:
A clang/test/Format/dont-crash-on-nul.cpp
M clang/tools/clang-format/ClangFormat.cpp
Log Message:
-----------
[clang-format] Don't crash on an input with a NUL char (#188631)
In dry-run mode we copied the memory buffer, but that just looked until
the first NUL char. But since we exit directly afterwards we can move
the buffer into the check and retain the size information.
Fixes https://github.com/llvm/llvm-project/issues/188500
Commit: 968b6aaef1c543e126d8f63bcdadea1e8164d8b6
https://github.com/llvm/llvm-project/commit/968b6aaef1c543e126d8f63bcdadea1e8164d8b6
Author: Alexey Samsonov <vonosmas at gmail.com>
Date: 2026-03-26 (Thu, 26 Mar 2026)
Changed paths:
M libc/utils/hdrgen/hdrgen/header.py
A libc/utils/hdrgen/tests/expected_output/macro_only.h
A libc/utils/hdrgen/tests/input/macro_only.yaml
M libc/utils/hdrgen/tests/test_integration.py
Log Message:
-----------
[libc][hdrgen] Print __BEGIN_C_DECLS / __END_C_DECLS conditionally. (#188830)
Clean up the `%public_api` printer code slightly - get rid of explicit
`\n` and ensure we only print `__BEGIN_C_DECLS` and `__END_C_DECLS` if
the generated header actually contains functions or objects to declare.
I've noticed that after 27ba9e2a44c11f8123528c350227db2c9a707c8f landed,
generated errno.h header has two blocks of `__BEGIN_C_DECLS` /
`__END_C_DECLS`: an empty one was generated automatically from
`%public_api` section that was intended to only add the `errno_t` type
declaration.
Commit: 1759b81de98eae7a05cbb6f9e2754c103d52f670
https://github.com/llvm/llvm-project/commit/1759b81de98eae7a05cbb6f9e2754c103d52f670
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-03-26 (Thu, 26 Mar 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/X86/copyable-operands-reordering.ll
Log Message:
-----------
[SLP]Improve analysis of copyables operands for commmutative main instruction
For commutative copyables, instruction operands are always LHS and other
are RHS. But if some instruction is main and has 2 instructions
operands and RHS is more compatible with LHS operands, than LHS
operands, need to swap such operands for better analysis.
Reviewers: hiraditya, RKSimon
Pull Request: https://github.com/llvm/llvm-project/pull/185320
Commit: 86475afa7d5c9965878ef93b5bc2d0c644152a23
https://github.com/llvm/llvm-project/commit/86475afa7d5c9965878ef93b5bc2d0c644152a23
Author: satyanarayana reddy janga <satyajanga at fb.com>
Date: 2026-03-26 (Thu, 26 Mar 2026)
Changed paths:
M lldb/source/Host/common/FileCache.cpp
Log Message:
-----------
[lldb] Fix incorrect return value on error paths in FileCache (#188608)
WriteFile and ReadFile return uint64_t with UINT64_MAX as the error
sentinel, but two error paths incorrectly returned false (0), which
could be mistaken for a successful zero-byte operation.
Commit: 13f1fd006243f756417c3ae992342c0674e3f04e
https://github.com/llvm/llvm-project/commit/13f1fd006243f756417c3ae992342c0674e3f04e
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-03-26 (Thu, 26 Mar 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
Log Message:
-----------
[TargetLowering] Remove AllowTruncation from matchUnaryPredicate in BuildExactSDIV/BuildExactUDIV. (#188785)
After #187378 these are no longer tested. I'm concerned that we can
create illegal scalar types after type legalization. I don't know how to
test this now so I'd like to remove support until it is needed and can
be tested.
Commit: 48e9c76d887a9d0b3df2546a45c9e50913c133c7
https://github.com/llvm/llvm-project/commit/48e9c76d887a9d0b3df2546a45c9e50913c133c7
Author: Nerixyz <nerixdev at outlook.de>
Date: 2026-03-26 (Thu, 26 Mar 2026)
Changed paths:
M cross-project-tests/debuginfo-tests/dexter-tests/nrvo.cpp
M llvm/include/llvm/IR/DebugInfoMetadata.h
M llvm/include/llvm/MC/MCStreamer.h
M llvm/lib/CodeGen/AsmPrinter/CodeViewDebug.cpp
M llvm/lib/CodeGen/AsmPrinter/CodeViewDebug.h
M llvm/lib/IR/DebugInfoMetadata.cpp
M llvm/lib/MC/MCAsmStreamer.cpp
M llvm/lib/MC/MCParser/AsmParser.cpp
M llvm/lib/MC/MCStreamer.cpp
M llvm/test/CodeGen/MIR/X86/diexpr-win32.mir
R llvm/test/DebugInfo/COFF/indirect-local.ll
M llvm/test/DebugInfo/COFF/nrvo.ll
M llvm/test/DebugInfo/COFF/pieces.ll
M llvm/test/DebugInfo/COFF/types-array-advanced.ll
Log Message:
-----------
Revert "[CodeView] Generate `S_DEFRANGE_REGISTER_REL_INDIR` (#187709)" (#188833)
This reverts commit 08a4085. The change breaks `nvro.cpp` in the
debugging tests on the buildbot
(https://lab.llvm.org/buildbot/#/builders/46/builds/32873) but works
locally for me. It might be because the buildbot is using an older
Windows SDK.
In addition, it reverts parts of #188769 (using `.` over `->`).
Commit: 14321cc482877e7541693bba2393488194c093b4
https://github.com/llvm/llvm-project/commit/14321cc482877e7541693bba2393488194c093b4
Author: satyanarayana reddy janga <satyajanga at fb.com>
Date: 2026-03-26 (Thu, 26 Mar 2026)
Changed paths:
M lldb/source/Host/common/File.cpp
M lldb/unittests/Host/FileTest.cpp
Log Message:
-----------
[lldb] Fix missing return in NativeFile::SeekFromEnd stream path (#188596)
The stream path in NativeFile::SeekFromEnd was missing a `return result`
statement after the fseek block, causing it to fall through to the error
handler which overwrites the error status with "invalid file handle"
even on success. Both SeekFromStart and SeekFromCurrent correctly return
after their stream blocks.
while no active callers to this function, It is still worth fixing this.
Commit: 120c4cf689e7f376f254e81a862145e0c685630c
https://github.com/llvm/llvm-project/commit/120c4cf689e7f376f254e81a862145e0c685630c
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-03-26 (Thu, 26 Mar 2026)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
Log Message:
-----------
[X86] Remove custom widening legalization of vector udiv/sdiv/urem/srem. (#188786)
This custom legalization was preserving splat values in widened
build_vector to allow the div by constant optimization to work.
We now allow division by constant optimization on narrow vector types
before type legalization so we no longer need this.
Commit: 5aae014ed5cb1d0d52d79bcc54c4f16c512ae3a9
https://github.com/llvm/llvm-project/commit/5aae014ed5cb1d0d52d79bcc54c4f16c512ae3a9
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-03-26 (Thu, 26 Mar 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/epilogue-vectorization-fix-scalar-resume-values.ll
M llvm/test/Transforms/LoopVectorize/AArch64/vector-loop-backedge-elimination-epilogue.ll
M llvm/test/Transforms/LoopVectorize/X86/epilog-vectorization-ordered-reduction.ll
Log Message:
-----------
[LV] Refine tripcount estimate using minimum iteration count rt check. (#188135)
When not folding the tail the minimum iteration count check ensures that
the vector loop is not executed if computing the trip count wraps around
to zero, as the trip count must be at least VF when vectorizing without
tail-folding.
Add and use a new tryToRefineConstantMaxTripCount helper. This ensures
we do not create dead main loops when vectorizing the epilogue, as we
choose smaller main VFs.
PR: https://github.com/llvm/llvm-project/pull/188135
Commit: ecfcdd6e2a65e90ad12a446d17944fb49afd8e26
https://github.com/llvm/llvm-project/commit/ecfcdd6e2a65e90ad12a446d17944fb49afd8e26
Author: Jeff Bailey <jbailey at raspberryginger.com>
Date: 2026-03-26 (Thu, 26 Mar 2026)
Changed paths:
M libc/cmake/modules/LLVMLibCTestRules.cmake
M libc/test/CMakeLists.txt
M libc/test/include/CMakeLists.txt
M libc/test/integration/CMakeLists.txt
Log Message:
-----------
[libc] Fix check-libc-lit running tests during build (#188081)
Updated check-libc-lit to depend only on build-only targets. Added
libc-integration-tests-build to track integration test executables and
updated LLVMLibCTestRules.cmake to populate it.
Removed incorrect dependencies on execution suites in include and
integration tests that were introduced in #184366.
Commit: 80baf855ae517150ca81b37a307d471d0f941bbd
https://github.com/llvm/llvm-project/commit/80baf855ae517150ca81b37a307d471d0f941bbd
Author: Jakub Kuderski <jakub at nod-labs.com>
Date: 2026-03-26 (Thu, 26 Mar 2026)
Changed paths:
M mlir/include/mlir/IR/AffineMap.h
M mlir/include/mlir/Interfaces/ValueBoundsOpInterface.h
M mlir/lib/Analysis/FlatLinearValueConstraints.cpp
M mlir/lib/Dialect/Arith/Transforms/IntRangeOptimizations.cpp
M mlir/lib/IR/AffineMap.cpp
M mlir/lib/Interfaces/IndexingMapOpInterface.cpp
M mlir/lib/Interfaces/InferIntRangeInterface.cpp
M mlir/lib/Interfaces/ValueBoundsOpInterface.cpp
M mlir/lib/Transforms/Utils/DialectConversion.cpp
Log Message:
-----------
[mlir] Bump SmallVector sizes along hot paths (#188827)
This is based on empirical data from compiling 9 medium to large
language and diffusion models with IREE. e2e, this improves compilation
times by 0.33% in terms of `instructions:u` (same metric is used by the
[CTMark for
Clang](https://www.npopov.com/2024/01/01/This-year-in-LLVM-2023.html#compile-time-improvements)).
I explored using other constants and these are the ones that performed
best while keeping the sizes relatively small.
Commit: 1aefe3b1115cac7e3b8d36248102bd98736453c7
https://github.com/llvm/llvm-project/commit/1aefe3b1115cac7e3b8d36248102bd98736453c7
Author: Nick Sarnie <nick.sarnie at intel.com>
Date: 2026-03-26 (Thu, 26 Mar 2026)
Changed paths:
M offload/test/offloading/strided_offset_multidim_update.c
Log Message:
-----------
[offload][L0] Remove XFAIL from XPASSING test strided_offset_multidim_update.c (#188836)
Passing now I guess
https://lab.llvm.org/buildbot/#/builders/225/builds/4729
```
********************
Unexpectedly Passed Tests (1):
libomptarget :: spirv64-intel :: offloading/strided_offset_multidim_update.c
```
Signed-off-by: Nick Sarnie <nick.sarnie at intel.com>
Commit: a4ce617c0f13ecf7477d733b22c0f2e2cfe5628d
https://github.com/llvm/llvm-project/commit/a4ce617c0f13ecf7477d733b22c0f2e2cfe5628d
Author: Artem Belevich <tra at google.com>
Date: 2026-03-26 (Thu, 26 Mar 2026)
Changed paths:
M clang/include/clang/AST/ASTContext.h
Log Message:
-----------
[CUDA] Use SetVector for CUDADeviceVarODRUsedByHost for determinism (#188616)
This replaces DenseSet with SetVector to avoid non-deterministic
iteration order
when emitting device variables ODR-used by host.
Commit: e849c68657d88d03235b87da34c740cda3abebd4
https://github.com/llvm/llvm-project/commit/e849c68657d88d03235b87da34c740cda3abebd4
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2026-03-26 (Thu, 26 Mar 2026)
Changed paths:
M libcxx/utils/ci/docker/linux-builder-base.dockerfile
Log Message:
-----------
[libc++] Install venv in the CI Docker image (#188825)
To support #165769
Commit: cb1661b0460627bac4407fda129febefbf3e738a
https://github.com/llvm/llvm-project/commit/cb1661b0460627bac4407fda129febefbf3e738a
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-03-26 (Thu, 26 Mar 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanTransforms.h
M llvm/lib/Transforms/Vectorize/VPlanUnroll.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/blend-costs.ll
M llvm/test/Transforms/LoopVectorize/AArch64/conditional-branches-cost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/fold-tail-low-trip-count.ll
M llvm/test/Transforms/LoopVectorize/AArch64/force-target-instruction-cost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/induction-costs-sve.ll
M llvm/test/Transforms/LoopVectorize/AArch64/masked-call-scalarize.ll
M llvm/test/Transforms/LoopVectorize/AArch64/optsize_minsize.ll
M llvm/test/Transforms/LoopVectorize/AArch64/predicated-costs.ll
M llvm/test/Transforms/LoopVectorize/AArch64/transform-narrow-interleave-fold-tail.ll
M llvm/test/Transforms/LoopVectorize/AArch64/transform-narrow-interleave-to-widen-memory-multi-block.ll
M llvm/test/Transforms/LoopVectorize/AArch64/transform-narrow-interleave-to-widen-memory-remove-loop-region.ll
M llvm/test/Transforms/LoopVectorize/SystemZ/force-target-instruction-cost.ll
M llvm/test/Transforms/LoopVectorize/VPlan/interleave-and-scalarize-only.ll
M llvm/test/Transforms/LoopVectorize/VPlan/vplan-predicate-switch.ll
M llvm/test/Transforms/LoopVectorize/X86/consecutive-ptr-uniforms.ll
M llvm/test/Transforms/LoopVectorize/X86/constant-fold.ll
M llvm/test/Transforms/LoopVectorize/X86/cost-conditional-branches.ll
M llvm/test/Transforms/LoopVectorize/X86/gather_scatter.ll
M llvm/test/Transforms/LoopVectorize/X86/induction-costs.ll
M llvm/test/Transforms/LoopVectorize/X86/pr109581-unused-blend.ll
M llvm/test/Transforms/LoopVectorize/X86/pr55096-scalarize-add.ll
M llvm/test/Transforms/LoopVectorize/X86/small-size.ll
M llvm/test/Transforms/LoopVectorize/X86/x86-interleaved-accesses-masked-group.ll
M llvm/test/Transforms/LoopVectorize/X86/x86-interleaved-store-accesses-with-gaps.ll
M llvm/test/Transforms/LoopVectorize/as_cast.ll
M llvm/test/Transforms/LoopVectorize/cast-induction.ll
M llvm/test/Transforms/LoopVectorize/consecutive-ptr-uniforms.ll
M llvm/test/Transforms/LoopVectorize/constant-fold-commutative-and.ll
M llvm/test/Transforms/LoopVectorize/constantfolder.ll
M llvm/test/Transforms/LoopVectorize/cse-casts.ll
M llvm/test/Transforms/LoopVectorize/debugloc.ll
M llvm/test/Transforms/LoopVectorize/dont-fold-tail-for-divisible-TC.ll
M llvm/test/Transforms/LoopVectorize/find-last-iv-sinkable-load.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/float-induction.ll
M llvm/test/Transforms/LoopVectorize/hoist-and-sink-mem-ops-with-invariant-pointers.ll
M llvm/test/Transforms/LoopVectorize/hoist-predicated-loads-with-predicated-stores.ll
M llvm/test/Transforms/LoopVectorize/if-pred-stores.ll
M llvm/test/Transforms/LoopVectorize/interleaved-accesses-pred-stores.ll
M llvm/test/Transforms/LoopVectorize/load-deref-pred-align.ll
M llvm/test/Transforms/LoopVectorize/loop-form.ll
M llvm/test/Transforms/LoopVectorize/memdep-fold-tail.ll
M llvm/test/Transforms/LoopVectorize/pointer-induction.ll
M llvm/test/Transforms/LoopVectorize/pr37248.ll
M llvm/test/Transforms/LoopVectorize/pr45679-fold-tail-by-masking.ll
M llvm/test/Transforms/LoopVectorize/predicate-switch.ll
M llvm/test/Transforms/LoopVectorize/select-cmp-multiuse.ll
M llvm/test/Transforms/LoopVectorize/struct-return-replicate.ll
M llvm/test/Transforms/LoopVectorize/struct-return.ll
M llvm/test/Transforms/LoopVectorize/tail-folding-alloca-in-loop.ll
M llvm/test/Transforms/LoopVectorize/tail-folding-div.ll
M llvm/test/Transforms/LoopVectorize/tail-folding-masked-mem-opts.ll
M llvm/test/Transforms/LoopVectorize/tail-folding-optimize-vector-induction-width.ll
M llvm/test/Transforms/LoopVectorize/tail-folding-switch.ll
M llvm/test/Transforms/LoopVectorize/trip-count-expansion-may-introduce-ub.ll
M llvm/test/Transforms/LoopVectorize/use-scalar-epilogue-if-tp-fails.ll
M llvm/test/Transforms/LoopVectorize/vector-loop-backedge-elimination.ll
Log Message:
-----------
[VPlan] Explicitly unroll replicate-regions without live-outs by VF. (#170212)
This patch adds a new replicateReplicateRegionsByVF transform to
unroll replicate=regions by VF, dissolving them. The transform creates
VF copies of the replicate-region's content, connects them and converts
recipes to single-scalar variants for the corresponding lanes.
The initial version skips regions with live-outs (VPPredInstPHIRecipe),
which will be added in follow-up patches.
Depends on https://github.com/llvm/llvm-project/pull/170053
PR: https://github.com/llvm/llvm-project/pull/170212
Commit: df7189409446493f1842dd3c888ef37eb8468dfd
https://github.com/llvm/llvm-project/commit/df7189409446493f1842dd3c888ef37eb8468dfd
Author: Changpeng Fang <changpeng.fang at amd.com>
Date: 2026-03-26 (Thu, 26 Mar 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/VOP3Instructions.td
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.scalef32.pk.gfx950.ll
Log Message:
-----------
[AMDGPU] Do not overlap dst with srcs for v_cvt_scalef32_2xpk16_fp6/bf6_f32 (#188809)
v_cvt_scalef32_2xpk16_fp6_f32 and v_cvt_scalef32_2xpk16_bf6_f32, as multipass instructions,
the destination operand must not overlap with any of the source operands.
In this work, we apply Constraints = "@earlyclobber $vdst" to these two instructions.
Fixes: LCCOMPILER-561
Commit: 821c22a1be8ad907e2172982fc10449bf2235aa6
https://github.com/llvm/llvm-project/commit/821c22a1be8ad907e2172982fc10449bf2235aa6
Author: Dave Lee <davelee.com at gmail.com>
Date: 2026-03-26 (Thu, 26 Mar 2026)
Changed paths:
M lldb/examples/python/formatter_bytecode.py
M lldb/test/Shell/ScriptInterpreter/Python/Inputs/FormatterBytecode/RigidArrayLLDBFormatterC.txt
M lldb/test/Shell/ScriptInterpreter/Python/Inputs/FormatterBytecode/RigidArrayLLDBFormatterSwift.txt
M lldb/test/Shell/ScriptInterpreter/Python/python-bytecode.test
Log Message:
-----------
[lldb][bytecode] Change compiler to require update return type decl (#188637)
To better ensure that bytecode `@update` implementations return a 0/1
value (see https://github.com/llvm/llvm-project/pull/181199), this
changes the Python -> formatter bytecode compiler to require that Python
`update` methods be declared to return `bool`.
A declaration like this will be a compiler error:
```py
def update(self):
# implementation...
```
Commit: 0d3e51479228b637f66a1db8727eadc2e7367be7
https://github.com/llvm/llvm-project/commit/0d3e51479228b637f66a1db8727eadc2e7367be7
Author: Dave Lee <davelee.com at gmail.com>
Date: 2026-03-26 (Thu, 26 Mar 2026)
Changed paths:
M lldb/source/DataFormatters/TypeSynthetic.cpp
M lldb/test/API/functionalities/data-formatter/bytecode-synthetic/TestBytecodeSynthetic.py
M lldb/test/API/functionalities/data-formatter/bytecode-synthetic/main.cpp
Log Message:
-----------
[lldb] Enable caching for BytecodeSyntheticChildren::FrontEnd::Update (#181199)
Update `BytecodeSyntheticChildren` to support `ChildCacheState` return
values from `@update` implementations.
Commit: e830d88e8ae5f44a97cc76136a0a4e83aa9157c0
https://github.com/llvm/llvm-project/commit/e830d88e8ae5f44a97cc76136a0a4e83aa9157c0
Author: Zequan Wu <zequanwu at google.com>
Date: 2026-03-26 (Thu, 26 Mar 2026)
Changed paths:
M clang/lib/Analysis/UnsafeBufferUsage.cpp
A clang/test/SemaCXX/warn-unsafe-buffer-usage-default-arg-uninstantiated-crash.cpp
Log Message:
-----------
[UnsafeBufferUsage] Check for uninstantiated default arguments to prevent crash. (#188817)
Fix a crash introduced by
https://github.com/llvm/llvm-project/pull/184899
The -Wunsafe-buffer-usage analysis was crashing when it encountered a
template function with a default argument that hadn't been instantiated
yet. This occurred in populateStmtsForFindingGadgets when it attempted
to access the default argument of each parameter.
This fix adds a check to ensure the default argument is instantiated
before attempting to access it.
Assisted-by: Gemini
Commit: 29886a14948bc66afdbaa82671316c511ad9d4ae
https://github.com/llvm/llvm-project/commit/29886a14948bc66afdbaa82671316c511ad9d4ae
Author: vangthao95 <vang.thao at amd.com>
Date: 2026-03-26 (Thu, 26 Mar 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.ds.bpermute.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.ds.permute.mir
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.bpermute.fi.b32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.bpermute.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.permute.ll
Log Message:
-----------
AMDGPU/GlobalISel: RegBankLegalize rules for ds_permute (#188266)
Commit: 67ea4de3c610673eb6e2f7f40331eafd40e820d2
https://github.com/llvm/llvm-project/commit/67ea4de3c610673eb6e2f7f40331eafd40e820d2
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-03-26 (Thu, 26 Mar 2026)
Changed paths:
M llvm/test/CodeGen/AMDGPU/fract-match.ll
Log Message:
-----------
AMDGPU: Regenerate test checks (#188862)
Commit: 4562a953db9d9813a873b78144cee1df39c7e0c0
https://github.com/llvm/llvm-project/commit/4562a953db9d9813a873b78144cee1df39c7e0c0
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-03-26 (Thu, 26 Mar 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanTransforms.h
M llvm/lib/Transforms/Vectorize/VPlanUnroll.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/blend-costs.ll
M llvm/test/Transforms/LoopVectorize/AArch64/conditional-branches-cost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/fold-tail-low-trip-count.ll
M llvm/test/Transforms/LoopVectorize/AArch64/force-target-instruction-cost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/induction-costs-sve.ll
M llvm/test/Transforms/LoopVectorize/AArch64/masked-call-scalarize.ll
M llvm/test/Transforms/LoopVectorize/AArch64/optsize_minsize.ll
M llvm/test/Transforms/LoopVectorize/AArch64/predicated-costs.ll
M llvm/test/Transforms/LoopVectorize/AArch64/transform-narrow-interleave-fold-tail.ll
M llvm/test/Transforms/LoopVectorize/AArch64/transform-narrow-interleave-to-widen-memory-multi-block.ll
M llvm/test/Transforms/LoopVectorize/AArch64/transform-narrow-interleave-to-widen-memory-remove-loop-region.ll
M llvm/test/Transforms/LoopVectorize/SystemZ/force-target-instruction-cost.ll
M llvm/test/Transforms/LoopVectorize/VPlan/interleave-and-scalarize-only.ll
M llvm/test/Transforms/LoopVectorize/VPlan/vplan-predicate-switch.ll
M llvm/test/Transforms/LoopVectorize/X86/consecutive-ptr-uniforms.ll
M llvm/test/Transforms/LoopVectorize/X86/constant-fold.ll
M llvm/test/Transforms/LoopVectorize/X86/cost-conditional-branches.ll
M llvm/test/Transforms/LoopVectorize/X86/gather_scatter.ll
M llvm/test/Transforms/LoopVectorize/X86/induction-costs.ll
M llvm/test/Transforms/LoopVectorize/X86/pr109581-unused-blend.ll
M llvm/test/Transforms/LoopVectorize/X86/pr55096-scalarize-add.ll
M llvm/test/Transforms/LoopVectorize/X86/small-size.ll
M llvm/test/Transforms/LoopVectorize/X86/x86-interleaved-accesses-masked-group.ll
M llvm/test/Transforms/LoopVectorize/X86/x86-interleaved-store-accesses-with-gaps.ll
M llvm/test/Transforms/LoopVectorize/as_cast.ll
M llvm/test/Transforms/LoopVectorize/cast-induction.ll
M llvm/test/Transforms/LoopVectorize/consecutive-ptr-uniforms.ll
M llvm/test/Transforms/LoopVectorize/constant-fold-commutative-and.ll
M llvm/test/Transforms/LoopVectorize/constantfolder.ll
M llvm/test/Transforms/LoopVectorize/cse-casts.ll
M llvm/test/Transforms/LoopVectorize/debugloc.ll
M llvm/test/Transforms/LoopVectorize/dont-fold-tail-for-divisible-TC.ll
M llvm/test/Transforms/LoopVectorize/find-last-iv-sinkable-load.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/float-induction.ll
M llvm/test/Transforms/LoopVectorize/hoist-and-sink-mem-ops-with-invariant-pointers.ll
M llvm/test/Transforms/LoopVectorize/hoist-predicated-loads-with-predicated-stores.ll
M llvm/test/Transforms/LoopVectorize/if-pred-stores.ll
M llvm/test/Transforms/LoopVectorize/interleaved-accesses-pred-stores.ll
M llvm/test/Transforms/LoopVectorize/load-deref-pred-align.ll
M llvm/test/Transforms/LoopVectorize/loop-form.ll
M llvm/test/Transforms/LoopVectorize/memdep-fold-tail.ll
M llvm/test/Transforms/LoopVectorize/pointer-induction.ll
M llvm/test/Transforms/LoopVectorize/pr37248.ll
M llvm/test/Transforms/LoopVectorize/pr45679-fold-tail-by-masking.ll
M llvm/test/Transforms/LoopVectorize/predicate-switch.ll
M llvm/test/Transforms/LoopVectorize/select-cmp-multiuse.ll
M llvm/test/Transforms/LoopVectorize/struct-return-replicate.ll
M llvm/test/Transforms/LoopVectorize/struct-return.ll
M llvm/test/Transforms/LoopVectorize/tail-folding-alloca-in-loop.ll
M llvm/test/Transforms/LoopVectorize/tail-folding-div.ll
M llvm/test/Transforms/LoopVectorize/tail-folding-masked-mem-opts.ll
M llvm/test/Transforms/LoopVectorize/tail-folding-optimize-vector-induction-width.ll
M llvm/test/Transforms/LoopVectorize/tail-folding-switch.ll
M llvm/test/Transforms/LoopVectorize/trip-count-expansion-may-introduce-ub.ll
M llvm/test/Transforms/LoopVectorize/use-scalar-epilogue-if-tp-fails.ll
M llvm/test/Transforms/LoopVectorize/vector-loop-backedge-elimination.ll
Log Message:
-----------
Revert "[VPlan] Explicitly unroll replicate-regions without live-outs by VF." (#188868)
Reverts llvm/llvm-project#170212
appears to cause a failure with expensive checks:
https://lab.llvm.org/buildbot/#/builders/187/builds/18306
Commit: b9b87dd796bfa131a964ba86bdc872a1883f3365
https://github.com/llvm/llvm-project/commit/b9b87dd796bfa131a964ba86bdc872a1883f3365
Author: vangthao95 <vang.thao at amd.com>
Date: 2026-03-26 (Thu, 26 Mar 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.buffer.atomic.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.buffer.atomic.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.buffer.atomic.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.atomic.ll
Log Message:
-----------
AMDGPU/GlobalISel: RegBankLegalize rules for buffer atomics (#187550)
Add RegBankLegalize rules for the buffer atomics and/xor/or/inc/dec.
Commit: 788ea1105438bd866752d7758f4c305d4675e0cc
https://github.com/llvm/llvm-project/commit/788ea1105438bd866752d7758f4c305d4675e0cc
Author: Zhaoxuan Jiang <jiangzhaoxuan94 at gmail.com>
Date: 2026-03-26 (Thu, 26 Mar 2026)
Changed paths:
M lld/MachO/ICF.cpp
M lld/test/MachO/icf-options.s
A lld/test/MachO/icf-safe-missing-addrsig.s
Log Message:
-----------
[lld-macho] Make safe ICF conservative without __llvm_addrsig (#188400)
MachO --icf=safe and --icf=safe_thunks used to keep folding code from
object files that did not contain __llvm_addrsig, which was inconsistent
with the conservative ELF/COFF behavior. Mark all symbols in such
objects as address-significant instead, and add regression coverage for
both safe ICF modes with and without addrsig.
Commit: cdb4578edb33630f36d804e44a0d035d91f71c27
https://github.com/llvm/llvm-project/commit/cdb4578edb33630f36d804e44a0d035d91f71c27
Author: jimingham <jingham at apple.com>
Date: 2026-03-26 (Thu, 26 Mar 2026)
Changed paths:
M lldb/test/API/lang/objc/objc-class-method/TestObjCClassMethod.py
Log Message:
-----------
This new flag depends both on the compiler version AND the linker (#188864)
version, and clang will say it supports the flag even if the linker
can't use its output.
The compiler actually has code to know whether the linker version is
right, and sets it to the default if the stars align.
So I'm going to just test whether whatever is the default method for the
compiler and linker works.
Commit: 966d96942a27b37b45c988a0b3d972969f070af5
https://github.com/llvm/llvm-project/commit/966d96942a27b37b45c988a0b3d972969f070af5
Author: Anshil Gandhi <95053726+gandhi56 at users.noreply.github.com>
Date: 2026-03-26 (Thu, 26 Mar 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane64.ll
Log Message:
-----------
[AMDGPU][GlobalISel] Add RegBankLegalize rules for amdgcn_permlane64 (#187840)
Add register bank legalization rules for the amdgcn_permlane64 intrinsic
in the new RegBankLegalize framework.
After GISel legalization, permlane64 always operates on S32 — sub-32-bit
types are anyext'd to S32 and types wider than 32 bits are split into
S32 parts by legalizeLaneOp. Add rules for B32 type.
Also enable -new-reg-bank-select in the permlane64 lit test and update
affected check lines.
Commit: 531613e0fb17aca41971649c15c942231a870777
https://github.com/llvm/llvm-project/commit/531613e0fb17aca41971649c15c942231a870777
Author: Jakub Kuderski <jakub at nod-labs.com>
Date: 2026-03-26 (Thu, 26 Mar 2026)
Changed paths:
M mlir/lib/Dialect/MemRef/Transforms/ElideReinterpretCast.cpp
M mlir/lib/Dialect/MemRef/Transforms/ExtractAddressComputations.cpp
M mlir/lib/Dialect/Tensor/IR/TensorOps.cpp
M mlir/lib/Dialect/Vector/IR/VectorOps.cpp
Log Message:
-----------
[mlir] Use Repeated<T> in more places to avoid temporary vectors. NFC. (#188846)
Replace `SmallVector<Type/Value>(n, x)` with `Repeated<Type/Value>(n,
x)`. This avoids heap allocations for repeated values.
Also change `ExtractAddressComputations` rebuild callbacks from
`ArrayRef<Value>` to `ValueRange` to enable `Repeated<Value>`
passthrough.
Co-authored-by: Claude Opus 4.6 (1M context) <noreply at anthropic.com>
Commit: 816a8203f5ed7a6e678d2c0f247a052b80ad9b8e
https://github.com/llvm/llvm-project/commit/816a8203f5ed7a6e678d2c0f247a052b80ad9b8e
Author: Jianhui Li <jian.hui.li at intel.com>
Date: 2026-03-26 (Thu, 26 Mar 2026)
Changed paths:
M mlir/lib/Dialect/XeGPU/IR/XeGPUDialect.cpp
M mlir/test/Dialect/XeGPU/sg-to-wi-experimental-unit.mlir
M mlir/test/Dialect/XeGPU/subgroup-distribute-unit.mlir
Log Message:
-----------
[MLIR][XeGPU] Fix a bug in Layout interface: isCompatibleWith() function (#188607)
As title
Commit: 3833f030541d967a4892d86593ae1053be61aefc
https://github.com/llvm/llvm-project/commit/3833f030541d967a4892d86593ae1053be61aefc
Author: Anshil Gandhi <95053726+gandhi56 at users.noreply.github.com>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.perm.ll
Log Message:
-----------
[AMDGPU][GlobalISel] Add RegBankLegalize rules for amdgcn_perm intrinsic (#187798)
Add uniform and divergent register bank legalization rules for the amdgcn_perm intrinsic (v_perm_b32). Since this is a VALU-only instruction, the uniform case maps the destination to UniInVgprB32 and all source operands to VgprB32.
Commit: 0027f6fe9a87747691d13a9a506c94fac2e72fd0
https://github.com/llvm/llvm-project/commit/0027f6fe9a87747691d13a9a506c94fac2e72fd0
Author: lntue <lntue at google.com>
Date: 2026-03-26 (Thu, 26 Mar 2026)
Changed paths:
A .github/workflows/libc-shared-tests.yml
Log Message:
-----------
[libc][ci] Add libc-shared-test CI for MSVC and QEMU for several archs. (#188553)
Includes:
- MSVC: x86, x64, arm64
- QEMU: aarch64, riscv64
Commit: 2c0a67d6d77c9be3184bfa1a658a9fdb861adaa1
https://github.com/llvm/llvm-project/commit/2c0a67d6d77c9be3184bfa1a658a9fdb861adaa1
Author: Anshul Nigham <nigham at google.com>
Date: 2026-03-26 (Thu, 26 Mar 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64PostCoalescerPass.cpp
Log Message:
-----------
[AArch64] Update preserved analyses for AArch64PostCoalescer (#188875)
Preserving all analyses likely is a wrong assertion since we do not know
what other analyses might exist that we've updated.
Updated to preserve CFG, LiveIntervalsAnalysis and SlotIndexAnalysis
(which is transitively preserved from LiveIntervalsAnalysis)
Commit: 80b1fbecf4df3296b3976ce3cb42eb7832fc9053
https://github.com/llvm/llvm-project/commit/80b1fbecf4df3296b3976ce3cb42eb7832fc9053
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-03-26 (Thu, 26 Mar 2026)
Changed paths:
M clang/tools/clang-linker-wrapper/ClangLinkerWrapper.cpp
M clang/tools/clang-linker-wrapper/LinkerWrapperOpts.td
Log Message:
-----------
[ClangLinkerWrapper] Fix `-v` for newer CMake passing it directly (#188883)
Summary:
Normally `-v` is version for tools, but it's also verbose for the
linker. CMake tries to identify the linker by passing `-Wl,-v` which
goes to the linker wrapper instead. Make this only print version on
`--version` and forward the other one to the linker so it appears
transparent to the host ABI. A bit of a hack, but it should work.
Commit: 9dbb4cf4732a78735d83d2fac701a853bd8bf3d5
https://github.com/llvm/llvm-project/commit/9dbb4cf4732a78735d83d2fac701a853bd8bf3d5
Author: Jianjian Guan <jacquesguan at me.com>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenBuiltinRISCV.cpp
A clang/test/CIR/CodeGenBuiltins/RISCV/riscv-zihintpause.c
Log Message:
-----------
[CIR][RISCV] Support zihintpause builitin codegen (#188465)
Include one builtin: __builtin_riscv_pause.
Commit: e55fb5de0f97adc1835f0310606051cb6c0185e9
https://github.com/llvm/llvm-project/commit/e55fb5de0f97adc1835f0310606051cb6c0185e9
Author: Lang Hames <lhames at gmail.com>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
M clang/lib/Interpreter/OrcIncrementalExecutor.cpp
M llvm/examples/OrcV2Examples/LLJITWithRemoteDebugging/LLJITWithRemoteDebugging.cpp
M llvm/examples/OrcV2Examples/LLJITWithRemoteDebugging/RemoteJITUtils.cpp
M llvm/examples/OrcV2Examples/LLJITWithRemoteDebugging/RemoteJITUtils.h
M llvm/include/llvm/ExecutionEngine/Orc/EPCDynamicLibrarySearchGenerator.h
M llvm/include/llvm/ExecutionEngine/Orc/ExecutorProcessControl.h
M llvm/include/llvm/ExecutionEngine/Orc/ExecutorResolutionGenerator.h
M llvm/include/llvm/ExecutionEngine/Orc/LLJIT.h
M llvm/include/llvm/ExecutionEngine/Orc/LookupAndRecordAddrs.h
M llvm/include/llvm/ExecutionEngine/Orc/SelfExecutorProcessControl.h
M llvm/include/llvm/ExecutionEngine/Orc/SimpleRemoteEPC.h
M llvm/lib/ExecutionEngine/Orc/EPCDynamicLibrarySearchGenerator.cpp
M llvm/lib/ExecutionEngine/Orc/ExecutorResolutionGenerator.cpp
M llvm/lib/ExecutionEngine/Orc/LLJIT.cpp
M llvm/lib/ExecutionEngine/Orc/LookupAndRecordAddrs.cpp
M llvm/lib/ExecutionEngine/Orc/SelfExecutorProcessControl.cpp
M llvm/lib/ExecutionEngine/Orc/SimpleRemoteEPC.cpp
M llvm/tools/llvm-jitlink/llvm-jitlink.cpp
M llvm/tools/llvm-jitlink/llvm-jitlink.h
M llvm/unittests/ExecutionEngine/Orc/ObjectLinkingLayerTest.cpp
M llvm/unittests/ExecutionEngine/Orc/OrcTestCommon.h
Log Message:
-----------
[ORC] Move DylibManager ownership out of ExecutorProcessControl. (#188711)
This removes an unnecessary coupling between ExecutorProcessControl and
DylibManager, allowing clients to select DylibManager implementations
independently.
To simplify the transition, the
ExecutorProcessControl::createDefaultJITDylib method will return an
instance of whatever DylibManager the ExecutorProcessControl
implementation had been using previously.
Commit: f9acb06ce4f32be89db12dde7559b75ad60cd457
https://github.com/llvm/llvm-project/commit/f9acb06ce4f32be89db12dde7559b75ad60cd457
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
M cross-project-tests/debuginfo-tests/llgdb-tests/nrvo-string.cpp
Log Message:
-----------
[debuginfo-tests] Update line numbers in llgdb-tests/nrvo-string.cpp (#188901)
Update the line numbers in llgdb-tests/nrvo-string.cpp for #188780 which
shifts the file by 6 lines.
Commit: add5b811ae51d2f155b99af82db48a61e4fd76ef
https://github.com/llvm/llvm-project/commit/add5b811ae51d2f155b99af82db48a61e4fd76ef
Author: Thomas Applencourt <tapplencourt at anl.gov>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
M clang/bindings/python/clang/cindex.py
M clang/bindings/python/tests/cindex/test_version.py
M clang/docs/ReleaseNotes.rst
Log Message:
-----------
[libclang/python] Renaming `get_version` into `get_clang_version` (#188515)
Rename `get_version` to `get_clang_version` to match the `libclang.so`
name[1], and be clear we doesn't return some `cindex.py` internal
versioning but the `libclang.so` one.
[1] This match was some current API are doing for example
`conf.lib.clang_getArraySize` is mapped to `get_array_size`.
Commit: b163ba6e190e87f7bc406fe38a53694cf31786c8
https://github.com/llvm/llvm-project/commit/b163ba6e190e87f7bc406fe38a53694cf31786c8
Author: Shivam Kunwar <physhivam at gmail.com>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
M llvm/lib/CodeGen/AsmPrinter/DwarfCompileUnit.cpp
M llvm/lib/CodeGen/AsmPrinter/DwarfCompileUnit.h
M llvm/lib/CodeGen/AsmPrinter/DwarfExpression.cpp
A llvm/test/DebugInfo/X86/implicit-pointer-dwarf5.ll
Log Message:
-----------
[DebugInfo] Lower DW_OP_LLVM_implicit_pointer to DWARF (#186763)
This patch adds backend support by intercepting
`DW_OP_LLVM_implicit_pointer` during variable DIE emission in
DwarfCompileUnit. For each implicit pointer variable, an artificial
`DW_TAG_variable` DIE is created to describe the dereferenced value's
location, and the pointer variable's location is emitted as
`DW_OP_implicit_pointer` referencing that artificial DIE.
Constant integer entries are de-duplicated so that multiple pointer
variables referencing the same constant value share a single artificial
DIE.
Emits `DW_OP_implicit_pointer` for DWARF 5 and
`DW_OP_GNU_implicit_pointer` for DWARF 4.
Here is the RFC with the design
https://discourse.llvm.org/t/rfc-implementing-dw-op-implicit-pointer-support-in-llvm/90217
---------
Co-authored-by: Shivam Kunwar <phyBrackets at users.noreply.github.com>
Commit: cbe9891b44d3d1c15bd8f632d6d84e486751e530
https://github.com/llvm/llvm-project/commit/cbe9891b44d3d1c15bd8f632d6d84e486751e530
Author: Takashi Idobe <idobetakashi at gmail.com>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
M clang/lib/CodeGen/CodeGenModule.cpp
A clang/test/CodeGenCXX/bad-codegen-for-constexpr-structured-bindings.cpp
M clang/test/CodeGenCXX/const-init-cxx11.cpp
M clang/test/CodeGenCXX/reference-temporary-ms.cpp
A clang/test/CodeGenCXX/reference-temporary-mutable.cpp
A clang/test/CodeGenCXX/reference-temporary-subobject.cpp
M clang/test/CodeGenCXX/temporaries.cpp
Log Message:
-----------
[Clang] fix bad codegen from constexpr structured bindings (#186594)
Resolves: https://github.com/llvm/llvm-project/issues/164150
C++26 allows for constexpr packs in structured bindings. This is a new
feature (the code doesn't compile on lower the -std=c++26) and so was
previously unhandled in clang.
This makes clang aware of packs and handle them as one constant unit
instead of materializing them as separate mutable reference temporaries
allowing llvm to optimize them.
This turns the example code from the issue into this as you would expect
without compiling for zen 5 (the good codegen described).
```asm
movq %rdi, %rax
movups (%rsi), %xmm0
movups %xmm0, (%rdi)
movups (%rdx), %xmm0
movups %xmm0, 16(%rdi)
retq
```
Commit: e43ce530145ded7028a29ba51091fdef1841ff9b
https://github.com/llvm/llvm-project/commit/e43ce530145ded7028a29ba51091fdef1841ff9b
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-03-26 (Thu, 26 Mar 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/test/CodeGen/RISCV/rv32p.ll
Log Message:
-----------
[TargetLowering][RISCV] Prefer (S/U)MUL_LOHI over MULH(S/U) in expandMULO. (#188870)
The RISC-V P extension adds WMUL and WMULU instruction that produce
a full 64-bit product in 2 GPRs. The base ISA already had MULH and
MULHU.
Commit: 3ef59d80c5ce51738a055d9e8eb98aa3c8effb2f
https://github.com/llvm/llvm-project/commit/3ef59d80c5ce51738a055d9e8eb98aa3c8effb2f
Author: pkarveti <pkarveti at qti.qualcomm.com>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
M llvm/lib/Target/Hexagon/HexagonFrameLowering.cpp
A llvm/test/CodeGen/Hexagon/aligna-prologue-expansion.mir
Log Message:
-----------
[Hexagon] Fix use-before-def of AP register in prologue CSR spills (#188504)
PS_aligna initializes the AP register (eg:callee-saved R16) with an
aligned value derived from FP. It was being placed before the
CSR spills, causing the spill of R16 to save the AP value instead of the
caller's original R16, breaking the callee-saved register contract and
it must be defined before any AP-relative stack accesses. Fix by moving
PS_aligna to after all CSR spills in insertCSRSpillsInBlock().
Fixes #184531
Commit: 9c98207e16ad9135abd732caf55cdbf215717210
https://github.com/llvm/llvm-project/commit/9c98207e16ad9135abd732caf55cdbf215717210
Author: Victor Chernyakin <chernyakin.victor.j at outlook.com>
Date: 2026-03-26 (Thu, 26 Mar 2026)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Sema/Sema.h
M clang/test/CXX/module/module.interface/p1.cpp
Log Message:
-----------
[clang][Modules] Reject export declarations in implementation partitions (#188698)
[module.interface]/1 says:
> An export-declaration shall [...] appear in the purview of
a module interface unit.
But clang currently fails to enforce this rule in implementation
partitions.
Partially addresses #107602.
Commit: f1889a73e63d3183657452c75fbde8b98e378b7c
https://github.com/llvm/llvm-project/commit/f1889a73e63d3183657452c75fbde8b98e378b7c
Author: Thurston Dang <thurston at google.com>
Date: 2026-03-26 (Thu, 26 Mar 2026)
Changed paths:
M clang/lib/Lex/PPDirectives.cpp
A clang/test/ClangScanDeps/p1689-suppress-warnings-no-eol.cppm
Log Message:
-----------
[ClangScanDeps] Avoid use-of-uninitialized-memory for end-of-directive edge case (#188590)
https://github.com/llvm/llvm-project/pull/186966 was reverted because
the test case triggered a use-of-uninitialized-memory
(https://lab.llvm.org/buildbot/#/builders/94/builds/16379), due to the
include directive omitting a trailing newline. This patch adds a minor
fix to avoid the use-of-uninitialized-memory, and deliberately re-adds
the test case sans trailing newline for regression testing.
MSan report prior to this fix:
```
@@@BUILD_STEP sanitizer logs: stage2/msan_track_origins check@@@
==clang-scan-deps==616960==WARNING: MemorySanitizer: use-of-uninitialized-value
#0 0x5555599c3300 in isAnnotation /home/b/sanitizer-x86_64-linux-bootstrap-msan/build/llvm-project/clang/include/clang/Lex/Token.h:131:38
#1 0x5555599c3300 in setLength /home/b/sanitizer-x86_64-linux-bootstrap-msan/build/llvm-project/clang/include/clang/Lex/Token.h:152:13
#2 0x5555599c3300 in clang::Lexer::FormTokenWithChars(clang::Token&, char const*, clang::tok::TokenKind) /home/b/sanitizer-x86_64-linux-bootstrap-msan/build/llvm-project/clang/include/clang/Lex/Lexer.h:644:12
#3 0x5555599cf895 in clang::Lexer::LexEndOfFile(clang::Token&, char const*) /home/b/sanitizer-x86_64-linux-bootstrap-msan/build/llvm-project/clang/lib/Lex/Lexer.cpp:3166:5
#4 0x555559bb229b in clang::Preprocessor::Lex(clang::Token&) /home/b/sanitizer-x86_64-linux-bootstrap-msan/build/llvm-project/clang/lib/Lex/Preprocessor.cpp:916:11
#5 0x555559aa5365 in __invoke<void (clang::Preprocessor::*&)(clang::Token &), clang::Preprocessor *, clang::Token &> /home/b/sanitizer-x86_64-linux-bootstrap-msan/build/libcxx_install_msan_track_origins/include/c++/v1/__type_traits/invoke.h:90:27
#6 0x555559aa5365 in invoke<void (clang::Preprocessor::*&)(clang::Token &), clang::Preprocessor *, clang::Token &> /home/b/sanitizer-x86_64-linux-bootstrap-msan/build/libcxx_install_msan_track_origins/include/c++/v1/__functional/invoke.h:29:10
#7 0x555559aa5365 in operator()<void (clang::Preprocessor::*)(clang::Token &)> /home/b/sanitizer-x86_64-linux-bootstrap-msan/build/llvm-project/clang/lib/Lex/PPDirectives.cpp:470:5
#8 0x555559aa5365 in clang::Preprocessor::CheckEndOfDirective(llvm::StringRef, bool, llvm::SmallVectorImpl<clang::Token>*) /home/b/sanitizer-x86_64-linux-bootstrap-msan/build/llvm-project/clang/lib/Lex/PPDirectives.cpp:478:5
#9 0x555559ab96b5 in clang::Preprocessor::HandleIncludeDirective(clang::SourceLocation, clang::Token&, clang::detail::SearchDirIteratorImpl<true>, clang::FileEntry const*) /home/b/sanitizer-x86_64-linux-bootstrap-msan/build/llvm-project/clang/lib/Lex/PPDirectives.cpp:2205:7
...
```
Commit: 46c47efd07b6b8faa005e13f84342e38176e3e62
https://github.com/llvm/llvm-project/commit/46c47efd07b6b8faa005e13f84342e38176e3e62
Author: pkarveti <pkarveti at qti.qualcomm.com>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
M llvm/lib/Target/Hexagon/HexagonLoadStoreWidening.cpp
A llvm/test/CodeGen/Hexagon/store-widen-subreg.mir
Log Message:
-----------
[Hexagon] Fix load/store widening to preserve subreg operands (#188181)
HexagonLoadStoreWidening pass was incorrectly using DoubleRegs registers
where IntRegs was required when widening load/store pairs. When the
S2_addasl_rrri instruction used a subreg (e.g., %2.isub_lo), the
widening pass extracted only the base register without preserving the
subreg, causing machine verifier errors.
Commit: 924a4ada31c8a0bf464e3db2e636315f0157a7c3
https://github.com/llvm/llvm-project/commit/924a4ada31c8a0bf464e3db2e636315f0157a7c3
Author: lntue <lntue at google.com>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
M libc/shared/math/bf16addl.h
M libc/shared/math/bf16divl.h
M libc/shared/math/bf16fmal.h
M libc/shared/math/bf16mull.h
M libc/shared/math/canonicalizel.h
M libc/shared/math/ceill.h
M libc/shared/math/daddl.h
M libc/shared/math/dfmal.h
M libc/shared/math/dsqrtl.h
M libc/shared/math/f16addl.h
M libc/shared/math/f16divl.h
M libc/shared/math/f16fmal.h
M libc/shared/math/f16mull.h
M libc/shared/math/f16sqrtl.h
M libc/shared/math/f16subl.h
M libc/shared/math/faddl.h
M libc/shared/math/fdiml.h
M libc/shared/math/ffmal.h
M libc/shared/math/floorl.h
M libc/shared/math/fmaxl.h
M libc/shared/math/fsqrtl.h
M libc/shared/math/getpayloadl.h
M libc/shared/math/ilogbl.h
M libc/shared/math/llogbl.h
M libc/shared/math/logbl.h
M libc/shared/math/nextafterl.h
M libc/shared/math/nextdownl.h
M libc/shared/math/nexttowardl.h
M libc/shared/math/nextupl.h
M libc/shared/math/setpayloadl.h
M libc/shared/math/setpayloadsigl.h
Log Message:
-----------
[libc] Guard long double shared math functions against double-double. (#188909)
Commit: 8a49af8752021bbabc6f76e657beaf56a4645624
https://github.com/llvm/llvm-project/commit/8a49af8752021bbabc6f76e657beaf56a4645624
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ByteCode/Interp.h
M clang/lib/AST/ByteCode/Opcodes.td
M clang/lib/AST/ByteCode/Record.h
Log Message:
-----------
[clang][bytecode] Pass bitfield width directly to opcodes (#188423)
Pass a `FieldOffset` + `FieldBitWidth` pair instead of a `Record::Field`
pointer.
Commit: accf41ef78dea19a4ed66980775832eb4c28e279
https://github.com/llvm/llvm-project/commit/accf41ef78dea19a4ed66980775832eb4c28e279
Author: Ryotaro Kasuga <kasuga.ryotaro at fujitsu.com>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
M llvm/include/llvm/Analysis/DependenceAnalysis.h
M llvm/lib/Analysis/DependenceAnalysis.cpp
M llvm/test/Analysis/DependenceAnalysis/rdiv-large-btc.ll
Log Message:
-----------
[DA] Add precondition `0 <=s UB` to function `inferAffineDomain` (#187218)
This patch fixes issues where the Exact SIV/RDIV tests can return
incorrect results when the BTC is negative in a signed sense. The root
cause is that BTCs should be interpreted in an unsigned sense, but
`inferAffineDomain` uses the BTC in inequalities that are interpreted in
a signed sense. These inequalities make sense only when the BTC is
non-negative. Thus we need to check it beforehand.
Commit: 83451d8d4d5dbecfba2277bf00a4a4152794180b
https://github.com/llvm/llvm-project/commit/83451d8d4d5dbecfba2277bf00a4a4152794180b
Author: Chaitanya <Krishna.Sankisa at amd.com>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
M clang/include/clang/CIR/MissingFeatures.h
M clang/lib/CIR/CodeGen/CIRGenModule.cpp
M clang/lib/CIR/CodeGen/CMakeLists.txt
M clang/lib/CIR/CodeGen/TargetInfo.cpp
M clang/lib/CIR/CodeGen/TargetInfo.h
A clang/lib/CIR/CodeGen/Targets/AMDGPU.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVMIR.cpp
A clang/test/CIR/CodeGenHIP/amdgpu-attrs.hip
Log Message:
-----------
[CIR][AMDGPU] Add AMDGPU-specific function attributes for HIP kernels (#188007)
Upstreaming clangIR PR: https://github.com/llvm/clangir/pull/2091
This patch adds support for AMDGPU-specific function attributes for HIP
kernels
Added setTargetAttributes for AMDGPUTargetCIRGenInfo to set kernel
attributes
Added generic string attribute handler in amendFunction to translate
string-values with "cir." prefix function attributes to LLVM function
attributes
Follows OGCG AMDGPU implementation from
"clang/lib/CodeGen/Targets/AMDGPU.cpp".
Commit: 3d6c0a683c30d2d4014b13549c944e9143c48df7
https://github.com/llvm/llvm-project/commit/3d6c0a683c30d2d4014b13549c944e9143c48df7
Author: Michael Liao <michael.hliao at gmail.com>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenModule.cpp
M clang/test/CIR/CodeGenCXX/global-refs.cpp
Log Message:
-----------
[CIR] Match codegen change on global temporary
- Match codgen chagne from cbe9891b44d3d1c15bd8f632d6d84e486751e530
Commit: dc1411163170ad7117506d62c9d1efaec43ea799
https://github.com/llvm/llvm-project/commit/dc1411163170ad7117506d62c9d1efaec43ea799
Author: fineg74 <61437305+fineg74 at users.noreply.github.com>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
M clang/lib/Headers/CMakeLists.txt
A clang/lib/Headers/__clang_spirv_libdevice_declares.h
M clang/lib/Headers/openmp_wrappers/__clang_openmp_device_functions.h
Log Message:
-----------
[OFFLOAD] Introduce libdevice function declarations for future use for math OpenMP wrappers (#182215)
The purpose of this PR is to introduce libdevice functions declarations
for SPIRV for future use for math wrappers in order to reduce the PR
size
Commit: f4b524c69e854712c7a1a8e0bf0695e7f3adad1b
https://github.com/llvm/llvm-project/commit/f4b524c69e854712c7a1a8e0bf0695e7f3adad1b
Author: Longsheng Mou <longshengmou at gmail.com>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUSubgroupDistribute.cpp
M mlir/test/Dialect/XeGPU/move-gpu-func-to-warp-op.mlir
Log Message:
-----------
[mlir][XeGPU] Validate single-block requirement in MoveFuncBodyToWarpOp (#188471)
Add validation to ensure GPU function body has a single block before
applying the MoveFuncBodyToWarpOp transformation in XeGPU subgroup
distribution. This check prevents incorrect handling of multi-block GPU
functions. Fixes #185366.
Commit: 013cf4fd1fefb11223c17c6a47b6b7d635323789
https://github.com/llvm/llvm-project/commit/013cf4fd1fefb11223c17c6a47b6b7d635323789
Author: Jiahao Guo <eoonguo at gmail.com>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp
M clang/test/CodeGen/AArch64/bf16-getset-intrinsics.c
M clang/test/CodeGen/AArch64/neon/bf16-getset.c
Log Message:
-----------
[CIR][AArch64] Support BF16 Neon types and lower vdup lane builtins (#187460)
Part of https://github.com/llvm/llvm-project/issues/185382.
Lower:
-
[vdup_n_bf16](https://developer.arm.com/architectures/instruction-sets/intrinsics/vdup_n_bf16)
-
[vdupq_n_bf16](https://developer.arm.com/architectures/instruction-sets/intrinsics/vdupq_n_bf16)
-
[vdup_lane_bf16](https://developer.arm.com/architectures/instruction-sets/intrinsics/vdup_lane_bf16)
-
[vdupq_lane_bf16](https://developer.arm.com/architectures/instruction-sets/intrinsics/vdupq_lane_bf16)
-
[vdup_laneq_bf16](https://developer.arm.com/architectures/instruction-sets/intrinsics/vdup_laneq_bf16)
-
[vdupq_laneq_bf16](https://developer.arm.com/architectures/instruction-sets/intrinsics/vdupq_laneq_bf16)
and add tests in
[bf16-getset.c](https://github.com/llvm/llvm-project/blob/main/clang/test/CodeGen/AArch64/neon/bf16-getset.c).
## Approach
### `vdup_n_bf16` / `vdupq_n_bf16`
These are not NEON builtins — they are regular `always_inline` functions
defined in `arm_neon.h` that expand to vector aggregate initialization
(`{v, v, v, v}`), so they work through the existing generic vector
codegen path without requiring any builtin-specific handling. I just
added CHECK lines in `bf16-getset.c` to verify the existing output is
correct.
### `vdup_lane_bf16` / `vdupq_lane_bf16` / `vdup_laneq_bf16` /
`vdupq_laneq_bf16`
These are mapped (via `NEONEquivalentIntrinsicMap`) to the generic
`splat_lane_v` / `splatq_lane_v` / `splat_laneq_v` / `splatq_laneq_v`
builtins, which are handled in `emitCommonNeonBuiltinExpr`.
I followed the approach used in both the OG codegen (`ARM.cpp`) and the
[clangir incubator](https://github.com/nicovank/clangir):
**OG codegen in `ARM.cpp`:**
```cpp
switch (BuiltinID) {
default: break;
case NEON::BI__builtin_neon_splat_lane_v:
case NEON::BI__builtin_neon_splat_laneq_v:
case NEON::BI__builtin_neon_splatq_lane_v:
case NEON::BI__builtin_neon_splatq_laneq_v: {
auto NumElements = VTy->getElementCount();
if (BuiltinID == NEON::BI__builtin_neon_splatq_lane_v)
NumElements = NumElements * 2;
if (BuiltinID == NEON::BI__builtin_neon_splat_laneq_v)
NumElements = NumElements.divideCoefficientBy(2);
Ops[0] = Builder.CreateBitCast(Ops[0], VTy);
return EmitNeonSplat(Ops[0], cast<ConstantInt>(Ops[1]), NumElements);
}
```
**clangir incubator in `CIRGenBuiltinAArch64.cpp`:**
```cpp
case NEON::BI__builtin_neon_splat_lane_v:
case NEON::BI__builtin_neon_splat_laneq_v:
case NEON::BI__builtin_neon_splatq_lane_v:
case NEON::BI__builtin_neon_splatq_laneq_v: {
uint64_t numElements = vTy.getSize();
if (builtinID == NEON::BI__builtin_neon_splatq_lane_v)
numElements = numElements << 1;
if (builtinID == NEON::BI__builtin_neon_splat_laneq_v)
numElements = numElements >> 1;
ops[0] = builder.createBitcast(ops[0], vTy);
return emitNeonSplat(builder, getLoc(e->getExprLoc()), ops[0], ops[1],
numElements);
}
```
The call site for `splat_lane_v` already existed in
`emitCommonNeonBuiltinExpr`, but had two issues:
1. **`emitNeonSplat` was called but never defined.** I added two helper
functions (ported from the clangir incubator): `getIntValueFromConstOp`
to extract the integer lane index from a CIR constant, and
`emitNeonSplat` to build a splat shuffle mask and perform a
`cir.vec.shuffle`.
2. **The call site used `getLoc(e->getExprLoc())`, which is invalid**
because `emitCommonNeonBuiltinExpr` is a static free function, not a
`CIRGenFunction` member. Fixed to use `cgf.getBuilder()` and the
pre-computed `loc` variable.
Additionally, I found that `NeonTypeFlags::BFloat16` and
`NeonTypeFlags::Float16` were unhandled in `getNeonType`, which would
cause the vector type to be unresolved for bf16/f16 intrinsics. I added
the handling following the same pattern as the OG codegen:
```cpp
case NeonTypeFlags::BFloat16:
if (allowBFloatArgsAndRet)
return cir::VectorType::get(cgf->getCIRGenModule().bFloat16Ty, v1Ty ? 1 : (4 << isQuad));
return cir::VectorType::get(cgf->uInt16Ty, v1Ty ? 1 : (4 << isQuad));
case NeonTypeFlags::Float16:
if (hasLegalHalfType)
return cir::VectorType::get(cgf->getCIRGenModule().fP16Ty, v1Ty ? 1 : (4 << isQuad));
return cir::VectorType::get(cgf->uInt16Ty, v1Ty ? 1 : (4 << isQuad));
```
When `allowBFloatArgsAndRet` is true, we use the native `cir::BF16Type`;
otherwise we fall back to `u16i`. The same logic applies to `Float16`
with `hasLegalHalfType`.
Commit: 0959a2a4bd8055066f642fbd1c0ea4a1ba5ba047
https://github.com/llvm/llvm-project/commit/0959a2a4bd8055066f642fbd1c0ea4a1ba5ba047
Author: Osama Abdelkader <osama.abdelkader at gmail.com>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/test/CodeGen/AArch64/memmove-inline.ll
M llvm/test/CodeGen/AMDGPU/memmove-param-combinations.ll
M llvm/test/CodeGen/AMDGPU/memmove-scalar-load.ll
M llvm/test/CodeGen/RISCV/memmove.ll
M llvm/test/CodeGen/X86/volatile-memstores-nooverlapping-load-stores.ll
Log Message:
-----------
Enable generic overlapping optimization for memmove (#177885)
Fixes: #165948
Commit: f8416c8643534677ed89d0510bb5fd1b2a4e1abd
https://github.com/llvm/llvm-project/commit/f8416c8643534677ed89d0510bb5fd1b2a4e1abd
Author: Pankaj Dwivedi <pankajkumar.divedi at amd.com>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
M llvm/include/llvm/ADT/GenericSSAContext.h
M llvm/include/llvm/ADT/GenericUniformityImpl.h
M llvm/include/llvm/ADT/GenericUniformityInfo.h
M llvm/lib/Analysis/UniformityAnalysis.cpp
M llvm/lib/CodeGen/MachineSSAContext.cpp
M llvm/lib/CodeGen/MachineUniformityAnalysis.cpp
M llvm/lib/IR/SSAContext.cpp
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/always-uniform-gmir.mir
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/always-uniform.mir
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/never-uniform.mir
M llvm/unittests/Target/AMDGPU/CMakeLists.txt
A llvm/unittests/Target/AMDGPU/UniformityAnalysisTest.cpp
Log Message:
-----------
[UniformityAnalysis] Replace DivergentValues with UniformValues for conservative divergence queries (#180509)
This patch replaces DivergentValues with UniformValues as the single
source of truth for tracking divergence in UniformityInfo.
Old model: DivergentValues starts empty; values are added as divergence
is propagated. isDivergent(V) returns DivergentValues.count(V).
New model: UniformValues starts fully populated (all
instructions/arguments for IR, all register defs for MIR) during
initialize(). Values are removed as divergence is propagated.
isDivergent(V) returns !UniformValues.contains(V), so any value not
present in the set (e.g., a newly created instruction that was not
present during analysis) is conservatively treated as divergent. This
avoids silent miscompilations when transformation passes introduce new
values and query their uniformity.
---------
Co-authored-by: padivedi <padivedi at amd.com>
Commit: 8e9e9228d45463ae52a9dde006b26fb921cd23ea
https://github.com/llvm/llvm-project/commit/8e9e9228d45463ae52a9dde006b26fb921cd23ea
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
M libclc/opencl/lib/generic/atomic/atomic_fetch_add.cl
M libclc/opencl/lib/generic/atomic/atomic_fetch_sub.cl
Log Message:
-----------
libclc: Fix missing overloads for atomic_fetch_add/sub (#188478)
Commit: 552e68d6acec45a9628ec4db279c511adbde062a
https://github.com/llvm/llvm-project/commit/552e68d6acec45a9628ec4db279c511adbde062a
Author: Raphael Isemann <rise at apple.com>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
M lldb/packages/Python/lldbsuite/test/builders/builder.py
Log Message:
-----------
[lldb][test] Don't treat 'xcrun clang' as a path for finding clang++ (#188235)
[lldb][test] Don't treat 'xcrun clang' as a path for finding clang++
TestPrintObjectArray.py uses `xcrun clang` as the test compiler.
This is because the test source requires some Objective-C features
that are only available in downstream clang:
```
self.build(dictionary=[...], compiler="xcrun clang")
```
However, this currently just results in us running `clang++`
instead of `xcrun clang++` to compile test sources. If the downstream
`clang++` in PATH is not Apple's downstream version, this then causes
the tests to fail with compilation errors:
```
clang++: error: unknown argument: '-fno-constant-nsnumber-literals'
clang++: error: unknown argument: '-fno-constant-nsarray-literals'
clang++: error: unknown argument: '-fno-constant-nsdictionary-literals'
```
We end up in this situation as we treat this command as a path when
trying to assemble the `clang++` command. This patch just adds a
special case for `xcrun` and we now first try the compiler (verbatim)
before falling back to the inferred compiler type.
Commit: 929e072270e8a746ed5f06f4e4cb69a49723c2a3
https://github.com/llvm/llvm-project/commit/929e072270e8a746ed5f06f4e4cb69a49723c2a3
Author: Ryotaro Kasuga <kasuga.ryotaro at fujitsu.com>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
M llvm/lib/Analysis/DependenceAnalysis.cpp
M llvm/test/Analysis/DependenceAnalysis/weak-zero-siv-addrec-wrap.ll
Log Message:
-----------
[DA] Add nsw check for addrecs in the Weak Zero SIV tests (#185579)
Check that the addrec has `nsw` in the Weak Zero SIV tests, as their
algorithm rely on the addrecs don't wrap.
Fix the test cases added in #185578 .
Commit: 207598a827676af9c1d0cef8e8b1ab9c29a46ef4
https://github.com/llvm/llvm-project/commit/207598a827676af9c1d0cef8e8b1ab9c29a46ef4
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
M llvm/include/llvm/CodeGen/TargetLowering.h
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
A llvm/test/CodeGen/X86/dag-topological-sort.ll
Log Message:
-----------
[DAG] Add command line option and TLI hook to enable DAG topological sorting (#188636)
The very first step towards #83422 - which will move DAG combines to be
processed in topological order.
There is a lot of churn on existing tests that need to be addressed
before this can be switched on globally, this patch gives the ability to
enable it both on a per-target basis, and via a command line option to
assist with testing and triage.
At the moment I'm focusing on addressing the x86 regressions (example in
the patch's basic test coverage) as that's the target I'm most familiar
with and will help with many other targets as well, but there might be
other/simpler targets that would benefit from earlier handling.
Commit: 8430e9e8f043d2ea28925e299157f760711cbedb
https://github.com/llvm/llvm-project/commit/8430e9e8f043d2ea28925e299157f760711cbedb
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
M libclc/clc/lib/generic/math/clc_atan2pi.cl
M libclc/clc/lib/generic/math/clc_atan2pi.inc
Log Message:
-----------
libclc: Update atan2pi (#188707)
This was originally ported from rocm device libs in
37406a209c75a09f850cd5e5498568d34a6f05d1. Merge in more
recent changes.
Commit: a3d9708a41159840254c4258b7b9bfc39552e1e0
https://github.com/llvm/llvm-project/commit/a3d9708a41159840254c4258b7b9bfc39552e1e0
Author: Weibo He <NewSigma at 163.com>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
M llvm/docs/Coroutines.rst
M llvm/include/llvm/IR/Intrinsics.td
M llvm/include/llvm/Transforms/Coroutines/CoroInstr.h
M llvm/lib/Transforms/Coroutines/CoroCleanup.cpp
M llvm/lib/Transforms/Coroutines/CoroElide.cpp
M llvm/lib/Transforms/Coroutines/Coroutines.cpp
M llvm/test/Transforms/Coroutines/coro-heap-elide.ll
M llvm/test/Transforms/Coroutines/no-suspend.ll
Log Message:
-----------
[CoroElide][IR] Add llvm.coro.dead intrinsic (#188899)
Part 3/4: Implement HALO for coroutines that flow off final suspend.
Parent PR approved in https://github.com/llvm/llvm-project/pull/185336.
This version also elides `coro.dead` for coroutines that never suspend,
with additional tests.
This patch add an optimization hint `llvm.coro.dead` for cases where
`llvm.coro.destroy` is not available so that HALO works.
Commit: 0af58d309b01659d6992506431820868430672f7
https://github.com/llvm/llvm-project/commit/0af58d309b01659d6992506431820868430672f7
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
M cross-project-tests/debuginfo-tests/dexter-tests/memvars/const-branch.c
Log Message:
-----------
[cross-project-tests] XFAIL memvars/const-branch.c on x86_64 Darwin
Fails on x86_64 macOS buildbot:
```
07:43:57
******************** TEST 'cross-project-tests :: debuginfo-tests/dexter-tests/memvars/const-branch.c' FAILED ********************
07:43:57 Exit Code: 2
07:43:57
07:43:57 Command Output (stdout):
07:43:57 --
07:43:57 const-branch.c: (0.0000)
07:43:57
07:43:57 ## BEGIN ##
07:43:57 . [1, "main [opt]", "/Users/ec2-user/jenkins/workspace/llvm.org/lldb-cmake/llvm-project/cross-project-tests/debuginfo-tests/dexter-tests/memvars/const-branch.c", 48, 10, "StopReason.BREAKPOINT", "StepKind.FUNC", []]
07:43:57 . . [2, "fun [opt]", "/Users/ec2-user/jenkins/workspace/llvm.org/lldb-cmake/llvm-project/cross-project-tests/debuginfo-tests/dexter-tests/memvars/const-branch.c", 26, 3, "StopReason.BREAKPOINT", "StepKind.FUNC", []]
07:43:57 . . . [3, "esc [opt]", "/Users/ec2-user/jenkins/workspace/llvm.org/lldb-cmake/llvm-project/cross-project-tests/debuginfo-tests/dexter-tests/memvars/const-branch.c", 15, 7, "StopReason.BREAKPOINT", "StepKind.FUNC", []]
07:43:57 . . . [4, "esc [opt]", "/Users/ec2-user/jenkins/workspace/llvm.org/lldb-cmake/llvm-project/cross-project-tests/debuginfo-tests/dexter-tests/memvars/const-branch.c", 16, 6, "StopReason.BREAKPOINT", "StepKind.VERTICAL_FORWARD", []]
07:43:57 . . . [5, "esc [opt]", "/Users/ec2-user/jenkins/workspace/llvm.org/lldb-cmake/llvm-project/cross-project-tests/debuginfo-tests/dexter-tests/memvars/const-branch.c", 17, 1, "StopReason.BREAKPOINT", "StepKind.VERTICAL_FORWARD", []]
07:43:57 . . [6, "fun [opt]", "/Users/ec2-user/jenkins/workspace/llvm.org/lldb-cmake/llvm-project/cross-project-tests/debuginfo-tests/dexter-tests/memvars/const-branch.c", 27, 13, "StopReason.BREAKPOINT", "StepKind.VERTICAL_FORWARD", []]
07:43:57 . . [7, "fun [opt]", "/Users/ec2-user/jenkins/workspace/llvm.org/lldb-cmake/llvm-project/cross-project-tests/debuginfo-tests/dexter-tests/memvars/const-branch.c", 44, 3, "StopReason.BREAKPOINT", "StepKind.VERTICAL_FORWARD", []]
07:43:57 . [8, "main [opt]", "/Users/ec2-user/jenkins/workspace/llvm.org/lldb-cmake/llvm-project/cross-project-tests/debuginfo-tests/dexter-tests/memvars/const-branch.c", 48, 3, "StopReason.STEP", "StepKind.HORIZONTAL_BACKWARD", []]
07:43:57 [9, "start", "/usr/lib/dyld`start", 408, 1, "StopReason.STEP", "StepKind.VERTICAL_FORWARD", []]
07:43:57 ## END (9 steps) ##
07:43:57
07:43:57
07:43:57 const-branch.c:26-44 [param] ExpectValue [7/7]
07:43:57 expected encountered watches:
07:43:57 5
07:43:57
07:43:57 unexpected result:
07:43:57 (variable not available): steps [6-7] [-7]
```
Commit: 62fded6b0f2d228ed8b0922cf238569413485c8d
https://github.com/llvm/llvm-project/commit/62fded6b0f2d228ed8b0922cf238569413485c8d
Author: Ryotaro Kasuga <kasuga.ryotaro at fujitsu.com>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
M llvm/lib/Analysis/DependenceAnalysis.cpp
Log Message:
-----------
[DA] Remove redundant check in the Weak Zero SIV tests (NFCI) (#188922)
The trivial disjoint checks in several dependence tests were
consolidated into a single invocation in #187435. However, the
duplicated check still remains in the Weak Crossing SIV tests. This is
redundant and should be deleted as well.
Commit: 301e2ffa5cd87e6c293a85fef0e3597809b3d803
https://github.com/llvm/llvm-project/commit/301e2ffa5cd87e6c293a85fef0e3597809b3d803
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/test/AST/ByteCode/c.c
Log Message:
-----------
[clang][bytecode] Disable DiscardResult in visitBool() (#188916)
It's a visit* function, so we shouldn't discard the result.
Commit: 1a32a4185b84bba30474305cd915d1fbcfa1a352
https://github.com/llvm/llvm-project/commit/1a32a4185b84bba30474305cd915d1fbcfa1a352
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
M libclc/clc/include/clc/subgroup/clc_sub_group_broadcast.h
A libclc/clc/include/clc/subgroup/clc_sub_group_scan.h
A libclc/clc/include/clc/subgroup/clc_sub_group_scan.inc
M libclc/clc/lib/amdgpu/CMakeLists.txt
A libclc/clc/lib/amdgpu/subgroup/clc_amdgpu_ds_swizzle.inc
A libclc/clc/lib/amdgpu/subgroup/clc_sub_group_scan.cl
A libclc/clc/lib/amdgpu/subgroup/clc_sub_group_scan.inc
M libclc/opencl/lib/generic/CMakeLists.txt
A libclc/opencl/lib/generic/subgroup/sub_group_scan_exclusive.cl
A libclc/opencl/lib/generic/subgroup/sub_group_scan_exclusive.inc
A libclc/opencl/lib/generic/subgroup/sub_group_scan_inclusive.cl
A libclc/opencl/lib/generic/subgroup/sub_group_scan_inclusive.inc
Log Message:
-----------
libclc: Add subgroup scan functions (#188828)
Add the base implementation using ds_swizzle which should work
on all subtargets. There are at least 2 more paths available for
newer targets.
Commit: 621f03240bad90939aefcce09a4ad021471675de
https://github.com/llvm/llvm-project/commit/621f03240bad90939aefcce09a4ad021471675de
Author: Stefan Gränitz <stefan.graenitz at gmail.com>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
M lldb/source/Plugins/SymbolLocator/SymStore/SymbolLocatorSymStore.cpp
Log Message:
-----------
[lldb] Let SymStore locator download PDBs to a temp file (#188798)
The cache path we get from the `llvm::sys::path::cache_directory()`
library function is not writeable on some Windows bots as they point us
to the Default user's AppData: C:\Users\Default\AppData\Local\lldb.
This patch avoids the problem and downloads into the temporary directory
that we query from `llvm::sys::path::system_temp_directory()`. Once we
introduce real caching, this would have changed anyway.
Commit: 906912d752e5d6e53de0665df67cc40a83ca2091
https://github.com/llvm/llvm-project/commit/906912d752e5d6e53de0665df67cc40a83ca2091
Author: Stefan Gränitz <stefan.graenitz at gmail.com>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
M llvm/test/tools/llvm-debuginfod-find/headers-winhttp.test
Log Message:
-----------
[llvm] Attempt to re-enable llvm-debuginfod-find test on Windows bots (#188810)
Next attempt after https://github.com/llvm/llvm-project/pull/187753 to
record headers for HTTP requests from llvm-debuginfod-find in Python on
the Windows bots. It has always worked for me locally, but not on the
bots. This time we skip the no-headers test case to check if we get
output in the actual headers case.
Commit: 5c0c4214812b2fa6b8e843eecb6bedb47b9b7621
https://github.com/llvm/llvm-project/commit/5c0c4214812b2fa6b8e843eecb6bedb47b9b7621
Author: Will Hawkins <hawkinsw at obs.cr>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
M clang/lib/Serialization/ASTReaderStmt.cpp
M clang/lib/Serialization/ASTWriterStmt.cpp
A clang/test/ASTMerge/generic-selection-expr/Inputs/generic-type.c
A clang/test/ASTMerge/generic-selection-expr/test-type.c
Log Message:
-----------
Support Serializing/Deserializing Extended Generic Selection Expressions
Clang supports using a type as the predicate for generic selection
expressions but lacked support for serializing/deserializing these
extended generic selection expressions.
Signed-off-by: Will Hawkins <hawkinsw at obs.cr>
Commit: 56e1510d21f0782af95b32ee41fe799fa63b93d1
https://github.com/llvm/llvm-project/commit/56e1510d21f0782af95b32ee41fe799fa63b93d1
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
A libclc/clc/include/clc/clc_target_defines.h
A libclc/clc/include/clc/collective/clc_work_group_scan.h
A libclc/clc/include/clc/collective/clc_work_group_scan_decl.inc
M libclc/clc/lib/generic/CMakeLists.txt
A libclc/clc/lib/generic/collective/clc_work_group_scan.cl
A libclc/clc/lib/generic/collective/clc_work_group_scan.inc
M libclc/opencl/lib/generic/CMakeLists.txt
A libclc/opencl/lib/generic/collective/work_group_scan.cl
A libclc/opencl/lib/generic/collective/work_group_scan.inc
Log Message:
-----------
libclc: Add work group scan functions (#188829)
Commit: 93e475a47583aa539dd886c2794766ce42b24a30
https://github.com/llvm/llvm-project/commit/93e475a47583aa539dd886c2794766ce42b24a30
Author: Zeyi Xu <mitchell.xu2 at gmail.com>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
M clang-tools-extra/clang-tidy/modernize/UseStdPrintCheck.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
A clang-tools-extra/test/clang-tidy/checkers/modernize/use-std-print-macro.cpp
Log Message:
-----------
[clang-tidy] Add missing #include insertion in macros for modernize-use-std-print (#188394)
Follow-up of: #188247
---------
Co-authored-by: Victor Chernyakin <chernyakin.victor.j at outlook.com>
Commit: 9a4c6c09a7df0c5a77e082fb145a8ef2bce2663a
https://github.com/llvm/llvm-project/commit/9a4c6c09a7df0c5a77e082fb145a8ef2bce2663a
Author: Hank <hankluo6 at gmail.com>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
M mlir/lib/Conversion/GPUToSPIRV/GPUToSPIRV.cpp
A mlir/test/Conversion/GPUToSPIRV/broadcast.mlir
Log Message:
-----------
[mlir][spirv][gpu] Add lowering for gpu.subgroup_broadcast (#187947)
Add lowering for `gpu.subgroup_broadcast` and
`gpu.subgroup_broadcast_first` to `spirv.GroupNonUniformBroadcast` and
`spirv.GroupNonUniformBroadcastFirst`.
Fixes #157940
Commit: 35781a7d43fbd61cf18fd63923df95cb1d2a861c
https://github.com/llvm/llvm-project/commit/35781a7d43fbd61cf18fd63923df95cb1d2a861c
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
A libclc/clc/include/clc/subgroup/clc_sub_group_non_uniform_reduce.h
A libclc/clc/include/clc/subgroup/clc_sub_group_non_uniform_reduce_decl.inc
M libclc/clc/lib/amdgpu/CMakeLists.txt
A libclc/clc/lib/amdgpu/subgroup/clc_sub_group_non_uniform_reduce.cl
M libclc/clc/lib/amdgpu/subgroup/clc_sub_group_reduce.cl
A libclc/clc/lib/amdgpu/subgroup/clc_sub_group_reduce.inc
M libclc/opencl/lib/generic/CMakeLists.txt
A libclc/opencl/lib/generic/subgroup/sub_group_non_uniform_reduce.cl
A libclc/opencl/lib/generic/subgroup/sub_group_non_uniform_reduce.inc
Log Message:
-----------
libclc: Partially implement nonuniform subgroup reduce functions (#188929)
For AMDGPU these are identical to the uniform case. Stub out the missing
cases with traps to avoid test failures from undefined symbols while
keeping the structure consistent.
Commit: 88c577456222eac7149e60892bec0e5a84675fff
https://github.com/llvm/llvm-project/commit/88c577456222eac7149e60892bec0e5a84675fff
Author: idubinov <igor.dubinov at amd.com>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
A llvm/test/CodeGen/SPIRV/llvm-intrinsics/bitreverse.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/bitreverse_small_type.ll
Log Message:
-----------
[SPIRV] Add bitreverse expansion for kernel (#186412)
The OpBitReverse is available when Shader or SPV_KHR_bit_instructions
extension is enabled. For targets without these capabilities, introduce
software emulation of G_BITREVERSE based on the parallel bit reversal
algorithm:
https://graphics.stanford.edu/~seander/bithacks.html#ReverseParallel
The emulation supports 8/16/32/64-bit scalars and vectors using bitwise
operations (shifts, AND, OR). A helper lambda avoids undefined behavior
when computing masks for 64-bit types.
Tests added for both emulation and native paths across all supported
types.
Assisted-by: Claude Code
Commit: 8ab7b37e749f4ab7c4536fec82cb813586d9f334
https://github.com/llvm/llvm-project/commit/8ab7b37e749f4ab7c4536fec82cb813586d9f334
Author: Michael Kruse <llvm-project at meinersbur.de>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
M openmp/cmake/OpenMPTesting.cmake
M openmp/runtime/test/CMakeLists.txt
M openmp/runtime/test/lit.cfg
M openmp/runtime/test/lit.site.cfg.in
M openmp/runtime/test/tasking/omp50_taskdep_depobj.c
Log Message:
-----------
[OpenMP][test] Remove %flags-use-compiler-omp-h (#188789)
With the standalone and project builds removed,
`OPENMP_TEST_COMPILER_HAS_OMP_H`/`config.test_compiler_has_omp_h` is set
to constant 1, which causes the `config.omp_header_directory` search
path NOT to be added to `%flags-use-compiler-omp-h`, causing the system
`omp.h` used, or the only test actually using it
(`omp50_taskdep_depobj.c`) failing if that one is not available.
The intention of `OPENMP_TEST_COMPILER_HAS_OMP_H` was to use gcc's
`omp.h` which declares `omp_depend_t` differently than our `omp.h`
(https://reviews.llvm.org/D108790). Using `OPENMP_TEST_C_COMPILER=gcc`
was used to test libomp's GOMP compatibility layer, but testing it is
currently unmaintained and has no buildbot (60 failing tests out of 389
with gcc-13, not including OMPD and OMPT). If updating testing for GOMP,
then gcc's own `omp.h` must be used for all tests: using the GOMP ABI
requires using GOMP's `omp.h`.
Closes: #187879
Commit: 5145d72a84db3511ef8d3554426cf7be05899b10
https://github.com/llvm/llvm-project/commit/5145d72a84db3511ef8d3554426cf7be05899b10
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
M llvm/test/CodeGen/SPIRV/pointers/PtrCast-in-OpSpecConstantOp.ll
M llvm/test/CodeGen/SPIRV/pointers/PtrCast-null-in-OpSpecConstantOp.ll
M llvm/test/CodeGen/SPIRV/pointers/fun-with-aggregate-arg-in-const-init.ll
M llvm/test/CodeGen/SPIRV/pointers/global-ptrtoint.ll
M llvm/test/CodeGen/SPIRV/pointers/struct-opaque-pointers.ll
M llvm/test/CodeGen/SPIRV/transcoding/ConvertPtrInGlobalInit.ll
M llvm/test/CodeGen/SPIRV/transcoding/block_w_struct_return.ll
M llvm/test/CodeGen/SPIRV/transcoding/global_block.ll
Log Message:
-----------
[SPIR-V] Emit OpSpecConstantComposite for composites with spec constant operands (#188557)
- The SPIR-V spec requires that OpConstantComposite must not reference
spec constant operands. When a composite contains non-constant
constitued, OpSpecConstantComposite should be emitted instead of
OpConstantComposite
- Avoid creating function pointer types when the
SPV_INTEL_function_pointers extension is unavailable, falling back to i8
as the pointee type
- Re-enable spirv-val validation in tests that previously failed due to
this issue, and un-XFAIL the block_w_struct_return and global_block
transcoding tests
related to #60133
fixes #186756
Commit: 07cce307f147a5eb5c6dbb3458e5476b6f237317
https://github.com/llvm/llvm-project/commit/07cce307f147a5eb5c6dbb3458e5476b6f237317
Author: Stefan Gränitz <stefan.graenitz at gmail.com>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
M llvm/test/tools/llvm-debuginfod-find/headers-winhttp.test
Log Message:
-----------
Revert "[llvm] Attempt to re-enable llvm-debuginfod-find test on Windows bots" (#188935)
Reverts llvm/llvm-project#188810
Commit: 015994b7f9bce814c8851b7dd6d1718fc8dbb514
https://github.com/llvm/llvm-project/commit/015994b7f9bce814c8851b7dd6d1718fc8dbb514
Author: Dan Blackwell <dan_blackwell at apple.com>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
M compiler-rt/test/asan/TestCases/stack_container_dynamic_lib.c
Log Message:
-----------
[ASan][test-only] Remove superfluous guards in stack_container_dynamic_lib.c (#188469)
As noted in https://github.com/llvm/llvm-project/pull/188406 comments,
the documentation recommends guarding only with
__has_feature(address_sanitizer). This patch updates the test to follow
the same pattern by removing the
__SANITIZER_DISABLE_CONTAINER_OVERFLOW__ checks. Having this macro
defined results in the common_interface_defs.h header defining the
contiguous container functions as no-ops anyway.
This is a followup to https://github.com/llvm/llvm-project/pull/188406.
Commit: 6a994417d85116c4ae4f21f15c35f944944443fa
https://github.com/llvm/llvm-project/commit/6a994417d85116c4ae4f21f15c35f944944443fa
Author: Dan Blackwell <dan_blackwell at apple.com>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
M compiler-rt/lib/sanitizer_common/sanitizer_internal_defs.h
Log Message:
-----------
[NFCI][sanitizer_common] Realign #ifdefs in sanitizer_internal_defs.h (#186861)
Currently it is very hard to tell these nested ifdefs apart. This patch
fixes that, while trying to be as light-touch as possible.
Commit: b164e7c61020aa40995779574bb7e8064f165a09
https://github.com/llvm/llvm-project/commit/b164e7c61020aa40995779574bb7e8064f165a09
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/LowerMatrixIntrinsics.cpp
A llvm/test/Transforms/LowerMatrixIntrinsics/multiply-fused-tile-size-0.ll
Log Message:
-----------
[Matrix] Handle -fuse-matrix-tile-size=0 as tiling disabled. (#188861)
Treat -fuse-matrix-tile-size=0 as disabling tiling, as tile-size of 0
doesn't really make sense.
Fixes https://github.com/llvm/llvm-project/issues/185153
PR: https://github.com/llvm/llvm-project/pull/188861
Commit: e0a1e78738b2ac2644db4b0a7d27dffc621aacdb
https://github.com/llvm/llvm-project/commit/e0a1e78738b2ac2644db4b0a7d27dffc621aacdb
Author: Romaric Jodin <rjodin at google.com>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
M libclc/CMakeLists.txt
M libclc/clc/lib/generic/math/clc_sincos_helpers.cl
M libclc/clc/lib/generic/math/clc_sincos_helpers.inc
Log Message:
-----------
libclc: do not use int64 in sincos helpers (#188056)
int64 is optional, thus we do not want to force its usage for clspv.
Commit: 06b057d2546ed64018b44df5ebe0e3ecd1c07b26
https://github.com/llvm/llvm-project/commit/06b057d2546ed64018b44df5ebe0e3ecd1c07b26
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
M mlir/lib/Dialect/Linalg/Transforms/DropUnitDims.cpp
M mlir/lib/Transforms/Utils/WalkPatternRewriteDriver.cpp
M mlir/test/lib/Dialect/Test/TestPatterns.cpp
Log Message:
-----------
[MLIR] Fix ErasedOpsListener false positives for newly created ops/blocks (#188956)
WalkPatternRewriteDriver's ErasedOpsListener incorrectly flagged
erasures of ops/blocks that were created during the current pattern
application. Since those ops were never in the walk schedule, erasing
them is safe.
Track newly inserted ops and blocks per visited op; skip the erasure
check for them. Also fix two related issues:
- DropUnitDims: use a fresh IRRewriter (not inheriting the walk pattern
rewriter's listener) for replaceUnitDimIndexOps on cloned ops.
- TestPatterns CloneRegionBeforeOp: wrap op->setAttr() in
modifyOpInPlace to properly notify the rewriter of the in-place change.
Assisted-by: Claude Code
Fix a failure present with MLIR_ENABLE_EXPENSIVE_PATTERN_API_CHECKS=ON.
Co-authored-by: Claude Sonnet 4.6 <noreply at anthropic.com>
Commit: 38c6493c894c74fc64e58a46f0896c25ba6347f3
https://github.com/llvm/llvm-project/commit/38c6493c894c74fc64e58a46f0896c25ba6347f3
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
M mlir/lib/Dialect/X86/Transforms/VectorContractToPackedTypeDotProduct.cpp
Log Message:
-----------
[MLIR][X86] Fix direct use.set() bypassing rewriter in rewriteUses (#188945)
rewriteUses was calling use.set(newVal) directly on OpOperand
references, bypassing the rewriter. This violates the pattern API
contract and causes fingerprint change failures when
MLIR_ENABLE_EXPENSIVE_PATTERN_API_CHECKS is enabled. Wrap the
modification with rewriter.modifyOpInPlace() to properly notify the
rewriter of the changes.
Assisted-by: Claude Code
Fix a failure present with MLIR_ENABLE_EXPENSIVE_PATTERN_API_CHECKS=ON.
Commit: 1b16876ecd562b7a1f99c20668f1e0327809b8a9
https://github.com/llvm/llvm-project/commit/1b16876ecd562b7a1f99c20668f1e0327809b8a9
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
M cross-project-tests/debuginfo-tests/llgdb-tests/sret.cpp
Log Message:
-----------
[cross-project-tests] Mark llgdb-tests/sret.cpp as UNSUPPORTED on Linux
See https://github.com/llvm/llvm-project/issues/188957
Fails with following error on the `cross-project-tests-sie-ubuntu-dwarf5` builder:
```
******************** TEST 'cross-project-tests :: debuginfo-tests/llgdb-tests/sret.cpp' FAILED ********************
Exit Code: 1
Command Output (stdout):
--
Running debugger
Running FileCheck
Debugger output was:
Breakpoint 1 at 0x11fb: file /home/buildbot/buildbot-root/cross-project-tests-sie-ubuntu-dwarf5/llvm-project/cross-project-tests/debuginfo-tests/llgdb-tests/sret.cpp, line 64.
[Thread debugging using libthread_db enabled]
Using host libthread_db library "/lib/x86_64-linux-gnu/libthread_db.so.1".
Breakpoint 1, B::AInstance (this=0x7fffffffe6ef) at /home/buildbot/buildbot-root/cross-project-tests-sie-ubuntu-dwarf5/llvm-project/cross-project-tests/debuginfo-tests/llgdb-tests/sret.cpp:64
64 A a(12);
$1 = {_vptr$A = 0x0, m_int = 0, static __clang_vtable = <optimized out>}
A debugging session is active.
Inferior 1 [process 1110596] will be killed.
Quit anyway? (y or n) [answered Y; input not from terminal]
--
Command Output (stderr):
--
/home/buildbot/buildbot-root/cross-project-tests-sie-ubuntu-dwarf5/build/bin/clang --driver-mode=g++ --target=x86_64-unknown-linux-gnu -O0 -g /home/buildbot/buildbot-root/cross-project-tests-sie-ubuntu-dwarf5/llvm-project/cross-project-tests/debuginfo-tests/llgdb-tests/sret.cpp -c -o /home/buildbot/buildbot-root/cross-project-tests-sie-ubuntu-dwarf5/build/projects/cross-project-tests/debuginfo-tests/llgdb-tests/Output/sret.cpp.tmp.o # RUN: at line 4
+ /home/buildbot/buildbot-root/cross-project-tests-sie-ubuntu-dwarf5/build/bin/clang --driver-mode=g++ --target=x86_64-unknown-linux-gnu -O0 -g /home/buildbot/buildbot-root/cross-project-tests-sie-ubuntu-dwarf5/llvm-project/cross-project-tests/debuginfo-tests/llgdb-tests/sret.cpp -c -o /home/buildbot/buildbot-root/cross-project-tests-sie-ubuntu-dwarf5/build/projects/cross-project-tests/debuginfo-tests/llgdb-tests/Output/sret.cpp.tmp.o
/home/buildbot/buildbot-root/cross-project-tests-sie-ubuntu-dwarf5/build/bin/clang --driver-mode=g++ --target=x86_64-unknown-linux-gnu /home/buildbot/buildbot-root/cross-project-tests-sie-ubuntu-dwarf5/build/projects/cross-project-tests/debuginfo-tests/llgdb-tests/Output/sret.cpp.tmp.o -o /home/buildbot/buildbot-root/cross-project-tests-sie-ubuntu-dwarf5/build/projects/cross-project-tests/debuginfo-tests/llgdb-tests/Output/sret.cpp.tmp.out # RUN: at line 5
+ /home/buildbot/buildbot-root/cross-project-tests-sie-ubuntu-dwarf5/build/bin/clang --driver-mode=g++ --target=x86_64-unknown-linux-gnu /home/buildbot/buildbot-root/cross-project-tests-sie-ubuntu-dwarf5/build/projects/cross-project-tests/debuginfo-tests/llgdb-tests/Output/sret.cpp.tmp.o -o /home/buildbot/buildbot-root/cross-project-tests-sie-ubuntu-dwarf5/build/projects/cross-project-tests/debuginfo-tests/llgdb-tests/Output/sret.cpp.tmp.out
PYTHON_EXEC_PATH=/usr/bin/python3.10 LLDB_PYTHON_PATH=/home/buildbot/buildbot-root/cross-project-tests-sie-ubuntu-dwarf5/build/./lib/python3.10/site-packages /home/buildbot/buildbot-root/cross-project-tests-sie-ubuntu-dwarf5/llvm-project/cross-project-tests/debuginfo-tests/llgdb-tests/test_debuginfo.pl /home/buildbot/buildbot-root/cross-project-tests-sie-ubuntu-dwarf5/llvm-project/cross-project-tests/debuginfo-tests/llgdb-tests/sret.cpp /home/buildbot/buildbot-root/cross-project-tests-sie-ubuntu-dwarf5/build/projects/cross-project-tests/debuginfo-tests/llgdb-tests/Output/sret.cpp.tmp.out # RUN: at line 6
+ PYTHON_EXEC_PATH=/usr/bin/python3.10
+ LLDB_PYTHON_PATH=/home/buildbot/buildbot-root/cross-project-tests-sie-ubuntu-dwarf5/build/./lib/python3.10/site-packages
+ /home/buildbot/buildbot-root/cross-project-tests-sie-ubuntu-dwarf5/llvm-project/cross-project-tests/debuginfo-tests/llgdb-tests/test_debuginfo.pl /home/buildbot/buildbot-root/cross-project-tests-sie-ubuntu-dwarf5/llvm-project/cross-project-tests/debuginfo-tests/llgdb-tests/sret.cpp /home/buildbot/buildbot-root/cross-project-tests-sie-ubuntu-dwarf5/build/projects/cross-project-tests/debuginfo-tests/llgdb-tests/Output/sret.cpp.tmp.out
/home/buildbot/buildbot-root/cross-project-tests-sie-ubuntu-dwarf5/llvm-project/cross-project-tests/debuginfo-tests/llgdb-tests/sret.cpp:14:11: error: CHECK: expected string not found in input
// CHECK: {{(_vptr\$A =)?.*}}m_int = 12
^
/home/buildbot/buildbot-root/cross-project-tests-sie-ubuntu-dwarf5/build/projects/cross-project-tests/debuginfo-tests/llgdb-tests/Output/sret.cpp.gdb.output:7:5: note: scanning from here
$1 = {_vptr$A = 0x0, m_int = 0, static __clang_vtable = <optimized out>}
^
/home/buildbot/buildbot-root/cross-project-tests-sie-ubuntu-dwarf5/build/projects/cross-project-tests/debuginfo-tests/llgdb-tests/Output/sret.cpp.gdb.output:7:6: note: possible intended match here
$1 = {_vptr$A = 0x0, m_int = 0, static __clang_vtable = <optimized out>}
^
Input file: /home/buildbot/buildbot-root/cross-project-tests-sie-ubuntu-dwarf5/build/projects/cross-project-tests/debuginfo-tests/llgdb-tests/Output/sret.cpp.gdb.output
Check file: /home/buildbot/buildbot-root/cross-project-tests-sie-ubuntu-dwarf5/llvm-project/cross-project-tests/debuginfo-tests/llgdb-tests/sret.cpp
-dump-input=help explains the following input dump.
Input was:
<<<<<<
1: Breakpoint 1 at 0x11fb: file /home/buildbot/buildbot-root/cross-project-tests-sie-ubuntu-dwarf5/llvm-project/cross-project-tests/debuginfo-tests/llgdb-tests/sret.cpp, line 64.
2: [Thread debugging using libthread_db enabled]
3: Using host libthread_db library "/lib/x86_64-linux-gnu/libthread_db.so.1".
4:
5: Breakpoint 1, B::AInstance (this=0x7fffffffe6ef) at /home/buildbot/buildbot-root/cross-project-tests-sie-ubuntu-dwarf5/llvm-project/cross-project-tests/debuginfo-tests/llgdb-tests/sret.cpp:64
6: 64 A a(12);
7: $1 = {_vptr$A = 0x0, m_int = 0, static __clang_vtable = <optimized out>}
check:12 ^~~~
check:14'0 X~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ error: no match found
check:14'1 ? possible intended match
8: A debugging session is active.
check:14'0 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
9:
check:14'0 ~
10: Inferior 1 [process 1110596] will be killed.
check:14'0 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
11:
check:14'0 ~
12: Quit anyway? (y or n) [answered Y; input not from terminal]
check:14'0 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
>>>>>>
--
```
Commit: f4c0404ffbfc5d04d5bcbda54038c00d6cf74a34
https://github.com/llvm/llvm-project/commit/f4c0404ffbfc5d04d5bcbda54038c00d6cf74a34
Author: Ryotaro Kasuga <kasuga.ryotaro at fujitsu.com>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
M llvm/lib/Analysis/DependenceAnalysis.cpp
Log Message:
-----------
[DA] Remove absolute value calculations in the Weak Zero SIV tests (#185580)
In general, the following two points are potentially risky in DA:
- Computing the absolute value of a SCEV expression. Calling
`ScalarEvolution::getAbsExpr` on a signed minimum value will overflow
and return the same value, which is not the expected result in DA.
- Performing arithmetic operations involving a backedge-taken count. The
backedge-taken count is meaningful in an unsigned sense, whereas DA
currently treats all other values and operations in a signed sense.
For these reasons, I think it is better to avoid such operations in DA
whenever possible.
This patch addresses these issues in the Weak Zero SIV tests. I
attempted to craft a test case that exposes a defect caused by these
factors, but I couldn't find one. I'm not entirely sure whether the
current implementation is sound, but anyway, I think avoiding such
operations in DA is a good practice to prevent potential issues in the
future.
Commit: 26f26400d9e6debcc2d4581632903b36b5e5886c
https://github.com/llvm/llvm-project/commit/26f26400d9e6debcc2d4581632903b36b5e5886c
Author: Xinlong Chen <xinlongchen at tencent.com>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp
M clang/test/CodeGen/AArch64/neon-intrinsics.c
M clang/test/CodeGen/AArch64/neon/intrinsics.c
Log Message:
-----------
[CIR][AArch64] Upstream NEON Maximum builtins (#188503)
Implement CIR codegen for `vmax_*`, `vmaxq_*`, `maxnm_*`, `vmaxnmq_*`
AArch64 NEON builtins.
part of https://github.com/llvm/llvm-project/issues/185382
Commit: b3e26364109cd6654a801e303f0cb78dc304f145
https://github.com/llvm/llvm-project/commit/b3e26364109cd6654a801e303f0cb78dc304f145
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
M mlir/lib/Dialect/SparseTensor/Transforms/SparseTensorRewriting.cpp
Log Message:
-----------
[MLIR][SparseTensor] Fix direct op erasure bypassing rewriter in FoldConvertIntoProducer (#188960)
FoldConvertIntoProducer called op->erase() directly instead of going
through the rewriter, which triggers an "unsupported erasure" error
under MLIR_ENABLE_EXPENSIVE_PATTERN_API_CHECKS.
Assisted-by: Claude Code
Fix a failure present with MLIR_ENABLE_EXPENSIVE_PATTERN_API_CHECKS=ON.
Co-authored-by: Claude Sonnet 4.6 <noreply at anthropic.com>
Commit: 849ba979bdd5247d2a8428662d9ea05fb68a4d57
https://github.com/llvm/llvm-project/commit/849ba979bdd5247d2a8428662d9ea05fb68a4d57
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
M llvm/test/Transforms/LoopVectorize/VPlan/vplan-iv-transforms.ll
Log Message:
-----------
[VPlan] Add test showing incorrect flags on truncated inductions (NFC).
Commit: 045f65e9f822db1a2c3559bbeef32184e844c580
https://github.com/llvm/llvm-project/commit/045f65e9f822db1a2c3559bbeef32184e844c580
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
M mlir/lib/Dialect/X86/Utils/X86Utils.cpp
Log Message:
-----------
[MLIR][X86] Fix direct setOperand() bypassing rewriter in shuffleBeforeWriteLikeOp (#188946)
shuffleBeforeWriteLikeOp was calling opA->setOperand() and
opB->setOperand() directly, bypassing the rewriter. This violates the
pattern API contract and causes fingerprint change failures when
MLIR_ENABLE_EXPENSIVE_PATTERN_API_CHECKS is enabled. Wrap both
modifications with rewriter.modifyOpInPlace() to properly notify the
rewriter of the changes.
Assisted-by: Claude Code
Fix a failure present with MLIR_ENABLE_EXPENSIVE_PATTERN_API_CHECKS=ON.
Commit: c7529e4cf5123433c2a79e0e379faa62d95119dd
https://github.com/llvm/llvm-project/commit/c7529e4cf5123433c2a79e0e379faa62d95119dd
Author: Udaya Ranga <udaya.ranga at arm.com>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
M mlir/include/mlir/Dialect/Tosa/IR/TosaShapeOps.td
M mlir/lib/Dialect/Tosa/IR/TosaCanonicalizations.cpp
M mlir/test/Dialect/Tosa/constant_folding.mlir
Log Message:
-----------
[mlir][tosa]: Add SLICE_SHAPE folder (#186997)
Add compile time folder for tosa.SLICE_SHAPE
Signed-off-by: Udaya Ranga <udaya.ranga at arm.com>
Commit: 5ed2f6f46badfd80f464cf98c583c7ee2b4a7820
https://github.com/llvm/llvm-project/commit/5ed2f6f46badfd80f464cf98c583c7ee2b4a7820
Author: Pavel Labath <pavel at labath.sk>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
M lldb/include/lldb/Symbol/ObjectFile.h
M lldb/source/API/SBModuleSpec.cpp
M lldb/source/Commands/CommandObjectTarget.cpp
M lldb/source/Core/Module.cpp
M lldb/source/Plugins/ObjectContainer/BSD-Archive/ObjectContainerBSDArchive.cpp
M lldb/source/Plugins/ObjectContainer/Mach-O-Fileset/ObjectContainerMachOFileset.cpp
M lldb/source/Plugins/ObjectContainer/Universal-Mach-O/ObjectContainerUniversalMachO.cpp
M lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationServerCommon.cpp
M lldb/source/Plugins/SymbolLocator/DebugSymbols/SymbolLocatorDebugSymbols.cpp
M lldb/source/Plugins/SymbolLocator/Default/SymbolLocatorDefault.cpp
M lldb/source/Symbol/ObjectFile.cpp
M lldb/source/Target/Platform.cpp
M lldb/source/Target/TargetList.cpp
M lldb/unittests/ObjectFile/ELF/TestObjectFileELF.cpp
Log Message:
-----------
[lldb] Make ObjectFile::GetModuleSpecifications *return* module specifications (#188509)
For consistency with #188276 (and better readability?).
Commit: e84f9cacc972fa12734816b8ee1c921a973e93a6
https://github.com/llvm/llvm-project/commit/e84f9cacc972fa12734816b8ee1c921a973e93a6
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
M mlir/lib/Target/LLVMIR/Dialect/NVVM/NVVMToLLVMIRTranslation.cpp
M mlir/test/Target/LLVMIR/nvvmir-invalid.mlir
Log Message:
-----------
[MLIR][NVVM] Fix segfault when translating NVVM ops outside a function (#188735)
When a GPU barrier op was placed at the top level of a gpu.module (not
inside a gpu.func), the pass pipeline lowered it to nvvm.barrier0 at
module scope. During LLVM IR translation, translateModuleToLLVMIR called
NVVMDialectLLVMIRTranslationInterface::convertOperation for the
misplaced op, which reached createIntrinsicCall with an IRBuilder that
had no active insertion point (null GetInsertBlock()), causing a null
dereference crash.
The fix adds a guard at the top of the NVVM translation interface's
convertOperation: all NVVM ops are instruction-level and require an
active insertion point. If the insert block is null, the op must be
misplaced, so we return a proper MLIR error instead of crashing.
Fixes #186642
Assisted-by: Claude Code
Commit: 17e1438c6b05bb9a4931f0fa0b9612129f5d8321
https://github.com/llvm/llvm-project/commit/17e1438c6b05bb9a4931f0fa0b9612129f5d8321
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
M mlir/lib/Dialect/Vector/Transforms/LowerVectorBroadcast.cpp
Log Message:
-----------
[MLIR][Vector] Move scalable dims check before IR creation in BroadcastOpLowering (#188953)
BroadcastOpLowering::matchAndRewrite created ub::PoisonOp before
checking whether a scalable outer dimension prevents the
stretch-not-at-start case. When that check triggered, the pattern
returned failure() after IR was already modified, violating
MLIR_ENABLE_EXPENSIVE_PATTERN_API_CHECKS.
Fix: move the scalable dimension check to before the PoisonOp creation.
Assisted-by: Claude Code
Fix a failure present with MLIR_ENABLE_EXPENSIVE_PATTERN_API_CHECKS=ON.
Commit: 329432b351f3b7b640a676c3ce62ba1b465a8c63
https://github.com/llvm/llvm-project/commit/329432b351f3b7b640a676c3ce62ba1b465a8c63
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
M mlir/lib/Dialect/Vector/Transforms/LowerVectorScan.cpp
Log Message:
-----------
[MLIR][Vector] Move scalable dims check before IR creation in ScanToArithOps (#188954)
ScanToArithOps::matchAndRewrite created the result arith.constant before
checking whether the reduction dimension is scalable. When the dimension
was scalable, the pattern returned notifyMatchFailure() after IR was
already modified, violating MLIR_ENABLE_EXPENSIVE_PATTERN_API_CHECKS.
Fix: move the reductionScalableDims check to before the
arith::ConstantOp creation.
Assisted-by: Claude Code
Fix a failure present with MLIR_ENABLE_EXPENSIVE_PATTERN_API_CHECKS=ON.
Commit: c0e8eb972b3934f2dfa7b6a413a2bf6ef09da0dc
https://github.com/llvm/llvm-project/commit/c0e8eb972b3934f2dfa7b6a413a2bf6ef09da0dc
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
M mlir/lib/Dialect/Vector/Transforms/VectorEmulateNarrowType.cpp
Log Message:
-----------
[MLIR][Vector] Fix RewriteAlignedSubByteIntExt/Trunc producing invalid IR when source is already i8 (#188941)
When the conversion destination type is i8 (e.g., extsi i4->i8),
RewriteAlignedSubByteIntExt was unconditionally creating a new
ConversionOp with identical source and result types (vector<8xi8> ->
vector<8xi8>), which is invalid IR. Similarly,
RewriteAlignedSubByteIntTrunc was creating arith.trunci from
vector<Nxi8> to vector<Nxi8> when the source was already i8.
Fix by:
- In RewriteAlignedSubByteIntExt: replace the op directly with
subByteExt when it already has the destination type, instead of wrapping
in a new conversion op.
- In RewriteAlignedSubByteIntTrunc: skip the intermediate truncation to
i8 when the source is already i8, passing srcValue directly to the
i8->i4 rewrite logic.
This matches the existing test expectations in
vector-rewrite-subbyte-ext-and-trunci.mlir.
Assisted-by: Claude Code
Fix a failure present with MLIR_ENABLE_EXPENSIVE_PATTERN_API_CHECKS=ON.
Commit: 94a1aa51779fb35c732663973500d10445b0621d
https://github.com/llvm/llvm-project/commit/94a1aa51779fb35c732663973500d10445b0621d
Author: Sohaib Iftikhar <sohaibiftikhar at google.com>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
Log Message:
-----------
[LLVM:BUILD]: Add libs needed for windows builds (#188975)
[LLVM:BUILD]: Add libs needed for windows builds
Commit: 9d5684bb0092784703563025b67cc3e273797225
https://github.com/llvm/llvm-project/commit/9d5684bb0092784703563025b67cc3e273797225
Author: Ramkumar Ramachandra <artagnon at tenstorrent.com>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
M llvm/test/Transforms/LoopVectorize/iv_outside_user.ll
Log Message:
-----------
[LV] Regen iv_outside_user test with UTC (NFC) (#188934)
To merge different CHECK prefixes to a common one.
Commit: fc2dac83ed0cac4dccbf1ef72445e7ebe84553b1
https://github.com/llvm/llvm-project/commit/fc2dac83ed0cac4dccbf1ef72445e7ebe84553b1
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
M llvm/test/CodeGen/AMDGPU/eliminate-frame-index-scalar-bit-ops.mir
A llvm/test/CodeGen/AMDGPU/frame-index-disjoint-s-or-b32.ll
Log Message:
-----------
AMDGPU: Fold frame indexes into disjoint s_or_b32 (#102345)
Some pointer adds get turned into ors, and sometimes and is
performed on pointers for masking.
Commit: 28135251aee08e5f0f56b83b248cb30ef7d752a7
https://github.com/llvm/llvm-project/commit/28135251aee08e5f0f56b83b248cb30ef7d752a7
Author: Stefan Gränitz <stefan.graenitz at gmail.com>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
M llvm/lib/Support/HTTP/HTTPClient.cpp
Log Message:
-----------
[llvm][SupportHTTP] Guard SSL settings by Secure flag to avoid failing on plain HTTP (#188970)
This patch only adds the condition, so the flags are applied only for
HTTPS URLs. No change in implementation.
Commit: 99aa33d5b3670a324465541aeaffedff199468d8
https://github.com/llvm/llvm-project/commit/99aa33d5b3670a324465541aeaffedff199468d8
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanTransforms.h
M llvm/lib/Transforms/Vectorize/VPlanUnroll.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/blend-costs.ll
M llvm/test/Transforms/LoopVectorize/AArch64/conditional-branches-cost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/fold-tail-low-trip-count.ll
M llvm/test/Transforms/LoopVectorize/AArch64/force-target-instruction-cost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/induction-costs-sve.ll
M llvm/test/Transforms/LoopVectorize/AArch64/masked-call-scalarize.ll
M llvm/test/Transforms/LoopVectorize/AArch64/optsize_minsize.ll
M llvm/test/Transforms/LoopVectorize/AArch64/predicated-costs.ll
M llvm/test/Transforms/LoopVectorize/AArch64/transform-narrow-interleave-fold-tail.ll
M llvm/test/Transforms/LoopVectorize/AArch64/transform-narrow-interleave-to-widen-memory-multi-block.ll
M llvm/test/Transforms/LoopVectorize/AArch64/transform-narrow-interleave-to-widen-memory-remove-loop-region.ll
M llvm/test/Transforms/LoopVectorize/SystemZ/force-target-instruction-cost.ll
M llvm/test/Transforms/LoopVectorize/VPlan/interleave-and-scalarize-only.ll
M llvm/test/Transforms/LoopVectorize/VPlan/vplan-predicate-switch.ll
M llvm/test/Transforms/LoopVectorize/X86/consecutive-ptr-uniforms.ll
M llvm/test/Transforms/LoopVectorize/X86/constant-fold.ll
M llvm/test/Transforms/LoopVectorize/X86/cost-conditional-branches.ll
M llvm/test/Transforms/LoopVectorize/X86/gather_scatter.ll
M llvm/test/Transforms/LoopVectorize/X86/induction-costs.ll
M llvm/test/Transforms/LoopVectorize/X86/pr109581-unused-blend.ll
M llvm/test/Transforms/LoopVectorize/X86/pr55096-scalarize-add.ll
M llvm/test/Transforms/LoopVectorize/X86/small-size.ll
M llvm/test/Transforms/LoopVectorize/X86/x86-interleaved-accesses-masked-group.ll
M llvm/test/Transforms/LoopVectorize/X86/x86-interleaved-store-accesses-with-gaps.ll
M llvm/test/Transforms/LoopVectorize/as_cast.ll
M llvm/test/Transforms/LoopVectorize/cast-induction.ll
M llvm/test/Transforms/LoopVectorize/consecutive-ptr-uniforms.ll
M llvm/test/Transforms/LoopVectorize/constant-fold-commutative-and.ll
M llvm/test/Transforms/LoopVectorize/constantfolder.ll
M llvm/test/Transforms/LoopVectorize/cse-casts.ll
M llvm/test/Transforms/LoopVectorize/debugloc.ll
M llvm/test/Transforms/LoopVectorize/dont-fold-tail-for-divisible-TC.ll
M llvm/test/Transforms/LoopVectorize/find-last-iv-sinkable-load.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/float-induction.ll
M llvm/test/Transforms/LoopVectorize/hoist-and-sink-mem-ops-with-invariant-pointers.ll
M llvm/test/Transforms/LoopVectorize/hoist-predicated-loads-with-predicated-stores.ll
M llvm/test/Transforms/LoopVectorize/if-pred-stores.ll
M llvm/test/Transforms/LoopVectorize/interleaved-accesses-pred-stores.ll
M llvm/test/Transforms/LoopVectorize/load-deref-pred-align.ll
M llvm/test/Transforms/LoopVectorize/loop-form.ll
M llvm/test/Transforms/LoopVectorize/memdep-fold-tail.ll
M llvm/test/Transforms/LoopVectorize/pointer-induction.ll
M llvm/test/Transforms/LoopVectorize/pr37248.ll
M llvm/test/Transforms/LoopVectorize/pr45679-fold-tail-by-masking.ll
M llvm/test/Transforms/LoopVectorize/predicate-switch.ll
M llvm/test/Transforms/LoopVectorize/select-cmp-multiuse.ll
M llvm/test/Transforms/LoopVectorize/struct-return-replicate.ll
M llvm/test/Transforms/LoopVectorize/struct-return.ll
M llvm/test/Transforms/LoopVectorize/tail-folding-alloca-in-loop.ll
M llvm/test/Transforms/LoopVectorize/tail-folding-div.ll
M llvm/test/Transforms/LoopVectorize/tail-folding-masked-mem-opts.ll
M llvm/test/Transforms/LoopVectorize/tail-folding-optimize-vector-induction-width.ll
M llvm/test/Transforms/LoopVectorize/tail-folding-switch.ll
M llvm/test/Transforms/LoopVectorize/trip-count-expansion-may-introduce-ub.ll
M llvm/test/Transforms/LoopVectorize/use-scalar-epilogue-if-tp-fails.ll
M llvm/test/Transforms/LoopVectorize/vector-loop-backedge-elimination.ll
Log Message:
-----------
Reapply "[VPlan] Explicitly unroll replicate-regions without live-outs by VF." (#188947)
This reverts commit 4562a953db9d9813a873b78144cee1df39c7e0c0.
The recommit adjusts processLaneForReplicateRegion to first remap all
operands, then update the new operands. This fixes a VPlan verification
failure when running LV tests with expensive checks.
Original message:
This patch adds a new replicateReplicateRegionsByVF transform to unroll
replicate=regions by VF, dissolving them. The transform creates VF
copies of the replicate-region's content, connects them and converts
recipes to single-scalar variants for the corresponding lanes.
The initial version skips regions with live-outs (VPPredInstPHIRecipe),
which will be added in follow-up patches.
Depends on https://github.com/llvm/llvm-project/pull/170053
PR: https://github.com/llvm/llvm-project/pull/170212
Commit: 5a403150b468a5de7ddf9f1e295643c9c518aee8
https://github.com/llvm/llvm-project/commit/5a403150b468a5de7ddf9f1e295643c9c518aee8
Author: Nico Weber <thakis at chromium.org>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
A llvm/utils/gn/secondary/clang-tools-extra/clangd/remap/BUILD.gn
M llvm/utils/gn/secondary/clang-tools-extra/clangd/test/BUILD.gn
Log Message:
-----------
[gn] port c1ea10a854dcbb (clangd-remap)
Commit: f59191aa24b2ce6e4b1b6978e2da8225c0a004d0
https://github.com/llvm/llvm-project/commit/f59191aa24b2ce6e4b1b6978e2da8225c0a004d0
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
M llvm/utils/gn/secondary/clang/lib/Headers/BUILD.gn
Log Message:
-----------
[gn build] Port dc1411163170
Commit: 0067d92d53ff97e022367cb92e20a0ac18b8105c
https://github.com/llvm/llvm-project/commit/0067d92d53ff97e022367cb92e20a0ac18b8105c
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
M llvm/utils/gn/secondary/llvm/unittests/Target/AMDGPU/BUILD.gn
Log Message:
-----------
[gn build] Port f8416c864353
Commit: 90c1c588f8547d0fdd5128e467a0890b295d9755
https://github.com/llvm/llvm-project/commit/90c1c588f8547d0fdd5128e467a0890b295d9755
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/test/Transforms/LoopVectorize/VPlan/vplan-iv-transforms.ll
Log Message:
-----------
[VPlan] Don't set WrapFlags for truncated IVs. (#188966)
The wrap flags from the IV bin-op are not guaranteed to apply to
truncated inductions, which are evaluated in narrower types.
Instead of dropping them late (in expandVPWidenIntOrFpInduction), do not
add them at the outset, the prevent invalid transforms based on
incorrect flags in the future.
PR: https://github.com/llvm/llvm-project/pull/188966
Commit: 3b58a740d37bb623670fa1fa356e14895803e0c9
https://github.com/llvm/llvm-project/commit/3b58a740d37bb623670fa1fa356e14895803e0c9
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
Log Message:
-----------
[VPlan] Move flags to separate variable (NFC).
Addresses post-commit feedback missed in
https://github.com/llvm/llvm-project/pull/188966.
Commit: 965f9d87adb0a7376454374fbc140ab69bd796a9
https://github.com/llvm/llvm-project/commit/965f9d87adb0a7376454374fbc140ab69bd796a9
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
M llvm/lib/Transforms/Utils/LoopPeel.cpp
M llvm/lib/Transforms/Utils/LoopUnroll.cpp
Log Message:
-----------
[LoopUnroll] Use MapVector for deterministic iteration order. (#188821)
NonLoopBlocksIDom determines the order we adjust the DT, impacting DRT
child ordering.
Similarly, ExitInfos order impacts the order of SetDest, which applies
DT updates.
The order impacts collectChildrenInLoop, which in turn impacts the we
process BBs in LICM. And this in turn impacts the order in which we
perform alias queries.
If the order is not deterministic, we sometimes get different NumNoAlias
statistic counts for the same input, and possibly also different IR,
although I have not confirmed the latter.
Compile-time impact is neutral:
https://llvm-compile-time-tracker.com/compare.php?from=77710f14202a8684e12d68d08d2cd3738bbd0e1d&to=066ac6284041aac454c8ffa2894b866acbf96fd3&stat=instructions:u
On interesting change to highlight for stage1-O3, although this is
probably just noise : ClamAV 55233M 55190M (-0.08%)
PR: https://github.com/llvm/llvm-project/pull/188821
Commit: 32c429b2871cb59eb6400483dbed90a61996a825
https://github.com/llvm/llvm-project/commit/32c429b2871cb59eb6400483dbed90a61996a825
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
M mlir/lib/Dialect/Linalg/Transforms/DecomposeLinalgOps.cpp
Log Message:
-----------
[MLIR][Linalg] Remove unused function permuteValues (NFC) (#188990)
Commit: 94c0d37c59541278145db54adb1bf17da94fd958
https://github.com/llvm/llvm-project/commit/94c0d37c59541278145db54adb1bf17da94fd958
Author: Arseniy Zaostrovnykh <necto.ne at gmail.com>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
M clang/include/clang/CrossTU/CrossTranslationUnit.h
M clang/lib/CrossTU/CrossTranslationUnit.cpp
M clang/lib/StaticAnalyzer/Core/CallEvent.cpp
M clang/lib/StaticAnalyzer/Frontend/AnalysisConsumer.cpp
M clang/test/Analysis/ctu/diag/invalid-index.cpp
M clang/test/Analysis/ctu/diag/missing-index.cpp
M clang/test/Analysis/ctu/different-triples.cpp
Log Message:
-----------
[clang][analyzer] Add location to CTU failure diagnostics
Report CTU import failures at the place where the imported symbol would
be used. This helps to quicker understand why CSA might miss a certain
expected CTU bug.
--
CPP-7804
Commit: 840e9a4ddda3ebd383cc05714ebf27042905bb99
https://github.com/llvm/llvm-project/commit/840e9a4ddda3ebd383cc05714ebf27042905bb99
Author: Ramkumar Ramachandra <artagnon at tenstorrent.com>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
M flang/test/Integration/unroll-loops.f90
M flang/test/Lower/HLFIR/unroll-loops.fir
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanUnroll.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/epilog-iv-select-cmp.ll
M llvm/test/Transforms/LoopVectorize/AArch64/epilog-vectorization-widen-inductions.ll
M llvm/test/Transforms/LoopVectorize/AArch64/pr60831-sve-inv-store-crash.ll
M llvm/test/Transforms/LoopVectorize/RISCV/riscv-interleaved.ll
M llvm/test/Transforms/LoopVectorize/RISCV/strided-accesses.ll
M llvm/test/Transforms/LoopVectorize/X86/fixed-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/find-last-iv-interleave.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/induction.ll
M llvm/test/Transforms/LoopVectorize/iv-select-cmp-decreasing.ll
M llvm/test/Transforms/LoopVectorize/iv-select-cmp-non-const-iv-start.ll
M llvm/test/Transforms/LoopVectorize/iv-select-cmp.ll
Log Message:
-----------
[VPlan] Fix wrap-flags on WidenInduction unroll (#187710)
Due to a somewhat recent change, IntOrFpInduction recipes have
associated VPIRFlags. The VPlanUnroll logic for WidenInduction recipes
predates this change, and computes incomplete wrap-flags: update it to
simply use the flags on IntOrFpInduction recipes; PointerInduction
recipes have no associated flags, and indeed, no flags should be used.
Commit: 83173f7dbab3214355ee27f5525510078e616356
https://github.com/llvm/llvm-project/commit/83173f7dbab3214355ee27f5525510078e616356
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
M mlir/test/lib/Interfaces/TilingInterface/TestTilingInterfaceTransformOps.cpp
Log Message:
-----------
[MLIR] Apply clang-tidy fixes for llvm-qualified-auto in TestTilingInterfaceTransformOps.cpp (NFC)
Commit: abc0674f839ab4b932f5cc6e15da04566897b600
https://github.com/llvm/llvm-project/commit/abc0674f839ab4b932f5cc6e15da04566897b600
Author: Alexandros Lamprineas <alexandros.lamprineas at arm.com>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
M bolt/lib/Passes/LongJmp.cpp
M bolt/test/AArch64/compare-and-branch-reorder-blocks.S
Log Message:
-----------
[BOLT][AArch64] Handle irreversible branches in compact-code-model (#186850)
When the compact-code-model is used, LongJmpPass::relaxLocalBranches
attempts to reverseBranchCondition without calling isReversibleBranch
resulting in runtime error. With this patch I am adding an additional
trampoline to handle irreversible FEAT_CMPBR branches.
In the future the plan is to use liveness analysis and replace the
irreversible branch with compare followed by branch (see #185731) as
long as the condition flags are dead, or emit the additional trampoline
otherwise.
Commit: a11701afbd9a7f8a89387ef986bacfcfefaf6929
https://github.com/llvm/llvm-project/commit/a11701afbd9a7f8a89387ef986bacfcfefaf6929
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
M llvm/include/llvm/IR/PatternMatch.h
M llvm/unittests/IR/PatternMatch.cpp
Log Message:
-----------
PatternMatch: Add matchers for positive or negative infinity (#188933)
The existing m_Inf deceptively matches both positive and negative
infinities. Add variants that match the specific sign.
Commit: 52a880d30ba6cba38579ad7f51289d9ebe0c3719
https://github.com/llvm/llvm-project/commit/52a880d30ba6cba38579ad7f51289d9ebe0c3719
Author: Fateme Hosseini <Fhossein at qti.qualcomm.com>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
M llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
A llvm/test/CodeGen/Hexagon/qf-helpers-out-of-range.ll
Log Message:
-----------
[Hexagon] Make usesQF helpers robust (#188338)
Relax usesQF*Operand to return false for indices greater than the first
three inputs instead of asserting.
Commit: 9c0bce7ede827a8d28b9626930d2eb66015bfeb0
https://github.com/llvm/llvm-project/commit/9c0bce7ede827a8d28b9626930d2eb66015bfeb0
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
M mlir/lib/Dialect/Transform/Transforms/CheckUses.cpp
M mlir/test/Dialect/Transform/check-use-after-free.mlir
Log Message:
-----------
[MLIR][Transform] Fix crash in CheckUses when op lacks MemoryEffectOpInterface (#188998)
collectFreedValues used cast<MemoryEffectOpInterface> unconditionally on
every op encountered during the walk. Ops that do not implement the
interface (e.g. pdl.pattern, pdl.operands, pdl.types inside a
transform.with_pdl_patterns region) trigger the cast assertion, crashing
mlir-opt when -transform-dialect-check-uses is requested.
Change the cast to dyn_cast and skip ops that don't implement the
interface; they cannot free transform values and are safely ignored.
Fixes #120944
Assisted-by: Claude Code
Commit: 79ffad69f45821afddb0a5acc9a55dbf5f3d3e90
https://github.com/llvm/llvm-project/commit/79ffad69f45821afddb0a5acc9a55dbf5f3d3e90
Author: Haojian Wu <hokein.wu at gmail.com>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
M clang/include/clang/Sema/TypoCorrection.h
M clang/lib/Sema/SemaCXXScopeSpec.cpp
M clang/lib/Sema/SemaTemplate.cpp
A clang/test/SemaTemplate/gh183983.cpp
Log Message:
-----------
[clang][Sema] Fix assertion on invalid template template parameter during typo correction (#188239)
In the crash example, when performing typo correction for a qualified
name lookup (`::a`), clang suggests a template template parameter from
an outer scope.
However, template template parameters can not be qualified by any scope.
Attempting to combine the qualifier with the suggested template template
parameter resulted in an assertion failure in
`ASTContext::getQualifiedTemplateName`:
This patch is to update the typo correction filter to reject
`TemplateTemplateParmDecl` candidates when a qualifier is present . This
prevents the invalid suggestion from being generated and avoids the
assertion violation.
Fixes #183983
Commit: dba3de54a29b42651e4b81db510175fd3bb9da43
https://github.com/llvm/llvm-project/commit/dba3de54a29b42651e4b81db510175fd3bb9da43
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUCodeGenPrepare.cpp
M llvm/test/CodeGen/AMDGPU/fract-match.ll
Log Message:
-----------
AMDGPU: Allow poison vector elts in fract pattern (#188991)
Commit: 18ad761df0f7bfff2ab64a16ab6374a9cd644f32
https://github.com/llvm/llvm-project/commit/18ad761df0f7bfff2ab64a16ab6374a9cd644f32
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
M mlir/utils/generate-test-checks.py
Log Message:
-----------
[mlir] Fix generate-test-checks.py: don't put attr refs in CHECK-LABEL (#188985)
Two related bugs in generate-test-checks.py when a top-level operation
carries attribute alias references (e.g. `#map`, `#map1`) in its
signature:
1. The attribute reference substitution (replacing `#map` with
`#[[$ATTR_0]]`) ran *before* the pending attribute definitions were
processed, so the names were not yet available and the references were
left as-is in the output.
2. CHECK-LABEL lines do not support FileCheck variable references (e.g.
`#[[$ATTR_0]]`), so even after substitution the generated check would be
syntactically wrong.
Fix both issues:
- In the CHECK-LABEL branch, re-apply `process_attribute_references` to
the label prefix and SSA-split rest after flushing pending attribute
definitions, so that names are resolved.
- Split the label prefix at attribute reference boundaries; keep only
the text before the first reference in the CHECK-LABEL line and emit the
remainder on a CHECK-SAME line.
Before:
// CHECK-LABEL: func.func @test() attributes {amap = #map, bmap = #map1}
{
After:
// CHECK-LABEL: func.func @test() attributes {amap =
// CHECK-SAME: #[[$ATTR_0]], bmap = #[[$ATTR_1]]} {
Fixes #162310
Assisted-by: Claude Code
Commit: 33035782349d250d054eaee8172ad629b5bc1d66
https://github.com/llvm/llvm-project/commit/33035782349d250d054eaee8172ad629b5bc1d66
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
M mlir/lib/Dialect/GPU/Transforms/KernelOutlining.cpp
M mlir/test/Dialect/GPU/outlining.mlir
Log Message:
-----------
[MLIR][GPU] Reject nested symbol references in gpu-kernel-outlining (#188994)
Nested symbol references (e.g. `@module::@func`) inside a `gpu.launch`
body cannot be resolved after the body is outlined into a new
`gpu.module`. Previously, `createKernelModule` used `getLeafReference()`
to look up each symbol use, which silently skipped nested references
when the leaf name could not be found in the parent symbol table. This
left unresolvable cross-module references in the outlined kernel.
This patch detects nested symbol references whose root exists in the
parent symbol table — meaning the reference was valid before outlining
but will become dangling after it — and emits a diagnostic error.
Phantom references whose root does not exist in the parent are left
as-is, preserving existing behavior for unregistered-op attributes
(regression test from #185357).
The existing `@nested_launch` test was inadvertently testing this broken
behavior (silently producing invalid IR with a dangling
`@nested_launch_kernel::@nested_launch_kernel` reference inside the
outlined outer kernel module); it is updated to expect the new error.
Fixes #187942
Assisted-by: Claude Code
Commit: 71ea39a157a2efee413333f0433f3e07c791eedc
https://github.com/llvm/llvm-project/commit/71ea39a157a2efee413333f0433f3e07c791eedc
Author: Davide Grohmann <davide.grohmann at arm.com>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVBase.td
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVTosaOps.td
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVTosaTypes.td
M mlir/test/Dialect/SPIRV/IR/tosa-ops-verification.mlir
M mlir/test/Dialect/SPIRV/IR/tosa-ops.mlir
M mlir/test/Target/SPIRV/tosa-ops.mlir
M mlir/tools/mlir-tblgen/SPIRVUtilsGen.cpp
Log Message:
-----------
[mlir][spirv] Add Gather/Scatter/Resize ops in TOSA Ext Inst Set (#188497)
This patch introduces the following operators:
spirv.Tosa.Gather
spirv.Tosa.Scatter
spirv.Tosa.Resize
Also dialect and serialization round-trip tests have been added.
Signed-off-by: Davide Grohmann <davide.grohmann at arm.com>
Commit: 4a62d48549d2498b2e88b9bde12a4b7d5b67e4f8
https://github.com/llvm/llvm-project/commit/4a62d48549d2498b2e88b9bde12a4b7d5b67e4f8
Author: suoyuan <suoyuan666 at s5n.xyz>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp
M llvm/test/Transforms/InstCombine/saturating-add-sub.ll
Log Message:
-----------
[InstCombine] Fold zext-add/sub-min/max-trunc to uadd.sat or usub.sat (#185259)
Fixes #185244
```
trunc(umin(zext(a) + zext(b), MAX)) -> uadd.sat(a, b)
trunc(smin(zext(a) + zext(b), MAX)) -> uadd.sat(a, b)
trunc(smax(zext(a) - zext(b), 0)) --> usub.sat(a, b)
```
Proof: https://alive2.llvm.org/ce/z/K6wszu
Commit: a691a452b54ef24876f48ec0d854e6d6a59e97a7
https://github.com/llvm/llvm-project/commit/a691a452b54ef24876f48ec0d854e6d6a59e97a7
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
M libcxx/utils/ci/docker/docker-compose.yml
Log Message:
-----------
[libc++] Bump base image version in Docker compose (#188848)
This adds python-venv to the Docker image.
Commit: 53a8673f3d032d973d66435db0f4b9946001bbab
https://github.com/llvm/llvm-project/commit/53a8673f3d032d973d66435db0f4b9946001bbab
Author: David Spickett <david.spickett at arm.com>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
M lldb/docs/resources/build.rst
Log Message:
-----------
[lldb][docs] Mention "Python Install Manager" in Windows build instructions (#188728)
It was reported to us that this new install manager does not, and
apparently will not, have an option to install a debug Python. Which we
must have to be able to build lldb in debug mode on Windows.
(because the debug C runtime has a different ABI so everything in the
build must use only that version)
https://discourse.llvm.org/t/pythonx-d-lib-build-requirement/90285/1
Developers will have to use the "Windows installer", or build thier own,
so I've linked to Python's documentation for that.
Commit: 7119610bc43fe4121c4f6341c5bcc9e9eef7deb6
https://github.com/llvm/llvm-project/commit/7119610bc43fe4121c4f6341c5bcc9e9eef7deb6
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
M lldb/source/Plugins/Platform/WebAssembly/CMakeLists.txt
M lldb/source/Plugins/Platform/WebAssembly/PlatformWasm.cpp
M lldb/source/Plugins/Platform/WebAssembly/PlatformWasm.h
A lldb/source/Plugins/Platform/WebAssembly/PlatformWebInspectorWasm.cpp
A lldb/source/Plugins/Platform/WebAssembly/PlatformWebInspectorWasm.h
M llvm/docs/ReleaseNotes.md
Log Message:
-----------
[lldb] Add PlatformWebInspectorWasm (#188751)
Add a new PlatformWebInspectorWasm, which is a Wasm platform that
automatically connects to the WebInspector platform server.
The existing "wasm" platform handles WebAssembly generally and allows
you to configure a runtime to launch under. The "webinspector-wasm"
platform does the inverse, and only supports attaching to an already
running WebAssembly instance in Safari. The workflow here is always
`platform process list` followed by `platform process attach`. This
explains why you can only force create this platform and it's never
automatically selected when loading a Wasm target.
Commit: 3bff1a81c1b44e097b61dbf57090f61267baafe8
https://github.com/llvm/llvm-project/commit/3bff1a81c1b44e097b61dbf57090f61267baafe8
Author: Brian Cain <brian.cain at oss.qualcomm.com>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
M compiler-rt/lib/xray/xray_init.cpp
Log Message:
-----------
[XRay] Always register constructor(0) alongside .preinit_array (#188788)
On musl-based systems the dynamic linker does not process
DT_PREINIT_ARRAY, so the .preinit_array entry alone never calls
__xray_init(). Without initialization, the global XRay Flags struct is
zero-initialized and flags()->xray_mode is NULL. When the basic-mode or
FDR-mode static initializers run from .init_array and call
internal_strcmp(flags()->xray_mode, ...), they dereference NULL and
crash.
Fix this by always registering a constructor(0) in addition to the
.preinit_array entry. On glibc where .preinit_array works, __xray_init()
will have already run and the constructor returns immediately (the
function is idempotent). On musl, the constructor ensures __xray_init()
runs before other .init_array entries that depend on XRay flags being
initialized.
Commit: 1aba434dab1a628af4d2f370df3b468b79d31766
https://github.com/llvm/llvm-project/commit/1aba434dab1a628af4d2f370df3b468b79d31766
Author: Oliver Hunt <oliver at apple.com>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
M libunwind/src/libunwind.cpp
M libunwind/test/libunwind_01.pass.cpp
A libunwind/test/set_non_null_pc_outside_of_function_cfi_bounds.pass.cpp
Log Message:
-----------
[libunwind][PAC] Defang ptrauth's PC in valid CFI range abort (#184041)
It turns out making the CFI check a release mode abort causes many, if
not the majority, of JITs to fail during unwinding as they do not set up
CFI sections for their generated code. As a result any JITs that do
nominally support unwinding (and catching) through their JIT or assembly
frames trip this abort.
rdar://170862047
Commit: 5f09e24acbe634b724c93c3a8ccd1957b8f585c8
https://github.com/llvm/llvm-project/commit/5f09e24acbe634b724c93c3a8ccd1957b8f585c8
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
M clang/lib/AST/ByteCode/Disasm.cpp
Log Message:
-----------
[clang][bytecode] Make memory output of Program::dump more accurate (#188925)
Commit: 2e10b62995915d35ba528872e70aacda7223bd18
https://github.com/llvm/llvm-project/commit/2e10b62995915d35ba528872e70aacda7223bd18
Author: pkarveti <pkarveti at qti.qualcomm.com>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
M llvm/lib/Target/Hexagon/HexagonRegisterInfo.cpp
M llvm/test/CodeGen/Hexagon/aligna-prologue-expansion.mir
Log Message:
-----------
[Hexagon] Add AP register to liveins when used for frame index access (#188942)
This is a follow-up to commit 3ef59d80c5ce ("[Hexagon] Fix
use-before-def of AP register in prologue CSR spills").
When the AP (alignment pointer) register is used as a base register for
frame index elimination, add it to the basic block's livein set. This
ensures liveness information is accurate for the machine verifier.
The original commit fixed the use-before-def issue by moving PS_aligna
after CSR spills. However, when the prologepilog pass is run in
isolation (as in MIR tests) with expensive checks enabled, the verifier
reports an error because AP is used in blocks where it's not marked as
live-in.
In the full compilation pipeline, the Hexagon Packetizer adds AP as an
implicit operand to instruction bundles, which satisfies the verifier.
However, when running only the prologepilog pass (before packetization),
AP remains an explicit operand and must be in the livein set.
This fix adds AP to liveins when AP is used as the base register,
ensuring correct liveness tracking regardless of whether packetization
has run.
Commit: a5964ca759eb87eca533532ac4e23a821b3f276b
https://github.com/llvm/llvm-project/commit/a5964ca759eb87eca533532ac4e23a821b3f276b
Author: Brian Cain <brian.cain at oss.qualcomm.com>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
A llvm/test/CodeGen/Hexagon/cfgopt-newpt-invert.ll
A llvm/test/CodeGen/Hexagon/peephole-sxtw-combine.mir
A llvm/test/CodeGen/Hexagon/tfr-cleanup-double-imm.mir
A llvm/test/CodeGen/Hexagon/vec-print-wq.ll
Log Message:
-----------
[Hexagon] Add coverage tests for CodeGen passes (#183951)
Add tests targeting specific Hexagon CodeGen passes with low coverage:
- peephole-sxtw-combine.mir: HexagonPeephole pass exercising SXTW
removal, combine generation, and LSR copy patterns. Improves
HexagonPeephole.cpp line coverage from 63.89% to 99.31%.
- vec-print-wq.ll: HexagonVectorPrint pass with V (single vector) and W
(double vector) register printing via 128b HVX. Improves
HexagonVectorPrint.cpp line coverage from 71.19% to 87.29%.
- tfr-cleanup-double-imm.mir: HexagonTfrCleanup pass exercising 64-bit
immediate rewrite paths. Improves HexagonTfrCleanup.cpp line coverage
from 80.85% to 88.30%.
- cfgopt-newpt-invert.ll: HexagonCFGOptimizer pass exercising branch
inversion with new-value predicate transfers.
Commit: 8ea3645f859661abf74068668f8b0f9d934b8437
https://github.com/llvm/llvm-project/commit/8ea3645f859661abf74068668f8b0f9d934b8437
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
M llvm/lib/Analysis/CFG.cpp
Log Message:
-----------
[CFG] Add shortcut if CycleInfo is available (#188928)
isPotentiallyReachable() currently returns "reachable" early if BB
dominates StopBB. If CycleInfo is available, and BB is not part of a
cycle, we can also perform the reverse inference: Return "not reachable"
if StopBB dominates BB.
This both allows aborting the walk earlier, and provides a more precise
result.
Commit: b7b93687385169a3d752a52c45f5b0d708f21f37
https://github.com/llvm/llvm-project/commit/b7b93687385169a3d752a52c45f5b0d708f21f37
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVModuleAnalysis.cpp
M llvm/lib/Target/SPIRV/SPIRVSymbolicOperands.td
A llvm/test/CodeGen/SPIRV/opencl-cxx-version-2021.ll
A llvm/test/CodeGen/SPIRV/opencl-cxx-version-incompatible.ll
A llvm/test/CodeGen/SPIRV/opencl-cxx-version.ll
Log Message:
-----------
[SPIR-V] Support for C++ for OpenCL source language (#188791)
- Add CPP_for_OpenCL source language operand
- Handle opencl.cxx.version metadata
Align handling with SPIR-V translator logic and tests presented there
Commit: c3bffc8e82f9b69a3cfe19a1701fb460125f17a0
https://github.com/llvm/llvm-project/commit/c3bffc8e82f9b69a3cfe19a1701fb460125f17a0
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
M mlir/lib/Dialect/Linalg/Transforms/DropUnitDims.cpp
M mlir/lib/Transforms/Utils/WalkPatternRewriteDriver.cpp
M mlir/test/lib/Dialect/Test/TestPatterns.cpp
Log Message:
-----------
Revert "[MLIR] Fix ErasedOpsListener false positives for newly created ops/blocks" (#189010)
Reverts llvm/llvm-project#188956
Hit "merge" by accident on the wrong tab, juggling too may PRs in
parallel...
Commit: e06b5e53a29b394eee91b0dd1e227bc707d547e9
https://github.com/llvm/llvm-project/commit/e06b5e53a29b394eee91b0dd1e227bc707d547e9
Author: Anonmiraj <ezzibrahimx at gmail.com>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
M libc/config/gpu/amdgpu/entrypoints.txt
M libc/config/gpu/nvptx/entrypoints.txt
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/include/math.yaml
M libc/shared/math.h
A libc/shared/math/erfcf16.h
M libc/src/__support/math/CMakeLists.txt
A libc/src/__support/math/erfcf16.h
M libc/src/math/CMakeLists.txt
A libc/src/math/erfcf16.h
M libc/src/math/generic/CMakeLists.txt
A libc/src/math/generic/erfcf16.cpp
M libc/test/shared/CMakeLists.txt
M libc/test/shared/shared_math_test.cpp
M libc/test/src/math/CMakeLists.txt
A libc/test/src/math/erfcf16_test.cpp
M libc/test/src/math/smoke/CMakeLists.txt
A libc/test/src/math/smoke/erfcf16_test.cpp
M libc/utils/MPFRWrapper/MPCommon.cpp
M libc/utils/MPFRWrapper/MPCommon.h
M libc/utils/MPFRWrapper/MPFRUtils.cpp
M libc/utils/MPFRWrapper/MPFRUtils.h
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[libc][math] Implement C23 half precision erfc function (#180930)
Add support for the half-precision complementary error function
`erfcf16``, using a Sollya generated polynomial implementation with
proper handling of special cases.
Extend the MPFR utilities with erfc support to allow tests.
closes: #180927
Commit: 79658d77690345334e35e108d650abd03d8521bf
https://github.com/llvm/llvm-project/commit/79658d77690345334e35e108d650abd03d8521bf
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
M mlir/lib/Dialect/SCF/Transforms/LoopRangeFolding.cpp
M mlir/test/Dialect/SCF/loop-range.mlir
Log Message:
-----------
[MLIR][SCF] Fix ForLoopRangeFolding miscompile with non-positive MulIOp multiplier (#188995)
The scf-for-loop-range-folding pass transforms loops of the form
for (i = lb; i < ub; i += step) { use(i * c) }
into
for (j = lb*c; j < ub*c; j += step*c) { use(j) }
This transformation is only valid when c is strictly positive, since
scf.for requires a positive step. When c is zero or negative, the new
step becomes zero or effectively negative (wrapping in unsigned
arithmetic for index type), producing an incorrect loop.
Add a guard that restricts the MulIOp folding to cases where the
loop-invariant multiplier is a statically known positive integer
constant. Non-constant loop-invariant multipliers are also excluded
since their sign cannot be determined at compile time.
Fixes #56235
Fixes #116664
Assisted-by: Claude Code
Commit: b959831ed2e4ef9f819b6504085f70d1d14dbac0
https://github.com/llvm/llvm-project/commit/b959831ed2e4ef9f819b6504085f70d1d14dbac0
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
M mlir/lib/Dialect/Arith/Transforms/IntRangeOptimizations.cpp
M mlir/test/Dialect/Arith/int-range-opts.mlir
Log Message:
-----------
[MLIR][Arith] Fix int-range-optimizations miscompile from stale solver state (#188992)
The `--int-range-optimizations` pass runs the `DataFlowSolver` once,
then calls `applyPatternsGreedily` with a `DataFlowListener` that erases
solver state when ops are deleted. However, the greedy driver's
`simplifyRegions` step (which calls `runRegionDCE` between pattern
iterations) can remove block arguments without notifying the listener.
This frees the `BlockArgumentImpl` storage, which may be reused by a
subsequent allocation. The solver then finds stale lattice state keyed
at the reused address and incorrectly treats the new block argument as a
known constant, causing a miscompile.
The existing `enableFolding(false)` was added for the same class of bug
(folding can also remove block arguments). This patch extends the fix by
also disabling region simplification, preventing dead-arg elimination
from causing the same address-reuse problem.
Fixes #137281
Fixes #126195
Assisted-by: Claude Code
Commit: 45d7ef423d6f6050de6c9ec51ed8a4f5c8de377a
https://github.com/llvm/llvm-project/commit/45d7ef423d6f6050de6c9ec51ed8a4f5c8de377a
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
M offload/cmake/OpenMPTesting.cmake
Log Message:
-----------
[Offload][NFC] Remove unused testing functions in CMake (#189013)
Summary:
These are called by no one.
Commit: 760c4292c041aa857a462413f07623f69276f99b
https://github.com/llvm/llvm-project/commit/760c4292c041aa857a462413f07623f69276f99b
Author: Ravil Dorozhinskii <ravil.aviva.com at gmail.com>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
M mlir/include/mlir/Dialect/AMDGPU/IR/AMDGPUAttrs.td
M mlir/include/mlir/Dialect/AMDGPU/IR/AMDGPUEnums.td
M mlir/include/mlir/Dialect/AMDGPU/IR/AMDGPUOps.td
M mlir/lib/Conversion/AMDGPUToROCDL/AMDGPUToROCDL.cpp
M mlir/lib/Dialect/AMDGPU/IR/AMDGPUOps.cpp
A mlir/test/Conversion/AMDGPUToROCDL/global-prefetch.mlir
M mlir/test/Dialect/AMDGPU/invalid.mlir
Log Message:
-----------
[MLIR][AMDGPU] Added l2-prefetch op to AMDGPU (#188457)
This PR adds `global_prefetch` op to prefetch a cache line to high-level
caches using the aligned address of the source `memref` and an offset
provided by the indices of the element containing the cache line. This
provides temporal hints (e.g., regular or high-priority). Note that
out-of-bounds access is allowed in speculative mode. Ensure the source
`memref` is in address space `1`.
---------
Co-authored-by: Krzysztof Drewniak <Krzysztof.Drewniak at amd.com>
Commit: db5cd626b97a887cd237f9be9372cd3750fc7a02
https://github.com/llvm/llvm-project/commit/db5cd626b97a887cd237f9be9372cd3750fc7a02
Author: Carlos Seo <carlos.seo at linaro.org>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
M flang/lib/Optimizer/OpenMP/LowerWorkshare.cpp
M flang/test/Transforms/OpenMP/lower-workshare-thread-local.mlir
Log Message:
-----------
[flang][OpenMP] Restrict isSafeToParallelize to write-only thread-local effects (#188595)
This is a follow-up fix for commit 0f5e9bee.
Only write effects to thread-local memory should be considered safe to
parallelize in workshare lowering, not reads. When both reads and writes
were safe, the cascading effect in moveToSingle could cause entire
SingleRegions to become fully parallelized, eliminating the omp.single
and its implicit barrier. This removed synchronization points needed to
keep threads coordinated inside sequential loops containing workshared
operations, causing race conditions in forall-workshare patterns.
This was exposed by the Fujitsu Test Suite and made the following tests
regress:
FAIL: test-suite :: Fujitsu/Fortran/0398/Fujitsu-Fortran-0398_0031.test
FAIL: test-suite :: Fujitsu/Fortran/0398/Fujitsu-Fortran-0398_0013.test
FAIL: test-suite :: Fujitsu/Fortran/0398/Fujitsu-Fortran-0398_0030.test
FAIL: test-suite :: Fujitsu/Fortran/0398/Fujitsu-Fortran-0398_0014.test
Updates #143330
Commit: b2f59924124c636f948a2a0943bb733678d18647
https://github.com/llvm/llvm-project/commit/b2f59924124c636f948a2a0943bb733678d18647
Author: Jeff Bailey <jbailey at raspberryginger.com>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
M libc/docs/build_and_test.rst
M libc/docs/full_cross_build.rst
Log Message:
-----------
[libc][docs][NFC] Document cross-compilation testing with QEMU (#188838)
Added a "Building and Testing with an Emulator" section to
full_cross_build.rst using riscv64 and qemu-riscv64 as the example.
Outlined necessary CMake flags for cross-compiling with Clang, including
CMAKE_C_COMPILER_TARGET, CMAKE_CXX_COMPILER_TARGET, and
LLVM_ENABLE_LLD=ON. Switched from CMAKE_SYSROOT to LIBC_KERNEL_HEADERS
and added the gcc-riscv64-linux-gnu package dependency to ensure sysroot
issues on Debian-based systems are avoided while retaining access to
cross-compiler runtime objects.
Explained the self-hosted libc-hermetic-tests target as the required
target for executing tests during a standalone cross build, since the
standard check-libc tests are not hermetic.
Refactored existing CMake examples in full_cross_build.rst to use -S and
-B flags instead of cd and mkdir.
Removed prompt characters from code blocks and separated host
environment setup into explicit code blocks for easier copy-pasting.
Also removed the initial 'cd llvm-project' directory changes to reduce
boilerplate.
Added a cross-reference to the new emulator section in
build_and_test.rst.
Commit: e56161ef9841d61ea06e6b0a79e195e9a84addb1
https://github.com/llvm/llvm-project/commit/e56161ef9841d61ea06e6b0a79e195e9a84addb1
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
M libcxx/utils/ci/lnt/runners/README.md
M libcxx/utils/ci/lnt/runners/apple-m5-clang21
M libcxx/utils/ci/lnt/runners/apple-m5-xcode26
Log Message:
-----------
[libc++] Allow passing individual commits to LNT runners (#189020)
This is useful for generating specific data points.
Commit: 55322f2d43d07e5871af7eee5082e42d0526828d
https://github.com/llvm/llvm-project/commit/55322f2d43d07e5871af7eee5082e42d0526828d
Author: Marina Taylor <marina_taylor at apple.com>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
M llvm/include/llvm/Passes/CodeGenPassBuilder.h
M llvm/lib/CodeGen/TargetPassConfig.cpp
M llvm/lib/IR/IntrinsicInst.cpp
M llvm/test/CodeGen/AArch64/O3-pipeline.ll
A llvm/test/CodeGen/AArch64/arc-contract-claim-rv.ll
M llvm/test/CodeGen/AMDGPU/llc-pipeline-npm.ll
M llvm/test/CodeGen/AMDGPU/llc-pipeline.ll
M llvm/test/CodeGen/ARM/O3-pipeline.ll
M llvm/test/CodeGen/LoongArch/opt-pipeline.ll
M llvm/test/CodeGen/M68k/pipeline.ll
M llvm/test/CodeGen/PowerPC/O3-pipeline.ll
M llvm/test/CodeGen/RISCV/O3-pipeline.ll
M llvm/test/CodeGen/SPIRV/llc-pipeline.ll
M llvm/test/CodeGen/WebAssembly/GlobalISel/gisel-commandline-option.ll
M llvm/test/CodeGen/X86/llc-pipeline-npm.ll
M llvm/test/CodeGen/X86/opt-pipeline.ll
Log Message:
-----------
[ObjCARC] Run ObjCARCContract before PreISelIntrinsicLowering (#184149)
74e4694 moved ObjCARCContract from running before the codegen pipeline
into addISelPrepare(), which runs after PreISelIntrinsicLowering.
This broke ObjCARCContract's retainRV-to-claimRV optimization because
ObjCARCContract identifies ARC calls via intrinsics, not their lowered
counterparts.
This patch restores the pre-74e4694 ordering by moving ObjCARCContract
to addISelPasses.
The IntrinsicInst.cpp change looks extraneous but is required here:
ObjCARCContract may now rewrite the bundle operand from retainRV to
claimRV. When PreISelIntrinsicLowering then encounters this new
intrinsic use, lowerObjCCall asserts mayLowerToFunctionCall.
Assisted-by: claude
rdar://137997453
Commit: ba01826c63eca2033266224ee4ebb5a266e47bcc
https://github.com/llvm/llvm-project/commit/ba01826c63eca2033266224ee4ebb5a266e47bcc
Author: Lane0218 <laneljc at qq.com>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
M clang/include/clang/Options/Options.td
M clang/test/Driver/aarch64-fixed-x-register.c
Log Message:
-----------
[clang] Fix AArch64 -ffixed-x help text (#188911)
Fix the documented support set for AArch64 `-ffixed-xN` options to match
the current implementation.
This updates the generated option help text so that only the registers
actually supported by AArch64 are listed as `AArch64/RISC-V only`, and
marks `x8`, `x16`, `x17`, `x19`, and `x29`-`x31` as `RISC-V only`.
It also adds a driver test to cover the representative unsupported
AArch64 case for `-ffixed-x8`.
Fixes #186620.
Tests: `build-cir/bin/llvm-lit -sv
clang/test/Driver/aarch64-fixed-x-register.c`
Commit: 52bb40fe37ed121147276a03129baa2a4213715b
https://github.com/llvm/llvm-project/commit/52bb40fe37ed121147276a03129baa2a4213715b
Author: Bangtian Liu <liubangtian at gmail.com>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
M mlir/include/mlir/Dialect/GPU/IR/GPUOps.td
M mlir/lib/Conversion/GPUToNVVM/LowerGpuOpsToNVVMOps.cpp
M mlir/lib/Conversion/GPUToROCDL/LowerGpuOpsToROCDLOps.cpp
M mlir/lib/Conversion/GPUToSPIRV/GPUToSPIRV.cpp
M mlir/lib/Dialect/GPU/IR/GPUDialect.cpp
A mlir/test/Conversion/GPUToNVVM/gpu-to-nvvm-invalid-ballot.mlir
M mlir/test/Conversion/GPUToNVVM/gpu-to-nvvm.mlir
A mlir/test/Conversion/GPUToROCDL/gpu-to-rocdl-invalid-ballot.mlir
M mlir/test/Conversion/GPUToROCDL/gpu-to-rocdl.mlir
A mlir/test/Conversion/GPUToSPIRV/ballot.mlir
M mlir/test/Dialect/GPU/broadcast-speculatability.mlir
M mlir/test/Dialect/GPU/ops.mlir
Log Message:
-----------
[mlir][gpu] Add gpu.ballot operation to GPU dialect (#188647)
Motivated by the need from IREE side to support ArgMax/ArgMin-like
operation using dpp and ballot operation (refer to
https://github.com/iree-org/iree/discussions/23609#discussioncomment-16311655
for more details), this PR adds `gpu.ballot` operation to the MLIR GPU
dialect with ROCDL, NVVM, and SPIR-V lowering support.
Assisted-by: [Claude Code](https://claude.ai/code)
---------
Signed-off-by: Bangtian Liu <liubangtian at gmail.com>
Commit: ede566118f706fe69124d8ff1024965b6b5dd837
https://github.com/llvm/llvm-project/commit/ede566118f706fe69124d8ff1024965b6b5dd837
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
M libcxx/utils/ci/lnt/run-benchmarks
Log Message:
-----------
[libc++] Use --merge append when submitting to LNT (#189030)
This ensures that we can easily gather additional runs of the same
commit to reduce noise.
Commit: 294dc1b894520506cdd8d260f51c3f8fec6a7118
https://github.com/llvm/llvm-project/commit/294dc1b894520506cdd8d260f51c3f8fec6a7118
Author: ambergorzynski <120007557+ambergorzynski at users.noreply.github.com>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
A llvm/test/CodeGen/SPIRV/passes/SPIRVEmitIntrinsics-get-element-ptr.ll
Log Message:
-----------
[NFC][SPIRV] Add test for untested line in SPIRVEmitIntrinsics (#188962)
[This
body](https://github.com/llvm/llvm-project/blob/73768f88fbcb6fe8afa89bdebcec461fa13fe919/llvm/lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp#L857-L860)
is not covered by any existing test (checked via code coverage and
inserting an abort). New test proposed that covers this line, as
demonstrated by test failure when an abort is present in that line.
Commit: c413245aa52c2313ec4e5f942c8a2052d9350dce
https://github.com/llvm/llvm-project/commit/c413245aa52c2313ec4e5f942c8a2052d9350dce
Author: David Spickett <david.spickett at arm.com>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
M lldb/test/API/functionalities/inline-stepping/TestInlineStepping.py
Log Message:
-----------
[lldb][test] Disable part of TestInlineStepping.py on Windows on Arm (#189032)
This is flakey on the buildbot.
https://lab.llvm.org/buildbot/#/builders/141/builds/16719 as reported on
#188751.
```
FAIL: test_step_over_with_python_api_dwarf (TestInlineStepping.TestInlineStepping.test_step_over_with_python_api_dwarf)
Test stepping over and into inlined functions.
---------------------------------------------------------------------- Traceback (most recent call last):
File "C:\Users\tcwg\llvm-worker\lldb-aarch64-windows\llvm-project\lldb\packages\Python\lldbsuite\test\lldbtest.py", line 2019, in test_method
return attrvalue(self)
^^^^^^^^^^^^^^^
File "C:\Users\tcwg\llvm-worker\lldb-aarch64-windows\llvm-project\lldb\test\API\functionalities\inline-stepping\TestInlineStepping.py", line 25, in test_step_over_with_python_api
self.inline_stepping_step_over()
File "C:\Users\tcwg\llvm-worker\lldb-aarch64-windows\llvm-project\lldb\test\API\functionalities\inline-stepping\TestInlineStepping.py", line 317, in inline_stepping_step_over
self.run_step_sequence(step_sequence)
File "C:\Users\tcwg\llvm-worker\lldb-aarch64-windows\llvm-project\lldb\test\API\functionalities\inline-stepping\TestInlineStepping.py", line 152, in run_step_sequence
self.do_step(step_pattern[1], target_line_entry, test_stack_depth)
File "C:\Users\tcwg\llvm-worker\lldb-aarch64-windows\llvm-project\lldb\test\API\functionalities\inline-stepping\TestInlineStepping.py", line 83, in do_step
self.fail(
AssertionError: Failed to stop due to step into operation stepping to: C:\Users\tcwg\llvm-worker\lldb-aarch64-windows\llvm-project\lldb\test\API\functionalities\inline-stepping\calling.cpp:46
```
Commit: fe990b9005260bcf4a5630b577483e954c6bb60e
https://github.com/llvm/llvm-project/commit/fe990b9005260bcf4a5630b577483e954c6bb60e
Author: Derek Schuff <dschuff at chromium.org>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
M llvm/lib/Target/WebAssembly/WebAssemblyDebugValueManager.cpp
Log Message:
-----------
[WebAssembly] DebugValueManager ctor: scan only uses instead of whole BB (#188871)
The DebugValueManager constructor scans the basic block to find all DEBUG_VALUE
uses of a def. This can lead to quadratic behavior as reported in #168326.
Instead, use MRI.use_instructions to find only the def's uses to limit the
search.
We still scan the BB so that we get the uses in order, and so we can stop
when a new def is found.
Commit: ea8b1608af6d8bff6a0abb91d209428a99d0e3c3
https://github.com/llvm/llvm-project/commit/ea8b1608af6d8bff6a0abb91d209428a99d0e3c3
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
M mlir/lib/Conversion/GPUCommon/GPUToLLVMConversion.cpp
M mlir/test/Conversion/GPUCommon/lower-launch-func-to-gpu-runtime-calls.mlir
Log Message:
-----------
[GPUToLLVM] Support multiple async dependencies in gpu.launch_func lowering (#188987)
LegalizeLaunchFuncOpPattern previously rejected gpu.launch_func ops with
more than one async dependency. This change removes that limitation by
synchronizing additional dependencies onto the primary stream using
CUDA/HIP events, following the same approach already used in
ConvertWaitAsyncOpToGpuRuntimeCallPattern for gpu.wait async.
For each additional async dependency beyond the first:
- If it is a stream (produced by mgpuStreamCreate), create an event,
record it on that stream, wait for it on the primary stream, then
destroy the event.
- If it is already an event, wait for it directly on the primary stream
and destroy it.
Fixes #156984
Assisted-by: Claude Code
Commit: e9f51a39f91040fcd36b680b98d9a4da648615a1
https://github.com/llvm/llvm-project/commit/e9f51a39f91040fcd36b680b98d9a4da648615a1
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
M mlir/test/Dialect/SCF/canonicalize.mlir
Log Message:
-----------
[MLIR][SCF] Add regression tests for ConditionPropagation in nested ifs (#189036)
Add explicit tests for condition propagation in scf.if then and else
branches, including the void-return case. These tests serve as
regression
tests for the bug reported in #159165 where the
SCFIfConditionPropagationPass
(since reverted) had a visited-set that was never populated, causing the
pass
to not propagate conditions into nested scf.if statements.
The current ConditionPropagation canonicalization pattern in SCF.cpp
correctly handles both nested ifs and direct condition uses within
branches
using the getParentType() ancestor check.
Fixes #159165
Assisted-by: Claude Code
Commit: 3c9938d9555f904339ab2d84beaa3040f7816101
https://github.com/llvm/llvm-project/commit/3c9938d9555f904339ab2d84beaa3040f7816101
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
M mlir/lib/Conversion/XeVMToLLVM/XeVMToLLVM.cpp
Log Message:
-----------
[MLIR][XeVM] Wrap in-place op modifications in modifyOpInPlace in LLVMLoadStoreToOCLPattern (#188952)
LLVMLoadStoreToOCLPattern::matchAndRewrite was calling op->removeAttr()
and op->setOperand() directly without going through the rewriter API.
This caused MLIR_ENABLE_EXPENSIVE_PATTERN_API_CHECKS to report "expected
pattern to replace the root operation or modify it in place".
Fix: wrap the direct mutations in rewriter.modifyOpInPlace().
Assisted-by: Claude Code
Fix a failure present with MLIR_ENABLE_EXPENSIVE_PATTERN_API_CHECKS=ON.
Commit: 3363a0ead9cf3235d45fcf508e3cd9e33558d597
https://github.com/llvm/llvm-project/commit/3363a0ead9cf3235d45fcf508e3cd9e33558d597
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
M mlir/lib/Dialect/Shard/IR/ShardOps.cpp
Log Message:
-----------
[MLIR][Shard] Fix NormalizeSharding and FoldDuplicateShardOp direct mutations (#188981)
Calling attribute setters and MutableOperandRange::assign() without
going through the PatternRewriter, bypassing the rewriter's
change-tracking triggered "operation finger print changed" after the
pattern returned success under
MLIR_ENABLE_EXPENSIVE_PATTERN_API_CHECKS.
Assisted-by: Claude Code
Commit: 23eec1216993f599f90e259e339228ba8b69c58a
https://github.com/llvm/llvm-project/commit/23eec1216993f599f90e259e339228ba8b69c58a
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
M mlir/include/mlir/Transforms/Passes.td
M mlir/lib/Transforms/RemoveDeadValues.cpp
M mlir/test/Transforms/remove-dead-values.mlir
Log Message:
-----------
[MLIR] Fix outdated restriction comment in RemoveDeadValuesPass (#189041)
The RemoveDeadValuesPass previously emitted an error and skipped
optimization when the IR contained non-function symbol ops, non-call
symbol user ops, or branch ops. This restriction was later removed, but
the comments in RemoveDeadValues.cpp and Passes.td still described the
pass as operating "iff the IR doesn't have any non-function symbol ops,
non-call symbol user ops and branch ops."
Remove the stale restriction text from both the .cpp file comment and
the Passes.td description. Also add a test that verifies dead function
arguments are correctly removed inside a module that defines a symbol
(has a sym_name attribute), which was the original failure case reported
in issue #98700.
Fixes #98700
Assisted-by: Claude Code
Commit: e9669fd6fb8c3f155cd6acafa669567ad4051f35
https://github.com/llvm/llvm-project/commit/e9669fd6fb8c3f155cd6acafa669567ad4051f35
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
M mlir/lib/Dialect/EmitC/IR/EmitC.cpp
M mlir/test/Transforms/sccp.mlir
Log Message:
-----------
[MLIR][EmitC] Fix crash in SwitchOp::getEntrySuccessorRegions on unsigned integer type (#188546)
SwitchOp::getEntrySuccessorRegions and getRegionInvocationBounds called
IntegerAttr::getInt() to retrieve the constant switch argument, but
getInt() asserts that the attribute type must be a signless integer or
index. For unsigned integer types (e.g. ui32), this assertion fired and
crashed the process.
Fix by selecting the appropriate accessor based on the attribute type:
getInt() for signless/index, getSInt() for signed, and getUInt() (cast
to int64_t) for unsigned integer types. Unknown types fall back to the
conservative "all regions possible" path.
The same fix is applied to getRegionInvocationBounds, which had an
identical call to getInt().
Fixes #187973
Assisted-by: Claude Code
Commit: 5d293008c26d366cfa1eee9b6287de3313f0dcc6
https://github.com/llvm/llvm-project/commit/5d293008c26d366cfa1eee9b6287de3313f0dcc6
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
M mlir/lib/Transforms/Utils/LoopInvariantCodeMotionUtils.cpp
M mlir/test/Dialect/Transform/test-loop-transforms.mlir
M mlir/test/Transforms/loop-invariant-subset-hoisting.mlir
Log Message:
-----------
[MLIR][Transforms] Fix two bugs in loop-invariant-subset-hoisting (#188761)
Fix two issues in `MatchingSubsets::populateSubsetOpsAtIterArg`:
1. The `collectHoistableOps` parameter was declared but never used when
inserting subset ops via `insert(subsetOp)`. As a result, when recursing
into nested loops with `collectHoistableOps=false`, the nested loop's
subset ops were incorrectly added to the hoistable extraction/insertion
pairs of the parent loop. This caused spurious failures in the
`allDisjoint` check, preventing valid hoisting when nested loop ops
overlapped with outer loop ops. Fix by passing the parameter:
`insert(subsetOp, collectHoistableOps)`.
2. In the nested loop handling branch, there was no guard to detect when
a value has multiple nested loop uses (i.e., is used as an init arg in
more than one nested loop). Without the guard, `nextValue` would be
silently overwritten, leading to an incorrect use-def chain traversal.
Add `if (nextValue) return failure()` before setting `nextValue` for the
nested loop case, mirroring the existing guard for insertion ops.
Fixes #147096
Assisted-by: Claude Code
Commit: 79fdef22d628c926995082b1c052298f47aea283
https://github.com/llvm/llvm-project/commit/79fdef22d628c926995082b1c052298f47aea283
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
M mlir/docs/DefiningDialects/Operations.md
M mlir/test/IR/properties.mlir
Log Message:
-----------
[mlir][ods] Document and test DefaultValuedProp elision in prop-dict format (#189045)
Issue #152743 reports that DefaultValuedProp is printed even when the
property value equals the default, unlike DefaultValuedAttr which is not
printed in that case.
The fix for this was already present in the codebase since commit
8955e285e1ac ("[mlir] Add property combinators, initial ODS support"),
which added elision of default-valued properties in the
genPropDictPrinter
function in OpFormatGen.cpp.
This commit adds:
- Documentation in Operations.md clarifying that DefaultValuedProp is
also elided from prop-dict output when the value equals the default,
consistent with the existing documentation for DefaultValuedAttr.
- An explicit test in properties.mlir verifying that DefaultValuedProp
with value equal to default is elided from prop-dict output, and that
DefaultValuedProp with a non-default value is still printed.
Fixes #152743
Assisted-by: Claude Code
Commit: 0f63c0a3a5fa5ed41c1a53ef8520f88c280c5c78
https://github.com/llvm/llvm-project/commit/0f63c0a3a5fa5ed41c1a53ef8520f88c280c5c78
Author: Fangrui Song <i at maskray.me>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
M llvm/lib/CodeGen/AsmPrinter/AccelTable.cpp
Log Message:
-----------
[AccelTable] Pre-compute entry pool offsets for DW_IDX_parent. NFC (#188915)
After PR #150846 changed MCFragment to use fixed 16KB blocks, large
sections like .debug_names produce thousands of fragments. The
DW_IDX_parent emission called emitLabelDifference(ParentSymbol,
EntryPool, 4) per entry, which fell through to
attemptToFoldSymbolOffsetDifference's O(n) fragment walk when symbols
were in different fragments. This caused O(entries * fragments)
quadratic behavior, regressing dsymutil on large binaries like clang.
Fix by pre-computing byte offsets from EntryPool for each entry in a
first pass, then emitting emitInt32(offset) directly for DW_IDX_parent
instead of symbol differences. This also eliminates per-entry MCSymbol
allocation that was only needed for parent references.
Fix #188376
Commit: 40d5b19690e4dd2371479486ab8fa60a2b05fbe1
https://github.com/llvm/llvm-project/commit/40d5b19690e4dd2371479486ab8fa60a2b05fbe1
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
M mlir/test/IR/parser.mlir
Log Message:
-----------
[mlir][IR] Add test for complex<i1> dense element roundtrip (#189047)
Fixes #140302
Assisted-by: Claude Code
Commit: 9a0b003dde83d46f2ed6d95d85d1d9de3c1fe908
https://github.com/llvm/llvm-project/commit/9a0b003dde83d46f2ed6d95d85d1d9de3c1fe908
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
Log Message:
-----------
[MLIR][XeVM] Wrap in-place op modifications in modifyOpInPlace in LLVMLoadStoreToOCLPattern (#188952)
LLVMLoadStoreToOCLPattern::matchAndRewrite was calling op->removeAttr()
and op->setOperand() directly without going through the rewriter API.
This caused MLIR_ENABLE_EXPENSIVE_PATTERN_API_CHECKS to report "expected
pattern to replace the root operation or modify it in place".
Fix: wrap the direct mutations in rewriter.modifyOpInPlace().
Assisted-by: Claude Code
Fix a failure present with MLIR_ENABLE_EXPENSIVE_PATTERN_API_CHECKS=ON.
Commit: 5688aca96ea22c599407e90e85e0c54b27295ddf
https://github.com/llvm/llvm-project/commit/5688aca96ea22c599407e90e85e0c54b27295ddf
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUCodeGenPrepare.cpp
Log Message:
-----------
AMDGPU: Simplify synthesis of nextdown(1.0) constant (#189039)
Commit: 166f996c44fd94feae3ccf83073ebe17041ceab1
https://github.com/llvm/llvm-project/commit/166f996c44fd94feae3ccf83073ebe17041ceab1
Author: Michael Jones <michaelrj at google.com>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
M libc/include/sys/socket.yaml
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/libc_build_rules.bzl
Log Message:
-----------
[libc][bazel] Add generation for public headers (#184889)
Previously there was a single rule for stdbit, this PR adds generated
header targets for the rest of the linux headers. It also adds a
cc_library
for all of the public headers which also includes the types and macros
headers.
Commit: fa7ce27e9627f4c207938ba87acbe8957b853fcd
https://github.com/llvm/llvm-project/commit/fa7ce27e9627f4c207938ba87acbe8957b853fcd
Author: Chi-Chun, Chen <chichun.chen at hpe.com>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
M clang/docs/OpenMPSupport.rst
Log Message:
-----------
[Clang][OpenMP][NFC] Fix status color mismatches in OpenMPSupport.rst (#189050)
Correct the colors used in the OpenMP support tables so they
consistently match their status text:
- :good: (green) is for 'done' only
- :part: (yellow) is for in-progress states ('partial', 'worked on', 'in
progress', 'prototyped', etc.)
- :none: (red) is for 'unclaimed' only
Assisted with copilot
Commit: 5c1ddab1d8d2daa2b23f7c9e8c69e11b27e4f2c7
https://github.com/llvm/llvm-project/commit/5c1ddab1d8d2daa2b23f7c9e8c69e11b27e4f2c7
Author: Henry Jiang <h243jian at uwaterloo.ca>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
M clang/lib/Driver/Driver.cpp
M clang/test/Driver/pseudo-probe.c
Log Message:
-----------
[clang][Darwin] Externalize pseudoprobe and debug info (#186873)
Commit: 1a08f41281bff6ee35d6d904c702d7f2b819d7d8
https://github.com/llvm/llvm-project/commit/1a08f41281bff6ee35d6d904c702d7f2b819d7d8
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
M lldb/packages/Python/lldbsuite/test/decorators.py
Log Message:
-----------
[lldb] Disable arm64e tests under ASan (#189052)
Technically ASan is supported, but we need an arm64e sanitizer runtime.
It's still enabled when the whole test suite runs as arm64e, assuming
that you need arm64e runtimes regardless.
This will fix
https://ci.swift.org/view/all/job/llvm.org/job/lldb-cmake-sanitized-os-verification/
rdar://173313715
Commit: 76036032d6eb4b4a0dec034508bf5118168adf19
https://github.com/llvm/llvm-project/commit/76036032d6eb4b4a0dec034508bf5118168adf19
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
M clang/lib/AST/ByteCode/Interp.h
M clang/test/Frontend/fixed_point_sub_const.c
Log Message:
-----------
[clang][bytecode] Fix an assertion failure with fixed-point types (#189033)
Negation can also fail for fixed-point values.
Commit: d340a68ee01c080bdde116ef9d1c1bcab4316d52
https://github.com/llvm/llvm-project/commit/d340a68ee01c080bdde116ef9d1c1bcab4316d52
Author: Brady Hahn <zeromemesdev at gmail.com>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
M clang/lib/AST/MicrosoftMangle.cpp
M clang/test/CodeGenCXX/cfi-icall.cpp
M clang/test/CodeGenCXX/mangle-ms.cpp
Log Message:
-----------
Produce back-references for anonymous namespaces (#188843)
The Microsoft mangle implementation does not produce back-references for
anonymous namespaces, which results in nonsensical output from both
`undname` and `llvm-undname`. Consider the following example:
```
namespace {
struct X {};
X foo(X, X);
}
int main() {
foo({}, {});
}
```
Clang 22.1.0
```
?foo@?A0xC9C482F4@@YA?AUX@?A0xC9C482F4@@U1?A0xC9C482F4@@0 at Z
undname:
struct `anonymous namespace'::X __cdecl `anonymous namespace'::foo(struct `anonymous namespace'::A0xC9C482F4,struct `anonymous namespace'::A0xC9C482F4)
llvm-undname:
struct `anonymous namespace'::X __cdecl `anonymous namespace'::foo(struct `anonymous namespace'::0xC9C482F4, struct `anonymous namespace'::0xC9C482F4)
```
MSVC 19.50
```
?foo@?A0xa6a4f20e@@YA?AUX at 1@U21 at 0@Z
undname:
struct A0xa6a4f20e::X __cdecl `anonymous namespace'::foo(struct A0xa6a4f20e::X,struct A0xa6a4f20e::X)
llvm-undname:
struct 0xa6a4f20e::X __cdecl `anonymous namespace'::foo(struct 0xa6a4f20e::X, struct 0xa6a4f20e::X)
```
As seen in the undname output for Clang's mangling, not recording a name
back-reference for the anonymous namespace when mangling results in
references to the anonymous namespace's hash in-place of the struct's
name.
When recompiling the example with the changes, Clang yields
`?foo@?A0x69FA3AC2@@YA?AUX at 1@U21 at 0@Z`. Aside from the meaningless
discrepancy with the hash, this is identical to what is produced by
MSVC.
Resolves #37999
Commit: 9238b0f765ada177cd7034cf75a57acf26f2ac46
https://github.com/llvm/llvm-project/commit/9238b0f765ada177cd7034cf75a57acf26f2ac46
Author: ambergorzynski <120007557+ambergorzynski at users.noreply.github.com>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
A llvm/test/CodeGen/SPIRV/passes/SPIRVEmitIntrinsics-infer-ptr-type.ll
Log Message:
-----------
[NFC][SPIRV] New test for untested case in SPIRVEmitIntrinsics (#188950)
[This
case](https://github.com/llvm/llvm-project/blob/bc3571569685bfa4671e80d112dc0d5c8fc7b25d/llvm/lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp#L2815-L2818)
is not covered by any existing test (checked via code coverage and
inserting an `abort`). New test proposed that covers this line, as
demonstrated by test failure when an `abort` is present in that line.
Commit: 15bfc06b6bd49dea6e7b12fb2e440bc12f1dba1a
https://github.com/llvm/llvm-project/commit/15bfc06b6bd49dea6e7b12fb2e440bc12f1dba1a
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
M offload/CMakeLists.txt
M offload/cmake/Modules/LibomptargetGetDependencies.cmake
M offload/cmake/OpenMPTesting.cmake
M offload/plugins-nextgen/CMakeLists.txt
M offload/plugins-nextgen/level_zero/CMakeLists.txt
M offload/test/lit.site.cfg.in
M offload/tools/CMakeLists.txt
M offload/tools/deviceinfo/CMakeLists.txt
M offload/tools/kernelreplay/CMakeLists.txt
Log Message:
-----------
[Offload][NFC] Various minor changes to Offload CMake (#189029)
Summary:
Most of these just remove some redundancy or rename `openmp` ->
`offload` where the variable is purely internal.
Commit: f52797c54d4ef9269ac1da63388d794e5c3d4c0a
https://github.com/llvm/llvm-project/commit/f52797c54d4ef9269ac1da63388d794e5c3d4c0a
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
M compiler-rt/cmake/Modules/CompilerRTUtils.cmake
Log Message:
-----------
[compiler-rt] Fix irrelevant warning on the builtins target (#189055)
Summary:
Currently, building through runtimes will yield this warning:
```
CMake Warning at compiler-rt/cmake/Modules/CompilerRTUtils.cmake:335 (message):
LLVMTestingSupport not found in LLVM_AVAILABLE_LIBS
Call Stack (most recent call first)
```
This is due to the fact that the builtins target does not go through the
s tandard runtimes patch and sets them as BUILDTREE_ONLY so they do not
show up. These are not used in this case, so just guard the condition to
suppress the warning.
Commit: 87bec4715266a145fea6676a6f08a19de7bfc00f
https://github.com/llvm/llvm-project/commit/87bec4715266a145fea6676a6f08a19de7bfc00f
Author: vangthao95 <vang.thao at amd.com>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/constant-bus-restriction.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.div.fmas.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.div.scale.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.div.fmas.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.div.scale.mir
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.div.fixup.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.div.fixup.ll
Log Message:
-----------
AMDGPU/GlobalISel: RegBankLegalize rules for div_fmas/fixup/scale (#188305)
Commit: a125d9b5efd550883d8dbcf108448dd071ef77ea
https://github.com/llvm/llvm-project/commit/a125d9b5efd550883d8dbcf108448dd071ef77ea
Author: Ryan Buchner <rbuchner at qti.qualcomm.com>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
Log Message:
-----------
[SLP][NFC] Reapply "Refactor to prepare for constant stride stores" (#188689)
Refactor to proceed #185964.
Much of this is a refactor to address this issues. Instead of iterating over one chain at a time, attempting all VFs for that given change, we now iterate over VFs, trying each chain for the current VF.
Includes fix for use after free bug.
Commit: 9e44babdafc74df960e4668c805574634ed23e36
https://github.com/llvm/llvm-project/commit/9e44babdafc74df960e4668c805574634ed23e36
Author: Han-Chung Wang <hanhan0912 at gmail.com>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
M mlir/lib/Dialect/Vector/Transforms/VectorTransforms.cpp
M mlir/test/Dialect/Vector/vector-transfer-collapse-inner-most-dims.mlir
Log Message:
-----------
[mlir][vector] Add support for dropping inner unit dims for transfer_read/write with masks. (#188841)
The revision clears a long-due TODO, which supports the lowering when
transfer_read/write ops have mask via inserting a vector.shape_cast op
for the masked value.
---------
Signed-off-by: hanhanW <hanhan0912 at gmail.com>
Commit: 22cfe6f39d432bd095e9a3638033f2bb99f83c8e
https://github.com/llvm/llvm-project/commit/22cfe6f39d432bd095e9a3638033f2bb99f83c8e
Author: Sergei Barannikov <barannikov88 at gmail.com>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
M lldb/include/lldb/Breakpoint/BreakpointLocation.h
M lldb/include/lldb/Core/Address.h
M lldb/source/Breakpoint/BreakpointLocation.cpp
M lldb/source/Commands/CommandObjectMemory.cpp
M lldb/source/Commands/CommandObjectTarget.cpp
M lldb/source/Core/Address.cpp
M lldb/source/DataFormatters/FormattersHelpers.cpp
M lldb/source/DataFormatters/StringPrinter.cpp
M lldb/source/Expression/DWARFExpression.cpp
M lldb/source/Plugins/ABI/Mips/ABISysV_mips.cpp
M lldb/source/Plugins/ABI/Mips/ABISysV_mips64.cpp
M lldb/source/Plugins/ABI/PowerPC/ABISysV_ppc.cpp
M lldb/source/Plugins/ABI/SystemZ/ABISysV_s390x.cpp
M lldb/source/Plugins/ABI/X86/ABISysV_i386.cpp
M lldb/source/Plugins/ABI/X86/ABISysV_x86_64.cpp
M lldb/source/Plugins/ABI/X86/ABIWindows_x86_64.cpp
M lldb/source/Plugins/Architecture/Mips/ArchitectureMips.cpp
M lldb/source/Plugins/DynamicLoader/FreeBSD-Kernel/DynamicLoaderFreeBSDKernel.cpp
M lldb/source/Plugins/DynamicLoader/Hexagon-DYLD/DynamicLoaderHexagonDYLD.cpp
M lldb/source/Plugins/DynamicLoader/MacOSX-DYLD/DynamicLoaderDarwin.cpp
M lldb/source/Plugins/InstrumentationRuntime/MainThreadChecker/InstrumentationRuntimeMainThreadChecker.cpp
M lldb/source/Plugins/Language/ObjC/CFBasicHash.cpp
M lldb/source/Plugins/Language/ObjC/CFBasicHash.h
M lldb/source/Plugins/Language/ObjC/NSString.cpp
M lldb/source/Plugins/LanguageRuntime/CPlusPlus/ItaniumABIRuntime.cpp
M lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp
M lldb/source/Plugins/SymbolFile/CTF/SymbolFileCTF.cpp
M lldb/source/Plugins/SymbolFile/NativePDB/SymbolFileNativePDB.cpp
M lldb/source/Symbol/SymbolContext.cpp
M lldb/source/Target/StackFrame.cpp
M lldb/source/Target/Target.cpp
M lldb/source/ValueObject/ValueObjectDynamicValue.cpp
Log Message:
-----------
[lldb] Make single-argument Address constructor explicit (NFC) (#189035)
This is to highlight places where we (probably unintentionally)
construct an `Address` object from an already resolved address, making
it unresolved again.
See the changes in `DynamicLoaderDarwin.cpp` for a quick example.
Also, use this constructor instead of `Address(lldb::addr_t file_addr,
const SectionList *section_list)` when `section_list` is `nullptr`.
Commit: 2af95b2fa26756067f1573bcec77d183f0465b8a
https://github.com/llvm/llvm-project/commit/2af95b2fa26756067f1573bcec77d183f0465b8a
Author: Petter Berntsson <petter.berntsson at arm.com>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
M libc/utils/docgen/docgen.py
Log Message:
-----------
[libc][docs] Fix POSIX basedefs links for nested headers (#188738)
Fix broken POSIX basedefs links for nested headers in llvm-libc docs.
The docgen script currently emits paths like `sys/wait.h.html`, but the
Open Group uses `sys_wait.h.html`, for example:
-
https://pubs.opengroup.org/onlinepubs/9799919799/basedefs/sys_wait.h.html
This updates nested-header link generation while leaving flat headers
unchanged.
Commit: 28e2fa324727571a2dd6b0000e602acce37f8887
https://github.com/llvm/llvm-project/commit/28e2fa324727571a2dd6b0000e602acce37f8887
Author: Jianhui Li <jian.hui.li at intel.com>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
M mlir/include/mlir/Dialect/XeGPU/IR/XeGPUOps.td
M mlir/include/mlir/Dialect/XeGPU/IR/XeGPUTypes.td
M mlir/lib/Dialect/XeGPU/IR/XeGPUOps.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUSubgroupDistribute.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUUnroll.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUWgToSgDistribute.cpp
M mlir/test/Dialect/XeGPU/layout.mlir
M mlir/test/Dialect/XeGPU/subgroup-distribute-unit.mlir
M mlir/test/Dialect/XeGPU/xegpu-blocking.mlir
M mlir/test/Dialect/XeGPU/xegpu-wg-to-sg-unify-ops.mlir
Log Message:
-----------
[MLIR][XeGPU] Extend convert_layout op to support scalar type (#188874)
This PR adds scalar type to convert_layout op's result and operand. It
also enhance convert_layout pattern in wg-to-sg, unrolling, and
sg-to-lane distribution.
It is to support reduction to scalar, whether currently the layout
propagation doesn't support scalar to carry any layout. The design
choice to insert convert_layout op after reduction-to-scalar op to
record the layout information permanently across the passes.
Commit: cb58fe9df51193b827d181e2716bbe3b71ba7b83
https://github.com/llvm/llvm-project/commit/cb58fe9df51193b827d181e2716bbe3b71ba7b83
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
M mlir/lib/Dialect/SCF/Utils/Utils.cpp
M mlir/test/Dialect/SCF/loop-unroll.mlir
Log Message:
-----------
[MLIR][SCF] Fix loopUnrollByFactor for unsigned loops with narrow integer types (#189001)
`loopUnrollByFactor` used `getConstantIntValue()` to read loop bounds,
which sign-extends the constant to `int64_t`. For unsigned `scf.for`
loops with narrow integer types (e.g. i1, i2, i3), this produces wrong
results: a bound such as `1 : i1` has `getSExtValue() == -1` but should
be treated as `1` (unsigned).
Two bugs were introduced by this:
1. **Wrong epilogue detection**: the comparison `upperBoundUnrolledCst <
ubCst` used signed int64, so e.g. `0 < -1` (where ubCst is the
sign-extended i1 value 1) evaluated to false, suppressing the epilogue
that should execute the remaining iterations.
2. **Zero step after overflow**: when `tripCountEvenMultiple == 0` (all
iterations go to the epilogue), `stepUnrolledCst = stepCst *
unrollFactor` can overflow the bound type's bitwidth and wrap to 0. A
zero step causes `constantTripCount` to return `nullopt`, preventing the
zero-trip main loop from being elided.
Fix:
- Use zero-extension (`getZExtValue`) instead of sign-extension when
reading bounds for unsigned loops.
- When `tripCountEvenMultiple == 0`, keep the original step for the main
loop to avoid the zero-step issue (the step value is irrelevant for a
zero-trip loop anyway).
Fixes #163743
Assisted-by: Claude Code
Commit: bd947ea6fde984e4101a4fd2f1e1105a150d24df
https://github.com/llvm/llvm-project/commit/bd947ea6fde984e4101a4fd2f1e1105a150d24df
Author: Sirraide <aeternalmail at gmail.com>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
M clang/lib/Sema/SemaExpr.cpp
M clang/test/SemaCXX/cxx23-builtin-subscript.cpp
Log Message:
-----------
[Clang] [Sema] Don't diagnose multidimensional subscript operators on dependent types (#188910)
I forgot to check for dependent types in #187828; we somehow didn’t have
tests for this so CI didn’t catch this...
Commit: 030ef70908f7ee0328caf608fce3d1e961d7bf80
https://github.com/llvm/llvm-project/commit/030ef70908f7ee0328caf608fce3d1e961d7bf80
Author: Jeff Bailey <jbailey at raspberryginger.com>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
M libc/docs/build_and_test.rst
Log Message:
-----------
[libc][docs] Document libc-shared-tests ninja target (#189062)
Added a brief description of the libc-shared-tests target to the
Building and Testing page.
This target allows running tests for shared standalone components like
math primitives without the full libc runtime.
Commit: 7e2f78923c47cf10639f706ea528b49142669a2d
https://github.com/llvm/llvm-project/commit/7e2f78923c47cf10639f706ea528b49142669a2d
Author: Pengcheng Wang <wangpengcheng.pp at bytedance.com>
Date: 2026-03-28 (Sat, 28 Mar 2026)
Changed paths:
M clang/include/clang/Support/RISCVVIntrinsicUtils.h
M clang/lib/Support/RISCVVIntrinsicUtils.cpp
Log Message:
-----------
[RISCV][NFC] Use enum types to improve debuggability (#188418)
So that we can see the enum values instead of integral values when
dumping in debuggers.
Commit: d271bd37cec5e4330634d70f44c493b0936053a1
https://github.com/llvm/llvm-project/commit/d271bd37cec5e4330634d70f44c493b0936053a1
Author: Ben Dunbobbin <Ben.Dunbobbin at sony.com>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
M llvm/lib/LTO/LTO.cpp
M llvm/tools/llvm-lto2/llvm-lto2.cpp
Log Message:
-----------
Revert "[DTLTO] Speed up temporary file removal in the ThinLTO backed (#189043)
This reverts commit 11b439c5c5a07c95d30ce25abd6adf7f5fbb7105.
timeTraceProfilerCleanup() can be called before the temporary file
deletion has completed in LLD. This causes memory leaks that were
flagged up by sanitizer builds, e.g.:
https://lab.llvm.org/buildbot/#/builders/24/builds/18840/steps/11/logs/stdio
Commit: 80b304d14beec80381bd11eb19099bb54d213092
https://github.com/llvm/llvm-project/commit/80b304d14beec80381bd11eb19099bb54d213092
Author: Ben Dunbobbin <Ben.Dunbobbin at sony.com>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
M lld/COFF/LTO.cpp
M lld/ELF/LTO.cpp
M llvm/include/llvm/LTO/LTO.h
M llvm/lib/LTO/LTO.cpp
M llvm/tools/llvm-lto2/llvm-lto2.cpp
Log Message:
-----------
[DTLTO] Improve performance of adding files to the link (#186366)
The in-process ThinLTO backend typically generates object files in
memory and adds them directly to the link, except when the ThinLTO cache
is in use. DTLTO is unusual in that it adds files to the link from disk
in all cases.
When the ThinLTO cache is not in use, ThinLTO adds files via an
`AddStreamFn` callback provided by the linker, which ultimately appends
to a `SmallVector` in LLD. When the cache is in use, the linker supplies
an `AddBufferFn` callback that adds files more efficiently (by moving
`MemoryBuffer` ownership).
This patch adds a mandatory `AddBufferFn` to the DTLTO ThinLTO backend.
The backend uses this to add files to the link more efficiently.
Additionally:
- Move AddStream from CGThinBackend to InProcessThinBackend, for reader
clarity.
- Modify linker comments that implied the AddBuffer path is
cache-specific.
For a Clang link (Debug build with sanitizers and instrumentation) using
an optimized toolchain (PGO non-LTO, llvmorg-22.1.0), measuring the mean
`Add DTLTO files to the link` time trace scope duration:
- On Windows (Windows 11 Pro Build 26200, AMD Family 25 @ ~4.5 GHz, 16
cores/32 threads, 64 GB RAM), this patch reduces the mean from
2799.148 ms to 157.972 ms.
- On Linux (Ubuntu 24.04.3 LTS Kernel 6.14, Ryzen 9 5950X, 16
cores/32 threads, boost up to 5.09 GHz, 64 GB RAM), this patch reduces
the mean from 255.291 ms to 41.630 ms.
Based on work by @romanova-ekaterina and @kbelochapka.
Commit: ead9ac8331fd496ce4c348ab70e3709c68d46d50
https://github.com/llvm/llvm-project/commit/ead9ac8331fd496ce4c348ab70e3709c68d46d50
Author: Alexey Samsonov <vonosmas at gmail.com>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
R libc/include/limits.h.def
M libc/include/limits.yaml
R libc/include/locale.h.def
M libc/include/locale.yaml
R libc/include/time.h.def
M libc/include/time.yaml
R libc/include/wchar.h.def
M libc/include/wchar.yaml
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[libc] Remove header templates from several C standard headers. (#188878)
Switches the following headers to hdrgen-produced ones by referencing
some macro from C standard and the file containing the declarations in
corresponding YAML files:
* limits.h (referenced _WIDTH / _MAX / _MIN families).
* locale.h (referenced LC_ family).
* time.h (referenced CLOCKS_PER_SEC).
* wchar.h (referenced WEOF).
Commit: 00aebbff71ff4e348538708064ba2e033ccd6b2a
https://github.com/llvm/llvm-project/commit/00aebbff71ff4e348538708064ba2e033ccd6b2a
Author: Ehsan Amiri <ehsan.amiri at huawei.com>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
M llvm/include/llvm/Analysis/DependenceAnalysis.h
M llvm/lib/Analysis/DependenceAnalysis.cpp
Log Message:
-----------
[DA] Refactor signature of weakCrossingSIVtest and check inputs (NFCI) (#187117)
Passing SCEVAddRecExpr objects directly to weakCrossingSIVtest and
checking the validity of the input operands
Commit: 3d5a2552c5a13648bdd36581a01299f89a9bb7a1
https://github.com/llvm/llvm-project/commit/3d5a2552c5a13648bdd36581a01299f89a9bb7a1
Author: Thurston Dang <thurston at google.com>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
M llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
Log Message:
-----------
[msan] Disambiguate "Strict" vs. "Heuristic" when dumping instructions (#188873)
When -msan-dump-strict-instructions and
-msan-dump-heuristic-instructions are simultaneously enabled, it is
unclear from the output whether each instruction is strictly vs.
heuristically handled. [*] This patch fixes the issue by tagging the
output.
The actual instrumentation of the code is unaffected by this change.
[*] A workaround is to compile the code once with only
-msan-dump-strict-instructions, and a second time with
-msan-dump-heuristic-instructions, but this unnecessarily doubles the
compilation time.
Commit: c703ea52be7976e68208585da4edd242c61d5bc5
https://github.com/llvm/llvm-project/commit/c703ea52be7976e68208585da4edd242c61d5bc5
Author: NeKon69 <nobodqwe at gmail.com>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/lib/Headers/hlsl/hlsl_alias_intrinsics.h
M clang/lib/Sema/SemaChecking.cpp
M clang/lib/Sema/SemaHLSL.cpp
A clang/test/CodeGenHLSL/builtins/fma.hlsl
A clang/test/SemaHLSL/BuiltIns/fma-errors.hlsl
M llvm/lib/Target/DirectX/DXIL.td
M llvm/lib/Target/DirectX/DXILShaderFlags.cpp
M llvm/test/CodeGen/DirectX/ShaderFlags/double-extensions.ll
A llvm/test/CodeGen/DirectX/fma.ll
Log Message:
-----------
[HLSL][DirectX][SPIRV] Implement the `fma` API (#185304)
This PR adds `fma` HLSL intrinsic (with support for matrices)
It follows all of the steps from #99117.
Closes #99117.
Commit: 34a4fe5bc9d37eea24908d5dbcede4e2441bdec3
https://github.com/llvm/llvm-project/commit/34a4fe5bc9d37eea24908d5dbcede4e2441bdec3
Author: fineg74 <61437305+fineg74 at users.noreply.github.com>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
M clang/lib/Headers/__clang_spirv_libdevice_declares.h
Log Message:
-----------
[OFFLOAD] Fix a build break (#189076)
This PR fixes a build break reported after introduction of spirv
function declarations
Commit: 88bc265295f609e5ab6f36a0456a08ddb8cae872
https://github.com/llvm/llvm-project/commit/88bc265295f609e5ab6f36a0456a08ddb8cae872
Author: Md Abdullah Shahneous Bari <md.abdullah.shahneous.bari at intel.com>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
M mlir/lib/ExecutionEngine/LevelZeroRuntimeWrappers.cpp
M mlir/lib/Target/LLVM/XeVM/Target.cpp
Log Message:
-----------
[XeVM] Use `ocloc` for binary generation. (#188331)
XeVM currently doesn't support native binary generation. This PR enables
Ahead of Time (AOT) compilation of gpu module to native binary using
`ocloc`.
Currently, only works with LevelZeroRuntimeWrappers.
Commit: a996f2a8db5c19cf9f22de787089cf08772a6391
https://github.com/llvm/llvm-project/commit/a996f2a8db5c19cf9f22de787089cf08772a6391
Author: Kewen Meng <Kewen.Meng at amd.com>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
M llvm/test/CodeGen/AMDGPU/eliminate-frame-index-scalar-bit-ops.mir
R llvm/test/CodeGen/AMDGPU/frame-index-disjoint-s-or-b32.ll
Log Message:
-----------
Revert "AMDGPU: Fold frame indexes into disjoint s_or_b32" (#189074)
Reverts llvm/llvm-project#102345
unblock bot: https://lab.llvm.org/buildbot/#/builders/10/builds/25403
Commit: 509f181f40f86926a0c264b41fab7777be4ff91e
https://github.com/llvm/llvm-project/commit/509f181f40f86926a0c264b41fab7777be4ff91e
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
M flang/test/Transforms/debug-imported-entity.fir
M mlir/test/Dialect/LLVMIR/bytecode.mlir
M mlir/test/Target/LLVMIR/Import/debug-info.ll
M mlir/test/Target/LLVMIR/llvmir-debug.mlir
M mlir/test/lib/Dialect/Test/TestAttrDefs.td
M mlir/test/mlir-tblgen/attr-or-type-format-roundtrip.mlir
M mlir/test/mlir-tblgen/attr-or-type-format.td
M mlir/tools/mlir-tblgen/AttrOrTypeFormatGen.cpp
Log Message:
-----------
[MLIR][TableGen] Fix ArrayRefParameter in struct format roundtrip (#189065)
When an ArrayRefParameter (or OptionalArrayRefParameter) appears in a
non-last position within a struct() assembly format directive, the
printed
output is ambiguous: the comma-separated array elements are
indistinguishable from the struct-level commas separating key-value
pairs.
Fix this by wrapping such parameters in square brackets in both the
generated printer and parser. The printer emits '[' before and ']' after
the array value; the parser calls parseLSquare()/parseRSquare() around
the
FieldParser call. Parameters with a custom printer or parser are
unaffected
(the user controls the format in that case).
Fixes #156623
Assisted-by: Claude Code
Commit: 3c625a179f79f6dc680961e67b4d553337682f17
https://github.com/llvm/llvm-project/commit/3c625a179f79f6dc680961e67b4d553337682f17
Author: Jun Wang <jwang_2024 at outlook.com>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
M llvm/test/MC/AMDGPU/add-sub-no-carry.s
M llvm/test/MC/AMDGPU/dpp64.s
M llvm/test/MC/AMDGPU/ds-gfx9.s
M llvm/test/MC/AMDGPU/flat-scratch-st-mode.s
M llvm/test/MC/AMDGPU/gfx10-constant-bus.s
M llvm/test/MC/AMDGPU/gfx1011_err.s
M llvm/test/MC/AMDGPU/gfx1030_err.s
M llvm/test/MC/AMDGPU/gfx1030_unsupported.s
M llvm/test/MC/AMDGPU/gfx10_flat_instructions_err.s
M llvm/test/MC/AMDGPU/gfx10_unsupported.s
M llvm/test/MC/AMDGPU/gfx11_asm_mimg_err.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop2_fake16_err.s
M llvm/test/MC/AMDGPU/gfx11_unsupported.s
M llvm/test/MC/AMDGPU/gfx1250_asm_sop1.s
M llvm/test/MC/AMDGPU/gfx1250_asm_sopp_err.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vflat.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vimage.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop1_dpp16-fake16.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop1_dpp16.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop1_dpp8-fake16.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop1_dpp8.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop2.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3_dpp16-fake16.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3_dpp16.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3_dpp8-fake16.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3_dpp8.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3_from_vop1_dpp16-fake16.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3_from_vop1_dpp16.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3_from_vop1_dpp8-fake16.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3_from_vop1_dpp8.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3p.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3p_dpp16.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3p_dpp8.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vsample_err.s
M llvm/test/MC/AMDGPU/gfx1250_asm_wmma_w32.s
M llvm/test/MC/AMDGPU/gfx12_unsupported.s
M llvm/test/MC/AMDGPU/gfx7_unsupported.s
M llvm/test/MC/AMDGPU/gfx8_unsupported.s
M llvm/test/MC/AMDGPU/gfx9-asm-err.s
M llvm/test/MC/AMDGPU/gfx90a_err.s
M llvm/test/MC/AMDGPU/gfx942_err.s
M llvm/test/MC/AMDGPU/gfx942_unsupported.s
M llvm/test/MC/AMDGPU/gfx950_asm_features.s
M llvm/test/MC/AMDGPU/gfx950_asm_read_tr.s
M llvm/test/MC/AMDGPU/gfx950_asm_vop1.s
M llvm/test/MC/AMDGPU/gfx950_asm_vop3.s
M llvm/test/MC/AMDGPU/gfx950_err.s
M llvm/test/MC/AMDGPU/gfx9_4_generic_unsupported.s
M llvm/test/MC/AMDGPU/gfx9_unsupported.s
M llvm/test/MC/AMDGPU/literals.s
M llvm/test/MC/AMDGPU/literalv216.s
M llvm/test/MC/AMDGPU/mimg-err-gfx942.s
M llvm/test/MC/AMDGPU/mimg-err.s
M llvm/test/MC/AMDGPU/mubuf-gfx9.s
M llvm/test/MC/AMDGPU/reg-syntax-extra.s
M llvm/test/MC/AMDGPU/vop3-literal.s
M llvm/test/MC/AMDGPU/vopc-vi.s
Log Message:
-----------
[AMDGPU][MC] Improving assembler error message for unsupported instructions (#185778)
The updated error message shows both the instruction name and the GPU
target name.
Commit: 1611a23a5b34c0faf464d5ce605fe2d4a86baaa6
https://github.com/llvm/llvm-project/commit/1611a23a5b34c0faf464d5ce605fe2d4a86baaa6
Author: fineg74 <61437305+fineg74 at users.noreply.github.com>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
M offload/test/api/omp_get_mapped_ptr.c
M offload/test/api/omp_get_num_procs.c
M offload/test/mapping/array_section_implicit_capture.c
M offload/test/mapping/chained_containing_structs_1.cc
M offload/test/mapping/chained_containing_structs_2.cc
M offload/test/mapping/chained_containing_structs_3.cc
M offload/test/mapping/data_member_ref.cpp
M offload/test/mapping/declare_mapper_nested_default_mappers.cpp
M offload/test/mapping/declare_mapper_nested_mappers.cpp
M offload/test/mapping/declare_mapper_target_checks.cpp
M offload/test/mapping/duplicate_mappings_1.cpp
M offload/test/mapping/duplicate_mappings_2.cpp
M offload/test/mapping/implicit_device_ptr.c
M offload/test/mapping/lambda_by_value.cpp
M offload/test/mapping/low_alignment.c
M offload/test/mapping/map_ordering_tgt_alloc_tofrom.c
M offload/test/mapping/map_ordering_tgt_data_alloc_from.c
M offload/test/mapping/map_ordering_tgt_data_alloc_to_from.c
M offload/test/mapping/map_ordering_tgt_data_alloc_tofrom.c
M offload/test/mapping/map_ordering_tgt_exit_data_delete_from.c
M offload/test/mapping/ompx_hold/struct.c
M offload/test/mapping/pr38704.c
M offload/test/mapping/ptr_and_obj_motion.c
M offload/test/mapping/target_data_array_extension_at_exit.c
M offload/test/mapping/target_map_for_member_data.cpp
M offload/test/mapping/use_device_addr/target_use_device_addr.c
M offload/test/offloading/atomic-compare-signedness.c
M offload/test/offloading/back2back_distribute.c
M offload/test/offloading/bug47654.cpp
M offload/test/offloading/bug49021.cpp
M offload/test/offloading/bug50022.cpp
M offload/test/offloading/bug51781.c
M offload/test/offloading/bug51982.c
M offload/test/offloading/bug53727.cpp
M offload/test/offloading/bug64959.c
M offload/test/offloading/extern.c
M offload/test/offloading/generic_multiple_parallel_regions.c
M offload/test/offloading/global_constructor.cpp
M offload/test/offloading/host_as_target.c
M offload/test/offloading/spmdization.c
M offload/test/offloading/static_linking.c
M offload/test/offloading/strided_multiple_update_from.c
M offload/test/offloading/strided_multiple_update_to.c
M offload/test/offloading/strided_partial_update_from.c
M offload/test/offloading/strided_partial_update_to.c
M offload/test/offloading/strided_ptr_multiple_update_from.c
M offload/test/offloading/strided_ptr_multiple_update_to.c
M offload/test/offloading/strided_ptr_partial_update_from.c
M offload/test/offloading/strided_ptr_partial_update_to.c
M offload/test/offloading/strided_update_count_expression.c
M offload/test/offloading/strided_update_from.c
M offload/test/offloading/strided_update_multiple_arrays_count_expression.c
M offload/test/offloading/strided_update_multiple_arrays_variable_stride.c
M offload/test/offloading/strided_update_to.c
M offload/test/offloading/strided_update_variable_count_and_stride.c
M offload/test/offloading/strided_update_variable_stride.c
M offload/test/offloading/strided_update_variable_stride_misc.c
M offload/test/offloading/target-tile.c
M offload/test/offloading/target_constexpr_mapping.cpp
M offload/test/offloading/target_critical_region.cpp
M offload/test/offloading/target_depend_nowait.cpp
M offload/test/offloading/target_nowait_target.cpp
M offload/test/offloading/target_update_from.c
M offload/test/offloading/target_update_ptr_count_expression.c
M offload/test/offloading/target_update_ptr_variable_count_and_stride.c
M offload/test/offloading/target_update_ptr_variable_stride.c
M offload/test/offloading/target_update_strided_struct_count_expression.c
M offload/test/offloading/target_update_strided_struct_from.c
M offload/test/offloading/target_update_strided_struct_multiple_from.c
M offload/test/offloading/target_update_strided_struct_multiple_to.c
M offload/test/offloading/target_update_strided_struct_partial_from.c
M offload/test/offloading/target_update_strided_struct_partial_to.c
M offload/test/offloading/target_update_strided_struct_to.c
M offload/test/offloading/target_update_strided_struct_variable_count_and_stride.c
M offload/test/offloading/target_update_strided_struct_variable_stride.c
M offload/test/offloading/target_update_to.c
M offload/test/offloading/thread_state_1.c
M offload/test/offloading/thread_state_2.c
M offload/test/sanitizer/kernel_crash.c
M offload/test/sanitizer/kernel_crash_async.c
M offload/test/sanitizer/kernel_crash_many.c
M offload/test/sanitizer/kernel_trap.c
M offload/test/sanitizer/kernel_trap.cpp
M offload/test/sanitizer/kernel_trap_async.c
M offload/test/sanitizer/kernel_trap_many.c
M offload/test/unified_shared_memory/associate_ptr.c
M offload/test/unified_shared_memory/close_member.c
M openmp/device/src/Synchronization.cpp
Log Message:
-----------
[OFFLOAD] Add spirv implementation for named barrier (#180393)
This change adds implementation for named barriers for SPIRV backend.
Since there is no built in API/intrinsics for named barrier in SPIRV,
the implementation loosely follows implementation for AMD
Commit: ba44df4b88a8e6f6e8adb6aab7c2181b148cd4f3
https://github.com/llvm/llvm-project/commit/ba44df4b88a8e6f6e8adb6aab7c2181b148cd4f3
Author: Aditya Goyal <107386933+goyaladitya05 at users.noreply.github.com>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
M clang/tools/clang-format/git-clang-format
Log Message:
-----------
[clang-format] Add pre-commit CI env var support to git-clang-format (#188816)
When git-clang-format is invoked with no explicit commit arguments and
both PRE_COMMIT_FROM_REF and PRE_COMMIT_TO_REF are set, the script
automatically uses those refs as the diff range and implies --diff. If
the variables are absent, existing behavior is fully preserved.
This allows projects to use `git-clang-format` directly inside CI
pipelines via the [pre-commit](https://pre-commit.com/) framework
without any wrapper scripts or extra configuration.
Closes: #188813
No existing lit test suite for this script. Verified manually that env
vars activate two-commit diff mode, existing behavior is preserved
without them, and explicit CLI args always override them.
Commit: df6d6c9cd14113637cae8d4f51f9a05a09e7dd50
https://github.com/llvm/llvm-project/commit/df6d6c9cd14113637cae8d4f51f9a05a09e7dd50
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
M compiler-rt/lib/scudo/standalone/tests/combined_test.cpp
Log Message:
-----------
[Scudo] Disable ScudoCombinedTests.NewType (#189070)
This is failing in some configurations on AArch64 Linux. Given there are
a lot of follow-up commits that makes this hard to revert, just disable
it for now pending future investigation.
Commit: 871d675c52ca4e2fad51aa90dd065d4f12229f06
https://github.com/llvm/llvm-project/commit/871d675c52ca4e2fad51aa90dd065d4f12229f06
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
M compiler-rt/lib/profile/CMakeLists.txt
Log Message:
-----------
[compiler-rt] Add PTX feature specifically when CUDA is not available (#189083)
Summary:
People need to be able to build this without a CUDA installation.
Long term we should bump up the minimum version as I'm pretty sure every
architecture before this has been deprecated by NVIDIA.
Commit: 28f24b5029aae68a0936ce2f8bfddbf19ffd1bbe
https://github.com/llvm/llvm-project/commit/28f24b5029aae68a0936ce2f8bfddbf19ffd1bbe
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
M llvm/test/CodeGen/AMDGPU/fract-match.ll
Log Message:
-----------
AMDGPU: Add baseline tests for more fract patterns (#189092)
Commit: 502b5e0bea1282006b7ba74b7e4c2df3eea4dd12
https://github.com/llvm/llvm-project/commit/502b5e0bea1282006b7ba74b7e4c2df3eea4dd12
Author: Kazu Hirata <kazu at google.com>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
M llvm/lib/Transforms/Instrumentation/MemProfUse.cpp
A llvm/test/Transforms/PGOProfile/memprof-inline-call-stacks.ll
Log Message:
-----------
[MemProf] Dump inline call stacks as optimization remarks (#188678)
This patch teaches the MemProf matching pass to dump inline call
stacks as analysis remarks like so:
frame: 704e4117e6a62739 main:10:5
frame: 273929e54b9f1234 foo:2:12
inline call stack: 704e4117e6a62739,273929e54b9f1234
The output consists of two types of remarks:
- "frame": Acts as a dictionary mapping a unique MD5-based FrameID
to source information (function name, line offset, and column).
- "inline call stack": Provides the full call stack for a call site
as a sequence of FrameIDs.
Both types of remarks are deduplicated to reduce the output size.
This patch is intended to be a debugging aid.
Commit: 560b8c9afd76910dda48c59d8788de91cd1810a1
https://github.com/llvm/llvm-project/commit/560b8c9afd76910dda48c59d8788de91cd1810a1
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
M .ci/premerge_advisor_explain.py
Log Message:
-----------
[CI] Make AArch64 Premerge Job Fail on Errors (#188801)
Right now we report the errors, but the job does not actually fail. This
patch fixes that.
Commit: a9f5f93440a39e97514ee8f5b4de2a37a3a3c35f
https://github.com/llvm/llvm-project/commit/a9f5f93440a39e97514ee8f5b4de2a37a3a3c35f
Author: Jeffrey Byrnes <jeffrey.byrnes at amd.com>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUCoExecSchedStrategy.cpp
M llvm/lib/Target/AMDGPU/AMDGPUCoExecSchedStrategy.h
M llvm/test/CodeGen/AMDGPU/coexec-sched-effective-stall.mir
A llvm/test/CodeGen/AMDGPU/coexec-scheduler.ll
Log Message:
-----------
[AMDGPU] Add HWUI pressure heuristics to coexec strategy (#184929)
Adds basic support for new heuristics for the CoExecSchedStrategy.
InstructionFlavor provides a way to map instructions to different
"Flavors". These "Flavors" all have special scheduling considerations --
either they map to different HarwareUnits, or have unique scheduling
properties like fences.
HardwareUnitInfo provides a way to track and analyze the usage of some
hardware resource across the current scheduling region.
CandidateHeuristics holds the state for new heuristics, as well as the
implementations.
In addition, this adds new heuristics to use the various support pieces
listed above. tryCriticalResource attempts to schedule instructions that
use the most demanded HardwareUnit. If no such instructions are ready to
be scheduled, tryCriticalResourceDependency attempts to schedule
instructions which enable instructions that use demanded HardwareUnits.
We are incrementally adding the new heuristics. While in the process of
this, the state of tryCandidateCoexec may not be great - as is the case
after this PR.
Commit: eb2ff7101373c2a2f03320ac11b13740b978a6fc
https://github.com/llvm/llvm-project/commit/eb2ff7101373c2a2f03320ac11b13740b978a6fc
Author: Walter Lee <49250218+googlewalt at users.noreply.github.com>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
M llvm/lib/Analysis/DependenceAnalysis.cpp
Log Message:
-----------
[DA] Mark variable only used in assert as maybe_unused (#189100)
Fix 00aebbff71ff4e348538708064ba2e033ccd6b2a.
Commit: ce1b12ee08133a983050e88c3c0303df973f3276
https://github.com/llvm/llvm-project/commit/ce1b12ee08133a983050e88c3c0303df973f3276
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
M lldb/source/Core/SearchFilter.cpp
A lldb/test/Shell/Breakpoint/Inputs/main.c
A lldb/test/Shell/Breakpoint/source-regex-missing-source.test
Log Message:
-----------
[lldb] Iterate over a copy of the ModuleList in SearchFilter (#189009)
Avoid a potential deadlock caused by the search filter callback
acquiring the target's module lock by iterating over a copy of the list.
Fixes #188766
Commit: 1c3018b3d6bf4c88406a39871abdd5933066028a
https://github.com/llvm/llvm-project/commit/1c3018b3d6bf4c88406a39871abdd5933066028a
Author: Jeffrey Byrnes <jeffrey.byrnes at amd.com>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUCoExecSchedStrategy.cpp
M llvm/lib/Target/AMDGPU/AMDGPUCoExecSchedStrategy.h
M llvm/test/CodeGen/AMDGPU/coexec-sched-effective-stall.mir
R llvm/test/CodeGen/AMDGPU/coexec-scheduler.ll
Log Message:
-----------
Revert "[AMDGPU] Add HWUI pressure heuristics to coexec strategy" (#189107)
Seems to be triggering some issues with the buildbots
https://lab.llvm.org/buildbot/#/builders/159/builds/44122
Unused variable + bad debug build.
Commit: 8b395a7755fd75699da6e4a17d43e849ad08084b
https://github.com/llvm/llvm-project/commit/8b395a7755fd75699da6e4a17d43e849ad08084b
Author: Justin Stitt <justinstitt at google.com>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
M clang/lib/CodeGen/CGExprScalar.cpp
M clang/test/CodeGen/overflow-behavior-types.c
Log Message:
-----------
[Clang] Ensure pattern exclusion priority over OBT (#188390)
Make sure pattern exclusions have priority over the overflow behavior types when deciding whether or not to emit truncation checks.
Accomplish this by carrying an extra field through `ScalarConversionOpts` which we later check before emitting instrumentation.
Commit: f9ad232421e37e4168f6937abdd0a1665a590f12
https://github.com/llvm/llvm-project/commit/f9ad232421e37e4168f6937abdd0a1665a590f12
Author: Justin Stitt <justinstitt at google.com>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/AttrDocs.td
M clang/include/clang/Basic/CodeGenOptions.def
M clang/include/clang/Basic/DiagnosticFrontendKinds.td
M clang/include/clang/Options/Options.td
M clang/lib/CodeGen/CGCall.cpp
M clang/lib/CodeGen/CodeGenAction.cpp
M clang/lib/Driver/ToolChains/Clang.cpp
A clang/test/Frontend/backend-attribute-inlining-cross-tu.c
A clang/test/Frontend/backend-attribute-inlining-debug-vs-heuristic.cpp
A clang/test/Frontend/backend-attribute-inlining-modes.c
A clang/test/Frontend/backend-attribute-inlining.c
M llvm/include/llvm/IR/DiagnosticInfo.h
M llvm/lib/IR/DiagnosticInfo.cpp
M llvm/lib/Transforms/Utils/InlineFunction.cpp
Log Message:
-----------
[Clang] Show inlining hints for __attribute__((warning/error)) (#174892)
When functions marked with `[[gnu::warning/error]]` are called through inlined functions, we now show the inlining chain that led to the call when ``-fdiagnostics-show-inlining-chain`` is enabled.
With this flag, two modes are possible:
- **heuristic** mode: Uses `srcloc` and `inlined.from` metadata to reconstruct the inlining chain. Functions that are `inline`, `static`, `always_inline`, or in anonymous namespaces get `srcloc` metadata attached. This mode emits a note suggesting `-gline-directives-only` for more accurate locations.
- **debug** mode: Automatically used instead of heuristic when building with at least `-gline-directives-only` (implied by `-g1` or higher). Leverages `DILocation` debug info for reliable source locations.
Fixes: https://github.com/ClangBuiltLinux/linux/issues/1571
Commit: 26af10f837ad5cac26331a07f15e55fea9270583
https://github.com/llvm/llvm-project/commit/26af10f837ad5cac26331a07f15e55fea9270583
Author: Sergei Barannikov <barannikov88 at gmail.com>
Date: 2026-03-28 (Sat, 28 Mar 2026)
Changed paths:
M lldb/source/API/SBAddress.cpp
M lldb/source/Breakpoint/BreakpointResolverName.cpp
M lldb/source/Core/Address.cpp
M lldb/source/Plugins/Architecture/PPC64/ArchitecturePPC64.cpp
M lldb/source/Plugins/DynamicLoader/POSIX-DYLD/DYLDRendezvous.cpp
M lldb/source/Target/RegisterContextUnwind.cpp
M lldb/source/Target/StackFrame.cpp
M lldb/unittests/ObjectFile/ELF/TestObjectFileELF.cpp
Log Message:
-----------
[lldb] Use Address::Slide() to simplify code (NFC) (#189097)
Commit: eea4af4c295d5f84fdcedc720f1826f0cb653262
https://github.com/llvm/llvm-project/commit/eea4af4c295d5f84fdcedc720f1826f0cb653262
Author: Sergei Barannikov <barannikov88 at gmail.com>
Date: 2026-03-28 (Sat, 28 Mar 2026)
Changed paths:
M lldb/include/lldb/Core/Address.h
M lldb/source/API/SBAddress.cpp
M lldb/source/Core/Section.cpp
M lldb/source/Plugins/ObjectFile/Mach-O/ObjectFileMachO.cpp
M lldb/unittests/Symbol/SymbolTest.cpp
Log Message:
-----------
[lldb] Use Address(section, offset) constructor in more places (NFC) (#189101)
After this change, Address::SetSection() had only one use left (in a
unit test) and was removed. Address::ClearSection() had no uses, now
also removed. (It is unlikely that someone needs to change the section
without simultaneously changing the section offset, and for that we have
a constructor.)
Commit: 0f8192373565a8fc660d48b767959590865a3f94
https://github.com/llvm/llvm-project/commit/0f8192373565a8fc660d48b767959590865a3f94
Author: Pau Sum <pau at sumpau.com>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenBuilder.h
M clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp
M clang/test/CodeGen/AArch64/neon-intrinsics.c
M clang/test/CodeGen/AArch64/neon/intrinsics.c
Log Message:
-----------
[CIR][AArch64] Upstream vmull_*/vmull_high_* and vmul_p8/vmul_high_p8 Neon builtins (#188371)
Add CIR generation for AArch64 NEON builtins `vmull_*` and
`vmull_high_*`
The accompanying tests from
[AArch64/neon-instrinsics](https://github.com/llvm/llvm-project/blob/main/clang/test/CodeGen/AArch64/neon-intrinsics.c)
were integrated with new checks for CIR codegen.
Part of #185382
Commit: e825f424270adfb42767d8cb452da61b7ebd9e31
https://github.com/llvm/llvm-project/commit/e825f424270adfb42767d8cb452da61b7ebd9e31
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fsqrt.mir
M llvm/test/CodeGen/AMDGPU/fsqrt.f64.ll
M llvm/test/CodeGen/AMDGPU/rsq.f64.ll
Log Message:
-----------
AMDGPU: Improve fsqrt f64 expansion with ninf (#183695)
Commit: 01768d3b95cb9c13dc2c531c7d66d68087518576
https://github.com/llvm/llvm-project/commit/01768d3b95cb9c13dc2c531c7d66d68087518576
Author: Sergei Barannikov <barannikov88 at gmail.com>
Date: 2026-03-28 (Sat, 28 Mar 2026)
Changed paths:
M lldb/source/Target/BorrowedStackFrame.cpp
Log Message:
-----------
[lldb] Fix the order of arguments in the StackFrame constructor call (#189108)
`pc` and `cfa` arguments were swapped.
Commit: 563d3f6865080037fe1c9be27c44b07512de735f
https://github.com/llvm/llvm-project/commit/563d3f6865080037fe1c9be27c44b07512de735f
Author: fineg74 <61437305+fineg74 at users.noreply.github.com>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
M offload/test/mapping/data_member_ref.cpp
M offload/test/offloading/bug50022.cpp
M offload/test/offloading/info.c
M offload/test/offloading/strided_offset_multidim_update.c
M offload/test/offloading/strided_partial_update_to.c
M offload/test/offloading/strided_update_count_expression.c
M offload/test/offloading/strided_update_to.c
M offload/test/offloading/target_depend_nowait.cpp
M offload/test/offloading/target_nowait_target.cpp
M offload/test/offloading/target_update_ptr_count_expression.c
M offload/test/offloading/target_update_to.c
M offload/test/unified_shared_memory/close_member.c
Log Message:
-----------
[OFFLOAD] Disable tests that may cause hangs in CI (#189116)
Commit: 0aba82eb70aafde426c1ebdd773b058920e3cd67
https://github.com/llvm/llvm-project/commit/0aba82eb70aafde426c1ebdd773b058920e3cd67
Author: Jeff Bailey <jbailey at raspberryginger.com>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
M libc/include/CMakeLists.txt
A libc/include/cpio.yaml
Log Message:
-----------
[libc] Add missing POSIX macros to cpio.h (#188840)
Define the POSIX cpio.h header and its standard macros in the libc build
system. Configure the macros directly in the YAML specification to allow
automated header generation without a custom definition template.
Commit: d6ff5e77781dfe9623e9eff10907dc45fab8ba3f
https://github.com/llvm/llvm-project/commit/d6ff5e77781dfe9623e9eff10907dc45fab8ba3f
Author: Jeff Bailey <jbailey at raspberryginger.com>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
M libc/utils/docgen/header.py
Log Message:
-----------
[libc][docs] Parse inline macro_value from YAML in docgen (#189118)
The docgen script was previously hardcoded to assume all implemented
macros must be placed in a *-macros.h header. This updates docgen to
read inline macro_value properties directly from the source YAML files,
correctly recognizing them as implemented.
Commit: 044876423b8d06a9c1f5d562a2e0caa5cfea2be8
https://github.com/llvm/llvm-project/commit/044876423b8d06a9c1f5d562a2e0caa5cfea2be8
Author: Cristian Assaiante <cristianassaiante at outlook.com>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
M llvm/include/llvm/IR/ProfDataUtils.h
A llvm/test/Transforms/SimplifyCFG/branch-weight-disjunction-overflow.ll
Log Message:
-----------
[ProfInfo] Fix integer overflow in getDisjunctionWeights (#189079)
This PR fixes an integer overflow in
[`getDisjunctionWeights`](https://github.com/llvm/llvm-project/blob/main/llvm/include/llvm/IR/ProfDataUtils.h#L241)
and adds a regression test to cover the failing case. Casting branch
weights before the computations solved the issue.
Issue https://github.com/llvm/llvm-project/issues/189021
Commit: a2d84b5d8d9c3ae3a07c4f47cd1b6b8f64be1b41
https://github.com/llvm/llvm-project/commit/a2d84b5d8d9c3ae3a07c4f47cd1b6b8f64be1b41
Author: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
M clang/lib/CodeGen/TargetBuiltins/AMDGPU.cpp
M clang/lib/Sema/SemaAMDGPU.cpp
M clang/test/CodeGenHIP/builtins-amdgcn-gfx1250-wmma-f16.hip
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx1250-wmma-w32.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx1250-wmma-w32-param.cl
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/lib/IR/AutoUpgrade.cpp
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/intrinsics.ll
M llvm/test/Bitcode/amdgpu-wmma-drop-ab-mods-upgrade.ll
M llvm/test/CodeGen/AMDGPU/insert-delay-alu-wmma-xdl.mir
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wmma.gfx1250.w32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wmma.imm.gfx1250.w32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wmma.imod.gfx1250.w32.ll
M llvm/test/CodeGen/AMDGPU/waitcnt-loop-opt.mir
M llvm/test/CodeGen/AMDGPU/wmma-hazards-gfx1250-w32.mir
M mlir/include/mlir/Dialect/LLVMIR/ROCDLOps.td
M mlir/test/Target/LLVMIR/rocdl.mlir
Log Message:
-----------
[AMDGPU] Remove neg support from 4 more gfx1250 WMMA (#189115)
These are previously covered by AMDGPUWmmaIntrinsicModsAllReuse.
Commit: efba01ae12703f1c6d6283a392ba852ac06a4f90
https://github.com/llvm/llvm-project/commit/efba01ae12703f1c6d6283a392ba852ac06a4f90
Author: Luke Wren <wren6991 at gmail.com>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
M compiler-rt/lib/builtins/cpu_model/riscv.c
M llvm/lib/Target/RISCV/RISCVFeatures.td
Log Message:
-----------
[RISCV] Allocate feature bits for Zifencei and Zmmul (#143306)
As proposed in
https://github.com/riscv-non-isa/riscv-c-api-doc/pull/110.
No real compiler-rt implementation as Linux does not list these
extensions in hwprobe.
Signed-off-by: Luke Wren <wren6991 at gmail.com>
Commit: 1128d7443852fe6c114ad542537dd62b1428fd43
https://github.com/llvm/llvm-project/commit/1128d7443852fe6c114ad542537dd62b1428fd43
Author: Ilija Tovilo <ilija.tovilo at me.com>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
M lld/docs/ELF/linker_script.rst
Log Message:
-----------
[LLD][skip ci] Fix typo in linker_script.rst (#148867)
Commit: 89ae675f590101ef2cbff7ee5e8c1005597bac08
https://github.com/llvm/llvm-project/commit/89ae675f590101ef2cbff7ee5e8c1005597bac08
Author: Farzon Lotfi <farzonlotfi at microsoft.com>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVLegalizePointerCast.cpp
A llvm/test/CodeGen/SPIRV/pointers/store-array-of-vectors-to-vector.ll
Log Message:
-----------
[SPIRV][Matrix] Legalize store of matrix to array of vector memory layout (#188139)
fixes #188131
This change address stylistic changes @bogners requested in
https://github.com/llvm/llvm-project/pull/186215/ It also adds the
`storeMatrixArrayFromVector`. to
SPIRVLegalizePointerCast.cpp when we detect the matrix array of vector
memory layout
Changes to storeArrayFromVector were cleanup
Assisted-by Github Copilot for test case check lines
Commit: 7be9972cb2b11bdf70459459cb7f5dcdb0839ea7
https://github.com/llvm/llvm-project/commit/7be9972cb2b11bdf70459459cb7f5dcdb0839ea7
Author: Wenju He <wenju.he at intel.com>
Date: 2026-03-28 (Sat, 28 Mar 2026)
Changed paths:
M libclc/CMakeLists.txt
M libclc/cmake/modules/AddLibclc.cmake
M llvm/runtimes/CMakeLists.txt
Log Message:
-----------
[libclc] Fix llvm-spirv dependency when llvm-spirv is built in-tree (#188896)
When SPIRV-LLVM-Translator is built in-tree (i.e., placed in
llvm/projects folder), llvm-spirv target exists.
Drop legacy llvm-spirv_target dependency (was for non-runtime build) and
add llvm-spirv to runtimes dependencies.
Commit: ae63230c23151c16ba68d5213da8bd5459c03a40
https://github.com/llvm/llvm-project/commit/ae63230c23151c16ba68d5213da8bd5459c03a40
Author: Alexey Samsonov <vonosmas at gmail.com>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
R libc/include/endian.h.def
M libc/include/endian.yaml
R libc/include/features.h.def
M libc/include/features.yaml
R libc/include/float.h.def
M libc/include/float.yaml
R libc/include/stdckdint.h.def
M libc/include/stdckdint.yaml
R libc/include/stdint.h.def
M libc/include/stdint.yaml
R libc/include/sys/auxv.h.def
M libc/include/sys/auxv.yaml
R libc/include/sys/epoll.h.def
M libc/include/sys/epoll.yaml
R libc/include/sys/ioctl.h.def
M libc/include/sys/ioctl.yaml
R libc/include/sys/mman.h.def
M libc/include/sys/mman.yaml
R libc/include/sys/random.h.def
M libc/include/sys/random.yaml
R libc/include/sys/resource.h.def
M libc/include/sys/resource.yaml
R libc/include/sys/select.h.def
M libc/include/sys/select.yaml
R libc/include/sys/socket.h.def
M libc/include/sys/socket.yaml
R libc/include/sys/stat.h.def
M libc/include/sys/stat.yaml
R libc/include/sys/time.h.def
M libc/include/sys/time.yaml
R libc/include/sys/types.h.def
R libc/include/sys/wait.h.def
M libc/include/sys/wait.yaml
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[libc] Remove more header template files (#189066)
Get rid of several .h.def files which were used to ensure that the
macro definitions from llvm-libc-macro would be included in the public
header. Replace this logic with YAML instead - add entries to the
"macros" list that point to the correct "macro_header" to ensure it
would be included.
For C standard library headers, list several standard-define macros
to document their availability. For POSIX/Linux headers, only reference
a handful of macro, since more planning is needed to decide how to
represent platform-specific macro in YAML.
Commit: 15bc5b0267ad4b8206b108ecd596a842020b9ba9
https://github.com/llvm/llvm-project/commit/15bc5b0267ad4b8206b108ecd596a842020b9ba9
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-03-28 (Sat, 28 Mar 2026)
Changed paths:
M libclc/clc/lib/generic/math/clc_fract.inc
Log Message:
-----------
libclc: Simplify fract implementation (#189080)
Commit: a5fa4dba6e2e01c4e8c4571301048c392facaed5
https://github.com/llvm/llvm-project/commit/a5fa4dba6e2e01c4e8c4571301048c392facaed5
Author: PiJoules <leonardchan at google.com>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
M compiler-rt/lib/asan/asan_allocator.cpp
M compiler-rt/lib/asan/asan_allocator.h
M compiler-rt/lib/asan/asan_malloc_linux.cpp
M compiler-rt/lib/hwasan/hwasan_allocation_functions.cpp
M compiler-rt/test/sanitizer_common/TestCases/Linux/free_aligned_sized.c
M compiler-rt/test/sanitizer_common/TestCases/Linux/free_sized.c
Log Message:
-----------
[compiler-rt] Add interceptors for free_[aligned_]sized for asan+hwasan (#189109)
Commit: c4847d250bf958eaa7415fa7d480d17f8132719b
https://github.com/llvm/llvm-project/commit/c4847d250bf958eaa7415fa7d480d17f8132719b
Author: Roland McGrath <mcgrathr at google.com>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
M clang/cmake/caches/Fuchsia-stage2.cmake
Log Message:
-----------
[Fuchsia] Set LIBCXX_ABI_UNSTABLE instead of LIBCXX_ABI_VERSION (#189123)
Use the generic switch rather than encoding the version number it
currently corresponds to.
Commit: 1264ffc4cc17ba8aac19624d478874c2f6bd10d8
https://github.com/llvm/llvm-project/commit/1264ffc4cc17ba8aac19624d478874c2f6bd10d8
Author: Kamran Yousafzai <yousafzai.mkamran at gmail.com>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
M clang/lib/CodeGen/Targets/RISCV.cpp
A clang/test/CodeGen/RISCV/riscv-fpcc-struct.c
M clang/test/CodeGen/RISCV/riscv64-abi.c
Log Message:
-----------
[clang][RISC-V] fixed fp calling convention for fpcc eligible structs for risc-v (#110690)
The code generated for calls with FPCC eligible structs as arguments
doesn't consider the bitfield, which results in a store crossing the
boundary of the memory allocated using alloca, e.g.
For the code:
```
struct __attribute__((packed, aligned(1))) S {
const float f0;
unsigned f1 : 1;
};
unsigned func(struct S arg)
{
return arg.f1;
}
```
The generated IR is:
```
define dso_local signext i32 @func(
float [[TMP0:%.*]], i32 [[TMP1:%.*]]) #[[ATTR0:[0-9]+]] {
[[ENTRY:.*:]]
[[ARG:%.*]] = alloca [[STRUCT_S:%.*]], align 1
[[TMP2:%.*]] = getelementptr inbounds nuw { float, i32 }, ptr [[ARG]], i32 0, i32 0
store float [[TMP0]], ptr [[TMP2]], align 1
[[TMP3:%.*]] = getelementptr inbounds nuw { float, i32 }, ptr [[ARG]], i32 0, i32 1
store i32 [[TMP1]], ptr [[TMP3]], align 1
[[F1:%.*]] = getelementptr inbounds nuw [[STRUCT_S]], ptr [[ARG]], i32 0, i32 1
[[BF_LOAD:%.*]] = load i8, ptr [[F1]], align 1
[[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], 1
[[BF_CAST:%.*]] = zext i8 [[BF_CLEAR]] to i32
ret i32 [[BF_CAST]]
```
Where, `store i32 [[TMP1]], ptr [[TMP3]], align 1` can be seen crossing
the boundary of the allocated memory. If, the IR is seen after
optimizations (EarlyCSEPass), the IR left is:
```
define dso_local noundef signext i32 @func(
float [[TMP0:%.*]], i32 [[TMP1:%.*]]) local_unnamed_addr #[[ATTR0:[0-9]+]] {
[[ENTRY:.*:]]
ret i32 0
```
The patch trims the second member of the struct after taking into
consideration the bitwidth to decide the appropriate integer type and
the test shows the results of this patch.
Note that the bug is seen only when `f` extension is enabled for FPCC
eligibility.
Co-authored-by: muhammad.kamran4 <muhammad.kamran at esperantotech.com>
Commit: 9be0cc173db5c524adbfca4cd99d9a6ed3d8996c
https://github.com/llvm/llvm-project/commit/9be0cc173db5c524adbfca4cd99d9a6ed3d8996c
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/test/CodeGen/AMDGPU/fsqrt.f64.ll
M llvm/test/CodeGen/AMDGPU/rsq.f64.ll
Log Message:
-----------
AMDGPU: Skip last corrections and scaling for afn llvm.sqrt.f64 (#183697)
Device libs has a fast sqrt macro implemented this way.
Commit: 5bb4eea8dd7cd6c32600e3a0f1fb7b0ca6b268f8
https://github.com/llvm/llvm-project/commit/5bb4eea8dd7cd6c32600e3a0f1fb7b0ca6b268f8
Author: Brian Cain <brian.cain at oss.qualcomm.com>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
A llvm/test/CodeGen/Hexagon/asm-operand-modifiers.ll
A llvm/test/CodeGen/Hexagon/asm-printer-cpool.ll
A llvm/test/CodeGen/Hexagon/constext-store-imm.ll
A llvm/test/CodeGen/Hexagon/reg-info-types.ll
A llvm/test/CodeGen/Hexagon/split-double-volatile.ll
A llvm/test/CodeGen/Hexagon/target-objfile-sdata.ll
Log Message:
-----------
[Hexagon] Add coverage tests for AsmPrinter and misc CodeGen (#183953)
Add tests targeting assembly printing and miscellaneous CodeGen areas
with low coverage:
- asm-printer-cpool.ll: HexagonAsmPrinter exercising constant pool entry
emission.
- asm-operand-modifiers.ll: Inline asm operand modifier printing paths
(lo/hi/mem).
- target-objfile-sdata.ll, split-double-volatile.ll, reg-info-types.ll:
Miscellaneous CodeGen coverage for HexagonTargetObjectFile small data
classification, HexagonSplitDouble volatile load handling, and
HexagonRegisterInfo register class queries.
- constext-store-imm.ll: HexagonConstExtenders store-immediate
optimization paths.
Commit: bc12c38af9c160b65e36523a1b2e390fdb1c3625
https://github.com/llvm/llvm-project/commit/bc12c38af9c160b65e36523a1b2e390fdb1c3625
Author: Henrik G. Olsson <hnrklssn at gmail.com>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
M clang/lib/AST/ExprCXX.cpp
M clang/lib/AST/ItaniumMangle.cpp
M clang/lib/Analysis/CFG.cpp
M clang/lib/Analysis/LifetimeSafety/FactsGenerator.cpp
M clang/lib/Analysis/LiveVariables.cpp
M clang/lib/Analysis/UnsafeBufferUsage.cpp
M clang/lib/CodeGen/CGDebugInfo.cpp
M clang/lib/Frontend/InterfaceStubFunctionsConsumer.cpp
M clang/lib/Interpreter/InterpreterUtils.cpp
M clang/lib/Sema/Sema.cpp
M clang/lib/Sema/SemaDeclCXX.cpp
M clang/lib/Sema/SemaExpr.cpp
M clang/lib/Sema/SemaFunctionEffects.cpp
M clang/lib/Sema/SemaOpenACC.cpp
M clang/tools/driver/cc1gen_reproducer_main.cpp
Log Message:
-----------
[Clang] remove redundant uses of dyn_cast (NFC) (#189106)
This removes dyn_cast invocations where the argument is already of the
target type (including through subtyping). This was created by adding a
static assert in dyn_cast and letting an LLM iterate until the code base
compiled. I then went through each example and cleaned it up. This does
not commit the static assert in dyn_cast, because it would prevent a lot
of uses in templated code. To prevent backsliding we should instead add
an LLVM aware version of
https://clang.llvm.org/extra/clang-tidy/checks/readability/redundant-casting.html
(or expand the existing one).
Commit: c6fa976d5ba060b8d43a404ef4775f1f402a5131
https://github.com/llvm/llvm-project/commit/c6fa976d5ba060b8d43a404ef4775f1f402a5131
Author: Ruiling, Song <ruiling.song at amd.com>
Date: 2026-03-28 (Sat, 28 Mar 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUPromoteAlloca.cpp
M llvm/test/CodeGen/AMDGPU/promote-alloca-proper-value-replacement.ll
Log Message:
-----------
AMDGPU: Make VarIndex WeakTrackingVH in AMDGPUPromoteAlloca (#188921)
The test used to look all good, but actually not. The WeakVH just make
itself null after the pointed value being replaced. So a zero value was
used because VarIndex become null. The test checks looks all good.
Actually only the WeakTrackingVH have the ability to be updated to new
value.
Change the test slightly to make that using zero index is wrong.
Commit: 8e59c3a816d3281e00582ee553f8fdfdfa52ea39
https://github.com/llvm/llvm-project/commit/8e59c3a816d3281e00582ee553f8fdfdfa52ea39
Author: Md Abdullah Shahneous Bari <md.abdullah.shahneous.bari at intel.com>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
M mlir/lib/Conversion/XeVMToLLVM/XeVMToLLVM.cpp
Log Message:
-----------
[XeVM] Fix the cache-control metadata string generation. (#187591)
Previously, it generated extra `single` quote marks around the outer
braces (i.e., `'{'` `6442:\220,1\22` `'}'`). SPIR-V backend does not
expect that. It expects `{6442:\220,1\22}`.
Commit: 7f48ead4e64ecb54a481fe9e11e39b5dab30a19d
https://github.com/llvm/llvm-project/commit/7f48ead4e64ecb54a481fe9e11e39b5dab30a19d
Author: Yaxun (Sam) Liu <yaxun.liu at amd.com>
Date: 2026-03-27 (Fri, 27 Mar 2026)
Changed paths:
M clang/lib/Driver/Driver.cpp
M clang/test/Driver/hip-phases.hip
Log Message:
-----------
[Driver][HIP] Fix bundled -S emitting bitcode instead of assembly for device (#189140)
[Driver][HIP] Fix bundled -S emitting bitcode instead of assembly for
device
PR #188262 added support for bundling HIP -S output under the new
offload driver, but the device backend still entered the
bitcode-emitting path in ConstructPhaseAction. The condition at the
Backend phase checked for the new offload driver and directed device
code to emit TY_LLVM_BC, without excluding the -S case. This caused
the device section in the bundled .s to contain LLVM bitcode instead
of textual AMDGPU assembly.
This broke the HIP UT CheckCodeObjAttr test which greps
copyKernel.s for "uniform_work_group_size" — a string that only
appears in textual assembly, not in bitcode.
Fix by excluding -S (without -emit-llvm) from the new-driver
bitcode path, so the device backend falls through to emit TY_PP_Asm
(textual assembly). Also add a missing lit test check that the
device backend produces assembler output for the bundled -S case.
Fixes: LCOMPILER-553
Commit: fb094491ac04ef57ffbf0a212d7056e23332b1c7
https://github.com/llvm/llvm-project/commit/fb094491ac04ef57ffbf0a212d7056e23332b1c7
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-03-28 (Sat, 28 Mar 2026)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ByteCode/EvalEmitter.cpp
M clang/lib/AST/ByteCode/Program.cpp
M clang/lib/AST/ByteCode/Program.h
M clang/test/CodeGenCXX/reference-temporary-subobject.cpp
M clang/test/CodeGenCXX/static-local-in-local-class.cpp
Log Message:
-----------
[clang][bytecode] Skip rvalue subobject adjustments for global temporaries (#189044)
We only did this for local variables but were were missing it for
globals.
Commit: cb8b65e3206ee9c054500d3852f9e972b62179bc
https://github.com/llvm/llvm-project/commit/cb8b65e3206ee9c054500d3852f9e972b62179bc
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-03-28 (Sat, 28 Mar 2026)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ByteCode/Compiler.h
M clang/test/CodeGenObjC/no-nsconstant-literals.m
M clang/test/CodeGenObjC/objc2-constant-collection-literals.m
Log Message:
-----------
[clang][bytecode] Add support for objc array- and dictionary literals (#189058)
Commit: 097abb3d645851e8148a05e6ead3ed4c361a7ca1
https://github.com/llvm/llvm-project/commit/097abb3d645851e8148a05e6ead3ed4c361a7ca1
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-03-28 (Sat, 28 Mar 2026)
Changed paths:
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
M clang/test/AST/ByteCode/builtins.c
Log Message:
-----------
[clang][bytecode] Handle strcmp() not pointing to primitive arrays (#188917)
Commit: eb53972051f175224569ebc28e8dafbf73930b4d
https://github.com/llvm/llvm-project/commit/eb53972051f175224569ebc28e8dafbf73930b4d
Author: lonely eagle <2020382038 at qq.com>
Date: 2026-03-28 (Sat, 28 Mar 2026)
Changed paths:
M mlir/include/mlir/Dialect/ControlFlow/IR/ControlFlowOps.td
M mlir/include/mlir/Interfaces/ControlFlowInterfaces.td
M mlir/include/mlir/Reducer/ReductionNode.h
M mlir/lib/Dialect/ControlFlow/IR/ControlFlowOps.cpp
M mlir/lib/Reducer/ReductionNode.cpp
M mlir/lib/Reducer/ReductionTreePass.cpp
M mlir/test/mlir-reduce/reduction-tree.mlir
Log Message:
-----------
[mlir][reducer] Add eraseRedundantBlocksInRegion and getSuccessorForwardOperands API to BranchOpInterface (#187864)
To simplify the output of the reduction-tree pass, this PR introduces
the eraseRedundantBlocksInRegion. For regions containing multiple
execution paths, this functionality selects the shortest 'interesting'
path. Additionally, this PR adds the getSuccessorForwardOperands API to
BranchOpInterface. This allows us to extract the ForwardOperands for a
specific path chosen from multiple alternatives, enabling the creation
of a cf.br operation for the redirected jump.
Commit: ad91a2f036820e210b669926cf0982b0c8d2da99
https://github.com/llvm/llvm-project/commit/ad91a2f036820e210b669926cf0982b0c8d2da99
Author: Baranov Victor <bar.victor.2002 at gmail.com>
Date: 2026-03-28 (Sat, 28 Mar 2026)
Changed paths:
M clang-tools-extra/clang-tidy/cppcoreguidelines/RvalueReferenceParamNotMovedCheck.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/test/clang-tidy/checkers/cppcoreguidelines/rvalue-reference-param-not-moved.cpp
Log Message:
-----------
[clang-tidy] Fix rvalue-reference-param-not-moved FP on implicit functions (#189113)
Fixes https://github.com/llvm/llvm-project/issues/187716.
Commit: 5ae2fe75c3898cbf78f170d3cd686e02182f36fc
https://github.com/llvm/llvm-project/commit/5ae2fe75c3898cbf78f170d3cd686e02182f36fc
Author: Jorn Tuyls <jorn.tuyls at gmail.com>
Date: 2026-03-28 (Sat, 28 Mar 2026)
Changed paths:
M mlir/lib/Dialect/Vector/IR/VectorOps.cpp
M mlir/test/Dialect/Vector/invalid.mlir
Log Message:
-----------
[mlir][vector] Reject alignment attribute on tensor-level gather/scatter (#188924)
Commit: 1efef761c5f338eb046a09fae640b5c978f55cc5
https://github.com/llvm/llvm-project/commit/1efef761c5f338eb046a09fae640b5c978f55cc5
Author: lonely eagle <2020382038 at qq.com>
Date: 2026-03-28 (Sat, 28 Mar 2026)
Changed paths:
M mlir/include/mlir/Dialect/ControlFlow/IR/ControlFlowOps.td
M mlir/include/mlir/Interfaces/ControlFlowInterfaces.td
M mlir/include/mlir/Reducer/ReductionNode.h
M mlir/lib/Dialect/ControlFlow/IR/ControlFlowOps.cpp
M mlir/lib/Reducer/ReductionNode.cpp
M mlir/lib/Reducer/ReductionTreePass.cpp
M mlir/test/mlir-reduce/reduction-tree.mlir
Log Message:
-----------
Revert "[mlir][reducer] Add eraseRedundantBlocksInRegion and getSuccessorForwardOperands API to BranchOpInterface" (#189150)
Reverts llvm/llvm-project#187864, because it is causing same build bot
failures. See https://lab.llvm.org/buildbot/#/builders/138/builds/27662
and
https://lab.llvm.org/buildbot/#/builders/169/builds/21376/steps/11/logs/stdio
for memory leak issues.
Commit: 64d2f702cee57746b71993ae94d6377d4181bd2f
https://github.com/llvm/llvm-project/commit/64d2f702cee57746b71993ae94d6377d4181bd2f
Author: Corentin Jabot <corentin.jabot at gmail.com>
Date: 2026-03-28 (Sat, 28 Mar 2026)
Changed paths:
M clang/www/cxx_status.html
Log Message:
-----------
[Clang][NFC] Add the list of C++26 papers approved in Kona and Croydon
Commit: 00c6b4dabd66d51ac672db710d16674ab4fa0c89
https://github.com/llvm/llvm-project/commit/00c6b4dabd66d51ac672db710d16674ab4fa0c89
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-03-28 (Sat, 28 Mar 2026)
Changed paths:
M mlir/lib/Dialect/Vector/IR/VectorOps.cpp
M mlir/test/Dialect/Vector/canonicalize.mlir
Log Message:
-----------
[MLIR][Vector] Fix crash in foldDenseElementsAttrDestInsertOp on poison index (#188508)
When a dynamic index of -1 (the kPoisonIndex sentinel) was folded into
the static position of a vector.insert op,
foldDenseElementsAttrDestInsertOp would proceed to call
calculateInsertPosition, which returned -1. The subsequent iterator
arithmetic (allValues.begin() + (-1)) was undefined behaviour, causing
an assertion in DenseElementsAttr::get.
Fix by bailing out early in foldDenseElementsAttrDestInsertOp when any
static position equals kPoisonIndex, consistent with how
InsertChainFullyInitialized already guards this case.
Fixes #188404
Assisted-by: Claude Code
Commit: 16e06589e963aadced8a5afeeaa2ec2a95d0a483
https://github.com/llvm/llvm-project/commit/16e06589e963aadced8a5afeeaa2ec2a95d0a483
Author: Corentin Jabot <corentin.jabot at gmail.com>
Date: 2026-03-28 (Sat, 28 Mar 2026)
Changed paths:
M clang/www/cxx_status.html
Log Message:
-----------
[Clang][NFC] Trivial relocation is no longer a c++26 feature
Commit: 3b76b85b15a3e7aa004814944f6237f131b95961
https://github.com/llvm/llvm-project/commit/3b76b85b15a3e7aa004814944f6237f131b95961
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-03-28 (Sat, 28 Mar 2026)
Changed paths:
M mlir/test/Bytecode/bytecode_callback.mlir
M mlir/test/lib/IR/TestBytecodeRoundtrip.cpp
Log Message:
-----------
[MLIR] Fix crash in test-bytecode-roundtrip when test dialect is absent (#189163)
When invoking `-test-bytecode-roundtrip=test-dialect-version=X.Y` on a
module that contains no test dialect operations, the reader type
callback in `runTest0` called
`reader.getDialectVersion<test::TestDialect>()` and then immediately
asserted that it succeeded. However, if the test dialect was never
referenced in the bytecode (because no test dialect types appear in the
module), the dialect's version information is not stored in the
bytecode, so `getDialectVersion` legitimately returns failure.
When the test dialect version is unavailable in the bytecode being read,
the module contains no test dialect types, so no "funky"-group overrides
are needed and the callback can safely skip by returning `success()`.
A regression test is added with a module that has no test dialect ops,
exercising the `test-dialect-version=2.0` path that previously crashed.
Fixes #128321
Fixes #128325
Assisted-by: Claude Code
Commit: e568136e9480231030966acd4d79e1c05638aab7
https://github.com/llvm/llvm-project/commit/e568136e9480231030966acd4d79e1c05638aab7
Author: Twice <twice at apache.org>
Date: 2026-03-28 (Sat, 28 Mar 2026)
Changed paths:
M mlir/python/mlir/dialects/ext.py
M mlir/test/python/dialects/ext.py
Log Message:
-----------
[MLIR][Python] Add more field specifiers to Python-defined operations (#188064)
This PR adds two new field specifiers (`operand` and `attribute`) and
extends the existing one (`result`):
- `default_factory` parameter is added for `result` and `attribute` to
specify default value via a lambda/function
- `kw_only` parameter is added for all these three specifiers, to make a
field a keyword-only parameter (without giving a default value).
```python
def result(
*,
infer_type: bool = False,
default_factory: Optional[Callable[[], Any]] = None,
kw_only: bool = False,
) -> Any: ...
def operand(
*,
kw_only: bool = False,
) -> Any: ...
def attribute(
*,
default_factory: Optional[Callable[[], Any]] = None,
kw_only: bool = False,
) -> Any: ...
```
Examples about how to use them:
```python
class OperandSpecifierOp(TestFieldSpecifiers.Operation, name="operand_specifier"):
a: Operand[IntegerType[32]] = operand()
b: Optional[Operand[IntegerType[32]]] = None
c: Operand[IntegerType[32]] = operand(kw_only=True)
class ResultSpecifierOp(TestFieldSpecifiers.Operation, name="result_specifier"):
a: Result[IntegerType[32]] = result()
b: Result[IntegerType[16]] = result(infer_type=True)
c: Result[IntegerType] = result(
default_factory=lambda: IntegerType.get_signless(8)
)
d: Sequence[Result[IntegerType]] = result(default_factory=list)
e: Result[IntegerType[32]] = result(kw_only=True)
class AttributeSpecifierOp(
TestFieldSpecifiers.Operation, name="attribute_specifier"
):
a: IntegerAttr = attribute()
b: IntegerAttr = attribute(
default_factory=lambda: IntegerAttr.get(IntegerType.get_signless(32), 42)
)
c: StringAttr["a"] | StringAttr["b"] = attribute(
default_factory=lambda: StringAttr.get("a")
)
d: IntegerAttr = attribute(kw_only=True)
```
---------
Co-authored-by: Rolf Morel <rolfmorel at gmail.com>
Commit: 15940b130a21c4a8c13f97f28676f5791e538102
https://github.com/llvm/llvm-project/commit/15940b130a21c4a8c13f97f28676f5791e538102
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-03-28 (Sat, 28 Mar 2026)
Changed paths:
M libcxx/cmake/caches/AMDGPU.cmake
M libcxx/cmake/caches/NVPTX.cmake
Log Message:
-----------
[libcxx] Update GPU cache files to use the proper loader
Summary:
These were renamed and the aliases removed, fix running the tests.
Commit: f0ce26d06d822fd6985d227dc1be9d218977e334
https://github.com/llvm/llvm-project/commit/f0ce26d06d822fd6985d227dc1be9d218977e334
Author: Shikhar Soni <139053348+shikharish at users.noreply.github.com>
Date: 2026-03-28 (Sat, 28 Mar 2026)
Changed paths:
M libc/config/baremetal/aarch64/entrypoints.txt
M libc/config/baremetal/riscv/entrypoints.txt
M libc/config/darwin/aarch64/entrypoints.txt
M libc/config/gpu/amdgpu/entrypoints.txt
M libc/config/gpu/nvptx/entrypoints.txt
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/docs/headers/math/index.rst
M libc/include/math.yaml
M libc/src/__support/math/CMakeLists.txt
A libc/src/__support/math/log2p1f16.h
M libc/src/math/CMakeLists.txt
M libc/src/math/generic/CMakeLists.txt
A libc/src/math/generic/log2p1f16.cpp
A libc/src/math/log2p1f16.h
M libc/test/src/math/CMakeLists.txt
A libc/test/src/math/log2p1f16_test.cpp
M libc/test/src/math/smoke/CMakeLists.txt
A libc/test/src/math/smoke/log2p1f16_test.cpp
M libc/utils/MPFRWrapper/MPCommon.cpp
M libc/utils/MPFRWrapper/MPCommon.h
M libc/utils/MPFRWrapper/MPFRUtils.cpp
M libc/utils/MPFRWrapper/MPFRUtils.h
Log Message:
-----------
[libc][math][c23] Add log2p1f16 C23 math function (#186754)
Signed-off-by: Shikhar Soni <shikharish05 at gmail.com>
Commit: 0ac35ecc0bdd8c3f87f0ecdfe862e3eaf8922444
https://github.com/llvm/llvm-project/commit/0ac35ecc0bdd8c3f87f0ecdfe862e3eaf8922444
Author: Björn Schäpers <bjoern at hazardy.de>
Date: 2026-03-28 (Sat, 28 Mar 2026)
Changed paths:
M clang/lib/Format/Format.cpp
M clang/lib/Format/TokenAnnotator.cpp
M clang/lib/Format/UnwrappedLineParser.cpp
M clang/unittests/Format/FormatTest.cpp
Log Message:
-----------
[clang-format] Fix breaking enum braces when combined with export (#189128)
This fixes #186684.
Also fix (not) breaking variables declared on the same line as the
closing brace.
And adapt whitesmith to that changes.
Commit: 3f42ec658f2f08d8ce11909603c8a82dc9e1045a
https://github.com/llvm/llvm-project/commit/3f42ec658f2f08d8ce11909603c8a82dc9e1045a
Author: Björn Schäpers <bjoern at hazardy.de>
Date: 2026-03-28 (Sat, 28 Mar 2026)
Changed paths:
M clang/lib/Format/TokenAnnotator.cpp
M clang/unittests/Format/TokenAnnotatorTest.cpp
Log Message:
-----------
[clang-format] Fix annotation of references in function pointer typedefs (#188860)
Fixes #188695
Commit: 9d6b92e29fee91c827aed67b699a8a4cc38dbaac
https://github.com/llvm/llvm-project/commit/9d6b92e29fee91c827aed67b699a8a4cc38dbaac
Author: Pranshu Goyal <78131793+pranshoe at users.noreply.github.com>
Date: 2026-03-28 (Sat, 28 Mar 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
A llvm/test/CodeGen/AArch64/knownpow2-trunc-orzero.ll
M llvm/test/CodeGen/X86/known-pow2.ll
Log Message:
-----------
[DAG] SelectionDAG::isKnownToBeAPowerOfTwo - add ISD::TRUNCATE handling and tests (#184365)
Closes #181654
Commit: 9f3a9ea6ae689fa0fbd0137999834915cc908e5c
https://github.com/llvm/llvm-project/commit/9f3a9ea6ae689fa0fbd0137999834915cc908e5c
Author: Nishant Patel <nishant.b.patel at intel.com>
Date: 2026-03-28 (Sat, 28 Mar 2026)
Changed paths:
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUSgToWiDistributeExperimental.cpp
M mlir/test/Dialect/XeGPU/sg-to-wi-experimental-unit.mlir
Log Message:
-----------
[MLIR][XeGPU] Add distribution patterns for vector step, shape_cast & broadcast from sg-to-wi (#185960)
This PR adds distribution patterns for vector.step, vector.shape_cast &
vector.broadcast in the new sg-to-wi pass
Commit: ba6041bfbd22a4855e899fdf78fab7886cc34f71
https://github.com/llvm/llvm-project/commit/ba6041bfbd22a4855e899fdf78fab7886cc34f71
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-03-28 (Sat, 28 Mar 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/LowerMatrixIntrinsics.cpp
A llvm/test/Transforms/LowerMatrixIntrinsics/multiply-fused-differing-addr-spaces.ll
Log Message:
-----------
[Matrix] Handle load/store with different AS in getNonAliasingPointer. (#188721)
If a load and a store have different address spaces, we cannot create a
runtime check. Instead, always copy the data to an alloca matching the
store address space.
Fixes https://github.com/llvm/llvm-project/issues/185236.
PR: https://github.com/llvm/llvm-project/pull/188721
Commit: 445089158020617ccde337202afefd784c315b27
https://github.com/llvm/llvm-project/commit/445089158020617ccde337202afefd784c315b27
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-03-28 (Sat, 28 Mar 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
A llvm/test/Transforms/SLPVectorizer/X86/non-reduced-select-of-bits.ll
Log Message:
-----------
[SLP] Check if potential bitcast/bswap candidate is a root of reduction
Need to check if the potential bitcast/bswap-like construct is a root of
the reduction, otherwise it cannot represent a bitcast/bswap construct.
Fixes #189184
Commit: 617ec39fd0ae5362c052c3a055df17f45cc29fde
https://github.com/llvm/llvm-project/commit/617ec39fd0ae5362c052c3a055df17f45cc29fde
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-03-28 (Sat, 28 Mar 2026)
Changed paths:
A llvm/test/Transforms/LoopVectorize/VPlan/dissolve-replicate-regions.ll
Log Message:
-----------
[VPlan] Add printing test for dissolving replicate regions. (#189192)
Add VPlan printing test for
https://github.com/llvm/llvm-project/pull/186252
https://github.com/llvm/llvm-project/pull/189022
Commit: c0bd2f9084d7aee7b51408fadf50cd80438bb13e
https://github.com/llvm/llvm-project/commit/c0bd2f9084d7aee7b51408fadf50cd80438bb13e
Author: Björn Schäpers <bjoern at hazardy.de>
Date: 2026-03-28 (Sat, 28 Mar 2026)
Changed paths:
A clang/unittests/Format/AlignmentTest.cpp
M clang/unittests/Format/CMakeLists.txt
M clang/unittests/Format/FormatTest.cpp
Log Message:
-----------
[clang-format][NFC] Extract some alignment tests
FormatTest.cpp is too huge, extract some tests to mitigate this a bit.
Commit: 191a9a911c510fe31eaf17c72c47d5f64d7d6bf9
https://github.com/llvm/llvm-project/commit/191a9a911c510fe31eaf17c72c47d5f64d7d6bf9
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2026-03-28 (Sat, 28 Mar 2026)
Changed paths:
M llvm/utils/gn/secondary/clang/unittests/Format/BUILD.gn
Log Message:
-----------
[gn build] Port c0bd2f9084d7
Commit: 458f1aae8d2da5bf786ba53ea200e94a918ff55a
https://github.com/llvm/llvm-project/commit/458f1aae8d2da5bf786ba53ea200e94a918ff55a
Author: Michael Kruse <llvm-project at meinersbur.de>
Date: 2026-03-28 (Sat, 28 Mar 2026)
Changed paths:
M polly/ci/polly-x86_64-linux-plugin.py
M polly/ci/polly-x86_64-linux.py
M polly/include/polly/ScopInliner.h
M polly/lib/Support/PollyPasses.def
M polly/lib/Support/RegisterPasses.cpp
M polly/lib/Transform/ScopInliner.cpp
A polly/test/.clang-format
M polly/test/CMakeLists.txt
R polly/test/CodeGen/RuntimeDebugBuilder/combine_different_values.c
M polly/test/lit.cfg
M polly/test/lit.site.cfg.in
A polly/test/polly.c
Log Message:
-----------
[Polly] Forward VFS from PassBuilder for IO sandboxing (#188657)
#184545 default-enables the IO sandbox in assert-builds. This causes
Clang using Polly to crash (#188568).
The issue is that `PassBuilder` uses `vfs::getRealFileSystem()` by
default which is considered a IO sandbox violation in the Clang process.
With this PR store the VFS from the `PassBuilder` from the original
`registerPollyPasses` call for creating other `PassBuilder` instances.
This PR also adds infrastructure for running Polly in `clang` (in
addition in `opt`). `opt` does not enable the sandbox such that we need
separate tests using Clang.
Closes: #188568
Commit: 6ead6868e7ca653bb3e48edc2591970fb5b37569
https://github.com/llvm/llvm-project/commit/6ead6868e7ca653bb3e48edc2591970fb5b37569
Author: Victor Chernyakin <chernyakin.victor.j at outlook.com>
Date: 2026-03-28 (Sat, 28 Mar 2026)
Changed paths:
M clang-tools-extra/clang-tidy/ClangTidy.cpp
M clang-tools-extra/clang-tidy/bugprone/ReservedIdentifierCheck.cpp
M clang-tools-extra/clang-tidy/cppcoreguidelines/ProBoundsAvoidUncheckedContainerAccessCheck.cpp
M clang-tools-extra/clang-tidy/misc/ConfusableTable/BuildConfusableTable.cpp
M clang-tools-extra/clang-tidy/misc/IncludeCleanerCheck.cpp
M clang-tools-extra/clang-tidy/modernize/LoopConvertCheck.cpp
M clang-tools-extra/clang-tidy/readability/IdentifierNamingCheck.cpp
M clang-tools-extra/clang-tidy/readability/ImplicitBoolConversionCheck.cpp
M clang-tools-extra/clang-tidy/readability/IsolateDeclarationCheck.cpp
M clang-tools-extra/clang-tidy/readability/UseStdMinMaxCheck.cpp
M clang-tools-extra/clang-tidy/utils/Matchers.h
Log Message:
-----------
[clang-tidy][NFC] Run `performance-faster-string-find` over the codebase (#189202)
Commit: 89d57d03bfa0369fdc5d6825085291f3eb604ea8
https://github.com/llvm/llvm-project/commit/89d57d03bfa0369fdc5d6825085291f3eb604ea8
Author: Brian Cain <brian.cain at oss.qualcomm.com>
Date: 2026-03-28 (Sat, 28 Mar 2026)
Changed paths:
M compiler-rt/lib/sanitizer_common/sanitizer_platform_limits_posix.cpp
Log Message:
-----------
[compiler-rt][sanitizer] Add struct_rlimit64_sz for musl (#189197)
On musl, rlimit64 is an alias for rlimit rather than a distinct type
provided by glibc. Add a SANITIZER_MUSL elif branch so that
struct_rlimit64_sz is defined for musl-based Linux targets.
Commit: 670de1f5229a2b75a9711edd677b18eed60a587a
https://github.com/llvm/llvm-project/commit/670de1f5229a2b75a9711edd677b18eed60a587a
Author: Brian Cain <brian.cain at oss.qualcomm.com>
Date: 2026-03-28 (Sat, 28 Mar 2026)
Changed paths:
M compiler-rt/lib/msan/msan_linux.cpp
Log Message:
-----------
[compiler-rt][msan] Fix 32-bit overflow in CheckMemoryLayoutSanity (#189199)
Use start + (end - start) / 2 instead of (start + end) / 2 to compute
the midpoint address. The original expression overflows when start + end
exceeds UPTR_MAX, which happens on 32-bit targets whose memory layout
includes regions above 0x80000000.
Commit: cf3a0f255369dde072822657db0751150f2e5e01
https://github.com/llvm/llvm-project/commit/cf3a0f255369dde072822657db0751150f2e5e01
Author: Farid Zakaria <farid.m.zakaria at gmail.com>
Date: 2026-03-28 (Sat, 28 Mar 2026)
Changed paths:
M lld/Maintainers.md
Log Message:
-----------
[lld] update maintainers (#183803)
As a new contributor, it helps to correctly see the right maintainer.
Commit: 71263dc615cd6ece304e4326485336691c2ddc26
https://github.com/llvm/llvm-project/commit/71263dc615cd6ece304e4326485336691c2ddc26
Author: Baranov Victor <bar.victor.2002 at gmail.com>
Date: 2026-03-29 (Sun, 29 Mar 2026)
Changed paths:
M clang-tools-extra/clang-tidy/bugprone/IncDecInConditionsCheck.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/test/clang-tidy/checkers/bugprone/inc-dec-in-conditions.cpp
Log Message:
-----------
[clang-tidy] Fix bugprone-inc-dec-in-conditions FP with lambda condition (#189145)
Fixes https://github.com/llvm/llvm-project/issues/163913.
Commit: fcd0e2cca0ac9ddfba28729381d486cc60170dc6
https://github.com/llvm/llvm-project/commit/fcd0e2cca0ac9ddfba28729381d486cc60170dc6
Author: Fangrui Song <i at maskray.me>
Date: 2026-03-29 (Sun, 29 Mar 2026)
Changed paths:
M lld/ELF/BPSectionOrderer.cpp
Log Message:
-----------
[ELF] Remove redundant sec->repl != sec check in BPSectionOrderer. NFC (#189214)
ICF's InputSection::replace() calls markDead() on folded sections, so
`!sec->isLive()` already filters them.
Commit: fc01c81d03c74b9da6aa4e3ea22487b2e5b2517a
https://github.com/llvm/llvm-project/commit/fc01c81d03c74b9da6aa4e3ea22487b2e5b2517a
Author: dwrank <dwrank at gmail.com>
Date: 2026-03-29 (Sun, 29 Mar 2026)
Changed paths:
M mlir/lib/Dialect/LLVMIR/CMakeLists.txt
M mlir/lib/Dialect/OpenMP/CMakeLists.txt
Log Message:
-----------
[MLIR][build] Fix undefined references in debug shared libs (#189207)
Fixes undefined references in debug shared libs when building MLIR:
-DLLVM_ENABLE_PROJECTS="mlir"
-DCMAKE_BUILD_TYPE=Debug
-DBUILD_SHARED_LIBS=1
Debug build (-O0) disables dead code elimination, resulting in undefined
references in the following shared libs:
MLIROpenMPDialect (needs to link with TargetParser)
MLIRXeVMDialect (needs to link with TargetParser and MLIROpenMPDialect)
MLIRNVVMDialect (needs to link with TargetParser and MLIROpenMPDialect)
Fixes #189206
Assisted-by: Claude Code
From:
https://github.com/llvm/llvm-project/commit/d7e60d525026f24a3514be34d8e6e56622436823
Utils were added to OpenMP, particularly [[maybe_unused]]
setOffloadModuleInterfaceAttributes() which calls
llvm::Triple::normalize() creating a new dependency on TargetParser.
Commit: dd9bc6603cda141b22ae69af52a93fcf88e3baa8
https://github.com/llvm/llvm-project/commit/dd9bc6603cda141b22ae69af52a93fcf88e3baa8
Author: Sergei Lebedev <185856+superbobry at users.noreply.github.com>
Date: 2026-03-29 (Sun, 29 Mar 2026)
Changed paths:
M mlir/include/mlir/Bindings/Python/IRCore.h
M mlir/include/mlir/Bindings/Python/NanobindUtils.h
M mlir/test/mlir-tblgen/op-python-bindings.td
M mlir/tools/mlir-tblgen/OpPythonBindingGen.cpp
Log Message:
-----------
[MLIR] [Python] The generated op definitions now use typed parameters (#188635)
As with operand/result types this only handles standard dialects, but I think it is still useful as is.
We could consider extensibility if/when necessary.
Commit: 4151f5d36f26492079dca23f2a5ac13480098fb1
https://github.com/llvm/llvm-project/commit/4151f5d36f26492079dca23f2a5ac13480098fb1
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-03-29 (Sun, 29 Mar 2026)
Changed paths:
M mlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp
M mlir/lib/Target/LLVMIR/Dialect/LLVMIR/LLVMToLLVMIRTranslation.cpp
M mlir/test/Dialect/LLVMIR/alias.mlir
M mlir/test/Target/LLVMIR/alias.mlir
Log Message:
-----------
[MLIR][LLVMIR] Allow llvm.call and llvm.invoke to use llvm.mlir.alias as callee (#189154)
Previously, the verifier for `llvm.call` and `llvm.invoke` would reject
calls where the callee was an `llvm.mlir.alias`, reporting that the
symbol does not reference a valid LLVM function or IFunc. Similarly, the
MLIR-to-LLVM-IR translation had no handling for aliases as callees.
This patch extends both the verifier and the translation to accept
`llvm.mlir.alias` as a valid callee for `llvm.call` and `llvm.invoke`,
mirroring the existing support for `llvm.mlir.ifunc`. The function type
for alias calls is derived from the call operands and result types, and
the translation emits a call through the alias global value.
Fixes #147057
Assisted-by: Claude Code
Commit: 2e6e36b1734fa6fd3b45405a63efcbeea2a3d795
https://github.com/llvm/llvm-project/commit/2e6e36b1734fa6fd3b45405a63efcbeea2a3d795
Author: Folkert de Vries <folkert at folkertdev.nl>
Date: 2026-03-29 (Sun, 29 Mar 2026)
Changed paths:
A llvm/test/CodeGen/AArch64/is_fpclass-bfloat.ll
M llvm/test/CodeGen/AArch64/is_fpclass.ll
Log Message:
-----------
[NFC][AArch64] update tests for `is_fpclass` (#187336)
Hopefully this is better.
One wrinkle is that `@llvm.is.fpclass.bf16` is not currently implemented
for GI. That might be easy to add but I've not been able to figure out
where the issue is exactly so far.
I'm also not totally sure `-mattr=-fp-armv8` is equivalent to softfloat,
but some tests do suggest that they are equivalent (and looking at the
assembly, that seems right).
Commit: 1bb03026b6aa332863de65a7d245c4ecf3a99645
https://github.com/llvm/llvm-project/commit/1bb03026b6aa332863de65a7d245c4ecf3a99645
Author: Mohamed Emad <hulxxv at gmail.com>
Date: 2026-03-29 (Sun, 29 Mar 2026)
Changed paths:
M libc/config/baremetal/aarch64/entrypoints.txt
M libc/config/baremetal/arm/entrypoints.txt
M libc/config/baremetal/riscv/entrypoints.txt
M libc/config/darwin/aarch64/entrypoints.txt
M libc/config/gpu/amdgpu/entrypoints.txt
M libc/config/gpu/nvptx/entrypoints.txt
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/arm/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/config/windows/entrypoints.txt
M libc/docs/headers/math/index.rst
M libc/include/math.yaml
M libc/shared/math.h
A libc/shared/math/asinpi.h
M libc/src/__support/math/CMakeLists.txt
M libc/src/__support/math/asin_utils.h
A libc/src/__support/math/asinpi.h
M libc/src/math/CMakeLists.txt
A libc/src/math/asinpi.h
M libc/src/math/generic/CMakeLists.txt
A libc/src/math/generic/asinpi.cpp
M libc/test/shared/CMakeLists.txt
M libc/test/shared/shared_math_test.cpp
M libc/test/src/math/CMakeLists.txt
A libc/test/src/math/asinpi_test.cpp
M libc/test/src/math/smoke/CMakeLists.txt
A libc/test/src/math/smoke/asinpi_test.cpp
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[libc][math][c23] implement double-precision asinpi (#188158)
Implement the double precision version of the asinpi c23 math function
Commit: 73cddef78828d371d8d1c1b05adec9a6f37f462d
https://github.com/llvm/llvm-project/commit/73cddef78828d371d8d1c1b05adec9a6f37f462d
Author: Folkert de Vries <folkert at folkertdev.nl>
Date: 2026-03-29 (Sun, 29 Mar 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/test/CodeGen/AArch64/is_fpclass-bfloat.ll
M llvm/test/CodeGen/AArch64/is_fpclass.ll
M llvm/test/CodeGen/AMDGPU/llvm.is.fpclass.bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.is.fpclass.f16.ll
M llvm/test/CodeGen/AMDGPU/r600.llvm.is.fpclass.ll
M llvm/test/CodeGen/PowerPC/fp-classify.ll
M llvm/test/CodeGen/RISCV/float-intrinsics.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfclass.ll
M llvm/test/CodeGen/RISCV/rvv/vfclass-sdnode.ll
M llvm/test/CodeGen/X86/is_fpclass.ll
M llvm/test/CodeGen/X86/isel-fpclass.ll
Log Message:
-----------
optimize `is_finite` assembly (#169402)
Fixes https://github.com/llvm/llvm-project/issues/169270
Changes the implementation of `is_finite` to emit fewer instructions,
e.g.
X86_64
```asm
old: # 18 bytes
movd %xmm0, %eax
andl $2147483647, %eax
cmpl $2139095040, %eax
setl %al
retq
new: # 15 bytes
movd %xmm0, %eax
addl %eax, %eax
cmpl $-16777216, %eax
setb %al
retq
```
Aarch64
```asm
old:
fmov w9, s0
mov w8, #2139095040
and w9, w9, #0x7fffffff
cmp w9, w8
cset w0, lt
ret
new:
fmov w8, s0
ubfx w8, w8, #23, #8
cmp w8, #255
cset w0, lo
ret
```
See the issue for more information.
Commit: 8374475b8daecc30cc02280ce6bd5d53803065f5
https://github.com/llvm/llvm-project/commit/8374475b8daecc30cc02280ce6bd5d53803065f5
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-03-29 (Sun, 29 Mar 2026)
Changed paths:
M clang/lib/Driver/Driver.cpp
Log Message:
-----------
clang: Use isAMDGPU triple helper (#189261)
Also remove redundant SPIRV check.
Commit: c467d38090696f90140f3e4ddf8cc0f301222314
https://github.com/llvm/llvm-project/commit/c467d38090696f90140f3e4ddf8cc0f301222314
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-03-29 (Sun, 29 Mar 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
Log Message:
-----------
[LV] Fix offset handling for epilogue resume values. (NFCI) (#189259)
Instead of replacing all uses of the canonical IV with an add of the
resume value and then relying on the fold to simplify, directly create
offset versions of both the canonical IV and its increment.
The original offset computation were incorrect, but not resulted in
mis-compiles due to the corresponding fold.
Split off from approved
https://github.com/llvm/llvm-project/pull/156262.
Commit: ad1e30bd08cc4729727197d7f4ef32ccb30a1be5
https://github.com/llvm/llvm-project/commit/ad1e30bd08cc4729727197d7f4ef32ccb30a1be5
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-03-29 (Sun, 29 Mar 2026)
Changed paths:
M clang/include/clang/Basic/OffloadArch.h
M clang/lib/Basic/OffloadArch.cpp
M clang/lib/Driver/Driver.cpp
Log Message:
-----------
clang: Move Triple computing logic to separate function (#189262)
Commit: b8d04118858ab63a2fe4b3568598c995dac9a198
https://github.com/llvm/llvm-project/commit/b8d04118858ab63a2fe4b3568598c995dac9a198
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-03-29 (Sun, 29 Mar 2026)
Changed paths:
M clang/lib/Driver/Driver.cpp
Log Message:
-----------
clang: Avoid intermediate DenseSet of triples (#189263)
This was computing a DenseSet<StringRef> of triples, but the
only use was to insert all the entries into a multiset. Just
use the multiset in the first place.
Commit: 44f1fa909953febfe019da533ec172da1348ac7b
https://github.com/llvm/llvm-project/commit/44f1fa909953febfe019da533ec172da1348ac7b
Author: Brian Cain <brian.cain at oss.qualcomm.com>
Date: 2026-03-29 (Sun, 29 Mar 2026)
Changed paths:
M compiler-rt/cmake/Modules/AllSupportedArchDefs.cmake
M compiler-rt/lib/msan/msan.h
M compiler-rt/lib/msan/msan_allocator.cpp
Log Message:
-----------
[compiler-rt][msan] Add MSan support for Hexagon (Linux) (#189124)
Add the runtime infrastructure for MemorySanitizer on Hexagon Linux.
Hexagon is 32-bit, so the shadow memory layout uses a compact XOR-based
mapping that fits within the lower 3GB of address space:
0x00000000 - 0x10000000 APP-1 (256MB, program text/data/heap)
0x10000000 - 0x20000000 ALLOCATOR (256MB)
0x20000000 - 0x40000000 SHADOW-1 (512MB, covers APP-1 + ALLOCATOR)
0x40000000 - 0x50000000 APP-2 (256MB, shared libs + stack)
0x60000000 - 0x70000000 SHADOW-2 (256MB, covers APP-2)
0x70000000 - 0x90000000 ORIGIN-1 (512MB)
0xB0000000 - 0xC0000000 ORIGIN-2 (256MB)
MEM_TO_SHADOW uses XOR 0x20000000, and SHADOW_TO_ORIGIN adds 0x50000000.
The dual-APP layout accommodates QEMU user-mode, which places shared
libraries and the stack at 0x40000000.
The allocator uses SizeClassAllocator32 with a 256MB region at
0x10000000, and kMaxAllowedMallocSize is set to 1GB consistent with
other 32-bit targets.
Commit: a8cdc5a483efc90e4699df25027ae4916115dfed
https://github.com/llvm/llvm-project/commit/a8cdc5a483efc90e4699df25027ae4916115dfed
Author: Brian Cain <brian.cain at oss.qualcomm.com>
Date: 2026-03-29 (Sun, 29 Mar 2026)
Changed paths:
M compiler-rt/lib/msan/msan_interceptors.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_platform_interceptors.h
Log Message:
-----------
[compiler-rt][msan] Guard shmat interceptor w SANITIZER_INTERCEPT_SHMCTL (#189198)
The shmat interceptor calls REAL(shmctl), but shmctl is not intercepted
on all targets (e.g. 32-bit Linux with musl). Guard shmat behind
SANITIZER_INTERCEPT_SHMCTL and use a MSAN_MAYBE_INTERCEPT pattern
consistent with other conditional interceptors.
Commit: e17c21974ec61380c81d665cf904fa88f1d3a11d
https://github.com/llvm/llvm-project/commit/e17c21974ec61380c81d665cf904fa88f1d3a11d
Author: Brian Cain <brian.cain at oss.qualcomm.com>
Date: 2026-03-29 (Sun, 29 Mar 2026)
Changed paths:
M llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
A llvm/test/Instrumentation/MemorySanitizer/Hexagon/hexagon.ll
A llvm/test/Instrumentation/MemorySanitizer/Hexagon/vararg-hexagon.ll
Log Message:
-----------
[msan] Add MSan instrumentation support for Hexagon (#189122)
Add MemorySanitizer instrumentation pass support for Hexagon Linux. This
is the codegen/instrumentation side; the compiler-rt runtime changes are
in a separate patch.
The shadow memory layout uses XOR-based mapping with XorMask=0x20000000
and OriginBase=0x50000000, designed to fit within the 32-bit address
space.
VarArg handling uses VarArgGenericHelper with VAListTagSize=12, matching
the Hexagon ABI where va_list is a three-pointer struct {
current_reg_area, reg_area_end, overflow_area }.
Commit: 479a826ce9152673041b00c11ca0f128c429d8f7
https://github.com/llvm/llvm-project/commit/479a826ce9152673041b00c11ca0f128c429d8f7
Author: Fangrui Song <i at maskray.me>
Date: 2026-03-29 (Sun, 29 Mar 2026)
Changed paths:
M llvm/lib/Support/Parallel.cpp
Log Message:
-----------
[Support] Use namespace qualifiers in Parallel.cpp. NFC (#189268)
Replace `namespace llvm { namespace parallel { ... } }` blocks with
`using namespace` and qualified definitions per
https://llvm.org/docs/CodingStandards.html#use-namespace-qualifiers-to-define-previously-declared-symbols
Also reformat the TaskGroup constructor to avoid clang-format issues
with #if/#endif split across the initializer list.
Commit: e9119107cf12b7cd1eb798e5587d0bd49b45b4cc
https://github.com/llvm/llvm-project/commit/e9119107cf12b7cd1eb798e5587d0bd49b45b4cc
Author: Henrik G. Olsson <hnrklssn at gmail.com>
Date: 2026-03-29 (Sun, 29 Mar 2026)
Changed paths:
M llvm/lib/Analysis/ConstantFolding.cpp
M llvm/lib/Analysis/IVDescriptors.cpp
M llvm/lib/Analysis/InlineCost.cpp
M llvm/lib/Analysis/ModuleSummaryAnalysis.cpp
M llvm/lib/Analysis/StackSafetyAnalysis.cpp
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/lib/CodeGen/AsmPrinter/DwarfUnit.cpp
M llvm/lib/CodeGen/GlobalMerge.cpp
M llvm/lib/CodeGen/InterleavedAccessPass.cpp
M llvm/lib/TableGen/TGParser.cpp
M llvm/lib/Target/ARM/ARMISelLowering.cpp
M llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
M llvm/lib/Transforms/IPO/FunctionImport.cpp
M llvm/lib/Transforms/IPO/GlobalDCE.cpp
M llvm/lib/Transforms/IPO/GlobalOpt.cpp
M llvm/lib/Transforms/IPO/LowerTypeTests.cpp
M llvm/lib/Transforms/InstCombine/InstCombinePHI.cpp
M llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp
M llvm/lib/Transforms/Scalar/CorrelatedValuePropagation.cpp
M llvm/lib/Transforms/Scalar/DFAJumpThreading.cpp
M llvm/lib/Transforms/Utils/SimplifyCFG.cpp
M llvm/tools/llvm-objdump/MachODump.cpp
M llvm/tools/llvm-size/llvm-size.cpp
Log Message:
-----------
[LLVM] remove redundant uses of dyn_cast (NFC) (#189105)
This removes dyn_cast invocations where the argument is already of the
target type (including through subtyping). This was created by adding a
static assert in dyn_cast and letting an LLM iterate until the code base
compiled. I then went through each example and cleaned it up. This does
not commit the static assert in dyn_cast, because it would prevent a lot
of uses in templated code. To prevent backsliding we should instead add
an LLVM aware version of
https://clang.llvm.org/extra/clang-tidy/checks/readability/redundant-casting.html
(or expand the existing one).
Commit: 2c41a8de9afdafc310906610573f33c5ef2d3046
https://github.com/llvm/llvm-project/commit/2c41a8de9afdafc310906610573f33c5ef2d3046
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-03-29 (Sun, 29 Mar 2026)
Changed paths:
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.bvh.stack.push.pop.rtn.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.dual_intersect_ray.ll
Log Message:
-----------
AMDGPU: Fix using -march in a couple tests (#189271)
Commit: 9a17aa487818797b1f5b12774c02e424fc345bdf
https://github.com/llvm/llvm-project/commit/9a17aa487818797b1f5b12774c02e424fc345bdf
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-03-29 (Sun, 29 Mar 2026)
Changed paths:
M llvm/tools/llvm-objdump/llvm-objdump.cpp
Log Message:
-----------
llvm-objdump: Avoid contraction in error message (#189272)
Commit: b5d43f7794f9ec2fdf0e503ca34ef8e487d9b7e3
https://github.com/llvm/llvm-project/commit/b5d43f7794f9ec2fdf0e503ca34ef8e487d9b7e3
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-03-29 (Sun, 29 Mar 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
Log Message:
-----------
[VPlan] Use transferSuccessors in mergeBlocksIntoPredecessors (NFC). (#189275)
transferSuccessors is more compact and is guaranteed to preserve the
predecessor/successor order properly in all cases. This is not an issue
today, but will when used in more places, including #186252.
Split off from approved
https://github.com/llvm/llvm-project/pull/186252.
PR: https://github.com/llvm/llvm-project/pull/189275
Commit: 5b1be759295c4a2f357fbad852e04c74fc012dc1
https://github.com/llvm/llvm-project/commit/5b1be759295c4a2f357fbad852e04c74fc012dc1
Author: Fangrui Song <i at maskray.me>
Date: 2026-03-29 (Sun, 29 Mar 2026)
Changed paths:
M llvm/lib/Support/Parallel.cpp
Log Message:
-----------
[Support] Remove Executor abstract base class from Parallel.cpp. NFC (#189266)
ThreadPoolExecutor is the only implementation. Remove the Executor
base class so that add() and getThreadCount() are direct calls
instead of virtual dispatches.
Commit: cb017fd1b4fb0b6b93f6b1cff3c7f36d80b33c48
https://github.com/llvm/llvm-project/commit/cb017fd1b4fb0b6b93f6b1cff3c7f36d80b33c48
Author: Eugene Epshteyn <eepshteyn at nvidia.com>
Date: 2026-03-29 (Sun, 29 Mar 2026)
Changed paths:
M flang/lib/Semantics/resolve-directives.cpp
M flang/test/Semantics/OpenACC/acc-parallel.f90
Log Message:
-----------
[flang][OpenACC] Fix false DEFAULT(NONE) error for named DO loop construct names (#189204)
In OpenACC semantic checking filter out symbols with MiscDetails, which
include construct names, scope names, complex part designators, type
parameter inquiries, etc.
Commit: 5fa087f6a639ef0d9e2d7caf75295f60310eb6ae
https://github.com/llvm/llvm-project/commit/5fa087f6a639ef0d9e2d7caf75295f60310eb6ae
Author: Björn Schäpers <bjoern at hazardy.de>
Date: 2026-03-29 (Sun, 29 Mar 2026)
Changed paths:
M clang/lib/Format/UnwrappedLineFormatter.cpp
M clang/unittests/Format/FormatTest.cpp
Log Message:
-----------
[clang-format] Don't merge short records with directly created objects (#189200)
It did merge the wrong brace.
Fixes #189155
Commit: b579c5b0bcca1b6a8f145011307dcc222b28e4a5
https://github.com/llvm/llvm-project/commit/b579c5b0bcca1b6a8f145011307dcc222b28e4a5
Author: Lane0218 <laneljc at qq.com>
Date: 2026-03-29 (Sun, 29 Mar 2026)
Changed paths:
M clang/lib/Format/FormatToken.h
M clang/lib/Format/QualifierAlignmentFixer.cpp
M clang/lib/Format/QualifierAlignmentFixer.h
M clang/lib/Format/TokenAnnotator.cpp
M clang/unittests/Format/FormatTest.cpp
M clang/unittests/Format/QualifierFixerTest.cpp
Log Message:
-----------
[clang-format] Fix spacing before :: after non-macro identifiers (#189024)
This narrows clang-format's spacing heuristic for `identifier ::`.
Previously, clang-format preserved existing whitespace before `::` after
any
identifier, which caused inputs like:
```c++
template <typename T>
auto mem = &T :: member;
```
to format as:
```c++
template <typename T>
auto mem = &T ::member;
```
This patch preserves that whitespace only for identifiers that look like
object-like macros, such as the existing `ALWAYS_INLINE ::std::string`
case.
Ordinary identifiers now format as expected:
```c++
&T :: member
```
becomes
```c++
&T::member
```
Test:
- `./build-cir/tools/clang/unittests/Format/FormatTests
--gtest_filter=FormatTest.NestedNameSpecifiers`
Fixes #188754
Commit: 2cd67b8b69f78e3f95918204320c3075a74ba16c
https://github.com/llvm/llvm-project/commit/2cd67b8b69f78e3f95918204320c3075a74ba16c
Author: Björn Schäpers <bjoern at hazardy.de>
Date: 2026-03-29 (Sun, 29 Mar 2026)
Changed paths:
M clang/unittests/Format/TokenAnnotatorTest.cpp
Log Message:
-----------
[clang-format][NFC] Adapt test data
To the fixed issue.
This amends 3f42ec658f2f08d8ce11909603c8a82dc9e1045a.
Commit: ab885fdf5f67726ef564c34087e813f2ca861f5c
https://github.com/llvm/llvm-project/commit/ab885fdf5f67726ef564c34087e813f2ca861f5c
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-03-29 (Sun, 29 Mar 2026)
Changed paths:
M clang/include/clang/Driver/ToolChain.h
M clang/lib/Driver/Driver.cpp
M llvm/include/llvm/TargetParser/Triple.h
Log Message:
-----------
clang: Store Triple in multiset (#189264)
Previously this was storing StringRefs, which just happen
to be constant allocated strings. Change this into an owning
reference in the form that will actually be used. This will allow
changing the triples to something computed without maintaining
a table of every possible permutation.
Commit: c67475fb05f8fc0742888021fb9e15640e16c76e
https://github.com/llvm/llvm-project/commit/c67475fb05f8fc0742888021fb9e15640e16c76e
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-03-29 (Sun, 29 Mar 2026)
Changed paths:
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-smax-64.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-smin-64.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-umax-64.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-umin-64.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-block-addr.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-default.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/shufflevector-pointer-crash.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/shufflevector.ll
M llvm/test/CodeGen/AMDGPU/asyncmark-max-pregfx12.ll
M llvm/test/CodeGen/AMDGPU/asyncmark-pregfx12.ll
M llvm/test/CodeGen/AMDGPU/expert_scheduling_gfx12.mir
M llvm/test/CodeGen/AMDGPU/fabs.f64.ll
M llvm/test/CodeGen/AMDGPU/fabs.ll
M llvm/test/CodeGen/AMDGPU/fneg-fabs.f64.ll
M llvm/test/CodeGen/AMDGPU/fneg-fabs.ll
M llvm/test/CodeGen/AMDGPU/force-wait-after-always-gds.mir
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.bvh8_intersect_ray.ll
M llvm/test/CodeGen/AMDGPU/load-store-cnt.ll
M llvm/test/CodeGen/AMDGPU/misched-into-wmma-hazard-shadow.mir
M llvm/test/CodeGen/AMDGPU/mixed-vmem-types.ll
M llvm/test/CodeGen/AMDGPU/phi-av-pressure.ll
M llvm/test/CodeGen/AMDGPU/pr155452.ll
M llvm/test/CodeGen/AMDGPU/release-vgprs-gfx12-dvgpr.mir
M llvm/test/CodeGen/AMDGPU/release-vgprs-gfx12.mir
M llvm/test/CodeGen/AMDGPU/schedule-pending-queue.mir
M llvm/test/CodeGen/AMDGPU/spill_kill_v16.mir
M llvm/test/CodeGen/AMDGPU/spillv16.mir
M llvm/test/CodeGen/AMDGPU/swizzle.bit.extract.ll
M llvm/test/CodeGen/AMDGPU/true16-fold.mir
M llvm/test/CodeGen/AMDGPU/true16-saveexec.mir
Log Message:
-----------
AMDGPU: Avoid using -march in tests (#189285)
Commit: f10509133f783d297e531b894f72e4a62f08f206
https://github.com/llvm/llvm-project/commit/f10509133f783d297e531b894f72e4a62f08f206
Author: Björn Schäpers <bjoern at hazardy.de>
Date: 2026-03-29 (Sun, 29 Mar 2026)
Changed paths:
M clang/lib/Format/UnwrappedLineFormatter.cpp
Log Message:
-----------
[clang-format][NFC] Fix warning
llvm-project/clang/lib/Format/UnwrappedLineFormatter.cpp:725:11: warning: type qualifiers ignored on cast result type [-Wignored-qualifiers]
725 | static_cast<decltype(N)>(Distance) <= N) {
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Commit: 030ad2d638285bef694f08e169d34ec07214fd41
https://github.com/llvm/llvm-project/commit/030ad2d638285bef694f08e169d34ec07214fd41
Author: Chinmay Deshpande <chdeshpa at amd.com>
Date: 2026-03-29 (Sun, 29 Mar 2026)
Changed paths:
M llvm/test/Analysis/CostModel/AMDGPU/log.ll
M llvm/test/Analysis/CostModel/AMDGPU/log10.ll
M llvm/test/Analysis/CostModel/AMDGPU/log2.ll
A llvm/test/Analysis/CostModel/AMDGPU/sin.ll
M llvm/test/Analysis/CostModel/AMDGPU/sqrt.ll
Log Message:
-----------
[NFC][AMDGPU] Add CostModel tests for transcendental ops with varying function attrs (#188869)
Commit: eaffa1a2b3c9647d6be1b8dfab93389fcfb474b2
https://github.com/llvm/llvm-project/commit/eaffa1a2b3c9647d6be1b8dfab93389fcfb474b2
Author: Thurston Dang <thurston at google.com>
Date: 2026-03-29 (Sun, 29 Mar 2026)
Changed paths:
M llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
M llvm/test/Instrumentation/MemorySanitizer/AArch64/aarch64-bf16-dotprod-intrinsics.ll
Log Message:
-----------
[msan] Fix bfmmla instrumentation incompatibility issue (#188834)
#176264 instrumented bfmmla by applying ummla to the shadows. However,
Armv8.2+bf16 (as an example) supports bfmmla but not ummla, thus the
instrumentation is not always compatible.
This patch changes the bfmmla instrumentation to use bfmmla and basic
LLVM intrinsics, thus guaranteeing backend compatibility. The key
insights are that we can 1) use CreateSelect to convert the integer
shadows to bf16 2) apply bfmmla to these "shadows" 3) use FCmpULT to
check that the matrix entries denote fully initialized outputs.
This patch significantly refactors `handleNEONMatrixMultiply`, which is
also used for {s,u,su}mmla instrumentation, but the output is unaffected
for {s,u,su}mmla.
Commit: b6d7afe53465517ed944a43165b6885fab460c4e
https://github.com/llvm/llvm-project/commit/b6d7afe53465517ed944a43165b6885fab460c4e
Author: Ryotaro Kasuga <kasuga.ryotaro at fujitsu.com>
Date: 2026-03-30 (Mon, 30 Mar 2026)
Changed paths:
M llvm/lib/Analysis/DependenceAnalysis.cpp
M llvm/test/Analysis/DependenceAnalysis/WeakZeroDstSIV.ll
M llvm/test/Analysis/DependenceAnalysis/WeakZeroSrcSIV.ll
M llvm/test/Analysis/DependenceAnalysis/exact-siv-addrec-wrap.ll
M llvm/test/Analysis/DependenceAnalysis/exact-siv-overflow.ll
M llvm/test/Analysis/DependenceAnalysis/infer_affine_domain_ovlf.ll
M llvm/test/Analysis/DependenceAnalysis/non-monotonic.ll
M llvm/test/Analysis/DependenceAnalysis/rdiv-minor-algebra.ll
M llvm/test/Analysis/DependenceAnalysis/run-specific-dependence-test.ll
M llvm/test/Analysis/DependenceAnalysis/strong-siv-addrec-wrap.ll
M llvm/test/Analysis/DependenceAnalysis/symbolic-rdiv-addrec-wrap.ll
M llvm/test/Analysis/DependenceAnalysis/symbolic-rdiv-overflow.ll
M llvm/test/Analysis/DependenceAnalysis/weak-zero-siv-addrec-wrap.ll
Log Message:
-----------
[DA] Remove calls to the GCD MIV test from `testSIV` (#187220)
This patch removes all invocations of the GCD MIV test in `testSIV`
function, specifically:
- If both the source and destination are addrecs, replace the call to
the GCD MIV test with the Exact SIV test. Generally, the Exact SIV test
has a narrower applicability than the GCD MIV test (both the source and
destination must be affine addrecs), while the former likely yields a
more precise result. Therefore, in this case, there's no reason to use
the GCD MIV test. This replacement also means that previously the Exact
SIV test was called conditionally (only when the Strong and Weak
Crossing SIV tests are not applicable), but now it will be called
unconditionally when both the source and destination are addrecs.
- If either the source or the destination is loop-invariant, simply
remove the call to the GCD MIV test without replacing it with anything.
In this case, the Weak Zero SIV test will be invoked, and part of that
test performs almost the same analysis as the GCD MIV test. Therefore,
the GCD MIV test should be redundant in nearly all cases.
This patch introduces two types of changes to the analysis results.
First, it fixes several correctness issues that were caused by defects
in the GCD MIV test. Second, it makes the analysis more precise in some
cases. This improvement comes from the fact that, when both the source
and destination are affine addrecs, the Exact SIV test is now invoked
unconditionally, whereas previously it was only invoked conditionally.
Commit: 23780ded7ae24ca07afe076a705e9c320131ea3e
https://github.com/llvm/llvm-project/commit/23780ded7ae24ca07afe076a705e9c320131ea3e
Author: Phoebe Wang <phoebe.wang at intel.com>
Date: 2026-03-30 (Mon, 30 Mar 2026)
Changed paths:
M llvm/lib/Target/X86/X86InstrInfo.cpp
M llvm/test/CodeGen/X86/apx/adc.ll
M llvm/test/CodeGen/X86/apx/add.ll
M llvm/test/CodeGen/X86/apx/and.ll
M llvm/test/CodeGen/X86/apx/cmov.ll
M llvm/test/CodeGen/X86/apx/imul.ll
M llvm/test/CodeGen/X86/apx/or.ll
M llvm/test/CodeGen/X86/apx/sbb.ll
M llvm/test/CodeGen/X86/apx/sub.ll
M llvm/test/CodeGen/X86/apx/xor.ll
Log Message:
-----------
[X86][APX] Fold NDD+Load to non-NDD when NDD memory variant is not preferred (#189222)
Commit: 7a78c3b079d43b084111ddf501a33ee67298befa
https://github.com/llvm/llvm-project/commit/7a78c3b079d43b084111ddf501a33ee67298befa
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-03-29 (Sun, 29 Mar 2026)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
Log Message:
-----------
[X86] Use EVT constructor instead of static_cast. NFC (#189051)
Commit: 3e015b89e8bd9c71f6bb1cf38747d2862f5d5a3d
https://github.com/llvm/llvm-project/commit/3e015b89e8bd9c71f6bb1cf38747d2862f5d5a3d
Author: wanglei <wanglei at loongson.cn>
Date: 2026-03-30 (Mon, 30 Mar 2026)
Changed paths:
A llvm/test/Transforms/VectorCombine/LoongArch/lit.local.cfg
A llvm/test/Transforms/VectorCombine/LoongArch/shuffle-identity-miscompile.ll
Log Message:
-----------
[NFC][test] Precommit test for pr188989 (#188667)
Precommit test for #188989.
This test case covers a scenario in the vector combine
foldShuffleToIdentity function where incorrect folding was caused when
different shuffle sequences shared the same initial Use *. This issue
may be due to cost model differences and currently reproduces only on
LoongArch for this test case.
Commit: 14e7dbd99a70258a0deb283785996f2e11be7e2b
https://github.com/llvm/llvm-project/commit/14e7dbd99a70258a0deb283785996f2e11be7e2b
Author: Weibo He <NewSigma at 163.com>
Date: 2026-03-30 (Mon, 30 Mar 2026)
Changed paths:
M clang/test/CodeGenCoroutines/coro-suspend-cleanups.cpp
M llvm/lib/Transforms/Coroutines/CoroFrame.cpp
M llvm/test/Transforms/Coroutines/coro-await-suspend-lower-invoke.ll
M llvm/test/Transforms/Coroutines/coro-await-suspend-lower.ll
M llvm/test/Transforms/Coroutines/coro-split-sink-lifetime-01.ll
Log Message:
-----------
[CoroSplit] Erase trivially dead allocas after spilling (#189295)
Erase these allocas so that they do not take up extra stack space at
-O0.
Close #57638
Commit: c963ce446c696482804d96fbed0679380413b55e
https://github.com/llvm/llvm-project/commit/c963ce446c696482804d96fbed0679380413b55e
Author: Zeyi Xu <mitchell.xu2 at gmail.com>
Date: 2026-03-30 (Mon, 30 Mar 2026)
Changed paths:
M clang-tools-extra/clang-tidy/readability/ImplicitBoolConversionCheck.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/test/clang-tidy/checkers/readability/implicit-bool-conversion.c
M clang-tools-extra/test/clang-tidy/checkers/readability/implicit-bool-conversion.cpp
Log Message:
-----------
[clang-tidy] Diagnose NULL macro expansions in implicit-bool-conversion (#188694)
The check can't find `NULL` from system headers, this is not the default
behaviour we want. This commit fixes the problem.
https://clang-tidy.godbolt.org/z/Exd4bzqaT
Related discussion in:
https://github.com/llvm/llvm-project/pull/188399#discussion_r2985381743
Commit: 75eae603ff90b83ad702acaf6a7a09cb978785b6
https://github.com/llvm/llvm-project/commit/75eae603ff90b83ad702acaf6a7a09cb978785b6
Author: Lang Hames <lhames at gmail.com>
Date: 2026-03-30 (Mon, 30 Mar 2026)
Changed paths:
M llvm/include/llvm/ExecutionEngine/Orc/LinkGraphLinkingLayer.h
M llvm/lib/ExecutionEngine/Orc/LinkGraphLinkingLayer.cpp
M llvm/unittests/ExecutionEngine/Orc/CMakeLists.txt
A llvm/unittests/ExecutionEngine/Orc/LinkGraphLinkingLayerTest.cpp
Log Message:
-----------
[ORC] LinkGraphLinkingLayer::registerDependencies improvements. (#189298)
This commit moves the bulk of
LinkGraphLinkingLayer::registerDependencies into a new static method,
LinkGraphLinkingLayer::calculateDepGroups, where the behavior can be
unit tested.
The new method returns a list of LinkGraphLinkingLayer::SymbolDepGroups:
```
struct SymbolDepGroup {
SmallVector<jitlink::Symbol*> Defs;
DenseSet<jitlink::Symbol*> Deps;
};
```
The existing registerDependencies method converts these into
orc::SymbolDependenceGroups for registration with the ExecutionSession.
The calculateDepGroups method uses a new algorithm for calculating
dependencies between symbols in the LinkGraph. As before, the goal is to
compute dependencies of non-locally-scoped symbols defined within the
graph on other non-locally-scoped symbols in the graph (whether defined
by the graph or external). It is sufficient to record the first
non-locally-scoped symbol defined for each block reached (since such
symbols will have their own dependencies reported, and all such symbols
for a given block will have the same dependencies). The new algorithm
uses SCCIterator to visit strongly connected components within the
subgraph formed by edges to "anonymous" blocks (i.e. blocks that do not
define any non-locally-scoped symbols). These are visited in reverse-DFS
order, allowing dependencies to be efficiently propagated.
This change results in a ~2x speedup when JIT-loading clang (as tested
on a 2023 MacBook Pro, 12-core M3 Pro, 18Gb).
Commit: 24e9bc774cf128e5c06cce5e97a78b0f4e75af2a
https://github.com/llvm/llvm-project/commit/24e9bc774cf128e5c06cce5e97a78b0f4e75af2a
Author: Weibo He <NewSigma at 163.com>
Date: 2026-03-30 (Mon, 30 Mar 2026)
Changed paths:
M clang/test/CodeGenCoroutines/coro-suspend-cleanups.cpp
M llvm/lib/Transforms/Coroutines/CoroFrame.cpp
M llvm/test/Transforms/Coroutines/coro-await-suspend-lower-invoke.ll
M llvm/test/Transforms/Coroutines/coro-await-suspend-lower.ll
M llvm/test/Transforms/Coroutines/coro-split-sink-lifetime-01.ll
Log Message:
-----------
Revert "[CoroSplit] Erase trivially dead allocas after spilling" (#189311)
I think I forgot to update the FrameData after erasing. I'll check it
locally.
Reverts llvm/llvm-project#189295
Commit: ac2dce0bf3b52787d2d9074eb70e2cb53117e4ef
https://github.com/llvm/llvm-project/commit/ac2dce0bf3b52787d2d9074eb70e2cb53117e4ef
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2026-03-30 (Mon, 30 Mar 2026)
Changed paths:
M llvm/utils/gn/secondary/llvm/unittests/ExecutionEngine/Orc/BUILD.gn
Log Message:
-----------
[gn build] Port 75eae603ff90
Commit: 0a01f09d04becfd7098ffe33b21a5b271edf5a07
https://github.com/llvm/llvm-project/commit/0a01f09d04becfd7098ffe33b21a5b271edf5a07
Author: Sergei Barannikov <barannikov88 at gmail.com>
Date: 2026-03-30 (Mon, 30 Mar 2026)
Changed paths:
M lldb/include/lldb/Breakpoint/BreakpointResolver.h
Log Message:
-----------
[lldb] Fix the return type of a function (NFC) (#189316)
The returned variable is of boolean type.
Commit: bbc515d115455b54e9e5864983f1d3ee331c2ec7
https://github.com/llvm/llvm-project/commit/bbc515d115455b54e9e5864983f1d3ee331c2ec7
Author: Minsoo Choo <minsoochoo0122 at proton.me>
Date: 2026-03-30 (Mon, 30 Mar 2026)
Changed paths:
M lldb/source/Plugins/DynamicLoader/FreeBSD-Kernel/DynamicLoaderFreeBSDKernel.cpp
Log Message:
-----------
[lldb][FreeBSDKernel] Add missing error checks in DynamicLoader (#189250)
Add extra guards in case a call to function fails. For example, the
result of `ReadMemory()` cannot be trusted when `error.Fail()` is true,
and this change ensures the code executes properly according to the
value of the error.
Signed-off-by: Minsoo Choo <minsoochoo0122 at proton.me>
Commit: 38f57bf3dfd7411975d40c5de418f78e607a7a01
https://github.com/llvm/llvm-project/commit/38f57bf3dfd7411975d40c5de418f78e607a7a01
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-03-30 (Mon, 30 Mar 2026)
Changed paths:
M clang/lib/AST/ByteCode/Interp.cpp
Log Message:
-----------
[clang][bytecode] Disable tailcalls on i386 (#189242)
Works around a build problem with GCC 15 reported in
https://github.com/llvm/llvm-project/pull/188419#issuecomment-4148497506
Commit: 032f36bdbc73b74c4e03bdd9b7e03e60979a0d31
https://github.com/llvm/llvm-project/commit/032f36bdbc73b74c4e03bdd9b7e03e60979a0d31
Author: Zeyi Xu <mitchell.xu2 at gmail.com>
Date: 2026-03-30 (Mon, 30 Mar 2026)
Changed paths:
M clang-tools-extra/clang-tidy/performance/CMakeLists.txt
R clang-tools-extra/clang-tidy/performance/FasterStringFindCheck.cpp
R clang-tools-extra/clang-tidy/performance/FasterStringFindCheck.h
M clang-tools-extra/clang-tidy/performance/PerformanceTidyModule.cpp
A clang-tools-extra/clang-tidy/performance/PreferSingleCharOverloadsCheck.cpp
A clang-tools-extra/clang-tidy/performance/PreferSingleCharOverloadsCheck.h
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/docs/clang-tidy/checks/list.rst
M clang-tools-extra/docs/clang-tidy/checks/performance/faster-string-find.rst
A clang-tools-extra/docs/clang-tidy/checks/performance/prefer-single-char-overloads.rst
R clang-tools-extra/test/clang-tidy/checkers/performance/faster-string-find.cpp
A clang-tools-extra/test/clang-tidy/checkers/performance/prefer-single-char-overloads.cpp
Log Message:
-----------
[clang-tidy] Rename performance-faster-string-find to performance-prefer-single-char-overloads (#186946)
Related discussion:
https://github.com/llvm/llvm-project/pull/182697#issuecomment-3986242476
Closes https://github.com/llvm/llvm-project/issues/186853
---------
Co-authored-by: Victor Chernyakin <chernyakin.victor.j at outlook.com>
Commit: e09b5895d2058b286512adc5361858d15dbdc43f
https://github.com/llvm/llvm-project/commit/e09b5895d2058b286512adc5361858d15dbdc43f
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2026-03-30 (Mon, 30 Mar 2026)
Changed paths:
M llvm/utils/gn/secondary/clang-tools-extra/clang-tidy/performance/BUILD.gn
Log Message:
-----------
[gn build] Port 032f36bdbc73
Commit: 17491d91301a9b5576f87120fda607d9e73b1009
https://github.com/llvm/llvm-project/commit/17491d91301a9b5576f87120fda607d9e73b1009
Author: Pavel Labath <pavel at labath.sk>
Date: 2026-03-30 (Mon, 30 Mar 2026)
Changed paths:
M lldb/include/lldb/Expression/ObjectFileJIT.h
M lldb/include/lldb/Symbol/ObjectFile.h
M lldb/include/lldb/lldb-private-interfaces.h
M lldb/source/Expression/ObjectFileJIT.cpp
M lldb/source/Plugins/ObjectContainer/BSD-Archive/ObjectContainerBSDArchive.cpp
M lldb/source/Plugins/ObjectContainer/BSD-Archive/ObjectContainerBSDArchive.h
M lldb/source/Plugins/ObjectContainer/Big-Archive/ObjectContainerBigArchive.cpp
M lldb/source/Plugins/ObjectContainer/Big-Archive/ObjectContainerBigArchive.h
M lldb/source/Plugins/ObjectContainer/Mach-O-Fileset/ObjectContainerMachOFileset.cpp
M lldb/source/Plugins/ObjectContainer/Mach-O-Fileset/ObjectContainerMachOFileset.h
M lldb/source/Plugins/ObjectContainer/Universal-Mach-O/ObjectContainerUniversalMachO.cpp
M lldb/source/Plugins/ObjectContainer/Universal-Mach-O/ObjectContainerUniversalMachO.h
M lldb/source/Plugins/ObjectFile/Breakpad/ObjectFileBreakpad.cpp
M lldb/source/Plugins/ObjectFile/Breakpad/ObjectFileBreakpad.h
M lldb/source/Plugins/ObjectFile/COFF/ObjectFileCOFF.cpp
M lldb/source/Plugins/ObjectFile/COFF/ObjectFileCOFF.h
M lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp
M lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.h
M lldb/source/Plugins/ObjectFile/JSON/ObjectFileJSON.cpp
M lldb/source/Plugins/ObjectFile/JSON/ObjectFileJSON.h
M lldb/source/Plugins/ObjectFile/Mach-O/ObjectFileMachO.cpp
M lldb/source/Plugins/ObjectFile/Mach-O/ObjectFileMachO.h
M lldb/source/Plugins/ObjectFile/Minidump/ObjectFileMinidump.cpp
M lldb/source/Plugins/ObjectFile/Minidump/ObjectFileMinidump.h
M lldb/source/Plugins/ObjectFile/PDB/ObjectFilePDB.cpp
M lldb/source/Plugins/ObjectFile/PDB/ObjectFilePDB.h
M lldb/source/Plugins/ObjectFile/PECOFF/ObjectFilePECOFF.cpp
M lldb/source/Plugins/ObjectFile/PECOFF/ObjectFilePECOFF.h
M lldb/source/Plugins/ObjectFile/XCOFF/ObjectFileXCOFF.cpp
M lldb/source/Plugins/ObjectFile/XCOFF/ObjectFileXCOFF.h
M lldb/source/Plugins/ObjectFile/wasm/ObjectFileWasm.cpp
M lldb/source/Plugins/ObjectFile/wasm/ObjectFileWasm.h
M lldb/source/Symbol/ObjectFile.cpp
Log Message:
-----------
[lldb] Remove data_offset arg from GetModuleSpecifications (#188978)
- it is always passed as zero
- a lot of plugins aren't using it correctly
- the data extractor class already has the capability to look at a
subset of bytes
Commit: 3f2e24726a49d4d7e53d9c9b61fe2e312706b347
https://github.com/llvm/llvm-project/commit/3f2e24726a49d4d7e53d9c9b61fe2e312706b347
Author: Owen Anderson <resistor at mac.com>
Date: 2026-03-30 (Mon, 30 Mar 2026)
Changed paths:
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/test/CodeGen/clear_cache.c
M llvm/include/llvm/IR/Intrinsics.td
M llvm/test/Bitcode/compatibility-3.6.ll
M llvm/test/Bitcode/compatibility-3.7.ll
M llvm/test/Bitcode/compatibility-3.8.ll
M llvm/test/Bitcode/compatibility-3.9.ll
M llvm/test/Bitcode/compatibility-4.0.ll
M llvm/test/Bitcode/compatibility-5.0.ll
M llvm/test/Bitcode/compatibility-6.0.ll
M llvm/test/Bitcode/compatibility.ll
Log Message:
-----------
[CHERI] Allow @llvm.clear_cache to accept pointers in address spaces other than 0. (#189283)
Co-Authored-by: Jessica Clarke <jrtc27 at jrtc27.com>
Commit: 3572b21dec19f509f598b456d8819a62ddbf7fac
https://github.com/llvm/llvm-project/commit/3572b21dec19f509f598b456d8819a62ddbf7fac
Author: Sam Parker <sam.parker at arm.com>
Date: 2026-03-30 (Mon, 30 Mar 2026)
Changed paths:
M llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyTargetTransformInfo.cpp
M llvm/test/CodeGen/WebAssembly/int-mac-reduction-loops.ll
M llvm/test/CodeGen/WebAssembly/partial-reduce-accumulate.ll
M llvm/test/CodeGen/WebAssembly/wide-simd-mul.ll
Log Message:
-----------
[WebAssembly] Lower extend v16i8 to v16i32 (#188936)
Split the input vector with an extend_low and high and then split the
results again with extend_low and high for a total of 6 instructions.
This is removes 3 shuffles and a couple of extends.
Commit: 656604093d62952dc80275a62763e1860ab56734
https://github.com/llvm/llvm-project/commit/656604093d62952dc80275a62763e1860ab56734
Author: jeanPerier <jperier at nvidia.com>
Date: 2026-03-30 (Mon, 30 Mar 2026)
Changed paths:
M flang/include/flang/Optimizer/Dialect/FIRType.h
M flang/lib/Lower/Bridge.cpp
M flang/lib/Optimizer/Dialect/FIRType.cpp
A flang/test/Lower/OpenACC/acc-data-operands-remapping-selector.f90
M flang/test/Lower/polymorphic.f90
M flang/test/Lower/select-type.f90
M flang/test/Lower/volatile-allocatable.f90
Log Message:
-----------
[flang] get rid of descriptor in scalar type is (#188762)
Select type lowering was keeping scalar selector as descriptors inside
TYPE IS for derived type, leading to a declare using a fir.box.
This is not the canonical representation for such variables that can be
tracked with a simple pointer. This code that is remapping variables
that appear in data operation in lowering was not expecting a
fir.declare to be emitted with fir.box for such entity (an assert was
hit in the added OpenACC test).
Align the lowering of derived type scalar selector with the handling of
intrinsic selector. While doing this, simplify the logic by using and
adding fir::BaseBoxAddr helpers to ensure that attributes such as
VOLATILE are correctly propagated (they matter more than keeping the
fir.ptr/fir.heap type that is not relevant for the selector that does
not have the POINTER/ALLOCATABLE attributes).
Commit: a4e6f495c3a804589593544aaa03554e72561ca5
https://github.com/llvm/llvm-project/commit/a4e6f495c3a804589593544aaa03554e72561ca5
Author: Sander de Smalen <sander.desmalen at arm.com>
Date: 2026-03-30 (Mon, 30 Mar 2026)
Changed paths:
M llvm/include/llvm/Analysis/TargetTransformInfo.h
M llvm/lib/Analysis/TargetTransformInfo.cpp
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/maxbandwidth-regpressure.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-add-sdot-i16-i32.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-chained.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-fdot-product.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-no-dotprod.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-sub-sdot.ll
Log Message:
-----------
[AArch64] More accurately model cost of partial reductions (#181707)
With #181706 using the cost-model to decide whether using partial
reductions is profitable, we need to more accurately represent the cost
of certain partial reduction operations:
* Reflect the fact that *MLALB/T instructions can be used for 16-bit ->
32-bit partial reductions (or *MLAL/MLAL2 for NEON).
* Calculate the cost of expanding the partial reduction in ISel for
reductions that don't have an explicit instruction, rather than
returning a random number. For sub-reductions we scale the cost to make
them slightly cheaper, so that they're still candidates for forming cdot
operations.
Commit: 25e9f130585b90c4682412b7b46e1db255d9e43c
https://github.com/llvm/llvm-project/commit/25e9f130585b90c4682412b7b46e1db255d9e43c
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-03-30 (Mon, 30 Mar 2026)
Changed paths:
M clang/lib/Driver/Driver.cpp
Log Message:
-----------
clang: Remove redundant size check on set of offload kinds (#189330)
Commit: 013c79269b7c693082b4699c681630982766ef53
https://github.com/llvm/llvm-project/commit/013c79269b7c693082b4699c681630982766ef53
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-03-30 (Mon, 30 Mar 2026)
Changed paths:
M clang/include/clang/Driver/ToolChain.h
M clang/lib/Driver/Driver.cpp
M clang/lib/Driver/ToolChain.cpp
M clang/lib/Driver/ToolChains/Clang.cpp
Log Message:
-----------
clang: Simplify OpenMP triple adjustment (#189265)
Previously this would find a list of offloading triples,
then later fill in the unknown components specifically for
OpenMP after the fact. Start normalizing the triples upfront,
before inserting into the set. Also stop special casing OpenMP
since there's no apparent reason to treat it differently from
other offload languages.
Also operate on the Triple rather than the string, and handle
the unset OS and environment separately.
Commit: 8a4f21048f5a395763fa127d9c42311a70610234
https://github.com/llvm/llvm-project/commit/8a4f21048f5a395763fa127d9c42311a70610234
Author: Ramkumar Ramachandra <artagnon at tenstorrent.com>
Date: 2026-03-30 (Mon, 30 Mar 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanUtils.cpp
M llvm/lib/Transforms/Vectorize/VPlanUtils.h
Log Message:
-----------
[VPlan] Generalize noalias-licm-check to replicate regions (NFC) (#187017)
In order to use the cannotHoistOrSinkWithNoAlias check in use-sites
after replicate regions are created, generalize it to work with
replicate regions.
Commit: 85446d41458319709333355745b8c8574c52d05f
https://github.com/llvm/llvm-project/commit/85446d41458319709333355745b8c8574c52d05f
Author: David Spickett <david.spickett at arm.com>
Date: 2026-03-30 (Mon, 30 Mar 2026)
Changed paths:
M lldb/source/Commands/CommandObjectPlugin.cpp
M lldb/source/Commands/CommandObjectProcess.cpp
M lldb/source/Commands/CommandObjectThread.cpp
M lldb/source/Interpreter/CommandInterpreter.cpp
Log Message:
-----------
[lldb] Use AppendMessageWithFormatv instead of AppendMessageWithFormat (#185634)
Part 4. This converts all the remaining simple uses (the ones that ended
with a newline).
What remains in tree are the outliers that expect multiple ending
newlines, or are building a message in pieces.
Commit: c3e7f98997508dc5177743401a7c97c0088a0555
https://github.com/llvm/llvm-project/commit/c3e7f98997508dc5177743401a7c97c0088a0555
Author: Ruoyu Qiu <cabbaken at outlook.com>
Date: 2026-03-30 (Mon, 30 Mar 2026)
Changed paths:
M llvm/lib/Analysis/DependenceAnalysis.cpp
M llvm/test/Analysis/DependenceAnalysis/weak-crossing-siv-overflow.ll
Log Message:
-----------
[DA] Fix overflow of calculation in weakCrossingSIVtest (#188450)
This patch fixes a correctness issue where integer overflow in the
upper bound calculation of weakCrossingSIVtest caused the pass to
incorrectly prove independence.
The previous logic used `SCEV::getMulExpr` to calculate
`2 * ConstCoeff * UpperBound` and compared it to `Delta` using
`isKnownPredicate`. In the presence of overflow, this could yield
unsafe results.
This change replaces the SCEV arithmetic with `ConstantRange` to
work around calculation overflows, ensures we conservatively assume
a dependence if the bounds cannot be proven safe.
---------
Signed-off-by: Ruoyu Qiu <cabbaken at outlook.com>
Commit: a7bc628e44e69b43fbaf135a569691bf09fc083f
https://github.com/llvm/llvm-project/commit/a7bc628e44e69b43fbaf135a569691bf09fc083f
Author: Hocky Yudhiono <hocky.yudhiono at gmail.com>
Date: 2026-03-30 (Mon, 30 Mar 2026)
Changed paths:
M mlir/lib/Dialect/Tosa/IR/TosaCanonicalizations.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaFolders.cpp
M mlir/test/Dialect/Tosa/canonicalize.mlir
M mlir/test/Dialect/Tosa/constant_folding.mlir
M mlir/test/Dialect/Tosa/tosa-layerwise-constant-fold.mlir
Log Message:
-----------
[mlir][tosa] Harden folds/canonicalizations for unranked and dynamic shapes (#188188)
This MR fixes #188187 and #187974. Tighten TOSA constant folding and
identity-style folds so they do not produce invalid or type-incorrect
results when the op’s result type is unranked, rank-dynamic, or
otherwise not a static `RankedTensorType`. Several paths previously
assumed ranked/static shapes or folded through to the operand without
checking that the result type matched the value being returned.
`DenseElementsAttr::get`, `SplatElementsAttr::get` and similar builders
need a static shape; folding with `tensor<*xT>` or dynamic dims must not
fabricate dense attributes with the wrong shape.
Returning the operand from a “no-op” fold is only valid when
`operand.getType() == op.getType()`; otherwise the folder would change
the IR’s type semantics (e.g. ranked → unranked). Which in the bigger
pipeline supposed to be handled by `-tosa-infer-shapes`
Assisted-by: CLion code completion, GPT 5.3 - Codex
---------
Co-authored-by: Sayan Saha <sayans at mathworks.com>
Commit: 00698678e404699f6c776679272a7e3392c46306
https://github.com/llvm/llvm-project/commit/00698678e404699f6c776679272a7e3392c46306
Author: Zhewen Yu <zhewenyu at amd.com>
Date: 2026-03-30 (Mon, 30 Mar 2026)
Changed paths:
M mlir/include/mlir/Dialect/Affine/Transforms/Passes.td
M mlir/include/mlir/Dialect/Affine/Transforms/Transforms.h
M mlir/lib/Dialect/Affine/Transforms/CMakeLists.txt
A mlir/lib/Dialect/Affine/Transforms/SimplifyAffineWithBounds.cpp
A mlir/test/Dialect/Affine/simplify-with-bounds.mlir
Log Message:
-----------
[mlir][affine] Add ValueBounds-based simplification for delinearize(linearize) pairs (#187245)
`affine.linearize_index` pairs
(`CancelDelinearizeOfLinearizeDisjointExactTail`) only match when basis
elements are exactly equal as `OpFoldResult` values. This means they
cannot simplify cases where dynamic basis products are semantically
equal but represented by different SSA values or affine expressions.
This patch adds a new pass `affine-simplify-with-bounds` with two
rewrite patterns that use `ValueBoundsConstraintSet` to prove equality
of basis products:
- **`SimplifyDelinearizeOfLinearizeDisjointManyToOneTail`**: matches
when multiple consecutive linearize dimensions have a product equal to a
single delinearize dimension (many-to-one).
- **`SimplifyDelinearizeOfLinearizeDisjointOneToManyTail`**: matches
when a single linearize dimension equals the product of multiple
consecutive delinearize dimensions (one-to-many).
Both patterns scan from the tail (innermost dimensions) and support
partial matching. Unmatched prefix dimensions are left as residual
linearize/delinearize operations.
Assisted-by: Cursor (Claude)
---------
Signed-off-by: Yu-Zhewen <zhewenyu at amd.com>
Commit: be94bfd615a20d8aa209c3ada8fecb8c5b94784d
https://github.com/llvm/llvm-project/commit/be94bfd615a20d8aa209c3ada8fecb8c5b94784d
Author: Ryotaro Kasuga <kasuga.ryotaro at fujitsu.com>
Date: 2026-03-30 (Mon, 30 Mar 2026)
Changed paths:
M llvm/lib/Analysis/DependenceAnalysis.cpp
M llvm/test/Analysis/DependenceAnalysis/weak-zero-siv-delta-signed-min.ll
Log Message:
-----------
[DA] Stop negating Delta in the Weak Zero SIV test (#188212)
This patch removes the variable `NewDelta`, which was calculated as the
negation of `Delta`, along with its uses. `NewDelta` is now referenced
in only one place, and that code is effectively dead because more
general analysis with ConstantRange is performed at an earlier stage.
Also the test using `NewDelta` is not correct when `Delta` is a signed
minimum value, as negating it yields the same value as original. This
patch also fixes the correctness issue in such a situation.
Commit: 475f71e8fa15ee71f99e450a0e1c90d3961005f9
https://github.com/llvm/llvm-project/commit/475f71e8fa15ee71f99e450a0e1c90d3961005f9
Author: divVerent <divVerent at gmail.com>
Date: 2026-03-30 (Mon, 30 Mar 2026)
Changed paths:
M clang/include/clang/Sema/ExternalSemaSource.h
M clang/include/clang/Sema/MultiplexExternalSemaSource.h
M clang/include/clang/Sema/Sema.h
M clang/include/clang/Serialization/ASTBitCodes.h
M clang/include/clang/Serialization/ASTReader.h
M clang/lib/Sema/MultiplexExternalSemaSource.cpp
M clang/lib/Sema/Sema.cpp
M clang/lib/Sema/SemaDecl.cpp
M clang/lib/Serialization/ASTReader.cpp
M clang/lib/Serialization/ASTWriter.cpp
A clang/test/PCH/pragma-redefine-extname.c
A clang/test/PCH/pragma-redefine-extname.h
M lldb/source/Plugins/ExpressionParser/Clang/ASTUtils.h
Log Message:
-----------
Serialize `#pragma redefine_extname` into precompiled headers. (#186755)
Also deserialize them back again on reading.
The implementation is based on the existing implementation of `#pragma
weak` serialization.
Fixes issue #186742.
---------
Co-authored-by: Chuanqi Xu <yedeng.yd at linux.alibaba.com>
Commit: fd7388d14083bb5094bce6a75444a37e424689d7
https://github.com/llvm/llvm-project/commit/fd7388d14083bb5094bce6a75444a37e424689d7
Author: divVerent <divVerent at gmail.com>
Date: 2026-03-30 (Mon, 30 Mar 2026)
Changed paths:
M clang/lib/Sema/SemaDecl.cpp
A clang/test/Sema/redefine_extname.cpp
Log Message:
-----------
`#pragma redefine_extname`: warn only if conflicting ID is at TU scope. (#188256)
As an example, this should keep warning:
```
static void foo();
```
because here, the identiifer `foo` won't be affected. In fact, it now
becomes (mostly) impossible to even declare anything later that would
get affected, thus the new definition is in active conflict with the
`#pragma`.
This however will not warn anymore:
```
namespace blargh {
static void foo();
}
```
Here the author definitely did not intend for the `#pragma` to be
matched, and as such, it is okay to not warn there.
Fixes cases where `#pragma redefine_extname` is used to intentionally
rename C names at global scope that are so common that they need
renaming to avoid linker side conflict with other compilation units,
such as `SHA256`, as any name common at outer scope is likely also
common in namespaces, classes, function locals, etc. and it would be
nice to be able to use the `#pragma redefine_extname` mechanism
specifically to create linker hygiene between compilation units even if
some of them actually also use the same name for their own thing in one
of those unambiguous scopes.
Warnings in the test case removed by the code change:
```
File .../clang/test/Sema/redefine_extname.cpp Line 30: #pragma redefine_extname is applicable to external C declarations only; not applied to function 'foo_nsfunc'
File .../clang/test/Sema/redefine_extname.cpp Line 32: #pragma redefine_extname is applicable to external C declarations only; not applied to variable 'foo_nsvar'
File .../clang/test/Sema/redefine_extname.cpp Line 44: #pragma redefine_extname is applicable to external C declarations only; not applied to function 'foo_classmethod'
File .../clang/test/Sema/redefine_extname.cpp Line 46: #pragma redefine_extname is applicable to external C declarations only; not applied to function 'foo_staticmethod'
File .../clang/test/Sema/redefine_extname.cpp Line 50: #pragma redefine_extname is applicable to external C declarations only; not applied to variable 'foo_staticmember'
File .../clang/test/Sema/redefine_extname.cpp Line 53: #pragma redefine_extname is applicable to external C declarations only; not applied to function 'foo_classmethod'
File .../clang/test/Sema/redefine_extname.cpp Line 54: #pragma redefine_extname is applicable to external C declarations only; not applied to function 'foo_staticmethod'
File .../clang/test/Sema/redefine_extname.cpp Line 55: #pragma redefine_extname is applicable to external C declarations only; not applied to variable 'foo_staticmember'
File .../clang/test/Sema/redefine_extname.cpp Line 99: #pragma redefine_extname is applicable to external C declarations only; not applied to variable 'foo_local'
File .../clang/test/Sema/redefine_extname.cpp Line 101: #pragma redefine_extname is applicable to external C declarations only; not applied to variable 'foo_staticlocal'
```
Addresses issue #187497.
Commit: f2a9b073acbcf1c40b72504e051177041370a823
https://github.com/llvm/llvm-project/commit/f2a9b073acbcf1c40b72504e051177041370a823
Author: Ryotaro Kasuga <kasuga.ryotaro at fujitsu.com>
Date: 2026-03-30 (Mon, 30 Mar 2026)
Changed paths:
M llvm/lib/Analysis/DependenceAnalysis.cpp
Log Message:
-----------
[DA] Consolidate the logic for checking overlap at the boundary (NFCI) (#189341)
In the Weak Crossing SIV test, there were two places where we checked
the dependency at the boundary, one is at the first iteration, and the
other is at the last iteration. Now the former can be merged into the
latter. There used to be an edge case when the coefficient is zero, and
we had an explicit check for that. This patch removes that check as
well, by moving the boundary check after the assertion that ensures the
(maybe negated) coefficient is positive.
Commit: d3f1e0dde0a1f40b4447a58744e2b7dd66028d37
https://github.com/llvm/llvm-project/commit/d3f1e0dde0a1f40b4447a58744e2b7dd66028d37
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-03-30 (Mon, 30 Mar 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp
M llvm/lib/Target/SPIRV/SPIRVPostLegalizer.cpp
M llvm/lib/Target/SPIRV/SPIRVUtils.cpp
A llvm/test/CodeGen/SPIRV/instructions/phi-aggregate-loop.ll
Log Message:
-----------
[SPIR-V] Fix aggregate PHI type mismatch in loops (#186086)
Commit: ccb64cb53e9fcee942a176c1f5a0b0b18e342c82
https://github.com/llvm/llvm-project/commit/ccb64cb53e9fcee942a176c1f5a0b0b18e342c82
Author: Michael Marjieh <99331190+mmarjieh at users.noreply.github.com>
Date: 2026-03-30 (Mon, 30 Mar 2026)
Changed paths:
M mlir/include/mlir/IR/BlockSupport.h
M mlir/include/mlir/IR/Value.h
M mlir/lib/IR/Value.cpp
Log Message:
-----------
[Value] Mark getOperandNumber as Const (#189267)
Commit: 0bb0c7db2bd158a7515ba9726bc27fe9acc368b6
https://github.com/llvm/llvm-project/commit/0bb0c7db2bd158a7515ba9726bc27fe9acc368b6
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-03-30 (Mon, 30 Mar 2026)
Changed paths:
M mlir/lib/Dialect/MPI/IR/MPIOps.cpp
Log Message:
-----------
[MLIR][MPI] Fix direct getRefMutable().assign() bypassing rewriter in FoldCast (#188943)
The FoldCast canonicalization pattern was calling
op.getRefMutable().assign(src) directly, bypassing the rewriter. This
violates the pattern API contract and causes fingerprint change failures
when
MLIR_ENABLE_EXPENSIVE_PATTERN_API_CHECKS is enabled. Wrap the
modification with b.modifyOpInPlace() to properly notify the rewriter of
the changes.
Assisted-by: Claude Code
Fix a failure present with MLIR_ENABLE_EXPENSIVE_PATTERN_API_CHECKS=ON.
Commit: 6c8782b347b56f8499d4d914052e7f819f8e9fab
https://github.com/llvm/llvm-project/commit/6c8782b347b56f8499d4d914052e7f819f8e9fab
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-03-30 (Mon, 30 Mar 2026)
Changed paths:
M mlir/lib/Dialect/Vector/Transforms/VectorDistribute.cpp
Log Message:
-----------
[MLIR][Vector] Fix direct operand.set() bypassing rewriter in WarpOpScfIfOp/ForOp (#188948)
In WarpOpScfIfOp and WarpOpScfForOp, the walk that updates users of
escaping values (after moving them to the inner WarpOp) was calling
operand.set() directly, bypassing the rewriter API. This causes the
MLIR_ENABLE_EXPENSIVE_PATTERN_API_CHECKS fingerprint check to fail.
Fix by wrapping the operand updates with rewriter.modifyOpInPlace().
Assisted-by: Claude Code
Fix a failure present with MLIR_ENABLE_EXPENSIVE_PATTERN_API_CHECKS=ON.
Commit: 2b4198540541cf8cebd5bf83d3546157961302c4
https://github.com/llvm/llvm-project/commit/2b4198540541cf8cebd5bf83d3546157961302c4
Author: Jim Lin <jim at andestech.com>
Date: 2026-03-30 (Mon, 30 Mar 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
Log Message:
-----------
[DAG] Fix incorrect ForSigned handling in computeConstantRange calls (#188889)
Fix two places where ForSigned was incorrectly passed to
computeConstantRange, causing wrong signed/unsigned range computation.
In computeConstantRangeIncludingKnownBits (DemandedElts overload),
the call omitted ForSigned, so Depth (unsigned) was implicitly
converted to bool for the ForSigned parameter. Introduced in
a6a66a4e6915.
In visitIMINMAX, the call always passed ForSigned=false, even when
folding SMAX/SMIN which query signed bounds from the resulting range.
Commit: 65cb5c3975e36dd4bc028baea4bed170b34aacc9
https://github.com/llvm/llvm-project/commit/65cb5c3975e36dd4bc028baea4bed170b34aacc9
Author: Jean-Michel Gorius <11683623+jmgorius at users.noreply.github.com>
Date: 2026-03-30 (Mon, 30 Mar 2026)
Changed paths:
M clang/include/clang/Basic/BuiltinsX86.td
M clang/lib/Headers/emmintrin.h
M clang/test/CodeGen/builtins-x86.c
Log Message:
-----------
[clang][x86] Fix the return type of the cvtpd2dq builtin (#189254)
The CVTPD2DQ instruction converts packed 64-bit floating-point values to
packed 32-bit signed integer values. This patch fixes the return type of
the corresponding builtin, which previously returned a vector of two
64-bit signed integers. The new behavior is in line with the return type
of the CVTTPD2DQ builtin.
Commit: e6c89e8d6ad779ac57b8b35f225f960757ef57d1
https://github.com/llvm/llvm-project/commit/e6c89e8d6ad779ac57b8b35f225f960757ef57d1
Author: Pengcheng Wang <wangpengcheng.pp at bytedance.com>
Date: 2026-03-30 (Mon, 30 Mar 2026)
Changed paths:
M llvm/lib/TableGen/Record.cpp
A llvm/test/TableGen/intrinsic-arginfo-error.td
Log Message:
-----------
[TableGen] Improve the error report of getElementAsRecord (#189302)
Commit: 4d3759d83b4e59077c6bdd3dcf88d726f7e5a8d6
https://github.com/llvm/llvm-project/commit/4d3759d83b4e59077c6bdd3dcf88d726f7e5a8d6
Author: Ricardo Jesus <rjj at nvidia.com>
Date: 2026-03-30 (Mon, 30 Mar 2026)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp
M llvm/test/Transforms/InstCombine/fmul.ll
Log Message:
-----------
[InstCombine] Fold X * ldexp(1.0, Y) -> ldexp(X, Y). (#188493)
This would avoid the FMUL in sequences such as
[these](https://godbolt.org/z/xhqfe5sb1).
Commit: c7908d3320b182023bf11cef2ff0de58985c2a12
https://github.com/llvm/llvm-project/commit/c7908d3320b182023bf11cef2ff0de58985c2a12
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-03-30 (Mon, 30 Mar 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
Log Message:
-----------
[SLP][NFC]Use passing-by-ref in the range based loop to prevent warnings/errors
Commit: e901b0295dae50a30ed736661ec86aded9693db9
https://github.com/llvm/llvm-project/commit/e901b0295dae50a30ed736661ec86aded9693db9
Author: Yevgeny Rouban <yrouban at gmail.com>
Date: 2026-03-30 (Mon, 30 Mar 2026)
Changed paths:
M llvm/lib/Transforms/Utils/BasicBlockUtils.cpp
M llvm/unittests/Transforms/Utils/BasicBlockUtilsTest.cpp
Log Message:
-----------
[BasicBlockUtils] Fixed LoopInfo update in UpdateAnalysisInformation() (#177147)
SplitLandingPadPredecessors() results in an irreducible loop
and makes LoopInfo invalid. Verification results in a crash:
Assertion `CB != OutsideLoopPreds[i] && "Loop has multiple entry
points!"' failed.
Created a new test with a broken LoopInfo after
SplitLandingPadPredecessors().
The test @split-lp-predecessors-test() after
SplitBlockPredecessors(catch_dest, { loop }, "", DT, LI) changes to
the following IR where the loop {%catch_dest} gets into irreducible
loop {%catch_dest.split-lp, %catch_dest}:
```
define void @split-lp-predecessors-test() personality ptr null {
entry:
invoke void @foo()
to label %loop unwind label %catch_dest.split-lp
loop: ; preds = %latch, %entry
invoke void @foo()
to label %latch unwind label %catch_dest1
latch: ; preds = %loop
br label %loop
catch_dest1: ; preds = %loop
%lpad = landingpad i32
cleanup
br label %catch_dest
catch_dest.split-lp: ; preds = %entry, %catch_dest
%lpad.split-lp = landingpad i32
cleanup
br label %catch_dest
catch_dest: ; preds = %catch_dest.split-lp, %catch_dest1
invoke void @foo()
to label %exit unwind label %catch_dest.split-lp
exit: ; preds = %catch_dest
ret void
}
```
Irreducible loops must be removed from LoopInfo.
When UpdateAnalysisInformation() detects an irreducible loop created
then the loop is erased from LoopInfo.
See the issue #163922 for details.
Commit: 7fb4f732f5dd30506d3e453b503ef1293d257a5b
https://github.com/llvm/llvm-project/commit/7fb4f732f5dd30506d3e453b503ef1293d257a5b
Author: Michael Kruse <llvm-project at meinersbur.de>
Date: 2026-03-30 (Mon, 30 Mar 2026)
Changed paths:
M polly/include/polly/ScopInfo.h
M polly/lib/Analysis/ScopBuilder.cpp
A polly/test/ScopInfo/issue187922.ll
M polly/test/ScopInfo/user_provided_assumptions.ll
Log Message:
-----------
[Polly] Avoid __builtin_assume circular context reasoning (#189350)
The conversion of SCEVs to isl::pw_aff may only be valid under
conditions that have to be confirmed via RTC. This also happens with
__builtin_assume. These user-added assumptions are then added to
ScopInfo::Context. However, the conclusion in ScopInfo::Context is then
also used to simplify ("gist") its own RTC preconditions in
ScopInfo::AssumedContext and ScopInfo::InvalidContext away.
Avoid by adding user assumptions with preconditions to
ScopInfo::DefinedBehaviourContext instead, which is not used to simplify
AssumedContext/InvalidContext.
Fixes #187922
Thanks @thapgua for the report
Commit: 53e7f9ada45a71e1cecd14c5ce8dc441a9257501
https://github.com/llvm/llvm-project/commit/53e7f9ada45a71e1cecd14c5ce8dc441a9257501
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-03-30 (Mon, 30 Mar 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
Log Message:
-----------
[VPlan] Generalize header-phi detection in VPPhi::execute. (NFC) (#189352)
Generalize the header-phi detection in VPPhi::execute to use VPDT.
This is currently NFC, but is needed to use VPPhi also for dissolving
replicate regions (https://github.com/llvm/llvm-project/pull/186252).
Split off from approved https://github.com/llvm/llvm-project/pull/186252
as suggested.
PR: https://github.com/llvm/llvm-project/pull/189352
Commit: 4991abe0791dfec380cf73ce37c83e81453038ac
https://github.com/llvm/llvm-project/commit/4991abe0791dfec380cf73ce37c83e81453038ac
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-03-30 (Mon, 30 Mar 2026)
Changed paths:
M mlir/test/lib/Dialect/Shard/TestReshardingPartition.cpp
Log Message:
-----------
[MLIR] Apply clang-tidy fixes for llvm-qualified-auto in TestReshardingPartition.cpp (NFC)
Commit: b50d5ad5074c6149ea3e45fa5cde862f8e84557e
https://github.com/llvm/llvm-project/commit/b50d5ad5074c6149ea3e45fa5cde862f8e84557e
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-03-30 (Mon, 30 Mar 2026)
Changed paths:
M mlir/lib/Conversion/LLVMCommon/TypeConverter.cpp
Log Message:
-----------
[MLIR] Apply clang-tidy fixes for llvm-else-after-return in TypeConverter.cpp (NFC)
Commit: dfc866ca0298c45ffc4b7f08d761183dea2512f2
https://github.com/llvm/llvm-project/commit/dfc866ca0298c45ffc4b7f08d761183dea2512f2
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-03-30 (Mon, 30 Mar 2026)
Changed paths:
M mlir/lib/Dialect/SparseTensor/Transforms/SparseTensorRewriting.cpp
Log Message:
-----------
[MLIR] Apply clang-tidy fixes for bugprone-argument-comment in SparseTensorRewriting.cpp (NFC)
Commit: 1ac60ce8a0ca890b3c69489e5ffab64344e05972
https://github.com/llvm/llvm-project/commit/1ac60ce8a0ca890b3c69489e5ffab64344e05972
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-03-30 (Mon, 30 Mar 2026)
Changed paths:
M mlir/lib/Dialect/Arith/Transforms/ShardingInterfaceImpl.cpp
Log Message:
-----------
[MLIR] Apply clang-tidy fixes for performance-unnecessary-copy-initialization in ShardingInterfaceImpl.cpp (NFC)
Commit: 25fee9568419e0a72d6807623eae72c2689329ff
https://github.com/llvm/llvm-project/commit/25fee9568419e0a72d6807623eae72c2689329ff
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-03-30 (Mon, 30 Mar 2026)
Changed paths:
M mlir/lib/Target/SPIRV/Deserialization/Deserializer.cpp
Log Message:
-----------
[MLIR] Apply clang-tidy fixes for modernize-loop-convert in Deserializer.cpp (NFC)
Commit: 4a773b9f35fc56d3768a7bacad6bd54e3735190a
https://github.com/llvm/llvm-project/commit/4a773b9f35fc56d3768a7bacad6bd54e3735190a
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-03-30 (Mon, 30 Mar 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp
M llvm/lib/Target/SPIRV/SPIRVTargetMachine.cpp
M llvm/test/CodeGen/SPIRV/llc-pipeline.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/memset.ll
A llvm/test/CodeGen/SPIRV/loop-unroll-nonshader.ll
M llvm/test/CodeGen/SPIRV/pointers/phi-chain-types.ll
Log Message:
-----------
[SPIR-V] Emit OpLoopMerge for non-shader targets without SPV_INTEL_unstructured_loop_controls extension (#187519)
`OpLoopMerge` emission was not supported due to the fact that spirv
structurizer is not being run for non-shader targets.
After enabling support for `SPV_INTEL_unstructured_loop_controls` in
https://github.com/llvm/llvm-project/pull/178799 is started to preserve
some information about unstructured control flow. This PR is intended to
enable support for `OpLoopMerge` without extension.
Note: changes in `llvm/test/CodeGen/SPIRV/pointers/phi-chain-types.ll`
and `llvm/test/CodeGen/SPIRV/llvm-intrinsics/memset.ll` are due to the
fact that loop layout has changed after `loop-simplify` pass enabling
Commit: 58f702177ca00907a0daeacddb473b03d6cc2917
https://github.com/llvm/llvm-project/commit/58f702177ca00907a0daeacddb473b03d6cc2917
Author: Benjamin Kramer <benny.kra at googlemail.com>
Date: 2026-03-30 (Mon, 30 Mar 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[bazel] Add missing dependency for 1bb03026b6aa332863de65a7d245c4ecf3a99645
Commit: b3fbabbcde9d01e46490d16212cea4ebf4d25eb4
https://github.com/llvm/llvm-project/commit/b3fbabbcde9d01e46490d16212cea4ebf4d25eb4
Author: Benjamin Kramer <benny.kra at googlemail.com>
Date: 2026-03-30 (Mon, 30 Mar 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[bazel] Add missing dependency for 00698678e404699f6c776679272a7e3392c46306
Commit: 764457a6e9ca1949482a7914fb928b482d0785b2
https://github.com/llvm/llvm-project/commit/764457a6e9ca1949482a7914fb928b482d0785b2
Author: FYLGQ <799648409 at qq.com>
Date: 2026-03-30 (Mon, 30 Mar 2026)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
M llvm/lib/Transforms/InstCombine/InstCombineInternal.h
A llvm/test/Transforms/InstCombine/fcmp-select-sign.ll
Log Message:
-----------
[InstCombine] Fold cmp of select-of-constants via truth table (#186591)
This patch adds a generic InstCombine fold for:
cmp pred (select C1, TV1, FV1), (select C2, TV2, FV2)
when all select arms are constants and the comparison can be
constant-folded for all four combinations of C1/C2. The fold computes a
4-entry truth table and synthesizes a boolean expression using
createLogicFromTable.
This generalizes patterns like:
fcmp une (select C1, -1.0, 1.0), (select C2, -1.0, 1.0) -> xor C1, C2
The transform bails out for mixed vector results like:
<i1 true, i1 false>
alive2: https://alive2.llvm.org/ce/z/JQ_Poy
Fixes #186558
Commit: 713c70d7ef50400e3533be05b4f08dc675dc012b
https://github.com/llvm/llvm-project/commit/713c70d7ef50400e3533be05b4f08dc675dc012b
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-03-30 (Mon, 30 Mar 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanUnroll.cpp
M llvm/test/Transforms/LoopVectorize/VPlan/dissolve-replicate-regions.ll
M llvm/test/Transforms/LoopVectorize/VPlan/interleave-and-scalarize-only.ll
M llvm/test/Transforms/LoopVectorize/cast-induction.ll
M llvm/test/Transforms/LoopVectorize/pr45679-fold-tail-by-masking.ll
M llvm/test/Transforms/LoopVectorize/tail-folding-vectorization-factor-1.ll
Log Message:
-----------
[VPlan] Handle regions with live-outs and scalar VF when replicating. (#186252)
Extend intial unrolling of replicate regions
(https://github.com/llvm/llvm-project/pull/170212) to support live-outs,
if the VF is scalar.
This allows adding the logic needed to explicitly unroll, and replacing
VPPredPhiInsts with regular scalar VPPhi, without yet having to worry
about packing values into vector phis. This will be done in a follow-up
change, which means all replicate regions will be fully dissolved.
PR: https://github.com/llvm/llvm-project/pull/186252
Commit: 6caec7ecdba8b3accd73a1170c7962b9bf5bd195
https://github.com/llvm/llvm-project/commit/6caec7ecdba8b3accd73a1170c7962b9bf5bd195
Author: Mariusz Sikora <mariusz.sikora at amd.com>
Date: 2026-03-30 (Mon, 30 Mar 2026)
Changed paths:
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.tanh.ll
Log Message:
-----------
[AMDGPU] Add tanh tests for gfx13 (#188240)
Commit: 7e58b06fa4ac68f161b13afdcc0133f86eaea15b
https://github.com/llvm/llvm-project/commit/7e58b06fa4ac68f161b13afdcc0133f86eaea15b
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-03-30 (Mon, 30 Mar 2026)
Changed paths:
M clang/lib/Driver/Driver.cpp
M clang/test/Driver/hip-binding.hip
Log Message:
-----------
clang: Fix warnings with multiple offload arch args (#189329)
Fix regression after ab885fdf5f67726ef564c34087e813f2ca861f5c.
Apparently driver tests do not enforce there are no warnings.
Oddly, I need to use -Werror for the specific error. If I use
just -Werror, I get an error that the -Werror is unused.
Commit: 10b49bc56988b32d240e4bd74ca3c790eed65ecd
https://github.com/llvm/llvm-project/commit/10b49bc56988b32d240e4bd74ca3c790eed65ecd
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-03-30 (Mon, 30 Mar 2026)
Changed paths:
M clang/include/clang/Basic/OffloadArch.h
M clang/lib/Basic/OffloadArch.cpp
M clang/lib/Driver/Driver.cpp
Log Message:
-----------
clang: Return Triple from OffloadArchToTriple instead of a string (#189343)
Also stop bothering to call normalizeOffloadTriple. This was
produced by code which should always produce normalized triples.
Commit: 79a7b57a443021ed05d19abeb1496be7059ac971
https://github.com/llvm/llvm-project/commit/79a7b57a443021ed05d19abeb1496be7059ac971
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-03-30 (Mon, 30 Mar 2026)
Changed paths:
M mlir/lib/Dialect/MemRef/IR/MemRefOps.cpp
M mlir/test/Dialect/MemRef/canonicalize.mlir
Log Message:
-----------
[mlir][memref] Fix invalid folds in ReinterpretCastOpConstantFolder for negative constants (#189237)
`ReinterpretCastOpConstantFolder` could fold `memref.reinterpret_cast`
ops whose offset or sizes contain negative constants (e.g. `-1 :
index`).
- A negative constant size passed into `ReinterpretCastOp::create`
reaches
`MemRefType::get`, which asserts that all static dimension sizes are
non-negative, causing a crash.
- A negative constant offset produces an op with a static negative
offset,
which the `ViewLikeInterface` verifier then rejects ("expected offsets
to
be non-negative").
Fix by skipping the fold when any constant size or the offset is
negative.
Negative strides are intentionally left foldable: they are valid in
strided MemRef layouts (e.g. for reverse iteration) and neither
`MemRefType::get` nor `ViewLikeInterface` places a non-negativity
constraint on strides.
Fixes https://github.com/llvm/llvm-project/issues/188407
Assisted-by: Claude Code
Commit: 16651d240e522d20fb12856ef9e52f2b51e76408
https://github.com/llvm/llvm-project/commit/16651d240e522d20fb12856ef9e52f2b51e76408
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2026-03-30 (Mon, 30 Mar 2026)
Changed paths:
M libcxx/utils/ci/images/libcxx_runners.txt
Log Message:
-----------
[libc++] Bump libc++ runners to include python-venv (#189008)
Commit: 1e99c9e4c7e82c8417e4bdb0d1cb3b86e6640c6c
https://github.com/llvm/llvm-project/commit/1e99c9e4c7e82c8417e4bdb0d1cb3b86e6640c6c
Author: Austin Hudson <austinhudson at protonmail.ch>
Date: 2026-03-30 (Mon, 30 Mar 2026)
Changed paths:
M lld/COFF/InputFiles.cpp
R lld/test/COFF/embed-bitcode.test
Log Message:
-----------
[lld][COFF] Restore `lto-embed-bitcode` and `-fembed-bitcode` Bitcode Embedding Features (#188398)
Removes the patches introduced by #150897 which broke LTO embed
documented features for creating whole-program-bitcode representations
of executables, used in production analysis/rewriting toolsets. This was
a documented feature available up until 21.1.8 broken by 22.x release.
This previously allowed the users to have a whole-program-bitcode
section `.llvmbc` embedded inside of the final executable.
Commit: 13cd7a29e8951787e2ef68b1920d080984628baf
https://github.com/llvm/llvm-project/commit/13cd7a29e8951787e2ef68b1920d080984628baf
Author: khaki3 <47756807+khaki3 at users.noreply.github.com>
Date: 2026-03-30 (Mon, 30 Mar 2026)
Changed paths:
M flang/include/flang/Lower/OpenACC.h
M flang/lib/Lower/Bridge.cpp
M flang/lib/Lower/OpenACC.cpp
A flang/test/Lower/OpenACC/Todo/acc-goto-multi-level-exit.f90
M flang/test/Lower/OpenACC/acc-unstructured.f90
Log Message:
-----------
[flang][OpenACC] Generalize cross-region GOTO exit handling for all ACC region ops (#187613)
When a `GoTo` inside an ACC region (`acc.loop`, `acc.data`,
`acc.parallel`, etc.) targets a label outside that region, the lowering
generated an illegal cross-region `cf.br`. This caused MLIR verification
failures or stack overflows in `runRegionDCE`'s recursive
`propagateLiveness`.
This patch addresses the issue with a generalized approach:
- Add `genOpenACCRegionExitBranch` helper that detects cross-region
branches from any ACC region op and generates the appropriate terminator
(`acc.yield` for compute/loop ops, `acc.terminator` for data ops). The
helper verifies that `parentOp` is an ACC operation, so it does not
interfere with branches inside `scf.execute_region` or other non-ACC
regions.
- In `genBranch`, when a cross-region exit from an ACC region is
detected, store a unique exit ID into a selector variable and generate
the region terminator. After the ACC op, a jump table dispatches to the
correct target based on the selector. This correctly handles GOTOs that
skip intermediate code between the loop end and the target label.
- Emit a TODO diagnostic for GOTOs that cross multiple nested ACC region
boundaries.
- Fix `acc.data` creation when the construct has no data clauses but
contains unstructured control flow: skip the early return in
`genACCDataOp` so the `acc.data` region is created and blocks are
properly managed.
Commit: 298404d2de82504f2ed13358781baed245abb1d3
https://github.com/llvm/llvm-project/commit/298404d2de82504f2ed13358781baed245abb1d3
Author: Eugene Epshteyn <eepshteyn at nvidia.com>
Date: 2026-03-30 (Mon, 30 Mar 2026)
Changed paths:
A flang/test/Lower/Intrinsics/product-kind-10.f90
M flang/test/Lower/Intrinsics/product.f90
M flang/test/Lower/Intrinsics/random.f90
M flang/test/Lower/Intrinsics/real.f90
M flang/test/Lower/Intrinsics/repeat.f90
M flang/test/Lower/Intrinsics/reshape.f90
Log Message:
-----------
[flang][NFC] Converted five tests from old lowering to new lowering (part 39) (#188386)
Tests converted from test/Lower/Intrinsics: product.f90, random.f90,
real.f90, repeat.f90, reshape.f90
Commit: f08b2fefe84d0098c9f1cbb6d1688142884663de
https://github.com/llvm/llvm-project/commit/f08b2fefe84d0098c9f1cbb6d1688142884663de
Author: Max Graey <maxgraey at gmail.com>
Date: 2026-03-30 (Mon, 30 Mar 2026)
Changed paths:
M llvm/include/llvm/ADT/APInt.h
M llvm/lib/Support/APInt.cpp
Log Message:
-----------
[Support][APint] Introduce and use isPowerOf2SlowCase instead countPopulationSlowCase for slow path (#189257)
In most cases `APint::isPowerOf2` returns false, but
`countPopulationSlowCase` always has `O(N)` complexity specifically for
the most common case, so I added `isPowerOf2SlowCase` method with an
early loop exit which should help a lot for most typical scenario.
Commit: 2566734adf4cbd92c34d7541c2ec2a6a629f763a
https://github.com/llvm/llvm-project/commit/2566734adf4cbd92c34d7541c2ec2a6a629f763a
Author: Luke Lau <luke at igalia.com>
Date: 2026-03-30 (Mon, 30 Mar 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVCodeGenPrepare.cpp
M llvm/test/CodeGen/RISCV/riscv-codegenprepare.ll
A llvm/test/Transforms/PhaseOrdering/RISCV/any-of-vectorization.ll
A llvm/test/Transforms/PhaseOrdering/RISCV/lit.local.cfg
Log Message:
-----------
[RISCV] Handle freeze in vp.merge widening codegen prepare (#189346)
This fixes #189335. Previously we used to widen i1 vp.merges that were
used in AnyOf reduction patterns from the loop vectorizer to i8. This
improved codegen because RVV doesn't have support for tail undisturbed
mask instructions, so i1 vp.merges are expanded into a vid.v + compare
sequence. Widening it to i8 allows a single vmerge.vim to be used
instead.
The pattern used to look like this, where the loop vectorizer emitted a
freeze after the reduction:
vector.body:
...
%3 = call <vscale x 4 x i1> @llvm.vp.merge.nxv4i1(<vscale x 4 x i1> %2,
<vscale x 4 x i1> splat (i1 true), <vscale x 4 x i1> %vec.phi, i32 %0)
...
br i1 %5, label %middle.block, label %vector.body
for.cond.cleanup.loopexit: ; preds = %middle.block
%6 = call i1 @llvm.vector.reduce.or.nxv4i1(<vscale x 4 x i1> %3)
%7 = freeze i1 %6
br label %for.cond.cleanup
But a recent change in InstCombiner now causes the freeze to be hoisted
in between the reduction and the vp.merge, breaking the existing
pattern:
vector.body:
...
%3 = call <vscale x 4 x i1> @llvm.vp.merge.nxv4i1(<vscale x 4 x i1> %2,
<vscale x 4 x i1> splat (i1 true), <vscale x 4 x i1> %vec.phi, i32 %0)
%.fr = freeze <vscale x 4 x i1> %3
...
br i1 %5, label %middle.block, label %vector.body
for.cond.cleanup.loopexit:
%6 = call i1 @llvm.vector.reduce.or.nxv4i1(<vscale x 4 x i1> %.fr)
br label %for.cond.cleanup
This patch teaches the transform to handle the freeze. We need to do the
change when visiting the freeze instruction otherwise we invalidate the
make_early_inc_range iterator.
Commit: 63cb3e55e7f1d0bc7609f2fcbad0516e9eff32b7
https://github.com/llvm/llvm-project/commit/63cb3e55e7f1d0bc7609f2fcbad0516e9eff32b7
Author: Marina Taylor <marina_taylor at apple.com>
Date: 2026-03-30 (Mon, 30 Mar 2026)
Changed paths:
M llvm/lib/Transforms/ObjCARC/DependencyAnalysis.cpp
A llvm/test/Transforms/ObjCARC/sink-past-atomic.ll
Log Message:
-----------
[ObjCARC] Don't sink objc_retain past atomic writes (#184113)
The atomic may cause another thread to objc_release the pointer, so
consider these instructions as potentially decrementing refcounts.
This patch is a synthesis of several AI models' outputs, as well as work
by David Kilzer.
Co-authored-by: David Kilzer <ddkilzer at apple.com>
Assisted-by: claude
rdar://152185192
Commit: b857481e6b2554a76062288cfed06a0ed9951263
https://github.com/llvm/llvm-project/commit/b857481e6b2554a76062288cfed06a0ed9951263
Author: Jonathan Thackray <jonathan.thackray at arm.com>
Date: 2026-03-30 (Mon, 30 Mar 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64SystemOperands.td
M llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp
M llvm/lib/Target/AArch64/Utils/AArch64BaseInfo.h
Log Message:
-----------
[AArch64][llvm] Rewrite the TLBI multiclass to be clearer (NFC) (#186451)
The `tlbi` multiclass is really doing four jobs at once: base TLBI,
synthesized nXS, optional TLBIP, and synthesized TLBIP nXS. Also,
`needsreg` and `optreg` are really just a 3-state operand policy in
disguise. Likewise, the PLBI multiclass has this same issue.
Change `needsreg` and `optreg` into a combined enum-alike, so it's
clearer whether the instruction takes no register operand, a required
register operand or an optional register operand.
This improves on my original change 66e8270e8. Further work to
improve this code is in #187400.
Commit: 7382a993b4e0d597d1354173100f51adcf207145
https://github.com/llvm/llvm-project/commit/7382a993b4e0d597d1354173100f51adcf207145
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-03-30 (Mon, 30 Mar 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
Log Message:
-----------
[DAG] SimplifyDemandedBits - limit BITCAST -> FGETSIGN fold to custom/legal scalar SimplifyDemandedBits cases (#189363)
All of the non-i32 zero_extend codepath is unaffected by this
Pulled out of the discussion on #189129
Commit: 9a8c018081383f71e9f2f013dfea2fd26620aade
https://github.com/llvm/llvm-project/commit/9a8c018081383f71e9f2f013dfea2fd26620aade
Author: jeanPerier <jperier at nvidia.com>
Date: 2026-03-30 (Mon, 30 Mar 2026)
Changed paths:
M flang/include/flang/Lower/OpenACC.h
M flang/include/flang/Optimizer/Dialect/FIRAttr.h
M flang/include/flang/Optimizer/Dialect/FIRAttr.td
M flang/include/flang/Optimizer/OpenACC/Support/FIROpenACCTypeInterfaces.h
M flang/include/flang/Optimizer/OpenACC/Support/FIROpenACCUtils.h
M flang/lib/Lower/OpenACC.cpp
M flang/lib/Optimizer/OpenACC/Support/FIROpenACCTypeInterfaces.cpp
M flang/lib/Optimizer/OpenACC/Support/FIROpenACCUtils.cpp
A flang/test/Lower/OpenACC/acc-firstprivate-optional.f90
M mlir/include/mlir/Dialect/OpenACC/OpenACC.h
A mlir/include/mlir/Dialect/OpenACC/OpenACCAttributes.td
M mlir/include/mlir/Dialect/OpenACC/OpenACCOps.td
M mlir/include/mlir/Dialect/OpenACC/OpenACCTypeInterfaces.td
A mlir/include/mlir/Dialect/OpenACC/OpenACCVariableInfo.h
M mlir/lib/Dialect/OpenACC/IR/OpenACC.cpp
M mlir/lib/Dialect/OpenACC/Transforms/ACCImplicitData.cpp
M mlir/test/lib/Dialect/OpenACC/TestRecipePopulate.cpp
Log Message:
-----------
[mlir][acc] add VariableInfo attribute to thread language specific information about privatized variables (#186368)
Add a new acc::VariableInfoAttr attribute that can be extended and implemented by
language dialects to carry language specific information about variables that is
not reflected into the MLIR type system and is needed in the implementation
of the init/copy/destroy APIs.
A new genPrivateVariableInfo API is added to the MappableTypeInterface to generate
such attribute from an mlir::Value for the host variable.
The use case and motivation is the Fortran OPTIONAL attribute. This patch adds
a new fir::OpenACCFortranVariableInfoAtt that implements the acc::VariableInfoAttr
to carry the OPTIONAL information around.
Commit: 6ae395a8758da8642421fc48233f1029ca530e33
https://github.com/llvm/llvm-project/commit/6ae395a8758da8642421fc48233f1029ca530e33
Author: lntue <lntue at google.com>
Date: 2026-03-30 (Mon, 30 Mar 2026)
Changed paths:
M libc/shared/math/nexttoward.h
M libc/shared/math/nexttowardbf16.h
M libc/shared/math/nexttowardf.h
M libc/shared/math/nexttowardf16.h
M libc/test/shared/shared_math_constexpr_test.cpp
M libc/test/shared/shared_math_test.cpp
Log Message:
-----------
[libc][NFC] Guard long double type in shared_math_tests. (#189373)
Skip long double tests when long double is double-double.
Also adjust constant literals.
Commit: 2cff8d52b7c5425d16674519b664b41116dc9af2
https://github.com/llvm/llvm-project/commit/2cff8d52b7c5425d16674519b664b41116dc9af2
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2026-03-30 (Mon, 30 Mar 2026)
Changed paths:
M .github/workflows/libcxx-build-containers.yml
Log Message:
-----------
[libc++] Don't upload Docker image tarballs as artifacts (#188845)
These steps fail because the tarballs are too large, so we might as well
just not do it.
Commit: aa22fca59a4d541def13f18a496d4ca62f239adb
https://github.com/llvm/llvm-project/commit/aa22fca59a4d541def13f18a496d4ca62f239adb
Author: Xinlong Chen <xinlongchen at tencent.com>
Date: 2026-03-30 (Mon, 30 Mar 2026)
Changed paths:
M llvm/include/llvm/CodeGen/SelectionDAG.h
M llvm/include/llvm/CodeGen/TargetLowering.h
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/unittests/Target/AArch64/AArch64SelectionDAGTest.cpp
Log Message:
-----------
[DAG] Add initial version of SelectionDAG::computeKnownFPClass (#188790)
This patch adds an initial skeleton for `SelectionDAG::computeKnownFPClass`.
The initial version includes:
- DemandedElts wrapper and max depth early-out
- `ConstantFPSDNode` and `BUILD_VECTOR` handling
- `TargetLowering::computeKnownFPClassForTargetNode` virtual hook for backend extensions
Initial test coverage for constant scalars, BUILD_VECTOR, and max depth
early-out is added in `AArch64SelectionDAGTest.cpp`.
closes #175571
Commit: c7706be4bf06ca53ffcddcc96dacb4b6c4ac2782
https://github.com/llvm/llvm-project/commit/c7706be4bf06ca53ffcddcc96dacb4b6c4ac2782
Author: Simon Tatham <simon.tatham at arm.com>
Date: 2026-03-30 (Mon, 30 Mar 2026)
Changed paths:
A compiler-rt/lib/builtins/arm/crt_endian.h
R compiler-rt/lib/builtins/arm/endian.h
Log Message:
-----------
[compiler-rt][ARM] Rename endian.h to crt_endian.h (#189336)
Apparently on macOS there's a system header file also called
arm/endian.h, and another system header #includes it with "" rather than
<>, so that this compiler-rt header accidentally shadows it. Worked
around by prefixing "crt" to the name.
No changes are needed except the rename, because the planned functions
that use this header are still under review.
Commit: b75c1d1163e237b1f671bd259d9c693936c548ca
https://github.com/llvm/llvm-project/commit/b75c1d1163e237b1f671bd259d9c693936c548ca
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-03-30 (Mon, 30 Mar 2026)
Changed paths:
M clang/lib/AST/ByteCode/Interp.h
Log Message:
-----------
[clang][bytecode] Disable preservenone attribute on clang19+asan (#189377)
This better not break anything else.
Commit: 3c1b9f278dae46d150e7b5be96dd0575d6901463
https://github.com/llvm/llvm-project/commit/3c1b9f278dae46d150e7b5be96dd0575d6901463
Author: Max Graey <maxgraey at gmail.com>
Date: 2026-03-30 (Mon, 30 Mar 2026)
Changed paths:
M llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
Log Message:
-----------
[WebAssembly][NFC] use getOneBitSet instead init + shifting for APint (#188552)
This is valid due to `ShiftAmt < BitWidth` which is ensured by early
`ShiftAmt.uge(MaxValidShift)` testing.
Commit: 5e7c66013bce8916d976355f5455e771d3bbcff4
https://github.com/llvm/llvm-project/commit/5e7c66013bce8916d976355f5455e771d3bbcff4
Author: Brian Cain <brian.cain at oss.qualcomm.com>
Date: 2026-03-30 (Mon, 30 Mar 2026)
Changed paths:
M compiler-rt/lib/xray/xray_hexagon.cpp
M compiler-rt/lib/xray/xray_interface.cpp
M compiler-rt/lib/xray/xray_trampoline_hexagon.S
M llvm/lib/Target/Hexagon/HexagonAsmPrinter.cpp
M llvm/test/CodeGen/Hexagon/xray-pred-ret.ll
M llvm/test/CodeGen/Hexagon/xray.ll
Log Message:
-----------
[Hexagon][XRay] Fix sled layout and trampoline to preserve retaddr (#188784)
The Hexagon XRay sled was 5 words (20 bytes) and the patched sequence
clobbered r31 (the link register) via callr without saving it first.
When the trampoline returned, the instrumented function's own allocframe
would then save the wrong return address, causing a crash or misrouted
return.
Expand the sled to 7 words (28 bytes) and wrap the call with
allocframe(#0)/deallocframe so the caller's r31:30 are preserved across
the trampoline call.
Detailed fixes:
- HexagonAsmPrinter: emit 6 nop words after the jump (7 words total)
- xray_hexagon.cpp: patch allocframe(#0) as first word, immext+r7 (func
ID), immext+r6 (trampoline), callr r6, deallocframe; write the first
word last for atomicity
- xray_trampoline_hexagon.S: complete rewrite -- properly load and
dereference the global handler pointer, save/restore r0-r5 and r31, add
stack frame with correct 8-byte alignment, add jumpr r31 to actually
return from trampolines
- xray_interface.cpp: update Hexagon cSledLength from 20 to 28
- Update lit tests for 6-nop sled
Commit: 8254cc9e574f4b2092065dc15f39babc522166c2
https://github.com/llvm/llvm-project/commit/8254cc9e574f4b2092065dc15f39babc522166c2
Author: Max Graey <maxgraey at gmail.com>
Date: 2026-03-30 (Mon, 30 Mar 2026)
Changed paths:
M llvm/lib/Support/APInt.cpp
M llvm/unittests/ADT/APIntTest.cpp
Log Message:
-----------
[APInt] Add fast path for APInt::urem if RHS is power of 2 (#189245)
Commit: a33acdb0b2dca00db08630050b10b09a7546235a
https://github.com/llvm/llvm-project/commit/a33acdb0b2dca00db08630050b10b09a7546235a
Author: Brian Cain <brian.cain at oss.qualcomm.com>
Date: 2026-03-30 (Mon, 30 Mar 2026)
Changed paths:
M compiler-rt/cmake/Modules/AllSupportedArchDefs.cmake
M compiler-rt/lib/gwp_asan/common.h
Log Message:
-----------
[compiler-rt] Enable GWP-ASan for Hexagon (#188410)
Add Hexagon to ALL_GWP_ASAN_SUPPORTED_ARCH, add struct layout
assertions.
Commit: 3481129c492de131330d2103432427dfc78e373d
https://github.com/llvm/llvm-project/commit/3481129c492de131330d2103432427dfc78e373d
Author: Ramkumar Ramachandra <artagnon at tenstorrent.com>
Date: 2026-03-30 (Mon, 30 Mar 2026)
Changed paths:
M llvm/include/llvm/Analysis/ScalarEvolutionPatternMatch.h
Log Message:
-----------
[SCEVPatternMatch] Strip redundant const_cast (NFC) (#189382)
Commit: 8f4f515898e2664ef8b4c1988b444cfd041f3fa5
https://github.com/llvm/llvm-project/commit/8f4f515898e2664ef8b4c1988b444cfd041f3fa5
Author: Brian Cain <brian.cain at oss.qualcomm.com>
Date: 2026-03-30 (Mon, 30 Mar 2026)
Changed paths:
M lld/ELF/Arch/Hexagon.cpp
M lld/ELF/Relocations.cpp
M lld/ELF/Relocations.h
M lld/ELF/Target.h
M lld/ELF/Writer.cpp
M lld/test/ELF/hexagon-thunk-range-gdplt.s
M lld/test/ELF/hexagon-tls-gd-nonpreemptible.s
A lld/test/ELF/hexagon-tls-gd-plt-direct.s
M lld/test/ELF/hexagon-tls-gd-xform.s
Log Message:
-----------
[lld][Hexagon] Fix TLS GD PLT to only create PLT entry for __tls_get_addr (#180297)
Previously, R_HEX_GD_PLT_* relocations would create PLT entries for TLS
symbols like 'foo' in addition to __tls_get_addr.
This fix skips NEEDS_PLT on TLS symbols with R_HEX_GD_PLT_*, creates
__tls_get_addr symbol earlier with NEEDS_PLT, changes
hexagonTLSSymbolUpdate to only rebind relocations.
Also a test for the edge case where a GD_PLT relocation directly
references __tls_get_addr which previously caused a crash due to
duplicate PLT entry creation.
---------
Co-authored-by: Fangrui Song <i at maskray.me>
Commit: 306e86be5108f70c8d54f52d95daec6b8614c7e6
https://github.com/llvm/llvm-project/commit/306e86be5108f70c8d54f52d95daec6b8614c7e6
Author: Jonathan Thackray <jonathan.thackray at arm.com>
Date: 2026-03-30 (Mon, 30 Mar 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64SystemOperands.td
M llvm/test/MC/AArch64/armv8.7a-xs.s
M llvm/test/MC/AArch64/armv9.5a-tlbiw.s
M llvm/test/MC/AArch64/armv9a-tlbip.s
Log Message:
-----------
[AArch64][llvm] Separate TLBI-only feature gating from TLBIP aliases (#187400)
Commit: 7356e367d8d4b76de04ded81afa1f1cc68d58668
https://github.com/llvm/llvm-project/commit/7356e367d8d4b76de04ded81afa1f1cc68d58668
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-03-30 (Mon, 30 Mar 2026)
Changed paths:
M llvm/lib/Transforms/Instrumentation/MemProfUse.cpp
R llvm/test/Transforms/PGOProfile/memprof-inline-call-stacks.ll
Log Message:
-----------
Revert "[MemProf] Dump inline call stacks as optimization remarks (#188678)"
This reverts commit 502b5e0bea1282006b7ba74b7e4c2df3eea4dd12.
Broken on 32-bit.
Commit: 58419354a8b3a3f981507d13c3324511eb4833ca
https://github.com/llvm/llvm-project/commit/58419354a8b3a3f981507d13c3324511eb4833ca
Author: Steven Perron <stevenperron at google.com>
Date: 2026-03-30 (Mon, 30 Mar 2026)
Changed paths:
M clang/lib/Sema/HLSLBuiltinTypeDeclBuilder.cpp
M clang/lib/Sema/HLSLBuiltinTypeDeclBuilder.h
M clang/lib/Sema/HLSLExternalSemaSource.cpp
M clang/test/CodeGenHLSL/resources/Texture2D-Gather.hlsl
A clang/test/CodeGenHLSL/resources/Texture2D-Mips.hlsl
M clang/test/CodeGenHLSL/resources/Texture2D-Sample.hlsl
M clang/test/CodeGenHLSL/resources/Texture2D-SampleBias.hlsl
M clang/test/CodeGenHLSL/resources/Texture2D-SampleCmp.hlsl
M clang/test/CodeGenHLSL/resources/Texture2D-SampleGrad.hlsl
M clang/test/CodeGenHLSL/resources/Texture2D-SampleLevel.hlsl
M clang/test/CodeGenHLSL/resources/Texture2D-default-explicit-binding.hlsl
M clang/test/CodeGenHLSL/resources/Texture2D-default.hlsl
M clang/test/CodeGenHLSL/resources/Texture2D-shorthand-contexts.hlsl
A clang/test/SemaHLSL/Texture2D-mips-errors.hlsl
Log Message:
-----------
[HLSL] Implement Texture2D::mips[][] (#186143)
We implement the Textur2D::mips[][] method. We follow the design in DXC.
There is a new member called `mips` with type mips_type. The member will
contain a copy of the handle for the texture.
The type `mips_type` will have a member function `operator[]` that takes
a level, and returns a `mips_slice_type`. The slice will contain the
handle and the level. It also has an operator[] member function that
take a coordinate. It will do a load from the handle with the level and
coordinate, and return that value.
Assisted-by: Gemini
Commit: 4d7339a14df8519b48f236ea5d6439d04f00eec2
https://github.com/llvm/llvm-project/commit/4d7339a14df8519b48f236ea5d6439d04f00eec2
Author: Sergei Barannikov <barannikov88 at gmail.com>
Date: 2026-03-30 (Mon, 30 Mar 2026)
Changed paths:
M lldb/include/lldb/Interpreter/OptionArgParser.h
M lldb/include/lldb/lldb-private-types.h
M lldb/source/Plugins/Process/Utility/RegisterContextWindows_i386.cpp
M lldb/source/Plugins/Process/Utility/RegisterContextWindows_x86_64.cpp
M lldb/unittests/Utility/ArchSpecTest.cpp
Log Message:
-----------
[lldb] Fix a circular include dependency (NFC) (#188931)
`lldb-private-types.h` includes `lldb-private.h`, which in turn includes
`lldb-private-types.h`. Because of that, `lldb-public.h` included by
`lldb-private.h` after `lldb-private-types.h` is not actually included.
The practical consequence of this is that types defined in
`lldb-public-types.h` (for example, `addr_t` needed downstream) are not
available in `lldb-private-types.h`.
Fix this by "including what you use", which is `lldb-types.h`.
Commit: 7feb816ed07f1a6ac79de71b8d66c7eff6e7e922
https://github.com/llvm/llvm-project/commit/7feb816ed07f1a6ac79de71b8d66c7eff6e7e922
Author: Anshul Nigham <nigham at google.com>
Date: 2026-03-30 (Mon, 30 Mar 2026)
Changed paths:
M llvm/include/llvm/CodeGen/GlobalISel/Combiner.h
M llvm/lib/CodeGen/GlobalISel/Combiner.cpp
M llvm/lib/Target/AArch64/GISel/AArch64O0PreLegalizerCombiner.cpp
M llvm/lib/Target/AArch64/GISel/AArch64PostLegalizerCombiner.cpp
M llvm/lib/Target/AArch64/GISel/AArch64PostLegalizerLowering.cpp
M llvm/lib/Target/AArch64/GISel/AArch64PreLegalizerCombiner.cpp
M llvm/lib/Target/AMDGPU/AMDGPUPostLegalizerCombiner.cpp
M llvm/lib/Target/AMDGPU/AMDGPUPreLegalizerCombiner.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegBankCombiner.cpp
M llvm/lib/Target/Mips/MipsPostLegalizerCombiner.cpp
M llvm/lib/Target/Mips/MipsPreLegalizerCombiner.cpp
M llvm/lib/Target/RISCV/GISel/RISCVO0PreLegalizerCombiner.cpp
M llvm/lib/Target/RISCV/GISel/RISCVPostLegalizerCombiner.cpp
M llvm/lib/Target/RISCV/GISel/RISCVPreLegalizerCombiner.cpp
M llvm/lib/Target/SPIRV/SPIRVPreLegalizerCombiner.cpp
M llvm/lib/Target/WebAssembly/GISel/WebAssemblyPostLegalizerCombiner.cpp
M llvm/lib/Target/WebAssembly/GISel/WebAssemblyPreLegalizerCombiner.cpp
M llvm/lib/Target/X86/GISel/X86PostLegalizerCombiner.cpp
M llvm/lib/Target/X86/GISel/X86PreLegalizerCombiner.cpp
Log Message:
-----------
[NFC] Removes unused Combiner dependency on TargetPassConfig (#188365)
This enables NewPM ports since it removes multiple pass dependencies on
`TargetPassConfig` which we don't want to port to the NewPM.
It looks like no derived classes of Combiner actually use this pointer,
and it is also unused in the Combiner class.
Commit: 1f0638cd3e53b394e31adb214a6ab12348cb722e
https://github.com/llvm/llvm-project/commit/1f0638cd3e53b394e31adb214a6ab12348cb722e
Author: Charles Zablit <c_zablit at apple.com>
Date: 2026-03-30 (Mon, 30 Mar 2026)
Changed paths:
M lldb/include/lldb/Host/windows/ProcessLauncherWindows.h
M lldb/source/Host/windows/ProcessLauncherWindows.cpp
M lldb/test/API/tools/lldb-dap/launch/TestDAP_launch_stdio_redirection_and_console.py
M lldb/test/API/tools/lldb-dap/restart/TestDAP_restart_console.py
M lldb/test/API/tools/lldb-dap/runInTerminal/TestDAP_runInTerminal.py
M lldb/tools/lldb-dap/Handler/RequestHandler.cpp
M lldb/tools/lldb-dap/JSONUtils.cpp
M lldb/tools/lldb-dap/RunInTerminal.cpp
M lldb/tools/lldb-dap/RunInTerminal.h
M lldb/tools/lldb-dap/tool/Options.td
M lldb/tools/lldb-dap/tool/lldb-dap.cpp
Log Message:
-----------
[lldb-dap][windows] add integratedTerminal and externalTerminal support (#174635)
Commit: 644b74f926a2267fc52557f0e99d56376e0ec6a9
https://github.com/llvm/llvm-project/commit/644b74f926a2267fc52557f0e99d56376e0ec6a9
Author: Alexis Engelke <engelke at in.tum.de>
Date: 2026-03-30 (Mon, 30 Mar 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/ADCE.cpp
Log Message:
-----------
[ADCE][NFC] Use FindFunctionBackedges (#189405)
Slightly less efficient than it could be, because the backedges are
materialized, but more efficient than using a DenseMap.
Pull Request: https://github.com/llvm/llvm-project/pull/189405
Commit: 443e766b4003bf1bce9728b7cc24ecba9bd79788
https://github.com/llvm/llvm-project/commit/443e766b4003bf1bce9728b7cc24ecba9bd79788
Author: Nathan Gauër <brioche at google.com>
Date: 2026-03-30 (Mon, 30 Mar 2026)
Changed paths:
M llvm/docs/LangRef.rst
M llvm/include/llvm/IR/Attributes.td
M llvm/include/llvm/IR/IntrinsicInst.h
M llvm/include/llvm/IR/Intrinsics.td
M llvm/lib/IR/Verifier.cpp
A llvm/test/Assembler/structured-alloca.ll
A llvm/test/Verifier/structured-alloca-bad.ll
Log Message:
-----------
[IR] Add @llvm.structured.alloca (#186811)
This instruction is an alternative for the `alloca` instruction when
targeting logical targets like DXIL/SPIR-V.
This instruction allocates some memory, but the exact size of the
allocation is not known at the IR level. Only some equivalence can be
determined.
Commit adds docs, instruction declaration, and IR verifier testing.
Related to:
https://discourse.llvm.org/t/rfc-adding-logical-structured-alloca/
Commit: 1d48c3bc014d1aa92ca7c5f2d217c6d0aa44b553
https://github.com/llvm/llvm-project/commit/1d48c3bc014d1aa92ca7c5f2d217c6d0aa44b553
Author: Hassnaa Hamdi <hassnaa.hamdi at arm.com>
Date: 2026-03-30 (Mon, 30 Mar 2026)
Changed paths:
M llvm/include/llvm/Transforms/Vectorize/LoopVectorizationLegality.h
M llvm/lib/Transforms/Vectorize/LoopVectorizationLegality.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
Log Message:
-----------
[NFC][LV] Separate control-flow masking from tail-folding masking. (#169509)
- Differentiate between operations that need masking because they are in
a conditionally-executed block, and operations that need masking because
the loop is tail-folded (predicated).
- This is needed for future work when we need to support a predicated
vector epilogue in combination with an unpredicated vector body.
- This is first patch in a series.
- See #181401 for the follow-on work.
Commit: 55c149c0768f51974489f1787ac798cc82eb93f7
https://github.com/llvm/llvm-project/commit/55c149c0768f51974489f1787ac798cc82eb93f7
Author: Alexis Engelke <engelke at in.tum.de>
Date: 2026-03-30 (Mon, 30 Mar 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/ADCE.cpp
Log Message:
-----------
[ADCE][NFC] Use block numbers instead of DenseMap (#189406)
Straight-forward replacement of the DenseMap with a vector. Data
structure cleanup will follow as separate patch.
Commit: acb3d81a932c094ee1e71bca6aa60e69cac43c65
https://github.com/llvm/llvm-project/commit/acb3d81a932c094ee1e71bca6aa60e69cac43c65
Author: Sergei Barannikov <barannikov88 at gmail.com>
Date: 2026-03-30 (Mon, 30 Mar 2026)
Changed paths:
M lldb/include/lldb/Target/Thread.h
M lldb/include/lldb/Target/ThreadPlanStepUntil.h
M lldb/source/API/SBThread.cpp
M lldb/source/Commands/CommandObjectThread.cpp
M lldb/source/Target/Thread.cpp
M lldb/source/Target/ThreadPlanStepUntil.cpp
Log Message:
-----------
[lldb] Use ArrayRef instead of pointer+size (NFC) (#189186)
While here:
* Move the constructor to the public section. Almost all ThreadPlan
classes have public constructors.
* Use `std::make_shared()`. It is modern and more efficient.
Commit: ad4d4c0f63258bfeec2064d4fe6bec1ad9575aba
https://github.com/llvm/llvm-project/commit/ad4d4c0f63258bfeec2064d4fe6bec1ad9575aba
Author: Nishant Patel <nishant.b.patel at intel.com>
Date: 2026-03-30 (Mon, 30 Mar 2026)
Changed paths:
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUSgToWiDistributeExperimental.cpp
M mlir/lib/Dialect/XeGPU/Utils/XeGPUUtils.cpp
M mlir/test/Dialect/XeGPU/sg-to-wi-experimental-unit.mlir
Log Message:
-----------
[MLIR][XeGPU] Support leading unit dims in vector.multi_reduction in sg to wi pass (#188767)
This PR adds support for transforming vector.multi_reduction with
vectors > rank 2d with leading unit dims
Commit: 146d604f9a74084c26df784d964578b81d672120
https://github.com/llvm/llvm-project/commit/146d604f9a74084c26df784d964578b81d672120
Author: Alexis Engelke <engelke at in.tum.de>
Date: 2026-03-30 (Mon, 30 Mar 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/ADCE.cpp
Log Message:
-----------
[ADCE][NFC] Cleanup data structures (#189407)
Cleanup used data structures:
- Replace InstInfo map with a SmallPtrSet, the pointer to the BlockInfo
is used only once and can be easily (and cheaply) accessed using the
block number.
- Remove "cached" fields from block data structures -- there is no
measurable performance benefit, but these fields do need to be
initialized and consume memory, so remove them. In all cases, the
information is trivially accessible from the instruction or block.
Pull Request: https://github.com/llvm/llvm-project/pull/189407
Commit: 4c0e9800e942e3fcc15b23a8c156d6f286ed6e00
https://github.com/llvm/llvm-project/commit/4c0e9800e942e3fcc15b23a8c156d6f286ed6e00
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-03-30 (Mon, 30 Mar 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
M llvm/lib/Target/SPIRV/SPIRVLegalizerInfo.cpp
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/signed_arithmetic_overflow.ll
Log Message:
-----------
[SPIR-V] Lower G_SADDO and G_SSUBO in legalizer (#189031)
Use generic lowering for G_SADDO and G_SSUBO gMIR instructions
Commit: 58a0d48dcc0f67b5f64cf0111b04ca660571ba75
https://github.com/llvm/llvm-project/commit/58a0d48dcc0f67b5f64cf0111b04ca660571ba75
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-03-30 (Mon, 30 Mar 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[Bazel] Port 9a8c018081383f71e9f2f013dfea2fd26620aade
Commit: 7f3f4c90e5f3dd373cd0d8c60bad2ee4a66ea1b4
https://github.com/llvm/llvm-project/commit/7f3f4c90e5f3dd373cd0d8c60bad2ee4a66ea1b4
Author: Akimasa Watanuki <mencotton0410 at gmail.com>
Date: 2026-03-30 (Mon, 30 Mar 2026)
Changed paths:
M clang/test/CIR/CodeGen/clear-cache.c
Log Message:
-----------
[CIR][NFC] Fix clear-cache test after #189283 (#189379)
Update `clang/test/CIR/CodeGen/clear-cache.c` to match the overloaded
`llvm.clear_cache.p0` intrinsic spelling introduced by #189283.
Commit: 0151d563249713b133681e90eaa9637be1bb23f7
https://github.com/llvm/llvm-project/commit/0151d563249713b133681e90eaa9637be1bb23f7
Author: Steven Perron <stevenperron at google.com>
Date: 2026-03-30 (Mon, 30 Mar 2026)
Changed paths:
M clang/test/SemaHLSL/Texture2D-mips-errors.hlsl
Log Message:
-----------
[HLSL] Fix up Texture2D-mips-errors test (#189089)
The Texture2D-mips-errors test was supposed to test for an error when
the mips
types are used as templates. It was initially disabled because of a
crash. On further investigation, the crash was related to int2(0,0), and
not the mips type.
Follow-up issue for the int2(0,0) crash: #189086
Fixes #188556
<!-- branch-stack-start -->
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Commit: bbef10d9f149b2755db9482e449bb97273686a50
https://github.com/llvm/llvm-project/commit/bbef10d9f149b2755db9482e449bb97273686a50
Author: Alexis Engelke <engelke at in.tum.de>
Date: 2026-03-30 (Mon, 30 Mar 2026)
Changed paths:
M llvm/include/llvm/CodeGen/TargetLowering.h
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/CodeGen/TargetLoweringBase.cpp
Log Message:
-----------
[CodeGen][NFC] Compute MaximumLegalStoreInBits just once (#189355)
Instead of iterating over all value types per basic block, pre-compute
the TLI-specific value once when constructing the TLI.
Commit: c35ec8326bd62c2c3686dfafd3ef77afce0a80f8
https://github.com/llvm/llvm-project/commit/c35ec8326bd62c2c3686dfafd3ef77afce0a80f8
Author: Demetrius Kanios <demetrius at kanios.net>
Date: 2026-03-30 (Mon, 30 Mar 2026)
Changed paths:
A llvm/test/CodeGen/WebAssembly/call-wasm64.ll
M llvm/test/CodeGen/WebAssembly/call.ll
Log Message:
-----------
[WebAssembly] Add `call-wasm64.ll` to test subset of `call.ll` on Wasm64. NFC (#188693)
Adds tests from `call.ll` to run for `wasm64` where codegen might differ
(namely indirect calls; i32 vs i64 pointers).
Split from #180649
Commit: 2334330bd937ff0b42db902d9943717879f13d93
https://github.com/llvm/llvm-project/commit/2334330bd937ff0b42db902d9943717879f13d93
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2026-03-30 (Mon, 30 Mar 2026)
Changed paths:
M flang/lib/Optimizer/Transforms/CUDA/CUFGPUToLLVMConversion.cpp
M flang/test/Fir/CUDA/cuda-shared-to-llvm.mlir
Log Message:
-----------
[flang][cuda] Imply zero offset when not provided (#189421)
Commit: f4d1745ab31d77f6782690be6e4d41c8f0435b2c
https://github.com/llvm/llvm-project/commit/f4d1745ab31d77f6782690be6e4d41c8f0435b2c
Author: vangthao95 <vang.thao at amd.com>
Date: 2026-03-30 (Mon, 30 Mar 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.lds.direct.load.mir
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.lds.direct.load.ll
Log Message:
-----------
AMDGPU/GlobalISel: RegBankLegalize rules for lds_direct_load (#189134)
Commit: 27e3c43d743313a4d9d6617893561b69c2f2e2f0
https://github.com/llvm/llvm-project/commit/27e3c43d743313a4d9d6617893561b69c2f2e2f0
Author: vangthao95 <vang.thao at amd.com>
Date: 2026-03-30 (Mon, 30 Mar 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.global.load.lds.err.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.global.load.lds.gfx950.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.global.load.lds.ll
Log Message:
-----------
AMDGPU/GlobalISel: RegBankLegalize rules for global_load_lds (#189135)
Commit: c32d670757b81aefd3acf3c228667a82d9237e97
https://github.com/llvm/llvm-project/commit/c32d670757b81aefd3acf3c228667a82d9237e97
Author: vangthao95 <vang.thao at amd.com>
Date: 2026-03-30 (Mon, 30 Mar 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.ds.ordered.add.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.ds.ordered.swap.mir
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.ordered.add-errors.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.ordered.add.gfx10.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.ordered.add.gfx11.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.ordered.add.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.ordered.swap.ll
Log Message:
-----------
AMDGPU/GlobalISel: RegBankLegalize rules for ds_ordered_add/swap (#189137)
Commit: 75814307221558d6f3dc4555e75e57c94c6ec85a
https://github.com/llvm/llvm-project/commit/75814307221558d6f3dc4555e75e57c94c6ec85a
Author: Alexis Engelke <engelke at in.tum.de>
Date: 2026-03-30 (Mon, 30 Mar 2026)
Changed paths:
M clang/lib/CodeGen/CGCleanup.cpp
M clang/lib/CodeGen/CGException.cpp
M clang/lib/CodeGen/CGStmt.cpp
M clang/lib/CodeGen/CodeGenFunction.cpp
M clang/lib/CodeGen/CodeGenFunction.h
M llvm/include/llvm/IR/BasicBlock.h
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
M llvm/lib/FuzzMutate/RandomIRBuilder.cpp
M llvm/lib/IR/BasicBlock.cpp
M llvm/lib/IR/DIBuilder.cpp
M llvm/lib/Transforms/Scalar/LICM.cpp
M llvm/lib/Transforms/Scalar/SimpleLoopUnswitch.cpp
M llvm/lib/Transforms/Scalar/StructurizeCFG.cpp
M llvm/lib/Transforms/Utils/AMDGPUEmitPrintf.cpp
M llvm/lib/Transforms/Utils/Local.cpp
M llvm/unittests/IR/CFGBuilder.cpp
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
Log Message:
-----------
[IR] Require well-formed IR for BasicBlock::getTerminator (#189416)
BasicBlock::getTerminator() is frequently called on valid IR, yet the
function has to check that the last instruction is in fact a terminator,
even in release builds. This check can only be optimized away when the
instruction is dereferenced.
Therefore, introduce the functions hasTerminator() and
getTerminatorOrNull() as replacement and require (assert) that
getTerminator() always returns a valid terminator. As a side effect,
this forces explicit expression of intent at call sites when unfinished
basic blocks should be supported.
Commit: 2f0118895b3b38c0f0eb06eeb3d3282d0c927897
https://github.com/llvm/llvm-project/commit/2f0118895b3b38c0f0eb06eeb3d3282d0c927897
Author: vangthao95 <vang.thao at amd.com>
Date: 2026-03-30 (Mon, 30 Mar 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.ds.append.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.ds.consume.mir
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.append.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.consume.ll
Log Message:
-----------
AMDGPU/GlobalISel: RegBankLegalize rules for ds_append/ds_consume (#189143)
Commit: 96f223c3b7e8e0fd3a54ed2501d1b2a35b0039db
https://github.com/llvm/llvm-project/commit/96f223c3b7e8e0fd3a54ed2501d1b2a35b0039db
Author: Shivam Kunwar <physhivam at gmail.com>
Date: 2026-03-30 (Mon, 30 Mar 2026)
Changed paths:
A llvm/test/DebugInfo/X86/implicit-pointer-isel.ll
Log Message:
-----------
[DebugInfo] Verify DW_OP_LLVM_implicit_pointer survives ISel (#187641)
PR 1 - https://github.com/llvm/llvm-project/pull/186763 ([DebugInfo]
Lower DW_OP_LLVM_implicit_pointer to DWARF#186763)
RFC -
https://discourse.llvm.org/t/rfc-implementing-dw-op-implicit-pointer-support-in-llvm/90217
---------
Co-authored-by: Shivam Kunwar <phyBrackets at users.noreply.github.com>
Commit: c4462a2de0325367e41f45b28c72fb278a3f3037
https://github.com/llvm/llvm-project/commit/c4462a2de0325367e41f45b28c72fb278a3f3037
Author: Justice Adams <jadams23 at apple.com>
Date: 2026-03-30 (Mon, 30 Mar 2026)
Changed paths:
M .ci/green-dragon/lldb-ubuntu.groovy
Log Message:
-----------
[green dragon] add lld to LLVM_ENABLE_PROJECTS for ubuntu (#189419)
Commit: 35a1961287994f73f416c7f54e73b6fa93737ed8
https://github.com/llvm/llvm-project/commit/35a1961287994f73f416c7f54e73b6fa93737ed8
Author: vangthao95 <vang.thao at amd.com>
Date: 2026-03-30 (Mon, 30 Mar 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.sdot4.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.sdot8.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.udot4.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.udot8.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.dot4.f32.ll
Log Message:
-----------
AMDGPU/GlobalISel: RegBankLegalize rules for dot products (#189110)
Commit: d17296d013dc22c98cec4f6103efb640900d8bdd
https://github.com/llvm/llvm-project/commit/d17296d013dc22c98cec4f6103efb640900d8bdd
Author: Roy Shi <royitaqi at users.noreply.github.com>
Date: 2026-03-30 (Mon, 30 Mar 2026)
Changed paths:
M llvm/include/llvm/DebugInfo/GSYM/FileWriter.h
M llvm/lib/DebugInfo/GSYM/FileWriter.cpp
M llvm/lib/Support/DataExtractor.cpp
M llvm/unittests/DebugInfo/GSYM/GSYMTest.cpp
M llvm/unittests/Support/DataExtractorTest.cpp
Log Message:
-----------
[llvm lib] Read/write non-power-of-two sized unsigned integers (3, 5, 6, 7 bytes) in DataExtractor and FileWriter (#189098)
This allows tools (like gsymutil) to pack data more efficiently into a
file.
Commit: cabebddac9bee6c14da41a2fdd7aeb60f8c67bdc
https://github.com/llvm/llvm-project/commit/cabebddac9bee6c14da41a2fdd7aeb60f8c67bdc
Author: John Paul Jepko <john.jepko at ericsson.com>
Date: 2026-03-30 (Mon, 30 Mar 2026)
Changed paths:
M clang/tools/clang-scan-deps/ClangScanDeps.cpp
M clang/tools/clang-sycl-linker/ClangSYCLLinker.cpp
M llvm/lib/Target/AMDGPU/AMDGPUIGroupLP.cpp
M llvm/tools/llvm-objdump/llvm-objdump.cpp
Log Message:
-----------
[NFC] Remove unused-but-set global variables (#189315)
Remove four global variables that are set but never read to fix
-Wunused-but-set-global warnings:
- `MFMAChainLength` in AMDGPUIGroupLP.cpp
- `Wide` in llvm-objdump.cpp
- `SaveTemps` in ClangSYCLLinker.cpp
- `DeprecatedDriverCommand` in ClangScanDeps.cpp
Follow up to #178342
Commit: 3e2f0bce9595c7c63d950d725f47f8d7c1a32b8f
https://github.com/llvm/llvm-project/commit/3e2f0bce9595c7c63d950d725f47f8d7c1a32b8f
Author: Peter Rong <peterrong96 at gmail.com>
Date: 2026-03-30 (Mon, 30 Mar 2026)
Changed paths:
M clang/include/clang/AST/Mangle.h
M clang/include/clang/CodeGen/CodeGenABITypes.h
M clang/lib/AST/Mangle.cpp
M clang/lib/CodeGen/CGDecl.cpp
M clang/lib/CodeGen/CGObjC.cpp
M clang/lib/CodeGen/CGObjCMac.cpp
M clang/lib/CodeGen/CGObjCRuntime.cpp
M clang/lib/CodeGen/CGObjCRuntime.h
M clang/lib/CodeGen/CodeGenFunction.h
M clang/lib/CodeGen/CodeGenModule.h
M clang/test/CodeGenObjC/direct-method-ret-mismatch.m
A clang/test/CodeGenObjC/expose-direct-method-linkedlist.m
A clang/test/CodeGenObjC/expose-direct-method-varargs.m
A clang/test/CodeGenObjC/expose-direct-method-visibility-linkage.m
A clang/test/CodeGenObjC/expose-direct-method.m
Log Message:
-----------
[ObjCDirectPreconditionThunk] precondition check thunk generation (#170618)
## TL;DR
This is a stack of PRs implementing features to expose direct methods
ABI.
You can see the RFC, design, and discussion
[here](https://discourse.llvm.org/t/rfc-optimizing-code-size-of-objc-direct-by-exposing-function-symbols-and-moving-nil-checks-to-thunks/88866).
https://github.com/llvm/llvm-project/pull/170616 Flag
`-fobjc-direct-precondition-thunk` set up
https://github.com/llvm/llvm-project/pull/170617 Code refactoring to
ease later reviews
https://github.com/llvm/llvm-project/pull/170618 **Thunk generation**
https://github.com/llvm/llvm-project/pull/170619 Optimizations, some
class objects can be known to be realized
## Implementation details
### Dispatching
- `GetDirectMethodCallee` handles the dispatching logic. Previously we
only need to call `GenerateDirectMethod` to get the declaration of a
direct method.
- `GenerateDirectMethod` first attempts to acquire the declaration of
the implementation, and return it if the flag is not set.
- Generate and return thunk if we can't dispatch to true implementation
(i.e. we can't reason receiver is def not null or class object is not
realized)
### Precondition check thunk generation
- `GenerateObjCDirectThunk` generates the thunk, it is called on demand
by `GetDirectMethodCallee`
- Thunk inherits all attributes from the true implementation, see
`StartObjCDirectThunk` for more detail.
- `StartObjCDirectThunk` and `FinishObjCDirectThunk` follows the design
pattern of `StartThunk` and `FinishThunk` in CGVTable.
### Precondition check inline generation
- If the function need to have precondition check inlined
(`shouldHaveNilCheckInline`), caller will emit the nil check during
`EmitMessageSend`
- Class realization is generated inline
- No extra nil check is generated - we reuse `NullReturnState` to emit
the nil check for us, it already emits nil check at caller side to
handle `ns_consumed`, we just need to tell `NullReturnState` to do the
work by setting the flag `RequiresNullCheck |= ReceiverCanBeNull;`
### Visibility and linkage
- Visibility is still by default `Hidden`. But `StartObjCMethod` will
now respect source level visibility attributes so methods with
`__attribute((visibility("default"))` can be used in other linking units
- Linkage is by default `External`
## Tests
- `expose-direct-method.m` follow the example of `direct-method.m`
- `direct-method-ret-mismatch.m` make sure we can handle the corner case
- `expose-direct-method-consumed.m ` and
`expose-direct-method-linkedlist.m` executable test on Mac only to
validate ARC correctness
- `expose-direct-method-varargs.m`
- `expose-direct-method-visibility-linkage.m`
Commit: 87085a87051bf769eeadd848d695fea01f33e933
https://github.com/llvm/llvm-project/commit/87085a87051bf769eeadd848d695fea01f33e933
Author: Charles Zablit <c_zablit at apple.com>
Date: 2026-03-30 (Mon, 30 Mar 2026)
Changed paths:
M lldb/include/lldb/Host/ProcessLaunchInfo.h
M lldb/include/lldb/Host/windows/PseudoConsole.h
M lldb/include/lldb/lldb-enumerations.h
M lldb/source/Host/common/ProcessLaunchInfo.cpp
M lldb/source/Host/windows/ProcessLauncherWindows.cpp
M lldb/source/Host/windows/PseudoConsole.cpp
M lldb/source/Target/Target.cpp
M lldb/tools/lldb-dap/Handler/RequestHandler.cpp
Log Message:
-----------
[lldb-dap][windows] don't use the ConPTY in internalConsole mode (#186472)
In `internalConsole` mode (especially in VSCode), lldb-dap should not
use the ConPTY to read the process' output. This is because the
internalConsole is not a real terminal, there is no reason to use
terminal emulation, which will add arbitrary line returns to the output.
Instead, this patch introduces the `eLaunchFlagUsePipes` flag in
ProcessLaunchInfo which tells ProcessLaunchWindows to use regular pipes
instead of a ConPTY to get the stdin and stdout of the debuggee.
The result is that output which is supposed to be on a single line is
properly rendered.
---
The following example is when debugging a program through lldb-dap on
Windows. The program prints the numbers 0 through 999 on a single line.
# Before
<img width="2214" height="672" alt="Screenshot 2026-03-13 at 17 07 35"
src="https://github.com/user-attachments/assets/26292d11-2288-46ee-a6d2-0b66bfa41288"
/>
The line is split if it's longer than 80 characters (default terminal
size).
# After
<img width="2215" height="689" alt="Screenshot 2026-03-13 at 17 12 39"
src="https://github.com/user-attachments/assets/c9cad9af-b1ce-4c7b-91d5-f684e48e64ca"
/>
The line is correctly printed as a single line.
rdar://172491166
Commit: cd3da41c01ea00402416aeae5f65d3d2cfd206aa
https://github.com/llvm/llvm-project/commit/cd3da41c01ea00402416aeae5f65d3d2cfd206aa
Author: Erick Velez <erickvelez7 at gmail.com>
Date: 2026-03-30 (Mon, 30 Mar 2026)
Changed paths:
A clang-tools-extra/test/clang-doc/Inputs/enum.cpp
M clang-tools-extra/test/clang-doc/enum.cpp
R clang-tools-extra/test/clang-doc/json/enum.cpp
Log Message:
-----------
[clang-doc] Integrate enum LIT tests (#187818)
Combine the two separate test files and have them feed from a common
source. This will be the way that tests are handled to prevent testing
divergence in the future.
Commit: ec6574e90e7c75f5e56d868bde85aaeffbb08266
https://github.com/llvm/llvm-project/commit/ec6574e90e7c75f5e56d868bde85aaeffbb08266
Author: vangthao95 <vang.thao at amd.com>
Date: 2026-03-30 (Mon, 30 Mar 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.sdot2.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.udot2.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.udot2.ll
Log Message:
-----------
AMDGPU/GlobalISel: RegBankLegalize rules for udot2/sdot2 (#189103)
Commit: fedb525151561a0c96f74cd5d17677c2f546b5d6
https://github.com/llvm/llvm-project/commit/fedb525151561a0c96f74cd5d17677c2f546b5d6
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-03-30 (Mon, 30 Mar 2026)
Changed paths:
M clang/lib/Driver/ToolChains/Clang.cpp
Log Message:
-----------
clang: Remove unnecessary triple normalize in offloading job (#189435)
These should already have been normalized (and the device side
comes from code, which should have been trivially normalized to
start).
Commit: 9331b5bb7731d6e3b8c041068848150958776f93
https://github.com/llvm/llvm-project/commit/9331b5bb7731d6e3b8c041068848150958776f93
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-03-30 (Mon, 30 Mar 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
Log Message:
-----------
[DAG] Fix -Wunused-variable
A recently introduced local is only used in an assertion which means we
get -Wunused-variable in release+noasserts builds. Mark it
[[maybe_unused]] rather than inlinine the definition given there are
multiple uses within the assert.
Commit: 44925b6cebf4f9d935a19713a2e5492f2e9d0161
https://github.com/llvm/llvm-project/commit/44925b6cebf4f9d935a19713a2e5492f2e9d0161
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2026-03-30 (Mon, 30 Mar 2026)
Changed paths:
M llvm/include/llvm/IR/Intrinsics.h
Log Message:
-----------
[NFC][LLVM] Drop unused field from `IITDescriptor` (#189094)
Drop unused `Float_Width` field from `IITDescriptor`.
Commit: e2055bce5c8e35a37f587f6d671d6a1cf95c7894
https://github.com/llvm/llvm-project/commit/e2055bce5c8e35a37f587f6d671d6a1cf95c7894
Author: Alireza Torabian <alireza.torabian at huawei.com>
Date: 2026-03-30 (Mon, 30 Mar 2026)
Changed paths:
A llvm/test/Analysis/DependenceAnalysis/PR188098.ll
Log Message:
-----------
[DA] Adding a test case for PR #188098 (#189428)
Without the changes in the patch #188098, this testcase crashes.
Commit: e53f82716b855ea436e6a9160d80417531b46c25
https://github.com/llvm/llvm-project/commit/e53f82716b855ea436e6a9160d80417531b46c25
Author: khaki3 <47756807+khaki3 at users.noreply.github.com>
Date: 2026-03-30 (Mon, 30 Mar 2026)
Changed paths:
M flang/lib/Semantics/check-directive-structure.h
M flang/test/Semantics/OpenACC/acc-branch.f90
Log Message:
-----------
[flang][OpenACC] Add semantic check for GOTO branching out of compute constructs (#189385)
Per OpenACC spec 2.5.4, branching out of `parallel`/`serial`/`kernels`
constructs is not allowed. Add a GOTO check to `NoBranchingEnforce` that
collects labels within the construct block and flags GOTOs targeting
labels outside. In-region GOTOs are allowed.
The check applies only to compute constructs (`parallel`, `serial`,
`kernels`), not to data constructs where GOTO out is valid.
Commit: 38a46a12c45b21b8ebf9e8642d9484fe40703967
https://github.com/llvm/llvm-project/commit/38a46a12c45b21b8ebf9e8642d9484fe40703967
Author: Nick Sarnie <nick.sarnie at intel.com>
Date: 2026-03-30 (Mon, 30 Mar 2026)
Changed paths:
M offload/test/api/omp_host_call.c
M offload/test/env/base_ptr_ref_count.c
M offload/test/libc/malloc_parallel.c
M offload/test/mapping/device_ptr_update.c
M offload/test/mapping/map_ordering_ptee_tgt_alloc_mapper_alloc_from_to.c
M offload/test/mapping/map_ordering_tgt_alloc_from_to.c
M offload/test/mapping/map_ordering_tgt_exit_data_always_always.c
M offload/test/mapping/map_ordering_tgt_exit_data_delete_from_assumedsize.c
M offload/test/mapping/map_ordering_tgt_exit_data_from_delete_assumedsize.c
M offload/test/mapping/map_ordering_tgt_exit_data_from_mapper_overlap.c
M offload/test/mapping/reduction_implicit_map.cpp
M offload/test/mapping/target_derefence_array_pointrs.cpp
M offload/test/mapping/target_has_device_addr.c
M offload/test/offloading/bug49779.cpp
M offload/test/offloading/bug64959.c
M offload/test/offloading/bug64959_compile_only.c
M offload/test/offloading/force-usm.cpp
M offload/test/offloading/malloc.c
M offload/test/offloading/multiple_reductions_simple.c
M offload/test/offloading/parallel_target_teams_reduction.cpp
M offload/test/offloading/parallel_target_teams_reduction_max.cpp
M offload/test/offloading/parallel_target_teams_reduction_min.cpp
M offload/test/offloading/std_complex_arithmetic.cpp
M offload/test/offloading/strided_offset_multidim_update.c
M offload/test/offloading/struct_mapping_with_pointers.cpp
M offload/test/offloading/target_critical_region.cpp
M offload/test/offloading/test_libc.cpp
M offload/test/sanitizer/kernel_crash_single.c
M offload/test/sanitizer/ptr_outside_alloc_1.c
M offload/test/sanitizer/ptr_outside_alloc_2.c
M offload/test/sanitizer/use_after_free_1.c
M offload/test/sanitizer/use_after_free_2.c
M offload/test/unified_shared_memory/api.c
M offload/test/unified_shared_memory/close_enter_exit.c
M offload/test/unified_shared_memory/close_modifier.c
M offload/test/unified_shared_memory/shared_update.c
Log Message:
-----------
[offload][lit] Disable tests failing on Intel GPU (#189422)
Fix some tests causing hangs, one fail, and a few XPASSing. We are
seeing new passes/fails because of the named barrier changes being
merged.
Signed-off-by: Nick Sarnie <nick.sarnie at intel.com>
Commit: 34f5b80731e76356f4acbabbe4eb2d4b5c424244
https://github.com/llvm/llvm-project/commit/34f5b80731e76356f4acbabbe4eb2d4b5c424244
Author: Zhijie Wang <yesterda9 at gmail.com>
Date: 2026-03-30 (Mon, 30 Mar 2026)
Changed paths:
M clang/include/clang/Analysis/Analyses/LifetimeSafety/Facts.h
M clang/include/clang/Analysis/Analyses/LifetimeSafety/FactsGenerator.h
M clang/include/clang/Analysis/Analyses/LifetimeSafety/Origins.h
M clang/lib/Analysis/LifetimeSafety/FactsGenerator.cpp
M clang/lib/Analysis/LifetimeSafety/Origins.cpp
M clang/test/Sema/Inputs/lifetime-analysis.h
M clang/test/Sema/warn-lifetime-analysis-nocfg.cpp
M clang/test/Sema/warn-lifetime-safety-suggestions.cpp
M clang/test/Sema/warn-lifetime-safety.cpp
Log Message:
-----------
[LifetimeSafety] Track origins for lifetimebound calls returning record types (#187917)
- Move `hasOrigins` from free function to `OriginManager` method
- Add pre-scan (`collectLifetimeboundOriginTypes`) to register return
types of `[[clang::lifetimebound]]` calls before fact generation
- Generalize copy/move constructor origin propagation from lambda-only
to all types with `isDefaulted()` and `hasOrigins()` guard
- `isDefaulted()` is a heuristic: it avoids false positives from
user-defined copies with opaque semantics, but can still false-positive
when a defaulted outer copy invokes a user-defined inner copy that
breaks the propagate chain. See
`nested_defaulted_outer_with_user_defined_inner`
- Guard `operator=` origin propagation: pointer-like types always
propagate; other tracked types only when defaulted
- Defer `ThisOrigins` construction until after the pre-scan to avoid
origin list depth mismatch
- Fix `IsArgLifetimeBound` to exclude constructors from the
instance-method branch (latent bug exposed by this change)
Limitations (documented with FIXME tests):
- User-defined copy/move that shallow-copies: false negative
- Defaulted outer copy invoking user-defined inner copy: false positive
- Non-pointer/ref/gsl::Pointer parameter types with
`[[clang::lifetimebound]]`: not registered
Fixes #163600
Commit: dd59a99cbf7cc1674689ca89504bf808727e8643
https://github.com/llvm/llvm-project/commit/dd59a99cbf7cc1674689ca89504bf808727e8643
Author: John Harrison <harjohn at google.com>
Date: 2026-03-30 (Mon, 30 Mar 2026)
Changed paths:
M lldb/packages/Python/lldbsuite/test/lldbtest.py
M lldb/packages/Python/lldbsuite/test/test_result.py
M lldb/packages/Python/lldbsuite/test/tools/lldb-dap/dap_server.py
M lldb/packages/Python/lldbsuite/test/tools/lldb-dap/lldbdap_testcase.py
M lldb/test/API/tools/lldb-dap/io/TestDAP_io.py
M lldb/test/API/tools/lldb-dap/server/TestDAP_server.py
Log Message:
-----------
[lldb] In python tests, call dumpSessionInfo(). (#188859)
Updates the lldb python test suite to ensure we call dumpSessionInfo()
in the test result's stopTest() method. This will ensure that we get the
session info dumped for all tests, even those that don't have an
explicit call to dumpSessionInfo() in the test case.
Additionally, I updated the lldb-dap test case to mark the '-dap.log' as
a log file, which will be recorded in the test output on failure.
Here is an example test run with a failure:
```
PASS: LLDB (build/bin/clang-arm64) :: test_step (TestDAP_step.TestDAP_step)
FAIL: LLDB (build/bin/clang-arm64) :: test_step_over_inlined_function (TestDAP_step.TestDAP_step)
Log Files:
- build/lldb-test-build.noindex/tools/lldb-dap/step/TestDAP_step/Failure.log
- build/lldb-test-build.noindex/tools/lldb-dap/step/TestDAP_step/Failure-dap.log
======================================================================
FAIL: test_step_over_inlined_function (TestDAP_step.TestDAP_step)
Test stepping over when the program counter is in another file.
----------------------------------------------------------------------
Traceback (most recent call last):
File "llvm-project/lldb/test/API/tools/lldb-dap/step/TestDAP_step.py", line 113, in test_step_over_inlined_function
self.assertFalse(
AssertionError: True is not false : expect path ending with 'main.cpp'.
Config=arm64-build/bin/clang
----------------------------------------------------------------------
Ran 2 tests in 4.849s
```
Commit: 8bd83048084c27615e9536227fbb2545472915e7
https://github.com/llvm/llvm-project/commit/8bd83048084c27615e9536227fbb2545472915e7
Author: Kerem Şahin <keremsahin401 at gmail.com>
Date: 2026-03-30 (Mon, 30 Mar 2026)
Changed paths:
M clang/lib/Interpreter/Interpreter.cpp
M clang/test/Interpreter/pretty-print.c
Log Message:
-----------
[clang-repl] Fix C89 incompatible keywords (#189432)
Restrict and inline keywords are removed for C89 interpreter since these
keywords caused fail at runtime preamble.
Fixes #189088
Commit: ebc7b2f04e3e658e27ab33f03a42d196d10e3b91
https://github.com/llvm/llvm-project/commit/ebc7b2f04e3e658e27ab33f03a42d196d10e3b91
Author: Tomer Shafir <tomer.shafir8 at gmail.com>
Date: 2026-03-30 (Mon, 30 Mar 2026)
Changed paths:
M llvm/lib/MCA/Support.cpp
Log Message:
-----------
[MCA] Use LLVM_DEBUG instead of direct NDEBUG check (NFC) (#189389)
Use the conventional multiline `LLVM_DEBUG` macro for a
debug-printing-only code block, instead of unwrapping a direct `NDEBUG`
check.
Commit: 7ccd92e5e6e5c622b2b571d396fff9016241a8f1
https://github.com/llvm/llvm-project/commit/7ccd92e5e6e5c622b2b571d396fff9016241a8f1
Author: Jackson Stogel <jtstogel at gmail.com>
Date: 2026-03-30 (Mon, 30 Mar 2026)
Changed paths:
M mlir/tools/mlir-tblgen/OpPythonBindingGen.cpp
Log Message:
-----------
[mlir][python] Disable pytype not-yet-supported error on Buffer import (#189440)
For pyhon versions <3.12, pytype complains that:
```
error: in <module>: collections.abc.Buffer not supported yet [not-supported-yet]
from collections.abc import Buffer as _Buffer
```
Since it seems like this code intends to support <3.12, disabling the
type error on this line.
Commit: bdf28a6d48112681afd24efe51a43e9807ff4fbb
https://github.com/llvm/llvm-project/commit/bdf28a6d48112681afd24efe51a43e9807ff4fbb
Author: Roland McGrath <mcgrathr at google.com>
Date: 2026-03-30 (Mon, 30 Mar 2026)
Changed paths:
M compiler-rt/lib/fuzzer/CMakeLists.txt
Log Message:
-----------
[fuzzer] Use LIBCXX_ABI_UNSTABLE for hermetic libc++ (#189096)
This build of libc++ never interacts with any other, so
it can always use the latest and best ABI.
Commit: db80420930c3839ede51af304fe44b559b2286a0
https://github.com/llvm/llvm-project/commit/db80420930c3839ede51af304fe44b559b2286a0
Author: RolandF77 <froese at ca.ibm.com>
Date: 2026-03-30 (Mon, 30 Mar 2026)
Changed paths:
M llvm/lib/Target/PowerPC/PPCISelLowering.cpp
Log Message:
-----------
[PowerPC] Respect chain operand for llvm.ppc.disassemble.dmr lowering (#188334)
Fix ignoring the input chain when turning llvm.ppc.disassemble.dmr into
a store.
Commit: 03cc2a3173cd8eb70e6a6567dfbbb63c709368e9
https://github.com/llvm/llvm-project/commit/03cc2a3173cd8eb70e6a6567dfbbb63c709368e9
Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
Date: 2026-03-30 (Mon, 30 Mar 2026)
Changed paths:
M .mailmap
Log Message:
-----------
[mailmap] Add mailmap entry for myself (#189447)
Commit: 0b500d54467821813027e4a503b4581cca8bb6a7
https://github.com/llvm/llvm-project/commit/0b500d54467821813027e4a503b4581cca8bb6a7
Author: zGoldthorpe <Zach.Goldthorpe at amd.com>
Date: 2026-03-30 (Mon, 30 Mar 2026)
Changed paths:
M llvm/include/llvm/Support/KnownFPClass.h
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/lib/Support/KnownFPClass.cpp
Log Message:
-----------
[Support] Move `KnownFPClass` inference from `KnownBits` to Support (#189414)
Move logic for inferring `KnownFPClass` from known bits into the Support
library so the logic may be used e.g., for analogous value tracking
functions in SelectionDAG.
Commit: 5c9440f8ae07af862010d39ac440f22b1906191d
https://github.com/llvm/llvm-project/commit/5c9440f8ae07af862010d39ac440f22b1906191d
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2026-03-30 (Mon, 30 Mar 2026)
Changed paths:
M flang/lib/Semantics/check-omp-loop.cpp
Log Message:
-----------
[flang][OpenMP] Remove misplaced comment, NFC (#189449)
Remove the seemingly random comment listing clauses allowed on a DO
construct. The nearby code has nothing to do with clauses.
Commit: 14ab059dec8c6bd89c4e2ab6fbe890ea585fb20c
https://github.com/llvm/llvm-project/commit/14ab059dec8c6bd89c4e2ab6fbe890ea585fb20c
Author: Chinmay Deshpande <chdeshpa at amd.com>
Date: 2026-03-30 (Mon, 30 Mar 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h
M llvm/test/Analysis/CostModel/AMDGPU/log.ll
M llvm/test/Analysis/CostModel/AMDGPU/log10.ll
M llvm/test/Analysis/CostModel/AMDGPU/log2.ll
M llvm/test/Analysis/CostModel/AMDGPU/sin.ll
M llvm/test/Analysis/CostModel/AMDGPU/sqrt.ll
Log Message:
-----------
[AMDGPU][TTI] Update cost model for transcendental instructions to be more precise (#189430)
Introduce `getTransInstrCost` instead of `getQuarterRateInstrCost` for transcendental ops
Commit: 04785adec34ddf9a6ec47f10da5b2b7fe8c9f9c8
https://github.com/llvm/llvm-project/commit/04785adec34ddf9a6ec47f10da5b2b7fe8c9f9c8
Author: Narayan <nsreekumar6 at gmail.com>
Date: 2026-03-31 (Tue, 31 Mar 2026)
Changed paths:
A llvm/include/llvm/ABI/FunctionInfo.h
M llvm/lib/ABI/CMakeLists.txt
A llvm/lib/ABI/FunctionInfo.cpp
Log Message:
-----------
[LLVMABI] Create ABI Utils (#185105)
This PR introduces `ABIFunctionInfo` and surrounding utility helpers,
and is part of the set of breakout PRs to upstream the LLVM ABI lowering
library prototyped in https://github.com/llvm/llvm-project/pull/140112.
`ABIFunctionInfo` is directly analogous to `CGFunctionInfo` from Clang's
existing CodeGen pipeline, and represents an ABI lowered view of the
function signature, decoupled from both the Clang AST and LLVM IR.
`ABIArgInfo` encodes lowering decisions and currently supports
Direct,Extend,Indirect and Ignore which are required for our initial
goal of implementing x86-64 SysV and BPF, but this will change as the
library grows to represent more targets that need them.
This PR is a direct precursor to the implementation of `ABIInfo` in the
library as demonstrated in the PR linked above..
Commit: ba228181c25c45cdfdca33fac4332e5c15efcd0e
https://github.com/llvm/llvm-project/commit/ba228181c25c45cdfdca33fac4332e5c15efcd0e
Author: Brian Cain <brian.cain at oss.qualcomm.com>
Date: 2026-03-30 (Mon, 30 Mar 2026)
Changed paths:
M lld/ELF/Arch/Hexagon.cpp
M lld/test/ELF/hexagon-thunk-range-plt.s
M lld/test/ELF/hexagon-thunks-packets.s
M lld/test/ELF/hexagon-thunks.s
Log Message:
-----------
[lld][Hexagon] Fix out-of-range PLT branch thunks (#186545)
Linking large Hexagon binaries (e.g. ASan runtime with >8 MiB of text)
fails with R_HEX_B22_PCREL / R_HEX_PLT_B22_PCREL relocation overflow on
calls to PLT entries, even though the thunk infrastructure exists and
needsThunks is set.
needsThunk() always used s.getVA() to compute the branch destination,
even for PLT calls where the actual destination is the PLT entry. This
meant the distance check used the wrong address and failed to create
thunks when the PLT entry was out of B22_PCREL range.
Fix by using s.getPltVA() when expr == R_PLT_PC. Also override
getThunkSectionSpacing() so ThunkSections are pre-created at appropriate
intervals for large binaries.
Commit: 651b61fac502ecd875b7f36d684d50ba0429f3cc
https://github.com/llvm/llvm-project/commit/651b61fac502ecd875b7f36d684d50ba0429f3cc
Author: Brian Cain <brian.cain at oss.qualcomm.com>
Date: 2026-03-30 (Mon, 30 Mar 2026)
Changed paths:
A llvm/test/CodeGen/Hexagon/constprop-fp-cmp.ll
A llvm/test/CodeGen/Hexagon/gen-pred-andn-orn.ll
M llvm/test/CodeGen/Hexagon/memcpy-likely-aligned.ll
A llvm/test/CodeGen/Hexagon/sched-timing-classes.ll
Log Message:
-----------
[Hexagon] Add coverage tests for CodeGen analysis and optimization passes (#183952)
Add tests targeting Hexagon CodeGen analysis and optimization passes:
- gen-pred-andn-orn.ll: HexagonGenPredicate pass exercising andn/orn
logical operations, cmp-zero conversion paths, deeper predicate chains,
and byte comparison classification.
- memcpy-likely-aligned.ll: HexagonSelectionDAGInfo exercising the
aligned memcpy specialization path.
- constprop-fp-cmp.ll: HexagonConstPropagation exercising floating-
point comparison constant folding paths.
- sched-timing-classes.ll: Scheduling timing class coverage for various
Hexagon instruction classes.
Commit: a6ffdb595f4b70c4be7951acd2a9a228dbc06351
https://github.com/llvm/llvm-project/commit/a6ffdb595f4b70c4be7951acd2a9a228dbc06351
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-03-30 (Mon, 30 Mar 2026)
Changed paths:
M clang/lib/Headers/gpuintrin.h
M clang/test/Headers/gpuintrin.c
M libc/src/__support/GPU/utils.h
Log Message:
-----------
[Clang] Improve scan in gpuintrin.h (#189381)
Summary:
Right now the scan checks to avoid the unspecified behavior in
`clzg(0)`. This is used as the source to the shuffle instruction, but
the argument is discarded at zero anyway. So, we simply pass unspecified
behavior to shuffle and then discard it. This should be fine. The scan
routines are expected to be optimal.
Also renames `sum` to `add`.
Commit: 7364203924cf9d464df4f6b9455ac6cd42c856ae
https://github.com/llvm/llvm-project/commit/7364203924cf9d464df4f6b9455ac6cd42c856ae
Author: Jeffrey Byrnes <jeffrey.byrnes at amd.com>
Date: 2026-03-30 (Mon, 30 Mar 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUCoExecSchedStrategy.cpp
M llvm/lib/Target/AMDGPU/AMDGPUCoExecSchedStrategy.h
M llvm/test/CodeGen/AMDGPU/coexec-sched-effective-stall.mir
A llvm/test/CodeGen/AMDGPU/coexec-scheduler.ll
Log Message:
-----------
Reapply "[AMDGPU] Add HWUI pressure heuristics to coexec strategy (#184929)" (#189121)
Reland https://github.com/llvm/llvm-project/pull/184929 after fixing
some issues in the NDEBUG builds.
3a640ee is unchanged from the previously approved PR, the unreviewed
portion of this PR is 9cabd8d
Commit: 0d2c59abd5abc7de2aeecacfe9b1e7666d4d69f7
https://github.com/llvm/llvm-project/commit/0d2c59abd5abc7de2aeecacfe9b1e7666d4d69f7
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-03-30 (Mon, 30 Mar 2026)
Changed paths:
M clang/lib/Headers/gpuintrin.h
M clang/lib/Headers/nvptxintrin.h
M clang/test/Headers/Inputs/include/stdint.h
M clang/test/Headers/gpuintrin_lang.c
Log Message:
-----------
[Clang] Fix constant bit widths in gpuintrin.h (#189387)
Summary:
The `ull` suffix can mean 128 bits on some architectures. Replace this
with the `stdint.h` constructor to be certain.
Commit: 03869c74b626599b7d14d9454092261e85a46187
https://github.com/llvm/llvm-project/commit/03869c74b626599b7d14d9454092261e85a46187
Author: Maksim Levental <maksim.levental at gmail.com>
Date: 2026-03-30 (Mon, 30 Mar 2026)
Changed paths:
M mlir/lib/Dialect/SparseTensor/Transforms/Utils/LoopEmitter.cpp
M mlir/lib/Dialect/SparseTensor/Transforms/Utils/SparseTensorIterator.cpp
Log Message:
-----------
[MLIR][SparseTensor] Add missing #undef REMUI and DIVUI (#188686)
LoopEmitter.cpp and SparseTensorIterator.cpp define REMUI and DIVUI
macros but the existing #undef block at the end of each file omits them.
This can leak the macros into subsequent translation units in unity
builds. See https://discourse.llvm.org/t/rfc-enabling-unity-build/90306
for more info.
"clauded" not coded
Commit: f10dccd458fac0685f5b870128bcb2da5ba82169
https://github.com/llvm/llvm-project/commit/f10dccd458fac0685f5b870128bcb2da5ba82169
Author: Maksim Levental <maksim.levental at gmail.com>
Date: 2026-03-30 (Mon, 30 Mar 2026)
Changed paths:
M mlir/lib/Dialect/SparseTensor/IR/Detail/DimLvlMapParser.cpp
M mlir/lib/Dialect/SparseTensor/IR/Detail/LvlTypeParser.cpp
Log Message:
-----------
[MLIR][SparseTensor] Add #undef FAILURE_IF_FAILED and ERROR_IF (#188685)
Both DimLvlMapParser.cpp and LvlTypeParser.cpp define FAILURE_IF_FAILED
and ERROR_IF macros that are never undefined, which can leak into
subsequent translation units in unity builds. Add #undef at the end of
each file. See
https://discourse.llvm.org/t/rfc-enabling-unity-build/90306 for more
info.
"clauded" not coded
Commit: 15a7c45163f2fd34a91f6ad710d09ff7ee182b07
https://github.com/llvm/llvm-project/commit/15a7c45163f2fd34a91f6ad710d09ff7ee182b07
Author: Zorojuro <sawantsukumar at gmail.com>
Date: 2026-03-30 (Mon, 30 Mar 2026)
Changed paths:
M libc/config/baremetal/aarch64/entrypoints.txt
M libc/config/baremetal/arm/entrypoints.txt
M libc/config/baremetal/riscv/entrypoints.txt
M libc/config/darwin/aarch64/entrypoints.txt
M libc/config/darwin/x86_64/entrypoints.txt
M libc/config/gpu/amdgpu/entrypoints.txt
M libc/config/gpu/nvptx/entrypoints.txt
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/arm/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/config/windows/entrypoints.txt
M libc/docs/headers/math/index.rst
M libc/shared/math.h
A libc/shared/math/asinbf16.h
M libc/src/__support/FPUtil/multiply_add.h
M libc/src/__support/FPUtil/sqrt.h
M libc/src/__support/math/CMakeLists.txt
M libc/src/__support/math/acoshf_utils.h
A libc/src/__support/math/asinbf16.h
M libc/src/__support/math/inv_trigf_utils.h
M libc/src/math/CMakeLists.txt
A libc/src/math/asinbf16.h
M libc/src/math/generic/CMakeLists.txt
A libc/src/math/generic/asinbf16.cpp
M libc/test/shared/CMakeLists.txt
M libc/test/shared/shared_math_constexpr_test.cpp
M libc/test/shared/shared_math_test.cpp
M libc/test/src/math/CMakeLists.txt
A libc/test/src/math/asinbf16_test.cpp
M libc/test/src/math/smoke/CMakeLists.txt
A libc/test/src/math/smoke/asinbf16_test.cpp
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[libc][math][c23] Add asinbf16 math function (#184170)
Co-authored-by: bassiounix <muhammad.m.bassiouni at gmail.com>
Commit: 23f95fa9e35aca321e1ab0d73ec5f129d5376571
https://github.com/llvm/llvm-project/commit/23f95fa9e35aca321e1ab0d73ec5f129d5376571
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-03-30 (Mon, 30 Mar 2026)
Changed paths:
M llvm/include/llvm/ABI/FunctionInfo.h
Log Message:
-----------
[LLVM] Fix invalid shadowed type name
Commit: 6021270aa33771aea14fc09d2d943964ed3c3278
https://github.com/llvm/llvm-project/commit/6021270aa33771aea14fc09d2d943964ed3c3278
Author: forking-google-bazel-bot[bot] <265904573+forking-google-bazel-bot[bot]@users.noreply.github.com>
Date: 2026-03-30 (Mon, 30 Mar 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
Log Message:
-----------
[Bazel] Fixes 04785ad (#189456)
This fixes 04785adec34ddf9a6ec47f10da5b2b7fe8c9f9c8.
Co-authored-by: Google Bazel Bot <google-bazel-bot at google.com>
Commit: 804ece6a4ff0a971b142f83ebcd45a9c9625aae5
https://github.com/llvm/llvm-project/commit/804ece6a4ff0a971b142f83ebcd45a9c9625aae5
Author: Ehsan Amiri <ehsan.amiri at huawei.com>
Date: 2026-03-30 (Mon, 30 Mar 2026)
Changed paths:
M llvm/lib/Analysis/DependenceAnalysis.cpp
M llvm/test/Analysis/DependenceAnalysis/WeakCrossingSIV.ll
M llvm/test/Analysis/DependenceAnalysis/weak-crossing-siv-addrec-wrap.ll
Log Message:
-----------
[DA] Require `nsw` for AddRecs in the WeakCrossing SIV test (#185041)
Before the start of the algorithm in weak crossing SIV test, we need to
ensure both addrecs are `nsw`
Commit: 26e0d15eaa811721d5e80d656777d00947cb503a
https://github.com/llvm/llvm-project/commit/26e0d15eaa811721d5e80d656777d00947cb503a
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-03-30 (Mon, 30 Mar 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/PhaseOrdering/X86/avg.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/unprofitable-alternate-subtree.ll
Log Message:
-----------
[SLP] Prefer to trim equal-cost alternate-shuffle subtrees
If the trimming candidate subtree is rooted at an alternate-shuffle node
with binary ops, and this subtree has the same cost as the buildvector
node cost, better to stick with the buildvector node to avoid runtime
perf regressions from shuffle/extra operations overhead that the cost model may
underestimate. Skip trimming if the subtree contains ExtractElement
nodes, since those operate on already-materialized vectors, which may
reduced vector-to-scalar code movement and have better perf.
Reviewers: hiraditya, bababuck, fhahn, RKSimon
Pull Request: https://github.com/llvm/llvm-project/pull/188272
Commit: 06725d7ef5c119241f11fa723f2d779a9e884165
https://github.com/llvm/llvm-project/commit/06725d7ef5c119241f11fa723f2d779a9e884165
Author: Alexey Merzlyakov <60094858+AlexeyMerzlyakov at users.noreply.github.com>
Date: 2026-03-30 (Mon, 30 Mar 2026)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/GISelValueTracking.cpp
M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-ctlz.mir
M llvm/test/CodeGen/AArch64/cls.ll
M llvm/test/CodeGen/AArch64/pr61549.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ctlz.mir
M llvm/test/CodeGen/AMDGPU/ctlz.ll
M llvm/test/CodeGen/ARM/GlobalISel/arm-legalize-bitcounts.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-ctls-rv32.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-ctls-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-ctlz-rv32.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-ctlz-rv64.mir
M llvm/test/CodeGen/X86/GlobalISel/legalize-leading-zeros.mir
M llvm/unittests/CodeGen/GlobalISel/LegalizerHelperTest.cpp
Log Message:
-----------
[GISel] Keep non-negative info in SUB(CTLZ) (#189314)
Implement non-negative value tracking for SUB-CTLZ chains in GlobalISel,
matching the behavior previously added to SelectionDAG.
Additionally, refactor the SelectionDAG implementation from the previous
patch to improve performance and code density.
Related to https://github.com/llvm/llvm-project/issues/136516 and
https://github.com/llvm/llvm-project/pull/186338#discussion_r2980420174
Commit: b6e4d27c485af711214b3dafc96fa287e2fe33f6
https://github.com/llvm/llvm-project/commit/b6e4d27c485af711214b3dafc96fa287e2fe33f6
Author: Berke Ates <berke at ates.ch>
Date: 2026-03-30 (Mon, 30 Mar 2026)
Changed paths:
A mlir/include/mlir/Interfaces/Utils/MemorySlotUtils.h
M mlir/lib/Dialect/SCF/IR/CMakeLists.txt
M mlir/lib/Dialect/SCF/IR/MemorySlot.cpp
M mlir/lib/Interfaces/Utils/CMakeLists.txt
A mlir/lib/Interfaces/Utils/MemorySlotUtils.cpp
M mlir/unittests/Interfaces/CMakeLists.txt
A mlir/unittests/Interfaces/MemorySlotUtilsTest.cpp
Log Message:
-----------
[MLIR][Mem2Reg] Extract shared utilities for PromotableRegionOpInterface (#188514)
The `PromotableRegionOpInterface` implementations use two helpers that
are likely useful for other dialects implementing this interface as
well:
- `updateTerminator`: Appends the reaching definition as an operand to a
block's terminator, falling back to a default when the block has no
entry (e.g. dead code).
- `replaceWithNewResults`: Clones an operation with additional result
types while preserving its regions, then replaces the original.
This PR extracts them into a common utility header so that downstream
dialects can reuse them directly.
I'm open to discussion about the location of these utilities.
Commit: f7329189c01d86434c08fd5cd791c7d1e791e6dc
https://github.com/llvm/llvm-project/commit/f7329189c01d86434c08fd5cd791c7d1e791e6dc
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2026-03-30 (Mon, 30 Mar 2026)
Changed paths:
M clang/docs/ClangIRCleanupAndEHDesign.md
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/lib/CIR/Dialect/Transforms/EHABILowering.cpp
M clang/lib/CIR/Dialect/Transforms/FlattenCFG.cpp
A clang/test/CIR/CodeGen/cleanup-throwing-dtor.cpp
M clang/test/CIR/Transforms/eh-abi-lowering-itanium.cir
M clang/test/CIR/Transforms/flatten-cleanup-scope-nyi.cir
A clang/test/CIR/Transforms/flatten-throwing-in-cleanup.cir
Log Message:
-----------
[CIR] Handle throwing calls inside EH cleanup (#188341)
This implements handling for throwing calls inside an EH cleanup
handler. When such a call occurs, the CFG flattening pass replaces it
with a cir.try_call op that unwinds to a terminate block.
A new CIR operation, cir.eh.terminate, is added to facilitate this
handling, and the design document is updated to describe the new
behavior.
Assisted-by: Cursor / claude-4.6-opus-high
Commit: a0ffdf28500e21905cab02d1df28c9cef3581155
https://github.com/llvm/llvm-project/commit/a0ffdf28500e21905cab02d1df28c9cef3581155
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2026-03-30 (Mon, 30 Mar 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenModule.cpp
A clang/test/CIR/CodeGen/ctor-alias-prev-decl.cpp
A clang/test/CIR/CodeGen/dtor-alias-prev-decl.cpp
Log Message:
-----------
[CIR] Allow replacement of a structor declaration with an alias (#188320)
We had an errorNYI diagnostic to trigger when we generated an alias for
a ctor or dtor that had an existing declaration. Because functions are
used via flat symbol references, all that is needed is to erase the old
declaration. This change does that.
Commit: 9d3079a7a975889f20c1ba2aa7301ec005547bfa
https://github.com/llvm/llvm-project/commit/9d3079a7a975889f20c1ba2aa7301ec005547bfa
Author: Bill Wendling <morbo at google.com>
Date: 2026-03-30 (Mon, 30 Mar 2026)
Changed paths:
M llvm/lib/CodeGen/InlineAsmPrepare.cpp
Log Message:
-----------
[NFC][CodeGen] Prepare for expansion of InlineAsmPrepare (#189469)
Move some functions around so that the CallBrInst processing is
contained. The 'static' functions don't need to be declared at the top;
just place them before the calls. Fix the naming to use lower-case for
the first letter of function names.
Commit: 19caff444d2e6fc35942fb4cf6b8213d17557fbd
https://github.com/llvm/llvm-project/commit/19caff444d2e6fc35942fb4cf6b8213d17557fbd
Author: forking-google-bazel-bot[bot] <265904573+forking-google-bazel-bot[bot]@users.noreply.github.com>
Date: 2026-03-30 (Mon, 30 Mar 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
M utils/bazel/llvm-project-overlay/mlir/unittests/BUILD.bazel
Log Message:
-----------
[Bazel] Fixes b6e4d27 (#189473)
This fixes b6e4d27c485af711214b3dafc96fa287e2fe33f6.
Co-authored-by: Google Bazel Bot <google-bazel-bot at google.com>
Commit: e50f08b5488346d86f741f20d8d2dd2a7c0f9ec8
https://github.com/llvm/llvm-project/commit/e50f08b5488346d86f741f20d8d2dd2a7c0f9ec8
Author: Nishant Patel <nishant.b.patel at intel.com>
Date: 2026-03-30 (Mon, 30 Mar 2026)
Changed paths:
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUSgToWiDistributeExperimental.cpp
M mlir/test/Dialect/XeGPU/sg-to-wi-experimental-unit.mlir
Log Message:
-----------
[MLIR] [XeGPU] Add distribution patterns for vector transpose, bitcast & mask ops in sg to wi pass (#187392)
This PR adds patterns for following vector ops in the new sg-to-wi pass
1. Transpose
2. BitCast
3. CreateMask
4. ConstantMask
Commit: 5f99854d0151a43d0f20452f58211c9fdde8f154
https://github.com/llvm/llvm-project/commit/5f99854d0151a43d0f20452f58211c9fdde8f154
Author: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
Date: 2026-03-30 (Mon, 30 Mar 2026)
Changed paths:
M clang/lib/CodeGen/TargetBuiltins/AMDGPU.cpp
M clang/lib/Sema/SemaAMDGPU.cpp
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx1250-wmma-w32.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx1250-wmma-w32-param.cl
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/lib/IR/AutoUpgrade.cpp
M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/intrinsics.ll
M llvm/test/Bitcode/amdgpu-wmma-drop-ab-mods-upgrade.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wmma.gfx1250.w32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wmma.imm.gfx1250.w32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wmma.imod.gfx1250.w32.ll
M llvm/test/CodeGen/AMDGPU/wmma-hazards-gfx1250-w32.mir
M mlir/include/mlir/Dialect/LLVMIR/ROCDLOps.td
M mlir/test/Target/LLVMIR/rocdl.mlir
Log Message:
-----------
[AMDGPU] Drop A and B neg modifier from amdgcn_wmma_bf16_16x16x32_bf16 (#189468)
Fixes: LCOMPILER-1673
Commit: 76f5c5d36c06559cf1767f6b2aa021452f2ac0dd
https://github.com/llvm/llvm-project/commit/76f5c5d36c06559cf1767f6b2aa021452f2ac0dd
Author: Baranov Victor <bar.victor.2002 at gmail.com>
Date: 2026-03-30 (Mon, 30 Mar 2026)
Changed paths:
M clang-tools-extra/clang-tidy/readability/ImplicitBoolConversionCheck.cpp
M clang-tools-extra/clang-tidy/readability/ImplicitBoolConversionCheck.h
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/implicit-bool-conversion.rst
A clang-tools-extra/test/clang-tidy/checkers/readability/implicit-bool-conversion-allow-logical-operators.c
Log Message:
-----------
[clang-tidy] Add AllowLogicalOperatorConversion option to implicit-bool-conversion (#189149)
Fixes https://github.com/llvm/llvm-project/issues/176889.
Commit: ae835dea747da6824b386b4861c330d59af7af6d
https://github.com/llvm/llvm-project/commit/ae835dea747da6824b386b4861c330d59af7af6d
Author: Eric Feng <55723758+efric at users.noreply.github.com>
Date: 2026-03-30 (Mon, 30 Mar 2026)
Changed paths:
M mlir/include/mlir/Dialect/AMDGPU/IR/AMDGPUOps.td
M mlir/lib/Conversion/AMDGPUToROCDL/AMDGPUToROCDL.cpp
M mlir/lib/Dialect/AMDGPU/IR/AMDGPUOps.cpp
M mlir/test/Conversion/AMDGPUToROCDL/gfx1250.mlir
M mlir/test/Dialect/AMDGPU/invalid.mlir
M mlir/test/Dialect/AMDGPU/ops.mlir
Log Message:
-----------
[mlir][amdgpu] implement amdgpu.global_load_async_to_lds for gfx1250 (#189279)
This patch introduces an amdgpu wrapper for
`rocdl.global.load.async.to.lds.bN` intrinsics, which were introduced in
gfx1250.
Assisted-by: Claude
---------
Signed-off-by: Eric Feng <Eric.Feng at amd.com>
Commit: 54b723097b39b536eb7d1d6947b65d53a096ed47
https://github.com/llvm/llvm-project/commit/54b723097b39b536eb7d1d6947b65d53a096ed47
Author: Keshav Vinayak Jha <31160700+keshavvinayak01 at users.noreply.github.com>
Date: 2026-03-30 (Mon, 30 Mar 2026)
Changed paths:
M mlir/include/mlir/Dialect/Affine/IR/AffineOps.td
M mlir/include/mlir/Dialect/Affine/Transforms/Passes.td
M mlir/lib/Dialect/Affine/IR/AffineOps.cpp
M mlir/lib/Dialect/Affine/Transforms/AffineExpandIndexOps.cpp
M mlir/lib/Dialect/Affine/Transforms/AffineExpandIndexOpsAsAffine.cpp
M mlir/test/Dialect/Affine/affine-expand-index-ops-as-affine.mlir
M mlir/test/Dialect/Affine/affine-expand-index-ops.mlir
M mlir/test/Dialect/Affine/canonicalize.mlir
M mlir/test/Dialect/Affine/ops.mlir
Log Message:
-----------
[MLIR][Affine] Add vector support to affine.linearize_index and affine.delinearize_index (#188369)
Allow `affine.delinearize_index` and `affine.linearize_index` to operate
on `vector<...x index>` types in addition to scalar indices.
---------
Signed-off-by: Keshav Vinayak Jha <keshavvinayakjha at gmail.com>
Co-authored-by: Claude Opus 4.6 <noreply at anthropic.com>
Commit: 7a3b7f142d8ffd7b3e2a9cf0a065e3ff7bf76241
https://github.com/llvm/llvm-project/commit/7a3b7f142d8ffd7b3e2a9cf0a065e3ff7bf76241
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2026-03-30 (Mon, 30 Mar 2026)
Changed paths:
M clang/include/clang/CIR/MissingFeatures.h
M clang/lib/CIR/CodeGen/CIRGenCleanup.cpp
M clang/lib/CIR/CodeGen/CIRGenCleanup.h
A clang/test/CIR/CodeGen/new-delete-deactivation.cpp
Log Message:
-----------
[CIR] Implement handling of cleanups with active flag (#187389)
This implements handling of cleanup scopes in cases where a flag is
needed to indicate whether or not the cleanup is active. This happens in
cases where a cleanup is no longer required, but it isn't at the top of
the cleanup stack so it can't be popped. A temporary variable is used to
set the cleanup to an inactive state when it is no longer needed.
Assisted-by: Cursor / claude-4.6-opus-high (implementation)
Assisted-by: Cursor / gpt-5.3-codex (tests)
Commit: 8b21fe60b43fe358321bca904ae307406725c002
https://github.com/llvm/llvm-project/commit/8b21fe60b43fe358321bca904ae307406725c002
Author: Daniel Thornburgh <dthorn at google.com>
Date: 2026-03-30 (Mon, 30 Mar 2026)
Changed paths:
M clang/lib/CodeGen/BackendUtil.cpp
M lld/COFF/InputFiles.cpp
M lld/COFF/LTO.cpp
M lld/COFF/LTO.h
M lld/COFF/SymbolTable.cpp
M lld/ELF/Driver.cpp
M lld/ELF/LTO.cpp
M lld/ELF/LTO.h
A lld/test/COFF/lto-libcall-archive-bitcode.test
A lld/test/ELF/lto/libcall-archive-bitcode.test
A lld/test/wasm/lto/libcall-archive-bitcode.ll
M lld/wasm/LTO.cpp
M lld/wasm/LTO.h
M lld/wasm/SymbolTable.cpp
M llvm/docs/ReleaseNotes.md
M llvm/include/llvm/LTO/LTO.h
M llvm/include/llvm/LTO/LTOBackend.h
M llvm/lib/LTO/LTO.cpp
M llvm/lib/LTO/LTOBackend.cpp
M llvm/lib/LTO/LTOCodeGenerator.cpp
M llvm/lib/LTO/ThinLTOCodeGenerator.cpp
A llvm/test/LTO/Resolution/X86/libcall-external.ll
A llvm/test/LTO/Resolution/X86/libcall-in-thin-link.ll
A llvm/test/LTO/Resolution/X86/libcall-in-tu.ll
M llvm/tools/llvm-lto2/llvm-lto2.cpp
Log Message:
-----------
[LTO][LLD] Prevent invalid LTO libfunc transforms (#164916)
In LTO, part of LLVM's middle-end runs after linking has finished. LTO's
semantics depend on the complete set of extracted bitcode files being
known at this time. If the middle-end inserts new calls to library
functions (libfuncs) that are implemented in bitcode, this could extract
new bitcode object files into the link. These cannot be compiled,
leading to undefined symbol references.
Additionally, the middle-end in LTO may reason that such library
functions have no references, and it may internalize them, then
manipulate their API or even delete them. Afterwards, it may emit a call
to them, again producing undefined symbol references.
This patch resolves the former issue by ensuring that the middle end
emits no new references to symbols defined in bitcode, and it resolves
the latter issue by ensuring that extracted bitcode for libfuncs is
considered external, since new calls may be emitted to them at any time.
The new semantics are not yet established for MachO LLD, which does not
yet appear to have any special handling for libcalls in LTO. It also
does not yet support distributed ThinLTO; doing so would require
additional (de)serialization work.
This is the patch referenced in @ilovepi's and my talk at the last LLVM
devmeeting: "LT-Uh-Oh"
Gemini 3.1 was used in porting to COFF and WASM LLDs.
Commit: d74f098a305b39f96d5455d301ceea512acadc62
https://github.com/llvm/llvm-project/commit/d74f098a305b39f96d5455d301ceea512acadc62
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-03-30 (Mon, 30 Mar 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/test/CodeGen/AMDGPU/clamp.ll
M llvm/test/CodeGen/AMDGPU/mad-mix-lo.ll
Log Message:
-----------
[DAG] isKnownNeverNaN - fallback to computeKnownFPClass check (#189476)
Remove ConstantFPSDNode handling from isKnownNeverNaN and fallback to
using computeKnownFPClass if there are no opcode matches in
isKnownNeverNaN
The test check changes are due to isKnownNeverNaN not handling
UNDEF/POISON but computeKnownFPClass does (POISON in particular now
returns isKnownNeverNaN == true, preventing a ISD::FCANONICALIZE call in
expandFMINNUM_FMAXNUM).
Commit: 74c42432252de25caa51deaa38458d734622a579
https://github.com/llvm/llvm-project/commit/74c42432252de25caa51deaa38458d734622a579
Author: Schrodinger ZHU Yifan <yifanzhu at rochester.edu>
Date: 2026-03-30 (Mon, 30 Mar 2026)
Changed paths:
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/docs/dev/undefined_behavior.rst
M libc/hdr/types/CMakeLists.txt
A libc/hdr/types/VISIT.h
A libc/hdr/types/posix_tnode.h
M libc/include/CMakeLists.txt
M libc/include/llvm-libc-types/CMakeLists.txt
A libc/include/llvm-libc-types/__action_closure_fn_t.h
A libc/include/llvm-libc-types/__action_fn_t.h
A libc/include/llvm-libc-types/__free_fn_t.h
A libc/include/llvm-libc-types/posix_tnode.h
M libc/include/search.yaml
M libc/src/__support/weak_avl.h
M libc/src/search/CMakeLists.txt
A libc/src/search/tdelete.cpp
A libc/src/search/tdelete.h
A libc/src/search/tdestroy.cpp
A libc/src/search/tdestroy.h
A libc/src/search/tfind.cpp
A libc/src/search/tfind.h
A libc/src/search/tsearch.cpp
A libc/src/search/tsearch.h
A libc/src/search/twalk.cpp
A libc/src/search/twalk.h
A libc/src/search/twalk_r.cpp
A libc/src/search/twalk_r.h
M libc/test/src/__support/weak_avl_test.cpp
M libc/test/src/search/CMakeLists.txt
A libc/test/src/search/tsearch_test.cpp
Log Message:
-----------
[libc][tsearch] add tsearch functions (#172625)
Commit: 5b00cdf8e18354764c8cdd27a8ad3f858afd76bb
https://github.com/llvm/llvm-project/commit/5b00cdf8e18354764c8cdd27a8ad3f858afd76bb
Author: Jason Molenda <jmolenda at apple.com>
Date: 2026-03-30 (Mon, 30 Mar 2026)
Changed paths:
M lldb/source/Plugins/Platform/MacOSX/PlatformDarwin.cpp
M lldb/source/Plugins/Platform/MacOSX/PlatformDarwinDevice.cpp
M lldb/source/Plugins/Platform/MacOSX/PlatformDarwinDevice.h
M lldb/source/Plugins/Platform/MacOSX/PlatformRemoteDarwinDevice.cpp
M lldb/unittests/Platform/PlatformMacOSXTest.cpp
Log Message:
-----------
[lldb][macOS] Recognize new layouts for DeviceSupport directories (#188646)
When debugging a remote Darwin device (iOS, macOS, etc), lldb needs to
find a local copy of all the system libraries (the system's shared
cache) so we don't need to read them over gdb-remote serial protocol at
the start of every debug session.
Xcode etc normally creates these expanded shared caches in
~/Library/Developer/Xcode/<OS> DeviceSupport/<OS VER> (<OS
BUILD>)/Symbols
So when lldb sees a file like /usr/lib/libSystem.B.dylib, it may find a
copy at in
~/L/D/Xcode/iOS DeviceSupport/26.2
(23B87)/Symbols/usr/lib/libSystem.B.dylib
There may be multiple expanded shared caches in these DeviceSupport
directories, so we try to parse the "os version" and "os build" out of
the filepath name, and look in a directory that matches the target
device's OS Version as an optimization, to avoid opening the given file
in other DeviceSupport directories.
There is a new layout where the cpu arch exists as a subdirectory under
the "<OS VER> (<OS BUILD>)" directory. e.g.
~/L/D/Xcode/iOS DeviceSupport/26.2 (23B87)/arm64e/Symbols/...
and it is possible that we could have multiple arch names for a given
build -- for instance, an Apple Watch that can have either arm64e or
arm64_32 shared caches.
The existing code also had a very simplistic way of parsing "<OS VER>
(<OS BUILD>)" from the directory name that hasn't been kept up to date
with how the directory names have changed over the years. We have some
like "Watch4,2 10.0 (21R329)" or "10.0 (21R329) universal" which may not
parse with the older parser.
This PR looks for target arch subdirs under the given directories,
passes the os version/build version string separately because it may not
be the final component in the directory name any more, and updates the
directory parser that finds the version and build numbers.
rdar://171821410
Commit: 18e695890306c6824cc15779e1acb7e5956cbec1
https://github.com/llvm/llvm-project/commit/18e695890306c6824cc15779e1acb7e5956cbec1
Author: Alex Voicu <alexandru.voicu at amd.com>
Date: 2026-03-30 (Mon, 30 Mar 2026)
Changed paths:
M clang/docs/LanguageExtensions.rst
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/AMDGPUTypes.def
M clang/include/clang/Basic/Builtins.def
M clang/include/clang/Basic/BuiltinsAMDGPU.td
M clang/include/clang/Basic/DiagnosticGroups.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Sema/SemaAMDGPU.h
M clang/include/clang/Serialization/ASTBitCodes.h
M clang/lib/AST/ASTContext.cpp
M clang/lib/AST/Type.cpp
M clang/lib/Basic/Targets/SPIR.cpp
M clang/lib/Basic/Targets/SPIR.h
M clang/lib/CodeGen/CGDebugInfo.cpp
M clang/lib/CodeGen/CGExprScalar.cpp
M clang/lib/CodeGen/CodeGenTypes.cpp
M clang/lib/CodeGen/TargetBuiltins/AMDGPU.cpp
M clang/lib/Sema/JumpDiagnostics.cpp
M clang/lib/Sema/Sema.cpp
M clang/lib/Sema/SemaAMDGPU.cpp
M clang/lib/Sema/SemaCast.cpp
M clang/lib/Sema/SemaDecl.cpp
M clang/lib/Sema/SemaExpr.cpp
M clang/lib/Sema/SemaInit.cpp
M clang/lib/Sema/SemaOverload.cpp
A clang/test/CodeGen/amdgpu-builtin-is-invocable.c
A clang/test/CodeGen/amdgpu-builtin-processor-is.c
A clang/test/CodeGen/amdgpu-feature-builtins-invalid-use.cpp
M clang/test/CodeGenCUDA/builtins-spirv-amdgcn.cu
M clang/test/CodeGenHIP/spirv-amdgcn-dpp-const-fold.hip
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx10.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx11.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-vi.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn.cl
A clang/test/SemaHIP/amdgpu-feature-builtins-cant-jump.hip
A clang/test/SemaHIP/amdgpu-feature-builtins-return-type-deduction.hip
A clang/test/SemaHIP/amdgpu-feature-predicate.hip
A clang/test/SemaHIP/amdgpu-feature-predicates-guard-use.hip
A clang/test/SemaHIP/amdgpu-is-invocable.hip
A clang/test/SemaHIP/amdgpu-processor-is.hip
M clang/utils/TableGen/ClangBuiltinsEmitter.cpp
M llvm/lib/Target/SPIRV/SPIRVBuiltins.cpp
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
M llvm/lib/Target/SPIRV/SPIRVPrepareFunctions.cpp
M llvm/lib/Target/SPIRV/SPIRVPrepareGlobals.cpp
A llvm/test/CodeGen/SPIRV/SpecConstants/amdgcnspirv-feature-predicate-specconstant.ll
A llvm/test/CodeGen/SPIRV/passes/SPIRVPrepareGlobals-predicate-id-string.ll
Log Message:
-----------
[SPIRV][AMDGPU][clang][CodeGen][opt] Add late-resolved feature identifying predicates (#134016)
This change adds two builtins for AMDGPU:
- `__builtin_amdgcn_processor_is`, which is similar in observable
behaviour with `__builtin_cpu_is`, except that it is never "evaluated"
at run time;
- `__builtin_amdgcn_is_invocable`, which is behaviourally similar with
`__has_builtin`, except that it is not a macro (i.e. not evaluated at
preprocessing time).
Neither of these are `constexpr`, even though when compiling for
concrete (i.e. `gfxXXX` / `gfxXXX-generic`) targets they get evaluated
in Clang, so they shouldn't tear the AST too badly / at all for
multi-pass compilation cases like HIP. They can only be used in specific
contexts (as args to control structures).
The motivation for adding these is two-fold:
- as a nice to have, it provides an AST-visible way to incorporate
architecture specific code, rather than having to rely on macros and the
preprocessor, which burn in the choice quite early;
- as a must have, it allows featureful AMDGCN flavoured SPIR-V to be
produced, where target specific capability is guarded and chosen or
discarded when finalising compilation for a concrete target; this is
built atop the Speciali\ation Constant concept which is described in the
SPIR-V specification under section [2.12
Specialization](https://registry.khronos.org/SPIR-V/specs/unified1/SPIRV.html#_specialization_2)
I've tried to keep the overall footprint of the change small. The
changes to Sema are a bit unpleasant, but there was a strong desire to
have Clang validate these, and to constrain their uses, and this was the
most compact solution I could come up with (suggestions welcome).
---------
Co-authored-by: Juan Manuel Martinez Caamaño <jmartinezcaamao at gmail.com>
Co-authored-by: Voicu <avoicu at amd.com>
Commit: 02402beefec61c5947c9d3bec60626a4afd860a8
https://github.com/llvm/llvm-project/commit/02402beefec61c5947c9d3bec60626a4afd860a8
Author: vporpo <vasileios.porpodas at amd.com>
Date: 2026-03-30 (Mon, 30 Mar 2026)
Changed paths:
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/VecUtils.h
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Passes/BottomUpVec.cpp
M llvm/unittests/Transforms/Vectorize/SandboxVectorizer/VecUtilsTest.cpp
Log Message:
-----------
[SandboxVec][VecUtils] Lane Enumerator (#188355)
This patch introduces an iterator that helps us iterate over lane-value
pairs in a range. For example, given a container `(i32 %v0, <2 x i32>
%v1, i32 %v2)` we get:
```
Lane Value
0 %v0
1 %v1
3 %v2
```
We use this iterator to replace the lane counting logic in
BottomUpVec.cpp.
Commit: c93049ef504f942af0f884ce8a5efc21df21d131
https://github.com/llvm/llvm-project/commit/c93049ef504f942af0f884ce8a5efc21df21d131
Author: Vasileios Porpodas <vasileios.porpodas at amd.com>
Date: 2026-03-30 (Mon, 30 Mar 2026)
Changed paths:
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/VecUtils.h
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Passes/BottomUpVec.cpp
M llvm/unittests/Transforms/Vectorize/SandboxVectorizer/VecUtilsTest.cpp
Log Message:
-----------
Revert "[SandboxVec][VecUtils] Lane Enumerator (#188355)"
This reverts commit 02402beefec61c5947c9d3bec60626a4afd860a8.
Commit: 7ec77f8460e15cf680824d7d95dd11d34eb6bd42
https://github.com/llvm/llvm-project/commit/7ec77f8460e15cf680824d7d95dd11d34eb6bd42
Author: forking-google-bazel-bot[bot] <265904573+forking-google-bazel-bot[bot]@users.noreply.github.com>
Date: 2026-03-30 (Mon, 30 Mar 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[Bazel] Fixes 54b7230 (#189487)
This fixes 54b723097b39b536eb7d1d6947b65d53a096ed47.
Co-authored-by: Google Bazel Bot <google-bazel-bot at google.com>
Commit: 9c37e348df91e6aa46c3e472c591b99f7535a79e
https://github.com/llvm/llvm-project/commit/9c37e348df91e6aa46c3e472c591b99f7535a79e
Author: Henry Jiang <henry_jiang2 at apple.com>
Date: 2026-03-30 (Mon, 30 Mar 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64FastISel.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.h
Log Message:
-----------
[AArch64][NFC] Move `isZExtLoad/isSExtLoad` from `AArch64FastISel` to `AArch64InstrInfo` (#189486)
Move the static function `isZExtLoad` and `isSExtLoad` helper functions
from `AArch64FastISel` into `AArch64InstrInfo` to be reused by other
passes.
Commit: 27b9ea5ea090aa1c64baf7b3f619c72e3e15713f
https://github.com/llvm/llvm-project/commit/27b9ea5ea090aa1c64baf7b3f619c72e3e15713f
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-03-31 (Tue, 31 Mar 2026)
Changed paths:
M mlir/lib/Dialect/SparseTensor/Transforms/Utils/LoopEmitter.cpp
Log Message:
-----------
[MLIR][SparseTensor] Fix domination violation in co-iteration for dense iterators (#188959)
In exitWhileLoop, random-accessible (dense) iterators were being located
using whileOp.getResults().back() while the insertion point was still
inside the while loop's after block. This caused a domination violation:
the ADDI created by locate() was inside the after block, but it was
later used (via derefImpl's SUBI) after the while loop exits.
Move the locate() calls for random-accessible iterators to after
builder.setInsertionPointAfter(whileOp), where the while results are
properly in scope.
Fixes 10 failing tests under MLIR_ENABLE_EXPENSIVE_PATTERN_API_CHECKS.
Assisted-by: Claude Code
Co-authored-by: Claude Sonnet 4.6 <noreply at anthropic.com>
Commit: e097875417bc5458e22d594276dd645a137ea91d
https://github.com/llvm/llvm-project/commit/e097875417bc5458e22d594276dd645a137ea91d
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-03-31 (Tue, 31 Mar 2026)
Changed paths:
M mlir/lib/Dialect/SparseTensor/Transforms/SparseAssembler.cpp
Log Message:
-----------
[MLIR][SparseTensor] Fix fingerprint changes in SparseFuncAssembler (#188958)
SparseFuncAssembler::matchAndRewrite was calling funcOp.setName(),
funcOp.setPrivate(), and funcOp->removeAttr() directly without notifying
the rewriter, causing "operation fingerprint changed" errors under
MLIR_ENABLE_EXPENSIVE_PATTERN_API_CHECKS.
Wrap all in-place funcOp mutations with rewriter.modifyOpInPlace.
Assisted-by: Claude Code
Fix a failure present with MLIR_ENABLE_EXPENSIVE_PATTERN_API_CHECKS=ON.
Co-authored-by: Claude Sonnet 4.6 <noreply at anthropic.com>
Commit: 5da2546594f8555d5d283e3ee3cda14bc5a80eec
https://github.com/llvm/llvm-project/commit/5da2546594f8555d5d283e3ee3cda14bc5a80eec
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-03-31 (Tue, 31 Mar 2026)
Changed paths:
M mlir/lib/Dialect/SCF/IR/SCF.cpp
M mlir/test/Dialect/SCF/canonicalize.mlir
Log Message:
-----------
[mlir][scf] Fix FoldTensorCastOfOutputIntoForallOp write order bug (#189162)
`FoldTensorCastOfOutputIntoForallOp` incorrectly updated the
destinations of `tensor.parallel_insert_slice` ops in the `in_parallel`
block by zipping `getYieldingOps()` with `getRegionIterArgs()`
positionally. This assumed that the i-th yielding op writes to the i-th
shared output, which is not required by the IR semantics. When slices
are written to shared outputs in non-positional order, the
canonicalization would silently reverse the write targets, producing
incorrect output.
Fix by replacing the positional zip with a per-destination check: for
each yielding op's destination operand, if it is a `tensor.cast` result
whose source is one of the new `scf.forall` region iter args (i.e., a
cast we introduced to bridge the type change), replace the destination
with the cast's source directly. This correctly handles all orderings.
Add a regression test that exercises the multi-result case where
`parallel_insert_slice` ops write to shared outputs in non-sequential
order.
Fixes #172981
Assisted-by: Claude Code
Commit: acbf3f318694a4f3c382caf040cf586e1ff02c5f
https://github.com/llvm/llvm-project/commit/acbf3f318694a4f3c382caf040cf586e1ff02c5f
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-03-31 (Tue, 31 Mar 2026)
Changed paths:
M mlir/lib/Conversion/SCFToControlFlow/SCFToControlFlow.cpp
M mlir/test/Conversion/SCFToControlFlow/convert-to-cfg.mlir
Log Message:
-----------
[MLIR][SCF] Fix scf.index_switch lowering to preserve large case values (#189230)
`IndexSwitchLowering` stored case values as `SmallVector<int32_t>`,
which silently truncated any `int64_t` case value larger than INT32_MAX
(e.g. `4294967296` became `0`). The `cf.switch` flag was also created
via `arith.index_cast index -> i32`, losing the upper 32 bits on 64-bit
platforms.
Fix: store case values as `SmallVector<APInt>` with 64-bit width, cast
the index argument to `i64`, and use the `ArrayRef<APInt>` overload of
`cf::SwitchOp::create` so the resulting switch correctly uses `i64` case
values and flag type.
Fixes #111589
Assisted-by: Claude Code
Commit: 7b52dd6ad9ac16987d1646b651e5b1fd13b7cb41
https://github.com/llvm/llvm-project/commit/7b52dd6ad9ac16987d1646b651e5b1fd13b7cb41
Author: Michael Jones <michaelrj at google.com>
Date: 2026-03-30 (Mon, 30 Mar 2026)
Changed paths:
M libc/src/__support/wchar/CMakeLists.txt
M libc/src/__support/wchar/character_converter.h
M libc/src/__support/wchar/mbrtowc.cpp
M libc/src/__support/wchar/mbrtowc.h
M libc/src/__support/wchar/mbsnrtowcs.h
M libc/src/__support/wchar/string_converter.h
M libc/src/__support/wchar/wcrtomb.h
M libc/src/__support/wchar/wcsnrtombs.h
Log Message:
-----------
[libc][NFC] Add LIBC_INLINE and cleanup wchar internals (#188856)
Some of the functions were missing LIBC_INLINE and some of the variable
names were less descriptive than I liked. This PR fixes both as well as
cleaning up dependencies.
Commit: 89d5d502e88c9fa1de56e066e89b942ee9be20de
https://github.com/llvm/llvm-project/commit/89d5d502e88c9fa1de56e066e89b942ee9be20de
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2026-03-30 (Mon, 30 Mar 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenBuiltin.cpp
M llvm/include/llvm/IR/Intrinsics.h
M llvm/lib/IR/Intrinsics.cpp
Log Message:
-----------
[NFC][LLVM] Rename `IITDescriptor` fields to confirm to LLVM CS (#189448)
Rename fields of `IITDescriptor` to conform to LLVM coding standards
naming conventions.
Commit: 8ca1cb7a96217002bd649a95142d981f570faffd
https://github.com/llvm/llvm-project/commit/8ca1cb7a96217002bd649a95142d981f570faffd
Author: Jonathan Thackray <jonathan.thackray at arm.com>
Date: 2026-03-31 (Tue, 31 Mar 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64SystemOperands.td
Log Message:
-----------
[AArch64][llvm] Separate TLBI-only feature gating from TLBIP aliases (part 2) (#189503)
(This is the change message for 306e86be5, which GitHub unhelpfully discarded
when I enabled "auto-merge" when all tests had passed. It merged my change
and didn't merge the detailed commit message which I had carefully written(!)
So this is an NFC change, for those in the future looking for the lost message,
which explains the changes in 306e86be5)
-------------
Correct the `TLBI` system operand definitions so the emitted aliases are
generated from a single data table per feature group. The TLBI data is now
written once as anonymous `TLBI<...>` entries inside a defvar list, and we
iterate over it with a foreach to define those entries.
Hopefully this is clearer and more future-proof, since it is a complex set of
interactions between `tlbi`/`tlbip` with `*nXS` variants, and differing gating.
The gating was incorrect before. The gating is now:
- `FeatureTLB_RMI`, `FeatureRME`, and `FeatureTLBIW` gate only TLBI aliases
- non-TLBIW `TLBI` ...nXS aliases are `FeatureXS-only`
- `TLBIW` ...nXS aliases are `FeatureTLBIW`-only
- all `TLBIP` aliases, including ...nXS, are `FeatureD128`-only
Update testcases accordingly (`llvm/test/MC/AArch64/armv8.7a-xs.s` had
inconsistent use of hyphen and underscore for error checking)
Commit: b85492b3d38724377186a37925dd3abf3258efcc
https://github.com/llvm/llvm-project/commit/b85492b3d38724377186a37925dd3abf3258efcc
Author: vangthao95 <vang.thao at amd.com>
Date: 2026-03-30 (Mon, 30 Mar 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.sudot4.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.sudot8.ll
Log Message:
-----------
AMDGPU/GlobalISel: RegBankLegalize rules for sudot4/sudot8 (#189104)
Commit: 12319b373a5f4b36c09165ed7f8e967bbb14b265
https://github.com/llvm/llvm-project/commit/12319b373a5f4b36c09165ed7f8e967bbb14b265
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-03-30 (Mon, 30 Mar 2026)
Changed paths:
M clang/lib/CodeGen/CGCall.cpp
M clang/test/CodeGenCXX/destructor-dead-on-return.cpp
M clang/test/CodeGenCXX/microsoft-vector-deleting-dtors.cpp
M clang/test/CodeGenCXX/microsoft-vector-deleting-dtors2.cpp
M clang/test/CodeGenCXX/ms-vdtors-devirtualization.cpp
M clang/test/OpenMP/for_reduction_codegen_UDR.cpp
M clang/test/utils/update_cc_test_checks/Inputs/explicit-template-instantiation.cpp.expected
Log Message:
-----------
[Clang] More aggressively mark this* dead_on_return in destructors (#183347)
Now also mark the this pointer dead_on_return for classes with a
non-zero number of base classes. We saw a limited number of failures
internally due to this change, so it doesn't seem like there are too
many problems with real world deployment.
Commit: 96bd7b6e152387c6d1ccb4b0e392773aa1bdec1e
https://github.com/llvm/llvm-project/commit/96bd7b6e152387c6d1ccb4b0e392773aa1bdec1e
Author: Demetrius Kanios <demetrius at kanios.net>
Date: 2026-03-30 (Mon, 30 Mar 2026)
Changed paths:
M llvm/include/llvm/Analysis/TargetTransformInfo.h
M llvm/include/llvm/Analysis/TargetTransformInfoImpl.h
M llvm/include/llvm/CodeGen/BasicTTIImpl.h
M llvm/include/llvm/CodeGen/TargetLowering.h
M llvm/lib/Analysis/TargetTransformInfo.cpp
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.h
M llvm/lib/Target/AMDGPU/R600ISelLowering.h
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86TargetTransformInfo.cpp
M llvm/lib/Target/X86/X86TargetTransformInfo.h
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
Log Message:
-----------
[CodeGen] Add additional params to `TargetLoweringBase::getTruncStoreAction` (#187422)
The truncating store analogue of #181104.
Adds `Alignment` and `AddrSpace` parameters to
`TargetLoweringBase::getTruncStoreAction` and dependents, and introduces
a `getCustomTruncStoreAction` hook for targets to customize legalization
behavior using this new information.
This change is fully backwards compatible from the target's point of
view, with `setTruncStoreAction` having identical functionality. The
change is purely additive.
Commit: b255e78cb9bf40ecc4c4a28ab81887de68b8afc3
https://github.com/llvm/llvm-project/commit/b255e78cb9bf40ecc4c4a28ab81887de68b8afc3
Author: Jim Lin <jim at andestech.com>
Date: 2026-03-31 (Tue, 31 Mar 2026)
Changed paths:
M lldb/include/lldb/Target/Process.h
Log Message:
-----------
[lldb] Fix copy-paste error in SetPrivateRunLockToRunning (#189322)
SetPrivateRunLockToRunning incorrectly delegated to
SetPrivateRunLockToStopped instead of SetPrivateRunLockToRunning,
causing the private run lock to never transition to the running state on
process resume.
Co-authored-by: Claude Opus 4.6 (1M context) <noreply at anthropic.com>
Commit: 47e3f42bc75d006ecaf820211cfff560681ab9d9
https://github.com/llvm/llvm-project/commit/47e3f42bc75d006ecaf820211cfff560681ab9d9
Author: Vasileios Porpodas <vasileios.porpodas at amd.com>
Date: 2026-03-31 (Tue, 31 Mar 2026)
Changed paths:
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/VecUtils.h
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Passes/BottomUpVec.cpp
M llvm/unittests/Transforms/Vectorize/SandboxVectorizer/VecUtilsTest.cpp
Log Message:
-----------
Reapply "[SandboxVec][VecUtils] Lane Enumerator (#188355)"
This reverts commit c93049ef504f942af0f884ce8a5efc21df21d131.
Commit: 35f89458fa2871b7590c115c9afea764dfc11c02
https://github.com/llvm/llvm-project/commit/35f89458fa2871b7590c115c9afea764dfc11c02
Author: Slava Zakharin <szakharin at nvidia.com>
Date: 2026-03-30 (Mon, 30 Mar 2026)
Changed paths:
M mlir/include/mlir/Interfaces/SideEffectInterfaces.h
M mlir/lib/Transforms/CSE.cpp
M mlir/test/Analysis/test-alias-analysis-modref.mlir
M mlir/test/IR/test-side-effects.mlir
M mlir/test/Transforms/cse.mlir
M mlir/test/lib/Dialect/Test/TestOpDefs.cpp
M mlir/test/lib/Dialect/Test/TestOps.td
M mlir/unittests/Interfaces/SideEffectInterfacesTest.cpp
Log Message:
-----------
[mlir] Made DefaultResource the root of memory resource hierarchy. (#187423)
DefaultResource is made the root of the memory resource hierarchy,
so now it overlaps with all resources.
RFC:
https://discourse.llvm.org/t/rfc-mlir-memory-region-hierarchy-for-mlir-side-effects/89811/32
Commit: ac12b327b2cfaaa689e975652320e85b5e37e5b2
https://github.com/llvm/llvm-project/commit/ac12b327b2cfaaa689e975652320e85b5e37e5b2
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-03-30 (Mon, 30 Mar 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-reduction-formation.ll
Log Message:
-----------
[RISCV] Check hasVInstructions() rather than hasStdExtZbb() for UMAX/UMIN/SMAX/SMIN combines. (#189506)
The combines are related to combining min/max with vector reductions. I
don't think it matters if Zbb is enabled.
I did not merge this with other hasVInstructions() because I have a P
extension patch coming after this that will need to separate them.
Commit: 9de3ebde1c8c0f5d51fe8906fcb8a88899970031
https://github.com/llvm/llvm-project/commit/9de3ebde1c8c0f5d51fe8906fcb8a88899970031
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-03-30 (Mon, 30 Mar 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
Log Message:
-----------
[RISCV] Avoid creating unnecessary node. Add missing break to switch. NFC (#189511)
Commit: 227edfb2f406e835b8ec91f0fce44d4f344a808c
https://github.com/llvm/llvm-project/commit/227edfb2f406e835b8ec91f0fce44d4f344a808c
Author: Mingjie Xu <xumingjie.enna1 at bytedance.com>
Date: 2026-03-31 (Tue, 31 Mar 2026)
Changed paths:
M llvm/include/llvm/Transforms/Utils/BasicBlockUtils.h
M llvm/include/llvm/Transforms/Utils/BypassSlowDivision.h
M llvm/lib/CodeGen/CodeGenPrepare.cpp
M llvm/lib/Transforms/Utils/BreakCriticalEdges.cpp
M llvm/lib/Transforms/Utils/BypassSlowDivision.cpp
M llvm/test/CodeGen/PowerPC/atomics-regression.ll
M llvm/test/CodeGen/RISCV/branch_zero.ll
M llvm/test/CodeGen/X86/apx/reloc-opt.ll
M llvm/test/Transforms/CodeGenPrepare/AMDGPU/bypass-slow-div-debug-info-inseltpoison.ll
M llvm/test/Transforms/CodeGenPrepare/AMDGPU/bypass-slow-div-debug-info.ll
Log Message:
-----------
[CodeGenPrepare][NFC] Reland: Update the dominator tree instead of rebuilding it (#179040)
The original differential revision is https://reviews.llvm.org/D153638
Reverted in
https://github.com/llvm/llvm-project/commit/f5b5a30858f32e237636acd296b6d0f87c1dfe97
because of causing a clang crash.
This patch relands it with the crash fixed. Call `DTU->flush()` in each
iteration of `while (MadeChange)`
loop, flush all awaiting BasicBlocks deletion, and prevent iterator
invalidation.
Commit: e1aef5ed5f0c2a958c76bcff0708803ae0588efb
https://github.com/llvm/llvm-project/commit/e1aef5ed5f0c2a958c76bcff0708803ae0588efb
Author: Feng Zou <feng.zou at intel.com>
Date: 2026-03-31 (Tue, 31 Mar 2026)
Changed paths:
M llvm/lib/Target/X86/X86CompressEVEX.cpp
A llvm/test/CodeGen/X86/apx/compress-evex-negative-nf.mir
M llvm/test/TableGen/x86-instr-mapping.inc
M llvm/utils/TableGen/X86InstrMappingEmitter.cpp
Log Message:
-----------
[X86][APX] Remove NF entries in X86CompressEVEXTable (#189308)
NF (No-Flags) instructions should not compress to non-NF instructions,
as this would incorrectly modify flags behavior. The compression table
is only intended for encoding optimizations that preserve semantics.
This removes the incorrect NF entries that could have led to
miscompilation if the compression logic were applied.
Commit: 14ce208a45eb0673f8b28409eec0628ad809923b
https://github.com/llvm/llvm-project/commit/14ce208a45eb0673f8b28409eec0628ad809923b
Author: Shivam Gupta <shivam98.tkg at gmail.com>
Date: 2026-03-31 (Tue, 31 Mar 2026)
Changed paths:
M lld/ELF/Arch/AArch64.cpp
A lld/test/ELF/aarch64-tls-dtprel.s
Log Message:
-----------
[LLD][AArch64] Handle R_AARCH64_TLS_DTPREL64 in non-alloc sections (#183962)
Clang plan to emit R_AARCH64_TLS_DTPREL64 in .debug_info (see PR
#146572). LLD currently fails to recognize this relocation.
This prevent the debugger from correctly locating TLS variables when
using the DWARF DW_OP_GNU_push_tls_address or DW_AT_location with DTPREL
offsets.
This patch adds support for R_AARCH64_TLS_DTPREL64, adds its mapping to
R_DTPREL.
Commit: 8e20a6dc866c54683f801d1ca041c6b3ba302485
https://github.com/llvm/llvm-project/commit/8e20a6dc866c54683f801d1ca041c6b3ba302485
Author: Shivam Gupta <shivam98.tkg at gmail.com>
Date: 2026-03-31 (Tue, 31 Mar 2026)
Changed paths:
M llvm/docs/ReleaseNotes.md
M llvm/lib/Target/AArch64/AArch64TargetObjectFile.cpp
M llvm/lib/Target/AArch64/AArch64TargetObjectFile.h
M llvm/test/DebugInfo/AArch64/tls-at-location.ll
Log Message:
-----------
[AArch64] Support TLS variables in debug info (#146572)
This adds an implementation of getDebugThreadLocalSymbol for AArch64 by
using AArch::S_DTPREL.
Fixes #83466
Commit: 1ec7e86b3a779df2a0af3f37e58c8f5b3a398d7f
https://github.com/llvm/llvm-project/commit/1ec7e86b3a779df2a0af3f37e58c8f5b3a398d7f
Author: Kewen Meng <kewen.meng at amd.com>
Date: 2026-03-30 (Mon, 30 Mar 2026)
Changed paths:
M clang/lib/CodeGen/BackendUtil.cpp
M lld/COFF/InputFiles.cpp
M lld/COFF/LTO.cpp
M lld/COFF/LTO.h
M lld/COFF/SymbolTable.cpp
M lld/ELF/Driver.cpp
M lld/ELF/LTO.cpp
M lld/ELF/LTO.h
R lld/test/COFF/lto-libcall-archive-bitcode.test
R lld/test/ELF/lto/libcall-archive-bitcode.test
R lld/test/wasm/lto/libcall-archive-bitcode.ll
M lld/wasm/LTO.cpp
M lld/wasm/LTO.h
M lld/wasm/SymbolTable.cpp
M llvm/docs/ReleaseNotes.md
M llvm/include/llvm/LTO/LTO.h
M llvm/include/llvm/LTO/LTOBackend.h
M llvm/lib/LTO/LTO.cpp
M llvm/lib/LTO/LTOBackend.cpp
M llvm/lib/LTO/LTOCodeGenerator.cpp
M llvm/lib/LTO/ThinLTOCodeGenerator.cpp
R llvm/test/LTO/Resolution/X86/libcall-external.ll
R llvm/test/LTO/Resolution/X86/libcall-in-thin-link.ll
R llvm/test/LTO/Resolution/X86/libcall-in-tu.ll
M llvm/tools/llvm-lto2/llvm-lto2.cpp
Log Message:
-----------
Revert "[LTO][LLD] Prevent invalid LTO libfunc transforms (#164916)"
This reverts commit 8b21fe60b43fe358321bca904ae307406725c002.
to unblock bot: https://lab.llvm.org/buildbot/#/builders/67/builds/1196
Commit: 42cc454777274a06933abcd098ec3281158717f9
https://github.com/llvm/llvm-project/commit/42cc454777274a06933abcd098ec3281158717f9
Author: Fangrui Song <i at maskray.me>
Date: 2026-03-30 (Mon, 30 Mar 2026)
Changed paths:
M lld/ELF/InputSection.cpp
M lld/ELF/InputSection.h
M lld/ELF/SyntheticSections.cpp
M lld/test/ELF/merge-piece-oob.s
Log Message:
-----------
[ELF] Optimize binary search in getSectionPiece (#187916)
Two optimizations to make getSectionPiece O(1) for common cases:
1. For non-string fixed-size merge sections, use direct computation
(offset / entsize) instead of binary search.
2. Pre-resolve piece indices for non-section Defined symbols during
splitSections. The piece index and intra-piece offset are packed
into Defined::value as ((pieceIdx+1) << 32) | intraPieceOffset,
replacing repeated binary searches (MarkLive, includeInSymtab,
getRelocTargetVA) with a single upfront resolution.
On x86-64, references to mergeable strings use local labels:
leaq .LC0(%rip), %rax # R_X86_64_PC32 .LC0-4
The relocations use non-section symbols and benefit from optimization 2.
On many other targets (e.g. AArch64), the addend is 0 and the assembler
adjusts such relocations to reference section symbols, which still use
binary search.
On a clang link (clang-relassert reproduce tarball, x86-64):
- --gc-sections: 1.05x as fast
Commit: 8a0c070309fcdc4f9fc2718b6a350f0de955f053
https://github.com/llvm/llvm-project/commit/8a0c070309fcdc4f9fc2718b6a350f0de955f053
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2026-03-31 (Tue, 31 Mar 2026)
Changed paths:
M libcxx/include/__hash_table
M libcxx/include/ext/hash_map
M libcxx/test/extensions/gnu/hash_map/copy.pass.cpp
R libcxx/test/extensions/gnu/hash_map/non_standard_layout.pass.cpp
R libcxx/test/extensions/gnu/hash_multimap/non_standard_layout.pass.cpp
Log Message:
-----------
[libc++] Revert recent changes to __hash_table and ext/hash_map (#189427)
This reverts commits 30084d74765c and 5b8c17580482. The second commit
was landed without proper review: not by fault of the submitter, but
because I mistakenly thought this was modifying something else entirely
that is unsupported. The first commit must also be reverted because it
is a breaking change without the second commit.
This corresponds to PRs #183223 and #188660, see those for more details.
Commit: d3224dc5da99877602f997c16bc5dffc775c5248
https://github.com/llvm/llvm-project/commit/d3224dc5da99877602f997c16bc5dffc775c5248
Author: NeKon69 <nobodqwe at gmail.com>
Date: 2026-03-31 (Tue, 31 Mar 2026)
Changed paths:
M clang/lib/Sema/SemaDeclCXX.cpp
A clang/test/FixIt/fixit-defaulted-comparison.cpp
Log Message:
-----------
[clang][Sema] Fix const FixIt placement after comparison operator member definition (#188093)
Update `InsertLoc` to use the token after the closing parenthesis
when adding `const` qualification to a comparison operator
Fixes #187887
Commit: 2e02135cec6aa56f780ef6b61799b50e6dd0d1a5
https://github.com/llvm/llvm-project/commit/2e02135cec6aa56f780ef6b61799b50e6dd0d1a5
Author: A. Jiang <de34 at live.cn>
Date: 2026-03-31 (Tue, 31 Mar 2026)
Changed paths:
M libcxx/docs/ReleaseNotes/23.rst
M libcxx/include/__bit_reference
A libcxx/test/std/containers/sequences/vector.bool/reference/builtin_address_of.pass.cpp
A libcxx/test/std/utilities/template.bitset/bitset.members/reference.builtin_address_of.pass.cpp
Log Message:
-----------
[libc++] Remove non-conforming `__bit_reference::operator&` (#188714)
The overloaded `operator&` caused non-conforming behavior when
- using `operator==` to compare "addresses" of proxy reference objects,
and
- relying on the exact type of `&ref`.
No deprecation warning is added, becaue it should be portable to write
`&ref` where `ref` is a proxy reference variable, and this patch just
corrects the behavior.
`__bit_const_reference::operator&` is kept, because when one defines
`_LIBCPP_ABI_BITSET_VECTOR_BOOL_CONST_SUBSCRIPT_RETURN_BOOL` to make the
libc++ implementation strategy conforming, the `operator&` will never be
exposed to users.
Commit: 3d96b36964e808b14c660bcbf248b9dc856d43a2
https://github.com/llvm/llvm-project/commit/3d96b36964e808b14c660bcbf248b9dc856d43a2
Author: pkarveti <pkarveti at qti.qualcomm.com>
Date: 2026-03-31 (Tue, 31 Mar 2026)
Changed paths:
M llvm/include/llvm/Target/Target.td
M llvm/lib/Target/Hexagon/HexagonHazardRecognizer.cpp
M llvm/test/CodeGen/Generic/reloc-none.ll
Log Message:
-----------
[Hexagon] Fix infinite loop in scheduler for RELOC_NONE instruction (#188690)
The llvm.reloc.none intrinsic (introduced in 5f08fb4d72f6) causes an
infinite loop when compiling for Hexagon target. The Hexagon scheduler's
hazard recognizer enters an infinite loop because RELOC_NONE
RELOC_NONE is a pseudo-instruction that doesn't correspond to real
hardware, but the Hexagon hazard recognizer was treating it as a regular
instruction requiring hardware resource allocation.
Mark RELOC_NONE as a meta-instruction and update Hexagon's hazard
recognizer to skip resource checks for meta-instructions, similar to how
it handles zero-cost instructions.
Commit: 035ae0261c7077f97541c662db5f30b6d81d0616
https://github.com/llvm/llvm-project/commit/035ae0261c7077f97541c662db5f30b6d81d0616
Author: Jim Lin <jim at andestech.com>
Date: 2026-03-31 (Tue, 31 Mar 2026)
Changed paths:
M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
Log Message:
-----------
[RISCV] Fix discarded return value in RISCVOperand::print for FRM (#189530)
The roundingModeToString() return value was not being written to the
output stream, causing FRM operands to print as "<frm: >" with no
rounding mode name in debug output.
Co-authored-by: Claude Opus 4.6 (1M context) <noreply at anthropic.com>
Commit: 5b2363a1027c3a172326d0f43a23fbbe5d70a304
https://github.com/llvm/llvm-project/commit/5b2363a1027c3a172326d0f43a23fbbe5d70a304
Author: Himadhith <79003240+Himadhith at users.noreply.github.com>
Date: 2026-03-31 (Tue, 31 Mar 2026)
Changed paths:
A lib.out
M libcxx/test/std/thread/futures/futures.async/thread_create_failure.pass.cpp
A tmp.exe
Log Message:
-----------
[libc++][AIX] Fix force_thread_creation_failure by using RLIMIT_THREADS (#188787)
This patch fixes the test `force_thread_creation_failure.cpp` on AIX by
using platform specific `RLIMIT_THREADS` which helps in restricting the
thread creation as `RLIMIT_NPROC` on AIX restricts processes and not
threads.
---------
Co-authored-by: himadhith <himadhith.v at ibm.com>
Commit: f48425edca7ff9f43abb3ec7cb1252e7edfbf163
https://github.com/llvm/llvm-project/commit/f48425edca7ff9f43abb3ec7cb1252e7edfbf163
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-03-31 (Tue, 31 Mar 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUCodeGenPrepare.cpp
M llvm/test/CodeGen/AMDGPU/fract-match.ll
Log Message:
-----------
AMDGPU: Match fract pattern with swapped edge case check (#189081)
A fract implementation can equivalently be written as
r = fmin(x - floor(x))
r = isnan(x) ? x : r;
r = isinf(x) ? 0.0 : r;
or:
r = fmin(x - floor(x));
r = isinf(x) ? 0.0 : r;
r = isnan(x) ? x : r;
Previously this only matched the previous form. Match
the case where the isinf check is the inner clamp. There are
a few more ways to write this pattern (e.g., move the clamp of
infinity to the input) but I haven't encountered that in the wild.
The existing code seems to be trying too hard to match noncanonical
variants of the pattern. Only handles the result that all 4 permutations
of compare and select produce out of instcombine.
Commit: 598f3535fa96ee599d670ede3840beeca570ec1f
https://github.com/llvm/llvm-project/commit/598f3535fa96ee599d670ede3840beeca570ec1f
Author: Luke Lau <luke at igalia.com>
Date: 2026-03-31 (Tue, 31 Mar 2026)
Changed paths:
M llvm/include/llvm/CodeGen/BasicTTIImpl.h
M llvm/include/llvm/CodeGen/ISDOpcodes.h
M llvm/include/llvm/CodeGen/TargetLowering.h
M llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/lib/CodeGen/TargetLoweringBase.cpp
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
M llvm/test/CodeGen/AArch64/intrinsic-cttz-elts-sve.ll
M llvm/test/CodeGen/AArch64/intrinsic-cttz-elts.ll
M llvm/test/CodeGen/AArch64/sve-mask-partition.ll
A llvm/test/CodeGen/AMDGPU/cttz-elts.ll
A llvm/test/CodeGen/PowerPC/cttz-elts.ll
A llvm/test/CodeGen/RISCV/rvv/cttz-elts-scalarize.ll
M llvm/test/CodeGen/RISCV/rvv/cttz-elts.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-cttz-elts.ll
M llvm/test/CodeGen/X86/intrinsic-cttz-elts.ll
Log Message:
-----------
[SelectionDAG] Expand CTTZ_ELTS[_ZERO_POISON] and handle legalization (#188691)
This is a second attempt at "[SelectionDAG] Expand
CTTZ_ELTS[_ZERO_POISON] and handle splitting" (#188220)
That PR had to be reverted in 7d39664a6ae8daaf186b65578492244d96a50bf2
because we had crashes on AMDGPU since we didn't have scalarization
support, and other crashes on PowerPC because we didn't handle the case
when a vector needed widened. Tests for these are added in
AMDGPU/cttz-elts.ll, RISCV/rvv/cttz-elts-scalarize.ll and
PowerPC/cttz-elts.ll.
The former crash has been fixed by adding
DAGTypeLegalizer::ScalarizeVecOp_CTTZ_ELTS.
The second crash has been fixed by reworking
TargetLowering::expandCttzElts. The expansion for CTTZ_ELTS is nearly
identical to VECTOR_FIND_LAST_ACTIVE, except it uses a reverse step
vector and subtracts the result from VF. The easiest way to fix these
crashes without introducing regressions is to reuse the
VECTOR_FIND_LAST_ACTIVE expansion which already handles the case where
the vector needs widened.
This means that the node now needs to take in a boolean vector argument
and uses VSELECT instead of an AND to zero out inactive lanes, so the op
promotion code has also been shared.
Commit: fa136df3e74c1fd0b838352484aa38c471d21cbd
https://github.com/llvm/llvm-project/commit/fa136df3e74c1fd0b838352484aa38c471d21cbd
Author: Shivam Gupta <shivam98.tkg at gmail.com>
Date: 2026-03-31 (Tue, 31 Mar 2026)
Changed paths:
M llvm/lib/Object/RelocationResolver.cpp
M llvm/test/DebugInfo/AArch64/tls-at-location.ll
Log Message:
-----------
[llvm-dwarfdump] Support R_AARCH64_TLS_DTPREL64 in Object/RelocationResolver.cpp (#187649)
In patch https://github.com/llvm/llvm-project/pull/146572 we have plan
to emit R_AARCH64_TLS_DTPREL64. This give us the warning while using
llvm-dwarfdump for the object file which has tls variables -
warning: failed to compute relocation: R_AARCH64_TLS_DTPREL64, Invalid
data was encountered while parsing the file
To fix this warning we have mark the relocation as supported however
final absolute address of a TLS variable is determined at runtime,
resolving to the symbol's section-relative offset in the object file is
mitigate the warning.
Commit: dbad8a1e24c9e63041d91c8d5551225024b983eb
https://github.com/llvm/llvm-project/commit/dbad8a1e24c9e63041d91c8d5551225024b983eb
Author: Max Desiatov <m_desiatov at apple.com>
Date: 2026-03-31 (Tue, 31 Mar 2026)
Changed paths:
M llvm/lib/Target/WebAssembly/WebAssemblyFixFunctionBitcasts.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyMachineFunctionInfo.cpp
A llvm/test/CodeGen/WebAssembly/swiftasync-coroutine.ll
A llvm/test/CodeGen/WebAssembly/swifttailcc-musttail-no-tailcall.ll
A llvm/test/CodeGen/WebAssembly/swifttailcc-no-tailcall.ll
A llvm/test/CodeGen/WebAssembly/swifttailcc.ll
Log Message:
-----------
Wasm: add support for `swifttailcc` calling convention (#188296)
Wasm backend already supports tail calls where available, we only need
to enable corresponding branches for this calling convention.
Commit: 7365bfb3e0650918f7272a0817785c6c01d2feda
https://github.com/llvm/llvm-project/commit/7365bfb3e0650918f7272a0817785c6c01d2feda
Author: Jay Foad <jay.foad at amd.com>
Date: 2026-03-31 (Tue, 31 Mar 2026)
Changed paths:
M llvm/lib/Target/X86/GISel/X86InstructionSelector.cpp
M llvm/test/CodeGen/X86/GlobalISel/select-insert-vec256.mir
M llvm/test/CodeGen/X86/GlobalISel/select-insert-vec512.mir
M llvm/test/CodeGen/X86/GlobalISel/select-merge-vec256.mir
M llvm/test/CodeGen/X86/GlobalISel/select-merge-vec512.mir
Log Message:
-----------
[X86][GISel] Avoid creating subreg def operands in emitInsertSubreg (#189408)
emitInsertSubreg builds a COPY with a subregister def operand, but these
probably should not be allowed in SSA MIR. Change it to build an
equivalent use of INSERT_SUBREG instead.
Commit: 6e2e06f98e164be53528ac19c7a307e92caa53eb
https://github.com/llvm/llvm-project/commit/6e2e06f98e164be53528ac19c7a307e92caa53eb
Author: Ruoyu Qiu <cabbaken at outlook.com>
Date: 2026-03-31 (Tue, 31 Mar 2026)
Changed paths:
M llvm/include/llvm/Analysis/DependenceAnalysis.h
M llvm/lib/Analysis/DependenceAnalysis.cpp
Log Message:
-----------
[DA] Refactor the signature of the Exact RDIV test (NFCI) (#189535)
Commit: 0f75ecf2326d70394026277d9b40f6e53434c6da
https://github.com/llvm/llvm-project/commit/0f75ecf2326d70394026277d9b40f6e53434c6da
Author: David Spickett <david.spickett at arm.com>
Date: 2026-03-31 (Tue, 31 Mar 2026)
Changed paths:
M lldb/include/lldb/Target/Target.h
M lldb/source/Target/Target.cpp
Log Message:
-----------
[lldb] Only create RegisterTypeBuilderClang plugin once (#189393)
This plugin creates types based on information from target XML, which is
parsed only once per session. It has internal logic to reuse created
types, but the plugin itself was being remade every time a type was
requested.
Commit: 0c2c3f05ff688a245caf95af0f6c5e75b8ae27f8
https://github.com/llvm/llvm-project/commit/0c2c3f05ff688a245caf95af0f6c5e75b8ae27f8
Author: Endre Fülöp <endre.fulop at sigmatechnology.com>
Date: 2026-03-31 (Tue, 31 Mar 2026)
Changed paths:
M clang/test/Analysis/bstring.cpp
Log Message:
-----------
[analyzer][NFC] Reorganize bstring.cpp tests (#188709)
This change eliminates preprocessor-based suppression of test cases by
introducing multi-prefix verify options to run-lines. This slightly
increases coverage.
Commit: 199e5b71446895204f2912ce5d68b8019d3b78c9
https://github.com/llvm/llvm-project/commit/199e5b71446895204f2912ce5d68b8019d3b78c9
Author: Himadhith <79003240+Himadhith at users.noreply.github.com>
Date: 2026-03-31 (Tue, 31 Mar 2026)
Changed paths:
R lib.out
R tmp.exe
Log Message:
-----------
[NFC] Remove stray files from top level directory (#189563)
Added untracked files into the top level directory by mistake, reverting
the change in this PR.
Co-authored-by: himadhith <himadhith.v at ibm.com>
Commit: fbfb83978cdc4e22996a26b4319d6df1514f08c6
https://github.com/llvm/llvm-project/commit/fbfb83978cdc4e22996a26b4319d6df1514f08c6
Author: Jay Foad <jay.foad at amd.com>
Date: 2026-03-31 (Tue, 31 Mar 2026)
Changed paths:
M llvm/lib/CodeGen/MachineVerifier.cpp
Log Message:
-----------
[MachineVerifier] Disallow subregister defs in SSA form (#189403)
Commit: f76f41f7027a4e96bac040f0b1b7f4cead0d2488
https://github.com/llvm/llvm-project/commit/f76f41f7027a4e96bac040f0b1b7f4cead0d2488
Author: Mel Chen <mel.chen at sifive.com>
Date: 2026-03-31 (Tue, 31 Mar 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/sve-vector-reverse-mask4.ll
M llvm/test/Transforms/LoopVectorize/AArch64/vector-reverse-mask4.ll
M llvm/test/Transforms/LoopVectorize/RISCV/dbg-tail-folding-by-evl.ll
M llvm/test/Transforms/LoopVectorize/RISCV/predicated-reverse-store.ll
M llvm/test/Transforms/LoopVectorize/RISCV/riscv-vector-reverse.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-reverse-load-store.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-uniform-store.ll
M llvm/test/Transforms/LoopVectorize/VPlan/RISCV/vplan-riscv-vector-reverse.ll
M llvm/test/Transforms/LoopVectorize/X86/masked_load_store.ll
M llvm/unittests/Transforms/Vectorize/VPlanTest.cpp
Log Message:
-----------
[VPlan] Extract reverse mask from reverse accesses (#155579)
Following #146525, separate the reverse mask from reverse access
recipes.
At the same time, remove the unused member variable `Reverse` from
`VPWidenMemoryRecipe`.
This will help to reduce redundant reverse mask computations by
VPlan-based common subexpression elimination.
Commit: 63e0ab7b4b51db7d93bf247b645c33b63f8ef747
https://github.com/llvm/llvm-project/commit/63e0ab7b4b51db7d93bf247b645c33b63f8ef747
Author: Luke Lau <luke at igalia.com>
Date: 2026-03-31 (Tue, 31 Mar 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
Log Message:
-----------
[RISCV] Explicitly list supported VP intrinsics. NFC (#189547)
In preparation for splitting off #179622, list all vp intrinsics in a
list. Future PRs will remove intrinsics from this list when the
corresponding codegen support is removed.
Commit: f59d6f734e3d18fe37d0a2d7806479ee1be8de37
https://github.com/llvm/llvm-project/commit/f59d6f734e3d18fe37d0a2d7806479ee1be8de37
Author: David Sherwood <david.sherwood at arm.com>
Date: 2026-03-31 (Tue, 31 Mar 2026)
Changed paths:
M llvm/test/Transforms/LoopVectorize/12-12-11-if-conv.ll
M llvm/test/Transforms/LoopVectorize/2012-10-20-infloop.ll
M llvm/test/Transforms/LoopVectorize/2012-10-22-isconsec.ll
M llvm/test/Transforms/LoopVectorize/AArch64/outer_loop_test1_no_explicit_vect_width.ll
M llvm/test/Transforms/LoopVectorize/ARM/arm-unroll.ll
M llvm/test/Transforms/LoopVectorize/ARM/gcc-examples.ll
M llvm/test/Transforms/LoopVectorize/ARM/width-detect.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/reg-usage.ll
M llvm/test/Transforms/LoopVectorize/VPlan/vplan-dot-printing.ll
M llvm/test/Transforms/LoopVectorize/VPlan/vplan-printing.ll
M llvm/test/Transforms/LoopVectorize/VPlan/vplan-stress-test-no-explict-vf.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/strided-load-i16.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/strided-load-i32.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/strided-load-i64.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/strided-load-i8.ll
M llvm/test/Transforms/LoopVectorize/X86/avx1.ll
M llvm/test/Transforms/LoopVectorize/X86/conversion-cost.ll
M llvm/test/Transforms/LoopVectorize/X86/cost-model.ll
M llvm/test/Transforms/LoopVectorize/X86/drop-poison-generating-flags.ll
M llvm/test/Transforms/LoopVectorize/X86/gather_scatter.ll
M llvm/test/Transforms/LoopVectorize/X86/gcc-examples.ll
M llvm/test/Transforms/LoopVectorize/X86/illegal-parallel-loop-uniform-write.ll
M llvm/test/Transforms/LoopVectorize/X86/int128_no_gather.ll
M llvm/test/Transforms/LoopVectorize/X86/interleave_short_tc.ll
M llvm/test/Transforms/LoopVectorize/X86/min-trip-count-switch.ll
M llvm/test/Transforms/LoopVectorize/X86/outer_loop_test1_no_explicit_vect_width.ll
M llvm/test/Transforms/LoopVectorize/X86/parallel-loops-after-reg2mem.ll
M llvm/test/Transforms/LoopVectorize/X86/parallel-loops.ll
M llvm/test/Transforms/LoopVectorize/X86/tail_folding_and_assume_safety.ll
M llvm/test/Transforms/LoopVectorize/X86/unroll-pm.ll
M llvm/test/Transforms/LoopVectorize/X86/unroll-small-loops.ll
M llvm/test/Transforms/LoopVectorize/X86/unroll_selection.ll
M llvm/test/Transforms/LoopVectorize/X86/veclib-calls.ll
M llvm/test/Transforms/LoopVectorize/X86/vectorization-remarks-missed.ll
M llvm/test/Transforms/LoopVectorize/X86/vectorization-remarks-profitable.ll
M llvm/test/Transforms/LoopVectorize/X86/x86-interleaved-store-accesses-with-gaps.ll
M llvm/test/Transforms/LoopVectorize/align.ll
M llvm/test/Transforms/LoopVectorize/bzip_reverse_loops.ll
M llvm/test/Transforms/LoopVectorize/calloc.ll
M llvm/test/Transforms/LoopVectorize/cpp-new-array.ll
M llvm/test/Transforms/LoopVectorize/float-reduction.ll
M llvm/test/Transforms/LoopVectorize/gcc-examples.ll
M llvm/test/Transforms/LoopVectorize/i8-induction.ll
M llvm/test/Transforms/LoopVectorize/if-conv-crash.ll
M llvm/test/Transforms/LoopVectorize/if-conversion-reduction.ll
M llvm/test/Transforms/LoopVectorize/if-conversion.ll
M llvm/test/Transforms/LoopVectorize/increment.ll
M llvm/test/Transforms/LoopVectorize/loop-legality-checks-remarks.ll
M llvm/test/Transforms/LoopVectorize/memdep.ll
M llvm/test/Transforms/LoopVectorize/metadata-unroll.ll
M llvm/test/Transforms/LoopVectorize/metadata-width.ll
M llvm/test/Transforms/LoopVectorize/multiple-address-spaces.ll
M llvm/test/Transforms/LoopVectorize/no_int_induction.ll
M llvm/test/Transforms/LoopVectorize/no_outside_user.ll
M llvm/test/Transforms/LoopVectorize/non-const-n.ll
M llvm/test/Transforms/LoopVectorize/outer_loop_test1.ll
M llvm/test/Transforms/LoopVectorize/outer_loop_test2.ll
M llvm/test/Transforms/LoopVectorize/pr30654-phiscev-sext-trunc.ll
M llvm/test/Transforms/LoopVectorize/pr32859.ll
M llvm/test/Transforms/LoopVectorize/pseudoprobe.ll
M llvm/test/Transforms/LoopVectorize/ptr_loops.ll
M llvm/test/Transforms/LoopVectorize/read-only.ll
M llvm/test/Transforms/LoopVectorize/runtime-check-address-space.ll
M llvm/test/Transforms/LoopVectorize/runtime-check-readonly-address-space.ll
M llvm/test/Transforms/LoopVectorize/runtime-check.ll
M llvm/test/Transforms/LoopVectorize/same-base-access.ll
M llvm/test/Transforms/LoopVectorize/scalar-select.ll
M llvm/test/Transforms/LoopVectorize/simple-unroll.ll
M llvm/test/Transforms/LoopVectorize/small-loop.ll
M llvm/test/Transforms/LoopVectorize/start-non-zero.ll
M llvm/test/Transforms/LoopVectorize/struct_access.ll
M llvm/test/Transforms/LoopVectorize/unroll-novec-memcheck-metadata.ll
M llvm/test/Transforms/LoopVectorize/unroll_novec.ll
M llvm/test/Transforms/LoopVectorize/write-only.ll
Log Message:
-----------
[LV][NFC] Remove more function attributes from tests (#188185)
Following on from PR #188091 I've also removed the following function
attributes from tests:
nounwind uwtable ssp
as they didn't make any difference to the tests.
Commit: a8a659458d4ad9116d652ca4eccb77d6cd673883
https://github.com/llvm/llvm-project/commit/a8a659458d4ad9116d652ca4eccb77d6cd673883
Author: David Spickett <david.spickett at arm.com>
Date: 2026-03-31 (Tue, 31 Mar 2026)
Changed paths:
M lldb/include/lldb/Target/MemoryRegionInfo.h
M lldb/unittests/Process/Utility/LinuxProcMapsTest.cpp
M lldb/unittests/Process/Utility/MemoryTagManagerAArch64MTETest.cpp
M lldb/unittests/Process/minidump/MinidumpParserTest.cpp
Log Message:
-----------
[lldb] Change MemoryRegionInfo::SetIsShadowStack into a "builder" method (#189565)
Meaning a method on an object, which returns a reference to self.
I am doing this because it was pointed out to me that MemoryRegionInfo
has lots of construction paramaters, and most of the time, we want the
default value for most of the things.
So now we can do:
MemoryRegionInfo(...); // Shadow stack is "don't know".
MemoryRegionInfo(...).SetIsShadowStack(eNo) // Shadow stack is "no".
Which removes one parameter from every use of the constructor.
Along the way I realised that the shadow stack "ss" flag is only tested
by the Guarded Control Stack tests, which only run on specific Arm
hardware. I've added a new "ss" test to LinuxProcMapsTest, which will
run on any system.
Commit: bb3bf9f94b4235c8b81087ede1af442b5066b075
https://github.com/llvm/llvm-project/commit/bb3bf9f94b4235c8b81087ede1af442b5066b075
Author: Hans Wennborg <hans at hanshq.net>
Date: 2026-03-31 (Tue, 31 Mar 2026)
Changed paths:
M llvm/include/llvm/MC/MCAssembler.h
M llvm/lib/MC/MCAssembler.cpp
M llvm/test/MC/ELF/relax-branch-align.s
R llvm/test/MC/X86/align-branch-convergence.s
Log Message:
-----------
Revert "[MC] Fuse relaxation and layout into a single forward pass" (#189548)
Reverts llvm/llvm-project#184544 due to build failures and binary size
regressions; see comments on the PR.
Even if the failure to fixup CBZ instructions is due to a previously
existing problem, it was triggered by this PR. And the unnecessary
widening of the LBR instructions seems like a bad regression in itself.
Commit: 64eeafad7090d71f809f8e1806ad3b141f8de026
https://github.com/llvm/llvm-project/commit/64eeafad7090d71f809f8e1806ad3b141f8de026
Author: Ruoyu Qiu <cabbaken at outlook.com>
Date: 2026-03-31 (Tue, 31 Mar 2026)
Changed paths:
M llvm/lib/Analysis/DependenceAnalysis.cpp
M llvm/test/Analysis/DependenceAnalysis/exact-rdiv-addrec-wrap.ll
Log Message:
-----------
[DA] Check nsw flags for addrecs in the Exact RDIV test (#189536)
This patch adds a check to ensure that the addrecs have nsw flags at the
beginning of the Exact SIV test. If either of them doesn't have, the
analysis bails out. This check is necessary because the subsequent
process in the Exact SIV test assumes that they don't wrap.
Commit: ad0cd387c0e9458e54db7817b57f822cc4d14dec
https://github.com/llvm/llvm-project/commit/ad0cd387c0e9458e54db7817b57f822cc4d14dec
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-03-31 (Tue, 31 Mar 2026)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/test/AST/ByteCode/records.cpp
Log Message:
-----------
[clang][bytecode] Fix a crash with void declarations (#189334)
The `chk` decl is erroneous, but we shouldn't crash.
Commit: 7ad564e54b42a921a70cd0d0f712dd86f61a697c
https://github.com/llvm/llvm-project/commit/7ad564e54b42a921a70cd0d0f712dd86f61a697c
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-03-31 (Tue, 31 Mar 2026)
Changed paths:
M mlir/lib/Dialect/MemRef/Transforms/FoldMemRefAliasOps.cpp
Log Message:
-----------
[MLIR][MemRef] Fix LoadOpOfExpandShapeOpFolder returning failure after IR change (#188964)
LoadOpOfExpandShapeOpFolder<vector::TransferReadOp>::matchAndRewrite
called resolveSourceIndicesExpandShape (which creates
AffineLinearizeIndexOp ops via the rewriter) before checking whether the
vector::TransferReadOp preconditions hold. When those checks failed
(sourceRank < vectorRank or permutation map mismatch), the pattern
returned failure() after already modifying the IR, triggering "pattern
returned failure but IR did change" under
MLIR_ENABLE_EXPENSIVE_PATTERN_API_CHECKS.
Fix by hoisting the vector::TransferReadOp precondition checks to before
the resolveSourceIndicesExpandShape call. The source rank is derived
from expandShapeOp.getViewSource()'s type (no IR creation needed), and
the permutation map check only uses op attributes. Only if all checks
pass do we proceed to create the linearized-index ops.
Assisted-by: Claude Code
Fix a failure present with MLIR_ENABLE_EXPENSIVE_PATTERN_API_CHECKS=ON.
Commit: c592eba498a2a62101d503b1b32505fb292e6b51
https://github.com/llvm/llvm-project/commit/c592eba498a2a62101d503b1b32505fb292e6b51
Author: Ramkumar Ramachandra <artagnon at tenstorrent.com>
Date: 2026-03-31 (Tue, 31 Mar 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
Log Message:
-----------
[VPlan] Use RPOT in CSE, fixing potential crash (#187548)
A CSE crash is observed arising from outdated hash values unless we
forbid replacements in successor phis in blocks that are not dominated
by the def: the crash is observed when there is a block with CSE'able
phis with CSE'able incoming values, with incoming values coming from a
non-dominating block, under the condition that the block with the phis
is visited before the non-dominating block. It is unfortunately
impossible to write a test case showing a crash at present, but crashes
do occur when attempting to CSE DerivedIV recipes. The root cause of the
crash is visiting a non-dominated use before a def, and hence would be
fixed by a reverse post-order traversal.
Fixes #187499.
Co-authored-by: Luke Lau <luke at igalia.com>
Commit: 47f3d90dacb92ac2281ae259bd3be6584b386253
https://github.com/llvm/llvm-project/commit/47f3d90dacb92ac2281ae259bd3be6584b386253
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-03-31 (Tue, 31 Mar 2026)
Changed paths:
M llvm/test/CodeGen/X86/int-to-fp-demanded.ll
Log Message:
-----------
[X86] int-to-fp-demanded.ll - add f16/bf16 signbit extraction tests (#189570)
Based off original test from #189129
Commit: b544ad57039588d0fe24a1f512202cc5c0bd3a67
https://github.com/llvm/llvm-project/commit/b544ad57039588d0fe24a1f512202cc5c0bd3a67
Author: Sergei Lebedev <185856+superbobry at users.noreply.github.com>
Date: 2026-03-31 (Tue, 31 Mar 2026)
Changed paths:
M mlir/docs/Bindings/Python.md
A mlir/include/mlir/Bindings/Python/PythonBindings.td
M mlir/test/mlir-tblgen/op-python-bindings.td
M mlir/tools/mlir-tblgen/OpPythonBindingGen.cpp
Log Message:
-----------
[MLIR] [Python] Added a way to extend MLIR->Python type mappings (#189368)
The idea is to use TableGen records for both custom type constraints and
attributes:
* `PythonTypeName` is for type constraints, while
* `PythonAttrType` is for attributes.
The key types differ between these two records. `PythonTypeName` is
keyed by C++ type because multiple type constraints map to the same C++
type (e.g. `I32` and `I64` both map to `::mlir::IntegerType`), so a
single entry covers all of them. `PythonAttrType` is keyed by TableGen
def name because different attributes can share the same C++ storage
type but need distinct Python types (e.g. `I32ArrayAttr` and
`StrArrayAttr` are both `::mlir::ArrayAttr`).
We could in theory reimplement `getPythonAttrName` using the same
approach, but I decided to leave it for future PRs.
Commit: c1b1a7178399b4fc8b0f777baeee21afbee69efa
https://github.com/llvm/llvm-project/commit/c1b1a7178399b4fc8b0f777baeee21afbee69efa
Author: Guray Ozen <guray.ozen at gmail.com>
Date: 2026-03-31 (Tue, 31 Mar 2026)
Changed paths:
M .github/new-prs-labeler.yml
Log Message:
-----------
[MLIR][NVVM] Add label for nvvm (#188216)
Commit: c6b255a693f042214e4f15dd7f69063d8315f0d7
https://github.com/llvm/llvm-project/commit/c6b255a693f042214e4f15dd7f69063d8315f0d7
Author: David Spickett <david.spickett at arm.com>
Date: 2026-03-31 (Tue, 31 Mar 2026)
Changed paths:
M lldb/include/lldb/Target/MemoryRegionInfo.h
M lldb/unittests/Process/Utility/LinuxProcMapsTest.cpp
M lldb/unittests/Process/Utility/MemoryTagManagerAArch64MTETest.cpp
M lldb/unittests/Process/minidump/MinidumpParserTest.cpp
Log Message:
-----------
[lldb] Remove stack_memory from MemoryRegionInfo constructor (#189580)
Nothing passes anything but the default value here. Code that wants to
set it is starting with a default constructed info, and filling in the
fields one by one (the gdb-remote client for example).
Commit: ece53d2348a4176787a0648737e4b41f9d31b4b4
https://github.com/llvm/llvm-project/commit/ece53d2348a4176787a0648737e4b41f9d31b4b4
Author: Ryotaro Kasuga <kasuga.ryotaro at fujitsu.com>
Date: 2026-03-31 (Tue, 31 Mar 2026)
Changed paths:
M llvm/test/Analysis/DependenceAnalysis/exact-siv-overflow.ll
Log Message:
-----------
[DA] Update test `exact-siv-overflow.ll` (NFC) (#189572)
Revise the comment and the arguments to `--check-prefixes` in
`Analysis/DependenceAnalysis/exact-siv-overflow.ll` to match the style
of other similar tests in the directory.
Commit: f1b0a84003a03580ed4473e1f4201a415ddaf0fd
https://github.com/llvm/llvm-project/commit/f1b0a84003a03580ed4473e1f4201a415ddaf0fd
Author: Ryotaro Kasuga <kasuga.ryotaro at fujitsu.com>
Date: 2026-03-31 (Tue, 31 Mar 2026)
Changed paths:
A llvm/test/Analysis/DependenceAnalysis/exact-rdiv-delta-overflow.ll
Log Message:
-----------
[DA] Add a test where the Exact RDIV test misses a dependency (NFC) (#189577)
Add a test to demonstrate the case where the Exact RDIV test misses a
dependency because the calculation of `Delta` overflows.
Commit: 0546b3f565b9350761f08574471ee3370fd8953c
https://github.com/llvm/llvm-project/commit/0546b3f565b9350761f08574471ee3370fd8953c
Author: Ryotaro Kasuga <kasuga.ryotaro at fujitsu.com>
Date: 2026-03-31 (Tue, 31 Mar 2026)
Changed paths:
M llvm/test/Analysis/DependenceAnalysis/gcd-miv-overflow.ll
Log Message:
-----------
[DA] Add test for GCD MIV missing dependency due to overflow (NFC) (#172002)
Add a test case where the GCD MIV test misses a dependency due to
overflow. This will be fixed by #172003 .
Commit: 2b439327026d45bf53e59159c8e40fccf87930b6
https://github.com/llvm/llvm-project/commit/2b439327026d45bf53e59159c8e40fccf87930b6
Author: Matheus Izvekov <mizvekov at gmail.com>
Date: 2026-03-31 (Tue, 31 Mar 2026)
Changed paths:
M clang/lib/AST/DeclTemplate.cpp
A clang/test/SemaTemplate/GH188759.cpp
Log Message:
-----------
[clang] fix getReplacedTemplateParameter for function template specializations (#189559)
Commit: d43d9022c189210f0c3c52e34a47f3bd3edd4e43
https://github.com/llvm/llvm-project/commit/d43d9022c189210f0c3c52e34a47f3bd3edd4e43
Author: Ramkumar Ramachandra <artagnon at tenstorrent.com>
Date: 2026-03-31 (Tue, 31 Mar 2026)
Changed paths:
M llvm/test/Transforms/LoopVectorize/VPlan/vplan-predicate-switch.ll
Log Message:
-----------
[LV] Regen vplan-predicate-switch test with UTC (NFC) (#189581)
Commit: 0cecacd971a5471803b79f2b4a976ce75a2539b2
https://github.com/llvm/llvm-project/commit/0cecacd971a5471803b79f2b4a976ce75a2539b2
Author: Simon Tatham <simon.tatham at arm.com>
Date: 2026-03-31 (Tue, 31 Mar 2026)
Changed paths:
M compiler-rt/lib/builtins/CMakeLists.txt
A compiler-rt/lib/builtins/arm/adddf3.S
A compiler-rt/test/builtins/Unit/adddf3new_test.c
A compiler-rt/test/builtins/Unit/subdf3new_test.c
Log Message:
-----------
[compiler-rt][ARM] Optimized double precision FP add/sub (#179921)
The one new assembly source file, `arm/adddf3.S`, implements both
addition and subtraction via cross-branching after flipping signs, since
both operations must provide substantially the same logic. The new cmake
properties introduced in a prior commit are used to arrange that
including `adddf3.S` supersedes the C versions of both addition and
subtraction, and also informs the test suite that both functions are
available to test.
Commit: caecca035ab9fdccd1fd1b1b17452b415f89b366
https://github.com/llvm/llvm-project/commit/caecca035ab9fdccd1fd1b1b17452b415f89b366
Author: Charles Zablit <c_zablit at apple.com>
Date: 2026-03-31 (Tue, 31 Mar 2026)
Changed paths:
M lldb/packages/Python/lldbsuite/test/lldbplatformutil.py
M lldb/test/API/commands/target/create-deps/TestTargetCreateDeps.py
M lldb/test/API/functionalities/breakpoint/break_in_loaded_dylib/TestBreakInLoadedDylib.py
M lldb/test/API/functionalities/executable_first/TestExecutableFirst.py
M lldb/test/API/functionalities/load_after_attach/TestLoadAfterAttach.py
M lldb/test/API/functionalities/load_lazy/TestLoadUsingLazyBind.py
M lldb/test/API/functionalities/load_unload/TestLoadUnload.py
M lldb/test/API/symbol_ondemand/shared_library/TestSharedLibOnDemand.py
Log Message:
-----------
[lldb] add getFullLibName to PlatformContext (#188772)
This patch introduces `PlatformContext.getFullLibName` which returns the
full dylib name for any platform based on the base name of the dylib.
Example:
```
# Windows
PlatformContext.getFullLibName("Foo") -> "Foo.dll"
# Linux
PlatformContext.getFullLibName("Foo") -> "libFoo.so"
```
Commit: 5d2d17957514e682ee53e2512cd5ec7ffff6c1e7
https://github.com/llvm/llvm-project/commit/5d2d17957514e682ee53e2512cd5ec7ffff6c1e7
Author: Ryotaro Kasuga <kasuga.ryotaro at fujitsu.com>
Date: 2026-03-31 (Tue, 31 Mar 2026)
Changed paths:
M llvm/lib/Analysis/DependenceAnalysis.cpp
M llvm/test/Analysis/DependenceAnalysis/gcd-miv-overflow.ll
Log Message:
-----------
[DA] Add overflow check in GCD MIV (#172003)
Add an overflow check in the GCD MIV test. Fix the test case added in #172002 .
Commit: 66c45a3b4964106abfa6388056fba57edfde216d
https://github.com/llvm/llvm-project/commit/66c45a3b4964106abfa6388056fba57edfde216d
Author: Ryotaro Kasuga <kasuga.ryotaro at fujitsu.com>
Date: 2026-03-31 (Tue, 31 Mar 2026)
Changed paths:
M llvm/lib/Analysis/DependenceAnalysis.cpp
M llvm/test/Analysis/DependenceAnalysis/exact-rdiv-delta-overflow.ll
Log Message:
-----------
[DA] Fix overflow in the Exact RDIV test (#189578)
This patch adds an overflow check for the computation of `Delta` in the
Exact RDIV test. If an overflow is detected, the analysis bails out.
Commit: 97b78d6ff3fa1d87fc0ba6a235f1d331990918a3
https://github.com/llvm/llvm-project/commit/97b78d6ff3fa1d87fc0ba6a235f1d331990918a3
Author: Guray Ozen <guray.ozen at gmail.com>
Date: 2026-03-31 (Tue, 31 Mar 2026)
Changed paths:
M mlir/lib/Dialect/LLVMIR/IR/BasicPtxBuilderInterface.cpp
M mlir/test/Conversion/NVVMToLLVM/nvvm-to-llvm.mlir
Log Message:
-----------
[MLIR][NVVM] Fix predicate operand index in BasicPtxBuilderInterface (#189552)
Predicate index computation was incorrect, it was not counting
write/readwrite symbols.
Wrong case
```
// CHECK: %{{.*}} = llvm.inline_asm has_side_effects asm_dialect = att "@$1 ex2.approx.ftz.f32 $0, $1;", "=f,f,b" %{{.*}}, %{{.*}} : (f32, i1) -> f32
%1 = nvvm.inline_ptx "ex2.approx.ftz.f32 {$w0}, {$r0};" ro (%input : f32), predicate = %pred -> f32
```
PR fixes, predicate index became `@$2`
```
// CHECK: %{{.*}} = llvm.inline_asm has_side_effects asm_dialect = att "@$2 ex2.approx.ftz.f32 $0, $1;", "=f,f,b" %{{.*}}, %{{.*}} : (f32, i1) -> f32
%1 = nvvm.inline_ptx "ex2.approx.ftz.f32 {$w0}, {$r0};" ro (%input : f32), predicate = %pred -> f32
```
Commit: 95db43fdb4704fd7f177eb257b0f69c1de1dc110
https://github.com/llvm/llvm-project/commit/95db43fdb4704fd7f177eb257b0f69c1de1dc110
Author: eiytoq <eiytoq at outlook.com>
Date: 2026-03-31 (Tue, 31 Mar 2026)
Changed paths:
M clang/lib/AST/ItaniumMangle.cpp
Log Message:
-----------
[clang][NFC] ItaniumMangle: polish comments (#183030)
Commit: 6ddb2be00a95b8ad21168c7264a2d9e549cd24d8
https://github.com/llvm/llvm-project/commit/6ddb2be00a95b8ad21168c7264a2d9e549cd24d8
Author: Fady Farag <com.webkit.iidmsa at gmail.com>
Date: 2026-03-31 (Tue, 31 Mar 2026)
Changed paths:
M clang/test/CodeGenObjC/constant-string-class-1.m
Log Message:
-----------
[clang][test] Add missing FileCheck pipe in constant-string-class-1.m (#189514)
The test had a CHECK directive that was never executed because the RUN
line did not pipe output to FileCheck.
Commit: fd43a646fc05758650c5edae15f199221cb1a2e4
https://github.com/llvm/llvm-project/commit/fd43a646fc05758650c5edae15f199221cb1a2e4
Author: eiytoq <eiytoq at outlook.com>
Date: 2026-03-31 (Tue, 31 Mar 2026)
Changed paths:
M clang/lib/AST/ItaniumMangle.cpp
Log Message:
-----------
[clang][NFC] ItaniumMangle: modernize code style (#183027)
- Use structured bindings.
- Use if-init-statements to replace nested `if`.
- Use `using` instead of `typedef`.
---------
Co-authored-by: Timm Baeder <tbaeder at redhat.com>
Commit: c6b3da6b3eef3d49b5704950db052c10aabdcbf7
https://github.com/llvm/llvm-project/commit/c6b3da6b3eef3d49b5704950db052c10aabdcbf7
Author: David Spickett <david.spickett at arm.com>
Date: 2026-03-31 (Tue, 31 Mar 2026)
Changed paths:
M lldb/include/lldb/Target/MemoryRegionInfo.h
M lldb/unittests/Process/Utility/LinuxProcMapsTest.cpp
M lldb/unittests/Process/Utility/MemoryTagManagerAArch64MTETest.cpp
M lldb/unittests/Process/minidump/MinidumpParserTest.cpp
Log Message:
-----------
[lldb] Remove memory_tagged from MemoryRegionInfo (#189617)
By turning SetMemoryTagged into a builder method (returns a reference to
self). Then only using that in the tests that need to change the default
of "don't know".
Commit: 20562cefb033b29f5e897d4e74afceb8de8ad9f6
https://github.com/llvm/llvm-project/commit/20562cefb033b29f5e897d4e74afceb8de8ad9f6
Author: eiytoq <eiytoq at outlook.com>
Date: 2026-03-31 (Tue, 31 Mar 2026)
Changed paths:
M clang/lib/AST/ItaniumMangle.cpp
M clang/lib/AST/MicrosoftMangle.cpp
Log Message:
-----------
[Clang][NFC] Remove redundant DeclContext workaround for local extern decls (#186665)
This patch removes an out-of-date FIXME.
The underlying issue was already fixed by
`Sema::adjustContextForLocalExternDecl` introduced by
https://github.com/llvm/llvm-project/commit/541b38be7bf3afded3269a33586418254d82d7b3
Commit: 68a91f3d36531dbd9d8635f45f53368179361af9
https://github.com/llvm/llvm-project/commit/68a91f3d36531dbd9d8635f45f53368179361af9
Author: Ryotaro Kasuga <kasuga.ryotaro at fujitsu.com>
Date: 2026-03-31 (Tue, 31 Mar 2026)
Changed paths:
M llvm/lib/Analysis/DependenceAnalysis.cpp
Log Message:
-----------
[DA] Remove ExtraGCD from GCD MIV (NFC) (#172004)
As some code was removed in #169927, `ExtraGCD` in `gcdMIVtest` is no
longer necessary. This patch removes it and also adjust the comments.
Commit: 914fca472009f8052867704f00b24c27d79ca5d5
https://github.com/llvm/llvm-project/commit/914fca472009f8052867704f00b24c27d79ca5d5
Author: Tomer Shafir <tomer.shafir8 at gmail.com>
Date: 2026-03-31 (Tue, 31 Mar 2026)
Changed paths:
M llvm/tools/llc/llc.cpp
Log Message:
-----------
[llc] Change `TargetMachine` allocation assert to error (#189541)
As we shouldn't assert an allocation (which can fail).
---------
Co-authored-by: Matt Arsenault <arsenm2 at gmail.com>
Commit: f14b865ff54d60901b43e7f7e96d91b9fa82ba9f
https://github.com/llvm/llvm-project/commit/f14b865ff54d60901b43e7f7e96d91b9fa82ba9f
Author: David Spickett <david.spickett at arm.com>
Date: 2026-03-31 (Tue, 31 Mar 2026)
Changed paths:
M lldb/include/lldb/Target/MemoryRegionInfo.h
M lldb/unittests/Process/Utility/LinuxProcMapsTest.cpp
M lldb/unittests/Process/Utility/MemoryTagManagerAArch64MTETest.cpp
M lldb/unittests/Process/minidump/MinidumpParserTest.cpp
Log Message:
-----------
[lldb] Remove "flash" and "blocksize" from MemoryRegionInfo constructor (#189636)
These are only set to non-default values after calling a constructor.
Removing them removes noise from many tests that make MemoryRegionInfos.
Commit: 161c53f66ea8044e6618d7c7829ba90196c72a79
https://github.com/llvm/llvm-project/commit/161c53f66ea8044e6618d7c7829ba90196c72a79
Author: David Truby <david.truby at arm.com>
Date: 2026-03-31 (Tue, 31 Mar 2026)
Changed paths:
M openmp/cmake/modules/LibompUtils.cmake
M openmp/runtime/CMakeLists.txt
M openmp/runtime/cmake/LibompGetArchitecture.cmake
M openmp/runtime/src/CMakeLists.txt
M openmp/runtime/src/kmp.h
M openmp/runtime/src/kmp_atomic.cpp
A openmp/runtime/src/kmp_invoke_microtask.cpp
M openmp/runtime/src/kmp_os.h
M openmp/runtime/src/kmp_platform.h
M openmp/runtime/src/kmp_runtime.cpp
M openmp/runtime/src/thirdparty/ittnotify/ittnotify_config.h
M openmp/runtime/src/z_Linux_asm.S
M openmp/runtime/src/z_Linux_util.cpp
M openmp/runtime/src/z_Windows_NT-586_util.cpp
M openmp/runtime/test/misc_bugs/many-microtask-args.c
Log Message:
-----------
[openmp] Add support for arm64ec to libomp (#176151)
This patch adds arm64ec support to libomp.
Note that this support isn't entirely usable on Windows hosts as libomp
requires LLVM_PER_TARGET_RUNTIME_DIR=On for to work correctly when
multiple runtimes are built, which is unsupported on Windows. A
following patch will add arm64x support to the build to rectify this.
Commit: 67d4842910b8cb79f31b9041bdf56c206cd768e9
https://github.com/llvm/llvm-project/commit/67d4842910b8cb79f31b9041bdf56c206cd768e9
Author: ambergorzynski <120007557+ambergorzynski at users.noreply.github.com>
Date: 2026-03-31 (Tue, 31 Mar 2026)
Changed paths:
M llvm/test/CodeGen/AMDGPU/si-lower-sgpr-spills.mir
Log Message:
-----------
[NFC][AMDGPU] New test for untested case in SILowerSGPRSpills (#189426)
[This
case](https://github.com/llvm/llvm-project/blob/f380a878d515024fe02662471e81cd72a8b3eb93/llvm/lib/Target/AMDGPU/SILowerSGPRSpills.cpp#L343-L345)
is not covered by any existing tests (checked using code coverage and by
inserting an `abort` at that line). I propose a new test that tests this
line.
This is demonstrated by showing that it is the only test that fails in
the presence of the `abort`.
Commit: a839e500e8a1934d3ad0a346d3789904c2a865a9
https://github.com/llvm/llvm-project/commit/a839e500e8a1934d3ad0a346d3789904c2a865a9
Author: ambergorzynski <120007557+ambergorzynski at users.noreply.github.com>
Date: 2026-03-31 (Tue, 31 Mar 2026)
Changed paths:
A llvm/test/CodeGen/SPIRV/passes/SPIRVEmitIntrinsics-infer-fnptr-todo-type.ll
Log Message:
-----------
[NFC][SPIRV] Add test for untested case in SPIRVEmitIntrinsics (#189413)
[This
case](https://github.com/llvm/llvm-project/blob/af98e3c2cb07af90029785a78e49c2761f20088e/llvm/lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp#L1233-L1236)
is not tested by any existing test (checked using code coverage and by
inserting an `abort`). The case marks type deduction as incomplete.
I suggest a new test to cover this case; it's specific to
`-mtriple=spirv64-amd-amdhsa`.
Commit: 5d051f628c61fcec3ef6d23ce09be169454d9f27
https://github.com/llvm/llvm-project/commit/5d051f628c61fcec3ef6d23ce09be169454d9f27
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-03-31 (Tue, 31 Mar 2026)
Changed paths:
M clang/lib/Basic/Targets/AMDGPU.cpp
M clang/lib/Basic/Targets/AMDGPU.h
Log Message:
-----------
clang: Remove unnecessary isAMDGCN wrapper (#189640)
Commit: d5f7acdbc15fd15244bf6f3e4d4e3ea5a7bd2781
https://github.com/llvm/llvm-project/commit/d5f7acdbc15fd15244bf6f3e4d4e3ea5a7bd2781
Author: Davide Grohmann <davide.grohmann at arm.com>
Date: 2026-03-31 (Tue, 31 Mar 2026)
Changed paths:
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVBase.td
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVTosaOps.td
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVTosaTypes.td
M mlir/test/Dialect/SPIRV/IR/tosa-ops-verification.mlir
M mlir/test/Dialect/SPIRV/IR/tosa-ops.mlir
M mlir/test/Target/SPIRV/tosa-ops.mlir
M mlir/tools/mlir-tblgen/SPIRVUtilsGen.cpp
Log Message:
-----------
[mlir][spirv] Add Cast/Rescale ops in TOSA Ext Inst Set (#189028)
This patch introduces the following operators:
spirv.Tosa.Cast
spirv.Tosa.Rescale
Also dialect and serialization round-trip tests have been added.
Signed-off-by: Davide Grohmann <davide.grohmann at arm.com>
Commit: a30a8e9474f75000d9746b5d02800d2e47903f44
https://github.com/llvm/llvm-project/commit/a30a8e9474f75000d9746b5d02800d2e47903f44
Author: Leandro Lupori <leandro.lupori at linaro.org>
Date: 2026-03-31 (Tue, 31 Mar 2026)
Changed paths:
M flang/lib/Lower/OpenMP/DataSharingProcessor.cpp
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/test/Lower/OpenMP/composite_simd_linear.f90
M flang/test/Lower/OpenMP/distribute-parallel-do-simd.f90
M flang/test/Lower/OpenMP/distribute-simd.f90
M flang/test/Lower/OpenMP/linear_modifier.f90
M flang/test/Lower/OpenMP/loop-pointer-variable.f90
M flang/test/Lower/OpenMP/ordered-simd.f90
M flang/test/Lower/OpenMP/wsloop-simd.f90
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
A mlir/test/Target/LLVMIR/openmp-simd-linear.mlir
Log Message:
-----------
Reland "[flang][OpenMP] Fix lowering of LINEAR iteration variables (#183794)" (#188851)
Linear iteration variables were being treated as private. This fixes
one of the issues reported in #170784.
The regression reported in #188536 occurred because
LinearClauseProcessor was rewriting all basic blocks whose names
contained a given substring, including those that were not part of the
translated SIMD region.
This didn't cause problems before because linear variables were always
privatized, which doesn't happen with this change.
The issue is fixed by rewriting only the basic blocks that correspond to
the omp.simd operation.
Commit: 26e67aeefaed0392fbb365335dd3cc7d8f1f459a
https://github.com/llvm/llvm-project/commit/26e67aeefaed0392fbb365335dd3cc7d8f1f459a
Author: Kerry McLaughlin <kerry.mclaughlin at arm.com>
Date: 2026-03-31 (Tue, 31 Mar 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64SystemOperands.td
M llvm/test/MC/AArch64/armv8.9a-prfm-slc.s
M llvm/test/MC/AArch64/basic-a64-instructions.s
M llvm/test/MC/Disassembler/AArch64/armv8.9a-prfm-slc.txt
M llvm/test/MC/Disassembler/AArch64/basic-a64-instructions.txt
M llvm/test/tools/llvm-mca/AArch64/A64FX/A64-basic-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Ampere/Ampere1B/basic-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Apple/M1-basic-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Cortex/A320-basic-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Cortex/A510-basic-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Cortex/A55-basic-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Cortex/A57-basic-instructions.s
M llvm/test/tools/llvm-mca/AArch64/HiSilicon/tsv110-basic-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Inputs/basic-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/N1-basic-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/N2-basic-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/N3-basic-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/V1-basic-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/V2-basic-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/V3-basic-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/V3AE-basic-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Olympus/basic-instructions.s
Log Message:
-----------
[AArch64] Always print the PRFM operation name (#182035)
When the encoding in the "Rt" field of the PRFM instruction maps to a
`<prfop>` value, the name of the prefetch operation should be printed
regardless of whether the associated feature (e.g. FEAT_PRFMSLC)
is available. If the feature is not available, the instruction is a nop.
All other encodings are printed as an immediate.
Commit: 76ed0ad3577e0c96406601d23552befb5a250c6a
https://github.com/llvm/llvm-project/commit/76ed0ad3577e0c96406601d23552befb5a250c6a
Author: Nerixyz <nerixdev at outlook.de>
Date: 2026-03-31 (Tue, 31 Mar 2026)
Changed paths:
M llvm/include/llvm/DebugInfo/CodeView/LazyRandomTypeCollection.h
M llvm/include/llvm/DebugInfo/PDB/Native/TpiStream.h
M llvm/lib/DebugInfo/CodeView/LazyRandomTypeCollection.cpp
M llvm/lib/DebugInfo/PDB/Native/TpiStream.cpp
M llvm/unittests/DebugInfo/PDB/CMakeLists.txt
A llvm/unittests/DebugInfo/PDB/TpiStreamTest.cpp
Log Message:
-----------
[CodeView] Expose fallible type accessors in TpiStream (#188299)
`LazyRandomTypeCollection` already has fallible functions for
`getType(TypeIndex)` this exposes them in `TpiStream` and does a mini
cleanup in `LazyRandomTypeCollection`'s `GetType`.
Context: #186948 saw a crash in LLDB where we call `GetType` without
checking the type index before calling the method. In `GetType` we
called `error(std::move(EC))`, which ignores the error in release mode.
The cause was the type index `0x80000169` in an `S_LOCAL`.
We now do a soft fail in release mode - we already check the error, so
we might as well return an empty value.
Aside: The type index there feels really unusual, the type indices in
other records around the `S_LOCAL` were in a similar range. Almost looks
like some integer over-/underflow.
Commit: 5b010134abd44bfe7543f89bb636852a5fa09a3b
https://github.com/llvm/llvm-project/commit/5b010134abd44bfe7543f89bb636852a5fa09a3b
Author: Max Graey <maxgraey at gmail.com>
Date: 2026-03-31 (Tue, 31 Mar 2026)
Changed paths:
M llvm/include/llvm/ADT/bit.h
Log Message:
-----------
[ADT] implement countl_zero_constexpr and reuse it for countl_zero & bit_width_constexpr (#189111)
Implement constant evaluated `countl_zero_constexpr` similar to
`countr_zero_constexpr` and use it for `countl_zero` and
`bit_width_constexpr`.
Also, `countl_zero` now use fast intrinsic path for `uint8/uint16` types
(use `sizeof(T) <= 4` instead `sizeof(T) == 4`).
Commit: 74e84c0cf5f1f0df9671090c2e73714f6730ec16
https://github.com/llvm/llvm-project/commit/74e84c0cf5f1f0df9671090c2e73714f6730ec16
Author: Alexis Engelke <engelke at in.tum.de>
Date: 2026-03-31 (Tue, 31 Mar 2026)
Changed paths:
M clang/lib/CodeGen/CGException.cpp
A clang/test/CodeGen/async-exceptions.c
Log Message:
-----------
[Clang] Fix getTerminator() use for -fasync-exceptions (#189644)
Commit: 027475071e73bb72f874652c90f91f4ec483d578
https://github.com/llvm/llvm-project/commit/027475071e73bb72f874652c90f91f4ec483d578
Author: Max Graey <maxgraey at gmail.com>
Date: 2026-03-31 (Tue, 31 Mar 2026)
Changed paths:
M llvm/lib/Support/APInt.cpp
M llvm/unittests/ADT/APIntTest.cpp
Log Message:
-----------
[Support][APint] Fix APInt::urem for edge case. Use `U.pVal[0] instead getZExtValue() (#189441)
Use `U.pVal[0]` instead of `getZExtValue()` in the
`APInt::urem(uint64_t)` power-of-two fast path. `getZExtValue()`
requires the entire APInt to fit into 64 bits, but this code can be
reached for multi-word values, which may trigger assertions
(`assert(getActiveBits() <= 64 && "Too many bits for uint64_t")`) or
otherwise mis-handle wide integers.
Also add simple test for edge cases.
Improvement for https://github.com/llvm/llvm-project/pull/189245
Commit: 935cf7ec2261a0d4c753f0efbbfc9ef3c9f0c409
https://github.com/llvm/llvm-project/commit/935cf7ec2261a0d4c753f0efbbfc9ef3c9f0c409
Author: Max Graey <maxgraey at gmail.com>
Date: 2026-03-31 (Tue, 31 Mar 2026)
Changed paths:
M llvm/unittests/ADT/APIntTest.cpp
Log Message:
-----------
[Support][APint] Added more unit tests for clearBits / clearBitsSlowCase (#189434)
Commit: 33fc8fca62449130ae98ebbb95f1c33d74ee180d
https://github.com/llvm/llvm-project/commit/33fc8fca62449130ae98ebbb95f1c33d74ee180d
Author: Max Graey <maxgraey at gmail.com>
Date: 2026-03-31 (Tue, 31 Mar 2026)
Changed paths:
M llvm/lib/Support/APInt.cpp
Log Message:
-----------
[Support][APint] Optimize fallback case in APInt::reverseBits (#189291)
Commit: 0ef10d62d756e15e4e49e0603da286bd144e88b7
https://github.com/llvm/llvm-project/commit/0ef10d62d756e15e4e49e0603da286bd144e88b7
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-03-31 (Tue, 31 Mar 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVInstrInfo.td
M llvm/test/CodeGen/SPIRV/extensions/SPV_KHR_cooperative_matrix/cooperative_matrix.ll
Log Message:
-----------
[SPIR-V] Fix OpCooperativeMatrixLengthKHR operand type (#189630)
related to #188703
Commit: d08ebbe8eba1dd2453a00ae0a0a6bd04b0d88d51
https://github.com/llvm/llvm-project/commit/d08ebbe8eba1dd2453a00ae0a0a6bd04b0d88d51
Author: Balázs Benics <benicsbalazs at gmail.com>
Date: 2026-03-31 (Tue, 31 Mar 2026)
Changed paths:
A clang/include/clang/ScalableStaticAnalysisFramework/Analyses/CallGraph/CallGraphSummary.h
M clang/include/clang/ScalableStaticAnalysisFramework/SSAFBuiltinForceLinker.h
M clang/lib/Driver/CMakeLists.txt
M clang/lib/FrontendTool/CMakeLists.txt
M clang/lib/ScalableStaticAnalysisFramework/Analyses/CMakeLists.txt
A clang/lib/ScalableStaticAnalysisFramework/Analyses/CallGraph/CallGraphExtractor.cpp
M clang/tools/clang-ssaf-format/CMakeLists.txt
M clang/tools/clang-ssaf-linker/CMakeLists.txt
A clang/unittests/ScalableStaticAnalysisFramework/Analyses/CallGraph/CallGraphExtractorTest.cpp
M clang/unittests/ScalableStaticAnalysisFramework/CMakeLists.txt
M clang/unittests/ScalableStaticAnalysisFramework/Registries/SummaryExtractorRegistryTest.cpp
M llvm/utils/gn/secondary/clang/lib/Driver/BUILD.gn
M llvm/utils/gn/secondary/clang/lib/FrontendTool/BUILD.gn
M llvm/utils/gn/secondary/clang/lib/ScalableStaticAnalysisFramework/Analyses/BUILD.gn
M llvm/utils/gn/secondary/clang/unittests/ScalableStaticAnalysisFramework/BUILD.gn
Log Message:
-----------
[clang][ssaf] Add CallGraph summary and extractor (#188753)
rdar://170258016
Commit: e3b6426d737295c8d079c348235a40c94269d0d2
https://github.com/llvm/llvm-project/commit/e3b6426d737295c8d079c348235a40c94269d0d2
Author: Sam Parker <sam.parker at arm.com>
Date: 2026-03-31 (Tue, 31 Mar 2026)
Changed paths:
A llvm/test/CodeGen/WebAssembly/strided-int-mac.ll
Log Message:
-----------
[NFC][WebAssembly] CodeGen test (#189626)
Commit: 14311077f809afa494ec73d160c6aa719fbea9f2
https://github.com/llvm/llvm-project/commit/14311077f809afa494ec73d160c6aa719fbea9f2
Author: Paul Walker <paul.walker at arm.com>
Date: 2026-03-31 (Tue, 31 Mar 2026)
Changed paths:
M llvm/lib/Analysis/ConstantFolding.cpp
M llvm/test/Transforms/InstSimplify/constant-fold-fp-denormal.ll
Log Message:
-----------
[LLVM][ConstantFold] Ensure scalar type is queried when determining denormal mode. (#189600)
Fixes https://github.com/llvm/llvm-project/issues/187928
Commit: 9f8fc658abf8548029d2e613279f17fd314fcc74
https://github.com/llvm/llvm-project/commit/9f8fc658abf8548029d2e613279f17fd314fcc74
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-03-31 (Tue, 31 Mar 2026)
Changed paths:
M llvm/lib/Passes/PassBuilderPipelines.cpp
M llvm/test/Other/new-pm-defaults.ll
M llvm/test/Other/new-pm-thinlto-postlink-defaults.ll
M llvm/test/Other/new-pm-thinlto-postlink-pgo-defaults.ll
M llvm/test/Other/new-pm-thinlto-postlink-samplepgo-defaults.ll
M llvm/test/Other/new-pm-thinlto-prelink-defaults.ll
M llvm/test/Other/new-pm-thinlto-prelink-pgo-defaults.ll
M llvm/test/Other/new-pm-thinlto-prelink-samplepgo-defaults.ll
Log Message:
-----------
[Passes] Remove some optsize checks (#189369)
LibCallsShrinkWrapPass and PGOMemOPSizeOpt already check for optsize
attributes internally, so there is no need to handle this in the pass
pipeline.
The context here is that I'd like to make the pass pipeline completely
independent of Os/Oz so that we know for sure that function-level
optsize/minsize attributes behave identically to the pipeline-level
option.
Commit: d5d32d3052d1156947d88787ac425a94a593c622
https://github.com/llvm/llvm-project/commit/d5d32d3052d1156947d88787ac425a94a593c622
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-03-31 (Tue, 31 Mar 2026)
Changed paths:
M llvm/include/llvm/TargetParser/Triple.h
M llvm/lib/TargetParser/Triple.cpp
Log Message:
-----------
Triple: Expose parseArch as a public method (#189648)
Clang has some code which is doing a direct arch name
string compare which should really be recognizing anything
usable as a triple architecture. It makes more sense to
directly parse the architecture than to construct a temporary
triple just to see what the parsed arch is.
For some reason the existing public parsing method is
getArchTypeForLLVMName. I'm not fully sure what the difference
between the 2 is supposed to be. My current guess is
getArchTypeForLLVMName is only supposed to handle the
canonical architecture name.
Commit: 10ea3deb8702af4a744f92d411513a6f3a5d6dfd
https://github.com/llvm/llvm-project/commit/10ea3deb8702af4a744f92d411513a6f3a5d6dfd
Author: Schrodinger ZHU Yifan <yifanzhu at rochester.edu>
Date: 2026-03-31 (Tue, 31 Mar 2026)
Changed paths:
M libc/src/__support/OSUtil/linux/syscall_wrappers/CMakeLists.txt
A libc/src/__support/OSUtil/linux/syscall_wrappers/raise.h
M libc/src/signal/linux/CMakeLists.txt
M libc/src/signal/linux/raise.cpp
Log Message:
-----------
[libc][syscall] lift raise to syscall wrapper (#189507)
Commit: 7d0bf88581ff03feb3d9dcef6548cf22cd6d1dd9
https://github.com/llvm/llvm-project/commit/7d0bf88581ff03feb3d9dcef6548cf22cd6d1dd9
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-03-31 (Tue, 31 Mar 2026)
Changed paths:
M llvm/lib/Frontend/OpenMP/OMPContext.cpp
Log Message:
-----------
OpenMP: Match all Triple recognized arch aliases (#189649)
This liberalizes match(device = {arch(some_arch)} to recognize
other names for some_arch.
Previously this compared against getArchTypeForLLVMName, which
only matches a subset of names (which seems to be the canonical
architecture names). There was a special case hack for "x86_64",
which is one of the "x86-64" aliases accepted by parseArch, but is
not the canonical architecture name.
Commit: 46dd9d6f522d3007b0c5fe121805e09fc58fe012
https://github.com/llvm/llvm-project/commit/46dd9d6f522d3007b0c5fe121805e09fc58fe012
Author: natanelh-mobileye <natanelh at mobileye.com>
Date: 2026-03-31 (Tue, 31 Mar 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/test/CodeGen/AArch64/abds-neg.ll
M llvm/test/CodeGen/AArch64/abdu-neg.ll
M llvm/test/CodeGen/PowerPC/ppc64-P9-vabsd.ll
M llvm/test/CodeGen/RISCV/abds-neg.ll
M llvm/test/CodeGen/RISCV/abdu-neg.ll
Log Message:
-----------
[SDAG][abd] Combine abd of small types (#181538)
It is beneficial to combine abd of illegal, small types (types that get promoted to wider scalar size).
Commit: e7483770c71dc502462fa717623b808161b47ad6
https://github.com/llvm/llvm-project/commit/e7483770c71dc502462fa717623b808161b47ad6
Author: John Harrison <harjohn at google.com>
Date: 2026-03-31 (Tue, 31 Mar 2026)
Changed paths:
M lldb/test/API/tools/lldb-dap/attach/TestDAP_attach.py
M lldb/tools/lldb-dap/Handler/AttachRequestHandler.cpp
Log Message:
-----------
[lldb-dap] Correct attaching by program basename. (#188886)
Fixes an issue where attaching by program would fail if the program name
was a partial name (e.g. "foobar" instead of "/path/to/foobar").
We failed to create the target which caused the attach to fail. Now we
fallback to the dummy target and update to the real target after the
attach completes.
Here is an example launch configuration that fail:
```
{
"type": "lldb-dap",
"name": "Attach (wait)",
"request": "attach",
"program": "foobar",
"waitFor": true
},
```
Commit: 5a89da7d13e1e9e428db35c28e49c31df8f10996
https://github.com/llvm/llvm-project/commit/5a89da7d13e1e9e428db35c28e49c31df8f10996
Author: Schrodinger ZHU Yifan <yifanzhu at rochester.edu>
Date: 2026-03-31 (Tue, 31 Mar 2026)
Changed paths:
M libc/hdr/types/CMakeLists.txt
A libc/hdr/types/siginfo_t.h
M libc/src/signal/linux/CMakeLists.txt
M libc/src/signal/linux/sigaction.cpp
M libc/src/signal/linux/signal_utils.h
Log Message:
-----------
[libc][signal] cleanup sigaction implementation (#189512)
Commit: aca71454e4f9b970fc3e4065456f277202030ae0
https://github.com/llvm/llvm-project/commit/aca71454e4f9b970fc3e4065456f277202030ae0
Author: Jonathan Thackray <jonathan.thackray at arm.com>
Date: 2026-03-31 (Tue, 31 Mar 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64InstrFormats.td
M llvm/test/MC/AArch64/armv9.6a-pcdphint.s
Log Message:
-----------
[AArch64][llvm] Fix encoding for `stshh` instruction (#189588)
The encoding for `stshh` was incorrect, and has been fixed. This
has been checked against the Arm ARM.
Commit: efbd59631091fdf4ed3c0f33343ccd63dd896e00
https://github.com/llvm/llvm-project/commit/efbd59631091fdf4ed3c0f33343ccd63dd896e00
Author: Ivan Kosarev <ivan.kosarev at amd.com>
Date: 2026-03-31 (Tue, 31 Mar 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUInstructions.td
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
M llvm/lib/Target/AMDGPU/SOPInstructions.td
Log Message:
-----------
[AMDGPU][NFCI] CustomOperand to have a default type (#189584)
Most of the time, we should not need to care about the type at all, so
having it as a mandatory parameter confuses people and invites using
i1/i8/i16 where not necessary.
Commit: acc609bc296e9ddc3c1aff188a4411bc19802043
https://github.com/llvm/llvm-project/commit/acc609bc296e9ddc3c1aff188a4411bc19802043
Author: Hristo Hristov <hghristov.rmm at gmail.com>
Date: 2026-03-31 (Tue, 31 Mar 2026)
Changed paths:
M libcxx/docs/ReleaseNotes/23.rst
Log Message:
-----------
[libc++][NFC] Removed an EOL stray white space in Release Notes (#189654)
Commit: bb55c4bcfe30146b50def8bf21617647d6b0167a
https://github.com/llvm/llvm-project/commit/bb55c4bcfe30146b50def8bf21617647d6b0167a
Author: Erich Keane <ekeane at nvidia.com>
Date: 2026-03-31 (Tue, 31 Mar 2026)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIRAttrs.td
M clang/include/clang/CIR/Dialect/IR/CIRCUDAAttrs.td
M clang/include/clang/CIR/Dialect/IR/CIRTypes.td
M clang/lib/CIR/CodeGen/CIRGenCXXABI.h
M clang/lib/CIR/CodeGen/CIRGenExprConstant.cpp
M clang/lib/CIR/CodeGen/CIRGenItaniumCXXABI.cpp
M clang/lib/CIR/CodeGen/CIRGenTypes.cpp
M clang/lib/CIR/CodeGen/CIRGenerator.cpp
M clang/lib/CIR/Dialect/IR/CIRTypes.cpp
M clang/lib/CIR/Dialect/Transforms/CXXABILowering.cpp
M clang/test/CIR/CodeGen/nonzeroinit-struct.cpp
A clang/test/CIR/Transforms/cxx-abi-lowering-attrs.cir
M clang/tools/cir-opt/cir-opt.cpp
M clang/utils/TableGen/CIRLoweringEmitter.cpp
Log Message:
-----------
[CIR] Implement member-pointer members lowering/CXX ABI lowering (#187327)
Record types with a member pointer as a member require quite a bit of
work to get to function properly. First, we have to wire them through
the AST->CIR lowering to make sure we properly represent them, and
represent them when they're zero initializable. We also have to properly
initialize elements when we're NOT zero initializable.
More importantly, we have to implement the CXXABILowering of record
types. Before this patch, we just assumed that all RecordTypes were
legal, since we didn't have the above lowering. A vast majority of this
patch is around getting RecordTypes to lower properly. There isn't
really a good way to test this without the FE changes, so it wasn't
split off.
We accomplish this in 2 phases: First, we transform each individual
record type along the way, giving it a new cxx-abi specific name. We
have to ensure that recursive evaluation works correctly, so we pulled
the solution from the LLVM-IR dialect for that. Secondly, we rename all
of the RecordType's back. This is safe only after we have 'removed' all
references to the untransformed RecordType due to the way RecordStorage
works, however it'll assert if we get this wrong. We do this second
stage to minimize the impact on tests as well as the IR: otherwise EVERY
RecordType would have their names changed. In addition to massive test
changes, this would be an ugly change everywhere.
One additional concern with RecordType lowering, is that it makes most
of RecordTypes potentially 'illegal'. Thus, any attribute that
'references' a record type is required to be transformed as well, so
this patch implements attribute legalization and transformation.
This quite a few NYIs around lowering of these, though most are probably
not really accessible.
Commit: 2c5af14e9faaf384e2a33544a6e506b928b5211e
https://github.com/llvm/llvm-project/commit/2c5af14e9faaf384e2a33544a6e506b928b5211e
Author: Sam Parker <sam.parker at arm.com>
Date: 2026-03-31 (Tue, 31 Mar 2026)
Changed paths:
M llvm/test/CodeGen/WebAssembly/strided-int-mac.ll
Log Message:
-----------
[NFC][WebAssembly] More codegen tests (#189671)
Commit: 09c54a8f7afcd30c83862ab2792eacdb53c77a8f
https://github.com/llvm/llvm-project/commit/09c54a8f7afcd30c83862ab2792eacdb53c77a8f
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-03-31 (Tue, 31 Mar 2026)
Changed paths:
M mlir/include/mlir/Dialect/SPIRV/IR/TargetAndABI.h
M mlir/lib/Conversion/SCFToSPIRV/SCFToSPIRV.cpp
M mlir/lib/Dialect/SPIRV/IR/SPIRVDialect.cpp
M mlir/lib/Dialect/SPIRV/IR/TargetAndABI.cpp
M mlir/test/Conversion/SCFToSPIRV/for.mlir
M mlir/test/Conversion/SCFToSPIRV/while.mlir
Log Message:
-----------
[mlir][SPIR-V] Support spirv.loop_control attribute on scf.for and scf.while (#189392)
Propagate the `spirv.loop_control` attribute from `scf.for` and
`scf.while` operations to the generated `spirv.mlir.loop` during
SCFToSPIRV conversion
Commit: ff4e229f8c758bc547d8bb42dbd9209306603f94
https://github.com/llvm/llvm-project/commit/ff4e229f8c758bc547d8bb42dbd9209306603f94
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-03-31 (Tue, 31 Mar 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/sve-vector-reverse-mask4.ll
M llvm/test/Transforms/LoopVectorize/AArch64/vector-reverse-mask4.ll
M llvm/test/Transforms/LoopVectorize/RISCV/dbg-tail-folding-by-evl.ll
M llvm/test/Transforms/LoopVectorize/RISCV/predicated-reverse-store.ll
M llvm/test/Transforms/LoopVectorize/RISCV/riscv-vector-reverse.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-reverse-load-store.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-uniform-store.ll
M llvm/test/Transforms/LoopVectorize/VPlan/RISCV/vplan-riscv-vector-reverse.ll
M llvm/test/Transforms/LoopVectorize/X86/masked_load_store.ll
M llvm/unittests/Transforms/Vectorize/VPlanTest.cpp
Log Message:
-----------
Revert "[VPlan] Extract reverse mask from reverse accesses" (#189637)
Reverts llvm/llvm-project#155579
Assertion added triggers on some buildbots
clang:
/home/tcwg-buildbot/worker/clang-aarch64-sve2-vla/llvm/llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp:3840:
virtual InstructionCost
llvm::VPWidenMemoryRecipe::computeCost(ElementCount, VPCostContext &)
const: Assertion `!IsReverse() && "Inconsecutive memory access should
not have reverse order"' failed.
PLEASE submit a bug report to
https://github.com/llvm/llvm-project/issues/ and include the crash
backtrace, preprocessed source, and associated run script.
Stack dump:
0. Program arguments:
/home/tcwg-buildbot/worker/clang-aarch64-sve2-vla/stage1.install/bin/clang
-DNDEBUG -mcpu=neoverse-v2 -mllvm -scalable-vectorization=preferred -O3
-std=gnu17 -fcommon -Wno-error=incompatible-pointer-types -MD -MT
MultiSource/Benchmarks/Prolangs-C/TimberWolfMC/CMakeFiles/timberwolfmc.dir/finalpin.c.o
-MF CMakeFiles/timberwolfmc.dir/finalpin.c.o.d -o
CMakeFiles/timberwolfmc.dir/finalpin.c.o -c
/home/tcwg-buildbot/worker/clang-aarch64-sve2-vla/test/test-suite/MultiSource/Benchmarks/Prolangs-C/TimberWolfMC/finalpin.c
Commit: 38c0f53a14f41989e7156698e779bb15a3fd95c7
https://github.com/llvm/llvm-project/commit/38c0f53a14f41989e7156698e779bb15a3fd95c7
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-03-31 (Tue, 31 Mar 2026)
Changed paths:
A llvm/test/Transforms/SLPVectorizer/AArch64/fma-conversion-multi-use-guard.ll
Log Message:
-----------
[SLP][NFC] Add a test for incorrect fma-conversion for fmuls with multi uses
Commit: e891812cacde0c6561b73173d24d37309aeb93dc
https://github.com/llvm/llvm-project/commit/e891812cacde0c6561b73173d24d37309aeb93dc
Author: Luke Lau <luke at igalia.com>
Date: 2026-03-31 (Tue, 31 Mar 2026)
Changed paths:
M llvm/lib/CodeGen/ExpandVectorPredication.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fmaximum-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fminimum-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fmaximum-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fminimum-vp.ll
Log Message:
-----------
[RISCV] Remove codegen for vp_minimum, vp_maximum (#189550)
Part of the work to remove trivial VP intrinsics from the RISC-V
backend, see
https://discourse.llvm.org/t/rfc-remove-codegen-support-for-trivial-vp-intrinsics-in-the-risc-v-backend/87999
This splits off two intrinsics from #179622.
Commit: 67c34294a6b3e161a84ed4697c326d04d651d7ff
https://github.com/llvm/llvm-project/commit/67c34294a6b3e161a84ed4697c326d04d651d7ff
Author: AidinT <at.aidin at gmail.com>
Date: 2026-03-31 (Tue, 31 Mar 2026)
Changed paths:
M mlir/docs/Interfaces.md
M mlir/docs/Tools/mlir-reduce.md
Log Message:
-----------
[mlir][docs] dialect interfaces and mlir reduce documentation fix (#189258)
Two modifications:
1. Reflect newly added dialect interface methods in the documentation
2. Remove the bug in the `MLIR Reduce` documentation
Commit: b66d98afb9e09864f5857ab17ec2e6ee344ee31d
https://github.com/llvm/llvm-project/commit/b66d98afb9e09864f5857ab17ec2e6ee344ee31d
Author: Dave Lee <davelee.com at gmail.com>
Date: 2026-03-31 (Tue, 31 Mar 2026)
Changed paths:
M lldb/examples/python/formatter_bytecode.py
M lldb/test/Shell/ScriptInterpreter/Python/Inputs/FormatterBytecode/RigidArrayLLDBFormatterSwift.txt
Log Message:
-----------
[lldb][bytecode] Improvements to compiler generated Swift (#189425)
Following feedback from @benrimmington in
https://github.com/apple/swift-collections/pull/607, this changes the
following:
1. Uses `objectFormat()` compiler conditional instead of `os()` (see
"Cross-platform object file format support" in
[SE-0492](https://github.com/swiftlang/swift-evolution/blob/main/proposals/0492-section-control.md#cross-platform-object-file-format-support))
2. Uses a raw identifier for the generated Swift symbol name, instead of
an escaped name (see
[SE-0451](https://github.com/swiftlang/swift-evolution/blob/main/proposals/0451-escaped-identifiers.md))
Commit: 720b8ea893da2168121622bbfb536a78b35ffa32
https://github.com/llvm/llvm-project/commit/720b8ea893da2168121622bbfb536a78b35ffa32
Author: David Truby <david.truby at arm.com>
Date: 2026-03-31 (Tue, 31 Mar 2026)
Changed paths:
M llvm/CMakeLists.txt
M llvm/runtimes/CMakeLists.txt
M openmp/runtime/CMakeLists.txt
A openmp/runtime/cmake/arm64x.cmake
Log Message:
-----------
[openmp] Add support for Arm64X to libomp (#176157)
This patch allows building libomp.dll and libomp.lib as Arm64X binaries
containing both arm64 and arm64ec code and useable from applications
compiled for both architectures.
Commit: 4087c5f30d133087b7706db80e27b2d35dd334af
https://github.com/llvm/llvm-project/commit/4087c5f30d133087b7706db80e27b2d35dd334af
Author: Dave Lee <davelee.com at gmail.com>
Date: 2026-03-31 (Tue, 31 Mar 2026)
Changed paths:
M lldb/examples/python/formatter_bytecode.py
Log Message:
-----------
[lldb][bytecode] Add append mode for compiler output (#189693)
Commit: 6477f3aa166b0af1677cd36300097f088bdff510
https://github.com/llvm/llvm-project/commit/6477f3aa166b0af1677cd36300097f088bdff510
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-03-31 (Tue, 31 Mar 2026)
Changed paths:
M mlir/lib/Conversion/ArithToSPIRV/ArithToSPIRV.cpp
M mlir/test/Conversion/ArithToSPIRV/arith-to-spirv.mlir
Log Message:
-----------
[mlir][ArithToSPIRV] Fix invalid SPIRV and crashes when lowering integer ops on i1 (#189239)
Several arith integer operations on i1 / vector<Ni1> types were either
crashing or producing invalid SPIRV. The i1 type maps to spirv.bool in
SPIRV, not to a SPIRV integer — so standard integer SPIRV ops
(spirv.IAdd, spirv.UDiv, spirv.GLSMax, etc.) are illegal on it.
Add dedicated boolean patterns for all affected arith integer ops, each
with benefit=2 to take priority over the generic elementwise patterns.
The semantics for i1 follow from treating true = 1 / false = 0 with
two's complement wrapping:
- addi, subi → spirv.LogicalNotEqual (XOR on bits)
- muli, divui, divsi → spirv.LogicalAnd
- remui, remsi, shli, shrui → spirv.LogicalAnd(a, spirv.LogicalNot(b))
(a & ~b)
- shrsi → identity (arithmetic right shift of a 1-bit signed value is
always the input)
- maxui, minsi → spirv.LogicalOr (unsigned max / signed min treats true
as larger)
- maxsi, minui → spirv.LogicalAnd (signed max / unsigned min treats
false as larger)
Fixes #61162
Assisted-by: Claude Code
Commit: 728de262fcc0320b7dabf2a1ac52940b4fe1f7c0
https://github.com/llvm/llvm-project/commit/728de262fcc0320b7dabf2a1ac52940b4fe1f7c0
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-03-31 (Tue, 31 Mar 2026)
Changed paths:
M llvm/test/CodeGen/AArch64/neon-abd.ll
Log Message:
-----------
[NFC][AArch64] neon-abd.ll - remove unnecessary entry labels to reduce diff size in #186659 (#189690)
Commit: c98e4386fc45e35ceacb083f6677622f54f656a9
https://github.com/llvm/llvm-project/commit/c98e4386fc45e35ceacb083f6677622f54f656a9
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-03-31 (Tue, 31 Mar 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/test/mlir-tblgen/BUILD.bazel
Log Message:
-----------
[Bazel] Port b544ad57039588d0fe24a1f512202cc5c0bd3a67
Commit: fce3a66f5e2f247890c57ac01a2c9847358c0f27
https://github.com/llvm/llvm-project/commit/fce3a66f5e2f247890c57ac01a2c9847358c0f27
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2026-03-31 (Tue, 31 Mar 2026)
Changed paths:
M flang/lib/Semantics/mod-file.cpp
M flang/lib/Semantics/mod-file.h
M flang/lib/Semantics/resolve-names.cpp
A flang/test/Semantics/Inputs/modfile84.f90
A flang/test/Semantics/modfile84.f90
Log Message:
-----------
[flang] Preserve UseErrorDetails in module files (#189423)
When the same name is USE-associated with two or more distinct ultimate
symbols, and they are not both generic procedure interfaces, it's not an
error unless the name is actually referenced in the scope. But when the
scope is itself a module or submodule, our module files don't preserve
the error for later diagnosis -- instead, the UseErrorDetails symbol
that serves as a "poison pill" in case of later use is discarded when
the module file is generated. So emit additional USE statements to the
module file so that a UseErrorDetails symbol is created anew when the
module file is read.
Commit: 7ff0dc4b9fdee840de0901e969ea11880a28d433
https://github.com/llvm/llvm-project/commit/7ff0dc4b9fdee840de0901e969ea11880a28d433
Author: Chi-Chun, Chen <chichun.chen at hpe.com>
Date: 2026-03-31 (Tue, 31 Mar 2026)
Changed paths:
M flang/lib/Optimizer/OpenMP/FunctionFiltering.cpp
M flang/lib/Optimizer/OpenMP/LowerWorkdistribute.cpp
M mlir/include/mlir/Dialect/OpenMP/OpenMPClauses.td
M mlir/include/mlir/Dialect/OpenMP/OpenMPOps.td
M mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
M mlir/test/Dialect/OpenMP/invalid.mlir
M mlir/test/Dialect/OpenMP/ops.mlir
M mlir/test/Target/LLVMIR/openmp-todo.mlir
Log Message:
-----------
[mlir][OpenMP] Add iterator support to depend clause (#189090)
Extend the depend clause to support `!omp.iterated<Ty>` handles
alongside plain depend vars, so the IR can represent both forms.
Assisted with copilot
This is part of feature work for
https://github.com/llvm/llvm-project/issues/188061
Commit: 85d7927c08b5563f050d56d2bf88a6c152489c41
https://github.com/llvm/llvm-project/commit/85d7927c08b5563f050d56d2bf88a6c152489c41
Author: Chi-Chun, Chen <chichun.chen at hpe.com>
Date: 2026-03-31 (Tue, 31 Mar 2026)
Changed paths:
M flang/lib/Lower/OpenMP/ClauseProcessor.cpp
R flang/test/Lower/OpenMP/Todo/depend-clause.f90
A flang/test/Lower/OpenMP/depend-iterator.f90
Log Message:
-----------
[Flang][OpenMP] Support iterator modifier in depend clause (#189412)
Lower the iterator modifier on depend clause to omp.iterator. Iterated
depend objects emit `!omp.iterated<!llvm.ptr>` by using
`getDataOperandBaseAddr` to generate base address and
`genIteratorCoordinate` to get the addr+offset. The non-iterated objects
in depend clause still use existing lowering path.
This patch is part of feature work for #188061.
Assisted with copilot.
Commit: 9e77a4593526a04cd2308a724039e94d8fbe9445
https://github.com/llvm/llvm-project/commit/9e77a4593526a04cd2308a724039e94d8fbe9445
Author: Chi-Chun, Chen <chichun.chen at hpe.com>
Date: 2026-03-31 (Tue, 31 Mar 2026)
Changed paths:
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
Log Message:
-----------
[mlir][OpenMP][NFC] Refactor fillAffinityIteratorLoop (#189418)
Extract affinity-specific logic from fillAffinityIteratorLoop into a
callback so that the iterator loop codegen logic can be shared with
other clauses such as depend clause and target clause.
Commit: 65720adc15da80a65817a2bed3a506cf099d2aa7
https://github.com/llvm/llvm-project/commit/65720adc15da80a65817a2bed3a506cf099d2aa7
Author: Nishant Patel <nishant.b.patel at intel.com>
Date: 2026-03-31 (Tue, 31 Mar 2026)
Changed paths:
M mlir/lib/Dialect/GPU/Pipelines/GPUToXeVMPipeline.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUSgToWiDistributeExperimental.cpp
M mlir/lib/Dialect/XeGPU/Utils/XeGPUUtils.cpp
M mlir/test/Dialect/XeGPU/sg-to-wi-experimental-unit.mlir
Log Message:
-----------
[MLIR][XeGPU] Switch to the new sg to wi pass (#188627)
This PR has changes required to switch the pipeline to use the new sg to
wi pass.
Commit: d47190223930ce8379afa2a183ed9c407414b1a3
https://github.com/llvm/llvm-project/commit/d47190223930ce8379afa2a183ed9c407414b1a3
Author: Amr Hesham <amr96 at programmer.net>
Date: 2026-03-31 (Tue, 31 Mar 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenItaniumCXXABI.cpp
M clang/test/CIR/CodeGen/try-catch.cpp
Log Message:
-----------
[CIR] Implement reference type of record ptr in initCatchParam (#185214)
Implement the reference type of record ptr in initCatchParam
Commit: 0e0a0458ce3aeccb27c677b15abe02e72cf18a50
https://github.com/llvm/llvm-project/commit/0e0a0458ce3aeccb27c677b15abe02e72cf18a50
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-03-31 (Tue, 31 Mar 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/clang/BUILD.bazel
Log Message:
-----------
[Bazel] Port d08ebbe8eba1dd2453a00ae0a0a6bd04b0d88d51
Commit: c4e6cf0abff628f9c018428e0d4beed8788efdf9
https://github.com/llvm/llvm-project/commit/c4e6cf0abff628f9c018428e0d4beed8788efdf9
Author: Zhen Wang <37195552+wangzpgi at users.noreply.github.com>
Date: 2026-03-31 (Tue, 31 Mar 2026)
Changed paths:
M flang-rt/lib/cuda/registration.cpp
M flang/include/flang/Evaluate/tools.h
M flang/include/flang/Runtime/CUDA/registration.h
M flang/lib/Optimizer/CodeGen/CodeGen.cpp
M flang/lib/Optimizer/Transforms/CUDA/CUFAddConstructor.cpp
M flang/lib/Optimizer/Transforms/CUDA/CUFOpConversionLate.cpp
M flang/test/Fir/CUDA/cuda-code-gen.mlir
M flang/test/Fir/CUDA/cuda-constructor-2.f90
M flang/test/Fir/CUDA/cuda-device-address.mlir
M flang/test/Lower/CUDA/cuda-data-transfer.cuf
M mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
M mlir/lib/Target/LLVMIR/Dialect/NVVM/NVVMToLLVMIRTranslation.cpp
M mlir/test/Target/LLVMIR/nvvmir.mlir
Log Message:
-----------
[flang][cuda] Support non-allocatable module-level managed variables (#188526)
Add support for non-allocatable module-level CUDA managed variables
using pointer indirection through a companion global in
__nv_managed_data__. The CUDA runtime populates this pointer with the
unified memory address via __cudaRegisterManagedVar and
__cudaInitModule.
1. Create a .managed.ptr companion global in the __nv_managed_data__
section and register it with _FortranACUFRegisterManagedVariable
(CUFAddConstructor.cpp)
2. Call __cudaInitModule after registration to populate the managed
pointer (registration.cpp)
3. Annotate managed globals in gpu.module with nvvm.managed for PTX
.attribute(.managed) generation (cuda-code-gen.mlir)
4. Suppress cuf.data_transfer for assignments to/from non-allocatable
module managed variables, since cudaMemcpy would target the shadow
address rather than the actual unified memory (tools.h)
5. Preserve cuf.data_transfer for device_var = managed_var assignments
where explicit transfer is still required
Commit: 9c64cb6dca0693b8ae873ba6e40025a554d15c39
https://github.com/llvm/llvm-project/commit/9c64cb6dca0693b8ae873ba6e40025a554d15c39
Author: Medha Tiwari <medhavns1 at gmail.com>
Date: 2026-03-31 (Tue, 31 Mar 2026)
Changed paths:
M llvm/lib/CodeGen/LowerEmuTLS.cpp
M llvm/test/CodeGen/AArch64/emutls.ll
A llvm/test/CodeGen/ARM/emutls-alignment.ll
Log Message:
-----------
Fix emulated TLS alignment for large variables (#171037)
Fix emulated TLS alignment for larger variables (>= 32 bytes) to use
preferred alignment.
Fixes #167219
Commit: 8a5e029072f75d6097031f9f102483881027a392
https://github.com/llvm/llvm-project/commit/8a5e029072f75d6097031f9f102483881027a392
Author: Steven Perron <stevenperron at google.com>
Date: 2026-03-31 (Tue, 31 Mar 2026)
Changed paths:
M clang/test/SemaHLSL/Texture2D-mips-errors.hlsl
Log Message:
-----------
[HLSL] Fix test writing to an output files (#189684)
The Texture2D-mips-errors.hlsl test was writing it output to a file, but
that is not needed.
Commit: f74f32b529c35531198621fd104cde5d2cf77e0c
https://github.com/llvm/llvm-project/commit/f74f32b529c35531198621fd104cde5d2cf77e0c
Author: Dave Lee <davelee.com at gmail.com>
Date: 2026-03-31 (Tue, 31 Mar 2026)
Changed paths:
M lldb/examples/python/formatter_bytecode.py
M lldb/test/Shell/ScriptInterpreter/Python/python-bytecode.test
Log Message:
-----------
[lldb][bytecode] Remove "Generated with" comment (#189704)
In most cases, some other script/tool will call the compiler, and it's
the invocation of that script that ought to be documented in the output.
Commit: e04f8bb754bb783279822cb77ff3505c073b7b1d
https://github.com/llvm/llvm-project/commit/e04f8bb754bb783279822cb77ff3505c073b7b1d
Author: Jan Leyonberg <jan_sjodin at yahoo.com>
Date: 2026-03-31 (Tue, 31 Mar 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenModule.cpp
A clang/test/CIR/CodeGenOpenMP/omp-module-attrs.c
Log Message:
-----------
[CIR] Add OMP module attributes to MLIR module (#189394)
This patch adds OpenMP attributes to the MLIR module op used to
communicate various settings e.g. thread options and offloading
information.
Co-authored-by: Claude Opus 4.6 <noreply at anthropic.com>
Commit: 293623ce99d4d6819378311c1506c5ab08d1d860
https://github.com/llvm/llvm-project/commit/293623ce99d4d6819378311c1506c5ab08d1d860
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-03-31 (Tue, 31 Mar 2026)
Changed paths:
A llvm/test/CodeGen/X86/known-fpclass.ll
Log Message:
-----------
[X86] Add initial computeKnownFPClass test case (#189707)
Example test case for #137943 / #189583 / #189585 - failure to recognise ISD::SQRT is never neginf
Commit: ec45f95799f39f92ec22828abb9be9cd80bd0f1f
https://github.com/llvm/llvm-project/commit/ec45f95799f39f92ec22828abb9be9cd80bd0f1f
Author: lntue <lntue at google.com>
Date: 2026-03-31 (Tue, 31 Mar 2026)
Changed paths:
M libc/cmake/modules/LLVMLibCCompileOptionRules.cmake
M libc/cmake/modules/LLVMLibCTestRules.cmake
M libc/src/__support/CMakeLists.txt
M libc/src/__support/HashTable/CMakeLists.txt
M libc/src/__support/threads/linux/CMakeLists.txt
M libc/src/setjmp/aarch64/CMakeLists.txt
M libc/src/stdio/CMakeLists.txt
M libc/src/stdio/printf_core/CMakeLists.txt
M libc/src/stdio/scanf_core/CMakeLists.txt
M libc/test/src/stdio/CMakeLists.txt
M libc/test/src/stdio/scanf_core/CMakeLists.txt
M libc/test/src/stdlib/CMakeLists.txt
Log Message:
-----------
[libc] Add libc_set_definition and libc_add_definition to properly pass definitions to MSVC. (#189664)
Commit: 42d5fdd47fc62169671f84cf8896c80e29a1cb15
https://github.com/llvm/llvm-project/commit/42d5fdd47fc62169671f84cf8896c80e29a1cb15
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-03-31 (Tue, 31 Mar 2026)
Changed paths:
M llvm/test/CodeGen/X86/addcarry.ll
M llvm/test/CodeGen/X86/subcarry.ll
Log Message:
-----------
[X86] Add i686 32-bit coverage to addcarry.ll/subcarry.ll tests (#189713)
Inspired by #189018
Commit: 28efe7b554f8d9fbd2405542c27919a612d8288e
https://github.com/llvm/llvm-project/commit/28efe7b554f8d9fbd2405542c27919a612d8288e
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-03-31 (Tue, 31 Mar 2026)
Changed paths:
M clang/lib/CodeGen/CGOpenMPRuntimeGPU.cpp
Log Message:
-----------
OpenMP: Reimplement getOffloadArch (#189561)
This function made no sense at all. It was scanning through
the feature map looking for something that parsed as an OffloadArch.
Directly compute the arch from the target device.
I don't know why there isn't just an OffloadArch in TargetOpts,
this shouldn't really require parsing.
Commit: be9b162a795ca362e9dceb945ed2e2618de8cf18
https://github.com/llvm/llvm-project/commit/be9b162a795ca362e9dceb945ed2e2618de8cf18
Author: Anshil Gandhi <95053726+gandhi56 at users.noreply.github.com>
Date: 2026-03-31 (Tue, 31 Mar 2026)
Changed paths:
M llvm/test/Transforms/LoadStoreVectorizer/AMDGPU/merge-vectors-complex.ll
Log Message:
-----------
[LoadStoreVectorizer] Add tests for mixed-type vectorization (#189716)
Precommitting this test to reflect impact of the mixed-type
vectorization PR #177908. NFC.
Commit: 5c71351cf79471845aaa94fff187b9c9d0ac145f
https://github.com/llvm/llvm-project/commit/5c71351cf79471845aaa94fff187b9c9d0ac145f
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2026-03-31 (Tue, 31 Mar 2026)
Changed paths:
M lldb/source/Core/Module.cpp
Log Message:
-----------
[lldb][Module] Add logging when script import fails (#189695)
We already log the import attempt. This patch logs the failure to load
the script since otherwise the log may be misleading. Didn't think it
was worth adding a test-case for this.
Commit: 07893e30f4a64a176601fe2ab1e2d327e19dd1e1
https://github.com/llvm/llvm-project/commit/07893e30f4a64a176601fe2ab1e2d327e19dd1e1
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-03-31 (Tue, 31 Mar 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoP.td
Log Message:
-----------
[RISCV] Fix typo STD_RISCVPackedShift->SDT_RISCVPackedShift. NFC (#189678)
Commit: 49dbeca38d8faeef42d7cb03db649fbfb4c195c4
https://github.com/llvm/llvm-project/commit/49dbeca38d8faeef42d7cb03db649fbfb4c195c4
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2026-03-31 (Tue, 31 Mar 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenExpr.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
M clang/lib/CIR/CodeGen/CIRGenStmt.cpp
A clang/test/CIR/CodeGen/return-in-if-with-cleanups.cpp
Log Message:
-----------
[CIR] Fix missing terminators in regions with cleanup (#187604)
When a cleanup scope was created within an if operation's then or else
region and the source scope ended with a return, we would fail to
terminate the region following the cleanup scope, which surrounded the
return operation, resulting in an MLIR verification error. This change
forces the addition of terminators in the if's then and else regions.
Commit: a7438859265548c8443436d9c0c996338976ad85
https://github.com/llvm/llvm-project/commit/a7438859265548c8443436d9c0c996338976ad85
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2026-03-31 (Tue, 31 Mar 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenItaniumCXXABI.cpp
M clang/test/CIR/CodeGen/throws.cpp
Log Message:
-----------
[CIR] Add support for throwing destructed type (#188644)
This adds handling for throwing an object of a type that has a
non-trivial destructor.
Commit: ccfba7736f2d39434ae768ae9c9c0165b1959c4b
https://github.com/llvm/llvm-project/commit/ccfba7736f2d39434ae768ae9c9c0165b1959c4b
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2026-03-31 (Tue, 31 Mar 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenClass.cpp
A clang/test/CIR/CodeGen/delegating-ctor-exceptions.cpp
Log Message:
-----------
[CIR] Add support for cleanups after calling a delegating ctor (#189513)
This adds support for calling the destructor of types with a non-trivial
destructor if the initialization throws an exception after a delegating
constructor has been called.
Commit: 282fb05292cab555010a645cef88d62c846511d4
https://github.com/llvm/llvm-project/commit/282fb05292cab555010a645cef88d62c846511d4
Author: Alexis Engelke <engelke at in.tum.de>
Date: 2026-03-31 (Tue, 31 Mar 2026)
Changed paths:
M llvm/include/llvm/IR/GlobalObject.h
M llvm/include/llvm/IR/Instruction.h
M llvm/include/llvm/IR/Value.h
M llvm/include/llvm/Support/Alignment.h
M llvm/lib/IR/Globals.cpp
M llvm/lib/IR/LLVMContextImpl.cpp
M llvm/lib/IR/LLVMContextImpl.h
M llvm/lib/IR/Metadata.cpp
Log Message:
-----------
[IR] Store Metadata attachments in vector (#189551)
Metadata is accessed rather often, so store metadata attachments in a
vector indexed by a number instead of a map from Value*; inside the
vector, the metadata attachments form a linked list. Instruction and
GlobalObject store the first metadata attachment index directly. Care is
taken that the offset in the structures is identical.
In addition to substantial performance improvements, this also leads to
a measurable reduction in memory usage -- several instructions have
metadata in debug builds (debug metadata) and release builds (primarily
TBAA), causing the hash table to become quite large.
In Instruction, this uses 4 padding bytes (it might be debatable whether
this is the best use for this space); GlobalObject grows by 4 bytes.
However, should we want grow Instruction by 8 bytes in the future, the
additionally used memory will be ~similar to the memory saved here, so
we could do so without causing a release-to-release memory regression.
This also makes the HasMetadata bit redundant, cleanup will follow
separately -- this is a bit annoying, because this should be inline, but
Value can't access subclass members.
Commit: 9e6968b502bc75803238c10a234e935464142cc1
https://github.com/llvm/llvm-project/commit/9e6968b502bc75803238c10a234e935464142cc1
Author: Amr Hesham <amr96 at programmer.net>
Date: 2026-03-31 (Tue, 31 Mar 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenItaniumCXXABI.cpp
M clang/test/CIR/CodeGen/try-catch.cpp
Log Message:
-----------
[CIR][NFC] Add test for catch with MemberPointer type (#185217)
Add test for catch with MemberPointer type
Commit: af6521fb3a36149cd69d83bfdf87ed26e59a14a2
https://github.com/llvm/llvm-project/commit/af6521fb3a36149cd69d83bfdf87ed26e59a14a2
Author: Srividya Sundaram <srividya.sundaram at intel.com>
Date: 2026-03-31 (Tue, 31 Mar 2026)
Changed paths:
M clang/include/clang/Driver/SyclInstallationDetector.h
M clang/lib/Driver/ToolChains/Linux.cpp
M clang/lib/Driver/ToolChains/SYCL.cpp
A clang/test/Driver/Inputs/SYCL/libLLVMSYCL.ll
R clang/test/Driver/Inputs/SYCL/libsycl.ll
M clang/test/Driver/link-device-code.test
M clang/test/Driver/sycl-offload-jit.cpp
Log Message:
-----------
[Driver] Update SYCL runtime library name and path for target-specific directories (#189053)
This patch updates the Clang driver to support the renamed SYCL runtime
library (libsycl.so → libLLVMSYCL.so) and its new location in
target-specific directories. These changes align with PR
#[188770](https://github.com/llvm/llvm-project/pull/188770), which
standardizes the SYCL runtime library naming and directory structure to
match other LLVM runtime libraries.
**Changes**
**Library Naming**
- **Old**: libsycl.so
- **New**: libLLVMSYCL.so
**Directory Structure**
Both build and install directories now use target-specific
subdirectories:
- **Old:** lib/libsycl.so
- **New:** lib/target-triple/libLLVMSYCL.so
For example, on x86_64-unknown-linux-gnu:
- **Old**: build/lib/libsycl.so → install/lib/libsycl.so
- **New**: build/lib/x86_64-unknown-linux-gnu/libLLVMSYCL.so →
install/lib/x86_64-unknown-linux-gnu/libLLVMSYCL.so
Commit: 899a78cbc4b9422e5567f2bfe4f563efed119756
https://github.com/llvm/llvm-project/commit/899a78cbc4b9422e5567f2bfe4f563efed119756
Author: Nick Sarnie <nick.sarnie at intel.com>
Date: 2026-03-31 (Tue, 31 Mar 2026)
Changed paths:
M offload/test/offloading/target_critical_region.cpp
Log Message:
-----------
[offload][lit] Disable target_critical_region.cpp on Intel GPU (#189682)
Already disabled on other GPU platforms and sporadically failing on our
builder, so this test seems not be doing too hot.
Signed-off-by: Nick Sarnie <nick.sarnie at intel.com>
Commit: 8af44b7867747cd6942688eef5c5324ef859428b
https://github.com/llvm/llvm-project/commit/8af44b7867747cd6942688eef5c5324ef859428b
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-03-31 (Tue, 31 Mar 2026)
Changed paths:
M clang/include/clang/Driver/ToolChain.h
M clang/lib/Driver/ToolChain.cpp
M clang/lib/Driver/ToolChains/BareMetal.cpp
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/Driver/ToolChains/CommonArgs.cpp
M clang/lib/Driver/ToolChains/Fuchsia.cpp
Log Message:
-----------
clang: Avoid some conversions of Triple to std::string (#189728)
Commit: c6d770fece415d7e8a55dcd495fd24862b3b1ca6
https://github.com/llvm/llvm-project/commit/c6d770fece415d7e8a55dcd495fd24862b3b1ca6
Author: khaki3 <47756807+khaki3 at users.noreply.github.com>
Date: 2026-03-31 (Tue, 31 Mar 2026)
Changed paths:
M flang/lib/Optimizer/Transforms/FIRToMemRef.cpp
M flang/test/Transforms/FIRToMemRef/array-coor-slice-shift.mlir
Log Message:
-----------
[flang] Fix FIRToMemRef index computation for array_coor with slice and shape_shift (#189496)
Use shift instead of sliceLb only when the array_coor has an explicit
slice (indicesAreFortran case). When the slice comes from an embox,
the indices are 1-based section indices and must subtract 1.
Commit: 78c5d68029c0507123de28ecbe242490ee487b16
https://github.com/llvm/llvm-project/commit/78c5d68029c0507123de28ecbe242490ee487b16
Author: PiJoules <leonardchan at google.com>
Date: 2026-03-31 (Tue, 31 Mar 2026)
Changed paths:
M compiler-rt/lib/asan/asan_allocator.cpp
M compiler-rt/lib/asan/asan_errors.cpp
M compiler-rt/lib/asan/asan_errors.h
M compiler-rt/lib/asan/asan_flags.inc
M compiler-rt/lib/asan/asan_report.cpp
M compiler-rt/lib/asan/asan_report.h
A compiler-rt/test/asan/TestCases/Linux/free_aligned_sized_mismatch.cpp
A compiler-rt/test/asan/TestCases/Linux/free_sized_mismatch.cpp
Log Message:
-----------
[asan] Add size/alignment checks for free_[aligned_]sized (#189216)
Historically, alignment and size weren't taken into account when freeing
allocations since `free` just takes a pointer. With `free_sized` and
`free_aligned_sized`, we can do these size and alignment checks in asan
now. This adds a new report type specifically for these functions.
Checking is hidden behind a new env flag `free_size_mismatch` which is
enabled by default, but downstream users can opt out of it.
The bulk of this PR was generated by gemini but thoroughly reviewed and
edited by me to the best of my ability.
Commit: 05dd3ae10cf26c22eba2e23ecb4e043b9c2576eb
https://github.com/llvm/llvm-project/commit/05dd3ae10cf26c22eba2e23ecb4e043b9c2576eb
Author: Daniel Thornburgh <dthorn at google.com>
Date: 2026-03-31 (Tue, 31 Mar 2026)
Changed paths:
M llvm/lib/Transforms/Utils/SimplifyLibCalls.cpp
A llvm/test/Transforms/InstCombine/printf-puts-not-emittable.ll
Log Message:
-----------
[SimplifyLibCalls] Prevent orphaned global string literals (#189502)
When `printf` is simplified to `puts`, `SimplifyLibCalls` would eagerly
create a global string for the argument before checking if `puts` is
emittable. If `puts` is not emittable (e.g. because it's an unextracted
bitcode libfunc), the optimization aborts, leaving an orphaned global
string in the module. Under expensive checks, this triggers a fatal
error because the function pass modified the module without reporting
it.
This change defers the creation of the global string until after
checking if `puts` is emittable.
(This PR was created with the help of Gemini CLI.)
Commit: da173bfbf5a0bcf9450b15998ba454f4a4fbf1f6
https://github.com/llvm/llvm-project/commit/da173bfbf5a0bcf9450b15998ba454f4a4fbf1f6
Author: Laxman Sole <lsole at nvidia.com>
Date: 2026-03-31 (Tue, 31 Mar 2026)
Changed paths:
M llvm/lib/CodeGen/AsmPrinter/DwarfCompileUnit.cpp
M llvm/lib/CodeGen/AsmPrinter/DwarfDebug.h
M llvm/lib/Target/NVPTX/NVPTXDwarfDebug.cpp
M llvm/lib/Target/NVPTX/NVPTXDwarfDebug.h
M llvm/test/DebugInfo/NVPTX/debug-addr-space.ll
M llvm/test/DebugInfo/NVPTX/debug-name-table.ll
Log Message:
-----------
[NVPTX] Do not emit .debug_pubnames and .debug_pubtypes for NVPTX backend (#187328)
This change adds a mechanism to stop emitting `.debug_pubname`,
`.debug_pubtypes` sections for a particular target.
This is particularly useful for cases where IR is generated by frontends
that do not explicitly disable these sections (as `Clang` does for
`NVPTX`), but still use `llc` for code generation.
Currently, only `NVPTX` uses this to disable these sections.
Commit: 6669fa5806c5fbe607abaa307cb06ce89dd972db
https://github.com/llvm/llvm-project/commit/6669fa5806c5fbe607abaa307cb06ce89dd972db
Author: Nick Sarnie <nick.sarnie at intel.com>
Date: 2026-03-31 (Tue, 31 Mar 2026)
Changed paths:
M llvm/lib/Transforms/IPO/ExpandVariadics.cpp
A llvm/test/CodeGen/SPIRV/function/variadics-lowering-builtin-substr-in-name.ll
M llvm/test/CodeGen/SPIRV/printf.ll
Log Message:
-----------
[SPIR-V] Don't lower builtin variadic functions (#188517)
In https://github.com/llvm/llvm-project/pull/178980 I tried to remove
the special handling for `printf`, but the fix was wrong, the pass
expects that `printf` abides by the variadic ABI (single buffer passed
in, args extracted by caller), which isn't how it works.
However the root issue is with any builtin, they are just replaced
directly with instructions, and the only place that could generate code
to honor the variadic ABI would bei in the SPIR-V backend, and it would
be pretty complicated for pretty much no benefit.
It's much simpler to teach the pass to skip certain functions, as we did
before, but this time skip all SPIR-V builtin.
---------
Signed-off-by: Nick Sarnie <nick.sarnie at intel.com>
Commit: de84be21ec500a201ede42bc74b51f2913fe8266
https://github.com/llvm/llvm-project/commit/de84be21ec500a201ede42bc74b51f2913fe8266
Author: Demetrius Kanios <demetrius at kanios.net>
Date: 2026-03-31 (Tue, 31 Mar 2026)
Changed paths:
M llvm/lib/Target/WebAssembly/GISel/WebAssemblyInstructionSelector.cpp
M llvm/lib/Target/WebAssembly/GISel/WebAssemblyLegalizerInfo.cpp
M llvm/lib/Target/WebAssembly/GISel/WebAssemblyRegisterBankInfo.cpp
A llvm/test/CodeGen/WebAssembly/GlobalISel/instruction-select/bitwise.mir
A llvm/test/CodeGen/WebAssembly/GlobalISel/instruction-select/int-arithmetic.mir
A llvm/test/CodeGen/WebAssembly/GlobalISel/legalizer/add.mir
A llvm/test/CodeGen/WebAssembly/GlobalISel/regbankselect/bitwise.mir
A llvm/test/CodeGen/WebAssembly/GlobalISel/regbankselect/int-arithmetic.mir
Log Message:
-----------
[WebAssembly][GlobalISel] `G_ADD` (and in-reg ext/trunc related) legalization & selection (#183694)
This PR enables `G_ADD` and immediate dependencies (relavent ext and
trunc related ops) to be fully legalized and selected.
The most important change made is getting the boilerplate for
RegBankSelect working.
Split from #157161.
Commit: bf76fa758247c712b1b4879e0f0b17b5450ff141
https://github.com/llvm/llvm-project/commit/bf76fa758247c712b1b4879e0f0b17b5450ff141
Author: Yonah Goldberg <ygoldberg at nvidia.com>
Date: 2026-03-31 (Tue, 31 Mar 2026)
Changed paths:
M llvm/lib/CodeGen/AtomicExpandPass.cpp
Log Message:
-----------
[AtomicExpandPass][NFC] Refactor processAtomicInstr to be more readable (#186547)
While working on
https://discourse.llvm.org/t/rfc-add-elementwise-modifier-to-atomicrmw/90134/5
I found this `processAtomicInstr` to be a little hard to read, with
casing on the instruction type all over the place. I think it reads
nicer to just case on the instruction type once.
Commit: 626f942073b93b427e1c41e22c297becaa7bb9ae
https://github.com/llvm/llvm-project/commit/626f942073b93b427e1c41e22c297becaa7bb9ae
Author: Alex Langford <alangford at apple.com>
Date: 2026-03-31 (Tue, 31 Mar 2026)
Changed paths:
M lldb/packages/Python/lldbsuite/test/lldbutil.py
Log Message:
-----------
[lldb] Increase timeout on lldbutil.wait_for_file_on_target (#189471)
I've been tracking sporadic timeouts waiting for a file to appear on
macOS buildbots (and occasionally local development environments). I
believe I've tracked it down to a regression in process launch
performance in macOS.
What I noticed is that running multiple test suites simultaneously
almost always triggered these failures and that the tests were always
waiting on files created by the inferior. Increasing this timeout no
longer triggers the failures on my loaded machine locally.
This timeout moves from about 16 seconds of total wait time to about 127
seconds of total wait time. This may feel a bit extreme, but this is a
performance issue. While I was here, I cleaned up logging code I was
using to investigate the test failures.
rdar://172122213
Commit: cb32b8bffbf32fd7936808ad260764c28e3197db
https://github.com/llvm/llvm-project/commit/cb32b8bffbf32fd7936808ad260764c28e3197db
Author: Justin Fargnoli <jfargnoli at nvidia.com>
Date: 2026-03-31 (Tue, 31 Mar 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/LoopUnrollPass.cpp
A llvm/test/Transforms/LoopUnroll/RISCV/runtime-unroll-max-trip-count.ll
M llvm/test/Transforms/LoopUnroll/debug.ll
M llvm/test/Transforms/LoopUnroll/runtime-small-upperbound.ll
Log Message:
-----------
[LoopUnrollPass] Don't pre-set `UP.Count` before legality checks in `computeUnrollCount()` (#185979)
We currently set `UP.Count` to `TripCount` and `MaxTripCount` prior to
full and upper bound unrolling, respectively. This was likely done to
ensure that calls to `UCE.getUnrolledLoopSize(UP)` use the appropriate
trip count. However, we can use `UCE.getUnrolledLoopSize(UP,
FullUnrollTripCount)` instead.
To prevent unintentional unrolling, we set `UP.Count = 0` when
early-exiting `computeUnrollCount()`. (Note: this does not occur
[here](https://github.com/llvm/llvm-project/blob/eb687fb10613573b5d60dfbbb146e15f07809d82/llvm/lib/Transforms/Scalar/LoopUnrollPass.cpp#L1190-L1198).
This seems like a bug.)
We only perform early exits when evaluating runtime unrolling. At that
point, [we know `TripCount` is
false](https://github.com/justinfargnoli/llvm-project/blob/3fb31e7b06f6f6d08c7310506a2f363d198a6790/llvm/lib/Transforms/Scalar/LoopUnrollPass.cpp#L1157-L1158),
and thus we could not have leaked `TripCount`. However, we [could've
leaked
`MaxTripCount`](https://github.com/llvm/llvm-project/blob/eb687fb10613573b5d60dfbbb146e15f07809d82/llvm/lib/Transforms/Scalar/LoopUnrollPass.cpp#L1102-L1110).
It seems like:
https://github.com/llvm/llvm-project/blob/eb687fb10613573b5d60dfbbb146e15f07809d82/llvm/lib/Transforms/Scalar/LoopUnrollPass.cpp#L1181-L1188
was supposed to handle this case. However:
- It uses `<` instead of `<=`. This breaks the existing convention
[[1]](https://github.com/llvm/llvm-project/blob/eb687fb10613573b5d60dfbbb146e15f07809d82/llvm/lib/Transforms/Scalar/LoopUnrollPass.cpp#L869)
[[2]](https://github.com/llvm/llvm-project/blob/eb687fb10613573b5d60dfbbb146e15f07809d82/llvm/lib/Transforms/Scalar/LoopUnrollPass.cpp#L1103)
for how `UP.MaxUpperBound` is treated.
- It's ignored when a target sets `UP.Force = true`.
Thus:
- When `UP.Force == false`, we leak `MaxTripCount` into runtime
unrolling when `MaxTripCount && (UP.UpperBound || MaxOrZero) &&
MaxTripCount == UP.MaxUpperBound`
- When `UP.Force == true`, we leak `MaxTripCount` into runtime unrolling
when `MaxTripCount && (UP.UpperBound || MaxOrZero) && MaxTripCount <=
UP.MaxUpperBound`.
This PR:
- Uses `UCE.getUnrolledLoopSize(UP, FullUnrollTripCount)`
- Stops setting `TripCount` and `MaxTripCount` prior to calling
`shouldFullUnroll()`
- Removes the `UP.Count = 0` safeguards
- Swaps `<` with `<=`, to address the `UP.Force == false` case
- Adds a test to document the behavior change (no longer leaking
`MaxTripCount`) in the `UP.Force == true` case.
Commit: cd8a8e953adb6f7ef000d8f67be21cb362d6dc9c
https://github.com/llvm/llvm-project/commit/cd8a8e953adb6f7ef000d8f67be21cb362d6dc9c
Author: Jan Leyonberg <jan_sjodin at yahoo.com>
Date: 2026-03-31 (Tue, 31 Mar 2026)
Changed paths:
M clang/lib/CIR/Dialect/Transforms/CMakeLists.txt
Log Message:
-----------
[CIR] Add OpenMP and OpenACC dialect dependencies (#189726)
This patch adds dependencies on OpenMP and OpenACC dialects to prevent
link errors when compiling with shared libraries.
Commit: 284e5d79cdf292f4693ee835cbcbb6760ac63889
https://github.com/llvm/llvm-project/commit/284e5d79cdf292f4693ee835cbcbb6760ac63889
Author: Jacob Lambert <jacob.lambert at amd.com>
Date: 2026-03-31 (Tue, 31 Mar 2026)
Changed paths:
M llvm/include/llvm/BinaryFormat/MsgPackDocument.h
M llvm/lib/BinaryFormat/MsgPackDocument.cpp
M llvm/unittests/BinaryFormat/MsgPackDocumentTest.cpp
Log Message:
-----------
[MsgPackDocument]: Fix DocNode comparison and add copyNode (#189436)
Fix two bugs in DocNode's comparison operators and add a new
Document::copyNode() method:
1. operator== was implemented via operator<, which hits llvm_unreachable
for Array/Map nodes. Implement operator== directly with recursive value
comparison for all node types.
2. operator< compared KindAndDoc pointers, causing cross-document nodes
of the same type and value to silently produce wrong results. Compare by
kind then by value instead.
3. Add Document::copyNode() for deep copying nodes between Documents
with independent memory ownership.
Commit: c97561ced12d8c7bed9f2fe07733a971247333c7
https://github.com/llvm/llvm-project/commit/c97561ced12d8c7bed9f2fe07733a971247333c7
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-03-31 (Tue, 31 Mar 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVBuiltins.cpp
M llvm/lib/Target/SPIRV/SPIRVModuleAnalysis.cpp
A llvm/test/CodeGen/SPIRV/opencl/nofpclass-fastmath-kernel-pre16.ll
A llvm/test/CodeGen/SPIRV/opencl/nofpclass-fastmath-non-extinst.ll
A llvm/test/CodeGen/SPIRV/opencl/nofpclass-fastmath.ll
Log Message:
-----------
[SPIR-V] Derive FPFastMathMode from nofpclass attributes on OpenCL builtins (#188984)
Commit: 6aa2e496489d6309611b3d3c1ec9d0efd6cc81dd
https://github.com/llvm/llvm-project/commit/6aa2e496489d6309611b3d3c1ec9d0efd6cc81dd
Author: Haojian Wu <hokein.wu at gmail.com>
Date: 2026-03-31 (Tue, 31 Mar 2026)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Parse/ParseDeclCXX.cpp
A clang/test/Parser/decltype-gh188014.cpp
Log Message:
-----------
[clang][Parser] Fix an assertion during decltype error recovery with missing ; (#188123)
Fix an assertion failure in `ParseDecltypeSpecifier` when parsing
malformed expressions e.g. `decltype(union { ... )`.
When a class/union definition is missing a semicolon, clang's error
recovery may synthetically set the current token to `tok::semi` without
actually inserting it into the preprocessor's backtrack cache, see
https://github.com/llvm/llvm-project/blob/9096c9cda3df4d09c9c6e4efa1a07a232a9ac8f8/clang/lib/Parse/ParseDeclCXX.cpp#L1920-L1927
If `ParseDecltypeSpecifier` later encounters this synthetic semicolon
during its own error recovery, its attempts to revert the cache and
re-lex the tokens will lead to reading unexpected tokens from the
historical stream, failing the strict
`Tok.is(tok::semi)` assertion.
This patch removes this assertion, acknowledging that during invalid
parses and error recovery, the preprocessor's cache state may not
strictly align with the parser's simulated state.
Fixes: #188014
Commit: fd1a89163ab76c26cf3bfd2e822905cc55eeef97
https://github.com/llvm/llvm-project/commit/fd1a89163ab76c26cf3bfd2e822905cc55eeef97
Author: Florian Mayer <fmayer at google.com>
Date: 2026-03-31 (Tue, 31 Mar 2026)
Changed paths:
M clang/lib/Serialization/ASTReader.cpp
Log Message:
-----------
[NFC] [clang] swap parameters to checkTargetOptions (#187608)
This is the correct order according to the function prototype.
This should be NFC, because for PCH, AllowCompatibleDifferences
is always false: it is only used in isAcceptableASTFile, which
calls readASTFileControlBlock, which explicitely passes false.
We explicitely pass in `nullptr` for Diag, so the incorrect error
message isn't printed.
Commit: f9ded0e30a24d5faf4c810888da1837b41cbe718
https://github.com/llvm/llvm-project/commit/f9ded0e30a24d5faf4c810888da1837b41cbe718
Author: Artemiy <notlebedev at gmail.com>
Date: 2026-03-31 (Tue, 31 Mar 2026)
Changed paths:
M clang/lib/CIR/Dialect/IR/CIRAttrs.cpp
A clang/test/CIR/IR/string-trailing-zeros.cir
Log Message:
-----------
[CIR] Fix incorrect ConstArrayAttr trailing_zeros parsing (#188742)
Closes #187699 .
Fix incorrect parsing of `ConstArrayAttr`. `parse` method incorrectly
used type of `elts` parameter as type of the whole array. This means
that when reading back text or bytecode clangir files attribute did not
have correct type and correct `trailingZerosNum`. Type was always of
inner `elts`, meaning smaller then actual type if any trailing zeros
were present and `trailingZerosNum` was always zero.
Commit: 0454de8b54f92b80a4993c1d59c485daa0c176f9
https://github.com/llvm/llvm-project/commit/0454de8b54f92b80a4993c1d59c485daa0c176f9
Author: Artem Gindinson <gindinson at roofline.ai>
Date: 2026-03-31 (Tue, 31 Mar 2026)
Changed paths:
M mlir/lib/Dialect/Arith/Transforms/IntRangeOptimizations.cpp
M mlir/test/Dialect/Arith/int-range-narrowing.mlir
Log Message:
-----------
[mlir][Arith] Avoid sign overflow when narrowing signed operations (#189676)
Whether an arith operation can be truncated to a given bitwidth should
also depend on the sign semantics of the operation itself. Consider:
```
%input = /* upper bound > INT32_MAX, <= UINT32_MAX */ : index
%c0 = arith.constant 0 : index
%cmp = arith.cmpi sle, %input, %c0 : index
```
Previously, `checkTruncatability()` would correctly judge that only an
unsigned truncation could be legal, however the narrowing would still
proceed despite the fact that the `sle` predicate treated the MSB as the
sign.
Ensure that the sign is checked for signed comparison predicates and for
signed elementwise operations by enforcing a `CastKind::Signed`
restriction, whereby the narrowing patterns bail out on incompatible
input range/operation signedness.
**AI tooling usage disclaimer**
LIT tests were expanded from manual reproducer examples with LLM
assistance. Those additional test cases were verified to
regression-test, proofread and edited manually in accordance with the
"Human in the loop" policy. LLMs/generative tooling were not used for
implementation/documentation purposes.
---------
Signed-off-by: Artem Gindinson <gindinson at roofline.ai>
Co-authored-by: GPT 5.4 <codex at openai.com>
Commit: 3ed48bf648cb6d94d8385c336bc72aadcd59f4f2
https://github.com/llvm/llvm-project/commit/3ed48bf648cb6d94d8385c336bc72aadcd59f4f2
Author: Zhen Wang <zhenw at nvidia.com>
Date: 2026-03-31 (Tue, 31 Mar 2026)
Changed paths:
M flang-rt/lib/cuda/registration.cpp
M flang/include/flang/Evaluate/tools.h
M flang/include/flang/Runtime/CUDA/registration.h
M flang/lib/Optimizer/CodeGen/CodeGen.cpp
M flang/lib/Optimizer/Transforms/CUDA/CUFAddConstructor.cpp
M flang/lib/Optimizer/Transforms/CUDA/CUFOpConversionLate.cpp
M flang/test/Fir/CUDA/cuda-code-gen.mlir
M flang/test/Fir/CUDA/cuda-constructor-2.f90
M flang/test/Fir/CUDA/cuda-device-address.mlir
M flang/test/Lower/CUDA/cuda-data-transfer.cuf
M mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
M mlir/lib/Target/LLVMIR/Dialect/NVVM/NVVMToLLVMIRTranslation.cpp
M mlir/test/Target/LLVMIR/nvvmir.mlir
Log Message:
-----------
Revert "[flang][cuda] Support non-allocatable module-level managed variables" (#189745)
Reverts llvm/llvm-project#188526
Commit: c1ebd2f1c07f1dc51df1c1a56891fe564cbadc19
https://github.com/llvm/llvm-project/commit/c1ebd2f1c07f1dc51df1c1a56891fe564cbadc19
Author: Samuel Thibault <samuel.thibault at ens-lyon.org>
Date: 2026-03-31 (Tue, 31 Mar 2026)
Changed paths:
M compiler-rt/test/CMakeLists.txt
Log Message:
-----------
[compiler-rt] Disable asan tests on GNU/Hurd (#169209)
Like OpenBSD, asan does not support GNU/Hurd yet.
Commit: f43ee18e988d923ef5529f1df3910bd2af09e825
https://github.com/llvm/llvm-project/commit/f43ee18e988d923ef5529f1df3910bd2af09e825
Author: cmtice <cmtice at google.com>
Date: 2026-03-31 (Tue, 31 Mar 2026)
Changed paths:
M lldb/include/lldb/Target/StackFrame.h
M lldb/include/lldb/ValueObject/DILEval.h
M lldb/include/lldb/ValueObject/DILParser.h
M lldb/include/lldb/ValueObject/ValueObject.h
M lldb/source/Commands/CommandObjectFrame.cpp
M lldb/source/Target/StackFrame.cpp
M lldb/source/ValueObject/DILEval.cpp
M lldb/source/ValueObject/DILParser.cpp
M lldb/source/ValueObject/ValueObject.cpp
Log Message:
-----------
[LLDB] Add allow_var_updates to DIL and CanUpdateVar to SetValueFromInteger (#186421)
In preparation for updating DIL to handle assignments, this adds a
member variable to the DIL Interpreter indicating whether or not
updating program variables is allowed. For invocations from the LLDB
command prompt (through "frame variable") we want to allow it, but from
other places we might not. Therefore we also add new StackFrame
ExpressionPathOption, eExpressionPathOptionsAllowVarUpdates, which we
add to calls from CommandObjectFrame, and which is checked in
GetValueForVariableExpressionPath. Finally, we also add a parameter,
can_update_vars, with a default value of true, to
ValueObject::SetValueFromInteger, as that will be the main function used
to by assignment in DIL.
Commit: 96fd2318ee27ffc67ab1c36d67a5d59f387ac33e
https://github.com/llvm/llvm-project/commit/96fd2318ee27ffc67ab1c36d67a5d59f387ac33e
Author: Vineet Kumar <173554+vntkmr at users.noreply.github.com>
Date: 2026-03-31 (Tue, 31 Mar 2026)
Changed paths:
M flang/docs/C++style.md
Log Message:
-----------
[flang] Add guidelines for referencing the Fortran Standard (#188591)
In response to [[RFC] Qualifying syntax rule numbers with Fortran
standard version in
comments](https://discourse.llvm.org/t/rfc-qualifying-syntax-rule-numbers-with-fortran-standard-version-in-comments/90167)
this PR adds a section on guidelines for referencing the Fortran
Standard.
Commit: b813b0b4e485b0323b51071aca7a415b30c3aa6f
https://github.com/llvm/llvm-project/commit/b813b0b4e485b0323b51071aca7a415b30c3aa6f
Author: Krzysztof Drewniak <Krzysztof.Drewniak at amd.com>
Date: 2026-03-31 (Tue, 31 Mar 2026)
Changed paths:
M mlir/include/mlir/Dialect/MemRef/IR/MemRef.h
M mlir/include/mlir/Dialect/MemRef/IR/MemRefOps.td
M mlir/lib/Dialect/MemRef/IR/MemRefOps.cpp
M mlir/lib/Dialect/MemRef/Transforms/FoldMemRefAliasOps.cpp
M mlir/test/Dialect/Linalg/invalid.mlir
M mlir/test/Dialect/MemRef/fold-memref-alias-ops.mlir
M mlir/test/Dialect/MemRef/invalid.mlir
Log Message:
-----------
[mlir][MemRef] Migrate memref dialect alias op folding to interface (#187168)
This PR adds code to FoldMemRefAliasOps / --fold-memref-alias-ops to use
the new IndexedMemoryAccessOpInterface and
IndexedMemCopyOpInterface and implement those operations for relevant
operations in the memref dialect.
This is a reordering of the changes planned in #177014 and #177016 to
make them more testable.
There are no behavior changes expected for how memref.load and
memref.store behave within the alias ops folding pass, though support
for new operations, like memref.prefetch, has been added.
Some error messages have been updated because certain laws of
memref.load/memref.store have been moved to IndexedAccessOpInterface.
Assisted-by: Claude 4.6 (helped deal with some of the boilerplate in the
rewrite patterns and with extracting the patch)
Commit: 6e82a24f4cc585c8b2f69b1ff2cbee443f367187
https://github.com/llvm/llvm-project/commit/6e82a24f4cc585c8b2f69b1ff2cbee443f367187
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-03-31 (Tue, 31 Mar 2026)
Changed paths:
M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoP.td
M llvm/lib/Target/RISCV/RISCVInstrInfoXAIF.td
Log Message:
-----------
[RISCV][P-ext] Rename simm8_unsigned/simm10_unsigned used PLUI/PLI. NFC (#188808)
Replace unsigned with plui or pli_b to better indicate their usage.
Templatize the render function and rename it addSExtImm instead of
addSImm*Unsigned.
Commit: f2f54b6874a3f2b0635866953e43348b0a746029
https://github.com/llvm/llvm-project/commit/f2f54b6874a3f2b0635866953e43348b0a746029
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-03-31 (Tue, 31 Mar 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoP.td
M llvm/test/CodeGen/RISCV/rv32p.ll
Log Message:
-----------
[RISCV][P-ext] Support i32 avgfloors/avgflooru on RV32. (#189736)
Commit: 911dc4139dce1999c72144a9656f65caffca555b
https://github.com/llvm/llvm-project/commit/911dc4139dce1999c72144a9656f65caffca555b
Author: PiJoules <leonardchan at google.com>
Date: 2026-03-31 (Tue, 31 Mar 2026)
Changed paths:
M compiler-rt/test/asan/TestCases/Linux/free_aligned_sized_mismatch.cpp
Log Message:
-----------
[compiler-rt][asan] Forward fix for free_aligned_sized_mismatch.cpp (#189760)
Mark this test as UNSUPPORTED for android since android's libc doesn't
seem to support aligned_alloc.
Commit: d8e9e0af1cb6e08659f703697b44895e614a3a21
https://github.com/llvm/llvm-project/commit/d8e9e0af1cb6e08659f703697b44895e614a3a21
Author: vporpo <vasileios.porpodas at amd.com>
Date: 2026-03-31 (Tue, 31 Mar 2026)
Changed paths:
M llvm/docs/SandboxVectorizer.md
A llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Passes/LoadStoreVec.h
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/VecUtils.h
M llvm/lib/Transforms/Vectorize/CMakeLists.txt
A llvm/lib/Transforms/Vectorize/SandboxVectorizer/Passes/LoadStoreVec.cpp
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Passes/PassRegistry.def
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/SandboxVectorizer.cpp
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/SandboxVectorizerPassBuilder.cpp
A llvm/test/Transforms/SandboxVectorizer/load_store_vec.ll
M llvm/unittests/Transforms/Vectorize/SandboxVectorizer/VecUtilsTest.cpp
Log Message:
-----------
[SandboxVec][LoadStoreVec] Initial pass implementation (#188308)
This patch implements a new simple region pass that can vectorize
store-load chains.
Commit: b7dc4ff0abee9f5210ba225d6e3c83bac338eae3
https://github.com/llvm/llvm-project/commit/b7dc4ff0abee9f5210ba225d6e3c83bac338eae3
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-03-31 (Tue, 31 Mar 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
Log Message:
-----------
[TargetLowering] Replace always true if with an assert. NFC (#189750)
We already returned for UADDSAT/USUBSAT leaving SADDSAT/SSUBSAT as the
only opcodes that can get here.
Commit: 89dec12692c7654455977932cf99d643e58b3157
https://github.com/llvm/llvm-project/commit/89dec12692c7654455977932cf99d643e58b3157
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2026-03-31 (Tue, 31 Mar 2026)
Changed paths:
M lldb/include/lldb/Target/Platform.h
M lldb/source/Core/Module.cpp
M lldb/source/Plugins/Platform/MacOSX/PlatformDarwin.cpp
M lldb/source/Plugins/Platform/MacOSX/PlatformDarwin.h
M lldb/source/Target/Platform.cpp
M lldb/unittests/Platform/PlatformDarwinTest.cpp
M lldb/unittests/Platform/PlatformTest.cpp
Log Message:
-----------
[lldb][Platform] Handle LoadScriptFromSymFile per-module FileSpec (#189696)
This patch changes the `Platform::LocateXXX` to return a map from
`FileSpec` to `LoadScriptFromSymFile` enum.
This is needed for https://github.com/llvm/llvm-project/pull/188722,
where I intend to set `LoadScriptFromSymFile` per-module.
By default the `Platform::LocateXXX` set the value to whatever the
target's current `target.load-script-from-symbol-file` is set to. In
https://github.com/llvm/llvm-project/pull/188722 we'll allow overriding
this per-target setting on a per-module basis.
Drive-by:
* Added logging when we fail to load a script.
Commit: c9bc317d6dea4b5aef40c35a443cc3083aab65c7
https://github.com/llvm/llvm-project/commit/c9bc317d6dea4b5aef40c35a443cc3083aab65c7
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-03-31 (Tue, 31 Mar 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoP.td
M llvm/test/CodeGen/RISCV/rv32p.ll
Log Message:
-----------
[RISCV][P-ext] Support i32 ushlsat on RV32. (#189730)
We have a sshl instruction on RV32 in the 0.21 spec. Unfortunately,
we don't have a SSLLI instruction, but we can put a constant shift
amount in a register.
Commit: cdce9cd4a19f15b9a100b3aeb6b37a79395a0c53
https://github.com/llvm/llvm-project/commit/cdce9cd4a19f15b9a100b3aeb6b37a79395a0c53
Author: forking-google-bazel-bot[bot] <265904573+forking-google-bazel-bot[bot]@users.noreply.github.com>
Date: 2026-03-31 (Tue, 31 Mar 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[Bazel] Fixes b813b0b (#189759)
This fixes b813b0b4e485b0323b51071aca7a415b30c3aa6f.
Co-authored-by: Google Bazel Bot <google-bazel-bot at google.com>
Commit: c19e28d854e22b336d7aad78b88946864cd6eb13
https://github.com/llvm/llvm-project/commit/c19e28d854e22b336d7aad78b88946864cd6eb13
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2026-03-31 (Tue, 31 Mar 2026)
Changed paths:
M llvm/include/llvm/IR/Intrinsics.td
M llvm/test/CMakeLists.txt
M llvm/test/TableGen/intrinsic-arginfo-error.td
A llvm/test/TableGen/intrinsic-overload-dependent-type-validation.td
Log Message:
-----------
[NFC][LLVM] Simplify `TypeInfoGen` in Intrinsics.td (#189278)
Eliminate `MappingRIdx` by making it an identity function. Currently,
`MappingRIdx` is used to map the index of an `llvm_any*` type in an
intrinsic type signature to its overload index. Eliminating this mapping
means that dependent types in LLVM intrinsic definitions (like
`LLVMMatchType` and its subclasses) should use the overload index to
reference the overload type that it depends on (and not the index within
the llvm_any* subset of overloaded types).
See
https://discourse.llvm.org/t/rfc-simplifying-intrinsics-type-signature-iit-info-generation-encoding-in-intrinsicemitter-cpp/90383
Commit: 5d624b5b937ce0965efbd101defbad956d0f8e4d
https://github.com/llvm/llvm-project/commit/5d624b5b937ce0965efbd101defbad956d0f8e4d
Author: Henry Jiang <henry_jiang2 at apple.com>
Date: 2026-03-31 (Tue, 31 Mar 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
A llvm/test/Transforms/LoopVectorize/noalias-scope-decl-outer-loop.ll
A llvm/test/Transforms/LoopVectorize/non-widenable-intrinsics-outer-loop.ll
Log Message:
-----------
[VPlan] Stop outerloop vectorization from vectorizing nonvector intrinsics (#185347)
In outer-loop VPlan, avoid emitting vector intrinsic calls for intrinsics
without a vector form. In VPRecipeBuilder, detect missing vector intrinsic
mapping and emit scalar handling instead of a vector call.
Also fix assertion when `llvm.pseudoprobe` in VPlan's native path is being
treated as a `WIDEN-INTRINSIC`.
Reproducer: https://godbolt.org/z/GsPYobvYs
Commit: c20e233020c43e87be08f36d0ca5287bb69ea9f4
https://github.com/llvm/llvm-project/commit/c20e233020c43e87be08f36d0ca5287bb69ea9f4
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-03-31 (Tue, 31 Mar 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
A llvm/test/Transforms/SLPVectorizer/X86/constant-based-reductions.ll
Log Message:
-----------
[SLP] Replace TrackedToOrig DenseMap with parallel SmallVector in reduction
Replace the DenseMap<Value*, Value*> TrackedToOrig with a SmallVector<Value*>
indexed in parallel with Candidates. This avoids hash-table overhead for the
tracked-value-to-original-value mapping in horizontal reduction processing.
Fixes #189686
Commit: bf50489eeba2126c526c8d57f73448fa48429d3f
https://github.com/llvm/llvm-project/commit/bf50489eeba2126c526c8d57f73448fa48429d3f
Author: Henry Jiang <henry_jiang2 at apple.com>
Date: 2026-03-31 (Tue, 31 Mar 2026)
Changed paths:
M llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp
M llvm/lib/MC/MCObjectFileInfo.cpp
M llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
M llvm/test/CodeGen/AArch64/O0-pipeline.ll
M llvm/test/CodeGen/AArch64/O3-pipeline.ll
A llvm/test/Transforms/SampleProfile/pseudo-probe-emit-macho.ll
Log Message:
-----------
[Psuedoprobe][MachO] Enable pseudo probes emission for MachO (#185758)
Enable pseudo probes emission for MachO. Due to the 16 character limit
of MachO segment and section, the file sections will be
`__PSEUDO_PROBE,__probes` and `__PSEUDO_PROBE,__probe_descs`.
Commit: 3f2a9c6f5486e4202ec01e61fbef0e7d094e2371
https://github.com/llvm/llvm-project/commit/3f2a9c6f5486e4202ec01e61fbef0e7d094e2371
Author: jinge90 <ge.jin at intel.com>
Date: 2026-03-31 (Tue, 31 Mar 2026)
Changed paths:
M compiler-rt/lib/builtins/int_math.h
M compiler-rt/lib/builtins/muldc3.c
Log Message:
-----------
[NFC][compiler-rt] Use __builtin_huge_val for CRT_INFINITY for double precision (#188197)
Commit: 2f8c0cbac0d755240112e3b62a628c59655be317
https://github.com/llvm/llvm-project/commit/2f8c0cbac0d755240112e3b62a628c59655be317
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-03-31 (Tue, 31 Mar 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVVSETVLIInfoAnalysis.cpp
Log Message:
-----------
[RISCV] Use a switch default+llvm_unreachable instead of an assert. NFC (#189770)
Commit: 2b98f7fc3db5f99c6b1c152affb5d5906896154d
https://github.com/llvm/llvm-project/commit/2b98f7fc3db5f99c6b1c152affb5d5906896154d
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-03-31 (Tue, 31 Mar 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
Log Message:
-----------
[RISCV] Slightly optimize insertVSETMTK. NFC (#189771)
Sink the hasTKOp and hasTMOp checks into the switch.
Commit: f8b0a8c631eb3d88c990fb96b4488e4e02e137fc
https://github.com/llvm/llvm-project/commit/f8b0a8c631eb3d88c990fb96b4488e4e02e137fc
Author: Sirui Mu <msrlancern at gmail.com>
Date: 2026-04-01 (Wed, 01 Apr 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenAtomic.cpp
M clang/test/CIR/CodeGen/atomic-scoped.c
Log Message:
-----------
[CIR] Scoped atomic fetch uinc/dec (#189688)
Commit: 9085f74018a4f465afa84815d64af850f09b733f
https://github.com/llvm/llvm-project/commit/9085f74018a4f465afa84815d64af850f09b733f
Author: Fangrui Song <i at maskray.me>
Date: 2026-04-01 (Wed, 01 Apr 2026)
Changed paths:
M llvm/include/llvm/Support/Parallel.h
M llvm/lib/Support/Parallel.cpp
Log Message:
-----------
[Support] Optimize parallel `TaskGroup` (#189196)
Two improvements to reduce `TaskGroup::spawn()` overhead:
1. Replace mutex-based `Latch::inc()` with atomic `fetch_add`. `dec()`
retains the mutex to prevent a race where `sync()` observes Count==0
and destroys the Latch while `dec()` is still running.
2. Pass `Latch&` through `Executor::add()` so the worker calls `dec()`
directly, eliminating the wrapper lambda that previously captured
both the user's callable and the Latch reference. This avoids one
`std::function` construction and potential heap allocation per spawn.
Commit: 7fce7631a0983b09abc968d24038e01ec1d02962
https://github.com/llvm/llvm-project/commit/7fce7631a0983b09abc968d24038e01ec1d02962
Author: Krzysztof Drewniak <krzysdrewniak at gmail.com>
Date: 2026-03-31 (Tue, 31 Mar 2026)
Changed paths:
M mlir/include/mlir/IR/ExtensibleDialect.h
M mlir/include/mlir/IR/OpDefinition.h
M mlir/include/mlir/IR/Operation.h
M mlir/include/mlir/IR/OperationSupport.h
M mlir/include/mlir/Interfaces/InferTypeOpInterface.td
M mlir/lib/AsmParser/Parser.cpp
M mlir/lib/CAPI/IR/IR.cpp
M mlir/lib/CAPI/Interfaces/Interfaces.cpp
M mlir/lib/Dialect/AMDGPU/IR/AMDGPUOps.cpp
M mlir/lib/Dialect/Bufferization/IR/BufferizationOps.cpp
M mlir/lib/Dialect/MemRef/IR/MemRefOps.cpp
M mlir/lib/Dialect/MemRef/Transforms/ExpandStridedMetadata.cpp
M mlir/lib/Dialect/Ptr/IR/PtrDialect.cpp
M mlir/lib/Dialect/SCF/IR/SCF.cpp
M mlir/lib/Dialect/SMT/IR/SMTOps.cpp
M mlir/lib/Dialect/SparseTensor/IR/SparseTensorDialect.cpp
M mlir/lib/Dialect/Tosa/IR/TosaOps.cpp
M mlir/lib/Dialect/WasmSSA/IR/WasmSSAOps.cpp
M mlir/lib/IR/ExtensibleDialect.cpp
M mlir/lib/IR/MLIRContext.cpp
M mlir/lib/IR/Operation.cpp
M mlir/lib/IR/OperationSupport.cpp
M mlir/lib/Target/IRDLToCpp/Templates/PerOperationDecl.txt
M mlir/lib/Transforms/Utils/DialectConversion.cpp
M mlir/test/lib/Dialect/Test/TestOpDefs.cpp
M mlir/test/lib/Dialect/Test/TestOps.td
M mlir/test/lib/Dialect/Test/TestOpsSyntax.cpp
M mlir/test/lib/Dialect/Test/TestOpsSyntax.td
M mlir/test/lib/Dialect/Test/TestPatterns.cpp
M mlir/test/mlir-tblgen/op-decl-and-defs.td
M mlir/test/python/python_test_ops.td
M mlir/tools/mlir-tblgen/OpDefinitionsGen.cpp
M mlir/unittests/Debug/FileLineColLocBreakpointManagerTest.cpp
M mlir/unittests/IR/OperationSupportTest.cpp
M mlir/unittests/IR/ValueTest.cpp
M mlir/unittests/IR/VerifierTest.cpp
M mlir/unittests/Interfaces/MemorySlotUtilsTest.cpp
M mlir/unittests/Transforms/DialectConversion.cpp
Log Message:
-----------
[mlir] Refactor opaque properties to make them type-safe (#185157)
At its core, this commit changes `OpaqueProperties` (aka a void*) to
`PropertyRef`, which is a {TypeID, void*}, where the TypeID is the ID of
the storage type of the given property (which can, as is often the case
for operations, be a struct of other properties).
Long-term, this change will allow for
1) Some sort of getFooPropertyRef() on property structs, allowing
individual members to be extracted generically
2) By having a property kind that is an OwningProprtyRef, generic
parsing (in combination with a bunch of other changes) 3) Probably a
safer C/Python API because we'll be able to indicate what's supposed to
be under a given void*
---------
Co-authored-by: Claude Opus 4.6 <noreply at anthropic.com>
Commit: 6581d588193ce6c51700b426072da350895b95a2
https://github.com/llvm/llvm-project/commit/6581d588193ce6c51700b426072da350895b95a2
Author: Ryotaro Kasuga <kasuga.ryotaro at fujitsu.com>
Date: 2026-04-01 (Wed, 01 Apr 2026)
Changed paths:
M llvm/test/Analysis/DependenceAnalysis/PR188098.ll
Log Message:
-----------
[DA] Revise test `PR188098.ll` (NFC) (#189564)
This patch revises the test `Analysis/DependenceAnalysis/PR188098.ll`
added in #189428, primary to improve readability. I confirmed that this
test cashes without the change added in #188098.
Commit: d52a5e8a5ac47fea1b1d82669eb7d1bf5283d147
https://github.com/llvm/llvm-project/commit/d52a5e8a5ac47fea1b1d82669eb7d1bf5283d147
Author: AidinT <at.aidin at gmail.com>
Date: 2026-04-01 (Wed, 01 Apr 2026)
Changed paths:
M mlir/include/mlir/Conversion/CMakeLists.txt
A mlir/include/mlir/Conversion/ConvertToEmitC/CMakeLists.txt
A mlir/include/mlir/Conversion/ConvertToEmitC/ConvertToEmitCPatternInterface.td
M mlir/include/mlir/Conversion/ConvertToEmitC/ToEmitCInterface.h
M mlir/lib/Conversion/ArithToEmitC/ArithToEmitC.cpp
M mlir/lib/Conversion/ConvertToEmitC/CMakeLists.txt
M mlir/lib/Conversion/FuncToEmitC/FuncToEmitC.cpp
M mlir/lib/Conversion/MemRefToEmitC/MemRefToEmitC.cpp
M mlir/lib/Conversion/SCFToEmitC/SCFToEmitC.cpp
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[MLIR] convert ConvertToEmitCPatternInterface to ODS (#188621)
This PR converts `ConvertToEmitCPatternInterface` dialect interface to ODS. Also makes changes to derived classes.
Commit: 585e2a015b29c1a53c4acddeda1b64b3fb3aac39
https://github.com/llvm/llvm-project/commit/585e2a015b29c1a53c4acddeda1b64b3fb3aac39
Author: AidinT <at.aidin at gmail.com>
Date: 2026-04-01 (Wed, 01 Apr 2026)
Changed paths:
A mlir/include/mlir/Bytecode/BytecodeDialectInterface.td
M mlir/include/mlir/Bytecode/BytecodeImplementation.h
M mlir/include/mlir/Bytecode/CMakeLists.txt
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
M utils/bazel/llvm-project-overlay/mlir/test/BUILD.bazel
Log Message:
-----------
[MLIR] Convert BytecodeDialectInterface to ods (#188852)
This PR converts `BytecodeDialectInterface` to ODS.
Commit: aefca764062a8dd0f6a26d94f78f9ef6a3731aa4
https://github.com/llvm/llvm-project/commit/aefca764062a8dd0f6a26d94f78f9ef6a3731aa4
Author: Thurston Dang <thurston at google.com>
Date: 2026-03-31 (Tue, 31 Mar 2026)
Changed paths:
M llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
M llvm/test/Instrumentation/MemorySanitizer/X86/avx512vl-intrinsics.ll
Log Message:
-----------
[msan] Add missing non-mem PMOV handling (#189768)
This adds support for the remaining non-memory PMOV intrinsics, using
the existing handlers.
handleAVX512VectorDownConvert() is slightly updated to handle cases
where there are fewer than 8 output elements (for which the mask is
still supplied as 8 bits).
Commit: 512071941da849587b8988f7e74c30c46b377a2c
https://github.com/llvm/llvm-project/commit/512071941da849587b8988f7e74c30c46b377a2c
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-03-31 (Tue, 31 Mar 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoP.td
M llvm/test/CodeGen/RISCV/rv32p.ll
M llvm/test/CodeGen/RISCV/rv64p.ll
Log Message:
-----------
[RISCV] Add codegen support for SATI and USATI. (#189532)
Implementation is largely based on ARM which has similar instructions.
Commit: fe6d15ddbfd44d4a95fd2d292b1b0b431377a0dd
https://github.com/llvm/llvm-project/commit/fe6d15ddbfd44d4a95fd2d292b1b0b431377a0dd
Author: Chuanqi Xu <yedeng.yd at linux.alibaba.com>
Date: 2026-04-01 (Wed, 01 Apr 2026)
Changed paths:
M clang/lib/Serialization/ASTWriterDecl.cpp
A clang/test/Modules/pr189415.cppm
Log Message:
-----------
[C++20] [Modules] Fix thread_local variable handling in modules (#189796)
Close https://github.com/llvm/llvm-project/issues/189415
The function shouldVarGenerateHereOnly should also handle thread_local
variables, not just static variables. This fixes incorrect code
generation for thread_local variables in named modules.
Commit: 1d549d9a777a6faef6d425cb6482ab1fa6b91bb7
https://github.com/llvm/llvm-project/commit/1d549d9a777a6faef6d425cb6482ab1fa6b91bb7
Author: Luke Lau <luke at igalia.com>
Date: 2026-04-01 (Wed, 01 Apr 2026)
Changed paths:
M llvm/lib/CodeGen/ExpandVectorPredication.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-llrint-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-lrint-vp.ll
M llvm/test/CodeGen/RISCV/rvv/llrint-vp.ll
M llvm/test/CodeGen/RISCV/rvv/lrint-vp.ll
Log Message:
-----------
[RISCV] Remove codegen for vp_lrint, vp_llrint (#189714)
Part of the work to remove trivial VP intrinsics from the RISC-V
backend, see
https://discourse.llvm.org/t/rfc-remove-codegen-support-for-trivial-vp-intrinsics-in-the-risc-v-backend/87999
This splits off two intrinsics from #179622.
We need to use the other intrinsic constructor in
ExpandVectorPredication.cpp because llrint has multiple overloaded types
Commit: 3068132e32c11839c2626347d5288f16d6623bea
https://github.com/llvm/llvm-project/commit/3068132e32c11839c2626347d5288f16d6623bea
Author: Ramkumar Ramachandra <artagnon at tenstorrent.com>
Date: 2026-04-01 (Wed, 01 Apr 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
Log Message:
-----------
[LV] Use bind_front in tryToOptimizeInductionTruncate (NFC) (#189763)
Commit: 7e8449a96d552e22c927eccc439882464a3f2f28
https://github.com/llvm/llvm-project/commit/7e8449a96d552e22c927eccc439882464a3f2f28
Author: Weibo He <NewSigma at 163.com>
Date: 2026-04-01 (Wed, 01 Apr 2026)
Changed paths:
M llvm/lib/Transforms/Coroutines/CoroFrame.cpp
Log Message:
-----------
[CoroSplit] Drop assumption that promise alloca is not accessed before coro.begin (NFC) (#189521)
There is an inconsistency in that the code assumes the promise alloca is
not modified before coro.begin, yet it handles such accesses later. This
patch proposes dropping that assumption and analyzing accesses before
coro.begin from the outset, allowing #189295 to erase promise alloca
without analyse it afterwards.
Commit: 8edbf230980a038f120e754439a79cec68ad9356
https://github.com/llvm/llvm-project/commit/8edbf230980a038f120e754439a79cec68ad9356
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-04-01 (Wed, 01 Apr 2026)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ByteCode/Compiler.h
M clang/lib/AST/ByteCode/Interp.cpp
M clang/test/AST/ByteCode/codegen-constexpr-unknown.cpp
M clang/test/AST/ByteCode/cxx26.cpp
Log Message:
-----------
[clang][bytecode] Revisit reference variables as constexpr-unknown in C++26 (#187918)
When revisiting `const T& range = f(T());`, we do mark the variable for
`range` as constexpr-unknown, but not the temporary variable we create
for `T()`. Change that.
Then we also need to ignore constexpr-unknown pointers in
`CheckInvoke()`.
Fixes https://github.com/llvm/llvm-project/issues/187775
Commit: 21f94950a8411d0a10eaf3380ae44b411f65a0d3
https://github.com/llvm/llvm-project/commit/21f94950a8411d0a10eaf3380ae44b411f65a0d3
Author: Hans Wennborg <hans at hanshq.net>
Date: 2026-04-01 (Wed, 01 Apr 2026)
Changed paths:
M compiler-rt/test/sanitizer_common/TestCases/Linux/soft_rss_limit_mb_test.cpp
Log Message:
-----------
[compiler-rt] Try bumping soft_rss_limit again (#188441)
Previous instance: #171469
Commit: 6a31be68e38e4656354edddfcb137b0c8234a01c
https://github.com/llvm/llvm-project/commit/6a31be68e38e4656354edddfcb137b0c8234a01c
Author: Lukas Sommer <lukas.sommer at amd.com>
Date: 2026-04-01 (Wed, 01 Apr 2026)
Changed paths:
M mlir/include/mlir/IR/OperationSupport.h
Log Message:
-----------
[mlir][NFC] Remove conditionally unused type alias (#189894)
The `RawType` type alias is unused (`-Wunused-local-typedef`) in build
with asserts deactivated. In combination with `-Werror`, this causes
builds to fail.
Signed-off-by: Lukas Sommer <lukas.sommer at amd.com>
Commit: 2e51fdaa774be8e0d6b4d6743a2f77cdb3a71e3c
https://github.com/llvm/llvm-project/commit/2e51fdaa774be8e0d6b4d6743a2f77cdb3a71e3c
Author: David Spickett <david.spickett at arm.com>
Date: 2026-04-01 (Wed, 01 Apr 2026)
Changed paths:
M lldb/include/lldb/Target/MemoryRegionInfo.h
M lldb/include/lldb/lldb-private-enumerations.h
M lldb/source/API/SBMemoryRegionInfo.cpp
M lldb/source/Commands/CommandObjectMemory.cpp
M lldb/source/Expression/IRMemoryMap.cpp
M lldb/source/Plugins/DynamicLoader/POSIX-DYLD/DynamicLoaderPOSIXDYLD.cpp
M lldb/source/Plugins/Process/FreeBSD/NativeProcessFreeBSD.cpp
M lldb/source/Plugins/Process/Linux/NativeProcessLinux.cpp
M lldb/source/Plugins/Process/NetBSD/NativeProcessNetBSD.cpp
M lldb/source/Plugins/Process/Utility/LinuxProcMaps.cpp
M lldb/source/Plugins/Process/Utility/MemoryTagManagerAArch64MTE.cpp
M lldb/source/Plugins/Process/Windows/Common/ProcessDebugger.cpp
M lldb/source/Plugins/Process/elf-core/ProcessElfCore.cpp
M lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationClient.cpp
M lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationServerLLGS.cpp
M lldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.cpp
M lldb/source/Plugins/Process/mach-core/ProcessMachCore.cpp
M lldb/source/Plugins/Process/minidump/MinidumpParser.cpp
M lldb/source/Plugins/Process/minidump/ProcessMinidump.cpp
M lldb/source/Target/MemoryRegionInfo.cpp
M lldb/source/Target/Process.cpp
M lldb/unittests/Process/Utility/LinuxProcMapsTest.cpp
M lldb/unittests/Process/Utility/MemoryTagManagerAArch64MTETest.cpp
M lldb/unittests/Process/gdb-remote/GDBRemoteCommunicationClientTest.cpp
M lldb/unittests/Process/minidump/MinidumpParserTest.cpp
M lldb/unittests/Target/MemoryRegionInfoTest.cpp
Log Message:
-----------
[lldb] Replace OptionalBool with LazyBool (#189652)
The only difference between them is that OptionalBool's third state
is "unknown" and LazyBool's is "calculate". We don't need to tell
the difference in a single context, so I've made a new eLazyBoolDontKnow
which is an alias of eLazyBoolCalculate.
Commit: eeb2fae5c00586e0764be907336e3de27af2b3b1
https://github.com/llvm/llvm-project/commit/eeb2fae5c00586e0764be907336e3de27af2b3b1
Author: David Green <david.green at arm.com>
Date: 2026-04-01 (Wed, 01 Apr 2026)
Changed paths:
M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
M llvm/test/CodeGen/AArch64/dup.ll
Log Message:
-----------
[AArch64][GISel] Do not bitcast nonpower2 element size G_CONCATs (#189911)
This currently gets stuck in a loop, unable to make progress throught
the
bitcast concat. Limit it to legal element sizes so that we always make
progress
and at least fall back to SDAG as opposed to crashing or getting stuck.
Commit: 2313989499b5ee9befd9865310f6fa02f561cf63
https://github.com/llvm/llvm-project/commit/2313989499b5ee9befd9865310f6fa02f561cf63
Author: VASU SHARMA <44048872+vasu-the-sharma at users.noreply.github.com>
Date: 2026-04-01 (Wed, 01 Apr 2026)
Changed paths:
A clang/test/CodeGen/ubsan-aggregate-null-align.c
Log Message:
-----------
[UBSAN] [NFC] pre-commit tests for null, alignment, bounds checks (#176210)
PR to add precommit tests to document current UBSAN behavior for
aggregate copy operations.
The test covers:
- Sanitizers: null, alignment, bounds
- Type variants: plain, _Atomic (C), volatile (C)
- Operand forms: arr[idx], *ptr
- Operations: assignment, initialization, initializer list, variadic
args, nested member access
- C++ specific: direct/brace/copy-list init, new expressions, casts,
operator=, virtual base init
- Bounds checking: in-bounds access, past-the-end access (index ==
size), beyond bounds access, dynamic index
---------
Co-authored-by: vasu-ibm <Vasu.Sharma2 at ibm.com>
Co-authored-by: Tony Varghese <tonypalampalliyil at gmail.com>
Commit: b1f8c285597925428d1f110ad7c1accff70eb885
https://github.com/llvm/llvm-project/commit/b1f8c285597925428d1f110ad7c1accff70eb885
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-04-01 (Wed, 01 Apr 2026)
Changed paths:
M mlir/include/mlir/IR/BuiltinAttributes.td
M mlir/unittests/IR/AttributeTest.cpp
Log Message:
-----------
[MLIR] Validate APInt bitwidth in IntegerAttr::get(Type, APInt) (#188725)
IntegerAttr::get(Type, APInt) did not validate that the APInt's bit
width matched the expected bit width for the given type. For integer
types, the APInt width must equal the integer type's width. For index
types, the APInt width must equal IndexType::kInternalStorageBitWidth
(64 bits).
Passing an APInt with the wrong bit width could cause a
non-deterministic crash in StorageUniquer when comparing two IntegerAttr
instances for the same type but with different APInt widths.
This commit adds assertions in the get(Type, APInt) builder to catch
such misuse early in debug builds, providing a clear error message at
the call site rather than a cryptic crash in the storage uniquer.
Fixes #56401
Assisted-by: Claude Code
Commit: 249e871fa4ef9acc38f8aa02f124322f85635756
https://github.com/llvm/llvm-project/commit/249e871fa4ef9acc38f8aa02f124322f85635756
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-04-01 (Wed, 01 Apr 2026)
Changed paths:
M mlir/lib/Conversion/ArithToLLVM/ArithToLLVM.cpp
M mlir/test/Conversion/ArithToLLVM/arith-to-llvm.mlir
Log Message:
-----------
[MLIR][ArithToLLVM] Fix index_cast on memref types generating invalid LLVM IR (#189227)
`arith.index_cast` and `arith.index_castui` accept memref operands (via
`IndexCastTypeConstraint`), but `IndexCastOpLowering::matchAndRewrite`
did not handle this case. When the operand was a memref, the conversion
framework substituted the converted LLVM struct type, and the lowering
incorrectly attempted to emit `llvm.sext`/`llvm.zext`/`llvm.trunc` on a
struct value, producing invalid LLVM IR.
Since LLVM uses opaque pointers, all memrefs with integer or index
element types lower to the same `\!llvm.struct<(ptr, ptr, i64, ...)>`
type, making `arith.index_cast` on memrefs a no-op at the LLVM level.
Add a check that treats the memref case as an identity conversion (same
as the same-bit-width path).
Fixes #92377
Assisted-by: Claude Code
Commit: 5651490992f3f5da7f39b228f019631725ff9d7f
https://github.com/llvm/llvm-project/commit/5651490992f3f5da7f39b228f019631725ff9d7f
Author: lrzlin <linrunze at loongson.cn>
Date: 2026-04-01 (Wed, 01 Apr 2026)
Changed paths:
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/lib/Target/LoongArch/LoongArchISelLowering.h
A llvm/test/CodeGen/LoongArch/mergestores.ll
Log Message:
-----------
[LoongArch] Implement canMergeStoresTo to avoid crash while NoImplicitFloat attribute is set (#188005)
Currently, when the `NoImplicitFloat` attribute is set, consecutive
64-bit load
and store operations will be combined into 128-bit ones, which is
illegal
because that attribute makes floating point and SIMD unavailable.
By implementing the canMergeStoresTo, we can prevent this incorrect
merging.
Fixes https://github.com/llvm/llvm-project/issues/186645
Commit: 6b2b0da40de1495ace2b100799a35711f7ad7b21
https://github.com/llvm/llvm-project/commit/6b2b0da40de1495ace2b100799a35711f7ad7b21
Author: lonely eagle <2020382038 at qq.com>
Date: 2026-04-01 (Wed, 01 Apr 2026)
Changed paths:
M mlir/lib/Transforms/CSE.cpp
Log Message:
-----------
[mlir][CSE] Fix double-counting of numCSE statistic (#189802)
This PR fixes a regression where the numCSE statistic was being
incremented twice for a single operation elimination. The numCSE counter
is already internally incremented within the replaceUsesAndDelete
function. Manually incrementing it again after the function call leads
to an inaccurate total count. This is part of the
https://github.com/llvm/llvm-project/pull/180556.
Commit: 71cc59400c531d1f9c4a928dae62d20cca3690bd
https://github.com/llvm/llvm-project/commit/71cc59400c531d1f9c4a928dae62d20cca3690bd
Author: Ruoyu Qiu <cabbaken at outlook.com>
Date: 2026-04-01 (Wed, 01 Apr 2026)
Changed paths:
M llvm/lib/Analysis/DependenceAnalysis.cpp
Log Message:
-----------
[DA] add debug log in findGCD (#189537)
Commit: c5363f2166710b0c6e728d5ee11efc99ccf42d87
https://github.com/llvm/llvm-project/commit/c5363f2166710b0c6e728d5ee11efc99ccf42d87
Author: Alexis Engelke <engelke at in.tum.de>
Date: 2026-04-01 (Wed, 01 Apr 2026)
Changed paths:
M llvm/lib/IR/Core.cpp
M llvm/tools/llvm-c-test/echo.cpp
Log Message:
-----------
[IR] Fix C API after getTerminator() change (#189922)
The C API function LLVMGetBasicBlockTerminator should return NULL when
the basic block is not well-formed.
Commit: 6bf794a02a509bf051c50fe2f14009e117ef50ed
https://github.com/llvm/llvm-project/commit/6bf794a02a509bf051c50fe2f14009e117ef50ed
Author: Daniil Fukalov <dfukalov at gmail.com>
Date: 2026-04-01 (Wed, 01 Apr 2026)
Changed paths:
M clang/test/CodeGenCUDA/fp-contract.cu
M llvm/lib/Target/AMDGPU/AMDGPUSelectionDAGInfo.h
M llvm/test/CodeGen/AMDGPU/atomicrmw-expand.ll
M llvm/test/CodeGen/AMDGPU/basic-branch.ll
M llvm/test/CodeGen/AMDGPU/bb-prolog-spill-during-regalloc.ll
M llvm/test/CodeGen/AMDGPU/cf-loop-on-constant.ll
M llvm/test/CodeGen/AMDGPU/collapse-endcf.ll
M llvm/test/CodeGen/AMDGPU/control-flow-fastregalloc.ll
M llvm/test/CodeGen/AMDGPU/dagcombine-lshr-and-cmp.ll
M llvm/test/CodeGen/AMDGPU/div_i128.ll
M llvm/test/CodeGen/AMDGPU/extract_vector_dynelt.ll
M llvm/test/CodeGen/AMDGPU/flat-scratch-alloca-issue-155902.ll
M llvm/test/CodeGen/AMDGPU/indirect-addressing-si.ll
M llvm/test/CodeGen/AMDGPU/indirect-addressing-term.ll
M llvm/test/CodeGen/AMDGPU/insert-delay-alu-bug.ll
M llvm/test/CodeGen/AMDGPU/insert_vector_dynelt.ll
M llvm/test/CodeGen/AMDGPU/kernel-vgpr-spill-mubuf-with-voffset.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.gws.barrier-fastregalloc.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.update.dpp.ll
M llvm/test/CodeGen/AMDGPU/llvm.dbg.value.ll
M llvm/test/CodeGen/AMDGPU/load-global-invariant.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-agent.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-cluster.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-lastuse.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-nontemporal.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-singlethread.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-system.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-volatile.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-wavefront.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-workgroup.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-agent.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-cluster.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-lastuse.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-nontemporal.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-singlethread.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-system.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-volatile.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-wavefront.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-workgroup.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-local-agent.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-local-cluster.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-local-nontemporal.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-local-singlethread.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-local-system.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-local-volatile.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-local-wavefront.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-local-workgroup.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-private-agent.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-private-cluster.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-private-lastuse.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-private-nontemporal.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-private-singlethread.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-private-system.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-private-volatile.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-private-wavefront.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-private-workgroup.ll
M llvm/test/CodeGen/AMDGPU/partial-sgpr-to-vgpr-spills.ll
M llvm/test/CodeGen/AMDGPU/rem_i128.ll
M llvm/test/CodeGen/AMDGPU/rewrite-vgpr-mfma-to-agpr.ll
M llvm/test/CodeGen/AMDGPU/scalar_to_vector_v2x16.ll
M llvm/test/CodeGen/AMDGPU/select-phi-s16-fp.ll
M llvm/test/CodeGen/AMDGPU/sgpr-spill-no-vgprs.ll
M llvm/test/CodeGen/AMDGPU/sgpr-spills-split-regalloc.ll
M llvm/test/CodeGen/AMDGPU/smfmac_alloc_failure_no_agpr_O0.ll
M llvm/test/CodeGen/AMDGPU/sopk-no-literal.ll
M llvm/test/CodeGen/AMDGPU/spill-m0.ll
M llvm/test/CodeGen/AMDGPU/spill-vgpr-to-agpr-update-regscavenger.ll
M llvm/test/CodeGen/AMDGPU/spill-wide-sgpr.ll
M llvm/test/CodeGen/AMDGPU/stacksave_stackrestore.ll
M llvm/test/CodeGen/AMDGPU/trap-abis.ll
M llvm/test/CodeGen/AMDGPU/vgpr-limit-gfx1250.ll
M llvm/test/CodeGen/AMDGPU/vgpr-spill-placement-issue61083.ll
M llvm/test/CodeGen/AMDGPU/vgpr_constant_to_sgpr.ll
M llvm/test/CodeGen/AMDGPU/wait-xcnt-atomic-rmw-optimization.ll
M llvm/test/CodeGen/AMDGPU/wwm-reserved-spill.ll
M llvm/test/CodeGen/AMDGPU/wwm-reserved.ll
M llvm/test/CodeGen/AMDGPU/zext-lid.ll
Log Message:
-----------
[AMDGPU] Disable generic DAG combines at -O0 to preserve debuggability. (#176304)
Disable generic DAG combines for AMDGPU at -O0 via
disableGenericCombines() to preserve instructions that users may want to
set breakpoints on during debugging.
Assisted-by: Cursor / Claude Opus 4.6
Commit: 97562e7e5cae5d6dc019b8f3275eb9639978c05f
https://github.com/llvm/llvm-project/commit/97562e7e5cae5d6dc019b8f3275eb9639978c05f
Author: Andrew Marshall <planetmarshall at users.noreply.github.com>
Date: 2026-04-01 (Wed, 01 Apr 2026)
Changed paths:
M compiler-rt/cmake/Modules/CheckAssemblerFlag.cmake
Log Message:
-----------
pass target triple to `check_assembler_flag` (#188521)
Target specific flags (Notably `-mimplict=always` for ARM) are not
recognized by the clang assembler unless the target is specified. This
PR passes the value of `CMAKE_C_COMPILER_TARGET` to the assembler so
that target specific flags are recognized.
## Previous behaviour
When configuring builtins for an ARMv7 target:
```
-- Builtin supported architectures: armv7
-- Checking for assembler flag -mimplicit-it=always
-- Checking for assembler flag -mimplicit-it=always - Not accepted
-- Checking for assembler flag -Wa,-mimplicit-it=always
-- Checking for assembler flag -Wa,-mimplicit-it=always - Not accepted
CMake Warning at CMakeLists.txt:462 (message):
Don't know how to set the -mimplicit-it=always flag in this assembler; not
including Arm optimized implementations
```
## New behaviour
```
-- Builtin supported architectures: armv7
-- Checking for assembler flag -mimplicit-it=always
-- Checking for assembler flag -mimplicit-it=always - Accepted
```
## Steps to reproduce:
```
$ cmake -S compiler-rt/lib/builtins -B build \
-DCMAKE_C_COMPILER=clang \
-DCMAKE_C_COMPILER_TARGET=armv7-unknown-linux-gnueabihf \
-DCOMPILER_RT_DEFAULT_TARGET_ONLY=ON
```
Commit: d6cd15901a7b17657687c330afa7ee974e27e3be
https://github.com/llvm/llvm-project/commit/d6cd15901a7b17657687c330afa7ee974e27e3be
Author: Jonathan Thackray <jonathan.thackray at arm.com>
Date: 2026-04-01 (Wed, 01 Apr 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64SystemOperands.td
M llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
M llvm/lib/Target/AArch64/Utils/AArch64BaseInfo.h
M llvm/test/MC/AArch64/armv9a-tlbip.s
Log Message:
-----------
[AArch64][llvm] Gate some `tlbip` insns with either +tlbid or +d128 (#178913)
Change the gating of `tlbip` instructions (`sysp` aliases) containing
`*E1IS*`, `*E1OS*`, `*E2IS*` or `*E2OS*` to be used with `+tlbid` or
`+d128`. This is because the 2025 Armv9.7-A MemSys specification says:
```
All TLBIP *E1IS*, TLBIP *E1OS*, TLBIP *E2IS* and TLBIP *E2OS*
instructions that are currently dependent on FEAT_D128 are updated
to be dependent on FEAT_D128 or FEAT_TLBID
```
See also change #178912 where the gating of `+d128` for `sysp` was
removed.
Commit: f6ffdbcbaec23f54a9254c7e19df002f1a0a9425
https://github.com/llvm/llvm-project/commit/f6ffdbcbaec23f54a9254c7e19df002f1a0a9425
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-04-01 (Wed, 01 Apr 2026)
Changed paths:
M mlir/lib/Dialect/Affine/Utils/Utils.cpp
M mlir/test/Dialect/Affine/scalrep.mlir
Log Message:
-----------
[MLIR][Affine] Fix dead store elimination for vector stores with different types (#189248)
affine-scalrep's findUnusedStore incorrectly classified an
affine.vector_store as dead when a subsequent store wrote to the same
base index but with a smaller vector type. A vector<1xi64> store at
[0,0] does not fully overwrite a vector<5xi64> store at [0,0], so the
first store must be preserved.
The loadCSE function in the same file already had the correct
type-equality check for loads; this patch adds the analogous check for
stores in findUnusedStore.
Fixes #113687
Assisted-by: Claude Code
Commit: f2685fabc5bbe33a8b95b665dc4e24223c42fdd9
https://github.com/llvm/llvm-project/commit/f2685fabc5bbe33a8b95b665dc4e24223c42fdd9
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-04-01 (Wed, 01 Apr 2026)
Changed paths:
M clang/lib/AST/ByteCode/Interp.cpp
Log Message:
-----------
[clang][bytecode] Disable tail calls on sparc (#189887)
Looks like this causes problems there as well:
https://lab.llvm.org/buildbot/#/builders/114/builds/252
Interp.cpp:2572:21: error: cannot tail-call: target is not able to
optimize the call into a sibling call
2572 | MUSTTAIL return Fn(S, PC);
| ~~^~~~~~~
Commit: effcd181e580c6f83dfc88a0362705ddb6601f5b
https://github.com/llvm/llvm-project/commit/effcd181e580c6f83dfc88a0362705ddb6601f5b
Author: Luke Lau <luke at igalia.com>
Date: 2026-04-01 (Wed, 01 Apr 2026)
Changed paths:
M llvm/lib/CodeGen/ExpandVectorPredication.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
M llvm/test/CodeGen/RISCV/rvv/ceil-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-ceil-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-floor-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-nearbyint-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-rint-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-round-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-roundeven-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-roundtozero-vp.ll
M llvm/test/CodeGen/RISCV/rvv/floor-vp.ll
M llvm/test/CodeGen/RISCV/rvv/nearbyint-vp.ll
M llvm/test/CodeGen/RISCV/rvv/rint-vp.ll
M llvm/test/CodeGen/RISCV/rvv/round-vp.ll
M llvm/test/CodeGen/RISCV/rvv/roundeven-vp.ll
M llvm/test/CodeGen/RISCV/rvv/roundtozero-vp.ll
Log Message:
-----------
[RISCV] Remove codegen for VP float rounding intrinsics (#189896)
Part of the work to remove trivial VP intrinsics from the RISC-V
backend, see
https://discourse.llvm.org/t/rfc-remove-codegen-support-for-trivial-vp-intrinsics-in-the-risc-v-backend/87999
This splits off seven intrinsics from #179622.
We now generate vfcvt.rtz for llvm.vp.roundtozero. It looks like we
should have been using the codegen for llvm.trunc for it, but we somehow
missed that.
Commit: 0d33a15d3320567639dd8f043c7aa22a55653dab
https://github.com/llvm/llvm-project/commit/0d33a15d3320567639dd8f043c7aa22a55653dab
Author: Hans Wennborg <hans at hanshq.net>
Date: 2026-04-01 (Wed, 01 Apr 2026)
Changed paths:
M clang/test/Modules/pr189415.cppm
Log Message:
-----------
Add a target triple to clang/test/Modules/pr189415.cppm (#189937)
Not all targets support thread_local, so in some environments the test
would fail with:
tools/clang/test/Modules/Output/pr189415.cppm.tmp/counter.cppm:6:1:
error: thread-local storage is not supported for the current target
Follow-up to #189796
Commit: 5249f5ad4d91826507fae4b7d776d1eeabc9bb2a
https://github.com/llvm/llvm-project/commit/5249f5ad4d91826507fae4b7d776d1eeabc9bb2a
Author: Tomer Shafir <tomer.shafir8 at gmail.com>
Date: 2026-04-01 (Wed, 01 Apr 2026)
Changed paths:
M llvm/include/llvm/MCA/HardwareUnits/ResourceManager.h
M llvm/lib/MCA/HardwareUnits/ResourceManager.cpp
Log Message:
-----------
[MCA] Make `ResourceSizeMask` const (#189453)
This patch marks the already effectively constant `ResourceSizeMask` as
`const`. It adds a helper `computeResourceSizeMask()` to initialize it
in the member initializer list.
Commit: 8a06085c610a49739beb0af716a30714f073540c
https://github.com/llvm/llvm-project/commit/8a06085c610a49739beb0af716a30714f073540c
Author: Lucas Ramirez <11032120+lucas-rami at users.noreply.github.com>
Date: 2026-04-01 (Wed, 01 Apr 2026)
Changed paths:
M llvm/include/llvm/CodeGen/Rematerializer.h
M llvm/lib/CodeGen/Rematerializer.cpp
Log Message:
-----------
[CodeGen] Add listener support to the rematerializer (NFC) (#184338)
This change adds support for adding listeners to the target-independent
rematerializer; listeners can catch certain rematerialization-related
events to implement some additional functionality on top of what the
rematerializer already performs.
This is NFC and has no user at the moment, but the plan is to have
listeners start being responsible for secondary/optional functionalities
that are at the moment integrated with the rematerializer itself. Two
examples of that are:
1. rollback support (currently optional), and
2. region tracking (currently mandatory, but not fundamentally necessary
to the rematerializer).
Commit: 042997bd15a52ef435673e9182ed5cd2453f8ab0
https://github.com/llvm/llvm-project/commit/042997bd15a52ef435673e9182ed5cd2453f8ab0
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-04-01 (Wed, 01 Apr 2026)
Changed paths:
A llvm/test/CodeGen/RISCV/combine-is_fpclass.ll
Log Message:
-----------
[RISCV] combine-is_fpclass.ll - add initial tests showing failure to constant fold ISD::IS_FPCLASS nodes (#189940)
Commit: 3b1125b1edf997e261ebafdf31b1828f5c458ebb
https://github.com/llvm/llvm-project/commit/3b1125b1edf997e261ebafdf31b1828f5c458ebb
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-04-01 (Wed, 01 Apr 2026)
Changed paths:
M llvm/include/llvm/Analysis/ScalarEvolution.h
M llvm/lib/Analysis/ScalarEvolution.cpp
Log Message:
-----------
[SCEV] Add canonical SCEV pointer and construct canonical SCEVs (NFC) (#188858)
Add a canonical SCEV pointer to SCEV, to support comparing SCEVs for
equality, even with different use-specific flags.
Currently this should be NFC, as nothing yet sets use flags.
Compile-time impact:
https://llvm-compile-time-tracker.com/compare.php?from=13f1fd006243f756417c3ae992342c0674e3f04e&to=e7f46bcf8bef62c619380fbcccbe6073300b69fe&stat=instructions:u
+0.03% - +0.05% on stage1 configs
-0.03% surprisingly for stage2-O3
PR: https://github.com/llvm/llvm-project/pull/188858
Commit: 26b755c09bfa5b5e31c3cef8d4118316b2937cdd
https://github.com/llvm/llvm-project/commit/26b755c09bfa5b5e31c3cef8d4118316b2937cdd
Author: Alexis Engelke <engelke at in.tum.de>
Date: 2026-04-01 (Wed, 01 Apr 2026)
Changed paths:
M llvm/include/llvm/IR/GlobalObject.h
M llvm/include/llvm/IR/Instruction.h
M llvm/include/llvm/IR/Value.h
M llvm/lib/IR/Globals.cpp
M llvm/lib/IR/Instruction.cpp
M llvm/lib/IR/Metadata.cpp
M llvm/lib/IR/Value.cpp
Log Message:
-----------
[IR] Remove Value::HasMetadata (#189917)
Metadata already has two separate implementations, one for GlobalObject
and one for Instruction. Instruction was already separate due to special
MD_dbg handling, so move the GlobalObject-specific metadata parts from
Value to GlobalObject.
The HasMetadata bit, originally an optimization to avoid the hash table
lookup when a value has no metadata, is no longer needed, because the
information is now stored directly in Instruction/GlobalObject's
MetadataIndex field.
This also fixes MSan builds, currently ~Value clears metadata and
therefore needs to access the subclass's MetadataIndex field, which was
already destructed at this point.
Commit: c67092066e1812bdbec10e4a3628a5f77faa8f9f
https://github.com/llvm/llvm-project/commit/c67092066e1812bdbec10e4a3628a5f77faa8f9f
Author: serge-sans-paille <sguelton at mozilla.com>
Date: 2026-04-01 (Wed, 01 Apr 2026)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/DiagnosticLexKinds.td
M clang/lib/Lex/TokenLexer.cpp
M clang/test/Lexer/gnu-flags.c
A clang/test/Lexer/gnu-zero-variadic-macro-argument-fixit.c
M clang/test/Preprocessor/macro_fn.c
Log Message:
-----------
[clang] Suggest using __VA_OPT__(,) instead of GNU zero variadic macro argument (#188624)
Also provide an appropriate fixit.
Commit: 96db944036a09e773d1e3fff4fa3805a4f75e59e
https://github.com/llvm/llvm-project/commit/96db944036a09e773d1e3fff4fa3805a4f75e59e
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-04-01 (Wed, 01 Apr 2026)
Changed paths:
M llvm/test/CodeGen/SPIRV/spec_const_decoration.ll
Log Message:
-----------
[NFC][SPIR-V] Remove stale XFAIL for spec_const_decoration.ll (#189934)
The test no longer fails with expensive_checks enabled
```
Unexpectedly Passed Tests (1):
LLVM :: CodeGen/SPIRV/spec_const_decoration.ll
```
after
https://github.com/llvm/llvm-project/commit/18e695890306c6824cc15779e1acb7e5956cbec1
(https://github.com/llvm/llvm-project/pull/134016)
also add `-verify-machineinstrs` as per #188703
Commit: 69b116d07503061026ffddbaf74e4b33615fc205
https://github.com/llvm/llvm-project/commit/69b116d07503061026ffddbaf74e4b33615fc205
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-04-01 (Wed, 01 Apr 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVInstrInfo.td
M llvm/test/CodeGen/SPIRV/instructions/vector-shuffle.ll
M llvm/test/CodeGen/SPIRV/transcoding/OpVectorExtractDynamic.ll
Log Message:
-----------
[SPIR-V] Fix OpVectorExtractDynamic operand type (#189635)
vID is a register class for integer vector registers only. vfID (float
vector registers) should be also accepted. Aligning the definition with
other instructions of this kind
related to #188703
Commit: ed48aeadf37ad811f5fa999e2de07f1ae05d1e24
https://github.com/llvm/llvm-project/commit/ed48aeadf37ad811f5fa999e2de07f1ae05d1e24
Author: David Spickett <david.spickett at arm.com>
Date: 2026-04-01 (Wed, 01 Apr 2026)
Changed paths:
M lldb/source/Plugins/Architecture/AArch64/ArchitectureAArch64.cpp
M lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp
M lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.h
M lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_arm64.cpp
M lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_arm64.h
Log Message:
-----------
[lldb][AArch64][Linux] Add support for SME only systems (#165413)
This is the implementation part of #138717, tests and documentation will
be in a separate PR.
SME only systems have SME but not SVE. Previously we assumed that you
would either have SVE, SVE+SME, or neither. On an SME only system, the
SVE register state exists only in streaming mode. SVE instructions may
be used, but only in streaming mode. The Linux kernel will report that
such a processor has SME features but no SVE features.
This means that the non-streaming SVE ptrace register set is
inaccessible (with one exception mentioned below). So the main change
here is around the management of FP registers.
* In non-streaming mode, FP registers must be accessed via the FP
register set. Not the non-streaming SVE register set.
* In streaming mode, FP registers are a subset of the streaming SVE
registers, accessed via the streaming SVE register set.
The one exception the kernel allows is:
> On systems that do not support SVE it is permitted to use SETREGSET to
write SVE_PT_REGS_FPSIMD formatted data via NT_ARM_SVE, in this case the
vector length should be specified as 0. This allows streaming mode to be
disabled on systems with SME but not SVE.
https://docs.kernel.org/arch/arm64/sve.html
This is how we are able to restore to a non-streaming state when an
expression leaves us in streaming mode.
The major changes to LLDB are:
* If we receive only SVG in the expedited registers, we now assume it's
an SME only system and therefore VG == SVG.
* A new state SVEState::StreamingFPSIMD is added to mark the mode where
we are in FPSIMD mode on an SME only system (as opposed to the FPSIMD
state of an SVE or SVE+SME system).
* CalculateFprOffset now returns different results depending on whether
we have only SIMD or we have streaming SVE. In the latter case, the
stored register offsets are relative to the SVE registers, but actual
accesses need to be relative to the ptrace FP register set.
* In WriteAllRegisters, if we have an FP set to restore on an SME only
system we assume we must have been in non-streaming mode at the time of
the save. So we restore it using the previously mentioned non-streaming
SVE write.
* GetSVERegSet and ConfigureRegisterContext were updated to handle the
new StreamingFPSIMDOnly state.
Commit: d14888121db01f9d8f772fa6daaeb4d293085de0
https://github.com/llvm/llvm-project/commit/d14888121db01f9d8f772fa6daaeb4d293085de0
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-04-01 (Wed, 01 Apr 2026)
Changed paths:
M llvm/lib/Target/Mips/MipsInstrInfo.cpp
Log Message:
-----------
[Mips] Correctly report sizes for PATCHABLE_* (#188229)
Report the size of the xray sled.
This came up while working on
https://github.com/llvm/llvm-project/pull/187703.
Commit: 5639c0bb3f721fea802b03aacd531d2a3ac71ac0
https://github.com/llvm/llvm-project/commit/5639c0bb3f721fea802b03aacd531d2a3ac71ac0
Author: David Spickett <david.spickett at arm.com>
Date: 2026-04-01 (Wed, 01 Apr 2026)
Changed paths:
M llvm/docs/ReleaseNotes.md
Log Message:
-----------
[llvm][docs] Add release note for LLDB AArch64 Linux SME only support (#189367)
And highlights that some earlier versions have a critical issue on such
systems. This is not something we are able to fix (because the branches
are closed), but users and packagers have some options which are listed
in the issue.
Relates to #138717.
Commit: ab4b689258c21c5e47d1a865b8b980e01395aac7
https://github.com/llvm/llvm-project/commit/ab4b689258c21c5e47d1a865b8b980e01395aac7
Author: Manuel Carrasco <Manuel.Carrasco at amd.com>
Date: 2026-04-01 (Wed, 01 Apr 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
M llvm/test/CodeGen/AMDGPU/constant-fold-imm-immreg.mir
M llvm/test/CodeGen/AMDGPU/constant-fold-mi-operands.ll
Log Message:
-----------
[AMDGPU][SIFoldOperands] Fix OR -1 fold (#189655)
In SIFoldOperands, folding `or x, -1` to `v_mov_b32 -1` removed
`Src1Idx`, which is incorrect because `-1` is in `Src0Idx` (after
canonicalization).
Closes https://github.com/llvm/llvm-project/issues/189677.
Commit: 2cff995e91c3ff2fe21ae2e5c0bfb7c6746c3029
https://github.com/llvm/llvm-project/commit/2cff995e91c3ff2fe21ae2e5c0bfb7c6746c3029
Author: Sergio Afonso <safonsof at amd.com>
Date: 2026-04-01 (Wed, 01 Apr 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/CMakeLists.txt
M llvm/lib/Target/AMDGPU/SIFrameLowering.cpp
M llvm/lib/Target/AMDGPU/SILowerSGPRSpills.cpp
A llvm/lib/Target/AMDGPU/SISpillUtils.cpp
A llvm/lib/Target/AMDGPU/SISpillUtils.h
A llvm/test/CodeGen/AMDGPU/dead-frame-index-dbg-value.ll
Log Message:
-----------
[AMDGPU] Fix crash with dead frame indices in debug values (#183297)
When spill slots are eliminated (VGPR-to-AGPR, SGPR-to-VGPR lanes),
debug values referencing these frame indices were not always properly
cleaned up. This caused an assertion failure in getObjectOffset() when
PrologEpilogInserter tried to access the offset of a dead frame object.
The existing debug fixup code in SIFrameLowering and SILowerSGPRSpills
had two limitations:
1. It only checked one operand position, but DBG_VALUE_LIST instructions
can have multiple debug operands with frame indices.
2. It didn't handle all types of dead frame indices uniformly.
Fix by centralizing debug info cleanup in removeDeadFrameIndices(),
which already knows all frame indices being removed. This iterates over
all debug operands using MI.debug_operands().
Assisted-by: Claude Code.
Commit: 03b5539dd58584e6821e11123d5c8546147a6f41
https://github.com/llvm/llvm-project/commit/03b5539dd58584e6821e11123d5c8546147a6f41
Author: Antonio Frighetto <me at antoniofrighetto.com>
Date: 2026-04-01 (Wed, 01 Apr 2026)
Changed paths:
M llvm/include/llvm/ADT/GenericCycleImpl.h
M llvm/unittests/Analysis/CFGTest.cpp
Log Message:
-----------
[ADT] Align `GenericCycle::getExitBlocks`/`getExitingBlocks` methods with LoopBase
Ensure `GenericCycle::getExitBlocks` does not replace the content
of the output vector and behaves as `LoopBase::getExitBlocks`,
previously exposing an issue within `isPotentiallyReachable`.
Fixes: https://github.com/llvm/llvm-project/issues/189800.
Fixes: https://github.com/llvm/llvm-project/issues/189289.
Fixes: https://github.com/llvm/llvm-project/issues/189234.
Fixes: https://github.com/llvm/llvm-project/issues/189180.
Commit: 9d592d9e07509f384c2bc0a29df1a8e4ec516763
https://github.com/llvm/llvm-project/commit/9d592d9e07509f384c2bc0a29df1a8e4ec516763
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-04-01 (Wed, 01 Apr 2026)
Changed paths:
M llvm/include/llvm/Analysis/LoopAccessAnalysis.h
M llvm/lib/Analysis/LoopAccessAnalysis.cpp
M llvm/lib/Transforms/Scalar/LoopLoadElimination.cpp
M llvm/test/Analysis/LoopAccessAnalysis/invariant-dep-same-ptr.ll
M llvm/test/Analysis/LoopAccessAnalysis/pointer-phis.ll
M llvm/test/tools/UpdateTestChecks/update_analyze_test_checks/Inputs/loop-distribute.ll.expected
Log Message:
-----------
[LAA] Catch load/store to invariant address in dependency checker. (#187023)
There are some accesses we cannot easily catch with the existing SSA
based tracking of uniform stores.
Extend the dependency checker to reject accesses the same invariant
address for cases SCEV can prove (distance is zero).
For those cases, we would not generate runtime checks for the
problematic pair, as they are part of the same group.
Note that this adds a new InvariantUnsafe kind, similar to
IndirectUnsafe, although maybe it would be sufficient to just have a
single Unsafe kind, with slight loss of precision.
Fixes https://github.com/llvm/llvm-project/issues/186922.
PR: https://github.com/llvm/llvm-project/pull/187023
Commit: bc36746ddfee3ca7724e00311f6371090a43754c
https://github.com/llvm/llvm-project/commit/bc36746ddfee3ca7724e00311f6371090a43754c
Author: David Spickett <david.spickett at arm.com>
Date: 2026-04-01 (Wed, 01 Apr 2026)
Changed paths:
M lldb/docs/use/aarch64-linux.md
Log Message:
-----------
[lldb][docs] Add documentation for AArch64 Linux SME only support (#165415)
As for other features, this is a mixture of user facing decisions and
internal design decisions.
Commit: 23d76784a5aa01140543881f2c27ace6a6545f98
https://github.com/llvm/llvm-project/commit/23d76784a5aa01140543881f2c27ace6a6545f98
Author: David Spickett <david.spickett at arm.com>
Date: 2026-04-01 (Wed, 01 Apr 2026)
Changed paths:
A lldb/test/API/linux/aarch64/sme_only_registers/Makefile
A lldb/test/API/linux/aarch64/sme_only_registers/TestSMEOnlyRegisters.py
A lldb/test/API/linux/aarch64/sme_only_registers/main.c
Log Message:
-----------
[lldb][AArch64][Linux] Add tests for SME only support (#165414)
This PR is the tests for #138717. I have split it from implementation as
there is a lot of code, and the two don't really overlap. The tests are
checking what a user will see in LLDB, and only indirectly what happens
in lldb-server.
There are two types of tests, the first is register access tests. These
start in a given mode, where a mode is a combination of the streaming
mode on or off, ZA on or off, and a vector length.
For register access tests I have used two states:
* Streaming mode, ZA on, default vector length
* Non-streaming mode, ZA off, default vector length
(changing mode and vector length is tested in existing SVE+SME tests and
the expression tests I'm adding in this same PR)
The test program:
* Sets up the requested mode.
* Allocates a bunch of buffers for LLDB to write expected register
values to.
* Sets initial register values.
Then LLDB looks for those expected values. Assuming they are present, it
then writes a new set of values to the registers, and to the buffers
within the program. The program is then stepped, which runs an
in-process function to check that it now sees those register values. If
that function fails, we have a bug. If it does not, LLDB then checks for
the same values.
This process repeats for several registers. Hence the repeated calls to
check_register_values in the test program.
In this way we make sure that LLDB sends the correct values to ptrace by
validating them in process. Also that LLDB does not write other
registers in the process of writing one register. Which happened to me
several times during development.
The buffer writes are done with memory writes not expression evaluation
becuase at this stage we cannot trust that expressions work (the
expression tests will later prove that they do).
The second type of tests are expression state restoration tests. For
each combination of states we check that we can restore to a given state
if an expression takes us into the other state. This includes between
the same state, and adds an extra vector length to check expanding and
shrinking SVE buffers. This produces roughly 64 tests.
I have written them all as one test case in a loop because these take a
long time (~20 minutes on an FVP) and you almost always want it to fail
fast. When tracing is enabled you'll see the current states logged.
It's possible that we could skip some of these tests as being very
unlikely to ever happen, but in the spirit of
"There are Only Four Billion Floats–So Test Them All!" I think it is
simpler to enumerate every possible state change.
I have not added a test for executing an expression incompatible with
the current mode because this leads to SIGILL, which I know we already
handle. At this time LLDB makes no effort to make the expression
compatible with the current mode either.
Commit: 5072c020aae1636f687af797d4082a26a761c721
https://github.com/llvm/llvm-project/commit/5072c020aae1636f687af797d4082a26a761c721
Author: Erick Ochoa Lopez <erick.ochoalopez at amd.com>
Date: 2026-04-01 (Wed, 01 Apr 2026)
Changed paths:
M mlir/include/mlir/Dialect/Vector/IR/VectorOps.td
M mlir/lib/Dialect/Vector/Transforms/VectorTransferOpTransforms.cpp
M mlir/test/Dialect/Vector/vector-transfer-drop-unit-dims-patterns.mlir
Log Message:
-----------
[mlir][vector] Drop trailing 1-dims from constant_mask (#187383)
Generalize TransferReadDropUnitDimsPattern to also drop unit dimensions
when `vector::ConstantMaskOp` is used.
Previously TransferReadDropUnitDimsPattern would only drop unit
dimensions when `vector::CreateMaskOp` with a statically known operand
was used.
Assisted-by: Cursor
Commit: 9a33125e42925c1e4a9c9f83a2f251b046dd65cd
https://github.com/llvm/llvm-project/commit/9a33125e42925c1e4a9c9f83a2f251b046dd65cd
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-04-01 (Wed, 01 Apr 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/test/CodeGen/LoongArch/is_fpclass_f32.ll
M llvm/test/CodeGen/LoongArch/is_fpclass_f64.ll
M llvm/test/CodeGen/RISCV/combine-is_fpclass.ll
Log Message:
-----------
[DAG] Add basic ISD::IS_FPCLASS constant/identity folds (#189944)
Attempts to match middle-end implementation in InstructionSimplify/foldIntrinsicIsFPClass
Fixes #189919
Commit: 461a1c51bf0998edc1fd3b9b7197437136c2fb18
https://github.com/llvm/llvm-project/commit/461a1c51bf0998edc1fd3b9b7197437136c2fb18
Author: AidinT <at.aidin at gmail.com>
Date: 2026-04-01 (Wed, 01 Apr 2026)
Changed paths:
M mlir/tools/mlir-tblgen/CppGenUtilities.cpp
Log Message:
-----------
[mlir][ods] resolve the wrong indent issue (#189277)
The `emitSummaryAndDescComments` is used to generate summary and
description for tablegen generated classes and structs such as Dialects
and Interfaces. The generated summary and description is indented
incorrectly in the output generated file. For example
`NVGPUDialect.h.inc ` looks like the following:
```cpp
namespace mlir::nvgpu {
/// The `NVGPU` dialect provides a bridge between higher-level target-agnostic
/// dialects (GPU and Vector) and the lower-level target-specific dialect
/// (LLVM IR based NVVM dialect) for NVIDIA GPUs. This allow representing PTX
/// specific operations while using MLIR high level dialects such as Memref
/// and Vector for memory and target-specific register operands, respectively.
class NVGPUDialect : public ::mlir::Dialect {
...
};
} // namespace mlir::nvgpu
```
This is because the `emitSummaryAndDescComments` trims the summary and
description from both sides, rendering the re-indentation useless. This
PR resolves this bug.
Commit: 158f10fe24a39208e45d6039dfc6d605967ade2a
https://github.com/llvm/llvm-project/commit/158f10fe24a39208e45d6039dfc6d605967ade2a
Author: Ming Yan <ming.yan at terapines.com>
Date: 2026-04-01 (Wed, 01 Apr 2026)
Changed paths:
M mlir/lib/Dialect/MemRef/IR/MemRefOps.cpp
M mlir/test/Dialect/MemRef/canonicalize.mlir
Log Message:
-----------
[mlir][memref] Fold memref.reinterpret_cast operations with valid offset or size constants. (#189533)
When encountering an invalid offset or size, we only skip the current
invalid value and continue attempting to fold other valid offsets or
sizes.
Commit: b46f8fa622ab8edf00e986eed2350f137b5efc0b
https://github.com/llvm/llvm-project/commit/b46f8fa622ab8edf00e986eed2350f137b5efc0b
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-04-01 (Wed, 01 Apr 2026)
Changed paths:
A clang/test/CodeGen/tbaa-matrix.c
Log Message:
-----------
[Matrix] Add tests checking TBAA emission for matrix types (NFC). (#189953)
PR: https://github.com/llvm/llvm-project/pull/189953
Commit: 15d48c5bbe2189db1b79aca0b4f355d0c7d664b6
https://github.com/llvm/llvm-project/commit/15d48c5bbe2189db1b79aca0b4f355d0c7d664b6
Author: Gergo Stomfai <stomfaig at gmail.com>
Date: 2026-04-01 (Wed, 01 Apr 2026)
Changed paths:
M llvm/include/llvm/CodeGen/TargetLowering.h
M llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/SystemZ/canonicalize-vars.ll
Log Message:
-----------
[X86][DAG] remove LowerFCanonicalize (#188127)
Remove LowerFCanonicalize. Added fallback for cases when the scalar type also has its Custom lowering to avoid regressions on AMDGPU and SystemZ.
Fixes #143862
Commit: d6b8163f3fb5b9fe8262171d9815030ccfc3772a
https://github.com/llvm/llvm-project/commit/d6b8163f3fb5b9fe8262171d9815030ccfc3772a
Author: DaKnig <37626476+DaKnig at users.noreply.github.com>
Date: 2026-04-01 (Wed, 01 Apr 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/test/CodeGen/AArch64/neon-abd.ll
M llvm/test/CodeGen/X86/abds.ll
Log Message:
-----------
Retry "[SDAG] (abs (add nsw a, -b)) -> (abds a, b) (#175801)" (#186659)
A better version of #175801 . see that for more info.
Fixes #185467
The original patch was checking the correctness of the transformation
based on the original Op1 , which was then negated (in the case of
IsAdd). This patch fixes that issue by inverting the sign bit in that
case.
Also pushed a slight nfc there to simplify the code and remove some
duplication.
alive2 proofs:
abds: https://alive2.llvm.org/ce/z/oJQPss
abdu: https://alive2.llvm.org/ce/z/HfPF5q
Note that the regression test is not (wrongly) affected anymore by the
patch (as it did before)
Commit: 5781cc9bf6d4e2b1023162eb7878028e2d21e3d4
https://github.com/llvm/llvm-project/commit/5781cc9bf6d4e2b1023162eb7878028e2d21e3d4
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2026-04-01 (Wed, 01 Apr 2026)
Changed paths:
M llvm/include/llvm/IR/Intrinsics.h
M llvm/include/llvm/IR/Intrinsics.td
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/lib/Target/AMDGPU/MIMGInstructions.td
M llvm/test/TableGen/intrinsic-struct.td
Log Message:
-----------
[LLVM][Intrinsics] Refactor IIT encoding generation (#189790)
Refactor IIT encoding generation. The core change here is that when
generating IIT encodings, we pre-generate all the bits of the IIT
encoding except cases where a type needs to encode its own overload
index, which is patched in later in `TypeInfoGen`. In addition, this
change introduces a class hierarchy for dependent types, so that the
checks in `TypeInfoGen` are more meaningful, and renames/simplifies
several other pieces of code, as listed below.
1. Change the encoding for IIT_ARG's ArgInfo byte to encode the overload
slot index in lower 5 bits and the argument kind in upper 3 bits. This
enabled generating the same packed format for all other dependent types
that need to encode an overload slot index in the IIT encoding. Adjusted
the corresponding C++ code in `IITDescriptor::getArgumentNumber` and
`IIT_Descriptor::getArgumentKind`.
2. Introduce more descriptive classes to handle packing of the overload
index + arg kind into the IIT encoding. `OverloadIndexPlaceholder` is
used to generate a transient value in the type-signature that is patched
in `TypeInfoGen` with that type's overload index. `PackOverloadIndex` is
used to encapsulate the final packing of an overload index and argument
kind in a single byte, and `PatchOverloadIndex` is the class that does
the required patching of a `OverloadIndexPlaceholder` given the type's
overload index.
3. Delete `isAny`, `ArgCode` and `Number` from base `LLVMType` class.
Replace use of `isAny` with `isa<LLVMAnyType>`, `ArgCode` is not used
anymore, and move `Number`, which was used to represent the overload
index for a dependent type to the `LLVMDependentType` class and rename
it to `OverloadIndex`.
4. Introduce `LLVMDependentType` as a base class of all dependent types.
It holds the overload index of the type it depends on in its
`OverloadIndex` field. Also introduce 2 subclasses,
`LLVMFullyDependentType` to represent all fully dependent types (which
encode just the appropriate IIT code and the dependent type's overload
index) and `LLVMPartiallyDependentType` to represent partially dependent
types, that encode the appropriate IIT code and both this type's
overload index and the dependent type's overload index.
5. Change existing dependent type classes to derive from one of these
classes and rename the `num` class argument to `oidx` to better reflect
its meaning.
6. Rename various fields and classes used in `TypeInfoGen` to be more
meaningful. `AssignOverloadIndex` to do overload index assignment,
rename `ACIdxs` to `OverloadIdxs`, `ACTys` to `OverloadTypes` and use
the `DoPatchOverloadIndex` to patch in assigned overload slot indexes.
Commit: ce78c16738f805f8635ce6c575c184b94160fade
https://github.com/llvm/llvm-project/commit/ce78c16738f805f8635ce6c575c184b94160fade
Author: Lewis Crawford <lcrawford at nvidia.com>
Date: 2026-04-01 (Wed, 01 Apr 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/SROA.cpp
M llvm/test/Transforms/SROA/vector-promotion-via-tree-structure-merge.ll
Log Message:
-----------
SROA: Fix tree merge IRBuilder insert point (#189680)
StoreInfos is sorted by slice offset, not program order. Anchoring the
IRBuilder at StoreInfos.back() could emit shufflevectors before SSA
values defined later in the same block (invalid IR).
Insert merged shuffles immediately before TheLoad when the load shares
the store block. When the load is elsewhere, insert before the store
block terminator so the merge runs after every store + any trailing
instructions in that block.
Commit: d95292f67b48666be421afe0a3d919480458a6df
https://github.com/llvm/llvm-project/commit/d95292f67b48666be421afe0a3d919480458a6df
Author: Charles Zablit <c_zablit at apple.com>
Date: 2026-04-01 (Wed, 01 Apr 2026)
Changed paths:
M lldb/include/lldb/Host/FileAction.h
M lldb/include/lldb/Host/ProcessLaunchInfo.h
A lldb/include/lldb/Host/windows/WindowsFileAction.h
M lldb/source/Host/CMakeLists.txt
M lldb/source/Host/common/ProcessLaunchInfo.cpp
M lldb/source/Host/windows/ProcessLauncherWindows.cpp
A lldb/source/Host/windows/WindowsFileAction.cpp
M lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunication.cpp
M lldb/tools/lldb-server/lldb-platform.cpp
M lldb/unittests/Host/HostTest.cpp
Log Message:
-----------
[lldb][windows] refactor FileAction (#179274)
Commit: 31edb8fab547eaa76427bf5c62b0c9e58cba3e41
https://github.com/llvm/llvm-project/commit/31edb8fab547eaa76427bf5c62b0c9e58cba3e41
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-04-01 (Wed, 01 Apr 2026)
Changed paths:
M llvm/test/Transforms/LICM/preheader-safe.ll
M llvm/test/Transforms/LICM/read-only-calls.ll
Log Message:
-----------
[LICM] Generate test checks (NFC) (#189963)
Commit: fd40c606652137706bc336ef80ed1814ab3d3680
https://github.com/llvm/llvm-project/commit/fd40c606652137706bc336ef80ed1814ab3d3680
Author: David Green <david.green at arm.com>
Date: 2026-04-01 (Wed, 01 Apr 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VectorCombine.cpp
M llvm/test/Transforms/VectorCombine/AArch64/shuffletoidentity.ll
M llvm/test/Transforms/VectorCombine/LoongArch/shuffle-identity-miscompile.ll
Log Message:
-----------
[VectorCombine] Fix transitive Uses in foldShuffleToIdentity (#188989)
The Uses in foldShuffleToIdentity is intended to detect where an operand
is used to distinguish between splats, identities and concats of the
same value. When looking through multiple unsimplified shuffles the same
Use could be both a splat and a identity though. This patch changes the
Use to a Value and an original Use, so that even if we are looking
through multiple vectors we recognise the splat vs identity vs concat of
each use correctly.
Fixes #180338
Commit: 1c55313f344ff2189500f87c89cec2a3cf2eb5c9
https://github.com/llvm/llvm-project/commit/1c55313f344ff2189500f87c89cec2a3cf2eb5c9
Author: Tony Allevato <tony.allevato at gmail.com>
Date: 2026-04-01 (Wed, 01 Apr 2026)
Changed paths:
M llvm/lib/Support/CommandLine.cpp
M llvm/unittests/Support/CommandLineTest.cpp
Log Message:
-----------
Treat `''` and `""` in Gnu-tokenized response files as an empty string argument. (#187566)
This matches the behavior of gcc and also fixes an inconsistency with
the way the same arguments would be parsed by the shell. For example,
this command line passed directly on the shell:
`command -option1 '' -option2`
has three arguments: `"-option1"`, `""`, and `"-option2"`. However, if
these are passed in a Gnu-tokenized response file today:
```
-option1
''
-option2
```
The `''` is discarded and the command incorrectly has two arguments:
`"-option1"` and `"-option2"`.
Commit: 86c3abe85e7d323c8b7fbe4b83442ca3794512c9
https://github.com/llvm/llvm-project/commit/86c3abe85e7d323c8b7fbe4b83442ca3794512c9
Author: Pankaj Dwivedi <pankajkumar.divedi at amd.com>
Date: 2026-04-01 (Wed, 01 Apr 2026)
Changed paths:
M llvm/include/llvm/ADT/Uniformity.h
M llvm/include/llvm/Analysis/TargetTransformInfo.h
M llvm/include/llvm/Analysis/TargetTransformInfoImpl.h
M llvm/include/llvm/CodeGen/TargetInstrInfo.h
M llvm/lib/Analysis/TargetTransformInfo.cpp
M llvm/lib/Analysis/UniformityAnalysis.cpp
M llvm/lib/CodeGen/MachineUniformityAnalysis.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.h
M llvm/lib/Target/NVPTX/NVPTXTargetTransformInfo.cpp
M llvm/lib/Target/NVPTX/NVPTXTargetTransformInfo.h
Log Message:
-----------
[NFC] Rename InstructionUniformity to ValueUniformity (#189935)
Commit: 9dc8f465a42d7187cfff73e56f525560af4f9349
https://github.com/llvm/llvm-project/commit/9dc8f465a42d7187cfff73e56f525560af4f9349
Author: Steven Perron <stevenperron at google.com>
Date: 2026-04-01 (Wed, 01 Apr 2026)
Changed paths:
M llvm/include/llvm/IR/IntrinsicsSPIRV.td
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
M llvm/lib/Target/SPIRV/SPIRVModuleAnalysis.cpp
A llvm/test/CodeGen/SPIRV/hlsl-resources/CalculateLevelOfDetail.ll
Log Message:
-----------
[SPIRV] Implement the int_spv_resource_calculate_lod* IntrinsicsSPIRV (#188337)
Implements intrinsics used to get the level-of-detail given a texture,
sampler, and a coordinate. It will be used to implement the
corresponding HLSL methods.
Assisted-by: Gemini
Commit: c6b25b4df3efddcc8ab7b781f299aea2ed682434
https://github.com/llvm/llvm-project/commit/c6b25b4df3efddcc8ab7b781f299aea2ed682434
Author: Schrodinger ZHU Yifan <yifanzhu at rochester.edu>
Date: 2026-04-01 (Wed, 01 Apr 2026)
Changed paths:
M libc/include/llvm-libc-macros/pthread-macros.h
M libc/include/llvm-libc-types/pthread_rwlock_t.h
M libc/src/__support/threads/CMakeLists.txt
M libc/src/__support/threads/linux/CMakeLists.txt
R libc/src/__support/threads/linux/rwlock.h
A libc/src/__support/threads/raw_rwlock.h
A libc/src/__support/threads/unix_rwlock.h
M libc/src/pthread/CMakeLists.txt
M libc/src/pthread/pthread_rwlock_clockrdlock.cpp
M libc/src/pthread/pthread_rwlock_clockwrlock.cpp
M libc/src/pthread/pthread_rwlock_destroy.cpp
M libc/src/pthread/pthread_rwlock_init.cpp
M libc/src/pthread/pthread_rwlock_rdlock.cpp
M libc/src/pthread/pthread_rwlock_timedrdlock.cpp
M libc/src/pthread/pthread_rwlock_timedwrlock.cpp
M libc/src/pthread/pthread_rwlock_tryrdlock.cpp
M libc/src/pthread/pthread_rwlock_trywrlock.cpp
M libc/src/pthread/pthread_rwlock_unlock.cpp
M libc/src/pthread/pthread_rwlock_wrlock.cpp
M libc/test/integration/src/pthread/CMakeLists.txt
M libc/test/integration/src/pthread/pthread_rwlock_test.cpp
M libc/test/src/__support/threads/linux/CMakeLists.txt
A libc/test/src/__support/threads/linux/raw_rwlock_test.cpp
Log Message:
-----------
[libc] separate raw_rwlock and unix_rwlock to make it internally usable (#189773)
Commit: 9b00518419736f698d0a62d0721ee54ceeca4bd7
https://github.com/llvm/llvm-project/commit/9b00518419736f698d0a62d0721ee54ceeca4bd7
Author: Kai Nacke <kai.peter.nacke at ibm.com>
Date: 2026-04-01 (Wed, 01 Apr 2026)
Changed paths:
A llvm/include/llvm/MC/MCAsmStreamer.h
M llvm/lib/MC/MCAsmStreamer.cpp
Log Message:
-----------
[MC] Introduce new base class for MCAsmStreamer (#187083)
The class MCAsmBaseStreamer serves as the common base class for streamers
which emit assembly output. It has the same role as MCObjectStreamer has
for streams which emits object files.
Commit: 5d393aee10810d18e30027e22ace3a856d72c0a2
https://github.com/llvm/llvm-project/commit/5d393aee10810d18e30027e22ace3a856d72c0a2
Author: Victor Chernyakin <chernyakin.victor.j at outlook.com>
Date: 2026-04-01 (Wed, 01 Apr 2026)
Changed paths:
M clang-tools-extra/docs/clang-tidy/Contributing.rst
M clang-tools-extra/unittests/clang-tidy/CMakeLists.txt
R clang-tools-extra/unittests/clang-tidy/ObjCModuleTest.cpp
M llvm/utils/gn/secondary/clang-tools-extra/unittests/clang-tidy/BUILD.gn
Log Message:
-----------
[clang-tidy][NFC] Remove the `ObjCModuleTest.cpp` unit test (#185832)
These unit tests only duplicate the tests in
`clang-tools-extra/test/clang-tidy/checkers/objc/forbidden-subclassing.m`.
Commit: ed44820f722aae43f1f00bb3e201300966716973
https://github.com/llvm/llvm-project/commit/ed44820f722aae43f1f00bb3e201300966716973
Author: Eugene Epshteyn <eepshteyn at nvidia.com>
Date: 2026-04-01 (Wed, 01 Apr 2026)
Changed paths:
M flang/test/Lower/Intrinsics/same_type_as.f90
M flang/test/Lower/Intrinsics/scan.f90
M flang/test/Lower/Intrinsics/secnds.f90
M flang/test/Lower/Intrinsics/selected_int_kind.f90
M flang/test/Lower/Intrinsics/selected_real_kind.f90
Log Message:
-----------
[flang][NFC] Converted five tests from old lowering to new lowering (part 40) (#189791)
Tests converted from test/Lower/Intrinsics: same_type_as.f9, scan.f90,
scan.f90, selected_int_kind.f90, selected_real_kind.f90
Commit: 0b61cd39e45ad7e0476740a5ecc455e7461488a4
https://github.com/llvm/llvm-project/commit/0b61cd39e45ad7e0476740a5ecc455e7461488a4
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-04-01 (Wed, 01 Apr 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.h
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlanConstruction.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.h
M llvm/test/Transforms/LoopVectorize/AArch64/epilog-vectorization-factors.ll
M llvm/test/Transforms/LoopVectorize/AArch64/induction-costs-sve.ll
M llvm/test/Transforms/LoopVectorize/AArch64/load-cast-context.ll
M llvm/test/Transforms/LoopVectorize/AArch64/low_trip_count_predicates.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-sub-epilogue-vec.ll
M llvm/test/Transforms/LoopVectorize/AArch64/reduction-recurrence-costs-sve.ll
M llvm/test/Transforms/LoopVectorize/AArch64/store-costs-sve.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-epilog-vect-inloop-reductions.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-epilog-vect-reductions.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-epilog-vect-strict-reductions.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-epilog-vect.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-epilog-vscale-fixed.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve2-histcnt-epilogue.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve2-histcnt.ll
M llvm/test/Transforms/LoopVectorize/AArch64/transform-narrow-interleave-to-widen-memory-scalable.ll
M llvm/test/Transforms/LoopVectorize/AArch64/vector-reverse.ll
M llvm/test/Transforms/LoopVectorize/VPlan/dissolve-replicate-regions.ll
M llvm/test/Transforms/LoopVectorize/X86/transform-narrow-interleave-to-widen-memory-epilogue-vec.ll
M llvm/test/Transforms/LoopVectorize/epilog-vectorization-reductions.ll
Log Message:
-----------
[LV] Add epilogue minimum iteration check in VPlan as well. (#189372)
Update LV to also use the VPlan-based addMinimumIterationCheck for the
iteration count check for the epilogue.
As the VPlan-based addMinimumIterationCheck uses VPExpandSCEV, those
need to be placed in the entry block for now, moving vscale * VF * IC to
the entry for scalable vectors.
The new logic also fails to simplify some checks involving PtrToInt,
because they were only simplified when going through generated IR, then
folding some PtrToInt in IR, then constructing SCEVs again. But those
should be cleaned up by later combines, and there is not really much we
can do other than trying to go through IR.
PR: https://github.com/llvm/llvm-project/pull/189372
Commit: c7c9b25e8b4efd338aadaa3c2ad744faa6422964
https://github.com/llvm/llvm-project/commit/c7c9b25e8b4efd338aadaa3c2ad744faa6422964
Author: argmaxin <srcydeveloper at gmail.com>
Date: 2026-04-01 (Wed, 01 Apr 2026)
Changed paths:
M clang/lib/ExtractAPI/ExtractAPIConsumer.cpp
Log Message:
-----------
Update ExtractAPIConsumer.cpp (#88285)
Fix small spelling mistake.
Co-authored-by: Srcy Dev <88575889+SrcyDev at users.noreply.github.com>
Commit: 54914a4287ca73bb95e42a6cdf19f5d786eb256f
https://github.com/llvm/llvm-project/commit/54914a4287ca73bb95e42a6cdf19f5d786eb256f
Author: Lucas Ramirez <11032120+lucas-rami at users.noreply.github.com>
Date: 2026-04-01 (Wed, 01 Apr 2026)
Changed paths:
M llvm/include/llvm/CodeGen/Rematerializer.h
M llvm/lib/CodeGen/Rematerializer.cpp
M llvm/unittests/CodeGen/RematerializerTest.cpp
Log Message:
-----------
[CodeGen] Allow rematerializer to rematerialize at the end of a block (#184339)
This makes the rematerializer able to rematerialize MIs at the end of a
basic block. We achieve this by tracking the parent basic block of every
region inside the rematerializer and adding an explicit target region to
some of the class's methods. The latter removes the requirement that we
track the MI of every region (`Rematerializer::MIRegion`) after the
analysis phase; the class member is therefore deleted.
This new ability will be used shortly to improve the design of the
rollback mechanism.
Commit: c245d764b8bd70ff78044f56b2dea619b0d428dc
https://github.com/llvm/llvm-project/commit/c245d764b8bd70ff78044f56b2dea619b0d428dc
Author: LU-JOHN <John.Lu at amd.com>
Date: 2026-04-01 (Wed, 01 Apr 2026)
Changed paths:
M llvm/lib/CodeGen/ProcessImplicitDefs.cpp
M llvm/test/CodeGen/AMDGPU/blender-no-live-segment-at-def-implicit-def.ll
M llvm/test/CodeGen/AMDGPU/branch-folding-implicit-def-subreg.ll
M llvm/test/CodeGen/AMDGPU/call-constexpr.ll
M llvm/test/CodeGen/AMDGPU/call-skip.ll
M llvm/test/CodeGen/AMDGPU/cross-block-use-is-not-abi-copy.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fadd.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fmax.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fmin.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fsub.ll
M llvm/test/CodeGen/AMDGPU/insert-delay-alu-bug.ll
M llvm/test/CodeGen/AMDGPU/machine-sink-temporal-divergence-swdev407790.ll
M llvm/test/CodeGen/AMDGPU/mfma-cd-select.ll
A llvm/test/CodeGen/AMDGPU/multi-use-implicit-def.mir
M llvm/test/CodeGen/AMDGPU/phi-av-pressure.ll
M llvm/test/CodeGen/AMDGPU/promote-constOffset-to-imm.ll
M llvm/test/CodeGen/AMDGPU/stack-pointer-offset-relative-frameindex.ll
A llvm/test/CodeGen/AMDGPU/subreg-implicit-def.mir
M llvm/test/CodeGen/AMDGPU/tuple-allocation-failure.ll
M llvm/test/CodeGen/AMDGPU/undef-handling-crash-in-ra.ll
M llvm/test/CodeGen/PowerPC/p10-spill-crun.ll
M llvm/test/CodeGen/RISCV/miss-sp-restore-eh.ll
M llvm/test/CodeGen/Thumb2/2010-02-11-phi-cycle.ll
M llvm/test/CodeGen/X86/issue76416.ll
M llvm/test/CodeGen/X86/machine-trace-metrics-crash.ll
A llvm/test/CodeGen/X86/multi-use-implicit-def.mir
M llvm/test/CodeGen/X86/ragreedy-hoist-spill.ll
M llvm/test/CodeGen/X86/regalloc-advanced-split-cost.ll
M llvm/test/CodeGen/X86/statepoint-two-results.ll
M llvm/test/CodeGen/X86/statepoint-vreg-invoke.ll
M llvm/test/CodeGen/X86/tail-dup-merge-loop-headers.ll
Log Message:
-----------
[CodeGen] Do not remove IMPLICIT_DEF unless all uses have undef flag added (#188133)
Do not remove IMPLICIT_DEF of a physreg unless all uses have an undef
flag added. Previously, only the first use instruction had undef flags
added. This will cause a failure in machine instruction verification.
Multi-instruction uses tested in AMDGPU/multi-use-implicit-def.mir and
X86/multi-use-implicit-def.mir.
---------
Signed-off-by: John Lu <John.Lu at amd.com>
Commit: 234b8469e92aa3bfcc08e5b7abd6fcbb11a258a6
https://github.com/llvm/llvm-project/commit/234b8469e92aa3bfcc08e5b7abd6fcbb11a258a6
Author: Sairudra More <sairudra60 at gmail.com>
Date: 2026-04-01 (Wed, 01 Apr 2026)
Changed paths:
M flang/lib/Lower/ConvertCall.cpp
A flang/test/Lower/HLFIR/elemental-character-min-max.f90
Log Message:
-----------
[Flang] Compute elemental character MIN/MAX result length in HLFIR (#189464)
This patch fixes lowering of elemental character MIN/MAX in HLFIR.
Previously, these cases could hit a lowering-time TODO
`ElementalIntrinsicCallBuilder::computeDynamicCharacterResultLength` and
abort. This change computes the character result length as the maximum
length of the present actual arguments, allowing valid elemental
character MIN/MAX calls to lower successfully.
Added regression coverage for elemental character MIN/MAX, including
differing-length arguments.
Co-authored-by: Sairudra More <moresair at pe31.hpc.amslabs.hpecorp.net>
Commit: 697ff31fc71fcc895edb077e6fc341761edc0acf
https://github.com/llvm/llvm-project/commit/697ff31fc71fcc895edb077e6fc341761edc0acf
Author: Lei Huang <lei at ca.ibm.com>
Date: 2026-04-01 (Wed, 01 Apr 2026)
Changed paths:
M llvm/lib/Target/PowerPC/PPCInstrAltivec.td
M llvm/lib/Target/PowerPC/PPCInstrFuture.td
M llvm/test/CodeGen/PowerPC/vector-rotates.ll
Log Message:
-----------
[PowerPC] Enhance vec_rl() to generate xvrlw (#189023)
Enhance existing builtin vec_rl() to generate the new xvrlw, VSX version
of vrlw, for cpu=future.
Commit: 6f0e961cc2d541e96b1a98c3f196855b0eab2856
https://github.com/llvm/llvm-project/commit/6f0e961cc2d541e96b1a98c3f196855b0eab2856
Author: zGoldthorpe <Zach.Goldthorpe at amd.com>
Date: 2026-04-01 (Wed, 01 Apr 2026)
Changed paths:
M llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
Log Message:
-----------
[WebAssembly] Correct operands for NaN/Zero checks in min/max (#189712)
The `pmin` and `pmax` pattern fragments match `vselect`s, meaning that
the generated operands for `relaxed_min` and `relaxed_max` correspond to
operands 1 and 2 of the `vselect` (rather than operands 0 and 1).
Commit: 046e23fa4adaf4cdee23f4f3416d7d57009f19d5
https://github.com/llvm/llvm-project/commit/046e23fa4adaf4cdee23f4f3416d7d57009f19d5
Author: Roy Shi <royitaqi at users.noreply.github.com>
Date: 2026-04-01 (Wed, 01 Apr 2026)
Changed paths:
M llvm/lib/DebugInfo/GSYM/FileWriter.cpp
M llvm/lib/Support/DataExtractor.cpp
Log Message:
-----------
[llvm lib] Fix endian bug in #189098 (#189778)
The bug was added in #189098. Both functions that I added/changed
assumed little-endian host memory layout when reading/writing
non-power-of-two byte sizes (3, 5, 6, 7). On big-endian hosts (SPARC,
s390x), memcpy copies bytes into the MSB end of a uint64_t, leaving the
value in the wrong bit position. Fix by offsetting the memcpy/write
pointer to always target the LSB bytes.
Commit: 364b19322db209f6a465934e7483a6e1dde14043
https://github.com/llvm/llvm-project/commit/364b19322db209f6a465934e7483a6e1dde14043
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-04-01 (Wed, 01 Apr 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVVSETVLIInfoAnalysis.h
Log Message:
-----------
[RISCV] Add assertions to VSETVLIInfo::hasSEWLMULRatioOnly(). NFC (#189799)
Ensure that we can only call this on valid and not unknown.
Commit: 16255e457c9d5d418bd67543c97204448e195597
https://github.com/llvm/llvm-project/commit/16255e457c9d5d418bd67543c97204448e195597
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-04-01 (Wed, 01 Apr 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/test/CodeGen/RISCV/rv32p.ll
M llvm/test/CodeGen/RISCV/rv64p.ll
Log Message:
-----------
[RISCV] Add RISCVISD::USATI/SATI to computeKnownBitsForTargetNode/ComputeNumSignBitsForTargetNode. (#189702)
Commit: 9506f20b4dccc6334cc36e04c93033d575cfee52
https://github.com/llvm/llvm-project/commit/9506f20b4dccc6334cc36e04c93033d575cfee52
Author: Razvan Lupusoru <razvan.lupusoru at gmail.com>
Date: 2026-04-01 (Wed, 01 Apr 2026)
Changed paths:
M flang/include/flang/Optimizer/OpenACC/Support/FIROpenACCUtils.h
M flang/lib/Optimizer/Analysis/AliasAnalysis.cpp
M flang/lib/Optimizer/Analysis/CMakeLists.txt
A flang/test/Analysis/AliasAnalysis/alias-analysis-acc.mlir
M mlir/include/mlir/Dialect/OpenACC/OpenACC.h
M mlir/include/mlir/Dialect/OpenACC/OpenACCUtils.h
M mlir/lib/Dialect/OpenACC/Utils/OpenACCUtils.cpp
Log Message:
-----------
[flang][acc] Add AA implementation for acc operations (#189772)
This PR extends flang's alias analysis so it can reason about values
that originate from OpenACC data and privatization operations, including
values passed through block arguments.
Commit: 8a1d6c6f5e421bcade951ce9df4d9d300075cab7
https://github.com/llvm/llvm-project/commit/8a1d6c6f5e421bcade951ce9df4d9d300075cab7
Author: Nick Desaulniers <ndesaulniers at google.com>
Date: 2026-04-01 (Wed, 01 Apr 2026)
Changed paths:
M clang/lib/Driver/ToolChains/Linux.cpp
M clang/test/Driver/linux-ld.c
Log Message:
-----------
clang: driver: update android packed relocation logic (#189758)
Hoist this up from the build system so that users of Android's NDK can
benefit from these various packed relocation encodings depending on
which API level they are targeting.
Link: https://github.com/android/ndk/issues/909
Fixes: https://github.com/android/ndk/issues/2193
Link: https://github.com/android/ndk/issues/2188#issuecomment-3366591142
Link:
https://android.googlesource.com/platform/build/soong/+/d046c2afef086a35d24222b09f4d2c4914e8a2a5/cc/linker.go#548
Commit: b528f6746d4dafdc5975041752b14c0c1714afbc
https://github.com/llvm/llvm-project/commit/b528f6746d4dafdc5975041752b14c0c1714afbc
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-04-01 (Wed, 01 Apr 2026)
Changed paths:
M offload/test/CMakeLists.txt
Log Message:
-----------
[Offload] Run liboffload unit tests as a part of check-offload (#189731)
Summary:
These are currently only run with check-offload-unit. Make them a part
of the other tests by putting a dependency on it. We did something like
this previously but it was reverted because the tests failed if there
were no GPUs (like in systems that only checked the CPU case) but I
think that has been fixed.
Commit: 5d9eb0c76aec65c159fb104a241545680483212d
https://github.com/llvm/llvm-project/commit/5d9eb0c76aec65c159fb104a241545680483212d
Author: Mirko Brkušanin <Mirko.Brkusanin at amd.com>
Date: 2026-04-01 (Wed, 01 Apr 2026)
Changed paths:
M clang/include/clang/Basic/OffloadArch.h
M clang/lib/Basic/OffloadArch.cpp
M clang/lib/CodeGen/CGOpenMPRuntimeGPU.cpp
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx11.cl
M clang/test/Driver/amdgpu-macros.cl
M clang/test/Driver/amdgpu-mcpu.cl
M clang/test/Misc/target-invalid-cpu-note/amdgcn.c
M clang/test/Misc/target-invalid-cpu-note/nvptx.c
M llvm/docs/AMDGPUUsage.rst
M llvm/include/llvm/BinaryFormat/ELF.h
M llvm/include/llvm/TargetParser/AMDGPUTargetParser.def
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/GCNProcessors.td
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.cpp
M llvm/lib/TargetParser/TargetParser.cpp
M llvm/test/CodeGen/AMDGPU/directive-amdgcn-target.ll
M llvm/test/CodeGen/AMDGPU/elf-header-flags-mach.ll
M llvm/test/Object/AMDGPU/elf-header-flags-mach.yaml
M llvm/test/tools/llvm-objdump/ELF/AMDGPU/subtarget.ll
M llvm/test/tools/llvm-readobj/ELF/AMDGPU/elf-headers.test
Log Message:
-----------
[AMDGPU] Define new targets gfx1171 and gfx1172 (#187735)
Commit: 27c85964006ec45bd8215ec3271c79fbda435735
https://github.com/llvm/llvm-project/commit/27c85964006ec45bd8215ec3271c79fbda435735
Author: Daniel Paoliello <danpao at microsoft.com>
Date: 2026-04-01 (Wed, 01 Apr 2026)
Changed paths:
M llvm/lib/MC/MCWin64EH.cpp
Log Message:
-----------
[win][x64] Unwind v2: When making headroom leave space for the header (#188368)
When the `ensureHeadroom` call was added during unwind v2 info emission,
it didn't take into account that there is a header of 2-bytes before all
the fixups, so not enough space was actually reserved.
Commit: 1e06cd634e849054d1fe11c1493870b2a7ddf1c9
https://github.com/llvm/llvm-project/commit/1e06cd634e849054d1fe11c1493870b2a7ddf1c9
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-04-01 (Wed, 01 Apr 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
Log Message:
-----------
[SLP][NFC] Fix uninitialized ReductionRoot in getTreeCost
ReductionRoot was initialized to nullptr instead of the RdxRoot
parameter. This caused two ScaleCost calls (for MinBWs cast cost and
ReductionBitWidth resize cost) to pass nullptr as the user instruction,
and suppressed the "Reduction Cost" line in debug output. In practice
the scale factor is the same because the tree root's main op and the
reduction root share the same basic block, so this is NFC.
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/189994
Commit: 015f864215e91d05199fc3c61ef0ee804975d57e
https://github.com/llvm/llvm-project/commit/015f864215e91d05199fc3c61ef0ee804975d57e
Author: Dave Lee <davelee.com at gmail.com>
Date: 2026-04-01 (Wed, 01 Apr 2026)
Changed paths:
M lldb/source/Plugins/TypeSystem/Clang/TypeSystemClang.cpp
Log Message:
-----------
[lldb] Const some ASTContext pointers in TypeSystemClang (NFC) (#189975)
Commit: f918af7a702f32e35b2fb505de24801d06266ed4
https://github.com/llvm/llvm-project/commit/f918af7a702f32e35b2fb505de24801d06266ed4
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2026-04-01 (Wed, 01 Apr 2026)
Changed paths:
M flang/lib/Semantics/check-omp-atomic.cpp
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/openmp-utils.cpp
Log Message:
-----------
[flang][OpenMP] Remove qualification from evaluate::SymbolVector, NFC (#189984)
`SymbolVector` is defined in flang/Semantics/symbol.h, so there is no
need to use a namespace-qualified name for it in lib/Semantics.
Commit: 82e84940701b3e7bba9069e99f8247e7434973bc
https://github.com/llvm/llvm-project/commit/82e84940701b3e7bba9069e99f8247e7434973bc
Author: Ramkumar Ramachandra <artagnon at tenstorrent.com>
Date: 2026-04-01 (Wed, 01 Apr 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/test/Transforms/LoopVectorize/VPlan/dissolve-replicate-regions.ll
Log Message:
-----------
[VPlan] Avoid unnecessary BTC SymbolicValue creation (NFC) (#189929)
Don't unnecessarily create a backedge-taken-count SymbolicValue. This
allows us to simplify some code.
Commit: 5c36ef884321e293714da6e06239345ba2805d3c
https://github.com/llvm/llvm-project/commit/5c36ef884321e293714da6e06239345ba2805d3c
Author: yebinchon <86588366+yebinchon at users.noreply.github.com>
Date: 2026-04-01 (Wed, 01 Apr 2026)
Changed paths:
M flang/lib/Optimizer/HLFIR/Transforms/BufferizeHLFIR.cpp
A flang/test/HLFIR/bufferize-associate-block-ordering.fir
Log Message:
-----------
[flang] fix a dangling else in allOtherUsesAreSafeForAssociate (#189748)
Fix a dangling if condition in allOtherUsesAreSafeForAssociate that
caused isBeforeInBlock to be called even when instructions were known to
not be in the same block, triggering an assertion. The condition was
changed to else if and added brackets.
---------
Co-authored-by: Yebin Chon <ychon at nvidia.com>
Commit: 44979bedf0b65db49c7ea67f5d40b0d4c44b06ea
https://github.com/llvm/llvm-project/commit/44979bedf0b65db49c7ea67f5d40b0d4c44b06ea
Author: Ramkumar Ramachandra <artagnon at tenstorrent.com>
Date: 2026-04-01 (Wed, 01 Apr 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanUtils.cpp
Log Message:
-----------
[VPlan] Strip dead code in isUniformAcrossVFsAndUFs (NFC) (#189687)
Checking a VPInstruction for scalar-cast is equivalent to checking
opcode against Instruction::isCast via preservesUniformity.
Commit: 91adaeceb162357a33e2ea6155cb13a4198a981a
https://github.com/llvm/llvm-project/commit/91adaeceb162357a33e2ea6155cb13a4198a981a
Author: Jan Leyonberg <jan_sjodin at yahoo.com>
Date: 2026-04-01 (Wed, 01 Apr 2026)
Changed paths:
A clang/include/clang/CIR/Dialect/OpenMP/RegisterOpenMPExtensions.h
M clang/lib/CIR/CodeGen/CIRGenerator.cpp
M clang/lib/CIR/CodeGen/CMakeLists.txt
M clang/lib/CIR/Dialect/CMakeLists.txt
A clang/lib/CIR/Dialect/OpenMP/CMakeLists.txt
A clang/lib/CIR/Dialect/OpenMP/RegisterOpenMPExtensions.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/CMakeLists.txt
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
A clang/test/CIR/Transforms/omp-mark-declare-target.cir
M clang/tools/cir-opt/CMakeLists.txt
M clang/tools/cir-opt/cir-opt.cpp
M clang/tools/cir-translate/CMakeLists.txt
M clang/tools/cir-translate/cir-translate.cpp
M mlir/lib/Dialect/OpenMP/Transforms/CMakeLists.txt
M mlir/lib/Dialect/OpenMP/Transforms/MarkDeclareTarget.cpp
Log Message:
-----------
[CIR][MLIR][OpenMP] Enable the MarkDeclareTarget pass for ClangIR (#189420)
This patch enables the MarkDeclareTarget for CIR by adding the pass to
the lowerings and attaching the declare target interface to the
cir::FuncOp. The MarkDeclareTarget is also generalized to work on the
FunctionOpInterface instead of func::Op since it needs to be able to
handle cir::FuncOp as well.
Co-authored-by: Claude Opus 4.6 <noreply at anthropic.com>
Commit: d7e129dffbe1d8cdafd6731a4ff130da68deb40b
https://github.com/llvm/llvm-project/commit/d7e129dffbe1d8cdafd6731a4ff130da68deb40b
Author: zGoldthorpe <Zach.Goldthorpe at amd.com>
Date: 2026-04-01 (Wed, 01 Apr 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
Log Message:
-----------
[SelectionDAGBuilder] Only check VPCmp for NaNs in fp comparisons (#189749)
`getFCmpCodeWithoutNaN` should only be used for FP comparisons (which is
also the only context in which `isKnownNeverNaN` makes sense).
Commit: 166806e792002325814e66cb05fd38540f65cc21
https://github.com/llvm/llvm-project/commit/166806e792002325814e66cb05fd38540f65cc21
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2026-04-01 (Wed, 01 Apr 2026)
Changed paths:
M flang/lib/Semantics/mod-file.cpp
M flang/lib/Semantics/mod-file.h
M flang/lib/Semantics/resolve-names.cpp
R flang/test/Semantics/Inputs/modfile84.f90
R flang/test/Semantics/modfile84.f90
Log Message:
-----------
Revert "[flang] Preserve UseErrorDetails in module files (#189423)" (#189997)
This reverts commit fce3a66f5e2f247890c57ac01a2c9847358c0f27. It broke a
Fortran application in our in-house testing.
Commit: 45b932a2d452c997d98b57e1aa31bc4951c5e9f4
https://github.com/llvm/llvm-project/commit/45b932a2d452c997d98b57e1aa31bc4951c5e9f4
Author: Katherine Rasmussen <krasmussen at lbl.gov>
Date: 2026-04-01 (Wed, 01 Apr 2026)
Changed paths:
M flang/docs/Extensions.md
Log Message:
-----------
[flang] Update Flang Extension doc to reflect previous change (#188088)
Update Flang Extension doc to remove note about a warning that was
removed in a previous PR (PR #178088). It is an oversight that this doc
change was not made in that previous PR. The oversight was only recently
discovered and has led to this PR.
Commit: 66d1dc48ad7bc344e2656fcf3afb7470c70a9382
https://github.com/llvm/llvm-project/commit/66d1dc48ad7bc344e2656fcf3afb7470c70a9382
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2026-04-01 (Wed, 01 Apr 2026)
Changed paths:
M lldb/packages/Python/lldbsuite/test/lldbutil.py
Log Message:
-----------
Revert "[lldb] Increase timeout on lldbutil.wait_for_file_on_target" (#190004)
Reverts llvm/llvm-project#189471 because it seems like this breaks the
Sanitized bots:
https://github.com/llvm/llvm-project/pull/189471#issuecomment-4171688975
Commit: 33ca7a4667d7f60a4692a2e03b3de94f66ff0d10
https://github.com/llvm/llvm-project/commit/33ca7a4667d7f60a4692a2e03b3de94f66ff0d10
Author: Valeriy Savchenko <vsavchenko at apple.com>
Date: 2026-04-01 (Wed, 01 Apr 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/LICM.cpp
M llvm/test/Transforms/LICM/hoist-binop.ll
Log Message:
-----------
[LICM] Reassociate add/sub expressions to hoist invariant computations (#183082)
While `sub` is not associative, we can still reassociate `add` and
`sub`.
## Alive2 proofs
| Case | Transform | Proof |
|------|-----------|-------|
| 1 | `(x + c1) - c2` => `x + (c1 - c2)` |
[proof](https://alive2.llvm.org/ce/z/iofzYy) |
| 2 | `(x - c1) - c2` => `x - (c1 + c2)` |
[proof](https://alive2.llvm.org/ce/z/U4K_tE) |
| 3 | `(x - c1) + c2` => `x + (c2 - c1)` |
[proof](https://alive2.llvm.org/ce/z/moiJVw) |
Commit: 7c4b6dee7401769a359d2922629f7cd0103d6c72
https://github.com/llvm/llvm-project/commit/7c4b6dee7401769a359d2922629f7cd0103d6c72
Author: Sadaf Ebrahimi <sadafebrahimi at google.com>
Date: 2026-04-01 (Wed, 01 Apr 2026)
Changed paths:
M compiler-rt/lib/scudo/standalone/combined.h
M compiler-rt/lib/scudo/standalone/tests/combined_test.cpp
Log Message:
-----------
[scudo] Ensure that reallocate copies everything
getUsableSize returns the actual capacity of the underlying block, which
may be larger than the size originally requested by the user. If the
user writes data into this extra space accessible via getUsableSize and
subsequently calls reallocate, the existing implementation only copies
the original requested number of bytes. This resulted in data loss for
any information stored beyond the requested size but within the usable
bounds.
Commit: 996157cb17a0f608590bdd2b3d8560d798acc188
https://github.com/llvm/llvm-project/commit/996157cb17a0f608590bdd2b3d8560d798acc188
Author: Chandler Carruth <chandlerc at gmail.com>
Date: 2026-04-01 (Wed, 01 Apr 2026)
Changed paths:
M clang/lib/AST/ByteCode/Interp.h
Log Message:
-----------
Fully disable `preserve_none` under ASan (#190001)
This crashes Clang 19, 21, and 22 on x86-64 that I've tested and I don't
have a ready-to-test build of any other versions but it seems much safer
to just disable for now.
Commit: 26a5a494c3c97219ea94fd0ca47a648ab8b32472
https://github.com/llvm/llvm-project/commit/26a5a494c3c97219ea94fd0ca47a648ab8b32472
Author: Ehsan Amiri <ehsan.amiri at huawei.com>
Date: 2026-04-01 (Wed, 01 Apr 2026)
Changed paths:
M llvm/lib/Analysis/DependenceAnalysis.cpp
Log Message:
-----------
[DA] factor out repetitive code in GCD test (NFCI) (#189461)
The logic for recursively investigating the source and destination
AddRecs in GCD test is the same and can be factored out.
Commit: 07fc9b8155b4913c8fb235ae05898893ec7d388f
https://github.com/llvm/llvm-project/commit/07fc9b8155b4913c8fb235ae05898893ec7d388f
Author: Luke Lau <luke at igalia.com>
Date: 2026-04-01 (Wed, 01 Apr 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfmax-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfmin-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfmax-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfmin-vp.ll
Log Message:
-----------
[RISCV] Remove codegen for vp_minnum, vp_maxnum (#189899)
Part of the work to remove trivial VP intrinsics from the RISC-V
backend, see
https://discourse.llvm.org/t/rfc-remove-codegen-support-for-trivial-vp-intrinsics-in-the-risc-v-backend/87999
This splits off 2 intrinsics from #179622.
Commit: b71eacea7687f68c11299e3bda5654fbbaa1e20e
https://github.com/llvm/llvm-project/commit/b71eacea7687f68c11299e3bda5654fbbaa1e20e
Author: forking-google-bazel-bot[bot] <265904573+forking-google-bazel-bot[bot]@users.noreply.github.com>
Date: 2026-04-01 (Wed, 01 Apr 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[Bazel] Fixes 91adaec (#189998)
This fixes 91adaeceb162357a33e2ea6155cb13a4198a981a.
Co-authored-by: Google Bazel Bot <google-bazel-bot at google.com>
Commit: 24b6ee90c1eed2f6f9f5d086b74a4e5fd55e0717
https://github.com/llvm/llvm-project/commit/24b6ee90c1eed2f6f9f5d086b74a4e5fd55e0717
Author: zGoldthorpe <Zach.Goldthorpe at amd.com>
Date: 2026-04-01 (Wed, 01 Apr 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
Log Message:
-----------
[SelectionDAG] Assert on non-FP operand to `computeKnownFPClass` (#189752)
Assert correct usage of `computeKnownFPClass` or users (i.e.,
`isKnownNeverNaN`).
Commit: fbf484009c782a3ecb8bae6526d4c10d006365fc
https://github.com/llvm/llvm-project/commit/fbf484009c782a3ecb8bae6526d4c10d006365fc
Author: Vito Secona <77039267+secona at users.noreply.github.com>
Date: 2026-04-01 (Wed, 01 Apr 2026)
Changed paths:
M mlir/include/mlir/Dialect/SparseTensor/Pipelines/Passes.h
M mlir/lib/Dialect/SparseTensor/Pipelines/SparseTensorPipelines.cpp
Log Message:
-----------
[mlir][sparse] add GPU num threads to sparsifier options (#189078)
This change adds a `gpu-num-threads` option to the sparsifier. This
allows users to specify the number of threads used for GPU codegen,
similar to the `num-threads` option in the `-sparse-gpu-codegen` pass.
Commit: e55c85341d9f757021b4f31b910d2ad2175f7e6c
https://github.com/llvm/llvm-project/commit/e55c85341d9f757021b4f31b910d2ad2175f7e6c
Author: agozillon <Andrew.Gozillon at amd.com>
Date: 2026-04-01 (Wed, 01 Apr 2026)
Changed paths:
M flang/lib/Lower/Bridge.cpp
A flang/test/Lower/OpenMP/requires-usm.f90
Log Message:
-----------
[Flang][OpenMP] Extend omp requires detection in Bridge.cpp (#188106)
Currently, we do not check the module for requires directives, which
means we'll miss these and not set them on the OpenMP module.
Otherwise, due to the first come first serve method we currently check
the symbols, there is certain formats that would mean the compiler would
miss that a user had specified requires somewhere in the module. This is
partially but not fully avoided by the Semantics layer pushing the
requires on to the top most PFT symbol, as it is entirely possible to
create a legal Fortran program where you could have two or more of these
(e.g. module and main program in one file, standalone funcitons
intermixed with modules or main program). Some examples of this are
shown in the added Fortran test. This PR opts to resolve it by gathering
all of the relevant symbols and processing them.
Also removed gathering from BlockDataUnit as I don't think these symbols
ever get the requires applied.
Commit: 54e5803d0231211decb64105b10b4701dce938c2
https://github.com/llvm/llvm-project/commit/54e5803d0231211decb64105b10b4701dce938c2
Author: Zhige Chen <zhige_chen at outlook.com>
Date: 2026-04-02 (Thu, 02 Apr 2026)
Changed paths:
M llvm/tools/llubi/lib/CMakeLists.txt
A llvm/tools/llubi/lib/ExecutorBase.cpp
A llvm/tools/llubi/lib/ExecutorBase.h
M llvm/tools/llubi/lib/Interpreter.cpp
Log Message:
-----------
[llubi] Extract reusable methods of InstExecutor into ExecutorBase (#186976)
This PR extracts the non-visitor methods of class InstExecutor into a
separate class ExecutorAPI. This reorganization allows library functions
(and any future extensions) to reuse the functionality of InstExecutor
without introducing cyclic dependencies.
See also #185645 and #185817.
Commit: 6c7c575556cbcd49d3fe6321b3bf55c30111b4d9
https://github.com/llvm/llvm-project/commit/6c7c575556cbcd49d3fe6321b3bf55c30111b4d9
Author: Jameson Nash <vtjnash at gmail.com>
Date: 2026-04-01 (Wed, 01 Apr 2026)
Changed paths:
M clang/lib/CodeGen/CGHLSLRuntime.cpp
Log Message:
-----------
[clang] fix OutputSemantic list in HLSL (#185550)
Normally sane front-ends with the common calling-conventions avoid
having multiple sret with a return value, so this is NFCI. However,
multiple can be valid. This rewrites an odd looking DenseMap of one
element that was needed for iteration into a more sensible vector.
Noted in https://github.com/llvm/llvm-project/pull/181740 review.
Commit: 01cf792d1e68b28104c777927acf18fda3d41a95
https://github.com/llvm/llvm-project/commit/01cf792d1e68b28104c777927acf18fda3d41a95
Author: PiJoules <leonardchan at google.com>
Date: 2026-04-01 (Wed, 01 Apr 2026)
Changed paths:
M clang/lib/Sema/SemaDeclCXX.cpp
M clang/lib/Sema/SemaLookup.cpp
M clang/test/SemaCXX/using-if-exists.cpp
Log Message:
-----------
[clang] Fix conflicting declaration error with using_if_exists (#167646)
This fixes an issue with using_if_exists where we would hit `conflicts
with target of using declaration already in scope` with a
using_if_exists attribute referring to a declaration which did not
exist. That is, if we have `using ::bar
__attribute__((using_if_exists))` but `bar` is not in the global
namespace, then nothing should actually be declared here.
This PR contains the following changes:
1. Ensure we only diagnose this error if the target decl and [Non]Tag
decl can be substitutes for each other.
2. Prevent LookupResult from considering UnresolvedUsingIfExistsDecls in
the event of ambiguous results.
3. Update tests. This includes the minimal repo for a regression test,
and changes to existing tests which also seem to exhibit this bug.
Fixes #85335
---------
Co-authored-by: Petr Hosek <phosek at google.com>
Commit: 3b3b556a12a79109785394233779d89982068705
https://github.com/llvm/llvm-project/commit/3b3b556a12a79109785394233779d89982068705
Author: Zhen Wang <zhenw at nvidia.com>
Date: 2026-04-01 (Wed, 01 Apr 2026)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
M mlir/lib/Target/LLVMIR/Dialect/NVVM/NVVMToLLVMIRTranslation.cpp
M mlir/test/Target/LLVMIR/nvvmir.mlir
Log Message:
-----------
[mlir][NVVM] Add managed attribute for global variables (#189751)
Add support for the `nvvm.managed` attribute on `llvm.mlir.global` ops.
When present, the LLVM IR translation emits `!nvvm.annotations` metadata
with `!"managed"` for the global variable, which the NVPTX backend uses
to generate `.attribute(.managed)` in PTX output.
This enables CUDA managed memory support for frontends that lower
through MLIR.
Commit: 573935d7b3a2565605b22edd8a7a60d6d6638244
https://github.com/llvm/llvm-project/commit/573935d7b3a2565605b22edd8a7a60d6d6638244
Author: Ehsan Amiri <ehsan.amiri at huawei.com>
Date: 2026-04-01 (Wed, 01 Apr 2026)
Changed paths:
M llvm/lib/Analysis/DependenceAnalysis.cpp
M llvm/test/Analysis/DependenceAnalysis/weak-crossing-siv-delta-signed-min.ll
M llvm/test/Analysis/DependenceAnalysis/weak-crossing-siv-large-btc.ll
M llvm/test/Analysis/DependenceAnalysis/weak-crossing-siv-overflow.ll
Log Message:
-----------
[DA] Overflow check in WeakCrossing Delta calculation (#185046)
When subtracting the constant part of two addrecs, we need to ensure the
calculation won't overflow. If it may overflow, we conservatively stop
the analysis and return false.
Commit: b5745e1e28c0503069804ebb8921a4b66a4d0a3d
https://github.com/llvm/llvm-project/commit/b5745e1e28c0503069804ebb8921a4b66a4d0a3d
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-04-01 (Wed, 01 Apr 2026)
Changed paths:
M libc/config/gpu/amdgpu/entrypoints.txt
M libc/config/gpu/amdgpu/headers.txt
M libc/config/gpu/nvptx/entrypoints.txt
M libc/config/gpu/nvptx/headers.txt
Log Message:
-----------
[libc] Support basic 'complex.h' functionality on GPUs (#189999)
Summary:
This PR adds the basic complex functions needed by some targets. This is
an attempt to provide the standard interface needed by
'https://github.com/llvm/llvm-project/pull/187831'
Commit: d736e1bd0b98706ced9b689211c8df39abb7cd46
https://github.com/llvm/llvm-project/commit/d736e1bd0b98706ced9b689211c8df39abb7cd46
Author: Min-Yih Hsu <min.hsu at sifive.com>
Date: 2026-04-01 (Wed, 01 Apr 2026)
Changed paths:
A llvm/test/tools/llvm-mca/RISCV/SiFiveP600/atomic.test
R llvm/test/tools/llvm-mca/RISCV/SiFiveP600/div.s
A llvm/test/tools/llvm-mca/RISCV/SiFiveP600/floating-point.test
A llvm/test/tools/llvm-mca/RISCV/SiFiveP600/integer.test
R llvm/test/tools/llvm-mca/RISCV/SiFiveP600/load.s
R llvm/test/tools/llvm-mca/RISCV/SiFiveP600/mask.s
R llvm/test/tools/llvm-mca/RISCV/SiFiveP600/mul-cpop.s
A llvm/test/tools/llvm-mca/RISCV/SiFiveP600/mul-div.test
A llvm/test/tools/llvm-mca/RISCV/SiFiveP600/rvv/arithmetic.test
A llvm/test/tools/llvm-mca/RISCV/SiFiveP600/rvv/bitwise.test
A llvm/test/tools/llvm-mca/RISCV/SiFiveP600/rvv/comparison.test
A llvm/test/tools/llvm-mca/RISCV/SiFiveP600/rvv/conversion.test
A llvm/test/tools/llvm-mca/RISCV/SiFiveP600/rvv/fma.test
A llvm/test/tools/llvm-mca/RISCV/SiFiveP600/rvv/fp.test
A llvm/test/tools/llvm-mca/RISCV/SiFiveP600/rvv/mask.test
A llvm/test/tools/llvm-mca/RISCV/SiFiveP600/rvv/minmax.test
A llvm/test/tools/llvm-mca/RISCV/SiFiveP600/rvv/mul-div.test
A llvm/test/tools/llvm-mca/RISCV/SiFiveP600/rvv/permutation.test
A llvm/test/tools/llvm-mca/RISCV/SiFiveP600/rvv/reduction.test
A llvm/test/tools/llvm-mca/RISCV/SiFiveP600/rvv/vle-vse-vlm.test
A llvm/test/tools/llvm-mca/RISCV/SiFiveP600/rvv/vlse-vsse.test
A llvm/test/tools/llvm-mca/RISCV/SiFiveP600/rvv/vlseg-vsseg.test
A llvm/test/tools/llvm-mca/RISCV/SiFiveP600/rvv/vlxe-vsxe.test
A llvm/test/tools/llvm-mca/RISCV/SiFiveP600/rvv/zvbb.s
A llvm/test/tools/llvm-mca/RISCV/SiFiveP600/rvv/zvbc.test
A llvm/test/tools/llvm-mca/RISCV/SiFiveP600/rvv/zvkg.s
A llvm/test/tools/llvm-mca/RISCV/SiFiveP600/rvv/zvkned.s
A llvm/test/tools/llvm-mca/RISCV/SiFiveP600/rvv/zvknhb.s
A llvm/test/tools/llvm-mca/RISCV/SiFiveP600/rvv/zvksed.s
A llvm/test/tools/llvm-mca/RISCV/SiFiveP600/rvv/zvksh.s
R llvm/test/tools/llvm-mca/RISCV/SiFiveP600/vle-vse-vlm.s
R llvm/test/tools/llvm-mca/RISCV/SiFiveP600/vlse-vsse.s
R llvm/test/tools/llvm-mca/RISCV/SiFiveP600/vlseg-vsseg.s
R llvm/test/tools/llvm-mca/RISCV/SiFiveP600/vlxe-vsxe.s
R llvm/test/tools/llvm-mca/RISCV/SiFiveP600/vmv.s
A llvm/test/tools/llvm-mca/RISCV/SiFiveP600/zba.test
A llvm/test/tools/llvm-mca/RISCV/SiFiveP600/zbb.test
A llvm/test/tools/llvm-mca/RISCV/SiFiveP600/zbs.test
A llvm/test/tools/llvm-mca/RISCV/SiFiveP600/zfhmin.test
R llvm/test/tools/llvm-mca/RISCV/SiFiveP600/zvbb.s
R llvm/test/tools/llvm-mca/RISCV/SiFiveP600/zvbc.s
R llvm/test/tools/llvm-mca/RISCV/SiFiveP600/zvkg.s
R llvm/test/tools/llvm-mca/RISCV/SiFiveP600/zvkned.s
R llvm/test/tools/llvm-mca/RISCV/SiFiveP600/zvknhb.s
R llvm/test/tools/llvm-mca/RISCV/SiFiveP600/zvksed.s
R llvm/test/tools/llvm-mca/RISCV/SiFiveP600/zvksh.s
Log Message:
-----------
[RISCV][MCA] Update sifive-p670 tests to consume input files instead (#189785)
Use the new input file system for `sifive-p670`'s llvm-mca tests. Some
of the vector crypto extension tests are left intact, due to the lack of
corresponding input files, and moved under the `rvv` sub-directory.
Commit: c794742bd7f41c80b764b58019258cafd87f4a6a
https://github.com/llvm/llvm-project/commit/c794742bd7f41c80b764b58019258cafd87f4a6a
Author: Zhen Wang <zhenw at nvidia.com>
Date: 2026-04-01 (Wed, 01 Apr 2026)
Changed paths:
M flang-rt/lib/cuda/registration.cpp
M flang/include/flang/Evaluate/tools.h
M flang/include/flang/Runtime/CUDA/registration.h
M flang/lib/Optimizer/CodeGen/CodeGen.cpp
M flang/lib/Optimizer/Transforms/CUDA/CUFAddConstructor.cpp
M flang/lib/Optimizer/Transforms/CUDA/CUFOpConversionLate.cpp
M flang/test/Fir/CUDA/cuda-code-gen.mlir
M flang/test/Fir/CUDA/cuda-constructor-2.f90
M flang/test/Fir/CUDA/cuda-device-address.mlir
M flang/test/Lower/CUDA/cuda-data-transfer.cuf
Log Message:
-----------
[flang][cuda] Support non-allocatable module-level managed variables (#189753)
Add support for non-allocatable module-level CUDA managed variables
using pointer indirection through a companion global in
__nv_managed_data__. The CUDA runtime populates this pointer with the
unified memory address via __cudaRegisterManagedVar and
__cudaInitModule.
- Create a .managed.ptr companion global in the __nv_managed_data__
section and register it with _FortranACUFRegisterManagedVariable
- Call __cudaInitModule once after all variables are registered, only
when non-allocatable managed globals are present, to populate managed
pointers
- Annotate managed globals in gpu.module with nvvm.managed for PTX
.attribute(.managed) generation
- Suppress cuf.data_transfer for assignments to/from non-allocatable
module managed variables, since cudaMemcpy would target the shadow
address rather than the actual unified memory
- Preserve cuf.data_transfer for device_var = managed_var assignments
where explicit transfer is still required
Note: This PR depends on
[#189751](https://github.com/llvm/llvm-project/pull/189751) (MLIR:
nvvm.managed attribute).
Commit: e5d57ce707e388219f0341002b8d8c908095bad1
https://github.com/llvm/llvm-project/commit/e5d57ce707e388219f0341002b8d8c908095bad1
Author: Arthur Eubanks <aeubanks at google.com>
Date: 2026-04-01 (Wed, 01 Apr 2026)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/SemaObjC.cpp
R clang/test/Sema/gh183974.c
Log Message:
-----------
Revert "[Clang] Fix assertion when __block is used on global variables in C mode" (#190018)
Reverts llvm/llvm-project#183988
Breaks ObjC code, see
https://github.com/llvm/llvm-project/pull/183988#issuecomment-4134934748
Commit: 35ceec6a785f623b0e7f20b46297a2509c4a4e5b
https://github.com/llvm/llvm-project/commit/35ceec6a785f623b0e7f20b46297a2509c4a4e5b
Author: lntue <lntue at google.com>
Date: 2026-04-01 (Wed, 01 Apr 2026)
Changed paths:
M libc/cmake/modules/LLVMLibCCompileOptionRules.cmake
M libc/config/config.json
M libc/config/gpu/config.json
M libc/src/__support/CMakeLists.txt
M libc/src/__support/time/CMakeLists.txt
M libc/src/time/linux/CMakeLists.txt
M libc/src/unistd/CMakeLists.txt
M libc/test/UnitTest/CMakeLists.txt
M libc/test/UnitTest/TestLogger.cpp
Log Message:
-----------
[libc] Finetune libc.src.__support.OSUtil.osutil dependency. (#189501)
Several key targets unconditionally depend on `OSUtil.osutil` target,
causing errors when it is unnecessarily linked, or not available. This
PR fine-tuning the dependency on `OSUtil.osutil` to cleanly decouple
those targets, and gracefully skip targets that need `osutil`. Main
changes include:
* Make `LIBC_COPT_USE_C_ASSERT` to a cmake config, allowing
`LIBC_ASSERT` to use system's `assert` and not depending on `osutil`.
* Adjust cmake dependency for the following targets:
- libc.src.__support.libc_assert
- libc.src.__support.time.*
- libc.src.time.linux.*
- libc.src.unistd.*
- LibcTest
* Give an option for `TestLogger` to use system's `fprintf` instead of
`osutil`.
Commit: 150aa6f2d385d9c1ffa378e16595d7a738f921fc
https://github.com/llvm/llvm-project/commit/150aa6f2d385d9c1ffa378e16595d7a738f921fc
Author: Nishant Patel <nishant.b.patel at intel.com>
Date: 2026-04-01 (Wed, 01 Apr 2026)
Changed paths:
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUSgToWiDistributeExperimental.cpp
M mlir/test/Dialect/XeGPU/sg-to-wi-experimental-unit.mlir
Log Message:
-----------
[MLIR][XeGPU] Add support for convert layout with scalar in Sg to WI distribution (#189721)
Commit: 34028294e49b732c15c75e3b812f3868e6a89da8
https://github.com/llvm/llvm-project/commit/34028294e49b732c15c75e3b812f3868e6a89da8
Author: Leandro Lacerda <leandrolcampos at yahoo.com.br>
Date: 2026-04-01 (Wed, 01 Apr 2026)
Changed paths:
M offload/include/Shared/RefCnt.h
M offload/liboffload/API/Event.td
M offload/liboffload/src/OffloadImpl.cpp
M offload/plugins-nextgen/amdgpu/dynamic_hsa/hsa.cpp
M offload/plugins-nextgen/amdgpu/dynamic_hsa/hsa.h
M offload/plugins-nextgen/amdgpu/dynamic_hsa/hsa_ext_amd.h
M offload/plugins-nextgen/amdgpu/src/rtl.cpp
M offload/plugins-nextgen/common/include/PluginInterface.h
M offload/plugins-nextgen/common/src/PluginInterface.cpp
M offload/plugins-nextgen/cuda/dynamic_cuda/cuda.cpp
M offload/plugins-nextgen/cuda/dynamic_cuda/cuda.h
M offload/plugins-nextgen/cuda/src/rtl.cpp
M offload/plugins-nextgen/host/src/rtl.cpp
M offload/plugins-nextgen/level_zero/include/L0Device.h
M offload/unittests/OffloadAPI/CMakeLists.txt
A offload/unittests/OffloadAPI/event/olGetEventElapsedTime.cpp
Log Message:
-----------
[Offload] Add support for measuring elapsed time between events (#186856)
This patch adds `olGetEventElapsedTime` to the new LLVM Offload API, as
requested in
[#185728](https://github.com/llvm/llvm-project/issues/185728), and adds
the corresponding support in `plugins-nextgen`.
A main motivation for this change is to make it possible to measure the
elapsed time of work submitted to a queue, especially kernel launches.
This is relevant to the intended use of the new Offload API for
microbenchmarking GPU libc math functions.
### Summary
The new API returns the elapsed time, in milliseconds, between two
events on the same device.
To support the common pattern `create start event → enqueue kernel →
create end event → sync end event → get elapsed time`, `olCreateEvent`
now always creates and records a backend event through the device
interface. For backends that materialize real event state, this gives
the event concrete backend state that can be used for elapsed-time
measurement. For backends that do not materialize backend event state,
`EventInfo` may still remain null and existing event operations continue
to treat such events as trivially complete.
Previously, an event created on an empty queue could be represented only
as a logical event. That representation was sufficient for sync and
completion queries, but it was not suitable for elapsed-time measurement
because there was no backend event state to timestamp. The new behavior
preserves the meaning of completion of prior work while also allowing
backends with timing support to attach real event state.
### Changes in `plugins-nextgen`
#### Common interface
Add elapsed-time support to the common device and plugin interfaces:
* `GenericPluginTy::get_event_elapsed_time`
* `GenericDeviceTy::getEventElapsedTime`
* `GenericDeviceTy::getEventElapsedTimeImpl`
#### AMDGPU
* Add the required ROCr declarations and wrappers.
* Enable queue profiling at queue creation time.
* Record events by enqueuing a real barrier marker packet on the stream.
* Retain the timing signal needed to query the recorded marker later.
* Implement `getEventElapsedTimeImpl` using
`hsa_amd_profiling_get_dispatch_time`, converting the result to
milliseconds with `HSA_SYSTEM_INFO_TIMESTAMP_FREQUENCY`.
This follows the ROCm/HIP approach of enabling queue profiling at HSA
queue creation time, while keeping the AMDGPU queue path simpler than
the lazy-enable alternative discussed during review.
#### CUDA
* Add the required CUDA driver declarations and wrappers.
* Implement `getEventElapsedTimeImpl` with `cuEventElapsedTime`.
#### Host
* Add `getEventElapsedTimeImpl` that stores `0.0f` in the output
pointer, when present, and returns success.
Reason: the host plugin does not materialize backend event state and
already treats event operations as trivially successful. Returning
`0.0f` preserves that model without introducing a new failure mode.
#### Level Zero
* Add `getEventElapsedTimeImpl`, but leave it unimplemented.
Reason: the Level Zero plugin currently does not provide standalone
backend event support for this event model. For example, `waitEventImpl`
/ `syncEventImpl` are still unimplemented there.
---------
Signed-off-by: Leandro Augusto Lacerda Campos <leandrolcampos at yahoo.com.br>
Signed-off-by: Leandro A. Lacerda Campos <leandrolcampos at yahoo.com.br>
Commit: 75333a09818147f72387a6f93e3248595ab88048
https://github.com/llvm/llvm-project/commit/75333a09818147f72387a6f93e3248595ab88048
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-04-01 (Wed, 01 Apr 2026)
Changed paths:
M libc/CMakeLists.txt
A libc/shared/CMakeLists.txt
Log Message:
-----------
[libc] Install the RPC headers so they can be used without LLVM source (#189996)
Summary:
The RPC headers are completely freestanding and can be installed and
used. This just places them in the standard compiler install directory
along with everything else. We put it under `shared/` so the usage
matches with using the upstream version. People using the installed
version will need to manuall `-isystem` into the include directory, but
this is part for the course for these LLVM extra headers.
Commit: 8ea475fdf923619760108a2109cc4dcee8041942
https://github.com/llvm/llvm-project/commit/8ea475fdf923619760108a2109cc4dcee8041942
Author: Jan Svoboda <jan_svoboda at apple.com>
Date: 2026-04-01 (Wed, 01 Apr 2026)
Changed paths:
M clang/include/clang/Serialization/ModuleCache.h
M clang/lib/DependencyScanning/InProcessModuleCache.cpp
M clang/lib/Serialization/ModuleCache.cpp
M clang/lib/Serialization/ModuleManager.cpp
Log Message:
-----------
[clang] Introduce `ModuleCache::read()` (#188876)
This PR introduces new `ModuleCache` API for reading PCM files. This
makes it so that we don't go through the `FileManager` and VFS, which is
problematic downstream. We interpose a VFS that unintentionally shuffles
implicitly-built modules in and out of the CAS database, leading to some
unnecessary storage and runtime overhead. Moreover, this (together with
a reading API) will enable adding a caching layer into the
`InProcessModuleCache` implementation, hopefully reducing IO cost.
Commit: 873d6bc3b415f1c2d942bbf4e4219c4bdcd4f2f8
https://github.com/llvm/llvm-project/commit/873d6bc3b415f1c2d942bbf4e4219c4bdcd4f2f8
Author: Marco Elver <elver at google.com>
Date: 2026-04-01 (Wed, 01 Apr 2026)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Analysis/ThreadSafety.cpp
M clang/test/SemaCXX/warn-thread-safety-analysis.cpp
Log Message:
-----------
Thread Safety Analysis: Drop call-based alias invalidation (#187691)
Local variables passed by non-const pointer or reference to a function
were previously invalidated in the LocalVariableMap (VarMapBuilder), on
the assumption that the callee might change what they point to. This
caused false positives when the function also carries ACQUIRE/RELEASE
annotations: handleCall translates those annotations with the pre-call
context, while subsequent guard checks use the post-invalidation
context, producing an expansion mismatch and a spurious warning.
The invalidation rules were a heuristic with significant complexity
(including a special-case carve-out for std::bind/bind_front) and
unclear benefit. Instead of adding more heuristics, drop the
alias-invalidation rules entirely.
Discussion: https://github.com/llvm/llvm-project/pull/183640
Commit: 09c4d8ce0f9b9125d53340b7f9b7a5b0cf70f866
https://github.com/llvm/llvm-project/commit/09c4d8ce0f9b9125d53340b7f9b7a5b0cf70f866
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-04-01 (Wed, 01 Apr 2026)
Changed paths:
M clang/lib/CodeGen/CGCall.cpp
A clang/test/CodeGenCXX/dead-on-return-deleting-destructor.cpp
M clang/test/CodeGenCXX/microsoft-vector-deleting-dtors2.cpp
M clang/test/CodeGenCXX/ptrauth-apple-kext-indirect-virtual-dtor-call.cpp
Log Message:
-----------
[Clang] Fix miscompile with custom operator delete (#190017)
See discussion in #183347.
Added a separate test case rather than reusing
destructor-dead-on-return.cpp as we need to test functionality of the
deleting destructor which update_cc_test_checks.py does not add check
lines for.
Commit: 934438ad86fcd623e100a74ddfe7f05e829a5497
https://github.com/llvm/llvm-project/commit/934438ad86fcd623e100a74ddfe7f05e829a5497
Author: Ramkumar Ramachandra <artagnon at tenstorrent.com>
Date: 2026-04-01 (Wed, 01 Apr 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanPatternMatch.h
Log Message:
-----------
[VPlanPatternMatch] Unify and clarify m_Isa (NFC) (#189941)
Commit: 95a76886c1b5da2af87bb28541d34def63a98d82
https://github.com/llvm/llvm-project/commit/95a76886c1b5da2af87bb28541d34def63a98d82
Author: Jeff Sandoval <jeffreysandoval at users.noreply.github.com>
Date: 2026-04-01 (Wed, 01 Apr 2026)
Changed paths:
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
M mlir/test/Target/LLVMIR/omptarget-teams-distribute-reduction-array-descriptor.mlir
Log Message:
-----------
[OpenMP][MLIR] Fix GPU teams reduction buffer size for by-ref reductions (#185460)
The `ReductionDataSize` field in `KernelEnvironmentTy` and the
`MaxDataSize` used to compute the `reduce_data_size` argument to
`__kmpc_nvptx_teams_reduce_nowait_v2` were both computed using pointer
types for by-ref reductions instead of the actual element types. This
caused the global teams reduction buffer to be undersized relative to
the offsets used by the copy/reduce callbacks, resulting in
out-of-bounds accesses faults at runtime.
For example, a by-ref reduction over `[4 x i32]` (16 bytes) would
allocate buffer slots based on `sizeof(ptr)` = 8 bytes, but the
generated callbacks would access 16 bytes per slot.
Fix both computation sites:
1. In MLIR's `getReductionDataSize()`, use
`DeclareReductionOp::getByrefElementType()` instead of `getType()` when
the reduction is by-ref, so the reduction buffer struct layout (and more
importantly its size) matches that emitted by the `OMPIRBuilder`.
2. In `OMPIRBuilder::createReductionsGPU()`, use
`ReductionInfo::ByRefElementType` instead of `ElementType` for by-ref
reductions when computing `MaxDataSize`. It seems that `MaxDataSize`
isn't actually used in the deviceRTL, but it's better to fix it to avoid
future propagation of this bug.
Finally, add CHECK lines to the existing array-descriptor reduction test
to verify both the kernel environment `ReductionDataSize` and the
`reduce_data_size` call argument reflect the actual element type size.
Assisted-by: Claude Opus 4.6
---------
Co-authored-by: Jeffrey Sandoval <jeffrey.sandoval at hpe.com>
Commit: 75c6f4791c8c1031e5ab170a9987c4d300026e1e
https://github.com/llvm/llvm-project/commit/75c6f4791c8c1031e5ab170a9987c4d300026e1e
Author: Jan Svoboda <jan_svoboda at apple.com>
Date: 2026-04-01 (Wed, 01 Apr 2026)
Changed paths:
M clang/include/clang/Basic/DiagnosticCommonKinds.td
M clang/include/clang/Frontend/CompilerInstance.h
M clang/include/clang/Frontend/FrontendActions.h
M clang/include/clang/Serialization/ModuleCache.h
M clang/lib/DependencyScanning/InProcessModuleCache.cpp
M clang/lib/Frontend/CompilerInstance.cpp
M clang/lib/Frontend/FrontendActions.cpp
M clang/lib/Serialization/ModuleCache.cpp
Log Message:
-----------
[clang] Introduce `ModuleCache::write()` (#188877)
This introduces new `ModuleCache` interface for writing PCM files.
Together with #188876, this will enable adding a caching layer into the
`InProcessModuleCache` implementation, hopefully reducing IO cost.
Moreover, this makes it super explicit that the PCM is written before
its timestamp, which is an important invariant that we've broken before.
Commit: 401ba6df84f66885fdf68d4d1fb52b422c338b89
https://github.com/llvm/llvm-project/commit/401ba6df84f66885fdf68d4d1fb52b422c338b89
Author: Jianhui Li <jian.hui.li at intel.com>
Date: 2026-04-01 (Wed, 01 Apr 2026)
Changed paths:
M mlir/include/mlir/Dialect/XeGPU/IR/XeGPUOps.td
M mlir/include/mlir/Dialect/XeGPU/IR/XeGPUTypes.td
M mlir/include/mlir/Dialect/XeGPU/Transforms/XeGPULayoutImpl.h
M mlir/lib/Dialect/XeGPU/Transforms/XeGPULayoutImpl.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUPropagateLayout.cpp
M mlir/test/Dialect/XeGPU/propagate-layout-subgroup.mlir
M mlir/test/Dialect/XeGPU/propagate-layout.mlir
Log Message:
-----------
[MLIR][XeGPU] Add Layout Propagation support for multi-reduction/reduction op with scalar result (#189133)
This PR add Layout Propagation support for multi-reduction/reduction op
with scalar result:
1) Enhance setupMultiReductionResultLayout() and
LayoutInfoPropagation::visitVectorMultiReductionOp() to support scalar
result
2) Add propagation support for vector.reduction op at the lane level,
since the op is only introduced at the lane level.
Commit: 84f23eb3113f2e75d1a2e45db1b5c570a5d2f4c5
https://github.com/llvm/llvm-project/commit/84f23eb3113f2e75d1a2e45db1b5c570a5d2f4c5
Author: Jan Patrick Lehr <JanPatrick.Lehr at amd.com>
Date: 2026-04-01 (Wed, 01 Apr 2026)
Changed paths:
M libc/cmake/modules/LLVMLibCCompileOptionRules.cmake
M libc/config/config.json
M libc/config/gpu/config.json
M libc/src/__support/CMakeLists.txt
M libc/src/__support/time/CMakeLists.txt
M libc/src/time/linux/CMakeLists.txt
M libc/src/unistd/CMakeLists.txt
M libc/test/UnitTest/CMakeLists.txt
M libc/test/UnitTest/TestLogger.cpp
Log Message:
-----------
Revert "[libc] Finetune libc.src.__support.OSUtil.osutil dependency." (#190033)
Reverts llvm/llvm-project#189501
Buildbot failure on libc for GPU buildbots
Commit: 791e68a6ad48201daff91ad7083803c1393395bd
https://github.com/llvm/llvm-project/commit/791e68a6ad48201daff91ad7083803c1393395bd
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-04-01 (Wed, 01 Apr 2026)
Changed paths:
M llvm/test/CodeGen/MLRegAlloc/Inputs/reference-log-noml.txt
M llvm/test/CodeGen/MLRegAlloc/Inputs/reference-prio-log-noml.txt
M llvm/test/CodeGen/MLRegAlloc/dev-mode-logging.ll
M llvm/test/CodeGen/MLRegAlloc/dev-mode-prio-logging.ll
Log Message:
-----------
[MLGO] Update regalloc tests after c245d764b8bd70ff78044f56b2dea619b0… (#190025)
…d428dc
This caused some codegen changes that caused different calculations in
places. Update the tests to adapat to the changes.
Commit: c5f67a0128a928af609b68e3b7d695037e306a84
https://github.com/llvm/llvm-project/commit/c5f67a0128a928af609b68e3b7d695037e306a84
Author: Ehsan Amiri <ehsan.amiri at huawei.com>
Date: 2026-04-01 (Wed, 01 Apr 2026)
Changed paths:
M llvm/lib/Analysis/DependenceAnalysis.cpp
Log Message:
-----------
[DA] Perform `nsw` check for SIV AddRecs earlier (NFCI) (#189740)
The repetitive code at the start of each SIV test can be factored out to
`testSIV` function
Commit: a89c778a8b4639bc2efc3dfde5a10e1db4a9e9d5
https://github.com/llvm/llvm-project/commit/a89c778a8b4639bc2efc3dfde5a10e1db4a9e9d5
Author: Tharun V K <40231849+tharunvk at users.noreply.github.com>
Date: 2026-04-01 (Wed, 01 Apr 2026)
Changed paths:
M clang/docs/ClangFormatStyleOptions.rst
M clang/include/clang/Format/Format.h
M clang/lib/Format/Format.cpp
M clang/lib/Format/FormatToken.h
M clang/lib/Format/TokenAnnotator.cpp
M clang/lib/Format/UnwrappedLineParser.cpp
M clang/unittests/Format/ConfigParseTest.cpp
M clang/unittests/Format/FormatTest.cpp
M clang/unittests/Format/TokenAnnotatorTest.cpp
Log Message:
-----------
[clang-format] Add SpaceBeforeEnumUnderlyingTypeColon for enum underlying types (#189011)
Introduce a new formatting option to control spacing before enum
underlying type colons. This preserves existing behavior while
allowing independent control from inheritance colon spacing.
Previously, enum underlying type colons were not configurable.
Fixes #188734
---------
Co-authored-by: Tharun V K <Tharun.V.K at ibm.com>
Commit: 4e76a7959493b97e6881f476278d43d1c67406ef
https://github.com/llvm/llvm-project/commit/4e76a7959493b97e6881f476278d43d1c67406ef
Author: Eugene Shalygin <eugene.shalygin at gmail.com>
Date: 2026-04-01 (Wed, 01 Apr 2026)
Changed paths:
M clang/lib/Format/ContinuationIndenter.cpp
M clang/unittests/Format/FormatTest.cpp
Log Message:
-----------
[clang-format] fix aligning inheritance lists and binary operator operands with UT_AlignWithSpaces (#189218)
fix aligning inheritance lists with UT_AlignWithSpaces
fix aligning binary operator operands
---------
Co-authored-by: Eugene Shalygin <e.shalygin at abberior-instruments.com>
Commit: 2b87d02b035b97940474d0b3b27f3dcdb8934623
https://github.com/llvm/llvm-project/commit/2b87d02b035b97940474d0b3b27f3dcdb8934623
Author: Thorsten Klein <thorsten.klein at bshg.com>
Date: 2026-04-01 (Wed, 01 Apr 2026)
Changed paths:
M clang-tools-extra/clang-tidy/tool/run-clang-tidy.py
Log Message:
-----------
[clang-tidy] Properly escape printed clang-tidy command in `run-clang-tidy.py` (#189974)
The `run-clang-tidy.py` script now uses `shlex.join()` to construct the
command string for printing.
This ensures that arguments containing shell metacharacters, such as the
asterisk in `--warnings-as-errors=*`, are correctly quoted. This allows
the command to be safely copied and pasted into any shell for manual
execution, fixing errors previously seen with shells like `fish` that
are strict about wildcard expansion.
Before:
```
[ 1/15][0.2s] /usr/bin/clang-tidy -p=/home/user/work/project/build --warnings-as-errors=* /home/user/work/project/src/main.cpp
```
Note: When running this command in fish shell you get some error like
`fish: No matches for wildcard '--warnings-as-errors=*'. See `help
wildcards-globbing``
After:
```
[ 1/15][0.2s] /usr/bin/clang-tidy -p=/home/user/work/project/build '--warnings-as-errors=*' /home/user/work/project/src/main.cpp
```
Commit: d6d0876d1a9aa4364a9f684d3923253bd626e767
https://github.com/llvm/llvm-project/commit/d6d0876d1a9aa4364a9f684d3923253bd626e767
Author: zGoldthorpe <Zach.Goldthorpe at amd.com>
Date: 2026-04-01 (Wed, 01 Apr 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
Log Message:
-----------
[NFC][SelectionDAG] Refactor out common default `DemandedElts` calculation (#190031)
Deduplicating the repeated pattern
```cpp
APInt DemandedElts = VT.isFixedLengthVector()
? APInt::getAllOnes(VT.getVectorNumElements())
: APInt(1, 1);
```
in SelectionDAG.
Commit: 9f500046511e6e85345d9229bb2d4d2e627bb9d4
https://github.com/llvm/llvm-project/commit/9f500046511e6e85345d9229bb2d4d2e627bb9d4
Author: Nishant Patel <nishant.b.patel at intel.com>
Date: 2026-04-01 (Wed, 01 Apr 2026)
Changed paths:
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUPeepHoleOptimizer.cpp
M mlir/test/Dialect/XeGPU/peephole-optimize.mlir
Log Message:
-----------
[MLIR][XeGPU] Enhance the peephole optimization to remove the convert_layout after multi-reduction rewrite (#188849)
Commit: b75bf1e722b8dfeabe41074819786d7540f7466e
https://github.com/llvm/llvm-project/commit/b75bf1e722b8dfeabe41074819786d7540f7466e
Author: Marco Elver <elver at google.com>
Date: 2026-04-01 (Wed, 01 Apr 2026)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Analysis/ThreadSafety.cpp
M clang/test/SemaCXX/warn-thread-safety-analysis.cpp
Log Message:
-----------
Revert "Thread Safety Analysis: Drop call-based alias invalidation (#187691)" (#190041)
This reverts commit 873d6bc3b415f1c2d942bbf4e4219c4bdcd4f2f8.
This causes Linux kernel build to fail because it relied on
alias-invalidation in kernel/core/sched.c.
Commit: 478a6abc0ceea812c9486d13fda4afbe876c670f
https://github.com/llvm/llvm-project/commit/478a6abc0ceea812c9486d13fda4afbe876c670f
Author: Med Ismail Bennani <ismail at bennani.ma>
Date: 2026-04-01 (Wed, 01 Apr 2026)
Changed paths:
M lldb/packages/Python/lldbsuite/test/make/Makefile.rules
Log Message:
-----------
[lldb/test] Codesign executables built with custom Makefile rules (#189902)
Tests with custom a.out targets in their Makefile (i.e.
`TestBSDArchives.py`) bypass the standard Makefile.rules linking step
where `CODESIGN` is applied. This leaves the binary unsigned, causing
the process to get kill it on remote darwin devices.
This adds a codesigning step to the all target in Makefile.rules that
signs both $(EXE) and a.out if they exist. This ensures all test
binaries are signed regardless of how they were built.
rdar://173840592
Signed-off-by: Med Ismail Bennani <ismail at bennani.ma>
Commit: 6c923741c1278348b257856ecf480124894997ba
https://github.com/llvm/llvm-project/commit/6c923741c1278348b257856ecf480124894997ba
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-04-01 (Wed, 01 Apr 2026)
Changed paths:
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/test/Transforms/Attributor/AMDGPU/nofpclass-amdgcn-fract.ll
Log Message:
-----------
ValueTracking: llvm.amdgcn.fract cannot introduce overflow (#189002)
This returns a value with an absolute value less than 1.
Commit: c6669c4993ee591e2414e3190cc8f0d623c1357a
https://github.com/llvm/llvm-project/commit/c6669c4993ee591e2414e3190cc8f0d623c1357a
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-04-01 (Wed, 01 Apr 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/AArch64/fma-conversion-multi-use-guard.ll
Log Message:
-----------
[SLP] Guard FMulAdd conversion to require single-use/non-reordered FMul operands
The FMulAdd (CombinedVectorize) transformation in transformNodes() marks
an FMul child entry with zero cost, assuming it is fully absorbed into
the fmuladd intrinsic. However, when any FMul scalar has multiple uses
(e.g., also stored separately), the FMul must survive as a separate
node.
Reviewers: hiraditya, RKSimon, bababuck
Pull Request: https://github.com/llvm/llvm-project/pull/189692
Commit: a9df7c71866d379ea8bdd88c14bafcce90553add
https://github.com/llvm/llvm-project/commit/a9df7c71866d379ea8bdd88c14bafcce90553add
Author: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
Date: 2026-04-01 (Wed, 01 Apr 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstructions.td
M llvm/test/CodeGen/AMDGPU/bf16-math.ll
Log Message:
-----------
[AMDGPU] True16 support for bf16 clamp pattern on gfx1250 (#190036)
Commit: 7d24b175ebe20b427dddbee5bf0e77bd7d0657f6
https://github.com/llvm/llvm-project/commit/7d24b175ebe20b427dddbee5bf0e77bd7d0657f6
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-04-01 (Wed, 01 Apr 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVOptWInstrs.cpp
M llvm/test/CodeGen/RISCV/opt-w-instrs-p-ext.mir
Log Message:
-----------
[RISCV] Add SATI_RV64/USATI_RV64 to RISCVOptWInstrs. (#190030)
Note the immediates for these 2 instructions in their MachineInstr
representations both use the type width. The SATI_RV64 binary encoding
and the RISCVISD::SATI encoding uses the type width minus one.
Assisted-by: Claude Sonnet 4.5
Commit: 1a1fbf967addf3a1d7837a8f75fb3414daa34e73
https://github.com/llvm/llvm-project/commit/1a1fbf967addf3a1d7837a8f75fb3414daa34e73
Author: Jianhui Li <jian.hui.li at intel.com>
Date: 2026-04-01 (Wed, 01 Apr 2026)
Changed paths:
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUWgToSgDistribute.cpp
M mlir/test/Dialect/XeGPU/xegpu-wg-to-sg-rr.mlir
M mlir/test/Dialect/XeGPU/xegpu-wg-to-sg-unify-ops-rr.mlir
Log Message:
-----------
[MLIR][XeGPU] Support round-robin layout for constant and broadcast in wg-to-sg distribution (#189798)
As title.
Commit: b3ca423a78ec436936834170cd8b96a25d3f8b7e
https://github.com/llvm/llvm-project/commit/b3ca423a78ec436936834170cd8b96a25d3f8b7e
Author: Nishant Patel <nishant.b.patel at intel.com>
Date: 2026-04-01 (Wed, 01 Apr 2026)
Changed paths:
M mlir/lib/Dialect/Vector/Transforms/VectorUnroll.cpp
M mlir/test/Dialect/Vector/vector-unroll-options.mlir
Log Message:
-----------
[MLIR][Vector] Enhance vector.multi_reduction unrolling to handle scalar result (#188633)
Previously, UnrollMultiReductionPattern bailed out when all the
dimensions were reduced to a scalar. This PR adds support for this case
by tiling the source vector and chaining partial reductions through the
accumulator operand.
Commit: e5a7a9a95ffda04e4ce2398d1950662873b8cd65
https://github.com/llvm/llvm-project/commit/e5a7a9a95ffda04e4ce2398d1950662873b8cd65
Author: Prabhu Rajasekaran <prabhukr at google.com>
Date: 2026-04-01 (Wed, 01 Apr 2026)
Changed paths:
M clang/cmake/caches/Fuchsia-stage2.cmake
Log Message:
-----------
[Fuchsia] Cortex-m33 runtime libraries hard float ABI (#190023)
Make cortex-m33 runtime libraries build to use hard float ABI instead of
softfp.
Commit: e87ea848b7a00f8b020ff02c74a2f09e63b7c735
https://github.com/llvm/llvm-project/commit/e87ea848b7a00f8b020ff02c74a2f09e63b7c735
Author: lntue <lntue at google.com>
Date: 2026-04-01 (Wed, 01 Apr 2026)
Changed paths:
M libc/cmake/modules/LLVMLibCCompileOptionRules.cmake
M libc/config/config.json
M libc/src/__support/CMakeLists.txt
M libc/src/__support/time/CMakeLists.txt
M libc/src/assert/gpu/__assert_fail.cpp
M libc/src/time/linux/CMakeLists.txt
M libc/src/unistd/CMakeLists.txt
M libc/test/UnitTest/CMakeLists.txt
M libc/test/UnitTest/TestLogger.cpp
Log Message:
-----------
Reapply "[libc] Finetune libc.src.__support.OSUtil.osutil dependency." (#190033) (#190065)
This reverts commit 84f23eb3113f2e75d1a2e45db1b5c570a5d2f4c5 and fix GPU
builds.
Commit: 52fb23eef8e4c331ae7cfa21e26d07918cfebd5e
https://github.com/llvm/llvm-project/commit/52fb23eef8e4c331ae7cfa21e26d07918cfebd5e
Author: Zorojuro <sawantsukumar at gmail.com>
Date: 2026-04-01 (Wed, 01 Apr 2026)
Changed paths:
M libc/src/__support/math/log1pf.h
Log Message:
-----------
[libc][math] Remove static from log1pf implementation (#190042)
Reflecting changes according to
https://github.com/llvm/llvm-project/commit/823e3e001724ca2e93ce410a675f3b538f8a74b3
Commit: 4d8f738e316b8415a4c34d9ba2cbe0948433e747
https://github.com/llvm/llvm-project/commit/4d8f738e316b8415a4c34d9ba2cbe0948433e747
Author: Ziqing Luo <ziqing_luo at apple.com>
Date: 2026-04-01 (Wed, 01 Apr 2026)
Changed paths:
M .ci/green-dragon/lldb-ubuntu.groovy
M .ci/premerge_advisor_explain.py
M .github/new-prs-labeler.yml
A .github/workflows/libc-shared-tests.yml
M .github/workflows/libcxx-build-containers.yml
M .mailmap
M bolt/lib/Passes/LongJmp.cpp
M bolt/test/AArch64/compare-and-branch-reorder-blocks.S
M clang-tools-extra/clang-tidy/ClangTidy.cpp
M clang-tools-extra/clang-tidy/bugprone/IncDecInConditionsCheck.cpp
M clang-tools-extra/clang-tidy/bugprone/ReservedIdentifierCheck.cpp
M clang-tools-extra/clang-tidy/cppcoreguidelines/ProBoundsAvoidUncheckedContainerAccessCheck.cpp
M clang-tools-extra/clang-tidy/cppcoreguidelines/RvalueReferenceParamNotMovedCheck.cpp
M clang-tools-extra/clang-tidy/misc/ConfusableTable/BuildConfusableTable.cpp
M clang-tools-extra/clang-tidy/misc/IncludeCleanerCheck.cpp
M clang-tools-extra/clang-tidy/modernize/LoopConvertCheck.cpp
M clang-tools-extra/clang-tidy/modernize/UseStdPrintCheck.cpp
M clang-tools-extra/clang-tidy/performance/CMakeLists.txt
R clang-tools-extra/clang-tidy/performance/FasterStringFindCheck.cpp
R clang-tools-extra/clang-tidy/performance/FasterStringFindCheck.h
M clang-tools-extra/clang-tidy/performance/PerformanceTidyModule.cpp
A clang-tools-extra/clang-tidy/performance/PreferSingleCharOverloadsCheck.cpp
A clang-tools-extra/clang-tidy/performance/PreferSingleCharOverloadsCheck.h
M clang-tools-extra/clang-tidy/readability/IdentifierNamingCheck.cpp
M clang-tools-extra/clang-tidy/readability/ImplicitBoolConversionCheck.cpp
M clang-tools-extra/clang-tidy/readability/ImplicitBoolConversionCheck.h
M clang-tools-extra/clang-tidy/readability/IsolateDeclarationCheck.cpp
M clang-tools-extra/clang-tidy/readability/UseStdMinMaxCheck.cpp
M clang-tools-extra/clang-tidy/tool/run-clang-tidy.py
M clang-tools-extra/clang-tidy/utils/Matchers.h
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/docs/clang-tidy/Contributing.rst
M clang-tools-extra/docs/clang-tidy/checks/list.rst
M clang-tools-extra/docs/clang-tidy/checks/performance/faster-string-find.rst
A clang-tools-extra/docs/clang-tidy/checks/performance/prefer-single-char-overloads.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/implicit-bool-conversion.rst
A clang-tools-extra/test/clang-doc/Inputs/enum.cpp
M clang-tools-extra/test/clang-doc/enum.cpp
R clang-tools-extra/test/clang-doc/json/enum.cpp
M clang-tools-extra/test/clang-tidy/checkers/android/cloexec-accept.cpp
M clang-tools-extra/test/clang-tidy/checkers/android/cloexec-accept4.cpp
M clang-tools-extra/test/clang-tidy/checkers/android/cloexec-memfd-create.cpp
M clang-tools-extra/test/clang-tidy/checkers/android/cloexec-pipe2.cpp
M clang-tools-extra/test/clang-tidy/checkers/bugprone/inc-dec-in-conditions.cpp
M clang-tools-extra/test/clang-tidy/checkers/bugprone/posix-return.cpp
M clang-tools-extra/test/clang-tidy/checkers/bugprone/spuriously-wake-up-functions.c
M clang-tools-extra/test/clang-tidy/checkers/bugprone/spuriously-wake-up-functions.cpp
M clang-tools-extra/test/clang-tidy/checkers/cppcoreguidelines/rvalue-reference-param-not-moved.cpp
M clang-tools-extra/test/clang-tidy/checkers/modernize/redundant-void-arg.c
M clang-tools-extra/test/clang-tidy/checkers/modernize/redundant-void-arg.cpp
M clang-tools-extra/test/clang-tidy/checkers/modernize/use-nullptr-basic.cpp
M clang-tools-extra/test/clang-tidy/checkers/modernize/use-nullptr-c23.c
M clang-tools-extra/test/clang-tidy/checkers/modernize/use-nullptr.c
M clang-tools-extra/test/clang-tidy/checkers/modernize/use-nullptr.cpp
A clang-tools-extra/test/clang-tidy/checkers/modernize/use-std-print-macro.cpp
R clang-tools-extra/test/clang-tidy/checkers/performance/faster-string-find.cpp
A clang-tools-extra/test/clang-tidy/checkers/performance/prefer-single-char-overloads.cpp
M clang-tools-extra/test/clang-tidy/checkers/readability/delete-null-pointer.cpp
A clang-tools-extra/test/clang-tidy/checkers/readability/implicit-bool-conversion-allow-logical-operators.c
M clang-tools-extra/test/clang-tidy/checkers/readability/implicit-bool-conversion.c
M clang-tools-extra/test/clang-tidy/checkers/readability/implicit-bool-conversion.cpp
M clang-tools-extra/test/clang-tidy/checkers/readability/isolate-declaration.cpp
M clang-tools-extra/test/clang-tidy/checkers/readability/redundant-smartptr-get-msvc.cpp
M clang-tools-extra/test/clang-tidy/checkers/readability/redundant-smartptr-get.cpp
M clang-tools-extra/unittests/clang-tidy/CMakeLists.txt
R clang-tools-extra/unittests/clang-tidy/ObjCModuleTest.cpp
M clang/Maintainers.md
M clang/bindings/python/clang/cindex.py
M clang/bindings/python/tests/cindex/test_version.py
M clang/cmake/caches/Fuchsia-stage2.cmake
M clang/docs/ClangFormatStyleOptions.rst
M clang/docs/ClangIRCleanupAndEHDesign.md
M clang/docs/LanguageExtensions.rst
M clang/docs/OpenMPSupport.rst
M clang/docs/ReleaseNotes.rst
M clang/docs/analyzer/developer-docs/PerformanceInvestigation.rst
M clang/include/clang/AST/ASTContext.h
M clang/include/clang/AST/Mangle.h
M clang/include/clang/Analysis/Analyses/LifetimeSafety/Facts.h
M clang/include/clang/Analysis/Analyses/LifetimeSafety/FactsGenerator.h
M clang/include/clang/Analysis/Analyses/LifetimeSafety/Origins.h
M clang/include/clang/Basic/AMDGPUTypes.def
M clang/include/clang/Basic/AttrDocs.td
M clang/include/clang/Basic/Builtins.def
M clang/include/clang/Basic/Builtins.td
M clang/include/clang/Basic/BuiltinsAMDGPU.td
M clang/include/clang/Basic/BuiltinsX86.td
M clang/include/clang/Basic/CodeGenOptions.def
M clang/include/clang/Basic/DiagnosticCommonKinds.td
M clang/include/clang/Basic/DiagnosticFrontendKinds.td
M clang/include/clang/Basic/DiagnosticGroups.td
M clang/include/clang/Basic/DiagnosticLexKinds.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Basic/Module.h
M clang/include/clang/Basic/OffloadArch.h
M clang/include/clang/CIR/Dialect/IR/CIRAttrs.td
M clang/include/clang/CIR/Dialect/IR/CIRCUDAAttrs.td
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/include/clang/CIR/Dialect/IR/CIRTypes.td
A clang/include/clang/CIR/Dialect/OpenMP/RegisterOpenMPExtensions.h
M clang/include/clang/CIR/MissingFeatures.h
M clang/include/clang/CodeGen/CodeGenABITypes.h
M clang/include/clang/CrossTU/CrossTranslationUnit.h
M clang/include/clang/Driver/CommonArgs.h
M clang/include/clang/Driver/Driver.h
M clang/include/clang/Driver/SyclInstallationDetector.h
M clang/include/clang/Driver/ToolChain.h
M clang/include/clang/Format/Format.h
M clang/include/clang/Frontend/ASTUnit.h
M clang/include/clang/Frontend/CompilerInstance.h
M clang/include/clang/Frontend/FrontendActions.h
M clang/include/clang/Options/Options.td
A clang/include/clang/ScalableStaticAnalysisFramework/Analyses/CallGraph/CallGraphSummary.h
M clang/include/clang/ScalableStaticAnalysisFramework/SSAFBuiltinForceLinker.h
M clang/include/clang/Sema/ExternalSemaSource.h
M clang/include/clang/Sema/MultiplexExternalSemaSource.h
M clang/include/clang/Sema/Sema.h
M clang/include/clang/Sema/SemaAMDGPU.h
M clang/include/clang/Sema/TypoCorrection.h
M clang/include/clang/Serialization/ASTBitCodes.h
M clang/include/clang/Serialization/ASTReader.h
M clang/include/clang/Serialization/ASTWriter.h
M clang/include/clang/Serialization/ModuleCache.h
M clang/include/clang/Serialization/ModuleFile.h
M clang/include/clang/Serialization/ModuleManager.h
M clang/include/clang/Support/RISCVVIntrinsicUtils.h
M clang/lib/AST/ASTContext.cpp
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ByteCode/Compiler.h
M clang/lib/AST/ByteCode/Disasm.cpp
M clang/lib/AST/ByteCode/EvalEmitter.cpp
M clang/lib/AST/ByteCode/Interp.cpp
M clang/lib/AST/ByteCode/Interp.h
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
M clang/lib/AST/ByteCode/InterpState.h
M clang/lib/AST/ByteCode/Opcodes.td
M clang/lib/AST/ByteCode/Program.cpp
M clang/lib/AST/ByteCode/Program.h
M clang/lib/AST/ByteCode/Record.h
M clang/lib/AST/DeclTemplate.cpp
M clang/lib/AST/ExprCXX.cpp
M clang/lib/AST/ItaniumMangle.cpp
M clang/lib/AST/Mangle.cpp
M clang/lib/AST/MicrosoftMangle.cpp
M clang/lib/AST/Type.cpp
M clang/lib/Analysis/CFG.cpp
M clang/lib/Analysis/LifetimeSafety/FactsGenerator.cpp
M clang/lib/Analysis/LifetimeSafety/Origins.cpp
M clang/lib/Analysis/LiveVariables.cpp
M clang/lib/Analysis/UnsafeBufferUsage.cpp
M clang/lib/Basic/OffloadArch.cpp
M clang/lib/Basic/Targets/AMDGPU.cpp
M clang/lib/Basic/Targets/AMDGPU.h
M clang/lib/Basic/Targets/SPIR.cpp
M clang/lib/Basic/Targets/SPIR.h
M clang/lib/CIR/CodeGen/CIRGenAtomic.cpp
M clang/lib/CIR/CodeGen/CIRGenBuilder.h
M clang/lib/CIR/CodeGen/CIRGenBuiltin.cpp
M clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp
M clang/lib/CIR/CodeGen/CIRGenBuiltinRISCV.cpp
M clang/lib/CIR/CodeGen/CIRGenCXXABI.h
M clang/lib/CIR/CodeGen/CIRGenClass.cpp
M clang/lib/CIR/CodeGen/CIRGenCleanup.cpp
M clang/lib/CIR/CodeGen/CIRGenCleanup.h
M clang/lib/CIR/CodeGen/CIRGenExpr.cpp
M clang/lib/CIR/CodeGen/CIRGenExprConstant.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
M clang/lib/CIR/CodeGen/CIRGenItaniumCXXABI.cpp
M clang/lib/CIR/CodeGen/CIRGenModule.cpp
M clang/lib/CIR/CodeGen/CIRGenStmt.cpp
M clang/lib/CIR/CodeGen/CIRGenTypes.cpp
M clang/lib/CIR/CodeGen/CIRGenerator.cpp
M clang/lib/CIR/CodeGen/CMakeLists.txt
M clang/lib/CIR/CodeGen/TargetInfo.cpp
M clang/lib/CIR/CodeGen/TargetInfo.h
A clang/lib/CIR/CodeGen/Targets/AMDGPU.cpp
M clang/lib/CIR/Dialect/CMakeLists.txt
M clang/lib/CIR/Dialect/IR/CIRAttrs.cpp
M clang/lib/CIR/Dialect/IR/CIRTypes.cpp
A clang/lib/CIR/Dialect/OpenMP/CMakeLists.txt
A clang/lib/CIR/Dialect/OpenMP/RegisterOpenMPExtensions.cpp
M clang/lib/CIR/Dialect/Transforms/CMakeLists.txt
M clang/lib/CIR/Dialect/Transforms/CXXABILowering.cpp
M clang/lib/CIR/Dialect/Transforms/EHABILowering.cpp
M clang/lib/CIR/Dialect/Transforms/FlattenCFG.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/CMakeLists.txt
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVMIR.cpp
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/CodeGen/CGCall.cpp
M clang/lib/CodeGen/CGCleanup.cpp
M clang/lib/CodeGen/CGDebugInfo.cpp
M clang/lib/CodeGen/CGDecl.cpp
M clang/lib/CodeGen/CGException.cpp
M clang/lib/CodeGen/CGExprScalar.cpp
M clang/lib/CodeGen/CGHLSLBuiltins.cpp
M clang/lib/CodeGen/CGHLSLRuntime.cpp
M clang/lib/CodeGen/CGHLSLRuntime.h
M clang/lib/CodeGen/CGObjC.cpp
M clang/lib/CodeGen/CGObjCMac.cpp
M clang/lib/CodeGen/CGObjCRuntime.cpp
M clang/lib/CodeGen/CGObjCRuntime.h
M clang/lib/CodeGen/CGOpenMPRuntime.cpp
M clang/lib/CodeGen/CGOpenMPRuntimeGPU.cpp
M clang/lib/CodeGen/CGStmt.cpp
M clang/lib/CodeGen/CodeGenAction.cpp
M clang/lib/CodeGen/CodeGenFunction.cpp
M clang/lib/CodeGen/CodeGenFunction.h
M clang/lib/CodeGen/CodeGenModule.cpp
M clang/lib/CodeGen/CodeGenModule.h
M clang/lib/CodeGen/CodeGenTypes.cpp
M clang/lib/CodeGen/TargetBuiltins/AMDGPU.cpp
M clang/lib/CodeGen/Targets/RISCV.cpp
M clang/lib/CrossTU/CrossTranslationUnit.cpp
M clang/lib/DependencyScanning/DependencyScannerImpl.cpp
M clang/lib/DependencyScanning/InProcessModuleCache.cpp
M clang/lib/Driver/CMakeLists.txt
M clang/lib/Driver/Driver.cpp
M clang/lib/Driver/ToolChain.cpp
M clang/lib/Driver/ToolChains/BareMetal.cpp
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/Driver/ToolChains/CommonArgs.cpp
M clang/lib/Driver/ToolChains/Flang.cpp
M clang/lib/Driver/ToolChains/Fuchsia.cpp
M clang/lib/Driver/ToolChains/Hexagon.cpp
M clang/lib/Driver/ToolChains/Linux.cpp
M clang/lib/Driver/ToolChains/SYCL.cpp
M clang/lib/ExtractAPI/ExtractAPIConsumer.cpp
M clang/lib/Format/ContinuationIndenter.cpp
M clang/lib/Format/Format.cpp
M clang/lib/Format/FormatToken.h
M clang/lib/Format/QualifierAlignmentFixer.cpp
M clang/lib/Format/QualifierAlignmentFixer.h
M clang/lib/Format/TokenAnnotator.cpp
M clang/lib/Format/UnwrappedLineFormatter.cpp
M clang/lib/Format/UnwrappedLineParser.cpp
M clang/lib/Frontend/ASTUnit.cpp
M clang/lib/Frontend/CompilerInstance.cpp
M clang/lib/Frontend/DependencyFile.cpp
M clang/lib/Frontend/FrontendAction.cpp
M clang/lib/Frontend/FrontendActions.cpp
M clang/lib/Frontend/InterfaceStubFunctionsConsumer.cpp
M clang/lib/Frontend/Rewrite/FrontendActions.cpp
M clang/lib/FrontendTool/CMakeLists.txt
M clang/lib/Headers/CMakeLists.txt
A clang/lib/Headers/__clang_spirv_libdevice_declares.h
M clang/lib/Headers/avx512bwintrin.h
M clang/lib/Headers/avx512fintrin.h
M clang/lib/Headers/avx512vlbwintrin.h
M clang/lib/Headers/avx512vlintrin.h
M clang/lib/Headers/emmintrin.h
M clang/lib/Headers/gpuintrin.h
M clang/lib/Headers/hlsl/hlsl_alias_intrinsics.h
M clang/lib/Headers/nvptxintrin.h
M clang/lib/Headers/openmp_wrappers/__clang_openmp_device_functions.h
M clang/lib/Interpreter/Interpreter.cpp
M clang/lib/Interpreter/InterpreterUtils.cpp
M clang/lib/Interpreter/OrcIncrementalExecutor.cpp
M clang/lib/Lex/PPDirectives.cpp
M clang/lib/Lex/TokenLexer.cpp
M clang/lib/Parse/ParseDeclCXX.cpp
M clang/lib/ScalableStaticAnalysisFramework/Analyses/CMakeLists.txt
A clang/lib/ScalableStaticAnalysisFramework/Analyses/CallGraph/CallGraphExtractor.cpp
M clang/lib/Sema/HLSLBuiltinTypeDeclBuilder.cpp
M clang/lib/Sema/HLSLBuiltinTypeDeclBuilder.h
M clang/lib/Sema/HLSLExternalSemaSource.cpp
M clang/lib/Sema/JumpDiagnostics.cpp
M clang/lib/Sema/MultiplexExternalSemaSource.cpp
M clang/lib/Sema/Sema.cpp
M clang/lib/Sema/SemaAMDGPU.cpp
M clang/lib/Sema/SemaCXXScopeSpec.cpp
M clang/lib/Sema/SemaCast.cpp
M clang/lib/Sema/SemaChecking.cpp
M clang/lib/Sema/SemaDecl.cpp
M clang/lib/Sema/SemaDeclCXX.cpp
M clang/lib/Sema/SemaExpr.cpp
M clang/lib/Sema/SemaFunctionEffects.cpp
M clang/lib/Sema/SemaHLSL.cpp
M clang/lib/Sema/SemaInit.cpp
M clang/lib/Sema/SemaLookup.cpp
M clang/lib/Sema/SemaObjC.cpp
M clang/lib/Sema/SemaOpenACC.cpp
M clang/lib/Sema/SemaOverload.cpp
M clang/lib/Sema/SemaTemplate.cpp
M clang/lib/Serialization/ASTReader.cpp
M clang/lib/Serialization/ASTReaderStmt.cpp
M clang/lib/Serialization/ASTWriter.cpp
M clang/lib/Serialization/ASTWriterDecl.cpp
M clang/lib/Serialization/ASTWriterStmt.cpp
M clang/lib/Serialization/GlobalModuleIndex.cpp
M clang/lib/Serialization/ModuleCache.cpp
M clang/lib/Serialization/ModuleManager.cpp
M clang/lib/StaticAnalyzer/Checkers/CStringChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/CheckSecuritySyntaxOnly.cpp
M clang/lib/StaticAnalyzer/Checkers/IvarInvalidationChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/MallocChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/NSErrorChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/NullabilityChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/PthreadLockChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/StackAddrEscapeChecker.cpp
M clang/lib/StaticAnalyzer/Core/CallEvent.cpp
M clang/lib/StaticAnalyzer/Frontend/AnalysisConsumer.cpp
M clang/lib/Support/RISCVVIntrinsicUtils.cpp
M clang/test/AST/ByteCode/builtins.c
M clang/test/AST/ByteCode/c.c
M clang/test/AST/ByteCode/codegen-constexpr-unknown.cpp
M clang/test/AST/ByteCode/cxx26.cpp
M clang/test/AST/ByteCode/records.cpp
A clang/test/ASTMerge/generic-selection-expr/Inputs/generic-type.c
A clang/test/ASTMerge/generic-selection-expr/test-type.c
R clang/test/Analysis/Inputs/ctu-chain.cpp
R clang/test/Analysis/Inputs/ctu-cxxdefaultinitexpr-import.cpp
R clang/test/Analysis/Inputs/ctu-cxxdefaultinitexpr-import.cpp.externalDefMap.ast-dump.txt
R clang/test/Analysis/Inputs/ctu-import.c
R clang/test/Analysis/Inputs/ctu-import.c.externalDefMap.ast-dump.txt
R clang/test/Analysis/Inputs/ctu-inherited-default-ctor-other.cpp
R clang/test/Analysis/Inputs/ctu-lookup-name-with-space.cpp
R clang/test/Analysis/Inputs/ctu-onego-existingdef-other.cpp
R clang/test/Analysis/Inputs/ctu-onego-existingdef-other.cpp.externalDefMap.ast-dump.txt
R clang/test/Analysis/Inputs/ctu-onego-indirect-other.cpp
R clang/test/Analysis/Inputs/ctu-onego-indirect-other.cpp.externalDefMap.ast-dump.txt
R clang/test/Analysis/Inputs/ctu-onego-small-other.cpp
R clang/test/Analysis/Inputs/ctu-onego-small-other.cpp.externalDefMap.ast-dump.txt
R clang/test/Analysis/Inputs/ctu-onego-toplevel-other.cpp
R clang/test/Analysis/Inputs/ctu-onego-toplevel-other.cpp.externalDefMap.ast-dump.txt
R clang/test/Analysis/Inputs/ctu-other.c
R clang/test/Analysis/Inputs/ctu-other.c.externalDefMap.ast-dump.txt
R clang/test/Analysis/Inputs/ctu-other.cpp
R clang/test/Analysis/Inputs/ctu-other.cpp.externalDefMap.ast-dump.txt
R clang/test/Analysis/Inputs/ctu-test-import-failure-import.cpp
R clang/test/Analysis/Inputs/ctu-test-import-failure-import.cpp.externalDefMap.ast-dump.txt
M clang/test/Analysis/bstring.cpp
R clang/test/Analysis/ctu-cxxdefaultinitexpr.cpp
R clang/test/Analysis/ctu-different-triples.cpp
R clang/test/Analysis/ctu-hdr.h
R clang/test/Analysis/ctu-implicit.c
R clang/test/Analysis/ctu-import-threshold.c
R clang/test/Analysis/ctu-import-type-decl-definition.c
R clang/test/Analysis/ctu-inherited-default-ctor.cpp
R clang/test/Analysis/ctu-lookup-name-with-space.cpp
R clang/test/Analysis/ctu-main.c
R clang/test/Analysis/ctu-main.cpp
R clang/test/Analysis/ctu-on-demand-parsing.c
R clang/test/Analysis/ctu-on-demand-parsing.cpp
R clang/test/Analysis/ctu-onego-existingdef.cpp
R clang/test/Analysis/ctu-onego-indirect.cpp
R clang/test/Analysis/ctu-onego-small.cpp
R clang/test/Analysis/ctu-onego-toplevel.cpp
R clang/test/Analysis/ctu-test-import-failure.cpp
R clang/test/Analysis/ctu-unknown-parts-in-triples.cpp
A clang/test/Analysis/ctu/Inputs/chain.cpp
A clang/test/Analysis/ctu/Inputs/cxxdefaultinitexpr-import.cpp
A clang/test/Analysis/ctu/Inputs/cxxdefaultinitexpr-import.cpp.externalDefMap.ast-dump.txt
A clang/test/Analysis/ctu/Inputs/import.c
A clang/test/Analysis/ctu/Inputs/import.c.externalDefMap.ast-dump.txt
A clang/test/Analysis/ctu/Inputs/inherited-default-ctor-other.cpp
A clang/test/Analysis/ctu/Inputs/invalid-ast-other.cpp
A clang/test/Analysis/ctu/Inputs/invalid-ast-other.cpp.externalDefMap.ast-dump.txt
A clang/test/Analysis/ctu/Inputs/lookup-name-with-space.cpp
A clang/test/Analysis/ctu/Inputs/missing-ast.cpp.externalDefMap.ast-dump.txt
A clang/test/Analysis/ctu/Inputs/onego-existingdef-other.cpp
A clang/test/Analysis/ctu/Inputs/onego-existingdef-other.cpp.externalDefMap.ast-dump.txt
A clang/test/Analysis/ctu/Inputs/onego-indirect-other.cpp
A clang/test/Analysis/ctu/Inputs/onego-indirect-other.cpp.externalDefMap.ast-dump.txt
A clang/test/Analysis/ctu/Inputs/onego-small-other.cpp
A clang/test/Analysis/ctu/Inputs/onego-small-other.cpp.externalDefMap.ast-dump.txt
A clang/test/Analysis/ctu/Inputs/onego-toplevel-other.cpp
A clang/test/Analysis/ctu/Inputs/onego-toplevel-other.cpp.externalDefMap.ast-dump.txt
A clang/test/Analysis/ctu/Inputs/other.c
A clang/test/Analysis/ctu/Inputs/other.c.externalDefMap.ast-dump.txt
A clang/test/Analysis/ctu/Inputs/other.cpp
A clang/test/Analysis/ctu/Inputs/other.cpp.externalDefMap.ast-dump.txt
A clang/test/Analysis/ctu/Inputs/test-import-failure-import.cpp
A clang/test/Analysis/ctu/Inputs/test-import-failure-import.cpp.externalDefMap.ast-dump.txt
A clang/test/Analysis/ctu/cxxdefaultinitexpr.cpp
A clang/test/Analysis/ctu/diag/Inputs/bar.cpp
A clang/test/Analysis/ctu/diag/Inputs/simple-extern-c.cpp
A clang/test/Analysis/ctu/diag/Inputs/simple.cpp
A clang/test/Analysis/ctu/diag/invalid-index.cpp
A clang/test/Analysis/ctu/diag/invlist-ambiguous.cpp
A clang/test/Analysis/ctu/diag/invlist-empty.cpp
A clang/test/Analysis/ctu/diag/invlist-lookup-miss.cpp
A clang/test/Analysis/ctu/diag/invlist-missing.cpp
A clang/test/Analysis/ctu/diag/invlist-wrong-format.cpp
A clang/test/Analysis/ctu/diag/lang-dialect-mismatch.cpp
A clang/test/Analysis/ctu/diag/lang-mismatch.c
A clang/test/Analysis/ctu/diag/load-threshold.cpp
A clang/test/Analysis/ctu/diag/missing-index.cpp
A clang/test/Analysis/ctu/different-triples.cpp
A clang/test/Analysis/ctu/hdr.h
A clang/test/Analysis/ctu/implicit.c
A clang/test/Analysis/ctu/import-threshold.c
A clang/test/Analysis/ctu/import-type-decl-definition.c
A clang/test/Analysis/ctu/inherited-default-ctor.cpp
A clang/test/Analysis/ctu/invalid-ast.cpp
A clang/test/Analysis/ctu/lookup-name-with-space.cpp
A clang/test/Analysis/ctu/main.c
A clang/test/Analysis/ctu/main.cpp
A clang/test/Analysis/ctu/missing-ast.cpp
A clang/test/Analysis/ctu/on-demand-parsing.c
A clang/test/Analysis/ctu/on-demand-parsing.cpp
A clang/test/Analysis/ctu/onego-existingdef.cpp
A clang/test/Analysis/ctu/onego-indirect.cpp
A clang/test/Analysis/ctu/onego-small.cpp
A clang/test/Analysis/ctu/onego-toplevel.cpp
A clang/test/Analysis/ctu/test-import-failure.cpp
A clang/test/Analysis/ctu/unknown-parts-in-triples.cpp
M clang/test/CIR/CodeGen/atomic-scoped.c
M clang/test/CIR/CodeGen/atomic.c
A clang/test/CIR/CodeGen/cleanup-throwing-dtor.cpp
M clang/test/CIR/CodeGen/clear-cache.c
A clang/test/CIR/CodeGen/ctor-alias-prev-decl.cpp
A clang/test/CIR/CodeGen/delegating-ctor-exceptions.cpp
A clang/test/CIR/CodeGen/dtor-alias-prev-decl.cpp
A clang/test/CIR/CodeGen/new-delete-deactivation.cpp
M clang/test/CIR/CodeGen/nonzeroinit-struct.cpp
A clang/test/CIR/CodeGen/return-in-if-with-cleanups.cpp
M clang/test/CIR/CodeGen/throws.cpp
M clang/test/CIR/CodeGen/try-catch.cpp
A clang/test/CIR/CodeGenBuiltins/RISCV/riscv-zihintpause.c
M clang/test/CIR/CodeGenCXX/global-refs.cpp
A clang/test/CIR/CodeGenHIP/amdgpu-attrs.hip
A clang/test/CIR/CodeGenOpenMP/omp-module-attrs.c
M clang/test/CIR/IR/atomic.cir
A clang/test/CIR/IR/string-trailing-zeros.cir
A clang/test/CIR/Transforms/cxx-abi-lowering-attrs.cir
M clang/test/CIR/Transforms/eh-abi-lowering-itanium.cir
M clang/test/CIR/Transforms/flatten-cleanup-scope-nyi.cir
A clang/test/CIR/Transforms/flatten-throwing-in-cleanup.cir
A clang/test/CIR/Transforms/omp-mark-declare-target.cir
M clang/test/CXX/module/module.interface/p1.cpp
A clang/test/ClangScanDeps/p1689-suppress-warnings-no-eol.cppm
M clang/test/ClangScanDeps/prebuilt-modules-in-stable-dirs.c
M clang/test/CodeGen/AArch64/bf16-getset-intrinsics.c
M clang/test/CodeGen/AArch64/neon-intrinsics.c
M clang/test/CodeGen/AArch64/neon/bf16-getset.c
M clang/test/CodeGen/AArch64/neon/intrinsics.c
R clang/test/CodeGen/PowerPC/builtins-ppc-error.c
R clang/test/CodeGen/PowerPC/builtins-ppc-p10vector-error.c
R clang/test/CodeGen/PowerPC/builtins-ppc-xlcompat-cas-error.c
R clang/test/CodeGen/PowerPC/builtins-ppc-xlcompat-error.c
R clang/test/CodeGen/PowerPC/builtins-ppc-xlcompat-fetch-error.c
R clang/test/CodeGen/PowerPC/builtins-ppc-xlcompat-pwr9-error.c
R clang/test/CodeGen/PowerPC/builtins-ppc-xlcompat-pwr9-warning.c
R clang/test/CodeGen/PowerPC/builtins-ppc-xlcompat-vec-error.c
A clang/test/CodeGen/RISCV/riscv-fpcc-struct.c
M clang/test/CodeGen/RISCV/riscv64-abi.c
M clang/test/CodeGen/X86/avx512bw-builtins.c
M clang/test/CodeGen/X86/avx512f-builtins.c
M clang/test/CodeGen/X86/avx512vl-builtins.c
M clang/test/CodeGen/X86/avx512vlbw-builtins.c
A clang/test/CodeGen/amdgpu-builtin-is-invocable.c
A clang/test/CodeGen/amdgpu-builtin-processor-is.c
A clang/test/CodeGen/amdgpu-feature-builtins-invalid-use.cpp
A clang/test/CodeGen/async-exceptions.c
M clang/test/CodeGen/builtins-x86.c
M clang/test/CodeGen/clear_cache.c
M clang/test/CodeGen/overflow-behavior-types.c
A clang/test/CodeGen/tbaa-matrix.c
A clang/test/CodeGen/ubsan-aggregate-null-align.c
M clang/test/CodeGenCUDA/builtins-spirv-amdgcn.cu
M clang/test/CodeGenCUDA/fp-contract.cu
A clang/test/CodeGenCXX/bad-codegen-for-constexpr-structured-bindings.cpp
M clang/test/CodeGenCXX/cfi-icall.cpp
M clang/test/CodeGenCXX/const-init-cxx11.cpp
A clang/test/CodeGenCXX/dead-on-return-deleting-destructor.cpp
M clang/test/CodeGenCXX/destructor-dead-on-return.cpp
M clang/test/CodeGenCXX/mangle-ms.cpp
M clang/test/CodeGenCXX/microsoft-vector-deleting-dtors.cpp
M clang/test/CodeGenCXX/microsoft-vector-deleting-dtors2.cpp
M clang/test/CodeGenCXX/ms-vdtors-devirtualization.cpp
M clang/test/CodeGenCXX/ptrauth-apple-kext-indirect-virtual-dtor-call.cpp
M clang/test/CodeGenCXX/reference-temporary-ms.cpp
A clang/test/CodeGenCXX/reference-temporary-mutable.cpp
A clang/test/CodeGenCXX/reference-temporary-subobject.cpp
M clang/test/CodeGenCXX/static-local-in-local-class.cpp
M clang/test/CodeGenCXX/temporaries.cpp
A clang/test/CodeGenHIP/amdgcnspirv-visibility.cpp
M clang/test/CodeGenHIP/builtins-amdgcn-gfx1250-wmma-f16.hip
M clang/test/CodeGenHIP/spirv-amdgcn-dpp-const-fold.hip
M clang/test/CodeGenHLSL/BasicFeatures/InitLists.hlsl
A clang/test/CodeGenHLSL/builtins/GroupMemoryBarrier.hlsl
A clang/test/CodeGenHLSL/builtins/fma.hlsl
R clang/test/CodeGenHLSL/debug/source-language.hlsl
M clang/test/CodeGenHLSL/resources/Texture2D-Gather.hlsl
A clang/test/CodeGenHLSL/resources/Texture2D-Mips.hlsl
M clang/test/CodeGenHLSL/resources/Texture2D-Sample.hlsl
M clang/test/CodeGenHLSL/resources/Texture2D-SampleBias.hlsl
M clang/test/CodeGenHLSL/resources/Texture2D-SampleCmp.hlsl
M clang/test/CodeGenHLSL/resources/Texture2D-SampleGrad.hlsl
M clang/test/CodeGenHLSL/resources/Texture2D-SampleLevel.hlsl
M clang/test/CodeGenHLSL/resources/Texture2D-default-explicit-binding.hlsl
M clang/test/CodeGenHLSL/resources/Texture2D-default.hlsl
M clang/test/CodeGenHLSL/resources/Texture2D-shorthand-contexts.hlsl
M clang/test/CodeGenObjC/constant-string-class-1.m
M clang/test/CodeGenObjC/direct-method-ret-mismatch.m
A clang/test/CodeGenObjC/expose-direct-method-linkedlist.m
A clang/test/CodeGenObjC/expose-direct-method-varargs.m
A clang/test/CodeGenObjC/expose-direct-method-visibility-linkage.m
A clang/test/CodeGenObjC/expose-direct-method.m
M clang/test/CodeGenObjC/no-nsconstant-literals.m
M clang/test/CodeGenObjC/objc2-constant-collection-literals.m
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx10.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx11.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx1250-wmma-w32.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-vi.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn.cl
A clang/test/Driver/Inputs/SYCL/libLLVMSYCL.ll
R clang/test/Driver/Inputs/SYCL/libsycl.ll
M clang/test/Driver/aarch64-fixed-x-register.c
M clang/test/Driver/amdgpu-macros.cl
M clang/test/Driver/amdgpu-mcpu.cl
M clang/test/Driver/hexagon-toolchain-elf.c
M clang/test/Driver/hip-binding.hip
M clang/test/Driver/hip-phases.hip
M clang/test/Driver/link-device-code.test
M clang/test/Driver/linux-ld.c
M clang/test/Driver/print-supported-extensions-riscv.c
M clang/test/Driver/pseudo-probe.c
M clang/test/Driver/sycl-offload-jit.cpp
A clang/test/FixIt/fixit-defaulted-comparison.cpp
A clang/test/Format/dont-crash-on-nul.cpp
A clang/test/Frontend/backend-attribute-inlining-cross-tu.c
A clang/test/Frontend/backend-attribute-inlining-debug-vs-heuristic.cpp
A clang/test/Frontend/backend-attribute-inlining-modes.c
A clang/test/Frontend/backend-attribute-inlining.c
M clang/test/Frontend/fixed_point_sub_const.c
M clang/test/Headers/Inputs/include/stdint.h
M clang/test/Headers/gpuintrin.c
M clang/test/Headers/gpuintrin_lang.c
M clang/test/Interpreter/pretty-print.c
M clang/test/Lexer/gnu-flags.c
A clang/test/Lexer/gnu-zero-variadic-macro-argument-fixit.c
M clang/test/Misc/target-invalid-cpu-note/amdgcn.c
M clang/test/Misc/target-invalid-cpu-note/nvptx.c
A clang/test/Modules/pr189415.cppm
M clang/test/OpenMP/for_reduction_codegen_UDR.cpp
M clang/test/OpenMP/target_update_codegen.cpp
M clang/test/OpenMP/target_update_count_expression_codegen.c
M clang/test/OpenMP/target_update_variable_stride_codegen.c
A clang/test/PCH/pragma-redefine-extname.c
A clang/test/PCH/pragma-redefine-extname.h
A clang/test/Parser/decltype-gh188014.cpp
M clang/test/Preprocessor/bpf-predefined-macros.c
M clang/test/Preprocessor/macro_fn.c
M clang/test/Preprocessor/predefined-arch-macros.c
M clang/test/Preprocessor/riscv-target-features.c
M clang/test/Sema/Inputs/lifetime-analysis.h
A clang/test/Sema/PowerPC/aix-attr-align.c
A clang/test/Sema/PowerPC/aix-attr-aligned-vector-warn.c
A clang/test/Sema/PowerPC/aix-attr-aligned-vector-warn.cpp
A clang/test/Sema/PowerPC/aix-attr-tls_model.c
A clang/test/Sema/PowerPC/aix-builtin-cpu-unsupports.c
A clang/test/Sema/PowerPC/aix-pragma-align-packed-warn.c
A clang/test/Sema/PowerPC/aix-pragma-pack-and-align.c
A clang/test/Sema/PowerPC/altivec-generic-overload.c
A clang/test/Sema/PowerPC/altivec-init.c
A clang/test/Sema/PowerPC/builtin-cpu-unsupports-AIX-Os.c
A clang/test/Sema/PowerPC/builtins-bcd-format-conversion.c
A clang/test/Sema/PowerPC/builtins-bcd-transform.c
A clang/test/Sema/PowerPC/builtins-ppc-error.c
A clang/test/Sema/PowerPC/builtins-ppc-p10vector-error.c
A clang/test/Sema/PowerPC/builtins-ppc-xlcompat-cas-error.c
A clang/test/Sema/PowerPC/builtins-ppc-xlcompat-error.c
A clang/test/Sema/PowerPC/builtins-ppc-xlcompat-fetch-error.c
A clang/test/Sema/PowerPC/builtins-ppc-xlcompat-pwr9-error.c
A clang/test/Sema/PowerPC/builtins-ppc-xlcompat-pwr9-warning.c
A clang/test/Sema/PowerPC/builtins-ppc-xlcompat-vec-error.c
A clang/test/Sema/PowerPC/builtins-ppc.c
A clang/test/Sema/PowerPC/float128-ld-incompatibility.cpp
A clang/test/Sema/PowerPC/libbuiltins-ctype-powerpc64.c
A clang/test/Sema/PowerPC/ppc-attr-target-inline.c
A clang/test/Sema/PowerPC/ppc-bool.c
A clang/test/Sema/PowerPC/ppc-dmf-types.c
A clang/test/Sema/PowerPC/ppc-pair-mma-types.c
A clang/test/Sema/PowerPC/varargs-aix.c
R clang/test/Sema/aix-attr-align.c
R clang/test/Sema/aix-attr-aligned-vector-warn.c
R clang/test/Sema/aix-attr-aligned-vector-warn.cpp
R clang/test/Sema/aix-attr-tls_model.c
R clang/test/Sema/aix-builtin-cpu-unsupports.c
R clang/test/Sema/aix-pragma-align-packed-warn.c
R clang/test/Sema/aix-pragma-pack-and-align.c
R clang/test/Sema/altivec-generic-overload.c
R clang/test/Sema/altivec-init.c
R clang/test/Sema/builtin-cpu-unsupports-AIX-Os.c
R clang/test/Sema/builtins-bcd-format-conversion.c
R clang/test/Sema/builtins-bcd-transform.c
R clang/test/Sema/builtins-ppc.c
R clang/test/Sema/float128-ld-incompatibility.cpp
R clang/test/Sema/gh183974.c
R clang/test/Sema/libbuiltins-ctype-powerpc64.c
R clang/test/Sema/ppc-attr-target-inline.c
R clang/test/Sema/ppc-bool.c
R clang/test/Sema/ppc-dmf-types.c
R clang/test/Sema/ppc-pair-mma-types.c
A clang/test/Sema/redefine_extname.cpp
R clang/test/Sema/varargs-aix.c
M clang/test/Sema/warn-lifetime-analysis-nocfg.cpp
M clang/test/Sema/warn-lifetime-safety-suggestions.cpp
M clang/test/Sema/warn-lifetime-safety.cpp
M clang/test/SemaCXX/cxx23-builtin-subscript.cpp
M clang/test/SemaCXX/cxx2b-deducing-this.cpp
M clang/test/SemaCXX/using-if-exists.cpp
A clang/test/SemaCXX/warn-unsafe-buffer-usage-default-arg-uninstantiated-crash.cpp
A clang/test/SemaHIP/amdgpu-feature-builtins-cant-jump.hip
A clang/test/SemaHIP/amdgpu-feature-builtins-return-type-deduction.hip
A clang/test/SemaHIP/amdgpu-feature-predicate.hip
A clang/test/SemaHIP/amdgpu-feature-predicates-guard-use.hip
A clang/test/SemaHIP/amdgpu-is-invocable.hip
A clang/test/SemaHIP/amdgpu-processor-is.hip
A clang/test/SemaHLSL/BuiltIns/GroupMemoryBarrier-errors.hlsl
A clang/test/SemaHLSL/BuiltIns/fma-errors.hlsl
M clang/test/SemaHLSL/Language/InitListAST.hlsl
A clang/test/SemaHLSL/Texture2D-mips-errors.hlsl
A clang/test/SemaHLSL/Types/InitListConstantExpr.hlsl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx1250-wmma-w32-param.cl
A clang/test/SemaTemplate/GH188759.cpp
A clang/test/SemaTemplate/gh183983.cpp
M clang/test/SemaTemplate/stack-exhaustion.cpp
M clang/test/utils/update_cc_test_checks/Inputs/explicit-template-instantiation.cpp.expected
M clang/tools/cir-opt/CMakeLists.txt
M clang/tools/cir-opt/cir-opt.cpp
M clang/tools/cir-translate/CMakeLists.txt
M clang/tools/cir-translate/cir-translate.cpp
M clang/tools/clang-format/ClangFormat.cpp
M clang/tools/clang-format/git-clang-format
M clang/tools/clang-linker-wrapper/ClangLinkerWrapper.cpp
M clang/tools/clang-linker-wrapper/LinkerWrapperOpts.td
M clang/tools/clang-scan-deps/ClangScanDeps.cpp
M clang/tools/clang-sycl-linker/ClangSYCLLinker.cpp
M clang/tools/driver/cc1gen_reproducer_main.cpp
M clang/tools/libclang/CXIndexDataConsumer.cpp
M clang/tools/libclang/CXIndexDataConsumer.h
M clang/tools/libclang/Indexing.cpp
A clang/unittests/Format/AlignmentTest.cpp
M clang/unittests/Format/CMakeLists.txt
M clang/unittests/Format/ConfigParseTest.cpp
M clang/unittests/Format/FormatTest.cpp
M clang/unittests/Format/QualifierFixerTest.cpp
M clang/unittests/Format/TokenAnnotatorTest.cpp
A clang/unittests/ScalableStaticAnalysisFramework/Analyses/CallGraph/CallGraphExtractorTest.cpp
M clang/unittests/ScalableStaticAnalysisFramework/CMakeLists.txt
M clang/unittests/ScalableStaticAnalysisFramework/Registries/SummaryExtractorRegistryTest.cpp
M clang/utils/TableGen/CIRLoweringEmitter.cpp
M clang/utils/TableGen/ClangBuiltinsEmitter.cpp
M clang/utils/TableGen/ClangOpcodesEmitter.cpp
M clang/www/cxx_status.html
M compiler-rt/cmake/Modules/AllSupportedArchDefs.cmake
M compiler-rt/cmake/Modules/CheckAssemblerFlag.cmake
M compiler-rt/cmake/Modules/CompilerRTUtils.cmake
M compiler-rt/include/profile/InstrProfData.inc
M compiler-rt/include/sanitizer/common_interface_defs.h
M compiler-rt/lib/asan/asan_allocator.cpp
M compiler-rt/lib/asan/asan_allocator.h
M compiler-rt/lib/asan/asan_errors.cpp
M compiler-rt/lib/asan/asan_errors.h
M compiler-rt/lib/asan/asan_flags.inc
M compiler-rt/lib/asan/asan_malloc_linux.cpp
M compiler-rt/lib/asan/asan_report.cpp
M compiler-rt/lib/asan/asan_report.h
M compiler-rt/lib/builtins/CMakeLists.txt
A compiler-rt/lib/builtins/arm/adddf3.S
A compiler-rt/lib/builtins/arm/crt_endian.h
A compiler-rt/lib/builtins/arm/dnan2.c
A compiler-rt/lib/builtins/arm/dnorm2.c
A compiler-rt/lib/builtins/arm/dunder.c
M compiler-rt/lib/builtins/cpu_model/riscv.c
M compiler-rt/lib/builtins/int_math.h
M compiler-rt/lib/builtins/muldc3.c
M compiler-rt/lib/fuzzer/CMakeLists.txt
M compiler-rt/lib/gwp_asan/common.h
M compiler-rt/lib/hwasan/hwasan_allocation_functions.cpp
M compiler-rt/lib/msan/msan.h
M compiler-rt/lib/msan/msan_allocator.cpp
M compiler-rt/lib/msan/msan_interceptors.cpp
M compiler-rt/lib/msan/msan_linux.cpp
M compiler-rt/lib/profile/CMakeLists.txt
M compiler-rt/lib/profile/InstrProfiling.h
M compiler-rt/lib/profile/InstrProfilingPlatformGPU.c
M compiler-rt/lib/profile/InstrProfilingPlatformLinux.c
M compiler-rt/lib/profile/InstrProfilingPlatformOther.c
M compiler-rt/lib/sanitizer_common/CMakeLists.txt
M compiler-rt/lib/sanitizer_common/sanitizer_internal_defs.h
M compiler-rt/lib/sanitizer_common/sanitizer_platform_interceptors.h
M compiler-rt/lib/sanitizer_common/sanitizer_platform_limits_posix.cpp
A compiler-rt/lib/sanitizer_common/sanitizer_unwind_aix.cpp
M compiler-rt/lib/scudo/standalone/combined.h
M compiler-rt/lib/scudo/standalone/common.h
M compiler-rt/lib/scudo/standalone/tests/combined_test.cpp
M compiler-rt/lib/xray/xray_hexagon.cpp
M compiler-rt/lib/xray/xray_init.cpp
M compiler-rt/lib/xray/xray_interface.cpp
M compiler-rt/lib/xray/xray_trampoline_hexagon.S
M compiler-rt/test/CMakeLists.txt
A compiler-rt/test/asan/TestCases/Linux/free_aligned_sized_mismatch.cpp
A compiler-rt/test/asan/TestCases/Linux/free_sized_mismatch.cpp
M compiler-rt/test/asan/TestCases/stack_container_dynamic_lib.c
A compiler-rt/test/builtins/Unit/adddf3new_test.c
A compiler-rt/test/builtins/Unit/subdf3new_test.c
M compiler-rt/test/sanitizer_common/TestCases/Linux/free_aligned_sized.c
M compiler-rt/test/sanitizer_common/TestCases/Linux/free_sized.c
M compiler-rt/test/sanitizer_common/TestCases/Linux/soft_rss_limit_mb_test.cpp
M cross-project-tests/debuginfo-tests/dexter-tests/memvars/const-branch.c
M cross-project-tests/debuginfo-tests/dexter-tests/nrvo.cpp
M cross-project-tests/debuginfo-tests/dexter/dex/debugger/dbgeng/dbgeng.py
M cross-project-tests/debuginfo-tests/dexter/feature_tests/commands/perfect/expect_step_kind/direction.cpp
M cross-project-tests/debuginfo-tests/llgdb-tests/forward-declare-class.cpp
M cross-project-tests/debuginfo-tests/llgdb-tests/nested-struct.cpp
M cross-project-tests/debuginfo-tests/llgdb-tests/nrvo-string.cpp
M cross-project-tests/debuginfo-tests/llgdb-tests/sret.cpp
M cross-project-tests/debuginfo-tests/llgdb-tests/static-member-2.cpp
M cross-project-tests/debuginfo-tests/llgdb-tests/static-member.cpp
M cross-project-tests/lit.cfg.py
M flang-rt/CMakeLists.txt
M flang-rt/README.md
M flang-rt/cmake/modules/AddFlangRT.cmake
M flang-rt/lib/cuda/registration.cpp
M flang-rt/lib/runtime/CMakeLists.txt
M flang-rt/lib/runtime/io-api-minimal.cpp
A flang-rt/lib/runtime/stl-overrides.cpp
A flang-rt/lib/runtime/stl-overrides.h
M flang/docs/C++style.md
M flang/docs/Extensions.md
M flang/include/flang/Evaluate/tools.h
M flang/include/flang/Frontend/CodeGenOptions.def
M flang/include/flang/Lower/OpenACC.h
M flang/include/flang/Optimizer/Dialect/FIRAttr.h
M flang/include/flang/Optimizer/Dialect/FIRAttr.td
M flang/include/flang/Optimizer/Dialect/FIRType.h
M flang/include/flang/Optimizer/OpenACC/Support/FIROpenACCTypeInterfaces.h
M flang/include/flang/Optimizer/OpenACC/Support/FIROpenACCUtils.h
M flang/include/flang/Optimizer/Passes/Pipelines.h
M flang/include/flang/Optimizer/Transforms/Passes.td
M flang/include/flang/Runtime/CUDA/registration.h
M flang/include/flang/Tools/CrossToolHelpers.h
M flang/lib/Frontend/CompilerInstance.cpp
M flang/lib/Frontend/CompilerInvocation.cpp
M flang/lib/Frontend/FrontendActions.cpp
M flang/lib/Lower/Bridge.cpp
M flang/lib/Lower/ConvertCall.cpp
M flang/lib/Lower/OpenACC.cpp
M flang/lib/Lower/OpenMP/ClauseProcessor.cpp
M flang/lib/Lower/OpenMP/DataSharingProcessor.cpp
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Optimizer/Analysis/AliasAnalysis.cpp
M flang/lib/Optimizer/Analysis/CMakeLists.txt
M flang/lib/Optimizer/CodeGen/CodeGen.cpp
M flang/lib/Optimizer/CodeGen/TargetRewrite.cpp
M flang/lib/Optimizer/Dialect/FIRType.cpp
M flang/lib/Optimizer/HLFIR/Transforms/BufferizeHLFIR.cpp
M flang/lib/Optimizer/OpenACC/Support/FIROpenACCTypeInterfaces.cpp
M flang/lib/Optimizer/OpenACC/Support/FIROpenACCUtils.cpp
M flang/lib/Optimizer/OpenMP/FunctionFiltering.cpp
M flang/lib/Optimizer/OpenMP/LowerWorkdistribute.cpp
M flang/lib/Optimizer/OpenMP/LowerWorkshare.cpp
M flang/lib/Optimizer/Passes/Pipelines.cpp
M flang/lib/Optimizer/Transforms/AddDebugInfo.cpp
M flang/lib/Optimizer/Transforms/CUDA/CUFAddConstructor.cpp
M flang/lib/Optimizer/Transforms/CUDA/CUFComputeSharedMemoryOffsetsAndSize.cpp
M flang/lib/Optimizer/Transforms/CUDA/CUFGPUToLLVMConversion.cpp
M flang/lib/Optimizer/Transforms/CUDA/CUFOpConversionLate.cpp
M flang/lib/Optimizer/Transforms/FIRToMemRef.cpp
M flang/lib/Optimizer/Transforms/FunctionAttr.cpp
M flang/lib/Optimizer/Transforms/VScaleAttr.cpp
M flang/lib/Semantics/check-directive-structure.h
M flang/lib/Semantics/check-omp-atomic.cpp
M flang/lib/Semantics/check-omp-loop.cpp
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/openmp-utils.cpp
M flang/lib/Semantics/resolve-directives.cpp
A flang/test/Analysis/AliasAnalysis/alias-analysis-acc.mlir
A flang/test/Driver/fdebug-info-for-profiling.f90
M flang/test/Fir/CUDA/cuda-code-gen.mlir
M flang/test/Fir/CUDA/cuda-constructor-2.f90
M flang/test/Fir/CUDA/cuda-device-address.mlir
M flang/test/Fir/CUDA/cuda-shared-offset.mlir
M flang/test/Fir/CUDA/cuda-shared-to-llvm.mlir
A flang/test/HLFIR/bufferize-associate-block-ordering.fir
A flang/test/Integration/debug-info-for-profiling.f90
M flang/test/Integration/unroll-loops.f90
M flang/test/Lower/CUDA/cuda-data-transfer.cuf
A flang/test/Lower/HLFIR/elemental-character-min-max.f90
M flang/test/Lower/HLFIR/unroll-loops.fir
A flang/test/Lower/Intrinsics/product-kind-10.f90
M flang/test/Lower/Intrinsics/product.f90
M flang/test/Lower/Intrinsics/random.f90
M flang/test/Lower/Intrinsics/real.f90
M flang/test/Lower/Intrinsics/repeat.f90
M flang/test/Lower/Intrinsics/reshape.f90
M flang/test/Lower/Intrinsics/same_type_as.f90
M flang/test/Lower/Intrinsics/scan.f90
M flang/test/Lower/Intrinsics/secnds.f90
M flang/test/Lower/Intrinsics/selected_int_kind.f90
M flang/test/Lower/Intrinsics/selected_real_kind.f90
A flang/test/Lower/OpenACC/Todo/acc-goto-multi-level-exit.f90
A flang/test/Lower/OpenACC/acc-data-operands-remapping-selector.f90
A flang/test/Lower/OpenACC/acc-firstprivate-optional.f90
M flang/test/Lower/OpenACC/acc-unstructured.f90
R flang/test/Lower/OpenMP/Todo/depend-clause.f90
M flang/test/Lower/OpenMP/composite_simd_linear.f90
A flang/test/Lower/OpenMP/depend-iterator.f90
M flang/test/Lower/OpenMP/distribute-parallel-do-simd.f90
M flang/test/Lower/OpenMP/distribute-simd.f90
M flang/test/Lower/OpenMP/linear_modifier.f90
M flang/test/Lower/OpenMP/loop-pointer-variable.f90
M flang/test/Lower/OpenMP/ordered-simd.f90
A flang/test/Lower/OpenMP/requires-usm.f90
M flang/test/Lower/OpenMP/wsloop-simd.f90
M flang/test/Lower/polymorphic.f90
M flang/test/Lower/select-type.f90
A flang/test/Lower/target-features-ppc.f90
M flang/test/Lower/volatile-allocatable.f90
M flang/test/Semantics/OpenACC/acc-branch.f90
M flang/test/Semantics/OpenACC/acc-parallel.f90
M flang/test/Transforms/FIRToMemRef/array-coor-slice-shift.mlir
M flang/test/Transforms/OpenMP/lower-workshare-thread-local.mlir
M flang/test/Transforms/debug-imported-entity.fir
M flang/test/Transforms/vscale-attr.fir
M libc/CMakeLists.txt
M libc/cmake/modules/LLVMLibCArchitectures.cmake
M libc/cmake/modules/LLVMLibCCompileOptionRules.cmake
M libc/cmake/modules/LLVMLibCTestRules.cmake
M libc/config/baremetal/aarch64/entrypoints.txt
M libc/config/baremetal/arm/entrypoints.txt
M libc/config/baremetal/riscv/entrypoints.txt
M libc/config/config.json
M libc/config/darwin/aarch64/entrypoints.txt
M libc/config/darwin/x86_64/entrypoints.txt
M libc/config/gpu/amdgpu/entrypoints.txt
M libc/config/gpu/amdgpu/headers.txt
M libc/config/gpu/nvptx/entrypoints.txt
M libc/config/gpu/nvptx/headers.txt
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/arm/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/config/windows/entrypoints.txt
M libc/docs/build_and_test.rst
M libc/docs/dev/implementing_a_function.rst
M libc/docs/dev/undefined_behavior.rst
M libc/docs/full_cross_build.rst
M libc/docs/headers/math/index.rst
M libc/hdr/math_function_macros.h
M libc/hdr/sys_epoll_macros.h
M libc/hdr/types/CMakeLists.txt
A libc/hdr/types/VISIT.h
M libc/hdr/types/dl_info.h
A libc/hdr/types/posix_tnode.h
A libc/hdr/types/siginfo_t.h
M libc/hdr/types/suseconds_t.h
M libc/include/CMakeLists.txt
A libc/include/cpio.yaml
R libc/include/endian.h.def
M libc/include/endian.yaml
R libc/include/features.h.def
M libc/include/features.yaml
R libc/include/float.h.def
M libc/include/float.yaml
R libc/include/limits.h.def
M libc/include/limits.yaml
M libc/include/llvm-libc-macros/pthread-macros.h
M libc/include/llvm-libc-types/CMakeLists.txt
M libc/include/llvm-libc-types/Elf32_Phdr.h
M libc/include/llvm-libc-types/Elf64_Off.h
A libc/include/llvm-libc-types/__action_closure_fn_t.h
A libc/include/llvm-libc-types/__action_fn_t.h
A libc/include/llvm-libc-types/__free_fn_t.h
A libc/include/llvm-libc-types/posix_tnode.h
M libc/include/llvm-libc-types/pthread_rwlock_t.h
R libc/include/locale.h.def
M libc/include/locale.yaml
M libc/include/math.yaml
M libc/include/search.yaml
R libc/include/stdckdint.h.def
M libc/include/stdckdint.yaml
R libc/include/stdint.h.def
M libc/include/stdint.yaml
R libc/include/sys/auxv.h.def
M libc/include/sys/auxv.yaml
R libc/include/sys/epoll.h.def
M libc/include/sys/epoll.yaml
R libc/include/sys/ioctl.h.def
M libc/include/sys/ioctl.yaml
R libc/include/sys/mman.h.def
M libc/include/sys/mman.yaml
R libc/include/sys/random.h.def
M libc/include/sys/random.yaml
R libc/include/sys/resource.h.def
M libc/include/sys/resource.yaml
R libc/include/sys/select.h.def
M libc/include/sys/select.yaml
R libc/include/sys/socket.h.def
M libc/include/sys/socket.yaml
R libc/include/sys/stat.h.def
M libc/include/sys/stat.yaml
R libc/include/sys/time.h.def
M libc/include/sys/time.yaml
R libc/include/sys/types.h.def
R libc/include/sys/wait.h.def
M libc/include/sys/wait.yaml
R libc/include/time.h.def
M libc/include/time.yaml
R libc/include/wchar.h.def
M libc/include/wchar.yaml
A libc/shared/CMakeLists.txt
M libc/shared/math.h
A libc/shared/math/asinbf16.h
A libc/shared/math/asinpi.h
M libc/shared/math/bf16addl.h
M libc/shared/math/bf16divl.h
M libc/shared/math/bf16fmal.h
M libc/shared/math/bf16mull.h
M libc/shared/math/canonicalizel.h
M libc/shared/math/ceill.h
M libc/shared/math/daddl.h
M libc/shared/math/dfmal.h
M libc/shared/math/dsqrtl.h
A libc/shared/math/erfcf16.h
M libc/shared/math/f16addl.h
M libc/shared/math/f16divl.h
M libc/shared/math/f16fmal.h
M libc/shared/math/f16mull.h
M libc/shared/math/f16sqrtl.h
M libc/shared/math/f16subl.h
M libc/shared/math/faddl.h
M libc/shared/math/fdiml.h
M libc/shared/math/ffmal.h
M libc/shared/math/floorl.h
M libc/shared/math/fmaxl.h
M libc/shared/math/fsqrtl.h
M libc/shared/math/getpayloadl.h
M libc/shared/math/ilogbl.h
M libc/shared/math/llogbl.h
M libc/shared/math/logbl.h
M libc/shared/math/nextafterl.h
M libc/shared/math/nextdownl.h
M libc/shared/math/nexttoward.h
M libc/shared/math/nexttowardbf16.h
M libc/shared/math/nexttowardf.h
M libc/shared/math/nexttowardf16.h
M libc/shared/math/nexttowardl.h
M libc/shared/math/nextupl.h
M libc/shared/math/setpayloadl.h
M libc/shared/math/setpayloadsigl.h
M libc/shared/rpc.h
M libc/src/__support/CMakeLists.txt
M libc/src/__support/CPP/type_traits/is_constant_evaluated.h
M libc/src/__support/FPUtil/multiply_add.h
M libc/src/__support/FPUtil/sqrt.h
M libc/src/__support/GPU/utils.h
M libc/src/__support/HashTable/CMakeLists.txt
M libc/src/__support/OSUtil/linux/syscall_wrappers/CMakeLists.txt
A libc/src/__support/OSUtil/linux/syscall_wrappers/raise.h
M libc/src/__support/frac128.h
M libc/src/__support/macros/attributes.h
M libc/src/__support/macros/config.h
M libc/src/__support/math/CMakeLists.txt
M libc/src/__support/math/acoshf_utils.h
M libc/src/__support/math/asin_utils.h
A libc/src/__support/math/asinbf16.h
A libc/src/__support/math/asinpi.h
A libc/src/__support/math/erfcf16.h
M libc/src/__support/math/exp10_float16_constants.h
M libc/src/__support/math/fmabf16.h
M libc/src/__support/math/inv_trigf_utils.h
M libc/src/__support/math/log1pf.h
A libc/src/__support/math/log2p1f16.h
M libc/src/__support/threads/CMakeLists.txt
M libc/src/__support/threads/CndVar.h
M libc/src/__support/threads/linux/CMakeLists.txt
R libc/src/__support/threads/linux/rwlock.h
A libc/src/__support/threads/raw_rwlock.h
M libc/src/__support/threads/unix_mutex.h
A libc/src/__support/threads/unix_rwlock.h
M libc/src/__support/time/CMakeLists.txt
M libc/src/__support/wchar/CMakeLists.txt
M libc/src/__support/wchar/character_converter.h
M libc/src/__support/wchar/mbrtowc.cpp
M libc/src/__support/wchar/mbrtowc.h
M libc/src/__support/wchar/mbsnrtowcs.h
M libc/src/__support/wchar/string_converter.h
M libc/src/__support/wchar/wcrtomb.h
M libc/src/__support/wchar/wcsnrtombs.h
M libc/src/__support/weak_avl.h
M libc/src/assert/gpu/__assert_fail.cpp
M libc/src/math/CMakeLists.txt
A libc/src/math/asinbf16.h
A libc/src/math/asinpi.h
A libc/src/math/erfcf16.h
M libc/src/math/fminimum_mag_num.h
M libc/src/math/generic/CMakeLists.txt
A libc/src/math/generic/asinbf16.cpp
A libc/src/math/generic/asinpi.cpp
A libc/src/math/generic/erfcf16.cpp
A libc/src/math/generic/log2p1f16.cpp
A libc/src/math/log2p1f16.h
M libc/src/math/powi.h
M libc/src/math/powif.h
M libc/src/math/setpayloadsigl.h
M libc/src/math/totalordermagl.h
M libc/src/pthread/CMakeLists.txt
M libc/src/pthread/pthread_rwlock_clockrdlock.cpp
M libc/src/pthread/pthread_rwlock_clockwrlock.cpp
M libc/src/pthread/pthread_rwlock_destroy.cpp
M libc/src/pthread/pthread_rwlock_init.cpp
M libc/src/pthread/pthread_rwlock_rdlock.cpp
M libc/src/pthread/pthread_rwlock_timedrdlock.cpp
M libc/src/pthread/pthread_rwlock_timedwrlock.cpp
M libc/src/pthread/pthread_rwlock_tryrdlock.cpp
M libc/src/pthread/pthread_rwlock_trywrlock.cpp
M libc/src/pthread/pthread_rwlock_unlock.cpp
M libc/src/pthread/pthread_rwlock_wrlock.cpp
M libc/src/search/CMakeLists.txt
A libc/src/search/tdelete.cpp
A libc/src/search/tdelete.h
A libc/src/search/tdestroy.cpp
A libc/src/search/tdestroy.h
A libc/src/search/tfind.cpp
A libc/src/search/tfind.h
A libc/src/search/tsearch.cpp
A libc/src/search/tsearch.h
A libc/src/search/twalk.cpp
A libc/src/search/twalk.h
A libc/src/search/twalk_r.cpp
A libc/src/search/twalk_r.h
M libc/src/setjmp/aarch64/CMakeLists.txt
M libc/src/signal/linux/CMakeLists.txt
M libc/src/signal/linux/raise.cpp
M libc/src/signal/linux/sigaction.cpp
M libc/src/signal/linux/signal_utils.h
M libc/src/stdio/CMakeLists.txt
M libc/src/stdio/printf_core/CMakeLists.txt
M libc/src/stdio/scanf_core/CMakeLists.txt
M libc/src/stdlib/memalignment.h
M libc/src/string/memory_utils/arm/inline_memset.h
M libc/src/time/linux/CMakeLists.txt
M libc/src/unistd/CMakeLists.txt
M libc/src/unistd/fpathconf.h
M libc/src/unistd/linux/pathconf_utils.h
M libc/src/unistd/pathconf.h
M libc/test/CMakeLists.txt
M libc/test/UnitTest/CMakeLists.txt
M libc/test/UnitTest/TestLogger.cpp
M libc/test/include/CMakeLists.txt
M libc/test/integration/CMakeLists.txt
M libc/test/integration/src/pthread/CMakeLists.txt
M libc/test/integration/src/pthread/pthread_rwlock_test.cpp
M libc/test/shared/CMakeLists.txt
M libc/test/shared/shared_math_constexpr_test.cpp
M libc/test/shared/shared_math_test.cpp
M libc/test/src/__support/threads/linux/CMakeLists.txt
A libc/test/src/__support/threads/linux/raw_rwlock_test.cpp
M libc/test/src/__support/weak_avl_test.cpp
M libc/test/src/math/CMakeLists.txt
A libc/test/src/math/asinbf16_test.cpp
A libc/test/src/math/asinpi_test.cpp
A libc/test/src/math/erfcf16_test.cpp
A libc/test/src/math/log2p1f16_test.cpp
M libc/test/src/math/performance_testing/Timer.h
M libc/test/src/math/smoke/CMakeLists.txt
A libc/test/src/math/smoke/asinbf16_test.cpp
A libc/test/src/math/smoke/asinpi_test.cpp
A libc/test/src/math/smoke/erfcf16_test.cpp
A libc/test/src/math/smoke/log2p1f16_test.cpp
M libc/test/src/search/CMakeLists.txt
A libc/test/src/search/tsearch_test.cpp
M libc/test/src/stdio/CMakeLists.txt
M libc/test/src/stdio/scanf_core/CMakeLists.txt
M libc/test/src/stdlib/CMakeLists.txt
M libc/utils/MPFRWrapper/MPCommon.cpp
M libc/utils/MPFRWrapper/MPCommon.h
M libc/utils/MPFRWrapper/MPFRUtils.cpp
M libc/utils/MPFRWrapper/MPFRUtils.h
M libc/utils/docgen/docgen.py
M libc/utils/docgen/header.py
M libc/utils/hdrgen/hdrgen/header.py
A libc/utils/hdrgen/tests/expected_output/macro_only.h
A libc/utils/hdrgen/tests/input/macro_only.yaml
M libc/utils/hdrgen/tests/test_integration.py
M libclc/CMakeLists.txt
A libclc/clc/include/clc/clc_target_defines.h
A libclc/clc/include/clc/collective/clc_work_group_scan.h
A libclc/clc/include/clc/collective/clc_work_group_scan_decl.inc
M libclc/clc/include/clc/subgroup/clc_sub_group_broadcast.h
A libclc/clc/include/clc/subgroup/clc_sub_group_non_uniform_reduce.h
A libclc/clc/include/clc/subgroup/clc_sub_group_non_uniform_reduce_decl.inc
A libclc/clc/include/clc/subgroup/clc_sub_group_scan.h
A libclc/clc/include/clc/subgroup/clc_sub_group_scan.inc
M libclc/clc/lib/amdgpu/CMakeLists.txt
A libclc/clc/lib/amdgpu/subgroup/clc_amdgpu_ds_swizzle.inc
A libclc/clc/lib/amdgpu/subgroup/clc_sub_group_non_uniform_reduce.cl
M libclc/clc/lib/amdgpu/subgroup/clc_sub_group_reduce.cl
A libclc/clc/lib/amdgpu/subgroup/clc_sub_group_reduce.inc
A libclc/clc/lib/amdgpu/subgroup/clc_sub_group_scan.cl
A libclc/clc/lib/amdgpu/subgroup/clc_sub_group_scan.inc
M libclc/clc/lib/generic/CMakeLists.txt
A libclc/clc/lib/generic/collective/clc_work_group_scan.cl
A libclc/clc/lib/generic/collective/clc_work_group_scan.inc
M libclc/clc/lib/generic/math/clc_atan2.cl
M libclc/clc/lib/generic/math/clc_atan2.inc
M libclc/clc/lib/generic/math/clc_atan2pi.cl
M libclc/clc/lib/generic/math/clc_atan2pi.inc
M libclc/clc/lib/generic/math/clc_erf.cl
A libclc/clc/lib/generic/math/clc_erf.inc
M libclc/clc/lib/generic/math/clc_erfc.cl
A libclc/clc/lib/generic/math/clc_erfc.inc
M libclc/clc/lib/generic/math/clc_fract.inc
M libclc/clc/lib/generic/math/clc_sincos_helpers.cl
M libclc/clc/lib/generic/math/clc_sincos_helpers.inc
M libclc/clc/lib/generic/workitem/clc_get_sub_group_id.cl
M libclc/cmake/modules/AddLibclc.cmake
M libclc/opencl/lib/generic/CMakeLists.txt
M libclc/opencl/lib/generic/atomic/atomic_fetch_add.cl
M libclc/opencl/lib/generic/atomic/atomic_fetch_sub.cl
A libclc/opencl/lib/generic/collective/work_group_scan.cl
A libclc/opencl/lib/generic/collective/work_group_scan.inc
A libclc/opencl/lib/generic/subgroup/sub_group_non_uniform_reduce.cl
A libclc/opencl/lib/generic/subgroup/sub_group_non_uniform_reduce.inc
A libclc/opencl/lib/generic/subgroup/sub_group_scan_exclusive.cl
A libclc/opencl/lib/generic/subgroup/sub_group_scan_exclusive.inc
A libclc/opencl/lib/generic/subgroup/sub_group_scan_inclusive.cl
A libclc/opencl/lib/generic/subgroup/sub_group_scan_inclusive.inc
M libcxx/cmake/caches/AMDGPU.cmake
M libcxx/cmake/caches/NVPTX.cmake
M libcxx/docs/ReleaseNotes/23.rst
M libcxx/include/__atomic/atomic_ref.h
M libcxx/include/__bit_reference
M libcxx/include/__cxx03/__functional/operations.h
M libcxx/include/__cxx03/stdatomic.h
M libcxx/include/__memory/is_sufficiently_aligned.h
M libcxx/include/__split_buffer
M libcxx/include/__vector/vector.h
M libcxx/include/ext/hash_map
R libcxx/test/extensions/gnu/hash_map/non_standard_layout.pass.cpp
R libcxx/test/extensions/gnu/hash_multimap/non_standard_layout.pass.cpp
A libcxx/test/std/containers/sequences/vector.bool/reference/builtin_address_of.pass.cpp
M libcxx/test/std/thread/futures/futures.async/thread_create_failure.pass.cpp
A libcxx/test/std/utilities/template.bitset/bitset.members/reference.builtin_address_of.pass.cpp
M libcxx/utils/ci/docker/docker-compose.yml
M libcxx/utils/ci/docker/linux-builder-base.dockerfile
M libcxx/utils/ci/images/libcxx_runners.txt
M libcxx/utils/ci/lnt/run-benchmarks
M libcxx/utils/ci/lnt/runners/README.md
M libcxx/utils/ci/lnt/runners/apple-m5-clang21
M libcxx/utils/ci/lnt/runners/apple-m5-xcode26
M libunwind/src/libunwind.cpp
M libunwind/test/libunwind_01.pass.cpp
A libunwind/test/set_non_null_pc_outside_of_function_cfi_bounds.pass.cpp
M lld/COFF/InputFiles.cpp
M lld/COFF/LTO.cpp
M lld/ELF/Arch/AArch64.cpp
M lld/ELF/Arch/Hexagon.cpp
M lld/ELF/BPSectionOrderer.cpp
M lld/ELF/InputSection.cpp
M lld/ELF/InputSection.h
M lld/ELF/LTO.cpp
M lld/ELF/MarkLive.cpp
M lld/ELF/Relocations.cpp
M lld/ELF/Relocations.h
M lld/ELF/Symbols.cpp
M lld/ELF/SyntheticSections.cpp
M lld/ELF/Target.h
M lld/ELF/Writer.cpp
M lld/MachO/ICF.cpp
M lld/Maintainers.md
M lld/docs/ELF/linker_script.rst
R lld/test/COFF/embed-bitcode.test
A lld/test/ELF/aarch64-tls-dtprel.s
M lld/test/ELF/hexagon-thunk-range-gdplt.s
M lld/test/ELF/hexagon-thunk-range-plt.s
M lld/test/ELF/hexagon-thunks-packets.s
M lld/test/ELF/hexagon-thunks.s
M lld/test/ELF/hexagon-tls-gd-nonpreemptible.s
A lld/test/ELF/hexagon-tls-gd-plt-direct.s
M lld/test/ELF/hexagon-tls-gd-xform.s
A lld/test/ELF/merge-piece-oob.s
R lld/test/ELF/relocation-before-merge-start.s
R lld/test/ELF/relocation-past-merge-end.s
M lld/test/MachO/icf-options.s
A lld/test/MachO/icf-safe-missing-addrsig.s
M lldb/docs/resources/build.rst
M lldb/docs/use/aarch64-linux.md
M lldb/examples/python/formatter_bytecode.py
M lldb/include/lldb/Breakpoint/BreakpointLocation.h
M lldb/include/lldb/Breakpoint/BreakpointResolver.h
M lldb/include/lldb/Core/Address.h
M lldb/include/lldb/Expression/ObjectFileJIT.h
M lldb/include/lldb/Host/FileAction.h
M lldb/include/lldb/Host/ProcessLaunchInfo.h
M lldb/include/lldb/Host/windows/ProcessLauncherWindows.h
M lldb/include/lldb/Host/windows/PseudoConsole.h
A lldb/include/lldb/Host/windows/WindowsFileAction.h
M lldb/include/lldb/Interpreter/OptionArgParser.h
M lldb/include/lldb/Symbol/ObjectFile.h
M lldb/include/lldb/Target/MemoryRegionInfo.h
M lldb/include/lldb/Target/Platform.h
M lldb/include/lldb/Target/Process.h
M lldb/include/lldb/Target/StackFrame.h
M lldb/include/lldb/Target/Target.h
M lldb/include/lldb/Target/Thread.h
M lldb/include/lldb/Target/ThreadPlanStepUntil.h
M lldb/include/lldb/ValueObject/DILEval.h
M lldb/include/lldb/ValueObject/DILParser.h
M lldb/include/lldb/ValueObject/ValueObject.h
M lldb/include/lldb/lldb-enumerations.h
M lldb/include/lldb/lldb-private-enumerations.h
M lldb/include/lldb/lldb-private-interfaces.h
M lldb/include/lldb/lldb-private-types.h
M lldb/packages/Python/lldbsuite/test/builders/builder.py
M lldb/packages/Python/lldbsuite/test/decorators.py
M lldb/packages/Python/lldbsuite/test/lldbplatformutil.py
M lldb/packages/Python/lldbsuite/test/lldbtest.py
M lldb/packages/Python/lldbsuite/test/make/Makefile.rules
M lldb/packages/Python/lldbsuite/test/test_result.py
M lldb/packages/Python/lldbsuite/test/tools/lldb-dap/dap_server.py
M lldb/packages/Python/lldbsuite/test/tools/lldb-dap/lldbdap_testcase.py
M lldb/source/API/SBAddress.cpp
M lldb/source/API/SBMemoryRegionInfo.cpp
M lldb/source/API/SBModuleSpec.cpp
M lldb/source/API/SBThread.cpp
M lldb/source/Breakpoint/BreakpointLocation.cpp
M lldb/source/Breakpoint/BreakpointResolverName.cpp
M lldb/source/Commands/CommandObjectFrame.cpp
M lldb/source/Commands/CommandObjectMemory.cpp
M lldb/source/Commands/CommandObjectPlugin.cpp
M lldb/source/Commands/CommandObjectProcess.cpp
M lldb/source/Commands/CommandObjectTarget.cpp
M lldb/source/Commands/CommandObjectThread.cpp
M lldb/source/Core/Address.cpp
M lldb/source/Core/Module.cpp
M lldb/source/Core/SearchFilter.cpp
M lldb/source/Core/Section.cpp
M lldb/source/DataFormatters/FormattersHelpers.cpp
M lldb/source/DataFormatters/StringPrinter.cpp
M lldb/source/DataFormatters/TypeSynthetic.cpp
M lldb/source/Expression/DWARFExpression.cpp
M lldb/source/Expression/IRMemoryMap.cpp
M lldb/source/Expression/ObjectFileJIT.cpp
M lldb/source/Host/CMakeLists.txt
M lldb/source/Host/common/File.cpp
M lldb/source/Host/common/FileCache.cpp
M lldb/source/Host/common/ProcessLaunchInfo.cpp
M lldb/source/Host/windows/ProcessLauncherWindows.cpp
M lldb/source/Host/windows/PseudoConsole.cpp
A lldb/source/Host/windows/WindowsFileAction.cpp
M lldb/source/Interpreter/CommandInterpreter.cpp
M lldb/source/Plugins/ABI/Mips/ABISysV_mips.cpp
M lldb/source/Plugins/ABI/Mips/ABISysV_mips64.cpp
M lldb/source/Plugins/ABI/PowerPC/ABISysV_ppc.cpp
M lldb/source/Plugins/ABI/SystemZ/ABISysV_s390x.cpp
M lldb/source/Plugins/ABI/X86/ABISysV_i386.cpp
M lldb/source/Plugins/ABI/X86/ABISysV_x86_64.cpp
M lldb/source/Plugins/ABI/X86/ABIWindows_x86_64.cpp
M lldb/source/Plugins/Architecture/AArch64/ArchitectureAArch64.cpp
M lldb/source/Plugins/Architecture/Mips/ArchitectureMips.cpp
M lldb/source/Plugins/Architecture/PPC64/ArchitecturePPC64.cpp
M lldb/source/Plugins/DynamicLoader/FreeBSD-Kernel/DynamicLoaderFreeBSDKernel.cpp
M lldb/source/Plugins/DynamicLoader/Hexagon-DYLD/DynamicLoaderHexagonDYLD.cpp
M lldb/source/Plugins/DynamicLoader/MacOSX-DYLD/DynamicLoaderDarwin.cpp
M lldb/source/Plugins/DynamicLoader/POSIX-DYLD/DYLDRendezvous.cpp
M lldb/source/Plugins/DynamicLoader/POSIX-DYLD/DynamicLoaderPOSIXDYLD.cpp
M lldb/source/Plugins/ExpressionParser/Clang/ASTUtils.h
M lldb/source/Plugins/InstrumentationRuntime/MainThreadChecker/InstrumentationRuntimeMainThreadChecker.cpp
M lldb/source/Plugins/Language/ObjC/CFBasicHash.cpp
M lldb/source/Plugins/Language/ObjC/CFBasicHash.h
M lldb/source/Plugins/Language/ObjC/NSString.cpp
M lldb/source/Plugins/LanguageRuntime/CPlusPlus/ItaniumABIRuntime.cpp
M lldb/source/Plugins/LanguageRuntime/ObjC/AppleObjCRuntime/AppleObjCTrampolineHandler.cpp
M lldb/source/Plugins/LanguageRuntime/ObjC/AppleObjCRuntime/AppleThreadPlanStepThroughObjCTrampoline.cpp
M lldb/source/Plugins/LanguageRuntime/ObjC/AppleObjCRuntime/AppleThreadPlanStepThroughObjCTrampoline.h
M lldb/source/Plugins/ObjectContainer/BSD-Archive/ObjectContainerBSDArchive.cpp
M lldb/source/Plugins/ObjectContainer/BSD-Archive/ObjectContainerBSDArchive.h
M lldb/source/Plugins/ObjectContainer/Big-Archive/ObjectContainerBigArchive.cpp
M lldb/source/Plugins/ObjectContainer/Big-Archive/ObjectContainerBigArchive.h
M lldb/source/Plugins/ObjectContainer/Mach-O-Fileset/ObjectContainerMachOFileset.cpp
M lldb/source/Plugins/ObjectContainer/Mach-O-Fileset/ObjectContainerMachOFileset.h
M lldb/source/Plugins/ObjectContainer/Universal-Mach-O/ObjectContainerUniversalMachO.cpp
M lldb/source/Plugins/ObjectContainer/Universal-Mach-O/ObjectContainerUniversalMachO.h
M lldb/source/Plugins/ObjectFile/Breakpad/ObjectFileBreakpad.cpp
M lldb/source/Plugins/ObjectFile/Breakpad/ObjectFileBreakpad.h
M lldb/source/Plugins/ObjectFile/COFF/ObjectFileCOFF.cpp
M lldb/source/Plugins/ObjectFile/COFF/ObjectFileCOFF.h
M lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp
M lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.h
M lldb/source/Plugins/ObjectFile/JSON/ObjectFileJSON.cpp
M lldb/source/Plugins/ObjectFile/JSON/ObjectFileJSON.h
M lldb/source/Plugins/ObjectFile/Mach-O/ObjectFileMachO.cpp
M lldb/source/Plugins/ObjectFile/Mach-O/ObjectFileMachO.h
M lldb/source/Plugins/ObjectFile/Minidump/ObjectFileMinidump.cpp
M lldb/source/Plugins/ObjectFile/Minidump/ObjectFileMinidump.h
M lldb/source/Plugins/ObjectFile/PDB/ObjectFilePDB.cpp
M lldb/source/Plugins/ObjectFile/PDB/ObjectFilePDB.h
M lldb/source/Plugins/ObjectFile/PECOFF/ObjectFilePECOFF.cpp
M lldb/source/Plugins/ObjectFile/PECOFF/ObjectFilePECOFF.h
M lldb/source/Plugins/ObjectFile/XCOFF/ObjectFileXCOFF.cpp
M lldb/source/Plugins/ObjectFile/XCOFF/ObjectFileXCOFF.h
M lldb/source/Plugins/ObjectFile/wasm/ObjectFileWasm.cpp
M lldb/source/Plugins/ObjectFile/wasm/ObjectFileWasm.h
M lldb/source/Plugins/Platform/MacOSX/PlatformDarwin.cpp
M lldb/source/Plugins/Platform/MacOSX/PlatformDarwin.h
M lldb/source/Plugins/Platform/MacOSX/PlatformDarwinDevice.cpp
M lldb/source/Plugins/Platform/MacOSX/PlatformDarwinDevice.h
M lldb/source/Plugins/Platform/MacOSX/PlatformRemoteDarwinDevice.cpp
M lldb/source/Plugins/Platform/WebAssembly/CMakeLists.txt
M lldb/source/Plugins/Platform/WebAssembly/PlatformWasm.cpp
M lldb/source/Plugins/Platform/WebAssembly/PlatformWasm.h
A lldb/source/Plugins/Platform/WebAssembly/PlatformWebInspectorWasm.cpp
A lldb/source/Plugins/Platform/WebAssembly/PlatformWebInspectorWasm.h
M lldb/source/Plugins/Process/FreeBSD/NativeProcessFreeBSD.cpp
M lldb/source/Plugins/Process/Linux/NativeProcessLinux.cpp
M lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp
M lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.h
M lldb/source/Plugins/Process/NetBSD/NativeProcessNetBSD.cpp
M lldb/source/Plugins/Process/Utility/LinuxProcMaps.cpp
M lldb/source/Plugins/Process/Utility/MemoryTagManagerAArch64MTE.cpp
M lldb/source/Plugins/Process/Utility/RegisterContextWindows_i386.cpp
M lldb/source/Plugins/Process/Utility/RegisterContextWindows_x86_64.cpp
M lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_arm64.cpp
M lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_arm64.h
M lldb/source/Plugins/Process/Windows/Common/ProcessDebugger.cpp
M lldb/source/Plugins/Process/elf-core/ProcessElfCore.cpp
M lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunication.cpp
M lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationClient.cpp
M lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationServerCommon.cpp
M lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationServerLLGS.cpp
M lldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.cpp
M lldb/source/Plugins/Process/mach-core/ProcessMachCore.cpp
M lldb/source/Plugins/Process/minidump/MinidumpParser.cpp
M lldb/source/Plugins/Process/minidump/ProcessMinidump.cpp
M lldb/source/Plugins/SymbolFile/CTF/SymbolFileCTF.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.h
M lldb/source/Plugins/SymbolFile/NativePDB/SymbolFileNativePDB.cpp
M lldb/source/Plugins/SymbolLocator/DebugSymbols/SymbolLocatorDebugSymbols.cpp
M lldb/source/Plugins/SymbolLocator/Default/SymbolLocatorDefault.cpp
M lldb/source/Plugins/SymbolLocator/SymStore/SymbolLocatorSymStore.cpp
M lldb/source/Plugins/TypeSystem/Clang/TypeSystemClang.cpp
M lldb/source/Symbol/ObjectFile.cpp
M lldb/source/Symbol/SymbolContext.cpp
M lldb/source/Target/BorrowedStackFrame.cpp
M lldb/source/Target/MemoryRegionInfo.cpp
M lldb/source/Target/Platform.cpp
M lldb/source/Target/Process.cpp
M lldb/source/Target/ProcessTrace.cpp
M lldb/source/Target/RegisterContextUnwind.cpp
M lldb/source/Target/StackFrame.cpp
M lldb/source/Target/Target.cpp
M lldb/source/Target/TargetList.cpp
M lldb/source/Target/Thread.cpp
M lldb/source/Target/ThreadPlanStepUntil.cpp
M lldb/source/ValueObject/DILEval.cpp
M lldb/source/ValueObject/DILParser.cpp
M lldb/source/ValueObject/ValueObject.cpp
M lldb/source/ValueObject/ValueObjectDynamicValue.cpp
M lldb/test/API/commands/target/create-deps/TestTargetCreateDeps.py
M lldb/test/API/functionalities/breakpoint/break_in_loaded_dylib/TestBreakInLoadedDylib.py
M lldb/test/API/functionalities/data-formatter/bytecode-synthetic/TestBytecodeSynthetic.py
M lldb/test/API/functionalities/data-formatter/bytecode-synthetic/main.cpp
M lldb/test/API/functionalities/executable_first/TestExecutableFirst.py
M lldb/test/API/functionalities/inline-stepping/TestInlineStepping.py
M lldb/test/API/functionalities/load_after_attach/TestLoadAfterAttach.py
M lldb/test/API/functionalities/load_lazy/TestLoadUsingLazyBind.py
M lldb/test/API/functionalities/load_unload/TestLoadUnload.py
M lldb/test/API/functionalities/scripted_frame_provider/circular_dependency/TestFrameProviderCircularDependency.py
M lldb/test/API/functionalities/scripted_frame_provider/pass_through_prefix/TestFrameProviderPassThroughPrefix.py
R lldb/test/API/lang/cpp/non-type-template-param-member-ptr/Makefile
R lldb/test/API/lang/cpp/non-type-template-param-member-ptr/TestCppNonTypeTemplateParamPtrToMember.py
R lldb/test/API/lang/cpp/non-type-template-param-member-ptr/main.cpp
M lldb/test/API/lang/objc/objc-class-method/TestObjCClassMethod.py
M lldb/test/API/lang/objc/objc-class-method/class.m
A lldb/test/API/linux/aarch64/sme_only_registers/Makefile
A lldb/test/API/linux/aarch64/sme_only_registers/TestSMEOnlyRegisters.py
A lldb/test/API/linux/aarch64/sme_only_registers/main.c
M lldb/test/API/symbol_ondemand/shared_library/TestSharedLibOnDemand.py
M lldb/test/API/tools/lldb-dap/attach/TestDAP_attach.py
M lldb/test/API/tools/lldb-dap/io/TestDAP_io.py
M lldb/test/API/tools/lldb-dap/launch/TestDAP_launch_stdio_redirection_and_console.py
M lldb/test/API/tools/lldb-dap/restart/TestDAP_restart_console.py
M lldb/test/API/tools/lldb-dap/runInTerminal/TestDAP_runInTerminal.py
M lldb/test/API/tools/lldb-dap/server/TestDAP_server.py
A lldb/test/Shell/Breakpoint/Inputs/main.c
A lldb/test/Shell/Breakpoint/source-regex-missing-source.test
M lldb/test/Shell/ScriptInterpreter/Python/Inputs/FormatterBytecode/RigidArrayLLDBFormatterC.txt
M lldb/test/Shell/ScriptInterpreter/Python/Inputs/FormatterBytecode/RigidArrayLLDBFormatterSwift.txt
M lldb/test/Shell/ScriptInterpreter/Python/python-bytecode.test
M lldb/tools/lldb-dap/Handler/AttachRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/RequestHandler.cpp
M lldb/tools/lldb-dap/JSONUtils.cpp
M lldb/tools/lldb-dap/RunInTerminal.cpp
M lldb/tools/lldb-dap/RunInTerminal.h
M lldb/tools/lldb-dap/tool/Options.td
M lldb/tools/lldb-dap/tool/lldb-dap.cpp
M lldb/tools/lldb-server/lldb-platform.cpp
M lldb/unittests/Host/FileTest.cpp
M lldb/unittests/Host/HostTest.cpp
M lldb/unittests/ObjectFile/ELF/TestObjectFileELF.cpp
M lldb/unittests/Platform/PlatformDarwinTest.cpp
M lldb/unittests/Platform/PlatformMacOSXTest.cpp
M lldb/unittests/Platform/PlatformTest.cpp
M lldb/unittests/Process/Utility/LinuxProcMapsTest.cpp
M lldb/unittests/Process/Utility/MemoryTagManagerAArch64MTETest.cpp
M lldb/unittests/Process/gdb-remote/GDBRemoteCommunicationClientTest.cpp
M lldb/unittests/Process/minidump/MinidumpParserTest.cpp
M lldb/unittests/Symbol/SymbolTest.cpp
M lldb/unittests/Target/MemoryRegionInfoTest.cpp
M lldb/unittests/Utility/ArchSpecTest.cpp
M llvm/CMakeLists.txt
M llvm/cmake/modules/HandleLLVMOptions.cmake
M llvm/docs/AMDGPUUsage.rst
M llvm/docs/Coroutines.rst
M llvm/docs/GettingInvolved.rst
M llvm/docs/LangRef.rst
M llvm/docs/RISCVUsage.rst
M llvm/docs/ReleaseNotes.md
M llvm/docs/SPIRVUsage.rst
M llvm/docs/SandboxVectorizer.md
M llvm/examples/OrcV2Examples/LLJITWithRemoteDebugging/LLJITWithRemoteDebugging.cpp
M llvm/examples/OrcV2Examples/LLJITWithRemoteDebugging/RemoteJITUtils.cpp
M llvm/examples/OrcV2Examples/LLJITWithRemoteDebugging/RemoteJITUtils.h
A llvm/include/llvm/ABI/FunctionInfo.h
M llvm/include/llvm/ADT/APInt.h
M llvm/include/llvm/ADT/GenericCycleImpl.h
M llvm/include/llvm/ADT/GenericSSAContext.h
M llvm/include/llvm/ADT/GenericUniformityImpl.h
M llvm/include/llvm/ADT/GenericUniformityInfo.h
M llvm/include/llvm/ADT/Repeated.h
M llvm/include/llvm/ADT/Uniformity.h
M llvm/include/llvm/ADT/bit.h
M llvm/include/llvm/Analysis/DependenceAnalysis.h
M llvm/include/llvm/Analysis/LoopAccessAnalysis.h
M llvm/include/llvm/Analysis/ScalarEvolution.h
M llvm/include/llvm/Analysis/ScalarEvolutionPatternMatch.h
M llvm/include/llvm/Analysis/TargetTransformInfo.h
M llvm/include/llvm/Analysis/TargetTransformInfoImpl.h
M llvm/include/llvm/BinaryFormat/ELF.h
M llvm/include/llvm/BinaryFormat/MsgPackDocument.h
M llvm/include/llvm/CodeGen/BasicTTIImpl.h
M llvm/include/llvm/CodeGen/GlobalISel/Combiner.h
M llvm/include/llvm/CodeGen/ISDOpcodes.h
M llvm/include/llvm/CodeGen/Rematerializer.h
M llvm/include/llvm/CodeGen/SelectionDAG.h
M llvm/include/llvm/CodeGen/TargetInstrInfo.h
M llvm/include/llvm/CodeGen/TargetLowering.h
M llvm/include/llvm/DebugInfo/CodeView/LazyRandomTypeCollection.h
M llvm/include/llvm/DebugInfo/GSYM/FileWriter.h
M llvm/include/llvm/DebugInfo/LogicalView/Core/LVSupport.h
M llvm/include/llvm/DebugInfo/LogicalView/Readers/LVCodeViewVisitor.h
M llvm/include/llvm/DebugInfo/PDB/Native/TpiStream.h
M llvm/include/llvm/ExecutionEngine/Orc/EPCDynamicLibrarySearchGenerator.h
M llvm/include/llvm/ExecutionEngine/Orc/ExecutorProcessControl.h
M llvm/include/llvm/ExecutionEngine/Orc/ExecutorResolutionGenerator.h
M llvm/include/llvm/ExecutionEngine/Orc/LLJIT.h
M llvm/include/llvm/ExecutionEngine/Orc/LinkGraphLinkingLayer.h
M llvm/include/llvm/ExecutionEngine/Orc/LookupAndRecordAddrs.h
M llvm/include/llvm/ExecutionEngine/Orc/SelfExecutorProcessControl.h
M llvm/include/llvm/ExecutionEngine/Orc/SimpleRemoteEPC.h
M llvm/include/llvm/IR/Attributes.td
M llvm/include/llvm/IR/BasicBlock.h
M llvm/include/llvm/IR/DebugInfoMetadata.h
M llvm/include/llvm/IR/DiagnosticInfo.h
M llvm/include/llvm/IR/GlobalObject.h
M llvm/include/llvm/IR/Instruction.h
M llvm/include/llvm/IR/IntrinsicInst.h
M llvm/include/llvm/IR/Intrinsics.h
M llvm/include/llvm/IR/Intrinsics.td
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/include/llvm/IR/IntrinsicsDirectX.td
M llvm/include/llvm/IR/IntrinsicsPowerPC.td
M llvm/include/llvm/IR/IntrinsicsSPIRV.td
M llvm/include/llvm/IR/PatternMatch.h
M llvm/include/llvm/IR/ProfDataUtils.h
M llvm/include/llvm/IR/Value.h
M llvm/include/llvm/LTO/LTO.h
A llvm/include/llvm/MC/MCAsmStreamer.h
M llvm/include/llvm/MC/MCAssembler.h
M llvm/include/llvm/MCA/HardwareUnits/ResourceManager.h
M llvm/include/llvm/Passes/CodeGenPassBuilder.h
M llvm/include/llvm/ProfileData/InstrProfData.inc
M llvm/include/llvm/Support/Alignment.h
M llvm/include/llvm/Support/KnownFPClass.h
M llvm/include/llvm/Support/Parallel.h
M llvm/include/llvm/Target/GlobalISel/Combine.td
M llvm/include/llvm/Target/Target.td
M llvm/include/llvm/TargetParser/AMDGPUTargetParser.def
M llvm/include/llvm/TargetParser/Triple.h
M llvm/include/llvm/Transforms/Coroutines/CoroInstr.h
M llvm/include/llvm/Transforms/Utils/BasicBlockUtils.h
M llvm/include/llvm/Transforms/Utils/BypassSlowDivision.h
M llvm/include/llvm/Transforms/Vectorize/LoopVectorizationLegality.h
A llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Passes/LoadStoreVec.h
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/VecUtils.h
M llvm/lib/ABI/CMakeLists.txt
A llvm/lib/ABI/FunctionInfo.cpp
M llvm/lib/Analysis/CFG.cpp
M llvm/lib/Analysis/ConstantFolding.cpp
M llvm/lib/Analysis/DependenceAnalysis.cpp
M llvm/lib/Analysis/IVDescriptors.cpp
M llvm/lib/Analysis/InlineCost.cpp
M llvm/lib/Analysis/LoopAccessAnalysis.cpp
M llvm/lib/Analysis/ModuleSummaryAnalysis.cpp
M llvm/lib/Analysis/ScalarEvolution.cpp
M llvm/lib/Analysis/StackSafetyAnalysis.cpp
M llvm/lib/Analysis/TargetTransformInfo.cpp
M llvm/lib/Analysis/UniformityAnalysis.cpp
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/lib/BinaryFormat/MsgPackDocument.cpp
M llvm/lib/CodeGen/AsmPrinter/AccelTable.cpp
M llvm/lib/CodeGen/AsmPrinter/DwarfCompileUnit.cpp
M llvm/lib/CodeGen/AsmPrinter/DwarfCompileUnit.h
M llvm/lib/CodeGen/AsmPrinter/DwarfDebug.h
M llvm/lib/CodeGen/AsmPrinter/DwarfExpression.cpp
M llvm/lib/CodeGen/AsmPrinter/DwarfUnit.cpp
M llvm/lib/CodeGen/AtomicExpandPass.cpp
M llvm/lib/CodeGen/CodeGenPrepare.cpp
M llvm/lib/CodeGen/ExpandVectorPredication.cpp
M llvm/lib/CodeGen/GlobalISel/Combiner.cpp
M llvm/lib/CodeGen/GlobalISel/GISelValueTracking.cpp
M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
M llvm/lib/CodeGen/GlobalMerge.cpp
M llvm/lib/CodeGen/InlineAsmPrepare.cpp
M llvm/lib/CodeGen/InterleavedAccessPass.cpp
M llvm/lib/CodeGen/LowerEmuTLS.cpp
M llvm/lib/CodeGen/MachineSSAContext.cpp
M llvm/lib/CodeGen/MachineUniformityAnalysis.cpp
M llvm/lib/CodeGen/MachineVerifier.cpp
M llvm/lib/CodeGen/ProcessImplicitDefs.cpp
M llvm/lib/CodeGen/Rematerializer.cpp
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/lib/CodeGen/TargetLoweringBase.cpp
M llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp
M llvm/lib/CodeGen/TargetPassConfig.cpp
M llvm/lib/DebugInfo/CodeView/LazyRandomTypeCollection.cpp
M llvm/lib/DebugInfo/GSYM/FileWriter.cpp
M llvm/lib/DebugInfo/LogicalView/Core/LVLocation.cpp
M llvm/lib/DebugInfo/LogicalView/Readers/LVCodeViewVisitor.cpp
M llvm/lib/DebugInfo/PDB/Native/TpiStream.cpp
M llvm/lib/ExecutionEngine/Orc/EPCDynamicLibrarySearchGenerator.cpp
M llvm/lib/ExecutionEngine/Orc/ExecutorResolutionGenerator.cpp
M llvm/lib/ExecutionEngine/Orc/LLJIT.cpp
M llvm/lib/ExecutionEngine/Orc/LinkGraphLinkingLayer.cpp
M llvm/lib/ExecutionEngine/Orc/LookupAndRecordAddrs.cpp
M llvm/lib/ExecutionEngine/Orc/SelfExecutorProcessControl.cpp
M llvm/lib/ExecutionEngine/Orc/SimpleRemoteEPC.cpp
M llvm/lib/Frontend/OpenMP/OMPContext.cpp
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
M llvm/lib/FuzzMutate/RandomIRBuilder.cpp
M llvm/lib/IR/AutoUpgrade.cpp
M llvm/lib/IR/BasicBlock.cpp
M llvm/lib/IR/Core.cpp
M llvm/lib/IR/DIBuilder.cpp
M llvm/lib/IR/DiagnosticInfo.cpp
M llvm/lib/IR/Globals.cpp
M llvm/lib/IR/Instruction.cpp
M llvm/lib/IR/IntrinsicInst.cpp
M llvm/lib/IR/Intrinsics.cpp
M llvm/lib/IR/LLVMContextImpl.cpp
M llvm/lib/IR/LLVMContextImpl.h
M llvm/lib/IR/Metadata.cpp
M llvm/lib/IR/SSAContext.cpp
M llvm/lib/IR/Value.cpp
M llvm/lib/IR/Verifier.cpp
M llvm/lib/LTO/LTO.cpp
M llvm/lib/MC/MCAsmStreamer.cpp
M llvm/lib/MC/MCAssembler.cpp
M llvm/lib/MC/MCObjectFileInfo.cpp
M llvm/lib/MC/MCWin64EH.cpp
M llvm/lib/MCA/HardwareUnits/ResourceManager.cpp
M llvm/lib/MCA/Support.cpp
M llvm/lib/Object/RelocationResolver.cpp
M llvm/lib/Passes/PassBuilderPipelines.cpp
M llvm/lib/ProfileData/InstrProf.cpp
M llvm/lib/Support/APInt.cpp
M llvm/lib/Support/CommandLine.cpp
M llvm/lib/Support/DataExtractor.cpp
M llvm/lib/Support/HTTP/HTTPClient.cpp
M llvm/lib/Support/KnownFPClass.cpp
M llvm/lib/Support/Parallel.cpp
M llvm/lib/TableGen/Record.cpp
M llvm/lib/TableGen/TGParser.cpp
M llvm/lib/Target/AArch64/AArch64ConditionOptimizer.cpp
M llvm/lib/Target/AArch64/AArch64FastISel.cpp
M llvm/lib/Target/AArch64/AArch64InstrFormats.td
M llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.h
M llvm/lib/Target/AArch64/AArch64PostCoalescerPass.cpp
M llvm/lib/Target/AArch64/AArch64SystemOperands.td
M llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
M llvm/lib/Target/AArch64/AArch64TargetObjectFile.cpp
M llvm/lib/Target/AArch64/AArch64TargetObjectFile.h
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.h
M llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
M llvm/lib/Target/AArch64/GISel/AArch64O0PreLegalizerCombiner.cpp
M llvm/lib/Target/AArch64/GISel/AArch64PostLegalizerCombiner.cpp
M llvm/lib/Target/AArch64/GISel/AArch64PostLegalizerLowering.cpp
M llvm/lib/Target/AArch64/GISel/AArch64PreLegalizerCombiner.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp
M llvm/lib/Target/AArch64/Utils/AArch64BaseInfo.h
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPUCoExecSchedStrategy.cpp
M llvm/lib/Target/AMDGPU/AMDGPUCoExecSchedStrategy.h
M llvm/lib/Target/AMDGPU/AMDGPUCodeGenPrepare.cpp
M llvm/lib/Target/AMDGPU/AMDGPUIGroupLP.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.h
M llvm/lib/Target/AMDGPU/AMDGPUInstrInfo.td
M llvm/lib/Target/AMDGPU/AMDGPUInstructions.td
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.h
M llvm/lib/Target/AMDGPU/AMDGPULowerVGPREncoding.cpp
M llvm/lib/Target/AMDGPU/AMDGPUPostLegalizerCombiner.cpp
M llvm/lib/Target/AMDGPU/AMDGPUPreLegalizerCombiner.cpp
M llvm/lib/Target/AMDGPU/AMDGPUPromoteAlloca.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegBankCombiner.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
M llvm/lib/Target/AMDGPU/AMDGPUSelectionDAGInfo.h
M llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h
M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
M llvm/lib/Target/AMDGPU/CMakeLists.txt
M llvm/lib/Target/AMDGPU/GCNProcessors.td
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.cpp
M llvm/lib/Target/AMDGPU/MIMGInstructions.td
M llvm/lib/Target/AMDGPU/R600ISelLowering.h
M llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
M llvm/lib/Target/AMDGPU/SIFrameLowering.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIInsertHardClauses.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.h
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
M llvm/lib/Target/AMDGPU/SIInstructions.td
M llvm/lib/Target/AMDGPU/SILowerSGPRSpills.cpp
A llvm/lib/Target/AMDGPU/SISpillUtils.cpp
A llvm/lib/Target/AMDGPU/SISpillUtils.h
M llvm/lib/Target/AMDGPU/SOPInstructions.td
M llvm/lib/Target/AMDGPU/VOP1Instructions.td
M llvm/lib/Target/AMDGPU/VOP3Instructions.td
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
M llvm/lib/Target/ARM/ARMISelLowering.cpp
M llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
M llvm/lib/Target/DirectX/DXIL.td
M llvm/lib/Target/DirectX/DXILShaderFlags.cpp
M llvm/lib/Target/Hexagon/HexagonAsmPrinter.cpp
M llvm/lib/Target/Hexagon/HexagonFrameLowering.cpp
M llvm/lib/Target/Hexagon/HexagonHazardRecognizer.cpp
M llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
M llvm/lib/Target/Hexagon/HexagonLoadStoreWidening.cpp
M llvm/lib/Target/Hexagon/HexagonRegisterInfo.cpp
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/lib/Target/LoongArch/LoongArchISelLowering.h
M llvm/lib/Target/LoongArch/LoongArchInstrInfo.cpp
M llvm/lib/Target/Mips/MipsInstrInfo.cpp
M llvm/lib/Target/Mips/MipsPostLegalizerCombiner.cpp
M llvm/lib/Target/Mips/MipsPreLegalizerCombiner.cpp
M llvm/lib/Target/NVPTX/NVPTXDwarfDebug.cpp
M llvm/lib/Target/NVPTX/NVPTXDwarfDebug.h
M llvm/lib/Target/NVPTX/NVPTXTargetTransformInfo.cpp
M llvm/lib/Target/NVPTX/NVPTXTargetTransformInfo.h
M llvm/lib/Target/PowerPC/PPCISelLowering.cpp
M llvm/lib/Target/PowerPC/PPCInstr64Bit.td
M llvm/lib/Target/PowerPC/PPCInstrAltivec.td
M llvm/lib/Target/PowerPC/PPCInstrFuture.td
M llvm/lib/Target/PowerPC/PPCInstrInfo.td
M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
M llvm/lib/Target/RISCV/GISel/RISCVO0PreLegalizerCombiner.cpp
M llvm/lib/Target/RISCV/GISel/RISCVPostLegalizerCombiner.cpp
M llvm/lib/Target/RISCV/GISel/RISCVPreLegalizerCombiner.cpp
M llvm/lib/Target/RISCV/RISCVCodeGenPrepare.cpp
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoP.td
M llvm/lib/Target/RISCV/RISCVInstrInfoXAIF.td
M llvm/lib/Target/RISCV/RISCVInstrInfoXqci.td
M llvm/lib/Target/RISCV/RISCVOptWInstrs.cpp
M llvm/lib/Target/RISCV/RISCVProcessors.td
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
M llvm/lib/Target/RISCV/RISCVVSETVLIInfoAnalysis.cpp
M llvm/lib/Target/RISCV/RISCVVSETVLIInfoAnalysis.h
M llvm/lib/Target/SPIRV/SPIRVBuiltins.cpp
M llvm/lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp
M llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp
M llvm/lib/Target/SPIRV/SPIRVInstrInfo.td
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
M llvm/lib/Target/SPIRV/SPIRVLegalizePointerCast.cpp
M llvm/lib/Target/SPIRV/SPIRVLegalizerInfo.cpp
M llvm/lib/Target/SPIRV/SPIRVModuleAnalysis.cpp
M llvm/lib/Target/SPIRV/SPIRVPostLegalizer.cpp
M llvm/lib/Target/SPIRV/SPIRVPreLegalizerCombiner.cpp
M llvm/lib/Target/SPIRV/SPIRVPrepareFunctions.cpp
M llvm/lib/Target/SPIRV/SPIRVPrepareGlobals.cpp
M llvm/lib/Target/SPIRV/SPIRVSymbolicOperands.td
M llvm/lib/Target/SPIRV/SPIRVTargetMachine.cpp
M llvm/lib/Target/SPIRV/SPIRVUtils.cpp
M llvm/lib/Target/WebAssembly/GISel/WebAssemblyInstructionSelector.cpp
M llvm/lib/Target/WebAssembly/GISel/WebAssemblyLegalizerInfo.cpp
M llvm/lib/Target/WebAssembly/GISel/WebAssemblyPostLegalizerCombiner.cpp
M llvm/lib/Target/WebAssembly/GISel/WebAssemblyPreLegalizerCombiner.cpp
M llvm/lib/Target/WebAssembly/GISel/WebAssemblyRegisterBankInfo.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyAsmPrinter.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyDebugValueManager.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyFixFunctionBitcasts.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
M llvm/lib/Target/WebAssembly/WebAssemblyMachineFunctionInfo.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyTargetTransformInfo.cpp
M llvm/lib/Target/X86/GISel/X86InstructionSelector.cpp
M llvm/lib/Target/X86/GISel/X86PostLegalizerCombiner.cpp
M llvm/lib/Target/X86/GISel/X86PreLegalizerCombiner.cpp
M llvm/lib/Target/X86/X86CompressEVEX.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86InstrInfo.cpp
M llvm/lib/Target/X86/X86TargetTransformInfo.cpp
M llvm/lib/Target/X86/X86TargetTransformInfo.h
M llvm/lib/TargetParser/TargetParser.cpp
M llvm/lib/TargetParser/Triple.cpp
M llvm/lib/Transforms/Coroutines/CoroCleanup.cpp
M llvm/lib/Transforms/Coroutines/CoroElide.cpp
M llvm/lib/Transforms/Coroutines/CoroFrame.cpp
M llvm/lib/Transforms/Coroutines/Coroutines.cpp
M llvm/lib/Transforms/IPO/ExpandVariadics.cpp
M llvm/lib/Transforms/IPO/FunctionImport.cpp
M llvm/lib/Transforms/IPO/GlobalDCE.cpp
M llvm/lib/Transforms/IPO/GlobalOpt.cpp
M llvm/lib/Transforms/IPO/LowerTypeTests.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
M llvm/lib/Transforms/InstCombine/InstCombineInternal.h
M llvm/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp
M llvm/lib/Transforms/InstCombine/InstCombinePHI.cpp
M llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp
M llvm/lib/Transforms/Instrumentation/AddressSanitizer.cpp
M llvm/lib/Transforms/Instrumentation/InstrProfiling.cpp
M llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
M llvm/lib/Transforms/Instrumentation/PGOInstrumentation.cpp
M llvm/lib/Transforms/ObjCARC/DependencyAnalysis.cpp
M llvm/lib/Transforms/Scalar/ADCE.cpp
M llvm/lib/Transforms/Scalar/CorrelatedValuePropagation.cpp
M llvm/lib/Transforms/Scalar/DFAJumpThreading.cpp
M llvm/lib/Transforms/Scalar/LICM.cpp
M llvm/lib/Transforms/Scalar/LoopLoadElimination.cpp
M llvm/lib/Transforms/Scalar/LoopUnrollPass.cpp
M llvm/lib/Transforms/Scalar/LowerMatrixIntrinsics.cpp
M llvm/lib/Transforms/Scalar/SROA.cpp
M llvm/lib/Transforms/Scalar/SimpleLoopUnswitch.cpp
M llvm/lib/Transforms/Scalar/StructurizeCFG.cpp
M llvm/lib/Transforms/Utils/AMDGPUEmitPrintf.cpp
M llvm/lib/Transforms/Utils/BasicBlockUtils.cpp
M llvm/lib/Transforms/Utils/BreakCriticalEdges.cpp
M llvm/lib/Transforms/Utils/BypassSlowDivision.cpp
M llvm/lib/Transforms/Utils/InlineFunction.cpp
M llvm/lib/Transforms/Utils/Local.cpp
M llvm/lib/Transforms/Utils/LoopPeel.cpp
M llvm/lib/Transforms/Utils/LoopUnroll.cpp
M llvm/lib/Transforms/Utils/SimplifyCFG.cpp
M llvm/lib/Transforms/Utils/SimplifyLibCalls.cpp
M llvm/lib/Transforms/Vectorize/CMakeLists.txt
M llvm/lib/Transforms/Vectorize/LoopVectorizationLegality.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.h
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Passes/BottomUpVec.cpp
A llvm/lib/Transforms/Vectorize/SandboxVectorizer/Passes/LoadStoreVec.cpp
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Passes/PassRegistry.def
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/SandboxVectorizer.cpp
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/SandboxVectorizerPassBuilder.cpp
M llvm/lib/Transforms/Vectorize/VPlan.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanConstruction.cpp
M llvm/lib/Transforms/Vectorize/VPlanPatternMatch.h
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.h
M llvm/lib/Transforms/Vectorize/VPlanUnroll.cpp
M llvm/lib/Transforms/Vectorize/VPlanUtils.cpp
M llvm/lib/Transforms/Vectorize/VPlanUtils.h
M llvm/lib/Transforms/Vectorize/VectorCombine.cpp
M llvm/runtimes/CMakeLists.txt
M llvm/test/Analysis/CostModel/AMDGPU/log.ll
M llvm/test/Analysis/CostModel/AMDGPU/log10.ll
M llvm/test/Analysis/CostModel/AMDGPU/log2.ll
A llvm/test/Analysis/CostModel/AMDGPU/sin.ll
M llvm/test/Analysis/CostModel/AMDGPU/sqrt.ll
A llvm/test/Analysis/DependenceAnalysis/PR188098.ll
M llvm/test/Analysis/DependenceAnalysis/WeakCrossingSIV.ll
M llvm/test/Analysis/DependenceAnalysis/WeakZeroDstSIV.ll
M llvm/test/Analysis/DependenceAnalysis/WeakZeroSrcSIV.ll
M llvm/test/Analysis/DependenceAnalysis/exact-rdiv-addrec-wrap.ll
A llvm/test/Analysis/DependenceAnalysis/exact-rdiv-delta-overflow.ll
M llvm/test/Analysis/DependenceAnalysis/exact-siv-addrec-wrap.ll
M llvm/test/Analysis/DependenceAnalysis/exact-siv-overflow.ll
M llvm/test/Analysis/DependenceAnalysis/gcd-miv-overflow.ll
M llvm/test/Analysis/DependenceAnalysis/infer_affine_domain_ovlf.ll
M llvm/test/Analysis/DependenceAnalysis/non-monotonic.ll
M llvm/test/Analysis/DependenceAnalysis/rdiv-large-btc.ll
M llvm/test/Analysis/DependenceAnalysis/rdiv-minor-algebra.ll
M llvm/test/Analysis/DependenceAnalysis/run-specific-dependence-test.ll
M llvm/test/Analysis/DependenceAnalysis/strong-siv-addrec-wrap.ll
M llvm/test/Analysis/DependenceAnalysis/symbolic-rdiv-addrec-wrap.ll
M llvm/test/Analysis/DependenceAnalysis/symbolic-rdiv-overflow.ll
M llvm/test/Analysis/DependenceAnalysis/weak-crossing-siv-addrec-wrap.ll
M llvm/test/Analysis/DependenceAnalysis/weak-crossing-siv-delta-signed-min.ll
M llvm/test/Analysis/DependenceAnalysis/weak-crossing-siv-large-btc.ll
M llvm/test/Analysis/DependenceAnalysis/weak-crossing-siv-overflow.ll
A llvm/test/Analysis/DependenceAnalysis/weak-zero-siv-addrec-wrap.ll
M llvm/test/Analysis/DependenceAnalysis/weak-zero-siv-delta-signed-min.ll
M llvm/test/Analysis/LoopAccessAnalysis/invariant-dep-same-ptr.ll
M llvm/test/Analysis/LoopAccessAnalysis/pointer-phis.ll
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/always-uniform-gmir.mir
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/always-uniform.mir
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/never-uniform.mir
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/intrinsics.ll
A llvm/test/Assembler/structured-alloca.ll
A llvm/test/Bitcode/amdgpu-wmma-drop-ab-mods-upgrade-err.ll
A llvm/test/Bitcode/amdgpu-wmma-drop-ab-mods-upgrade.ll
M llvm/test/Bitcode/compatibility-3.6.ll
M llvm/test/Bitcode/compatibility-3.7.ll
M llvm/test/Bitcode/compatibility-3.8.ll
M llvm/test/Bitcode/compatibility-3.9.ll
M llvm/test/Bitcode/compatibility-4.0.ll
M llvm/test/Bitcode/compatibility-5.0.ll
M llvm/test/Bitcode/compatibility-6.0.ll
M llvm/test/Bitcode/compatibility.ll
M llvm/test/CMakeLists.txt
M llvm/test/CodeGen/AArch64/GlobalISel/combine-integer-ll.ll
M llvm/test/CodeGen/AArch64/GlobalISel/combine-integer.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-ctlz.mir
M llvm/test/CodeGen/AArch64/O0-pipeline.ll
M llvm/test/CodeGen/AArch64/O3-pipeline.ll
M llvm/test/CodeGen/AArch64/aarch64-condopt-unsigned.mir
M llvm/test/CodeGen/AArch64/abds-neg.ll
M llvm/test/CodeGen/AArch64/abdu-neg.ll
A llvm/test/CodeGen/AArch64/arc-contract-claim-rv.ll
M llvm/test/CodeGen/AArch64/cls.ll
M llvm/test/CodeGen/AArch64/dup.ll
M llvm/test/CodeGen/AArch64/emutls.ll
M llvm/test/CodeGen/AArch64/intrinsic-cttz-elts-sve.ll
M llvm/test/CodeGen/AArch64/intrinsic-cttz-elts.ll
A llvm/test/CodeGen/AArch64/is_fpclass-bfloat.ll
M llvm/test/CodeGen/AArch64/is_fpclass.ll
A llvm/test/CodeGen/AArch64/knownpow2-trunc-orzero.ll
M llvm/test/CodeGen/AArch64/logical-op-with-not.ll
M llvm/test/CodeGen/AArch64/memmove-inline.ll
M llvm/test/CodeGen/AArch64/neon-abd.ll
M llvm/test/CodeGen/AArch64/neon-bitwise-instructions.ll
M llvm/test/CodeGen/AArch64/pr61549.ll
M llvm/test/CodeGen/AArch64/rem-by-const.ll
M llvm/test/CodeGen/AArch64/sve-int-log.ll
M llvm/test/CodeGen/AArch64/sve-mask-partition.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/constant-bus-restriction.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-smax-64.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-smin-64.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-umax-64.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-umin-64.mir
A llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ctls.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ctlz.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fsqrt.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.div.fmas.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.div.scale.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.interp.inreg.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.sdot2.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.sdot4.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.sdot8.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.sudot4.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.sudot8.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.udot2.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.udot4.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.udot8.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.div.fmas.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.div.scale.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.ds.append.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.ds.bpermute.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.ds.consume.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.ds.ordered.add.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.ds.ordered.swap.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.ds.permute.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.lds.direct.load.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-block-addr.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-default.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/shufflevector-pointer-crash.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/shufflevector.ll
M llvm/test/CodeGen/AMDGPU/asyncmark-max-pregfx12.ll
M llvm/test/CodeGen/AMDGPU/asyncmark-pregfx12.ll
M llvm/test/CodeGen/AMDGPU/atomicrmw-expand.ll
M llvm/test/CodeGen/AMDGPU/basic-branch.ll
M llvm/test/CodeGen/AMDGPU/bb-prolog-spill-during-regalloc.ll
M llvm/test/CodeGen/AMDGPU/bf16-math.ll
M llvm/test/CodeGen/AMDGPU/blender-no-live-segment-at-def-implicit-def.ll
M llvm/test/CodeGen/AMDGPU/branch-folding-implicit-def-subreg.ll
M llvm/test/CodeGen/AMDGPU/bug-sdag-emitcopyfromreg.ll
M llvm/test/CodeGen/AMDGPU/call-constexpr.ll
M llvm/test/CodeGen/AMDGPU/call-skip.ll
M llvm/test/CodeGen/AMDGPU/cf-loop-on-constant.ll
M llvm/test/CodeGen/AMDGPU/clamp.ll
M llvm/test/CodeGen/AMDGPU/coexec-sched-effective-stall.mir
A llvm/test/CodeGen/AMDGPU/coexec-scheduler.ll
M llvm/test/CodeGen/AMDGPU/collapse-endcf.ll
M llvm/test/CodeGen/AMDGPU/constant-fold-imm-immreg.mir
M llvm/test/CodeGen/AMDGPU/constant-fold-mi-operands.ll
M llvm/test/CodeGen/AMDGPU/control-flow-fastregalloc.ll
M llvm/test/CodeGen/AMDGPU/cross-block-use-is-not-abi-copy.ll
A llvm/test/CodeGen/AMDGPU/ctls.ll
M llvm/test/CodeGen/AMDGPU/ctlz.ll
A llvm/test/CodeGen/AMDGPU/cttz-elts.ll
M llvm/test/CodeGen/AMDGPU/dagcombine-lshr-and-cmp.ll
A llvm/test/CodeGen/AMDGPU/dead-frame-index-dbg-value.ll
M llvm/test/CodeGen/AMDGPU/directive-amdgcn-target.ll
M llvm/test/CodeGen/AMDGPU/div_i128.ll
M llvm/test/CodeGen/AMDGPU/elf-header-flags-mach.ll
M llvm/test/CodeGen/AMDGPU/expert_scheduling_gfx12.mir
M llvm/test/CodeGen/AMDGPU/extract_vector_dynelt.ll
M llvm/test/CodeGen/AMDGPU/fabs.f64.ll
M llvm/test/CodeGen/AMDGPU/fabs.ll
M llvm/test/CodeGen/AMDGPU/flat-scratch-alloca-issue-155902.ll
M llvm/test/CodeGen/AMDGPU/fneg-fabs.f64.ll
M llvm/test/CodeGen/AMDGPU/fneg-fabs.ll
M llvm/test/CodeGen/AMDGPU/force-wait-after-always-gds.mir
M llvm/test/CodeGen/AMDGPU/fract-match.ll
M llvm/test/CodeGen/AMDGPU/fsqrt.f64.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fadd.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fmax.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fmin.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fsub.ll
M llvm/test/CodeGen/AMDGPU/indirect-addressing-si.ll
M llvm/test/CodeGen/AMDGPU/indirect-addressing-term.ll
M llvm/test/CodeGen/AMDGPU/insert-delay-alu-bug.ll
M llvm/test/CodeGen/AMDGPU/insert-delay-alu-wmma-xdl.mir
M llvm/test/CodeGen/AMDGPU/insert_vector_dynelt.ll
M llvm/test/CodeGen/AMDGPU/kernel-vgpr-spill-mubuf-with-voffset.ll
M llvm/test/CodeGen/AMDGPU/llc-pipeline-npm.ll
M llvm/test/CodeGen/AMDGPU/llc-pipeline.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.bvh8_intersect_ray.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.scalef32.pk.gfx950.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.div.fixup.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.div.fixup.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.dot4.f32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.append.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.bpermute.fi.b32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.bpermute.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.bvh.stack.push.pop.rtn.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.consume.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.gws.barrier-fastregalloc.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.ordered.add-errors.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.ordered.add.gfx10.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.ordered.add.gfx11.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.ordered.add.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.ordered.swap.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.permute.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.dual_intersect_ray.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.global.load.lds.err.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.global.load.lds.gfx950.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.global.load.lds.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.lds.direct.load.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.perm.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane16.var.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.buffer.atomic.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.buffer.atomic.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.buffer.atomic.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.atomic.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.tanh.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.udot2.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.update.dpp.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wmma.gfx1250.w32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wmma.imm.gfx1250.w32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wmma.imod.gfx1250.w32.ll
M llvm/test/CodeGen/AMDGPU/llvm.dbg.value.ll
M llvm/test/CodeGen/AMDGPU/llvm.is.fpclass.bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.is.fpclass.f16.ll
M llvm/test/CodeGen/AMDGPU/load-global-invariant.ll
M llvm/test/CodeGen/AMDGPU/load-store-cnt.ll
M llvm/test/CodeGen/AMDGPU/machine-sink-temporal-divergence-swdev407790.ll
M llvm/test/CodeGen/AMDGPU/mad-mix-lo.ll
M llvm/test/CodeGen/AMDGPU/memmove-param-combinations.ll
M llvm/test/CodeGen/AMDGPU/memmove-scalar-load.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-agent.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-cluster.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-lastuse.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-nontemporal.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-singlethread.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-system.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-volatile.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-wavefront.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-workgroup.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-agent.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-cluster.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-lastuse.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-nontemporal.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-singlethread.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-system.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-volatile.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-wavefront.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-workgroup.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-local-agent.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-local-cluster.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-local-nontemporal.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-local-singlethread.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-local-system.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-local-volatile.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-local-wavefront.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-local-workgroup.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-private-agent.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-private-cluster.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-private-lastuse.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-private-nontemporal.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-private-singlethread.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-private-system.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-private-volatile.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-private-wavefront.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-private-workgroup.ll
M llvm/test/CodeGen/AMDGPU/mfma-cd-select.ll
M llvm/test/CodeGen/AMDGPU/misched-into-wmma-hazard-shadow.mir
M llvm/test/CodeGen/AMDGPU/mixed-vmem-types.ll
A llvm/test/CodeGen/AMDGPU/multi-use-implicit-def.mir
M llvm/test/CodeGen/AMDGPU/partial-sgpr-to-vgpr-spills.ll
M llvm/test/CodeGen/AMDGPU/phi-av-pressure.ll
M llvm/test/CodeGen/AMDGPU/pr155452.ll
A llvm/test/CodeGen/AMDGPU/promote-alloca-proper-value-replacement.ll
M llvm/test/CodeGen/AMDGPU/promote-constOffset-to-imm.ll
M llvm/test/CodeGen/AMDGPU/r600.llvm.is.fpclass.ll
M llvm/test/CodeGen/AMDGPU/release-vgprs-gfx12-dvgpr.mir
M llvm/test/CodeGen/AMDGPU/release-vgprs-gfx12.mir
M llvm/test/CodeGen/AMDGPU/rem_i128.ll
M llvm/test/CodeGen/AMDGPU/rewrite-vgpr-mfma-to-agpr.ll
M llvm/test/CodeGen/AMDGPU/rsq.f64.ll
M llvm/test/CodeGen/AMDGPU/scalar_to_vector_v2x16.ll
M llvm/test/CodeGen/AMDGPU/schedule-pending-queue.mir
M llvm/test/CodeGen/AMDGPU/select-phi-s16-fp.ll
M llvm/test/CodeGen/AMDGPU/sgpr-spill-no-vgprs.ll
M llvm/test/CodeGen/AMDGPU/sgpr-spills-split-regalloc.ll
A llvm/test/CodeGen/AMDGPU/si-insert-hard-clauses-no-nesting.mir
M llvm/test/CodeGen/AMDGPU/si-lower-sgpr-spills.mir
M llvm/test/CodeGen/AMDGPU/smfmac_alloc_failure_no_agpr_O0.ll
M llvm/test/CodeGen/AMDGPU/sopk-no-literal.ll
M llvm/test/CodeGen/AMDGPU/spill-m0.ll
M llvm/test/CodeGen/AMDGPU/spill-vgpr-to-agpr-update-regscavenger.ll
M llvm/test/CodeGen/AMDGPU/spill-wide-sgpr.ll
M llvm/test/CodeGen/AMDGPU/spill_kill_v16.mir
M llvm/test/CodeGen/AMDGPU/spillv16.mir
M llvm/test/CodeGen/AMDGPU/stack-pointer-offset-relative-frameindex.ll
M llvm/test/CodeGen/AMDGPU/stacksave_stackrestore.ll
A llvm/test/CodeGen/AMDGPU/subreg-implicit-def.mir
M llvm/test/CodeGen/AMDGPU/swizzle.bit.extract.ll
M llvm/test/CodeGen/AMDGPU/trap-abis.ll
M llvm/test/CodeGen/AMDGPU/true16-fold.mir
M llvm/test/CodeGen/AMDGPU/true16-saveexec.mir
M llvm/test/CodeGen/AMDGPU/tuple-allocation-failure.ll
M llvm/test/CodeGen/AMDGPU/undef-handling-crash-in-ra.ll
M llvm/test/CodeGen/AMDGPU/vgpr-limit-gfx1250.ll
M llvm/test/CodeGen/AMDGPU/vgpr-lowering-gfx1250.mir
M llvm/test/CodeGen/AMDGPU/vgpr-set-msb-coissue.mir
M llvm/test/CodeGen/AMDGPU/vgpr-spill-placement-issue61083.ll
M llvm/test/CodeGen/AMDGPU/vgpr_constant_to_sgpr.ll
M llvm/test/CodeGen/AMDGPU/wait-xcnt-atomic-rmw-optimization.ll
M llvm/test/CodeGen/AMDGPU/waitcnt-loop-opt.mir
M llvm/test/CodeGen/AMDGPU/wmma-coexecution-valu-hazards.mir
M llvm/test/CodeGen/AMDGPU/wmma-hazards-gfx1250-w32.mir
M llvm/test/CodeGen/AMDGPU/wmma-nop-hoisting.mir
M llvm/test/CodeGen/AMDGPU/wwm-reserved-spill.ll
M llvm/test/CodeGen/AMDGPU/wwm-reserved.ll
M llvm/test/CodeGen/AMDGPU/zext-lid.ll
M llvm/test/CodeGen/ARM/GlobalISel/arm-legalize-bitcounts.mir
M llvm/test/CodeGen/ARM/O3-pipeline.ll
A llvm/test/CodeGen/ARM/emutls-alignment.ll
M llvm/test/CodeGen/DirectX/ShaderFlags/double-extensions.ll
A llvm/test/CodeGen/DirectX/fma.ll
A llvm/test/CodeGen/DirectX/group_memory_barrier.ll
M llvm/test/CodeGen/DirectX/group_memory_barrier_with_group_sync.ll
M llvm/test/CodeGen/DirectX/llc-pipeline.ll
M llvm/test/CodeGen/Generic/reloc-none.ll
A llvm/test/CodeGen/Hexagon/aligna-prologue-expansion.mir
A llvm/test/CodeGen/Hexagon/asm-operand-modifiers.ll
A llvm/test/CodeGen/Hexagon/asm-printer-cpool.ll
A llvm/test/CodeGen/Hexagon/cfgopt-newpt-invert.ll
A llvm/test/CodeGen/Hexagon/constext-store-imm.ll
A llvm/test/CodeGen/Hexagon/constprop-fp-cmp.ll
A llvm/test/CodeGen/Hexagon/gen-pred-andn-orn.ll
M llvm/test/CodeGen/Hexagon/memcpy-likely-aligned.ll
A llvm/test/CodeGen/Hexagon/peephole-sxtw-combine.mir
A llvm/test/CodeGen/Hexagon/qf-helpers-out-of-range.ll
A llvm/test/CodeGen/Hexagon/reg-info-types.ll
A llvm/test/CodeGen/Hexagon/sched-timing-classes.ll
A llvm/test/CodeGen/Hexagon/split-double-volatile.ll
A llvm/test/CodeGen/Hexagon/store-widen-subreg.mir
A llvm/test/CodeGen/Hexagon/target-objfile-sdata.ll
A llvm/test/CodeGen/Hexagon/tfr-cleanup-double-imm.mir
A llvm/test/CodeGen/Hexagon/vec-print-wq.ll
M llvm/test/CodeGen/Hexagon/xray-pred-ret.ll
M llvm/test/CodeGen/Hexagon/xray.ll
M llvm/test/CodeGen/LoongArch/is_fpclass_f32.ll
M llvm/test/CodeGen/LoongArch/is_fpclass_f64.ll
M llvm/test/CodeGen/LoongArch/lasx/issue170976.ll
M llvm/test/CodeGen/LoongArch/lsx/issue170976.ll
A llvm/test/CodeGen/LoongArch/mergestores.ll
M llvm/test/CodeGen/LoongArch/opt-pipeline.ll
M llvm/test/CodeGen/M68k/pipeline.ll
M llvm/test/CodeGen/MLRegAlloc/Inputs/reference-log-noml.txt
M llvm/test/CodeGen/MLRegAlloc/Inputs/reference-prio-log-noml.txt
M llvm/test/CodeGen/MLRegAlloc/dev-mode-logging.ll
M llvm/test/CodeGen/MLRegAlloc/dev-mode-prio-logging.ll
M llvm/test/CodeGen/PowerPC/O3-pipeline.ll
M llvm/test/CodeGen/PowerPC/atomics-regression.ll
M llvm/test/CodeGen/PowerPC/atomics.ll
A llvm/test/CodeGen/PowerPC/cttz-elts.ll
M llvm/test/CodeGen/PowerPC/fp-classify.ll
M llvm/test/CodeGen/PowerPC/ldst-16-byte.mir
M llvm/test/CodeGen/PowerPC/p10-spill-creq.ll
M llvm/test/CodeGen/PowerPC/p10-spill-crun.ll
M llvm/test/CodeGen/PowerPC/ppc64-P9-vabsd.ll
M llvm/test/CodeGen/PowerPC/vector-rotates.ll
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-ctls-rv32.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-ctls-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-ctlz-rv32.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-ctlz-rv64.mir
M llvm/test/CodeGen/RISCV/O3-pipeline.ll
M llvm/test/CodeGen/RISCV/abds-neg.ll
M llvm/test/CodeGen/RISCV/abdu-neg.ll
M llvm/test/CodeGen/RISCV/attributes.ll
M llvm/test/CodeGen/RISCV/branch_zero.ll
A llvm/test/CodeGen/RISCV/combine-is_fpclass.ll
M llvm/test/CodeGen/RISCV/features-info.ll
M llvm/test/CodeGen/RISCV/float-intrinsics.ll
M llvm/test/CodeGen/RISCV/memmove.ll
M llvm/test/CodeGen/RISCV/miss-sp-restore-eh.ll
M llvm/test/CodeGen/RISCV/opt-w-instrs-p-ext.mir
M llvm/test/CodeGen/RISCV/riscv-codegenprepare.ll
M llvm/test/CodeGen/RISCV/rv32p.ll
M llvm/test/CodeGen/RISCV/rv64p.ll
M llvm/test/CodeGen/RISCV/rvv/ceil-vp.ll
A llvm/test/CodeGen/RISCV/rvv/cttz-elts-scalarize.ll
M llvm/test/CodeGen/RISCV/rvv/cttz-elts.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-ceil-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-cttz-elts.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-floor-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fmaximum-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fminimum-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-llrint-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-lrint-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-nearbyint-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-reduction-formation.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-rint-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-round-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-roundeven-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-roundtozero-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfclass.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfmax-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfmin-vp.ll
M llvm/test/CodeGen/RISCV/rvv/floor-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fmaximum-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fminimum-vp.ll
M llvm/test/CodeGen/RISCV/rvv/llrint-vp.ll
M llvm/test/CodeGen/RISCV/rvv/lrint-vp.ll
M llvm/test/CodeGen/RISCV/rvv/nearbyint-vp.ll
M llvm/test/CodeGen/RISCV/rvv/rint-vp.ll
M llvm/test/CodeGen/RISCV/rvv/round-vp.ll
M llvm/test/CodeGen/RISCV/rvv/roundeven-vp.ll
M llvm/test/CodeGen/RISCV/rvv/roundtozero-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfclass-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfmax-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfmin-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vxrm-insert-out-of-loop.ll
A llvm/test/CodeGen/RISCV/spacemitx60-stack-reorder.ll
M llvm/test/CodeGen/RISCV/xqciac.ll
A llvm/test/CodeGen/SPIRV/SpecConstants/amdgcnspirv-feature-predicate-specconstant.ll
M llvm/test/CodeGen/SPIRV/debug-info/debug-compilation-unit.ll
M llvm/test/CodeGen/SPIRV/debug-info/debug-type-basic.ll
M llvm/test/CodeGen/SPIRV/debug-info/debug-type-pointer.ll
R llvm/test/CodeGen/SPIRV/debug-info/hlsl-debug-info-auto-activation.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_KHR_cooperative_matrix/cooperative_matrix.ll
A llvm/test/CodeGen/SPIRV/function/variadics-lowering-builtin-substr-in-name.ll
A llvm/test/CodeGen/SPIRV/hlsl-intrinsics/group_memory_barrier.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/group_memory_barrier_with_group_sync.ll
A llvm/test/CodeGen/SPIRV/hlsl-resources/CalculateLevelOfDetail.ll
M llvm/test/CodeGen/SPIRV/hlsl-resources/SampleErrorsDebug.ll
A llvm/test/CodeGen/SPIRV/instructions/phi-aggregate-loop.ll
M llvm/test/CodeGen/SPIRV/instructions/vector-shuffle.ll
M llvm/test/CodeGen/SPIRV/linked-list.ll
M llvm/test/CodeGen/SPIRV/llc-pipeline.ll
A llvm/test/CodeGen/SPIRV/llvm-intrinsics/bitreverse.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/bitreverse_small_type.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/memset.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/signed_arithmetic_overflow.ll
A llvm/test/CodeGen/SPIRV/loop-unroll-nonshader.ll
A llvm/test/CodeGen/SPIRV/opencl-cxx-version-2021.ll
A llvm/test/CodeGen/SPIRV/opencl-cxx-version-incompatible.ll
A llvm/test/CodeGen/SPIRV/opencl-cxx-version.ll
A llvm/test/CodeGen/SPIRV/opencl/nofpclass-fastmath-kernel-pre16.ll
A llvm/test/CodeGen/SPIRV/opencl/nofpclass-fastmath-non-extinst.ll
A llvm/test/CodeGen/SPIRV/opencl/nofpclass-fastmath.ll
A llvm/test/CodeGen/SPIRV/passes/SPIRVEmitIntrinsics-get-element-ptr.ll
A llvm/test/CodeGen/SPIRV/passes/SPIRVEmitIntrinsics-infer-fnptr-todo-type.ll
A llvm/test/CodeGen/SPIRV/passes/SPIRVEmitIntrinsics-infer-ptr-type.ll
A llvm/test/CodeGen/SPIRV/passes/SPIRVPrepareGlobals-predicate-id-string.ll
M llvm/test/CodeGen/SPIRV/pointers/PtrCast-in-OpSpecConstantOp.ll
M llvm/test/CodeGen/SPIRV/pointers/PtrCast-null-in-OpSpecConstantOp.ll
M llvm/test/CodeGen/SPIRV/pointers/fun-with-aggregate-arg-in-const-init.ll
M llvm/test/CodeGen/SPIRV/pointers/global-ptrtoint.ll
M llvm/test/CodeGen/SPIRV/pointers/phi-chain-types.ll
A llvm/test/CodeGen/SPIRV/pointers/store-array-of-vectors-to-vector.ll
M llvm/test/CodeGen/SPIRV/pointers/struct-opaque-pointers.ll
M llvm/test/CodeGen/SPIRV/printf.ll
M llvm/test/CodeGen/SPIRV/pstruct.ll
M llvm/test/CodeGen/SPIRV/spec_const_decoration.ll
M llvm/test/CodeGen/SPIRV/transcoding/ConvertPtrInGlobalInit.ll
M llvm/test/CodeGen/SPIRV/transcoding/OpVectorExtractDynamic.ll
M llvm/test/CodeGen/SPIRV/transcoding/block_w_struct_return.ll
M llvm/test/CodeGen/SPIRV/transcoding/extract_insert_value.ll
M llvm/test/CodeGen/SPIRV/transcoding/global_block.ll
M llvm/test/CodeGen/SystemZ/canonicalize-vars.ll
M llvm/test/CodeGen/Thumb2/2010-02-11-phi-cycle.ll
M llvm/test/CodeGen/WebAssembly/GlobalISel/gisel-commandline-option.ll
A llvm/test/CodeGen/WebAssembly/GlobalISel/instruction-select/bitwise.mir
A llvm/test/CodeGen/WebAssembly/GlobalISel/instruction-select/int-arithmetic.mir
A llvm/test/CodeGen/WebAssembly/GlobalISel/legalizer/add.mir
A llvm/test/CodeGen/WebAssembly/GlobalISel/regbankselect/bitwise.mir
A llvm/test/CodeGen/WebAssembly/GlobalISel/regbankselect/int-arithmetic.mir
A llvm/test/CodeGen/WebAssembly/call-wasm64.ll
M llvm/test/CodeGen/WebAssembly/call.ll
A llvm/test/CodeGen/WebAssembly/global-addrspace.ll
M llvm/test/CodeGen/WebAssembly/int-mac-reduction-loops.ll
M llvm/test/CodeGen/WebAssembly/partial-reduce-accumulate.ll
A llvm/test/CodeGen/WebAssembly/strided-int-mac.ll
A llvm/test/CodeGen/WebAssembly/swiftasync-coroutine.ll
A llvm/test/CodeGen/WebAssembly/swifttailcc-musttail-no-tailcall.ll
A llvm/test/CodeGen/WebAssembly/swifttailcc-no-tailcall.ll
A llvm/test/CodeGen/WebAssembly/swifttailcc.ll
M llvm/test/CodeGen/WebAssembly/wide-simd-mul.ll
M llvm/test/CodeGen/X86/GlobalISel/legalize-leading-zeros.mir
M llvm/test/CodeGen/X86/GlobalISel/select-insert-vec256.mir
M llvm/test/CodeGen/X86/GlobalISel/select-insert-vec512.mir
M llvm/test/CodeGen/X86/GlobalISel/select-merge-vec256.mir
M llvm/test/CodeGen/X86/GlobalISel/select-merge-vec512.mir
M llvm/test/CodeGen/X86/abds.ll
M llvm/test/CodeGen/X86/addcarry.ll
M llvm/test/CodeGen/X86/apx/adc.ll
M llvm/test/CodeGen/X86/apx/add.ll
M llvm/test/CodeGen/X86/apx/and.ll
M llvm/test/CodeGen/X86/apx/cmov.ll
A llvm/test/CodeGen/X86/apx/compress-evex-negative-nf.mir
M llvm/test/CodeGen/X86/apx/imul.ll
M llvm/test/CodeGen/X86/apx/or.ll
M llvm/test/CodeGen/X86/apx/reloc-opt.ll
M llvm/test/CodeGen/X86/apx/sbb.ll
M llvm/test/CodeGen/X86/apx/sub.ll
M llvm/test/CodeGen/X86/apx/xor.ll
A llvm/test/CodeGen/X86/dag-topological-sort.ll
M llvm/test/CodeGen/X86/int-to-fp-demanded.ll
M llvm/test/CodeGen/X86/intrinsic-cttz-elts.ll
M llvm/test/CodeGen/X86/is_fpclass.ll
M llvm/test/CodeGen/X86/isel-fpclass.ll
M llvm/test/CodeGen/X86/issue76416.ll
A llvm/test/CodeGen/X86/known-fpclass.ll
M llvm/test/CodeGen/X86/known-pow2.ll
M llvm/test/CodeGen/X86/llc-pipeline-npm.ll
M llvm/test/CodeGen/X86/machine-trace-metrics-crash.ll
A llvm/test/CodeGen/X86/multi-use-implicit-def.mir
M llvm/test/CodeGen/X86/opt-pipeline.ll
M llvm/test/CodeGen/X86/ragreedy-hoist-spill.ll
M llvm/test/CodeGen/X86/regalloc-advanced-split-cost.ll
M llvm/test/CodeGen/X86/srem-seteq-vec-nonsplat.ll
M llvm/test/CodeGen/X86/srem-vector-lkk.ll
M llvm/test/CodeGen/X86/statepoint-two-results.ll
M llvm/test/CodeGen/X86/statepoint-vreg-invoke.ll
M llvm/test/CodeGen/X86/subcarry.ll
M llvm/test/CodeGen/X86/tail-dup-merge-loop-headers.ll
M llvm/test/CodeGen/X86/urem-seteq-vec-nonsplat.ll
M llvm/test/CodeGen/X86/urem-vector-lkk.ll
M llvm/test/CodeGen/X86/vector-idiv-v2i32.ll
M llvm/test/CodeGen/X86/volatile-memstores-nooverlapping-load-stores.ll
M llvm/test/DebugInfo/AArch64/tls-at-location.ll
M llvm/test/DebugInfo/NVPTX/debug-addr-space.ll
M llvm/test/DebugInfo/NVPTX/debug-name-table.ll
A llvm/test/DebugInfo/X86/implicit-pointer-dwarf5.ll
A llvm/test/DebugInfo/X86/implicit-pointer-isel.ll
M llvm/test/Instrumentation/AddressSanitizer/remove-memory-effects.ll
M llvm/test/Instrumentation/HWAddressSanitizer/mem-attr.ll
M llvm/test/Instrumentation/MemorySanitizer/AArch64/aarch64-bf16-dotprod-intrinsics.ll
M llvm/test/Instrumentation/MemorySanitizer/AArch64/aarch64-matmul.ll
A llvm/test/Instrumentation/MemorySanitizer/Hexagon/hexagon.ll
A llvm/test/Instrumentation/MemorySanitizer/Hexagon/vararg-hexagon.ll
M llvm/test/Instrumentation/MemorySanitizer/X86/avx512vl-intrinsics.ll
M llvm/test/MC/AArch64/armv8.7a-xs.s
M llvm/test/MC/AArch64/armv8.9a-prfm-slc.s
M llvm/test/MC/AArch64/armv9.5a-tlbiw.s
M llvm/test/MC/AArch64/armv9.6a-pcdphint.s
M llvm/test/MC/AArch64/armv9a-tlbip.s
M llvm/test/MC/AArch64/basic-a64-instructions.s
M llvm/test/MC/AMDGPU/add-sub-no-carry.s
M llvm/test/MC/AMDGPU/dpp64.s
M llvm/test/MC/AMDGPU/ds-gfx9.s
M llvm/test/MC/AMDGPU/flat-scratch-st-mode.s
M llvm/test/MC/AMDGPU/gfx10-constant-bus.s
M llvm/test/MC/AMDGPU/gfx1011_err.s
M llvm/test/MC/AMDGPU/gfx1030_err.s
M llvm/test/MC/AMDGPU/gfx1030_unsupported.s
M llvm/test/MC/AMDGPU/gfx10_flat_instructions_err.s
M llvm/test/MC/AMDGPU/gfx10_unsupported.s
M llvm/test/MC/AMDGPU/gfx11_asm_mimg_err.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop2_fake16_err.s
M llvm/test/MC/AMDGPU/gfx11_unsupported.s
M llvm/test/MC/AMDGPU/gfx1250_asm_sop1.s
M llvm/test/MC/AMDGPU/gfx1250_asm_sopp_err.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vflat.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vimage.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop1_dpp16-fake16.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop1_dpp16.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop1_dpp8-fake16.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop1_dpp8.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop2.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3_dpp16-fake16.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3_dpp16.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3_dpp8-fake16.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3_dpp8.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3_from_vop1_dpp16-fake16.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3_from_vop1_dpp16.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3_from_vop1_dpp8-fake16.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3_from_vop1_dpp8.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3p.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3p_dpp16.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3p_dpp8.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vsample_err.s
M llvm/test/MC/AMDGPU/gfx1250_asm_wmma_w32.s
M llvm/test/MC/AMDGPU/gfx12_unsupported.s
M llvm/test/MC/AMDGPU/gfx7_unsupported.s
M llvm/test/MC/AMDGPU/gfx8_unsupported.s
M llvm/test/MC/AMDGPU/gfx9-asm-err.s
M llvm/test/MC/AMDGPU/gfx90a_err.s
M llvm/test/MC/AMDGPU/gfx942_err.s
M llvm/test/MC/AMDGPU/gfx942_unsupported.s
M llvm/test/MC/AMDGPU/gfx950_asm_features.s
M llvm/test/MC/AMDGPU/gfx950_asm_read_tr.s
M llvm/test/MC/AMDGPU/gfx950_asm_vop1.s
M llvm/test/MC/AMDGPU/gfx950_asm_vop3.s
M llvm/test/MC/AMDGPU/gfx950_err.s
M llvm/test/MC/AMDGPU/gfx9_4_generic_unsupported.s
M llvm/test/MC/AMDGPU/gfx9_unsupported.s
M llvm/test/MC/AMDGPU/literals.s
M llvm/test/MC/AMDGPU/literalv216.s
M llvm/test/MC/AMDGPU/mimg-err-gfx942.s
M llvm/test/MC/AMDGPU/mimg-err.s
M llvm/test/MC/AMDGPU/mubuf-gfx9.s
M llvm/test/MC/AMDGPU/reg-syntax-extra.s
M llvm/test/MC/AMDGPU/vop3-literal.s
M llvm/test/MC/AMDGPU/vopc-vi.s
M llvm/test/MC/Disassembler/AArch64/armv8.9a-prfm-slc.txt
M llvm/test/MC/Disassembler/AArch64/basic-a64-instructions.txt
M llvm/test/MC/ELF/relax-branch-align.s
M llvm/test/MC/RISCV/attribute-arch.s
M llvm/test/MC/RISCV/rv32p-valid.s
M llvm/test/MC/RISCV/rv64p-valid.s
M llvm/test/MC/RISCV/xqciac-valid.s
R llvm/test/MC/X86/align-branch-convergence.s
M llvm/test/Object/AMDGPU/elf-header-flags-mach.yaml
M llvm/test/Other/new-pm-defaults.ll
M llvm/test/Other/new-pm-thinlto-postlink-defaults.ll
M llvm/test/Other/new-pm-thinlto-postlink-pgo-defaults.ll
M llvm/test/Other/new-pm-thinlto-postlink-samplepgo-defaults.ll
M llvm/test/Other/new-pm-thinlto-prelink-defaults.ll
M llvm/test/Other/new-pm-thinlto-prelink-pgo-defaults.ll
M llvm/test/Other/new-pm-thinlto-prelink-samplepgo-defaults.ll
A llvm/test/TableGen/intrinsic-arginfo-error.td
A llvm/test/TableGen/intrinsic-overload-dependent-type-validation.td
M llvm/test/TableGen/intrinsic-struct.td
M llvm/test/TableGen/x86-instr-mapping.inc
M llvm/test/Transforms/Attributor/AMDGPU/nofpclass-amdgcn-fract.ll
M llvm/test/Transforms/CodeGenPrepare/AMDGPU/bypass-slow-div-debug-info-inseltpoison.ll
M llvm/test/Transforms/CodeGenPrepare/AMDGPU/bypass-slow-div-debug-info.ll
M llvm/test/Transforms/Coroutines/coro-heap-elide.ll
M llvm/test/Transforms/Coroutines/no-suspend.ll
M llvm/test/Transforms/InstCombine/binop-itofp.ll
A llvm/test/Transforms/InstCombine/fcmp-select-sign.ll
M llvm/test/Transforms/InstCombine/fcmp.ll
M llvm/test/Transforms/InstCombine/fmul.ll
A llvm/test/Transforms/InstCombine/printf-puts-not-emittable.ll
M llvm/test/Transforms/InstCombine/saturating-add-sub.ll
M llvm/test/Transforms/InstCombine/sitofp.ll
M llvm/test/Transforms/InstSimplify/constant-fold-fp-denormal.ll
M llvm/test/Transforms/LICM/hoist-binop.ll
M llvm/test/Transforms/LICM/preheader-safe.ll
M llvm/test/Transforms/LICM/read-only-calls.ll
M llvm/test/Transforms/LoadStoreVectorizer/AMDGPU/merge-vectors-complex.ll
A llvm/test/Transforms/LoopUnroll/RISCV/runtime-unroll-max-trip-count.ll
M llvm/test/Transforms/LoopUnroll/debug.ll
M llvm/test/Transforms/LoopUnroll/runtime-small-upperbound.ll
M llvm/test/Transforms/LoopVectorize/12-12-11-if-conv.ll
M llvm/test/Transforms/LoopVectorize/2012-10-20-infloop.ll
M llvm/test/Transforms/LoopVectorize/2012-10-22-isconsec.ll
M llvm/test/Transforms/LoopVectorize/AArch64/blend-costs.ll
M llvm/test/Transforms/LoopVectorize/AArch64/clamped-trip-count.ll
M llvm/test/Transforms/LoopVectorize/AArch64/conditional-branches-cost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/epilog-iv-select-cmp.ll
M llvm/test/Transforms/LoopVectorize/AArch64/epilog-vectorization-factors.ll
M llvm/test/Transforms/LoopVectorize/AArch64/epilog-vectorization-widen-inductions.ll
M llvm/test/Transforms/LoopVectorize/AArch64/epilogue-vectorization-fix-scalar-resume-values.ll
M llvm/test/Transforms/LoopVectorize/AArch64/fold-tail-low-trip-count.ll
M llvm/test/Transforms/LoopVectorize/AArch64/force-target-instruction-cost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/induction-costs-sve.ll
M llvm/test/Transforms/LoopVectorize/AArch64/load-cast-context.ll
M llvm/test/Transforms/LoopVectorize/AArch64/low_trip_count_predicates.ll
M llvm/test/Transforms/LoopVectorize/AArch64/masked-call-scalarize.ll
M llvm/test/Transforms/LoopVectorize/AArch64/maxbandwidth-regpressure.ll
M llvm/test/Transforms/LoopVectorize/AArch64/optsize_minsize.ll
M llvm/test/Transforms/LoopVectorize/AArch64/outer_loop_test1_no_explicit_vect_width.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-add-sdot-i16-i32.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-chained.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-fdot-product.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-no-dotprod.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-replicate-extends.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-sub-epilogue-vec.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-sub-sdot.ll
M llvm/test/Transforms/LoopVectorize/AArch64/pr60831-sve-inv-store-crash.ll
M llvm/test/Transforms/LoopVectorize/AArch64/predicated-costs.ll
M llvm/test/Transforms/LoopVectorize/AArch64/reduction-recurrence-costs-sve.ll
M llvm/test/Transforms/LoopVectorize/AArch64/replicating-load-store-costs-apple.ll
M llvm/test/Transforms/LoopVectorize/AArch64/replicating-load-store-costs.ll
M llvm/test/Transforms/LoopVectorize/AArch64/store-costs-sve.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-epilog-vect-inloop-reductions.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-epilog-vect-reductions.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-epilog-vect-strict-reductions.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-epilog-vect.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-epilog-vscale-fixed.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve2-histcnt-epilogue.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve2-histcnt.ll
M llvm/test/Transforms/LoopVectorize/AArch64/transform-narrow-interleave-fold-tail.ll
M llvm/test/Transforms/LoopVectorize/AArch64/transform-narrow-interleave-to-widen-memory-multi-block.ll
M llvm/test/Transforms/LoopVectorize/AArch64/transform-narrow-interleave-to-widen-memory-remove-loop-region.ll
M llvm/test/Transforms/LoopVectorize/AArch64/transform-narrow-interleave-to-widen-memory-scalable.ll
M llvm/test/Transforms/LoopVectorize/AArch64/vector-loop-backedge-elimination-epilogue.ll
M llvm/test/Transforms/LoopVectorize/AArch64/vector-reverse.ll
M llvm/test/Transforms/LoopVectorize/ARM/arm-unroll.ll
M llvm/test/Transforms/LoopVectorize/ARM/gcc-examples.ll
M llvm/test/Transforms/LoopVectorize/ARM/width-detect.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/reg-usage.ll
M llvm/test/Transforms/LoopVectorize/RISCV/low-trip-count.ll
M llvm/test/Transforms/LoopVectorize/RISCV/riscv-interleaved.ll
M llvm/test/Transforms/LoopVectorize/RISCV/strided-accesses.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vector-loop-backedge-elimination-with-evl.ll
M llvm/test/Transforms/LoopVectorize/SystemZ/force-target-instruction-cost.ll
A llvm/test/Transforms/LoopVectorize/VPlan/dissolve-replicate-regions.ll
M llvm/test/Transforms/LoopVectorize/VPlan/interleave-and-scalarize-only.ll
M llvm/test/Transforms/LoopVectorize/VPlan/vplan-dot-printing.ll
M llvm/test/Transforms/LoopVectorize/VPlan/vplan-iv-transforms.ll
M llvm/test/Transforms/LoopVectorize/VPlan/vplan-predicate-switch.ll
M llvm/test/Transforms/LoopVectorize/VPlan/vplan-printing.ll
M llvm/test/Transforms/LoopVectorize/VPlan/vplan-stress-test-no-explict-vf.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/strided-load-i16.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/strided-load-i32.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/strided-load-i64.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/strided-load-i8.ll
M llvm/test/Transforms/LoopVectorize/X86/avx1.ll
M llvm/test/Transforms/LoopVectorize/X86/consecutive-ptr-uniforms.ll
M llvm/test/Transforms/LoopVectorize/X86/constant-fold.ll
M llvm/test/Transforms/LoopVectorize/X86/conversion-cost.ll
M llvm/test/Transforms/LoopVectorize/X86/cost-conditional-branches.ll
M llvm/test/Transforms/LoopVectorize/X86/cost-model.ll
M llvm/test/Transforms/LoopVectorize/X86/drop-poison-generating-flags.ll
M llvm/test/Transforms/LoopVectorize/X86/epilog-vectorization-ordered-reduction.ll
M llvm/test/Transforms/LoopVectorize/X86/fixed-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/X86/gather_scatter.ll
M llvm/test/Transforms/LoopVectorize/X86/gcc-examples.ll
M llvm/test/Transforms/LoopVectorize/X86/illegal-parallel-loop-uniform-write.ll
M llvm/test/Transforms/LoopVectorize/X86/induction-costs.ll
M llvm/test/Transforms/LoopVectorize/X86/int128_no_gather.ll
M llvm/test/Transforms/LoopVectorize/X86/interleave_short_tc.ll
M llvm/test/Transforms/LoopVectorize/X86/load-deref-pred.ll
M llvm/test/Transforms/LoopVectorize/X86/min-trip-count-switch.ll
M llvm/test/Transforms/LoopVectorize/X86/outer_loop_test1_no_explicit_vect_width.ll
M llvm/test/Transforms/LoopVectorize/X86/parallel-loops-after-reg2mem.ll
M llvm/test/Transforms/LoopVectorize/X86/parallel-loops.ll
M llvm/test/Transforms/LoopVectorize/X86/pr109581-unused-blend.ll
M llvm/test/Transforms/LoopVectorize/X86/pr55096-scalarize-add.ll
M llvm/test/Transforms/LoopVectorize/X86/small-size.ll
M llvm/test/Transforms/LoopVectorize/X86/tail_folding_and_assume_safety.ll
M llvm/test/Transforms/LoopVectorize/X86/transform-narrow-interleave-to-widen-memory-epilogue-vec.ll
M llvm/test/Transforms/LoopVectorize/X86/unroll-pm.ll
M llvm/test/Transforms/LoopVectorize/X86/unroll-small-loops.ll
M llvm/test/Transforms/LoopVectorize/X86/unroll_selection.ll
M llvm/test/Transforms/LoopVectorize/X86/veclib-calls.ll
M llvm/test/Transforms/LoopVectorize/X86/vectorization-remarks-missed.ll
M llvm/test/Transforms/LoopVectorize/X86/vectorization-remarks-profitable.ll
M llvm/test/Transforms/LoopVectorize/X86/x86-interleaved-accesses-masked-group.ll
M llvm/test/Transforms/LoopVectorize/X86/x86-interleaved-store-accesses-with-gaps.ll
M llvm/test/Transforms/LoopVectorize/align.ll
M llvm/test/Transforms/LoopVectorize/as_cast.ll
M llvm/test/Transforms/LoopVectorize/bzip_reverse_loops.ll
M llvm/test/Transforms/LoopVectorize/calloc.ll
M llvm/test/Transforms/LoopVectorize/cast-induction.ll
M llvm/test/Transforms/LoopVectorize/consecutive-ptr-uniforms.ll
M llvm/test/Transforms/LoopVectorize/constant-fold-commutative-and.ll
M llvm/test/Transforms/LoopVectorize/constantfolder.ll
M llvm/test/Transforms/LoopVectorize/cpp-new-array.ll
M llvm/test/Transforms/LoopVectorize/cse-casts.ll
M llvm/test/Transforms/LoopVectorize/debugloc.ll
M llvm/test/Transforms/LoopVectorize/dont-fold-tail-for-divisible-TC.ll
M llvm/test/Transforms/LoopVectorize/epilog-vectorization-reductions.ll
M llvm/test/Transforms/LoopVectorize/find-last-iv-interleave.ll
M llvm/test/Transforms/LoopVectorize/find-last-iv-sinkable-load.ll
M llvm/test/Transforms/LoopVectorize/find-last.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence-with-uniform-ops.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/float-induction.ll
M llvm/test/Transforms/LoopVectorize/float-reduction.ll
M llvm/test/Transforms/LoopVectorize/gcc-examples.ll
M llvm/test/Transforms/LoopVectorize/hoist-and-sink-mem-ops-with-invariant-pointers.ll
M llvm/test/Transforms/LoopVectorize/hoist-predicated-loads-with-predicated-stores.ll
M llvm/test/Transforms/LoopVectorize/i8-induction.ll
M llvm/test/Transforms/LoopVectorize/if-conv-crash.ll
M llvm/test/Transforms/LoopVectorize/if-conversion-reduction.ll
M llvm/test/Transforms/LoopVectorize/if-conversion.ll
M llvm/test/Transforms/LoopVectorize/if-pred-stores.ll
M llvm/test/Transforms/LoopVectorize/increment.ll
M llvm/test/Transforms/LoopVectorize/induction.ll
M llvm/test/Transforms/LoopVectorize/interleaved-accesses-pred-stores.ll
M llvm/test/Transforms/LoopVectorize/iv-select-cmp-decreasing.ll
M llvm/test/Transforms/LoopVectorize/iv-select-cmp-non-const-iv-start.ll
M llvm/test/Transforms/LoopVectorize/iv-select-cmp.ll
M llvm/test/Transforms/LoopVectorize/iv_outside_user.ll
M llvm/test/Transforms/LoopVectorize/lcssa-crashes.ll
M llvm/test/Transforms/LoopVectorize/load-deref-pred-align.ll
M llvm/test/Transforms/LoopVectorize/load-deref-pred-poison-ub-ops-feeding-pointer.ll
M llvm/test/Transforms/LoopVectorize/loop-form.ll
M llvm/test/Transforms/LoopVectorize/loop-legality-checks-remarks.ll
M llvm/test/Transforms/LoopVectorize/memdep-fold-tail.ll
M llvm/test/Transforms/LoopVectorize/memdep.ll
M llvm/test/Transforms/LoopVectorize/metadata-unroll.ll
M llvm/test/Transforms/LoopVectorize/metadata-width.ll
M llvm/test/Transforms/LoopVectorize/multiple-address-spaces.ll
M llvm/test/Transforms/LoopVectorize/no_int_induction.ll
M llvm/test/Transforms/LoopVectorize/no_outside_user.ll
A llvm/test/Transforms/LoopVectorize/noalias-scope-decl-outer-loop.ll
M llvm/test/Transforms/LoopVectorize/non-const-n.ll
A llvm/test/Transforms/LoopVectorize/non-widenable-intrinsics-outer-loop.ll
M llvm/test/Transforms/LoopVectorize/outer_loop_test1.ll
M llvm/test/Transforms/LoopVectorize/outer_loop_test2.ll
M llvm/test/Transforms/LoopVectorize/pointer-induction.ll
M llvm/test/Transforms/LoopVectorize/pr30654-phiscev-sext-trunc.ll
M llvm/test/Transforms/LoopVectorize/pr32859.ll
M llvm/test/Transforms/LoopVectorize/pr37248.ll
M llvm/test/Transforms/LoopVectorize/pr45679-fold-tail-by-masking.ll
M llvm/test/Transforms/LoopVectorize/pr66616.ll
M llvm/test/Transforms/LoopVectorize/predicate-switch.ll
M llvm/test/Transforms/LoopVectorize/predicated-multiple-exits.ll
M llvm/test/Transforms/LoopVectorize/pseudoprobe.ll
M llvm/test/Transforms/LoopVectorize/ptr_loops.ll
M llvm/test/Transforms/LoopVectorize/read-only.ll
M llvm/test/Transforms/LoopVectorize/reduction-minmax-users-and-predicated.ll
M llvm/test/Transforms/LoopVectorize/runtime-check-address-space.ll
M llvm/test/Transforms/LoopVectorize/runtime-check-readonly-address-space.ll
M llvm/test/Transforms/LoopVectorize/runtime-check.ll
M llvm/test/Transforms/LoopVectorize/same-base-access.ll
M llvm/test/Transforms/LoopVectorize/scalar-select.ll
M llvm/test/Transforms/LoopVectorize/select-cmp-multiuse.ll
M llvm/test/Transforms/LoopVectorize/simple-unroll.ll
M llvm/test/Transforms/LoopVectorize/single-early-exit-cond-poison.ll
M llvm/test/Transforms/LoopVectorize/small-loop.ll
M llvm/test/Transforms/LoopVectorize/start-non-zero.ll
M llvm/test/Transforms/LoopVectorize/struct-return-replicate.ll
M llvm/test/Transforms/LoopVectorize/struct-return.ll
M llvm/test/Transforms/LoopVectorize/struct_access.ll
M llvm/test/Transforms/LoopVectorize/tail-folding-alloca-in-loop.ll
M llvm/test/Transforms/LoopVectorize/tail-folding-div.ll
M llvm/test/Transforms/LoopVectorize/tail-folding-masked-mem-opts.ll
M llvm/test/Transforms/LoopVectorize/tail-folding-optimize-vector-induction-width.ll
M llvm/test/Transforms/LoopVectorize/tail-folding-switch.ll
M llvm/test/Transforms/LoopVectorize/tail-folding-vectorization-factor-1.ll
M llvm/test/Transforms/LoopVectorize/trip-count-expansion-may-introduce-ub.ll
M llvm/test/Transforms/LoopVectorize/unroll-novec-memcheck-metadata.ll
M llvm/test/Transforms/LoopVectorize/unroll_novec.ll
M llvm/test/Transforms/LoopVectorize/use-scalar-epilogue-if-tp-fails.ll
M llvm/test/Transforms/LoopVectorize/vector-loop-backedge-elimination-early-exit.ll
M llvm/test/Transforms/LoopVectorize/vector-loop-backedge-elimination.ll
M llvm/test/Transforms/LoopVectorize/write-only.ll
A llvm/test/Transforms/LowerMatrixIntrinsics/multiply-fused-differing-addr-spaces.ll
A llvm/test/Transforms/LowerMatrixIntrinsics/multiply-fused-tile-size-0.ll
A llvm/test/Transforms/ObjCARC/sink-past-atomic.ll
M llvm/test/Transforms/PhaseOrdering/ARM/arm_var_q31.ll
A llvm/test/Transforms/PhaseOrdering/RISCV/any-of-vectorization.ll
A llvm/test/Transforms/PhaseOrdering/RISCV/lit.local.cfg
M llvm/test/Transforms/PhaseOrdering/X86/avg.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/externally-used-copyables.ll
A llvm/test/Transforms/SLPVectorizer/AArch64/fma-conversion-multi-use-guard.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/unprofitable-alternate-subtree.ll
M llvm/test/Transforms/SLPVectorizer/NVPTX/v2f16.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/shuffled-gather-casted.ll
A llvm/test/Transforms/SLPVectorizer/X86/constant-based-reductions.ll
M llvm/test/Transforms/SLPVectorizer/X86/copyable-operands-reordering.ll
A llvm/test/Transforms/SLPVectorizer/X86/non-reduced-select-of-bits.ll
M llvm/test/Transforms/SLPVectorizer/X86/parent-node-non-schedulable.ll
M llvm/test/Transforms/SROA/vector-promotion-via-tree-structure-merge.ll
A llvm/test/Transforms/SampleProfile/pseudo-probe-emit-macho.ll
A llvm/test/Transforms/SandboxVectorizer/load_store_vec.ll
A llvm/test/Transforms/SimplifyCFG/branch-weight-disjunction-overflow.ll
M llvm/test/Transforms/VectorCombine/AArch64/shuffletoidentity.ll
A llvm/test/Transforms/VectorCombine/LoongArch/lit.local.cfg
A llvm/test/Transforms/VectorCombine/LoongArch/shuffle-identity-miscompile.ll
A llvm/test/Verifier/structured-alloca-bad.ll
M llvm/test/tools/UpdateTestChecks/update_analyze_test_checks/Inputs/loop-distribute.ll.expected
A llvm/test/tools/llvm-debuginfo-analyzer/COFF/07-coff-regrel-indir.test
A llvm/test/tools/llvm-debuginfo-analyzer/COFF/Inputs/defrange-regrel-indir-clang.yaml
M llvm/test/tools/llvm-mca/AArch64/A64FX/A64-basic-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Ampere/Ampere1B/basic-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Apple/M1-basic-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Cortex/A320-basic-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Cortex/A510-basic-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Cortex/A55-basic-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Cortex/A57-basic-instructions.s
M llvm/test/tools/llvm-mca/AArch64/HiSilicon/tsv110-basic-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Inputs/basic-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/N1-basic-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/N2-basic-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/N3-basic-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/V1-basic-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/V2-basic-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/V3-basic-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/V3AE-basic-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Olympus/basic-instructions.s
A llvm/test/tools/llvm-mca/RISCV/SiFiveP600/atomic.test
R llvm/test/tools/llvm-mca/RISCV/SiFiveP600/div.s
A llvm/test/tools/llvm-mca/RISCV/SiFiveP600/floating-point.test
A llvm/test/tools/llvm-mca/RISCV/SiFiveP600/integer.test
R llvm/test/tools/llvm-mca/RISCV/SiFiveP600/load.s
R llvm/test/tools/llvm-mca/RISCV/SiFiveP600/mask.s
R llvm/test/tools/llvm-mca/RISCV/SiFiveP600/mul-cpop.s
A llvm/test/tools/llvm-mca/RISCV/SiFiveP600/mul-div.test
A llvm/test/tools/llvm-mca/RISCV/SiFiveP600/rvv/arithmetic.test
A llvm/test/tools/llvm-mca/RISCV/SiFiveP600/rvv/bitwise.test
A llvm/test/tools/llvm-mca/RISCV/SiFiveP600/rvv/comparison.test
A llvm/test/tools/llvm-mca/RISCV/SiFiveP600/rvv/conversion.test
A llvm/test/tools/llvm-mca/RISCV/SiFiveP600/rvv/fma.test
A llvm/test/tools/llvm-mca/RISCV/SiFiveP600/rvv/fp.test
A llvm/test/tools/llvm-mca/RISCV/SiFiveP600/rvv/mask.test
A llvm/test/tools/llvm-mca/RISCV/SiFiveP600/rvv/minmax.test
A llvm/test/tools/llvm-mca/RISCV/SiFiveP600/rvv/mul-div.test
A llvm/test/tools/llvm-mca/RISCV/SiFiveP600/rvv/permutation.test
A llvm/test/tools/llvm-mca/RISCV/SiFiveP600/rvv/reduction.test
A llvm/test/tools/llvm-mca/RISCV/SiFiveP600/rvv/vle-vse-vlm.test
A llvm/test/tools/llvm-mca/RISCV/SiFiveP600/rvv/vlse-vsse.test
A llvm/test/tools/llvm-mca/RISCV/SiFiveP600/rvv/vlseg-vsseg.test
A llvm/test/tools/llvm-mca/RISCV/SiFiveP600/rvv/vlxe-vsxe.test
A llvm/test/tools/llvm-mca/RISCV/SiFiveP600/rvv/zvbb.s
A llvm/test/tools/llvm-mca/RISCV/SiFiveP600/rvv/zvbc.test
A llvm/test/tools/llvm-mca/RISCV/SiFiveP600/rvv/zvkg.s
A llvm/test/tools/llvm-mca/RISCV/SiFiveP600/rvv/zvkned.s
A llvm/test/tools/llvm-mca/RISCV/SiFiveP600/rvv/zvknhb.s
A llvm/test/tools/llvm-mca/RISCV/SiFiveP600/rvv/zvksed.s
A llvm/test/tools/llvm-mca/RISCV/SiFiveP600/rvv/zvksh.s
R llvm/test/tools/llvm-mca/RISCV/SiFiveP600/vle-vse-vlm.s
R llvm/test/tools/llvm-mca/RISCV/SiFiveP600/vlse-vsse.s
R llvm/test/tools/llvm-mca/RISCV/SiFiveP600/vlseg-vsseg.s
R llvm/test/tools/llvm-mca/RISCV/SiFiveP600/vlxe-vsxe.s
R llvm/test/tools/llvm-mca/RISCV/SiFiveP600/vmv.s
A llvm/test/tools/llvm-mca/RISCV/SiFiveP600/zba.test
A llvm/test/tools/llvm-mca/RISCV/SiFiveP600/zbb.test
A llvm/test/tools/llvm-mca/RISCV/SiFiveP600/zbs.test
A llvm/test/tools/llvm-mca/RISCV/SiFiveP600/zfhmin.test
R llvm/test/tools/llvm-mca/RISCV/SiFiveP600/zvbb.s
R llvm/test/tools/llvm-mca/RISCV/SiFiveP600/zvbc.s
R llvm/test/tools/llvm-mca/RISCV/SiFiveP600/zvkg.s
R llvm/test/tools/llvm-mca/RISCV/SiFiveP600/zvkned.s
R llvm/test/tools/llvm-mca/RISCV/SiFiveP600/zvknhb.s
R llvm/test/tools/llvm-mca/RISCV/SiFiveP600/zvksed.s
R llvm/test/tools/llvm-mca/RISCV/SiFiveP600/zvksh.s
M llvm/test/tools/llvm-objdump/ELF/AMDGPU/subtarget.ll
M llvm/test/tools/llvm-readobj/ELF/AMDGPU/elf-headers.test
M llvm/tools/llc/llc.cpp
M llvm/tools/llubi/lib/CMakeLists.txt
A llvm/tools/llubi/lib/ExecutorBase.cpp
A llvm/tools/llubi/lib/ExecutorBase.h
M llvm/tools/llubi/lib/Interpreter.cpp
M llvm/tools/llvm-c-test/echo.cpp
M llvm/tools/llvm-jitlink/llvm-jitlink.cpp
M llvm/tools/llvm-jitlink/llvm-jitlink.h
M llvm/tools/llvm-lto2/llvm-lto2.cpp
M llvm/tools/llvm-objdump/MachODump.cpp
M llvm/tools/llvm-objdump/llvm-objdump.cpp
M llvm/tools/llvm-size/llvm-size.cpp
M llvm/unittests/ADT/APIntTest.cpp
M llvm/unittests/Analysis/CFGTest.cpp
M llvm/unittests/BinaryFormat/MsgPackDocumentTest.cpp
M llvm/unittests/CodeGen/GlobalISel/LegalizerHelperTest.cpp
M llvm/unittests/CodeGen/RematerializerTest.cpp
M llvm/unittests/DebugInfo/GSYM/GSYMTest.cpp
M llvm/unittests/DebugInfo/PDB/CMakeLists.txt
A llvm/unittests/DebugInfo/PDB/TpiStreamTest.cpp
M llvm/unittests/ExecutionEngine/Orc/CMakeLists.txt
A llvm/unittests/ExecutionEngine/Orc/LinkGraphLinkingLayerTest.cpp
M llvm/unittests/ExecutionEngine/Orc/ObjectLinkingLayerTest.cpp
M llvm/unittests/ExecutionEngine/Orc/OrcTestCommon.h
M llvm/unittests/IR/CFGBuilder.cpp
M llvm/unittests/IR/PatternMatch.cpp
M llvm/unittests/Support/CommandLineTest.cpp
M llvm/unittests/Support/DataExtractorTest.cpp
M llvm/unittests/Target/AArch64/AArch64SelectionDAGTest.cpp
M llvm/unittests/Target/AMDGPU/CMakeLists.txt
A llvm/unittests/Target/AMDGPU/UniformityAnalysisTest.cpp
M llvm/unittests/TargetParser/RISCVISAInfoTest.cpp
M llvm/unittests/TargetParser/RISCVTargetParserTest.cpp
M llvm/unittests/Transforms/Utils/BasicBlockUtilsTest.cpp
M llvm/unittests/Transforms/Vectorize/SandboxVectorizer/VecUtilsTest.cpp
M llvm/utils/TableGen/X86InstrMappingEmitter.cpp
M llvm/utils/gn/secondary/clang-tools-extra/clang-tidy/performance/BUILD.gn
A llvm/utils/gn/secondary/clang-tools-extra/clangd/remap/BUILD.gn
M llvm/utils/gn/secondary/clang-tools-extra/clangd/test/BUILD.gn
M llvm/utils/gn/secondary/clang-tools-extra/unittests/clang-tidy/BUILD.gn
M llvm/utils/gn/secondary/clang/lib/Driver/BUILD.gn
M llvm/utils/gn/secondary/clang/lib/FrontendTool/BUILD.gn
M llvm/utils/gn/secondary/clang/lib/Headers/BUILD.gn
M llvm/utils/gn/secondary/clang/lib/ScalableStaticAnalysisFramework/Analyses/BUILD.gn
M llvm/utils/gn/secondary/clang/unittests/Format/BUILD.gn
M llvm/utils/gn/secondary/clang/unittests/ScalableStaticAnalysisFramework/BUILD.gn
M llvm/utils/gn/secondary/compiler-rt/lib/builtins/BUILD.gn
M llvm/utils/gn/secondary/compiler-rt/lib/sanitizer_common/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/Target/NVPTX/BUILD.gn
M llvm/utils/gn/secondary/llvm/unittests/ExecutionEngine/Orc/BUILD.gn
M llvm/utils/gn/secondary/llvm/unittests/Target/AMDGPU/BUILD.gn
M llvm/utils/lit/lit/TestRunner.py
M mlir/docs/Bindings/Python.md
M mlir/docs/DefiningDialects/Operations.md
M mlir/docs/Interfaces.md
M mlir/docs/Tools/mlir-reduce.md
M mlir/include/mlir-c/Dialect/LLVM.h
M mlir/include/mlir-c/ExtensibleDialect.h
M mlir/include/mlir-c/IR.h
M mlir/include/mlir/Bindings/Python/IRCore.h
M mlir/include/mlir/Bindings/Python/NanobindUtils.h
A mlir/include/mlir/Bindings/Python/PythonBindings.td
A mlir/include/mlir/Bytecode/BytecodeDialectInterface.td
M mlir/include/mlir/Bytecode/BytecodeImplementation.h
M mlir/include/mlir/Bytecode/CMakeLists.txt
M mlir/include/mlir/Conversion/CMakeLists.txt
A mlir/include/mlir/Conversion/ConvertToEmitC/CMakeLists.txt
A mlir/include/mlir/Conversion/ConvertToEmitC/ConvertToEmitCPatternInterface.td
M mlir/include/mlir/Conversion/ConvertToEmitC/ToEmitCInterface.h
M mlir/include/mlir/Conversion/Passes.td
M mlir/include/mlir/Dialect/AMDGPU/IR/AMDGPUAttrs.td
M mlir/include/mlir/Dialect/AMDGPU/IR/AMDGPUEnums.td
M mlir/include/mlir/Dialect/AMDGPU/IR/AMDGPUOps.td
M mlir/include/mlir/Dialect/Affine/IR/AffineOps.td
M mlir/include/mlir/Dialect/Affine/Transforms/Passes.td
M mlir/include/mlir/Dialect/Affine/Transforms/Transforms.h
M mlir/include/mlir/Dialect/GPU/IR/GPUOps.td
M mlir/include/mlir/Dialect/LLVMIR/LLVMAttrDefs.td
M mlir/include/mlir/Dialect/LLVMIR/LLVMDialectBytecode.td
M mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td
M mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
M mlir/include/mlir/Dialect/LLVMIR/ROCDLOps.td
M mlir/include/mlir/Dialect/MemRef/IR/MemRef.h
M mlir/include/mlir/Dialect/MemRef/IR/MemRefOps.td
M mlir/include/mlir/Dialect/OpenACC/OpenACC.h
A mlir/include/mlir/Dialect/OpenACC/OpenACCAttributes.td
M mlir/include/mlir/Dialect/OpenACC/OpenACCOps.td
M mlir/include/mlir/Dialect/OpenACC/OpenACCTypeInterfaces.td
M mlir/include/mlir/Dialect/OpenACC/OpenACCUtils.h
A mlir/include/mlir/Dialect/OpenACC/OpenACCVariableInfo.h
M mlir/include/mlir/Dialect/OpenMP/OpenMPClauses.td
M mlir/include/mlir/Dialect/OpenMP/OpenMPOps.td
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVBase.td
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVTosaOps.td
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVTosaTypes.td
M mlir/include/mlir/Dialect/SPIRV/IR/TargetAndABI.h
M mlir/include/mlir/Dialect/SparseTensor/Pipelines/Passes.h
M mlir/include/mlir/Dialect/Tosa/IR/TosaShapeOps.td
M mlir/include/mlir/Dialect/Transform/IR/TransformDialect.h
M mlir/include/mlir/Dialect/Vector/IR/VectorOps.td
M mlir/include/mlir/Dialect/XeGPU/IR/XeGPUOps.td
M mlir/include/mlir/Dialect/XeGPU/IR/XeGPUTypes.td
M mlir/include/mlir/Dialect/XeGPU/Transforms/XeGPULayoutImpl.h
M mlir/include/mlir/Dialect/XeGPU/Utils/XeGPUUtils.h
M mlir/include/mlir/IR/AffineMap.h
M mlir/include/mlir/IR/BlockSupport.h
M mlir/include/mlir/IR/BuiltinAttributes.td
M mlir/include/mlir/IR/ExtensibleDialect.h
M mlir/include/mlir/IR/OpDefinition.h
M mlir/include/mlir/IR/OpImplementation.h
M mlir/include/mlir/IR/Operation.h
M mlir/include/mlir/IR/OperationSupport.h
M mlir/include/mlir/IR/TypeRange.h
M mlir/include/mlir/IR/Value.h
M mlir/include/mlir/IR/ValueRange.h
M mlir/include/mlir/Interfaces/InferTypeOpInterface.td
M mlir/include/mlir/Interfaces/SideEffectInterfaces.h
A mlir/include/mlir/Interfaces/Utils/MemorySlotUtils.h
M mlir/include/mlir/Interfaces/ValueBoundsOpInterface.h
M mlir/include/mlir/Support/LLVM.h
M mlir/include/mlir/Transforms/Passes.td
M mlir/lib/Analysis/FlatLinearValueConstraints.cpp
M mlir/lib/AsmParser/Parser.cpp
M mlir/lib/Bindings/Python/IRCore.cpp
M mlir/lib/CAPI/Dialect/LLVM.cpp
M mlir/lib/CAPI/IR/ExtensibleDialect.cpp
M mlir/lib/CAPI/IR/IR.cpp
M mlir/lib/CAPI/Interfaces/Interfaces.cpp
M mlir/lib/Conversion/AMDGPUToROCDL/AMDGPUToROCDL.cpp
M mlir/lib/Conversion/ArithToEmitC/ArithToEmitC.cpp
M mlir/lib/Conversion/ArithToLLVM/ArithToLLVM.cpp
M mlir/lib/Conversion/ArithToSPIRV/ArithToSPIRV.cpp
M mlir/lib/Conversion/ConvertToEmitC/CMakeLists.txt
M mlir/lib/Conversion/FuncToEmitC/FuncToEmitC.cpp
M mlir/lib/Conversion/FuncToLLVM/FuncToLLVM.cpp
M mlir/lib/Conversion/GPUCommon/GPUOpsLowering.cpp
M mlir/lib/Conversion/GPUCommon/GPUToLLVMConversion.cpp
M mlir/lib/Conversion/GPUToNVVM/LowerGpuOpsToNVVMOps.cpp
M mlir/lib/Conversion/GPUToROCDL/LowerGpuOpsToROCDLOps.cpp
M mlir/lib/Conversion/GPUToSPIRV/GPUToSPIRV.cpp
M mlir/lib/Conversion/LLVMCommon/TypeConverter.cpp
M mlir/lib/Conversion/MathToSPIRV/MathToSPIRV.cpp
M mlir/lib/Conversion/MemRefToEmitC/MemRefToEmitC.cpp
M mlir/lib/Conversion/SCFToControlFlow/SCFToControlFlow.cpp
M mlir/lib/Conversion/SCFToEmitC/SCFToEmitC.cpp
M mlir/lib/Conversion/SCFToOpenMP/SCFToOpenMP.cpp
M mlir/lib/Conversion/SCFToSPIRV/SCFToSPIRV.cpp
M mlir/lib/Conversion/TosaToSCF/TosaToSCF.cpp
M mlir/lib/Conversion/VectorToAMX/VectorToAMX.cpp
M mlir/lib/Conversion/XeVMToLLVM/XeVMToLLVM.cpp
M mlir/lib/Dialect/AMDGPU/IR/AMDGPUOps.cpp
M mlir/lib/Dialect/Affine/IR/AffineOps.cpp
M mlir/lib/Dialect/Affine/Transforms/AffineExpandIndexOps.cpp
M mlir/lib/Dialect/Affine/Transforms/AffineExpandIndexOpsAsAffine.cpp
M mlir/lib/Dialect/Affine/Transforms/CMakeLists.txt
A mlir/lib/Dialect/Affine/Transforms/SimplifyAffineWithBounds.cpp
M mlir/lib/Dialect/Affine/Utils/Utils.cpp
M mlir/lib/Dialect/Arith/Transforms/IntRangeOptimizations.cpp
M mlir/lib/Dialect/Arith/Transforms/ShardingInterfaceImpl.cpp
M mlir/lib/Dialect/Async/Transforms/AsyncToAsyncRuntime.cpp
M mlir/lib/Dialect/Bufferization/IR/BufferizationOps.cpp
M mlir/lib/Dialect/Bufferization/Transforms/OwnershipBasedBufferDeallocation.cpp
M mlir/lib/Dialect/EmitC/IR/EmitC.cpp
M mlir/lib/Dialect/GPU/IR/GPUDialect.cpp
M mlir/lib/Dialect/GPU/Pipelines/GPUToXeVMPipeline.cpp
M mlir/lib/Dialect/GPU/Transforms/KernelOutlining.cpp
M mlir/lib/Dialect/LLVMIR/CMakeLists.txt
M mlir/lib/Dialect/LLVMIR/IR/BasicPtxBuilderInterface.cpp
M mlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp
M mlir/lib/Dialect/Linalg/Transforms/DecomposeLinalgOps.cpp
M mlir/lib/Dialect/MPI/IR/MPIOps.cpp
M mlir/lib/Dialect/MemRef/IR/MemRefOps.cpp
M mlir/lib/Dialect/MemRef/Transforms/ElideReinterpretCast.cpp
M mlir/lib/Dialect/MemRef/Transforms/ExpandStridedMetadata.cpp
M mlir/lib/Dialect/MemRef/Transforms/ExtractAddressComputations.cpp
M mlir/lib/Dialect/MemRef/Transforms/FoldMemRefAliasOps.cpp
M mlir/lib/Dialect/OpenACC/IR/OpenACC.cpp
M mlir/lib/Dialect/OpenACC/Transforms/ACCImplicitData.cpp
M mlir/lib/Dialect/OpenACC/Utils/OpenACCUtils.cpp
M mlir/lib/Dialect/OpenMP/CMakeLists.txt
M mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
M mlir/lib/Dialect/OpenMP/Transforms/CMakeLists.txt
M mlir/lib/Dialect/OpenMP/Transforms/MarkDeclareTarget.cpp
M mlir/lib/Dialect/Ptr/IR/PtrDialect.cpp
M mlir/lib/Dialect/SCF/IR/CMakeLists.txt
M mlir/lib/Dialect/SCF/IR/MemorySlot.cpp
M mlir/lib/Dialect/SCF/IR/SCF.cpp
M mlir/lib/Dialect/SCF/Transforms/LoopRangeFolding.cpp
M mlir/lib/Dialect/SCF/Utils/Utils.cpp
M mlir/lib/Dialect/SMT/IR/SMTOps.cpp
M mlir/lib/Dialect/SPIRV/IR/SPIRVDialect.cpp
M mlir/lib/Dialect/SPIRV/IR/TargetAndABI.cpp
M mlir/lib/Dialect/Shard/IR/ShardOps.cpp
M mlir/lib/Dialect/SparseTensor/IR/Detail/DimLvlMapParser.cpp
M mlir/lib/Dialect/SparseTensor/IR/Detail/LvlTypeParser.cpp
M mlir/lib/Dialect/SparseTensor/IR/SparseTensorDialect.cpp
M mlir/lib/Dialect/SparseTensor/Pipelines/SparseTensorPipelines.cpp
M mlir/lib/Dialect/SparseTensor/Transforms/SparseAssembler.cpp
M mlir/lib/Dialect/SparseTensor/Transforms/SparseTensorRewriting.cpp
M mlir/lib/Dialect/SparseTensor/Transforms/Utils/LoopEmitter.cpp
M mlir/lib/Dialect/SparseTensor/Transforms/Utils/SparseTensorIterator.cpp
M mlir/lib/Dialect/Tensor/IR/TensorOps.cpp
M mlir/lib/Dialect/Tosa/IR/TosaCanonicalizations.cpp
M mlir/lib/Dialect/Tosa/IR/TosaOps.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaFolders.cpp
M mlir/lib/Dialect/Transform/IR/TransformDialect.cpp
M mlir/lib/Dialect/Transform/Transforms/CheckUses.cpp
M mlir/lib/Dialect/Vector/IR/VectorOps.cpp
M mlir/lib/Dialect/Vector/Transforms/LowerVectorBroadcast.cpp
M mlir/lib/Dialect/Vector/Transforms/LowerVectorScan.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorDistribute.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorEmulateNarrowType.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorTransferOpTransforms.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorTransforms.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorUnroll.cpp
M mlir/lib/Dialect/Vector/Utils/VectorUtils.cpp
M mlir/lib/Dialect/WasmSSA/IR/WasmSSAOps.cpp
M mlir/lib/Dialect/X86/Transforms/VectorContractToPackedTypeDotProduct.cpp
M mlir/lib/Dialect/X86/Utils/X86Utils.cpp
M mlir/lib/Dialect/XeGPU/IR/XeGPUDialect.cpp
M mlir/lib/Dialect/XeGPU/IR/XeGPUOps.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPULayoutImpl.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUPeepHoleOptimizer.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUPropagateLayout.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUSgToWiDistributeExperimental.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUSubgroupDistribute.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUUnroll.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUWgToSgDistribute.cpp
M mlir/lib/Dialect/XeGPU/Utils/XeGPUUtils.cpp
M mlir/lib/ExecutionEngine/LevelZeroRuntimeWrappers.cpp
M mlir/lib/IR/AffineMap.cpp
M mlir/lib/IR/AsmPrinter.cpp
M mlir/lib/IR/ExtensibleDialect.cpp
M mlir/lib/IR/MLIRContext.cpp
M mlir/lib/IR/Operation.cpp
M mlir/lib/IR/OperationSupport.cpp
M mlir/lib/IR/TypeRange.cpp
M mlir/lib/IR/Value.cpp
M mlir/lib/Interfaces/IndexingMapOpInterface.cpp
M mlir/lib/Interfaces/InferIntRangeInterface.cpp
M mlir/lib/Interfaces/Utils/CMakeLists.txt
A mlir/lib/Interfaces/Utils/MemorySlotUtils.cpp
M mlir/lib/Interfaces/ValueBoundsOpInterface.cpp
M mlir/lib/Target/IRDLToCpp/Templates/PerOperationDecl.txt
M mlir/lib/Target/LLVM/XeVM/Target.cpp
M mlir/lib/Target/LLVMIR/DebugImporter.cpp
M mlir/lib/Target/LLVMIR/DebugTranslation.cpp
M mlir/lib/Target/LLVMIR/Dialect/LLVMIR/LLVMToLLVMIRTranslation.cpp
M mlir/lib/Target/LLVMIR/Dialect/NVVM/NVVMToLLVMIRTranslation.cpp
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
M mlir/lib/Target/SPIRV/Deserialization/Deserializer.cpp
M mlir/lib/Transforms/CSE.cpp
M mlir/lib/Transforms/RemoveDeadValues.cpp
M mlir/lib/Transforms/Utils/DialectConversion.cpp
M mlir/lib/Transforms/Utils/LoopInvariantCodeMotionUtils.cpp
M mlir/python/mlir/dialects/ext.py
M mlir/test/Analysis/test-alias-analysis-modref.mlir
M mlir/test/Bytecode/bytecode_callback.mlir
M mlir/test/CAPI/llvm.c
M mlir/test/Conversion/AMDGPUToROCDL/gfx1250.mlir
A mlir/test/Conversion/AMDGPUToROCDL/global-prefetch.mlir
M mlir/test/Conversion/ArithToLLVM/arith-to-llvm.mlir
M mlir/test/Conversion/ArithToSPIRV/arith-to-spirv.mlir
M mlir/test/Conversion/FuncToLLVM/convert-funcs.mlir
M mlir/test/Conversion/GPUCommon/lower-launch-func-to-gpu-runtime-calls.mlir
A mlir/test/Conversion/GPUToNVVM/gpu-to-nvvm-invalid-ballot.mlir
M mlir/test/Conversion/GPUToNVVM/gpu-to-nvvm.mlir
A mlir/test/Conversion/GPUToROCDL/gpu-to-rocdl-invalid-ballot.mlir
M mlir/test/Conversion/GPUToROCDL/gpu-to-rocdl.mlir
A mlir/test/Conversion/GPUToSPIRV/ballot.mlir
A mlir/test/Conversion/GPUToSPIRV/broadcast.mlir
M mlir/test/Conversion/NVVMToLLVM/nvvm-to-llvm.mlir
M mlir/test/Conversion/SCFToControlFlow/convert-to-cfg.mlir
A mlir/test/Conversion/SCFToOpenMP/non-llvm-reduction-type.mlir
M mlir/test/Conversion/SCFToSPIRV/for.mlir
M mlir/test/Conversion/SCFToSPIRV/while.mlir
M mlir/test/Dialect/AMDGPU/invalid.mlir
M mlir/test/Dialect/AMDGPU/ops.mlir
M mlir/test/Dialect/Affine/affine-expand-index-ops-as-affine.mlir
M mlir/test/Dialect/Affine/affine-expand-index-ops.mlir
M mlir/test/Dialect/Affine/canonicalize.mlir
M mlir/test/Dialect/Affine/ops.mlir
M mlir/test/Dialect/Affine/scalrep.mlir
A mlir/test/Dialect/Affine/simplify-with-bounds.mlir
M mlir/test/Dialect/Arith/int-range-narrowing.mlir
M mlir/test/Dialect/Arith/int-range-opts.mlir
M mlir/test/Dialect/GPU/broadcast-speculatability.mlir
M mlir/test/Dialect/GPU/ops.mlir
M mlir/test/Dialect/GPU/outlining.mlir
M mlir/test/Dialect/LLVMIR/alias.mlir
M mlir/test/Dialect/LLVMIR/bytecode.mlir
M mlir/test/Dialect/LLVMIR/debuginfo.mlir
A mlir/test/Dialect/Linalg/fill-custom-scalar-type.mlir
M mlir/test/Dialect/Linalg/invalid.mlir
M mlir/test/Dialect/MemRef/canonicalize.mlir
M mlir/test/Dialect/MemRef/fold-memref-alias-ops.mlir
M mlir/test/Dialect/MemRef/invalid.mlir
M mlir/test/Dialect/OpenMP/invalid.mlir
M mlir/test/Dialect/OpenMP/ops.mlir
M mlir/test/Dialect/SCF/canonicalize.mlir
M mlir/test/Dialect/SCF/loop-range.mlir
M mlir/test/Dialect/SCF/loop-unroll.mlir
M mlir/test/Dialect/SPIRV/IR/tosa-ops-verification.mlir
M mlir/test/Dialect/SPIRV/IR/tosa-ops.mlir
M mlir/test/Dialect/Tosa/canonicalize.mlir
M mlir/test/Dialect/Tosa/constant_folding.mlir
M mlir/test/Dialect/Tosa/tosa-layerwise-constant-fold.mlir
M mlir/test/Dialect/Transform/check-use-after-free.mlir
M mlir/test/Dialect/Transform/test-loop-transforms.mlir
M mlir/test/Dialect/Vector/canonicalize.mlir
M mlir/test/Dialect/Vector/invalid.mlir
M mlir/test/Dialect/Vector/vector-transfer-collapse-inner-most-dims.mlir
M mlir/test/Dialect/Vector/vector-transfer-drop-unit-dims-patterns.mlir
M mlir/test/Dialect/Vector/vector-unroll-options.mlir
M mlir/test/Dialect/XeGPU/layout.mlir
M mlir/test/Dialect/XeGPU/move-gpu-func-to-warp-op.mlir
M mlir/test/Dialect/XeGPU/peephole-optimize.mlir
M mlir/test/Dialect/XeGPU/propagate-layout-subgroup.mlir
M mlir/test/Dialect/XeGPU/propagate-layout.mlir
M mlir/test/Dialect/XeGPU/sg-to-wi-experimental-unit.mlir
M mlir/test/Dialect/XeGPU/subgroup-distribute-unit.mlir
M mlir/test/Dialect/XeGPU/xegpu-blocking.mlir
M mlir/test/Dialect/XeGPU/xegpu-wg-to-sg-rr.mlir
M mlir/test/Dialect/XeGPU/xegpu-wg-to-sg-unify-ops-rr.mlir
M mlir/test/Dialect/XeGPU/xegpu-wg-to-sg-unify-ops.mlir
M mlir/test/IR/invalid-custom-print-parse.mlir
M mlir/test/IR/parser.mlir
A mlir/test/IR/print-unsafe-null-operand.mlir
M mlir/test/IR/properties.mlir
M mlir/test/IR/test-side-effects.mlir
M mlir/test/Target/LLVMIR/Import/debug-info.ll
M mlir/test/Target/LLVMIR/alias.mlir
M mlir/test/Target/LLVMIR/llvmir-debug.mlir
M mlir/test/Target/LLVMIR/nvvmir-invalid.mlir
M mlir/test/Target/LLVMIR/nvvmir.mlir
A mlir/test/Target/LLVMIR/omptarget-region-host-device-llvm.mlir
M mlir/test/Target/LLVMIR/omptarget-teams-distribute-reduction-array-descriptor.mlir
A mlir/test/Target/LLVMIR/openmp-simd-linear.mlir
M mlir/test/Target/LLVMIR/openmp-todo.mlir
M mlir/test/Target/LLVMIR/rocdl.mlir
M mlir/test/Target/SPIRV/tosa-ops.mlir
M mlir/test/Transforms/cse.mlir
M mlir/test/Transforms/loop-invariant-subset-hoisting.mlir
M mlir/test/Transforms/remove-dead-values.mlir
M mlir/test/Transforms/sccp.mlir
M mlir/test/lib/Dialect/OpenACC/TestRecipePopulate.cpp
M mlir/test/lib/Dialect/Shard/TestReshardingPartition.cpp
M mlir/test/lib/Dialect/Test/TestAttrDefs.td
M mlir/test/lib/Dialect/Test/TestOpDefs.cpp
M mlir/test/lib/Dialect/Test/TestOps.td
M mlir/test/lib/Dialect/Test/TestOpsSyntax.cpp
M mlir/test/lib/Dialect/Test/TestOpsSyntax.td
M mlir/test/lib/Dialect/Test/TestPatterns.cpp
M mlir/test/lib/IR/TestBytecodeRoundtrip.cpp
M mlir/test/lib/Interfaces/TilingInterface/TestTilingInterfaceTransformOps.cpp
M mlir/test/mlir-tblgen/attr-or-type-format-roundtrip.mlir
M mlir/test/mlir-tblgen/attr-or-type-format.td
M mlir/test/mlir-tblgen/op-decl-and-defs.td
M mlir/test/mlir-tblgen/op-python-bindings.td
M mlir/test/python/dialects/builtin.py
M mlir/test/python/dialects/ext.py
M mlir/test/python/dialects/func.py
M mlir/test/python/python_test_ops.td
M mlir/tools/mlir-tblgen/AttrOrTypeFormatGen.cpp
M mlir/tools/mlir-tblgen/CppGenUtilities.cpp
M mlir/tools/mlir-tblgen/OpDefinitionsGen.cpp
M mlir/tools/mlir-tblgen/OpPythonBindingGen.cpp
M mlir/tools/mlir-tblgen/SPIRVUtilsGen.cpp
M mlir/unittests/Debug/FileLineColLocBreakpointManagerTest.cpp
M mlir/unittests/IR/AttributeTest.cpp
M mlir/unittests/IR/OperationSupportTest.cpp
M mlir/unittests/IR/ValueTest.cpp
M mlir/unittests/IR/VerifierTest.cpp
M mlir/unittests/Interfaces/CMakeLists.txt
A mlir/unittests/Interfaces/MemorySlotUtilsTest.cpp
M mlir/unittests/Interfaces/SideEffectInterfacesTest.cpp
M mlir/unittests/Transforms/DialectConversion.cpp
M mlir/utils/generate-test-checks.py
M offload/CMakeLists.txt
M offload/cmake/Modules/LibomptargetGetDependencies.cmake
M offload/cmake/OpenMPTesting.cmake
M offload/include/Shared/RefCnt.h
M offload/liboffload/API/Event.td
M offload/liboffload/src/OffloadImpl.cpp
M offload/libomptarget/omptarget.cpp
M offload/plugins-nextgen/CMakeLists.txt
M offload/plugins-nextgen/amdgpu/dynamic_hsa/hsa.cpp
M offload/plugins-nextgen/amdgpu/dynamic_hsa/hsa.h
M offload/plugins-nextgen/amdgpu/dynamic_hsa/hsa_ext_amd.h
M offload/plugins-nextgen/amdgpu/src/rtl.cpp
M offload/plugins-nextgen/common/include/GlobalHandler.h
M offload/plugins-nextgen/common/include/PluginInterface.h
M offload/plugins-nextgen/common/src/GlobalHandler.cpp
M offload/plugins-nextgen/common/src/PluginInterface.cpp
M offload/plugins-nextgen/cuda/dynamic_cuda/cuda.cpp
M offload/plugins-nextgen/cuda/dynamic_cuda/cuda.h
M offload/plugins-nextgen/cuda/src/rtl.cpp
M offload/plugins-nextgen/host/src/rtl.cpp
M offload/plugins-nextgen/level_zero/CMakeLists.txt
Log Message:
-----------
Merge branch 'main' into users/ziqingluo/eng/PR-171920065
Compare: https://github.com/llvm/llvm-project/compare/e4d0b9ea812b...4d8f738e316b
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