[all-commits] [llvm/llvm-project] 9acfa5: [Coro] Preserve program address spaces correctly i...
Steven Perron via All-commits
all-commits at lists.llvm.org
Tue Mar 24 13:20:31 PDT 2026
Branch: refs/heads/users/s-perron/texture2d-mips
Home: https://github.com/llvm/llvm-project
Commit: 9acfa56d8f23659a568715d502c64f96735bffea
https://github.com/llvm/llvm-project/commit/9acfa56d8f23659a568715d502c64f96735bffea
Author: Owen Anderson <resistor at mac.com>
Date: 2026-03-23 (Mon, 23 Mar 2026)
Changed paths:
M llvm/lib/Transforms/Coroutines/CoroSplit.cpp
A llvm/test/Transforms/Coroutines/coro-split-addrspace.ll
Log Message:
-----------
[Coro] Preserve program address spaces correctly in CoroSplit. (#188002)
Commit: f7d5e593d38a83bcd9ccaff6fbc1cdbca623fdb2
https://github.com/llvm/llvm-project/commit/f7d5e593d38a83bcd9ccaff6fbc1cdbca623fdb2
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2026-03-23 (Mon, 23 Mar 2026)
Changed paths:
M lldb/packages/Python/lldbsuite/test/configuration.py
M lldb/packages/Python/lldbsuite/test/decorators.py
M lldb/packages/Python/lldbsuite/test/dotest.py
M lldb/packages/Python/lldbsuite/test/dotest_args.py
M lldb/test/API/lit.cfg.py
M lldb/test/API/lit.site.cfg.py.in
M lldb/test/CMakeLists.txt
M lldb/utils/lldb-dotest/CMakeLists.txt
M lldb/utils/lldb-dotest/lldb-dotest.in
Log Message:
-----------
[lldb] Check for arm64e debugserver in skipUnlessArm64eSupported (#188082)
Explicitly check whether we are building debugserver for arm64e. To
debug an arm64e binary, debugserver itself needs to be an arm64e
process.
This PR eliminates the possibility of configuring LLDB with Right now,
it's possible to configure CMake with
`LLDB_ENABLE_ARM64E_DEBUGSERVER=Off` and the decorator wouldn't account
for that.
Commit: 205187c5cfe318109deb215583edd5434f69c487
https://github.com/llvm/llvm-project/commit/205187c5cfe318109deb215583edd5434f69c487
Author: Susan Tan (ス-ザン タン) <zujunt at nvidia.com>
Date: 2026-03-23 (Mon, 23 Mar 2026)
Changed paths:
M flang/lib/Optimizer/OpenACC/Transforms/ACCDeclareActionConversion.cpp
M flang/test/Fir/OpenACC/declare-action-conversion.fir
Log Message:
-----------
[openacc][flang] full support to handle allocatable/pointer runtime declare-action calls in ACCDeclareActionConversion (#188055)
Supported before: `fir.store`, `fir.box_addr`, and `fir.call` only for
PointerAllocate/PointerDeallocate.
Added now: fir.call support for PointerAllocateSource,
PointerDeallocatePolymorphic, AllocatableAllocate,
AllocatableAllocateSource, AllocatableDeallocate,
AllocatableDeallocatePolymorphic (found in
flang/include/flang/Runtime/allocatable.h).
Commit: 9096c9cda3df4d09c9c6e4efa1a07a232a9ac8f8
https://github.com/llvm/llvm-project/commit/9096c9cda3df4d09c9c6e4efa1a07a232a9ac8f8
Author: Afonso Rafael (Gafanhoto) <afonsorafael at sapo.pt>
Date: 2026-03-23 (Mon, 23 Mar 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/LoopFuse.cpp
M llvm/test/Transforms/LoopFusion/da_separate_loops.ll
Log Message:
-----------
[LoopFusion] Remove the InvalidDependencies duplicates (#187744)
If the function dependencesAllowFusion returns false, in fuseCandidates
the reportLoopFusion function is used to increment InvalidDependencies
and to emit a OptimizationRemarkMissed. If both dependencesAllowFusion
and reportLoopFusion increment InvalidDependencies, statistics will
appear duplicated
Commit: 3124cb3fe779ab65aa1f7b1e875d4efd62852757
https://github.com/llvm/llvm-project/commit/3124cb3fe779ab65aa1f7b1e875d4efd62852757
Author: Alireza Torabian <alireza.torabian at huawei.com>
Date: 2026-03-23 (Mon, 23 Mar 2026)
Changed paths:
M llvm/lib/Analysis/DependenceAnalysis.cpp
M llvm/test/Analysis/DependenceAnalysis/SameSDLoops.ll
Log Message:
-----------
[DA] Bug fix regarding the SameSD levels (#188098)
SCEV isKnownPredicate may crash if the expressions are involved with
different loops. To verify if two loops have the same iteration space,
we do not need to use the SCEV apis, and it can be done by the equality
check.
Moreover, no pass (not even loop fusion) requires to check SameSD levels
for more than one level. In this patch, we limit the analysis of SameSD
levels to only one level after the common levels.
Commit: 22977fd99ed9f580bbc3bbe3c43c1224f393d348
https://github.com/llvm/llvm-project/commit/22977fd99ed9f580bbc3bbe3c43c1224f393d348
Author: vangthao95 <vang.thao at amd.com>
Date: 2026-03-23 (Mon, 23 Mar 2026)
Changed paths:
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.bpermute.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.permute.ll
Log Message:
-----------
[AMDGPU][NFC] Update permute tests to use auto-generated checks (#188107)
Also add global-isel run line.
Commit: 2f1e0d14f40da09379b489ba4e78fbfd8794f68e
https://github.com/llvm/llvm-project/commit/2f1e0d14f40da09379b489ba4e78fbfd8794f68e
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-03-23 (Mon, 23 Mar 2026)
Changed paths:
M llvm/test/Transforms/LoopVectorize/X86/transform-narrow-interleave-to-widen-memory-epilogue-vec.ll
M llvm/test/Transforms/LoopVectorize/epilog-vectorization-reductions.ll
Log Message:
-----------
[LV] Add additional epilogue vector tests.
Add additional epilogue vectorization tests for
* https://github.com/llvm/llvm-project/issues/187323
* https://github.com/llvm/llvm-project/issues/185345
Commit: c0634cbb07149c8e8fea428c654774cf06be764a
https://github.com/llvm/llvm-project/commit/c0634cbb07149c8e8fea428c654774cf06be764a
Author: Zhen Wang <37195552+wangzpgi at users.noreply.github.com>
Date: 2026-03-23 (Mon, 23 Mar 2026)
Changed paths:
M flang-rt/lib/cuda/registration.cpp
M flang/include/flang/Runtime/CUDA/registration.h
Log Message:
-----------
[flang][cuda] Add CUFRegisterManagedVariable runtime entry for __cudaRegisterManagedVar (#188124)
Add CUFRegisterManagedVariable runtime wrapper in flang-rt that calls
__cudaRegisterManagedVar.
This is preparation for supporting non-allocatable managed variables.
No functional change -- nothing calls this yet.
Commit: a235d96e48e47b33d5772f73661a3d178c11777b
https://github.com/llvm/llvm-project/commit/a235d96e48e47b33d5772f73661a3d178c11777b
Author: Arthur Eubanks <aeubanks at google.com>
Date: 2026-03-23 (Mon, 23 Mar 2026)
Changed paths:
M llvm/test/Instrumentation/AddressSanitizer/remove-memory-effects.ll
Log Message:
-----------
[test][ASan] Precommit test for #187794 (#188112)
Commit: fe03749f08f86e8cf94132bd9155a68637657a8c
https://github.com/llvm/llvm-project/commit/fe03749f08f86e8cf94132bd9155a68637657a8c
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-03-23 (Mon, 23 Mar 2026)
Changed paths:
M clang/lib/Driver/ToolChains/AMDGPU.cpp
M clang/lib/Driver/ToolChains/Cuda.cpp
Log Message:
-----------
[Clang] Do not emit multi-gpu warning if they are all the same (#185490)
Summary:
This warning exists because if you do `-mcpu=native` in some contexts it
may not be obvious which GPU you get. But if they are all the same then
it really don't make a difference since we just pass the first one to
`-mcpu` anyway. Relax this so it doesn't annoyingly warn on machines
with more than one of the same GPU.
---------
Co-authored-by: Jacob Lambert <jacob.lambert at amd.com>
Commit: 53e3ed82f690aee90d74f5459fbbf5bb7ba21980
https://github.com/llvm/llvm-project/commit/53e3ed82f690aee90d74f5459fbbf5bb7ba21980
Author: Arthur Eubanks <aeubanks at google.com>
Date: 2026-03-23 (Mon, 23 Mar 2026)
Changed paths:
M llvm/utils/gn/secondary/lldb/test/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/Target/AMDGPU/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/Target/WebAssembly/BUILD.gn
Log Message:
-----------
[gn build] Port commits (#188129)
f7d5e593d38a
b2edc0a3f8a5
3e4efe3ed4a2
Commit: 2bee9585993506a06765b06f8cc83f1e219c45ee
https://github.com/llvm/llvm-project/commit/2bee9585993506a06765b06f8cc83f1e219c45ee
Author: vangthao95 <vang.thao at amd.com>
Date: 2026-03-23 (Mon, 23 Mar 2026)
Changed paths:
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.pknorm.i16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.pknorm.u16.ll
Log Message:
-----------
[AMDGPU][NFC] Update test to use update_llc_test_checks (#188102)
Also add globalisel run lines.
Precommit test for https://github.com/llvm/llvm-project/pull/187834.
Commit: 599d74fdc3cee5fa1ed84d6e10830f9aa5fe6b53
https://github.com/llvm/llvm-project/commit/599d74fdc3cee5fa1ed84d6e10830f9aa5fe6b53
Author: lntue <lntue at google.com>
Date: 2026-03-23 (Mon, 23 Mar 2026)
Changed paths:
M libc/src/__support/math/CMakeLists.txt
M libc/src/__support/math/acoshf_utils.h
M libc/test/src/math/acoshf_test.cpp
M libc/test/src/math/asinhf_test.cpp
M libc/test/src/math/atanhf_test.cpp
Log Message:
-----------
[libc][math] Reduce memory usage for single precision inverse hyperbolic functions for LIBC_MATH_HAS_SMALL_TABLES option. (#188110)
Commit: bcfe1e94d3f062139aae009e44ae458f69cf2df2
https://github.com/llvm/llvm-project/commit/bcfe1e94d3f062139aae009e44ae458f69cf2df2
Author: Deric C. <cheung.deric at gmail.com>
Date: 2026-03-23 (Mon, 23 Mar 2026)
Changed paths:
M clang/lib/Sema/SemaCast.cpp
M clang/lib/Sema/SemaHLSL.cpp
M clang/test/CodeGenHLSL/BasicFeatures/AggregateSplatCast.hlsl
Log Message:
-----------
[HLSL] Allow 1x1 matrices to be splatted like scalars (#188119)
Fixes #186859 by allowing 1x1 matrices to be splatted like the scalar
and vec1 cases.
Assisted-by: GitHub Copilot (powered by Claude Opus 4.6)
Commit: 20e863de1373fd255f77afcd21ea4b90d47f838e
https://github.com/llvm/llvm-project/commit/20e863de1373fd255f77afcd21ea4b90d47f838e
Author: google-llvm-bazel-bot <google-bazel-bot at google.com>
Date: 2026-03-23 (Mon, 23 Mar 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[Bazel] Fixes 599d74f (#188138)
This fixes 599d74fdc3cee5fa1ed84d6e10830f9aa5fe6b53.
Commit: d194afe062bc2a27f4664590549990e90d27c6a1
https://github.com/llvm/llvm-project/commit/d194afe062bc2a27f4664590549990e90d27c6a1
Author: Théo Degioanni <tdegioanni at nvidia.com>
Date: 2026-03-23 (Mon, 23 Mar 2026)
Changed paths:
M mlir/include/mlir/Transforms/Passes.td
Log Message:
-----------
[MLIR] [Mem2Reg] [NFC] Update pass documentation (#188140)
In #185036, we added region control flow support but forgot to update
the pass declaration documentation. This NFC addresses this.
Commit: 77fb848894cc0d6b3027c6e82e10d32069fc6430
https://github.com/llvm/llvm-project/commit/77fb848894cc0d6b3027c6e82e10d32069fc6430
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-03-23 (Mon, 23 Mar 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/epilog-iv-select-cmp.ll
M llvm/test/Transforms/LoopVectorize/AArch64/epilog-vectorization-factors.ll
M llvm/test/Transforms/LoopVectorize/AArch64/epilog-vectorization-widen-inductions.ll
M llvm/test/Transforms/LoopVectorize/AArch64/f128-fmuladd-reduction.ll
M llvm/test/Transforms/LoopVectorize/AArch64/force-target-instruction-cost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/induction-costs.ll
M llvm/test/Transforms/LoopVectorize/AArch64/interleave-with-runtime-checks.ll
M llvm/test/Transforms/LoopVectorize/AArch64/intrinsiccost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/low_trip_count_predicates.ll
M llvm/test/Transforms/LoopVectorize/AArch64/neon-inloop-reductions.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-dot-product-epilogue.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-sub-epilogue-vec.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-epilog-vect.ll
M llvm/test/Transforms/LoopVectorize/AArch64/transform-narrow-interleave-to-widen-memory-cost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/transform-narrow-interleave-to-widen-memory-scalable.ll
M llvm/test/Transforms/LoopVectorize/AArch64/vector-reverse.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/exit-branch-cost.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/optimal-epilog-vectorization.ll
M llvm/test/Transforms/LoopVectorize/X86/conversion-cost.ll
M llvm/test/Transforms/LoopVectorize/X86/cost-model.ll
M llvm/test/Transforms/LoopVectorize/X86/epilog-vectorization-inductions.ll
M llvm/test/Transforms/LoopVectorize/X86/float-induction-x86.ll
M llvm/test/Transforms/LoopVectorize/X86/gather_scatter.ll
M llvm/test/Transforms/LoopVectorize/X86/intrinsiccost.ll
M llvm/test/Transforms/LoopVectorize/X86/scatter_crash.ll
M llvm/test/Transforms/LoopVectorize/X86/transform-narrow-interleave-to-widen-memory-epilogue-vec.ll
M llvm/test/Transforms/LoopVectorize/X86/transform-narrow-interleave-to-widen-memory.ll
M llvm/test/Transforms/LoopVectorize/epilog-iv-select-cmp.ll
M llvm/test/Transforms/LoopVectorize/epilog-vectorization-any-of-reductions.ll
M llvm/test/Transforms/LoopVectorize/epilog-vectorization-reductions.ll
M llvm/test/Transforms/LoopVectorize/optimal-epilog-vectorization.ll
M llvm/test/Transforms/PhaseOrdering/X86/pr48844-br-to-switch-vectorization.ll
Log Message:
-----------
Reapply "[LV] Simplify and unify resume value handling for epilogue vec." (#187504)
This reverts commit cdaf29f84dd0abbd1f961982799059c92d76625b.
This version skips removeBranchOnConst when vectorizing the epilogue, as
it may trigger folds that remove the resume phi used as resume value
from the epilogue.
This fixes https://github.com/llvm/llvm-project/issues/187323.
Original message:
This patch tries to drastically simplify resume value handling for the
scalar loop when vectorizing the epilogue.
It uses a simpler, uniform approach for updating all resume values in
the scalar loop:
1. Create ResumeForEpilogue recipes for all scalar resume phis in the
main loop (the epilogue plan will have exactly the same scalar resume
phis, in exactly the same order)
2. Update ::execute for ResumeForEpilogue to set the underlying value
when executing. This is not super clean, but allows easy lookup of the
generated IR value when we update the resume phis in the epilogue. Once
we connect the 2 plans together explicitly, this can be removed.
3. Use the list of ResumeForEpilogue VPInstructions from the main loop
to update the resume/bypass values from the epilogue.
This simplifies the code quite a bit, makes it more robust (should fix
https://github.com/llvm/llvm-project/issues/179407) and also fixes a
mis-compile in the existing tests (see change in
llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-sub-epilogue-vec.ll,
where previously we would incorrectly resume using the start value when
the epilogue iteration check failed)
In some cases, we get simpler code, due to additional CSE, in some cases
the induction end value computations get moved from the epilogue
iteration check to the vector preheader. We could try to sink the
instructions as cleanup, but it is probably not worth the trouble.
Fixes https://github.com/llvm/llvm-project/issues/179407.
PR for recommit https://github.com/llvm/llvm-project/pull/188134
Commit: 4f32ea35f5956c4a2fd93d1c9416421c6f7f71c5
https://github.com/llvm/llvm-project/commit/4f32ea35f5956c4a2fd93d1c9416421c6f7f71c5
Author: Zhen Wang <37195552+wangzpgi at users.noreply.github.com>
Date: 2026-03-23 (Mon, 23 Mar 2026)
Changed paths:
M flang-rt/lib/cuda/registration.cpp
M flang/include/flang/Runtime/CUDA/registration.h
Log Message:
-----------
[flang][cuda] Fix const mismatch in CUFRegisterManagedVariable for __cudaRegisterManagedVar (#188142)
Change varName parameter from `const char *` to `char *` in
CUFRegisterManagedVariable to match the CUDA runtime API signature of
__cudaRegisterManagedVar, which declares deviceAddress as `char *`.
Commit: b4f50cfd4a3a086db3f88271c9595056a877ef90
https://github.com/llvm/llvm-project/commit/b4f50cfd4a3a086db3f88271c9595056a877ef90
Author: Muhammad Bassiouni <60100307+bassiounix at users.noreply.github.com>
Date: 2026-03-24 (Tue, 24 Mar 2026)
Changed paths:
M libc/src/__support/CPP/bit.h
M libc/src/__support/FPUtil/NearestIntegerOperations.h
M libc/src/__support/FPUtil/bfloat16.h
M libc/src/__support/FPUtil/comparison_operations.h
M libc/src/__support/FPUtil/generic/add_sub.h
M libc/src/__support/FPUtil/generic/div.h
M libc/src/__support/FPUtil/generic/mul.h
M libc/src/__support/FPUtil/rounding_mode.h
M libc/src/__support/math/ceil.h
M libc/src/__support/math/ceilbf16.h
M libc/src/__support/math/ceilf.h
M libc/src/__support/math/ceilf128.h
M libc/src/__support/math/ceilf16.h
M libc/src/__support/math/ceill.h
M libc/test/shared/CMakeLists.txt
A libc/test/shared/shared_math_constexpr_test.cpp
M libc/test/shared/shared_math_test.cpp
Log Message:
-----------
[libc][math] Qualify ceil functions to constexpr (#184948)
Commit: 08070b75f2a2643ab5eee04e2a6a6e37d006c25e
https://github.com/llvm/llvm-project/commit/08070b75f2a2643ab5eee04e2a6a6e37d006c25e
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2026-03-23 (Mon, 23 Mar 2026)
Changed paths:
M flang/include/flang/Evaluate/tools.h
M flang/lib/Evaluate/tools.cpp
M flang/lib/Semantics/check-cuda.cpp
A flang/test/Lower/CUDA/cuda-data-transfer-implicit.cuf
M flang/test/Lower/CUDA/cuda-data-transfer.cuf
M flang/test/Lower/CUDA/cuda-managed.cuf
Log Message:
-----------
[flang][cuda] Do not check for implicit transfer on managed symbols (#188143)
Avoid to trigger a semantic error when only managed symbols are on the
right hand side.
Commit: 5624cce586c74ec7cfcbd0243f65cb1870677af7
https://github.com/llvm/llvm-project/commit/5624cce586c74ec7cfcbd0243f65cb1870677af7
Author: Ruiling, Song <ruiling.song at amd.com>
Date: 2026-03-24 (Tue, 24 Mar 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUPromoteAlloca.cpp
A llvm/test/CodeGen/AMDGPU/promote-alloca-delay-value-replacement.ll
Log Message:
-----------
AMDGPU: Delay value replacement in PromoteAlloca (#186944)
When we do alloca promotion, there might be cross references to the
values derived from different allocas. RAUW immediately during promotion
may fail to update the values cached in the AllocaAnalysis structure.
Solving the problem by postpone the value replacement, and also the
value deletion as well to make this possible.
Commit: 99a4d78bef28fc0a32e8be24a560ee26f459925d
https://github.com/llvm/llvm-project/commit/99a4d78bef28fc0a32e8be24a560ee26f459925d
Author: Wenju He <wenju.he at intel.com>
Date: 2026-03-24 (Tue, 24 Mar 2026)
Changed paths:
M libclc/clc/include/clc/integer/gentype.inc
M libclc/clc/include/clc/math/gentype.inc
Log Message:
-----------
[libclc][NFC] Simplify __CLC_GENTYPE/__CLC_U_GENTYPE/__CLC_S_GENTYPE define in gentype.inc (#188027)
Reduce macro re-definition overhead.
Commit: 0e5e434f999ba0b9011cd30b086512634e355d99
https://github.com/llvm/llvm-project/commit/0e5e434f999ba0b9011cd30b086512634e355d99
Author: Slava Zakharin <szakharin at nvidia.com>
Date: 2026-03-23 (Mon, 23 Mar 2026)
Changed paths:
M mlir/lib/Dialect/Affine/IR/AffineOps.cpp
M mlir/test/Dialect/Affine/ops.mlir
Log Message:
-----------
[affine] Support xori/maxnumf/minnumf reduction types. (#184450)
This is a follow-up on #163310, which supported the above reduction
kinds, but did not update affine.parallel verification code.
Commit: 6a8a1008b56c8a3532b19551292e71216f0ea03e
https://github.com/llvm/llvm-project/commit/6a8a1008b56c8a3532b19551292e71216f0ea03e
Author: Midhunesh <midhunesh.p at ibm.com>
Date: 2026-03-24 (Tue, 24 Mar 2026)
Changed paths:
M compiler-rt/cmake/base-config-ix.cmake
Log Message:
-----------
[compiler-rt] Error only if sanitizer builds are enabled (#187944)
This fix is to error out only if sanitizer builds are enabled as opposed
to forcing flang to use an option or install the development package.
Commit: 7fc3d6edef2fe3ce799bfc7bc31f46ed68d35e15
https://github.com/llvm/llvm-project/commit/7fc3d6edef2fe3ce799bfc7bc31f46ed68d35e15
Author: Jakub Kuderski <jakub at nod-labs.com>
Date: 2026-03-23 (Mon, 23 Mar 2026)
Changed paths:
M llvm/include/llvm/ADT/PointerUnion.h
Log Message:
-----------
[llvm][ADT] Refactor PointerUnion to use PunnedPointer. NFC. (#187950)
Replace `PointerIntPair`-based storage with raw `PunnedPointer<void*>`
and explicit tag encoding. The bit layout stay identical. Use constexpr
functions (`minBits`, `tagBits`, `tagShift`) whose bodies are only
instantiated when called, for incomplete-type compatibility
The goal is to prepare `PointerUnion` for future extension to support
variable-length encoding and allow for more variants than with simple
tags, which will require direct bit manipulation not possible with
`PointerIntPair`.
I benchmarked this with https://github.com/llvm/llvm-project/pull/187874
and the performance is identical on my system.
---------
Co-authored-by: Claude Opus 4.6 (1M context) <noreply at anthropic.com>
Commit: 79ae4c741940707c5cb44223e25f248c9bb56552
https://github.com/llvm/llvm-project/commit/79ae4c741940707c5cb44223e25f248c9bb56552
Author: Haohai Wen <haohai.wen at intel.com>
Date: 2026-03-24 (Tue, 24 Mar 2026)
Changed paths:
M llvm/lib/Object/ELF.cpp
Log Message:
-----------
[Object] Normalize BBAddrMap decode address types in ELF (#187962)
This is part of patches to port BBAddrMap to COFF.
DataExtractor::getAddress reads 4 or 8 bytes according to AddressSize and
returns a uint64_t container value. This code path already sets AddressSize
from ELFT::Is64Bits and stores range/function addresses as uint64_t.
Replace temporary uintX_t/unsigned values in this decoder path with uint64_t
and remove the redundant cast from getAddress(). This preserves behavior for
ELF32/ELF64 inputs.
This is a preparatory step for extracting a format-agnostic BBAddrMap decoder.
Commit: d734ead1328675bf644620cc524c8dab10344815
https://github.com/llvm/llvm-project/commit/d734ead1328675bf644620cc524c8dab10344815
Author: LeeYoungJoon <dog3hk.dev at gmail.com>
Date: 2026-03-24 (Tue, 24 Mar 2026)
Changed paths:
M clang-tools-extra/clang-tidy/bugprone/PointerArithmeticOnPolymorphicObjectCheck.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/test/clang-tidy/checkers/bugprone/pointer-arithmetic-on-polymorphic-object-all.cpp
Log Message:
-----------
[clang-tidy] Fix false positive in cert-ctr56-cpp (PointerArithmeticOnPolymorphicObjectCheck) (#187452)
## Summary
This change adds `unless(isInstantiationDependent())` to the
`ArraySubscript` matcher.
## Motivation
In template code, some array subscript expressions are not fully
resolved yet.
Because of this, the matcher may treat them incorrectly and produce
false positives.
## Change
This patch skips instantiation-dependent expressions in templates.
It helps the matcher work only on resolved expressions.
Closes https://github.com/llvm/llvm-project/issues/187009.
Commit: 74ca05748f657a39ed53ef50a9a1f8e972f53959
https://github.com/llvm/llvm-project/commit/74ca05748f657a39ed53ef50a9a1f8e972f53959
Author: Jan Voung <jvoung at google.com>
Date: 2026-03-23 (Mon, 23 Mar 2026)
Changed paths:
M clang/lib/Analysis/FlowSensitive/Models/UncheckedOptionalAccessModel.cpp
M clang/unittests/Analysis/FlowSensitive/MockHeaders.cpp
M clang/unittests/Analysis/FlowSensitive/UncheckedOptionalAccessModelTest.cpp
Log Message:
-----------
[clang][dataflow] Fix bugprone-unchecked-optional-access for recent changes to libcxx (#188044)
Fix for https://github.com/llvm/llvm-project/issues/187788
- When checking the receiver with an UncheckedDerivedToBase cast, just
check each component of the chain if we've hit the public optional
class, rather than rely on public vs private/protected inheritance. This
covers the case when the class derives from optional.
- or check if the SubExpr of the cast is already the public optional
type (when not deriving from optional -- since you won't see this first
layer in the cast chain).
See comment about why there is public inheritance to a private base
class at the moment:
https://github.com/llvm/llvm-project/issues/187788#issuecomment-4106543794
The performance doesn't seem much different in several benchmarks.
Perhaps because we first see if the method name matches, which filters a
bunch out.
Also, make the operator* and operator-> calls do this search, since
https://github.com/llvm/llvm-project/pull/185252 moved the methods to
the internal base class.
Update the test mock headers slightly to reflect the operator* and
operator-> change.
Commit: 494b98236fc766b21657bb10b0b9787c5f40cdd6
https://github.com/llvm/llvm-project/commit/494b98236fc766b21657bb10b0b9787c5f40cdd6
Author: Elvis Wang <elvis.wang at sifive.com>
Date: 2026-03-24 (Tue, 24 Mar 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/test/CodeGen/RISCV/rvv/vector-extract-last-active.ll
Log Message:
-----------
[TargetLowering][RISCV] Using index type for step vector in expandVectorFindLastActive (#187984)
This patch change the type of the step vector lowered from
`expandVectorFindLastActive` from `e8` to the index type of the target
machine.
This can help the index out of bound issue when the VLEN is large.
Note that after this patch, there are still some issue in
expandVectorFindLastActive.
Commit: 6c6b4c154c49eeedc5c0a7e460bf529a73bbfcd6
https://github.com/llvm/llvm-project/commit/6c6b4c154c49eeedc5c0a7e460bf529a73bbfcd6
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-03-23 (Mon, 23 Mar 2026)
Changed paths:
M clang/lib/CodeGen/Targets/RISCV.cpp
M clang/test/CodeGen/RISCV/abi-empty-structs.c
M clang/test/CodeGen/RISCV/bfloat-abi.c
M clang/test/CodeGen/RISCV/riscv32-abi.c
M clang/test/CodeGen/RISCV/riscv64-abi.c
Log Message:
-----------
[RISCV] Disable rounding of aggregate return/arguments to iXLen. (#184736)
If the type is rounded to iXLen, an additional zext instruction is
generated. For example, https://godbolt.org/z/bG7vG4dvM
Commit: caf619642a6dbb216969a9450d33dbac5a8d30df
https://github.com/llvm/llvm-project/commit/caf619642a6dbb216969a9450d33dbac5a8d30df
Author: Chuanqi Xu <yedeng.yd at linux.alibaba.com>
Date: 2026-03-24 (Tue, 24 Mar 2026)
Changed paths:
M clang/lib/DependencyScanning/DependencyScannerImpl.cpp
A clang/test/ClangScanDeps/p1689-suppress-warnings.cppm
Log Message:
-----------
[ClangScanDeps] Do not emit warning for P1689 format (#186966)
Close https://github.com/llvm/llvm-project/issues/185394
This is only for P1689 format as ClangScanDeps/optimize-vfs-pch.m will
check for warning message. I'll leave this to people who want to change
that.
Commit: a2c6b34193fbcaf76d48d2896c816adb9ee45ffe
https://github.com/llvm/llvm-project/commit/a2c6b34193fbcaf76d48d2896c816adb9ee45ffe
Author: hanbeom <kese111 at gmail.com>
Date: 2026-03-24 (Tue, 24 Mar 2026)
Changed paths:
M llvm/lib/Target/WebAssembly/WebAssemblyFastISel.cpp
M llvm/test/CodeGen/WebAssembly/load-ext.ll
Log Message:
-----------
[WebAssembly][FastISel] Fold i64 extension chains into widened loads (#187934)
FastISel can already fold some sign- and zero-extending loads, but a
number of i64 extension patterns still leave redundant instructions
behind.
This patch series extends load folding to recognize several such cases,
including:
- promoted sign-extension chains
- copy + i64.extend_i32_{u,s} chains
- AND-based zero-extension chains
- shift-based sign-extension chains
When these patterns originate from narrow integer loads, fold them
directly into widened i64 loads instead of materializing intermediate
i32 loads followed by redundant i64 extends.
Fixes #179672
Commit: fd11cf430e5a9fd11f93bdcc929a1ce8dfa60f37
https://github.com/llvm/llvm-project/commit/fd11cf430e5a9fd11f93bdcc929a1ce8dfa60f37
Author: John Paul Jepko <john.jepko at ericsson.com>
Date: 2026-03-24 (Tue, 24 Mar 2026)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/AST/Decl.h
M clang/include/clang/Sema/Sema.h
M clang/lib/Sema/Sema.cpp
M clang/lib/Sema/SemaDecl.cpp
M clang/lib/Sema/SemaExpr.cpp
M clang/lib/Sema/SemaExprCXX.cpp
M clang/test/C/C2y/n3622.c
A clang/test/Sema/Inputs/warn-unused-but-set-static-global-header.h
A clang/test/Sema/warn-unused-but-set-static-global.c
A clang/test/Sema/warn-unused-but-set-static-global.cpp
M clang/test/SemaCXX/warn-variable-not-needed.cpp
Log Message:
-----------
[clang] Extend -Wunused-but-set-variable to static globals (#178342)
This PR extends the capability of -Wunused-but-set-variable to track and
diagnose static global variables that are assigned values within a
function but whose values are never used. This change complements
-Wunused-variable, which detects static globals that are neither set nor
used.
I created this change with the help of claude for some initial guidance.
Fixes #148361
Commit: c1a45ffc84eee23c7c330ea16eb08e9cf8fd623e
https://github.com/llvm/llvm-project/commit/c1a45ffc84eee23c7c330ea16eb08e9cf8fd623e
Author: Owen Pan <owenpiano at gmail.com>
Date: 2026-03-23 (Mon, 23 Mar 2026)
Changed paths:
M clang/docs/ClangFormatStyleOptions.rst
M clang/include/clang/Format/Format.h
Log Message:
-----------
[clang-format][doc] Add a note to OneLineFormatOffRegex option
Closes #184639
Commit: dee01fbf2c401f7ff3bad8341c2ace6e192915cf
https://github.com/llvm/llvm-project/commit/dee01fbf2c401f7ff3bad8341c2ace6e192915cf
Author: owenca <owenpiano at gmail.com>
Date: 2026-03-23 (Mon, 23 Mar 2026)
Changed paths:
M clang/Maintainers.md
Log Message:
-----------
Step down as clang-format maintainer (#187910)
I'm stepping down as clang-format maintainer and nominating
@HazardyKnusperkeks to take my place.
Commit: bd597259a8543a5705cbdb985612de573e5cb962
https://github.com/llvm/llvm-project/commit/bd597259a8543a5705cbdb985612de573e5cb962
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-03-24 (Tue, 24 Mar 2026)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ByteCode/EvalEmitter.cpp
M clang/lib/AST/ByteCode/Interp.cpp
M clang/lib/AST/ByteCode/Interp.h
M clang/lib/AST/ByteCode/InterpState.h
M clang/lib/AST/ByteCode/Opcodes.td
M clang/test/SemaCXX/cxx2b-deducing-this.cpp
M clang/test/SemaTemplate/stack-exhaustion.cpp
M clang/utils/TableGen/ClangOpcodesEmitter.cpp
Log Message:
-----------
[clang][bytecode] Revert tailcalls (#188169)
This _still_ causes problems on aarch64+msan, even when not using
tailcalls at all.
Reverts #173756
Commit: 704c60fe9110256d2698d8e56b8c44ec5d1e733f
https://github.com/llvm/llvm-project/commit/704c60fe9110256d2698d8e56b8c44ec5d1e733f
Author: Dominique Fuchs <df at 0x9d.net>
Date: 2026-03-24 (Tue, 24 Mar 2026)
Changed paths:
M clang/lib/Tooling/InterpolatingCompilationDatabase.cpp
M clang/unittests/Tooling/CompilationDatabaseTest.cpp
Log Message:
-----------
[clang][Tooling] Preserve -std flag when transferring compile commands across same-family language (#184560)
Previously, transfering a compile command from e.g. an ObjC++ source
(`.mm) to a C++ header (`.hh`) would drop `-std=c++20` because they
were different languages.
Fixes https://github.com/clangd/clangd/issues/1014
Fixes https://github.com/clangd/clangd/issues/2613
Signed-off-by: Dominique Fuchs <df at 0x9d.net>
Commit: 4444f517e99690c1221f906a8c4c4dec1333cb75
https://github.com/llvm/llvm-project/commit/4444f517e99690c1221f906a8c4c4dec1333cb75
Author: pkarveti <quic_pkarveti at quicinc.com>
Date: 2026-03-24 (Tue, 24 Mar 2026)
Changed paths:
M llvm/lib/Target/Hexagon/HexagonLoadStoreWidening.cpp
A llvm/test/CodeGen/Hexagon/load-widen-addasl.mir
A llvm/test/CodeGen/Hexagon/store-widen-addasl.mir
Log Message:
-----------
[Hexagon] Optimize load/store instruction during widening (#186962)
This change enhances the Hexagon Load-Store Widening pass to recognize
and optimize a specific pattern involving the S2_addasl_rrri
instruction. When widening loads/stores, the pass now detects cases
where the base register is defined by an S2_addasl_rrri instruction and
combines the operations into a single load double/store double
instruction with register shift op, eliminating the intermediate address
calculation.
Eg, for load,
If the definition of the base register came from a addasl instruction,
we generate a
memd(Rs + Rt << #imm) instead of memd(Rs + #imm) instruction.
Transform:
%18 = S2_addasl_rrri %8, %17, 3
%19 = L2_loadri_io %18, 0
to
%19 = L4_loadrd_rr %8, %17, 3
Patch By: Pavani Karveti <pkarveti at qti.qulacomm.com>
Author: Santanu Das <santdas at qti.qualcomm.com>
Co-authored-by: quic-santdas <quic_santdas at quicinc.com>
Commit: a8b669ba6ee4ec3eb523d91deaf28ef0f8734100
https://github.com/llvm/llvm-project/commit/a8b669ba6ee4ec3eb523d91deaf28ef0f8734100
Author: Aleksandr Platonov <arcsinx45 at gmail.com>
Date: 2026-03-24 (Tue, 24 Mar 2026)
Changed paths:
M clang-tools-extra/Maintainers.rst
Log Message:
-----------
[clangd] Add ArcsinX as a maintainer (#187886)
To address clangd maintance problem, I'm nominating myself as a clangd
maintainer.
I'm currently actively reviewing PRs. I also participated in
clangd-related discourse discussions, subscribed to clangd issues and
PRs. For a while I plan to spend some time for PRs review in clangd.
Commit: c378b79c145a36c6c45dcedd8dc197e001a75a64
https://github.com/llvm/llvm-project/commit/c378b79c145a36c6c45dcedd8dc197e001a75a64
Author: Ruiling, Song <ruiling.song at amd.com>
Date: 2026-03-24 (Tue, 24 Mar 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUPromoteAlloca.cpp
R llvm/test/CodeGen/AMDGPU/promote-alloca-delay-value-replacement.ll
Log Message:
-----------
Revert "AMDGPU: Delay value replacement in PromoteAlloca (#186944)" (#188180)
This reverts commit 5624cce586c74ec7cfcbd0243f65cb1870677af7.
This is causing libclc failure. revert to fix it properly.
Commit: 85e1c641eba7628070b561089af787ed5d07ed86
https://github.com/llvm/llvm-project/commit/85e1c641eba7628070b561089af787ed5d07ed86
Author: David Sherwood <david.sherwood at arm.com>
Date: 2026-03-24 (Tue, 24 Mar 2026)
Changed paths:
M llvm/test/Transforms/LoopVectorize/2016-07-27-loop-vec.ll
M llvm/test/Transforms/LoopVectorize/AArch64/gather-do-not-vectorize-addressing.ll
M llvm/test/Transforms/LoopVectorize/AArch64/nontemporal-load-store.ll
M llvm/test/Transforms/LoopVectorize/AArch64/outer_loop_prefer_scalable.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-dot-product.ll
M llvm/test/Transforms/LoopVectorize/AArch64/pr33053.ll
M llvm/test/Transforms/LoopVectorize/AArch64/pr36032.ll
M llvm/test/Transforms/LoopVectorize/AArch64/prefer-fixed-if-equal-to-scalable.ll
M llvm/test/Transforms/LoopVectorize/AArch64/reg-usage.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-illegal-type.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-interleaved-accesses.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-interleaved-masked-accesses.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-invalid-costs.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve2-histcnt.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-known-trip-count.ll
M llvm/test/Transforms/LoopVectorize/ARM/prefer-tail-loop-folding.ll
M llvm/test/Transforms/LoopVectorize/ARM/tail-folding-allowed.ll
M llvm/test/Transforms/LoopVectorize/ARM/tail-folding-counting-down.ll
M llvm/test/Transforms/LoopVectorize/ARM/tail-folding-loop-hint.ll
M llvm/test/Transforms/LoopVectorize/ARM/tail-folding-not-allowed.ll
M llvm/test/Transforms/LoopVectorize/ARM/tail-folding-prefer-flag.ll
M llvm/test/Transforms/LoopVectorize/ARM/tail-folding-reductions-allowed.ll
M llvm/test/Transforms/LoopVectorize/Hexagon/minimum-vf.ll
M llvm/test/Transforms/LoopVectorize/LoongArch/loongarch-interleaved.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/interleave_IC.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/optimal-epilog-vectorization-profitability.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/predcost.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/vectorize-bswap.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/widened-massv-call.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/widened-massv-vfabi-attr.ll
M llvm/test/Transforms/LoopVectorize/RISCV/illegal-type.ll
M llvm/test/Transforms/LoopVectorize/RISCV/masked_gather_scatter.ll
M llvm/test/Transforms/LoopVectorize/RISCV/riscv-interleaved.ll
M llvm/test/Transforms/LoopVectorize/Sparc/no-vectorize.ll
M llvm/test/Transforms/LoopVectorize/SystemZ/mem-interleaving-costs-03.ll
M llvm/test/Transforms/LoopVectorize/SystemZ/predicated-first-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/VE/disable_lv.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-half.ll
M llvm/test/Transforms/LoopVectorize/X86/drop-poison-generating-flags.ll
M llvm/test/Transforms/LoopVectorize/X86/int128_no_gather.ll
M llvm/test/Transforms/LoopVectorize/X86/interleave_short_tc.ll
M llvm/test/Transforms/LoopVectorize/X86/interleaved-accesses-use-after-free.ll
M llvm/test/Transforms/LoopVectorize/X86/masked_load_store.ll
M llvm/test/Transforms/LoopVectorize/X86/pr35432.ll
M llvm/test/Transforms/LoopVectorize/X86/pr54634.ll
M llvm/test/Transforms/LoopVectorize/X86/reg-usage-debug.ll
M llvm/test/Transforms/LoopVectorize/X86/strided_load_cost.ll
M llvm/test/Transforms/LoopVectorize/X86/tail_folding_and_assume_safety.ll
M llvm/test/Transforms/LoopVectorize/X86/tail_loop_folding.ll
M llvm/test/Transforms/LoopVectorize/X86/uniformshift.ll
M llvm/test/Transforms/LoopVectorize/X86/x86-interleaved-accesses-masked-group.ll
M llvm/test/Transforms/LoopVectorize/X86/x86-interleaved-store-accesses-with-gaps.ll
M llvm/test/Transforms/LoopVectorize/X86/x86-pr39099.ll
M llvm/test/Transforms/LoopVectorize/diag-missing-instr-debug-loc.ll
M llvm/test/Transforms/LoopVectorize/diag-with-hotness-info-2.ll
M llvm/test/Transforms/LoopVectorize/diag-with-hotness-info.ll
M llvm/test/Transforms/LoopVectorize/discriminator.ll
M llvm/test/Transforms/LoopVectorize/dont-fold-tail-for-const-TC.ll
M llvm/test/Transforms/LoopVectorize/dont-fold-tail-for-divisible-TC.ll
M llvm/test/Transforms/LoopVectorize/explicit_outer_detection.ll
M llvm/test/Transforms/LoopVectorize/explicit_outer_nonuniform_inner.ll
M llvm/test/Transforms/LoopVectorize/explicit_outer_uniform_diverg_branch.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence-complex.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/fix-reduction-dbg.ll
M llvm/test/Transforms/LoopVectorize/forked-pointers.ll
M llvm/test/Transforms/LoopVectorize/induction-ptrcasts.ll
M llvm/test/Transforms/LoopVectorize/interleaved-accesses-1.ll
M llvm/test/Transforms/LoopVectorize/interleaved-accesses-2.ll
M llvm/test/Transforms/LoopVectorize/interleaved-accesses-masked-group.ll
M llvm/test/Transforms/LoopVectorize/interleaved-accesses-uniform-load.ll
M llvm/test/Transforms/LoopVectorize/libcall-remark.ll
M llvm/test/Transforms/LoopVectorize/memdep-fold-tail.ll
M llvm/test/Transforms/LoopVectorize/memdep.ll
M llvm/test/Transforms/LoopVectorize/memory-dep-remarks.ll
M llvm/test/Transforms/LoopVectorize/middle-block-dbg.ll
M llvm/test/Transforms/LoopVectorize/no_array_bounds_scalable.ll
M llvm/test/Transforms/LoopVectorize/nounroll.ll
M llvm/test/Transforms/LoopVectorize/optimal-epilog-vectorization.ll
M llvm/test/Transforms/LoopVectorize/outer_loop_scalable.ll
M llvm/test/Transforms/LoopVectorize/pr30654-phiscev-sext-trunc.ll
M llvm/test/Transforms/LoopVectorize/pr31098.ll
M llvm/test/Transforms/LoopVectorize/pr33706.ll
M llvm/test/Transforms/LoopVectorize/pr35773.ll
M llvm/test/Transforms/LoopVectorize/pr38800.ll
M llvm/test/Transforms/LoopVectorize/pr39099.ll
M llvm/test/Transforms/LoopVectorize/pr51614-fold-tail-by-masking.ll
M llvm/test/Transforms/LoopVectorize/runtime-check.ll
M llvm/test/Transforms/LoopVectorize/tail-folding-counting-down.ll
M llvm/test/Transforms/LoopVectorize/unroll-novec-memcheck-metadata.ll
M llvm/test/Transforms/LoopVectorize/vect-phiscev-sext-trunc.ll
M llvm/test/Transforms/LoopVectorize/vectorizeVFone.ll
Log Message:
-----------
[LV][NFC] Remove some unused attributes from tests (#188091)
The local_unnamed_addr and dso_local attributes add no value to any of
the tests and simply increase file size, so I've removed all instances.
Commit: 428995b49750a97fe4993aa4b2ab3de86c173481
https://github.com/llvm/llvm-project/commit/428995b49750a97fe4993aa4b2ab3de86c173481
Author: Honey Goyal <honeygoyal24 at gmail.com>
Date: 2026-03-24 (Tue, 24 Mar 2026)
Changed paths:
A llvm/test/tools/sancov/XCOFF/lit.local.cfg
A llvm/test/tools/sancov/XCOFF/xcoff-sancov-symbols.test
M llvm/tools/sancov/sancov.cpp
Log Message:
-----------
Add XCOFF object file support in sanitizer coverage tool (#179884)
The sancov tool fails to find coverage symbols in XCOFF object files
because XCOFF uses a "." prefix for function entry point symbols. For
example, `__sanitizer_cov_trace_pc_guard appears` as
`.__sanitizer_cov_trace_pc_guard` in the symbol table.
Before this change, sancov reports:
`ERROR: __sanitizer_cov* functions not found`
This change strips the prefix "." when checking symbol names in XCOFF
files, allowing sancov to correctly identify coverage symbols.
---------
Co-authored-by: Honey Goyal <honey.goyal3 at ibm.com>
Commit: ef5658a289e24fa145663a1c22e0751d6c12991c
https://github.com/llvm/llvm-project/commit/ef5658a289e24fa145663a1c22e0751d6c12991c
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-03-24 (Tue, 24 Mar 2026)
Changed paths:
M libclc/clc/lib/generic/conversion/clc_convert_float.inc
Log Message:
-----------
libclc: Simplify rtz conversion (#188137)
Commit: 31aa52086fb2208f451be9e22197ae1a63cdc4af
https://github.com/llvm/llvm-project/commit/31aa52086fb2208f451be9e22197ae1a63cdc4af
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-03-24 (Tue, 24 Mar 2026)
Changed paths:
M libclc/clc/lib/generic/conversion/clc_convert_float.inc
M libclc/clc/lib/generic/conversion/clc_convert_float2float.cl
M libclc/clc/lib/generic/conversion/clc_convert_int2float.cl
Log Message:
-----------
libclc: Use nextup and nextdown in place of nextafter (#188141)
Unfortunately it seems the optimizer isn't able to clean this
up, so this is a code quality improvement.
Commit: f7fb46701a374d2a15d9e79197f21b128e249b95
https://github.com/llvm/llvm-project/commit/f7fb46701a374d2a15d9e79197f21b128e249b95
Author: Ryotaro Kasuga <kasuga.ryotaro at fujitsu.com>
Date: 2026-03-24 (Tue, 24 Mar 2026)
Changed paths:
A llvm/test/Analysis/DependenceAnalysis/weak-crossing-siv-coeff-may-zero.ll
Log Message:
-----------
[DA] Add a test where the Weak Crossing SIV test misses dependency (NFC) (#188183)
The root cause is that the Weak Crossing SIV test assumes the
coefficients are non‑zero without verifying it.
Commit: ff68154480eccdfeaa18d87fd6d83906e93a85c1
https://github.com/llvm/llvm-project/commit/ff68154480eccdfeaa18d87fd6d83906e93a85c1
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-03-24 (Tue, 24 Mar 2026)
Changed paths:
M libclc/clc/lib/generic/math/clc_asin.cl
M libclc/clc/lib/generic/math/clc_asin.inc
Log Message:
-----------
libclc: Update asin (#188094)
This was originally ported from rocm device libs in
64a8e1b83e14836f97dab4d28dae498e897804e6. Update for more
recent changes.
Commit: cba948b2b93cc5d51f70f0fa0d66bc5cacef9d76
https://github.com/llvm/llvm-project/commit/cba948b2b93cc5d51f70f0fa0d66bc5cacef9d76
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-03-24 (Tue, 24 Mar 2026)
Changed paths:
A libclc/clc/include/clc/math/clc_atan_helpers.h
A libclc/clc/include/clc/math/clc_atan_helpers_decl.inc
M libclc/clc/lib/generic/CMakeLists.txt
M libclc/clc/lib/generic/math/clc_atan.cl
M libclc/clc/lib/generic/math/clc_atan.inc
A libclc/clc/lib/generic/math/clc_atan_helpers.cl
A libclc/clc/lib/generic/math/clc_atan_helpers.inc
Log Message:
-----------
libclc: Update atan (#188095)
This was originally ported from rocm device libs in
47882923c7b48c00d6c0ea9960b5457e957093c4. Merge in more
recent changes.
Commit: 2e39b1e56025f6fad5b5f84cdf4051b4d1475ec0
https://github.com/llvm/llvm-project/commit/2e39b1e56025f6fad5b5f84cdf4051b4d1475ec0
Author: Lang Hames <lhames at gmail.com>
Date: 2026-03-24 (Tue, 24 Mar 2026)
Changed paths:
M llvm/include/llvm/ExecutionEngine/Orc/Core.h
M llvm/lib/ExecutionEngine/Orc/Core.cpp
M llvm/unittests/ExecutionEngine/Orc/CoreAPIsTest.cpp
Log Message:
-----------
[ORC] Add a bootstrap symbols JITDylib to ExecutionSession. (#188172)
The ExecutionSession constructor now creates a "<bootstrap>" JITDylib
and populates it with the bootstrap symbols from the
ExecutorProcessControl object. This allows bootstrap symbols to be
looked up via ExecutionSession::lookup, providing greater consistency
with other JIT symbol lookups.
Commit: 32c6a53b767850183208aff8b783e6bc08f21515
https://github.com/llvm/llvm-project/commit/32c6a53b767850183208aff8b783e6bc08f21515
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-03-24 (Tue, 24 Mar 2026)
Changed paths:
M libclc/clc/lib/generic/conversion/clc_convert_float.inc
M libclc/clc/lib/generic/conversion/clc_convert_float2float.cl
Log Message:
-----------
libclc: Fix -cl-denorms-are-zero for rtp and rtn conversions (#188148)
Commit: 1a5e52168c0bef0c5abecb89e9f18253f8a43dda
https://github.com/llvm/llvm-project/commit/1a5e52168c0bef0c5abecb89e9f18253f8a43dda
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-03-24 (Tue, 24 Mar 2026)
Changed paths:
M libclc/clc/include/clc/math/clc_ep_decl.inc
M libclc/clc/lib/generic/math/clc_ep.inc
M libclc/clc/lib/generic/math/clc_log1p.cl
M libclc/clc/lib/generic/math/clc_log1p.inc
Log Message:
-----------
libclc: Update log1p (#188186)
Commit: d1b9b4c5488f051a84669b2f8e4b038f49ba4c22
https://github.com/llvm/llvm-project/commit/d1b9b4c5488f051a84669b2f8e4b038f49ba4c22
Author: Fangrui Song <i at maskray.me>
Date: 2026-03-24 (Tue, 24 Mar 2026)
Changed paths:
M bolt/lib/Core/BinaryContext.cpp
M bolt/lib/Core/BinaryEmitter.cpp
M bolt/lib/Passes/AsmDump.cpp
M llvm/include/llvm/MC/MCELFStreamer.h
M llvm/include/llvm/MC/MCStreamer.h
M llvm/include/llvm/MC/MCWinCOFFStreamer.h
M llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
M llvm/lib/MC/MCELFStreamer.cpp
M llvm/lib/MC/MCParser/AsmParser.cpp
M llvm/lib/MC/MCParser/MasmParser.cpp
M llvm/lib/MC/MCStreamer.cpp
M llvm/lib/MC/MCWinCOFFStreamer.cpp
M llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
M llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
M llvm/tools/llvm-ml/Disassembler.cpp
M llvm/unittests/DebugInfo/DWARF/DWARFExpressionCopyBytesTest.cpp
M llvm/unittests/MC/DwarfLineTableHeaders.cpp
Log Message:
-----------
[MC] Remove unused NoExecStack parameter from MCStreamer::initSections. NFC (#188184)
Unused after commit 34bc5d580b73c0ca79653bb03e5c50419be2c634
Commit: fbddf80156a831179d5b12c213721d2368704776
https://github.com/llvm/llvm-project/commit/fbddf80156a831179d5b12c213721d2368704776
Author: Chuanqi Xu <yedeng.yd at linux.alibaba.com>
Date: 2026-03-24 (Tue, 24 Mar 2026)
Changed paths:
M clang/include/clang/AST/ASTMutationListener.h
M clang/include/clang/Serialization/ASTWriter.h
M clang/lib/Frontend/MultiplexConsumer.cpp
M clang/lib/Sema/SemaModule.cpp
M clang/lib/Serialization/ASTWriter.cpp
A clang/test/Modules/class-instantiate-no-change-02.cppm
A clang/test/Modules/special-member-definitions.cppm
Log Message:
-----------
[C++20] [Modules] Apply DeclUpdate lazily in reduced BMI (#175498)
Previously we will apply all decl update unconditionally, but it might
not be best. See the attached example
'class-instantiate-no-change-02.cppm' for example. Sometimes these BMIs
are reducible.
Would land after 22 cut.
Commit: b929f2f0189ef3698d7b65168ff51976bb6f86e2
https://github.com/llvm/llvm-project/commit/b929f2f0189ef3698d7b65168ff51976bb6f86e2
Author: Wenju He <wenju.he at intel.com>
Date: 2026-03-24 (Tue, 24 Mar 2026)
Changed paths:
M libclc/clc/include/clc/math/gentype.inc
M libclc/clc/include/clc/relational/binary_decl.inc
M libclc/clc/include/clc/relational/unary_decl.inc
M libclc/clc/lib/generic/atomic/clc_atomic_exchange.cl
M libclc/clc/lib/generic/atomic/clc_atomic_load.cl
M libclc/clc/lib/generic/atomic/clc_atomic_store.cl
M libclc/clc/lib/generic/common/clc_sign.inc
M libclc/opencl/lib/generic/relational/relational_binary_def.inc
M libclc/opencl/lib/generic/relational/relational_unary_def.inc
Log Message:
-----------
[libclc][NFC] Remove __CLC_BIT_INTN macro (#188023)
This macro was originally introduced in 64735ad63975 for relational
built-ins. It is functionally identical to __CLC_S_GENTYPE. Replacing it
simplifies gentype.inc, which is widely used in the library.
Commit: d607d6f78f803d51a961d991811f0f2f439f695a
https://github.com/llvm/llvm-project/commit/d607d6f78f803d51a961d991811f0f2f439f695a
Author: Alexey Merzlyakov <60094858+AlexeyMerzlyakov at users.noreply.github.com>
Date: 2026-03-24 (Tue, 24 Mar 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
M llvm/test/CodeGen/AArch64/cls.ll
M llvm/test/CodeGen/AArch64/pr61549.ll
M llvm/test/CodeGen/VE/Scalar/ctlz.ll
Log Message:
-----------
[LegalizeTypes] Keep non-negative info in SUB(CTLZ) (#186338)
When legalizing CTLZ for a wider type with a SUB bit-width compensation,
the result for a zero-defined case can have an extra bit that exceeds
the maximum value of the original type width. Unlike CTLS, which covers
all bits within its type width, CTLZ leads to producing undefined
KnownBits. So, after subtraction, the KnownBits could represent a
negative value, which prevents subsequent optimizations.
This patch ensures that non-negative information is preserved during the
SUB(CTLZ) expansion, so that KnownBits after SUB will take a stricter
range within the type width, thus allowing further combine optimizations
following by SUB. Particularly, this enables the DAG Combiner to remove
unnecessary AND instructions for CTLZ output type conversion.
Fixes #136516
---------
Co-authored-by: Simon Pilgrim <git at redking.me.uk>
Commit: 96fb2942cb522b05f773f7492c1c125c7aef620c
https://github.com/llvm/llvm-project/commit/96fb2942cb522b05f773f7492c1c125c7aef620c
Author: Dan Blackwell <dan_blackwell at apple.com>
Date: 2026-03-24 (Tue, 24 Mar 2026)
Changed paths:
M compiler-rt/test/asan/TestCases/disable_container_overflow_checks.cpp
M compiler-rt/test/asan/TestCases/stack_container_dynamic_lib.cpp
Log Message:
-----------
[ASan] Enable __SANITIZER_DISABLE_CONTAINER_OVERFLOW__ tests (#181721)
Now that the corresponding libcxx change has landed, these tests should
be passing on some platforms.
This patch re-enables them for all platforms, so that we can see which
bots these do not work on and mark them unsupported accordingly.
rdar://167946476
Commit: 76177971a8f74f533a136577b8f709df96cd6b37
https://github.com/llvm/llvm-project/commit/76177971a8f74f533a136577b8f709df96cd6b37
Author: Tomer Shafir <tomer.shafir8 at gmail.com>
Date: 2026-03-24 (Tue, 24 Mar 2026)
Changed paths:
A llvm/test/tools/opt/mattr-mcpu-help.ll
M llvm/tools/opt/optdriver.cpp
Log Message:
-----------
[opt] Enable -mcpu=help without an input file (#187876)
This patch enables `-mcpu=help` or `-mattr=help` invocation without an
input file, like `llc`. For example, the following command `opt
-mtriple=aarch64 -mattr=help` would previously hang but now it succeeds.
The implementation is similar to llc, creating a target machine for help
printing side effects and existing early. Note: llc has a bug in the
default triple handling that we already fix here upfront. Ill submit a
separate fix for llc.
Commit: 5e79d9798584e04fa03e48dd50ba152f74266ff0
https://github.com/llvm/llvm-project/commit/5e79d9798584e04fa03e48dd50ba152f74266ff0
Author: Tomer Shafir <tomer.shafir8 at gmail.com>
Date: 2026-03-24 (Tue, 24 Mar 2026)
Changed paths:
M llvm/test/tools/llc/mattr-mcpu-help.ll
M llvm/test/tools/llc/mtune.ll
M llvm/tools/llc/llc.cpp
Log Message:
-----------
[llc] Fix -mcpu=help for default target triple (#187878)
Previously, a command like `llc -mcpu=help` would fail on invalid target
triple, due to wrongly passing empty target to `Triple::normalize`
resulting in `unknown`.
Commit: 65b576d2b0c49adf2d477e90b43ea9ef35b165c3
https://github.com/llvm/llvm-project/commit/65b576d2b0c49adf2d477e90b43ea9ef35b165c3
Author: Carl Ritson <carl.ritson at amd.com>
Date: 2026-03-24 (Tue, 24 Mar 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUAtomicOptimizer.cpp
A llvm/test/CodeGen/AMDGPU/atomic_optimizations_single_lane.ll
Log Message:
-----------
[AMDGPU] Disable atomic optimizer for single lane execution (#187915)
Optimized IR will have worse performance when only a single lane is
active. Disable optimizer when single lane is expected at compile time.
Commit: 34875331d956862d6f5b750c0bcf026d40564671
https://github.com/llvm/llvm-project/commit/34875331d956862d6f5b750c0bcf026d40564671
Author: Daniil Kovalev <dkovalev at accesssoftek.com>
Date: 2026-03-24 (Tue, 24 Mar 2026)
Changed paths:
M clang/lib/Headers/ptrauth.h
M compiler-rt/lib/builtins/crtbegin.c
Log Message:
-----------
[PAC][compiler-rt] Use `__ptrauth` qualifier instead of builtins (#188109)
Since #100830 has landed, we no longer need to rely on builtins
Commit: ff3632cdf37c94a4eb830c6cd501b3067a79163d
https://github.com/llvm/llvm-project/commit/ff3632cdf37c94a4eb830c6cd501b3067a79163d
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-03-24 (Tue, 24 Mar 2026)
Changed paths:
M libclc/clc/include/clc/math/clc_lgamma_r.h
A libclc/clc/include/clc/math/clc_lgamma_r_decl.inc
M libclc/clc/include/clc/shared/binary_with_out_arg_scalarize.inc
A libclc/clc/include/clc/shared/unary_with_out_arg_scalarize_loop.inc
M libclc/clc/lib/generic/math/clc_lgamma_r.cl
M libclc/clc/lib/generic/math/clc_lgamma_r.inc
A libclc/clc/lib/generic/math/clc_lgamma_r_stret.inc
Log Message:
-----------
libclc: Update lgamma_r (#188065)
This was originally ported from rocm device libs in
0ab07e1bde7d002f1a4c30babb6241c0cc366320. Merge
in more recent changes.
Commit: 641569de4e07f3a38af6720cabd84a91c73d8143
https://github.com/llvm/llvm-project/commit/641569de4e07f3a38af6720cabd84a91c73d8143
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-03-24 (Tue, 24 Mar 2026)
Changed paths:
M libclc/clc/lib/generic/math/clc_tgamma.cl
A libclc/clc/lib/generic/math/clc_tgamma.inc
Log Message:
-----------
libclc: Improve tgamma handling (#188066)
Commit: 8f85bb16548c67eba62d3458afd21d311ab4d478
https://github.com/llvm/llvm-project/commit/8f85bb16548c67eba62d3458afd21d311ab4d478
Author: Chris Cotter <ccotter14 at bloomberg.net>
Date: 2026-03-24 (Tue, 24 Mar 2026)
Changed paths:
M mlir/lib/Pass/PassRegistry.cpp
Log Message:
-----------
[mlir][nfc] Fix gcc compiler error on destructor in PassRegistry.cpp (#187900)
Remove template arguments from out-of-line destructor definition, as
C++20 does not allow template-ids on destructors.
Commit: f243d8656b11e915f6edbffeed2c4afefb67a69f
https://github.com/llvm/llvm-project/commit/f243d8656b11e915f6edbffeed2c4afefb67a69f
Author: David Spickett <david.spickett at arm.com>
Date: 2026-03-24 (Tue, 24 Mar 2026)
Changed paths:
M llvm/utils/git/github-automation.py
Log Message:
-----------
[llvm][utils] Handle Issue/PR authors having no display name set (#186094)
user.login is the account name and user.name is an optional display name
(often their full name). I got an email generated from a colleague's PR
that said:
```
Author: None (<their username>)
```
As they hadn't set user.name in their account. Which isn't a problem,
but it would be neater if we didn't print None.
So I've added a helper function to handle that. If the user has set
both, the output is as it was before, if the user has not, we just show
the login name.
The login name can apparently be None too. In that case we'll print
"None" for it. This does not seem to be a common case though, and I'm
not sure printing anything else would be any more useful.
Commit: 040b7e0a1deb08702cf2c929f2f3bb9c62bd3b0c
https://github.com/llvm/llvm-project/commit/040b7e0a1deb08702cf2c929f2f3bb9c62bd3b0c
Author: Markus Böck <markus.boeck02 at gmail.com>
Date: 2026-03-24 (Tue, 24 Mar 2026)
Changed paths:
M llvm/include/llvm/ADT/PointerUnion.h
Log Message:
-----------
Revert "[llvm][ADT] Refactor PointerUnion to use PunnedPointer. NFC." (#188210)
Reverts llvm/llvm-project#187950
Commit: fe105347e2b6092ef4ce9704bcbdbcf6ad7d3d6b
https://github.com/llvm/llvm-project/commit/fe105347e2b6092ef4ce9704bcbdbcf6ad7d3d6b
Author: Luke Lau <luke at igalia.com>
Date: 2026-03-24 (Tue, 24 Mar 2026)
Changed paths:
M llvm/include/llvm/CodeGen/BasicTTIImpl.h
M llvm/include/llvm/CodeGen/ISDOpcodes.h
M llvm/include/llvm/CodeGen/TargetLowering.h
M llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/lib/CodeGen/TargetLoweringBase.cpp
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
M llvm/test/CodeGen/AArch64/intrinsic-cttz-elts-sve.ll
M llvm/test/CodeGen/AArch64/intrinsic-cttz-elts.ll
M llvm/test/CodeGen/AArch64/sve-mask-partition.ll
M llvm/test/CodeGen/RISCV/rvv/cttz-elts.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-cttz-elts.ll
Log Message:
-----------
[SelectionDAG] Expand CTTZ_ELTS[_ZERO_POISON] and handle splitting (#185605)
Currently a cttz.elts of e.g. nxv32i1 will get expanded to a reduction
of nxv32i64 or equivalent, but we can split it into two legal nxv16i1
cttz.elts once we have dedicated SelectionDAG nodes.
This implements the splitting for them the same way we implement type
splitting for vp.cttz.elts, i.e. check if the low result is VF, and if
so add it to the result of the high result. It also implements operand
type promotion for NEON which needs to promote i1 vectors to something
larger first.
We also need to move expansion into LegalizeVectorOps so it doesn't get
expanded before type legalization can do splitting. This uses
LegalizeVectorOps in case the scalar reduction type, which depends on
the minimum bitwidth needed to store the result, still needs type
promotion.
The TTI costs should be updated after this to reflect the more efficient
codegen, but that is deferred to another PR.
Commit: 1a5d1763595dd424d127da6e26dcc4e6ad481e3b
https://github.com/llvm/llvm-project/commit/1a5d1763595dd424d127da6e26dcc4e6ad481e3b
Author: Eugene Epshteyn <eepshteyn at nvidia.com>
Date: 2026-03-24 (Tue, 24 Mar 2026)
Changed paths:
M flang-rt/unittests/Runtime/Stop.cpp
Log Message:
-----------
[flang-rt] Fix test isolation, fixture usage, and other issues in Stop.cpp tests (#188155)
- Use TEST_F instead of TEST so CrashHandlerFixture::SetUp() is actually
called, registering the custom crash handler for death tests.
- Move putenv/executionEnvironment.Configure calls inside EXPECT_EXIT
blocks so they run in the forked child process, preventing the
NO_STOP_MESSAGE environment variable and configured global state from
leaking into subsequent tests.
- Replace const_cast<char *>("NO_STOP_MESSAGE=1") with a mutable static
char array, to avoid casting away constness of a string literal.
- Update CrashTest's expected pattern to match the output format of the
custom crash handler installed by CrashHandlerFixture, which was
previously never invoked due to the TEST vs TEST_F bug. (Note: there was
a buildbot failure related to this:
https://lab.llvm.org/buildbot/#/builders/130/builds/18413 )
Assisted-by: AI
Commit: 1b255ef5acdc5ebb14320efb135377f3b417c958
https://github.com/llvm/llvm-project/commit/1b255ef5acdc5ebb14320efb135377f3b417c958
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-03-24 (Tue, 24 Mar 2026)
Changed paths:
M libclc/clc/lib/generic/math/clc_ep.cl
M libclc/clc/lib/generic/math/clc_expm1.cl
M libclc/clc/lib/generic/math/clc_expm1.inc
Log Message:
-----------
libclc: Update expm1 (#188209)
This was originally ported from rocm device libs in
900bd7eb7f5426ad13f624cbf29716afe376c878. Merge in more
recent changes.
Commit: d491f702062d5ca14a7f633baf4b307a900fc02f
https://github.com/llvm/llvm-project/commit/d491f702062d5ca14a7f633baf4b307a900fc02f
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-03-24 (Tue, 24 Mar 2026)
Changed paths:
M libclc/clc/include/clc/math/clc_ep_decl.inc
M libclc/clc/lib/generic/math/clc_ep.inc
M libclc/clc/lib/generic/math/clc_sinh.cl
M libclc/clc/lib/generic/math/clc_sinh.inc
Log Message:
-----------
libclc: Update sinh (#188213)
This was originally ported from rocm device libs in
9f7172965c650627c020264e9dbdb32d005ce69e. Merge in more
recent changes.
Commit: c15edf8208f01b2bde0b7dfcbe9ac05757cdefb7
https://github.com/llvm/llvm-project/commit/c15edf8208f01b2bde0b7dfcbe9ac05757cdefb7
Author: Zorojuro <sawantsukumar at gmail.com>
Date: 2026-03-24 (Tue, 24 Mar 2026)
Changed paths:
M libc/shared/math/cbrtf.h
Log Message:
-----------
[libc] cbrtf guard to sync with general format (#188207)
This PR intends to make the cbrtf guard sync with the general format (
as other functions consistently use `LLVM_LIBC_SHARED_MATH_<func>_H`).
This was found during refactoring cbrtbf16.
Commit: aeba5d62e5352aa3ed2f0d5a6a563ac873dde716
https://github.com/llvm/llvm-project/commit/aeba5d62e5352aa3ed2f0d5a6a563ac873dde716
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-03-24 (Tue, 24 Mar 2026)
Changed paths:
M libclc/clc/lib/generic/math/clc_cosh.cl
M libclc/clc/lib/generic/math/clc_cosh.inc
Log Message:
-----------
libclc: Update cosh (#188214)
This was originally ported from rocm device libs in
9cb070f96a8a9af5f513ffba0a8eed362623f216. Merge in more
recent changes.
Commit: f1931cb6df0f66204f878647b9c341d3d57de241
https://github.com/llvm/llvm-project/commit/f1931cb6df0f66204f878647b9c341d3d57de241
Author: Konrad Kleine <kkleine at redhat.com>
Date: 2026-03-24 (Tue, 24 Mar 2026)
Changed paths:
M llvm/lib/DebugInfo/DWARF/DWARFDebugAbbrev.cpp
M llvm/lib/DebugInfo/DWARF/DWARFDebugAddr.cpp
M llvm/lib/DebugInfo/DWARF/DWARFDebugArangeSet.cpp
Log Message:
-----------
[llvm][DebugInfo] Use formatv instead of format in DebugAbbrev/Addr/ArangeSet (#186768)
This relates to #35980.
Commit: 3286de333b691d3d815939ce5618f85be71b1575
https://github.com/llvm/llvm-project/commit/3286de333b691d3d815939ce5618f85be71b1575
Author: Konrad Kleine <kkleine at redhat.com>
Date: 2026-03-24 (Tue, 24 Mar 2026)
Changed paths:
M llvm/lib/DebugInfo/DWARF/DWARFCompileUnit.cpp
Log Message:
-----------
[llvm][DebugInfo] DWARFCompileUnit use formatv instead of format (#186761)
This relates to #35980.
Commit: f046f4518dc7c707289b2fc8b748d3034cfa4c15
https://github.com/llvm/llvm-project/commit/f046f4518dc7c707289b2fc8b748d3034cfa4c15
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-03-24 (Tue, 24 Mar 2026)
Changed paths:
M libclc/clc/lib/generic/math/clc_tanh.cl
M libclc/clc/lib/generic/math/clc_tanh.inc
Log Message:
-----------
libclc: Update tanh (#188215)
This was originally ported from rocm device libs in
f51df5ba8c4512dbeb7828ac0c34f89177b551d6. Merge in more
recent changes.
Commit: fcc9ce94f6ba54484e2438aa5d456cc5dcaa40b6
https://github.com/llvm/llvm-project/commit/fcc9ce94f6ba54484e2438aa5d456cc5dcaa40b6
Author: Konrad Kleine <kkleine at redhat.com>
Date: 2026-03-24 (Tue, 24 Mar 2026)
Changed paths:
M llvm/lib/DebugInfo/BTF/BTFParser.cpp
Log Message:
-----------
[llvm][DebugInfo] BTFParser use formatv instead of format (#186109)
This relates to #35980.
Commit: 25da0c8ddbefc7b9c519dc45ae582ec6f5d9121c
https://github.com/llvm/llvm-project/commit/25da0c8ddbefc7b9c519dc45ae582ec6f5d9121c
Author: Konrad Kleine <kkleine at redhat.com>
Date: 2026-03-24 (Tue, 24 Mar 2026)
Changed paths:
M llvm/unittests/Support/FormatVariadicTest.cpp
Log Message:
-----------
[llvm][DebugInfo] Make to be formatted test value 64-bit (#188211)
Commit: 80245f3b1471c264cdac87f1d8ceb7169f5f68d6
https://github.com/llvm/llvm-project/commit/80245f3b1471c264cdac87f1d8ceb7169f5f68d6
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-03-24 (Tue, 24 Mar 2026)
Changed paths:
M libclc/clc/lib/generic/math/clc_asinh.cl
M libclc/clc/lib/generic/math/clc_asinh.inc
Log Message:
-----------
libclc: Update asinh (#188219)
This was originally ported from rocm device libs in
2b4ef39b2f46acf29294f1fbb223ea5a243c2567. Merge in more
recent changes.
Commit: 7d39664a6ae8daaf186b65578492244d96a50bf2
https://github.com/llvm/llvm-project/commit/7d39664a6ae8daaf186b65578492244d96a50bf2
Author: Luke Lau <luke at igalia.com>
Date: 2026-03-24 (Tue, 24 Mar 2026)
Changed paths:
M llvm/include/llvm/CodeGen/BasicTTIImpl.h
M llvm/include/llvm/CodeGen/ISDOpcodes.h
M llvm/include/llvm/CodeGen/TargetLowering.h
M llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/lib/CodeGen/TargetLoweringBase.cpp
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
M llvm/test/CodeGen/AArch64/intrinsic-cttz-elts-sve.ll
M llvm/test/CodeGen/AArch64/intrinsic-cttz-elts.ll
M llvm/test/CodeGen/AArch64/sve-mask-partition.ll
M llvm/test/CodeGen/RISCV/rvv/cttz-elts.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-cttz-elts.ll
Log Message:
-----------
Revert "[SelectionDAG] Expand CTTZ_ELTS[_ZERO_POISON] and handle splitting" (#188220)
Reverts llvm/llvm-project#185605
Buildbot failures caused by ISel crashes in
https://lab.llvm.org/buildbot/#/builders/157/builds/45416 and
https://lab.llvm.org/buildbot/#/builders/10/builds/25156
Commit: ad39e5a6b84819b75581ab8b1adafd1c8ffc9899
https://github.com/llvm/llvm-project/commit/ad39e5a6b84819b75581ab8b1adafd1c8ffc9899
Author: Twice <twice at apache.org>
Date: 2026-03-24 (Tue, 24 Mar 2026)
Changed paths:
M mlir/docs/Bindings/Python.md
Log Message:
-----------
[MLIR][Python][Docs] Fix example of Python-defined dialects (#188174)
Some breaking changes are introduced in #186574 for Python-defined
dialects. So we need to fix the example in the docs.
Commit: 2857f3bb6af5b7befee796c7ad3bb4edf8b6b028
https://github.com/llvm/llvm-project/commit/2857f3bb6af5b7befee796c7ad3bb4edf8b6b028
Author: Mariya Podchishchaeva <mariya.podchishchaeva at intel.com>
Date: 2026-03-24 (Tue, 24 Mar 2026)
Changed paths:
M clang/lib/Sema/SemaSYCL.cpp
M clang/test/ASTSYCL/ast-dump-sycl-kernel-call-stmt.cpp
M clang/test/CodeGenSYCL/kernel-caller-entry-point.cpp
Log Message:
-----------
[clang][SYCL] Strip references from generated kernel argument types (#186788)
Prior to this patch kernel generation copied kernel argument types
exactly as they're written in function's signature of the function
attributed with [[clang::sycl_kernel_entry_point]] attribute. This
caused generation of kernels that have reference kernel argument instead
of byval kernel argument.
SYCL 2020 doesn't allow reference kernel arguments and it doesn't seem
to work with the backends.
Arguments to [[clang::sycl_kernel_entry_point]]-attributed function can
be big, so we preserve references during host code generation to avoid
performance issues in SYCL Runtime library implementation because the
same function will be used for actual kernel argument setting via
sycl_kernel_launch interface.
Note that we still need to diagnose references in user's kernel
arguments since they are explicitly not allowed by SYCL 2020 spec and
this task is in TODO list. This patch simply removes references from
types written in SYCL Runtime library.
Assisted-by: claude in test writing.
Commit: 8b224162fa6aa6ebb6dd963c89b45571b1b0c8e5
https://github.com/llvm/llvm-project/commit/8b224162fa6aa6ebb6dd963c89b45571b1b0c8e5
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-03-24 (Tue, 24 Mar 2026)
Changed paths:
R libclc/clc/include/clc/math/clc_ep_log.h
R libclc/clc/include/clc/math/clc_ep_log_decl.inc
M libclc/clc/lib/generic/CMakeLists.txt
M libclc/clc/lib/generic/math/clc_acosh.cl
M libclc/clc/lib/generic/math/clc_acosh.inc
R libclc/clc/lib/generic/math/clc_ep_log.cl
R libclc/clc/lib/generic/math/clc_ep_log.inc
Log Message:
-----------
libclc: Update acosh (#188224)
libclc: Update acosh
This was originally ported from rocm device libs
in ca4d382e119e1389c83dbb07d9ca0085e88b2944. Merge in
more recent changes.
Remove unused ep_log.
Commit: 46205ff9b4cbe2bc18cc6600f0acf76bb4810053
https://github.com/llvm/llvm-project/commit/46205ff9b4cbe2bc18cc6600f0acf76bb4810053
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-03-24 (Tue, 24 Mar 2026)
Changed paths:
M libclc/clc/lib/generic/math/clc_atanh.cl
M libclc/clc/lib/generic/math/clc_atanh.inc
Log Message:
-----------
libclc: Update atanh (#188225)
Commit: b1aa6a45060bb9f89efded9e694503d6b4626a4a
https://github.com/llvm/llvm-project/commit/b1aa6a45060bb9f89efded9e694503d6b4626a4a
Author: Denis.G <34353767+DenisGZM at users.noreply.github.com>
Date: 2026-03-24 (Tue, 24 Mar 2026)
Changed paths:
M llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h
M llvm/include/llvm/CodeGen/GlobalISel/LegalizerInfo.h
M llvm/include/llvm/CodeGen/LowLevelTypeUtils.h
M llvm/include/llvm/CodeGen/TargetLowering.h
M llvm/include/llvm/CodeGenTypes/LowLevelType.h
M llvm/lib/CodeGen/GlobalISel/CallLowering.cpp
M llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
M llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
M llvm/lib/CodeGen/GlobalISel/LegalizeMutations.cpp
M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
M llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp
M llvm/lib/CodeGen/GlobalISel/Utils.cpp
M llvm/lib/CodeGen/LowLevelTypeUtils.cpp
M llvm/lib/CodeGen/MIRParser/MIParser.cpp
M llvm/lib/CodeGen/MachineVerifier.cpp
M llvm/lib/CodeGenTypes/LowLevelType.cpp
M llvm/lib/Target/AMDGPU/AMDGPUCombinerHelper.cpp
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-subvector.ll
M llvm/test/CodeGen/AArch64/GlobalISel/pr168872.ll
M llvm/test/CodeGen/AArch64/GlobalISel/translate-gep.ll
M llvm/test/CodeGen/AArch64/GlobalISel/translate-sve-formal-argument-multiple.ll
M llvm/test/CodeGen/AArch64/GlobalISel/translate-sve-formal-argument.ll
M llvm/test/CodeGen/MIR/AArch64/parse-low-level-type-invalid0.mir
M llvm/test/CodeGen/MIR/AArch64/parse-low-level-type-invalid1.mir
M llvm/test/CodeGen/MIR/AArch64/parse-low-level-type-invalid2.mir
M llvm/test/CodeGen/MIR/AArch64/parse-low-level-type-invalid3.mir
M llvm/test/CodeGen/MIR/Generic/scalable-vector-type-err0.mir
M llvm/test/CodeGen/MIR/Generic/scalable-vector-type-err1.mir
M llvm/test/CodeGen/MIR/Generic/scalable-vector-type-err10.mir
M llvm/test/CodeGen/MIR/Generic/scalable-vector-type-err11.mir
M llvm/test/CodeGen/MIR/Generic/scalable-vector-type-err12.mir
M llvm/test/CodeGen/MIR/Generic/scalable-vector-type-err13.mir
M llvm/test/CodeGen/MIR/Generic/scalable-vector-type-err14.mir
M llvm/test/CodeGen/MIR/Generic/scalable-vector-type-err15.mir
M llvm/test/CodeGen/MIR/Generic/scalable-vector-type-err2.mir
M llvm/test/CodeGen/MIR/Generic/scalable-vector-type-err3.mir
M llvm/test/CodeGen/MIR/Generic/scalable-vector-type-err4.mir
M llvm/test/CodeGen/MIR/Generic/scalable-vector-type-err5.mir
M llvm/test/CodeGen/MIR/Generic/scalable-vector-type-err6.mir
M llvm/test/CodeGen/MIR/Generic/scalable-vector-type-err7.mir
M llvm/test/CodeGen/MIR/Generic/scalable-vector-type-err8.mir
M llvm/test/CodeGen/MIR/Generic/scalable-vector-type-err9.mir
M llvm/test/CodeGen/MIR/WebAssembly/typed-immediate-operand-invalid0.mir
M llvm/test/CodeGen/MIR/WebAssembly/typed-immediate-operand-invalid1.mir
M llvm/test/TableGen/GlobalISelEmitter/GlobalISelEmitter.td
M llvm/test/TableGen/GlobalISelEmitter/HwModes.td
M llvm/unittests/CodeGen/GlobalISel/CMakeLists.txt
A llvm/unittests/CodeGen/GlobalISel/IRTranslatorBF16Test.cpp
M llvm/utils/TableGen/Common/CMakeLists.txt
M llvm/utils/TableGen/Common/GlobalISel/GlobalISelMatchTable.cpp
M llvm/utils/TableGen/Common/GlobalISel/GlobalISelMatchTableExecutorEmitter.cpp
M llvm/utils/TableGen/Common/GlobalISel/GlobalISelMatchTableExecutorEmitter.h
Log Message:
-----------
[GlobalISel][LLT] Introduce FPInfo for LLT (Enable bfloat, ppc128float and others in GlobalISel) (#155107)
Added extra information in LLT to support ambiguous fp types during
GlobalISel. Original idea by @tgymnich
Main differences from https://github.com/llvm/llvm-project/pull/122503
are:
* Do not deprecate LLT::scalar
* Allow targets to enable/disable IR translation with extenden LLT via
`TargetOption::EnableGlobalISelExtendedLLT` (disabled by default)
* `IRTranslator` use `TargetLoweringInfo` for appropriate `LLT`
generation.
* For this reason added flag in GlobalISelMatchTable` to allow switch
between legacy and new extended LLT names
* Revert using stubs like `LLT::float32` for float types as they are
real now. Added `TODO` for such cases.
Also MIRParser now may parse new type indentifiers.
---------
Co-authored-by: Tim Gymnich <tim at gymni.ch>
Co-authored-by: Ryan Cowan <ryan.cowan at arm.com>
Commit: 8a61e8f816b8f960e3671d458cc3b74f3c9131dc
https://github.com/llvm/llvm-project/commit/8a61e8f816b8f960e3671d458cc3b74f3c9131dc
Author: Utkarsh Saxena <usx at google.com>
Date: 2026-03-24 (Tue, 24 Mar 2026)
Changed paths:
M clang/include/clang/Analysis/Analyses/LifetimeSafety/Facts.h
M clang/include/clang/Analysis/Analyses/LifetimeSafety/Loans.h
M clang/lib/Analysis/LifetimeSafety/Checker.cpp
M clang/lib/Analysis/LifetimeSafety/Facts.cpp
M clang/lib/Analysis/LifetimeSafety/FactsGenerator.cpp
M clang/lib/Analysis/LifetimeSafety/Loans.cpp
M clang/lib/Analysis/LifetimeSafety/MovedLoans.cpp
M clang/test/Sema/warn-lifetime-safety-dataflow.cpp
M clang/test/Sema/warn-lifetime-safety.cpp
M clang/unittests/Analysis/LifetimeSafetyTest.cpp
Log Message:
-----------
[LifetimeSafety] Introduce AccessPath-based expiry (#187708)
Refactored the loan system to use access paths instead of loan IDs for
expiry tracking, consolidating PathLoan and PlaceholderLoan into a
unified Loan class.
This is a non-functional refactoring to move towards more granular
paths. This also removes a quadratic complexity of `handleLifetimeEnds`
where we iterated over all loans to find which loans expired.
Commit: 17d28a5b53b04c6a89ff3087a3fb57f462e563fa
https://github.com/llvm/llvm-project/commit/17d28a5b53b04c6a89ff3087a3fb57f462e563fa
Author: yronglin <yronglin777 at gmail.com>
Date: 2026-03-24 (Tue, 24 Mar 2026)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Lex/PPDirectives.cpp
M clang/test/CXX/module/dcl.dcl/dcl.module/p1.cpp
Log Message:
-----------
[clang] Don't crash when module directive `export module foo` not following a semicolon and there are no rest pp-tokens in current module file (#187845)
This PR add the missing check of nullable `std::optional<Token>` object
when the module directive `export module foo` not following a semicolon
and there are no rest pp-tokens in current module file.
---------
Signed-off-by: yronglin <yronglin777 at gmail.com>
Co-authored-by: Aaron Ballman <aaron at aaronballman.com>
Commit: 95d54423d9abb3ed577f68e32b1c158cf984193a
https://github.com/llvm/llvm-project/commit/95d54423d9abb3ed577f68e32b1c158cf984193a
Author: Abid Qadeer <haqadeer at amd.com>
Date: 2026-03-24 (Tue, 24 Mar 2026)
Changed paths:
M flang/lib/Optimizer/Transforms/DebugTypeGenerator.cpp
M flang/test/Fir/declare_value-codegen.fir
M flang/test/Integration/debug-allocatable-1.f90
M flang/test/Integration/debug-common-block-1.f90
M flang/test/Integration/debug-complex-1.f90
M flang/test/Integration/debug-complex-2.f90
M flang/test/Integration/debug-fixed-array-type-2.f90
M flang/test/Integration/debug-local-var-2.f90
M flang/test/Integration/debug-module-2.f90
M flang/test/Integration/debug-proc-ptr-e2e.f90
M flang/test/Integration/debug-ptr-type.f90
M flang/test/Transforms/debug-allocatable-1.fir
M flang/test/Transforms/debug-associate-component.fir
M flang/test/Transforms/debug-complex-1.fir
M flang/test/Transforms/debug-derived-type-1.fir
M flang/test/Transforms/debug-fixed-array-type.fir
M flang/test/Transforms/debug-fn-info.fir
M flang/test/Transforms/debug-index-type.fir
M flang/test/Transforms/debug-local-var.fir
M flang/test/Transforms/debug-module-1.fir
M flang/test/Transforms/debug-module-2.fir
M flang/test/Transforms/debug-proc-ptr.fir
M flang/test/Transforms/debug-ptr-type.fir
M flang/test/Transforms/debug-vector-type.fir
Log Message:
-----------
[flang][debug] Always include (kind=X) suffix in debug type names (#186255)
Previously, 32-bit types (integer, real, logical, complex) were printed
without the (kind=4) suffix in DWARF debug type names, while other sizes
always included the kind suffix. This inconsistency is now removed by
always appending (kind=X) to all basic type names, making the format
uniform across all type sizes.
Fixes https://github.com/llvm/llvm-project/issues/119478.
Commit: 4961700c1004067dab2454df09a0de6b02410025
https://github.com/llvm/llvm-project/commit/4961700c1004067dab2454df09a0de6b02410025
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-03-24 (Tue, 24 Mar 2026)
Changed paths:
M libc/shared/rpc.h
M libc/shared/rpc_util.h
M offload/plugins-nextgen/amdgpu/src/rtl.cpp
M offload/plugins-nextgen/common/include/PluginInterface.h
M offload/plugins-nextgen/common/include/RPC.h
M offload/plugins-nextgen/common/src/PluginInterface.cpp
M offload/plugins-nextgen/common/src/RPC.cpp
Log Message:
-----------
[libc] Support AMDGPU device interrupts for the RPC interface (#188067)
Summary:
One of the main disadvantages to using the RPC interface is that it
requires a server thread to spin on the mailboxes checking for work.
The vast majority of the time, there will be no work and work will come
in large bursts.
The HSA / KFD interface supports device-side interrupts and already has
handling for binding these events to an HSA signal. This means that we
can send interrupts from the GPU to wake a sleeping thread on the CPU.
The sleeping thread will be descheduled with a blocking HSA wait call
and woken up when its event ID is raised through the kernel driver's
interrupt.
This is very target-specific handling, but I believe it is valuable
enough to warrant it being in the protocol. It is completely optional,
as it is ignored if uninitialized. This should bring this support at
parity with the interface HIP expects.
Commit: fb3c8228ed362ed2f778ff44382d61af2395790f
https://github.com/llvm/llvm-project/commit/fb3c8228ed362ed2f778ff44382d61af2395790f
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-03-24 (Tue, 24 Mar 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/test/CodeGen/RISCV/rvv/cttz-elts.ll
Log Message:
-----------
[RISCV] canCreateUndefOrPoisonForTargetNode - RISCVISD::READ_VLENB nodes don't create undef/poison (#188231)
Fixes a number of regressions in an upcoming FREEZE patch
Commit: 7af471a8eda3e1882657115d36eb000df3ffa5fd
https://github.com/llvm/llvm-project/commit/7af471a8eda3e1882657115d36eb000df3ffa5fd
Author: Leandro Lupori <leandro.lupori at linaro.org>
Date: 2026-03-24 (Tue, 24 Mar 2026)
Changed paths:
M flang/lib/Lower/OpenMP/DataSharingProcessor.cpp
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/test/Lower/OpenMP/composite_simd_linear.f90
M flang/test/Lower/OpenMP/distribute-parallel-do-simd.f90
M flang/test/Lower/OpenMP/distribute-simd.f90
M flang/test/Lower/OpenMP/loop-pointer-variable.f90
M flang/test/Lower/OpenMP/ordered-simd.f90
M flang/test/Lower/OpenMP/wsloop-simd.f90
Log Message:
-----------
Reland "[flang][OpenMP] Fix lowering of LINEAR iteration variables (#183794)" (#187766)
Linear iteration variables were being treated as private. This fixes
one of the issues reported in #170784.
The previous regressions are fixed by #187097.
Commit: ef6172f32757aff6e4c4bb237ed3132d7ef24c12
https://github.com/llvm/llvm-project/commit/ef6172f32757aff6e4c4bb237ed3132d7ef24c12
Author: keinflue <keinflue at posteo.de>
Date: 2026-03-24 (Tue, 24 Mar 2026)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/SemaChecking.cpp
M clang/test/SemaCXX/builtin-classify-type.cpp
Log Message:
-----------
[clang] Apply lvalue conversions to __builtin_classify_type argument (#175627)
According to GCC documentation default argument promotion is applied to
the argument, which includes the function-to-pointer and
array-to-pointer lvalue conversions.
This also implies checking of the argument for placeholder types.
Fixes #175589.
Commit: 376874a345d3fd5f7171f78e48e5dea01c703dd8
https://github.com/llvm/llvm-project/commit/376874a345d3fd5f7171f78e48e5dea01c703dd8
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-03-24 (Tue, 24 Mar 2026)
Changed paths:
M offload/plugins-nextgen/amdgpu/src/rtl.cpp
Log Message:
-----------
[Offload] Fix destroying signal that was never initialized
Summary:
We create the RPC doorbell signal lazily and destroy it at the plugin
level. This means that we can't rely on the normal 'per-device' handling
so this needs to be called unconditionally. We only create the signal if
a device is registered, but deinit is called unconditionally. Just check
the handle.
Commit: da439d54267d478d1771928a714c0c52d7e7fc17
https://github.com/llvm/llvm-project/commit/da439d54267d478d1771928a714c0c52d7e7fc17
Author: Petter Berntsson <petter.berntsson at arm.com>
Date: 2026-03-24 (Tue, 24 Mar 2026)
Changed paths:
M libc/docs/CMakeLists.txt
M libc/docs/headers/index.rst
Log Message:
-----------
[libc][docs] Avoid docgen target collisions and restore pthread docs (#188221)
Fixes llvm/llvm-project#123821.
Re-enabling pthread docs created a global CMake utility target named
`pthread`, which collides in combined runtime builds where `pthread` is
expected to be a library name. Namespace the internal libc docgen helper
targets under `libc-docgen-*` and restore the generated pthread docs
page. `docs-libc-html` is unchanged.
Commit: 5bce5f54f081a9ab8b8819634573b03108752764
https://github.com/llvm/llvm-project/commit/5bce5f54f081a9ab8b8819634573b03108752764
Author: Minsoo Choo <minsoochoo0122 at proton.me>
Date: 2026-03-24 (Tue, 24 Mar 2026)
Changed paths:
M llvm/lib/Support/Unix/Process.inc
Log Message:
-----------
[llvm] Update terminal list with ANSI colors (#187920)
ncurses hasn't adopted terminal entries for some terminal emulators like
Alacritty, Ghostty, and kitty in `xterm-*` format. To fix mismatch
between remote terminfo-db and terminal emulator that is accessing (e.g.
SSH), users explicitly set `$TERM` to `ghostty` or similar on the remote
side to make colors work. However, since `$TERM` has changed to non
`xterm-*` format in this case, llvm's `xterm-*` filter fails to catch
the terminal. Thus add entries for most widely used terminal emulators
(Alacritty, Ghostty, kitty) in terminfo-db version so llvm's filter can
catch it.
Signed-off-by: Minsoo Choo <minsoochoo0122 at proton.me>
Commit: 6638cee0d8db18cf19b9d832e8c5f0be12b4f1c8
https://github.com/llvm/llvm-project/commit/6638cee0d8db18cf19b9d832e8c5f0be12b4f1c8
Author: Zorojuro <sawantsukumar at gmail.com>
Date: 2026-03-24 (Tue, 24 Mar 2026)
Changed paths:
M libc/src/math/generic/logf.cpp
Log Message:
-----------
[libc] Remove redundant and incorrect comments in `logf.cpp` (#188236)
This PR intends to fix the nit (mostly caused during the refactor in
693a018dcf08e )
- During refactor we move the implementation along with the explanation
comments to header.
```CPP
// This is an algorithm for log(x) in single precision which is correctly
// rounded for all rounding modes, based on the implementation of log(x) from
// the RLIBM project at:
// https://people.cs.rutgers.edu/~sn349/rlibm
// Step 1 - Range reduction:
// For x = 2^m * 1.mant, log(x) = m * log(2) + log(1.m)
// If x is denormal, we normalize it by multiplying x by 2^23 and subtracting
.....
// Symposium on Principles of Programming Languages (POPL-2022), Philadelphia,
// USA, January 16-22, 2022.
// https://people.cs.rutgers.edu/~sn349/papers/rlibmall-popl-2022.pdf
```
Though the explanation comments were copied and moved to header in
d2492c1 . It wasn't deleted from the `cpp` file.
Along with this in the same,
`#include "src/__support/math/logf.h" // Lookup table for (1/f) and
log(f)`
is wrong as it is actually for
`#include "src/__support/math/common_constants.h" // Lookup table for
(1/f) and log(f)`
Commit: 227bab0a623c42a631d3b30446e668335732c488
https://github.com/llvm/llvm-project/commit/227bab0a623c42a631d3b30446e668335732c488
Author: Alex Duran <alejandro.duran at intel.com>
Date: 2026-03-24 (Tue, 24 Mar 2026)
Changed paths:
M offload/plugins-nextgen/level_zero/src/L0Context.cpp
M offload/plugins-nextgen/level_zero/src/L0Plugin.cpp
M offload/plugins-nextgen/level_zero/src/L0Program.cpp
Log Message:
-----------
[OFFLOAD][L0] Improve cleanup on errors (#188251)
Additional cleanup improvements on error conditions (in addition to
those in #187597):
* Fixed incomplete cleanup in L0Context::init()
* Fixed build log leak in addModule()
* Fixed context inconsistent state in findDevices()
Disclaimer: The base of this PR was generated by Claude and adjusted by
me afterwards.
Commit: 0328820004d89ca9876ac75c8c55f1eb239a6be7
https://github.com/llvm/llvm-project/commit/0328820004d89ca9876ac75c8c55f1eb239a6be7
Author: Sirui Mu <msrlancern at gmail.com>
Date: 2026-03-24 (Tue, 24 Mar 2026)
Changed paths:
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
M clang/test/CIR/IR/invalid-func.cir
Log Message:
-----------
[CIR][NFC] Fix regression in clang/test/CIR/IR/func.cir (#188069)
This patch fixes a regression in `clang/test/CIR/IR/func.cir` where the
parsing of `special_member` attributes fails.
Commit: 4fcc3d7f4ced4f911883f4427907d2a7d66d951f
https://github.com/llvm/llvm-project/commit/4fcc3d7f4ced4f911883f4427907d2a7d66d951f
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-03-24 (Tue, 24 Mar 2026)
Changed paths:
M llvm/lib/Target/Sparc/SparcInstrInfo.cpp
Log Message:
-----------
[Sparc] Report correct size for GETPCX pseudo (#188075)
This currently reports size 4, but the actual size is larger.
Commit: d422ffe19f1cacc7c6a6908d9f73d81ba8e65b6e
https://github.com/llvm/llvm-project/commit/d422ffe19f1cacc7c6a6908d9f73d81ba8e65b6e
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-03-24 (Tue, 24 Mar 2026)
Changed paths:
A llvm/test/Transforms/SLPVectorizer/AArch64/unprofitable-alternate-subtree.ll
Log Message:
-----------
[SLP][NFC]Add a test with the non-profitable alternate vectorization, not throttled
Commit: c312bf3fa94430185410c06c502abd9953f838fa
https://github.com/llvm/llvm-project/commit/c312bf3fa94430185410c06c502abd9953f838fa
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-03-24 (Tue, 24 Mar 2026)
Changed paths:
M llvm/lib/Support/DivisionByConstantInfo.cpp
Log Message:
-----------
[DivisionByConstant] Don't compare bool to 0. Use APInt::getOneBitSet. NFC (#188178)
Commit: ff07361fdf18bb9094331814db9dae000a35e254
https://github.com/llvm/llvm-project/commit/ff07361fdf18bb9094331814db9dae000a35e254
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-03-24 (Tue, 24 Mar 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/test/CodeGen/AArch64/rem-by-const.ll
M llvm/test/CodeGen/RISCV/urem-lkk.ll
M llvm/test/CodeGen/X86/divmod128.ll
M llvm/test/CodeGen/X86/i128-udiv.ll
M llvm/test/CodeGen/X86/vector-idiv-udiv-128.ll
Log Message:
-----------
[TargetLowering] In expandDIVREMByConstant, combine shift by trailing zeros with chunk shifts. (#188086)
This reduces the number of generated instructions in some cases.
While I was there, I changed an Add to a Disjoint OR since DAGCombine
was going to do it anyway.
Commit: 2c2706dd04dea8803437b7cb96152179a848862e
https://github.com/llvm/llvm-project/commit/2c2706dd04dea8803437b7cb96152179a848862e
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-03-24 (Tue, 24 Mar 2026)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/vector-interleaved-load-i16-stride-3.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i16-stride-4.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i16-stride-5.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i16-stride-6.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i16-stride-7.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i16-stride-8.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i64-stride-5.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i64-stride-7.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i8-stride-4.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i8-stride-7.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i8-stride-8.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-6.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i32-stride-6.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i32-stride-8.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i64-stride-6.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i64-stride-7.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-6.ll
M llvm/test/CodeGen/X86/vector-shuffle-512-v64.ll
Log Message:
-----------
[X86] getFauxShuffleMask - decode insert_subvector(undef, x, c) as shuffle if c != 0 (#188258)
Move existing combineX86ShufflesRecursively handling into
getFauxShuffleMask to allow other shuffle folds to make use of it
Commit: 20e59c8e2dbbd3b574e2358e0b690f0ddec129fc
https://github.com/llvm/llvm-project/commit/20e59c8e2dbbd3b574e2358e0b690f0ddec129fc
Author: vangthao95 <vang.thao at amd.com>
Date: 2026-03-24 (Tue, 24 Mar 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
M llvm/test/CodeGen/AMDGPU/cube.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cubeid.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cubema.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cubesc.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cubetc.ll
Log Message:
-----------
AMDGPU/GlobalISel: RegBankLegalize rules for cube intrinsics (#187762)
Add RegBankLegalize rules for cube* intrinsics. Also update manual tests
to use autogenerated checks.
Commit: 1034c7077296542fe0f88d38dbcfa6814f85be6c
https://github.com/llvm/llvm-project/commit/1034c7077296542fe0f88d38dbcfa6814f85be6c
Author: vangthao95 <vang.thao at amd.com>
Date: 2026-03-24 (Tue, 24 Mar 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.pknorm.i16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.pknorm.u16.ll
Log Message:
-----------
AMDGPU/GlobalISel: RegBankLegalize rules for cvt_pknorm (#187834)
Commit: 9708da6f2dc95edcfc98a82c67c8f44079110f55
https://github.com/llvm/llvm-project/commit/9708da6f2dc95edcfc98a82c67c8f44079110f55
Author: vangthao95 <vang.thao at amd.com>
Date: 2026-03-24 (Tue, 24 Mar 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fmad.ftz.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fmad.ftz.ll
Log Message:
-----------
AMDGPU/GlobalISel: RegBankLegalize rules for fmad_ftz (#188132)
Commit: 4a2b384f1518b0e2bd35ac2d04bc3aac72db25d3
https://github.com/llvm/llvm-project/commit/4a2b384f1518b0e2bd35ac2d04bc3aac72db25d3
Author: Jasmine Tang <jjasmine at igalia.com>
Date: 2026-03-24 (Tue, 24 Mar 2026)
Changed paths:
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
M llvm/test/CodeGen/NVPTX/i1-int-to-fp.ll
Log Message:
-----------
[NVPTX] Fix sign issue in sint -> bf16 (#188118)
Fixes #187000
Commit: c1ea10a854dcbbb50c954ebb87246d822cd01e21
https://github.com/llvm/llvm-project/commit/c1ea10a854dcbbb50c954ebb87246d822cd01e21
Author: Justin Cady <desk at justincady.com>
Date: 2026-03-24 (Tue, 24 Mar 2026)
Changed paths:
M clang-tools-extra/clangd/CMakeLists.txt
A clang-tools-extra/clangd/remap/CMakeLists.txt
A clang-tools-extra/clangd/remap/RemapMain.cpp
M clang-tools-extra/clangd/test/CMakeLists.txt
A clang-tools-extra/clangd/test/remap.test
Log Message:
-----------
[clangd] Add background index path remapping tool (#185482)
Introduce a standalone tool to remap paths inside clangd background
index files. This allows users to pay the cost of generating a full
background index once, then reuse the background index across multiple
clients. Each client rewrites the background index in place after
copying the original, specifying the path(s) to be remapped.
This is an alternative approach to the dynamic path remapping proposed
in #180285.
Fixes clangd/clangd#847
Assisted-by: claude
Commit: 9391ce93a1b82b85890e5d15b36849b542e11db8
https://github.com/llvm/llvm-project/commit/9391ce93a1b82b85890e5d15b36849b542e11db8
Author: Eugene Epshteyn <eepshteyn at nvidia.com>
Date: 2026-03-24 (Tue, 24 Mar 2026)
Changed paths:
M flang/test/Lower/Intrinsics/pack.f90
M flang/test/Lower/Intrinsics/parity.f90
M flang/test/Lower/Intrinsics/popcnt.f90
M flang/test/Lower/Intrinsics/poppar.f90
M flang/test/Lower/Intrinsics/present.f90
Log Message:
-----------
[flang][NFC] Converted five tests from old lowering to new lowering (part 38) (#188151)
Tests converted from test/Lower/Intrinsics: pack.f90, parity.f90,
popcnt.f90, poppar.f90, present.f90
Commit: 8443dfaacf520b22700555718ecfb71508c15a64
https://github.com/llvm/llvm-project/commit/8443dfaacf520b22700555718ecfb71508c15a64
Author: Kevin Sala Penades <salapenades1 at llnl.gov>
Date: 2026-03-24 (Tue, 24 Mar 2026)
Changed paths:
M clang/docs/OpenMPSupport.rst
Log Message:
-----------
[OpenMP] Mark dyn_groupprivate support as partial for C/C++ (#186706)
Commit: 26fcbd5aaed125ab99b19299f4ec686912a7af92
https://github.com/llvm/llvm-project/commit/26fcbd5aaed125ab99b19299f4ec686912a7af92
Author: vporpo <vasileios.porpodas at amd.com>
Date: 2026-03-24 (Tue, 24 Mar 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
Log Message:
-----------
[AMDGPU][SIInsertWaitcnts] Fix counterOutOfOrder() check for LOAD_CNT (#187758)
This is a follow-up to @piotrAMD's comment in #178511 .
`hasPendingEvent()` used to return an unsigned mask but this changed in
#178511 when this function started to return bool. This changed the
functionality of `counterOutOfOrder()` which was still using an unsigned
mask that was erroneously being assigned a boolean instead of the
expected mask.
Commit: d0f5df111865ea4bb9d7d6ff35b517ee1aa7402f
https://github.com/llvm/llvm-project/commit/d0f5df111865ea4bb9d7d6ff35b517ee1aa7402f
Author: Minsoo Choo <minsoochoo0122 at proton.me>
Date: 2026-03-25 (Wed, 25 Mar 2026)
Changed paths:
M lldb/source/Plugins/Process/FreeBSD-Kernel-Core/ProcessFreeBSDKernelCore.cpp
Log Message:
-----------
[lldb][Process/FreeBSDKernelCore] Remove interactive mode check (#187981)
`debugger.GetCommandInterpreter().IsInteractive()` doesn't necessarily
mean that the debugger is running without `-b` or `--batch` flag. This
caused an issue where the message isn't printed in any case. Remove the
check so the message is always printed for now.
Fixes: 9d9c7fc00bdddd72e78b19e9fbb6af9d07c2218b (#178027)
Signed-off-by: Minsoo Choo <minsoochoo0122 at proton.me>
Commit: 1d883c675e786920d9e1c6af4fb5fcfb40b4f09a
https://github.com/llvm/llvm-project/commit/1d883c675e786920d9e1c6af4fb5fcfb40b4f09a
Author: Kunwar Grover <groverkss at gmail.com>
Date: 2026-03-24 (Tue, 24 Mar 2026)
Changed paths:
M mlir/lib/Dialect/Linalg/Transforms/TilingInterfaceImpl.cpp
M mlir/test/Dialect/Linalg/transform-tile-reduction.mlir
M mlir/test/Interfaces/TilingInterface/tile-and-fuse-with-reduction-tiling.mlir
Log Message:
-----------
[mlir][linalg] Fix linalg.index handeling in partial reduction tiling (#188261)
PartialReduction tiling wasn't handeling linalg.index offsets properly.
This patch fixes it to do the same thing as TilingInterface.
Commit: 5f0b3d6af425d2cd849a5914d5bb65d45f091cca
https://github.com/llvm/llvm-project/commit/5f0b3d6af425d2cd849a5914d5bb65d45f091cca
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-03-24 (Tue, 24 Mar 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
Log Message:
-----------
[SLP][NFC]Fix formatting and debug printing, NFC
Commit: ab903b4f783fbed6f005d40b17b8050d79a662b2
https://github.com/llvm/llvm-project/commit/ab903b4f783fbed6f005d40b17b8050d79a662b2
Author: Oliver Hunt <oliver at apple.com>
Date: 2026-03-24 (Tue, 24 Mar 2026)
Changed paths:
M llvm/include/llvm/ADT/StringSwitch.h
M llvm/unittests/ADT/StringSwitchTest.cpp
Log Message:
-----------
[ADT] Add predicate based match support to StringSwitch (#188046)
This introduces `Predicate` and `IfNotPredicate` case selection to
StringSwitch to allow use cases like
```
StringSwitch<...>(..)
.Case("foo", FooTok)
.Predicate([](StringRef Str){ ... }, IdentifierTok)
...
```
This is mostly useful for improving conciseness and clarity when
processing generated strings, diagnostics, and similar.
Commit: ce44d63e0d14039f1e8f68e6b7c4672457cabd4e
https://github.com/llvm/llvm-project/commit/ce44d63e0d14039f1e8f68e6b7c4672457cabd4e
Author: Alan Li <me at alanli.org>
Date: 2026-03-24 (Tue, 24 Mar 2026)
Changed paths:
M llvm/unittests/CodeGen/GlobalISel/IRTranslatorBF16Test.cpp
Log Message:
-----------
[GlobalISel][Test] Fix `IRTranslatorBF16Test` crash (#188273)
Skip the test when the AArch64 target is unavailable.
Commit: de6ed3c81dabee9772d77f95510480c8e1cee1ff
https://github.com/llvm/llvm-project/commit/de6ed3c81dabee9772d77f95510480c8e1cee1ff
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-03-24 (Tue, 24 Mar 2026)
Changed paths:
M llvm/lib/Target/PowerPC/PPCInstr64Bit.td
M llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
Log Message:
-----------
[PowerPC] Fix some instruction sizes (#188227)
This fixes:
* PADDIdtprel: Lowers to PADDI8, which is prefixed.
* PATCHABLE_FUNTION_ENTER/PATCHABLE_RET: Handle xray sleds.
These came up when generalizing the instruction size verification
infrastructure.
Commit: 4eedd518be53814395dcba5c78bb14d09a77821c
https://github.com/llvm/llvm-project/commit/4eedd518be53814395dcba5c78bb14d09a77821c
Author: earnol <earnol at users.noreply.github.com>
Date: 2026-03-24 (Tue, 24 Mar 2026)
Changed paths:
M clang-tools-extra/clang-tidy/bugprone/StdNamespaceModificationCheck.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
A clang-tools-extra/test/clang-tidy/checkers/bugprone/std-namespace-modification-implicit.cpp
A clang/test/AST/ast-dump-implicit-align-val.cpp
Log Message:
-----------
[clang-tidy] Do not provide diagnostics for cert-dcl58-cpp on implicit declarations (#188152)
Do not provide diagnostics for cert-dcl58-cpp for compiler generated
intrinsic as it will be a false positive.
In provided tests compiler generates align_val_t which ends up inside
std namespace, resulting in std::align_val_t symbol. This symbol is
compiler generated, having no location, causing compiler crash. Also
there is no point to notify user about violations which user has no
control of.
Resolution: Diagnostics suppressed.
Co-authored-by: Vladislav Aranov <vladislav.aranov at ericsson.com>
Commit: e73d8f8fc59ae2108baf863a6c8c8cfddbbca537
https://github.com/llvm/llvm-project/commit/e73d8f8fc59ae2108baf863a6c8c8cfddbbca537
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-03-24 (Tue, 24 Mar 2026)
Changed paths:
M compiler-rt/cmake/Modules/CompilerRTUtils.cmake
M compiler-rt/cmake/caches/GPU.cmake
M compiler-rt/test/CMakeLists.txt
M compiler-rt/test/builtins/CMakeLists.txt
M compiler-rt/test/builtins/Unit/lit.cfg.py
M compiler-rt/test/lit.common.cfg.py
Log Message:
-----------
[compiler-rt] Support unit tests for the GPU build (#187895)
Summary:
This PR enables the basic unit tests for builtins to be run on the GPU
architectures. Other targets like profiling are supported, but the
host-device natures will make it more difficult to adequately unit
test. It may be be possible to do basic tests there, to simply verify
that
counters are present and in the proper format for when they are copied
to the host.
Commit: c7b5f7c635e2534a9b2b2b204998b0bc39921b7e
https://github.com/llvm/llvm-project/commit/c7b5f7c635e2534a9b2b2b204998b0bc39921b7e
Author: Fangrui Song <i at maskray.me>
Date: 2026-03-24 (Tue, 24 Mar 2026)
Changed paths:
M llvm/lib/Support/Parallel.cpp
Log Message:
-----------
[Support] Use atomic counter in parallelFor instead of per-task spawning (#187989)
This function is primarily used by lld and debug info tools.
Instead of pre-splitting work into up to MaxTasksPerGroup (1024) tasks
and spawning each through the Executor's mutex+condvar, use an atomic
counter for work distribution. Only ThreadCount workers are spawned;
each grabs the next chunk via atomic fetch_add.
This reduces futex calls from ~31K (glibc, release+assertions build) to
~1.4K when linking clang-14 (191MB PIE with --export-dynamic) with
`ld.lld --threads=8` (each parallelFor spawned up to 1024 tasks, each
requiring mutex lock + condvar signal).
```
Wall System futex
glibc (assertions) before: 927ms 897ms 31K
glibc (assertions) after: 879ms 765ms 1.4K
mimalloc before: 872ms 694ms 25K
mimalloc after: 830ms 661ms 1K
```
Commit: 6e2a720dd1890d49afef6ab5165cb6e7fd346048
https://github.com/llvm/llvm-project/commit/6e2a720dd1890d49afef6ab5165cb6e7fd346048
Author: Pankaj Dwivedi <pankajkumar.divedi at amd.com>
Date: 2026-03-24 (Tue, 24 Mar 2026)
Changed paths:
M llvm/include/llvm/ADT/GenericUniformityImpl.h
M llvm/include/llvm/ADT/Uniformity.h
M llvm/include/llvm/Analysis/TargetTransformInfo.h
M llvm/include/llvm/Analysis/TargetTransformInfoImpl.h
M llvm/lib/Analysis/TargetTransformInfo.cpp
M llvm/lib/Analysis/UniformityAnalysis.cpp
M llvm/lib/CodeGen/MachineUniformityAnalysis.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h
A llvm/test/Analysis/UniformityAnalysis/AMDGPU/uniform_intrinsic.ll
Log Message:
-----------
[AMDGPU][Uniformity][TTI] Make Uniformity Analysis Operand-Aware via Custom Uniformity Checks (#137639)
See: https://github.com/llvm/llvm-project/issues/131779
Extends uniformity analysis to support instructions whose uniformity
depends on which specific operands are uniform. Introduces
`InstructionUniformity::Custom` and a target hook `TTI::isUniform(I,
UniformArgs)` that allows targets to define custom uniformity rules.
During propagation, custom candidates are checked via the target hook.
If we can prove they are uniform, we skip marking them divergent and let
iterative propagation re-evaluate as operands change.
Implements AMDGPU's `llvm.amdgcn.wave.shuffle` rules (uniform when
either operand is uniform, divergent only when both are divergent) as
the motivating example.
This inverted-logic approach is critical for correctness: proving
uniformity early during propagation would be unsafe, as operands can
transition from uniform to divergent during divergence propagation.
---------
Co-authored-by: Matt Arsenault <arsenm2 at gmail.com>
Commit: ca2bc5505c18e9a72c6f4c8f7c60d2fc5172d86b
https://github.com/llvm/llvm-project/commit/ca2bc5505c18e9a72c6f4c8f7c60d2fc5172d86b
Author: vangthao95 <vang.thao at amd.com>
Date: 2026-03-24 (Tue, 24 Mar 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.ps.live.mir
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ps.live.ll
Log Message:
-----------
AMDGPU/GlobalISel: RegBankLegalize rules for ps_live (#188101)
Commit: 6159b253ef4ebf7ee8e996e94d4ba2378cf2eec3
https://github.com/llvm/llvm-project/commit/6159b253ef4ebf7ee8e996e94d4ba2378cf2eec3
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2026-03-24 (Tue, 24 Mar 2026)
Changed paths:
M clang/test/CIR/IR/invalid-linkage.cir
Log Message:
-----------
[CIR][NFC] Mark invalid-linkage.cir as XFAIL (#188279)
The invalid-linkage.cir test is currently failing as a result of a
recent change to the MLIR attribute parser. I am temporarily marking
this test as XFAIL while that problem is being worked on to unblock CIR
development. I added a check that will force the test to fail even after
the problem is fixed so that we don't start getting unexpected passes
when the fix is merged. (CIR testing isn't run during CI for MLIR
changes.) I will reenable the test after the problem has been fixed.
Commit: 3deca2dc322e0c4328da35247157b28bb4b552fc
https://github.com/llvm/llvm-project/commit/3deca2dc322e0c4328da35247157b28bb4b552fc
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-03-24 (Tue, 24 Mar 2026)
Changed paths:
M llvm/include/llvm/Support/KnownBits.h
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/unittests/Support/KnownBitsTest.cpp
Log Message:
-----------
[KnownBits] KnownBits::add - add optional arg indicating a X+X self add pattern (#188078)
Compute knownbits for ADD(X,X) as SHL(X,1)
Followup to #186461
Commit: 549b529225050ecf597b2e0824857f041065d465
https://github.com/llvm/llvm-project/commit/549b529225050ecf597b2e0824857f041065d465
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-03-24 (Tue, 24 Mar 2026)
Changed paths:
M llvm/lib/Target/X86/X86AsmPrinter.h
M llvm/test/CodeGen/X86/npm-asmprint.ll
Log Message:
-----------
[X86][NewPM] Mark X86AsmPrinter isRequired (#188278)
Otherwise the pass does not run when a function has the optnone
attribute, which means we get no assembly out for functions marked
optnone.
Commit: 8d8f635e4b2c669d8f84d615ddcb74e883f1d10f
https://github.com/llvm/llvm-project/commit/8d8f635e4b2c669d8f84d615ddcb74e883f1d10f
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-03-24 (Tue, 24 Mar 2026)
Changed paths:
M llvm/lib/Target/SPIRV/Analysis/SPIRVConvergenceRegionAnalysis.h
M llvm/lib/Target/SPIRV/MCTargetDesc/SPIRVBaseInfo.h
M llvm/lib/Target/SPIRV/MCTargetDesc/SPIRVInstPrinter.h
M llvm/lib/Target/SPIRV/MCTargetDesc/SPIRVTargetStreamer.h
M llvm/lib/Target/SPIRV/SPIRVCBufferAccess.h
M llvm/lib/Target/SPIRV/SPIRVCommandLine.h
M llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.h
M llvm/lib/Target/SPIRV/SPIRVLegalizeZeroSizeArrays.h
M llvm/lib/Target/SPIRV/SPIRVLegalizerInfo.h
M llvm/lib/Target/SPIRV/SPIRVMetadata.h
M llvm/lib/Target/SPIRV/SPIRVPushConstantAccess.h
M llvm/lib/Target/SPIRV/SPIRVStructurizerWrapper.h
M llvm/lib/Target/SPIRV/SPIRVTypeInst.h
Log Message:
-----------
[NFC][SPIR-V] Fix include guard names to match file paths (#187689)
Commit: 047cd90b5efdd41655fc32f00410d69b899abd95
https://github.com/llvm/llvm-project/commit/047cd90b5efdd41655fc32f00410d69b899abd95
Author: Chuanqi Xu <yedeng.yd at linux.alibaba.com>
Date: 2026-03-24 (Tue, 24 Mar 2026)
Changed paths:
M clang/lib/DependencyScanning/DependencyScannerImpl.cpp
R clang/test/ClangScanDeps/p1689-suppress-warnings.cppm
Log Message:
-----------
Revert "[ClangScanDeps] Do not emit warning for P1689 format" (#188179)
Reverts llvm/llvm-project#186966
Commit: 01af1528f8497c58b5390ba514eaf3244818df73
https://github.com/llvm/llvm-project/commit/01af1528f8497c58b5390ba514eaf3244818df73
Author: Jasmine Tang <jjasmine at igalia.com>
Date: 2026-03-24 (Tue, 24 Mar 2026)
Changed paths:
M llvm/test/CodeGen/NVPTX/i1-int-to-fp.ll
Log Message:
-----------
[NVPTX] Fix assumption of sm versioning (#188282)
The test case in #188118 assumes sm-90 is always available, leading to a
crash
```
# | ptxas fatal : SM version specified by .target is higher than default SM version assumed
```
This PR updates the test case to follow the check specified in
`llvm/test/CodeGen/NVPTX/cp-async-bulk-tensor-reduce.ll`,
namely `%if ptxas-sm_90 && ptxas-isa-7.8`
Commit: 95546c849ea6a2be66767879617b24f0750d7c6b
https://github.com/llvm/llvm-project/commit/95546c849ea6a2be66767879617b24f0750d7c6b
Author: Dave Lee <davelee.com at gmail.com>
Date: 2026-03-24 (Tue, 24 Mar 2026)
Changed paths:
M lldb/examples/python/formatter_bytecode.py
M lldb/test/Shell/ScriptInterpreter/Python/Inputs/FormatterBytecode/RigidArrayLLDBFormatterC.txt
M lldb/test/Shell/ScriptInterpreter/Python/Inputs/FormatterBytecode/RigidArrayLLDBFormatterSwift.txt
Log Message:
-----------
[lldb] Fix value of sig_update in formatter_bytecode.py (#188292)
Commit: 0158cd04e3a29c265d4695e25d022ba07b86be97
https://github.com/llvm/llvm-project/commit/0158cd04e3a29c265d4695e25d022ba07b86be97
Author: Sam Elliott <aelliott at qti.qualcomm.com>
Date: 2026-03-24 (Tue, 24 Mar 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVMergeBaseOffset.cpp
A llvm/test/CodeGen/RISCV/fold-addi-loadstore-cpi.mir
A llvm/test/CodeGen/RISCV/sfb-merge-base-offset.ll
Log Message:
-----------
[RISCV] Merge Base Offset for SFB Pseudos (#187620)
This implements the Merge Base Offset pass for the SFB Load Pseudos.
These Pseudos are expanded after Merge Base Offset, so the pass needs to
handle them.
I also had to extend support in MergeBaseOffset to ensuring that ImmOp
could be a Constant Pool Index, which seemed to be supported in some
checks but not others.
Commit: efaf00194404f227b037ad5822e885e21a11f79b
https://github.com/llvm/llvm-project/commit/efaf00194404f227b037ad5822e885e21a11f79b
Author: Dave Lee <davelee.com at gmail.com>
Date: 2026-03-24 (Tue, 24 Mar 2026)
Changed paths:
M lldb/docs/resources/formatterbytecode.rst
Log Message:
-----------
[lldb][docs] Restore correct @update bytecode signature (#188295)
Mistakenly changed in https://github.com/llvm/llvm-project/pull/182155
Commit: 82287496072bef952bd400c335459f4fa4c750c7
https://github.com/llvm/llvm-project/commit/82287496072bef952bd400c335459f4fa4c750c7
Author: Hans Wennborg <hans at hanshq.net>
Date: 2026-03-24 (Tue, 24 Mar 2026)
Changed paths:
M llvm/lib/CodeGen/AsmPrinter/WinCFGuard.cpp
A llvm/test/CodeGen/WinCFGuard/cfguard-alias.ll
Log Message:
-----------
[CFGuard] Consider function aliases as indirect call targets (#188223)
With vector deleting destructors, it's common to include function
aliases in vftables.
After #185653 it's become more likely that the alias gets overridden in
a different TU. It's therefore important that it's the alias itself that
goes in the control-flow guard table.
Commit: 68edb9f3c0dcb79a6222afc92d31bded7fba8449
https://github.com/llvm/llvm-project/commit/68edb9f3c0dcb79a6222afc92d31bded7fba8449
Author: Tom Hewitt <tom at tom-hewitt.com>
Date: 2026-03-24 (Tue, 24 Mar 2026)
Changed paths:
M lldb/source/Target/ProcessTrace.cpp
M lldb/unittests/Process/ProcessTraceTest.cpp
Log Message:
-----------
[lldb] Fix trace load hang (#187768)
#179799 removed the `SetPrivateState(eStateStopped)` call in
`ProcessTrace::DidAttach()`. This makes the call to
`WaitForProcessToStop` hang forever, causing the `trace load` command to
hang.
This fix reintroduces the `SetPrivateState` call so a postmortem trace
process will "stop" after being loaded, matching the logic used in
`Process::LoadCore()`.
Commit: bce7adc84a14c7dd84119f2b0591b08277e8c159
https://github.com/llvm/llvm-project/commit/bce7adc84a14c7dd84119f2b0591b08277e8c159
Author: Steven Perron <stevenperron at google.com>
Date: 2026-03-24 (Tue, 24 Mar 2026)
Changed paths:
M bolt/lib/Core/BinaryContext.cpp
M bolt/lib/Core/BinaryEmitter.cpp
M bolt/lib/Passes/AsmDump.cpp
M clang-tools-extra/Maintainers.rst
M clang-tools-extra/clang-tidy/bugprone/PointerArithmeticOnPolymorphicObjectCheck.cpp
M clang-tools-extra/clang-tidy/bugprone/StdNamespaceModificationCheck.cpp
M clang-tools-extra/clangd/CMakeLists.txt
A clang-tools-extra/clangd/remap/CMakeLists.txt
A clang-tools-extra/clangd/remap/RemapMain.cpp
M clang-tools-extra/clangd/test/CMakeLists.txt
A clang-tools-extra/clangd/test/remap.test
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/test/clang-tidy/checkers/bugprone/pointer-arithmetic-on-polymorphic-object-all.cpp
A clang-tools-extra/test/clang-tidy/checkers/bugprone/std-namespace-modification-implicit.cpp
M clang/Maintainers.md
M clang/docs/ClangFormatStyleOptions.rst
M clang/docs/OpenMPSupport.rst
M clang/docs/ReleaseNotes.rst
M clang/include/clang/AST/ASTMutationListener.h
M clang/include/clang/AST/Decl.h
M clang/include/clang/Analysis/Analyses/LifetimeSafety/Facts.h
M clang/include/clang/Analysis/Analyses/LifetimeSafety/Loans.h
M clang/include/clang/Format/Format.h
M clang/include/clang/Sema/Sema.h
M clang/include/clang/Serialization/ASTWriter.h
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ByteCode/EvalEmitter.cpp
M clang/lib/AST/ByteCode/Interp.cpp
M clang/lib/AST/ByteCode/Interp.h
M clang/lib/AST/ByteCode/InterpState.h
M clang/lib/AST/ByteCode/Opcodes.td
M clang/lib/Analysis/FlowSensitive/Models/UncheckedOptionalAccessModel.cpp
M clang/lib/Analysis/LifetimeSafety/Checker.cpp
M clang/lib/Analysis/LifetimeSafety/Facts.cpp
M clang/lib/Analysis/LifetimeSafety/FactsGenerator.cpp
M clang/lib/Analysis/LifetimeSafety/Loans.cpp
M clang/lib/Analysis/LifetimeSafety/MovedLoans.cpp
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
M clang/lib/CodeGen/Targets/RISCV.cpp
M clang/lib/Driver/ToolChains/AMDGPU.cpp
M clang/lib/Driver/ToolChains/Cuda.cpp
M clang/lib/Frontend/MultiplexConsumer.cpp
M clang/lib/Headers/ptrauth.h
M clang/lib/Lex/PPDirectives.cpp
M clang/lib/Sema/Sema.cpp
M clang/lib/Sema/SemaCast.cpp
M clang/lib/Sema/SemaChecking.cpp
M clang/lib/Sema/SemaDecl.cpp
M clang/lib/Sema/SemaExpr.cpp
M clang/lib/Sema/SemaExprCXX.cpp
M clang/lib/Sema/SemaHLSL.cpp
M clang/lib/Sema/SemaModule.cpp
M clang/lib/Sema/SemaSYCL.cpp
M clang/lib/Serialization/ASTWriter.cpp
M clang/lib/Tooling/InterpolatingCompilationDatabase.cpp
A clang/test/AST/ast-dump-implicit-align-val.cpp
M clang/test/ASTSYCL/ast-dump-sycl-kernel-call-stmt.cpp
M clang/test/C/C2y/n3622.c
M clang/test/CIR/IR/invalid-func.cir
M clang/test/CIR/IR/invalid-linkage.cir
M clang/test/CXX/module/dcl.dcl/dcl.module/p1.cpp
M clang/test/CodeGen/RISCV/abi-empty-structs.c
M clang/test/CodeGen/RISCV/bfloat-abi.c
M clang/test/CodeGen/RISCV/riscv32-abi.c
M clang/test/CodeGen/RISCV/riscv64-abi.c
M clang/test/CodeGenHLSL/BasicFeatures/AggregateSplatCast.hlsl
M clang/test/CodeGenSYCL/kernel-caller-entry-point.cpp
A clang/test/Modules/class-instantiate-no-change-02.cppm
A clang/test/Modules/special-member-definitions.cppm
A clang/test/Sema/Inputs/warn-unused-but-set-static-global-header.h
M clang/test/Sema/warn-lifetime-safety-dataflow.cpp
M clang/test/Sema/warn-lifetime-safety.cpp
A clang/test/Sema/warn-unused-but-set-static-global.c
A clang/test/Sema/warn-unused-but-set-static-global.cpp
M clang/test/SemaCXX/builtin-classify-type.cpp
M clang/test/SemaCXX/cxx2b-deducing-this.cpp
M clang/test/SemaCXX/warn-variable-not-needed.cpp
M clang/test/SemaTemplate/stack-exhaustion.cpp
M clang/unittests/Analysis/FlowSensitive/MockHeaders.cpp
M clang/unittests/Analysis/FlowSensitive/UncheckedOptionalAccessModelTest.cpp
M clang/unittests/Analysis/LifetimeSafetyTest.cpp
M clang/unittests/Tooling/CompilationDatabaseTest.cpp
M clang/utils/TableGen/ClangOpcodesEmitter.cpp
M compiler-rt/cmake/Modules/CompilerRTUtils.cmake
M compiler-rt/cmake/base-config-ix.cmake
M compiler-rt/cmake/caches/GPU.cmake
M compiler-rt/lib/builtins/crtbegin.c
M compiler-rt/test/CMakeLists.txt
M compiler-rt/test/asan/TestCases/disable_container_overflow_checks.cpp
M compiler-rt/test/asan/TestCases/stack_container_dynamic_lib.cpp
M compiler-rt/test/builtins/CMakeLists.txt
M compiler-rt/test/builtins/Unit/lit.cfg.py
M compiler-rt/test/lit.common.cfg.py
M flang-rt/lib/cuda/registration.cpp
M flang-rt/unittests/Runtime/Stop.cpp
M flang/include/flang/Evaluate/tools.h
M flang/include/flang/Runtime/CUDA/registration.h
M flang/lib/Evaluate/tools.cpp
M flang/lib/Lower/OpenMP/DataSharingProcessor.cpp
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Optimizer/OpenACC/Transforms/ACCDeclareActionConversion.cpp
M flang/lib/Optimizer/Transforms/DebugTypeGenerator.cpp
M flang/lib/Semantics/check-cuda.cpp
M flang/test/Fir/OpenACC/declare-action-conversion.fir
M flang/test/Fir/declare_value-codegen.fir
M flang/test/Integration/debug-allocatable-1.f90
M flang/test/Integration/debug-common-block-1.f90
M flang/test/Integration/debug-complex-1.f90
M flang/test/Integration/debug-complex-2.f90
M flang/test/Integration/debug-fixed-array-type-2.f90
M flang/test/Integration/debug-local-var-2.f90
M flang/test/Integration/debug-module-2.f90
M flang/test/Integration/debug-proc-ptr-e2e.f90
M flang/test/Integration/debug-ptr-type.f90
A flang/test/Lower/CUDA/cuda-data-transfer-implicit.cuf
M flang/test/Lower/CUDA/cuda-data-transfer.cuf
M flang/test/Lower/CUDA/cuda-managed.cuf
M flang/test/Lower/Intrinsics/pack.f90
M flang/test/Lower/Intrinsics/parity.f90
M flang/test/Lower/Intrinsics/popcnt.f90
M flang/test/Lower/Intrinsics/poppar.f90
M flang/test/Lower/Intrinsics/present.f90
M flang/test/Lower/OpenMP/composite_simd_linear.f90
M flang/test/Lower/OpenMP/distribute-parallel-do-simd.f90
M flang/test/Lower/OpenMP/distribute-simd.f90
M flang/test/Lower/OpenMP/loop-pointer-variable.f90
M flang/test/Lower/OpenMP/ordered-simd.f90
M flang/test/Lower/OpenMP/wsloop-simd.f90
M flang/test/Transforms/debug-allocatable-1.fir
M flang/test/Transforms/debug-associate-component.fir
M flang/test/Transforms/debug-complex-1.fir
M flang/test/Transforms/debug-derived-type-1.fir
M flang/test/Transforms/debug-fixed-array-type.fir
M flang/test/Transforms/debug-fn-info.fir
M flang/test/Transforms/debug-index-type.fir
M flang/test/Transforms/debug-local-var.fir
M flang/test/Transforms/debug-module-1.fir
M flang/test/Transforms/debug-module-2.fir
M flang/test/Transforms/debug-proc-ptr.fir
M flang/test/Transforms/debug-ptr-type.fir
M flang/test/Transforms/debug-vector-type.fir
M libc/docs/CMakeLists.txt
M libc/docs/headers/index.rst
M libc/shared/math/cbrtf.h
M libc/shared/rpc.h
M libc/shared/rpc_util.h
M libc/src/__support/CPP/bit.h
M libc/src/__support/FPUtil/NearestIntegerOperations.h
M libc/src/__support/FPUtil/bfloat16.h
M libc/src/__support/FPUtil/comparison_operations.h
M libc/src/__support/FPUtil/generic/add_sub.h
M libc/src/__support/FPUtil/generic/div.h
M libc/src/__support/FPUtil/generic/mul.h
M libc/src/__support/FPUtil/rounding_mode.h
M libc/src/__support/math/CMakeLists.txt
M libc/src/__support/math/acoshf_utils.h
M libc/src/__support/math/ceil.h
M libc/src/__support/math/ceilbf16.h
M libc/src/__support/math/ceilf.h
M libc/src/__support/math/ceilf128.h
M libc/src/__support/math/ceilf16.h
M libc/src/__support/math/ceill.h
M libc/src/math/generic/logf.cpp
M libc/test/shared/CMakeLists.txt
A libc/test/shared/shared_math_constexpr_test.cpp
M libc/test/shared/shared_math_test.cpp
M libc/test/src/math/acoshf_test.cpp
M libc/test/src/math/asinhf_test.cpp
M libc/test/src/math/atanhf_test.cpp
M libclc/clc/include/clc/integer/gentype.inc
A libclc/clc/include/clc/math/clc_atan_helpers.h
A libclc/clc/include/clc/math/clc_atan_helpers_decl.inc
M libclc/clc/include/clc/math/clc_ep_decl.inc
R libclc/clc/include/clc/math/clc_ep_log.h
R libclc/clc/include/clc/math/clc_ep_log_decl.inc
M libclc/clc/include/clc/math/clc_lgamma_r.h
A libclc/clc/include/clc/math/clc_lgamma_r_decl.inc
M libclc/clc/include/clc/math/gentype.inc
M libclc/clc/include/clc/relational/binary_decl.inc
M libclc/clc/include/clc/relational/unary_decl.inc
M libclc/clc/include/clc/shared/binary_with_out_arg_scalarize.inc
A libclc/clc/include/clc/shared/unary_with_out_arg_scalarize_loop.inc
M libclc/clc/lib/generic/CMakeLists.txt
M libclc/clc/lib/generic/atomic/clc_atomic_exchange.cl
M libclc/clc/lib/generic/atomic/clc_atomic_load.cl
M libclc/clc/lib/generic/atomic/clc_atomic_store.cl
M libclc/clc/lib/generic/common/clc_sign.inc
M libclc/clc/lib/generic/conversion/clc_convert_float.inc
M libclc/clc/lib/generic/conversion/clc_convert_float2float.cl
M libclc/clc/lib/generic/conversion/clc_convert_int2float.cl
M libclc/clc/lib/generic/math/clc_acosh.cl
M libclc/clc/lib/generic/math/clc_acosh.inc
M libclc/clc/lib/generic/math/clc_asin.cl
M libclc/clc/lib/generic/math/clc_asin.inc
M libclc/clc/lib/generic/math/clc_asinh.cl
M libclc/clc/lib/generic/math/clc_asinh.inc
M libclc/clc/lib/generic/math/clc_atan.cl
M libclc/clc/lib/generic/math/clc_atan.inc
A libclc/clc/lib/generic/math/clc_atan_helpers.cl
A libclc/clc/lib/generic/math/clc_atan_helpers.inc
M libclc/clc/lib/generic/math/clc_atanh.cl
M libclc/clc/lib/generic/math/clc_atanh.inc
M libclc/clc/lib/generic/math/clc_cosh.cl
M libclc/clc/lib/generic/math/clc_cosh.inc
M libclc/clc/lib/generic/math/clc_ep.cl
M libclc/clc/lib/generic/math/clc_ep.inc
R libclc/clc/lib/generic/math/clc_ep_log.cl
R libclc/clc/lib/generic/math/clc_ep_log.inc
M libclc/clc/lib/generic/math/clc_expm1.cl
M libclc/clc/lib/generic/math/clc_expm1.inc
M libclc/clc/lib/generic/math/clc_lgamma_r.cl
M libclc/clc/lib/generic/math/clc_lgamma_r.inc
A libclc/clc/lib/generic/math/clc_lgamma_r_stret.inc
M libclc/clc/lib/generic/math/clc_log1p.cl
M libclc/clc/lib/generic/math/clc_log1p.inc
M libclc/clc/lib/generic/math/clc_sinh.cl
M libclc/clc/lib/generic/math/clc_sinh.inc
M libclc/clc/lib/generic/math/clc_tanh.cl
M libclc/clc/lib/generic/math/clc_tanh.inc
M libclc/clc/lib/generic/math/clc_tgamma.cl
A libclc/clc/lib/generic/math/clc_tgamma.inc
M libclc/opencl/lib/generic/relational/relational_binary_def.inc
M libclc/opencl/lib/generic/relational/relational_unary_def.inc
M lldb/docs/resources/formatterbytecode.rst
M lldb/examples/python/formatter_bytecode.py
M lldb/packages/Python/lldbsuite/test/configuration.py
M lldb/packages/Python/lldbsuite/test/decorators.py
M lldb/packages/Python/lldbsuite/test/dotest.py
M lldb/packages/Python/lldbsuite/test/dotest_args.py
M lldb/source/Plugins/Process/FreeBSD-Kernel-Core/ProcessFreeBSDKernelCore.cpp
M lldb/source/Target/ProcessTrace.cpp
M lldb/test/API/lit.cfg.py
M lldb/test/API/lit.site.cfg.py.in
M lldb/test/CMakeLists.txt
M lldb/test/Shell/ScriptInterpreter/Python/Inputs/FormatterBytecode/RigidArrayLLDBFormatterC.txt
M lldb/test/Shell/ScriptInterpreter/Python/Inputs/FormatterBytecode/RigidArrayLLDBFormatterSwift.txt
M lldb/unittests/Process/ProcessTraceTest.cpp
M lldb/utils/lldb-dotest/CMakeLists.txt
M lldb/utils/lldb-dotest/lldb-dotest.in
M llvm/include/llvm/ADT/GenericUniformityImpl.h
M llvm/include/llvm/ADT/StringSwitch.h
M llvm/include/llvm/ADT/Uniformity.h
M llvm/include/llvm/Analysis/TargetTransformInfo.h
M llvm/include/llvm/Analysis/TargetTransformInfoImpl.h
M llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h
M llvm/include/llvm/CodeGen/GlobalISel/LegalizerInfo.h
M llvm/include/llvm/CodeGen/LowLevelTypeUtils.h
M llvm/include/llvm/CodeGen/TargetLowering.h
M llvm/include/llvm/CodeGenTypes/LowLevelType.h
M llvm/include/llvm/ExecutionEngine/Orc/Core.h
M llvm/include/llvm/MC/MCELFStreamer.h
M llvm/include/llvm/MC/MCStreamer.h
M llvm/include/llvm/MC/MCWinCOFFStreamer.h
M llvm/include/llvm/Support/KnownBits.h
M llvm/lib/Analysis/DependenceAnalysis.cpp
M llvm/lib/Analysis/TargetTransformInfo.cpp
M llvm/lib/Analysis/UniformityAnalysis.cpp
M llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
M llvm/lib/CodeGen/AsmPrinter/WinCFGuard.cpp
M llvm/lib/CodeGen/GlobalISel/CallLowering.cpp
M llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
M llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
M llvm/lib/CodeGen/GlobalISel/LegalizeMutations.cpp
M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
M llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp
M llvm/lib/CodeGen/GlobalISel/Utils.cpp
M llvm/lib/CodeGen/LowLevelTypeUtils.cpp
M llvm/lib/CodeGen/MIRParser/MIParser.cpp
M llvm/lib/CodeGen/MachineUniformityAnalysis.cpp
M llvm/lib/CodeGen/MachineVerifier.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/lib/CodeGenTypes/LowLevelType.cpp
M llvm/lib/DebugInfo/BTF/BTFParser.cpp
M llvm/lib/DebugInfo/DWARF/DWARFCompileUnit.cpp
M llvm/lib/DebugInfo/DWARF/DWARFDebugAbbrev.cpp
M llvm/lib/DebugInfo/DWARF/DWARFDebugAddr.cpp
M llvm/lib/DebugInfo/DWARF/DWARFDebugArangeSet.cpp
M llvm/lib/ExecutionEngine/Orc/Core.cpp
M llvm/lib/MC/MCELFStreamer.cpp
M llvm/lib/MC/MCParser/AsmParser.cpp
M llvm/lib/MC/MCParser/MasmParser.cpp
M llvm/lib/MC/MCStreamer.cpp
M llvm/lib/MC/MCWinCOFFStreamer.cpp
M llvm/lib/Object/ELF.cpp
M llvm/lib/Support/DivisionByConstantInfo.cpp
M llvm/lib/Support/Parallel.cpp
M llvm/lib/Support/Unix/Process.inc
M llvm/lib/Target/AMDGPU/AMDGPUAtomicOptimizer.cpp
M llvm/lib/Target/AMDGPU/AMDGPUCombinerHelper.cpp
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h
M llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
M llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
M llvm/lib/Target/Hexagon/HexagonLoadStoreWidening.cpp
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
M llvm/lib/Target/PowerPC/PPCInstr64Bit.td
M llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVMergeBaseOffset.cpp
M llvm/lib/Target/SPIRV/Analysis/SPIRVConvergenceRegionAnalysis.h
M llvm/lib/Target/SPIRV/MCTargetDesc/SPIRVBaseInfo.h
M llvm/lib/Target/SPIRV/MCTargetDesc/SPIRVInstPrinter.h
M llvm/lib/Target/SPIRV/MCTargetDesc/SPIRVTargetStreamer.h
M llvm/lib/Target/SPIRV/SPIRVCBufferAccess.h
M llvm/lib/Target/SPIRV/SPIRVCommandLine.h
M llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.h
M llvm/lib/Target/SPIRV/SPIRVLegalizeZeroSizeArrays.h
M llvm/lib/Target/SPIRV/SPIRVLegalizerInfo.h
M llvm/lib/Target/SPIRV/SPIRVMetadata.h
M llvm/lib/Target/SPIRV/SPIRVPushConstantAccess.h
M llvm/lib/Target/SPIRV/SPIRVStructurizerWrapper.h
M llvm/lib/Target/SPIRV/SPIRVTypeInst.h
M llvm/lib/Target/Sparc/SparcInstrInfo.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyFastISel.cpp
M llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
M llvm/lib/Target/X86/X86AsmPrinter.h
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Transforms/Coroutines/CoroSplit.cpp
M llvm/lib/Transforms/Scalar/LoopFuse.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/test/Analysis/DependenceAnalysis/SameSDLoops.ll
A llvm/test/Analysis/DependenceAnalysis/weak-crossing-siv-coeff-may-zero.ll
A llvm/test/Analysis/UniformityAnalysis/AMDGPU/uniform_intrinsic.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-subvector.ll
M llvm/test/CodeGen/AArch64/GlobalISel/pr168872.ll
M llvm/test/CodeGen/AArch64/GlobalISel/translate-gep.ll
M llvm/test/CodeGen/AArch64/GlobalISel/translate-sve-formal-argument-multiple.ll
M llvm/test/CodeGen/AArch64/GlobalISel/translate-sve-formal-argument.ll
M llvm/test/CodeGen/AArch64/cls.ll
M llvm/test/CodeGen/AArch64/pr61549.ll
M llvm/test/CodeGen/AArch64/rem-by-const.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.ps.live.mir
A llvm/test/CodeGen/AMDGPU/atomic_optimizations_single_lane.ll
M llvm/test/CodeGen/AMDGPU/cube.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cubeid.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cubema.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cubesc.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cubetc.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.pknorm.i16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.pknorm.u16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.bpermute.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.permute.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fmad.ftz.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fmad.ftz.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ps.live.ll
A llvm/test/CodeGen/Hexagon/load-widen-addasl.mir
A llvm/test/CodeGen/Hexagon/store-widen-addasl.mir
M llvm/test/CodeGen/MIR/AArch64/parse-low-level-type-invalid0.mir
M llvm/test/CodeGen/MIR/AArch64/parse-low-level-type-invalid1.mir
M llvm/test/CodeGen/MIR/AArch64/parse-low-level-type-invalid2.mir
M llvm/test/CodeGen/MIR/AArch64/parse-low-level-type-invalid3.mir
M llvm/test/CodeGen/MIR/Generic/scalable-vector-type-err0.mir
M llvm/test/CodeGen/MIR/Generic/scalable-vector-type-err1.mir
M llvm/test/CodeGen/MIR/Generic/scalable-vector-type-err10.mir
M llvm/test/CodeGen/MIR/Generic/scalable-vector-type-err11.mir
M llvm/test/CodeGen/MIR/Generic/scalable-vector-type-err12.mir
M llvm/test/CodeGen/MIR/Generic/scalable-vector-type-err13.mir
M llvm/test/CodeGen/MIR/Generic/scalable-vector-type-err14.mir
M llvm/test/CodeGen/MIR/Generic/scalable-vector-type-err15.mir
M llvm/test/CodeGen/MIR/Generic/scalable-vector-type-err2.mir
M llvm/test/CodeGen/MIR/Generic/scalable-vector-type-err3.mir
M llvm/test/CodeGen/MIR/Generic/scalable-vector-type-err4.mir
M llvm/test/CodeGen/MIR/Generic/scalable-vector-type-err5.mir
M llvm/test/CodeGen/MIR/Generic/scalable-vector-type-err6.mir
M llvm/test/CodeGen/MIR/Generic/scalable-vector-type-err7.mir
M llvm/test/CodeGen/MIR/Generic/scalable-vector-type-err8.mir
M llvm/test/CodeGen/MIR/Generic/scalable-vector-type-err9.mir
M llvm/test/CodeGen/MIR/WebAssembly/typed-immediate-operand-invalid0.mir
M llvm/test/CodeGen/MIR/WebAssembly/typed-immediate-operand-invalid1.mir
M llvm/test/CodeGen/NVPTX/i1-int-to-fp.ll
A llvm/test/CodeGen/RISCV/fold-addi-loadstore-cpi.mir
M llvm/test/CodeGen/RISCV/rvv/cttz-elts.ll
M llvm/test/CodeGen/RISCV/rvv/vector-extract-last-active.ll
A llvm/test/CodeGen/RISCV/sfb-merge-base-offset.ll
M llvm/test/CodeGen/RISCV/urem-lkk.ll
M llvm/test/CodeGen/VE/Scalar/ctlz.ll
M llvm/test/CodeGen/WebAssembly/load-ext.ll
A llvm/test/CodeGen/WinCFGuard/cfguard-alias.ll
M llvm/test/CodeGen/X86/divmod128.ll
M llvm/test/CodeGen/X86/i128-udiv.ll
M llvm/test/CodeGen/X86/npm-asmprint.ll
M llvm/test/CodeGen/X86/vector-idiv-udiv-128.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i16-stride-3.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i16-stride-4.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i16-stride-5.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i16-stride-6.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i16-stride-7.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i16-stride-8.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i64-stride-5.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i64-stride-7.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i8-stride-4.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i8-stride-7.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i8-stride-8.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-6.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i32-stride-6.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i32-stride-8.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i64-stride-6.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i64-stride-7.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-6.ll
M llvm/test/CodeGen/X86/vector-shuffle-512-v64.ll
M llvm/test/Instrumentation/AddressSanitizer/remove-memory-effects.ll
M llvm/test/TableGen/GlobalISelEmitter/GlobalISelEmitter.td
M llvm/test/TableGen/GlobalISelEmitter/HwModes.td
A llvm/test/Transforms/Coroutines/coro-split-addrspace.ll
M llvm/test/Transforms/LoopFusion/da_separate_loops.ll
M llvm/test/Transforms/LoopVectorize/2016-07-27-loop-vec.ll
M llvm/test/Transforms/LoopVectorize/AArch64/epilog-iv-select-cmp.ll
M llvm/test/Transforms/LoopVectorize/AArch64/epilog-vectorization-factors.ll
M llvm/test/Transforms/LoopVectorize/AArch64/epilog-vectorization-widen-inductions.ll
M llvm/test/Transforms/LoopVectorize/AArch64/f128-fmuladd-reduction.ll
M llvm/test/Transforms/LoopVectorize/AArch64/force-target-instruction-cost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/gather-do-not-vectorize-addressing.ll
M llvm/test/Transforms/LoopVectorize/AArch64/induction-costs.ll
M llvm/test/Transforms/LoopVectorize/AArch64/interleave-with-runtime-checks.ll
M llvm/test/Transforms/LoopVectorize/AArch64/intrinsiccost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/low_trip_count_predicates.ll
M llvm/test/Transforms/LoopVectorize/AArch64/neon-inloop-reductions.ll
M llvm/test/Transforms/LoopVectorize/AArch64/nontemporal-load-store.ll
M llvm/test/Transforms/LoopVectorize/AArch64/outer_loop_prefer_scalable.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-dot-product-epilogue.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-dot-product.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-sub-epilogue-vec.ll
M llvm/test/Transforms/LoopVectorize/AArch64/pr33053.ll
M llvm/test/Transforms/LoopVectorize/AArch64/pr36032.ll
M llvm/test/Transforms/LoopVectorize/AArch64/prefer-fixed-if-equal-to-scalable.ll
M llvm/test/Transforms/LoopVectorize/AArch64/reg-usage.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-epilog-vect.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-illegal-type.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-interleaved-accesses.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-interleaved-masked-accesses.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-invalid-costs.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve2-histcnt.ll
M llvm/test/Transforms/LoopVectorize/AArch64/transform-narrow-interleave-to-widen-memory-cost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/transform-narrow-interleave-to-widen-memory-scalable.ll
M llvm/test/Transforms/LoopVectorize/AArch64/vector-reverse.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-known-trip-count.ll
M llvm/test/Transforms/LoopVectorize/ARM/prefer-tail-loop-folding.ll
M llvm/test/Transforms/LoopVectorize/ARM/tail-folding-allowed.ll
M llvm/test/Transforms/LoopVectorize/ARM/tail-folding-counting-down.ll
M llvm/test/Transforms/LoopVectorize/ARM/tail-folding-loop-hint.ll
M llvm/test/Transforms/LoopVectorize/ARM/tail-folding-not-allowed.ll
M llvm/test/Transforms/LoopVectorize/ARM/tail-folding-prefer-flag.ll
M llvm/test/Transforms/LoopVectorize/ARM/tail-folding-reductions-allowed.ll
M llvm/test/Transforms/LoopVectorize/Hexagon/minimum-vf.ll
M llvm/test/Transforms/LoopVectorize/LoongArch/loongarch-interleaved.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/exit-branch-cost.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/interleave_IC.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/optimal-epilog-vectorization-profitability.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/optimal-epilog-vectorization.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/predcost.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/vectorize-bswap.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/widened-massv-call.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/widened-massv-vfabi-attr.ll
M llvm/test/Transforms/LoopVectorize/RISCV/illegal-type.ll
M llvm/test/Transforms/LoopVectorize/RISCV/masked_gather_scatter.ll
M llvm/test/Transforms/LoopVectorize/RISCV/riscv-interleaved.ll
M llvm/test/Transforms/LoopVectorize/Sparc/no-vectorize.ll
M llvm/test/Transforms/LoopVectorize/SystemZ/mem-interleaving-costs-03.ll
M llvm/test/Transforms/LoopVectorize/SystemZ/predicated-first-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/VE/disable_lv.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-half.ll
M llvm/test/Transforms/LoopVectorize/X86/conversion-cost.ll
M llvm/test/Transforms/LoopVectorize/X86/cost-model.ll
M llvm/test/Transforms/LoopVectorize/X86/drop-poison-generating-flags.ll
M llvm/test/Transforms/LoopVectorize/X86/epilog-vectorization-inductions.ll
M llvm/test/Transforms/LoopVectorize/X86/float-induction-x86.ll
M llvm/test/Transforms/LoopVectorize/X86/gather_scatter.ll
M llvm/test/Transforms/LoopVectorize/X86/int128_no_gather.ll
M llvm/test/Transforms/LoopVectorize/X86/interleave_short_tc.ll
M llvm/test/Transforms/LoopVectorize/X86/interleaved-accesses-use-after-free.ll
M llvm/test/Transforms/LoopVectorize/X86/intrinsiccost.ll
M llvm/test/Transforms/LoopVectorize/X86/masked_load_store.ll
M llvm/test/Transforms/LoopVectorize/X86/pr35432.ll
M llvm/test/Transforms/LoopVectorize/X86/pr54634.ll
M llvm/test/Transforms/LoopVectorize/X86/reg-usage-debug.ll
M llvm/test/Transforms/LoopVectorize/X86/scatter_crash.ll
M llvm/test/Transforms/LoopVectorize/X86/strided_load_cost.ll
M llvm/test/Transforms/LoopVectorize/X86/tail_folding_and_assume_safety.ll
M llvm/test/Transforms/LoopVectorize/X86/tail_loop_folding.ll
M llvm/test/Transforms/LoopVectorize/X86/transform-narrow-interleave-to-widen-memory-epilogue-vec.ll
M llvm/test/Transforms/LoopVectorize/X86/transform-narrow-interleave-to-widen-memory.ll
M llvm/test/Transforms/LoopVectorize/X86/uniformshift.ll
M llvm/test/Transforms/LoopVectorize/X86/x86-interleaved-accesses-masked-group.ll
M llvm/test/Transforms/LoopVectorize/X86/x86-interleaved-store-accesses-with-gaps.ll
M llvm/test/Transforms/LoopVectorize/X86/x86-pr39099.ll
M llvm/test/Transforms/LoopVectorize/diag-missing-instr-debug-loc.ll
M llvm/test/Transforms/LoopVectorize/diag-with-hotness-info-2.ll
M llvm/test/Transforms/LoopVectorize/diag-with-hotness-info.ll
M llvm/test/Transforms/LoopVectorize/discriminator.ll
M llvm/test/Transforms/LoopVectorize/dont-fold-tail-for-const-TC.ll
M llvm/test/Transforms/LoopVectorize/dont-fold-tail-for-divisible-TC.ll
M llvm/test/Transforms/LoopVectorize/epilog-iv-select-cmp.ll
M llvm/test/Transforms/LoopVectorize/epilog-vectorization-any-of-reductions.ll
M llvm/test/Transforms/LoopVectorize/epilog-vectorization-reductions.ll
M llvm/test/Transforms/LoopVectorize/explicit_outer_detection.ll
M llvm/test/Transforms/LoopVectorize/explicit_outer_nonuniform_inner.ll
M llvm/test/Transforms/LoopVectorize/explicit_outer_uniform_diverg_branch.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence-complex.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/fix-reduction-dbg.ll
M llvm/test/Transforms/LoopVectorize/forked-pointers.ll
M llvm/test/Transforms/LoopVectorize/induction-ptrcasts.ll
M llvm/test/Transforms/LoopVectorize/interleaved-accesses-1.ll
M llvm/test/Transforms/LoopVectorize/interleaved-accesses-2.ll
M llvm/test/Transforms/LoopVectorize/interleaved-accesses-masked-group.ll
M llvm/test/Transforms/LoopVectorize/interleaved-accesses-uniform-load.ll
M llvm/test/Transforms/LoopVectorize/libcall-remark.ll
M llvm/test/Transforms/LoopVectorize/memdep-fold-tail.ll
M llvm/test/Transforms/LoopVectorize/memdep.ll
M llvm/test/Transforms/LoopVectorize/memory-dep-remarks.ll
M llvm/test/Transforms/LoopVectorize/middle-block-dbg.ll
M llvm/test/Transforms/LoopVectorize/no_array_bounds_scalable.ll
M llvm/test/Transforms/LoopVectorize/nounroll.ll
M llvm/test/Transforms/LoopVectorize/optimal-epilog-vectorization.ll
M llvm/test/Transforms/LoopVectorize/outer_loop_scalable.ll
M llvm/test/Transforms/LoopVectorize/pr30654-phiscev-sext-trunc.ll
M llvm/test/Transforms/LoopVectorize/pr31098.ll
M llvm/test/Transforms/LoopVectorize/pr33706.ll
M llvm/test/Transforms/LoopVectorize/pr35773.ll
M llvm/test/Transforms/LoopVectorize/pr38800.ll
M llvm/test/Transforms/LoopVectorize/pr39099.ll
M llvm/test/Transforms/LoopVectorize/pr51614-fold-tail-by-masking.ll
M llvm/test/Transforms/LoopVectorize/runtime-check.ll
M llvm/test/Transforms/LoopVectorize/tail-folding-counting-down.ll
M llvm/test/Transforms/LoopVectorize/unroll-novec-memcheck-metadata.ll
M llvm/test/Transforms/LoopVectorize/vect-phiscev-sext-trunc.ll
M llvm/test/Transforms/LoopVectorize/vectorizeVFone.ll
M llvm/test/Transforms/PhaseOrdering/X86/pr48844-br-to-switch-vectorization.ll
A llvm/test/Transforms/SLPVectorizer/AArch64/unprofitable-alternate-subtree.ll
M llvm/test/tools/llc/mattr-mcpu-help.ll
M llvm/test/tools/llc/mtune.ll
A llvm/test/tools/opt/mattr-mcpu-help.ll
A llvm/test/tools/sancov/XCOFF/lit.local.cfg
A llvm/test/tools/sancov/XCOFF/xcoff-sancov-symbols.test
M llvm/tools/llc/llc.cpp
M llvm/tools/llvm-ml/Disassembler.cpp
M llvm/tools/opt/optdriver.cpp
M llvm/tools/sancov/sancov.cpp
M llvm/unittests/ADT/StringSwitchTest.cpp
M llvm/unittests/CodeGen/GlobalISel/CMakeLists.txt
A llvm/unittests/CodeGen/GlobalISel/IRTranslatorBF16Test.cpp
M llvm/unittests/DebugInfo/DWARF/DWARFExpressionCopyBytesTest.cpp
M llvm/unittests/ExecutionEngine/Orc/CoreAPIsTest.cpp
M llvm/unittests/MC/DwarfLineTableHeaders.cpp
M llvm/unittests/Support/FormatVariadicTest.cpp
M llvm/unittests/Support/KnownBitsTest.cpp
M llvm/utils/TableGen/Common/CMakeLists.txt
M llvm/utils/TableGen/Common/GlobalISel/GlobalISelMatchTable.cpp
M llvm/utils/TableGen/Common/GlobalISel/GlobalISelMatchTableExecutorEmitter.cpp
M llvm/utils/TableGen/Common/GlobalISel/GlobalISelMatchTableExecutorEmitter.h
M llvm/utils/git/github-automation.py
M llvm/utils/gn/secondary/lldb/test/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/Target/AMDGPU/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/Target/WebAssembly/BUILD.gn
M mlir/docs/Bindings/Python.md
M mlir/include/mlir/Transforms/Passes.td
M mlir/lib/Dialect/Affine/IR/AffineOps.cpp
M mlir/lib/Dialect/Linalg/Transforms/TilingInterfaceImpl.cpp
M mlir/lib/Pass/PassRegistry.cpp
M mlir/test/Dialect/Affine/ops.mlir
M mlir/test/Dialect/Linalg/transform-tile-reduction.mlir
M mlir/test/Interfaces/TilingInterface/tile-and-fuse-with-reduction-tiling.mlir
M offload/plugins-nextgen/amdgpu/src/rtl.cpp
M offload/plugins-nextgen/common/include/PluginInterface.h
M offload/plugins-nextgen/common/include/RPC.h
M offload/plugins-nextgen/common/src/PluginInterface.cpp
M offload/plugins-nextgen/common/src/RPC.cpp
M offload/plugins-nextgen/level_zero/src/L0Context.cpp
M offload/plugins-nextgen/level_zero/src/L0Plugin.cpp
M offload/plugins-nextgen/level_zero/src/L0Program.cpp
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
Merge branch 'main' into users/s-perron/texture2d-mips
Compare: https://github.com/llvm/llvm-project/compare/e106d121fd2a...bce7adc84a14
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