[all-commits] [llvm/llvm-project] 399b46: AMDGPU: Codegen for v_dual_dot2acc_f32_f16/bf16 fr...

[Petar Avramovic via All-commits]

  Branch: refs/heads/users/petar-avramovic/dualdot2acc
  Home:   https://github.com/llvm/llvm-project
  Commit: 399b465700cb595c043f876c7f813c9e8ac7ccda
      https://github.com/llvm/llvm-project/commit/399b465700cb595c043f876c7f813c9e8ac7ccda
  Author: Petar Avramovic <Petar.Avramovic at amd.com>
  Date:   2026-03-24 (Tue, 24 Mar 2026)

  Changed paths:
    M llvm/lib/Target/AMDGPU/GCNVOPDUtils.cpp
    M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
    M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
    M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
    M llvm/lib/Target/AMDGPU/VOPInstructions.td
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fdot2.f32.bf16.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fdot2.ll

  Log Message:
  -----------
  AMDGPU: Codegen for v_dual_dot2acc_f32_f16/bf16 from VOP3

For V_DOT2_F32_F16 and V_DOT2_F32_BF16 add their VOPDName and mark
them with usesCustomInserter whihc will be used to add pre-RA register
allocation hints to preferably assign dst and src2 to the same physical
register. When the hint is satisfied, canMapVOP3PToVOPD recognises the
instruction as eligible for VOPD pairing by checking if it is VOP2 like:
dst==src2, no source modifiers, no clamp, and src1 is a register.
Mark both instructions as commutable to allow a literal in src1 to be
moved to src0, since VOPD only permits a literal in src0.



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